Commit | Line | Data |
---|---|---|
b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
8e22d792 LD |
2 | /* |
3 | * ARM HDLCD Controller register definition | |
4 | */ | |
5 | ||
6 | #ifndef __HDLCD_DRV_H__ | |
7 | #define __HDLCD_DRV_H__ | |
8 | ||
9 | struct hdlcd_drm_private { | |
10 | void __iomem *mmio; | |
11 | struct clk *clk; | |
12 | struct drm_fbdev_cma *fbdev; | |
8e22d792 LD |
13 | struct drm_crtc crtc; |
14 | struct drm_plane *plane; | |
a95acec1 | 15 | struct drm_atomic_state *state; |
8e22d792 LD |
16 | #ifdef CONFIG_DEBUG_FS |
17 | atomic_t buffer_underrun_count; | |
18 | atomic_t bus_error_count; | |
19 | atomic_t vsync_count; | |
20 | atomic_t dma_end_count; | |
21 | #endif | |
22 | }; | |
23 | ||
24 | #define crtc_to_hdlcd_priv(x) container_of(x, struct hdlcd_drm_private, crtc) | |
25 | ||
26 | static inline void hdlcd_write(struct hdlcd_drm_private *hdlcd, | |
27 | unsigned int reg, u32 value) | |
28 | { | |
29 | writel(value, hdlcd->mmio + reg); | |
30 | } | |
31 | ||
32 | static inline u32 hdlcd_read(struct hdlcd_drm_private *hdlcd, unsigned int reg) | |
33 | { | |
34 | return readl(hdlcd->mmio + reg); | |
35 | } | |
36 | ||
37 | int hdlcd_setup_crtc(struct drm_device *dev); | |
38 | void hdlcd_set_scanout(struct hdlcd_drm_private *hdlcd); | |
8e22d792 LD |
39 | |
40 | #endif /* __HDLCD_DRV_H__ */ |