[linux-2.6-block.git] / drivers / gpu / drm / amd / display / dc / inc / hw / link_encoder.h

/*
 * Copyright 2017 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */
/*
 * link_encoder.h
 *
 *  Created on: Oct 6, 2015
 *      Author: yonsun
 */

#ifndef LINK_ENCODER_H_
#define LINK_ENCODER_H_

#include "grph_object_defs.h"
#include "signal_types.h"
#include "dc_types.h"

struct dc_context;
struct encoder_set_dp_phy_pattern_param;
struct link_mst_stream_allocation_table;
struct dc_link_settings;
struct link_training_settings;
struct pipe_ctx;

struct encoder_init_data {
	enum channel_id channel;
	struct graphics_object_id connector;
	enum hpd_source_id hpd_source;
	/* TODO: in DAL2, here was pointer to EventManagerInterface */
	struct graphics_object_id encoder;
	struct dc_context *ctx;
	enum transmitter transmitter;
};

struct encoder_feature_support {
	union {
		struct {
			uint32_t IS_HBR2_CAPABLE:1;
			uint32_t IS_HBR3_CAPABLE:1;
			uint32_t IS_TPS3_CAPABLE:1;
			uint32_t IS_TPS4_CAPABLE:1;
			uint32_t IS_YCBCR_CAPABLE:1;
			uint32_t HDMI_6GB_EN:1;
		} bits;
		uint32_t raw;
	} flags;

	enum dc_color_depth max_hdmi_deep_color;
	unsigned int max_hdmi_pixel_clock;
	bool ycbcr420_supported;
};

union dpcd_psr_configuration {
	struct {
		unsigned char ENABLE                    : 1;
		unsigned char TRANSMITTER_ACTIVE_IN_PSR : 1;
		unsigned char CRC_VERIFICATION          : 1;
		unsigned char FRAME_CAPTURE_INDICATION  : 1;
		/* For eDP 1.4, PSR v2*/
		unsigned char LINE_CAPTURE_INDICATION   : 1;
		/* For eDP 1.4, PSR v2*/
		unsigned char IRQ_HPD_WITH_CRC_ERROR    : 1;
		unsigned char RESERVED                  : 2;
	} bits;
	unsigned char raw;
};

union psr_error_status {
	struct {
		unsigned char LINK_CRC_ERROR        :1;
		unsigned char RFB_STORAGE_ERROR     :1;
		unsigned char RESERVED              :6;
	} bits;
	unsigned char raw;
};

union psr_sink_psr_status {
	struct {
	unsigned char SINK_SELF_REFRESH_STATUS  :3;
	unsigned char RESERVED                  :5;
	} bits;
	unsigned char raw;
};

struct link_encoder {
	const struct link_encoder_funcs *funcs;
	int32_t aux_channel_offset;
	struct dc_context *ctx;
	struct graphics_object_id id;
	struct graphics_object_id connector;
	uint32_t output_signals;
	enum engine_id preferred_engine;
	struct encoder_feature_support features;
	enum transmitter transmitter;
	enum hpd_source_id hpd_source;
};

struct link_encoder_funcs {
	bool (*validate_output_with_stream)(
		struct link_encoder *enc, const struct dc_stream_state *stream);
	void (*hw_init)(struct link_encoder *enc);
	void (*setup)(struct link_encoder *enc,
		enum signal_type signal);
	void (*enable_tmds_output)(struct link_encoder *enc,
		enum clock_source_id clock_source,
		enum dc_color_depth color_depth,
		bool hdmi,
		bool dual_link,
		uint32_t pixel_clock);
	void (*enable_dp_output)(struct link_encoder *enc,
		const struct dc_link_settings *link_settings,
		enum clock_source_id clock_source);
	void (*enable_dp_mst_output)(struct link_encoder *enc,
		const struct dc_link_settings *link_settings,
		enum clock_source_id clock_source);
	void (*disable_output)(struct link_encoder *link_enc,
		enum signal_type signal, struct dc_link *link);
	void (*dp_set_lane_settings)(struct link_encoder *enc,
		const struct link_training_settings *link_settings);
	void (*dp_set_phy_pattern)(struct link_encoder *enc,
		const struct encoder_set_dp_phy_pattern_param *para);
	void (*update_mst_stream_allocation_table)(
		struct link_encoder *enc,
		const struct link_mst_stream_allocation_table *table);
	void (*psr_program_dp_dphy_fast_training)(struct link_encoder *enc,
			bool exit_link_training_required);
	void (*psr_program_secondary_packet)(struct link_encoder *enc,
				unsigned int sdp_transmit_line_num_deadline);
	void (*connect_dig_be_to_fe)(struct link_encoder *enc,
		enum engine_id engine,
		bool connect);
	void (*enable_hpd)(struct link_encoder *enc);
	void (*disable_hpd)(struct link_encoder *enc);
	void (*destroy)(struct link_encoder **enc);
};

#endif /* LINK_ENCODER_H_ */
Commit	Line	Data
bf93b448 AD	1	/*
	2	* Copyright 2017 Advanced Micro Devices, Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	*/
4562236b HW	23	/*
	24	* link_encoder.h
	25	*
	26	* Created on: Oct 6, 2015
	27	* Author: yonsun
	28	*/
	29
	30	#ifndef LINK_ENCODER_H_
	31	#define LINK_ENCODER_H_
	32
	33	#include "grph_object_defs.h"
	34	#include "signal_types.h"
	35	#include "dc_types.h"
	36
	37	struct dc_context;
	38	struct encoder_set_dp_phy_pattern_param;
	39	struct link_mst_stream_allocation_table;
	40	struct dc_link_settings;
	41	struct link_training_settings;
4562236b HW	42	struct pipe_ctx;
	43
	44	struct encoder_init_data {
	45	enum channel_id channel;
	46	struct graphics_object_id connector;
	47	enum hpd_source_id hpd_source;
	48	/* TODO: in DAL2, here was pointer to EventManagerInterface */
	49	struct graphics_object_id encoder;
	50	struct dc_context *ctx;
	51	enum transmitter transmitter;
	52	};
	53
	54	struct encoder_feature_support {
	55	union {
	56	struct {
4562236b HW	57	uint32_t IS_HBR2_CAPABLE:1;
4562236b HW	58	uint32_t IS_HBR3_CAPABLE:1;
4562236b HW	59	uint32_t IS_TPS3_CAPABLE:1;
4562236b HW	60	uint32_t IS_TPS4_CAPABLE:1;
4562236b	61	uint32_t IS_YCBCR_CAPABLE:1;
577b5c2b	62	uint32_t HDMI_6GB_EN:1;
4562236b HW	63	} bits;
	64	uint32_t raw;
	65	} flags;
4dfb0bad	66
4562236b	67	enum dc_color_depth max_hdmi_deep_color;
4562236b HW	68	unsigned int max_hdmi_pixel_clock;
	69	bool ycbcr420_supported;
	70	};
	71
4562236b HW	72	union dpcd_psr_configuration {
	73	struct {
	74	unsigned char ENABLE : 1;
	75	unsigned char TRANSMITTER_ACTIVE_IN_PSR : 1;
	76	unsigned char CRC_VERIFICATION : 1;
	77	unsigned char FRAME_CAPTURE_INDICATION : 1;
	78	/* For eDP 1.4, PSR v2*/
	79	unsigned char LINE_CAPTURE_INDICATION : 1;
	80	/* For eDP 1.4, PSR v2*/
	81	unsigned char IRQ_HPD_WITH_CRC_ERROR : 1;
	82	unsigned char RESERVED : 2;
	83	} bits;
	84	unsigned char raw;
	85	};
	86
	87	union psr_error_status {
	88	struct {
	89	unsigned char LINK_CRC_ERROR :1;
	90	unsigned char RFB_STORAGE_ERROR :1;
	91	unsigned char RESERVED :6;
	92	} bits;
	93	unsigned char raw;
	94	};
	95
	96	union psr_sink_psr_status {
	97	struct {
	98	unsigned char SINK_SELF_REFRESH_STATUS :3;
	99	unsigned char RESERVED :5;
	100	} bits;
	101	unsigned char raw;
	102	};
	103
4562236b HW	104	struct link_encoder {
	105	const struct link_encoder_funcs *funcs;
	106	int32_t aux_channel_offset;
	107	struct dc_context *ctx;
	108	struct graphics_object_id id;
	109	struct graphics_object_id connector;
4562236b HW	110	uint32_t output_signals;
	111	enum engine_id preferred_engine;
	112	struct encoder_feature_support features;
	113	enum transmitter transmitter;
	114	enum hpd_source_id hpd_source;
	115	};
	116
	117	struct link_encoder_funcs {
	118	bool (*validate_output_with_stream)(
0971c40e	119	struct link_encoder enc, const struct dc_stream_state stream);
4562236b HW	120	void (hw_init)(struct link_encoder enc);
	121	void (setup)(struct link_encoder enc,
	122	enum signal_type signal);
	123	void (enable_tmds_output)(struct link_encoder enc,
	124	enum clock_source_id clock_source,
	125	enum dc_color_depth color_depth,
	126	bool hdmi,
	127	bool dual_link,
	128	uint32_t pixel_clock);
	129	void (enable_dp_output)(struct link_encoder enc,
	130	const struct dc_link_settings *link_settings,
	131	enum clock_source_id clock_source);
	132	void (enable_dp_mst_output)(struct link_encoder enc,
	133	const struct dc_link_settings *link_settings,
	134	enum clock_source_id clock_source);
	135	void (disable_output)(struct link_encoder link_enc,
5eefbc40	136	enum signal_type signal, struct dc_link *link);
4562236b HW	137	void (dp_set_lane_settings)(struct link_encoder enc,
	138	const struct link_training_settings *link_settings);
	139	void (dp_set_phy_pattern)(struct link_encoder enc,
	140	const struct encoder_set_dp_phy_pattern_param *para);
	141	void (*update_mst_stream_allocation_table)(
	142	struct link_encoder *enc,
	143	const struct link_mst_stream_allocation_table *table);
3548f073 AZ	144	void (psr_program_dp_dphy_fast_training)(struct link_encoder enc,
	145	bool exit_link_training_required);
	146	void (psr_program_secondary_packet)(struct link_encoder enc,
	147	unsigned int sdp_transmit_line_num_deadline);
4562236b HW	148	void (connect_dig_be_to_fe)(struct link_encoder enc,
	149	enum engine_id engine,
	150	bool connect);
	151	void (enable_hpd)(struct link_encoder enc);
	152	void (disable_hpd)(struct link_encoder enc);
	153	void (destroy)(struct link_encoder *enc);
	154	};
	155
	156	#endif /* LINK_ENCODER_H_ */