drm/amd/display: always use 4 dp lanes for dml
[linux-block.git] / drivers / gpu / drm / amd / display / dc / inc / dc_link_dp.h
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1/*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26#ifndef __DC_LINK_DP_H__
27#define __DC_LINK_DP_H__
28
29#define LINK_TRAINING_ATTEMPTS 4
30#define LINK_TRAINING_RETRY_DELAY 50 /* ms */
31
d0778ebf 32struct dc_link;
0971c40e 33struct dc_stream_state;
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34struct dc_link_settings;
35
aafded88 36bool dp_verify_link_cap(
d0778ebf 37 struct dc_link *link,
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38 struct dc_link_settings *known_limit_link_setting,
39 int *fail_count);
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40
41bool dp_validate_mode_timing(
d0778ebf 42 struct dc_link *link,
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43 const struct dc_crtc_timing *timing);
44
45void decide_link_settings(
0971c40e 46 struct dc_stream_state *stream,
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47 struct dc_link_settings *link_setting);
48
49bool perform_link_training_with_retries(
d0778ebf 50 struct dc_link *link,
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51 const struct dc_link_settings *link_setting,
52 bool skip_video_pattern,
53 int attempts);
54
d0778ebf 55bool is_mst_supported(struct dc_link *link);
4562236b 56
cdb39798 57bool detect_dp_sink_caps(struct dc_link *link);
4562236b 58
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59void detect_edp_sink_caps(struct dc_link *link);
60
d0778ebf 61bool is_dp_active_dongle(const struct dc_link *link);
4562236b 62
d0778ebf 63void dp_enable_mst_on_sink(struct dc_link *link, bool enable);
07c84c7a 64
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65#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
66void dp_set_fec_ready(struct dc_link *link, bool ready);
67void dp_set_fec_enable(struct dc_link *link, bool enable);
68bool dp_set_dsc_enable(struct pipe_ctx *pipe_ctx, bool enable);
69#endif
70
4562236b 71#endif /* __DC_LINK_DP_H__ */