[linux-block.git] / drivers / gpu / drm / amd / display / amdgpu_dm / amdgpu_dm_helpers.c

/*
 * Copyright 2015 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#include <linux/string.h>
#include <linux/acpi.h>
#include <linux/version.h>
#include <linux/i2c.h>

#include <drm/drm_probe_helper.h>
#include <drm/amdgpu_drm.h>
#include <drm/drm_edid.h>

#include "dm_services.h"
#include "amdgpu.h"
#include "dc.h"
#include "amdgpu_dm.h"
#include "amdgpu_dm_irq.h"
#include "amdgpu_dm_mst_types.h"

#include "dm_helpers.h"

/* dm_helpers_parse_edid_caps
 *
 * Parse edid caps
 *
 * @edid:	[in] pointer to edid
 *  edid_caps:	[in] pointer to edid caps
 * @return
 *	void
 * */
enum dc_edid_status dm_helpers_parse_edid_caps(
		struct dc_context *ctx,
		const struct dc_edid *edid,
		struct dc_edid_caps *edid_caps)
{
	struct edid *edid_buf = (struct edid *) edid->raw_edid;
	struct cea_sad *sads;
	int sad_count = -1;
	int sadb_count = -1;
	int i = 0;
	int j = 0;
	uint8_t *sadb = NULL;

	enum dc_edid_status result = EDID_OK;

	if (!edid_caps || !edid)
		return EDID_BAD_INPUT;

	if (!drm_edid_is_valid(edid_buf))
		result = EDID_BAD_CHECKSUM;

	edid_caps->manufacturer_id = (uint16_t) edid_buf->mfg_id[0] |
					((uint16_t) edid_buf->mfg_id[1])<<8;
	edid_caps->product_id = (uint16_t) edid_buf->prod_code[0] |
					((uint16_t) edid_buf->prod_code[1])<<8;
	edid_caps->serial_number = edid_buf->serial;
	edid_caps->manufacture_week = edid_buf->mfg_week;
	edid_caps->manufacture_year = edid_buf->mfg_year;

	/* One of the four detailed_timings stores the monitor name. It's
	 * stored in an array of length 13. */
	for (i = 0; i < 4; i++) {
		if (edid_buf->detailed_timings[i].data.other_data.type == 0xfc) {
			while (j < 13 && edid_buf->detailed_timings[i].data.other_data.data.str.str[j]) {
				if (edid_buf->detailed_timings[i].data.other_data.data.str.str[j] == '\n')
					break;

				edid_caps->display_name[j] =
					edid_buf->detailed_timings[i].data.other_data.data.str.str[j];
				j++;
			}
		}
	}

	edid_caps->edid_hdmi = drm_detect_hdmi_monitor(
			(struct edid *) edid->raw_edid);

	sad_count = drm_edid_to_sad((struct edid *) edid->raw_edid, &sads);
	if (sad_count <= 0)
		return result;

	edid_caps->audio_mode_count = sad_count < DC_MAX_AUDIO_DESC_COUNT ? sad_count : DC_MAX_AUDIO_DESC_COUNT;
	for (i = 0; i < edid_caps->audio_mode_count; ++i) {
		struct cea_sad *sad = &sads[i];

		edid_caps->audio_modes[i].format_code = sad->format;
		edid_caps->audio_modes[i].channel_count = sad->channels + 1;
		edid_caps->audio_modes[i].sample_rate = sad->freq;
		edid_caps->audio_modes[i].sample_size = sad->byte2;
	}

	sadb_count = drm_edid_to_speaker_allocation((struct edid *) edid->raw_edid, &sadb);

	if (sadb_count < 0) {
		DRM_ERROR("Couldn't read Speaker Allocation Data Block: %d\n", sadb_count);
		sadb_count = 0;
	}

	if (sadb_count)
		edid_caps->speaker_flags = sadb[0];
	else
		edid_caps->speaker_flags = DEFAULT_SPEAKER_LOCATION;

	kfree(sads);
	kfree(sadb);

	return result;
}

static void get_payload_table(
		struct amdgpu_dm_connector *aconnector,
		struct dp_mst_stream_allocation_table *proposed_table)
{
	int i;
	struct drm_dp_mst_topology_mgr *mst_mgr =
			&aconnector->mst_port->mst_mgr;

	mutex_lock(&mst_mgr->payload_lock);

	proposed_table->stream_count = 0;

	/* number of active streams */
	for (i = 0; i < mst_mgr->max_payloads; i++) {
		if (mst_mgr->payloads[i].num_slots == 0)
			break; /* end of vcp_id table */

		ASSERT(mst_mgr->payloads[i].payload_state !=
				DP_PAYLOAD_DELETE_LOCAL);

		if (mst_mgr->payloads[i].payload_state == DP_PAYLOAD_LOCAL ||
			mst_mgr->payloads[i].payload_state ==
					DP_PAYLOAD_REMOTE) {

			struct dp_mst_stream_allocation *sa =
					&proposed_table->stream_allocations[
						proposed_table->stream_count];

			sa->slot_count = mst_mgr->payloads[i].num_slots;
			sa->vcp_id = mst_mgr->proposed_vcpis[i]->vcpi;
			proposed_table->stream_count++;
		}
	}

	mutex_unlock(&mst_mgr->payload_lock);
}

void dm_helpers_dp_update_branch_info(
	struct dc_context *ctx,
	const struct dc_link *link)
{}

/*
 * Writes payload allocation table in immediate downstream device.
 */
bool dm_helpers_dp_mst_write_payload_allocation_table(
		struct dc_context *ctx,
		const struct dc_stream_state *stream,
		struct dp_mst_stream_allocation_table *proposed_table,
		bool enable)
{
	struct amdgpu_dm_connector *aconnector;
	struct dm_connector_state *dm_conn_state;
	struct drm_dp_mst_topology_mgr *mst_mgr;
	struct drm_dp_mst_port *mst_port;
	bool ret;

	aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;
	/* Accessing the connector state is required for vcpi_slots allocation
	 * and directly relies on behaviour in commit check
	 * that blocks before commit guaranteeing that the state
	 * is not gonna be swapped while still in use in commit tail */

	if (!aconnector || !aconnector->mst_port)
		return false;

	dm_conn_state = to_dm_connector_state(aconnector->base.state);

	mst_mgr = &aconnector->mst_port->mst_mgr;

	if (!mst_mgr->mst_state)
		return false;

	mst_port = aconnector->port;

	if (enable) {

		ret = drm_dp_mst_allocate_vcpi(mst_mgr, mst_port,
					       dm_conn_state->pbn,
					       dm_conn_state->vcpi_slots);
		if (!ret)
			return false;

	} else {
		drm_dp_mst_reset_vcpi_slots(mst_mgr, mst_port);
	}

	/* It's OK for this to fail */
	drm_dp_update_payload_part1(mst_mgr);

	/* mst_mgr->->payloads are VC payload notify MST branch using DPCD or
	 * AUX message. The sequence is slot 1-63 allocated sequence for each
	 * stream. AMD ASIC stream slot allocation should follow the same
	 * sequence. copy DRM MST allocation to dc */

	get_payload_table(aconnector, proposed_table);

	return true;
}

/*
 * poll pending down reply
 */
void dm_helpers_dp_mst_poll_pending_down_reply(
	struct dc_context *ctx,
	const struct dc_link *link)
{}

/*
 * Clear payload allocation table before enable MST DP link.
 */
void dm_helpers_dp_mst_clear_payload_allocation_table(
	struct dc_context *ctx,
	const struct dc_link *link)
{}

/*
 * Polls for ACT (allocation change trigger) handled and sends
 * ALLOCATE_PAYLOAD message.
 */
enum act_return_status dm_helpers_dp_mst_poll_for_allocation_change_trigger(
		struct dc_context *ctx,
		const struct dc_stream_state *stream)
{
	struct amdgpu_dm_connector *aconnector;
	struct drm_dp_mst_topology_mgr *mst_mgr;
	int ret;

	aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;

	if (!aconnector || !aconnector->mst_port)
		return ACT_FAILED;

	mst_mgr = &aconnector->mst_port->mst_mgr;

	if (!mst_mgr->mst_state)
		return ACT_FAILED;

	ret = drm_dp_check_act_status(mst_mgr);

	if (ret)
		return ACT_FAILED;

	return ACT_SUCCESS;
}

bool dm_helpers_dp_mst_send_payload_allocation(
		struct dc_context *ctx,
		const struct dc_stream_state *stream,
		bool enable)
{
	struct amdgpu_dm_connector *aconnector;
	struct drm_dp_mst_topology_mgr *mst_mgr;
	struct drm_dp_mst_port *mst_port;

	aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;

	if (!aconnector || !aconnector->mst_port)
		return false;

	mst_port = aconnector->port;

	mst_mgr = &aconnector->mst_port->mst_mgr;

	if (!mst_mgr->mst_state)
		return false;

	/* It's OK for this to fail */
	drm_dp_update_payload_part2(mst_mgr);

	if (!enable)
		drm_dp_mst_deallocate_vcpi(mst_mgr, mst_port);

	return true;
}

void dm_dtn_log_begin(struct dc_context *ctx,
	struct dc_log_buffer_ctx *log_ctx)
{
	static const char msg[] = "[dtn begin]\n";

	if (!log_ctx) {
		pr_info("%s", msg);
		return;
	}

	dm_dtn_log_append_v(ctx, log_ctx, "%s", msg);
}

void dm_dtn_log_append_v(struct dc_context *ctx,
	struct dc_log_buffer_ctx *log_ctx,
	const char *msg, ...)
{
	va_list args;
	size_t total;
	int n;

	if (!log_ctx) {
		/* No context, redirect to dmesg. */
		struct va_format vaf;

		vaf.fmt = msg;
		vaf.va = &args;

		va_start(args, msg);
		pr_info("%pV", &vaf);
		va_end(args);

		return;
	}

	/* Measure the output. */
	va_start(args, msg);
	n = vsnprintf(NULL, 0, msg, args);
	va_end(args);

	if (n <= 0)
		return;

	/* Reallocate the string buffer as needed. */
	total = log_ctx->pos + n + 1;

	if (total > log_ctx->size) {
		char *buf = (char *)kvcalloc(total, sizeof(char), GFP_KERNEL);

		if (buf) {
			memcpy(buf, log_ctx->buf, log_ctx->pos);
			kfree(log_ctx->buf);

			log_ctx->buf = buf;
			log_ctx->size = total;
		}
	}

	if (!log_ctx->buf)
		return;

	/* Write the formatted string to the log buffer. */
	va_start(args, msg);
	n = vscnprintf(
		log_ctx->buf + log_ctx->pos,
		log_ctx->size - log_ctx->pos,
		msg,
		args);
	va_end(args);

	if (n > 0)
		log_ctx->pos += n;
}

void dm_dtn_log_end(struct dc_context *ctx,
	struct dc_log_buffer_ctx *log_ctx)
{
	static const char msg[] = "[dtn end]\n";

	if (!log_ctx) {
		pr_info("%s", msg);
		return;
	}

	dm_dtn_log_append_v(ctx, log_ctx, "%s", msg);
}

bool dm_helpers_dp_mst_start_top_mgr(
		struct dc_context *ctx,
		const struct dc_link *link,
		bool boot)
{
	struct amdgpu_dm_connector *aconnector = link->priv;

	if (!aconnector) {
			DRM_ERROR("Failed to found connector for link!");
			return false;
	}

	if (boot) {
		DRM_INFO("DM_MST: Differing MST start on aconnector: %p [id: %d]\n",
					aconnector, aconnector->base.base.id);
		return true;
	}

	DRM_INFO("DM_MST: starting TM on aconnector: %p [id: %d]\n",
			aconnector, aconnector->base.base.id);

	return (drm_dp_mst_topology_mgr_set_mst(&aconnector->mst_mgr, true) == 0);
}

void dm_helpers_dp_mst_stop_top_mgr(
		struct dc_context *ctx,
		const struct dc_link *link)
{
	struct amdgpu_dm_connector *aconnector = link->priv;

	if (!aconnector) {
			DRM_ERROR("Failed to found connector for link!");
			return;
	}

	DRM_INFO("DM_MST: stopping TM on aconnector: %p [id: %d]\n",
			aconnector, aconnector->base.base.id);

	if (aconnector->mst_mgr.mst_state == true)
		drm_dp_mst_topology_mgr_set_mst(&aconnector->mst_mgr, false);
}

bool dm_helpers_dp_read_dpcd(
		struct dc_context *ctx,
		const struct dc_link *link,
		uint32_t address,
		uint8_t *data,
		uint32_t size)
{

	struct amdgpu_dm_connector *aconnector = link->priv;

	if (!aconnector) {
		DRM_ERROR("Failed to found connector for link!");
		return false;
	}

	return drm_dp_dpcd_read(&aconnector->dm_dp_aux.aux, address,
			data, size) > 0;
}

bool dm_helpers_dp_write_dpcd(
		struct dc_context *ctx,
		const struct dc_link *link,
		uint32_t address,
		const uint8_t *data,
		uint32_t size)
{
	struct amdgpu_dm_connector *aconnector = link->priv;

	if (!aconnector) {
		DRM_ERROR("Failed to found connector for link!");
		return false;
	}

	return drm_dp_dpcd_write(&aconnector->dm_dp_aux.aux,
			address, (uint8_t *)data, size) > 0;
}

bool dm_helpers_submit_i2c(
		struct dc_context *ctx,
		const struct dc_link *link,
		struct i2c_command *cmd)
{
	struct amdgpu_dm_connector *aconnector = link->priv;
	struct i2c_msg *msgs;
	int i = 0;
	int num = cmd->number_of_payloads;
	bool result;

	if (!aconnector) {
		DRM_ERROR("Failed to found connector for link!");
		return false;
	}

	msgs = kcalloc(num, sizeof(struct i2c_msg), GFP_KERNEL);

	if (!msgs)
		return false;

	for (i = 0; i < num; i++) {
		msgs[i].flags = cmd->payloads[i].write ? 0 : I2C_M_RD;
		msgs[i].addr = cmd->payloads[i].address;
		msgs[i].len = cmd->payloads[i].length;
		msgs[i].buf = cmd->payloads[i].data;
	}

	result = i2c_transfer(&aconnector->i2c->base, msgs, num) == num;

	kfree(msgs);

	return result;
}
bool dm_helpers_dp_write_dsc_enable(
		struct dc_context *ctx,
		const struct dc_stream_state *stream,
		bool enable
)
{
	uint8_t enable_dsc = enable ? 1 : 0;
	struct amdgpu_dm_connector *aconnector;

	if (!stream)
		return false;

	if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) {
		aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;

		if (!aconnector->dsc_aux)
			return false;

		return (drm_dp_dpcd_write(aconnector->dsc_aux, DP_DSC_ENABLE, &enable_dsc, 1) >= 0);
	}

	if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT)
		return dm_helpers_dp_write_dpcd(ctx, stream->link, DP_DSC_ENABLE, &enable_dsc, 1);

	return false;
}

bool dm_helpers_is_dp_sink_present(struct dc_link *link)
{
	bool dp_sink_present;
	struct amdgpu_dm_connector *aconnector = link->priv;

	if (!aconnector) {
		BUG_ON("Failed to found connector for link!");
		return true;
	}

	mutex_lock(&aconnector->dm_dp_aux.aux.hw_mutex);
	dp_sink_present = dc_link_is_dp_sink_present(link);
	mutex_unlock(&aconnector->dm_dp_aux.aux.hw_mutex);
	return dp_sink_present;
}

enum dc_edid_status dm_helpers_read_local_edid(
		struct dc_context *ctx,
		struct dc_link *link,
		struct dc_sink *sink)
{
	struct amdgpu_dm_connector *aconnector = link->priv;
	struct i2c_adapter *ddc;
	int retry = 3;
	enum dc_edid_status edid_status;
	struct edid *edid;

	if (link->aux_mode)
		ddc = &aconnector->dm_dp_aux.aux.ddc;
	else
		ddc = &aconnector->i2c->base;

	/* some dongles read edid incorrectly the first time,
	 * do check sum and retry to make sure read correct edid.
	 */
	do {

		edid = drm_get_edid(&aconnector->base, ddc);

		if (!edid)
			return EDID_NO_RESPONSE;

		sink->dc_edid.length = EDID_LENGTH * (edid->extensions + 1);
		memmove(sink->dc_edid.raw_edid, (uint8_t *)edid, sink->dc_edid.length);

		/* We don't need the original edid anymore */
		kfree(edid);

		edid_status = dm_helpers_parse_edid_caps(
						ctx,
						&sink->dc_edid,
						&sink->edid_caps);

	} while (edid_status == EDID_BAD_CHECKSUM && --retry > 0);

	if (edid_status != EDID_OK)
		DRM_ERROR("EDID err: %d, on connector: %s",
				edid_status,
				aconnector->base.name);
	if (link->aux_mode) {
		union test_request test_request = { {0} };
		union test_response test_response = { {0} };

		dm_helpers_dp_read_dpcd(ctx,
					link,
					DP_TEST_REQUEST,
					&test_request.raw,
					sizeof(union test_request));

		if (!test_request.bits.EDID_READ)
			return edid_status;

		test_response.bits.EDID_CHECKSUM_WRITE = 1;

		dm_helpers_dp_write_dpcd(ctx,
					link,
					DP_TEST_EDID_CHECKSUM,
					&sink->dc_edid.raw_edid[sink->dc_edid.length-1],
					1);

		dm_helpers_dp_write_dpcd(ctx,
					link,
					DP_TEST_RESPONSE,
					&test_response.raw,
					sizeof(test_response));

	}

	return edid_status;
}

void dm_set_dcn_clocks(struct dc_context *ctx, struct dc_clocks *clks)
{
	/* TODO: something */
}
Commit	Line	Data
4562236b HW	1	/*
	2	* Copyright 2015 Advanced Micro Devices, Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	* Authors: AMD
	23	*
	24	*/
	25
	26	#include <linux/string.h>
	27	#include <linux/acpi.h>
	28	#include <linux/version.h>
	29	#include <linux/i2c.h>
	30
fcd70cd3	31	#include <drm/drm_probe_helper.h>
4562236b HW	32	#include <drm/amdgpu_drm.h>
	33	#include <drm/drm_edid.h>
	34
	35	#include "dm_services.h"
	36	#include "amdgpu.h"
	37	#include "dc.h"
	38	#include "amdgpu_dm.h"
	39	#include "amdgpu_dm_irq.h"
f9c8742c	40	#include "amdgpu_dm_mst_types.h"
4562236b HW	41
	42	#include "dm_helpers.h"
	43
	44	/* dm_helpers_parse_edid_caps
	45	*
	46	* Parse edid caps
	47	*
	48	* @edid: [in] pointer to edid
	49	* edid_caps: [in] pointer to edid caps
	50	* @return
	51	* void
	52	* */
	53	enum dc_edid_status dm_helpers_parse_edid_caps(
	54	struct dc_context *ctx,
	55	const struct dc_edid *edid,
	56	struct dc_edid_caps *edid_caps)
	57	{
	58	struct edid edid_buf = (struct edid ) edid->raw_edid;
	59	struct cea_sad *sads;
	60	int sad_count = -1;
	61	int sadb_count = -1;
	62	int i = 0;
	63	int j = 0;
	64	uint8_t *sadb = NULL;
	65
	66	enum dc_edid_status result = EDID_OK;
	67
	68	if (!edid_caps \|\| !edid)
	69	return EDID_BAD_INPUT;
	70
	71	if (!drm_edid_is_valid(edid_buf))
	72	result = EDID_BAD_CHECKSUM;
	73
	74	edid_caps->manufacturer_id = (uint16_t) edid_buf->mfg_id[0] \|
	75	((uint16_t) edid_buf->mfg_id[1])<<8;
	76	edid_caps->product_id = (uint16_t) edid_buf->prod_code[0] \|
	77	((uint16_t) edid_buf->prod_code[1])<<8;
	78	edid_caps->serial_number = edid_buf->serial;
	79	edid_caps->manufacture_week = edid_buf->mfg_week;
	80	edid_caps->manufacture_year = edid_buf->mfg_year;
	81
	82	/* One of the four detailed_timings stores the monitor name. It's
	83	* stored in an array of length 13. */
	84	for (i = 0; i < 4; i++) {
	85	if (edid_buf->detailed_timings[i].data.other_data.type == 0xfc) {
	86	while (j < 13 && edid_buf->detailed_timings[i].data.other_data.data.str.str[j]) {
	87	if (edid_buf->detailed_timings[i].data.other_data.data.str.str[j] == '\n')
	88	break;
	89
	90	edid_caps->display_name[j] =
	91	edid_buf->detailed_timings[i].data.other_data.data.str.str[j];
	92	j++;
	93	}
	94	}
	95	}
	96
	97	edid_caps->edid_hdmi = drm_detect_hdmi_monitor(
	98	(struct edid *) edid->raw_edid);
	99
	100	sad_count = drm_edid_to_sad((struct edid *) edid->raw_edid, &sads);
ae2a3495	101	if (sad_count <= 0)
4562236b	102	return result;
4562236b HW	103
	104	edid_caps->audio_mode_count = sad_count < DC_MAX_AUDIO_DESC_COUNT ? sad_count : DC_MAX_AUDIO_DESC_COUNT;
	105	for (i = 0; i < edid_caps->audio_mode_count; ++i) {
	106	struct cea_sad *sad = &sads[i];
	107
	108	edid_caps->audio_modes[i].format_code = sad->format;
731a3736	109	edid_caps->audio_modes[i].channel_count = sad->channels + 1;
4562236b HW	110	edid_caps->audio_modes[i].sample_rate = sad->freq;
	111	edid_caps->audio_modes[i].sample_size = sad->byte2;
	112	}
	113
	114	sadb_count = drm_edid_to_speaker_allocation((struct edid *) edid->raw_edid, &sadb);
	115
	116	if (sadb_count < 0) {
	117	DRM_ERROR("Couldn't read Speaker Allocation Data Block: %d\n", sadb_count);
	118	sadb_count = 0;
	119	}
	120
	121	if (sadb_count)
	122	edid_caps->speaker_flags = sadb[0];
	123	else
	124	edid_caps->speaker_flags = DEFAULT_SPEAKER_LOCATION;
	125
	126	kfree(sads);
	127	kfree(sadb);
	128
	129	return result;
	130	}
	131
4562236b	132	static void get_payload_table(
c84dec2f	133	struct amdgpu_dm_connector *aconnector,
4562236b HW	134	struct dp_mst_stream_allocation_table *proposed_table)
	135	{
	136	int i;
	137	struct drm_dp_mst_topology_mgr *mst_mgr =
	138	&aconnector->mst_port->mst_mgr;
	139
	140	mutex_lock(&mst_mgr->payload_lock);
	141
	142	proposed_table->stream_count = 0;
	143
	144	/* number of active streams */
	145	for (i = 0; i < mst_mgr->max_payloads; i++) {
	146	if (mst_mgr->payloads[i].num_slots == 0)
	147	break; /* end of vcp_id table */
	148
	149	ASSERT(mst_mgr->payloads[i].payload_state !=
	150	DP_PAYLOAD_DELETE_LOCAL);
	151
	152	if (mst_mgr->payloads[i].payload_state == DP_PAYLOAD_LOCAL \|\|
	153	mst_mgr->payloads[i].payload_state ==
	154	DP_PAYLOAD_REMOTE) {
	155
	156	struct dp_mst_stream_allocation *sa =
	157	&proposed_table->stream_allocations[
	158	proposed_table->stream_count];
	159
	160	sa->slot_count = mst_mgr->payloads[i].num_slots;
	161	sa->vcp_id = mst_mgr->proposed_vcpis[i]->vcpi;
	162	proposed_table->stream_count++;
	163	}
	164	}
	165
	166	mutex_unlock(&mst_mgr->payload_lock);
	167	}
	168
2068afe6 NC	169	void dm_helpers_dp_update_branch_info(
	170	struct dc_context *ctx,
	171	const struct dc_link *link)
	172	{}
	173
4562236b HW	174	/*
	175	* Writes payload allocation table in immediate downstream device.
	176	*/
	177	bool dm_helpers_dp_mst_write_payload_allocation_table(
	178	struct dc_context *ctx,
0971c40e	179	const struct dc_stream_state *stream,
4562236b HW	180	struct dp_mst_stream_allocation_table *proposed_table,
	181	bool enable)
	182	{
c84dec2f	183	struct amdgpu_dm_connector *aconnector;
3261e013	184	struct dm_connector_state *dm_conn_state;
4562236b HW	185	struct drm_dp_mst_topology_mgr *mst_mgr;
4562236b HW	186	struct drm_dp_mst_port *mst_port;
4562236b	187	bool ret;
4562236b	188
ceb3dbb4	189	aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;
3261e013 ML	190	/* Accessing the connector state is required for vcpi_slots allocation
	191	* and directly relies on behaviour in commit check
	192	* that blocks before commit guaranteeing that the state
	193	* is not gonna be swapped while still in use in commit tail */
	194
4562236b HW	195	if (!aconnector \|\| !aconnector->mst_port)
	196	return false;
	197
320f6d81 CIK	198	dm_conn_state = to_dm_connector_state(aconnector->base.state);
320f6d81 CIK	199
4562236b HW	200	mst_mgr = &aconnector->mst_port->mst_mgr;
	201
	202	if (!mst_mgr->mst_state)
	203	return false;
	204
	205	mst_port = aconnector->port;
	206
	207	if (enable) {
4562236b	208
3261e013 ML	209	ret = drm_dp_mst_allocate_vcpi(mst_mgr, mst_port,
	210	dm_conn_state->pbn,
	211	dm_conn_state->vcpi_slots);
4562236b HW	212	if (!ret)
	213	return false;
	214
	215	} else {
	216	drm_dp_mst_reset_vcpi_slots(mst_mgr, mst_port);
	217	}
	218
58fe03d6 LP	219	/* It's OK for this to fail */
58fe03d6 LP	220	drm_dp_update_payload_part1(mst_mgr);
4562236b HW	221
	222	/* mst_mgr->->payloads are VC payload notify MST branch using DPCD or
	223	* AUX message. The sequence is slot 1-63 allocated sequence for each
	224	* stream. AMD ASIC stream slot allocation should follow the same
	225	* sequence. copy DRM MST allocation to dc */
	226
	227	get_payload_table(aconnector, proposed_table);
	228
4562236b HW	229	return true;
	230	}
	231
22051b63	232	/*
9cc032b2	233	* poll pending down reply
22051b63 MT	234	*/
	235	void dm_helpers_dp_mst_poll_pending_down_reply(
	236	struct dc_context *ctx,
	237	const struct dc_link *link)
	238	{}
fd92ac1b HW	239
	240	/*
	241	* Clear payload allocation table before enable MST DP link.
	242	*/
	243	void dm_helpers_dp_mst_clear_payload_allocation_table(
	244	struct dc_context *ctx,
	245	const struct dc_link *link)
	246	{}
	247
4562236b HW	248	/*
	249	* Polls for ACT (allocation change trigger) handled and sends
	250	* ALLOCATE_PAYLOAD message.
	251	*/
48af9b91	252	enum act_return_status dm_helpers_dp_mst_poll_for_allocation_change_trigger(
4562236b	253	struct dc_context *ctx,
0971c40e	254	const struct dc_stream_state *stream)
4562236b	255	{
c84dec2f	256	struct amdgpu_dm_connector *aconnector;
4562236b HW	257	struct drm_dp_mst_topology_mgr *mst_mgr;
	258	int ret;
	259
ceb3dbb4	260	aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;
4562236b HW	261
4562236b HW	262	if (!aconnector \|\| !aconnector->mst_port)
48af9b91	263	return ACT_FAILED;
4562236b HW	264
	265	mst_mgr = &aconnector->mst_port->mst_mgr;
	266
	267	if (!mst_mgr->mst_state)
48af9b91	268	return ACT_FAILED;
4562236b HW	269
	270	ret = drm_dp_check_act_status(mst_mgr);
	271
	272	if (ret)
48af9b91	273	return ACT_FAILED;
4562236b	274
48af9b91	275	return ACT_SUCCESS;
4562236b HW	276	}
	277
	278	bool dm_helpers_dp_mst_send_payload_allocation(
	279	struct dc_context *ctx,
0971c40e	280	const struct dc_stream_state *stream,
4562236b HW	281	bool enable)
4562236b HW	282	{
c84dec2f	283	struct amdgpu_dm_connector *aconnector;
4562236b HW	284	struct drm_dp_mst_topology_mgr *mst_mgr;
4562236b HW	285	struct drm_dp_mst_port *mst_port;
4562236b	286
ceb3dbb4	287	aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;
4562236b HW	288
	289	if (!aconnector \|\| !aconnector->mst_port)
	290	return false;
	291
	292	mst_port = aconnector->port;
	293
	294	mst_mgr = &aconnector->mst_port->mst_mgr;
	295
	296	if (!mst_mgr->mst_state)
	297	return false;
	298
58fe03d6 LP	299	/* It's OK for this to fail */
58fe03d6 LP	300	drm_dp_update_payload_part2(mst_mgr);
4562236b HW	301
	302	if (!enable)
	303	drm_dp_mst_deallocate_vcpi(mst_mgr, mst_port);
	304
	305	return true;
	306	}
	307
46659a83 NK	308	void dm_dtn_log_begin(struct dc_context *ctx,
46659a83 NK	309	struct dc_log_buffer_ctx *log_ctx)
e498eb71	310	{
46659a83 NK	311	static const char msg[] = "[dtn begin]\n";
	312
	313	if (!log_ctx) {
	314	pr_info("%s", msg);
	315	return;
	316	}
	317
	318	dm_dtn_log_append_v(ctx, log_ctx, "%s", msg);
e498eb71	319	}
2248eb6b TC	320
2248eb6b TC	321	void dm_dtn_log_append_v(struct dc_context *ctx,
46659a83 NK	322	struct dc_log_buffer_ctx *log_ctx,
46659a83 NK	323	const char *msg, ...)
e498eb71	324	{
e498eb71	325	va_list args;
46659a83 NK	326	size_t total;
	327	int n;
	328
	329	if (!log_ctx) {
	330	/* No context, redirect to dmesg. */
	331	struct va_format vaf;
	332
	333	vaf.fmt = msg;
	334	vaf.va = &args;
	335
	336	va_start(args, msg);
	337	pr_info("%pV", &vaf);
	338	va_end(args);
e498eb71	339
46659a83 NK	340	return;
	341	}
	342
	343	/* Measure the output. */
e498eb71	344	va_start(args, msg);
46659a83 NK	345	n = vsnprintf(NULL, 0, msg, args);
	346	va_end(args);
	347
	348	if (n <= 0)
	349	return;
	350
	351	/* Reallocate the string buffer as needed. */
	352	total = log_ctx->pos + n + 1;
e498eb71	353
46659a83 NK	354	if (total > log_ctx->size) {
	355	char buf = (char )kvcalloc(total, sizeof(char), GFP_KERNEL);
	356
	357	if (buf) {
	358	memcpy(buf, log_ctx->buf, log_ctx->pos);
	359	kfree(log_ctx->buf);
	360
	361	log_ctx->buf = buf;
	362	log_ctx->size = total;
	363	}
	364	}
	365
	366	if (!log_ctx->buf)
	367	return;
	368
	369	/* Write the formatted string to the log buffer. */
	370	va_start(args, msg);
	371	n = vscnprintf(
	372	log_ctx->buf + log_ctx->pos,
	373	log_ctx->size - log_ctx->pos,
	374	msg,
	375	args);
e498eb71	376	va_end(args);
46659a83 NK	377
	378	if (n > 0)
	379	log_ctx->pos += n;
e498eb71	380	}
2248eb6b	381
46659a83 NK	382	void dm_dtn_log_end(struct dc_context *ctx,
46659a83 NK	383	struct dc_log_buffer_ctx *log_ctx)
e498eb71	384	{
46659a83 NK	385	static const char msg[] = "[dtn end]\n";
	386
	387	if (!log_ctx) {
	388	pr_info("%s", msg);
	389	return;
	390	}
	391
	392	dm_dtn_log_append_v(ctx, log_ctx, "%s", msg);
e498eb71	393	}
a235bd9f	394
4562236b HW	395	bool dm_helpers_dp_mst_start_top_mgr(
	396	struct dc_context *ctx,
	397	const struct dc_link *link,
	398	bool boot)
	399	{
c84dec2f	400	struct amdgpu_dm_connector *aconnector = link->priv;
4562236b HW	401
	402	if (!aconnector) {
	403	DRM_ERROR("Failed to found connector for link!");
	404	return false;
	405	}
	406
	407	if (boot) {
	408	DRM_INFO("DM_MST: Differing MST start on aconnector: %p [id: %d]\n",
	409	aconnector, aconnector->base.base.id);
	410	return true;
	411	}
	412
	413	DRM_INFO("DM_MST: starting TM on aconnector: %p [id: %d]\n",
	414	aconnector, aconnector->base.base.id);
	415
	416	return (drm_dp_mst_topology_mgr_set_mst(&aconnector->mst_mgr, true) == 0);
	417	}
	418
	419	void dm_helpers_dp_mst_stop_top_mgr(
	420	struct dc_context *ctx,
	421	const struct dc_link *link)
	422	{
c84dec2f	423	struct amdgpu_dm_connector *aconnector = link->priv;
4562236b HW	424
	425	if (!aconnector) {
	426	DRM_ERROR("Failed to found connector for link!");
	427	return;
	428	}
	429
	430	DRM_INFO("DM_MST: stopping TM on aconnector: %p [id: %d]\n",
	431	aconnector, aconnector->base.base.id);
	432
	433	if (aconnector->mst_mgr.mst_state == true)
	434	drm_dp_mst_topology_mgr_set_mst(&aconnector->mst_mgr, false);
	435	}
	436
	437	bool dm_helpers_dp_read_dpcd(
	438	struct dc_context *ctx,
	439	const struct dc_link *link,
	440	uint32_t address,
	441	uint8_t *data,
	442	uint32_t size)
	443	{
	444
c84dec2f	445	struct amdgpu_dm_connector *aconnector = link->priv;
4562236b HW	446
	447	if (!aconnector) {
	448	DRM_ERROR("Failed to found connector for link!");
	449	return false;
	450	}
	451
	452	return drm_dp_dpcd_read(&aconnector->dm_dp_aux.aux, address,
	453	data, size) > 0;
	454	}
	455
	456	bool dm_helpers_dp_write_dpcd(
	457	struct dc_context *ctx,
	458	const struct dc_link *link,
	459	uint32_t address,
	460	const uint8_t *data,
	461	uint32_t size)
	462	{
c84dec2f	463	struct amdgpu_dm_connector *aconnector = link->priv;
4562236b HW	464
	465	if (!aconnector) {
	466	DRM_ERROR("Failed to found connector for link!");
	467	return false;
	468	}
	469
	470	return drm_dp_dpcd_write(&aconnector->dm_dp_aux.aux,
	471	address, (uint8_t *)data, size) > 0;
	472	}
	473
	474	bool dm_helpers_submit_i2c(
	475	struct dc_context *ctx,
	476	const struct dc_link *link,
	477	struct i2c_command *cmd)
	478	{
c84dec2f	479	struct amdgpu_dm_connector *aconnector = link->priv;
4562236b HW	480	struct i2c_msg *msgs;
	481	int i = 0;
	482	int num = cmd->number_of_payloads;
	483	bool result;
	484
	485	if (!aconnector) {
	486	DRM_ERROR("Failed to found connector for link!");
	487	return false;
	488	}
	489
6396bb22	490	msgs = kcalloc(num, sizeof(struct i2c_msg), GFP_KERNEL);
4562236b HW	491
	492	if (!msgs)
	493	return false;
	494
	495	for (i = 0; i < num; i++) {
bb01672c	496	msgs[i].flags = cmd->payloads[i].write ? 0 : I2C_M_RD;
4562236b HW	497	msgs[i].addr = cmd->payloads[i].address;
	498	msgs[i].len = cmd->payloads[i].length;
	499	msgs[i].buf = cmd->payloads[i].data;
	500	}
	501
	502	result = i2c_transfer(&aconnector->i2c->base, msgs, num) == num;
	503
	504	kfree(msgs);
	505
	506	return result;
	507	}
97bda032 HW	508	bool dm_helpers_dp_write_dsc_enable(
	509	struct dc_context *ctx,
	510	const struct dc_stream_state *stream,
	511	bool enable
	512	)
	513	{
df2f1015	514	uint8_t enable_dsc = enable ? 1 : 0;
f9c8742c DF	515	struct amdgpu_dm_connector *aconnector;
	516
	517	if (!stream)
	518	return false;
	519
	520	if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST) {
	521	aconnector = (struct amdgpu_dm_connector *)stream->dm_stream_context;
	522
	523	if (!aconnector->dsc_aux)
	524	return false;
	525
	526	return (drm_dp_dpcd_write(aconnector->dsc_aux, DP_DSC_ENABLE, &enable_dsc, 1) >= 0);
	527	}
	528
	529	if (stream->signal == SIGNAL_TYPE_DISPLAY_PORT)
	530	return dm_helpers_dp_write_dpcd(ctx, stream->link, DP_DSC_ENABLE, &enable_dsc, 1);
df2f1015	531
f9c8742c	532	return false;
97bda032	533	}
7c7f5b15	534
aac5db82 HW	535	bool dm_helpers_is_dp_sink_present(struct dc_link *link)
	536	{
	537	bool dp_sink_present;
	538	struct amdgpu_dm_connector *aconnector = link->priv;
	539
	540	if (!aconnector) {
	541	BUG_ON("Failed to found connector for link!");
	542	return true;
	543	}
	544
	545	mutex_lock(&aconnector->dm_dp_aux.aux.hw_mutex);
	546	dp_sink_present = dc_link_is_dp_sink_present(link);
	547	mutex_unlock(&aconnector->dm_dp_aux.aux.hw_mutex);
	548	return dp_sink_present;
	549	}
	550
7c7f5b15 AG	551	enum dc_edid_status dm_helpers_read_local_edid(
	552	struct dc_context *ctx,
	553	struct dc_link *link,
	554	struct dc_sink *sink)
	555	{
c84dec2f	556	struct amdgpu_dm_connector *aconnector = link->priv;
7c7f5b15 AG	557	struct i2c_adapter *ddc;
	558	int retry = 3;
	559	enum dc_edid_status edid_status;
	560	struct edid *edid;
	561
	562	if (link->aux_mode)
	563	ddc = &aconnector->dm_dp_aux.aux.ddc;
	564	else
	565	ddc = &aconnector->i2c->base;
	566
	567	/* some dongles read edid incorrectly the first time,
	568	* do check sum and retry to make sure read correct edid.
	569	*/
	570	do {
	571
	572	edid = drm_get_edid(&aconnector->base, ddc);
	573
	574	if (!edid)
	575	return EDID_NO_RESPONSE;
	576
	577	sink->dc_edid.length = EDID_LENGTH * (edid->extensions + 1);
	578	memmove(sink->dc_edid.raw_edid, (uint8_t *)edid, sink->dc_edid.length);
	579
	580	/* We don't need the original edid anymore */
	581	kfree(edid);
	582
	583	edid_status = dm_helpers_parse_edid_caps(
	584	ctx,
	585	&sink->dc_edid,
	586	&sink->edid_caps);
	587
	588	} while (edid_status == EDID_BAD_CHECKSUM && --retry > 0);
	589
	590	if (edid_status != EDID_OK)
	591	DRM_ERROR("EDID err: %d, on connector: %s",
	592	edid_status,
	593	aconnector->base.name);
6e0ef9d8	594	if (link->aux_mode) {
1a2eaed8 LSL	595	union test_request test_request = { {0} };
1a2eaed8 LSL	596	union test_response test_response = { {0} };
6e0ef9d8 ML	597
	598	dm_helpers_dp_read_dpcd(ctx,
	599	link,
	600	DP_TEST_REQUEST,
	601	&test_request.raw,
	602	sizeof(union test_request));
	603
	604	if (!test_request.bits.EDID_READ)
	605	return edid_status;
	606
	607	test_response.bits.EDID_CHECKSUM_WRITE = 1;
	608
	609	dm_helpers_dp_write_dpcd(ctx,
	610	link,
	611	DP_TEST_EDID_CHECKSUM,
	612	&sink->dc_edid.raw_edid[sink->dc_edid.length-1],
	613	1);
	614
	615	dm_helpers_dp_write_dpcd(ctx,
	616	link,
	617	DP_TEST_RESPONSE,
	618	&test_response.raw,
	619	sizeof(test_response));
	620
	621	}
7c7f5b15 AG	622
	623	return edid_status;
	624	}
15cf3974 DL	625
	626	void dm_set_dcn_clocks(struct dc_context ctx, struct dc_clocks clks)
	627	{
	628	/* TODO: something */
	629	}