drm/amdkfd: Remove unaligned memory access
[linux-2.6-block.git] / drivers / gpu / drm / amd / amdkfd / kfd_priv.h
CommitLineData
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1/*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef KFD_PRIV_H_INCLUDED
24#define KFD_PRIV_H_INCLUDED
25
26#include <linux/hashtable.h>
27#include <linux/mmu_notifier.h>
28#include <linux/mutex.h>
29#include <linux/types.h>
30#include <linux/atomic.h>
31#include <linux/workqueue.h>
32#include <linux/spinlock.h>
19f6d2a6 33#include <linux/kfd_ioctl.h>
482f0777 34#include <linux/idr.h>
04ad47bd 35#include <linux/kfifo.h>
851a645e 36#include <linux/seq_file.h>
5ce10687 37#include <linux/kref.h>
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38#include <kgd_kfd_interface.h>
39
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40#include "amd_shared.h"
41
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42#define KFD_SYSFS_FILE_MODE 0444
43
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44#define KFD_MMAP_DOORBELL_MASK 0x8000000000000ull
45#define KFD_MMAP_EVENTS_MASK 0x4000000000000ull
46#define KFD_MMAP_RESERVED_MEM_MASK 0x2000000000000ull
f3a39818 47
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48/*
49 * When working with cp scheduler we should assign the HIQ manually or via
50 * the radeon driver to a fixed hqd slot, here are the fixed HIQ hqd slot
51 * definitions for Kaveri. In Kaveri only the first ME queues participates
52 * in the cp scheduling taking that in mind we set the HIQ slot in the
53 * second ME.
54 */
55#define KFD_CIK_HIQ_PIPE 4
56#define KFD_CIK_HIQ_QUEUE 0
57
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58/* GPU ID hash width in bits */
59#define KFD_GPU_ID_HASH_WIDTH 16
60
61/* Macro for allocating structures */
62#define kfd_alloc_struct(ptr_to_struct) \
63 ((typeof(ptr_to_struct)) kzalloc(sizeof(*ptr_to_struct), GFP_KERNEL))
64
19f6d2a6 65#define KFD_MAX_NUM_OF_PROCESSES 512
b8cbab04 66#define KFD_MAX_NUM_OF_QUEUES_PER_PROCESS 1024
19f6d2a6 67
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68/*
69 * Size of the per-process TBA+TMA buffer: 2 pages
70 *
71 * The first page is the TBA used for the CWSR ISA code. The second
72 * page is used as TMA for daisy changing a user-mode trap handler.
73 */
74#define KFD_CWSR_TBA_TMA_SIZE (PAGE_SIZE * 2)
75#define KFD_CWSR_TMA_OFFSET PAGE_SIZE
76
19f6d2a6 77/*
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78 * Kernel module parameter to specify maximum number of supported queues per
79 * device
19f6d2a6 80 */
b8cbab04 81extern int max_num_of_queues_per_device;
19f6d2a6 82
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83#define KFD_MAX_NUM_OF_QUEUES_PER_DEVICE_DEFAULT 4096
84#define KFD_MAX_NUM_OF_QUEUES_PER_DEVICE \
85 (KFD_MAX_NUM_OF_PROCESSES * \
86 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS)
19f6d2a6 87
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88#define KFD_KERNEL_QUEUE_SIZE 2048
89
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90/* Kernel module parameter to specify the scheduling policy */
91extern int sched_policy;
92
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93/*
94 * Kernel module parameter to specify the maximum process
95 * number per HW scheduler
96 */
97extern int hws_max_conc_proc;
98
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99extern int cwsr_enable;
100
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101/*
102 * Kernel module parameter to specify whether to send sigterm to HSA process on
103 * unhandled exception
104 */
105extern int send_sigterm;
106
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107/*
108 * Ignore CRAT table during KFD initialization, can be used to work around
109 * broken CRAT tables on some AMD systems
110 */
111extern int ignore_crat;
112
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113/**
114 * enum kfd_sched_policy
115 *
116 * @KFD_SCHED_POLICY_HWS: H/W scheduling policy known as command processor (cp)
117 * scheduling. In this scheduling mode we're using the firmware code to
118 * schedule the user mode queues and kernel queues such as HIQ and DIQ.
119 * the HIQ queue is used as a special queue that dispatches the configuration
120 * to the cp and the user mode queues list that are currently running.
121 * the DIQ queue is a debugging queue that dispatches debugging commands to the
122 * firmware.
123 * in this scheduling mode user mode queues over subscription feature is
124 * enabled.
125 *
126 * @KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION: The same as above but the over
127 * subscription feature disabled.
128 *
129 * @KFD_SCHED_POLICY_NO_HWS: no H/W scheduling policy is a mode which directly
130 * set the command processor registers and sets the queues "manually". This
131 * mode is used *ONLY* for debugging proposes.
132 *
133 */
134enum kfd_sched_policy {
135 KFD_SCHED_POLICY_HWS = 0,
136 KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION,
137 KFD_SCHED_POLICY_NO_HWS
138};
139
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140enum cache_policy {
141 cache_policy_coherent,
142 cache_policy_noncoherent
143};
144
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145struct kfd_event_interrupt_class {
146 bool (*interrupt_isr)(struct kfd_dev *dev,
147 const uint32_t *ih_ring_entry);
148 void (*interrupt_wq)(struct kfd_dev *dev,
149 const uint32_t *ih_ring_entry);
150};
151
4a488a7a 152struct kfd_device_info {
e596b903 153 enum amd_asic_type asic_family;
f3a39818 154 const struct kfd_event_interrupt_class *event_interrupt_class;
4a488a7a 155 unsigned int max_pasid_bits;
992839ad 156 unsigned int max_no_of_hqd;
4a488a7a 157 size_t ih_ring_entry_size;
f7c826ad 158 uint8_t num_of_watch_points;
19f6d2a6 159 uint16_t mqd_size_aligned;
373d7080 160 bool supports_cwsr;
64d1c3a4 161 bool needs_iommu_device;
3ee2d00c 162 bool needs_pci_atomics;
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163};
164
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165struct kfd_mem_obj {
166 uint32_t range_start;
167 uint32_t range_end;
168 uint64_t gpu_addr;
169 uint32_t *cpu_ptr;
170};
171
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172struct kfd_vmid_info {
173 uint32_t first_vmid_kfd;
174 uint32_t last_vmid_kfd;
175 uint32_t vmid_num_kfd;
176};
177
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178struct kfd_dev {
179 struct kgd_dev *kgd;
180
181 const struct kfd_device_info *device_info;
182 struct pci_dev *pdev;
183
184 unsigned int id; /* topology stub index */
185
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186 phys_addr_t doorbell_base; /* Start of actual doorbells used by
187 * KFD. It is aligned for mapping
188 * into user mode
189 */
190 size_t doorbell_id_offset; /* Doorbell offset (from KFD doorbell
191 * to HW doorbell, GFX reserved some
192 * at the start)
193 */
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194 u32 __iomem *doorbell_kernel_ptr; /* This is a pointer for a doorbells
195 * page used by kernel queue
196 */
197
4a488a7a 198 struct kgd2kfd_shared_resources shared_resources;
44008d7a 199 struct kfd_vmid_info vm_info;
4a488a7a 200
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201 const struct kfd2kgd_calls *kfd2kgd;
202 struct mutex doorbell_mutex;
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203 DECLARE_BITMAP(doorbell_available_index,
204 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS);
cea405b1 205
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206 void *gtt_mem;
207 uint64_t gtt_start_gpu_addr;
208 void *gtt_start_cpu_ptr;
209 void *gtt_sa_bitmap;
210 struct mutex gtt_sa_lock;
211 unsigned int gtt_sa_chunk_size;
212 unsigned int gtt_sa_num_of_chunks;
213
2249d558 214 /* Interrupts */
04ad47bd 215 struct kfifo ih_fifo;
48e876a2 216 struct workqueue_struct *ih_wq;
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217 struct work_struct interrupt_work;
218 spinlock_t interrupt_lock;
219
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220 /* QCM Device instance */
221 struct device_queue_manager *dqm;
4a488a7a 222
ed6e6a34 223 bool init_complete;
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224 /*
225 * Interrupts of interest to KFD are copied
226 * from the HW ring into a SW ring.
227 */
228 bool interrupts_active;
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229
230 /* Debug manager */
231 struct kfd_dbgmgr *dbgmgr;
373d7080 232
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233 /* Maximum process number mapped to HW scheduler */
234 unsigned int max_proc_per_quantum;
235
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236 /* CWSR */
237 bool cwsr_enabled;
238 const void *cwsr_isa;
239 unsigned int cwsr_isa_size;
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240};
241
242/* KGD2KFD callbacks */
243void kgd2kfd_exit(void);
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244struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd,
245 struct pci_dev *pdev, const struct kfd2kgd_calls *f2g);
4a488a7a 246bool kgd2kfd_device_init(struct kfd_dev *kfd,
cea405b1 247 const struct kgd2kfd_shared_resources *gpu_resources);
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248void kgd2kfd_device_exit(struct kfd_dev *kfd);
249
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250enum kfd_mempool {
251 KFD_MEMPOOL_SYSTEM_CACHEABLE = 1,
252 KFD_MEMPOOL_SYSTEM_WRITECOMBINE = 2,
253 KFD_MEMPOOL_FRAMEBUFFER = 3,
254};
255
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256/* Character device interface */
257int kfd_chardev_init(void);
258void kfd_chardev_exit(void);
259struct device *kfd_chardev(void);
260
241f24f8 261/**
7da2bcf8 262 * enum kfd_unmap_queues_filter
241f24f8 263 *
7da2bcf8 264 * @KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE: Preempts single queue.
241f24f8 265 *
7da2bcf8 266 * @KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES: Preempts all queues in the
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267 * running queues list.
268 *
7da2bcf8 269 * @KFD_UNMAP_QUEUES_FILTER_BY_PASID: Preempts queues that belongs to
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270 * specific process.
271 *
272 */
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273enum kfd_unmap_queues_filter {
274 KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE,
275 KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES,
276 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES,
277 KFD_UNMAP_QUEUES_FILTER_BY_PASID
241f24f8 278};
19f6d2a6 279
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280/**
281 * enum kfd_queue_type
282 *
283 * @KFD_QUEUE_TYPE_COMPUTE: Regular user mode queue type.
284 *
285 * @KFD_QUEUE_TYPE_SDMA: Sdma user mode queue type.
286 *
287 * @KFD_QUEUE_TYPE_HIQ: HIQ queue type.
288 *
289 * @KFD_QUEUE_TYPE_DIQ: DIQ queue type.
290 */
291enum kfd_queue_type {
292 KFD_QUEUE_TYPE_COMPUTE,
293 KFD_QUEUE_TYPE_SDMA,
294 KFD_QUEUE_TYPE_HIQ,
295 KFD_QUEUE_TYPE_DIQ
296};
297
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298enum kfd_queue_format {
299 KFD_QUEUE_FORMAT_PM4,
300 KFD_QUEUE_FORMAT_AQL
301};
302
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303/**
304 * struct queue_properties
305 *
306 * @type: The queue type.
307 *
308 * @queue_id: Queue identifier.
309 *
310 * @queue_address: Queue ring buffer address.
311 *
312 * @queue_size: Queue ring buffer size.
313 *
314 * @priority: Defines the queue priority relative to other queues in the
315 * process.
316 * This is just an indication and HW scheduling may override the priority as
317 * necessary while keeping the relative prioritization.
318 * the priority granularity is from 0 to f which f is the highest priority.
319 * currently all queues are initialized with the highest priority.
320 *
321 * @queue_percent: This field is partially implemented and currently a zero in
322 * this field defines that the queue is non active.
323 *
324 * @read_ptr: User space address which points to the number of dwords the
325 * cp read from the ring buffer. This field updates automatically by the H/W.
326 *
327 * @write_ptr: Defines the number of dwords written to the ring buffer.
328 *
329 * @doorbell_ptr: This field aim is to notify the H/W of new packet written to
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330 * the queue ring buffer. This field should be similar to write_ptr and the
331 * user should update this field after he updated the write_ptr.
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332 *
333 * @doorbell_off: The doorbell offset in the doorbell pci-bar.
334 *
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335 * @is_interop: Defines if this is a interop queue. Interop queue means that
336 * the queue can access both graphics and compute resources.
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337 *
338 * @is_active: Defines if the queue is active or not.
339 *
340 * @vmid: If the scheduling mode is no cp scheduling the field defines the vmid
341 * of the queue.
342 *
343 * This structure represents the queue properties for each queue no matter if
344 * it's user mode or kernel mode queue.
345 *
346 */
347struct queue_properties {
348 enum kfd_queue_type type;
6e99df57 349 enum kfd_queue_format format;
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350 unsigned int queue_id;
351 uint64_t queue_address;
352 uint64_t queue_size;
353 uint32_t priority;
354 uint32_t queue_percent;
355 uint32_t *read_ptr;
356 uint32_t *write_ptr;
5cd78de5 357 uint32_t __iomem *doorbell_ptr;
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358 uint32_t doorbell_off;
359 bool is_interop;
360 bool is_active;
361 /* Not relevant for user mode queues in cp scheduling */
362 unsigned int vmid;
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363 /* Relevant only for sdma queues*/
364 uint32_t sdma_engine_id;
365 uint32_t sdma_queue_id;
366 uint32_t sdma_vm_addr;
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367 /* Relevant only for VI */
368 uint64_t eop_ring_buffer_address;
369 uint32_t eop_ring_buffer_size;
370 uint64_t ctx_save_restore_area_address;
371 uint32_t ctx_save_restore_area_size;
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372 uint32_t ctl_stack_size;
373 uint64_t tba_addr;
374 uint64_t tma_addr;
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375};
376
377/**
378 * struct queue
379 *
380 * @list: Queue linked list.
381 *
382 * @mqd: The queue MQD.
383 *
384 * @mqd_mem_obj: The MQD local gpu memory object.
385 *
386 * @gart_mqd_addr: The MQD gart mc address.
387 *
388 * @properties: The queue properties.
389 *
390 * @mec: Used only in no cp scheduling mode and identifies to micro engine id
8eabaf54 391 * that the queue should be execute on.
ed8aab45 392 *
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393 * @pipe: Used only in no cp scheduling mode and identifies the queue's pipe
394 * id.
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395 *
396 * @queue: Used only in no cp scheduliong mode and identifies the queue's slot.
397 *
398 * @process: The kfd process that created this queue.
399 *
400 * @device: The kfd device that created this queue.
401 *
402 * This structure represents user mode compute queues.
403 * It contains all the necessary data to handle such queues.
404 *
405 */
406
407struct queue {
408 struct list_head list;
409 void *mqd;
410 struct kfd_mem_obj *mqd_mem_obj;
411 uint64_t gart_mqd_addr;
412 struct queue_properties properties;
413
414 uint32_t mec;
415 uint32_t pipe;
416 uint32_t queue;
417
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418 unsigned int sdma_id;
419
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420 struct kfd_process *process;
421 struct kfd_dev *device;
422};
423
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424/*
425 * Please read the kfd_mqd_manager.h description.
426 */
427enum KFD_MQD_TYPE {
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428 KFD_MQD_TYPE_COMPUTE = 0, /* for no cp scheduling */
429 KFD_MQD_TYPE_HIQ, /* for hiq */
430 KFD_MQD_TYPE_CP, /* for cp queues and diq */
431 KFD_MQD_TYPE_SDMA, /* for sdma queues */
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432 KFD_MQD_TYPE_MAX
433};
434
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435struct scheduling_resources {
436 unsigned int vmid_mask;
437 enum kfd_queue_type type;
438 uint64_t queue_mask;
439 uint64_t gws_mask;
440 uint32_t oac_mask;
441 uint32_t gds_heap_base;
442 uint32_t gds_heap_size;
443};
444
445struct process_queue_manager {
446 /* data */
447 struct kfd_process *process;
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448 struct list_head queues;
449 unsigned long *queue_slot_bitmap;
450};
451
452struct qcm_process_device {
453 /* The Device Queue Manager that owns this data */
454 struct device_queue_manager *dqm;
455 struct process_queue_manager *pqm;
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456 /* Queues list */
457 struct list_head queues_list;
458 struct list_head priv_queue_list;
459
460 unsigned int queue_count;
461 unsigned int vmid;
462 bool is_debug;
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463
464 /* This flag tells if we should reset all wavefronts on
465 * process termination
466 */
467 bool reset_wavefronts;
468
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469 /*
470 * All the memory management data should be here too
471 */
472 uint64_t gds_context_area;
473 uint32_t sh_mem_config;
474 uint32_t sh_mem_bases;
475 uint32_t sh_mem_ape1_base;
476 uint32_t sh_mem_ape1_limit;
477 uint32_t page_table_base;
478 uint32_t gds_size;
479 uint32_t num_gws;
480 uint32_t num_oac;
6a1c9510 481 uint32_t sh_hidden_private_base;
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482
483 /* CWSR memory */
484 void *cwsr_kaddr;
485 uint64_t tba_addr;
486 uint64_t tma_addr;
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487};
488
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489
490enum kfd_pdd_bound {
491 PDD_UNBOUND = 0,
492 PDD_BOUND,
493 PDD_BOUND_SUSPENDED,
494};
495
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496/* Data that is per-process-per device. */
497struct kfd_process_device {
498 /*
499 * List of all per-device data for a process.
500 * Starts from kfd_process.per_device_data.
501 */
502 struct list_head per_device_list;
503
504 /* The device that owns this data. */
505 struct kfd_dev *dev;
506
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507 /* The process that owns this kfd_process_device. */
508 struct kfd_process *process;
19f6d2a6 509
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510 /* per-process-per device QCM data structure */
511 struct qcm_process_device qpd;
512
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513 /*Apertures*/
514 uint64_t lds_base;
515 uint64_t lds_limit;
516 uint64_t gpuvm_base;
517 uint64_t gpuvm_limit;
518 uint64_t scratch_base;
519 uint64_t scratch_limit;
520
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521 /* Flag used to tell the pdd has dequeued from the dqm.
522 * This is used to prevent dev->dqm->ops.process_termination() from
523 * being called twice when it is already called in IOMMU callback
524 * function.
a82918f1 525 */
9fd3f1bf 526 bool already_dequeued;
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527
528 /* Is this process/pasid bound to this device? (amd_iommu_bind_pasid) */
529 enum kfd_pdd_bound bound;
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530};
531
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532#define qpd_to_pdd(x) container_of(x, struct kfd_process_device, qpd)
533
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534/* Process data */
535struct kfd_process {
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536 /*
537 * kfd_process are stored in an mm_struct*->kfd_process*
538 * hash table (kfd_processes in kfd_process.c)
539 */
540 struct hlist_node kfd_processes;
541
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542 /*
543 * Opaque pointer to mm_struct. We don't hold a reference to
544 * it so it should never be dereferenced from here. This is
545 * only used for looking up processes by their mm.
546 */
547 void *mm;
19f6d2a6 548
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549 struct kref ref;
550 struct work_struct release_work;
551
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552 struct mutex mutex;
553
554 /*
555 * In any process, the thread that started main() is the lead
556 * thread and outlives the rest.
557 * It is here because amd_iommu_bind_pasid wants a task_struct.
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558 * It can also be used for safely getting a reference to the
559 * mm_struct of the process.
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560 */
561 struct task_struct *lead_thread;
562
563 /* We want to receive a notification when the mm_struct is destroyed */
564 struct mmu_notifier mmu_notifier;
565
566 /* Use for delayed freeing of kfd_process structure */
567 struct rcu_head rcu;
568
569 unsigned int pasid;
a91e70e3 570 unsigned int doorbell_index;
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571
572 /*
573 * List of kfd_process_device structures,
574 * one for each device the process is using.
575 */
576 struct list_head per_device_data;
577
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578 struct process_queue_manager pqm;
579
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580 /*Is the user space process 32 bit?*/
581 bool is_32bit_user_mode;
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582
583 /* Event-related data */
584 struct mutex event_mutex;
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585 /* Event ID allocator and lookup */
586 struct idr event_idr;
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587 /* Event page */
588 struct kfd_signal_page *signal_page;
b9a5d0a5 589 size_t signal_mapped_size;
f3a39818 590 size_t signal_event_count;
c986169f 591 bool signal_event_limit_reached;
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592};
593
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594#define KFD_PROCESS_TABLE_SIZE 5 /* bits: 32 entries */
595extern DECLARE_HASHTABLE(kfd_processes_table, KFD_PROCESS_TABLE_SIZE);
596extern struct srcu_struct kfd_processes_srcu;
597
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598/**
599 * Ioctl function type.
600 *
601 * \param filep pointer to file structure.
602 * \param p amdkfd process pointer.
603 * \param data pointer to arg that was copied from user.
604 */
605typedef int amdkfd_ioctl_t(struct file *filep, struct kfd_process *p,
606 void *data);
607
608struct amdkfd_ioctl_desc {
609 unsigned int cmd;
610 int flags;
611 amdkfd_ioctl_t *func;
612 unsigned int cmd_drv;
613 const char *name;
614};
615
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616void kfd_process_create_wq(void);
617void kfd_process_destroy_wq(void);
373d7080 618struct kfd_process *kfd_create_process(struct file *filep);
19f6d2a6 619struct kfd_process *kfd_get_process(const struct task_struct *);
f3a39818 620struct kfd_process *kfd_lookup_process_by_pasid(unsigned int pasid);
abb208a8 621void kfd_unref_process(struct kfd_process *p);
19f6d2a6 622
64c7f8cf 623struct kfd_process_device *kfd_bind_process_to_device(struct kfd_dev *dev,
733fa1f7 624 struct kfd_process *p);
19f6d2a6 625struct kfd_process_device *kfd_get_process_device_data(struct kfd_dev *dev,
093c7d8c
AS
626 struct kfd_process *p);
627struct kfd_process_device *kfd_create_process_device_data(struct kfd_dev *dev,
628 struct kfd_process *p);
19f6d2a6 629
373d7080
FK
630int kfd_reserved_mem_mmap(struct kfd_process *process,
631 struct vm_area_struct *vma);
632
775921ed 633/* Process device data iterator */
8eabaf54
KR
634struct kfd_process_device *kfd_get_first_process_device_data(
635 struct kfd_process *p);
636struct kfd_process_device *kfd_get_next_process_device_data(
637 struct kfd_process *p,
775921ed
AS
638 struct kfd_process_device *pdd);
639bool kfd_has_process_device_data(struct kfd_process *p);
640
19f6d2a6
OG
641/* PASIDs */
642int kfd_pasid_init(void);
643void kfd_pasid_exit(void);
644bool kfd_set_pasid_limit(unsigned int new_limit);
645unsigned int kfd_get_pasid_limit(void);
646unsigned int kfd_pasid_alloc(void);
647void kfd_pasid_free(unsigned int pasid);
648
649/* Doorbells */
735df2ba
FK
650int kfd_doorbell_init(struct kfd_dev *kfd);
651void kfd_doorbell_fini(struct kfd_dev *kfd);
19f6d2a6
OG
652int kfd_doorbell_mmap(struct kfd_process *process, struct vm_area_struct *vma);
653u32 __iomem *kfd_get_kernel_doorbell(struct kfd_dev *kfd,
654 unsigned int *doorbell_off);
655void kfd_release_kernel_doorbell(struct kfd_dev *kfd, u32 __iomem *db_addr);
656u32 read_kernel_doorbell(u32 __iomem *db);
657void write_kernel_doorbell(u32 __iomem *db, u32 value);
658unsigned int kfd_queue_id_to_doorbell(struct kfd_dev *kfd,
659 struct kfd_process *process,
660 unsigned int queue_id);
a91e70e3
FK
661phys_addr_t kfd_get_process_doorbells(struct kfd_dev *dev,
662 struct kfd_process *process);
663int kfd_alloc_process_doorbells(struct kfd_process *process);
664void kfd_free_process_doorbells(struct kfd_process *process);
19f6d2a6 665
6e81090b
OG
666/* GTT Sub-Allocator */
667
668int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size,
669 struct kfd_mem_obj **mem_obj);
670
671int kfd_gtt_sa_free(struct kfd_dev *kfd, struct kfd_mem_obj *mem_obj);
672
4a488a7a
OG
673extern struct device *kfd_device;
674
5b5c4e40
EP
675/* Topology */
676int kfd_topology_init(void);
677void kfd_topology_shutdown(void);
678int kfd_topology_add_device(struct kfd_dev *gpu);
679int kfd_topology_remove_device(struct kfd_dev *gpu);
3a87177e
HK
680struct kfd_topology_device *kfd_topology_device_by_proximity_domain(
681 uint32_t proximity_domain);
5b5c4e40
EP
682struct kfd_dev *kfd_device_by_id(uint32_t gpu_id);
683struct kfd_dev *kfd_device_by_pci_dev(const struct pci_dev *pdev);
6d82eb0e 684int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_dev **kdev);
520b8fb7 685int kfd_numa_node_to_apic_id(int numa_node_id);
5b5c4e40 686
4a488a7a 687/* Interrupts */
2249d558
AL
688int kfd_interrupt_init(struct kfd_dev *dev);
689void kfd_interrupt_exit(struct kfd_dev *dev);
b3f5e6b4 690void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry);
2249d558
AL
691bool enqueue_ih_ring_entry(struct kfd_dev *kfd, const void *ih_ring_entry);
692bool interrupt_is_wanted(struct kfd_dev *dev, const uint32_t *ih_ring_entry);
4a488a7a
OG
693
694/* Power Management */
b3f5e6b4
AL
695void kgd2kfd_suspend(struct kfd_dev *kfd);
696int kgd2kfd_resume(struct kfd_dev *kfd);
4a488a7a 697
19f6d2a6
OG
698/* amdkfd Apertures */
699int kfd_init_apertures(struct kfd_process *process);
700
ed6e6a34 701/* Queue Context Management */
e88a614c 702int init_queue(struct queue **q, const struct queue_properties *properties);
ed6e6a34 703void uninit_queue(struct queue *q);
45102048 704void print_queue_properties(struct queue_properties *q);
ed6e6a34
BG
705void print_queue(struct queue *q);
706
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BG
707struct mqd_manager *mqd_manager_init(enum KFD_MQD_TYPE type,
708 struct kfd_dev *dev);
4b8f589b
BG
709struct mqd_manager *mqd_manager_init_cik(enum KFD_MQD_TYPE type,
710 struct kfd_dev *dev);
ee04955a
FK
711struct mqd_manager *mqd_manager_init_cik_hawaii(enum KFD_MQD_TYPE type,
712 struct kfd_dev *dev);
4b8f589b
BG
713struct mqd_manager *mqd_manager_init_vi(enum KFD_MQD_TYPE type,
714 struct kfd_dev *dev);
ee04955a
FK
715struct mqd_manager *mqd_manager_init_vi_tonga(enum KFD_MQD_TYPE type,
716 struct kfd_dev *dev);
64c7f8cf
BG
717struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev);
718void device_queue_manager_uninit(struct device_queue_manager *dqm);
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BG
719struct kernel_queue *kernel_queue_init(struct kfd_dev *dev,
720 enum kfd_queue_type type);
721void kernel_queue_uninit(struct kernel_queue *kq);
722
45102048
BG
723/* Process Queue Manager */
724struct process_queue_node {
725 struct queue *q;
726 struct kernel_queue *kq;
727 struct list_head process_queue_list;
728};
729
9fd3f1bf
FK
730void kfd_process_dequeue_from_device(struct kfd_process_device *pdd);
731void kfd_process_dequeue_from_all_devices(struct kfd_process *p);
45102048
BG
732int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p);
733void pqm_uninit(struct process_queue_manager *pqm);
734int pqm_create_queue(struct process_queue_manager *pqm,
735 struct kfd_dev *dev,
736 struct file *f,
737 struct queue_properties *properties,
45102048
BG
738 unsigned int *qid);
739int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid);
740int pqm_update_queue(struct process_queue_manager *pqm, unsigned int qid,
741 struct queue_properties *p);
fbeb661b
YS
742struct kernel_queue *pqm_get_kernel_queue(struct process_queue_manager *pqm,
743 unsigned int qid);
45102048 744
788bf83d
YS
745int amdkfd_fence_wait_timeout(unsigned int *fence_addr,
746 unsigned int fence_value,
8c72c3d7 747 unsigned int timeout_ms);
788bf83d 748
ed6e6a34
BG
749/* Packet Manager */
750
64c7f8cf
BG
751#define KFD_FENCE_COMPLETED (100)
752#define KFD_FENCE_INIT (10)
241f24f8 753
ed6e6a34
BG
754struct packet_manager {
755 struct device_queue_manager *dqm;
756 struct kernel_queue *priv_queue;
757 struct mutex lock;
758 bool allocated;
759 struct kfd_mem_obj *ib_buffer_obj;
851a645e 760 unsigned int ib_size_bytes;
ed6e6a34
BG
761};
762
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BG
763int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm);
764void pm_uninit(struct packet_manager *pm);
765int pm_send_set_resources(struct packet_manager *pm,
766 struct scheduling_resources *res);
767int pm_send_runlist(struct packet_manager *pm, struct list_head *dqm_queues);
768int pm_send_query_status(struct packet_manager *pm, uint64_t fence_address,
769 uint32_t fence_value);
770
771int pm_send_unmap_queue(struct packet_manager *pm, enum kfd_queue_type type,
7da2bcf8 772 enum kfd_unmap_queues_filter mode,
64c7f8cf
BG
773 uint32_t filter_param, bool reset,
774 unsigned int sdma_engine);
775
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BG
776void pm_release_ib(struct packet_manager *pm);
777
19f6d2a6 778uint64_t kfd_get_number_elems(struct kfd_dev *kfd);
19f6d2a6 779
f3a39818
AL
780/* Events */
781extern const struct kfd_event_interrupt_class event_interrupt_class_cik;
930c5ff4 782extern const struct kfd_device_global_init_class device_global_init_class_cik;
f3a39818 783
f3a39818
AL
784void kfd_event_init_process(struct kfd_process *p);
785void kfd_event_free_process(struct kfd_process *p);
786int kfd_event_mmap(struct kfd_process *process, struct vm_area_struct *vma);
787int kfd_wait_on_events(struct kfd_process *p,
59d3e8be 788 uint32_t num_events, void __user *data,
f3a39818 789 bool all, uint32_t user_timeout_ms,
fdf0c833 790 uint32_t *wait_result);
f3a39818
AL
791void kfd_signal_event_interrupt(unsigned int pasid, uint32_t partial_id,
792 uint32_t valid_id_bits);
59d3e8be
AS
793void kfd_signal_iommu_event(struct kfd_dev *dev,
794 unsigned int pasid, unsigned long address,
795 bool is_write_requested, bool is_execute_requested);
930c5ff4 796void kfd_signal_hw_exception_event(unsigned int pasid);
f3a39818
AL
797int kfd_set_event(struct kfd_process *p, uint32_t event_id);
798int kfd_reset_event(struct kfd_process *p, uint32_t event_id);
799int kfd_event_create(struct file *devkfd, struct kfd_process *p,
800 uint32_t event_type, bool auto_reset, uint32_t node_id,
801 uint32_t *event_id, uint32_t *event_trigger_data,
802 uint64_t *event_page_offset, uint32_t *event_slot_index);
803int kfd_event_destroy(struct kfd_process *p, uint32_t event_id);
804
c3447e81
BG
805int dbgdev_wave_reset_wavefronts(struct kfd_dev *dev, struct kfd_process *p);
806
851a645e
FK
807/* Debugfs */
808#if defined(CONFIG_DEBUG_FS)
809
810void kfd_debugfs_init(void);
811void kfd_debugfs_fini(void);
812int kfd_debugfs_mqds_by_process(struct seq_file *m, void *data);
813int pqm_debugfs_mqds(struct seq_file *m, void *data);
814int kfd_debugfs_hqds_by_device(struct seq_file *m, void *data);
815int dqm_debugfs_hqds(struct seq_file *m, void *data);
816int kfd_debugfs_rls_by_device(struct seq_file *m, void *data);
817int pm_debugfs_runlist(struct seq_file *m, void *data);
818
819#else
820
821static inline void kfd_debugfs_init(void) {}
822static inline void kfd_debugfs_fini(void) {}
823
824#endif
825
4a488a7a 826#endif