projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 14328aa5 PC |
1 | /* |
| 2 | * Copyright 2018 Advanced Micro Devices, Inc. | |
| 3 | * | |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
| 5 | * copy of this software and associated documentation files (the "Software"), | |
| 6 | * to deal in the Software without restriction, including without limitation | |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the | |
| 9 | * Software is furnished to do so, subject to the following conditions: | |
| 10 | * | |
| 11 | * The above copyright notice and this permission notice shall be included in | |
| 12 | * all copies or substantial portions of the Software. | |
| 13 | * | |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. | |
| 21 | * | |
| 22 | */ | |
| 23 | ||
| 24 | #include "kfd_device_queue_manager.h" | |
| 25 | #include "navi10_enum.h" | |
| 26 | #include "gc/gc_10_1_0_offset.h" | |
| 27 | #include "gc/gc_10_1_0_sh_mask.h" | |
| 28 | ||
| 29 | static int update_qpd_v10(struct device_queue_manager *dqm, | |
| 30 | struct qcm_process_device *qpd); | |
| 31 | static void init_sdma_vm_v10(struct device_queue_manager *dqm, struct queue *q, | |
| 32 | struct qcm_process_device *qpd); | |
| 33 | ||
| 34 | void device_queue_manager_init_v10_navi10( | |
| 35 | struct device_queue_manager_asic_ops *asic_ops) | |
| 36 | { | |
| 37 | asic_ops->update_qpd = update_qpd_v10; | |
| 38 | asic_ops->init_sdma_vm = init_sdma_vm_v10; | |
| 39 | asic_ops->mqd_manager_init = mqd_manager_init_v10; | |
| 40 | } | |
| 41 | ||
| 42 | static uint32_t compute_sh_mem_bases_64bit(struct kfd_process_device *pdd) | |
| 43 | { | |
| 44 | uint32_t shared_base = pdd->lds_base >> 48; | |
| 45 | uint32_t private_base = pdd->scratch_base >> 48; | |
| 46 | ||
| 47 | return (shared_base << SH_MEM_BASES__SHARED_BASE__SHIFT) | | |
| 48 | private_base; | |
| 49 | } | |
| 50 | ||
| 51 | static int update_qpd_v10(struct device_queue_manager *dqm, | |
| 52 | struct qcm_process_device *qpd) | |
| 53 | { | |
| 54 | struct kfd_process_device *pdd; | |
| 55 | ||
| 56 | pdd = qpd_to_pdd(qpd); | |
| 57 | ||
| 58 | /* check if sh_mem_config register already configured */ | |
| 59 | if (qpd->sh_mem_config == 0) { | |
| 60 | qpd->sh_mem_config = | |
| d56b1980 JC |
61 | (SH_MEM_ALIGNMENT_MODE_UNALIGNED << |
| 62 | SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT) | | |
| 63 | (3 << SH_MEM_CONFIG__INITIAL_INST_PREFETCH__SHIFT); | |
| 14328aa5 PC |
64 | #if 0 |
| 65 | /* TODO: | |
| 66 | * This shouldn't be an issue with Navi10. Verify. | |
| 67 | */ | |
| 68 | if (vega10_noretry) | |
| 69 | qpd->sh_mem_config |= | |
| 70 | 1 << SH_MEM_CONFIG__RETRY_DISABLE__SHIFT; | |
| 71 | #endif | |
| 72 | ||
| 73 | qpd->sh_mem_ape1_limit = 0; | |
| 74 | qpd->sh_mem_ape1_base = 0; | |
| 75 | } | |
| 76 | ||
| 77 | qpd->sh_mem_bases = compute_sh_mem_bases_64bit(pdd); | |
| 78 | ||
| 79 | pr_debug("sh_mem_bases 0x%X\n", qpd->sh_mem_bases); | |
| 80 | ||
| 81 | return 0; | |
| 82 | } | |
| 83 | ||
| 84 | static void init_sdma_vm_v10(struct device_queue_manager *dqm, struct queue *q, | |
| 85 | struct qcm_process_device *qpd) | |
| 86 | { | |
| 87 | /* Not needed on SDMAv4 onwards any more */ | |
| 88 | q->properties.sdma_vm_addr = 0; | |
| 89 | } |