Commit | Line | Data |
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64c7f8cf BG |
1 | /* |
2 | * Copyright 2014 Advanced Micro Devices, Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | */ | |
23 | ||
24 | #include <linux/slab.h> | |
25 | #include <linux/list.h> | |
26 | #include <linux/types.h> | |
27 | #include <linux/printk.h> | |
28 | #include <linux/bitops.h> | |
99331a51 | 29 | #include <linux/sched.h> |
64c7f8cf BG |
30 | #include "kfd_priv.h" |
31 | #include "kfd_device_queue_manager.h" | |
32 | #include "kfd_mqd_manager.h" | |
33 | #include "cik_regs.h" | |
34 | #include "kfd_kernel_queue.h" | |
64c7f8cf BG |
35 | |
36 | /* Size of the per-pipe EOP queue */ | |
37 | #define CIK_HPD_EOP_BYTES_LOG2 11 | |
38 | #define CIK_HPD_EOP_BYTES (1U << CIK_HPD_EOP_BYTES_LOG2) | |
39 | ||
64c7f8cf BG |
40 | static int set_pasid_vmid_mapping(struct device_queue_manager *dqm, |
41 | unsigned int pasid, unsigned int vmid); | |
42 | ||
43 | static int create_compute_queue_nocpsch(struct device_queue_manager *dqm, | |
44 | struct queue *q, | |
45 | struct qcm_process_device *qpd); | |
bcea3081 | 46 | |
64c7f8cf | 47 | static int execute_queues_cpsch(struct device_queue_manager *dqm, bool lock); |
992839ad YS |
48 | static int destroy_queues_cpsch(struct device_queue_manager *dqm, |
49 | bool preempt_static_queues, bool lock); | |
64c7f8cf | 50 | |
bcea3081 BG |
51 | static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm, |
52 | struct queue *q, | |
53 | struct qcm_process_device *qpd); | |
54 | ||
55 | static void deallocate_sdma_queue(struct device_queue_manager *dqm, | |
56 | unsigned int sdma_queue_id); | |
64c7f8cf | 57 | |
bcea3081 BG |
58 | static inline |
59 | enum KFD_MQD_TYPE get_mqd_type_from_queue_type(enum kfd_queue_type type) | |
64c7f8cf | 60 | { |
bcea3081 | 61 | if (type == KFD_QUEUE_TYPE_SDMA) |
85d258f9 BG |
62 | return KFD_MQD_TYPE_SDMA; |
63 | return KFD_MQD_TYPE_CP; | |
64c7f8cf BG |
64 | } |
65 | ||
1365aa62 | 66 | unsigned int get_first_pipe(struct device_queue_manager *dqm) |
64c7f8cf | 67 | { |
1365aa62 | 68 | BUG_ON(!dqm || !dqm->dev); |
64c7f8cf BG |
69 | return dqm->dev->shared_resources.first_compute_pipe; |
70 | } | |
71 | ||
64ea8f4a OG |
72 | unsigned int get_pipes_num(struct device_queue_manager *dqm) |
73 | { | |
74 | BUG_ON(!dqm || !dqm->dev); | |
75 | return dqm->dev->shared_resources.compute_pipe_count; | |
76 | } | |
77 | ||
64c7f8cf BG |
78 | static inline unsigned int get_pipes_num_cpsch(void) |
79 | { | |
80 | return PIPE_PER_ME_CP_SCHEDULING; | |
81 | } | |
82 | ||
a22fc854 | 83 | void program_sh_mem_settings(struct device_queue_manager *dqm, |
64c7f8cf BG |
84 | struct qcm_process_device *qpd) |
85 | { | |
cea405b1 XZ |
86 | return dqm->dev->kfd2kgd->program_sh_mem_settings( |
87 | dqm->dev->kgd, qpd->vmid, | |
64c7f8cf BG |
88 | qpd->sh_mem_config, |
89 | qpd->sh_mem_ape1_base, | |
90 | qpd->sh_mem_ape1_limit, | |
91 | qpd->sh_mem_bases); | |
92 | } | |
93 | ||
94 | static int allocate_vmid(struct device_queue_manager *dqm, | |
95 | struct qcm_process_device *qpd, | |
96 | struct queue *q) | |
97 | { | |
98 | int bit, allocated_vmid; | |
99 | ||
100 | if (dqm->vmid_bitmap == 0) | |
101 | return -ENOMEM; | |
102 | ||
103 | bit = find_first_bit((unsigned long *)&dqm->vmid_bitmap, CIK_VMID_NUM); | |
104 | clear_bit(bit, (unsigned long *)&dqm->vmid_bitmap); | |
105 | ||
106 | /* Kaveri kfd vmid's starts from vmid 8 */ | |
107 | allocated_vmid = bit + KFD_VMID_START_OFFSET; | |
108 | pr_debug("kfd: vmid allocation %d\n", allocated_vmid); | |
109 | qpd->vmid = allocated_vmid; | |
110 | q->properties.vmid = allocated_vmid; | |
111 | ||
112 | set_pasid_vmid_mapping(dqm, q->process->pasid, q->properties.vmid); | |
113 | program_sh_mem_settings(dqm, qpd); | |
114 | ||
115 | return 0; | |
116 | } | |
117 | ||
118 | static void deallocate_vmid(struct device_queue_manager *dqm, | |
119 | struct qcm_process_device *qpd, | |
120 | struct queue *q) | |
121 | { | |
122 | int bit = qpd->vmid - KFD_VMID_START_OFFSET; | |
123 | ||
2030664b BG |
124 | /* Release the vmid mapping */ |
125 | set_pasid_vmid_mapping(dqm, 0, qpd->vmid); | |
126 | ||
64c7f8cf BG |
127 | set_bit(bit, (unsigned long *)&dqm->vmid_bitmap); |
128 | qpd->vmid = 0; | |
129 | q->properties.vmid = 0; | |
130 | } | |
131 | ||
132 | static int create_queue_nocpsch(struct device_queue_manager *dqm, | |
133 | struct queue *q, | |
134 | struct qcm_process_device *qpd, | |
135 | int *allocated_vmid) | |
136 | { | |
137 | int retval; | |
138 | ||
139 | BUG_ON(!dqm || !q || !qpd || !allocated_vmid); | |
140 | ||
141 | pr_debug("kfd: In func %s\n", __func__); | |
142 | print_queue(q); | |
143 | ||
144 | mutex_lock(&dqm->lock); | |
145 | ||
b8cbab04 OG |
146 | if (dqm->total_queue_count >= max_num_of_queues_per_device) { |
147 | pr_warn("amdkfd: Can't create new usermode queue because %d queues were already created\n", | |
148 | dqm->total_queue_count); | |
149 | mutex_unlock(&dqm->lock); | |
150 | return -EPERM; | |
151 | } | |
152 | ||
64c7f8cf BG |
153 | if (list_empty(&qpd->queues_list)) { |
154 | retval = allocate_vmid(dqm, qpd, q); | |
155 | if (retval != 0) { | |
156 | mutex_unlock(&dqm->lock); | |
157 | return retval; | |
158 | } | |
159 | } | |
160 | *allocated_vmid = qpd->vmid; | |
161 | q->properties.vmid = qpd->vmid; | |
162 | ||
bcea3081 BG |
163 | if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE) |
164 | retval = create_compute_queue_nocpsch(dqm, q, qpd); | |
165 | if (q->properties.type == KFD_QUEUE_TYPE_SDMA) | |
166 | retval = create_sdma_queue_nocpsch(dqm, q, qpd); | |
64c7f8cf BG |
167 | |
168 | if (retval != 0) { | |
169 | if (list_empty(&qpd->queues_list)) { | |
170 | deallocate_vmid(dqm, qpd, q); | |
171 | *allocated_vmid = 0; | |
172 | } | |
173 | mutex_unlock(&dqm->lock); | |
174 | return retval; | |
175 | } | |
176 | ||
177 | list_add(&q->list, &qpd->queues_list); | |
b6819cec JC |
178 | if (q->properties.is_active) |
179 | dqm->queue_count++; | |
64c7f8cf | 180 | |
bcea3081 BG |
181 | if (q->properties.type == KFD_QUEUE_TYPE_SDMA) |
182 | dqm->sdma_queue_count++; | |
64c7f8cf | 183 | |
b8cbab04 OG |
184 | /* |
185 | * Unconditionally increment this counter, regardless of the queue's | |
186 | * type or whether the queue is active. | |
187 | */ | |
188 | dqm->total_queue_count++; | |
189 | pr_debug("Total of %d queues are accountable so far\n", | |
190 | dqm->total_queue_count); | |
191 | ||
64c7f8cf BG |
192 | mutex_unlock(&dqm->lock); |
193 | return 0; | |
194 | } | |
195 | ||
196 | static int allocate_hqd(struct device_queue_manager *dqm, struct queue *q) | |
197 | { | |
198 | bool set; | |
f0ec5b99 | 199 | int pipe, bit, i; |
64c7f8cf BG |
200 | |
201 | set = false; | |
202 | ||
f0ec5b99 BG |
203 | for (pipe = dqm->next_pipe_to_allocate, i = 0; i < get_pipes_num(dqm); |
204 | pipe = ((pipe + 1) % get_pipes_num(dqm)), ++i) { | |
64c7f8cf BG |
205 | if (dqm->allocated_queues[pipe] != 0) { |
206 | bit = find_first_bit( | |
207 | (unsigned long *)&dqm->allocated_queues[pipe], | |
208 | QUEUES_PER_PIPE); | |
209 | ||
210 | clear_bit(bit, | |
211 | (unsigned long *)&dqm->allocated_queues[pipe]); | |
212 | q->pipe = pipe; | |
213 | q->queue = bit; | |
214 | set = true; | |
215 | break; | |
216 | } | |
217 | } | |
218 | ||
991ca8ee | 219 | if (!set) |
64c7f8cf BG |
220 | return -EBUSY; |
221 | ||
222 | pr_debug("kfd: DQM %s hqd slot - pipe (%d) queue(%d)\n", | |
223 | __func__, q->pipe, q->queue); | |
224 | /* horizontal hqd allocation */ | |
225 | dqm->next_pipe_to_allocate = (pipe + 1) % get_pipes_num(dqm); | |
226 | ||
227 | return 0; | |
228 | } | |
229 | ||
230 | static inline void deallocate_hqd(struct device_queue_manager *dqm, | |
231 | struct queue *q) | |
232 | { | |
233 | set_bit(q->queue, (unsigned long *)&dqm->allocated_queues[q->pipe]); | |
234 | } | |
235 | ||
236 | static int create_compute_queue_nocpsch(struct device_queue_manager *dqm, | |
237 | struct queue *q, | |
238 | struct qcm_process_device *qpd) | |
239 | { | |
240 | int retval; | |
241 | struct mqd_manager *mqd; | |
242 | ||
243 | BUG_ON(!dqm || !q || !qpd); | |
244 | ||
45c9a5e4 | 245 | mqd = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_COMPUTE); |
64c7f8cf BG |
246 | if (mqd == NULL) |
247 | return -ENOMEM; | |
248 | ||
249 | retval = allocate_hqd(dqm, q); | |
250 | if (retval != 0) | |
251 | return retval; | |
252 | ||
253 | retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj, | |
254 | &q->gart_mqd_addr, &q->properties); | |
255 | if (retval != 0) { | |
256 | deallocate_hqd(dqm, q); | |
257 | return retval; | |
258 | } | |
259 | ||
030e416b BG |
260 | pr_debug("kfd: loading mqd to hqd on pipe (%d) queue (%d)\n", |
261 | q->pipe, | |
262 | q->queue); | |
263 | ||
264 | retval = mqd->load_mqd(mqd, q->mqd, q->pipe, | |
8dfe58b2 | 265 | q->queue, (uint32_t __user *) q->properties.write_ptr); |
030e416b BG |
266 | if (retval != 0) { |
267 | deallocate_hqd(dqm, q); | |
268 | mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj); | |
269 | return retval; | |
270 | } | |
271 | ||
64c7f8cf BG |
272 | return 0; |
273 | } | |
274 | ||
275 | static int destroy_queue_nocpsch(struct device_queue_manager *dqm, | |
276 | struct qcm_process_device *qpd, | |
277 | struct queue *q) | |
278 | { | |
279 | int retval; | |
280 | struct mqd_manager *mqd; | |
281 | ||
282 | BUG_ON(!dqm || !q || !q->mqd || !qpd); | |
283 | ||
284 | retval = 0; | |
285 | ||
286 | pr_debug("kfd: In Func %s\n", __func__); | |
287 | ||
288 | mutex_lock(&dqm->lock); | |
64c7f8cf | 289 | |
c2e1b3a4 | 290 | if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE) { |
45c9a5e4 | 291 | mqd = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_COMPUTE); |
c2e1b3a4 BG |
292 | if (mqd == NULL) { |
293 | retval = -ENOMEM; | |
294 | goto out; | |
295 | } | |
296 | deallocate_hqd(dqm, q); | |
297 | } else if (q->properties.type == KFD_QUEUE_TYPE_SDMA) { | |
45c9a5e4 | 298 | mqd = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_SDMA); |
c2e1b3a4 BG |
299 | if (mqd == NULL) { |
300 | retval = -ENOMEM; | |
301 | goto out; | |
302 | } | |
303 | dqm->sdma_queue_count--; | |
304 | deallocate_sdma_queue(dqm, q->sdma_id); | |
7113cd65 OG |
305 | } else { |
306 | pr_debug("q->properties.type is invalid (%d)\n", | |
307 | q->properties.type); | |
308 | retval = -EINVAL; | |
64c7f8cf BG |
309 | goto out; |
310 | } | |
311 | ||
312 | retval = mqd->destroy_mqd(mqd, q->mqd, | |
c2e1b3a4 | 313 | KFD_PREEMPT_TYPE_WAVEFRONT_RESET, |
64c7f8cf BG |
314 | QUEUE_PREEMPT_DEFAULT_TIMEOUT_MS, |
315 | q->pipe, q->queue); | |
316 | ||
317 | if (retval != 0) | |
318 | goto out; | |
319 | ||
64c7f8cf BG |
320 | mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj); |
321 | ||
322 | list_del(&q->list); | |
323 | if (list_empty(&qpd->queues_list)) | |
324 | deallocate_vmid(dqm, qpd, q); | |
b6819cec JC |
325 | if (q->properties.is_active) |
326 | dqm->queue_count--; | |
b8cbab04 OG |
327 | |
328 | /* | |
329 | * Unconditionally decrement this counter, regardless of the queue's | |
330 | * type | |
331 | */ | |
332 | dqm->total_queue_count--; | |
333 | pr_debug("Total of %d queues are accountable so far\n", | |
334 | dqm->total_queue_count); | |
335 | ||
64c7f8cf BG |
336 | out: |
337 | mutex_unlock(&dqm->lock); | |
338 | return retval; | |
339 | } | |
340 | ||
341 | static int update_queue(struct device_queue_manager *dqm, struct queue *q) | |
342 | { | |
343 | int retval; | |
344 | struct mqd_manager *mqd; | |
b6ffbab8 | 345 | bool prev_active = false; |
64c7f8cf BG |
346 | |
347 | BUG_ON(!dqm || !q || !q->mqd); | |
348 | ||
349 | mutex_lock(&dqm->lock); | |
0b3674ae OG |
350 | mqd = dqm->ops.get_mqd_manager(dqm, |
351 | get_mqd_type_from_queue_type(q->properties.type)); | |
64c7f8cf BG |
352 | if (mqd == NULL) { |
353 | mutex_unlock(&dqm->lock); | |
354 | return -ENOMEM; | |
355 | } | |
356 | ||
991ca8ee | 357 | if (q->properties.is_active) |
b6ffbab8 OG |
358 | prev_active = true; |
359 | ||
360 | /* | |
361 | * | |
362 | * check active state vs. the previous state | |
363 | * and modify counter accordingly | |
364 | */ | |
365 | retval = mqd->update_mqd(mqd, q->mqd, &q->properties); | |
991ca8ee | 366 | if ((q->properties.is_active) && (!prev_active)) |
64c7f8cf | 367 | dqm->queue_count++; |
991ca8ee | 368 | else if ((!q->properties.is_active) && (prev_active)) |
64c7f8cf BG |
369 | dqm->queue_count--; |
370 | ||
371 | if (sched_policy != KFD_SCHED_POLICY_NO_HWS) | |
372 | retval = execute_queues_cpsch(dqm, false); | |
373 | ||
374 | mutex_unlock(&dqm->lock); | |
375 | return retval; | |
376 | } | |
377 | ||
378 | static struct mqd_manager *get_mqd_manager_nocpsch( | |
379 | struct device_queue_manager *dqm, enum KFD_MQD_TYPE type) | |
380 | { | |
381 | struct mqd_manager *mqd; | |
382 | ||
383 | BUG_ON(!dqm || type >= KFD_MQD_TYPE_MAX); | |
384 | ||
385 | pr_debug("kfd: In func %s mqd type %d\n", __func__, type); | |
386 | ||
387 | mqd = dqm->mqds[type]; | |
388 | if (!mqd) { | |
389 | mqd = mqd_manager_init(type, dqm->dev); | |
390 | if (mqd == NULL) | |
391 | pr_err("kfd: mqd manager is NULL"); | |
392 | dqm->mqds[type] = mqd; | |
393 | } | |
394 | ||
395 | return mqd; | |
396 | } | |
397 | ||
398 | static int register_process_nocpsch(struct device_queue_manager *dqm, | |
399 | struct qcm_process_device *qpd) | |
400 | { | |
401 | struct device_process_node *n; | |
a22fc854 | 402 | int retval; |
64c7f8cf BG |
403 | |
404 | BUG_ON(!dqm || !qpd); | |
405 | ||
406 | pr_debug("kfd: In func %s\n", __func__); | |
407 | ||
408 | n = kzalloc(sizeof(struct device_process_node), GFP_KERNEL); | |
409 | if (!n) | |
410 | return -ENOMEM; | |
411 | ||
412 | n->qpd = qpd; | |
413 | ||
414 | mutex_lock(&dqm->lock); | |
415 | list_add(&n->list, &dqm->queues); | |
416 | ||
a22fc854 BG |
417 | retval = dqm->ops_asic_specific.register_process(dqm, qpd); |
418 | ||
64c7f8cf BG |
419 | dqm->processes_count++; |
420 | ||
421 | mutex_unlock(&dqm->lock); | |
422 | ||
a22fc854 | 423 | return retval; |
64c7f8cf BG |
424 | } |
425 | ||
426 | static int unregister_process_nocpsch(struct device_queue_manager *dqm, | |
427 | struct qcm_process_device *qpd) | |
428 | { | |
429 | int retval; | |
430 | struct device_process_node *cur, *next; | |
431 | ||
432 | BUG_ON(!dqm || !qpd); | |
433 | ||
1e5ec956 | 434 | pr_debug("In func %s\n", __func__); |
64c7f8cf | 435 | |
1e5ec956 OG |
436 | pr_debug("qpd->queues_list is %s\n", |
437 | list_empty(&qpd->queues_list) ? "empty" : "not empty"); | |
64c7f8cf BG |
438 | |
439 | retval = 0; | |
440 | mutex_lock(&dqm->lock); | |
441 | ||
442 | list_for_each_entry_safe(cur, next, &dqm->queues, list) { | |
443 | if (qpd == cur->qpd) { | |
444 | list_del(&cur->list); | |
f5d896bb | 445 | kfree(cur); |
64c7f8cf BG |
446 | dqm->processes_count--; |
447 | goto out; | |
448 | } | |
449 | } | |
450 | /* qpd not found in dqm list */ | |
451 | retval = 1; | |
452 | out: | |
453 | mutex_unlock(&dqm->lock); | |
454 | return retval; | |
455 | } | |
456 | ||
457 | static int | |
458 | set_pasid_vmid_mapping(struct device_queue_manager *dqm, unsigned int pasid, | |
459 | unsigned int vmid) | |
460 | { | |
461 | uint32_t pasid_mapping; | |
462 | ||
cea405b1 XZ |
463 | pasid_mapping = (pasid == 0) ? 0 : |
464 | (uint32_t)pasid | | |
465 | ATC_VMID_PASID_MAPPING_VALID; | |
466 | ||
467 | return dqm->dev->kfd2kgd->set_pasid_vmid_mapping( | |
468 | dqm->dev->kgd, pasid_mapping, | |
64c7f8cf BG |
469 | vmid); |
470 | } | |
471 | ||
a22fc854 | 472 | int init_pipelines(struct device_queue_manager *dqm, |
64c7f8cf BG |
473 | unsigned int pipes_num, unsigned int first_pipe) |
474 | { | |
64c7f8cf BG |
475 | BUG_ON(!dqm || !dqm->dev); |
476 | ||
477 | pr_debug("kfd: In func %s\n", __func__); | |
478 | ||
64c7f8cf BG |
479 | return 0; |
480 | } | |
481 | ||
2249d558 AL |
482 | static void init_interrupts(struct device_queue_manager *dqm) |
483 | { | |
484 | unsigned int i; | |
485 | ||
486 | BUG_ON(dqm == NULL); | |
487 | ||
488 | for (i = 0 ; i < get_pipes_num(dqm) ; i++) | |
489 | dqm->dev->kfd2kgd->init_interrupts(dqm->dev->kgd, | |
490 | i + get_first_pipe(dqm)); | |
491 | } | |
492 | ||
64c7f8cf BG |
493 | static int init_scheduler(struct device_queue_manager *dqm) |
494 | { | |
495 | int retval; | |
496 | ||
497 | BUG_ON(!dqm); | |
498 | ||
499 | pr_debug("kfd: In %s\n", __func__); | |
500 | ||
9fa843e7 | 501 | retval = init_pipelines(dqm, get_pipes_num(dqm), get_first_pipe(dqm)); |
64c7f8cf BG |
502 | return retval; |
503 | } | |
504 | ||
505 | static int initialize_nocpsch(struct device_queue_manager *dqm) | |
506 | { | |
507 | int i; | |
508 | ||
509 | BUG_ON(!dqm); | |
510 | ||
511 | pr_debug("kfd: In func %s num of pipes: %d\n", | |
512 | __func__, get_pipes_num(dqm)); | |
513 | ||
514 | mutex_init(&dqm->lock); | |
515 | INIT_LIST_HEAD(&dqm->queues); | |
516 | dqm->queue_count = dqm->next_pipe_to_allocate = 0; | |
bcea3081 | 517 | dqm->sdma_queue_count = 0; |
64c7f8cf BG |
518 | dqm->allocated_queues = kcalloc(get_pipes_num(dqm), |
519 | sizeof(unsigned int), GFP_KERNEL); | |
520 | if (!dqm->allocated_queues) { | |
521 | mutex_destroy(&dqm->lock); | |
522 | return -ENOMEM; | |
523 | } | |
524 | ||
525 | for (i = 0; i < get_pipes_num(dqm); i++) | |
526 | dqm->allocated_queues[i] = (1 << QUEUES_PER_PIPE) - 1; | |
527 | ||
528 | dqm->vmid_bitmap = (1 << VMID_PER_DEVICE) - 1; | |
bcea3081 | 529 | dqm->sdma_bitmap = (1 << CIK_SDMA_QUEUES) - 1; |
64c7f8cf BG |
530 | |
531 | init_scheduler(dqm); | |
532 | return 0; | |
533 | } | |
534 | ||
535 | static void uninitialize_nocpsch(struct device_queue_manager *dqm) | |
536 | { | |
6f9d54fd OG |
537 | int i; |
538 | ||
64c7f8cf BG |
539 | BUG_ON(!dqm); |
540 | ||
541 | BUG_ON(dqm->queue_count > 0 || dqm->processes_count > 0); | |
542 | ||
543 | kfree(dqm->allocated_queues); | |
6f9d54fd OG |
544 | for (i = 0 ; i < KFD_MQD_TYPE_MAX ; i++) |
545 | kfree(dqm->mqds[i]); | |
64c7f8cf | 546 | mutex_destroy(&dqm->lock); |
a86aa3ca | 547 | kfd_gtt_sa_free(dqm->dev, dqm->pipeline_mem); |
64c7f8cf BG |
548 | } |
549 | ||
550 | static int start_nocpsch(struct device_queue_manager *dqm) | |
551 | { | |
2249d558 | 552 | init_interrupts(dqm); |
64c7f8cf BG |
553 | return 0; |
554 | } | |
555 | ||
556 | static int stop_nocpsch(struct device_queue_manager *dqm) | |
557 | { | |
558 | return 0; | |
559 | } | |
560 | ||
bcea3081 BG |
561 | static int allocate_sdma_queue(struct device_queue_manager *dqm, |
562 | unsigned int *sdma_queue_id) | |
563 | { | |
564 | int bit; | |
565 | ||
566 | if (dqm->sdma_bitmap == 0) | |
567 | return -ENOMEM; | |
568 | ||
569 | bit = find_first_bit((unsigned long *)&dqm->sdma_bitmap, | |
570 | CIK_SDMA_QUEUES); | |
571 | ||
572 | clear_bit(bit, (unsigned long *)&dqm->sdma_bitmap); | |
573 | *sdma_queue_id = bit; | |
574 | ||
575 | return 0; | |
576 | } | |
577 | ||
578 | static void deallocate_sdma_queue(struct device_queue_manager *dqm, | |
579 | unsigned int sdma_queue_id) | |
580 | { | |
010b82e7 | 581 | if (sdma_queue_id >= CIK_SDMA_QUEUES) |
bcea3081 BG |
582 | return; |
583 | set_bit(sdma_queue_id, (unsigned long *)&dqm->sdma_bitmap); | |
584 | } | |
585 | ||
bcea3081 BG |
586 | static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm, |
587 | struct queue *q, | |
588 | struct qcm_process_device *qpd) | |
589 | { | |
590 | struct mqd_manager *mqd; | |
591 | int retval; | |
592 | ||
45c9a5e4 | 593 | mqd = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_SDMA); |
bcea3081 BG |
594 | if (!mqd) |
595 | return -ENOMEM; | |
596 | ||
597 | retval = allocate_sdma_queue(dqm, &q->sdma_id); | |
598 | if (retval != 0) | |
599 | return retval; | |
600 | ||
601 | q->properties.sdma_queue_id = q->sdma_id % CIK_SDMA_QUEUES_PER_ENGINE; | |
602 | q->properties.sdma_engine_id = q->sdma_id / CIK_SDMA_ENGINE_NUM; | |
603 | ||
604 | pr_debug("kfd: sdma id is: %d\n", q->sdma_id); | |
605 | pr_debug(" sdma queue id: %d\n", q->properties.sdma_queue_id); | |
606 | pr_debug(" sdma engine id: %d\n", q->properties.sdma_engine_id); | |
607 | ||
3e3f6e1a | 608 | dqm->ops_asic_specific.init_sdma_vm(dqm, q, qpd); |
bcea3081 BG |
609 | retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj, |
610 | &q->gart_mqd_addr, &q->properties); | |
611 | if (retval != 0) { | |
612 | deallocate_sdma_queue(dqm, q->sdma_id); | |
613 | return retval; | |
614 | } | |
615 | ||
4fadf6b6 BG |
616 | retval = mqd->load_mqd(mqd, q->mqd, 0, |
617 | 0, NULL); | |
618 | if (retval != 0) { | |
619 | deallocate_sdma_queue(dqm, q->sdma_id); | |
620 | mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj); | |
621 | return retval; | |
622 | } | |
623 | ||
bcea3081 BG |
624 | return 0; |
625 | } | |
626 | ||
64c7f8cf BG |
627 | /* |
628 | * Device Queue Manager implementation for cp scheduler | |
629 | */ | |
630 | ||
631 | static int set_sched_resources(struct device_queue_manager *dqm) | |
632 | { | |
633 | struct scheduling_resources res; | |
634 | unsigned int queue_num, queue_mask; | |
635 | ||
636 | BUG_ON(!dqm); | |
637 | ||
638 | pr_debug("kfd: In func %s\n", __func__); | |
639 | ||
640 | queue_num = get_pipes_num_cpsch() * QUEUES_PER_PIPE; | |
641 | queue_mask = (1 << queue_num) - 1; | |
642 | res.vmid_mask = (1 << VMID_PER_DEVICE) - 1; | |
643 | res.vmid_mask <<= KFD_VMID_START_OFFSET; | |
644 | res.queue_mask = queue_mask << (get_first_pipe(dqm) * QUEUES_PER_PIPE); | |
645 | res.gws_mask = res.oac_mask = res.gds_heap_base = | |
646 | res.gds_heap_size = 0; | |
647 | ||
648 | pr_debug("kfd: scheduling resources:\n" | |
649 | " vmid mask: 0x%8X\n" | |
650 | " queue mask: 0x%8llX\n", | |
651 | res.vmid_mask, res.queue_mask); | |
652 | ||
653 | return pm_send_set_resources(&dqm->packets, &res); | |
654 | } | |
655 | ||
656 | static int initialize_cpsch(struct device_queue_manager *dqm) | |
657 | { | |
658 | int retval; | |
659 | ||
660 | BUG_ON(!dqm); | |
661 | ||
662 | pr_debug("kfd: In func %s num of pipes: %d\n", | |
663 | __func__, get_pipes_num_cpsch()); | |
664 | ||
665 | mutex_init(&dqm->lock); | |
666 | INIT_LIST_HEAD(&dqm->queues); | |
667 | dqm->queue_count = dqm->processes_count = 0; | |
bcea3081 | 668 | dqm->sdma_queue_count = 0; |
64c7f8cf | 669 | dqm->active_runlist = false; |
a22fc854 | 670 | retval = dqm->ops_asic_specific.initialize(dqm); |
64c7f8cf BG |
671 | if (retval != 0) |
672 | goto fail_init_pipelines; | |
673 | ||
674 | return 0; | |
675 | ||
676 | fail_init_pipelines: | |
677 | mutex_destroy(&dqm->lock); | |
678 | return retval; | |
679 | } | |
680 | ||
681 | static int start_cpsch(struct device_queue_manager *dqm) | |
682 | { | |
683 | struct device_process_node *node; | |
684 | int retval; | |
685 | ||
686 | BUG_ON(!dqm); | |
687 | ||
688 | retval = 0; | |
689 | ||
690 | retval = pm_init(&dqm->packets, dqm); | |
691 | if (retval != 0) | |
692 | goto fail_packet_manager_init; | |
693 | ||
694 | retval = set_sched_resources(dqm); | |
695 | if (retval != 0) | |
696 | goto fail_set_sched_resources; | |
697 | ||
698 | pr_debug("kfd: allocating fence memory\n"); | |
699 | ||
700 | /* allocate fence memory on the gart */ | |
a86aa3ca OG |
701 | retval = kfd_gtt_sa_allocate(dqm->dev, sizeof(*dqm->fence_addr), |
702 | &dqm->fence_mem); | |
64c7f8cf BG |
703 | |
704 | if (retval != 0) | |
705 | goto fail_allocate_vidmem; | |
706 | ||
707 | dqm->fence_addr = dqm->fence_mem->cpu_ptr; | |
708 | dqm->fence_gpu_addr = dqm->fence_mem->gpu_addr; | |
2249d558 AL |
709 | |
710 | init_interrupts(dqm); | |
711 | ||
64c7f8cf BG |
712 | list_for_each_entry(node, &dqm->queues, list) |
713 | if (node->qpd->pqm->process && dqm->dev) | |
714 | kfd_bind_process_to_device(dqm->dev, | |
715 | node->qpd->pqm->process); | |
716 | ||
717 | execute_queues_cpsch(dqm, true); | |
718 | ||
719 | return 0; | |
720 | fail_allocate_vidmem: | |
721 | fail_set_sched_resources: | |
722 | pm_uninit(&dqm->packets); | |
723 | fail_packet_manager_init: | |
724 | return retval; | |
725 | } | |
726 | ||
727 | static int stop_cpsch(struct device_queue_manager *dqm) | |
728 | { | |
729 | struct device_process_node *node; | |
730 | struct kfd_process_device *pdd; | |
731 | ||
732 | BUG_ON(!dqm); | |
733 | ||
992839ad | 734 | destroy_queues_cpsch(dqm, true, true); |
64c7f8cf BG |
735 | |
736 | list_for_each_entry(node, &dqm->queues, list) { | |
52a5fdce | 737 | pdd = qpd_to_pdd(node->qpd); |
64c7f8cf BG |
738 | pdd->bound = false; |
739 | } | |
a86aa3ca | 740 | kfd_gtt_sa_free(dqm->dev, dqm->fence_mem); |
64c7f8cf BG |
741 | pm_uninit(&dqm->packets); |
742 | ||
743 | return 0; | |
744 | } | |
745 | ||
746 | static int create_kernel_queue_cpsch(struct device_queue_manager *dqm, | |
747 | struct kernel_queue *kq, | |
748 | struct qcm_process_device *qpd) | |
749 | { | |
750 | BUG_ON(!dqm || !kq || !qpd); | |
751 | ||
752 | pr_debug("kfd: In func %s\n", __func__); | |
753 | ||
754 | mutex_lock(&dqm->lock); | |
b8cbab04 OG |
755 | if (dqm->total_queue_count >= max_num_of_queues_per_device) { |
756 | pr_warn("amdkfd: Can't create new kernel queue because %d queues were already created\n", | |
757 | dqm->total_queue_count); | |
758 | mutex_unlock(&dqm->lock); | |
759 | return -EPERM; | |
760 | } | |
761 | ||
762 | /* | |
763 | * Unconditionally increment this counter, regardless of the queue's | |
764 | * type or whether the queue is active. | |
765 | */ | |
766 | dqm->total_queue_count++; | |
767 | pr_debug("Total of %d queues are accountable so far\n", | |
768 | dqm->total_queue_count); | |
769 | ||
64c7f8cf BG |
770 | list_add(&kq->list, &qpd->priv_queue_list); |
771 | dqm->queue_count++; | |
772 | qpd->is_debug = true; | |
773 | execute_queues_cpsch(dqm, false); | |
774 | mutex_unlock(&dqm->lock); | |
775 | ||
776 | return 0; | |
777 | } | |
778 | ||
779 | static void destroy_kernel_queue_cpsch(struct device_queue_manager *dqm, | |
780 | struct kernel_queue *kq, | |
781 | struct qcm_process_device *qpd) | |
782 | { | |
783 | BUG_ON(!dqm || !kq); | |
784 | ||
785 | pr_debug("kfd: In %s\n", __func__); | |
786 | ||
787 | mutex_lock(&dqm->lock); | |
992839ad YS |
788 | /* here we actually preempt the DIQ */ |
789 | destroy_queues_cpsch(dqm, true, false); | |
64c7f8cf BG |
790 | list_del(&kq->list); |
791 | dqm->queue_count--; | |
792 | qpd->is_debug = false; | |
793 | execute_queues_cpsch(dqm, false); | |
b8cbab04 OG |
794 | /* |
795 | * Unconditionally decrement this counter, regardless of the queue's | |
796 | * type. | |
797 | */ | |
8b58f261 | 798 | dqm->total_queue_count--; |
b8cbab04 OG |
799 | pr_debug("Total of %d queues are accountable so far\n", |
800 | dqm->total_queue_count); | |
64c7f8cf BG |
801 | mutex_unlock(&dqm->lock); |
802 | } | |
803 | ||
bcea3081 BG |
804 | static void select_sdma_engine_id(struct queue *q) |
805 | { | |
806 | static int sdma_id; | |
807 | ||
808 | q->sdma_id = sdma_id; | |
809 | sdma_id = (sdma_id + 1) % 2; | |
810 | } | |
811 | ||
64c7f8cf BG |
812 | static int create_queue_cpsch(struct device_queue_manager *dqm, struct queue *q, |
813 | struct qcm_process_device *qpd, int *allocate_vmid) | |
814 | { | |
815 | int retval; | |
816 | struct mqd_manager *mqd; | |
817 | ||
818 | BUG_ON(!dqm || !q || !qpd); | |
819 | ||
820 | retval = 0; | |
821 | ||
822 | if (allocate_vmid) | |
823 | *allocate_vmid = 0; | |
824 | ||
825 | mutex_lock(&dqm->lock); | |
826 | ||
b8cbab04 OG |
827 | if (dqm->total_queue_count >= max_num_of_queues_per_device) { |
828 | pr_warn("amdkfd: Can't create new usermode queue because %d queues were already created\n", | |
829 | dqm->total_queue_count); | |
830 | retval = -EPERM; | |
831 | goto out; | |
832 | } | |
833 | ||
bcea3081 BG |
834 | if (q->properties.type == KFD_QUEUE_TYPE_SDMA) |
835 | select_sdma_engine_id(q); | |
836 | ||
45c9a5e4 | 837 | mqd = dqm->ops.get_mqd_manager(dqm, |
bcea3081 BG |
838 | get_mqd_type_from_queue_type(q->properties.type)); |
839 | ||
64c7f8cf BG |
840 | if (mqd == NULL) { |
841 | mutex_unlock(&dqm->lock); | |
842 | return -ENOMEM; | |
843 | } | |
844 | ||
bdcddf95 | 845 | dqm->ops_asic_specific.init_sdma_vm(dqm, q, qpd); |
64c7f8cf BG |
846 | retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj, |
847 | &q->gart_mqd_addr, &q->properties); | |
848 | if (retval != 0) | |
849 | goto out; | |
850 | ||
851 | list_add(&q->list, &qpd->queues_list); | |
852 | if (q->properties.is_active) { | |
853 | dqm->queue_count++; | |
854 | retval = execute_queues_cpsch(dqm, false); | |
855 | } | |
856 | ||
bcea3081 BG |
857 | if (q->properties.type == KFD_QUEUE_TYPE_SDMA) |
858 | dqm->sdma_queue_count++; | |
b8cbab04 OG |
859 | /* |
860 | * Unconditionally increment this counter, regardless of the queue's | |
861 | * type or whether the queue is active. | |
862 | */ | |
863 | dqm->total_queue_count++; | |
864 | ||
865 | pr_debug("Total of %d queues are accountable so far\n", | |
866 | dqm->total_queue_count); | |
867 | ||
64c7f8cf BG |
868 | out: |
869 | mutex_unlock(&dqm->lock); | |
870 | return retval; | |
871 | } | |
872 | ||
788bf83d | 873 | int amdkfd_fence_wait_timeout(unsigned int *fence_addr, |
d80d19bd OG |
874 | unsigned int fence_value, |
875 | unsigned long timeout) | |
64c7f8cf BG |
876 | { |
877 | BUG_ON(!fence_addr); | |
878 | timeout += jiffies; | |
879 | ||
880 | while (*fence_addr != fence_value) { | |
881 | if (time_after(jiffies, timeout)) { | |
882 | pr_err("kfd: qcm fence wait loop timeout expired\n"); | |
883 | return -ETIME; | |
884 | } | |
99331a51 | 885 | schedule(); |
64c7f8cf BG |
886 | } |
887 | ||
888 | return 0; | |
889 | } | |
890 | ||
bcea3081 BG |
891 | static int destroy_sdma_queues(struct device_queue_manager *dqm, |
892 | unsigned int sdma_engine) | |
893 | { | |
894 | return pm_send_unmap_queue(&dqm->packets, KFD_QUEUE_TYPE_SDMA, | |
992839ad | 895 | KFD_PREEMPT_TYPE_FILTER_DYNAMIC_QUEUES, 0, false, |
bcea3081 BG |
896 | sdma_engine); |
897 | } | |
898 | ||
992839ad YS |
899 | static int destroy_queues_cpsch(struct device_queue_manager *dqm, |
900 | bool preempt_static_queues, bool lock) | |
64c7f8cf BG |
901 | { |
902 | int retval; | |
992839ad | 903 | enum kfd_preempt_type_filter preempt_type; |
a82918f1 | 904 | struct kfd_process_device *pdd; |
64c7f8cf BG |
905 | |
906 | BUG_ON(!dqm); | |
907 | ||
908 | retval = 0; | |
909 | ||
910 | if (lock) | |
911 | mutex_lock(&dqm->lock); | |
991ca8ee | 912 | if (!dqm->active_runlist) |
64c7f8cf | 913 | goto out; |
bcea3081 BG |
914 | |
915 | pr_debug("kfd: Before destroying queues, sdma queue count is : %u\n", | |
916 | dqm->sdma_queue_count); | |
917 | ||
918 | if (dqm->sdma_queue_count > 0) { | |
919 | destroy_sdma_queues(dqm, 0); | |
920 | destroy_sdma_queues(dqm, 1); | |
921 | } | |
922 | ||
992839ad YS |
923 | preempt_type = preempt_static_queues ? |
924 | KFD_PREEMPT_TYPE_FILTER_ALL_QUEUES : | |
925 | KFD_PREEMPT_TYPE_FILTER_DYNAMIC_QUEUES; | |
926 | ||
64c7f8cf | 927 | retval = pm_send_unmap_queue(&dqm->packets, KFD_QUEUE_TYPE_COMPUTE, |
992839ad | 928 | preempt_type, 0, false, 0); |
64c7f8cf BG |
929 | if (retval != 0) |
930 | goto out; | |
931 | ||
932 | *dqm->fence_addr = KFD_FENCE_INIT; | |
933 | pm_send_query_status(&dqm->packets, dqm->fence_gpu_addr, | |
934 | KFD_FENCE_COMPLETED); | |
935 | /* should be timed out */ | |
c3447e81 | 936 | retval = amdkfd_fence_wait_timeout(dqm->fence_addr, KFD_FENCE_COMPLETED, |
64c7f8cf | 937 | QUEUE_PREEMPT_DEFAULT_TIMEOUT_MS); |
c3447e81 | 938 | if (retval != 0) { |
a82918f1 BG |
939 | pdd = kfd_get_process_device_data(dqm->dev, |
940 | kfd_get_process(current)); | |
941 | pdd->reset_wavefronts = true; | |
c3447e81 BG |
942 | goto out; |
943 | } | |
64c7f8cf BG |
944 | pm_release_ib(&dqm->packets); |
945 | dqm->active_runlist = false; | |
946 | ||
947 | out: | |
948 | if (lock) | |
949 | mutex_unlock(&dqm->lock); | |
950 | return retval; | |
951 | } | |
952 | ||
953 | static int execute_queues_cpsch(struct device_queue_manager *dqm, bool lock) | |
954 | { | |
955 | int retval; | |
956 | ||
957 | BUG_ON(!dqm); | |
958 | ||
959 | if (lock) | |
960 | mutex_lock(&dqm->lock); | |
961 | ||
992839ad | 962 | retval = destroy_queues_cpsch(dqm, false, false); |
64c7f8cf BG |
963 | if (retval != 0) { |
964 | pr_err("kfd: the cp might be in an unrecoverable state due to an unsuccessful queues preemption"); | |
965 | goto out; | |
966 | } | |
967 | ||
968 | if (dqm->queue_count <= 0 || dqm->processes_count <= 0) { | |
969 | retval = 0; | |
970 | goto out; | |
971 | } | |
972 | ||
973 | if (dqm->active_runlist) { | |
974 | retval = 0; | |
975 | goto out; | |
976 | } | |
977 | ||
978 | retval = pm_send_runlist(&dqm->packets, &dqm->queues); | |
979 | if (retval != 0) { | |
980 | pr_err("kfd: failed to execute runlist"); | |
981 | goto out; | |
982 | } | |
983 | dqm->active_runlist = true; | |
984 | ||
985 | out: | |
986 | if (lock) | |
987 | mutex_unlock(&dqm->lock); | |
988 | return retval; | |
989 | } | |
990 | ||
991 | static int destroy_queue_cpsch(struct device_queue_manager *dqm, | |
992 | struct qcm_process_device *qpd, | |
993 | struct queue *q) | |
994 | { | |
995 | int retval; | |
996 | struct mqd_manager *mqd; | |
992839ad | 997 | bool preempt_all_queues; |
64c7f8cf BG |
998 | |
999 | BUG_ON(!dqm || !qpd || !q); | |
1000 | ||
992839ad YS |
1001 | preempt_all_queues = false; |
1002 | ||
64c7f8cf BG |
1003 | retval = 0; |
1004 | ||
1005 | /* remove queue from list to prevent rescheduling after preemption */ | |
1006 | mutex_lock(&dqm->lock); | |
992839ad YS |
1007 | |
1008 | if (qpd->is_debug) { | |
1009 | /* | |
1010 | * error, currently we do not allow to destroy a queue | |
1011 | * of a currently debugged process | |
1012 | */ | |
1013 | retval = -EBUSY; | |
1014 | goto failed_try_destroy_debugged_queue; | |
1015 | ||
1016 | } | |
1017 | ||
45c9a5e4 | 1018 | mqd = dqm->ops.get_mqd_manager(dqm, |
bcea3081 | 1019 | get_mqd_type_from_queue_type(q->properties.type)); |
64c7f8cf BG |
1020 | if (!mqd) { |
1021 | retval = -ENOMEM; | |
1022 | goto failed; | |
1023 | } | |
1024 | ||
bcea3081 BG |
1025 | if (q->properties.type == KFD_QUEUE_TYPE_SDMA) |
1026 | dqm->sdma_queue_count--; | |
1027 | ||
64c7f8cf | 1028 | list_del(&q->list); |
b6819cec JC |
1029 | if (q->properties.is_active) |
1030 | dqm->queue_count--; | |
64c7f8cf BG |
1031 | |
1032 | execute_queues_cpsch(dqm, false); | |
1033 | ||
1034 | mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj); | |
b8cbab04 OG |
1035 | |
1036 | /* | |
1037 | * Unconditionally decrement this counter, regardless of the queue's | |
1038 | * type | |
1039 | */ | |
1040 | dqm->total_queue_count--; | |
1041 | pr_debug("Total of %d queues are accountable so far\n", | |
1042 | dqm->total_queue_count); | |
64c7f8cf BG |
1043 | |
1044 | mutex_unlock(&dqm->lock); | |
1045 | ||
1046 | return 0; | |
1047 | ||
1048 | failed: | |
992839ad YS |
1049 | failed_try_destroy_debugged_queue: |
1050 | ||
64c7f8cf BG |
1051 | mutex_unlock(&dqm->lock); |
1052 | return retval; | |
1053 | } | |
1054 | ||
1055 | /* | |
1056 | * Low bits must be 0000/FFFF as required by HW, high bits must be 0 to | |
1057 | * stay in user mode. | |
1058 | */ | |
1059 | #define APE1_FIXED_BITS_MASK 0xFFFF80000000FFFFULL | |
1060 | /* APE1 limit is inclusive and 64K aligned. */ | |
1061 | #define APE1_LIMIT_ALIGNMENT 0xFFFF | |
1062 | ||
1063 | static bool set_cache_memory_policy(struct device_queue_manager *dqm, | |
1064 | struct qcm_process_device *qpd, | |
1065 | enum cache_policy default_policy, | |
1066 | enum cache_policy alternate_policy, | |
1067 | void __user *alternate_aperture_base, | |
1068 | uint64_t alternate_aperture_size) | |
1069 | { | |
a22fc854 | 1070 | bool retval; |
64c7f8cf BG |
1071 | |
1072 | pr_debug("kfd: In func %s\n", __func__); | |
1073 | ||
1074 | mutex_lock(&dqm->lock); | |
1075 | ||
1076 | if (alternate_aperture_size == 0) { | |
1077 | /* base > limit disables APE1 */ | |
1078 | qpd->sh_mem_ape1_base = 1; | |
1079 | qpd->sh_mem_ape1_limit = 0; | |
1080 | } else { | |
1081 | /* | |
1082 | * In FSA64, APE1_Base[63:0] = { 16{SH_MEM_APE1_BASE[31]}, | |
1083 | * SH_MEM_APE1_BASE[31:0], 0x0000 } | |
1084 | * APE1_Limit[63:0] = { 16{SH_MEM_APE1_LIMIT[31]}, | |
1085 | * SH_MEM_APE1_LIMIT[31:0], 0xFFFF } | |
1086 | * Verify that the base and size parameters can be | |
1087 | * represented in this format and convert them. | |
1088 | * Additionally restrict APE1 to user-mode addresses. | |
1089 | */ | |
1090 | ||
1091 | uint64_t base = (uintptr_t)alternate_aperture_base; | |
1092 | uint64_t limit = base + alternate_aperture_size - 1; | |
1093 | ||
1094 | if (limit <= base) | |
1095 | goto out; | |
1096 | ||
1097 | if ((base & APE1_FIXED_BITS_MASK) != 0) | |
1098 | goto out; | |
1099 | ||
1100 | if ((limit & APE1_FIXED_BITS_MASK) != APE1_LIMIT_ALIGNMENT) | |
1101 | goto out; | |
1102 | ||
1103 | qpd->sh_mem_ape1_base = base >> 16; | |
1104 | qpd->sh_mem_ape1_limit = limit >> 16; | |
1105 | } | |
1106 | ||
a22fc854 BG |
1107 | retval = dqm->ops_asic_specific.set_cache_memory_policy( |
1108 | dqm, | |
1109 | qpd, | |
1110 | default_policy, | |
1111 | alternate_policy, | |
1112 | alternate_aperture_base, | |
1113 | alternate_aperture_size); | |
64c7f8cf BG |
1114 | |
1115 | if ((sched_policy == KFD_SCHED_POLICY_NO_HWS) && (qpd->vmid != 0)) | |
1116 | program_sh_mem_settings(dqm, qpd); | |
1117 | ||
1118 | pr_debug("kfd: sh_mem_config: 0x%x, ape1_base: 0x%x, ape1_limit: 0x%x\n", | |
1119 | qpd->sh_mem_config, qpd->sh_mem_ape1_base, | |
1120 | qpd->sh_mem_ape1_limit); | |
1121 | ||
1122 | mutex_unlock(&dqm->lock); | |
a22fc854 | 1123 | return retval; |
64c7f8cf BG |
1124 | |
1125 | out: | |
1126 | mutex_unlock(&dqm->lock); | |
1127 | return false; | |
1128 | } | |
1129 | ||
1130 | struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev) | |
1131 | { | |
1132 | struct device_queue_manager *dqm; | |
1133 | ||
1134 | BUG_ON(!dev); | |
1135 | ||
a22fc854 BG |
1136 | pr_debug("kfd: loading device queue manager\n"); |
1137 | ||
64c7f8cf BG |
1138 | dqm = kzalloc(sizeof(struct device_queue_manager), GFP_KERNEL); |
1139 | if (!dqm) | |
1140 | return NULL; | |
1141 | ||
1142 | dqm->dev = dev; | |
1143 | switch (sched_policy) { | |
1144 | case KFD_SCHED_POLICY_HWS: | |
1145 | case KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION: | |
1146 | /* initialize dqm for cp scheduling */ | |
45c9a5e4 OG |
1147 | dqm->ops.create_queue = create_queue_cpsch; |
1148 | dqm->ops.initialize = initialize_cpsch; | |
1149 | dqm->ops.start = start_cpsch; | |
1150 | dqm->ops.stop = stop_cpsch; | |
1151 | dqm->ops.destroy_queue = destroy_queue_cpsch; | |
1152 | dqm->ops.update_queue = update_queue; | |
1153 | dqm->ops.get_mqd_manager = get_mqd_manager_nocpsch; | |
1154 | dqm->ops.register_process = register_process_nocpsch; | |
1155 | dqm->ops.unregister_process = unregister_process_nocpsch; | |
1156 | dqm->ops.uninitialize = uninitialize_nocpsch; | |
1157 | dqm->ops.create_kernel_queue = create_kernel_queue_cpsch; | |
1158 | dqm->ops.destroy_kernel_queue = destroy_kernel_queue_cpsch; | |
1159 | dqm->ops.set_cache_memory_policy = set_cache_memory_policy; | |
64c7f8cf BG |
1160 | break; |
1161 | case KFD_SCHED_POLICY_NO_HWS: | |
1162 | /* initialize dqm for no cp scheduling */ | |
45c9a5e4 OG |
1163 | dqm->ops.start = start_nocpsch; |
1164 | dqm->ops.stop = stop_nocpsch; | |
1165 | dqm->ops.create_queue = create_queue_nocpsch; | |
1166 | dqm->ops.destroy_queue = destroy_queue_nocpsch; | |
1167 | dqm->ops.update_queue = update_queue; | |
1168 | dqm->ops.get_mqd_manager = get_mqd_manager_nocpsch; | |
1169 | dqm->ops.register_process = register_process_nocpsch; | |
1170 | dqm->ops.unregister_process = unregister_process_nocpsch; | |
1171 | dqm->ops.initialize = initialize_nocpsch; | |
1172 | dqm->ops.uninitialize = uninitialize_nocpsch; | |
1173 | dqm->ops.set_cache_memory_policy = set_cache_memory_policy; | |
64c7f8cf BG |
1174 | break; |
1175 | default: | |
1176 | BUG(); | |
1177 | break; | |
1178 | } | |
1179 | ||
a22fc854 BG |
1180 | switch (dev->device_info->asic_family) { |
1181 | case CHIP_CARRIZO: | |
1182 | device_queue_manager_init_vi(&dqm->ops_asic_specific); | |
300dec95 OG |
1183 | break; |
1184 | ||
a22fc854 BG |
1185 | case CHIP_KAVERI: |
1186 | device_queue_manager_init_cik(&dqm->ops_asic_specific); | |
300dec95 | 1187 | break; |
a22fc854 BG |
1188 | } |
1189 | ||
45c9a5e4 | 1190 | if (dqm->ops.initialize(dqm) != 0) { |
64c7f8cf BG |
1191 | kfree(dqm); |
1192 | return NULL; | |
1193 | } | |
1194 | ||
1195 | return dqm; | |
1196 | } | |
1197 | ||
1198 | void device_queue_manager_uninit(struct device_queue_manager *dqm) | |
1199 | { | |
1200 | BUG_ON(!dqm); | |
1201 | ||
45c9a5e4 | 1202 | dqm->ops.uninitialize(dqm); |
64c7f8cf BG |
1203 | kfree(dqm); |
1204 | } |