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drm/amdgpu: Remove hard-coded assumptions about compute pipes
[linux-block.git] / drivers / gpu / drm / amd / amdkfd / kfd_device_queue_manager.c
CommitLineData
64c7f8cf
BG		 1/*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#include <linux/slab.h>
25#include <linux/list.h>
26#include <linux/types.h>
27#include <linux/printk.h>
28#include <linux/bitops.h>
99331a51 29#include <linux/sched.h>
64c7f8cf
BG		 30#include "kfd_priv.h"
31#include "kfd_device_queue_manager.h"
32#include "kfd_mqd_manager.h"
33#include "cik_regs.h"
34#include "kfd_kernel_queue.h"
64c7f8cf
BG		 35
36/* Size of the per-pipe EOP queue */
37#define CIK_HPD_EOP_BYTES_LOG2 11
38#define CIK_HPD_EOP_BYTES (1U << CIK_HPD_EOP_BYTES_LOG2)
39
64c7f8cf
BG		 40static int set_pasid_vmid_mapping(struct device_queue_manager *dqm,
41 unsigned int pasid, unsigned int vmid);
42
43static int create_compute_queue_nocpsch(struct device_queue_manager *dqm,
44 struct queue *q,
45 struct qcm_process_device *qpd);
bcea3081 46
64c7f8cf 47static int execute_queues_cpsch(struct device_queue_manager *dqm, bool lock);
992839ad
YS		 48static int destroy_queues_cpsch(struct device_queue_manager *dqm,
49 bool preempt_static_queues, bool lock);
64c7f8cf 50
bcea3081
BG		 51static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm,
52 struct queue *q,
53 struct qcm_process_device *qpd);
54
55static void deallocate_sdma_queue(struct device_queue_manager *dqm,
56 unsigned int sdma_queue_id);
64c7f8cf 57
bcea3081
BG		 58static inline
59enum KFD_MQD_TYPE get_mqd_type_from_queue_type(enum kfd_queue_type type)
64c7f8cf 60{
bcea3081 61 if (type == KFD_QUEUE_TYPE_SDMA)
85d258f9
BG		 62 return KFD_MQD_TYPE_SDMA;
63 return KFD_MQD_TYPE_CP;
64c7f8cf
BG		 64}
65
d0b63bb3
AR		 66static bool is_pipe_enabled(struct device_queue_manager *dqm, int mec, int pipe)
67{
68 int i;
69 int pipe_offset = mec * dqm->dev->shared_resources.num_pipe_per_mec
70 + pipe * dqm->dev->shared_resources.num_queue_per_pipe;
71
72 /* queue is available for KFD usage if bit is 1 */
73 for (i = 0; i < dqm->dev->shared_resources.num_queue_per_pipe; ++i)
74 if (test_bit(pipe_offset + i,
75 dqm->dev->shared_resources.queue_bitmap))
76 return true;
77 return false;
78}
79
d0b63bb3 80unsigned int get_queues_num(struct device_queue_manager *dqm)
64ea8f4a
OG		 81{
82 BUG_ON(!dqm || !dqm->dev);
d0b63bb3
AR		 83 return bitmap_weight(dqm->dev->shared_resources.queue_bitmap,
84 KGD_MAX_QUEUES);
64ea8f4a
OG		 85}
86
d0b63bb3 87unsigned int get_queues_per_pipe(struct device_queue_manager *dqm)
64c7f8cf 88{
d0b63bb3
AR		 89 BUG_ON(!dqm || !dqm->dev);
90 return dqm->dev->shared_resources.num_queue_per_pipe;
91}
92
93unsigned int get_pipes_per_mec(struct device_queue_manager *dqm)
94{
95 BUG_ON(!dqm || !dqm->dev);
96 return dqm->dev->shared_resources.num_pipe_per_mec;
64c7f8cf
BG		 97}
98
a22fc854 99void program_sh_mem_settings(struct device_queue_manager *dqm,
64c7f8cf
BG		 100 struct qcm_process_device *qpd)
101{
cea405b1
XZ		 102 return dqm->dev->kfd2kgd->program_sh_mem_settings(
103 dqm->dev->kgd, qpd->vmid,
64c7f8cf
BG		 104 qpd->sh_mem_config,
105 qpd->sh_mem_ape1_base,
106 qpd->sh_mem_ape1_limit,
107 qpd->sh_mem_bases);
108}
109
110static int allocate_vmid(struct device_queue_manager *dqm,
111 struct qcm_process_device *qpd,
112 struct queue *q)
113{
114 int bit, allocated_vmid;
115
116 if (dqm->vmid_bitmap == 0)
117 return -ENOMEM;
118
119 bit = find_first_bit((unsigned long *)&dqm->vmid_bitmap, CIK_VMID_NUM);
120 clear_bit(bit, (unsigned long *)&dqm->vmid_bitmap);
121
122 /* Kaveri kfd vmid's starts from vmid 8 */
123 allocated_vmid = bit + KFD_VMID_START_OFFSET;
124 pr_debug("kfd: vmid allocation %d\n", allocated_vmid);
125 qpd->vmid = allocated_vmid;
126 q->properties.vmid = allocated_vmid;
127
128 set_pasid_vmid_mapping(dqm, q->process->pasid, q->properties.vmid);
129 program_sh_mem_settings(dqm, qpd);
130
131 return 0;
132}
133
134static void deallocate_vmid(struct device_queue_manager *dqm,
135 struct qcm_process_device *qpd,
136 struct queue *q)
137{
138 int bit = qpd->vmid - KFD_VMID_START_OFFSET;
139
2030664b
BG		 140 /* Release the vmid mapping */
141 set_pasid_vmid_mapping(dqm, 0, qpd->vmid);
142
64c7f8cf
BG		 143 set_bit(bit, (unsigned long *)&dqm->vmid_bitmap);
144 qpd->vmid = 0;
145 q->properties.vmid = 0;
146}
147
148static int create_queue_nocpsch(struct device_queue_manager *dqm,
149 struct queue *q,
150 struct qcm_process_device *qpd,
151 int *allocated_vmid)
152{
153 int retval;
154
155 BUG_ON(!dqm || !q || !qpd || !allocated_vmid);
156
157 pr_debug("kfd: In func %s\n", __func__);
158 print_queue(q);
159
160 mutex_lock(&dqm->lock);
161
b8cbab04
OG		 162 if (dqm->total_queue_count >= max_num_of_queues_per_device) {
163 pr_warn("amdkfd: Can't create new usermode queue because %d queues were already created\n",
164 dqm->total_queue_count);
165 mutex_unlock(&dqm->lock);
166 return -EPERM;
167 }
168
64c7f8cf
BG		 169 if (list_empty(&qpd->queues_list)) {
170 retval = allocate_vmid(dqm, qpd, q);
171 if (retval != 0) {
172 mutex_unlock(&dqm->lock);
173 return retval;
174 }
175 }
176 *allocated_vmid = qpd->vmid;
177 q->properties.vmid = qpd->vmid;
178
bcea3081
BG		 179 if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE)
180 retval = create_compute_queue_nocpsch(dqm, q, qpd);
181 if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
182 retval = create_sdma_queue_nocpsch(dqm, q, qpd);
64c7f8cf
BG		 183
184 if (retval != 0) {
185 if (list_empty(&qpd->queues_list)) {
186 deallocate_vmid(dqm, qpd, q);
187 *allocated_vmid = 0;
188 }
189 mutex_unlock(&dqm->lock);
190 return retval;
191 }
192
193 list_add(&q->list, &qpd->queues_list);
b6819cec
JC		 194 if (q->properties.is_active)
195 dqm->queue_count++;
64c7f8cf 196
bcea3081
BG		 197 if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
198 dqm->sdma_queue_count++;
64c7f8cf 199
b8cbab04
OG		 200 /*
201 * Unconditionally increment this counter, regardless of the queue's
202 * type or whether the queue is active.
203 */
204 dqm->total_queue_count++;
205 pr_debug("Total of %d queues are accountable so far\n",
206 dqm->total_queue_count);
207
64c7f8cf
BG		 208 mutex_unlock(&dqm->lock);
209 return 0;
210}
211
212static int allocate_hqd(struct device_queue_manager *dqm, struct queue *q)
213{
214 bool set;
f0ec5b99 215 int pipe, bit, i;
64c7f8cf
BG		 216
217 set = false;
218
d0b63bb3
AR		 219 for (pipe = dqm->next_pipe_to_allocate, i = 0; i < get_pipes_per_mec(dqm);
220 pipe = ((pipe + 1) % get_pipes_per_mec(dqm)), ++i) {
221
222 if (!is_pipe_enabled(dqm, 0, pipe))
223 continue;
224
64c7f8cf
BG		 225 if (dqm->allocated_queues[pipe] != 0) {
226 bit = find_first_bit(
227 (unsigned long *)&dqm->allocated_queues[pipe],
d0b63bb3 228 get_queues_per_pipe(dqm));
64c7f8cf
BG		 229
230 clear_bit(bit,
231 (unsigned long *)&dqm->allocated_queues[pipe]);
232 q->pipe = pipe;
233 q->queue = bit;
234 set = true;
235 break;
236 }
237 }
238
991ca8ee 239 if (!set)
64c7f8cf
BG		 240 return -EBUSY;
241
242 pr_debug("kfd: DQM %s hqd slot - pipe (%d) queue(%d)\n",
243 __func__, q->pipe, q->queue);
244 /* horizontal hqd allocation */
d0b63bb3 245 dqm->next_pipe_to_allocate = (pipe + 1) % get_pipes_per_mec(dqm);
64c7f8cf
BG		 246
247 return 0;
248}
249
250static inline void deallocate_hqd(struct device_queue_manager *dqm,
251 struct queue *q)
252{
253 set_bit(q->queue, (unsigned long *)&dqm->allocated_queues[q->pipe]);
254}
255
256static int create_compute_queue_nocpsch(struct device_queue_manager *dqm,
257 struct queue *q,
258 struct qcm_process_device *qpd)
259{
260 int retval;
261 struct mqd_manager *mqd;
262
263 BUG_ON(!dqm || !q || !qpd);
264
45c9a5e4 265 mqd = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_COMPUTE);
64c7f8cf
BG		 266 if (mqd == NULL)
267 return -ENOMEM;
268
269 retval = allocate_hqd(dqm, q);
270 if (retval != 0)
271 return retval;
272
273 retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj,
274 &q->gart_mqd_addr, &q->properties);
275 if (retval != 0) {
276 deallocate_hqd(dqm, q);
277 return retval;
278 }
279
030e416b
BG		 280 pr_debug("kfd: loading mqd to hqd on pipe (%d) queue (%d)\n",
281 q->pipe,
282 q->queue);
283
284 retval = mqd->load_mqd(mqd, q->mqd, q->pipe,
8dfe58b2 285 q->queue, (uint32_t __user *) q->properties.write_ptr);
030e416b
BG		 286 if (retval != 0) {
287 deallocate_hqd(dqm, q);
288 mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
289 return retval;
290 }
291
64c7f8cf
BG		 292 return 0;
293}
294
295static int destroy_queue_nocpsch(struct device_queue_manager *dqm,
296 struct qcm_process_device *qpd,
297 struct queue *q)
298{
299 int retval;
300 struct mqd_manager *mqd;
301
302 BUG_ON(!dqm || !q || !q->mqd || !qpd);
303
304 retval = 0;
305
306 pr_debug("kfd: In Func %s\n", __func__);
307
308 mutex_lock(&dqm->lock);
64c7f8cf 309
c2e1b3a4 310 if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE) {
45c9a5e4 311 mqd = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_COMPUTE);
c2e1b3a4
BG		 312 if (mqd == NULL) {
313 retval = -ENOMEM;
314 goto out;
315 }
316 deallocate_hqd(dqm, q);
317 } else if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
45c9a5e4 318 mqd = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_SDMA);
c2e1b3a4
BG		 319 if (mqd == NULL) {
320 retval = -ENOMEM;
321 goto out;
322 }
323 dqm->sdma_queue_count--;
324 deallocate_sdma_queue(dqm, q->sdma_id);
7113cd65
OG		 325 } else {
326 pr_debug("q->properties.type is invalid (%d)\n",
327 q->properties.type);
328 retval = -EINVAL;
64c7f8cf
BG		 329 goto out;
330 }
331
332 retval = mqd->destroy_mqd(mqd, q->mqd,
c2e1b3a4 333 KFD_PREEMPT_TYPE_WAVEFRONT_RESET,
64c7f8cf
BG		 334 QUEUE_PREEMPT_DEFAULT_TIMEOUT_MS,
335 q->pipe, q->queue);
336
337 if (retval != 0)
338 goto out;
339
64c7f8cf
BG		 340 mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
341
342 list_del(&q->list);
343 if (list_empty(&qpd->queues_list))
344 deallocate_vmid(dqm, qpd, q);
b6819cec
JC		 345 if (q->properties.is_active)
346 dqm->queue_count--;
b8cbab04
OG		 347
348 /*
349 * Unconditionally decrement this counter, regardless of the queue's
350 * type
351 */
352 dqm->total_queue_count--;
353 pr_debug("Total of %d queues are accountable so far\n",
354 dqm->total_queue_count);
355
64c7f8cf
BG		 356out:
357 mutex_unlock(&dqm->lock);
358 return retval;
359}
360
361static int update_queue(struct device_queue_manager *dqm, struct queue *q)
362{
363 int retval;
364 struct mqd_manager *mqd;
b6ffbab8 365 bool prev_active = false;
64c7f8cf
BG		 366
367 BUG_ON(!dqm || !q || !q->mqd);
368
369 mutex_lock(&dqm->lock);
0b3674ae
OG		 370 mqd = dqm->ops.get_mqd_manager(dqm,
371 get_mqd_type_from_queue_type(q->properties.type));
64c7f8cf
BG		 372 if (mqd == NULL) {
373 mutex_unlock(&dqm->lock);
374 return -ENOMEM;
375 }
376
991ca8ee 377 if (q->properties.is_active)
b6ffbab8
OG		 378 prev_active = true;
379
380 /*
381 *
382 * check active state vs. the previous state
383 * and modify counter accordingly
384 */
385 retval = mqd->update_mqd(mqd, q->mqd, &q->properties);
991ca8ee 386 if ((q->properties.is_active) && (!prev_active))
64c7f8cf 387 dqm->queue_count++;
991ca8ee 388 else if ((!q->properties.is_active) && (prev_active))
64c7f8cf
BG		 389 dqm->queue_count--;
390
391 if (sched_policy != KFD_SCHED_POLICY_NO_HWS)
392 retval = execute_queues_cpsch(dqm, false);
393
394 mutex_unlock(&dqm->lock);
395 return retval;
396}
397
398static struct mqd_manager *get_mqd_manager_nocpsch(
399 struct device_queue_manager *dqm, enum KFD_MQD_TYPE type)
400{
401 struct mqd_manager *mqd;
402
403 BUG_ON(!dqm || type >= KFD_MQD_TYPE_MAX);
404
405 pr_debug("kfd: In func %s mqd type %d\n", __func__, type);
406
407 mqd = dqm->mqds[type];
408 if (!mqd) {
409 mqd = mqd_manager_init(type, dqm->dev);
410 if (mqd == NULL)
411 pr_err("kfd: mqd manager is NULL");
412 dqm->mqds[type] = mqd;
413 }
414
415 return mqd;
416}
417
418static int register_process_nocpsch(struct device_queue_manager *dqm,
419 struct qcm_process_device *qpd)
420{
421 struct device_process_node *n;
a22fc854 422 int retval;
64c7f8cf
BG		 423
424 BUG_ON(!dqm || !qpd);
425
426 pr_debug("kfd: In func %s\n", __func__);
427
428 n = kzalloc(sizeof(struct device_process_node), GFP_KERNEL);
429 if (!n)
430 return -ENOMEM;
431
432 n->qpd = qpd;
433
434 mutex_lock(&dqm->lock);
435 list_add(&n->list, &dqm->queues);
436
a22fc854
BG		 437 retval = dqm->ops_asic_specific.register_process(dqm, qpd);
438
64c7f8cf
BG		 439 dqm->processes_count++;
440
441 mutex_unlock(&dqm->lock);
442
a22fc854 443 return retval;
64c7f8cf
BG		 444}
445
446static int unregister_process_nocpsch(struct device_queue_manager *dqm,
447 struct qcm_process_device *qpd)
448{
449 int retval;
450 struct device_process_node *cur, *next;
451
452 BUG_ON(!dqm || !qpd);
453
1e5ec956 454 pr_debug("In func %s\n", __func__);
64c7f8cf 455
1e5ec956
OG		 456 pr_debug("qpd->queues_list is %s\n",
457 list_empty(&qpd->queues_list) ? "empty" : "not empty");
64c7f8cf
BG		 458
459 retval = 0;
460 mutex_lock(&dqm->lock);
461
462 list_for_each_entry_safe(cur, next, &dqm->queues, list) {
463 if (qpd == cur->qpd) {
464 list_del(&cur->list);
f5d896bb 465 kfree(cur);
64c7f8cf
BG		 466 dqm->processes_count--;
467 goto out;
468 }
469 }
470 /* qpd not found in dqm list */
471 retval = 1;
472out:
473 mutex_unlock(&dqm->lock);
474 return retval;
475}
476
477static int
478set_pasid_vmid_mapping(struct device_queue_manager *dqm, unsigned int pasid,
479 unsigned int vmid)
480{
481 uint32_t pasid_mapping;
482
cea405b1
XZ		 483 pasid_mapping = (pasid == 0) ? 0 :
484 (uint32_t)pasid |
485 ATC_VMID_PASID_MAPPING_VALID;
486
487 return dqm->dev->kfd2kgd->set_pasid_vmid_mapping(
488 dqm->dev->kgd, pasid_mapping,
64c7f8cf
BG		 489 vmid);
490}
491
2249d558
AL		 492static void init_interrupts(struct device_queue_manager *dqm)
493{
494 unsigned int i;
495
496 BUG_ON(dqm == NULL);
497
d0b63bb3
AR		 498 for (i = 0 ; i < get_pipes_per_mec(dqm) ; i++)
499 if (is_pipe_enabled(dqm, 0, i))
500 dqm->dev->kfd2kgd->init_interrupts(dqm->dev->kgd, i);
2249d558
AL		 501}
502
64c7f8cf
BG		 503static int init_scheduler(struct device_queue_manager *dqm)
504{
d0b63bb3 505 int retval = 0;
64c7f8cf
BG		 506
507 BUG_ON(!dqm);
508
509 pr_debug("kfd: In %s\n", __func__);
510
64c7f8cf
BG		 511 return retval;
512}
513
514static int initialize_nocpsch(struct device_queue_manager *dqm)
515{
86194cf8 516 int pipe, queue;
64c7f8cf
BG		 517
518 BUG_ON(!dqm);
519
520 pr_debug("kfd: In func %s num of pipes: %d\n",
d0b63bb3 521 __func__, get_pipes_per_mec(dqm));
64c7f8cf
BG		 522
523 mutex_init(&dqm->lock);
524 INIT_LIST_HEAD(&dqm->queues);
525 dqm->queue_count = dqm->next_pipe_to_allocate = 0;
bcea3081 526 dqm->sdma_queue_count = 0;
d0b63bb3 527 dqm->allocated_queues = kcalloc(get_pipes_per_mec(dqm),
64c7f8cf
BG		 528 sizeof(unsigned int), GFP_KERNEL);
529 if (!dqm->allocated_queues) {
530 mutex_destroy(&dqm->lock);
531 return -ENOMEM;
532 }
533
86194cf8
FK		 534 for (pipe = 0; pipe < get_pipes_per_mec(dqm); pipe++) {
535 int pipe_offset = pipe * get_queues_per_pipe(dqm);
536
537 for (queue = 0; queue < get_queues_per_pipe(dqm); queue++)
538 if (test_bit(pipe_offset + queue,
539 dqm->dev->shared_resources.queue_bitmap))
540 dqm->allocated_queues[pipe] |= 1 << queue;
541 }
64c7f8cf
BG		 542
543 dqm->vmid_bitmap = (1 << VMID_PER_DEVICE) - 1;
bcea3081 544 dqm->sdma_bitmap = (1 << CIK_SDMA_QUEUES) - 1;
64c7f8cf
BG		 545
546 init_scheduler(dqm);
547 return 0;
548}
549
550static void uninitialize_nocpsch(struct device_queue_manager *dqm)
551{
6f9d54fd
OG		 552 int i;
553
64c7f8cf
BG		 554 BUG_ON(!dqm);
555
556 BUG_ON(dqm->queue_count > 0 || dqm->processes_count > 0);
557
558 kfree(dqm->allocated_queues);
6f9d54fd
OG		 559 for (i = 0 ; i < KFD_MQD_TYPE_MAX ; i++)
560 kfree(dqm->mqds[i]);
64c7f8cf 561 mutex_destroy(&dqm->lock);
a86aa3ca 562 kfd_gtt_sa_free(dqm->dev, dqm->pipeline_mem);
64c7f8cf
BG		 563}
564
565static int start_nocpsch(struct device_queue_manager *dqm)
566{
2249d558 567 init_interrupts(dqm);
64c7f8cf
BG		 568 return 0;
569}
570
571static int stop_nocpsch(struct device_queue_manager *dqm)
572{
573 return 0;
574}
575
bcea3081
BG		 576static int allocate_sdma_queue(struct device_queue_manager *dqm,
577 unsigned int *sdma_queue_id)
578{
579 int bit;
580
581 if (dqm->sdma_bitmap == 0)
582 return -ENOMEM;
583
584 bit = find_first_bit((unsigned long *)&dqm->sdma_bitmap,
585 CIK_SDMA_QUEUES);
586
587 clear_bit(bit, (unsigned long *)&dqm->sdma_bitmap);
588 *sdma_queue_id = bit;
589
590 return 0;
591}
592
593static void deallocate_sdma_queue(struct device_queue_manager *dqm,
594 unsigned int sdma_queue_id)
595{
010b82e7 596 if (sdma_queue_id >= CIK_SDMA_QUEUES)
bcea3081
BG		 597 return;
598 set_bit(sdma_queue_id, (unsigned long *)&dqm->sdma_bitmap);
599}
600
bcea3081
BG		 601static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm,
602 struct queue *q,
603 struct qcm_process_device *qpd)
604{
605 struct mqd_manager *mqd;
606 int retval;
607
45c9a5e4 608 mqd = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_SDMA);
bcea3081
BG		 609 if (!mqd)
610 return -ENOMEM;
611
612 retval = allocate_sdma_queue(dqm, &q->sdma_id);
613 if (retval != 0)
614 return retval;
615
616 q->properties.sdma_queue_id = q->sdma_id % CIK_SDMA_QUEUES_PER_ENGINE;
617 q->properties.sdma_engine_id = q->sdma_id / CIK_SDMA_ENGINE_NUM;
618
619 pr_debug("kfd: sdma id is: %d\n", q->sdma_id);
620 pr_debug(" sdma queue id: %d\n", q->properties.sdma_queue_id);
621 pr_debug(" sdma engine id: %d\n", q->properties.sdma_engine_id);
622
3e3f6e1a 623 dqm->ops_asic_specific.init_sdma_vm(dqm, q, qpd);
bcea3081
BG		 624 retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj,
625 &q->gart_mqd_addr, &q->properties);
626 if (retval != 0) {
627 deallocate_sdma_queue(dqm, q->sdma_id);
628 return retval;
629 }
630
4fadf6b6
BG		 631 retval = mqd->load_mqd(mqd, q->mqd, 0,
632 0, NULL);
633 if (retval != 0) {
634 deallocate_sdma_queue(dqm, q->sdma_id);
635 mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
636 return retval;
637 }
638
bcea3081
BG		 639 return 0;
640}
641
64c7f8cf
BG		 642/*
643 * Device Queue Manager implementation for cp scheduler
644 */
645
646static int set_sched_resources(struct device_queue_manager *dqm)
647{
d0b63bb3 648 int i, mec;
64c7f8cf 649 struct scheduling_resources res;
64c7f8cf
BG		 650
651 BUG_ON(!dqm);
652
653 pr_debug("kfd: In func %s\n", __func__);
654
64c7f8cf
BG		 655 res.vmid_mask = (1 << VMID_PER_DEVICE) - 1;
656 res.vmid_mask <<= KFD_VMID_START_OFFSET;
d0b63bb3
AR		 657
658 res.queue_mask = 0;
659 for (i = 0; i < KGD_MAX_QUEUES; ++i) {
660 mec = (i / dqm->dev->shared_resources.num_queue_per_pipe)
661 / dqm->dev->shared_resources.num_pipe_per_mec;
662
663 if (!test_bit(i, dqm->dev->shared_resources.queue_bitmap))
664 continue;
665
666 /* only acquire queues from the first MEC */
667 if (mec > 0)
668 continue;
669
670 /* This situation may be hit in the future if a new HW
671 * generation exposes more than 64 queues. If so, the
672 * definition of res.queue_mask needs updating */
1d11ee89 673 if (WARN_ON(i >= (sizeof(res.queue_mask)*8))) {
d0b63bb3
AR		 674 pr_err("Invalid queue enabled by amdgpu: %d\n", i);
675 break;
676 }
677
678 res.queue_mask |= (1ull << i);
679 }
64c7f8cf
BG		 680 res.gws_mask = res.oac_mask = res.gds_heap_base =
681 res.gds_heap_size = 0;
682
683 pr_debug("kfd: scheduling resources:\n"
684 " vmid mask: 0x%8X\n"
685 " queue mask: 0x%8llX\n",
686 res.vmid_mask, res.queue_mask);
687
688 return pm_send_set_resources(&dqm->packets, &res);
689}
690
691static int initialize_cpsch(struct device_queue_manager *dqm)
692{
693 int retval;
694
695 BUG_ON(!dqm);
696
697 pr_debug("kfd: In func %s num of pipes: %d\n",
d0b63bb3 698 __func__, get_pipes_per_mec(dqm));
64c7f8cf
BG		 699
700 mutex_init(&dqm->lock);
701 INIT_LIST_HEAD(&dqm->queues);
702 dqm->queue_count = dqm->processes_count = 0;
bcea3081 703 dqm->sdma_queue_count = 0;
64c7f8cf 704 dqm->active_runlist = false;
a22fc854 705 retval = dqm->ops_asic_specific.initialize(dqm);
64c7f8cf
BG		 706 if (retval != 0)
707 goto fail_init_pipelines;
708
709 return 0;
710
711fail_init_pipelines:
712 mutex_destroy(&dqm->lock);
713 return retval;
714}
715
716static int start_cpsch(struct device_queue_manager *dqm)
717{
718 struct device_process_node *node;
719 int retval;
720
721 BUG_ON(!dqm);
722
723 retval = 0;
724
725 retval = pm_init(&dqm->packets, dqm);
726 if (retval != 0)
727 goto fail_packet_manager_init;
728
729 retval = set_sched_resources(dqm);
730 if (retval != 0)
731 goto fail_set_sched_resources;
732
733 pr_debug("kfd: allocating fence memory\n");
734
735 /* allocate fence memory on the gart */
a86aa3ca
OG		 736 retval = kfd_gtt_sa_allocate(dqm->dev, sizeof(*dqm->fence_addr),
737 &dqm->fence_mem);
64c7f8cf
BG		 738
739 if (retval != 0)
740 goto fail_allocate_vidmem;
741
742 dqm->fence_addr = dqm->fence_mem->cpu_ptr;
743 dqm->fence_gpu_addr = dqm->fence_mem->gpu_addr;
2249d558
AL		 744
745 init_interrupts(dqm);
746
64c7f8cf
BG		 747 list_for_each_entry(node, &dqm->queues, list)
748 if (node->qpd->pqm->process && dqm->dev)
749 kfd_bind_process_to_device(dqm->dev,
750 node->qpd->pqm->process);
751
752 execute_queues_cpsch(dqm, true);
753
754 return 0;
755fail_allocate_vidmem:
756fail_set_sched_resources:
757 pm_uninit(&dqm->packets);
758fail_packet_manager_init:
759 return retval;
760}
761
762static int stop_cpsch(struct device_queue_manager *dqm)
763{
764 struct device_process_node *node;
765 struct kfd_process_device *pdd;
766
767 BUG_ON(!dqm);
768
992839ad 769 destroy_queues_cpsch(dqm, true, true);
64c7f8cf
BG		 770
771 list_for_each_entry(node, &dqm->queues, list) {
52a5fdce 772 pdd = qpd_to_pdd(node->qpd);
64c7f8cf
BG		 773 pdd->bound = false;
774 }
a86aa3ca 775 kfd_gtt_sa_free(dqm->dev, dqm->fence_mem);
64c7f8cf
BG		 776 pm_uninit(&dqm->packets);
777
778 return 0;
779}
780
781static int create_kernel_queue_cpsch(struct device_queue_manager *dqm,
782 struct kernel_queue *kq,
783 struct qcm_process_device *qpd)
784{
785 BUG_ON(!dqm || !kq || !qpd);
786
787 pr_debug("kfd: In func %s\n", __func__);
788
789 mutex_lock(&dqm->lock);
b8cbab04
OG		 790 if (dqm->total_queue_count >= max_num_of_queues_per_device) {
791 pr_warn("amdkfd: Can't create new kernel queue because %d queues were already created\n",
792 dqm->total_queue_count);
793 mutex_unlock(&dqm->lock);
794 return -EPERM;
795 }
796
797 /*
798 * Unconditionally increment this counter, regardless of the queue's
799 * type or whether the queue is active.
800 */
801 dqm->total_queue_count++;
802 pr_debug("Total of %d queues are accountable so far\n",
803 dqm->total_queue_count);
804
64c7f8cf
BG		 805 list_add(&kq->list, &qpd->priv_queue_list);
806 dqm->queue_count++;
807 qpd->is_debug = true;
808 execute_queues_cpsch(dqm, false);
809 mutex_unlock(&dqm->lock);
810
811 return 0;
812}
813
814static void destroy_kernel_queue_cpsch(struct device_queue_manager *dqm,
815 struct kernel_queue *kq,
816 struct qcm_process_device *qpd)
817{
818 BUG_ON(!dqm || !kq);
819
820 pr_debug("kfd: In %s\n", __func__);
821
822 mutex_lock(&dqm->lock);
992839ad
YS		 823 /* here we actually preempt the DIQ */
824 destroy_queues_cpsch(dqm, true, false);
64c7f8cf
BG		 825 list_del(&kq->list);
826 dqm->queue_count--;
827 qpd->is_debug = false;
828 execute_queues_cpsch(dqm, false);
b8cbab04
OG		 829 /*
830 * Unconditionally decrement this counter, regardless of the queue's
831 * type.
832 */
8b58f261 833 dqm->total_queue_count--;
b8cbab04
OG		 834 pr_debug("Total of %d queues are accountable so far\n",
835 dqm->total_queue_count);
64c7f8cf
BG		 836 mutex_unlock(&dqm->lock);
837}
838
bcea3081
BG		 839static void select_sdma_engine_id(struct queue *q)
840{
841 static int sdma_id;
842
843 q->sdma_id = sdma_id;
844 sdma_id = (sdma_id + 1) % 2;
845}
846
64c7f8cf
BG		 847static int create_queue_cpsch(struct device_queue_manager *dqm, struct queue *q,
848 struct qcm_process_device *qpd, int *allocate_vmid)
849{
850 int retval;
851 struct mqd_manager *mqd;
852
853 BUG_ON(!dqm || !q || !qpd);
854
855 retval = 0;
856
857 if (allocate_vmid)
858 *allocate_vmid = 0;
859
860 mutex_lock(&dqm->lock);
861
b8cbab04
OG		 862 if (dqm->total_queue_count >= max_num_of_queues_per_device) {
863 pr_warn("amdkfd: Can't create new usermode queue because %d queues were already created\n",
864 dqm->total_queue_count);
865 retval = -EPERM;
866 goto out;
867 }
868
bcea3081
BG		 869 if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
870 select_sdma_engine_id(q);
871
45c9a5e4 872 mqd = dqm->ops.get_mqd_manager(dqm,
bcea3081
BG		 873 get_mqd_type_from_queue_type(q->properties.type));
874
64c7f8cf
BG		 875 if (mqd == NULL) {
876 mutex_unlock(&dqm->lock);
877 return -ENOMEM;
878 }
879
bdcddf95 880 dqm->ops_asic_specific.init_sdma_vm(dqm, q, qpd);
64c7f8cf
BG		 881 retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj,
882 &q->gart_mqd_addr, &q->properties);
883 if (retval != 0)
884 goto out;
885
886 list_add(&q->list, &qpd->queues_list);
887 if (q->properties.is_active) {
888 dqm->queue_count++;
889 retval = execute_queues_cpsch(dqm, false);
890 }
891
bcea3081
BG		 892 if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
893 dqm->sdma_queue_count++;
b8cbab04
OG		 894 /*
895 * Unconditionally increment this counter, regardless of the queue's
896 * type or whether the queue is active.
897 */
898 dqm->total_queue_count++;
899
900 pr_debug("Total of %d queues are accountable so far\n",
901 dqm->total_queue_count);
902
64c7f8cf
BG		 903out:
904 mutex_unlock(&dqm->lock);
905 return retval;
906}
907
788bf83d 908int amdkfd_fence_wait_timeout(unsigned int *fence_addr,
d80d19bd
OG		 909 unsigned int fence_value,
910 unsigned long timeout)
64c7f8cf
BG		 911{
912 BUG_ON(!fence_addr);
913 timeout += jiffies;
914
915 while (*fence_addr != fence_value) {
916 if (time_after(jiffies, timeout)) {
917 pr_err("kfd: qcm fence wait loop timeout expired\n");
918 return -ETIME;
919 }
99331a51 920 schedule();
64c7f8cf
BG		 921 }
922
923 return 0;
924}
925
bcea3081
BG		 926static int destroy_sdma_queues(struct device_queue_manager *dqm,
927 unsigned int sdma_engine)
928{
929 return pm_send_unmap_queue(&dqm->packets, KFD_QUEUE_TYPE_SDMA,
992839ad 930 KFD_PREEMPT_TYPE_FILTER_DYNAMIC_QUEUES, 0, false,
bcea3081
BG		 931 sdma_engine);
932}
933
992839ad
YS		 934static int destroy_queues_cpsch(struct device_queue_manager *dqm,
935 bool preempt_static_queues, bool lock)
64c7f8cf
BG		 936{
937 int retval;
992839ad 938 enum kfd_preempt_type_filter preempt_type;
a82918f1 939 struct kfd_process_device *pdd;
64c7f8cf
BG		 940
941 BUG_ON(!dqm);
942
943 retval = 0;
944
945 if (lock)
946 mutex_lock(&dqm->lock);
991ca8ee 947 if (!dqm->active_runlist)
64c7f8cf 948 goto out;
bcea3081
BG		 949
950 pr_debug("kfd: Before destroying queues, sdma queue count is : %u\n",
951 dqm->sdma_queue_count);
952
953 if (dqm->sdma_queue_count > 0) {
954 destroy_sdma_queues(dqm, 0);
955 destroy_sdma_queues(dqm, 1);
956 }
957
992839ad
YS		 958 preempt_type = preempt_static_queues ?
959 KFD_PREEMPT_TYPE_FILTER_ALL_QUEUES :
960 KFD_PREEMPT_TYPE_FILTER_DYNAMIC_QUEUES;
961
64c7f8cf 962 retval = pm_send_unmap_queue(&dqm->packets, KFD_QUEUE_TYPE_COMPUTE,
992839ad 963 preempt_type, 0, false, 0);
64c7f8cf
BG		 964 if (retval != 0)
965 goto out;
966
967 *dqm->fence_addr = KFD_FENCE_INIT;
968 pm_send_query_status(&dqm->packets, dqm->fence_gpu_addr,
969 KFD_FENCE_COMPLETED);
970 /* should be timed out */
c3447e81 971 retval = amdkfd_fence_wait_timeout(dqm->fence_addr, KFD_FENCE_COMPLETED,
64c7f8cf 972 QUEUE_PREEMPT_DEFAULT_TIMEOUT_MS);
c3447e81 973 if (retval != 0) {
a82918f1
BG		 974 pdd = kfd_get_process_device_data(dqm->dev,
975 kfd_get_process(current));
976 pdd->reset_wavefronts = true;
c3447e81
BG		 977 goto out;
978 }
64c7f8cf
BG		 979 pm_release_ib(&dqm->packets);
980 dqm->active_runlist = false;
981
982out:
983 if (lock)
984 mutex_unlock(&dqm->lock);
985 return retval;
986}
987
988static int execute_queues_cpsch(struct device_queue_manager *dqm, bool lock)
989{
990 int retval;
991
992 BUG_ON(!dqm);
993
994 if (lock)
995 mutex_lock(&dqm->lock);
996
992839ad 997 retval = destroy_queues_cpsch(dqm, false, false);
64c7f8cf
BG		 998 if (retval != 0) {
999 pr_err("kfd: the cp might be in an unrecoverable state due to an unsuccessful queues preemption");
1000 goto out;
1001 }
1002
1003 if (dqm->queue_count <= 0 || dqm->processes_count <= 0) {
1004 retval = 0;
1005 goto out;
1006 }
1007
1008 if (dqm->active_runlist) {
1009 retval = 0;
1010 goto out;
1011 }
1012
1013 retval = pm_send_runlist(&dqm->packets, &dqm->queues);
1014 if (retval != 0) {
1015 pr_err("kfd: failed to execute runlist");
1016 goto out;
1017 }
1018 dqm->active_runlist = true;
1019
1020out:
1021 if (lock)
1022 mutex_unlock(&dqm->lock);
1023 return retval;
1024}
1025
1026static int destroy_queue_cpsch(struct device_queue_manager *dqm,
1027 struct qcm_process_device *qpd,
1028 struct queue *q)
1029{
1030 int retval;
1031 struct mqd_manager *mqd;
992839ad 1032 bool preempt_all_queues;
64c7f8cf
BG		 1033
1034 BUG_ON(!dqm || !qpd || !q);
1035
992839ad
YS		 1036 preempt_all_queues = false;
1037
64c7f8cf
BG		 1038 retval = 0;
1039
1040 /* remove queue from list to prevent rescheduling after preemption */
1041 mutex_lock(&dqm->lock);
992839ad
YS		 1042
1043 if (qpd->is_debug) {
1044 /*
1045 * error, currently we do not allow to destroy a queue
1046 * of a currently debugged process
1047 */
1048 retval = -EBUSY;
1049 goto failed_try_destroy_debugged_queue;
1050
1051 }
1052
45c9a5e4 1053 mqd = dqm->ops.get_mqd_manager(dqm,
bcea3081 1054 get_mqd_type_from_queue_type(q->properties.type));
64c7f8cf
BG		 1055 if (!mqd) {
1056 retval = -ENOMEM;
1057 goto failed;
1058 }
1059
bcea3081
BG		 1060 if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
1061 dqm->sdma_queue_count--;
1062
64c7f8cf 1063 list_del(&q->list);
b6819cec
JC		 1064 if (q->properties.is_active)
1065 dqm->queue_count--;
64c7f8cf
BG		 1066
1067 execute_queues_cpsch(dqm, false);
1068
1069 mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
b8cbab04
OG		 1070
1071 /*
1072 * Unconditionally decrement this counter, regardless of the queue's
1073 * type
1074 */
1075 dqm->total_queue_count--;
1076 pr_debug("Total of %d queues are accountable so far\n",
1077 dqm->total_queue_count);
64c7f8cf
BG		 1078
1079 mutex_unlock(&dqm->lock);
1080
1081 return 0;
1082
1083failed:
992839ad
YS		 1084failed_try_destroy_debugged_queue:
1085
64c7f8cf
BG		 1086 mutex_unlock(&dqm->lock);
1087 return retval;
1088}
1089
1090/*
1091 * Low bits must be 0000/FFFF as required by HW, high bits must be 0 to
1092 * stay in user mode.
1093 */
1094#define APE1_FIXED_BITS_MASK 0xFFFF80000000FFFFULL
1095/* APE1 limit is inclusive and 64K aligned. */
1096#define APE1_LIMIT_ALIGNMENT 0xFFFF
1097
1098static bool set_cache_memory_policy(struct device_queue_manager *dqm,
1099 struct qcm_process_device *qpd,
1100 enum cache_policy default_policy,
1101 enum cache_policy alternate_policy,
1102 void __user *alternate_aperture_base,
1103 uint64_t alternate_aperture_size)
1104{
a22fc854 1105 bool retval;
64c7f8cf
BG		 1106
1107 pr_debug("kfd: In func %s\n", __func__);
1108
1109 mutex_lock(&dqm->lock);
1110
1111 if (alternate_aperture_size == 0) {
1112 /* base > limit disables APE1 */
1113 qpd->sh_mem_ape1_base = 1;
1114 qpd->sh_mem_ape1_limit = 0;
1115 } else {
1116 /*
1117 * In FSA64, APE1_Base[63:0] = { 16{SH_MEM_APE1_BASE[31]},
1118 * SH_MEM_APE1_BASE[31:0], 0x0000 }
1119 * APE1_Limit[63:0] = { 16{SH_MEM_APE1_LIMIT[31]},
1120 * SH_MEM_APE1_LIMIT[31:0], 0xFFFF }
1121 * Verify that the base and size parameters can be
1122 * represented in this format and convert them.
1123 * Additionally restrict APE1 to user-mode addresses.
1124 */
1125
1126 uint64_t base = (uintptr_t)alternate_aperture_base;
1127 uint64_t limit = base + alternate_aperture_size - 1;
1128
1129 if (limit <= base)
1130 goto out;
1131
1132 if ((base & APE1_FIXED_BITS_MASK) != 0)
1133 goto out;
1134
1135 if ((limit & APE1_FIXED_BITS_MASK) != APE1_LIMIT_ALIGNMENT)
1136 goto out;
1137
1138 qpd->sh_mem_ape1_base = base >> 16;
1139 qpd->sh_mem_ape1_limit = limit >> 16;
1140 }
1141
a22fc854
BG		 1142 retval = dqm->ops_asic_specific.set_cache_memory_policy(
1143 dqm,
1144 qpd,
1145 default_policy,
1146 alternate_policy,
1147 alternate_aperture_base,
1148 alternate_aperture_size);
64c7f8cf
BG		 1149
1150 if ((sched_policy == KFD_SCHED_POLICY_NO_HWS) && (qpd->vmid != 0))
1151 program_sh_mem_settings(dqm, qpd);
1152
1153 pr_debug("kfd: sh_mem_config: 0x%x, ape1_base: 0x%x, ape1_limit: 0x%x\n",
1154 qpd->sh_mem_config, qpd->sh_mem_ape1_base,
1155 qpd->sh_mem_ape1_limit);
1156
1157 mutex_unlock(&dqm->lock);
a22fc854 1158 return retval;
64c7f8cf
BG		 1159
1160out:
1161 mutex_unlock(&dqm->lock);
1162 return false;
1163}
1164
1165struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev)
1166{
1167 struct device_queue_manager *dqm;
1168
1169 BUG_ON(!dev);
1170
a22fc854
BG		 1171 pr_debug("kfd: loading device queue manager\n");
1172
64c7f8cf
BG		 1173 dqm = kzalloc(sizeof(struct device_queue_manager), GFP_KERNEL);
1174 if (!dqm)
1175 return NULL;
1176
1177 dqm->dev = dev;
1178 switch (sched_policy) {
1179 case KFD_SCHED_POLICY_HWS:
1180 case KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION:
1181 /* initialize dqm for cp scheduling */
45c9a5e4
OG		 1182 dqm->ops.create_queue = create_queue_cpsch;
1183 dqm->ops.initialize = initialize_cpsch;
1184 dqm->ops.start = start_cpsch;
1185 dqm->ops.stop = stop_cpsch;
1186 dqm->ops.destroy_queue = destroy_queue_cpsch;
1187 dqm->ops.update_queue = update_queue;
1188 dqm->ops.get_mqd_manager = get_mqd_manager_nocpsch;
1189 dqm->ops.register_process = register_process_nocpsch;
1190 dqm->ops.unregister_process = unregister_process_nocpsch;
1191 dqm->ops.uninitialize = uninitialize_nocpsch;
1192 dqm->ops.create_kernel_queue = create_kernel_queue_cpsch;
1193 dqm->ops.destroy_kernel_queue = destroy_kernel_queue_cpsch;
1194 dqm->ops.set_cache_memory_policy = set_cache_memory_policy;
64c7f8cf
BG		 1195 break;
1196 case KFD_SCHED_POLICY_NO_HWS:
1197 /* initialize dqm for no cp scheduling */
45c9a5e4
OG		 1198 dqm->ops.start = start_nocpsch;
1199 dqm->ops.stop = stop_nocpsch;
1200 dqm->ops.create_queue = create_queue_nocpsch;
1201 dqm->ops.destroy_queue = destroy_queue_nocpsch;
1202 dqm->ops.update_queue = update_queue;
1203 dqm->ops.get_mqd_manager = get_mqd_manager_nocpsch;
1204 dqm->ops.register_process = register_process_nocpsch;
1205 dqm->ops.unregister_process = unregister_process_nocpsch;
1206 dqm->ops.initialize = initialize_nocpsch;
1207 dqm->ops.uninitialize = uninitialize_nocpsch;
1208 dqm->ops.set_cache_memory_policy = set_cache_memory_policy;
64c7f8cf
BG		 1209 break;
1210 default:
1211 BUG();
1212 break;
1213 }
1214
a22fc854
BG		 1215 switch (dev->device_info->asic_family) {
1216 case CHIP_CARRIZO:
1217 device_queue_manager_init_vi(&dqm->ops_asic_specific);
300dec95
OG		 1218 break;
1219
a22fc854
BG		 1220 case CHIP_KAVERI:
1221 device_queue_manager_init_cik(&dqm->ops_asic_specific);
300dec95 1222 break;
a22fc854
BG		 1223 }
1224
45c9a5e4 1225 if (dqm->ops.initialize(dqm) != 0) {
64c7f8cf
BG		 1226 kfree(dqm);
1227 return NULL;
1228 }
1229
1230 return dqm;
1231}
1232
1233void device_queue_manager_uninit(struct device_queue_manager *dqm)
1234{
1235 BUG_ON(!dqm);
1236
45c9a5e4 1237 dqm->ops.uninitialize(dqm);
64c7f8cf
BG		 1238 kfree(dqm);
1239}
Linux 6.x block layer and io_uring tree(s)