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drm/admkfd use modern ktime accessors
[linux-block.git] / drivers / gpu / drm / amd / amdkfd / kfd_device_queue_manager.c
CommitLineData
64c7f8cf
BG		 1/*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
26103436
FK		 24#include <linux/ratelimit.h>
25#include <linux/printk.h>
64c7f8cf
BG		 26#include <linux/slab.h>
27#include <linux/list.h>
28#include <linux/types.h>
64c7f8cf 29#include <linux/bitops.h>
99331a51 30#include <linux/sched.h>
64c7f8cf
BG		 31#include "kfd_priv.h"
32#include "kfd_device_queue_manager.h"
33#include "kfd_mqd_manager.h"
34#include "cik_regs.h"
35#include "kfd_kernel_queue.h"
64c7f8cf
BG		 36
37/* Size of the per-pipe EOP queue */
38#define CIK_HPD_EOP_BYTES_LOG2 11
39#define CIK_HPD_EOP_BYTES (1U << CIK_HPD_EOP_BYTES_LOG2)
40
64c7f8cf
BG		 41static int set_pasid_vmid_mapping(struct device_queue_manager *dqm,
42 unsigned int pasid, unsigned int vmid);
43
44static int create_compute_queue_nocpsch(struct device_queue_manager *dqm,
45 struct queue *q,
46 struct qcm_process_device *qpd);
bcea3081 47
c4744e24
YZ		 48static int execute_queues_cpsch(struct device_queue_manager *dqm,
49 enum kfd_unmap_queues_filter filter,
50 uint32_t filter_param);
7da2bcf8 51static int unmap_queues_cpsch(struct device_queue_manager *dqm,
4465f466
YZ		 52 enum kfd_unmap_queues_filter filter,
53 uint32_t filter_param);
64c7f8cf 54
60a00956
FK		 55static int map_queues_cpsch(struct device_queue_manager *dqm);
56
bcea3081
BG		 57static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm,
58 struct queue *q,
59 struct qcm_process_device *qpd);
60
61static void deallocate_sdma_queue(struct device_queue_manager *dqm,
62 unsigned int sdma_queue_id);
64c7f8cf 63
bcea3081
BG		 64static inline
65enum KFD_MQD_TYPE get_mqd_type_from_queue_type(enum kfd_queue_type type)
64c7f8cf 66{
bcea3081 67 if (type == KFD_QUEUE_TYPE_SDMA)
85d258f9
BG		 68 return KFD_MQD_TYPE_SDMA;
69 return KFD_MQD_TYPE_CP;
64c7f8cf
BG		 70}
71
d0b63bb3
AR		 72static bool is_pipe_enabled(struct device_queue_manager *dqm, int mec, int pipe)
73{
74 int i;
75 int pipe_offset = mec * dqm->dev->shared_resources.num_pipe_per_mec
76 + pipe * dqm->dev->shared_resources.num_queue_per_pipe;
77
78 /* queue is available for KFD usage if bit is 1 */
79 for (i = 0; i < dqm->dev->shared_resources.num_queue_per_pipe; ++i)
80 if (test_bit(pipe_offset + i,
81 dqm->dev->shared_resources.queue_bitmap))
82 return true;
83 return false;
84}
85
d0b63bb3 86unsigned int get_queues_num(struct device_queue_manager *dqm)
64ea8f4a 87{
d0b63bb3
AR		 88 return bitmap_weight(dqm->dev->shared_resources.queue_bitmap,
89 KGD_MAX_QUEUES);
64ea8f4a
OG		 90}
91
d0b63bb3 92unsigned int get_queues_per_pipe(struct device_queue_manager *dqm)
64c7f8cf 93{
d0b63bb3
AR		 94 return dqm->dev->shared_resources.num_queue_per_pipe;
95}
96
97unsigned int get_pipes_per_mec(struct device_queue_manager *dqm)
98{
d0b63bb3 99 return dqm->dev->shared_resources.num_pipe_per_mec;
64c7f8cf
BG		 100}
101
a22fc854 102void program_sh_mem_settings(struct device_queue_manager *dqm,
64c7f8cf
BG		 103 struct qcm_process_device *qpd)
104{
cea405b1
XZ		 105 return dqm->dev->kfd2kgd->program_sh_mem_settings(
106 dqm->dev->kgd, qpd->vmid,
64c7f8cf
BG		 107 qpd->sh_mem_config,
108 qpd->sh_mem_ape1_base,
109 qpd->sh_mem_ape1_limit,
110 qpd->sh_mem_bases);
111}
112
ef568db7
FK		 113static int allocate_doorbell(struct qcm_process_device *qpd, struct queue *q)
114{
115 struct kfd_dev *dev = qpd->dqm->dev;
116
117 if (!KFD_IS_SOC15(dev->device_info->asic_family)) {
118 /* On pre-SOC15 chips we need to use the queue ID to
119 * preserve the user mode ABI.
120 */
121 q->doorbell_id = q->properties.queue_id;
122 } else if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
123 /* For SDMA queues on SOC15, use static doorbell
124 * assignments based on the engine and queue.
125 */
126 q->doorbell_id = dev->shared_resources.sdma_doorbell
127 [q->properties.sdma_engine_id]
128 [q->properties.sdma_queue_id];
129 } else {
130 /* For CP queues on SOC15 reserve a free doorbell ID */
131 unsigned int found;
132
133 found = find_first_zero_bit(qpd->doorbell_bitmap,
134 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS);
135 if (found >= KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) {
136 pr_debug("No doorbells available");
137 return -EBUSY;
138 }
139 set_bit(found, qpd->doorbell_bitmap);
140 q->doorbell_id = found;
141 }
142
143 q->properties.doorbell_off =
144 kfd_doorbell_id_to_offset(dev, q->process,
145 q->doorbell_id);
146
147 return 0;
148}
149
150static void deallocate_doorbell(struct qcm_process_device *qpd,
151 struct queue *q)
152{
153 unsigned int old;
154 struct kfd_dev *dev = qpd->dqm->dev;
155
156 if (!KFD_IS_SOC15(dev->device_info->asic_family) ||
157 q->properties.type == KFD_QUEUE_TYPE_SDMA)
158 return;
159
160 old = test_and_clear_bit(q->doorbell_id, qpd->doorbell_bitmap);
161 WARN_ON(!old);
162}
163
64c7f8cf
BG		 164static int allocate_vmid(struct device_queue_manager *dqm,
165 struct qcm_process_device *qpd,
166 struct queue *q)
167{
168 int bit, allocated_vmid;
169
170 if (dqm->vmid_bitmap == 0)
171 return -ENOMEM;
172
4252bf68
HK		 173 bit = ffs(dqm->vmid_bitmap) - 1;
174 dqm->vmid_bitmap &= ~(1 << bit);
64c7f8cf 175
44008d7a 176 allocated_vmid = bit + dqm->dev->vm_info.first_vmid_kfd;
79775b62 177 pr_debug("vmid allocation %d\n", allocated_vmid);
64c7f8cf
BG		 178 qpd->vmid = allocated_vmid;
179 q->properties.vmid = allocated_vmid;
180
181 set_pasid_vmid_mapping(dqm, q->process->pasid, q->properties.vmid);
182 program_sh_mem_settings(dqm, qpd);
183
403575c4
FK		 184 /* qpd->page_table_base is set earlier when register_process()
185 * is called, i.e. when the first queue is created.
186 */
187 dqm->dev->kfd2kgd->set_vm_context_page_table_base(dqm->dev->kgd,
188 qpd->vmid,
189 qpd->page_table_base);
190 /* invalidate the VM context after pasid and vmid mapping is set up */
191 kfd_flush_tlb(qpd_to_pdd(qpd));
192
64c7f8cf
BG		 193 return 0;
194}
195
552764b6
FK		 196static int flush_texture_cache_nocpsch(struct kfd_dev *kdev,
197 struct qcm_process_device *qpd)
198{
f6e27ff1
FK		 199 const struct packet_manager_funcs *pmf = qpd->dqm->packets.pmf;
200 int ret;
552764b6
FK		 201
202 if (!qpd->ib_kaddr)
203 return -ENOMEM;
204
f6e27ff1
FK		 205 ret = pmf->release_mem(qpd->ib_base, (uint32_t *)qpd->ib_kaddr);
206 if (ret)
207 return ret;
552764b6
FK		 208
209 return kdev->kfd2kgd->submit_ib(kdev->kgd, KGD_ENGINE_MEC1, qpd->vmid,
f6e27ff1
FK		 210 qpd->ib_base, (uint32_t *)qpd->ib_kaddr,
211 pmf->release_mem_size / sizeof(uint32_t));
552764b6
FK		 212}
213
64c7f8cf
BG		 214static void deallocate_vmid(struct device_queue_manager *dqm,
215 struct qcm_process_device *qpd,
216 struct queue *q)
217{
44008d7a 218 int bit = qpd->vmid - dqm->dev->vm_info.first_vmid_kfd;
64c7f8cf 219
552764b6
FK		 220 /* On GFX v7, CP doesn't flush TC at dequeue */
221 if (q->device->device_info->asic_family == CHIP_HAWAII)
222 if (flush_texture_cache_nocpsch(q->device, qpd))
223 pr_err("Failed to flush TC\n");
224
403575c4
FK		 225 kfd_flush_tlb(qpd_to_pdd(qpd));
226
2030664b
BG		 227 /* Release the vmid mapping */
228 set_pasid_vmid_mapping(dqm, 0, qpd->vmid);
229
4252bf68 230 dqm->vmid_bitmap |= (1 << bit);
64c7f8cf
BG		 231 qpd->vmid = 0;
232 q->properties.vmid = 0;
233}
234
235static int create_queue_nocpsch(struct device_queue_manager *dqm,
236 struct queue *q,
b46cb7d7 237 struct qcm_process_device *qpd)
64c7f8cf
BG		 238{
239 int retval;
240
64c7f8cf
BG		 241 print_queue(q);
242
243 mutex_lock(&dqm->lock);
244
b8cbab04 245 if (dqm->total_queue_count >= max_num_of_queues_per_device) {
79775b62 246 pr_warn("Can't create new usermode queue because %d queues were already created\n",
b8cbab04 247 dqm->total_queue_count);
ab7c1648
KR		 248 retval = -EPERM;
249 goto out_unlock;
b8cbab04
OG		 250 }
251
64c7f8cf
BG		 252 if (list_empty(&qpd->queues_list)) {
253 retval = allocate_vmid(dqm, qpd, q);
ab7c1648
KR		 254 if (retval)
255 goto out_unlock;
64c7f8cf 256 }
64c7f8cf 257 q->properties.vmid = qpd->vmid;
26103436
FK		 258 /*
259 * Eviction state logic: we only mark active queues as evicted
260 * to avoid the overhead of restoring inactive queues later
261 */
262 if (qpd->evicted)
263 q->properties.is_evicted = (q->properties.queue_size > 0 &&
264 q->properties.queue_percent > 0 &&
265 q->properties.queue_address != 0);
64c7f8cf 266
373d7080
FK		 267 q->properties.tba_addr = qpd->tba_addr;
268 q->properties.tma_addr = qpd->tma_addr;
269
bcea3081
BG		 270 if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE)
271 retval = create_compute_queue_nocpsch(dqm, q, qpd);
ab7c1648 272 else if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
bcea3081 273 retval = create_sdma_queue_nocpsch(dqm, q, qpd);
ab7c1648
KR		 274 else
275 retval = -EINVAL;
64c7f8cf 276
4eacc26b 277 if (retval) {
b46cb7d7 278 if (list_empty(&qpd->queues_list))
64c7f8cf 279 deallocate_vmid(dqm, qpd, q);
ab7c1648 280 goto out_unlock;
64c7f8cf
BG		 281 }
282
283 list_add(&q->list, &qpd->queues_list);
bc920fd4 284 qpd->queue_count++;
b6819cec
JC		 285 if (q->properties.is_active)
286 dqm->queue_count++;
64c7f8cf 287
bcea3081
BG		 288 if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
289 dqm->sdma_queue_count++;
64c7f8cf 290
b8cbab04
OG		 291 /*
292 * Unconditionally increment this counter, regardless of the queue's
293 * type or whether the queue is active.
294 */
295 dqm->total_queue_count++;
296 pr_debug("Total of %d queues are accountable so far\n",
297 dqm->total_queue_count);
298
ab7c1648 299out_unlock:
64c7f8cf 300 mutex_unlock(&dqm->lock);
ab7c1648 301 return retval;
64c7f8cf
BG		 302}
303
304static int allocate_hqd(struct device_queue_manager *dqm, struct queue *q)
305{
306 bool set;
f0ec5b99 307 int pipe, bit, i;
64c7f8cf
BG		 308
309 set = false;
310
8eabaf54
KR		 311 for (pipe = dqm->next_pipe_to_allocate, i = 0;
312 i < get_pipes_per_mec(dqm);
d0b63bb3
AR		 313 pipe = ((pipe + 1) % get_pipes_per_mec(dqm)), ++i) {
314
315 if (!is_pipe_enabled(dqm, 0, pipe))
316 continue;
317
64c7f8cf 318 if (dqm->allocated_queues[pipe] != 0) {
4252bf68
HK		 319 bit = ffs(dqm->allocated_queues[pipe]) - 1;
320 dqm->allocated_queues[pipe] &= ~(1 << bit);
64c7f8cf
BG		 321 q->pipe = pipe;
322 q->queue = bit;
323 set = true;
324 break;
325 }
326 }
327
991ca8ee 328 if (!set)
64c7f8cf
BG		 329 return -EBUSY;
330
79775b62 331 pr_debug("hqd slot - pipe %d, queue %d\n", q->pipe, q->queue);
64c7f8cf 332 /* horizontal hqd allocation */
d0b63bb3 333 dqm->next_pipe_to_allocate = (pipe + 1) % get_pipes_per_mec(dqm);
64c7f8cf
BG		 334
335 return 0;
336}
337
338static inline void deallocate_hqd(struct device_queue_manager *dqm,
339 struct queue *q)
340{
4252bf68 341 dqm->allocated_queues[q->pipe] |= (1 << q->queue);
64c7f8cf
BG		 342}
343
344static int create_compute_queue_nocpsch(struct device_queue_manager *dqm,
345 struct queue *q,
346 struct qcm_process_device *qpd)
347{
348 int retval;
349 struct mqd_manager *mqd;
350
45c9a5e4 351 mqd = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_COMPUTE);
4eacc26b 352 if (!mqd)
64c7f8cf
BG		 353 return -ENOMEM;
354
355 retval = allocate_hqd(dqm, q);
4eacc26b 356 if (retval)
64c7f8cf
BG		 357 return retval;
358
ef568db7
FK		 359 retval = allocate_doorbell(qpd, q);
360 if (retval)
361 goto out_deallocate_hqd;
362
64c7f8cf
BG		 363 retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj,
364 &q->gart_mqd_addr, &q->properties);
ab7c1648 365 if (retval)
ef568db7 366 goto out_deallocate_doorbell;
64c7f8cf 367
79775b62
KR		 368 pr_debug("Loading mqd to hqd on pipe %d, queue %d\n",
369 q->pipe, q->queue);
030e416b 370
6a1c9510
MR		 371 dqm->dev->kfd2kgd->set_scratch_backing_va(
372 dqm->dev->kgd, qpd->sh_hidden_private_base, qpd->vmid);
373
60a00956
FK		 374 if (!q->properties.is_active)
375 return 0;
376
70539bd7
FK		 377 retval = mqd->load_mqd(mqd, q->mqd, q->pipe, q->queue, &q->properties,
378 q->process->mm);
ab7c1648
KR		 379 if (retval)
380 goto out_uninit_mqd;
030e416b 381
64c7f8cf 382 return 0;
ab7c1648
KR		 383
384out_uninit_mqd:
385 mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
ef568db7
FK		 386out_deallocate_doorbell:
387 deallocate_doorbell(qpd, q);
ab7c1648
KR		 388out_deallocate_hqd:
389 deallocate_hqd(dqm, q);
390
391 return retval;
64c7f8cf
BG		 392}
393
9fd3f1bf
FK		 394/* Access to DQM has to be locked before calling destroy_queue_nocpsch_locked
395 * to avoid asynchronized access
396 */
397static int destroy_queue_nocpsch_locked(struct device_queue_manager *dqm,
64c7f8cf
BG		 398 struct qcm_process_device *qpd,
399 struct queue *q)
400{
401 int retval;
402 struct mqd_manager *mqd;
403
9fd3f1bf
FK		 404 mqd = dqm->ops.get_mqd_manager(dqm,
405 get_mqd_type_from_queue_type(q->properties.type));
406 if (!mqd)
407 return -ENOMEM;
64c7f8cf 408
c2e1b3a4 409 if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE) {
c2e1b3a4
BG		 410 deallocate_hqd(dqm, q);
411 } else if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
c2e1b3a4
BG		 412 dqm->sdma_queue_count--;
413 deallocate_sdma_queue(dqm, q->sdma_id);
7113cd65 414 } else {
79775b62 415 pr_debug("q->properties.type %d is invalid\n",
7113cd65 416 q->properties.type);
9fd3f1bf 417 return -EINVAL;
64c7f8cf 418 }
9fd3f1bf 419 dqm->total_queue_count--;
64c7f8cf 420
ef568db7
FK		 421 deallocate_doorbell(qpd, q);
422
64c7f8cf 423 retval = mqd->destroy_mqd(mqd, q->mqd,
c2e1b3a4 424 KFD_PREEMPT_TYPE_WAVEFRONT_RESET,
b90e3fbe 425 KFD_UNMAP_LATENCY_MS,
64c7f8cf 426 q->pipe, q->queue);
9fd3f1bf
FK		 427 if (retval == -ETIME)
428 qpd->reset_wavefronts = true;
64c7f8cf 429
64c7f8cf
BG		 430 mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
431
432 list_del(&q->list);
9fd3f1bf
FK		 433 if (list_empty(&qpd->queues_list)) {
434 if (qpd->reset_wavefronts) {
435 pr_warn("Resetting wave fronts (nocpsch) on dev %p\n",
436 dqm->dev);
437 /* dbgdev_wave_reset_wavefronts has to be called before
438 * deallocate_vmid(), i.e. when vmid is still in use.
439 */
440 dbgdev_wave_reset_wavefronts(dqm->dev,
441 qpd->pqm->process);
442 qpd->reset_wavefronts = false;
443 }
444
64c7f8cf 445 deallocate_vmid(dqm, qpd, q);
9fd3f1bf 446 }
bc920fd4 447 qpd->queue_count--;
b6819cec
JC		 448 if (q->properties.is_active)
449 dqm->queue_count--;
b8cbab04 450
9fd3f1bf
FK		 451 return retval;
452}
b8cbab04 453
9fd3f1bf
FK		 454static int destroy_queue_nocpsch(struct device_queue_manager *dqm,
455 struct qcm_process_device *qpd,
456 struct queue *q)
457{
458 int retval;
459
460 mutex_lock(&dqm->lock);
461 retval = destroy_queue_nocpsch_locked(dqm, qpd, q);
64c7f8cf 462 mutex_unlock(&dqm->lock);
9fd3f1bf 463
64c7f8cf
BG		 464 return retval;
465}
466
467static int update_queue(struct device_queue_manager *dqm, struct queue *q)
468{
469 int retval;
470 struct mqd_manager *mqd;
26103436 471 struct kfd_process_device *pdd;
b6ffbab8 472 bool prev_active = false;
64c7f8cf 473
64c7f8cf 474 mutex_lock(&dqm->lock);
26103436
FK		 475 pdd = kfd_get_process_device_data(q->device, q->process);
476 if (!pdd) {
477 retval = -ENODEV;
478 goto out_unlock;
479 }
0b3674ae
OG		 480 mqd = dqm->ops.get_mqd_manager(dqm,
481 get_mqd_type_from_queue_type(q->properties.type));
4eacc26b 482 if (!mqd) {
ab7c1648
KR		 483 retval = -ENOMEM;
484 goto out_unlock;
64c7f8cf 485 }
26103436
FK		 486 /*
487 * Eviction state logic: we only mark active queues as evicted
488 * to avoid the overhead of restoring inactive queues later
489 */
490 if (pdd->qpd.evicted)
491 q->properties.is_evicted = (q->properties.queue_size > 0 &&
492 q->properties.queue_percent > 0 &&
493 q->properties.queue_address != 0);
64c7f8cf 494
60a00956
FK		 495 /* Save previous activity state for counters */
496 prev_active = q->properties.is_active;
497
498 /* Make sure the queue is unmapped before updating the MQD */
d146c5a7 499 if (dqm->sched_policy != KFD_SCHED_POLICY_NO_HWS) {
60a00956
FK		 500 retval = unmap_queues_cpsch(dqm,
501 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
894a8293 502 if (retval) {
60a00956
FK		 503 pr_err("unmap queue failed\n");
504 goto out_unlock;
505 }
894a8293 506 } else if (prev_active &&
60a00956
FK		 507 (q->properties.type == KFD_QUEUE_TYPE_COMPUTE ||
508 q->properties.type == KFD_QUEUE_TYPE_SDMA)) {
509 retval = mqd->destroy_mqd(mqd, q->mqd,
510 KFD_PREEMPT_TYPE_WAVEFRONT_DRAIN,
511 KFD_UNMAP_LATENCY_MS, q->pipe, q->queue);
512 if (retval) {
513 pr_err("destroy mqd failed\n");
514 goto out_unlock;
515 }
516 }
517
518 retval = mqd->update_mqd(mqd, q->mqd, &q->properties);
519
096d1a3e
FK		 520 /*
521 * check active state vs. the previous state and modify
522 * counter accordingly. map_queues_cpsch uses the
523 * dqm->queue_count to determine whether a new runlist must be
524 * uploaded.
525 */
526 if (q->properties.is_active && !prev_active)
527 dqm->queue_count++;
528 else if (!q->properties.is_active && prev_active)
529 dqm->queue_count--;
530
d146c5a7 531 if (dqm->sched_policy != KFD_SCHED_POLICY_NO_HWS)
60a00956 532 retval = map_queues_cpsch(dqm);
894a8293 533 else if (q->properties.is_active &&
60a00956
FK		 534 (q->properties.type == KFD_QUEUE_TYPE_COMPUTE ||
535 q->properties.type == KFD_QUEUE_TYPE_SDMA))
536 retval = mqd->load_mqd(mqd, q->mqd, q->pipe, q->queue,
537 &q->properties, q->process->mm);
b6ffbab8 538
ab7c1648 539out_unlock:
64c7f8cf
BG		 540 mutex_unlock(&dqm->lock);
541 return retval;
542}
543
58dcd5bf 544static struct mqd_manager *get_mqd_manager(
64c7f8cf
BG		 545 struct device_queue_manager *dqm, enum KFD_MQD_TYPE type)
546{
547 struct mqd_manager *mqd;
548
32fa8219
FK		 549 if (WARN_ON(type >= KFD_MQD_TYPE_MAX))
550 return NULL;
64c7f8cf 551
79775b62 552 pr_debug("mqd type %d\n", type);
64c7f8cf
BG		 553
554 mqd = dqm->mqds[type];
555 if (!mqd) {
556 mqd = mqd_manager_init(type, dqm->dev);
4eacc26b 557 if (!mqd)
79775b62 558 pr_err("mqd manager is NULL");
64c7f8cf
BG		 559 dqm->mqds[type] = mqd;
560 }
561
562 return mqd;
563}
564
26103436
FK		 565static int evict_process_queues_nocpsch(struct device_queue_manager *dqm,
566 struct qcm_process_device *qpd)
567{
568 struct queue *q;
569 struct mqd_manager *mqd;
570 struct kfd_process_device *pdd;
571 int retval = 0;
572
573 mutex_lock(&dqm->lock);
574 if (qpd->evicted++ > 0) /* already evicted, do nothing */
575 goto out;
576
577 pdd = qpd_to_pdd(qpd);
578 pr_info_ratelimited("Evicting PASID %u queues\n",
579 pdd->process->pasid);
580
581 /* unactivate all active queues on the qpd */
582 list_for_each_entry(q, &qpd->queues_list, list) {
583 if (!q->properties.is_active)
584 continue;
585 mqd = dqm->ops.get_mqd_manager(dqm,
586 get_mqd_type_from_queue_type(q->properties.type));
587 if (!mqd) { /* should not be here */
588 pr_err("Cannot evict queue, mqd mgr is NULL\n");
589 retval = -ENOMEM;
590 goto out;
591 }
592 q->properties.is_evicted = true;
593 q->properties.is_active = false;
594 retval = mqd->destroy_mqd(mqd, q->mqd,
595 KFD_PREEMPT_TYPE_WAVEFRONT_DRAIN,
596 KFD_UNMAP_LATENCY_MS, q->pipe, q->queue);
597 if (retval)
598 goto out;
599 dqm->queue_count--;
600 }
601
602out:
603 mutex_unlock(&dqm->lock);
604 return retval;
605}
606
607static int evict_process_queues_cpsch(struct device_queue_manager *dqm,
608 struct qcm_process_device *qpd)
609{
610 struct queue *q;
611 struct kfd_process_device *pdd;
612 int retval = 0;
613
614 mutex_lock(&dqm->lock);
615 if (qpd->evicted++ > 0) /* already evicted, do nothing */
616 goto out;
617
618 pdd = qpd_to_pdd(qpd);
619 pr_info_ratelimited("Evicting PASID %u queues\n",
620 pdd->process->pasid);
621
622 /* unactivate all active queues on the qpd */
623 list_for_each_entry(q, &qpd->queues_list, list) {
624 if (!q->properties.is_active)
625 continue;
626 q->properties.is_evicted = true;
627 q->properties.is_active = false;
628 dqm->queue_count--;
629 }
630 retval = execute_queues_cpsch(dqm,
631 qpd->is_debug ?
632 KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES :
633 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
634
635out:
636 mutex_unlock(&dqm->lock);
637 return retval;
638}
639
640static int restore_process_queues_nocpsch(struct device_queue_manager *dqm,
641 struct qcm_process_device *qpd)
642{
643 struct queue *q;
644 struct mqd_manager *mqd;
645 struct kfd_process_device *pdd;
646 uint32_t pd_base;
647 int retval = 0;
648
649 pdd = qpd_to_pdd(qpd);
650 /* Retrieve PD base */
651 pd_base = dqm->dev->kfd2kgd->get_process_page_dir(pdd->vm);
652
653 mutex_lock(&dqm->lock);
654 if (WARN_ON_ONCE(!qpd->evicted)) /* already restored, do nothing */
655 goto out;
656 if (qpd->evicted > 1) { /* ref count still > 0, decrement & quit */
657 qpd->evicted--;
658 goto out;
659 }
660
661 pr_info_ratelimited("Restoring PASID %u queues\n",
662 pdd->process->pasid);
663
664 /* Update PD Base in QPD */
665 qpd->page_table_base = pd_base;
666 pr_debug("Updated PD address to 0x%08x\n", pd_base);
667
668 if (!list_empty(&qpd->queues_list)) {
669 dqm->dev->kfd2kgd->set_vm_context_page_table_base(
670 dqm->dev->kgd,
671 qpd->vmid,
672 qpd->page_table_base);
673 kfd_flush_tlb(pdd);
674 }
675
676 /* activate all active queues on the qpd */
677 list_for_each_entry(q, &qpd->queues_list, list) {
678 if (!q->properties.is_evicted)
679 continue;
680 mqd = dqm->ops.get_mqd_manager(dqm,
681 get_mqd_type_from_queue_type(q->properties.type));
682 if (!mqd) { /* should not be here */
683 pr_err("Cannot restore queue, mqd mgr is NULL\n");
684 retval = -ENOMEM;
685 goto out;
686 }
687 q->properties.is_evicted = false;
688 q->properties.is_active = true;
689 retval = mqd->load_mqd(mqd, q->mqd, q->pipe,
690 q->queue, &q->properties,
691 q->process->mm);
692 if (retval)
693 goto out;
694 dqm->queue_count++;
695 }
696 qpd->evicted = 0;
697out:
698 mutex_unlock(&dqm->lock);
699 return retval;
700}
701
702static int restore_process_queues_cpsch(struct device_queue_manager *dqm,
703 struct qcm_process_device *qpd)
704{
705 struct queue *q;
706 struct kfd_process_device *pdd;
707 uint32_t pd_base;
708 int retval = 0;
709
710 pdd = qpd_to_pdd(qpd);
711 /* Retrieve PD base */
712 pd_base = dqm->dev->kfd2kgd->get_process_page_dir(pdd->vm);
713
714 mutex_lock(&dqm->lock);
715 if (WARN_ON_ONCE(!qpd->evicted)) /* already restored, do nothing */
716 goto out;
717 if (qpd->evicted > 1) { /* ref count still > 0, decrement & quit */
718 qpd->evicted--;
719 goto out;
720 }
721
722 pr_info_ratelimited("Restoring PASID %u queues\n",
723 pdd->process->pasid);
724
725 /* Update PD Base in QPD */
726 qpd->page_table_base = pd_base;
727 pr_debug("Updated PD address to 0x%08x\n", pd_base);
728
729 /* activate all active queues on the qpd */
730 list_for_each_entry(q, &qpd->queues_list, list) {
731 if (!q->properties.is_evicted)
732 continue;
733 q->properties.is_evicted = false;
734 q->properties.is_active = true;
735 dqm->queue_count++;
736 }
737 retval = execute_queues_cpsch(dqm,
738 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
739 if (!retval)
740 qpd->evicted = 0;
741out:
742 mutex_unlock(&dqm->lock);
743 return retval;
744}
745
58dcd5bf 746static int register_process(struct device_queue_manager *dqm,
64c7f8cf
BG		 747 struct qcm_process_device *qpd)
748{
749 struct device_process_node *n;
403575c4
FK		 750 struct kfd_process_device *pdd;
751 uint32_t pd_base;
a22fc854 752 int retval;
64c7f8cf 753
dbf56ab1 754 n = kzalloc(sizeof(*n), GFP_KERNEL);
64c7f8cf
BG		 755 if (!n)
756 return -ENOMEM;
757
758 n->qpd = qpd;
759
403575c4
FK		 760 pdd = qpd_to_pdd(qpd);
761 /* Retrieve PD base */
762 pd_base = dqm->dev->kfd2kgd->get_process_page_dir(pdd->vm);
763
64c7f8cf
BG		 764 mutex_lock(&dqm->lock);
765 list_add(&n->list, &dqm->queues);
766
403575c4
FK		 767 /* Update PD Base in QPD */
768 qpd->page_table_base = pd_base;
769
bfd5e378 770 retval = dqm->asic_ops.update_qpd(dqm, qpd);
a22fc854 771
64c7f8cf
BG		 772 dqm->processes_count++;
773
774 mutex_unlock(&dqm->lock);
775
a22fc854 776 return retval;
64c7f8cf
BG		 777}
778
58dcd5bf 779static int unregister_process(struct device_queue_manager *dqm,
64c7f8cf
BG		 780 struct qcm_process_device *qpd)
781{
782 int retval;
783 struct device_process_node *cur, *next;
784
1e5ec956
OG		 785 pr_debug("qpd->queues_list is %s\n",
786 list_empty(&qpd->queues_list) ? "empty" : "not empty");
64c7f8cf
BG		 787
788 retval = 0;
789 mutex_lock(&dqm->lock);
790
791 list_for_each_entry_safe(cur, next, &dqm->queues, list) {
792 if (qpd == cur->qpd) {
793 list_del(&cur->list);
f5d896bb 794 kfree(cur);
64c7f8cf
BG		 795 dqm->processes_count--;
796 goto out;
797 }
798 }
799 /* qpd not found in dqm list */
800 retval = 1;
801out:
802 mutex_unlock(&dqm->lock);
803 return retval;
804}
805
806static int
807set_pasid_vmid_mapping(struct device_queue_manager *dqm, unsigned int pasid,
808 unsigned int vmid)
809{
810 uint32_t pasid_mapping;
811
cea405b1
XZ		 812 pasid_mapping = (pasid == 0) ? 0 :
813 (uint32_t)pasid |
814 ATC_VMID_PASID_MAPPING_VALID;
815
816 return dqm->dev->kfd2kgd->set_pasid_vmid_mapping(
817 dqm->dev->kgd, pasid_mapping,
64c7f8cf
BG		 818 vmid);
819}
820
2249d558
AL		 821static void init_interrupts(struct device_queue_manager *dqm)
822{
823 unsigned int i;
824
d0b63bb3
AR		 825 for (i = 0 ; i < get_pipes_per_mec(dqm) ; i++)
826 if (is_pipe_enabled(dqm, 0, i))
827 dqm->dev->kfd2kgd->init_interrupts(dqm->dev->kgd, i);
2249d558
AL		 828}
829
64c7f8cf
BG		 830static int initialize_nocpsch(struct device_queue_manager *dqm)
831{
86194cf8 832 int pipe, queue;
64c7f8cf 833
79775b62 834 pr_debug("num of pipes: %d\n", get_pipes_per_mec(dqm));
64c7f8cf 835
ab7c1648
KR		 836 dqm->allocated_queues = kcalloc(get_pipes_per_mec(dqm),
837 sizeof(unsigned int), GFP_KERNEL);
838 if (!dqm->allocated_queues)
839 return -ENOMEM;
840
64c7f8cf
BG		 841 mutex_init(&dqm->lock);
842 INIT_LIST_HEAD(&dqm->queues);
843 dqm->queue_count = dqm->next_pipe_to_allocate = 0;
bcea3081 844 dqm->sdma_queue_count = 0;
64c7f8cf 845
86194cf8
FK		 846 for (pipe = 0; pipe < get_pipes_per_mec(dqm); pipe++) {
847 int pipe_offset = pipe * get_queues_per_pipe(dqm);
848
849 for (queue = 0; queue < get_queues_per_pipe(dqm); queue++)
850 if (test_bit(pipe_offset + queue,
851 dqm->dev->shared_resources.queue_bitmap))
852 dqm->allocated_queues[pipe] |= 1 << queue;
853 }
64c7f8cf 854
44008d7a 855 dqm->vmid_bitmap = (1 << dqm->dev->vm_info.vmid_num_kfd) - 1;
bcea3081 856 dqm->sdma_bitmap = (1 << CIK_SDMA_QUEUES) - 1;
64c7f8cf 857
64c7f8cf
BG		 858 return 0;
859}
860
58dcd5bf 861static void uninitialize(struct device_queue_manager *dqm)
64c7f8cf 862{
6f9d54fd
OG		 863 int i;
864
32fa8219 865 WARN_ON(dqm->queue_count > 0 || dqm->processes_count > 0);
64c7f8cf
BG		 866
867 kfree(dqm->allocated_queues);
6f9d54fd
OG		 868 for (i = 0 ; i < KFD_MQD_TYPE_MAX ; i++)
869 kfree(dqm->mqds[i]);
64c7f8cf 870 mutex_destroy(&dqm->lock);
a86aa3ca 871 kfd_gtt_sa_free(dqm->dev, dqm->pipeline_mem);
64c7f8cf
BG		 872}
873
874static int start_nocpsch(struct device_queue_manager *dqm)
875{
2249d558 876 init_interrupts(dqm);
552764b6 877 return pm_init(&dqm->packets, dqm);
64c7f8cf
BG		 878}
879
880static int stop_nocpsch(struct device_queue_manager *dqm)
881{
552764b6 882 pm_uninit(&dqm->packets);
64c7f8cf
BG		 883 return 0;
884}
885
bcea3081
BG		 886static int allocate_sdma_queue(struct device_queue_manager *dqm,
887 unsigned int *sdma_queue_id)
888{
889 int bit;
890
891 if (dqm->sdma_bitmap == 0)
892 return -ENOMEM;
893
4252bf68
HK		 894 bit = ffs(dqm->sdma_bitmap) - 1;
895 dqm->sdma_bitmap &= ~(1 << bit);
bcea3081
BG		 896 *sdma_queue_id = bit;
897
898 return 0;
899}
900
901static void deallocate_sdma_queue(struct device_queue_manager *dqm,
902 unsigned int sdma_queue_id)
903{
010b82e7 904 if (sdma_queue_id >= CIK_SDMA_QUEUES)
bcea3081 905 return;
4252bf68 906 dqm->sdma_bitmap |= (1 << sdma_queue_id);
bcea3081
BG		 907}
908
bcea3081
BG		 909static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm,
910 struct queue *q,
911 struct qcm_process_device *qpd)
912{
913 struct mqd_manager *mqd;
914 int retval;
915
45c9a5e4 916 mqd = dqm->ops.get_mqd_manager(dqm, KFD_MQD_TYPE_SDMA);
bcea3081
BG		 917 if (!mqd)
918 return -ENOMEM;
919
920 retval = allocate_sdma_queue(dqm, &q->sdma_id);
4eacc26b 921 if (retval)
bcea3081
BG		 922 return retval;
923
e139cd2a 924 q->properties.sdma_queue_id = q->sdma_id / CIK_SDMA_QUEUES_PER_ENGINE;
925 q->properties.sdma_engine_id = q->sdma_id % CIK_SDMA_QUEUES_PER_ENGINE;
bcea3081 926
ef568db7
FK		 927 retval = allocate_doorbell(qpd, q);
928 if (retval)
929 goto out_deallocate_sdma_queue;
930
79775b62
KR		 931 pr_debug("SDMA id is: %d\n", q->sdma_id);
932 pr_debug("SDMA queue id: %d\n", q->properties.sdma_queue_id);
933 pr_debug("SDMA engine id: %d\n", q->properties.sdma_engine_id);
bcea3081 934
bfd5e378 935 dqm->asic_ops.init_sdma_vm(dqm, q, qpd);
bcea3081
BG		 936 retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj,
937 &q->gart_mqd_addr, &q->properties);
ab7c1648 938 if (retval)
ef568db7 939 goto out_deallocate_doorbell;
bcea3081 940
70539bd7 941 retval = mqd->load_mqd(mqd, q->mqd, 0, 0, &q->properties, NULL);
ab7c1648
KR		 942 if (retval)
943 goto out_uninit_mqd;
4fadf6b6 944
bcea3081 945 return 0;
ab7c1648
KR		 946
947out_uninit_mqd:
948 mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
ef568db7
FK		 949out_deallocate_doorbell:
950 deallocate_doorbell(qpd, q);
ab7c1648
KR		 951out_deallocate_sdma_queue:
952 deallocate_sdma_queue(dqm, q->sdma_id);
953
954 return retval;
bcea3081
BG		 955}
956
64c7f8cf
BG		 957/*
958 * Device Queue Manager implementation for cp scheduler
959 */
960
961static int set_sched_resources(struct device_queue_manager *dqm)
962{
d0b63bb3 963 int i, mec;
64c7f8cf 964 struct scheduling_resources res;
64c7f8cf 965
44008d7a 966 res.vmid_mask = dqm->dev->shared_resources.compute_vmid_bitmap;
d0b63bb3
AR		 967
968 res.queue_mask = 0;
969 for (i = 0; i < KGD_MAX_QUEUES; ++i) {
970 mec = (i / dqm->dev->shared_resources.num_queue_per_pipe)
971 / dqm->dev->shared_resources.num_pipe_per_mec;
972
973 if (!test_bit(i, dqm->dev->shared_resources.queue_bitmap))
974 continue;
975
976 /* only acquire queues from the first MEC */
977 if (mec > 0)
978 continue;
979
980 /* This situation may be hit in the future if a new HW
981 * generation exposes more than 64 queues. If so, the
8eabaf54
KR		 982 * definition of res.queue_mask needs updating
983 */
1d11ee89 984 if (WARN_ON(i >= (sizeof(res.queue_mask)*8))) {
d0b63bb3
AR		 985 pr_err("Invalid queue enabled by amdgpu: %d\n", i);
986 break;
987 }
988
989 res.queue_mask |= (1ull << i);
990 }
64c7f8cf
BG		 991 res.gws_mask = res.oac_mask = res.gds_heap_base =
992 res.gds_heap_size = 0;
993
79775b62
KR		 994 pr_debug("Scheduling resources:\n"
995 "vmid mask: 0x%8X\n"
996 "queue mask: 0x%8llX\n",
64c7f8cf
BG		 997 res.vmid_mask, res.queue_mask);
998
999 return pm_send_set_resources(&dqm->packets, &res);
1000}
1001
1002static int initialize_cpsch(struct device_queue_manager *dqm)
1003{
79775b62 1004 pr_debug("num of pipes: %d\n", get_pipes_per_mec(dqm));
64c7f8cf
BG		 1005
1006 mutex_init(&dqm->lock);
1007 INIT_LIST_HEAD(&dqm->queues);
1008 dqm->queue_count = dqm->processes_count = 0;
bcea3081 1009 dqm->sdma_queue_count = 0;
64c7f8cf 1010 dqm->active_runlist = false;
e139cd2a 1011 dqm->sdma_bitmap = (1 << CIK_SDMA_QUEUES) - 1;
64c7f8cf 1012
bfd5e378 1013 return 0;
64c7f8cf
BG		 1014}
1015
1016static int start_cpsch(struct device_queue_manager *dqm)
1017{
64c7f8cf
BG		 1018 int retval;
1019
64c7f8cf
BG		 1020 retval = 0;
1021
1022 retval = pm_init(&dqm->packets, dqm);
4eacc26b 1023 if (retval)
64c7f8cf
BG		 1024 goto fail_packet_manager_init;
1025
1026 retval = set_sched_resources(dqm);
4eacc26b 1027 if (retval)
64c7f8cf
BG		 1028 goto fail_set_sched_resources;
1029
79775b62 1030 pr_debug("Allocating fence memory\n");
64c7f8cf
BG		 1031
1032 /* allocate fence memory on the gart */
a86aa3ca
OG		 1033 retval = kfd_gtt_sa_allocate(dqm->dev, sizeof(*dqm->fence_addr),
1034 &dqm->fence_mem);
64c7f8cf 1035
4eacc26b 1036 if (retval)
64c7f8cf
BG		 1037 goto fail_allocate_vidmem;
1038
1039 dqm->fence_addr = dqm->fence_mem->cpu_ptr;
1040 dqm->fence_gpu_addr = dqm->fence_mem->gpu_addr;
2249d558
AL		 1041
1042 init_interrupts(dqm);
1043
ac30c783 1044 mutex_lock(&dqm->lock);
c4744e24 1045 execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
ac30c783 1046 mutex_unlock(&dqm->lock);
64c7f8cf
BG		 1047
1048 return 0;
1049fail_allocate_vidmem:
1050fail_set_sched_resources:
1051 pm_uninit(&dqm->packets);
1052fail_packet_manager_init:
1053 return retval;
1054}
1055
1056static int stop_cpsch(struct device_queue_manager *dqm)
1057{
ac30c783 1058 mutex_lock(&dqm->lock);
4465f466 1059 unmap_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 0);
ac30c783 1060 mutex_unlock(&dqm->lock);
64c7f8cf 1061
a86aa3ca 1062 kfd_gtt_sa_free(dqm->dev, dqm->fence_mem);
64c7f8cf
BG		 1063 pm_uninit(&dqm->packets);
1064
1065 return 0;
1066}
1067
1068static int create_kernel_queue_cpsch(struct device_queue_manager *dqm,
1069 struct kernel_queue *kq,
1070 struct qcm_process_device *qpd)
1071{
64c7f8cf 1072 mutex_lock(&dqm->lock);
b8cbab04 1073 if (dqm->total_queue_count >= max_num_of_queues_per_device) {
79775b62 1074 pr_warn("Can't create new kernel queue because %d queues were already created\n",
b8cbab04
OG		 1075 dqm->total_queue_count);
1076 mutex_unlock(&dqm->lock);
1077 return -EPERM;
1078 }
1079
1080 /*
1081 * Unconditionally increment this counter, regardless of the queue's
1082 * type or whether the queue is active.
1083 */
1084 dqm->total_queue_count++;
1085 pr_debug("Total of %d queues are accountable so far\n",
1086 dqm->total_queue_count);
1087
64c7f8cf
BG		 1088 list_add(&kq->list, &qpd->priv_queue_list);
1089 dqm->queue_count++;
1090 qpd->is_debug = true;
c4744e24 1091 execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
64c7f8cf
BG		 1092 mutex_unlock(&dqm->lock);
1093
1094 return 0;
1095}
1096
1097static void destroy_kernel_queue_cpsch(struct device_queue_manager *dqm,
1098 struct kernel_queue *kq,
1099 struct qcm_process_device *qpd)
1100{
64c7f8cf 1101 mutex_lock(&dqm->lock);
64c7f8cf
BG		 1102 list_del(&kq->list);
1103 dqm->queue_count--;
1104 qpd->is_debug = false;
c4744e24 1105 execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 0);
b8cbab04
OG		 1106 /*
1107 * Unconditionally decrement this counter, regardless of the queue's
1108 * type.
1109 */
8b58f261 1110 dqm->total_queue_count--;
b8cbab04
OG		 1111 pr_debug("Total of %d queues are accountable so far\n",
1112 dqm->total_queue_count);
64c7f8cf
BG		 1113 mutex_unlock(&dqm->lock);
1114}
1115
1116static int create_queue_cpsch(struct device_queue_manager *dqm, struct queue *q,
b46cb7d7 1117 struct qcm_process_device *qpd)
64c7f8cf
BG		 1118{
1119 int retval;
1120 struct mqd_manager *mqd;
1121
64c7f8cf
BG		 1122 retval = 0;
1123
64c7f8cf
BG		 1124 mutex_lock(&dqm->lock);
1125
b8cbab04 1126 if (dqm->total_queue_count >= max_num_of_queues_per_device) {
79775b62 1127 pr_warn("Can't create new usermode queue because %d queues were already created\n",
b8cbab04
OG		 1128 dqm->total_queue_count);
1129 retval = -EPERM;
72a01d23 1130 goto out_unlock;
b8cbab04
OG		 1131 }
1132
e139cd2a 1133 if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
1134 retval = allocate_sdma_queue(dqm, &q->sdma_id);
894a8293 1135 if (retval)
72a01d23 1136 goto out_unlock;
e139cd2a 1137 q->properties.sdma_queue_id =
1138 q->sdma_id / CIK_SDMA_QUEUES_PER_ENGINE;
1139 q->properties.sdma_engine_id =
1140 q->sdma_id % CIK_SDMA_QUEUES_PER_ENGINE;
1141 }
ef568db7
FK		 1142
1143 retval = allocate_doorbell(qpd, q);
1144 if (retval)
1145 goto out_deallocate_sdma_queue;
1146
45c9a5e4 1147 mqd = dqm->ops.get_mqd_manager(dqm,
bcea3081
BG		 1148 get_mqd_type_from_queue_type(q->properties.type));
1149
4eacc26b 1150 if (!mqd) {
ab7c1648 1151 retval = -ENOMEM;
ef568db7 1152 goto out_deallocate_doorbell;
64c7f8cf 1153 }
26103436
FK		 1154 /*
1155 * Eviction state logic: we only mark active queues as evicted
1156 * to avoid the overhead of restoring inactive queues later
1157 */
1158 if (qpd->evicted)
1159 q->properties.is_evicted = (q->properties.queue_size > 0 &&
1160 q->properties.queue_percent > 0 &&
1161 q->properties.queue_address != 0);
64c7f8cf 1162
bfd5e378 1163 dqm->asic_ops.init_sdma_vm(dqm, q, qpd);
373d7080
FK		 1164
1165 q->properties.tba_addr = qpd->tba_addr;
1166 q->properties.tma_addr = qpd->tma_addr;
64c7f8cf
BG		 1167 retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj,
1168 &q->gart_mqd_addr, &q->properties);
4eacc26b 1169 if (retval)
ef568db7 1170 goto out_deallocate_doorbell;
64c7f8cf
BG		 1171
1172 list_add(&q->list, &qpd->queues_list);
bc920fd4 1173 qpd->queue_count++;
64c7f8cf
BG		 1174 if (q->properties.is_active) {
1175 dqm->queue_count++;
c4744e24
YZ		 1176 retval = execute_queues_cpsch(dqm,
1177 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
64c7f8cf
BG		 1178 }
1179
bcea3081 1180 if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
8eabaf54 1181 dqm->sdma_queue_count++;
b8cbab04
OG		 1182 /*
1183 * Unconditionally increment this counter, regardless of the queue's
1184 * type or whether the queue is active.
1185 */
1186 dqm->total_queue_count++;
1187
1188 pr_debug("Total of %d queues are accountable so far\n",
1189 dqm->total_queue_count);
1190
72a01d23
FK		 1191 mutex_unlock(&dqm->lock);
1192 return retval;
1193
ef568db7
FK		 1194out_deallocate_doorbell:
1195 deallocate_doorbell(qpd, q);
72a01d23
FK		 1196out_deallocate_sdma_queue:
1197 if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
1198 deallocate_sdma_queue(dqm, q->sdma_id);
1199out_unlock:
64c7f8cf
BG		 1200 mutex_unlock(&dqm->lock);
1201 return retval;
1202}
1203
788bf83d 1204int amdkfd_fence_wait_timeout(unsigned int *fence_addr,
d80d19bd 1205 unsigned int fence_value,
8c72c3d7 1206 unsigned int timeout_ms)
64c7f8cf 1207{
8c72c3d7 1208 unsigned long end_jiffies = msecs_to_jiffies(timeout_ms) + jiffies;
64c7f8cf
BG		 1209
1210 while (*fence_addr != fence_value) {
8c72c3d7 1211 if (time_after(jiffies, end_jiffies)) {
79775b62 1212 pr_err("qcm fence wait loop timeout expired\n");
64c7f8cf
BG		 1213 return -ETIME;
1214 }
99331a51 1215 schedule();
64c7f8cf
BG		 1216 }
1217
1218 return 0;
1219}
1220
7da2bcf8 1221static int unmap_sdma_queues(struct device_queue_manager *dqm,
bcea3081
BG		 1222 unsigned int sdma_engine)
1223{
1224 return pm_send_unmap_queue(&dqm->packets, KFD_QUEUE_TYPE_SDMA,
7da2bcf8 1225 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0, false,
bcea3081
BG		 1226 sdma_engine);
1227}
1228
60a00956
FK		 1229/* dqm->lock mutex has to be locked before calling this function */
1230static int map_queues_cpsch(struct device_queue_manager *dqm)
1231{
1232 int retval;
1233
1234 if (dqm->queue_count <= 0 || dqm->processes_count <= 0)
1235 return 0;
1236
1237 if (dqm->active_runlist)
1238 return 0;
1239
1240 retval = pm_send_runlist(&dqm->packets, &dqm->queues);
1241 if (retval) {
1242 pr_err("failed to execute runlist\n");
1243 return retval;
1244 }
1245 dqm->active_runlist = true;
1246
1247 return retval;
1248}
1249
ac30c783 1250/* dqm->lock mutex has to be locked before calling this function */
7da2bcf8 1251static int unmap_queues_cpsch(struct device_queue_manager *dqm,
4465f466
YZ		 1252 enum kfd_unmap_queues_filter filter,
1253 uint32_t filter_param)
64c7f8cf 1254{
9fd3f1bf 1255 int retval = 0;
64c7f8cf 1256
991ca8ee 1257 if (!dqm->active_runlist)
ac30c783 1258 return retval;
bcea3081 1259
79775b62 1260 pr_debug("Before destroying queues, sdma queue count is : %u\n",
bcea3081
BG		 1261 dqm->sdma_queue_count);
1262
1263 if (dqm->sdma_queue_count > 0) {
7da2bcf8
YZ		 1264 unmap_sdma_queues(dqm, 0);
1265 unmap_sdma_queues(dqm, 1);
bcea3081
BG		 1266 }
1267
64c7f8cf 1268 retval = pm_send_unmap_queue(&dqm->packets, KFD_QUEUE_TYPE_COMPUTE,
4465f466 1269 filter, filter_param, false, 0);
4eacc26b 1270 if (retval)
ac30c783 1271 return retval;
64c7f8cf
BG		 1272
1273 *dqm->fence_addr = KFD_FENCE_INIT;
1274 pm_send_query_status(&dqm->packets, dqm->fence_gpu_addr,
1275 KFD_FENCE_COMPLETED);
1276 /* should be timed out */
c3447e81 1277 retval = amdkfd_fence_wait_timeout(dqm->fence_addr, KFD_FENCE_COMPLETED,
64c7f8cf 1278 QUEUE_PREEMPT_DEFAULT_TIMEOUT_MS);
9fd3f1bf 1279 if (retval)
ac30c783 1280 return retval;
9fd3f1bf 1281
64c7f8cf
BG		 1282 pm_release_ib(&dqm->packets);
1283 dqm->active_runlist = false;
1284
64c7f8cf
BG		 1285 return retval;
1286}
1287
ac30c783 1288/* dqm->lock mutex has to be locked before calling this function */
c4744e24
YZ		 1289static int execute_queues_cpsch(struct device_queue_manager *dqm,
1290 enum kfd_unmap_queues_filter filter,
1291 uint32_t filter_param)
64c7f8cf
BG		 1292{
1293 int retval;
1294
c4744e24 1295 retval = unmap_queues_cpsch(dqm, filter, filter_param);
4eacc26b 1296 if (retval) {
c4744e24 1297 pr_err("The cp might be in an unrecoverable state due to an unsuccessful queues preemption\n");
ac30c783 1298 return retval;
64c7f8cf
BG		 1299 }
1300
60a00956 1301 return map_queues_cpsch(dqm);
64c7f8cf
BG		 1302}
1303
1304static int destroy_queue_cpsch(struct device_queue_manager *dqm,
1305 struct qcm_process_device *qpd,
1306 struct queue *q)
1307{
1308 int retval;
1309 struct mqd_manager *mqd;
992839ad 1310 bool preempt_all_queues;
64c7f8cf 1311
992839ad
YS		 1312 preempt_all_queues = false;
1313
64c7f8cf
BG		 1314 retval = 0;
1315
1316 /* remove queue from list to prevent rescheduling after preemption */
1317 mutex_lock(&dqm->lock);
992839ad
YS		 1318
1319 if (qpd->is_debug) {
1320 /*
1321 * error, currently we do not allow to destroy a queue
1322 * of a currently debugged process
1323 */
1324 retval = -EBUSY;
1325 goto failed_try_destroy_debugged_queue;
1326
1327 }
1328
45c9a5e4 1329 mqd = dqm->ops.get_mqd_manager(dqm,
bcea3081 1330 get_mqd_type_from_queue_type(q->properties.type));
64c7f8cf
BG		 1331 if (!mqd) {
1332 retval = -ENOMEM;
1333 goto failed;
1334 }
1335
ef568db7
FK		 1336 deallocate_doorbell(qpd, q);
1337
e139cd2a 1338 if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
bcea3081 1339 dqm->sdma_queue_count--;
e139cd2a 1340 deallocate_sdma_queue(dqm, q->sdma_id);
1341 }
bcea3081 1342
64c7f8cf 1343 list_del(&q->list);
bc920fd4 1344 qpd->queue_count--;
40a526dc 1345 if (q->properties.is_active) {
b6819cec 1346 dqm->queue_count--;
40a526dc 1347 retval = execute_queues_cpsch(dqm,
9fd3f1bf 1348 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
40a526dc
YZ		 1349 if (retval == -ETIME)
1350 qpd->reset_wavefronts = true;
1351 }
64c7f8cf
BG		 1352
1353 mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
b8cbab04
OG		 1354
1355 /*
1356 * Unconditionally decrement this counter, regardless of the queue's
1357 * type
1358 */
1359 dqm->total_queue_count--;
1360 pr_debug("Total of %d queues are accountable so far\n",
1361 dqm->total_queue_count);
64c7f8cf
BG		 1362
1363 mutex_unlock(&dqm->lock);
1364
9e827224 1365 return retval;
64c7f8cf
BG		 1366
1367failed:
992839ad
YS		 1368failed_try_destroy_debugged_queue:
1369
64c7f8cf
BG		 1370 mutex_unlock(&dqm->lock);
1371 return retval;
1372}
1373
1374/*
1375 * Low bits must be 0000/FFFF as required by HW, high bits must be 0 to
1376 * stay in user mode.
1377 */
1378#define APE1_FIXED_BITS_MASK 0xFFFF80000000FFFFULL
1379/* APE1 limit is inclusive and 64K aligned. */
1380#define APE1_LIMIT_ALIGNMENT 0xFFFF
1381
1382static bool set_cache_memory_policy(struct device_queue_manager *dqm,
1383 struct qcm_process_device *qpd,
1384 enum cache_policy default_policy,
1385 enum cache_policy alternate_policy,
1386 void __user *alternate_aperture_base,
1387 uint64_t alternate_aperture_size)
1388{
bed4f110
FK		 1389 bool retval = true;
1390
1391 if (!dqm->asic_ops.set_cache_memory_policy)
1392 return retval;
64c7f8cf 1393
64c7f8cf
BG		 1394 mutex_lock(&dqm->lock);
1395
1396 if (alternate_aperture_size == 0) {
1397 /* base > limit disables APE1 */
1398 qpd->sh_mem_ape1_base = 1;
1399 qpd->sh_mem_ape1_limit = 0;
1400 } else {
1401 /*
1402 * In FSA64, APE1_Base[63:0] = { 16{SH_MEM_APE1_BASE[31]},
1403 * SH_MEM_APE1_BASE[31:0], 0x0000 }
1404 * APE1_Limit[63:0] = { 16{SH_MEM_APE1_LIMIT[31]},
1405 * SH_MEM_APE1_LIMIT[31:0], 0xFFFF }
1406 * Verify that the base and size parameters can be
1407 * represented in this format and convert them.
1408 * Additionally restrict APE1 to user-mode addresses.
1409 */
1410
1411 uint64_t base = (uintptr_t)alternate_aperture_base;
1412 uint64_t limit = base + alternate_aperture_size - 1;
1413
ab7c1648
KR		 1414 if (limit <= base || (base & APE1_FIXED_BITS_MASK) != 0 ||
1415 (limit & APE1_FIXED_BITS_MASK) != APE1_LIMIT_ALIGNMENT) {
1416 retval = false;
64c7f8cf 1417 goto out;
ab7c1648 1418 }
64c7f8cf
BG		 1419
1420 qpd->sh_mem_ape1_base = base >> 16;
1421 qpd->sh_mem_ape1_limit = limit >> 16;
1422 }
1423
bfd5e378 1424 retval = dqm->asic_ops.set_cache_memory_policy(
a22fc854
BG		 1425 dqm,
1426 qpd,
1427 default_policy,
1428 alternate_policy,
1429 alternate_aperture_base,
1430 alternate_aperture_size);
64c7f8cf 1431
d146c5a7 1432 if ((dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS) && (qpd->vmid != 0))
64c7f8cf
BG		 1433 program_sh_mem_settings(dqm, qpd);
1434
79775b62 1435 pr_debug("sh_mem_config: 0x%x, ape1_base: 0x%x, ape1_limit: 0x%x\n",
64c7f8cf
BG		 1436 qpd->sh_mem_config, qpd->sh_mem_ape1_base,
1437 qpd->sh_mem_ape1_limit);
1438
64c7f8cf
BG		 1439out:
1440 mutex_unlock(&dqm->lock);
ab7c1648 1441 return retval;
64c7f8cf
BG		 1442}
1443
d7b9bd22
FK		 1444static int set_trap_handler(struct device_queue_manager *dqm,
1445 struct qcm_process_device *qpd,
1446 uint64_t tba_addr,
1447 uint64_t tma_addr)
1448{
1449 uint64_t *tma;
1450
1451 if (dqm->dev->cwsr_enabled) {
1452 /* Jump from CWSR trap handler to user trap */
1453 tma = (uint64_t *)(qpd->cwsr_kaddr + KFD_CWSR_TMA_OFFSET);
1454 tma[0] = tba_addr;
1455 tma[1] = tma_addr;
1456 } else {
1457 qpd->tba_addr = tba_addr;
1458 qpd->tma_addr = tma_addr;
1459 }
1460
1461 return 0;
1462}
1463
9fd3f1bf
FK		 1464static int process_termination_nocpsch(struct device_queue_manager *dqm,
1465 struct qcm_process_device *qpd)
1466{
1467 struct queue *q, *next;
1468 struct device_process_node *cur, *next_dpn;
1469 int retval = 0;
1470
1471 mutex_lock(&dqm->lock);
1472
1473 /* Clear all user mode queues */
1474 list_for_each_entry_safe(q, next, &qpd->queues_list, list) {
1475 int ret;
1476
1477 ret = destroy_queue_nocpsch_locked(dqm, qpd, q);
1478 if (ret)
1479 retval = ret;
1480 }
1481
1482 /* Unregister process */
1483 list_for_each_entry_safe(cur, next_dpn, &dqm->queues, list) {
1484 if (qpd == cur->qpd) {
1485 list_del(&cur->list);
1486 kfree(cur);
1487 dqm->processes_count--;
1488 break;
1489 }
1490 }
1491
1492 mutex_unlock(&dqm->lock);
1493 return retval;
1494}
1495
1496
1497static int process_termination_cpsch(struct device_queue_manager *dqm,
1498 struct qcm_process_device *qpd)
1499{
1500 int retval;
1501 struct queue *q, *next;
1502 struct kernel_queue *kq, *kq_next;
1503 struct mqd_manager *mqd;
1504 struct device_process_node *cur, *next_dpn;
1505 enum kfd_unmap_queues_filter filter =
1506 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES;
1507
1508 retval = 0;
1509
1510 mutex_lock(&dqm->lock);
1511
1512 /* Clean all kernel queues */
1513 list_for_each_entry_safe(kq, kq_next, &qpd->priv_queue_list, list) {
1514 list_del(&kq->list);
1515 dqm->queue_count--;
1516 qpd->is_debug = false;
1517 dqm->total_queue_count--;
1518 filter = KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES;
1519 }
1520
1521 /* Clear all user mode queues */
1522 list_for_each_entry(q, &qpd->queues_list, list) {
72a01d23 1523 if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
9fd3f1bf 1524 dqm->sdma_queue_count--;
72a01d23
FK		 1525 deallocate_sdma_queue(dqm, q->sdma_id);
1526 }
9fd3f1bf
FK		 1527
1528 if (q->properties.is_active)
1529 dqm->queue_count--;
1530
1531 dqm->total_queue_count--;
1532 }
1533
1534 /* Unregister process */
1535 list_for_each_entry_safe(cur, next_dpn, &dqm->queues, list) {
1536 if (qpd == cur->qpd) {
1537 list_del(&cur->list);
1538 kfree(cur);
1539 dqm->processes_count--;
1540 break;
1541 }
1542 }
1543
1544 retval = execute_queues_cpsch(dqm, filter, 0);
1545 if (retval || qpd->reset_wavefronts) {
1546 pr_warn("Resetting wave fronts (cpsch) on dev %p\n", dqm->dev);
1547 dbgdev_wave_reset_wavefronts(dqm->dev, qpd->pqm->process);
1548 qpd->reset_wavefronts = false;
1549 }
1550
1551 /* lastly, free mqd resources */
1552 list_for_each_entry_safe(q, next, &qpd->queues_list, list) {
1553 mqd = dqm->ops.get_mqd_manager(dqm,
1554 get_mqd_type_from_queue_type(q->properties.type));
1555 if (!mqd) {
1556 retval = -ENOMEM;
1557 goto out;
1558 }
1559 list_del(&q->list);
bc920fd4 1560 qpd->queue_count--;
9fd3f1bf
FK		 1561 mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
1562 }
1563
1564out:
1565 mutex_unlock(&dqm->lock);
1566 return retval;
1567}
1568
64c7f8cf
BG		 1569struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev)
1570{
1571 struct device_queue_manager *dqm;
1572
79775b62 1573 pr_debug("Loading device queue manager\n");
a22fc854 1574
dbf56ab1 1575 dqm = kzalloc(sizeof(*dqm), GFP_KERNEL);
64c7f8cf
BG		 1576 if (!dqm)
1577 return NULL;
1578
d146c5a7
FK		 1579 switch (dev->device_info->asic_family) {
1580 /* HWS is not available on Hawaii. */
1581 case CHIP_HAWAII:
1582 /* HWS depends on CWSR for timely dequeue. CWSR is not
1583 * available on Tonga.
1584 *
1585 * FIXME: This argument also applies to Kaveri.
1586 */
1587 case CHIP_TONGA:
1588 dqm->sched_policy = KFD_SCHED_POLICY_NO_HWS;
1589 break;
1590 default:
1591 dqm->sched_policy = sched_policy;
1592 break;
1593 }
1594
64c7f8cf 1595 dqm->dev = dev;
d146c5a7 1596 switch (dqm->sched_policy) {
64c7f8cf
BG		 1597 case KFD_SCHED_POLICY_HWS:
1598 case KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION:
1599 /* initialize dqm for cp scheduling */
45c9a5e4
OG		 1600 dqm->ops.create_queue = create_queue_cpsch;
1601 dqm->ops.initialize = initialize_cpsch;
1602 dqm->ops.start = start_cpsch;
1603 dqm->ops.stop = stop_cpsch;
1604 dqm->ops.destroy_queue = destroy_queue_cpsch;
1605 dqm->ops.update_queue = update_queue;
58dcd5bf
YZ		 1606 dqm->ops.get_mqd_manager = get_mqd_manager;
1607 dqm->ops.register_process = register_process;
1608 dqm->ops.unregister_process = unregister_process;
1609 dqm->ops.uninitialize = uninitialize;
45c9a5e4
OG		 1610 dqm->ops.create_kernel_queue = create_kernel_queue_cpsch;
1611 dqm->ops.destroy_kernel_queue = destroy_kernel_queue_cpsch;
1612 dqm->ops.set_cache_memory_policy = set_cache_memory_policy;
d7b9bd22 1613 dqm->ops.set_trap_handler = set_trap_handler;
9fd3f1bf 1614 dqm->ops.process_termination = process_termination_cpsch;
26103436
FK		 1615 dqm->ops.evict_process_queues = evict_process_queues_cpsch;
1616 dqm->ops.restore_process_queues = restore_process_queues_cpsch;
64c7f8cf
BG		 1617 break;
1618 case KFD_SCHED_POLICY_NO_HWS:
1619 /* initialize dqm for no cp scheduling */
45c9a5e4
OG		 1620 dqm->ops.start = start_nocpsch;
1621 dqm->ops.stop = stop_nocpsch;
1622 dqm->ops.create_queue = create_queue_nocpsch;
1623 dqm->ops.destroy_queue = destroy_queue_nocpsch;
1624 dqm->ops.update_queue = update_queue;
58dcd5bf
YZ		 1625 dqm->ops.get_mqd_manager = get_mqd_manager;
1626 dqm->ops.register_process = register_process;
1627 dqm->ops.unregister_process = unregister_process;
45c9a5e4 1628 dqm->ops.initialize = initialize_nocpsch;
58dcd5bf 1629 dqm->ops.uninitialize = uninitialize;
45c9a5e4 1630 dqm->ops.set_cache_memory_policy = set_cache_memory_policy;
d7b9bd22 1631 dqm->ops.set_trap_handler = set_trap_handler;
9fd3f1bf 1632 dqm->ops.process_termination = process_termination_nocpsch;
26103436
FK		 1633 dqm->ops.evict_process_queues = evict_process_queues_nocpsch;
1634 dqm->ops.restore_process_queues =
1635 restore_process_queues_nocpsch;
64c7f8cf
BG		 1636 break;
1637 default:
d146c5a7 1638 pr_err("Invalid scheduling policy %d\n", dqm->sched_policy);
32fa8219 1639 goto out_free;
64c7f8cf
BG		 1640 }
1641
a22fc854
BG		 1642 switch (dev->device_info->asic_family) {
1643 case CHIP_CARRIZO:
bfd5e378 1644 device_queue_manager_init_vi(&dqm->asic_ops);
300dec95
OG		 1645 break;
1646
a22fc854 1647 case CHIP_KAVERI:
bfd5e378 1648 device_queue_manager_init_cik(&dqm->asic_ops);
300dec95 1649 break;
97672cbe
FK		 1650
1651 case CHIP_HAWAII:
1652 device_queue_manager_init_cik_hawaii(&dqm->asic_ops);
1653 break;
1654
1655 case CHIP_TONGA:
1656 case CHIP_FIJI:
1657 case CHIP_POLARIS10:
1658 case CHIP_POLARIS11:
1659 device_queue_manager_init_vi_tonga(&dqm->asic_ops);
1660 break;
bed4f110
FK		 1661
1662 case CHIP_VEGA10:
1663 case CHIP_RAVEN:
1664 device_queue_manager_init_v9(&dqm->asic_ops);
1665 break;
e596b903
YZ		 1666 default:
1667 WARN(1, "Unexpected ASIC family %u",
1668 dev->device_info->asic_family);
1669 goto out_free;
a22fc854
BG		 1670 }
1671
32fa8219
FK		 1672 if (!dqm->ops.initialize(dqm))
1673 return dqm;
64c7f8cf 1674
32fa8219
FK		 1675out_free:
1676 kfree(dqm);
1677 return NULL;
64c7f8cf
BG		 1678}
1679
1680void device_queue_manager_uninit(struct device_queue_manager *dqm)
1681{
45c9a5e4 1682 dqm->ops.uninitialize(dqm);
64c7f8cf
BG		 1683 kfree(dqm);
1684}
851a645e
FK		 1685
1686#if defined(CONFIG_DEBUG_FS)
1687
1688static void seq_reg_dump(struct seq_file *m,
1689 uint32_t (*dump)[2], uint32_t n_regs)
1690{
1691 uint32_t i, count;
1692
1693 for (i = 0, count = 0; i < n_regs; i++) {
1694 if (count == 0 ||
1695 dump[i-1][0] + sizeof(uint32_t) != dump[i][0]) {
1696 seq_printf(m, "%s %08x: %08x",
1697 i ? "\n" : "",
1698 dump[i][0], dump[i][1]);
1699 count = 7;
1700 } else {
1701 seq_printf(m, " %08x", dump[i][1]);
1702 count--;
1703 }
1704 }
1705
1706 seq_puts(m, "\n");
1707}
1708
1709int dqm_debugfs_hqds(struct seq_file *m, void *data)
1710{
1711 struct device_queue_manager *dqm = data;
1712 uint32_t (*dump)[2], n_regs;
1713 int pipe, queue;
1714 int r = 0;
1715
24f48a42
OZ		 1716 r = dqm->dev->kfd2kgd->hqd_dump(dqm->dev->kgd,
1717 KFD_CIK_HIQ_PIPE, KFD_CIK_HIQ_QUEUE, &dump, &n_regs);
1718 if (!r) {
1719 seq_printf(m, " HIQ on MEC %d Pipe %d Queue %d\n",
1720 KFD_CIK_HIQ_PIPE/get_pipes_per_mec(dqm)+1,
1721 KFD_CIK_HIQ_PIPE%get_pipes_per_mec(dqm),
1722 KFD_CIK_HIQ_QUEUE);
1723 seq_reg_dump(m, dump, n_regs);
1724
1725 kfree(dump);
1726 }
1727
851a645e
FK		 1728 for (pipe = 0; pipe < get_pipes_per_mec(dqm); pipe++) {
1729 int pipe_offset = pipe * get_queues_per_pipe(dqm);
1730
1731 for (queue = 0; queue < get_queues_per_pipe(dqm); queue++) {
1732 if (!test_bit(pipe_offset + queue,
1733 dqm->dev->shared_resources.queue_bitmap))
1734 continue;
1735
1736 r = dqm->dev->kfd2kgd->hqd_dump(
1737 dqm->dev->kgd, pipe, queue, &dump, &n_regs);
1738 if (r)
1739 break;
1740
1741 seq_printf(m, " CP Pipe %d, Queue %d\n",
1742 pipe, queue);
1743 seq_reg_dump(m, dump, n_regs);
1744
1745 kfree(dump);
1746 }
1747 }
1748
1749 for (pipe = 0; pipe < CIK_SDMA_ENGINE_NUM; pipe++) {
1750 for (queue = 0; queue < CIK_SDMA_QUEUES_PER_ENGINE; queue++) {
1751 r = dqm->dev->kfd2kgd->hqd_sdma_dump(
1752 dqm->dev->kgd, pipe, queue, &dump, &n_regs);
1753 if (r)
1754 break;
1755
1756 seq_printf(m, " SDMA Engine %d, RLC %d\n",
1757 pipe, queue);
1758 seq_reg_dump(m, dump, n_regs);
1759
1760 kfree(dump);
1761 }
1762 }
1763
1764 return r;
1765}
1766
1767#endif
Linux 6.x block layer and io_uring tree(s)