Commit | Line | Data |
---|---|---|
6e99df57 BG |
1 | /* |
2 | * Copyright 2014 Advanced Micro Devices, Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | */ | |
22 | ||
23 | #ifndef CIK_REGS_H | |
24 | #define CIK_REGS_H | |
25 | ||
6e99df57 BG |
26 | /* if PTR32, these are the bases for scratch and lds */ |
27 | #define PRIVATE_BASE(x) ((x) << 0) /* scratch */ | |
28 | #define SHARED_BASE(x) ((x) << 16) /* LDS */ | |
6e99df57 | 29 | #define PTR32 (1 << 0) |
6e99df57 | 30 | #define ALIGNMENT_MODE(x) ((x) << 2) |
6e99df57 BG |
31 | #define SH_MEM_ALIGNMENT_MODE_UNALIGNED 3 |
32 | #define DEFAULT_MTYPE(x) ((x) << 4) | |
33 | #define APE1_MTYPE(x) ((x) << 7) | |
34 | ||
35 | /* valid for both DEFAULT_MTYPE and APE1_MTYPE */ | |
36 | #define MTYPE_CACHED 0 | |
37 | #define MTYPE_NONCACHED 3 | |
38 | ||
6e99df57 BG |
39 | #define DEFAULT_CP_HQD_PERSISTENT_STATE (0x33U << 8) |
40 | #define PRELOAD_REQ (1 << 0) | |
41 | ||
da73b9fb OG |
42 | #define MQD_CONTROL_PRIV_STATE_EN (1U << 8) |
43 | ||
44 | #define DEFAULT_MIN_IB_AVAIL_SIZE (3U << 20) | |
45 | ||
46 | #define IB_ATC_EN (1U << 23) | |
47 | ||
6e99df57 BG |
48 | #define QUANTUM_EN 1U |
49 | #define QUANTUM_SCALE_1MS (1U << 4) | |
50 | #define QUANTUM_DURATION(x) ((x) << 8) | |
51 | ||
6e99df57 | 52 | #define RPTR_BLOCK_SIZE(x) ((x) << 8) |
6e99df57 | 53 | #define MIN_AVAIL_SIZE(x) ((x) << 20) |
6e99df57 BG |
54 | #define DEFAULT_RPTR_BLOCK_SIZE RPTR_BLOCK_SIZE(5) |
55 | #define DEFAULT_MIN_AVAIL_SIZE MIN_AVAIL_SIZE(3) | |
56 | ||
da73b9fb OG |
57 | #define PQ_ATC_EN (1 << 23) |
58 | #define NO_UPDATE_RPTR (1 << 27) | |
6e99df57 | 59 | |
da73b9fb OG |
60 | #define DOORBELL_OFFSET(x) ((x) << 2) |
61 | #define DOORBELL_EN (1 << 30) | |
6e99df57 | 62 | |
da73b9fb OG |
63 | #define PRIV_STATE (1 << 30) |
64 | #define KMD_QUEUE (1 << 31) | |
6e99df57 | 65 | |
da73b9fb | 66 | #define AQL_ENABLE 1 |
6e99df57 BG |
67 | |
68 | #define GRBM_GFX_INDEX 0x30800 | |
6e99df57 | 69 | |
6e99df57 BG |
70 | #define ATC_VMID_PASID_MAPPING_VALID (1U << 31) |
71 | ||
6e99df57 | 72 | #endif |