Commit | Line | Data |
---|---|---|
ab71ac56 XY |
1 | /* |
2 | * Copyright 2017 Advanced Micro Devices, Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | */ | |
22 | ||
23 | #ifndef __MXGPU_VI_H__ | |
24 | #define __MXGPU_VI_H__ | |
25 | ||
6e132ca0 | 26 | #define VI_MAILBOX_TIMEDOUT 12000 |
ab71ac56 XY |
27 | #define VI_MAILBOX_RESET_TIME 12 |
28 | ||
29 | /* VI mailbox messages request */ | |
30 | enum idh_request { | |
31 | IDH_REQ_GPU_INIT_ACCESS = 1, | |
32 | IDH_REL_GPU_INIT_ACCESS, | |
33 | IDH_REQ_GPU_FINI_ACCESS, | |
34 | IDH_REL_GPU_FINI_ACCESS, | |
89041940 GW |
35 | IDH_REQ_GPU_RESET_ACCESS, |
36 | ||
37 | IDH_LOG_VF_ERROR = 200, | |
ab71ac56 XY |
38 | }; |
39 | ||
40 | /* VI mailbox messages data */ | |
41 | enum idh_event { | |
42 | IDH_CLR_MSG_BUF = 0, | |
43 | IDH_READY_TO_ACCESS_GPU, | |
44 | IDH_FLR_NOTIFICATION, | |
45 | IDH_FLR_NOTIFICATION_CMPL, | |
46 | IDH_EVENT_MAX | |
47 | }; | |
48 | ||
49 | extern const struct amdgpu_virt_ops xgpu_vi_virt_ops; | |
50 | ||
51 | void xgpu_vi_init_golden_registers(struct amdgpu_device *adev); | |
52 | void xgpu_vi_mailbox_set_irq_funcs(struct amdgpu_device *adev); | |
53 | int xgpu_vi_mailbox_add_irq_id(struct amdgpu_device *adev); | |
54 | int xgpu_vi_mailbox_get_irq(struct amdgpu_device *adev); | |
55 | void xgpu_vi_mailbox_put_irq(struct amdgpu_device *adev); | |
56 | ||
57 | #endif |