[linux-block.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_xgmi.c

/*
 * Copyright 2018 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 *
 */
#include <linux/list.h>
#include "amdgpu.h"
#include "amdgpu_xgmi.h"
#include "amdgpu_smu.h"


static DEFINE_MUTEX(xgmi_mutex);

#define AMDGPU_MAX_XGMI_HIVE			8
#define AMDGPU_MAX_XGMI_DEVICE_PER_HIVE		4

static struct amdgpu_hive_info xgmi_hives[AMDGPU_MAX_XGMI_HIVE];
static unsigned hive_count = 0;

void *amdgpu_xgmi_hive_try_lock(struct amdgpu_hive_info *hive)
{
	return &hive->device_list;
}

/**
 * DOC: AMDGPU XGMI Support
 *
 * XGMI is a high speed interconnect that joins multiple GPU cards
 * into a homogeneous memory space that is organized by a collective
 * hive ID and individual node IDs, both of which are 64-bit numbers.
 *
 * The file xgmi_device_id contains the unique per GPU device ID and
 * is stored in the /sys/class/drm/card${cardno}/device/ directory.
 *
 * Inside the device directory a sub-directory 'xgmi_hive_info' is
 * created which contains the hive ID and the list of nodes.
 *
 * The hive ID is stored in:
 *   /sys/class/drm/card${cardno}/device/xgmi_hive_info/xgmi_hive_id
 *
 * The node information is stored in numbered directories:
 *   /sys/class/drm/card${cardno}/device/xgmi_hive_info/node${nodeno}/xgmi_device_id
 *
 * Each device has their own xgmi_hive_info direction with a mirror
 * set of node sub-directories.
 *
 * The XGMI memory space is built by contiguously adding the power of
 * two padded VRAM space from each node to each other.
 *
 */


static ssize_t amdgpu_xgmi_show_hive_id(struct device *dev,
		struct device_attribute *attr, char *buf)
{
	struct amdgpu_hive_info *hive =
			container_of(attr, struct amdgpu_hive_info, dev_attr);

	return snprintf(buf, PAGE_SIZE, "%llu\n", hive->hive_id);
}

static int amdgpu_xgmi_sysfs_create(struct amdgpu_device *adev,
				    struct amdgpu_hive_info *hive)
{
	int ret = 0;

	if (WARN_ON(hive->kobj))
		return -EINVAL;

	hive->kobj = kobject_create_and_add("xgmi_hive_info", &adev->dev->kobj);
	if (!hive->kobj) {
		dev_err(adev->dev, "XGMI: Failed to allocate sysfs entry!\n");
		return -EINVAL;
	}

	hive->dev_attr = (struct device_attribute) {
		.attr = {
			.name = "xgmi_hive_id",
			.mode = S_IRUGO,

		},
		.show = amdgpu_xgmi_show_hive_id,
	};

	ret = sysfs_create_file(hive->kobj, &hive->dev_attr.attr);
	if (ret) {
		dev_err(adev->dev, "XGMI: Failed to create device file xgmi_hive_id\n");
		kobject_del(hive->kobj);
		kobject_put(hive->kobj);
		hive->kobj = NULL;
	}

	return ret;
}

static void amdgpu_xgmi_sysfs_destroy(struct amdgpu_device *adev,
				    struct amdgpu_hive_info *hive)
{
	sysfs_remove_file(hive->kobj, &hive->dev_attr.attr);
	kobject_del(hive->kobj);
	kobject_put(hive->kobj);
	hive->kobj = NULL;
}

static ssize_t amdgpu_xgmi_show_device_id(struct device *dev,
				     struct device_attribute *attr,
				     char *buf)
{
	struct drm_device *ddev = dev_get_drvdata(dev);
	struct amdgpu_device *adev = ddev->dev_private;

	return snprintf(buf, PAGE_SIZE, "%llu\n", adev->gmc.xgmi.node_id);

}


static DEVICE_ATTR(xgmi_device_id, S_IRUGO, amdgpu_xgmi_show_device_id, NULL);


static int amdgpu_xgmi_sysfs_add_dev_info(struct amdgpu_device *adev,
					 struct amdgpu_hive_info *hive)
{
	int ret = 0;
	char node[10] = { 0 };

	/* Create xgmi device id file */
	ret = device_create_file(adev->dev, &dev_attr_xgmi_device_id);
	if (ret) {
		dev_err(adev->dev, "XGMI: Failed to create device file xgmi_device_id\n");
		return ret;
	}

	/* Create sysfs link to hive info folder on the first device */
	if (adev != hive->adev) {
		ret = sysfs_create_link(&adev->dev->kobj, hive->kobj,
					"xgmi_hive_info");
		if (ret) {
			dev_err(adev->dev, "XGMI: Failed to create link to hive info");
			goto remove_file;
		}
	}

	sprintf(node, "node%d", hive->number_devices);
	/* Create sysfs link form the hive folder to yourself */
	ret = sysfs_create_link(hive->kobj, &adev->dev->kobj, node);
	if (ret) {
		dev_err(adev->dev, "XGMI: Failed to create link from hive info");
		goto remove_link;
	}

	goto success;


remove_link:
	sysfs_remove_link(&adev->dev->kobj, adev->ddev->unique);

remove_file:
	device_remove_file(adev->dev, &dev_attr_xgmi_device_id);

success:
	return ret;
}

static void amdgpu_xgmi_sysfs_rem_dev_info(struct amdgpu_device *adev,
					  struct amdgpu_hive_info *hive)
{
	device_remove_file(adev->dev, &dev_attr_xgmi_device_id);
	sysfs_remove_link(&adev->dev->kobj, adev->ddev->unique);
	sysfs_remove_link(hive->kobj, adev->ddev->unique);
}


struct amdgpu_hive_info *amdgpu_get_xgmi_hive(struct amdgpu_device *adev, int lock)
{
	int i;
	struct amdgpu_hive_info *tmp;

	if (!adev->gmc.xgmi.hive_id)
		return NULL;

	mutex_lock(&xgmi_mutex);

	for (i = 0 ; i < hive_count; ++i) {
		tmp = &xgmi_hives[i];
		if (tmp->hive_id == adev->gmc.xgmi.hive_id) {
			if (lock)
				mutex_lock(&tmp->hive_lock);
			mutex_unlock(&xgmi_mutex);
			return tmp;
		}
	}
	if (i >= AMDGPU_MAX_XGMI_HIVE) {
		mutex_unlock(&xgmi_mutex);
		return NULL;
	}

	/* initialize new hive if not exist */
	tmp = &xgmi_hives[hive_count++];

	if (amdgpu_xgmi_sysfs_create(adev, tmp)) {
		mutex_unlock(&xgmi_mutex);
		return NULL;
	}

	tmp->adev = adev;
	tmp->hive_id = adev->gmc.xgmi.hive_id;
	INIT_LIST_HEAD(&tmp->device_list);
	mutex_init(&tmp->hive_lock);
	mutex_init(&tmp->reset_lock);

	if (lock)
		mutex_lock(&tmp->hive_lock);
	tmp->pstate = -1;
	mutex_unlock(&xgmi_mutex);

	return tmp;
}

int amdgpu_xgmi_set_pstate(struct amdgpu_device *adev, int pstate)
{
	int ret = 0;
	struct amdgpu_hive_info *hive = amdgpu_get_xgmi_hive(adev, 0);

	if (!hive)
		return 0;

	if (hive->pstate == pstate)
		return 0;

	dev_dbg(adev->dev, "Set xgmi pstate %d.\n", pstate);

	if (is_support_sw_smu_xgmi(adev))
		ret = smu_set_xgmi_pstate(&adev->smu, pstate);
	if (ret)
		dev_err(adev->dev,
			"XGMI: Set pstate failure on device %llx, hive %llx, ret %d",
			adev->gmc.xgmi.node_id,
			adev->gmc.xgmi.hive_id, ret);

	return ret;
}

int amdgpu_xgmi_update_topology(struct amdgpu_hive_info *hive, struct amdgpu_device *adev)
{
	int ret = -EINVAL;

	/* Each psp need to set the latest topology */
	ret = psp_xgmi_set_topology_info(&adev->psp,
					 hive->number_devices,
					 &adev->psp.xgmi_context.top_info);
	if (ret)
		dev_err(adev->dev,
			"XGMI: Set topology failure on device %llx, hive %llx, ret %d",
			adev->gmc.xgmi.node_id,
			adev->gmc.xgmi.hive_id, ret);

	return ret;
}


int amdgpu_xgmi_get_hops_count(struct amdgpu_device *adev,
		struct amdgpu_device *peer_adev)
{
	struct psp_xgmi_topology_info *top = &adev->psp.xgmi_context.top_info;
	int i;

	for (i = 0 ; i < top->num_nodes; ++i)
		if (top->nodes[i].node_id == peer_adev->gmc.xgmi.node_id)
			return top->nodes[i].num_hops;
	return	-EINVAL;
}

int amdgpu_xgmi_add_device(struct amdgpu_device *adev)
{
	struct psp_xgmi_topology_info *top_info;
	struct amdgpu_hive_info *hive;
	struct amdgpu_xgmi	*entry;
	struct amdgpu_device *tmp_adev = NULL;

	int count = 0, ret = 0;

	if (!adev->gmc.xgmi.supported)
		return 0;

	if (amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_PSP)) {
		ret = psp_xgmi_get_hive_id(&adev->psp, &adev->gmc.xgmi.hive_id);
		if (ret) {
			dev_err(adev->dev,
				"XGMI: Failed to get hive id\n");
			return ret;
		}

		ret = psp_xgmi_get_node_id(&adev->psp, &adev->gmc.xgmi.node_id);
		if (ret) {
			dev_err(adev->dev,
				"XGMI: Failed to get node id\n");
			return ret;
		}
	} else {
		adev->gmc.xgmi.hive_id = 16;
		adev->gmc.xgmi.node_id = adev->gmc.xgmi.physical_node_id + 16;
	}

	hive = amdgpu_get_xgmi_hive(adev, 1);
	if (!hive) {
		ret = -EINVAL;
		dev_err(adev->dev,
			"XGMI: node 0x%llx, can not match hive 0x%llx in the hive list.\n",
			adev->gmc.xgmi.node_id, adev->gmc.xgmi.hive_id);
		goto exit;
	}

	top_info = &adev->psp.xgmi_context.top_info;

	list_add_tail(&adev->gmc.xgmi.head, &hive->device_list);
	list_for_each_entry(entry, &hive->device_list, head)
		top_info->nodes[count++].node_id = entry->node_id;
	top_info->num_nodes = count;
	hive->number_devices = count;

	if (amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_PSP)) {
		list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) {
			/* update node list for other device in the hive */
			if (tmp_adev != adev) {
				top_info = &tmp_adev->psp.xgmi_context.top_info;
				top_info->nodes[count - 1].node_id =
					adev->gmc.xgmi.node_id;
				top_info->num_nodes = count;
			}
			ret = amdgpu_xgmi_update_topology(hive, tmp_adev);
			if (ret)
				goto exit;
		}

		/* get latest topology info for each device from psp */
		list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) {
			ret = psp_xgmi_get_topology_info(&tmp_adev->psp, count,
					&tmp_adev->psp.xgmi_context.top_info);
			if (ret) {
				dev_err(tmp_adev->dev,
					"XGMI: Get topology failure on device %llx, hive %llx, ret %d",
					tmp_adev->gmc.xgmi.node_id,
					tmp_adev->gmc.xgmi.hive_id, ret);
				/* To do : continue with some node failed or disable the whole hive */
				goto exit;
			}
		}
	}

	if (!ret)
		ret = amdgpu_xgmi_sysfs_add_dev_info(adev, hive);


	mutex_unlock(&hive->hive_lock);
exit:
	if (!ret)
		dev_info(adev->dev, "XGMI: Add node %d, hive 0x%llx.\n",
			 adev->gmc.xgmi.physical_node_id, adev->gmc.xgmi.hive_id);
	else
		dev_err(adev->dev, "XGMI: Failed to add node %d, hive 0x%llx ret: %d\n",
			adev->gmc.xgmi.physical_node_id, adev->gmc.xgmi.hive_id,
			ret);

	return ret;
}

void amdgpu_xgmi_remove_device(struct amdgpu_device *adev)
{
	struct amdgpu_hive_info *hive;

	if (!adev->gmc.xgmi.supported)
		return;

	hive = amdgpu_get_xgmi_hive(adev, 1);
	if (!hive)
		return;

	if (!(hive->number_devices--)) {
		amdgpu_xgmi_sysfs_destroy(adev, hive);
		mutex_destroy(&hive->hive_lock);
		mutex_destroy(&hive->reset_lock);
	} else {
		amdgpu_xgmi_sysfs_rem_dev_info(adev, hive);
		mutex_unlock(&hive->hive_lock);
	}
}
Commit	Line	Data
fb30fc59 SL	1	/*
	2	* Copyright 2018 Advanced Micro Devices, Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	*
	23	*/
	24	#include <linux/list.h>
	25	#include "amdgpu.h"
5183411b	26	#include "amdgpu_xgmi.h"
93abb05f	27	#include "amdgpu_smu.h"
fb30fc59 SL	28
	29
	30	static DEFINE_MUTEX(xgmi_mutex);
	31
	32	#define AMDGPU_MAX_XGMI_HIVE 8
	33	#define AMDGPU_MAX_XGMI_DEVICE_PER_HIVE 4
	34
fb30fc59 SL	35	static struct amdgpu_hive_info xgmi_hives[AMDGPU_MAX_XGMI_HIVE];
	36	static unsigned hive_count = 0;
	37
ed2bf522 AG	38	void amdgpu_xgmi_hive_try_lock(struct amdgpu_hive_info hive)
	39	{
	40	return &hive->device_list;
	41	}
	42
1c1e53f7 TSD	43	/**
	44	* DOC: AMDGPU XGMI Support
	45	*
	46	* XGMI is a high speed interconnect that joins multiple GPU cards
	47	* into a homogeneous memory space that is organized by a collective
	48	* hive ID and individual node IDs, both of which are 64-bit numbers.
	49	*
	50	* The file xgmi_device_id contains the unique per GPU device ID and
	51	* is stored in the /sys/class/drm/card${cardno}/device/ directory.
	52	*
	53	* Inside the device directory a sub-directory 'xgmi_hive_info' is
	54	* created which contains the hive ID and the list of nodes.
	55	*
	56	* The hive ID is stored in:
	57	* /sys/class/drm/card${cardno}/device/xgmi_hive_info/xgmi_hive_id
	58	*
	59	* The node information is stored in numbered directories:
	60	* /sys/class/drm/card${cardno}/device/xgmi_hive_info/node${nodeno}/xgmi_device_id
	61	*
	62	* Each device has their own xgmi_hive_info direction with a mirror
	63	* set of node sub-directories.
	64	*
	65	* The XGMI memory space is built by contiguously adding the power of
	66	* two padded VRAM space from each node to each other.
	67	*
	68	*/
	69
	70
b1fa8c89 AG	71	static ssize_t amdgpu_xgmi_show_hive_id(struct device *dev,
	72	struct device_attribute attr, char buf)
	73	{
	74	struct amdgpu_hive_info *hive =
	75	container_of(attr, struct amdgpu_hive_info, dev_attr);
	76
	77	return snprintf(buf, PAGE_SIZE, "%llu\n", hive->hive_id);
	78	}
	79
	80	static int amdgpu_xgmi_sysfs_create(struct amdgpu_device *adev,
	81	struct amdgpu_hive_info *hive)
	82	{
	83	int ret = 0;
	84
	85	if (WARN_ON(hive->kobj))
	86	return -EINVAL;
	87
	88	hive->kobj = kobject_create_and_add("xgmi_hive_info", &adev->dev->kobj);
	89	if (!hive->kobj) {
	90	dev_err(adev->dev, "XGMI: Failed to allocate sysfs entry!\n");
	91	return -EINVAL;
	92	}
	93
	94	hive->dev_attr = (struct device_attribute) {
	95	.attr = {
	96	.name = "xgmi_hive_id",
	97	.mode = S_IRUGO,
	98
	99	},
	100	.show = amdgpu_xgmi_show_hive_id,
	101	};
	102
	103	ret = sysfs_create_file(hive->kobj, &hive->dev_attr.attr);
	104	if (ret) {
	105	dev_err(adev->dev, "XGMI: Failed to create device file xgmi_hive_id\n");
	106	kobject_del(hive->kobj);
	107	kobject_put(hive->kobj);
	108	hive->kobj = NULL;
	109	}
	110
	111	return ret;
	112	}
	113
	114	static void amdgpu_xgmi_sysfs_destroy(struct amdgpu_device *adev,
	115	struct amdgpu_hive_info *hive)
	116	{
	117	sysfs_remove_file(hive->kobj, &hive->dev_attr.attr);
	118	kobject_del(hive->kobj);
	119	kobject_put(hive->kobj);
	120	hive->kobj = NULL;
	121	}
	122
	123	static ssize_t amdgpu_xgmi_show_device_id(struct device *dev,
	124	struct device_attribute *attr,
	125	char *buf)
	126	{
	127	struct drm_device *ddev = dev_get_drvdata(dev);
	128	struct amdgpu_device *adev = ddev->dev_private;
	129
	130	return snprintf(buf, PAGE_SIZE, "%llu\n", adev->gmc.xgmi.node_id);
	131
	132	}
	133
	134
135	static DEVICE_ATTR(xgmi_device_id, S_IRUGO, amdgpu_xgmi_show_device_id, NULL);
136
137
138	static int amdgpu_xgmi_sysfs_add_dev_info(struct amdgpu_device *adev,
139	struct amdgpu_hive_info *hive)
140	{
141	int ret = 0;
142	char node[10] = { 0 };
143
144	/* Create xgmi device id file */
145	ret = device_create_file(adev->dev, &dev_attr_xgmi_device_id);
146	if (ret) {
147	dev_err(adev->dev, "XGMI: Failed to create device file xgmi_device_id\n");
148	return ret;
149	}
150
151	/* Create sysfs link to hive info folder on the first device */
152	if (adev != hive->adev) {
153	ret = sysfs_create_link(&adev->dev->kobj, hive->kobj,
154	"xgmi_hive_info");
155	if (ret) {
156	dev_err(adev->dev, "XGMI: Failed to create link to hive info");
157	goto remove_file;
158	}
159	}
160
161	sprintf(node, "node%d", hive->number_devices);
162	/* Create sysfs link form the hive folder to yourself */
163	ret = sysfs_create_link(hive->kobj, &adev->dev->kobj, node);
164	if (ret) {
165	dev_err(adev->dev, "XGMI: Failed to create link from hive info");
166	goto remove_link;
167	}
168
169	goto success;
170
171
172	remove_link:
173	sysfs_remove_link(&adev->dev->kobj, adev->ddev->unique);
174
175	remove_file:
176	device_remove_file(adev->dev, &dev_attr_xgmi_device_id);
177
178	success:
179	return ret;
180	}
181
182	static void amdgpu_xgmi_sysfs_rem_dev_info(struct amdgpu_device *adev,
183	struct amdgpu_hive_info *hive)
184	{
185	device_remove_file(adev->dev, &dev_attr_xgmi_device_id);
186	sysfs_remove_link(&adev->dev->kobj, adev->ddev->unique);
187	sysfs_remove_link(hive->kobj, adev->ddev->unique);
188	}
189
190
191
22d6575b	192	struct amdgpu_hive_info amdgpu_get_xgmi_hive(struct amdgpu_device adev, int lock)
fb30fc59 SL	193	{
	194	int i;
	195	struct amdgpu_hive_info *tmp;
	196
	197	if (!adev->gmc.xgmi.hive_id)
	198	return NULL;
22d6575b TSD	199
	200	mutex_lock(&xgmi_mutex);
	201
fb30fc59 SL	202	for (i = 0 ; i < hive_count; ++i) {
fb30fc59 SL	203	tmp = &xgmi_hives[i];
22d6575b TSD	204	if (tmp->hive_id == adev->gmc.xgmi.hive_id) {
	205	if (lock)
	206	mutex_lock(&tmp->hive_lock);
	207	mutex_unlock(&xgmi_mutex);
fb30fc59	208	return tmp;
22d6575b	209	}
fb30fc59	210	}
22d6575b TSD	211	if (i >= AMDGPU_MAX_XGMI_HIVE) {
22d6575b TSD	212	mutex_unlock(&xgmi_mutex);
fb30fc59	213	return NULL;
22d6575b	214	}
fb30fc59 SL	215
	216	/* initialize new hive if not exist */
	217	tmp = &xgmi_hives[hive_count++];
b1fa8c89 AG	218
	219	if (amdgpu_xgmi_sysfs_create(adev, tmp)) {
	220	mutex_unlock(&xgmi_mutex);
	221	return NULL;
	222	}
	223
	224	tmp->adev = adev;
fb30fc59 SL	225	tmp->hive_id = adev->gmc.xgmi.hive_id;
fb30fc59 SL	226	INIT_LIST_HEAD(&tmp->device_list);
ed2bf522	227	mutex_init(&tmp->hive_lock);
22d6575b	228	mutex_init(&tmp->reset_lock);
b1fa8c89	229
22d6575b TSD	230	if (lock)
22d6575b TSD	231	mutex_lock(&tmp->hive_lock);
df399b06	232	tmp->pstate = -1;
22d6575b	233	mutex_unlock(&xgmi_mutex);
ed2bf522	234
fb30fc59 SL	235	return tmp;
	236	}
	237
df399b06	238	int amdgpu_xgmi_set_pstate(struct amdgpu_device *adev, int pstate)
	239	{
	240	int ret = 0;
	241	struct amdgpu_hive_info *hive = amdgpu_get_xgmi_hive(adev, 0);
	242
	243	if (!hive)
	244	return 0;
	245
	246	if (hive->pstate == pstate)
	247	return 0;
93abb05f	248
	249	dev_dbg(adev->dev, "Set xgmi pstate %d.\n", pstate);
	250
54bd77f3	251	if (is_support_sw_smu_xgmi(adev))
93abb05f	252	ret = smu_set_xgmi_pstate(&adev->smu, pstate);
	253	if (ret)
	254	dev_err(adev->dev,
	255	"XGMI: Set pstate failure on device %llx, hive %llx, ret %d",
	256	adev->gmc.xgmi.node_id,
	257	adev->gmc.xgmi.hive_id, ret);
	258
df399b06	259	return ret;
	260	}
	261
5183411b AG	262	int amdgpu_xgmi_update_topology(struct amdgpu_hive_info hive, struct amdgpu_device adev)
	263	{
	264	int ret = -EINVAL;
	265
	266	/* Each psp need to set the latest topology */
	267	ret = psp_xgmi_set_topology_info(&adev->psp,
	268	hive->number_devices,
da361dd1	269	&adev->psp.xgmi_context.top_info);
5183411b AG	270	if (ret)
	271	dev_err(adev->dev,
	272	"XGMI: Set topology failure on device %llx, hive %llx, ret %d",
	273	adev->gmc.xgmi.node_id,
	274	adev->gmc.xgmi.hive_id, ret);
5183411b AG	275
	276	return ret;
	277	}
	278
da361dd1	279
	280	int amdgpu_xgmi_get_hops_count(struct amdgpu_device *adev,
	281	struct amdgpu_device *peer_adev)
	282	{
	283	struct psp_xgmi_topology_info *top = &adev->psp.xgmi_context.top_info;
	284	int i;
	285
	286	for (i = 0 ; i < top->num_nodes; ++i)
	287	if (top->nodes[i].node_id == peer_adev->gmc.xgmi.node_id)
	288	return top->nodes[i].num_hops;
	289	return -EINVAL;
	290	}
	291
fb30fc59 SL	292	int amdgpu_xgmi_add_device(struct amdgpu_device *adev)
fb30fc59 SL	293	{
da361dd1	294	struct psp_xgmi_topology_info *top_info;
fb30fc59 SL	295	struct amdgpu_hive_info *hive;
fb30fc59 SL	296	struct amdgpu_xgmi *entry;
5183411b	297	struct amdgpu_device *tmp_adev = NULL;
fb30fc59	298
75b2fce2	299	int count = 0, ret = 0;
fb30fc59	300
47622ba0	301	if (!adev->gmc.xgmi.supported)
fb30fc59	302	return 0;
47622ba0	303
2f2eab3a OZ	304	if (amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_PSP)) {
	305	ret = psp_xgmi_get_hive_id(&adev->psp, &adev->gmc.xgmi.hive_id);
	306	if (ret) {
	307	dev_err(adev->dev,
	308	"XGMI: Failed to get hive id\n");
	309	return ret;
	310	}
379c237e	311
2f2eab3a OZ	312	ret = psp_xgmi_get_node_id(&adev->psp, &adev->gmc.xgmi.node_id);
	313	if (ret) {
	314	dev_err(adev->dev,
	315	"XGMI: Failed to get node id\n");
	316	return ret;
	317	}
	318	} else {
	319	adev->gmc.xgmi.hive_id = 16;
	320	adev->gmc.xgmi.node_id = adev->gmc.xgmi.physical_node_id + 16;
379c237e	321	}
fb30fc59	322
22d6575b	323	hive = amdgpu_get_xgmi_hive(adev, 1);
36ca09a0	324	if (!hive) {
	325	ret = -EINVAL;
	326	dev_err(adev->dev,
c1219b94	327	"XGMI: node 0x%llx, can not match hive 0x%llx in the hive list.\n",
36ca09a0	328	adev->gmc.xgmi.node_id, adev->gmc.xgmi.hive_id);
fb30fc59	329	goto exit;
36ca09a0	330	}
fb30fc59	331
da361dd1	332	top_info = &adev->psp.xgmi_context.top_info;
5183411b	333
fb30fc59 SL	334	list_add_tail(&adev->gmc.xgmi.head, &hive->device_list);
fb30fc59 SL	335	list_for_each_entry(entry, &hive->device_list, head)
da361dd1	336	top_info->nodes[count++].node_id = entry->node_id;
e008299e	337	top_info->num_nodes = count;
5183411b	338	hive->number_devices = count;
fb30fc59	339
75b2fce2 LM	340	if (amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_PSP)) {
	341	list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) {
	342	/* update node list for other device in the hive */
	343	if (tmp_adev != adev) {
	344	top_info = &tmp_adev->psp.xgmi_context.top_info;
	345	top_info->nodes[count - 1].node_id =
	346	adev->gmc.xgmi.node_id;
	347	top_info->num_nodes = count;
	348	}
	349	ret = amdgpu_xgmi_update_topology(hive, tmp_adev);
	350	if (ret)
	351	goto exit;
e008299e	352	}
e008299e	353
75b2fce2 LM	354	/* get latest topology info for each device from psp */
	355	list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) {
	356	ret = psp_xgmi_get_topology_info(&tmp_adev->psp, count,
	357	&tmp_adev->psp.xgmi_context.top_info);
	358	if (ret) {
	359	dev_err(tmp_adev->dev,
	360	"XGMI: Get topology failure on device %llx, hive %llx, ret %d",
	361	tmp_adev->gmc.xgmi.node_id,
	362	tmp_adev->gmc.xgmi.hive_id, ret);
	363	/* To do : continue with some node failed or disable the whole hive */
	364	goto exit;
	365	}
a82c1566	366	}
fb30fc59	367	}
a82c1566	368
b1fa8c89 AG	369	if (!ret)
	370	ret = amdgpu_xgmi_sysfs_add_dev_info(adev, hive);
	371
e008299e	372
	373	mutex_unlock(&hive->hive_lock);
	374	exit:
b1fa8c89 AG	375	if (!ret)
	376	dev_info(adev->dev, "XGMI: Add node %d, hive 0x%llx.\n",
	377	adev->gmc.xgmi.physical_node_id, adev->gmc.xgmi.hive_id);
	378	else
	379	dev_err(adev->dev, "XGMI: Failed to add node %d, hive 0x%llx ret: %d\n",
	380	adev->gmc.xgmi.physical_node_id, adev->gmc.xgmi.hive_id,
	381	ret);
	382
fb30fc59 SL	383	return ret;
fb30fc59 SL	384	}
a82400b5 AG	385
	386	void amdgpu_xgmi_remove_device(struct amdgpu_device *adev)
	387	{
	388	struct amdgpu_hive_info *hive;
	389
	390	if (!adev->gmc.xgmi.supported)
	391	return;
	392
22d6575b	393	hive = amdgpu_get_xgmi_hive(adev, 1);
a82400b5	394	if (!hive)
22d6575b	395	return;
a82400b5	396
22d6575b	397	if (!(hive->number_devices--)) {
b1fa8c89	398	amdgpu_xgmi_sysfs_destroy(adev, hive);
a82400b5	399	mutex_destroy(&hive->hive_lock);
22d6575b TSD	400	mutex_destroy(&hive->reset_lock);
22d6575b TSD	401	} else {
b1fa8c89	402	amdgpu_xgmi_sysfs_rem_dev_info(adev, hive);
22d6575b TSD	403	mutex_unlock(&hive->hive_lock);
22d6575b TSD	404	}
a82400b5	405	}