[linux-2.6-block.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_sync.c

/*
 * Copyright 2014 Advanced Micro Devices, Inc.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 * USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 */
/*
 * Authors:
 *    Christian König <christian.koenig@amd.com>
 */

#include <drm/drmP.h>
#include "amdgpu.h"
#include "amdgpu_trace.h"

struct amdgpu_sync_entry {
	struct hlist_node	node;
	struct fence		*fence;
};

static struct kmem_cache *amdgpu_sync_slab;

/**
 * amdgpu_sync_create - zero init sync object
 *
 * @sync: sync object to initialize
 *
 * Just clear the sync object for now.
 */
void amdgpu_sync_create(struct amdgpu_sync *sync)
{
	hash_init(sync->fences);
	sync->last_vm_update = NULL;
}

/**
 * amdgpu_sync_same_dev - test if fence belong to us
 *
 * @adev: amdgpu device to use for the test
 * @f: fence to test
 *
 * Test if the fence was issued by us.
 */
static bool amdgpu_sync_same_dev(struct amdgpu_device *adev, struct fence *f)
{
	struct amd_sched_fence *s_fence = to_amd_sched_fence(f);

	if (s_fence) {
		struct amdgpu_ring *ring;

		ring = container_of(s_fence->sched, struct amdgpu_ring, sched);
		return ring->adev == adev;
	}

	return false;
}

/**
 * amdgpu_sync_get_owner - extract the owner of a fence
 *
 * @fence: fence get the owner from
 *
 * Extract who originally created the fence.
 */
static void *amdgpu_sync_get_owner(struct fence *f)
{
	struct amd_sched_fence *s_fence = to_amd_sched_fence(f);

	if (s_fence)
		return s_fence->owner;

	return AMDGPU_FENCE_OWNER_UNDEFINED;
}

/**
 * amdgpu_sync_keep_later - Keep the later fence
 *
 * @keep: existing fence to test
 * @fence: new fence
 *
 * Either keep the existing fence or the new one, depending which one is later.
 */
static void amdgpu_sync_keep_later(struct fence **keep, struct fence *fence)
{
	if (*keep && fence_is_later(*keep, fence))
		return;

	fence_put(*keep);
	*keep = fence_get(fence);
}

/**
 * amdgpu_sync_fence - remember to sync to this fence
 *
 * @sync: sync object to add fence to
 * @fence: fence to sync to
 *
 */
int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync,
		      struct fence *f)
{
	struct amdgpu_sync_entry *e;

	if (!f)
		return 0;

	if (amdgpu_sync_same_dev(adev, f) &&
	    amdgpu_sync_get_owner(f) == AMDGPU_FENCE_OWNER_VM)
		amdgpu_sync_keep_later(&sync->last_vm_update, f);

	hash_for_each_possible(sync->fences, e, node, f->context) {
		if (unlikely(e->fence->context != f->context))
			continue;

		amdgpu_sync_keep_later(&e->fence, f);
		return 0;
	}

	e = kmem_cache_alloc(amdgpu_sync_slab, GFP_KERNEL);
	if (!e)
		return -ENOMEM;

	hash_add(sync->fences, &e->node, f->context);
	e->fence = fence_get(f);
	return 0;
}

/**
 * amdgpu_sync_resv - sync to a reservation object
 *
 * @sync: sync object to add fences from reservation object to
 * @resv: reservation object with embedded fence
 * @shared: true if we should only sync to the exclusive fence
 *
 * Sync to the fence
 */
int amdgpu_sync_resv(struct amdgpu_device *adev,
		     struct amdgpu_sync *sync,
		     struct reservation_object *resv,
		     void *owner)
{
	struct reservation_object_list *flist;
	struct fence *f;
	void *fence_owner;
	unsigned i;
	int r = 0;

	if (resv == NULL)
		return -EINVAL;

	/* always sync to the exclusive fence */
	f = reservation_object_get_excl(resv);
	r = amdgpu_sync_fence(adev, sync, f);

	flist = reservation_object_get_list(resv);
	if (!flist || r)
		return r;

	for (i = 0; i < flist->shared_count; ++i) {
		f = rcu_dereference_protected(flist->shared[i],
					      reservation_object_held(resv));
		if (amdgpu_sync_same_dev(adev, f)) {
			/* VM updates are only interesting
			 * for other VM updates and moves.
			 */
			fence_owner = amdgpu_sync_get_owner(f);
			if ((owner != AMDGPU_FENCE_OWNER_UNDEFINED) &&
			    (fence_owner != AMDGPU_FENCE_OWNER_UNDEFINED) &&
			    ((owner == AMDGPU_FENCE_OWNER_VM) !=
			     (fence_owner == AMDGPU_FENCE_OWNER_VM)))
				continue;

			/* Ignore fence from the same owner as
			 * long as it isn't undefined.
			 */
			if (owner != AMDGPU_FENCE_OWNER_UNDEFINED &&
			    fence_owner == owner)
				continue;
		}

		r = amdgpu_sync_fence(adev, sync, f);
		if (r)
			break;
	}
	return r;
}

struct fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync)
{
	struct amdgpu_sync_entry *e;
	struct hlist_node *tmp;
	struct fence *f;
	int i;

	hash_for_each_safe(sync->fences, i, tmp, e, node) {

		f = e->fence;

		hash_del(&e->node);
		kmem_cache_free(amdgpu_sync_slab, e);

		if (!fence_is_signaled(f))
			return f;

		fence_put(f);
	}
	return NULL;
}

int amdgpu_sync_wait(struct amdgpu_sync *sync)
{
	struct amdgpu_sync_entry *e;
	struct hlist_node *tmp;
	int i, r;

	hash_for_each_safe(sync->fences, i, tmp, e, node) {
		r = fence_wait(e->fence, false);
		if (r)
			return r;

		hash_del(&e->node);
		fence_put(e->fence);
		kmem_cache_free(amdgpu_sync_slab, e);
	}

	return 0;
}

/**
 * amdgpu_sync_free - free the sync object
 *
 * @sync: sync object to use
 *
 * Free the sync object.
 */
void amdgpu_sync_free(struct amdgpu_sync *sync)
{
	struct amdgpu_sync_entry *e;
	struct hlist_node *tmp;
	unsigned i;

	hash_for_each_safe(sync->fences, i, tmp, e, node) {
		hash_del(&e->node);
		fence_put(e->fence);
		kmem_cache_free(amdgpu_sync_slab, e);
	}

	fence_put(sync->last_vm_update);
}

/**
 * amdgpu_sync_init - init sync object subsystem
 *
 * Allocate the slab allocator.
 */
int amdgpu_sync_init(void)
{
	amdgpu_sync_slab = kmem_cache_create(
		"amdgpu_sync", sizeof(struct amdgpu_sync_entry), 0,
		SLAB_HWCACHE_ALIGN, NULL);
	if (!amdgpu_sync_slab)
		return -ENOMEM;

	return 0;
}

/**
 * amdgpu_sync_fini - fini sync object subsystem
 *
 * Free the slab allocator.
 */
void amdgpu_sync_fini(void)
{
	kmem_cache_destroy(amdgpu_sync_slab);
}
Commit	Line	Data
d38ceaf9 AD	1	/*
	2	* Copyright 2014 Advanced Micro Devices, Inc.
	3	* All Rights Reserved.
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the
	7	* "Software"), to deal in the Software without restriction, including
	8	* without limitation the rights to use, copy, modify, merge, publish,
	9	* distribute, sub license, and/or sell copies of the Software, and to
	10	* permit persons to whom the Software is furnished to do so, subject to
	11	* the following conditions:
	12	*
	13	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	14	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	15	* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
	16	* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
	17	* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
	18	* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
	19	* USE OR OTHER DEALINGS IN THE SOFTWARE.
	20	*
	21	* The above copyright notice and this permission notice (including the
	22	* next paragraph) shall be included in all copies or substantial portions
	23	* of the Software.
	24	*
	25	*/
	26	/*
	27	* Authors:
	28	* Christian König <christian.koenig@amd.com>
	29	*/
	30
	31	#include <drm/drmP.h>
	32	#include "amdgpu.h"
	33	#include "amdgpu_trace.h"
	34
f91b3a69 CK	35	struct amdgpu_sync_entry {
	36	struct hlist_node node;
	37	struct fence *fence;
	38	};
	39
257bf15a CK	40	static struct kmem_cache *amdgpu_sync_slab;
257bf15a CK	41
d38ceaf9 AD	42	/**
	43	* amdgpu_sync_create - zero init sync object
	44	*
	45	* @sync: sync object to initialize
	46	*
	47	* Just clear the sync object for now.
	48	*/
	49	void amdgpu_sync_create(struct amdgpu_sync *sync)
	50	{
f91b3a69	51	hash_init(sync->fences);
d38ceaf9 AD	52	sync->last_vm_update = NULL;
	53	}
	54
bcc634f4 CK	55	/**
	56	* amdgpu_sync_same_dev - test if fence belong to us
	57	*
	58	* @adev: amdgpu device to use for the test
	59	* @f: fence to test
	60	*
	61	* Test if the fence was issued by us.
	62	*/
3c62338c CZ	63	static bool amdgpu_sync_same_dev(struct amdgpu_device adev, struct fence f)
3c62338c CZ	64	{
3c62338c CZ	65	struct amd_sched_fence *s_fence = to_amd_sched_fence(f);
3c62338c CZ	66
4f839a24 CK	67	if (s_fence) {
	68	struct amdgpu_ring *ring;
	69
	70	ring = container_of(s_fence->sched, struct amdgpu_ring, sched);
	71	return ring->adev == adev;
	72	}
	73
3c62338c CZ	74	return false;
	75	}
	76
bcc634f4 CK	77	/**
	78	* amdgpu_sync_get_owner - extract the owner of a fence
	79	*
	80	* @fence: fence get the owner from
	81	*
	82	* Extract who originally created the fence.
	83	*/
	84	static void amdgpu_sync_get_owner(struct fence f)
3c62338c	85	{
3c62338c	86	struct amd_sched_fence *s_fence = to_amd_sched_fence(f);
bcc634f4	87
3c62338c	88	if (s_fence)
bcc634f4	89	return s_fence->owner;
336d1f5e	90
bcc634f4	91	return AMDGPU_FENCE_OWNER_UNDEFINED;
3c62338c CZ	92	}
3c62338c CZ	93
bcc634f4 CK	94	/**
	95	* amdgpu_sync_keep_later - Keep the later fence
	96	*
	97	* @keep: existing fence to test
	98	* @fence: new fence
	99	*
	100	* Either keep the existing fence or the new one, depending which one is later.
	101	*/
24233860 CK	102	static void amdgpu_sync_keep_later(struct fence *keep, struct fence fence)
	103	{
	104	if (keep && fence_is_later(keep, fence))
	105	return;
	106
	107	fence_put(*keep);
	108	*keep = fence_get(fence);
	109	}
	110
d38ceaf9	111	/**
91e1a520	112	* amdgpu_sync_fence - remember to sync to this fence
d38ceaf9 AD	113	*
	114	* @sync: sync object to add fence to
	115	* @fence: fence to sync to
	116	*
d38ceaf9	117	*/
91e1a520 CK	118	int amdgpu_sync_fence(struct amdgpu_device adev, struct amdgpu_sync sync,
91e1a520 CK	119	struct fence *f)
d38ceaf9	120	{
f91b3a69	121	struct amdgpu_sync_entry *e;
d38ceaf9	122
91e1a520 CK	123	if (!f)
	124	return 0;
	125
3c62338c	126	if (amdgpu_sync_same_dev(adev, f) &&
bcc634f4	127	amdgpu_sync_get_owner(f) == AMDGPU_FENCE_OWNER_VM)
24233860	128	amdgpu_sync_keep_later(&sync->last_vm_update, f);
3c62338c	129
046c12c6 CK	130	hash_for_each_possible(sync->fences, e, node, f->context) {
	131	if (unlikely(e->fence->context != f->context))
	132	continue;
f91b3a69	133
046c12c6	134	amdgpu_sync_keep_later(&e->fence, f);
f91b3a69 CK	135	return 0;
f91b3a69 CK	136	}
d38ceaf9	137
257bf15a	138	e = kmem_cache_alloc(amdgpu_sync_slab, GFP_KERNEL);
046c12c6 CK	139	if (!e)
046c12c6 CK	140	return -ENOMEM;
d38ceaf9	141
046c12c6 CK	142	hash_add(sync->fences, &e->node, f->context);
046c12c6 CK	143	e->fence = fence_get(f);
91e1a520	144	return 0;
d38ceaf9 AD	145	}
	146
	147	/**
2f4b9400	148	* amdgpu_sync_resv - sync to a reservation object
d38ceaf9 AD	149	*
	150	* @sync: sync object to add fences from reservation object to
	151	* @resv: reservation object with embedded fence
	152	* @shared: true if we should only sync to the exclusive fence
	153	*
2f4b9400	154	* Sync to the fence
d38ceaf9 AD	155	*/
	156	int amdgpu_sync_resv(struct amdgpu_device *adev,
	157	struct amdgpu_sync *sync,
	158	struct reservation_object *resv,
	159	void *owner)
	160	{
	161	struct reservation_object_list *flist;
	162	struct fence *f;
423a9480	163	void *fence_owner;
d38ceaf9 AD	164	unsigned i;
	165	int r = 0;
	166
4b095304 JZ	167	if (resv == NULL)
	168	return -EINVAL;
	169
d38ceaf9 AD	170	/* always sync to the exclusive fence */
d38ceaf9 AD	171	f = reservation_object_get_excl(resv);
91e1a520	172	r = amdgpu_sync_fence(adev, sync, f);
d38ceaf9 AD	173
	174	flist = reservation_object_get_list(resv);
	175	if (!flist \|\| r)
	176	return r;
	177
	178	for (i = 0; i < flist->shared_count; ++i) {
	179	f = rcu_dereference_protected(flist->shared[i],
	180	reservation_object_held(resv));
423a9480	181	if (amdgpu_sync_same_dev(adev, f)) {
1d3897e0 CK	182	/* VM updates are only interesting
	183	* for other VM updates and moves.
	184	*/
423a9480	185	fence_owner = amdgpu_sync_get_owner(f);
7a91d6cb CK	186	if ((owner != AMDGPU_FENCE_OWNER_UNDEFINED) &&
7a91d6cb CK	187	(fence_owner != AMDGPU_FENCE_OWNER_UNDEFINED) &&
1d3897e0	188	((owner == AMDGPU_FENCE_OWNER_VM) !=
423a9480	189	(fence_owner == AMDGPU_FENCE_OWNER_VM)))
91e1a520 CK	190	continue;
91e1a520 CK	191
1d3897e0 CK	192	/* Ignore fence from the same owner as
	193	* long as it isn't undefined.
	194	*/
	195	if (owner != AMDGPU_FENCE_OWNER_UNDEFINED &&
423a9480	196	fence_owner == owner)
1d3897e0 CK	197	continue;
	198	}
	199
91e1a520 CK	200	r = amdgpu_sync_fence(adev, sync, f);
	201	if (r)
	202	break;
d38ceaf9 AD	203	}
	204	return r;
	205	}
	206
e61235db CK	207	struct fence amdgpu_sync_get_fence(struct amdgpu_sync sync)
	208	{
	209	struct amdgpu_sync_entry *e;
	210	struct hlist_node *tmp;
	211	struct fence *f;
	212	int i;
	213
	214	hash_for_each_safe(sync->fences, i, tmp, e, node) {
	215
	216	f = e->fence;
	217
	218	hash_del(&e->node);
257bf15a	219	kmem_cache_free(amdgpu_sync_slab, e);
e61235db CK	220
	221	if (!fence_is_signaled(f))
	222	return f;
	223
	224	fence_put(f);
	225	}
	226	return NULL;
	227	}
	228
f91b3a69 CK	229	int amdgpu_sync_wait(struct amdgpu_sync *sync)
	230	{
	231	struct amdgpu_sync_entry *e;
	232	struct hlist_node *tmp;
	233	int i, r;
	234
	235	hash_for_each_safe(sync->fences, i, tmp, e, node) {
	236	r = fence_wait(e->fence, false);
	237	if (r)
	238	return r;
	239
	240	hash_del(&e->node);
	241	fence_put(e->fence);
257bf15a	242	kmem_cache_free(amdgpu_sync_slab, e);
f91b3a69	243	}
3daea9e3	244
f91b3a69 CK	245	return 0;
	246	}
	247
d38ceaf9 AD	248	/**
	249	* amdgpu_sync_free - free the sync object
	250	*
d38ceaf9	251	* @sync: sync object to use
d38ceaf9	252	*
2f4b9400	253	* Free the sync object.
d38ceaf9	254	*/
8a8f0b48	255	void amdgpu_sync_free(struct amdgpu_sync *sync)
d38ceaf9	256	{
f91b3a69 CK	257	struct amdgpu_sync_entry *e;
f91b3a69 CK	258	struct hlist_node *tmp;
d38ceaf9 AD	259	unsigned i;
d38ceaf9 AD	260
f91b3a69 CK	261	hash_for_each_safe(sync->fences, i, tmp, e, node) {
	262	hash_del(&e->node);
	263	fence_put(e->fence);
257bf15a	264	kmem_cache_free(amdgpu_sync_slab, e);
f91b3a69 CK	265	}
f91b3a69 CK	266
3c62338c	267	fence_put(sync->last_vm_update);
d38ceaf9	268	}
257bf15a CK	269
	270	/**
	271	* amdgpu_sync_init - init sync object subsystem
	272	*
	273	* Allocate the slab allocator.
	274	*/
	275	int amdgpu_sync_init(void)
	276	{
	277	amdgpu_sync_slab = kmem_cache_create(
	278	"amdgpu_sync", sizeof(struct amdgpu_sync_entry), 0,
	279	SLAB_HWCACHE_ALIGN, NULL);
	280	if (!amdgpu_sync_slab)
	281	return -ENOMEM;
	282
	283	return 0;
	284	}
	285
	286	/**
	287	* amdgpu_sync_fini - fini sync object subsystem
	288	*
	289	* Free the slab allocator.
	290	*/
	291	void amdgpu_sync_fini(void)
	292	{
	293	kmem_cache_destroy(amdgpu_sync_slab);
	294	}