[linux-2.6-block.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_sched.c

/*
 * Copyright 2015 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 *
 */
#include <linux/kthread.h>
#include <linux/wait.h>
#include <linux/sched.h>
#include <drm/drmP.h>
#include "amdgpu.h"

static int amdgpu_sched_prepare_job(struct amd_gpu_scheduler *sched,
				    struct amd_sched_entity *entity,
				    void *job)
{
	int r = 0;
	struct amdgpu_cs_parser *sched_job = (struct amdgpu_cs_parser *)job;
	if (sched_job->prepare_job) {
		r = sched_job->prepare_job(sched_job);
		if (r) {
			DRM_ERROR("Prepare job error\n");
			schedule_work(&sched_job->job_work);
		}
	}
	return r;
}

static struct fence *amdgpu_sched_run_job(struct amd_gpu_scheduler *sched,
					  struct amd_sched_entity *entity,
					  struct amd_sched_job *job)
{
	int r = 0;
	struct amdgpu_cs_parser *sched_job;
	struct amdgpu_fence *fence;

	if (!job || !job->job) {
		DRM_ERROR("job is null\n");
		return NULL;
	}
	sched_job = (struct amdgpu_cs_parser *)job->job;
	mutex_lock(&sched_job->job_lock);
	r = amdgpu_ib_schedule(sched_job->adev,
			       sched_job->num_ibs,
			       sched_job->ibs,
			       sched_job->filp);
	if (r)
		goto err;
	fence = amdgpu_fence_ref(sched_job->ibs[sched_job->num_ibs - 1].fence);

	if (sched_job->run_job) {
		r = sched_job->run_job(sched_job);
		if (r)
			goto err;
	}

	amd_sched_emit(entity, sched_job->ibs[sched_job->num_ibs - 1].sequence);

	mutex_unlock(&sched_job->job_lock);
	return &fence->base;

err:
	DRM_ERROR("Run job error\n");
	mutex_unlock(&sched_job->job_lock);
	schedule_work(&sched_job->job_work);
	return NULL;
}

static void amdgpu_sched_process_job(struct amd_gpu_scheduler *sched, void *job)
{
	struct amdgpu_cs_parser *sched_job = NULL;
	struct amdgpu_fence *fence = NULL;
	struct amdgpu_ring *ring = NULL;
	struct amdgpu_device *adev = NULL;

	if (!job)
		return;
	sched_job = (struct amdgpu_cs_parser *)job;
	fence = sched_job->ibs[sched_job->num_ibs - 1].fence;
	if (!fence)
		return;
	ring = fence->ring;
	adev = ring->adev;

	schedule_work(&sched_job->job_work);
}

struct amd_sched_backend_ops amdgpu_sched_ops = {
	.prepare_job = amdgpu_sched_prepare_job,
	.run_job = amdgpu_sched_run_job,
	.process_job = amdgpu_sched_process_job
};

int amdgpu_sched_ib_submit_kernel_helper(struct amdgpu_device *adev,
					 struct amdgpu_ring *ring,
					 struct amdgpu_ib *ibs,
					 unsigned num_ibs,
					 int (*free_job)(struct amdgpu_cs_parser *),
					 void *owner,
					 struct fence **f)
{
	int r = 0;
	if (amdgpu_enable_scheduler) {
		uint64_t v_seq;
		struct amdgpu_cs_parser *sched_job =
			amdgpu_cs_parser_create(adev, owner, &adev->kernel_ctx,
						ibs, 1);
		if(!sched_job) {
			return -ENOMEM;
		}
		sched_job->free_job = free_job;
		v_seq = atomic64_inc_return(&adev->kernel_ctx.rings[ring->idx].entity.last_queued_v_seq);
		ibs[num_ibs - 1].sequence = v_seq;
		amd_sched_push_job(ring->scheduler,
				   &adev->kernel_ctx.rings[ring->idx].entity,
				   sched_job);
		r = amd_sched_wait_emit(
			&adev->kernel_ctx.rings[ring->idx].entity,
			v_seq,
			false,
			-1);
		if (r)
			WARN(true, "emit timeout\n");
	} else
		r = amdgpu_ib_schedule(adev, 1, ibs, owner);
	if (r)
		return r;
	*f = &ibs[num_ibs - 1].fence->base;
	return 0;
}
Commit	Line	Data
c1b69ed0 CZ	1	/*
	2	* Copyright 2015 Advanced Micro Devices, Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	*
	23	*/
	24	#include <linux/kthread.h>
	25	#include <linux/wait.h>
	26	#include <linux/sched.h>
	27	#include <drm/drmP.h>
	28	#include "amdgpu.h"
	29
	30	static int amdgpu_sched_prepare_job(struct amd_gpu_scheduler *sched,
91404fb2	31	struct amd_sched_entity *entity,
c1b69ed0 CZ	32	void *job)
	33	{
	34	int r = 0;
	35	struct amdgpu_cs_parser sched_job = (struct amdgpu_cs_parser )job;
dd01d071	36	if (sched_job->prepare_job) {
c1b69ed0	37	r = sched_job->prepare_job(sched_job);
dd01d071 JZ	38	if (r) {
	39	DRM_ERROR("Prepare job error\n");
	40	schedule_work(&sched_job->job_work);
	41	}
c1b69ed0 CZ	42	}
	43	return r;
	44	}
	45
6f0e54a9 CK	46	static struct fence amdgpu_sched_run_job(struct amd_gpu_scheduler sched,
	47	struct amd_sched_entity *entity,
	48	struct amd_sched_job *job)
c1b69ed0 CZ	49	{
c1b69ed0 CZ	50	int r = 0;
4cef9267	51	struct amdgpu_cs_parser *sched_job;
7484667c	52	struct amdgpu_fence *fence;
c1b69ed0	53
4cef9267 CZ	54	if (!job \|\| !job->job) {
4cef9267 CZ	55	DRM_ERROR("job is null\n");
6f0e54a9	56	return NULL;
4cef9267 CZ	57	}
4cef9267 CZ	58	sched_job = (struct amdgpu_cs_parser *)job->job;
c1b69ed0 CZ	59	mutex_lock(&sched_job->job_lock);
	60	r = amdgpu_ib_schedule(sched_job->adev,
	61	sched_job->num_ibs,
	62	sched_job->ibs,
	63	sched_job->filp);
	64	if (r)
	65	goto err;
6f0e54a9	66	fence = amdgpu_fence_ref(sched_job->ibs[sched_job->num_ibs - 1].fence);
7484667c	67
c1b69ed0 CZ	68	if (sched_job->run_job) {
	69	r = sched_job->run_job(sched_job);
	70	if (r)
	71	goto err;
	72	}
f95b7e3e	73
91404fb2	74	amd_sched_emit(entity, sched_job->ibs[sched_job->num_ibs - 1].sequence);
4b559c90	75
c1b69ed0	76	mutex_unlock(&sched_job->job_lock);
6f0e54a9 CK	77	return &fence->base;
6f0e54a9 CK	78
c1b69ed0 CZ	79	err:
	80	DRM_ERROR("Run job error\n");
	81	mutex_unlock(&sched_job->job_lock);
	82	schedule_work(&sched_job->job_work);
6f0e54a9	83	return NULL;
c1b69ed0 CZ	84	}
	85
	86	static void amdgpu_sched_process_job(struct amd_gpu_scheduler sched, void job)
	87	{
	88	struct amdgpu_cs_parser *sched_job = NULL;
	89	struct amdgpu_fence *fence = NULL;
	90	struct amdgpu_ring *ring = NULL;
	91	struct amdgpu_device *adev = NULL;
c1b69ed0 CZ	92
	93	if (!job)
	94	return;
	95	sched_job = (struct amdgpu_cs_parser *)job;
	96	fence = sched_job->ibs[sched_job->num_ibs - 1].fence;
	97	if (!fence)
	98	return;
	99	ring = fence->ring;
	100	adev = ring->adev;
	101
c1b69ed0 CZ	102	schedule_work(&sched_job->job_work);
	103	}
	104
	105	struct amd_sched_backend_ops amdgpu_sched_ops = {
	106	.prepare_job = amdgpu_sched_prepare_job,
	107	.run_job = amdgpu_sched_run_job,
	108	.process_job = amdgpu_sched_process_job
	109	};
	110
3c704e93 CZ	111	int amdgpu_sched_ib_submit_kernel_helper(struct amdgpu_device *adev,
	112	struct amdgpu_ring *ring,
	113	struct amdgpu_ib *ibs,
	114	unsigned num_ibs,
	115	int (free_job)(struct amdgpu_cs_parser ),
1763552e CZ	116	void *owner,
1763552e CZ	117	struct fence **f)
3c704e93 CZ	118	{
	119	int r = 0;
	120	if (amdgpu_enable_scheduler) {
80de5913	121	uint64_t v_seq;
3c704e93	122	struct amdgpu_cs_parser *sched_job =
47f38501	123	amdgpu_cs_parser_create(adev, owner, &adev->kernel_ctx,
3c704e93 CZ	124	ibs, 1);
	125	if(!sched_job) {
	126	return -ENOMEM;
	127	}
	128	sched_job->free_job = free_job;
91404fb2	129	v_seq = atomic64_inc_return(&adev->kernel_ctx.rings[ring->idx].entity.last_queued_v_seq);
80de5913 CZ	130	ibs[num_ibs - 1].sequence = v_seq;
80de5913 CZ	131	amd_sched_push_job(ring->scheduler,
91404fb2	132	&adev->kernel_ctx.rings[ring->idx].entity,
3c704e93 CZ	133	sched_job);
3c704e93 CZ	134	r = amd_sched_wait_emit(
91404fb2	135	&adev->kernel_ctx.rings[ring->idx].entity,
80de5913 CZ	136	v_seq,
	137	false,
	138	-1);
3c704e93 CZ	139	if (r)
	140	WARN(true, "emit timeout\n");
	141	} else
	142	r = amdgpu_ib_schedule(adev, 1, ibs, owner);
1763552e CZ	143	if (r)
	144	return r;
	145	*f = &ibs[num_ibs - 1].fence->base;
	146	return 0;
3c704e93	147	}