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d38ceaf9 AD |
1 | /* |
2 | * Copyright 2014 Advanced Micro Devices, Inc. | |
3 | * All Rights Reserved. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the | |
7 | * "Software"), to deal in the Software without restriction, including | |
8 | * without limitation the rights to use, copy, modify, merge, publish, | |
9 | * distribute, sub license, and/or sell copies of the Software, and to | |
10 | * permit persons to whom the Software is furnished to do so, subject to | |
11 | * the following conditions: | |
12 | * | |
13 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
14 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
15 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | |
16 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, | |
17 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR | |
18 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE | |
19 | * USE OR OTHER DEALINGS IN THE SOFTWARE. | |
20 | * | |
21 | * The above copyright notice and this permission notice (including the | |
22 | * next paragraph) shall be included in all copies or substantial portions | |
23 | * of the Software. | |
24 | * | |
25 | */ | |
26 | /* | |
27 | * Authors: | |
28 | * Christian König <christian.koenig@amd.com> | |
29 | */ | |
30 | ||
31 | #include <linux/firmware.h> | |
32 | #include <linux/module.h> | |
33 | #include <linux/mmu_notifier.h> | |
34 | #include <drm/drmP.h> | |
35 | #include <drm/drm.h> | |
36 | ||
37 | #include "amdgpu.h" | |
38 | ||
39 | struct amdgpu_mn { | |
40 | /* constant after initialisation */ | |
41 | struct amdgpu_device *adev; | |
42 | struct mm_struct *mm; | |
43 | struct mmu_notifier mn; | |
44 | ||
45 | /* only used on destruction */ | |
46 | struct work_struct work; | |
47 | ||
48 | /* protected by adev->mn_lock */ | |
49 | struct hlist_node node; | |
50 | ||
0d2b42b0 CK |
51 | /* objects protected by lock */ |
52 | struct mutex lock; | |
d38ceaf9 AD |
53 | struct rb_root objects; |
54 | }; | |
55 | ||
56 | struct amdgpu_mn_node { | |
57 | struct interval_tree_node it; | |
58 | struct list_head bos; | |
59 | }; | |
60 | ||
61 | /** | |
62 | * amdgpu_mn_destroy - destroy the rmn | |
63 | * | |
64 | * @work: previously sheduled work item | |
65 | * | |
66 | * Lazy destroys the notifier from a work item | |
67 | */ | |
68 | static void amdgpu_mn_destroy(struct work_struct *work) | |
69 | { | |
70 | struct amdgpu_mn *rmn = container_of(work, struct amdgpu_mn, work); | |
71 | struct amdgpu_device *adev = rmn->adev; | |
72 | struct amdgpu_mn_node *node, *next_node; | |
73 | struct amdgpu_bo *bo, *next_bo; | |
74 | ||
75 | mutex_lock(&adev->mn_lock); | |
0d2b42b0 | 76 | mutex_lock(&rmn->lock); |
d38ceaf9 AD |
77 | hash_del(&rmn->node); |
78 | rbtree_postorder_for_each_entry_safe(node, next_node, &rmn->objects, | |
79 | it.rb) { | |
d38ceaf9 AD |
80 | list_for_each_entry_safe(bo, next_bo, &node->bos, mn_list) { |
81 | bo->mn = NULL; | |
82 | list_del_init(&bo->mn_list); | |
83 | } | |
84 | kfree(node); | |
85 | } | |
0d2b42b0 | 86 | mutex_unlock(&rmn->lock); |
b8ea3783 | 87 | mutex_unlock(&adev->mn_lock); |
fa5b5000 | 88 | mmu_notifier_unregister_no_release(&rmn->mn, rmn->mm); |
d38ceaf9 AD |
89 | kfree(rmn); |
90 | } | |
91 | ||
92 | /** | |
93 | * amdgpu_mn_release - callback to notify about mm destruction | |
94 | * | |
95 | * @mn: our notifier | |
96 | * @mn: the mm this callback is about | |
97 | * | |
98 | * Shedule a work item to lazy destroy our notifier. | |
99 | */ | |
100 | static void amdgpu_mn_release(struct mmu_notifier *mn, | |
101 | struct mm_struct *mm) | |
102 | { | |
103 | struct amdgpu_mn *rmn = container_of(mn, struct amdgpu_mn, mn); | |
104 | INIT_WORK(&rmn->work, amdgpu_mn_destroy); | |
105 | schedule_work(&rmn->work); | |
106 | } | |
107 | ||
ae20f12d CK |
108 | /** |
109 | * amdgpu_mn_invalidate_node - unmap all BOs of a node | |
110 | * | |
111 | * @node: the node with the BOs to unmap | |
112 | * | |
113 | * We block for all BOs and unmap them by move them | |
114 | * into system domain again. | |
115 | */ | |
116 | static void amdgpu_mn_invalidate_node(struct amdgpu_mn_node *node, | |
117 | unsigned long start, | |
118 | unsigned long end) | |
119 | { | |
120 | struct amdgpu_bo *bo; | |
121 | long r; | |
122 | ||
123 | list_for_each_entry(bo, &node->bos, mn_list) { | |
124 | ||
125 | if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, start, end)) | |
126 | continue; | |
127 | ||
128 | r = amdgpu_bo_reserve(bo, true); | |
129 | if (r) { | |
130 | DRM_ERROR("(%ld) failed to reserve user bo\n", r); | |
131 | continue; | |
132 | } | |
133 | ||
134 | r = reservation_object_wait_timeout_rcu(bo->tbo.resv, | |
135 | true, false, MAX_SCHEDULE_TIMEOUT); | |
136 | if (r <= 0) | |
137 | DRM_ERROR("(%ld) failed to wait for user bo\n", r); | |
138 | ||
139 | amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_CPU); | |
140 | r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false); | |
141 | if (r) | |
142 | DRM_ERROR("(%ld) failed to validate user bo\n", r); | |
143 | ||
144 | amdgpu_bo_unreserve(bo); | |
145 | } | |
146 | } | |
147 | ||
148 | /** | |
149 | * amdgpu_mn_invalidate_page - callback to notify about mm change | |
150 | * | |
151 | * @mn: our notifier | |
152 | * @mn: the mm this callback is about | |
153 | * @address: address of invalidate page | |
154 | * | |
155 | * Invalidation of a single page. Blocks for all BOs mapping it | |
156 | * and unmap them by move them into system domain again. | |
157 | */ | |
158 | static void amdgpu_mn_invalidate_page(struct mmu_notifier *mn, | |
159 | struct mm_struct *mm, | |
160 | unsigned long address) | |
161 | { | |
162 | struct amdgpu_mn *rmn = container_of(mn, struct amdgpu_mn, mn); | |
163 | struct interval_tree_node *it; | |
164 | ||
165 | mutex_lock(&rmn->lock); | |
166 | ||
167 | it = interval_tree_iter_first(&rmn->objects, address, address); | |
168 | if (it) { | |
169 | struct amdgpu_mn_node *node; | |
170 | ||
171 | node = container_of(it, struct amdgpu_mn_node, it); | |
172 | amdgpu_mn_invalidate_node(node, address, address); | |
173 | } | |
174 | ||
175 | mutex_unlock(&rmn->lock); | |
176 | } | |
177 | ||
d38ceaf9 AD |
178 | /** |
179 | * amdgpu_mn_invalidate_range_start - callback to notify about mm change | |
180 | * | |
181 | * @mn: our notifier | |
182 | * @mn: the mm this callback is about | |
183 | * @start: start of updated range | |
184 | * @end: end of updated range | |
185 | * | |
186 | * We block for all BOs between start and end to be idle and | |
187 | * unmap them by move them into system domain again. | |
188 | */ | |
189 | static void amdgpu_mn_invalidate_range_start(struct mmu_notifier *mn, | |
190 | struct mm_struct *mm, | |
191 | unsigned long start, | |
192 | unsigned long end) | |
193 | { | |
194 | struct amdgpu_mn *rmn = container_of(mn, struct amdgpu_mn, mn); | |
195 | struct interval_tree_node *it; | |
196 | ||
197 | /* notification is exclusive, but interval is inclusive */ | |
198 | end -= 1; | |
199 | ||
0d2b42b0 CK |
200 | mutex_lock(&rmn->lock); |
201 | ||
d38ceaf9 AD |
202 | it = interval_tree_iter_first(&rmn->objects, start, end); |
203 | while (it) { | |
204 | struct amdgpu_mn_node *node; | |
d38ceaf9 AD |
205 | |
206 | node = container_of(it, struct amdgpu_mn_node, it); | |
207 | it = interval_tree_iter_next(it, start, end); | |
208 | ||
ae20f12d | 209 | amdgpu_mn_invalidate_node(node, start, end); |
d38ceaf9 | 210 | } |
0d2b42b0 CK |
211 | |
212 | mutex_unlock(&rmn->lock); | |
d38ceaf9 AD |
213 | } |
214 | ||
215 | static const struct mmu_notifier_ops amdgpu_mn_ops = { | |
216 | .release = amdgpu_mn_release, | |
ae20f12d | 217 | .invalidate_page = amdgpu_mn_invalidate_page, |
d38ceaf9 AD |
218 | .invalidate_range_start = amdgpu_mn_invalidate_range_start, |
219 | }; | |
220 | ||
221 | /** | |
222 | * amdgpu_mn_get - create notifier context | |
223 | * | |
224 | * @adev: amdgpu device pointer | |
225 | * | |
226 | * Creates a notifier context for current->mm. | |
227 | */ | |
228 | static struct amdgpu_mn *amdgpu_mn_get(struct amdgpu_device *adev) | |
229 | { | |
230 | struct mm_struct *mm = current->mm; | |
231 | struct amdgpu_mn *rmn; | |
232 | int r; | |
233 | ||
d38ceaf9 | 234 | mutex_lock(&adev->mn_lock); |
b5637051 MH |
235 | if (down_write_killable(&mm->mmap_sem)) { |
236 | mutex_unlock(&adev->mn_lock); | |
237 | return ERR_PTR(-EINTR); | |
238 | } | |
d38ceaf9 AD |
239 | |
240 | hash_for_each_possible(adev->mn_hash, rmn, node, (unsigned long)mm) | |
241 | if (rmn->mm == mm) | |
242 | goto release_locks; | |
243 | ||
244 | rmn = kzalloc(sizeof(*rmn), GFP_KERNEL); | |
245 | if (!rmn) { | |
246 | rmn = ERR_PTR(-ENOMEM); | |
247 | goto release_locks; | |
248 | } | |
249 | ||
250 | rmn->adev = adev; | |
251 | rmn->mm = mm; | |
252 | rmn->mn.ops = &amdgpu_mn_ops; | |
0d2b42b0 | 253 | mutex_init(&rmn->lock); |
d38ceaf9 AD |
254 | rmn->objects = RB_ROOT; |
255 | ||
256 | r = __mmu_notifier_register(&rmn->mn, mm); | |
257 | if (r) | |
258 | goto free_rmn; | |
259 | ||
260 | hash_add(adev->mn_hash, &rmn->node, (unsigned long)mm); | |
261 | ||
262 | release_locks: | |
d38ceaf9 | 263 | up_write(&mm->mmap_sem); |
b8ea3783 | 264 | mutex_unlock(&adev->mn_lock); |
d38ceaf9 AD |
265 | |
266 | return rmn; | |
267 | ||
268 | free_rmn: | |
d38ceaf9 | 269 | up_write(&mm->mmap_sem); |
b8ea3783 | 270 | mutex_unlock(&adev->mn_lock); |
d38ceaf9 AD |
271 | kfree(rmn); |
272 | ||
273 | return ERR_PTR(r); | |
274 | } | |
275 | ||
276 | /** | |
277 | * amdgpu_mn_register - register a BO for notifier updates | |
278 | * | |
279 | * @bo: amdgpu buffer object | |
280 | * @addr: userptr addr we should monitor | |
281 | * | |
282 | * Registers an MMU notifier for the given BO at the specified address. | |
283 | * Returns 0 on success, -ERRNO if anything goes wrong. | |
284 | */ | |
285 | int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr) | |
286 | { | |
287 | unsigned long end = addr + amdgpu_bo_size(bo) - 1; | |
288 | struct amdgpu_device *adev = bo->adev; | |
289 | struct amdgpu_mn *rmn; | |
290 | struct amdgpu_mn_node *node = NULL; | |
291 | struct list_head bos; | |
292 | struct interval_tree_node *it; | |
293 | ||
294 | rmn = amdgpu_mn_get(adev); | |
295 | if (IS_ERR(rmn)) | |
296 | return PTR_ERR(rmn); | |
297 | ||
298 | INIT_LIST_HEAD(&bos); | |
299 | ||
0d2b42b0 | 300 | mutex_lock(&rmn->lock); |
d38ceaf9 AD |
301 | |
302 | while ((it = interval_tree_iter_first(&rmn->objects, addr, end))) { | |
303 | kfree(node); | |
304 | node = container_of(it, struct amdgpu_mn_node, it); | |
305 | interval_tree_remove(&node->it, &rmn->objects); | |
306 | addr = min(it->start, addr); | |
307 | end = max(it->last, end); | |
308 | list_splice(&node->bos, &bos); | |
309 | } | |
310 | ||
311 | if (!node) { | |
312 | node = kmalloc(sizeof(struct amdgpu_mn_node), GFP_KERNEL); | |
313 | if (!node) { | |
0d2b42b0 | 314 | mutex_unlock(&rmn->lock); |
d38ceaf9 AD |
315 | return -ENOMEM; |
316 | } | |
317 | } | |
318 | ||
319 | bo->mn = rmn; | |
320 | ||
321 | node->it.start = addr; | |
322 | node->it.last = end; | |
323 | INIT_LIST_HEAD(&node->bos); | |
324 | list_splice(&bos, &node->bos); | |
325 | list_add(&bo->mn_list, &node->bos); | |
326 | ||
327 | interval_tree_insert(&node->it, &rmn->objects); | |
328 | ||
0d2b42b0 | 329 | mutex_unlock(&rmn->lock); |
d38ceaf9 AD |
330 | |
331 | return 0; | |
332 | } | |
333 | ||
334 | /** | |
335 | * amdgpu_mn_unregister - unregister a BO for notifier updates | |
336 | * | |
337 | * @bo: amdgpu buffer object | |
338 | * | |
339 | * Remove any registration of MMU notifier updates from the buffer object. | |
340 | */ | |
341 | void amdgpu_mn_unregister(struct amdgpu_bo *bo) | |
342 | { | |
343 | struct amdgpu_device *adev = bo->adev; | |
b8ea3783 | 344 | struct amdgpu_mn *rmn; |
d38ceaf9 AD |
345 | struct list_head *head; |
346 | ||
b8ea3783 FK |
347 | mutex_lock(&adev->mn_lock); |
348 | ||
349 | rmn = bo->mn; | |
350 | if (rmn == NULL) { | |
351 | mutex_unlock(&adev->mn_lock); | |
d38ceaf9 | 352 | return; |
b8ea3783 | 353 | } |
d38ceaf9 | 354 | |
0d2b42b0 | 355 | mutex_lock(&rmn->lock); |
c41d271d | 356 | |
d38ceaf9 AD |
357 | /* save the next list entry for later */ |
358 | head = bo->mn_list.next; | |
359 | ||
360 | bo->mn = NULL; | |
361 | list_del(&bo->mn_list); | |
362 | ||
363 | if (list_empty(head)) { | |
364 | struct amdgpu_mn_node *node; | |
365 | node = container_of(head, struct amdgpu_mn_node, bos); | |
366 | interval_tree_remove(&node->it, &rmn->objects); | |
367 | kfree(node); | |
368 | } | |
369 | ||
0d2b42b0 | 370 | mutex_unlock(&rmn->lock); |
b8ea3783 | 371 | mutex_unlock(&adev->mn_lock); |
d38ceaf9 | 372 | } |