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1 | /* |
2 | * Copyright 2014 Advanced Micro Devices, Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | */ | |
23 | ||
24 | #ifndef __AMDGPU_IH_H__ | |
25 | #define __AMDGPU_IH_H__ | |
26 | ||
27 | struct amdgpu_device; | |
28 | ||
29 | /* | |
30 | * R6xx+ IH ring | |
31 | */ | |
32 | struct amdgpu_ih_ring { | |
33 | struct amdgpu_bo *ring_obj; | |
34 | volatile uint32_t *ring; | |
35 | unsigned rptr; | |
36 | unsigned ring_size; | |
37 | uint64_t gpu_addr; | |
38 | uint32_t ptr_mask; | |
39 | atomic_t lock; | |
40 | bool enabled; | |
41 | unsigned wptr_offs; | |
42 | unsigned rptr_offs; | |
43 | u32 doorbell_index; | |
44 | bool use_doorbell; | |
45 | bool use_bus_addr; | |
46 | dma_addr_t rb_dma_addr; /* only used when use_bus_addr = true */ | |
47 | }; | |
48 | ||
49 | struct amdgpu_iv_entry { | |
50 | unsigned src_id; | |
51 | unsigned src_data; | |
52 | unsigned ring_id; | |
53 | unsigned vm_id; | |
54 | unsigned pas_id; | |
0cf3be21 | 55 | const uint32_t *iv_entry; |
d38ceaf9 AD |
56 | }; |
57 | ||
58 | int amdgpu_ih_ring_init(struct amdgpu_device *adev, unsigned ring_size, | |
59 | bool use_bus_addr); | |
60 | void amdgpu_ih_ring_fini(struct amdgpu_device *adev); | |
61 | int amdgpu_ih_process(struct amdgpu_device *adev); | |
62 | ||
63 | #endif |