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drm/radeon: handle runtime pm in drm pre/post close
[linux-2.6-block.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_drv.c
CommitLineData
d38ceaf9
AD		 1/**
2 * \file amdgpu_drv.c
3 * AMD Amdgpu driver
4 *
5 * \author Gareth Hughes <gareth@valinux.com>
6 */
7
8/*
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
11 *
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
18 *
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
21 * Software.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
30 */
31
32#include <drm/drmP.h>
33#include <drm/amdgpu_drm.h>
34#include <drm/drm_gem.h>
35#include "amdgpu_drv.h"
36
37#include <drm/drm_pciids.h>
38#include <linux/console.h>
39#include <linux/module.h>
40#include <linux/pm_runtime.h>
41#include <linux/vga_switcheroo.h>
42#include "drm_crtc_helper.h"
43
44#include "amdgpu.h"
45#include "amdgpu_irq.h"
46
130e0371
OG		 47#include "amdgpu_amdkfd.h"
48
d38ceaf9
AD		 49/*
50 * KMS wrapper.
51 * - 3.0.0 - initial driver
6055f37a 52 * - 3.1.0 - allow reading more status registers (GRBM, SRBM, SDMA, CP)
f84e63f2
MO		 53 * - 3.2.0 - GFX8: Uses EOP_TC_WB_ACTION_EN, so UMDs don't have to do the same
54 * at the end of IBs.
d347ce66 55 * - 3.3.0 - Add VM support for UVD on supported hardware.
83a59b63 56 * - 3.4.0 - Add AMDGPU_INFO_NUM_EVICTIONS.
8dd31d74 57 * - 3.5.0 - Add support for new UVD_NO_OP register.
d38ceaf9
AD		 58 */
59#define KMS_DRIVER_MAJOR 3
8dd31d74 60#define KMS_DRIVER_MINOR 5
d38ceaf9
AD		 61#define KMS_DRIVER_PATCHLEVEL 0
62
63int amdgpu_vram_limit = 0;
64int amdgpu_gart_size = -1; /* auto */
95844d20 65int amdgpu_moverate = -1; /* auto */
d38ceaf9
AD		 66int amdgpu_benchmarking = 0;
67int amdgpu_testing = 0;
68int amdgpu_audio = -1;
69int amdgpu_disp_priority = 0;
70int amdgpu_hw_i2c = 0;
71int amdgpu_pcie_gen2 = -1;
72int amdgpu_msi = -1;
a895c222 73int amdgpu_lockup_timeout = 0;
d38ceaf9
AD		 74int amdgpu_dpm = -1;
75int amdgpu_smc_load_fw = 1;
76int amdgpu_aspm = -1;
77int amdgpu_runtime_pm = -1;
d38ceaf9
AD		 78unsigned amdgpu_ip_block_mask = 0xffffffff;
79int amdgpu_bapm = -1;
80int amdgpu_deep_color = 0;
ed885b21 81int amdgpu_vm_size = 64;
d38ceaf9 82int amdgpu_vm_block_size = -1;
d9c13156 83int amdgpu_vm_fault_stop = 0;
b495bd3a 84int amdgpu_vm_debug = 0;
d38ceaf9 85int amdgpu_exp_hw_support = 0;
b70f014d 86int amdgpu_sched_jobs = 32;
4afcb303 87int amdgpu_sched_hw_submission = 2;
e61710c5 88int amdgpu_powerplay = -1;
6bb6b297 89int amdgpu_powercontainment = 1;
af223dfa 90int amdgpu_sclk_deep_sleep_en = 1;
cd474ba0
AD		 91unsigned amdgpu_pcie_gen_cap = 0;
92unsigned amdgpu_pcie_lane_cap = 0;
395d1fb9
NH		 93unsigned amdgpu_cg_mask = 0xffffffff;
94unsigned amdgpu_pg_mask = 0xffffffff;
6f8941a2 95char *amdgpu_disable_cu = NULL;
9accf2fd 96char *amdgpu_virtual_display = NULL;
d38ceaf9
AD		 97
98MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
99module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
100
101MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
102module_param_named(gartsize, amdgpu_gart_size, int, 0600);
103
95844d20
MO		 104MODULE_PARM_DESC(moverate, "Maximum buffer migration rate in MB/s. (32, 64, etc., -1=auto, 0=1=disabled)");
105module_param_named(moverate, amdgpu_moverate, int, 0600);
106
d38ceaf9
AD		 107MODULE_PARM_DESC(benchmark, "Run benchmark");
108module_param_named(benchmark, amdgpu_benchmarking, int, 0444);
109
110MODULE_PARM_DESC(test, "Run tests");
111module_param_named(test, amdgpu_testing, int, 0444);
112
113MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
114module_param_named(audio, amdgpu_audio, int, 0444);
115
116MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
117module_param_named(disp_priority, amdgpu_disp_priority, int, 0444);
118
119MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
120module_param_named(hw_i2c, amdgpu_hw_i2c, int, 0444);
121
122MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
123module_param_named(pcie_gen2, amdgpu_pcie_gen2, int, 0444);
124
125MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
126module_param_named(msi, amdgpu_msi, int, 0444);
127
a895c222 128MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default 0 = disable)");
d38ceaf9
AD		 129module_param_named(lockup_timeout, amdgpu_lockup_timeout, int, 0444);
130
131MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
132module_param_named(dpm, amdgpu_dpm, int, 0444);
133
134MODULE_PARM_DESC(smc_load_fw, "SMC firmware loading(1 = enable, 0 = disable)");
135module_param_named(smc_load_fw, amdgpu_smc_load_fw, int, 0444);
136
137MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
138module_param_named(aspm, amdgpu_aspm, int, 0444);
139
140MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
141module_param_named(runpm, amdgpu_runtime_pm, int, 0444);
142
d38ceaf9
AD		 143MODULE_PARM_DESC(ip_block_mask, "IP Block Mask (all blocks enabled (default))");
144module_param_named(ip_block_mask, amdgpu_ip_block_mask, uint, 0444);
145
146MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
147module_param_named(bapm, amdgpu_bapm, int, 0444);
148
149MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");
150module_param_named(deep_color, amdgpu_deep_color, int, 0444);
151
ed885b21 152MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 64GB)");
d38ceaf9
AD		 153module_param_named(vm_size, amdgpu_vm_size, int, 0444);
154
155MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");
156module_param_named(vm_block_size, amdgpu_vm_block_size, int, 0444);
157
d9c13156
CK		 158MODULE_PARM_DESC(vm_fault_stop, "Stop on VM fault (0 = never (default), 1 = print first, 2 = always)");
159module_param_named(vm_fault_stop, amdgpu_vm_fault_stop, int, 0444);
160
b495bd3a
CK		 161MODULE_PARM_DESC(vm_debug, "Debug VM handling (0 = disabled (default), 1 = enabled)");
162module_param_named(vm_debug, amdgpu_vm_debug, int, 0644);
163
d38ceaf9
AD		 164MODULE_PARM_DESC(exp_hw_support, "experimental hw support (1 = enable, 0 = disable (default))");
165module_param_named(exp_hw_support, amdgpu_exp_hw_support, int, 0444);
166
b70f014d 167MODULE_PARM_DESC(sched_jobs, "the max number of jobs supported in the sw queue (default 32)");
1333f723
JZ		 168module_param_named(sched_jobs, amdgpu_sched_jobs, int, 0444);
169
4afcb303
JZ		 170MODULE_PARM_DESC(sched_hw_submission, "the max number of HW submissions (default 2)");
171module_param_named(sched_hw_submission, amdgpu_sched_hw_submission, int, 0444);
172
3a74f6f2 173#ifdef CONFIG_DRM_AMD_POWERPLAY
e61710c5 174MODULE_PARM_DESC(powerplay, "Powerplay component (1 = enable, 0 = disable, -1 = auto (default))");
3a74f6f2 175module_param_named(powerplay, amdgpu_powerplay, int, 0444);
6bb6b297
HR		 176
177MODULE_PARM_DESC(powercontainment, "Power Containment (1 = enable (default), 0 = disable)");
178module_param_named(powercontainment, amdgpu_powercontainment, int, 0444);
3a74f6f2
JZ		 179#endif
180
af223dfa
RZ		 181MODULE_PARM_DESC(sclkdeepsleep, "SCLK Deep Sleep (1 = enable (default), 0 = disable)");
182module_param_named(sclkdeepsleep, amdgpu_sclk_deep_sleep_en, int, 0444);
183
cd474ba0
AD		 184MODULE_PARM_DESC(pcie_gen_cap, "PCIE Gen Caps (0: autodetect (default))");
185module_param_named(pcie_gen_cap, amdgpu_pcie_gen_cap, uint, 0444);
186
187MODULE_PARM_DESC(pcie_lane_cap, "PCIE Lane Caps (0: autodetect (default))");
188module_param_named(pcie_lane_cap, amdgpu_pcie_lane_cap, uint, 0444);
189
395d1fb9
NH		 190MODULE_PARM_DESC(cg_mask, "Clockgating flags mask (0 = disable clock gating)");
191module_param_named(cg_mask, amdgpu_cg_mask, uint, 0444);
192
193MODULE_PARM_DESC(pg_mask, "Powergating flags mask (0 = disable power gating)");
194module_param_named(pg_mask, amdgpu_pg_mask, uint, 0444);
195
6f8941a2
NH		 196MODULE_PARM_DESC(disable_cu, "Disable CUs (se.sh.cu,...)");
197module_param_named(disable_cu, amdgpu_disable_cu, charp, 0444);
198
9accf2fd
ED		 199MODULE_PARM_DESC(virtual_display, "Enable virtual display feature (the virtual_display will be set like xxxx:xx:xx.x;xxxx:xx:xx.x)");
200module_param_named(virtual_display, amdgpu_virtual_display, charp, 0444);
e443059d 201
f498d9ed 202static const struct pci_device_id pciidlist[] = {
78fbb685
KW		 203#ifdef CONFIG_DRM_AMDGPU_SI
204 {0x1002, 0x6780, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
205 {0x1002, 0x6784, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
206 {0x1002, 0x6788, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
207 {0x1002, 0x678A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
208 {0x1002, 0x6790, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
209 {0x1002, 0x6791, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
210 {0x1002, 0x6792, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
211 {0x1002, 0x6798, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
212 {0x1002, 0x6799, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
213 {0x1002, 0x679A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
214 {0x1002, 0x679B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
215 {0x1002, 0x679E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
216 {0x1002, 0x679F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
217 {0x1002, 0x6800, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|AMD_IS_MOBILITY},
218 {0x1002, 0x6801, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|AMD_IS_MOBILITY},
219 {0x1002, 0x6802, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|AMD_IS_MOBILITY},
220 {0x1002, 0x6806, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
221 {0x1002, 0x6808, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
222 {0x1002, 0x6809, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
223 {0x1002, 0x6810, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
224 {0x1002, 0x6811, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
225 {0x1002, 0x6816, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
226 {0x1002, 0x6817, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
227 {0x1002, 0x6818, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
228 {0x1002, 0x6819, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN},
229 {0x1002, 0x6600, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
230 {0x1002, 0x6601, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
231 {0x1002, 0x6602, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
232 {0x1002, 0x6603, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
233 {0x1002, 0x6604, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
234 {0x1002, 0x6605, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
235 {0x1002, 0x6606, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
236 {0x1002, 0x6607, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
237 {0x1002, 0x6608, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND},
238 {0x1002, 0x6610, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND},
239 {0x1002, 0x6611, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND},
240 {0x1002, 0x6613, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND},
241 {0x1002, 0x6617, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
242 {0x1002, 0x6620, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
243 {0x1002, 0x6621, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
244 {0x1002, 0x6623, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND|AMD_IS_MOBILITY},
245 {0x1002, 0x6631, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_OLAND},
246 {0x1002, 0x6820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
247 {0x1002, 0x6821, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
248 {0x1002, 0x6822, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
249 {0x1002, 0x6823, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
250 {0x1002, 0x6824, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
251 {0x1002, 0x6825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
252 {0x1002, 0x6826, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
253 {0x1002, 0x6827, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
254 {0x1002, 0x6828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
255 {0x1002, 0x6829, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
256 {0x1002, 0x682A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
257 {0x1002, 0x682B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
258 {0x1002, 0x682C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
259 {0x1002, 0x682D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
260 {0x1002, 0x682F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
261 {0x1002, 0x6830, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
262 {0x1002, 0x6831, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|AMD_IS_MOBILITY},
263 {0x1002, 0x6835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
264 {0x1002, 0x6837, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
265 {0x1002, 0x6838, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
266 {0x1002, 0x6839, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
267 {0x1002, 0x683B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
268 {0x1002, 0x683D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
269 {0x1002, 0x683F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE},
270 {0x1002, 0x6660, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
271 {0x1002, 0x6663, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
272 {0x1002, 0x6664, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
273 {0x1002, 0x6665, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
274 {0x1002, 0x6667, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
275 {0x1002, 0x666F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAINAN|AMD_IS_MOBILITY},
276#endif
89330c39
AD		 277#ifdef CONFIG_DRM_AMDGPU_CIK
278 /* Kaveri */
2f7d10b3
JZ		 279 {0x1002, 0x1304, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
280 {0x1002, 0x1305, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
281 {0x1002, 0x1306, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
282 {0x1002, 0x1307, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
283 {0x1002, 0x1309, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
284 {0x1002, 0x130A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
285 {0x1002, 0x130B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
286 {0x1002, 0x130C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
287 {0x1002, 0x130D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
288 {0x1002, 0x130E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
289 {0x1002, 0x130F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
290 {0x1002, 0x1310, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
291 {0x1002, 0x1311, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
292 {0x1002, 0x1312, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
293 {0x1002, 0x1313, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
294 {0x1002, 0x1315, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
295 {0x1002, 0x1316, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
296 {0x1002, 0x1317, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
297 {0x1002, 0x1318, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_MOBILITY|AMD_IS_APU},
298 {0x1002, 0x131B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
299 {0x1002, 0x131C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
300 {0x1002, 0x131D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KAVERI|AMD_IS_APU},
89330c39 301 /* Bonaire */
2f7d10b3
JZ		 302 {0x1002, 0x6640, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE|AMD_IS_MOBILITY},
303 {0x1002, 0x6641, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE|AMD_IS_MOBILITY},
304 {0x1002, 0x6646, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE|AMD_IS_MOBILITY},
305 {0x1002, 0x6647, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE|AMD_IS_MOBILITY},
89330c39
AD		 306 {0x1002, 0x6649, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
307 {0x1002, 0x6650, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
308 {0x1002, 0x6651, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
309 {0x1002, 0x6658, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
310 {0x1002, 0x665c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
311 {0x1002, 0x665d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
fb4f1737 312 {0x1002, 0x665f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BONAIRE},
89330c39
AD		 313 /* Hawaii */
314 {0x1002, 0x67A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
315 {0x1002, 0x67A1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
316 {0x1002, 0x67A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
317 {0x1002, 0x67A8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
318 {0x1002, 0x67A9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
319 {0x1002, 0x67AA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
320 {0x1002, 0x67B0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
321 {0x1002, 0x67B1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
322 {0x1002, 0x67B8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
323 {0x1002, 0x67B9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
324 {0x1002, 0x67BA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
325 {0x1002, 0x67BE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HAWAII},
326 /* Kabini */
2f7d10b3
JZ		 327 {0x1002, 0x9830, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
328 {0x1002, 0x9831, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
329 {0x1002, 0x9832, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
330 {0x1002, 0x9833, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
331 {0x1002, 0x9834, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
332 {0x1002, 0x9835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
333 {0x1002, 0x9836, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
334 {0x1002, 0x9837, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
335 {0x1002, 0x9838, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
336 {0x1002, 0x9839, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
337 {0x1002, 0x983a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
338 {0x1002, 0x983b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_MOBILITY|AMD_IS_APU},
339 {0x1002, 0x983c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
340 {0x1002, 0x983d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
341 {0x1002, 0x983e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
342 {0x1002, 0x983f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|AMD_IS_APU},
89330c39 343 /* mullins */
2f7d10b3
JZ		 344 {0x1002, 0x9850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
345 {0x1002, 0x9851, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
346 {0x1002, 0x9852, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
347 {0x1002, 0x9853, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
348 {0x1002, 0x9854, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
349 {0x1002, 0x9855, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
350 {0x1002, 0x9856, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
351 {0x1002, 0x9857, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
352 {0x1002, 0x9858, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
353 {0x1002, 0x9859, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
354 {0x1002, 0x985A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
355 {0x1002, 0x985B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
356 {0x1002, 0x985C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
357 {0x1002, 0x985D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
358 {0x1002, 0x985E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
359 {0x1002, 0x985F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|AMD_IS_MOBILITY|AMD_IS_APU},
89330c39 360#endif
1256a8b8 361 /* topaz */
dba280b2
AD		 362 {0x1002, 0x6900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
363 {0x1002, 0x6901, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
364 {0x1002, 0x6902, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
365 {0x1002, 0x6903, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
366 {0x1002, 0x6907, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TOPAZ},
1256a8b8
AD		 367 /* tonga */
368 {0x1002, 0x6920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
369 {0x1002, 0x6921, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
370 {0x1002, 0x6928, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
1f8d9625 371 {0x1002, 0x6929, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
1256a8b8
AD		 372 {0x1002, 0x692B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
373 {0x1002, 0x692F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
1f8d9625 374 {0x1002, 0x6930, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
1256a8b8
AD		 375 {0x1002, 0x6938, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
376 {0x1002, 0x6939, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TONGA},
2da78e21
DZ		 377 /* fiji */
378 {0x1002, 0x7300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_FIJI},
1256a8b8 379 /* carrizo */
2f7d10b3
JZ		 380 {0x1002, 0x9870, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CARRIZO|AMD_IS_APU},
381 {0x1002, 0x9874, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CARRIZO|AMD_IS_APU},
382 {0x1002, 0x9875, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CARRIZO|AMD_IS_APU},
383 {0x1002, 0x9876, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CARRIZO|AMD_IS_APU},
384 {0x1002, 0x9877, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CARRIZO|AMD_IS_APU},
81b1509a
SL		 385 /* stoney */
386 {0x1002, 0x98E4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_STONEY|AMD_IS_APU},
2cc0c0b5
FC		 387 /* Polaris11 */
388 {0x1002, 0x67E0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
35621b80 389 {0x1002, 0x67E3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
2cc0c0b5 390 {0x1002, 0x67E8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
2cc0c0b5 391 {0x1002, 0x67EB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
35621b80 392 {0x1002, 0x67EF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
2cc0c0b5 393 {0x1002, 0x67FF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
35621b80
FC		 394 {0x1002, 0x67E1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
395 {0x1002, 0x67E7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
396 {0x1002, 0x67E9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS11},
2cc0c0b5
FC		 397 /* Polaris10 */
398 {0x1002, 0x67C0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
1dcf4801
FC		 399 {0x1002, 0x67C1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
400 {0x1002, 0x67C2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
401 {0x1002, 0x67C4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
402 {0x1002, 0x67C7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
2cc0c0b5 403 {0x1002, 0x67DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
1dcf4801
FC		 404 {0x1002, 0x67C8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
405 {0x1002, 0x67C9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
406 {0x1002, 0x67CA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
407 {0x1002, 0x67CC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
408 {0x1002, 0x67CF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
d38ceaf9
AD		 409
410 {0, 0, 0}
411};
412
413MODULE_DEVICE_TABLE(pci, pciidlist);
414
415static struct drm_driver kms_driver;
416
417static int amdgpu_kick_out_firmware_fb(struct pci_dev *pdev)
418{
419 struct apertures_struct *ap;
420 bool primary = false;
421
422 ap = alloc_apertures(1);
423 if (!ap)
424 return -ENOMEM;
425
426 ap->ranges[0].base = pci_resource_start(pdev, 0);
427 ap->ranges[0].size = pci_resource_len(pdev, 0);
428
429#ifdef CONFIG_X86
430 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
431#endif
432 remove_conflicting_framebuffers(ap, "amdgpudrmfb", primary);
433 kfree(ap);
434
435 return 0;
436}
437
438static int amdgpu_pci_probe(struct pci_dev *pdev,
439 const struct pci_device_id *ent)
440{
441 unsigned long flags = ent->driver_data;
442 int ret;
443
2f7d10b3 444 if ((flags & AMD_EXP_HW_SUPPORT) && !amdgpu_exp_hw_support) {
d38ceaf9
AD		 445 DRM_INFO("This hardware requires experimental hardware support.\n"
446 "See modparam exp_hw_support\n");
447 return -ENODEV;
448 }
449
efb1c658
OG		 450 /*
451 * Initialize amdkfd before starting radeon. If it was not loaded yet,
452 * defer radeon probing
453 */
454 ret = amdgpu_amdkfd_init();
455 if (ret == -EPROBE_DEFER)
456 return ret;
457
d38ceaf9
AD		 458 /* Get rid of things like offb */
459 ret = amdgpu_kick_out_firmware_fb(pdev);
460 if (ret)
461 return ret;
462
463 return drm_get_pci_dev(pdev, ent, &kms_driver);
464}
465
466static void
467amdgpu_pci_remove(struct pci_dev *pdev)
468{
469 struct drm_device *dev = pci_get_drvdata(pdev);
470
471 drm_put_dev(dev);
472}
473
474static int amdgpu_pmops_suspend(struct device *dev)
475{
476 struct pci_dev *pdev = to_pci_dev(dev);
477 struct drm_device *drm_dev = pci_get_drvdata(pdev);
810ddc3a 478 return amdgpu_device_suspend(drm_dev, true, true);
d38ceaf9
AD		 479}
480
481static int amdgpu_pmops_resume(struct device *dev)
482{
483 struct pci_dev *pdev = to_pci_dev(dev);
484 struct drm_device *drm_dev = pci_get_drvdata(pdev);
85e154c2
AD		 485
486 /* GPU comes up enabled by the bios on resume */
487 if (amdgpu_device_is_px(drm_dev)) {
488 pm_runtime_disable(dev);
489 pm_runtime_set_active(dev);
490 pm_runtime_enable(dev);
491 }
492
810ddc3a 493 return amdgpu_device_resume(drm_dev, true, true);
d38ceaf9
AD		 494}
495
496static int amdgpu_pmops_freeze(struct device *dev)
497{
498 struct pci_dev *pdev = to_pci_dev(dev);
499 struct drm_device *drm_dev = pci_get_drvdata(pdev);
810ddc3a 500 return amdgpu_device_suspend(drm_dev, false, true);
d38ceaf9
AD		 501}
502
503static int amdgpu_pmops_thaw(struct device *dev)
504{
505 struct pci_dev *pdev = to_pci_dev(dev);
506 struct drm_device *drm_dev = pci_get_drvdata(pdev);
810ddc3a 507 return amdgpu_device_resume(drm_dev, false, true);
d38ceaf9
AD		 508}
509
510static int amdgpu_pmops_runtime_suspend(struct device *dev)
511{
512 struct pci_dev *pdev = to_pci_dev(dev);
513 struct drm_device *drm_dev = pci_get_drvdata(pdev);
514 int ret;
515
516 if (!amdgpu_device_is_px(drm_dev)) {
517 pm_runtime_forbid(dev);
518 return -EBUSY;
519 }
520
521 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
522 drm_kms_helper_poll_disable(drm_dev);
523 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
524
810ddc3a 525 ret = amdgpu_device_suspend(drm_dev, false, false);
d38ceaf9
AD		 526 pci_save_state(pdev);
527 pci_disable_device(pdev);
528 pci_ignore_hotplug(pdev);
11670975
AD		 529 if (amdgpu_is_atpx_hybrid())
530 pci_set_power_state(pdev, PCI_D3cold);
522761cb 531 else if (!amdgpu_has_atpx_dgpu_power_cntl())
7e32aa61 532 pci_set_power_state(pdev, PCI_D3hot);
d38ceaf9
AD		 533 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
534
535 return 0;
536}
537
538static int amdgpu_pmops_runtime_resume(struct device *dev)
539{
540 struct pci_dev *pdev = to_pci_dev(dev);
541 struct drm_device *drm_dev = pci_get_drvdata(pdev);
542 int ret;
543
544 if (!amdgpu_device_is_px(drm_dev))
545 return -EINVAL;
546
547 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
548
522761cb
AD		 549 if (amdgpu_is_atpx_hybrid() ||
550 !amdgpu_has_atpx_dgpu_power_cntl())
551 pci_set_power_state(pdev, PCI_D0);
d38ceaf9
AD		 552 pci_restore_state(pdev);
553 ret = pci_enable_device(pdev);
554 if (ret)
555 return ret;
556 pci_set_master(pdev);
557
810ddc3a 558 ret = amdgpu_device_resume(drm_dev, false, false);
d38ceaf9
AD		 559 drm_kms_helper_poll_enable(drm_dev);
560 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
561 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
562 return 0;
563}
564
565static int amdgpu_pmops_runtime_idle(struct device *dev)
566{
567 struct pci_dev *pdev = to_pci_dev(dev);
568 struct drm_device *drm_dev = pci_get_drvdata(pdev);
569 struct drm_crtc *crtc;
570
571 if (!amdgpu_device_is_px(drm_dev)) {
572 pm_runtime_forbid(dev);
573 return -EBUSY;
574 }
575
576 list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
577 if (crtc->enabled) {
578 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
579 return -EBUSY;
580 }
581 }
582
583 pm_runtime_mark_last_busy(dev);
584 pm_runtime_autosuspend(dev);
585 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
586 return 1;
587}
588
589long amdgpu_drm_ioctl(struct file *filp,
590 unsigned int cmd, unsigned long arg)
591{
592 struct drm_file *file_priv = filp->private_data;
593 struct drm_device *dev;
594 long ret;
595 dev = file_priv->minor->dev;
596 ret = pm_runtime_get_sync(dev->dev);
597 if (ret < 0)
598 return ret;
599
600 ret = drm_ioctl(filp, cmd, arg);
601
602 pm_runtime_mark_last_busy(dev->dev);
603 pm_runtime_put_autosuspend(dev->dev);
604 return ret;
605}
606
607static const struct dev_pm_ops amdgpu_pm_ops = {
608 .suspend = amdgpu_pmops_suspend,
609 .resume = amdgpu_pmops_resume,
610 .freeze = amdgpu_pmops_freeze,
611 .thaw = amdgpu_pmops_thaw,
612 .poweroff = amdgpu_pmops_freeze,
613 .restore = amdgpu_pmops_resume,
614 .runtime_suspend = amdgpu_pmops_runtime_suspend,
615 .runtime_resume = amdgpu_pmops_runtime_resume,
616 .runtime_idle = amdgpu_pmops_runtime_idle,
617};
618
619static const struct file_operations amdgpu_driver_kms_fops = {
620 .owner = THIS_MODULE,
621 .open = drm_open,
622 .release = drm_release,
623 .unlocked_ioctl = amdgpu_drm_ioctl,
624 .mmap = amdgpu_mmap,
625 .poll = drm_poll,
626 .read = drm_read,
627#ifdef CONFIG_COMPAT
628 .compat_ioctl = amdgpu_kms_compat_ioctl,
629#endif
630};
631
632static struct drm_driver kms_driver = {
633 .driver_features =
634 DRIVER_USE_AGP |
635 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
7056bb5c 636 DRIVER_PRIME | DRIVER_RENDER | DRIVER_MODESET,
d38ceaf9
AD		 637 .dev_priv_size = 0,
638 .load = amdgpu_driver_load_kms,
639 .open = amdgpu_driver_open_kms,
640 .preclose = amdgpu_driver_preclose_kms,
641 .postclose = amdgpu_driver_postclose_kms,
642 .lastclose = amdgpu_driver_lastclose_kms,
643 .set_busid = drm_pci_set_busid,
644 .unload = amdgpu_driver_unload_kms,
645 .get_vblank_counter = amdgpu_get_vblank_counter_kms,
646 .enable_vblank = amdgpu_enable_vblank_kms,
647 .disable_vblank = amdgpu_disable_vblank_kms,
648 .get_vblank_timestamp = amdgpu_get_vblank_timestamp_kms,
649 .get_scanout_position = amdgpu_get_crtc_scanoutpos,
650#if defined(CONFIG_DEBUG_FS)
651 .debugfs_init = amdgpu_debugfs_init,
652 .debugfs_cleanup = amdgpu_debugfs_cleanup,
653#endif
654 .irq_preinstall = amdgpu_irq_preinstall,
655 .irq_postinstall = amdgpu_irq_postinstall,
656 .irq_uninstall = amdgpu_irq_uninstall,
657 .irq_handler = amdgpu_irq_handler,
658 .ioctls = amdgpu_ioctls_kms,
e7294dee 659 .gem_free_object_unlocked = amdgpu_gem_object_free,
d38ceaf9
AD		 660 .gem_open_object = amdgpu_gem_object_open,
661 .gem_close_object = amdgpu_gem_object_close,
662 .dumb_create = amdgpu_mode_dumb_create,
663 .dumb_map_offset = amdgpu_mode_dumb_mmap,
664 .dumb_destroy = drm_gem_dumb_destroy,
665 .fops = &amdgpu_driver_kms_fops,
666
667 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
668 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
669 .gem_prime_export = amdgpu_gem_prime_export,
670 .gem_prime_import = drm_gem_prime_import,
671 .gem_prime_pin = amdgpu_gem_prime_pin,
672 .gem_prime_unpin = amdgpu_gem_prime_unpin,
673 .gem_prime_res_obj = amdgpu_gem_prime_res_obj,
674 .gem_prime_get_sg_table = amdgpu_gem_prime_get_sg_table,
675 .gem_prime_import_sg_table = amdgpu_gem_prime_import_sg_table,
676 .gem_prime_vmap = amdgpu_gem_prime_vmap,
677 .gem_prime_vunmap = amdgpu_gem_prime_vunmap,
678
679 .name = DRIVER_NAME,
680 .desc = DRIVER_DESC,
681 .date = DRIVER_DATE,
682 .major = KMS_DRIVER_MAJOR,
683 .minor = KMS_DRIVER_MINOR,
684 .patchlevel = KMS_DRIVER_PATCHLEVEL,
685};
686
687static struct drm_driver *driver;
688static struct pci_driver *pdriver;
689
690static struct pci_driver amdgpu_kms_pci_driver = {
691 .name = DRIVER_NAME,
692 .id_table = pciidlist,
693 .probe = amdgpu_pci_probe,
694 .remove = amdgpu_pci_remove,
695 .driver.pm = &amdgpu_pm_ops,
696};
697
d573de2d
RZ		 698
699
d38ceaf9
AD		 700static int __init amdgpu_init(void)
701{
257bf15a 702 amdgpu_sync_init();
d573de2d 703 amdgpu_fence_slab_init();
d38ceaf9
AD		 704 if (vgacon_text_force()) {
705 DRM_ERROR("VGACON disables amdgpu kernel modesetting.\n");
706 return -EINVAL;
707 }
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AD		 708 DRM_INFO("amdgpu kernel modesetting enabled.\n");
709 driver = &kms_driver;
710 pdriver = &amdgpu_kms_pci_driver;
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AD		 711 driver->num_ioctls = amdgpu_max_kms_ioctl;
712 amdgpu_register_atpx_handler();
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AD		 713 /* let modprobe override vga console setting */
714 return drm_pci_init(driver, pdriver);
715}
716
717static void __exit amdgpu_exit(void)
718{
130e0371 719 amdgpu_amdkfd_fini();
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AD		 720 drm_pci_exit(driver, pdriver);
721 amdgpu_unregister_atpx_handler();
257bf15a 722 amdgpu_sync_fini();
d573de2d 723 amdgpu_fence_slab_fini();
d38ceaf9
AD		 724}
725
726module_init(amdgpu_init);
727module_exit(amdgpu_exit);
728
729MODULE_AUTHOR(DRIVER_AUTHOR);
730MODULE_DESCRIPTION(DRIVER_DESC);
731MODULE_LICENSE("GPL and additional rights");
Linux 6.x block layer and io_uring tree(s)