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d38ceaf9 AD |
1 | /* |
2 | * Copyright (c) 2010 Red Hat Inc. | |
3 | * Author : Dave Airlie <airlied@redhat.com> | |
4 | * | |
5 | * Licensed under GPLv2 | |
6 | * | |
7 | * ATPX support for both Intel/ATI | |
8 | */ | |
9 | #include <linux/vga_switcheroo.h> | |
10 | #include <linux/slab.h> | |
11 | #include <linux/acpi.h> | |
12 | #include <linux/pci.h> | |
f81eb1a3 | 13 | #include <linux/delay.h> |
d38ceaf9 | 14 | |
66dc0ddd | 15 | #include "amd_acpi.h" |
d38ceaf9 AD |
16 | |
17 | struct amdgpu_atpx_functions { | |
18 | bool px_params; | |
19 | bool power_cntl; | |
20 | bool disp_mux_cntl; | |
21 | bool i2c_mux_cntl; | |
22 | bool switch_start; | |
23 | bool switch_end; | |
24 | bool disp_connectors_mapping; | |
25 | bool disp_detetion_ports; | |
26 | }; | |
27 | ||
28 | struct amdgpu_atpx { | |
29 | acpi_handle handle; | |
30 | struct amdgpu_atpx_functions functions; | |
2f5af82e | 31 | bool is_hybrid; |
d38ceaf9 AD |
32 | }; |
33 | ||
34 | static struct amdgpu_atpx_priv { | |
35 | bool atpx_detected; | |
36 | /* handle for device - and atpx */ | |
37 | acpi_handle dhandle; | |
38 | acpi_handle other_handle; | |
39 | struct amdgpu_atpx atpx; | |
40 | } amdgpu_atpx_priv; | |
41 | ||
42 | struct atpx_verify_interface { | |
43 | u16 size; /* structure size in bytes (includes size field) */ | |
44 | u16 version; /* version */ | |
45 | u32 function_bits; /* supported functions bit vector */ | |
46 | } __packed; | |
47 | ||
48 | struct atpx_px_params { | |
49 | u16 size; /* structure size in bytes (includes size field) */ | |
50 | u32 valid_flags; /* which flags are valid */ | |
51 | u32 flags; /* flags */ | |
52 | } __packed; | |
53 | ||
54 | struct atpx_power_control { | |
55 | u16 size; | |
56 | u8 dgpu_state; | |
57 | } __packed; | |
58 | ||
59 | struct atpx_mux { | |
60 | u16 size; | |
61 | u16 mux; | |
62 | } __packed; | |
63 | ||
64 | bool amdgpu_has_atpx(void) { | |
65 | return amdgpu_atpx_priv.atpx_detected; | |
66 | } | |
67 | ||
a78fe133 AD |
68 | bool amdgpu_has_atpx_dgpu_power_cntl(void) { |
69 | return amdgpu_atpx_priv.atpx.functions.power_cntl; | |
70 | } | |
71 | ||
2f5af82e AD |
72 | bool amdgpu_is_atpx_hybrid(void) { |
73 | return amdgpu_atpx_priv.atpx.is_hybrid; | |
74 | } | |
75 | ||
d38ceaf9 AD |
76 | /** |
77 | * amdgpu_atpx_call - call an ATPX method | |
78 | * | |
79 | * @handle: acpi handle | |
80 | * @function: the ATPX function to execute | |
81 | * @params: ATPX function params | |
82 | * | |
83 | * Executes the requested ATPX function (all asics). | |
84 | * Returns a pointer to the acpi output buffer. | |
85 | */ | |
86 | static union acpi_object *amdgpu_atpx_call(acpi_handle handle, int function, | |
87 | struct acpi_buffer *params) | |
88 | { | |
89 | acpi_status status; | |
90 | union acpi_object atpx_arg_elements[2]; | |
91 | struct acpi_object_list atpx_arg; | |
92 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; | |
93 | ||
94 | atpx_arg.count = 2; | |
95 | atpx_arg.pointer = &atpx_arg_elements[0]; | |
96 | ||
97 | atpx_arg_elements[0].type = ACPI_TYPE_INTEGER; | |
98 | atpx_arg_elements[0].integer.value = function; | |
99 | ||
100 | if (params) { | |
101 | atpx_arg_elements[1].type = ACPI_TYPE_BUFFER; | |
102 | atpx_arg_elements[1].buffer.length = params->length; | |
103 | atpx_arg_elements[1].buffer.pointer = params->pointer; | |
104 | } else { | |
105 | /* We need a second fake parameter */ | |
106 | atpx_arg_elements[1].type = ACPI_TYPE_INTEGER; | |
107 | atpx_arg_elements[1].integer.value = 0; | |
108 | } | |
109 | ||
110 | status = acpi_evaluate_object(handle, NULL, &atpx_arg, &buffer); | |
111 | ||
112 | /* Fail only if calling the method fails and ATPX is supported */ | |
113 | if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) { | |
114 | printk("failed to evaluate ATPX got %s\n", | |
115 | acpi_format_exception(status)); | |
116 | kfree(buffer.pointer); | |
117 | return NULL; | |
118 | } | |
119 | ||
120 | return buffer.pointer; | |
121 | } | |
122 | ||
123 | /** | |
124 | * amdgpu_atpx_parse_functions - parse supported functions | |
125 | * | |
126 | * @f: supported functions struct | |
127 | * @mask: supported functions mask from ATPX | |
128 | * | |
129 | * Use the supported functions mask from ATPX function | |
130 | * ATPX_FUNCTION_VERIFY_INTERFACE to determine what functions | |
131 | * are supported (all asics). | |
132 | */ | |
133 | static void amdgpu_atpx_parse_functions(struct amdgpu_atpx_functions *f, u32 mask) | |
134 | { | |
135 | f->px_params = mask & ATPX_GET_PX_PARAMETERS_SUPPORTED; | |
136 | f->power_cntl = mask & ATPX_POWER_CONTROL_SUPPORTED; | |
137 | f->disp_mux_cntl = mask & ATPX_DISPLAY_MUX_CONTROL_SUPPORTED; | |
138 | f->i2c_mux_cntl = mask & ATPX_I2C_MUX_CONTROL_SUPPORTED; | |
139 | f->switch_start = mask & ATPX_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION_SUPPORTED; | |
140 | f->switch_end = mask & ATPX_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION_SUPPORTED; | |
141 | f->disp_connectors_mapping = mask & ATPX_GET_DISPLAY_CONNECTORS_MAPPING_SUPPORTED; | |
142 | f->disp_detetion_ports = mask & ATPX_GET_DISPLAY_DETECTION_PORTS_SUPPORTED; | |
143 | } | |
144 | ||
145 | /** | |
146 | * amdgpu_atpx_validate_functions - validate ATPX functions | |
147 | * | |
148 | * @atpx: amdgpu atpx struct | |
149 | * | |
150 | * Validate that required functions are enabled (all asics). | |
151 | * returns 0 on success, error on failure. | |
152 | */ | |
153 | static int amdgpu_atpx_validate(struct amdgpu_atpx *atpx) | |
154 | { | |
8d45f80e | 155 | u32 valid_bits = 0; |
e9bef455 | 156 | |
d38ceaf9 AD |
157 | if (atpx->functions.px_params) { |
158 | union acpi_object *info; | |
159 | struct atpx_px_params output; | |
160 | size_t size; | |
d38ceaf9 AD |
161 | |
162 | info = amdgpu_atpx_call(atpx->handle, ATPX_FUNCTION_GET_PX_PARAMETERS, NULL); | |
163 | if (!info) | |
164 | return -EIO; | |
165 | ||
166 | memset(&output, 0, sizeof(output)); | |
167 | ||
168 | size = *(u16 *) info->buffer.pointer; | |
169 | if (size < 10) { | |
170 | printk("ATPX buffer is too small: %zu\n", size); | |
171 | kfree(info); | |
172 | return -EINVAL; | |
173 | } | |
174 | size = min(sizeof(output), size); | |
175 | ||
176 | memcpy(&output, info->buffer.pointer, size); | |
177 | ||
178 | valid_bits = output.flags & output.valid_flags; | |
5c614792 | 179 | |
d38ceaf9 AD |
180 | kfree(info); |
181 | } | |
8d45f80e AD |
182 | |
183 | /* if separate mux flag is set, mux controls are required */ | |
184 | if (valid_bits & ATPX_SEPARATE_MUX_FOR_I2C) { | |
185 | atpx->functions.i2c_mux_cntl = true; | |
186 | atpx->functions.disp_mux_cntl = true; | |
187 | } | |
188 | /* if any outputs are muxed, mux controls are required */ | |
189 | if (valid_bits & (ATPX_CRT1_RGB_SIGNAL_MUXED | | |
190 | ATPX_TV_SIGNAL_MUXED | | |
191 | ATPX_DFP_SIGNAL_MUXED)) | |
192 | atpx->functions.disp_mux_cntl = true; | |
193 | ||
194 | ||
195 | /* some bioses set these bits rather than flagging power_cntl as supported */ | |
196 | if (valid_bits & (ATPX_DYNAMIC_PX_SUPPORTED | | |
197 | ATPX_DYNAMIC_DGPU_POWER_OFF_SUPPORTED)) | |
198 | atpx->functions.power_cntl = true; | |
199 | ||
2f5af82e | 200 | atpx->is_hybrid = false; |
8d45f80e | 201 | if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) { |
2f5af82e | 202 | printk("ATPX Hybrid Graphics\n"); |
c63695cc AD |
203 | #if 1 |
204 | /* This is a temporary hack until the D3 cold support | |
205 | * makes it upstream. The ATPX power_control method seems | |
206 | * to still work on even if the system should be using | |
207 | * the new standardized hybrid D3 cold ACPI interface. | |
208 | */ | |
209 | atpx->functions.power_cntl = true; | |
210 | #else | |
8d45f80e | 211 | atpx->functions.power_cntl = false; |
c63695cc | 212 | #endif |
2f5af82e | 213 | atpx->is_hybrid = true; |
8d45f80e AD |
214 | } |
215 | ||
d38ceaf9 AD |
216 | return 0; |
217 | } | |
218 | ||
219 | /** | |
220 | * amdgpu_atpx_verify_interface - verify ATPX | |
221 | * | |
222 | * @atpx: amdgpu atpx struct | |
223 | * | |
224 | * Execute the ATPX_FUNCTION_VERIFY_INTERFACE ATPX function | |
225 | * to initialize ATPX and determine what features are supported | |
226 | * (all asics). | |
227 | * returns 0 on success, error on failure. | |
228 | */ | |
229 | static int amdgpu_atpx_verify_interface(struct amdgpu_atpx *atpx) | |
230 | { | |
231 | union acpi_object *info; | |
232 | struct atpx_verify_interface output; | |
233 | size_t size; | |
234 | int err = 0; | |
235 | ||
236 | info = amdgpu_atpx_call(atpx->handle, ATPX_FUNCTION_VERIFY_INTERFACE, NULL); | |
237 | if (!info) | |
238 | return -EIO; | |
239 | ||
240 | memset(&output, 0, sizeof(output)); | |
241 | ||
242 | size = *(u16 *) info->buffer.pointer; | |
243 | if (size < 8) { | |
244 | printk("ATPX buffer is too small: %zu\n", size); | |
245 | err = -EINVAL; | |
246 | goto out; | |
247 | } | |
248 | size = min(sizeof(output), size); | |
249 | ||
250 | memcpy(&output, info->buffer.pointer, size); | |
251 | ||
252 | /* TODO: check version? */ | |
253 | printk("ATPX version %u, functions 0x%08x\n", | |
254 | output.version, output.function_bits); | |
255 | ||
256 | amdgpu_atpx_parse_functions(&atpx->functions, output.function_bits); | |
257 | ||
258 | out: | |
259 | kfree(info); | |
260 | return err; | |
261 | } | |
262 | ||
263 | /** | |
264 | * amdgpu_atpx_set_discrete_state - power up/down discrete GPU | |
265 | * | |
266 | * @atpx: atpx info struct | |
267 | * @state: discrete GPU state (0 = power down, 1 = power up) | |
268 | * | |
269 | * Execute the ATPX_FUNCTION_POWER_CONTROL ATPX function to | |
270 | * power down/up the discrete GPU (all asics). | |
271 | * Returns 0 on success, error on failure. | |
272 | */ | |
273 | static int amdgpu_atpx_set_discrete_state(struct amdgpu_atpx *atpx, u8 state) | |
274 | { | |
275 | struct acpi_buffer params; | |
276 | union acpi_object *info; | |
277 | struct atpx_power_control input; | |
278 | ||
279 | if (atpx->functions.power_cntl) { | |
280 | input.size = 3; | |
281 | input.dgpu_state = state; | |
282 | params.length = input.size; | |
283 | params.pointer = &input; | |
284 | info = amdgpu_atpx_call(atpx->handle, | |
285 | ATPX_FUNCTION_POWER_CONTROL, | |
286 | ¶ms); | |
287 | if (!info) | |
288 | return -EIO; | |
289 | kfree(info); | |
f81eb1a3 AD |
290 | |
291 | /* 200ms delay is required after off */ | |
292 | if (state == 0) | |
293 | msleep(200); | |
d38ceaf9 AD |
294 | } |
295 | return 0; | |
296 | } | |
297 | ||
298 | /** | |
299 | * amdgpu_atpx_switch_disp_mux - switch display mux | |
300 | * | |
301 | * @atpx: atpx info struct | |
302 | * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU) | |
303 | * | |
304 | * Execute the ATPX_FUNCTION_DISPLAY_MUX_CONTROL ATPX function to | |
305 | * switch the display mux between the discrete GPU and integrated GPU | |
306 | * (all asics). | |
307 | * Returns 0 on success, error on failure. | |
308 | */ | |
309 | static int amdgpu_atpx_switch_disp_mux(struct amdgpu_atpx *atpx, u16 mux_id) | |
310 | { | |
311 | struct acpi_buffer params; | |
312 | union acpi_object *info; | |
313 | struct atpx_mux input; | |
314 | ||
315 | if (atpx->functions.disp_mux_cntl) { | |
316 | input.size = 4; | |
317 | input.mux = mux_id; | |
318 | params.length = input.size; | |
319 | params.pointer = &input; | |
320 | info = amdgpu_atpx_call(atpx->handle, | |
321 | ATPX_FUNCTION_DISPLAY_MUX_CONTROL, | |
322 | ¶ms); | |
323 | if (!info) | |
324 | return -EIO; | |
325 | kfree(info); | |
326 | } | |
327 | return 0; | |
328 | } | |
329 | ||
330 | /** | |
331 | * amdgpu_atpx_switch_i2c_mux - switch i2c/hpd mux | |
332 | * | |
333 | * @atpx: atpx info struct | |
334 | * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU) | |
335 | * | |
336 | * Execute the ATPX_FUNCTION_I2C_MUX_CONTROL ATPX function to | |
337 | * switch the i2c/hpd mux between the discrete GPU and integrated GPU | |
338 | * (all asics). | |
339 | * Returns 0 on success, error on failure. | |
340 | */ | |
341 | static int amdgpu_atpx_switch_i2c_mux(struct amdgpu_atpx *atpx, u16 mux_id) | |
342 | { | |
343 | struct acpi_buffer params; | |
344 | union acpi_object *info; | |
345 | struct atpx_mux input; | |
346 | ||
347 | if (atpx->functions.i2c_mux_cntl) { | |
348 | input.size = 4; | |
349 | input.mux = mux_id; | |
350 | params.length = input.size; | |
351 | params.pointer = &input; | |
352 | info = amdgpu_atpx_call(atpx->handle, | |
353 | ATPX_FUNCTION_I2C_MUX_CONTROL, | |
354 | ¶ms); | |
355 | if (!info) | |
356 | return -EIO; | |
357 | kfree(info); | |
358 | } | |
359 | return 0; | |
360 | } | |
361 | ||
362 | /** | |
363 | * amdgpu_atpx_switch_start - notify the sbios of a GPU switch | |
364 | * | |
365 | * @atpx: atpx info struct | |
366 | * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU) | |
367 | * | |
368 | * Execute the ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION ATPX | |
369 | * function to notify the sbios that a switch between the discrete GPU and | |
370 | * integrated GPU has begun (all asics). | |
371 | * Returns 0 on success, error on failure. | |
372 | */ | |
373 | static int amdgpu_atpx_switch_start(struct amdgpu_atpx *atpx, u16 mux_id) | |
374 | { | |
375 | struct acpi_buffer params; | |
376 | union acpi_object *info; | |
377 | struct atpx_mux input; | |
378 | ||
379 | if (atpx->functions.switch_start) { | |
380 | input.size = 4; | |
381 | input.mux = mux_id; | |
382 | params.length = input.size; | |
383 | params.pointer = &input; | |
384 | info = amdgpu_atpx_call(atpx->handle, | |
385 | ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION, | |
386 | ¶ms); | |
387 | if (!info) | |
388 | return -EIO; | |
389 | kfree(info); | |
390 | } | |
391 | return 0; | |
392 | } | |
393 | ||
394 | /** | |
395 | * amdgpu_atpx_switch_end - notify the sbios of a GPU switch | |
396 | * | |
397 | * @atpx: atpx info struct | |
398 | * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU) | |
399 | * | |
400 | * Execute the ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION ATPX | |
401 | * function to notify the sbios that a switch between the discrete GPU and | |
402 | * integrated GPU has ended (all asics). | |
403 | * Returns 0 on success, error on failure. | |
404 | */ | |
405 | static int amdgpu_atpx_switch_end(struct amdgpu_atpx *atpx, u16 mux_id) | |
406 | { | |
407 | struct acpi_buffer params; | |
408 | union acpi_object *info; | |
409 | struct atpx_mux input; | |
410 | ||
411 | if (atpx->functions.switch_end) { | |
412 | input.size = 4; | |
413 | input.mux = mux_id; | |
414 | params.length = input.size; | |
415 | params.pointer = &input; | |
416 | info = amdgpu_atpx_call(atpx->handle, | |
417 | ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION, | |
418 | ¶ms); | |
419 | if (!info) | |
420 | return -EIO; | |
421 | kfree(info); | |
422 | } | |
423 | return 0; | |
424 | } | |
425 | ||
426 | /** | |
427 | * amdgpu_atpx_switchto - switch to the requested GPU | |
428 | * | |
429 | * @id: GPU to switch to | |
430 | * | |
431 | * Execute the necessary ATPX functions to switch between the discrete GPU and | |
432 | * integrated GPU (all asics). | |
433 | * Returns 0 on success, error on failure. | |
434 | */ | |
435 | static int amdgpu_atpx_switchto(enum vga_switcheroo_client_id id) | |
436 | { | |
437 | u16 gpu_id; | |
438 | ||
439 | if (id == VGA_SWITCHEROO_IGD) | |
440 | gpu_id = ATPX_INTEGRATED_GPU; | |
441 | else | |
442 | gpu_id = ATPX_DISCRETE_GPU; | |
443 | ||
444 | amdgpu_atpx_switch_start(&amdgpu_atpx_priv.atpx, gpu_id); | |
445 | amdgpu_atpx_switch_disp_mux(&amdgpu_atpx_priv.atpx, gpu_id); | |
446 | amdgpu_atpx_switch_i2c_mux(&amdgpu_atpx_priv.atpx, gpu_id); | |
447 | amdgpu_atpx_switch_end(&amdgpu_atpx_priv.atpx, gpu_id); | |
448 | ||
449 | return 0; | |
450 | } | |
451 | ||
452 | /** | |
453 | * amdgpu_atpx_power_state - power down/up the requested GPU | |
454 | * | |
455 | * @id: GPU to power down/up | |
456 | * @state: requested power state (0 = off, 1 = on) | |
457 | * | |
458 | * Execute the necessary ATPX function to power down/up the discrete GPU | |
459 | * (all asics). | |
460 | * Returns 0 on success, error on failure. | |
461 | */ | |
462 | static int amdgpu_atpx_power_state(enum vga_switcheroo_client_id id, | |
463 | enum vga_switcheroo_state state) | |
464 | { | |
465 | /* on w500 ACPI can't change intel gpu state */ | |
466 | if (id == VGA_SWITCHEROO_IGD) | |
467 | return 0; | |
468 | ||
469 | amdgpu_atpx_set_discrete_state(&amdgpu_atpx_priv.atpx, state); | |
470 | return 0; | |
471 | } | |
472 | ||
473 | /** | |
474 | * amdgpu_atpx_pci_probe_handle - look up the ATPX handle | |
475 | * | |
476 | * @pdev: pci device | |
477 | * | |
478 | * Look up the ATPX handles (all asics). | |
479 | * Returns true if the handles are found, false if not. | |
480 | */ | |
481 | static bool amdgpu_atpx_pci_probe_handle(struct pci_dev *pdev) | |
482 | { | |
483 | acpi_handle dhandle, atpx_handle; | |
484 | acpi_status status; | |
485 | ||
486 | dhandle = ACPI_HANDLE(&pdev->dev); | |
487 | if (!dhandle) | |
488 | return false; | |
489 | ||
490 | status = acpi_get_handle(dhandle, "ATPX", &atpx_handle); | |
491 | if (ACPI_FAILURE(status)) { | |
492 | amdgpu_atpx_priv.other_handle = dhandle; | |
493 | return false; | |
494 | } | |
495 | amdgpu_atpx_priv.dhandle = dhandle; | |
496 | amdgpu_atpx_priv.atpx.handle = atpx_handle; | |
497 | return true; | |
498 | } | |
499 | ||
500 | /** | |
501 | * amdgpu_atpx_init - verify the ATPX interface | |
502 | * | |
503 | * Verify the ATPX interface (all asics). | |
504 | * Returns 0 on success, error on failure. | |
505 | */ | |
506 | static int amdgpu_atpx_init(void) | |
507 | { | |
508 | int r; | |
509 | ||
510 | /* set up the ATPX handle */ | |
511 | r = amdgpu_atpx_verify_interface(&amdgpu_atpx_priv.atpx); | |
512 | if (r) | |
513 | return r; | |
514 | ||
515 | /* validate the atpx setup */ | |
516 | r = amdgpu_atpx_validate(&amdgpu_atpx_priv.atpx); | |
517 | if (r) | |
518 | return r; | |
519 | ||
520 | return 0; | |
521 | } | |
522 | ||
523 | /** | |
524 | * amdgpu_atpx_get_client_id - get the client id | |
525 | * | |
526 | * @pdev: pci device | |
527 | * | |
528 | * look up whether we are the integrated or discrete GPU (all asics). | |
529 | * Returns the client id. | |
530 | */ | |
531 | static int amdgpu_atpx_get_client_id(struct pci_dev *pdev) | |
532 | { | |
533 | if (amdgpu_atpx_priv.dhandle == ACPI_HANDLE(&pdev->dev)) | |
534 | return VGA_SWITCHEROO_IGD; | |
535 | else | |
536 | return VGA_SWITCHEROO_DIS; | |
537 | } | |
538 | ||
5d170139 | 539 | static const struct vga_switcheroo_handler amdgpu_atpx_handler = { |
d38ceaf9 AD |
540 | .switchto = amdgpu_atpx_switchto, |
541 | .power_state = amdgpu_atpx_power_state, | |
542 | .init = amdgpu_atpx_init, | |
543 | .get_client_id = amdgpu_atpx_get_client_id, | |
544 | }; | |
545 | ||
546 | /** | |
547 | * amdgpu_atpx_detect - detect whether we have PX | |
548 | * | |
549 | * Check if we have a PX system (all asics). | |
550 | * Returns true if we have a PX system, false if not. | |
551 | */ | |
552 | static bool amdgpu_atpx_detect(void) | |
553 | { | |
554 | char acpi_method_name[255] = { 0 }; | |
555 | struct acpi_buffer buffer = {sizeof(acpi_method_name), acpi_method_name}; | |
556 | struct pci_dev *pdev = NULL; | |
557 | bool has_atpx = false; | |
558 | int vga_count = 0; | |
559 | ||
560 | while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) { | |
561 | vga_count++; | |
562 | ||
563 | has_atpx |= (amdgpu_atpx_pci_probe_handle(pdev) == true); | |
564 | } | |
565 | ||
566 | while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != NULL) { | |
567 | vga_count++; | |
568 | ||
569 | has_atpx |= (amdgpu_atpx_pci_probe_handle(pdev) == true); | |
570 | } | |
571 | ||
572 | if (has_atpx && vga_count == 2) { | |
573 | acpi_get_name(amdgpu_atpx_priv.atpx.handle, ACPI_FULL_PATHNAME, &buffer); | |
1694467b | 574 | printk(KERN_INFO "vga_switcheroo: detected switching method %s handle\n", |
d38ceaf9 AD |
575 | acpi_method_name); |
576 | amdgpu_atpx_priv.atpx_detected = true; | |
577 | return true; | |
578 | } | |
579 | return false; | |
580 | } | |
581 | ||
582 | /** | |
583 | * amdgpu_register_atpx_handler - register with vga_switcheroo | |
584 | * | |
585 | * Register the PX callbacks with vga_switcheroo (all asics). | |
586 | */ | |
587 | void amdgpu_register_atpx_handler(void) | |
588 | { | |
589 | bool r; | |
156d7d41 | 590 | enum vga_switcheroo_handler_flags_t handler_flags = 0; |
d38ceaf9 AD |
591 | |
592 | /* detect if we have any ATPX + 2 VGA in the system */ | |
593 | r = amdgpu_atpx_detect(); | |
594 | if (!r) | |
595 | return; | |
596 | ||
156d7d41 | 597 | vga_switcheroo_register_handler(&amdgpu_atpx_handler, handler_flags); |
d38ceaf9 AD |
598 | } |
599 | ||
600 | /** | |
601 | * amdgpu_unregister_atpx_handler - unregister with vga_switcheroo | |
602 | * | |
603 | * Unregister the PX callbacks with vga_switcheroo (all asics). | |
604 | */ | |
605 | void amdgpu_unregister_atpx_handler(void) | |
606 | { | |
607 | vga_switcheroo_unregister_handler(); | |
608 | } |