Merge tag 'soc-ep93xx-dt-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
[linux-2.6-block.git] / drivers / gpio / gpiolib.c
CommitLineData
dae5f0af 1// SPDX-License-Identifier: GPL-2.0
c47d9e1b 2
79aabb1e 3#include <linux/acpi.h>
7e92061f 4#include <linux/array_size.h>
923a654c 5#include <linux/bitmap.h>
e348544f 6#include <linux/cleanup.h>
79aabb1e
AS
7#include <linux/compat.h>
8#include <linux/debugfs.h>
d8f388d8
DB
9#include <linux/device.h>
10#include <linux/err.h>
380c7ba3 11#include <linux/errno.h>
79aabb1e
AS
12#include <linux/file.h>
13#include <linux/fs.h>
79aabb1e
AS
14#include <linux/idr.h>
15#include <linux/interrupt.h>
16#include <linux/irq.h>
17#include <linux/kernel.h>
18#include <linux/list.h>
e348544f 19#include <linux/lockdep.h>
79aabb1e 20#include <linux/module.h>
d795848e 21#include <linux/nospec.h>
380c7ba3 22#include <linux/of.h>
c771c2f4 23#include <linux/pinctrl/consumer.h>
79aabb1e
AS
24#include <linux/seq_file.h>
25#include <linux/slab.h>
26#include <linux/spinlock.h>
e348544f 27#include <linux/srcu.h>
d62fcd9f 28#include <linux/string.h>
79aabb1e 29
380c7ba3
AS
30#include <linux/gpio.h>
31#include <linux/gpio/driver.h>
32#include <linux/gpio/machine.h>
33
3c702e99 34#include <uapi/linux/gpio.h>
d2876d08 35
77cb907a 36#include "gpiolib-acpi.h"
925ca369 37#include "gpiolib-cdev.h"
79aabb1e
AS
38#include "gpiolib-of.h"
39#include "gpiolib-swnode.h"
ef087d8e 40#include "gpiolib-sysfs.h"
79aabb1e 41#include "gpiolib.h"
664e3e5a 42
3f397c21
UKK
43#define CREATE_TRACE_POINTS
44#include <trace/events/gpio.h>
d2876d08 45
79a9becd 46/* Implementation infrastructure for GPIO interfaces.
d2876d08 47 *
79a9becd
AC
48 * The GPIO programming interface allows for inlining speed-critical
49 * get/set operations for common cases, so that access to SOC-integrated
50 * GPIOs can sometimes cost only an instruction or two per bit.
d2876d08
DB
51 */
52
ff2b1359
LW
53/* Device and char device-related information */
54static DEFINE_IDA(gpio_ida);
3c702e99
LW
55static dev_t gpio_devt;
56#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
c135f401 57
d69d8048 58static int gpio_bus_match(struct device *dev, const struct device_driver *drv)
c135f401
AS
59{
60 struct fwnode_handle *fwnode = dev_fwnode(dev);
61
62 /*
63 * Only match if the fwnode doesn't already have a proper struct device
64 * created for it.
65 */
66 if (fwnode && fwnode->dev != dev)
67 return 0;
68 return 1;
69}
70
a875746f 71static const struct bus_type gpio_bus_type = {
3c702e99 72 .name = "gpio",
ced2af41 73 .match = gpio_bus_match,
3c702e99 74};
ff2b1359 75
3027743f
LA
76/*
77 * Number of GPIOs to use for the fast path in set array
78 */
79#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
80
bae48da2
AC
81static DEFINE_MUTEX(gpio_lookup_lock);
82static LIST_HEAD(gpio_lookup_list);
e348544f 83
2a9101e8 84static LIST_HEAD(gpio_devices);
e348544f
BG
85/* Protects the GPIO device list against concurrent modifications. */
86static DEFINE_MUTEX(gpio_devices_lock);
87/* Ensures coherence during read-only accesses to the list of GPIO devices. */
88DEFINE_STATIC_SRCU(gpio_devices_srcu);
6d86750c 89
a411e81e
BG
90static DEFINE_MUTEX(gpio_machine_hogs_mutex);
91static LIST_HEAD(gpio_machine_hogs);
92
4b91188d 93const char *const gpio_suffixes[] = { "gpios", "gpio", NULL };
7e92061f 94
a0b66a73
LW
95static void gpiochip_free_hogs(struct gpio_chip *gc);
96static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
97 struct lock_class_key *lock_key,
98 struct lock_class_key *request_key);
a0b66a73
LW
99static void gpiochip_irqchip_remove(struct gpio_chip *gc);
100static int gpiochip_irqchip_init_hw(struct gpio_chip *gc);
101static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc);
102static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc);
6d86750c 103
159f3cd9 104static bool gpiolib_initialized;
6d86750c 105
d23dc4a9
BG
106const char *gpiod_get_label(struct gpio_desc *desc)
107{
a86d2769 108 struct gpio_desc_label *label;
ccfb6ff4
BG
109 unsigned long flags;
110
111 flags = READ_ONCE(desc->flags);
a86d2769 112
7765ffed
BG
113 label = srcu_dereference_check(desc->label, &desc->gdev->desc_srcu,
114 srcu_read_lock_held(&desc->gdev->desc_srcu));
a86d2769 115
5a646e03
AS
116 if (test_bit(FLAG_USED_AS_IRQ, &flags))
117 return label->str ?: "interrupt";
118
119 if (!test_bit(FLAG_REQUESTED, &flags))
120 return NULL;
121
a86d2769
BG
122 return label->str;
123}
124
125static void desc_free_label(struct rcu_head *rh)
126{
127 kfree(container_of(rh, struct gpio_desc_label, rh));
d23dc4a9
BG
128}
129
1f2bcb8c 130static int desc_set_label(struct gpio_desc *desc, const char *label)
d2876d08 131{
a86d2769 132 struct gpio_desc_label *new = NULL, *old;
1f2bcb8c
BG
133
134 if (label) {
a86d2769
BG
135 new = kzalloc(struct_size(new, str, strlen(label) + 1),
136 GFP_KERNEL);
1f2bcb8c
BG
137 if (!new)
138 return -ENOMEM;
a86d2769
BG
139
140 strcpy(new->str, label);
1f2bcb8c
BG
141 }
142
143 old = rcu_replace_pointer(desc->label, new, 1);
a86d2769 144 if (old)
7765ffed 145 call_srcu(&desc->gdev->desc_srcu, &old->rh, desc_free_label);
1f2bcb8c
BG
146
147 return 0;
d2876d08
DB
148}
149
372e722e 150/**
950d55f5
TR
151 * gpio_to_desc - Convert a GPIO number to its descriptor
152 * @gpio: global GPIO number
153 *
154 * Returns:
155 * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
156 * with the given number exists in the system.
372e722e 157 */
79a9becd 158struct gpio_desc *gpio_to_desc(unsigned gpio)
372e722e 159{
ff2b1359 160 struct gpio_device *gdev;
14e85c0e 161
e348544f
BG
162 scoped_guard(srcu, &gpio_devices_srcu) {
163 list_for_each_entry_srcu(gdev, &gpio_devices, list,
164 srcu_read_lock_held(&gpio_devices_srcu)) {
165 if (gdev->base <= gpio &&
166 gdev->base + gdev->ngpio > gpio)
167 return &gdev->descs[gpio - gdev->base];
14e85c0e
AC
168 }
169 }
170
14e85c0e 171 return NULL;
372e722e 172}
79a9becd 173EXPORT_SYMBOL_GPL(gpio_to_desc);
372e722e 174
93548f8b
BG
175/* This function is deprecated and will be removed soon, don't use. */
176struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc,
177 unsigned int hwnum)
178{
179 return gpio_device_get_desc(gc->gpiodev, hwnum);
180}
93548f8b 181
d468bf9e 182/**
93548f8b
BG
183 * gpio_device_get_desc() - get the GPIO descriptor corresponding to the given
184 * hardware number for this GPIO device
185 * @gdev: GPIO device to get the descriptor from
950d55f5
TR
186 * @hwnum: hardware number of the GPIO for this chip
187 *
188 * Returns:
93548f8b
BG
189 * A pointer to the GPIO descriptor or %EINVAL if no GPIO exists in the given
190 * chip for the specified hardware number or %ENODEV if the underlying chip
191 * already vanished.
192 *
193 * The reference count of struct gpio_device is *NOT* increased like when the
194 * GPIO is being requested for exclusive usage. It's up to the caller to make
195 * sure the GPIO device will stay alive together with the descriptor returned
196 * by this function.
d468bf9e 197 */
93548f8b
BG
198struct gpio_desc *
199gpio_device_get_desc(struct gpio_device *gdev, unsigned int hwnum)
d468bf9e 200{
fdeb8e15 201 if (hwnum >= gdev->ngpio)
b7d0a28a 202 return ERR_PTR(-EINVAL);
d468bf9e 203
d795848e 204 return &gdev->descs[array_index_nospec(hwnum, gdev->ngpio)];
d468bf9e 205}
93548f8b 206EXPORT_SYMBOL_GPL(gpio_device_get_desc);
372e722e
AC
207
208/**
950d55f5
TR
209 * desc_to_gpio - convert a GPIO descriptor to the integer namespace
210 * @desc: GPIO descriptor
211 *
372e722e 212 * This should disappear in the future but is needed since we still
950d55f5
TR
213 * use GPIO numbers for error messages and sysfs nodes.
214 *
215 * Returns:
216 * The global GPIO number for the GPIO specified by its descriptor.
372e722e 217 */
79a9becd 218int desc_to_gpio(const struct gpio_desc *desc)
372e722e 219{
fdeb8e15 220 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
372e722e 221}
79a9becd 222EXPORT_SYMBOL_GPL(desc_to_gpio);
372e722e
AC
223
224
79a9becd
AC
225/**
226 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
227 * @desc: descriptor to return the chip of
5e628444
BG
228 *
229 * *DEPRECATED*
230 * This function is unsafe and should not be used. Using the chip address
231 * without taking the SRCU read lock may result in dereferencing a dangling
232 * pointer.
94bd9ce1
AS
233 *
234 * Returns:
235 * Address of the GPIO chip backing this device.
79a9becd
AC
236 */
237struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
372e722e 238{
c5cf334d 239 if (!desc)
fdeb8e15 240 return NULL;
0d7fa0ed
BG
241
242 return gpio_device_get_chip(desc->gdev);
372e722e 243}
79a9becd 244EXPORT_SYMBOL_GPL(gpiod_to_chip);
d2876d08 245
370232d0
BG
246/**
247 * gpiod_to_gpio_device() - Return the GPIO device to which this descriptor
248 * belongs.
249 * @desc: Descriptor for which to return the GPIO device.
250 *
251 * This *DOES NOT* increase the reference count of the GPIO device as it's
252 * expected that the descriptor is requested and the users already holds a
253 * reference to the device.
254 *
255 * Returns:
256 * Address of the GPIO device owning this descriptor.
257 */
258struct gpio_device *gpiod_to_gpio_device(struct gpio_desc *desc)
259{
260 if (!desc)
261 return NULL;
262
263 return desc->gdev;
264}
265EXPORT_SYMBOL_GPL(gpiod_to_gpio_device);
266
8c85a102
BG
267/**
268 * gpio_device_get_base() - Get the base GPIO number allocated by this device
269 * @gdev: GPIO device
270 *
271 * Returns:
272 * First GPIO number in the global GPIO numberspace for this device.
273 */
274int gpio_device_get_base(struct gpio_device *gdev)
275{
276 return gdev->base;
277}
278EXPORT_SYMBOL_GPL(gpio_device_get_base);
279
d1f77282
BG
280/**
281 * gpio_device_get_label() - Get the label of this GPIO device
282 * @gdev: GPIO device
283 *
284 * Returns:
285 * Pointer to the string containing the GPIO device label. The string's
286 * lifetime is tied to that of the underlying GPIO device.
287 */
288const char *gpio_device_get_label(struct gpio_device *gdev)
289{
290 return gdev->label;
291}
292EXPORT_SYMBOL(gpio_device_get_label);
293
9b418780
BG
294/**
295 * gpio_device_get_chip() - Get the gpio_chip implementation of this GPIO device
296 * @gdev: GPIO device
297 *
298 * Returns:
299 * Address of the GPIO chip backing this device.
300 *
5e628444 301 * *DEPRECATED*
9b418780
BG
302 * Until we can get rid of all non-driver users of struct gpio_chip, we must
303 * provide a way of retrieving the pointer to it from struct gpio_device. This
304 * is *NOT* safe as the GPIO API is considered to be hot-unpluggable and the
305 * chip can dissapear at any moment (unlike reference-counted struct
306 * gpio_device).
307 *
308 * Use at your own risk.
309 */
310struct gpio_chip *gpio_device_get_chip(struct gpio_device *gdev)
311{
0d7fa0ed 312 return rcu_dereference_check(gdev->chip, 1);
9b418780
BG
313}
314EXPORT_SYMBOL_GPL(gpio_device_get_chip);
315
8d0aab2f 316/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
8a7a6103 317static int gpiochip_find_base_unlocked(u16 ngpio)
8d0aab2f 318{
8a7a6103 319 unsigned int base = GPIO_DYNAMIC_BASE;
ff2b1359 320 struct gpio_device *gdev;
8d0aab2f 321
e348544f
BG
322 list_for_each_entry_srcu(gdev, &gpio_devices, list,
323 lockdep_is_held(&gpio_devices_lock)) {
83cabe33 324 /* found a free space? */
7b61212f 325 if (gdev->base >= base + ngpio)
83cabe33 326 break;
7b61212f
CL
327 /* nope, check the space right after the chip */
328 base = gdev->base + gdev->ngpio;
7dd3d9bd
AK
329 if (base < GPIO_DYNAMIC_BASE)
330 base = GPIO_DYNAMIC_BASE;
8a7a6103
AS
331 if (base > GPIO_DYNAMIC_MAX - ngpio)
332 break;
8d0aab2f
AV
333 }
334
8a7a6103 335 if (base <= GPIO_DYNAMIC_MAX - ngpio) {
8d0aab2f 336 pr_debug("%s: found new base at %d\n", __func__, base);
83cabe33
AC
337 return base;
338 } else {
339 pr_err("%s: cannot find free range\n", __func__);
340 return -ENOSPC;
169b6a7a 341 }
169b6a7a
AV
342}
343
79a9becd
AC
344/**
345 * gpiod_get_direction - return the current direction of a GPIO
346 * @desc: GPIO to get the direction of
347 *
94bd9ce1
AS
348 * Returns:
349 * 0 for output, 1 for input, or an error code in case of error.
79a9becd
AC
350 *
351 * This function may sleep if gpiod_cansleep() is true.
352 */
8e53b0f1 353int gpiod_get_direction(struct gpio_desc *desc)
80b0a602 354{
2559f2e0 355 unsigned long flags;
13daf489 356 unsigned int offset;
d377f56f 357 int ret;
80b0a602 358
d83cee3d
BG
359 /*
360 * We cannot use VALIDATE_DESC() as we must not return 0 for a NULL
361 * descriptor like we usually do.
362 */
30a32e93 363 if (IS_ERR_OR_NULL(desc))
d83cee3d
BG
364 return -EINVAL;
365
366 CLASS(gpio_chip_guard, guard)(desc);
367 if (!guard.gc)
368 return -ENODEV;
369
372e722e 370 offset = gpio_chip_hwgpio(desc);
2559f2e0 371 flags = READ_ONCE(desc->flags);
80b0a602 372
256efaea
RK
373 /*
374 * Open drain emulation using input mode may incorrectly report
375 * input here, fix that up.
376 */
2559f2e0
BG
377 if (test_bit(FLAG_OPEN_DRAIN, &flags) &&
378 test_bit(FLAG_IS_OUT, &flags))
256efaea
RK
379 return 0;
380
d83cee3d 381 if (!guard.gc->get_direction)
d0121b85 382 return -ENOTSUPP;
80b0a602 383
d83cee3d 384 ret = guard.gc->get_direction(guard.gc, offset);
4fc5bfeb
AS
385 if (ret < 0)
386 return ret;
387
1685f72a
AS
388 /*
389 * GPIO_LINE_DIRECTION_IN or other positive,
390 * otherwise GPIO_LINE_DIRECTION_OUT.
391 */
4fc5bfeb 392 if (ret > 0)
d377f56f 393 ret = 1;
4fc5bfeb 394
2559f2e0
BG
395 assign_bit(FLAG_IS_OUT, &flags, !ret);
396 WRITE_ONCE(desc->flags, flags);
4fc5bfeb 397
d377f56f 398 return ret;
80b0a602 399}
79a9becd 400EXPORT_SYMBOL_GPL(gpiod_get_direction);
80b0a602 401
1a989d0f
AC
402/*
403 * Add a new chip to the global chips list, keeping the list of chips sorted
ef7c7553 404 * by range(means [base, base + ngpio - 1]) order.
1a989d0f 405 *
94bd9ce1
AS
406 * Returns:
407 * -EBUSY if the new chip overlaps with some other chip's integer space.
1a989d0f 408 */
f95fd4ac 409static int gpiodev_add_to_list_unlocked(struct gpio_device *gdev)
1a989d0f 410{
a961f9b4 411 struct gpio_device *prev, *next;
1a989d0f 412
e348544f
BG
413 lockdep_assert_held(&gpio_devices_lock);
414
ff2b1359 415 if (list_empty(&gpio_devices)) {
a961f9b4 416 /* initial entry in list */
e348544f 417 list_add_tail_rcu(&gdev->list, &gpio_devices);
e28ecca6 418 return 0;
1a989d0f
AC
419 }
420
243cfa6a 421 next = list_first_entry(&gpio_devices, struct gpio_device, list);
a961f9b4
BJZ
422 if (gdev->base + gdev->ngpio <= next->base) {
423 /* add before first entry */
e348544f 424 list_add_rcu(&gdev->list, &gpio_devices);
a961f9b4 425 return 0;
1a989d0f
AC
426 }
427
243cfa6a 428 prev = list_last_entry(&gpio_devices, struct gpio_device, list);
a961f9b4
BJZ
429 if (prev->base + prev->ngpio <= gdev->base) {
430 /* add behind last entry */
e348544f 431 list_add_tail_rcu(&gdev->list, &gpio_devices);
96098df1 432 return 0;
1a989d0f
AC
433 }
434
a961f9b4
BJZ
435 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
436 /* at the end of the list */
437 if (&next->list == &gpio_devices)
438 break;
1a989d0f 439
a961f9b4
BJZ
440 /* add between prev and next */
441 if (prev->base + prev->ngpio <= gdev->base
442 && gdev->base + gdev->ngpio <= next->base) {
e348544f 443 list_add_rcu(&gdev->list, &prev->list);
a961f9b4
BJZ
444 return 0;
445 }
446 }
447
e348544f
BG
448 synchronize_srcu(&gpio_devices_srcu);
449
a961f9b4 450 return -EBUSY;
1a989d0f
AC
451}
452
950d55f5 453/*
f881bab0 454 * Convert a GPIO name to its descriptor
582838ea
GU
455 * Note that there is no guarantee that GPIO names are globally unique!
456 * Hence this function will return, if it exists, a reference to the first GPIO
457 * line found that matches the given name.
f881bab0
LW
458 */
459static struct gpio_desc *gpio_name_to_desc(const char * const name)
460{
ff2b1359 461 struct gpio_device *gdev;
e348544f 462 struct gpio_desc *desc;
d83cee3d 463 struct gpio_chip *gc;
f881bab0 464
ee203bbd
MM
465 if (!name)
466 return NULL;
467
e348544f 468 guard(srcu)(&gpio_devices_srcu);
f881bab0 469
e348544f
BG
470 list_for_each_entry_srcu(gdev, &gpio_devices, list,
471 srcu_read_lock_held(&gpio_devices_srcu)) {
d83cee3d
BG
472 guard(srcu)(&gdev->srcu);
473
d82b9e08 474 gc = srcu_dereference(gdev->chip, &gdev->srcu);
d83cee3d
BG
475 if (!gc)
476 continue;
477
478 for_each_gpio_desc(gc, desc) {
e348544f 479 if (desc->name && !strcmp(desc->name, name))
fdeb8e15 480 return desc;
f881bab0
LW
481 }
482 }
483
f881bab0
LW
484 return NULL;
485}
486
5f3ca732 487/*
582838ea
GU
488 * Take the names from gc->names and assign them to their GPIO descriptors.
489 * Warn if a name is already used for a GPIO line on a different GPIO chip.
5f3ca732 490 *
582838ea
GU
491 * Note that:
492 * 1. Non-unique names are still accepted,
493 * 2. Name collisions within the same GPIO chip are not reported.
5f3ca732 494 */
ea95bd85 495static void gpiochip_set_desc_names(struct gpio_chip *gc)
5f3ca732 496{
fdeb8e15 497 struct gpio_device *gdev = gc->gpiodev;
5f3ca732
MP
498 int i;
499
5f3ca732
MP
500 /* First check all names if they are unique */
501 for (i = 0; i != gc->ngpio; ++i) {
502 struct gpio_desc *gpio;
503
504 gpio = gpio_name_to_desc(gc->names[i]);
f881bab0 505 if (gpio)
fdeb8e15 506 dev_warn(&gdev->dev,
34ffd85d 507 "Detected name collision for GPIO name '%s'\n",
f881bab0 508 gc->names[i]);
5f3ca732
MP
509 }
510
511 /* Then add all names to the GPIO descriptors */
512 for (i = 0; i != gc->ngpio; ++i)
fdeb8e15 513 gdev->descs[i].name = gc->names[i];
5f3ca732
MP
514}
515
32fc5aa2 516/*
0c5ebb4c 517 * gpiochip_set_names - Set GPIO line names using device properties
32fc5aa2
BG
518 * @chip: GPIO chip whose lines should be named, if possible
519 *
520 * Looks for device property "gpio-line-names" and if it exists assigns
521 * GPIO line names for the chip. The memory allocated for the assigned
b41ba2ec 522 * names belong to the underlying firmware node and should not be released
32fc5aa2
BG
523 * by the caller.
524 */
0c5ebb4c 525static int gpiochip_set_names(struct gpio_chip *chip)
32fc5aa2
BG
526{
527 struct gpio_device *gdev = chip->gpiodev;
4ef339bc 528 struct device *dev = &gdev->dev;
32fc5aa2
BG
529 const char **names;
530 int ret, i;
531 int count;
532
4ef339bc 533 count = device_property_string_array_count(dev, "gpio-line-names");
32fc5aa2
BG
534 if (count < 0)
535 return 0;
536
4e804c39
SP
537 /*
538 * When offset is set in the driver side we assume the driver internally
539 * is using more than one gpiochip per the same device. We have to stop
540 * setting friendly names if the specified ones with 'gpio-line-names'
541 * are less than the offset in the device itself. This means all the
542 * lines are not present for every single pin within all the internal
543 * gpiochips.
544 */
545 if (count <= chip->offset) {
4ef339bc 546 dev_warn(dev, "gpio-line-names too short (length %d), cannot map names for the gpiochip at offset %u\n",
4e804c39
SP
547 count, chip->offset);
548 return 0;
32fc5aa2
BG
549 }
550
551 names = kcalloc(count, sizeof(*names), GFP_KERNEL);
552 if (!names)
553 return -ENOMEM;
554
4ef339bc 555 ret = device_property_read_string_array(dev, "gpio-line-names",
32fc5aa2
BG
556 names, count);
557 if (ret < 0) {
4ef339bc 558 dev_warn(dev, "failed to read GPIO line names\n");
32fc5aa2
BG
559 kfree(names);
560 return ret;
561 }
562
4e804c39
SP
563 /*
564 * When more that one gpiochip per device is used, 'count' can
565 * contain at most number gpiochips x chip->ngpio. We have to
566 * correctly distribute all defined lines taking into account
567 * chip->offset as starting point from where we will assign
568 * the names to pins from the 'names' array. Since property
569 * 'gpio-line-names' cannot contains gaps, we have to be sure
570 * we only assign those pins that really exists since chip->ngpio
571 * can be different of the chip->offset.
572 */
573 count = (count > chip->offset) ? count - chip->offset : count;
574 if (count > chip->ngpio)
575 count = chip->ngpio;
576
c73960bb
PR
577 for (i = 0; i < count; i++) {
578 /*
579 * Allow overriding "fixed" names provided by the GPIO
580 * provider. The "fixed" names are more often than not
581 * generic and less informative than the names given in
582 * device properties.
583 */
584 if (names[chip->offset + i] && names[chip->offset + i][0])
585 gdev->descs[i].name = names[chip->offset + i];
586 }
32fc5aa2
BG
587
588 kfree(names);
589
590 return 0;
591}
592
a0b66a73 593static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc)
e4371f6e
SB
594{
595 unsigned long *p;
596
a0b66a73 597 p = bitmap_alloc(gc->ngpio, GFP_KERNEL);
e4371f6e
SB
598 if (!p)
599 return NULL;
600
601 /* Assume by default all GPIOs are valid */
a0b66a73 602 bitmap_fill(p, gc->ngpio);
e4371f6e
SB
603
604 return p;
605}
606
05a854c5
AS
607static void gpiochip_free_mask(unsigned long **p)
608{
609 bitmap_free(*p);
610 *p = NULL;
611}
612
27043a7d
AS
613static unsigned int gpiochip_count_reserved_ranges(struct gpio_chip *gc)
614{
4ef339bc 615 struct device *dev = &gc->gpiodev->dev;
27043a7d
AS
616 int size;
617
618 /* Format is "start, count, ..." */
4ef339bc 619 size = device_property_count_u32(dev, "gpio-reserved-ranges");
27043a7d
AS
620 if (size > 0 && size % 2 == 0)
621 return size;
622
623 return 0;
624}
625
27043a7d
AS
626static int gpiochip_apply_reserved_ranges(struct gpio_chip *gc)
627{
4ef339bc 628 struct device *dev = &gc->gpiodev->dev;
27043a7d
AS
629 unsigned int size;
630 u32 *ranges;
631 int ret;
632
633 size = gpiochip_count_reserved_ranges(gc);
634 if (size == 0)
635 return 0;
636
637 ranges = kmalloc_array(size, sizeof(*ranges), GFP_KERNEL);
638 if (!ranges)
639 return -ENOMEM;
640
4ef339bc
AS
641 ret = device_property_read_u32_array(dev, "gpio-reserved-ranges",
642 ranges, size);
27043a7d
AS
643 if (ret) {
644 kfree(ranges);
645 return ret;
646 }
647
648 while (size) {
649 u32 count = ranges[--size];
650 u32 start = ranges[--size];
651
652 if (start >= gc->ngpio || start + count > gc->ngpio)
653 continue;
654
655 bitmap_clear(gc->valid_mask, start, count);
656 }
657
658 kfree(ranges);
659 return 0;
660}
661
c9fc5aff 662static int gpiochip_init_valid_mask(struct gpio_chip *gc)
f8ec92a9 663{
27043a7d
AS
664 int ret;
665
1a55fc40
AS
666 if (!(gpiochip_count_reserved_ranges(gc) || gc->init_valid_mask))
667 return 0;
668
669 gc->valid_mask = gpiochip_allocate_mask(gc);
670 if (!gc->valid_mask)
671 return -ENOMEM;
672
27043a7d
AS
673 ret = gpiochip_apply_reserved_ranges(gc);
674 if (ret)
675 return ret;
676
c9fc5aff
LW
677 if (gc->init_valid_mask)
678 return gc->init_valid_mask(gc,
679 gc->valid_mask,
680 gc->ngpio);
f8ec92a9
RRD
681
682 return 0;
683}
684
a0b66a73 685static void gpiochip_free_valid_mask(struct gpio_chip *gc)
726cb3ba 686{
05a854c5 687 gpiochip_free_mask(&gc->valid_mask);
726cb3ba
SB
688}
689
b056ca1c
AS
690static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
691{
c40aa80d
AS
692 /*
693 * Device Tree platforms are supposed to use "gpio-ranges"
694 * property. This check ensures that the ->add_pin_ranges()
695 * won't be called for them.
696 */
697 if (device_property_present(&gc->gpiodev->dev, "gpio-ranges"))
698 return 0;
699
b056ca1c
AS
700 if (gc->add_pin_ranges)
701 return gc->add_pin_ranges(gc);
702
703 return 0;
704}
705
a0b66a73 706bool gpiochip_line_is_valid(const struct gpio_chip *gc,
726cb3ba
SB
707 unsigned int offset)
708{
709 /* No mask means all valid */
a0b66a73 710 if (likely(!gc->valid_mask))
726cb3ba 711 return true;
a0b66a73 712 return test_bit(offset, gc->valid_mask);
726cb3ba
SB
713}
714EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
715
7aa90f90 716static void gpiodev_release(struct device *dev)
ff2b1359 717{
3b7c7478 718 struct gpio_device *gdev = to_gpio_device(dev);
be711caa 719
7765ffed
BG
720 /* Call pending kfree()s for descriptor labels. */
721 synchronize_srcu(&gdev->desc_srcu);
722 cleanup_srcu_struct(&gdev->desc_srcu);
ff2b1359 723
8d4a85b6 724 ida_free(&gpio_ida, gdev->id);
fcf273e5 725 kfree_const(gdev->label);
476e2fc5 726 kfree(gdev->descs);
47d8b4c1 727 cleanup_srcu_struct(&gdev->srcu);
9efd9e69 728 kfree(gdev);
ff2b1359
LW
729}
730
aab5c6f2
BG
731static const struct device_type gpio_dev_type = {
732 .name = "gpio_chip",
733 .release = gpiodev_release,
734};
735
1f5eb8b1
KG
736#ifdef CONFIG_GPIO_CDEV
737#define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt))
738#define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev))
739#else
740/*
741 * gpiolib_cdev_register() indirectly calls device_add(), which is still
742 * required even when cdev is not selected.
743 */
744#define gcdev_register(gdev, devt) device_add(&(gdev)->dev)
745#define gcdev_unregister(gdev) device_del(&(gdev)->dev)
746#endif
747
159f3cd9
GR
748static int gpiochip_setup_dev(struct gpio_device *gdev)
749{
67f64d15 750 struct fwnode_handle *fwnode = dev_fwnode(&gdev->dev);
d377f56f 751 int ret;
159f3cd9 752
aab5c6f2
BG
753 device_initialize(&gdev->dev);
754
38dfa56b
SK
755 /*
756 * If fwnode doesn't belong to another device, it's safe to clear its
757 * initialized flag.
758 */
67f64d15
AS
759 if (fwnode && !fwnode->dev)
760 fwnode_dev_initialized(fwnode, false);
38dfa56b 761
1f5eb8b1 762 ret = gcdev_register(gdev, gpio_devt);
d377f56f
LW
763 if (ret)
764 return ret;
111379dc 765
d377f56f
LW
766 ret = gpiochip_sysfs_register(gdev);
767 if (ret)
159f3cd9
GR
768 goto err_remove_device;
769
8a7a6103 770 dev_dbg(&gdev->dev, "registered GPIOs %u to %u on %s\n", gdev->base,
7fe595b3 771 gdev->base + gdev->ngpio - 1, gdev->label);
159f3cd9
GR
772
773 return 0;
774
775err_remove_device:
1f5eb8b1 776 gcdev_unregister(gdev);
d377f56f 777 return ret;
159f3cd9
GR
778}
779
a0b66a73 780static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog)
a411e81e
BG
781{
782 struct gpio_desc *desc;
783 int rv;
784
a0b66a73 785 desc = gpiochip_get_desc(gc, hog->chip_hwnum);
a411e81e 786 if (IS_ERR(desc)) {
262b9011
GU
787 chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__,
788 PTR_ERR(desc));
a411e81e
BG
789 return;
790 }
791
a411e81e
BG
792 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
793 if (rv)
262b9011
GU
794 gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n",
795 __func__, gc->label, hog->chip_hwnum, rv);
a411e81e
BG
796}
797
a0b66a73 798static void machine_gpiochip_add(struct gpio_chip *gc)
a411e81e
BG
799{
800 struct gpiod_hog *hog;
801
802 mutex_lock(&gpio_machine_hogs_mutex);
803
804 list_for_each_entry(hog, &gpio_machine_hogs, list) {
a0b66a73
LW
805 if (!strcmp(gc->label, hog->chip_label))
806 gpiochip_machine_hog(gc, hog);
a411e81e
BG
807 }
808
809 mutex_unlock(&gpio_machine_hogs_mutex);
810}
811
159f3cd9
GR
812static void gpiochip_setup_devs(void)
813{
814 struct gpio_device *gdev;
d377f56f 815 int ret;
159f3cd9 816
e348544f
BG
817 guard(srcu)(&gpio_devices_srcu);
818
819 list_for_each_entry_srcu(gdev, &gpio_devices, list,
820 srcu_read_lock_held(&gpio_devices_srcu)) {
d377f56f
LW
821 ret = gpiochip_setup_dev(gdev);
822 if (ret)
262b9011
GU
823 dev_err(&gdev->dev,
824 "Failed to initialize gpio device (%d)\n", ret);
159f3cd9
GR
825 }
826}
827
7b59bdbc
AS
828static void gpiochip_set_data(struct gpio_chip *gc, void *data)
829{
830 gc->gpiodev->data = data;
831}
832
8deb779d
AS
833/**
834 * gpiochip_get_data() - get per-subdriver data for the chip
835 * @gc: GPIO chip
836 *
837 * Returns:
838 * The per-subdriver data for the chip.
839 */
840void *gpiochip_get_data(struct gpio_chip *gc)
841{
842 return gc->gpiodev->data;
843}
844EXPORT_SYMBOL_GPL(gpiochip_get_data);
845
55b2395e
AM
846int gpiochip_get_ngpios(struct gpio_chip *gc, struct device *dev)
847{
848 u32 ngpios = gc->ngpio;
849 int ret;
850
851 if (ngpios == 0) {
852 ret = device_property_read_u32(dev, "ngpios", &ngpios);
853 if (ret == -ENODATA)
854 /*
855 * -ENODATA means that there is no property found and
856 * we want to issue the error message to the user.
857 * Besides that, we want to return different error code
858 * to state that supplied value is not valid.
859 */
860 ngpios = 0;
861 else if (ret)
862 return ret;
863
864 gc->ngpio = ngpios;
865 }
866
867 if (gc->ngpio == 0) {
868 chip_err(gc, "tried to insert a GPIO chip with zero lines\n");
869 return -EINVAL;
870 }
871
872 if (gc->ngpio > FASTPATH_NGPIO)
873 chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n",
874 gc->ngpio, FASTPATH_NGPIO);
875
876 return 0;
877}
878EXPORT_SYMBOL_GPL(gpiochip_get_ngpios);
879
a0b66a73 880int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
39c3fd58
AL
881 struct lock_class_key *lock_key,
882 struct lock_class_key *request_key)
d2876d08 883{
ff2b1359 884 struct gpio_device *gdev;
8ae438f5 885 unsigned int desc_index;
ec851b23 886 int base = 0;
e5ab49cd 887 int ret = 0;
d2876d08 888
ff2b1359
LW
889 /*
890 * First: allocate and populate the internal stat container, and
891 * set up the struct device.
892 */
969f07b4 893 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
ff2b1359 894 if (!gdev)
14e85c0e 895 return -ENOMEM;
aab5c6f2
BG
896
897 gdev->dev.type = &gpio_dev_type;
3c702e99 898 gdev->dev.bus = &gpio_bus_type;
1df62542 899 gdev->dev.parent = gc->parent;
d83cee3d 900 rcu_assign_pointer(gdev->chip, gc);
7b59bdbc 901
a0b66a73 902 gc->gpiodev = gdev;
7b59bdbc 903 gpiochip_set_data(gc, data);
acc6e331 904
daecca4b
AS
905 /*
906 * If the calling driver did not initialize firmware node,
907 * do it here using the parent device, if any.
908 */
909 if (gc->fwnode)
910 device_set_node(&gdev->dev, gc->fwnode);
911 else if (gc->parent)
912 device_set_node(&gdev->dev, dev_fwnode(gc->parent));
6cb59afe 913
8d4a85b6 914 gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL);
ff2b1359 915 if (gdev->id < 0) {
d377f56f 916 ret = gdev->id;
ff2b1359
LW
917 goto err_free_gdev;
918 }
c351bb64
QW
919
920 ret = dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id);
921 if (ret)
922 goto err_free_ida;
923
a0b66a73
LW
924 if (gc->parent && gc->parent->driver)
925 gdev->owner = gc->parent->driver->owner;
926 else if (gc->owner)
ff2b1359 927 /* TODO: remove chip->owner */
a0b66a73 928 gdev->owner = gc->owner;
ff2b1359
LW
929 else
930 gdev->owner = THIS_MODULE;
d2876d08 931
55b2395e
AM
932 ret = gpiochip_get_ngpios(gc, &gdev->dev);
933 if (ret)
ec851b23 934 goto err_free_dev_name;
3027743f 935
ec851b23
ZH
936 gdev->descs = kcalloc(gc->ngpio, sizeof(*gdev->descs), GFP_KERNEL);
937 if (!gdev->descs) {
938 ret = -ENOMEM;
939 goto err_free_dev_name;
940 }
941
a0b66a73 942 gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL);
df4878e9 943 if (!gdev->label) {
d377f56f 944 ret = -ENOMEM;
476e2fc5 945 goto err_free_descs;
df4878e9
LW
946 }
947
a0b66a73 948 gdev->ngpio = gc->ngpio;
8a5b477b 949 gdev->can_sleep = gc->can_sleep;
5ed41cc4 950
e348544f 951 scoped_guard(mutex, &gpio_devices_lock) {
efb8235b 952 /*
e348544f
BG
953 * TODO: this allocates a Linux GPIO number base in the global
954 * GPIO numberspace for this chip. In the long run we want to
955 * get *rid* of this numberspace and use only descriptors, but
956 * it may be a pipe dream. It will not happen before we get rid
957 * of the sysfs interface anyways.
efb8235b 958 */
e348544f
BG
959 base = gc->base;
960 if (base < 0) {
961 base = gpiochip_find_base_unlocked(gc->ngpio);
962 if (base < 0) {
963 ret = base;
964 base = 0;
965 goto err_free_label;
966 }
8d0aab2f 967
e348544f
BG
968 /*
969 * TODO: it should not be necessary to reflect the
970 * assigned base outside of the GPIO subsystem. Go over
971 * drivers and see if anyone makes use of this, else
972 * drop this and assign a poison instead.
973 */
974 gc->base = base;
975 } else {
976 dev_warn(&gdev->dev,
977 "Static allocation of GPIO base is deprecated, use dynamic allocation.\n");
978 }
979
980 gdev->base = base;
981
982 ret = gpiodev_add_to_list_unlocked(gdev);
983 if (ret) {
984 chip_err(gc, "GPIO integer space overlap, cannot add chip\n");
985 goto err_free_label;
986 }
05aa5203 987 }
1a989d0f 988
8ae438f5
AS
989 for (desc_index = 0; desc_index < gc->ngpio; desc_index++)
990 gdev->descs[desc_index].gdev = gdev;
efb8235b 991
17a7ca35 992 BLOCKING_INIT_NOTIFIER_HEAD(&gdev->line_state_notifier);
a067419b 993 BLOCKING_INIT_NOTIFIER_HEAD(&gdev->device_notifier);
51c1064e 994
47d8b4c1
BG
995 ret = init_srcu_struct(&gdev->srcu);
996 if (ret)
997 goto err_remove_from_list;
998
7765ffed
BG
999 ret = init_srcu_struct(&gdev->desc_srcu);
1000 if (ret)
1001 goto err_cleanup_gdev_srcu;
1002
f23f1516 1003#ifdef CONFIG_PINCTRL
20ec3e39 1004 INIT_LIST_HEAD(&gdev->pin_ranges);
f23f1516
SH
1005#endif
1006
ea95bd85
BG
1007 if (gc->names)
1008 gpiochip_set_desc_names(gc);
1009
0c5ebb4c 1010 ret = gpiochip_set_names(gc);
d377f56f 1011 if (ret)
7765ffed 1012 goto err_cleanup_desc_srcu;
5f3ca732 1013
1a55fc40 1014 ret = gpiochip_init_valid_mask(gc);
d377f56f 1015 if (ret)
7765ffed 1016 goto err_cleanup_desc_srcu;
e0d89728 1017
8ae438f5
AS
1018 for (desc_index = 0; desc_index < gc->ngpio; desc_index++) {
1019 struct gpio_desc *desc = &gdev->descs[desc_index];
3edfb7bd 1020
8ae438f5 1021 if (gc->get_direction && gpiochip_line_is_valid(gc, desc_index)) {
4fc5bfeb 1022 assign_bit(FLAG_IS_OUT,
8ae438f5 1023 &desc->flags, !gc->get_direction(gc, desc_index));
d95da993 1024 } else {
4fc5bfeb 1025 assign_bit(FLAG_IS_OUT,
a0b66a73 1026 &desc->flags, !gc->direction_input);
d95da993 1027 }
3edfb7bd
RRD
1028 }
1029
ba5c5eff 1030 ret = of_gpiochip_add(gc);
b056ca1c 1031 if (ret)
7765ffed 1032 goto err_free_valid_mask;
b056ca1c 1033
ba5c5eff
BG
1034 ret = gpiochip_add_pin_ranges(gc);
1035 if (ret)
1036 goto err_remove_of_chip;
1037
a0b66a73 1038 acpi_gpiochip_add(gc);
391c970c 1039
a0b66a73 1040 machine_gpiochip_add(gc);
a411e81e 1041
a0b66a73 1042 ret = gpiochip_irqchip_init_valid_mask(gc);
9411e3aa 1043 if (ret)
ec5c54a9 1044 goto err_free_hogs;
9411e3aa 1045
a0b66a73 1046 ret = gpiochip_irqchip_init_hw(gc);
fbdf8d4b 1047 if (ret)
ec5c54a9 1048 goto err_remove_irqchip_mask;
48057ed1 1049
a0b66a73 1050 ret = gpiochip_add_irqchip(gc, lock_key, request_key);
fbdf8d4b 1051 if (ret)
48057ed1
LW
1052 goto err_remove_irqchip_mask;
1053
3c702e99
LW
1054 /*
1055 * By first adding the chardev, and then adding the device,
1056 * we get a device node entry in sysfs under
1057 * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
1058 * coldplug of device nodes and other udev business.
159f3cd9
GR
1059 * We can do this only if gpiolib has been initialized.
1060 * Otherwise, defer until later.
3c702e99 1061 */
159f3cd9 1062 if (gpiolib_initialized) {
d377f56f
LW
1063 ret = gpiochip_setup_dev(gdev);
1064 if (ret)
48057ed1 1065 goto err_remove_irqchip;
159f3cd9 1066 }
cedb1881 1067 return 0;
3bae4811 1068
48057ed1 1069err_remove_irqchip:
a0b66a73 1070 gpiochip_irqchip_remove(gc);
48057ed1 1071err_remove_irqchip_mask:
a0b66a73 1072 gpiochip_irqchip_free_valid_mask(gc);
ec5c54a9
BG
1073err_free_hogs:
1074 gpiochip_free_hogs(gc);
a0b66a73 1075 acpi_gpiochip_remove(gc);
e4aec4da 1076 gpiochip_remove_pin_ranges(gc);
35779890 1077err_remove_of_chip:
a0b66a73 1078 of_gpiochip_remove(gc);
7765ffed 1079err_free_valid_mask:
a0b66a73 1080 gpiochip_free_valid_mask(gc);
7765ffed
BG
1081err_cleanup_desc_srcu:
1082 cleanup_srcu_struct(&gdev->desc_srcu);
47d8b4c1
BG
1083err_cleanup_gdev_srcu:
1084 cleanup_srcu_struct(&gdev->srcu);
2526dffc 1085err_remove_from_list:
e348544f
BG
1086 scoped_guard(mutex, &gpio_devices_lock)
1087 list_del_rcu(&gdev->list);
1088 synchronize_srcu(&gpio_devices_srcu);
ec851b23
ZH
1089 if (gdev->dev.release) {
1090 /* release() has been registered by gpiochip_setup_dev() */
dc0989e3 1091 gpio_device_put(gdev);
ec851b23
ZH
1092 goto err_print_message;
1093 }
476e2fc5 1094err_free_label:
fcf273e5 1095 kfree_const(gdev->label);
476e2fc5
GR
1096err_free_descs:
1097 kfree(gdev->descs);
c351bb64
QW
1098err_free_dev_name:
1099 kfree(dev_name(&gdev->dev));
a05a1404 1100err_free_ida:
8d4a85b6 1101 ida_free(&gpio_ida, gdev->id);
a05a1404 1102err_free_gdev:
ec851b23
ZH
1103 kfree(gdev);
1104err_print_message:
d2876d08 1105 /* failures here can mean systems won't boot... */
3cc1fb73
GS
1106 if (ret != -EPROBE_DEFER) {
1107 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
55b2395e 1108 base, base + (int)gc->ngpio - 1,
3cc1fb73
GS
1109 gc->label ? : "generic", ret);
1110 }
d377f56f 1111 return ret;
d2876d08 1112}
959bc7b2 1113EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
d2876d08
DB
1114
1115/**
1116 * gpiochip_remove() - unregister a gpio_chip
a0b66a73 1117 * @gc: the chip to unregister
d2876d08
DB
1118 *
1119 * A gpio_chip with any GPIOs still requested may not be removed.
1120 */
a0b66a73 1121void gpiochip_remove(struct gpio_chip *gc)
d2876d08 1122{
a0b66a73 1123 struct gpio_device *gdev = gc->gpiodev;
d2876d08 1124
ff2b1359 1125 /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
afbc4f31 1126 gpiochip_sysfs_unregister(gdev);
a0b66a73 1127 gpiochip_free_hogs(gc);
e348544f
BG
1128
1129 scoped_guard(mutex, &gpio_devices_lock)
1130 list_del_rcu(&gdev->list);
1131 synchronize_srcu(&gpio_devices_srcu);
1132
bd203bd5 1133 /* Numb the device, cancelling all outstanding operations */
d83cee3d
BG
1134 rcu_assign_pointer(gdev->chip, NULL);
1135 synchronize_srcu(&gdev->srcu);
a0b66a73
LW
1136 gpiochip_irqchip_remove(gc);
1137 acpi_gpiochip_remove(gc);
1138 of_gpiochip_remove(gc);
1139 gpiochip_remove_pin_ranges(gc);
1140 gpiochip_free_valid_mask(gc);
43c54eca
LW
1141 /*
1142 * We accept no more calls into the driver from this point, so
7b59bdbc 1143 * NULL the driver data pointer.
43c54eca 1144 */
7b59bdbc 1145 gpiochip_set_data(gc, NULL);
391c970c 1146
ff2b1359
LW
1147 /*
1148 * The gpiochip side puts its use of the device to rest here:
1149 * if there are no userspace clients, the chardev and device will
1150 * be removed, else it will be dangling until the last user is
1151 * gone.
1152 */
1f5eb8b1 1153 gcdev_unregister(gdev);
dc0989e3 1154 gpio_device_put(gdev);
d2876d08
DB
1155}
1156EXPORT_SYMBOL_GPL(gpiochip_remove);
1157
cfe102f6
BG
1158/**
1159 * gpio_device_find() - find a specific GPIO device
1160 * @data: data to pass to match function
1161 * @match: Callback function to check gpio_chip
1162 *
1163 * Returns:
1164 * New reference to struct gpio_device.
1165 *
1166 * Similar to bus_find_device(). It returns a reference to a gpio_device as
1167 * determined by a user supplied @match callback. The callback should return
1168 * 0 if the device doesn't match and non-zero if it does. If the callback
1169 * returns non-zero, this function will return to the caller and not iterate
1170 * over any more gpio_devices.
1171 *
1172 * The callback takes the GPIO chip structure as argument. During the execution
1173 * of the callback function the chip is protected from being freed. TODO: This
1174 * actually has yet to be implemented.
1175 *
1176 * If the function returns non-NULL, the returned reference must be freed by
1177 * the caller using gpio_device_put().
1178 */
4a92857d 1179struct gpio_device *gpio_device_find(const void *data,
cfe102f6 1180 int (*match)(struct gpio_chip *gc,
faf6efd2 1181 const void *data))
cfe102f6
BG
1182{
1183 struct gpio_device *gdev;
d83cee3d 1184 struct gpio_chip *gc;
cfe102f6
BG
1185
1186 /*
1187 * Not yet but in the future the spinlock below will become a mutex.
1188 * Annotate this function before anyone tries to use it in interrupt
1189 * context like it happened with gpiochip_find().
1190 */
1191 might_sleep();
1192
e348544f 1193 guard(srcu)(&gpio_devices_srcu);
cfe102f6 1194
d83cee3d
BG
1195 list_for_each_entry_srcu(gdev, &gpio_devices, list,
1196 srcu_read_lock_held(&gpio_devices_srcu)) {
e8acd2d2
HG
1197 if (!device_is_registered(&gdev->dev))
1198 continue;
1199
d83cee3d
BG
1200 guard(srcu)(&gdev->srcu);
1201
d82b9e08 1202 gc = srcu_dereference(gdev->chip, &gdev->srcu);
d83cee3d
BG
1203
1204 if (gc && match(gc, data))
cfe102f6
BG
1205 return gpio_device_get(gdev);
1206 }
1207
1208 return NULL;
1209}
1210EXPORT_SYMBOL_GPL(gpio_device_find);
1211
faf6efd2 1212static int gpio_chip_match_by_label(struct gpio_chip *gc, const void *label)
d62fcd9f
BG
1213{
1214 return gc->label && !strcmp(gc->label, label);
1215}
1216
1217/**
1218 * gpio_device_find_by_label() - wrapper around gpio_device_find() finding the
1219 * GPIO device by its backing chip's label
1220 * @label: Label to lookup
1221 *
1222 * Returns:
1223 * Reference to the GPIO device or NULL. Reference must be released with
1224 * gpio_device_put().
1225 */
1226struct gpio_device *gpio_device_find_by_label(const char *label)
1227{
1228 return gpio_device_find((void *)label, gpio_chip_match_by_label);
1229}
1230EXPORT_SYMBOL_GPL(gpio_device_find_by_label);
1231
faf6efd2 1232static int gpio_chip_match_by_fwnode(struct gpio_chip *gc, const void *fwnode)
668706b1
AS
1233{
1234 return device_match_fwnode(&gc->gpiodev->dev, fwnode);
1235}
1236
1237/**
1238 * gpio_device_find_by_fwnode() - wrapper around gpio_device_find() finding
1239 * the GPIO device by its fwnode
1240 * @fwnode: Firmware node to lookup
1241 *
1242 * Returns:
1243 * Reference to the GPIO device or NULL. Reference must be released with
1244 * gpio_device_put().
1245 */
1246struct gpio_device *gpio_device_find_by_fwnode(const struct fwnode_handle *fwnode)
1247{
1248 return gpio_device_find((void *)fwnode, gpio_chip_match_by_fwnode);
1249}
1250EXPORT_SYMBOL_GPL(gpio_device_find_by_fwnode);
1251
36aa129f
BG
1252/**
1253 * gpio_device_get() - Increase the reference count of this GPIO device
1254 * @gdev: GPIO device to increase the refcount for
1255 *
1256 * Returns:
1257 * Pointer to @gdev.
1258 */
1259struct gpio_device *gpio_device_get(struct gpio_device *gdev)
1260{
1261 return to_gpio_device(get_device(&gdev->dev));
1262}
1263EXPORT_SYMBOL_GPL(gpio_device_get);
1264
1265/**
1266 * gpio_device_put() - Decrease the reference count of this GPIO device and
1267 * possibly free all resources associated with it.
1268 * @gdev: GPIO device to decrease the reference count for
1269 */
1270void gpio_device_put(struct gpio_device *gdev)
1271{
1272 put_device(&gdev->dev);
1273}
1274EXPORT_SYMBOL_GPL(gpio_device_put);
1275
1559d149
BG
1276/**
1277 * gpio_device_to_device() - Retrieve the address of the underlying struct
1278 * device.
1279 * @gdev: GPIO device for which to return the address.
1280 *
1281 * This does not increase the reference count of the GPIO device nor the
1282 * underlying struct device.
1283 *
1284 * Returns:
1285 * Address of struct device backing this GPIO device.
1286 */
1287struct device *gpio_device_to_device(struct gpio_device *gdev)
1288{
1289 return &gdev->dev;
1290}
1291EXPORT_SYMBOL_GPL(gpio_device_to_device);
1292
14250520
LW
1293#ifdef CONFIG_GPIOLIB_IRQCHIP
1294
1295/*
1296 * The following is irqchip helper code for gpiochips.
1297 */
1298
9411e3aa
AS
1299static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
1300{
1301 struct gpio_irq_chip *girq = &gc->irq;
1302
1303 if (!girq->init_hw)
1304 return 0;
1305
1306 return girq->init_hw(gc);
1307}
1308
5fbe5b58 1309static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb 1310{
5fbe5b58
LW
1311 struct gpio_irq_chip *girq = &gc->irq;
1312
1313 if (!girq->init_valid_mask)
79b804cb
MW
1314 return 0;
1315
5fbe5b58
LW
1316 girq->valid_mask = gpiochip_allocate_mask(gc);
1317 if (!girq->valid_mask)
79b804cb
MW
1318 return -ENOMEM;
1319
5fbe5b58
LW
1320 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
1321
79b804cb
MW
1322 return 0;
1323}
1324
a0b66a73 1325static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 1326{
05a854c5 1327 gpiochip_free_mask(&gc->irq.valid_mask);
79b804cb
MW
1328}
1329
88b70496
BG
1330static bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc,
1331 unsigned int offset)
79b804cb 1332{
a0b66a73 1333 if (!gpiochip_line_is_valid(gc, offset))
726cb3ba 1334 return false;
79b804cb 1335 /* No mask means all valid */
a0b66a73 1336 if (likely(!gc->irq.valid_mask))
79b804cb 1337 return true;
a0b66a73 1338 return test_bit(offset, gc->irq.valid_mask);
79b804cb
MW
1339}
1340
fdd61a01
LW
1341#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1342
1343/**
1344 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
1345 * to a gpiochip
1346 * @gc: the gpiochip to set the irqchip hierarchical handler to
1347 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
1348 * will then percolate up to the parent
1349 */
1350static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
1351 struct irq_chip *irqchip)
1352{
1353 /* DT will deal with mapping each IRQ as we go along */
1354 if (is_of_node(gc->irq.fwnode))
1355 return;
1356
1357 /*
1358 * This is for legacy and boardfile "irqchip" fwnodes: allocate
1359 * irqs upfront instead of dynamically since we don't have the
1360 * dynamic type of allocation that hardware description languages
1361 * provide. Once all GPIO drivers using board files are gone from
1362 * the kernel we can delete this code, but for a transitional period
1363 * it is necessary to keep this around.
1364 */
1365 if (is_fwnode_irqchip(gc->irq.fwnode)) {
1366 int i;
1367 int ret;
1368
1369 for (i = 0; i < gc->ngpio; i++) {
1370 struct irq_fwspec fwspec;
1371 unsigned int parent_hwirq;
1372 unsigned int parent_type;
1373 struct gpio_irq_chip *girq = &gc->irq;
1374
1375 /*
1376 * We call the child to parent translation function
1377 * only to check if the child IRQ is valid or not.
1378 * Just pick the rising edge type here as that is what
1379 * we likely need to support.
1380 */
1381 ret = girq->child_to_parent_hwirq(gc, i,
1382 IRQ_TYPE_EDGE_RISING,
1383 &parent_hwirq,
1384 &parent_type);
1385 if (ret) {
1386 chip_err(gc, "skip set-up on hwirq %d\n",
1387 i);
1388 continue;
1389 }
1390
1391 fwspec.fwnode = gc->irq.fwnode;
1392 /* This is the hwirq for the GPIO line side of things */
1393 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
1394 /* Just pick something */
1395 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
1396 fwspec.param_count = 2;
908334ab
JH
1397 ret = irq_domain_alloc_irqs(gc->irq.domain, 1,
1398 NUMA_NO_NODE, &fwspec);
fdd61a01
LW
1399 if (ret < 0) {
1400 chip_err(gc,
1401 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1402 i, parent_hwirq,
1403 ret);
1404 }
1405 }
1406 }
1407
1408 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1409
1410 return;
1411}
1412
1413static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1414 struct irq_fwspec *fwspec,
1415 unsigned long *hwirq,
1416 unsigned int *type)
1417{
1418 /* We support standard DT translation */
1419 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1420 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1421 }
1422
1423 /* This is for board files and others not using DT */
1424 if (is_fwnode_irqchip(fwspec->fwnode)) {
1425 int ret;
1426
1427 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1428 if (ret)
1429 return ret;
1430 WARN_ON(*type == IRQ_TYPE_NONE);
1431 return 0;
1432 }
1433 return -EINVAL;
1434}
1435
1436static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1437 unsigned int irq,
1438 unsigned int nr_irqs,
1439 void *data)
1440{
1441 struct gpio_chip *gc = d->host_data;
1442 irq_hw_number_t hwirq;
1443 unsigned int type = IRQ_TYPE_NONE;
1444 struct irq_fwspec *fwspec = data;
91a29af4 1445 union gpio_irq_fwspec gpio_parent_fwspec = {};
fdd61a01
LW
1446 unsigned int parent_hwirq;
1447 unsigned int parent_type;
1448 struct gpio_irq_chip *girq = &gc->irq;
1449 int ret;
1450
1451 /*
1452 * The nr_irqs parameter is always one except for PCI multi-MSI
1453 * so this should not happen.
1454 */
1455 WARN_ON(nr_irqs != 1);
1456
1457 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
1458 if (ret)
1459 return ret;
1460
db4064cc 1461 chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
fdd61a01
LW
1462
1463 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
1464 &parent_hwirq, &parent_type);
1465 if (ret) {
1466 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
1467 return ret;
1468 }
366950ee 1469 chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq);
fdd61a01
LW
1470
1471 /*
1472 * We set handle_bad_irq because the .set_type() should
1473 * always be invoked and set the right type of handler.
1474 */
1475 irq_domain_set_info(d,
1476 irq,
1477 hwirq,
1478 gc->irq.chip,
1479 gc,
1480 girq->handler,
1481 NULL, NULL);
1482 irq_set_probe(irq);
1483
fdd61a01 1484 /* This parent only handles asserted level IRQs */
91a29af4
MZ
1485 ret = girq->populate_parent_alloc_arg(gc, &gpio_parent_fwspec,
1486 parent_hwirq, parent_type);
1487 if (ret)
1488 return ret;
24258761 1489
366950ee 1490 chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
fdd61a01 1491 irq, parent_hwirq);
c34f6dc8 1492 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
91a29af4 1493 ret = irq_domain_alloc_irqs_parent(d, irq, 1, &gpio_parent_fwspec);
880b7cf2
KH
1494 /*
1495 * If the parent irqdomain is msi, the interrupts have already
1496 * been allocated, so the EEXIST is good.
1497 */
1498 if (irq_domain_is_msi(d->parent) && (ret == -EEXIST))
1499 ret = 0;
fdd61a01
LW
1500 if (ret)
1501 chip_err(gc,
1502 "failed to allocate parent hwirq %d for hwirq %lu\n",
1503 parent_hwirq, hwirq);
1504
1505 return ret;
1506}
1507
a0b66a73 1508static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc,
fdd61a01
LW
1509 unsigned int offset)
1510{
1511 return offset;
1512}
1513
88b70496
BG
1514/**
1515 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
1516 * @domain: The IRQ domain used by this IRQ chip
1517 * @data: Outermost irq_data associated with the IRQ
1518 * @reserve: If set, only reserve an interrupt vector instead of assigning one
1519 *
1520 * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
1521 * used as the activate function for the &struct irq_domain_ops. The host_data
1522 * for the IRQ domain must be the &struct gpio_chip.
94bd9ce1
AS
1523 *
1524 * Returns:
1525 * 0 on success, or negative errno on failure.
88b70496
BG
1526 */
1527static int gpiochip_irq_domain_activate(struct irq_domain *domain,
1528 struct irq_data *data, bool reserve)
1529{
1530 struct gpio_chip *gc = domain->host_data;
1531 unsigned int hwirq = irqd_to_hwirq(data);
1532
1533 return gpiochip_lock_as_irq(gc, hwirq);
1534}
1535
1536/**
1537 * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
1538 * @domain: The IRQ domain used by this IRQ chip
1539 * @data: Outermost irq_data associated with the IRQ
1540 *
1541 * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
1542 * be used as the deactivate function for the &struct irq_domain_ops. The
1543 * host_data for the IRQ domain must be the &struct gpio_chip.
1544 */
1545static void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
1546 struct irq_data *data)
1547{
1548 struct gpio_chip *gc = domain->host_data;
1549 unsigned int hwirq = irqd_to_hwirq(data);
1550
1551 return gpiochip_unlock_as_irq(gc, hwirq);
1552}
1553
fdd61a01
LW
1554static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
1555{
1556 ops->activate = gpiochip_irq_domain_activate;
1557 ops->deactivate = gpiochip_irq_domain_deactivate;
1558 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
fdd61a01
LW
1559
1560 /*
08f12b45 1561 * We only allow overriding the translate() and free() functions for
fdd61a01 1562 * hierarchical chips, and this should only be done if the user
08f12b45
LP
1563 * really need something other than 1:1 translation for translate()
1564 * callback and free if user wants to free up any resources which
1565 * were allocated during callbacks, for example populate_parent_alloc_arg.
fdd61a01
LW
1566 */
1567 if (!ops->translate)
1568 ops->translate = gpiochip_hierarchy_irq_domain_translate;
08f12b45
LP
1569 if (!ops->free)
1570 ops->free = irq_domain_free_irqs_common;
fdd61a01
LW
1571}
1572
b683b487 1573static struct irq_domain *gpiochip_hierarchy_create_domain(struct gpio_chip *gc)
fdd61a01 1574{
b683b487
AS
1575 struct irq_domain *domain;
1576
fdd61a01
LW
1577 if (!gc->irq.child_to_parent_hwirq ||
1578 !gc->irq.fwnode) {
1579 chip_err(gc, "missing irqdomain vital data\n");
b683b487 1580 return ERR_PTR(-EINVAL);
fdd61a01
LW
1581 }
1582
1583 if (!gc->irq.child_offset_to_irq)
1584 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
1585
24258761
KH
1586 if (!gc->irq.populate_parent_alloc_arg)
1587 gc->irq.populate_parent_alloc_arg =
fdd61a01
LW
1588 gpiochip_populate_parent_fwspec_twocell;
1589
1590 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
1591
b683b487 1592 domain = irq_domain_create_hierarchy(
fdd61a01
LW
1593 gc->irq.parent_domain,
1594 0,
1595 gc->ngpio,
1596 gc->irq.fwnode,
1597 &gc->irq.child_irq_domain_ops,
1598 gc);
1599
b683b487
AS
1600 if (!domain)
1601 return ERR_PTR(-ENOMEM);
fdd61a01
LW
1602
1603 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
1604
b683b487 1605 return domain;
fdd61a01
LW
1606}
1607
1608static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1609{
1610 return !!gc->irq.parent_domain;
1611}
1612
91a29af4
MZ
1613int gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc,
1614 union gpio_irq_fwspec *gfwspec,
1615 unsigned int parent_hwirq,
1616 unsigned int parent_type)
fdd61a01 1617{
91a29af4 1618 struct irq_fwspec *fwspec = &gfwspec->fwspec;
24258761 1619
a0b66a73 1620 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1621 fwspec->param_count = 2;
1622 fwspec->param[0] = parent_hwirq;
1623 fwspec->param[1] = parent_type;
24258761 1624
91a29af4 1625 return 0;
fdd61a01
LW
1626}
1627EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
1628
91a29af4
MZ
1629int gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc,
1630 union gpio_irq_fwspec *gfwspec,
1631 unsigned int parent_hwirq,
1632 unsigned int parent_type)
fdd61a01 1633{
91a29af4 1634 struct irq_fwspec *fwspec = &gfwspec->fwspec;
24258761 1635
a0b66a73 1636 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1637 fwspec->param_count = 4;
1638 fwspec->param[0] = 0;
1639 fwspec->param[1] = parent_hwirq;
1640 fwspec->param[2] = 0;
1641 fwspec->param[3] = parent_type;
24258761 1642
91a29af4 1643 return 0;
fdd61a01
LW
1644}
1645EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
1646
1647#else
1648
b683b487 1649static struct irq_domain *gpiochip_hierarchy_create_domain(struct gpio_chip *gc)
fdd61a01 1650{
b683b487 1651 return ERR_PTR(-EINVAL);
fdd61a01
LW
1652}
1653
1654static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1655{
1656 return false;
1657}
1658
1659#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
1660
14250520
LW
1661/**
1662 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
1663 * @d: the irqdomain used by this irqchip
1664 * @irq: the global irq number used by this GPIO irqchip irq
1665 * @hwirq: the local IRQ/GPIO line offset on this gpiochip
1666 *
1667 * This function will set up the mapping for a certain IRQ line on a
1668 * gpiochip by assigning the gpiochip as chip data, and using the irqchip
1669 * stored inside the gpiochip.
94bd9ce1
AS
1670 *
1671 * Returns:
1672 * 0 on success, or negative errno on failure.
14250520 1673 */
88b70496
BG
1674static int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
1675 irq_hw_number_t hwirq)
14250520 1676{
a0b66a73 1677 struct gpio_chip *gc = d->host_data;
d377f56f 1678 int ret = 0;
14250520 1679
a0b66a73 1680 if (!gpiochip_irqchip_irq_valid(gc, hwirq))
dc749a09
GS
1681 return -ENXIO;
1682
a0b66a73 1683 irq_set_chip_data(irq, gc);
a0a8bcf4
GS
1684 /*
1685 * This lock class tells lockdep that GPIO irqs are in a different
1686 * category than their parents, so it won't report false recursion.
1687 */
a0b66a73
LW
1688 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
1689 irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler);
d245b3f9 1690 /* Chips that use nested thread handlers have them marked */
a0b66a73 1691 if (gc->irq.threaded)
1c8732bb 1692 irq_set_nested_thread(irq, 1);
14250520 1693 irq_set_noprobe(irq);
23393d49 1694
a0b66a73
LW
1695 if (gc->irq.num_parents == 1)
1696 ret = irq_set_parent(irq, gc->irq.parents[0]);
1697 else if (gc->irq.map)
1698 ret = irq_set_parent(irq, gc->irq.map[hwirq]);
e0d89728 1699
d377f56f
LW
1700 if (ret < 0)
1701 return ret;
e0d89728 1702
1333b90f
LW
1703 /*
1704 * No set-up of the hardware will happen if IRQ_TYPE_NONE
1705 * is passed as default type.
1706 */
a0b66a73
LW
1707 if (gc->irq.default_type != IRQ_TYPE_NONE)
1708 irq_set_irq_type(irq, gc->irq.default_type);
14250520
LW
1709
1710 return 0;
1711}
1712
88b70496 1713static void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
c3626fde 1714{
a0b66a73 1715 struct gpio_chip *gc = d->host_data;
1c8732bb 1716
a0b66a73 1717 if (gc->irq.threaded)
1c8732bb 1718 irq_set_nested_thread(irq, 0);
c3626fde
LW
1719 irq_set_chip_and_handler(irq, NULL, NULL);
1720 irq_set_chip_data(irq, NULL);
1721}
1722
14250520
LW
1723static const struct irq_domain_ops gpiochip_domain_ops = {
1724 .map = gpiochip_irq_map,
c3626fde 1725 .unmap = gpiochip_irq_unmap,
14250520
LW
1726 /* Virtually all GPIO irqchips are twocell:ed */
1727 .xlate = irq_domain_xlate_twocell,
1728};
1729
1efc43de
AS
1730static struct irq_domain *gpiochip_simple_create_domain(struct gpio_chip *gc)
1731{
1732 struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev);
1733 struct irq_domain *domain;
1734
1735 domain = irq_domain_create_simple(fwnode, gc->ngpio, gc->irq.first,
1736 &gpiochip_domain_ops, gc);
1737 if (!domain)
1738 return ERR_PTR(-EINVAL);
1739
1740 return domain;
1741}
1742
13daf489 1743static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset)
14250520 1744{
a0b66a73 1745 struct irq_domain *domain = gc->irq.domain;
fdd61a01 1746
5467801f
SP
1747#ifdef CONFIG_GPIOLIB_IRQCHIP
1748 /*
1749 * Avoid race condition with other code, which tries to lookup
1750 * an IRQ before the irqchip has been properly registered,
1751 * i.e. while gpiochip is still being brought up.
1752 */
1753 if (!gc->irq.initialized)
1754 return -EPROBE_DEFER;
1755#endif
1756
a0b66a73 1757 if (!gpiochip_irqchip_irq_valid(gc, offset))
4e6b8238 1758 return -ENXIO;
5b76e79c 1759
fdd61a01
LW
1760#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1761 if (irq_domain_is_hierarchy(domain)) {
1762 struct irq_fwspec spec;
1763
1764 spec.fwnode = domain->fwnode;
1765 spec.param_count = 2;
a0b66a73 1766 spec.param[0] = gc->irq.child_offset_to_irq(gc, offset);
fdd61a01
LW
1767 spec.param[1] = IRQ_TYPE_NONE;
1768
1769 return irq_create_fwspec_mapping(&spec);
1770 }
1771#endif
1772
1773 return irq_create_mapping(domain, offset);
14250520
LW
1774}
1775
704f0875 1776int gpiochip_irq_reqres(struct irq_data *d)
14250520 1777{
a0b66a73 1778 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1779 unsigned int hwirq = irqd_to_hwirq(d);
5b76e79c 1780
db4064cc 1781 return gpiochip_reqres_irq(gc, hwirq);
14250520 1782}
704f0875 1783EXPORT_SYMBOL(gpiochip_irq_reqres);
14250520 1784
704f0875 1785void gpiochip_irq_relres(struct irq_data *d)
14250520 1786{
a0b66a73 1787 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1788 unsigned int hwirq = irqd_to_hwirq(d);
14250520 1789
db4064cc 1790 gpiochip_relres_irq(gc, hwirq);
14250520 1791}
704f0875 1792EXPORT_SYMBOL(gpiochip_irq_relres);
14250520 1793
a8173820
MS
1794static void gpiochip_irq_mask(struct irq_data *d)
1795{
1796 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1797 unsigned int hwirq = irqd_to_hwirq(d);
a8173820
MS
1798
1799 if (gc->irq.irq_mask)
1800 gc->irq.irq_mask(d);
db4064cc 1801 gpiochip_disable_irq(gc, hwirq);
a8173820
MS
1802}
1803
1804static void gpiochip_irq_unmask(struct irq_data *d)
1805{
1806 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1807 unsigned int hwirq = irqd_to_hwirq(d);
a8173820 1808
db4064cc 1809 gpiochip_enable_irq(gc, hwirq);
a8173820
MS
1810 if (gc->irq.irq_unmask)
1811 gc->irq.irq_unmask(d);
1812}
1813
461c1a7d 1814static void gpiochip_irq_enable(struct irq_data *d)
14250520 1815{
a0b66a73 1816 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1817 unsigned int hwirq = irqd_to_hwirq(d);
e0d89728 1818
db4064cc 1819 gpiochip_enable_irq(gc, hwirq);
a8173820 1820 gc->irq.irq_enable(d);
461c1a7d
HV
1821}
1822
1823static void gpiochip_irq_disable(struct irq_data *d)
1824{
a0b66a73 1825 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1826 unsigned int hwirq = irqd_to_hwirq(d);
461c1a7d 1827
a8173820 1828 gc->irq.irq_disable(d);
db4064cc 1829 gpiochip_disable_irq(gc, hwirq);
461c1a7d
HV
1830}
1831
a0b66a73 1832static void gpiochip_set_irq_hooks(struct gpio_chip *gc)
ca620f2d 1833{
a0b66a73 1834 struct irq_chip *irqchip = gc->irq.chip;
ca620f2d 1835
6c846d02
MZ
1836 if (irqchip->flags & IRQCHIP_IMMUTABLE)
1837 return;
1838
1839 chip_warn(gc, "not an immutable chip, please consider fixing it!\n");
1840
ca620f2d
HV
1841 if (!irqchip->irq_request_resources &&
1842 !irqchip->irq_release_resources) {
1843 irqchip->irq_request_resources = gpiochip_irq_reqres;
1844 irqchip->irq_release_resources = gpiochip_irq_relres;
1845 }
a0b66a73 1846 if (WARN_ON(gc->irq.irq_enable))
461c1a7d 1847 return;
171948ea 1848 /* Check if the irqchip already has this hook... */
9d552219
NS
1849 if (irqchip->irq_enable == gpiochip_irq_enable ||
1850 irqchip->irq_mask == gpiochip_irq_mask) {
171948ea
HV
1851 /*
1852 * ...and if so, give a gentle warning that this is bad
1853 * practice.
1854 */
a0b66a73 1855 chip_info(gc,
171948ea
HV
1856 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
1857 return;
1858 }
a8173820
MS
1859
1860 if (irqchip->irq_disable) {
1861 gc->irq.irq_disable = irqchip->irq_disable;
1862 irqchip->irq_disable = gpiochip_irq_disable;
1863 } else {
1864 gc->irq.irq_mask = irqchip->irq_mask;
1865 irqchip->irq_mask = gpiochip_irq_mask;
1866 }
1867
1868 if (irqchip->irq_enable) {
1869 gc->irq.irq_enable = irqchip->irq_enable;
1870 irqchip->irq_enable = gpiochip_irq_enable;
1871 } else {
1872 gc->irq.irq_unmask = irqchip->irq_unmask;
1873 irqchip->irq_unmask = gpiochip_irq_unmask;
1874 }
14250520
LW
1875}
1876
081bfdb3
AS
1877static int gpiochip_irqchip_add_allocated_domain(struct gpio_chip *gc,
1878 struct irq_domain *domain,
1879 bool allocated_externally)
1880{
1881 if (!domain)
1882 return -EINVAL;
1883
eec349db
AS
1884 if (gc->to_irq)
1885 chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__);
1886
081bfdb3
AS
1887 gc->to_irq = gpiochip_to_irq;
1888 gc->irq.domain = domain;
1889 gc->irq.domain_is_allocated_externally = allocated_externally;
1890
1891 /*
1892 * Using barrier() here to prevent compiler from reordering
1893 * gc->irq.initialized before adding irqdomain.
1894 */
1895 barrier();
1896
1897 gc->irq.initialized = true;
1898
1899 return 0;
1900}
1901
e0d89728
TR
1902/**
1903 * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
a0b66a73 1904 * @gc: the GPIO chip to add the IRQ chip to
39c3fd58
AL
1905 * @lock_key: lockdep class for IRQ lock
1906 * @request_key: lockdep class for IRQ request
94bd9ce1
AS
1907 *
1908 * Returns:
1909 * 0 on success, or a negative errno on failure.
e0d89728 1910 */
a0b66a73 1911static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1912 struct lock_class_key *lock_key,
1913 struct lock_class_key *request_key)
e0d89728 1914{
5c63a9db 1915 struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev);
a0b66a73 1916 struct irq_chip *irqchip = gc->irq.chip;
39f3ad73 1917 struct irq_domain *domain;
e0d89728
TR
1918 unsigned int type;
1919 unsigned int i;
eec349db 1920 int ret;
e0d89728
TR
1921
1922 if (!irqchip)
1923 return 0;
1924
a0b66a73
LW
1925 if (gc->irq.parent_handler && gc->can_sleep) {
1926 chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n");
e0d89728
TR
1927 return -EINVAL;
1928 }
1929
a0b66a73 1930 type = gc->irq.default_type;
e0d89728
TR
1931
1932 /*
1933 * Specifying a default trigger is a terrible idea if DT or ACPI is
1934 * used to configure the interrupts, as you may end up with
1935 * conflicting triggers. Tell the user, and reset to NONE.
1936 */
5c63a9db
AS
1937 if (WARN(fwnode && type != IRQ_TYPE_NONE,
1938 "%pfw: Ignoring %u default trigger\n", fwnode, type))
e0d89728
TR
1939 type = IRQ_TYPE_NONE;
1940
a0b66a73
LW
1941 gc->irq.default_type = type;
1942 gc->irq.lock_key = lock_key;
1943 gc->irq.request_key = request_key;
e0d89728 1944
fdd61a01 1945 /* If a parent irqdomain is provided, let's build a hierarchy */
a0b66a73 1946 if (gpiochip_hierarchy_is_hierarchical(gc)) {
39f3ad73 1947 domain = gpiochip_hierarchy_create_domain(gc);
fdd61a01 1948 } else {
39f3ad73 1949 domain = gpiochip_simple_create_domain(gc);
fdd61a01 1950 }
39f3ad73
AS
1951 if (IS_ERR(domain))
1952 return PTR_ERR(domain);
e0d89728 1953
a0b66a73 1954 if (gc->irq.parent_handler) {
a0b66a73 1955 for (i = 0; i < gc->irq.num_parents; i++) {
cfe6807d
MZ
1956 void *data;
1957
1958 if (gc->irq.per_parent_data)
1959 data = gc->irq.parent_handler_data_array[i];
1960 else
1961 data = gc->irq.parent_handler_data ?: gc;
1962
e0d89728
TR
1963 /*
1964 * The parent IRQ chip is already using the chip_data
1965 * for this IRQ chip, so our callbacks simply use the
1966 * handler_data.
1967 */
a0b66a73
LW
1968 irq_set_chained_handler_and_data(gc->irq.parents[i],
1969 gc->irq.parent_handler,
e0d89728
TR
1970 data);
1971 }
e0d89728
TR
1972 }
1973
a0b66a73 1974 gpiochip_set_irq_hooks(gc);
ca620f2d 1975
eec349db
AS
1976 ret = gpiochip_irqchip_add_allocated_domain(gc, domain, false);
1977 if (ret)
1978 return ret;
5467801f 1979
06fb4ecf
ML
1980 acpi_gpiochip_request_interrupts(gc);
1981
e0d89728
TR
1982 return 0;
1983}
1984
14250520
LW
1985/**
1986 * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
a0b66a73 1987 * @gc: the gpiochip to remove the irqchip from
14250520
LW
1988 *
1989 * This is called only from gpiochip_remove()
1990 */
a0b66a73 1991static void gpiochip_irqchip_remove(struct gpio_chip *gc)
14250520 1992{
a0b66a73 1993 struct irq_chip *irqchip = gc->irq.chip;
39e5f096 1994 unsigned int offset;
c3626fde 1995
a0b66a73 1996 acpi_gpiochip_free_interrupts(gc);
afa82fab 1997
a0b66a73
LW
1998 if (irqchip && gc->irq.parent_handler) {
1999 struct gpio_irq_chip *irq = &gc->irq;
39e5f096
TR
2000 unsigned int i;
2001
2002 for (i = 0; i < irq->num_parents; i++)
2003 irq_set_chained_handler_and_data(irq->parents[i],
2004 NULL, NULL);
25e4fe92
DES
2005 }
2006
c3626fde 2007 /* Remove all IRQ mappings and delete the domain */
ff7a1790 2008 if (!gc->irq.domain_is_allocated_externally && gc->irq.domain) {
39e5f096
TR
2009 unsigned int irq;
2010
a0b66a73
LW
2011 for (offset = 0; offset < gc->ngpio; offset++) {
2012 if (!gpiochip_irqchip_irq_valid(gc, offset))
79b804cb 2013 continue;
f0fbe7bc 2014
a0b66a73 2015 irq = irq_find_mapping(gc->irq.domain, offset);
f0fbe7bc 2016 irq_dispose_mapping(irq);
79b804cb 2017 }
f0fbe7bc 2018
a0b66a73 2019 irq_domain_remove(gc->irq.domain);
c3626fde 2020 }
14250520 2021
6c846d02 2022 if (irqchip && !(irqchip->flags & IRQCHIP_IMMUTABLE)) {
461c1a7d
HV
2023 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
2024 irqchip->irq_request_resources = NULL;
2025 irqchip->irq_release_resources = NULL;
2026 }
2027 if (irqchip->irq_enable == gpiochip_irq_enable) {
a0b66a73
LW
2028 irqchip->irq_enable = gc->irq.irq_enable;
2029 irqchip->irq_disable = gc->irq.irq_disable;
461c1a7d 2030 }
14250520 2031 }
a0b66a73
LW
2032 gc->irq.irq_enable = NULL;
2033 gc->irq.irq_disable = NULL;
2034 gc->irq.chip = NULL;
79b804cb 2035
a0b66a73 2036 gpiochip_irqchip_free_valid_mask(gc);
14250520
LW
2037}
2038
6a45b0e2
MW
2039/**
2040 * gpiochip_irqchip_add_domain() - adds an irqdomain to a gpiochip
2041 * @gc: the gpiochip to add the irqchip to
2042 * @domain: the irqdomain to add to the gpiochip
2043 *
2044 * This function adds an IRQ domain to the gpiochip.
94bd9ce1
AS
2045 *
2046 * Returns:
2047 * 0 on success, or negative errno on failure.
6a45b0e2
MW
2048 */
2049int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
2050 struct irq_domain *domain)
2051{
081bfdb3 2052 return gpiochip_irqchip_add_allocated_domain(gc, domain, true);
6a45b0e2
MW
2053}
2054EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain);
2055
14250520
LW
2056#else /* CONFIG_GPIOLIB_IRQCHIP */
2057
a0b66a73 2058static inline int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
2059 struct lock_class_key *lock_key,
2060 struct lock_class_key *request_key)
e0d89728
TR
2061{
2062 return 0;
2063}
a0b66a73 2064static void gpiochip_irqchip_remove(struct gpio_chip *gc) {}
9411e3aa 2065
a0b66a73 2066static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
9411e3aa
AS
2067{
2068 return 0;
2069}
2070
a0b66a73 2071static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb
MW
2072{
2073 return 0;
2074}
a0b66a73 2075static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 2076{ }
14250520
LW
2077
2078#endif /* CONFIG_GPIOLIB_IRQCHIP */
2079
c771c2f4
JG
2080/**
2081 * gpiochip_generic_request() - request the gpio function for a pin
a0b66a73 2082 * @gc: the gpiochip owning the GPIO
c771c2f4 2083 * @offset: the offset of the GPIO to request for GPIO function
94bd9ce1
AS
2084 *
2085 * Returns:
2086 * 0 on success, or negative errno on failure.
c771c2f4 2087 */
13daf489 2088int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset)
c771c2f4 2089{
56e337f2
BG
2090#ifdef CONFIG_PINCTRL
2091 if (list_empty(&gc->gpiodev->pin_ranges))
2092 return 0;
2093#endif
2094
acb38be6 2095 return pinctrl_gpio_request(gc, offset);
c771c2f4
JG
2096}
2097EXPORT_SYMBOL_GPL(gpiochip_generic_request);
2098
2099/**
2100 * gpiochip_generic_free() - free the gpio function from a pin
a0b66a73 2101 * @gc: the gpiochip to request the gpio function for
c771c2f4
JG
2102 * @offset: the offset of the GPIO to free from GPIO function
2103 */
13daf489 2104void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset)
c771c2f4 2105{
56e337f2
BG
2106#ifdef CONFIG_PINCTRL
2107 if (list_empty(&gc->gpiodev->pin_ranges))
2108 return;
2109#endif
2110
4fccb263 2111 pinctrl_gpio_free(gc, offset);
c771c2f4
JG
2112}
2113EXPORT_SYMBOL_GPL(gpiochip_generic_free);
2114
2956b5d9
MW
2115/**
2116 * gpiochip_generic_config() - apply configuration for a pin
a0b66a73 2117 * @gc: the gpiochip owning the GPIO
2956b5d9
MW
2118 * @offset: the offset of the GPIO to apply the configuration
2119 * @config: the configuration to be applied
94bd9ce1
AS
2120 *
2121 * Returns:
2122 * 0 on success, or negative errno on failure.
2956b5d9 2123 */
13daf489 2124int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset,
2956b5d9
MW
2125 unsigned long config)
2126{
ae366ba8
ERB
2127#ifdef CONFIG_PINCTRL
2128 if (list_empty(&gc->gpiodev->pin_ranges))
2129 return -ENOTSUPP;
2130#endif
2131
acf2981b 2132 return pinctrl_gpio_set_config(gc, offset, config);
2956b5d9
MW
2133}
2134EXPORT_SYMBOL_GPL(gpiochip_generic_config);
2135
f23f1516 2136#ifdef CONFIG_PINCTRL
165adc9c 2137
586a87e6
CR
2138/**
2139 * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
a0b66a73 2140 * @gc: the gpiochip to add the range for
d32651f6 2141 * @pctldev: the pin controller to map to
586a87e6
CR
2142 * @gpio_offset: the start offset in the current gpio_chip number space
2143 * @pin_group: name of the pin group inside the pin controller
973c1714
CL
2144 *
2145 * Calling this function directly from a DeviceTree-supported
2146 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2147 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2148 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
94bd9ce1
AS
2149 *
2150 * Returns:
2151 * 0 on success, or negative errno on failure.
586a87e6 2152 */
a0b66a73 2153int gpiochip_add_pingroup_range(struct gpio_chip *gc,
586a87e6
CR
2154 struct pinctrl_dev *pctldev,
2155 unsigned int gpio_offset, const char *pin_group)
2156{
2157 struct gpio_pin_range *pin_range;
a0b66a73 2158 struct gpio_device *gdev = gc->gpiodev;
586a87e6
CR
2159 int ret;
2160
2161 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
2162 if (!pin_range) {
a0b66a73 2163 chip_err(gc, "failed to allocate pin ranges\n");
586a87e6
CR
2164 return -ENOMEM;
2165 }
2166
2167 /* Use local offset as range ID */
2168 pin_range->range.id = gpio_offset;
a0b66a73
LW
2169 pin_range->range.gc = gc;
2170 pin_range->range.name = gc->label;
fdeb8e15 2171 pin_range->range.base = gdev->base + gpio_offset;
586a87e6
CR
2172 pin_range->pctldev = pctldev;
2173
2174 ret = pinctrl_get_group_pins(pctldev, pin_group,
2175 &pin_range->range.pins,
2176 &pin_range->range.npins);
61c6375d
MN
2177 if (ret < 0) {
2178 kfree(pin_range);
586a87e6 2179 return ret;
61c6375d 2180 }
586a87e6
CR
2181
2182 pinctrl_add_gpio_range(pctldev, &pin_range->range);
2183
a0b66a73 2184 chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n",
1a2a99c6 2185 gpio_offset, gpio_offset + pin_range->range.npins - 1,
586a87e6
CR
2186 pinctrl_dev_get_devname(pctldev), pin_group);
2187
20ec3e39 2188 list_add_tail(&pin_range->node, &gdev->pin_ranges);
586a87e6
CR
2189
2190 return 0;
2191}
2192EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
2193
3f0f8670
LW
2194/**
2195 * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
a0b66a73 2196 * @gc: the gpiochip to add the range for
950d55f5 2197 * @pinctl_name: the dev_name() of the pin controller to map to
316511c0
LW
2198 * @gpio_offset: the start offset in the current gpio_chip number space
2199 * @pin_offset: the start offset in the pin controller number space
3f0f8670
LW
2200 * @npins: the number of pins from the offset of each pin space (GPIO and
2201 * pin controller) to accumulate in this range
950d55f5 2202 *
973c1714
CL
2203 * Calling this function directly from a DeviceTree-supported
2204 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2205 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2206 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
94bd9ce1
AS
2207 *
2208 * Returns:
2209 * 0 on success, or a negative errno on failure.
3f0f8670 2210 */
a0b66a73 2211int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
316511c0 2212 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 2213 unsigned int npins)
f23f1516
SH
2214{
2215 struct gpio_pin_range *pin_range;
a0b66a73 2216 struct gpio_device *gdev = gc->gpiodev;
b4d4b1f0 2217 int ret;
f23f1516 2218
3f0f8670 2219 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
f23f1516 2220 if (!pin_range) {
a0b66a73 2221 chip_err(gc, "failed to allocate pin ranges\n");
1e63d7b9 2222 return -ENOMEM;
f23f1516
SH
2223 }
2224
3f0f8670 2225 /* Use local offset as range ID */
316511c0 2226 pin_range->range.id = gpio_offset;
a0b66a73
LW
2227 pin_range->range.gc = gc;
2228 pin_range->range.name = gc->label;
fdeb8e15 2229 pin_range->range.base = gdev->base + gpio_offset;
316511c0 2230 pin_range->range.pin_base = pin_offset;
f23f1516 2231 pin_range->range.npins = npins;
192c369c 2232 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
f23f1516 2233 &pin_range->range);
8f23ca1a 2234 if (IS_ERR(pin_range->pctldev)) {
b4d4b1f0 2235 ret = PTR_ERR(pin_range->pctldev);
a0b66a73 2236 chip_err(gc, "could not create pin range\n");
3f0f8670 2237 kfree(pin_range);
b4d4b1f0 2238 return ret;
3f0f8670 2239 }
a0b66a73 2240 chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
1a2a99c6 2241 gpio_offset, gpio_offset + npins - 1,
316511c0
LW
2242 pinctl_name,
2243 pin_offset, pin_offset + npins - 1);
f23f1516 2244
20ec3e39 2245 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1e63d7b9
LW
2246
2247 return 0;
f23f1516 2248}
165adc9c 2249EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
f23f1516 2250
3f0f8670
LW
2251/**
2252 * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
a0b66a73 2253 * @gc: the chip to remove all the mappings for
3f0f8670 2254 */
a0b66a73 2255void gpiochip_remove_pin_ranges(struct gpio_chip *gc)
f23f1516
SH
2256{
2257 struct gpio_pin_range *pin_range, *tmp;
a0b66a73 2258 struct gpio_device *gdev = gc->gpiodev;
f23f1516 2259
20ec3e39 2260 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
f23f1516
SH
2261 list_del(&pin_range->node);
2262 pinctrl_remove_gpio_range(pin_range->pctldev,
2263 &pin_range->range);
3f0f8670 2264 kfree(pin_range);
f23f1516
SH
2265 }
2266}
165adc9c
LW
2267EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
2268
2269#endif /* CONFIG_PINCTRL */
f23f1516 2270
d2876d08
DB
2271/* These "optional" allocation calls help prevent drivers from stomping
2272 * on each other, and help provide better diagnostics in debugfs.
2273 * They're called even less than the "set direction" calls.
2274 */
fac9d885 2275static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
d2876d08 2276{
0338f6a6
BG
2277 unsigned int offset;
2278 int ret;
d2876d08 2279
d83cee3d
BG
2280 CLASS(gpio_chip_guard, guard)(desc);
2281 if (!guard.gc)
2282 return -ENODEV;
2283
35b54533
BG
2284 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags))
2285 return -EBUSY;
2286
d2876d08 2287 /* NOTE: gpio_request() can be called in early boot,
35e8bb51 2288 * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
d2876d08
DB
2289 */
2290
d83cee3d 2291 if (guard.gc->request) {
3789f5ac 2292 offset = gpio_chip_hwgpio(desc);
d83cee3d
BG
2293 if (gpiochip_line_is_valid(guard.gc, offset))
2294 ret = guard.gc->request(guard.gc, offset);
3789f5ac 2295 else
d377f56f 2296 ret = -EINVAL;
35b54533
BG
2297 if (ret)
2298 goto out_clear_bit;
438d8908 2299 }
35b54533 2300
d83cee3d 2301 if (guard.gc->get_direction)
372e722e 2302 gpiod_get_direction(desc);
1f2bcb8c
BG
2303
2304 ret = desc_set_label(desc, label ? : "?");
35b54533
BG
2305 if (ret)
2306 goto out_clear_bit;
1f2bcb8c 2307
95d9f84f
AS
2308 return 0;
2309
35b54533
BG
2310out_clear_bit:
2311 clear_bit(FLAG_REQUESTED, &desc->flags);
d377f56f 2312 return ret;
77c2d792
MW
2313}
2314
fdeb8e15
LW
2315/*
2316 * This descriptor validation needs to be inserted verbatim into each
2317 * function taking a descriptor, so we need to use a preprocessor
54d77198
LW
2318 * macro to avoid endless duplication. If the desc is NULL it is an
2319 * optional GPIO and calls should just bail out.
fdeb8e15 2320 */
a746a232
RV
2321static int validate_desc(const struct gpio_desc *desc, const char *func)
2322{
2323 if (!desc)
2324 return 0;
6c82e737 2325
a746a232
RV
2326 if (IS_ERR(desc)) {
2327 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
2328 return PTR_ERR(desc);
2329 }
6c82e737 2330
a746a232
RV
2331 return 1;
2332}
2333
fdeb8e15 2334#define VALIDATE_DESC(desc) do { \
a746a232
RV
2335 int __valid = validate_desc(desc, __func__); \
2336 if (__valid <= 0) \
2337 return __valid; \
2338 } while (0)
fdeb8e15
LW
2339
2340#define VALIDATE_DESC_VOID(desc) do { \
a746a232
RV
2341 int __valid = validate_desc(desc, __func__); \
2342 if (__valid <= 0) \
fdeb8e15 2343 return; \
a746a232 2344 } while (0)
fdeb8e15 2345
0eb4c6c2 2346int gpiod_request(struct gpio_desc *desc, const char *label)
77c2d792 2347{
d377f56f 2348 int ret = -EPROBE_DEFER;
77c2d792 2349
fdeb8e15 2350 VALIDATE_DESC(desc);
77c2d792 2351
dc0989e3 2352 if (try_module_get(desc->gdev->owner)) {
d377f56f 2353 ret = gpiod_request_commit(desc, label);
8bbff39c 2354 if (ret)
dc0989e3 2355 module_put(desc->gdev->owner);
33a68e86 2356 else
dc0989e3 2357 gpio_device_get(desc->gdev);
77c2d792
MW
2358 }
2359
d377f56f
LW
2360 if (ret)
2361 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
77c2d792 2362
d377f56f 2363 return ret;
d2876d08 2364}
372e722e 2365
5d60c1e6 2366static void gpiod_free_commit(struct gpio_desc *desc)
d2876d08 2367{
0338f6a6 2368 unsigned long flags;
d2876d08 2369
3d599d1c
UKK
2370 might_sleep();
2371
d83cee3d
BG
2372 CLASS(gpio_chip_guard, guard)(desc);
2373
35b54533
BG
2374 flags = READ_ONCE(desc->flags);
2375
d83cee3d
BG
2376 if (guard.gc && test_bit(FLAG_REQUESTED, &flags)) {
2377 if (guard.gc->free)
2378 guard.gc->free(guard.gc, gpio_chip_hwgpio(desc));
35b54533
BG
2379
2380 clear_bit(FLAG_ACTIVE_LOW, &flags);
2381 clear_bit(FLAG_REQUESTED, &flags);
2382 clear_bit(FLAG_OPEN_DRAIN, &flags);
2383 clear_bit(FLAG_OPEN_SOURCE, &flags);
2384 clear_bit(FLAG_PULL_UP, &flags);
2385 clear_bit(FLAG_PULL_DOWN, &flags);
2386 clear_bit(FLAG_BIAS_DISABLE, &flags);
2387 clear_bit(FLAG_EDGE_RISING, &flags);
2388 clear_bit(FLAG_EDGE_FALLING, &flags);
2389 clear_bit(FLAG_IS_HOGGED, &flags);
63636d95 2390#ifdef CONFIG_OF_DYNAMIC
8ce6fd81 2391 WRITE_ONCE(desc->hog, NULL);
63636d95 2392#endif
35b54533
BG
2393 desc_set_label(desc, NULL);
2394 WRITE_ONCE(desc->flags, flags);
d2876d08 2395
35b54533
BG
2396 gpiod_line_state_notify(desc, GPIOLINE_CHANGED_RELEASED);
2397 }
77c2d792
MW
2398}
2399
0eb4c6c2 2400void gpiod_free(struct gpio_desc *desc)
77c2d792 2401{
6c82e737 2402 VALIDATE_DESC_VOID(desc);
3386fb86 2403
5d60c1e6 2404 gpiod_free_commit(desc);
3386fb86
BG
2405 module_put(desc->gdev->owner);
2406 gpio_device_put(desc->gdev);
d2876d08 2407}
372e722e 2408
d2876d08 2409/**
ee25fba7
BG
2410 * gpiochip_dup_line_label - Get a copy of the consumer label.
2411 * @gc: GPIO chip controlling this line.
2412 * @offset: Hardware offset of the line.
d2876d08 2413 *
ee25fba7
BG
2414 * Returns:
2415 * Pointer to a copy of the consumer label if the line is requested or NULL
2416 * if it's not. If a valid pointer was returned, it must be freed using
2417 * kfree(). In case of a memory allocation error, the function returns %ENOMEM.
d2876d08 2418 *
ee25fba7 2419 * Must not be called from atomic context.
d2876d08 2420 */
ee25fba7 2421char *gpiochip_dup_line_label(struct gpio_chip *gc, unsigned int offset)
d2876d08 2422{
6c0b4e6c 2423 struct gpio_desc *desc;
f8d05e27 2424 char *label;
6c0b4e6c 2425
a0b66a73 2426 desc = gpiochip_get_desc(gc, offset);
1739a2d8
BG
2427 if (IS_ERR(desc))
2428 return NULL;
6c0b4e6c 2429
f8d05e27 2430 if (!test_bit(FLAG_REQUESTED, &desc->flags))
d2876d08 2431 return NULL;
f8d05e27 2432
7765ffed 2433 guard(srcu)(&desc->gdev->desc_srcu);
1f2bcb8c 2434
35b54533 2435 label = kstrdup(gpiod_get_label(desc), GFP_KERNEL);
f8d05e27 2436 if (!label)
ee25fba7
BG
2437 return ERR_PTR(-ENOMEM);
2438
f8d05e27 2439 return label;
d2876d08 2440}
ee25fba7 2441EXPORT_SYMBOL_GPL(gpiochip_dup_line_label);
d2876d08 2442
5c887b65
AS
2443static inline const char *function_name_or_default(const char *con_id)
2444{
2445 return con_id ?: "(default)";
2446}
2447
77c2d792
MW
2448/**
2449 * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
a0b66a73 2450 * @gc: GPIO chip
950d55f5 2451 * @hwnum: hardware number of the GPIO for which to request the descriptor
77c2d792 2452 * @label: label for the GPIO
5923ea6c
LW
2453 * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
2454 * specify things like line inversion semantics with the machine flags
2455 * such as GPIO_OUT_LOW
2456 * @dflags: descriptor request flags for this GPIO or 0 if default, this
2457 * can be used to specify consumer semantics such as open drain
77c2d792
MW
2458 *
2459 * Function allows GPIO chip drivers to request and use their own GPIO
2460 * descriptors via gpiolib API. Difference to gpiod_request() is that this
2461 * function will not increase reference count of the GPIO chip module. This
2462 * allows the GPIO chip module to be unloaded as needed (we assume that the
2463 * GPIO chip driver handles freeing the GPIOs it has requested).
950d55f5
TR
2464 *
2465 * Returns:
2466 * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
2467 * code on failure.
77c2d792 2468 */
a0b66a73 2469struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc,
06863620 2470 unsigned int hwnum,
21abf103 2471 const char *label,
5923ea6c
LW
2472 enum gpio_lookup_flags lflags,
2473 enum gpiod_flags dflags)
77c2d792 2474{
a0b66a73 2475 struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum);
5c887b65 2476 const char *name = function_name_or_default(label);
d377f56f 2477 int ret;
77c2d792 2478
abdc08a3 2479 if (IS_ERR(desc)) {
5c887b65 2480 chip_err(gc, "failed to get GPIO %s descriptor\n", name);
abdc08a3
AC
2481 return desc;
2482 }
2483
d377f56f
LW
2484 ret = gpiod_request_commit(desc, label);
2485 if (ret < 0)
2486 return ERR_PTR(ret);
77c2d792 2487
d377f56f
LW
2488 ret = gpiod_configure_flags(desc, label, lflags, dflags);
2489 if (ret) {
21abf103 2490 gpiod_free_commit(desc);
5c887b65 2491 chip_err(gc, "setup of own GPIO %s failed\n", name);
d377f56f 2492 return ERR_PTR(ret);
21abf103
LW
2493 }
2494
abdc08a3 2495 return desc;
77c2d792 2496}
f7d4ad98 2497EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
77c2d792
MW
2498
2499/**
2500 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
2501 * @desc: GPIO descriptor to free
2502 *
2503 * Function frees the given GPIO requested previously with
2504 * gpiochip_request_own_desc().
2505 */
2506void gpiochip_free_own_desc(struct gpio_desc *desc)
2507{
2508 if (desc)
fac9d885 2509 gpiod_free_commit(desc);
77c2d792 2510}
f7d4ad98 2511EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
d2876d08 2512
fdeb8e15
LW
2513/*
2514 * Drivers MUST set GPIO direction before making get/set calls. In
d2876d08
DB
2515 * some cases this is done in early boot, before IRQs are enabled.
2516 *
2517 * As a rule these aren't called more than once (except for drivers
2518 * using the open-drain emulation idiom) so these are natural places
2519 * to accumulate extra debugging checks. Note that we can't (yet)
2520 * rely on gpio_request() having been called beforehand.
2521 */
2522
d99f8876 2523static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset,
62adc6f3 2524 unsigned long config)
71479789 2525{
d90f3685
BG
2526 if (!gc->set_config)
2527 return -ENOTSUPP;
542f3615 2528
62adc6f3 2529 return gc->set_config(gc, offset, config);
71479789
TP
2530}
2531
0c4d8666
AS
2532static int gpio_set_config_with_argument(struct gpio_desc *desc,
2533 enum pin_config_param mode,
2534 u32 argument)
d99f8876 2535{
91b4ea5f 2536 unsigned long config;
0c4d8666 2537
d83cee3d
BG
2538 CLASS(gpio_chip_guard, guard)(desc);
2539 if (!guard.gc)
2540 return -ENODEV;
2541
0c4d8666 2542 config = pinconf_to_config_packed(mode, argument);
d83cee3d 2543 return gpio_do_set_config(guard.gc, gpio_chip_hwgpio(desc), config);
0c4d8666
AS
2544}
2545
baca3b15
AS
2546static int gpio_set_config_with_argument_optional(struct gpio_desc *desc,
2547 enum pin_config_param mode,
2548 u32 argument)
2549{
2550 struct device *dev = &desc->gdev->dev;
2551 int gpio = gpio_chip_hwgpio(desc);
2552 int ret;
2553
2554 ret = gpio_set_config_with_argument(desc, mode, argument);
2555 if (ret != -ENOTSUPP)
2556 return ret;
d99f8876
BG
2557
2558 switch (mode) {
baca3b15
AS
2559 case PIN_CONFIG_PERSIST_STATE:
2560 dev_dbg(dev, "Persistence not supported for GPIO %d\n", gpio);
d99f8876 2561 break;
d99f8876 2562 default:
baca3b15 2563 break;
d99f8876
BG
2564 }
2565
baca3b15
AS
2566 return 0;
2567}
2568
0c4d8666
AS
2569static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode)
2570{
6aa32ad7 2571 return gpio_set_config_with_argument(desc, mode, 0);
d99f8876
BG
2572}
2573
5f4bf171 2574static int gpio_set_bias(struct gpio_desc *desc)
2148ad77 2575{
9ef6293c 2576 enum pin_config_param bias;
2559f2e0 2577 unsigned long flags;
6aa32ad7 2578 unsigned int arg;
2148ad77 2579
2559f2e0
BG
2580 flags = READ_ONCE(desc->flags);
2581
2582 if (test_bit(FLAG_BIAS_DISABLE, &flags))
2148ad77 2583 bias = PIN_CONFIG_BIAS_DISABLE;
2559f2e0 2584 else if (test_bit(FLAG_PULL_UP, &flags))
2148ad77 2585 bias = PIN_CONFIG_BIAS_PULL_UP;
2559f2e0 2586 else if (test_bit(FLAG_PULL_DOWN, &flags))
2148ad77 2587 bias = PIN_CONFIG_BIAS_PULL_DOWN;
9ef6293c
AS
2588 else
2589 return 0;
2148ad77 2590
6aa32ad7
AS
2591 switch (bias) {
2592 case PIN_CONFIG_BIAS_PULL_DOWN:
2593 case PIN_CONFIG_BIAS_PULL_UP:
2594 arg = 1;
2595 break;
2596
2597 default:
2598 arg = 0;
2599 break;
2148ad77 2600 }
6aa32ad7 2601
baca3b15 2602 return gpio_set_config_with_argument_optional(desc, bias, arg);
2148ad77
KG
2603}
2604
660c619b
AS
2605/**
2606 * gpio_set_debounce_timeout() - Set debounce timeout
2607 * @desc: GPIO descriptor to set the debounce timeout
2608 * @debounce: Debounce timeout in microseconds
2609 *
2610 * The function calls the certain GPIO driver to set debounce timeout
2611 * in the hardware.
2612 *
94bd9ce1
AS
2613 * Returns:
2614 * 0 on success, or negative errno on failure.
660c619b 2615 */
f725edd8
AS
2616int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce)
2617{
2618 return gpio_set_config_with_argument_optional(desc,
2619 PIN_CONFIG_INPUT_DEBOUNCE,
2620 debounce);
2148ad77
KG
2621}
2622
79a9becd
AC
2623/**
2624 * gpiod_direction_input - set the GPIO direction to input
2625 * @desc: GPIO to set to input
2626 *
2627 * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
2628 * be called safely on it.
2629 *
94bd9ce1
AS
2630 * Returns:
2631 * 0 on success, or negative errno on failure.
79a9becd
AC
2632 */
2633int gpiod_direction_input(struct gpio_desc *desc)
d2876d08 2634{
0338f6a6 2635 int ret = 0;
d2876d08 2636
fdeb8e15 2637 VALIDATE_DESC(desc);
d83cee3d
BG
2638
2639 CLASS(gpio_chip_guard, guard)(desc);
2640 if (!guard.gc)
2641 return -ENODEV;
bcabdef1 2642
e48d194d
LW
2643 /*
2644 * It is legal to have no .get() and .direction_input() specified if
2645 * the chip is output-only, but you can't specify .direction_input()
2646 * and not support the .get() operation, that doesn't make sense.
2647 */
d83cee3d 2648 if (!guard.gc->get && guard.gc->direction_input) {
6424de5a 2649 gpiod_warn(desc,
e48d194d
LW
2650 "%s: missing get() but have direction_input()\n",
2651 __func__);
be1a4b13
LW
2652 return -EIO;
2653 }
2654
e48d194d
LW
2655 /*
2656 * If we have a .direction_input() callback, things are simple,
2657 * just call it. Else we are some input-only chip so try to check the
2658 * direction (if .get_direction() is supported) else we silently
2659 * assume we are in input mode after this.
2660 */
d83cee3d
BG
2661 if (guard.gc->direction_input) {
2662 ret = guard.gc->direction_input(guard.gc,
2663 gpio_chip_hwgpio(desc));
2664 } else if (guard.gc->get_direction &&
2665 (guard.gc->get_direction(guard.gc,
2666 gpio_chip_hwgpio(desc)) != 1)) {
ae9847f4 2667 gpiod_warn(desc,
e48d194d
LW
2668 "%s: missing direction_input() operation and line is output\n",
2669 __func__);
ae9847f4
RRD
2670 return -EIO;
2671 }
2148ad77 2672 if (ret == 0) {
d2876d08 2673 clear_bit(FLAG_IS_OUT, &desc->flags);
5f4bf171 2674 ret = gpio_set_bias(desc);
2148ad77 2675 }
d449991c 2676
d377f56f 2677 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
d82da797 2678
d377f56f 2679 return ret;
d2876d08 2680}
79a9becd 2681EXPORT_SYMBOL_GPL(gpiod_direction_input);
372e722e 2682
fac9d885 2683static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
d2876d08 2684{
d83cee3d
BG
2685 int val = !!value, ret = 0;
2686
2687 CLASS(gpio_chip_guard, guard)(desc);
2688 if (!guard.gc)
2689 return -ENODEV;
d2876d08 2690
e48d194d
LW
2691 /*
2692 * It's OK not to specify .direction_output() if the gpiochip is
2693 * output-only, but if there is then not even a .set() operation it
2694 * is pretty tricky to drive the output line.
2695 */
d83cee3d 2696 if (!guard.gc->set && !guard.gc->direction_output) {
6424de5a 2697 gpiod_warn(desc,
e48d194d
LW
2698 "%s: missing set() and direction_output() operations\n",
2699 __func__);
be1a4b13
LW
2700 return -EIO;
2701 }
2702
d83cee3d
BG
2703 if (guard.gc->direction_output) {
2704 ret = guard.gc->direction_output(guard.gc,
2705 gpio_chip_hwgpio(desc), val);
ae9847f4 2706 } else {
e48d194d 2707 /* Check that we are in output mode if we can */
d83cee3d
BG
2708 if (guard.gc->get_direction &&
2709 guard.gc->get_direction(guard.gc, gpio_chip_hwgpio(desc))) {
ae9847f4
RRD
2710 gpiod_warn(desc,
2711 "%s: missing direction_output() operation\n",
2712 __func__);
2713 return -EIO;
2714 }
e48d194d
LW
2715 /*
2716 * If we can't actively set the direction, we are some
2717 * output-only chip, so just drive the output as desired.
2718 */
d83cee3d 2719 guard.gc->set(guard.gc, gpio_chip_hwgpio(desc), val);
ae9847f4
RRD
2720 }
2721
c663e5f5 2722 if (!ret)
d2876d08 2723 set_bit(FLAG_IS_OUT, &desc->flags);
ad17731d 2724 trace_gpio_value(desc_to_gpio(desc), 0, val);
c663e5f5
LW
2725 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
2726 return ret;
d2876d08 2727}
ef70bbe1
PZ
2728
2729/**
2730 * gpiod_direction_output_raw - set the GPIO direction to output
2731 * @desc: GPIO to set to output
2732 * @value: initial output value of the GPIO
2733 *
2734 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2735 * be called safely on it. The initial value of the output must be specified
2736 * as raw value on the physical line without regard for the ACTIVE_LOW status.
2737 *
94bd9ce1
AS
2738 * Returns:
2739 * 0 on success, or negative errno on failure.
ef70bbe1
PZ
2740 */
2741int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
2742{
fdeb8e15 2743 VALIDATE_DESC(desc);
fac9d885 2744 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1
PZ
2745}
2746EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
2747
2748/**
90df4fe0 2749 * gpiod_direction_output - set the GPIO direction to output
ef70bbe1
PZ
2750 * @desc: GPIO to set to output
2751 * @value: initial output value of the GPIO
2752 *
2753 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2754 * be called safely on it. The initial value of the output must be specified
2755 * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
2756 * account.
2757 *
94bd9ce1
AS
2758 * Returns:
2759 * 0 on success, or negative errno on failure.
ef70bbe1
PZ
2760 */
2761int gpiod_direction_output(struct gpio_desc *desc, int value)
2762{
2559f2e0 2763 unsigned long flags;
02e47980
LW
2764 int ret;
2765
fdeb8e15 2766 VALIDATE_DESC(desc);
2559f2e0
BG
2767
2768 flags = READ_ONCE(desc->flags);
2769
2770 if (test_bit(FLAG_ACTIVE_LOW, &flags))
ef70bbe1 2771 value = !value;
ad17731d
LW
2772 else
2773 value = !!value;
02e47980 2774
4e9439dd 2775 /* GPIOs used for enabled IRQs shall not be set as output */
2559f2e0
BG
2776 if (test_bit(FLAG_USED_AS_IRQ, &flags) &&
2777 test_bit(FLAG_IRQ_IS_ENABLED, &flags)) {
02e47980
LW
2778 gpiod_err(desc,
2779 "%s: tried to set a GPIO tied to an IRQ as output\n",
2780 __func__);
2781 return -EIO;
2782 }
2783
2559f2e0 2784 if (test_bit(FLAG_OPEN_DRAIN, &flags)) {
02e47980 2785 /* First see if we can enable open drain in hardware */
83522358 2786 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN);
02e47980
LW
2787 if (!ret)
2788 goto set_output_value;
2789 /* Emulate open drain by not actively driving the line high */
e735244e
BG
2790 if (value) {
2791 ret = gpiod_direction_input(desc);
2792 goto set_output_flag;
2793 }
2559f2e0 2794 } else if (test_bit(FLAG_OPEN_SOURCE, &flags)) {
83522358 2795 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE);
02e47980
LW
2796 if (!ret)
2797 goto set_output_value;
2798 /* Emulate open source by not actively driving the line low */
e735244e
BG
2799 if (!value) {
2800 ret = gpiod_direction_input(desc);
2801 goto set_output_flag;
2802 }
02e47980 2803 } else {
83522358 2804 gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL);
02e47980
LW
2805 }
2806
2807set_output_value:
5f4bf171 2808 ret = gpio_set_bias(desc);
2821ae5f
KG
2809 if (ret)
2810 return ret;
fac9d885 2811 return gpiod_direction_output_raw_commit(desc, value);
e735244e
BG
2812
2813set_output_flag:
2814 /*
2815 * When emulating open-source or open-drain functionalities by not
2816 * actively driving the line (setting mode to input) we still need to
2817 * set the IS_OUT flag or otherwise we won't be able to set the line
2818 * value anymore.
2819 */
2820 if (ret == 0)
2821 set_bit(FLAG_IS_OUT, &desc->flags);
2822 return ret;
ef70bbe1 2823}
79a9becd 2824EXPORT_SYMBOL_GPL(gpiod_direction_output);
d2876d08 2825
42112dd7
DP
2826/**
2827 * gpiod_enable_hw_timestamp_ns - Enable hardware timestamp in nanoseconds.
2828 *
2829 * @desc: GPIO to enable.
2830 * @flags: Flags related to GPIO edge.
2831 *
94bd9ce1
AS
2832 * Returns:
2833 * 0 on success, or negative errno on failure.
42112dd7
DP
2834 */
2835int gpiod_enable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags)
2836{
2837 int ret = 0;
42112dd7
DP
2838
2839 VALIDATE_DESC(desc);
2840
d83cee3d
BG
2841 CLASS(gpio_chip_guard, guard)(desc);
2842 if (!guard.gc)
2843 return -ENODEV;
2844
2845 if (!guard.gc->en_hw_timestamp) {
42112dd7
DP
2846 gpiod_warn(desc, "%s: hw ts not supported\n", __func__);
2847 return -ENOTSUPP;
2848 }
2849
d83cee3d
BG
2850 ret = guard.gc->en_hw_timestamp(guard.gc,
2851 gpio_chip_hwgpio(desc), flags);
42112dd7
DP
2852 if (ret)
2853 gpiod_warn(desc, "%s: hw ts request failed\n", __func__);
2854
2855 return ret;
2856}
2857EXPORT_SYMBOL_GPL(gpiod_enable_hw_timestamp_ns);
2858
2859/**
2860 * gpiod_disable_hw_timestamp_ns - Disable hardware timestamp.
2861 *
2862 * @desc: GPIO to disable.
2863 * @flags: Flags related to GPIO edge, same value as used during enable call.
2864 *
94bd9ce1
AS
2865 * Returns:
2866 * 0 on success, or negative errno on failure.
42112dd7
DP
2867 */
2868int gpiod_disable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags)
2869{
2870 int ret = 0;
42112dd7
DP
2871
2872 VALIDATE_DESC(desc);
2873
d83cee3d
BG
2874 CLASS(gpio_chip_guard, guard)(desc);
2875 if (!guard.gc)
2876 return -ENODEV;
2877
2878 if (!guard.gc->dis_hw_timestamp) {
42112dd7
DP
2879 gpiod_warn(desc, "%s: hw ts not supported\n", __func__);
2880 return -ENOTSUPP;
2881 }
2882
d83cee3d
BG
2883 ret = guard.gc->dis_hw_timestamp(guard.gc, gpio_chip_hwgpio(desc),
2884 flags);
42112dd7
DP
2885 if (ret)
2886 gpiod_warn(desc, "%s: hw ts release failed\n", __func__);
2887
2888 return ret;
2889}
2890EXPORT_SYMBOL_GPL(gpiod_disable_hw_timestamp_ns);
2891
8ced32ff
GU
2892/**
2893 * gpiod_set_config - sets @config for a GPIO
2894 * @desc: descriptor of the GPIO for which to set the configuration
2895 * @config: Same packed config format as generic pinconf
2896 *
2897 * Returns:
2898 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2899 * configuration.
2900 */
2901int gpiod_set_config(struct gpio_desc *desc, unsigned long config)
2902{
8ced32ff 2903 VALIDATE_DESC(desc);
8ced32ff 2904
d83cee3d
BG
2905 CLASS(gpio_chip_guard, guard)(desc);
2906 if (!guard.gc)
2907 return -ENODEV;
2908
2909 return gpio_do_set_config(guard.gc, gpio_chip_hwgpio(desc), config);
8ced32ff
GU
2910}
2911EXPORT_SYMBOL_GPL(gpiod_set_config);
2912
c4b5be98 2913/**
950d55f5
TR
2914 * gpiod_set_debounce - sets @debounce time for a GPIO
2915 * @desc: descriptor of the GPIO for which to set debounce time
2916 * @debounce: debounce time in microseconds
65d87656 2917 *
950d55f5
TR
2918 * Returns:
2919 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2920 * debounce time.
c4b5be98 2921 */
13daf489 2922int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce)
c4b5be98 2923{
8ced32ff 2924 unsigned long config;
be1a4b13 2925
2956b5d9 2926 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
8ced32ff 2927 return gpiod_set_config(desc, config);
c4b5be98 2928}
79a9becd 2929EXPORT_SYMBOL_GPL(gpiod_set_debounce);
372e722e 2930
e10f72bf
AJ
2931/**
2932 * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
2933 * @desc: descriptor of the GPIO for which to configure persistence
2934 * @transitory: True to lose state on suspend or reset, false for persistence
2935 *
2936 * Returns:
2937 * 0 on success, otherwise a negative error code.
2938 */
2939int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
2940{
156dd392 2941 VALIDATE_DESC(desc);
e10f72bf
AJ
2942 /*
2943 * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
2944 * persistence state.
2945 */
4fc5bfeb 2946 assign_bit(FLAG_TRANSITORY, &desc->flags, transitory);
e10f72bf
AJ
2947
2948 /* If the driver supports it, set the persistence state now */
baca3b15
AS
2949 return gpio_set_config_with_argument_optional(desc,
2950 PIN_CONFIG_PERSIST_STATE,
2951 !transitory);
e10f72bf 2952}
e10f72bf 2953
79a9becd
AC
2954/**
2955 * gpiod_is_active_low - test whether a GPIO is active-low or not
2956 * @desc: the gpio descriptor to test
2957 *
94bd9ce1
AS
2958 * Returns:
2959 * 1 if the GPIO is active-low, 0 otherwise.
79a9becd
AC
2960 */
2961int gpiod_is_active_low(const struct gpio_desc *desc)
372e722e 2962{
fdeb8e15 2963 VALIDATE_DESC(desc);
79a9becd 2964 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
372e722e 2965}
79a9becd 2966EXPORT_SYMBOL_GPL(gpiod_is_active_low);
d2876d08 2967
d3a5bcb4
MM
2968/**
2969 * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not
2970 * @desc: the gpio descriptor to change
2971 */
2972void gpiod_toggle_active_low(struct gpio_desc *desc)
2973{
2974 VALIDATE_DESC_VOID(desc);
2975 change_bit(FLAG_ACTIVE_LOW, &desc->flags);
2976}
2977EXPORT_SYMBOL_GPL(gpiod_toggle_active_low);
2978
234c5209
AS
2979static int gpio_chip_get_value(struct gpio_chip *gc, const struct gpio_desc *desc)
2980{
2981 return gc->get ? gc->get(gc, gpio_chip_hwgpio(desc)) : -EIO;
2982}
2983
d2876d08
DB
2984/* I/O calls are only valid after configuration completed; the relevant
2985 * "is this a valid GPIO" error checks should already have been done.
2986 *
2987 * "Get" operations are often inlinable as reading a pin value register,
2988 * and masking the relevant bit in that register.
2989 *
2990 * When "set" operations are inlinable, they involve writing that mask to
2991 * one register to set a low value, or a different register to set it high.
2992 * Otherwise locking is needed, so there may be little value to inlining.
2993 *
2994 *------------------------------------------------------------------------
2995 *
2996 * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
2997 * have requested the GPIO. That can include implicit requesting by
2998 * a direction setting call. Marking a gpio as requested locks its chip
2999 * in memory, guaranteeing that these table lookups need no more locking
3000 * and that gpiochip_remove() will fail.
3001 *
3002 * REVISIT when debugging, consider adding some instrumentation to ensure
3003 * that the GPIO was actually requested.
3004 */
3005
fac9d885 3006static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
d2876d08 3007{
d83cee3d 3008 struct gpio_device *gdev;
0338f6a6 3009 struct gpio_chip *gc;
e20538b8 3010 int value;
d2876d08 3011
d83cee3d
BG
3012 /* FIXME Unable to use gpio_chip_guard due to const desc. */
3013 gdev = desc->gdev;
3014
3015 guard(srcu)(&gdev->srcu);
3016
d82b9e08 3017 gc = srcu_dereference(gdev->chip, &gdev->srcu);
d83cee3d
BG
3018 if (!gc)
3019 return -ENODEV;
3020
234c5209 3021 value = gpio_chip_get_value(gc, desc);
723a6303 3022 value = value < 0 ? value : !!value;
372e722e 3023 trace_gpio_value(desc_to_gpio(desc), 1, value);
3f397c21 3024 return value;
d2876d08 3025}
372e722e 3026
a0b66a73 3027static int gpio_chip_get_multiple(struct gpio_chip *gc,
eec1d566
LW
3028 unsigned long *mask, unsigned long *bits)
3029{
1cef8b50 3030 if (gc->get_multiple)
a0b66a73 3031 return gc->get_multiple(gc, mask, bits);
1cef8b50 3032 if (gc->get) {
eec1d566
LW
3033 int i, value;
3034
a0b66a73
LW
3035 for_each_set_bit(i, mask, gc->ngpio) {
3036 value = gc->get(gc, i);
eec1d566
LW
3037 if (value < 0)
3038 return value;
3039 __assign_bit(i, bits, value);
3040 }
3041 return 0;
3042 }
3043 return -EIO;
3044}
3045
d83cee3d
BG
3046/* The 'other' chip must be protected with its GPIO device's SRCU. */
3047static bool gpio_device_chip_cmp(struct gpio_device *gdev, struct gpio_chip *gc)
3048{
3049 guard(srcu)(&gdev->srcu);
3050
d82b9e08 3051 return gc == srcu_dereference(gdev->chip, &gdev->srcu);
d83cee3d
BG
3052}
3053
eec1d566
LW
3054int gpiod_get_array_value_complex(bool raw, bool can_sleep,
3055 unsigned int array_size,
3056 struct gpio_desc **desc_array,
77588c14 3057 struct gpio_array *array_info,
b9762beb 3058 unsigned long *value_bitmap)
eec1d566 3059{
d377f56f 3060 int ret, i = 0;
b17566a6
JK
3061
3062 /*
3063 * Validate array_info against desc_array and its size.
3064 * It should immediately follow desc_array if both
3065 * have been obtained from the same gpiod_get_array() call.
3066 */
3067 if (array_info && array_info->desc == desc_array &&
3068 array_size <= array_info->size &&
3069 (void *)array_info == desc_array + array_info->size) {
3070 if (!can_sleep)
3071 WARN_ON(array_info->chip->can_sleep);
3072
d377f56f 3073 ret = gpio_chip_get_multiple(array_info->chip,
b17566a6
JK
3074 array_info->get_mask,
3075 value_bitmap);
d377f56f
LW
3076 if (ret)
3077 return ret;
b17566a6
JK
3078
3079 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3080 bitmap_xor(value_bitmap, value_bitmap,
3081 array_info->invert_mask, array_size);
3082
b17566a6 3083 i = find_first_zero_bit(array_info->get_mask, array_size);
ae66eca0
AS
3084 if (i == array_size)
3085 return 0;
b17566a6
JK
3086 } else {
3087 array_info = NULL;
3088 }
eec1d566
LW
3089
3090 while (i < array_size) {
c80c4435
AS
3091 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
3092 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
3027743f 3093 unsigned long *mask, *bits;
c07ea8d0 3094 int first, j;
eec1d566 3095
d83cee3d
BG
3096 CLASS(gpio_chip_guard, guard)(desc_array[i]);
3097 if (!guard.gc)
3098 return -ENODEV;
3099
3100 if (likely(guard.gc->ngpio <= FASTPATH_NGPIO)) {
c80c4435
AS
3101 mask = fastpath_mask;
3102 bits = fastpath_bits;
3027743f 3103 } else {
c354c295
AS
3104 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
3105
d83cee3d 3106 mask = bitmap_alloc(guard.gc->ngpio, flags);
3027743f
LA
3107 if (!mask)
3108 return -ENOMEM;
c80c4435 3109
d83cee3d 3110 bits = bitmap_alloc(guard.gc->ngpio, flags);
c354c295
AS
3111 if (!bits) {
3112 bitmap_free(mask);
3113 return -ENOMEM;
3114 }
3027743f
LA
3115 }
3116
d83cee3d 3117 bitmap_zero(mask, guard.gc->ngpio);
3027743f 3118
eec1d566 3119 if (!can_sleep)
d83cee3d 3120 WARN_ON(guard.gc->can_sleep);
eec1d566
LW
3121
3122 /* collect all inputs belonging to the same chip */
3123 first = i;
eec1d566
LW
3124 do {
3125 const struct gpio_desc *desc = desc_array[i];
3126 int hwgpio = gpio_chip_hwgpio(desc);
3127
3128 __set_bit(hwgpio, mask);
3129 i++;
b17566a6
JK
3130
3131 if (array_info)
35ae7f96
JK
3132 i = find_next_zero_bit(array_info->get_mask,
3133 array_size, i);
eec1d566 3134 } while ((i < array_size) &&
d83cee3d 3135 gpio_device_chip_cmp(desc_array[i]->gdev, guard.gc));
eec1d566 3136
d83cee3d 3137 ret = gpio_chip_get_multiple(guard.gc, mask, bits);
3027743f 3138 if (ret) {
c80c4435 3139 if (mask != fastpath_mask)
c354c295
AS
3140 bitmap_free(mask);
3141 if (bits != fastpath_bits)
3142 bitmap_free(bits);
eec1d566 3143 return ret;
3027743f 3144 }
eec1d566 3145
b17566a6 3146 for (j = first; j < i; ) {
eec1d566
LW
3147 const struct gpio_desc *desc = desc_array[j];
3148 int hwgpio = gpio_chip_hwgpio(desc);
3149 int value = test_bit(hwgpio, bits);
3150
3151 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3152 value = !value;
b9762beb 3153 __assign_bit(j, value_bitmap, value);
eec1d566 3154 trace_gpio_value(desc_to_gpio(desc), 1, value);
799d5eb4 3155 j++;
b17566a6
JK
3156
3157 if (array_info)
35ae7f96
JK
3158 j = find_next_zero_bit(array_info->get_mask, i,
3159 j);
eec1d566 3160 }
3027743f 3161
c80c4435 3162 if (mask != fastpath_mask)
c354c295
AS
3163 bitmap_free(mask);
3164 if (bits != fastpath_bits)
3165 bitmap_free(bits);
eec1d566
LW
3166 }
3167 return 0;
3168}
3169
d2876d08 3170/**
79a9becd
AC
3171 * gpiod_get_raw_value() - return a gpio's raw value
3172 * @desc: gpio whose value will be returned
d2876d08 3173 *
94bd9ce1
AS
3174 * Returns:
3175 * The GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3176 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd 3177 *
827a9b8b 3178 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3179 * complain if the GPIO chip functions potentially sleep.
d2876d08 3180 */
79a9becd 3181int gpiod_get_raw_value(const struct gpio_desc *desc)
d2876d08 3182{
fdeb8e15 3183 VALIDATE_DESC(desc);
3285170f 3184 /* Should be using gpiod_get_raw_value_cansleep() */
8a5b477b 3185 WARN_ON(desc->gdev->can_sleep);
fac9d885 3186 return gpiod_get_raw_value_commit(desc);
d2876d08 3187}
79a9becd 3188EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
372e722e 3189
79a9becd
AC
3190/**
3191 * gpiod_get_value() - return a gpio's value
3192 * @desc: gpio whose value will be returned
3193 *
94bd9ce1
AS
3194 * Returns:
3195 * The GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3196 * account, or negative errno on failure.
79a9becd 3197 *
827a9b8b 3198 * This function can be called from contexts where we cannot sleep, and will
79a9becd
AC
3199 * complain if the GPIO chip functions potentially sleep.
3200 */
3201int gpiod_get_value(const struct gpio_desc *desc)
372e722e 3202{
79a9becd 3203 int value;
fdeb8e15
LW
3204
3205 VALIDATE_DESC(desc);
3285170f 3206 /* Should be using gpiod_get_value_cansleep() */
8a5b477b 3207 WARN_ON(desc->gdev->can_sleep);
79a9becd 3208
fac9d885 3209 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3210 if (value < 0)
3211 return value;
3212
79a9becd
AC
3213 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3214 value = !value;
3215
3216 return value;
372e722e 3217}
79a9becd 3218EXPORT_SYMBOL_GPL(gpiod_get_value);
d2876d08 3219
eec1d566
LW
3220/**
3221 * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
b9762beb 3222 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3223 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3224 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3225 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3226 *
3227 * Read the raw values of the GPIOs, i.e. the values of the physical lines
94bd9ce1 3228 * without regard for their ACTIVE_LOW status.
eec1d566 3229 *
827a9b8b 3230 * This function can be called from contexts where we cannot sleep,
eec1d566 3231 * and it will complain if the GPIO chip functions potentially sleep.
94bd9ce1
AS
3232 *
3233 * Returns:
3234 * 0 on success, or negative errno on failure.
eec1d566
LW
3235 */
3236int gpiod_get_raw_array_value(unsigned int array_size,
b9762beb 3237 struct gpio_desc **desc_array,
77588c14 3238 struct gpio_array *array_info,
b9762beb 3239 unsigned long *value_bitmap)
eec1d566
LW
3240{
3241 if (!desc_array)
3242 return -EINVAL;
3243 return gpiod_get_array_value_complex(true, false, array_size,
77588c14
JK
3244 desc_array, array_info,
3245 value_bitmap);
eec1d566
LW
3246}
3247EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
3248
3249/**
3250 * gpiod_get_array_value() - read values from an array of GPIOs
b9762beb 3251 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3252 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3253 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3254 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3255 *
3256 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
94bd9ce1 3257 * into account.
eec1d566 3258 *
827a9b8b 3259 * This function can be called from contexts where we cannot sleep,
eec1d566 3260 * and it will complain if the GPIO chip functions potentially sleep.
94bd9ce1
AS
3261 *
3262 * Returns:
3263 * 0 on success, or negative errno on failure.
eec1d566
LW
3264 */
3265int gpiod_get_array_value(unsigned int array_size,
b9762beb 3266 struct gpio_desc **desc_array,
77588c14 3267 struct gpio_array *array_info,
b9762beb 3268 unsigned long *value_bitmap)
eec1d566
LW
3269{
3270 if (!desc_array)
3271 return -EINVAL;
3272 return gpiod_get_array_value_complex(false, false, array_size,
77588c14
JK
3273 desc_array, array_info,
3274 value_bitmap);
eec1d566
LW
3275}
3276EXPORT_SYMBOL_GPL(gpiod_get_array_value);
3277
aca5ce14 3278/*
fac9d885 3279 * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
79a9becd 3280 * @desc: gpio descriptor whose state need to be set.
20a8a968 3281 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
aca5ce14 3282 */
fac9d885 3283static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
aca5ce14 3284{
d83cee3d
BG
3285 int ret = 0, offset = gpio_chip_hwgpio(desc);
3286
3287 CLASS(gpio_chip_guard, guard)(desc);
3288 if (!guard.gc)
3289 return;
372e722e 3290
aca5ce14 3291 if (value) {
d83cee3d 3292 ret = guard.gc->direction_input(guard.gc, offset);
aca5ce14 3293 } else {
d83cee3d 3294 ret = guard.gc->direction_output(guard.gc, offset, 0);
d377f56f 3295 if (!ret)
372e722e 3296 set_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 3297 }
d377f56f
LW
3298 trace_gpio_direction(desc_to_gpio(desc), value, ret);
3299 if (ret < 0)
6424de5a
MB
3300 gpiod_err(desc,
3301 "%s: Error in set_value for open drain err %d\n",
d377f56f 3302 __func__, ret);
aca5ce14
LD
3303}
3304
25553ff0 3305/*
79a9becd
AC
3306 * _gpio_set_open_source_value() - Set the open source gpio's value.
3307 * @desc: gpio descriptor whose state need to be set.
20a8a968 3308 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
25553ff0 3309 */
fac9d885 3310static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
25553ff0 3311{
d83cee3d
BG
3312 int ret = 0, offset = gpio_chip_hwgpio(desc);
3313
3314 CLASS(gpio_chip_guard, guard)(desc);
3315 if (!guard.gc)
3316 return;
372e722e 3317
25553ff0 3318 if (value) {
d83cee3d 3319 ret = guard.gc->direction_output(guard.gc, offset, 1);
d377f56f 3320 if (!ret)
372e722e 3321 set_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 3322 } else {
d83cee3d 3323 ret = guard.gc->direction_input(guard.gc, offset);
25553ff0 3324 }
d377f56f
LW
3325 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
3326 if (ret < 0)
6424de5a
MB
3327 gpiod_err(desc,
3328 "%s: Error in set_value for open source err %d\n",
d377f56f 3329 __func__, ret);
25553ff0
LD
3330}
3331
fac9d885 3332static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
d2876d08 3333{
d83cee3d
BG
3334 CLASS(gpio_chip_guard, guard)(desc);
3335 if (!guard.gc)
3336 return;
d2876d08 3337
372e722e 3338 trace_gpio_value(desc_to_gpio(desc), 0, value);
d83cee3d 3339 guard.gc->set(guard.gc, gpio_chip_hwgpio(desc), value);
372e722e
AC
3340}
3341
5f424243
RI
3342/*
3343 * set multiple outputs on the same chip;
3344 * use the chip's set_multiple function if available;
3345 * otherwise set the outputs sequentially;
a0b66a73 3346 * @chip: the GPIO chip we operate on
5f424243
RI
3347 * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
3348 * defines which outputs are to be changed
3349 * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
3350 * defines the values the outputs specified by mask are to be set to
3351 */
a0b66a73 3352static void gpio_chip_set_multiple(struct gpio_chip *gc,
5f424243
RI
3353 unsigned long *mask, unsigned long *bits)
3354{
a0b66a73
LW
3355 if (gc->set_multiple) {
3356 gc->set_multiple(gc, mask, bits);
5f424243 3357 } else {
5e4e6fb3
AS
3358 unsigned int i;
3359
3360 /* set outputs if the corresponding mask bit is set */
a0b66a73
LW
3361 for_each_set_bit(i, mask, gc->ngpio)
3362 gc->set(gc, i, test_bit(i, bits));
5f424243
RI
3363 }
3364}
3365
3027743f 3366int gpiod_set_array_value_complex(bool raw, bool can_sleep,
3c940660
GU
3367 unsigned int array_size,
3368 struct gpio_desc **desc_array,
3369 struct gpio_array *array_info,
3370 unsigned long *value_bitmap)
5f424243
RI
3371{
3372 int i = 0;
3373
b17566a6
JK
3374 /*
3375 * Validate array_info against desc_array and its size.
3376 * It should immediately follow desc_array if both
3377 * have been obtained from the same gpiod_get_array() call.
3378 */
3379 if (array_info && array_info->desc == desc_array &&
3380 array_size <= array_info->size &&
3381 (void *)array_info == desc_array + array_info->size) {
3382 if (!can_sleep)
3383 WARN_ON(array_info->chip->can_sleep);
3384
3385 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3386 bitmap_xor(value_bitmap, value_bitmap,
3387 array_info->invert_mask, array_size);
3388
3389 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
3390 value_bitmap);
3391
b17566a6 3392 i = find_first_zero_bit(array_info->set_mask, array_size);
ae66eca0
AS
3393 if (i == array_size)
3394 return 0;
b17566a6
JK
3395 } else {
3396 array_info = NULL;
3397 }
3398
5f424243 3399 while (i < array_size) {
c80c4435
AS
3400 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
3401 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
3027743f 3402 unsigned long *mask, *bits;
5f424243
RI
3403 int count = 0;
3404
d83cee3d
BG
3405 CLASS(gpio_chip_guard, guard)(desc_array[i]);
3406 if (!guard.gc)
3407 return -ENODEV;
3408
3409 if (likely(guard.gc->ngpio <= FASTPATH_NGPIO)) {
c80c4435
AS
3410 mask = fastpath_mask;
3411 bits = fastpath_bits;
3027743f 3412 } else {
c354c295
AS
3413 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
3414
d83cee3d 3415 mask = bitmap_alloc(guard.gc->ngpio, flags);
3027743f
LA
3416 if (!mask)
3417 return -ENOMEM;
c80c4435 3418
d83cee3d 3419 bits = bitmap_alloc(guard.gc->ngpio, flags);
c354c295
AS
3420 if (!bits) {
3421 bitmap_free(mask);
3422 return -ENOMEM;
3423 }
3027743f
LA
3424 }
3425
d83cee3d 3426 bitmap_zero(mask, guard.gc->ngpio);
3027743f 3427
38e003f4 3428 if (!can_sleep)
d83cee3d 3429 WARN_ON(guard.gc->can_sleep);
38e003f4 3430
5f424243
RI
3431 do {
3432 struct gpio_desc *desc = desc_array[i];
3433 int hwgpio = gpio_chip_hwgpio(desc);
b9762beb 3434 int value = test_bit(i, value_bitmap);
5f424243 3435
b17566a6
JK
3436 /*
3437 * Pins applicable for fast input but not for
3438 * fast output processing may have been already
3439 * inverted inside the fast path, skip them.
3440 */
3441 if (!raw && !(array_info &&
3442 test_bit(i, array_info->invert_mask)) &&
3443 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
5f424243
RI
3444 value = !value;
3445 trace_gpio_value(desc_to_gpio(desc), 0, value);
3446 /*
3447 * collect all normal outputs belonging to the same chip
3448 * open drain and open source outputs are set individually
3449 */
02e47980 3450 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
fac9d885 3451 gpio_set_open_drain_value_commit(desc, value);
02e47980 3452 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
fac9d885 3453 gpio_set_open_source_value_commit(desc, value);
5f424243
RI
3454 } else {
3455 __set_bit(hwgpio, mask);
4fc5bfeb 3456 __assign_bit(hwgpio, bits, value);
5f424243
RI
3457 count++;
3458 }
3459 i++;
b17566a6
JK
3460
3461 if (array_info)
35ae7f96
JK
3462 i = find_next_zero_bit(array_info->set_mask,
3463 array_size, i);
fdeb8e15 3464 } while ((i < array_size) &&
d83cee3d 3465 gpio_device_chip_cmp(desc_array[i]->gdev, guard.gc));
5f424243 3466 /* push collected bits to outputs */
38e003f4 3467 if (count != 0)
d83cee3d 3468 gpio_chip_set_multiple(guard.gc, mask, bits);
3027743f 3469
c80c4435 3470 if (mask != fastpath_mask)
c354c295
AS
3471 bitmap_free(mask);
3472 if (bits != fastpath_bits)
3473 bitmap_free(bits);
5f424243 3474 }
3027743f 3475 return 0;
5f424243
RI
3476}
3477
d2876d08 3478/**
79a9becd
AC
3479 * gpiod_set_raw_value() - assign a gpio's raw value
3480 * @desc: gpio whose value will be assigned
d2876d08 3481 * @value: value to assign
d2876d08 3482 *
79a9becd
AC
3483 * Set the raw value of the GPIO, i.e. the value of its physical line without
3484 * regard for its ACTIVE_LOW status.
3485 *
827a9b8b 3486 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3487 * complain if the GPIO chip functions potentially sleep.
d2876d08 3488 */
79a9becd 3489void gpiod_set_raw_value(struct gpio_desc *desc, int value)
372e722e 3490{
fdeb8e15 3491 VALIDATE_DESC_VOID(desc);
3285170f 3492 /* Should be using gpiod_set_raw_value_cansleep() */
8a5b477b 3493 WARN_ON(desc->gdev->can_sleep);
fac9d885 3494 gpiod_set_raw_value_commit(desc, value);
d2876d08 3495}
79a9becd 3496EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
d2876d08 3497
1e77fc82
GU
3498/**
3499 * gpiod_set_value_nocheck() - set a GPIO line value without checking
3500 * @desc: the descriptor to set the value on
3501 * @value: value to set
3502 *
3503 * This sets the value of a GPIO line backing a descriptor, applying
3504 * different semantic quirks like active low and open drain/source
3505 * handling.
3506 */
3507static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
3508{
3509 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3510 value = !value;
3511 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
3512 gpio_set_open_drain_value_commit(desc, value);
3513 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
3514 gpio_set_open_source_value_commit(desc, value);
3515 else
3516 gpiod_set_raw_value_commit(desc, value);
3517}
3518
d2876d08 3519/**
79a9becd
AC
3520 * gpiod_set_value() - assign a gpio's value
3521 * @desc: gpio whose value will be assigned
3522 * @value: value to assign
3523 *
02e47980
LW
3524 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
3525 * OPEN_DRAIN and OPEN_SOURCE flags into account.
d2876d08 3526 *
827a9b8b 3527 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3528 * complain if the GPIO chip functions potentially sleep.
d2876d08 3529 */
79a9becd 3530void gpiod_set_value(struct gpio_desc *desc, int value)
d2876d08 3531{
fdeb8e15 3532 VALIDATE_DESC_VOID(desc);
3285170f 3533 /* Should be using gpiod_set_value_cansleep() */
8a5b477b 3534 WARN_ON(desc->gdev->can_sleep);
1e77fc82 3535 gpiod_set_value_nocheck(desc, value);
372e722e 3536}
79a9becd 3537EXPORT_SYMBOL_GPL(gpiod_set_value);
d2876d08 3538
5f424243 3539/**
3fff99bc 3540 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
b9762beb 3541 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3542 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3543 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3544 * @value_bitmap: bitmap of values to assign
5f424243
RI
3545 *
3546 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3547 * without regard for their ACTIVE_LOW status.
3548 *
827a9b8b 3549 * This function can be called from contexts where we cannot sleep, and will
5f424243 3550 * complain if the GPIO chip functions potentially sleep.
94bd9ce1
AS
3551 *
3552 * Returns:
3553 * 0 on success, or negative errno on failure.
5f424243 3554 */
3027743f 3555int gpiod_set_raw_array_value(unsigned int array_size,
3c940660
GU
3556 struct gpio_desc **desc_array,
3557 struct gpio_array *array_info,
3558 unsigned long *value_bitmap)
5f424243
RI
3559{
3560 if (!desc_array)
3027743f
LA
3561 return -EINVAL;
3562 return gpiod_set_array_value_complex(true, false, array_size,
77588c14 3563 desc_array, array_info, value_bitmap);
5f424243 3564}
3fff99bc 3565EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
5f424243
RI
3566
3567/**
3fff99bc 3568 * gpiod_set_array_value() - assign values to an array of GPIOs
b9762beb 3569 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3570 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3571 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3572 * @value_bitmap: bitmap of values to assign
5f424243
RI
3573 *
3574 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3575 * into account.
3576 *
827a9b8b 3577 * This function can be called from contexts where we cannot sleep, and will
5f424243 3578 * complain if the GPIO chip functions potentially sleep.
94bd9ce1
AS
3579 *
3580 * Returns:
3581 * 0 on success, or negative errno on failure.
5f424243 3582 */
cf9af0d5
GU
3583int gpiod_set_array_value(unsigned int array_size,
3584 struct gpio_desc **desc_array,
3585 struct gpio_array *array_info,
3586 unsigned long *value_bitmap)
5f424243
RI
3587{
3588 if (!desc_array)
cf9af0d5
GU
3589 return -EINVAL;
3590 return gpiod_set_array_value_complex(false, false, array_size,
3591 desc_array, array_info,
3592 value_bitmap);
5f424243 3593}
3fff99bc 3594EXPORT_SYMBOL_GPL(gpiod_set_array_value);
5f424243 3595
d2876d08 3596/**
79a9becd
AC
3597 * gpiod_cansleep() - report whether gpio value access may sleep
3598 * @desc: gpio to check
d2876d08 3599 *
94bd9ce1
AS
3600 * Returns:
3601 * 0 for non-sleepable, 1 for sleepable, or an error code in case of error.
d2876d08 3602 */
79a9becd 3603int gpiod_cansleep(const struct gpio_desc *desc)
372e722e 3604{
fdeb8e15 3605 VALIDATE_DESC(desc);
8a5b477b 3606 return desc->gdev->can_sleep;
d2876d08 3607}
79a9becd 3608EXPORT_SYMBOL_GPL(gpiod_cansleep);
d2876d08 3609
90b39402
LW
3610/**
3611 * gpiod_set_consumer_name() - set the consumer name for the descriptor
3612 * @desc: gpio to set the consumer name on
3613 * @name: the new consumer name
94bd9ce1
AS
3614 *
3615 * Returns:
3616 * 0 on success, or negative errno on failure.
90b39402 3617 */
18534df4 3618int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
90b39402 3619{
18534df4 3620 VALIDATE_DESC(desc);
18534df4 3621
1f2bcb8c 3622 return desc_set_label(desc, name);
90b39402
LW
3623}
3624EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
3625
0f6d504e 3626/**
79a9becd
AC
3627 * gpiod_to_irq() - return the IRQ corresponding to a GPIO
3628 * @desc: gpio whose IRQ will be returned (already requested)
0f6d504e 3629 *
94bd9ce1
AS
3630 * Returns:
3631 * The IRQ corresponding to the passed GPIO, or an error code in case of error.
0f6d504e 3632 */
79a9becd 3633int gpiod_to_irq(const struct gpio_desc *desc)
0f6d504e 3634{
d83cee3d 3635 struct gpio_device *gdev;
a0b66a73 3636 struct gpio_chip *gc;
4c37ce86 3637 int offset;
0f6d504e 3638
79bb71bd
LW
3639 /*
3640 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
3641 * requires this function to not return zero on an invalid descriptor
3642 * but rather a negative error number.
3643 */
30a32e93 3644 if (IS_ERR_OR_NULL(desc))
79bb71bd
LW
3645 return -EINVAL;
3646
d83cee3d
BG
3647 gdev = desc->gdev;
3648 /* FIXME Cannot use gpio_chip_guard due to const desc. */
3649 guard(srcu)(&gdev->srcu);
d82b9e08 3650 gc = srcu_dereference(gdev->chip, &gdev->srcu);
d83cee3d
BG
3651 if (!gc)
3652 return -ENODEV;
3653
372e722e 3654 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
3655 if (gc->to_irq) {
3656 int retirq = gc->to_irq(gc, offset);
4c37ce86
LW
3657
3658 /* Zero means NO_IRQ */
3659 if (!retirq)
3660 return -ENXIO;
3661
3662 return retirq;
3663 }
ae42f928
SP
3664#ifdef CONFIG_GPIOLIB_IRQCHIP
3665 if (gc->irq.chip) {
3666 /*
3667 * Avoid race condition with other code, which tries to lookup
3668 * an IRQ before the irqchip has been properly registered,
3669 * i.e. while gpiochip is still being brought up.
3670 */
3671 return -EPROBE_DEFER;
3672 }
3673#endif
4c37ce86 3674 return -ENXIO;
0f6d504e 3675}
79a9becd 3676EXPORT_SYMBOL_GPL(gpiod_to_irq);
0f6d504e 3677
d468bf9e 3678/**
e3a2e878 3679 * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
a0b66a73 3680 * @gc: the chip the GPIO to lock belongs to
d74be6df 3681 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3682 *
3683 * This is used directly by GPIO drivers that want to lock down
f438acdf 3684 * a certain GPIO line to be used for IRQs.
94bd9ce1
AS
3685 *
3686 * Returns:
3687 * 0 on success, or negative errno on failure.
d468bf9e 3688 */
a0b66a73 3689int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset)
372e722e 3690{
9c10280d
LW
3691 struct gpio_desc *desc;
3692
a0b66a73 3693 desc = gpiochip_get_desc(gc, offset);
9c10280d
LW
3694 if (IS_ERR(desc))
3695 return PTR_ERR(desc);
3696
60f8339e
LW
3697 /*
3698 * If it's fast: flush the direction setting if something changed
3699 * behind our back
3700 */
a0b66a73 3701 if (!gc->can_sleep && gc->get_direction) {
80956790 3702 int dir = gpiod_get_direction(desc);
9c10280d 3703
36b31279 3704 if (dir < 0) {
a0b66a73 3705 chip_err(gc, "%s: cannot get GPIO direction\n",
36b31279
AS
3706 __func__);
3707 return dir;
3708 }
9c10280d 3709 }
d468bf9e 3710
e9bdf7e6
LW
3711 /* To be valid for IRQ the line needs to be input or open drain */
3712 if (test_bit(FLAG_IS_OUT, &desc->flags) &&
3713 !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
a0b66a73 3714 chip_err(gc,
b1911710
AS
3715 "%s: tried to flag a GPIO set as output for IRQ\n",
3716 __func__);
d468bf9e
LW
3717 return -EIO;
3718 }
3719
9c10280d 3720 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3721 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a 3722
d468bf9e 3723 return 0;
372e722e 3724}
e3a2e878 3725EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
d2876d08 3726
d468bf9e 3727/**
e3a2e878 3728 * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
a0b66a73 3729 * @gc: the chip the GPIO to lock belongs to
d74be6df 3730 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3731 *
3732 * This is used directly by GPIO drivers that want to indicate
3733 * that a certain GPIO is no longer used exclusively for IRQ.
d2876d08 3734 */
a0b66a73 3735void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset)
d468bf9e 3736{
3940c34a
LW
3737 struct gpio_desc *desc;
3738
a0b66a73 3739 desc = gpiochip_get_desc(gc, offset);
3940c34a 3740 if (IS_ERR(desc))
d468bf9e 3741 return;
d2876d08 3742
3940c34a 3743 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3744 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
d468bf9e 3745}
e3a2e878 3746EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
d468bf9e 3747
a0b66a73 3748void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3749{
a0b66a73 3750 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3751
3752 if (!IS_ERR(desc) &&
3753 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
3754 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3755}
3756EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
3757
a0b66a73 3758void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3759{
a0b66a73 3760 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3761
3762 if (!IS_ERR(desc) &&
3763 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
e9bdf7e6
LW
3764 /*
3765 * We must not be output when using IRQ UNLESS we are
3766 * open drain.
3767 */
3768 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) &&
3769 !test_bit(FLAG_OPEN_DRAIN, &desc->flags));
4e9439dd
HV
3770 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3771 }
3772}
3773EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
3774
a0b66a73 3775bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset)
6cee3821 3776{
a0b66a73 3777 if (offset >= gc->ngpio)
6cee3821
LW
3778 return false;
3779
a0b66a73 3780 return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags);
6cee3821
LW
3781}
3782EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
3783
a0b66a73 3784int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238
HV
3785{
3786 int ret;
3787
a0b66a73 3788 if (!try_module_get(gc->gpiodev->owner))
4e6b8238
HV
3789 return -ENODEV;
3790
a0b66a73 3791 ret = gpiochip_lock_as_irq(gc, offset);
4e6b8238 3792 if (ret) {
a0b66a73
LW
3793 chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset);
3794 module_put(gc->gpiodev->owner);
4e6b8238
HV
3795 return ret;
3796 }
3797 return 0;
3798}
3799EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
3800
a0b66a73 3801void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238 3802{
a0b66a73
LW
3803 gpiochip_unlock_as_irq(gc, offset);
3804 module_put(gc->gpiodev->owner);
4e6b8238
HV
3805}
3806EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
3807
a0b66a73 3808bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset)
143b65d6 3809{
a0b66a73 3810 if (offset >= gc->ngpio)
143b65d6
LW
3811 return false;
3812
a0b66a73 3813 return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3814}
3815EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
3816
a0b66a73 3817bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset)
143b65d6 3818{
a0b66a73 3819 if (offset >= gc->ngpio)
143b65d6
LW
3820 return false;
3821
a0b66a73 3822 return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3823}
3824EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
3825
a0b66a73 3826bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset)
05f479bf 3827{
a0b66a73 3828 if (offset >= gc->ngpio)
05f479bf
CK
3829 return false;
3830
a0b66a73 3831 return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags);
05f479bf
CK
3832}
3833EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
3834
79a9becd
AC
3835/**
3836 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
3837 * @desc: gpio whose value will be returned
3838 *
94bd9ce1
AS
3839 * Returns:
3840 * The GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3841 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd
AC
3842 *
3843 * This function is to be called from contexts that can sleep.
d2876d08 3844 */
79a9becd 3845int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
d2876d08 3846{
5d5dfc50 3847 might_sleep();
fdeb8e15 3848 VALIDATE_DESC(desc);
fac9d885 3849 return gpiod_get_raw_value_commit(desc);
d2876d08 3850}
79a9becd 3851EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
372e722e 3852
79a9becd
AC
3853/**
3854 * gpiod_get_value_cansleep() - return a gpio's value
3855 * @desc: gpio whose value will be returned
3856 *
94bd9ce1
AS
3857 * Returns:
3858 * The GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3859 * account, or negative errno on failure.
79a9becd
AC
3860 *
3861 * This function is to be called from contexts that can sleep.
3862 */
3863int gpiod_get_value_cansleep(const struct gpio_desc *desc)
d2876d08 3864{
3f397c21 3865 int value;
d2876d08 3866
5d5dfc50 3867 might_sleep();
fdeb8e15 3868 VALIDATE_DESC(desc);
fac9d885 3869 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3870 if (value < 0)
3871 return value;
3872
79a9becd
AC
3873 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3874 value = !value;
3875
3f397c21 3876 return value;
d2876d08 3877}
79a9becd 3878EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
372e722e 3879
eec1d566
LW
3880/**
3881 * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
b9762beb 3882 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3883 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3884 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3885 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3886 *
3887 * Read the raw values of the GPIOs, i.e. the values of the physical lines
94bd9ce1 3888 * without regard for their ACTIVE_LOW status.
eec1d566
LW
3889 *
3890 * This function is to be called from contexts that can sleep.
94bd9ce1
AS
3891 *
3892 * Returns:
3893 * 0 on success, or negative errno on failure.
eec1d566
LW
3894 */
3895int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
3896 struct gpio_desc **desc_array,
77588c14 3897 struct gpio_array *array_info,
b9762beb 3898 unsigned long *value_bitmap)
eec1d566 3899{
5d5dfc50 3900 might_sleep();
eec1d566
LW
3901 if (!desc_array)
3902 return -EINVAL;
3903 return gpiod_get_array_value_complex(true, true, array_size,
77588c14
JK
3904 desc_array, array_info,
3905 value_bitmap);
eec1d566
LW
3906}
3907EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
3908
3909/**
3910 * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
b9762beb 3911 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3912 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3913 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3914 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3915 *
3916 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
94bd9ce1 3917 * into account.
eec1d566
LW
3918 *
3919 * This function is to be called from contexts that can sleep.
94bd9ce1
AS
3920 *
3921 * Returns:
3922 * 0 on success, or negative errno on failure.
eec1d566
LW
3923 */
3924int gpiod_get_array_value_cansleep(unsigned int array_size,
3925 struct gpio_desc **desc_array,
77588c14 3926 struct gpio_array *array_info,
b9762beb 3927 unsigned long *value_bitmap)
eec1d566 3928{
5d5dfc50 3929 might_sleep();
eec1d566
LW
3930 if (!desc_array)
3931 return -EINVAL;
3932 return gpiod_get_array_value_complex(false, true, array_size,
77588c14
JK
3933 desc_array, array_info,
3934 value_bitmap);
eec1d566
LW
3935}
3936EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
3937
79a9becd
AC
3938/**
3939 * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
3940 * @desc: gpio whose value will be assigned
3941 * @value: value to assign
3942 *
3943 * Set the raw value of the GPIO, i.e. the value of its physical line without
3944 * regard for its ACTIVE_LOW status.
3945 *
3946 * This function is to be called from contexts that can sleep.
3947 */
3948void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
372e722e 3949{
5d5dfc50 3950 might_sleep();
fdeb8e15 3951 VALIDATE_DESC_VOID(desc);
fac9d885 3952 gpiod_set_raw_value_commit(desc, value);
372e722e 3953}
79a9becd 3954EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
d2876d08 3955
79a9becd
AC
3956/**
3957 * gpiod_set_value_cansleep() - assign a gpio's value
3958 * @desc: gpio whose value will be assigned
3959 * @value: value to assign
3960 *
3961 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
3962 * account
3963 *
3964 * This function is to be called from contexts that can sleep.
3965 */
3966void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
d2876d08 3967{
5d5dfc50 3968 might_sleep();
fdeb8e15 3969 VALIDATE_DESC_VOID(desc);
1e77fc82 3970 gpiod_set_value_nocheck(desc, value);
372e722e 3971}
79a9becd 3972EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
d2876d08 3973
5f424243 3974/**
3fff99bc 3975 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3976 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3977 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3978 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3979 * @value_bitmap: bitmap of values to assign
5f424243
RI
3980 *
3981 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3982 * without regard for their ACTIVE_LOW status.
3983 *
3984 * This function is to be called from contexts that can sleep.
94bd9ce1
AS
3985 *
3986 * Returns:
3987 * 0 on success, or negative errno on failure.
5f424243 3988 */
3027743f 3989int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3c940660
GU
3990 struct gpio_desc **desc_array,
3991 struct gpio_array *array_info,
3992 unsigned long *value_bitmap)
5f424243 3993{
5d5dfc50 3994 might_sleep();
5f424243 3995 if (!desc_array)
3027743f
LA
3996 return -EINVAL;
3997 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
77588c14 3998 array_info, value_bitmap);
5f424243 3999}
3fff99bc 4000EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
5f424243 4001
3946d187
DT
4002/**
4003 * gpiod_add_lookup_tables() - register GPIO device consumers
4004 * @tables: list of tables of consumers to register
4005 * @n: number of tables in the list
4006 */
4007void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
4008{
4009 unsigned int i;
4010
4011 mutex_lock(&gpio_lookup_lock);
4012
4013 for (i = 0; i < n; i++)
4014 list_add_tail(&tables[i]->list, &gpio_lookup_list);
4015
4016 mutex_unlock(&gpio_lookup_lock);
4017}
4018
5f424243 4019/**
3fff99bc 4020 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 4021 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4022 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4023 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4024 * @value_bitmap: bitmap of values to assign
5f424243
RI
4025 *
4026 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
4027 * into account.
4028 *
4029 * This function is to be called from contexts that can sleep.
94bd9ce1
AS
4030 *
4031 * Returns:
4032 * 0 on success, or negative errno on failure.
5f424243 4033 */
cf9af0d5
GU
4034int gpiod_set_array_value_cansleep(unsigned int array_size,
4035 struct gpio_desc **desc_array,
4036 struct gpio_array *array_info,
4037 unsigned long *value_bitmap)
5f424243 4038{
5d5dfc50 4039 might_sleep();
5f424243 4040 if (!desc_array)
cf9af0d5
GU
4041 return -EINVAL;
4042 return gpiod_set_array_value_complex(false, true, array_size,
4043 desc_array, array_info,
4044 value_bitmap);
5f424243 4045}
3fff99bc 4046EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
5f424243 4047
9ce4ed5b
BG
4048void gpiod_line_state_notify(struct gpio_desc *desc, unsigned long action)
4049{
4050 blocking_notifier_call_chain(&desc->gdev->line_state_notifier,
4051 action, desc);
4052}
4053
bae48da2 4054/**
ad824783
AC
4055 * gpiod_add_lookup_table() - register GPIO device consumers
4056 * @table: table of consumers to register
bae48da2 4057 */
ad824783 4058void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
bae48da2 4059{
49fdfe66 4060 gpiod_add_lookup_tables(&table, 1);
bae48da2 4061}
226b2242 4062EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
bae48da2 4063
be9015ab
SK
4064/**
4065 * gpiod_remove_lookup_table() - unregister GPIO device consumers
4066 * @table: table of consumers to unregister
4067 */
4068void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
4069{
d321ad12
AS
4070 /* Nothing to remove */
4071 if (!table)
4072 return;
4073
be9015ab
SK
4074 mutex_lock(&gpio_lookup_lock);
4075
4076 list_del(&table->list);
4077
4078 mutex_unlock(&gpio_lookup_lock);
4079}
226b2242 4080EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
be9015ab 4081
a411e81e
BG
4082/**
4083 * gpiod_add_hogs() - register a set of GPIO hogs from machine code
4084 * @hogs: table of gpio hog entries with a zeroed sentinel at the end
4085 */
4086void gpiod_add_hogs(struct gpiod_hog *hogs)
4087{
a411e81e
BG
4088 struct gpiod_hog *hog;
4089
4090 mutex_lock(&gpio_machine_hogs_mutex);
4091
4092 for (hog = &hogs[0]; hog->chip_label; hog++) {
4093 list_add_tail(&hog->list, &gpio_machine_hogs);
4094
4095 /*
4096 * The chip may have been registered earlier, so check if it
4097 * exists and, if so, try to hog the line now.
4098 */
db546960
BG
4099 struct gpio_device *gdev __free(gpio_device_put) =
4100 gpio_device_find_by_label(hog->chip_label);
4101 if (gdev)
4102 gpiochip_machine_hog(gpio_device_get_chip(gdev), hog);
a411e81e
BG
4103 }
4104
4105 mutex_unlock(&gpio_machine_hogs_mutex);
4106}
4107EXPORT_SYMBOL_GPL(gpiod_add_hogs);
4108
dd61b292
BG
4109void gpiod_remove_hogs(struct gpiod_hog *hogs)
4110{
4111 struct gpiod_hog *hog;
4112
4113 mutex_lock(&gpio_machine_hogs_mutex);
4114 for (hog = &hogs[0]; hog->chip_label; hog++)
4115 list_del(&hog->list);
4116 mutex_unlock(&gpio_machine_hogs_mutex);
4117}
4118EXPORT_SYMBOL_GPL(gpiod_remove_hogs);
4119
ad824783 4120static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
bae48da2
AC
4121{
4122 const char *dev_id = dev ? dev_name(dev) : NULL;
ad824783 4123 struct gpiod_lookup_table *table;
bae48da2 4124
ad824783
AC
4125 list_for_each_entry(table, &gpio_lookup_list, list) {
4126 if (table->dev_id && dev_id) {
4127 /*
4128 * Valid strings on both ends, must be identical to have
4129 * a match
4130 */
4131 if (!strcmp(table->dev_id, dev_id))
c31071ea 4132 return table;
ad824783
AC
4133 } else {
4134 /*
4135 * One of the pointers is NULL, so both must be to have
4136 * a match
4137 */
4138 if (dev_id == table->dev_id)
c31071ea 4139 return table;
ad824783
AC
4140 }
4141 }
bae48da2 4142
c31071ea 4143 return NULL;
ad824783 4144}
bae48da2 4145
ad824783 4146static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
fed7026a 4147 unsigned int idx, unsigned long *flags)
ad824783 4148{
2a3cf6a3 4149 struct gpio_desc *desc = ERR_PTR(-ENOENT);
ad824783
AC
4150 struct gpiod_lookup_table *table;
4151 struct gpiod_lookup *p;
db546960 4152 struct gpio_chip *gc;
bae48da2 4153
c31071ea
BG
4154 guard(mutex)(&gpio_lookup_lock);
4155
ad824783
AC
4156 table = gpiod_find_lookup_table(dev);
4157 if (!table)
4158 return desc;
bae48da2 4159
4c033b54 4160 for (p = &table->table[0]; p->key; p++) {
ad824783 4161 /* idx must always match exactly */
bae48da2
AC
4162 if (p->idx != idx)
4163 continue;
4164
ad824783
AC
4165 /* If the lookup entry has a con_id, require exact match */
4166 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
4167 continue;
bae48da2 4168
4c033b54
GU
4169 if (p->chip_hwnum == U16_MAX) {
4170 desc = gpio_name_to_desc(p->key);
4171 if (desc) {
4172 *flags = p->flags;
4173 return desc;
4174 }
4175
4176 dev_warn(dev, "cannot find GPIO line %s, deferring\n",
4177 p->key);
4178 return ERR_PTR(-EPROBE_DEFER);
4179 }
4180
db546960
BG
4181 struct gpio_device *gdev __free(gpio_device_put) =
4182 gpio_device_find_by_label(p->key);
4183 if (!gdev) {
8853daf3
JK
4184 /*
4185 * As the lookup table indicates a chip with
4c033b54 4186 * p->key should exist, assume it may
8853daf3
JK
4187 * still appear later and let the interested
4188 * consumer be probed again or let the Deferred
4189 * Probe infrastructure handle the error.
4190 */
4191 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
4c033b54 4192 p->key);
8853daf3 4193 return ERR_PTR(-EPROBE_DEFER);
ad824783 4194 }
bae48da2 4195
db546960
BG
4196 gc = gpio_device_get_chip(gdev);
4197
a0b66a73 4198 if (gc->ngpio <= p->chip_hwnum) {
2a3cf6a3 4199 dev_err(dev,
d935bd50 4200 "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n",
a0b66a73
LW
4201 idx, p->chip_hwnum, gc->ngpio - 1,
4202 gc->label);
2a3cf6a3 4203 return ERR_PTR(-EINVAL);
bae48da2 4204 }
bae48da2 4205
db546960 4206 desc = gpio_device_get_desc(gdev, p->chip_hwnum);
ad824783 4207 *flags = p->flags;
bae48da2 4208
2a3cf6a3 4209 return desc;
bae48da2
AC
4210 }
4211
bae48da2
AC
4212 return desc;
4213}
4214
66858527
RI
4215static int platform_gpio_count(struct device *dev, const char *con_id)
4216{
4217 struct gpiod_lookup_table *table;
4218 struct gpiod_lookup *p;
4219 unsigned int count = 0;
4220
c31071ea
BG
4221 scoped_guard(mutex, &gpio_lookup_lock) {
4222 table = gpiod_find_lookup_table(dev);
4223 if (!table)
4224 return -ENOENT;
66858527 4225
c31071ea
BG
4226 for (p = &table->table[0]; p->key; p++) {
4227 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
4228 (!con_id && !p->con_id))
4229 count++;
4230 }
66858527 4231 }
c31071ea 4232
66858527
RI
4233 if (!count)
4234 return -ENOENT;
4235
4236 return count;
4237}
4238
8eb1f71e
DT
4239static struct gpio_desc *gpiod_find_by_fwnode(struct fwnode_handle *fwnode,
4240 struct device *consumer,
4241 const char *con_id,
4242 unsigned int idx,
4243 enum gpiod_flags *flags,
4244 unsigned long *lookupflags)
0eadd36d 4245{
5c887b65 4246 const char *name = function_name_or_default(con_id);
8eb1f71e 4247 struct gpio_desc *desc = ERR_PTR(-ENOENT);
0eadd36d
DT
4248
4249 if (is_of_node(fwnode)) {
5c887b65 4250 dev_dbg(consumer, "using DT '%pfw' for '%s' GPIO lookup\n", fwnode, name);
8eb1f71e 4251 desc = of_find_gpio(to_of_node(fwnode), con_id, idx, lookupflags);
0eadd36d 4252 } else if (is_acpi_node(fwnode)) {
5c887b65 4253 dev_dbg(consumer, "using ACPI '%pfw' for '%s' GPIO lookup\n", fwnode, name);
8eb1f71e 4254 desc = acpi_find_gpio(fwnode, con_id, idx, flags, lookupflags);
e7f9ff5d 4255 } else if (is_software_node(fwnode)) {
5c887b65 4256 dev_dbg(consumer, "using swnode '%pfw' for '%s' GPIO lookup\n", fwnode, name);
e7f9ff5d 4257 desc = swnode_find_gpio(fwnode, con_id, idx, lookupflags);
0eadd36d 4258 }
0eadd36d 4259
8eb1f71e
DT
4260 return desc;
4261}
0eadd36d 4262
0d776cfd
SB
4263struct gpio_desc *gpiod_find_and_request(struct device *consumer,
4264 struct fwnode_handle *fwnode,
4265 const char *con_id,
4266 unsigned int idx,
4267 enum gpiod_flags flags,
4268 const char *label,
4269 bool platform_lookup_allowed)
8eb1f71e 4270{
ba2dc1cb 4271 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
5c887b65 4272 const char *name = function_name_or_default(con_id);
e348544f
BG
4273 /*
4274 * scoped_guard() is implemented as a for loop, meaning static
4275 * analyzers will complain about these two not being initialized.
4276 */
4277 struct gpio_desc *desc = NULL;
4278 int ret = 0;
4279
4280 scoped_guard(srcu, &gpio_devices_srcu) {
4281 desc = gpiod_find_by_fwnode(fwnode, consumer, con_id, idx,
4282 &flags, &lookupflags);
4283 if (gpiod_not_found(desc) && platform_lookup_allowed) {
4284 /*
4285 * Either we are not using DT or ACPI, or their lookup
4286 * did not return a result. In that case, use platform
4287 * lookup as a fallback.
4288 */
4289 dev_dbg(consumer,
4290 "using lookup tables for GPIO lookup\n");
4291 desc = gpiod_find(consumer, con_id, idx, &lookupflags);
4292 }
4293
4294 if (IS_ERR(desc)) {
5c887b65 4295 dev_dbg(consumer, "No GPIO consumer %s found\n", name);
e348544f
BG
4296 return desc;
4297 }
8eb1f71e 4298
8eb1f71e 4299 /*
e348544f
BG
4300 * If a connection label was passed use that, else attempt to use
4301 * the device name as label
8eb1f71e 4302 */
e348544f 4303 ret = gpiod_request(desc, label);
8eb1f71e 4304 }
8eb1f71e
DT
4305 if (ret) {
4306 if (!(ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE))
4307 return ERR_PTR(ret);
0eadd36d 4308
8eb1f71e
DT
4309 /*
4310 * This happens when there are several consumers for
4311 * the same GPIO line: we just return here without
4312 * further initialization. It is a bit of a hack.
4313 * This is necessary to support fixed regulators.
4314 *
4315 * FIXME: Make this more sane and safe.
4316 */
5c887b65 4317 dev_info(consumer, "nonexclusive access to GPIO for %s\n", name);
8eb1f71e
DT
4318 return desc;
4319 }
0eadd36d 4320
8eb1f71e 4321 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
0eadd36d
DT
4322 if (ret < 0) {
4323 gpiod_put(desc);
39c90497 4324 dev_err(consumer, "setup of GPIO %s failed: %d\n", name, ret);
0eadd36d
DT
4325 return ERR_PTR(ret);
4326 }
4327
9ce4ed5b 4328 gpiod_line_state_notify(desc, GPIOLINE_CHANGED_REQUESTED);
0eadd36d
DT
4329
4330 return desc;
4331}
4332
13949fa9
DT
4333/**
4334 * fwnode_gpiod_get_index - obtain a GPIO from firmware node
4335 * @fwnode: handle of the firmware node
4336 * @con_id: function within the GPIO consumer
4337 * @index: index of the GPIO to obtain for the consumer
4338 * @flags: GPIO initialization flags
4339 * @label: label to attach to the requested GPIO
4340 *
4341 * This function can be used for drivers that get their configuration
4342 * from opaque firmware.
4343 *
4344 * The function properly finds the corresponding GPIO using whatever is the
4345 * underlying firmware interface and then makes sure that the GPIO
4346 * descriptor is requested before it is returned to the caller.
4347 *
4348 * Returns:
4349 * On successful request the GPIO pin is configured in accordance with
4350 * provided @flags.
4351 *
4352 * In case of error an ERR_PTR() is returned.
4353 */
4354struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
8eb1f71e
DT
4355 const char *con_id,
4356 int index,
13949fa9
DT
4357 enum gpiod_flags flags,
4358 const char *label)
4359{
8eb1f71e 4360 return gpiod_find_and_request(NULL, fwnode, con_id, index, flags, label, false);
13949fa9
DT
4361}
4362EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
4363
66858527
RI
4364/**
4365 * gpiod_count - return the number of GPIOs associated with a device / function
66858527
RI
4366 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4367 * @con_id: function within the GPIO consumer
94bd9ce1
AS
4368 *
4369 * Returns:
4370 * The number of GPIOs associated with a device / function or -ENOENT if no
4371 * GPIO has been assigned to the requested function.
66858527
RI
4372 */
4373int gpiod_count(struct device *dev, const char *con_id)
4374{
944f4b0a 4375 const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
66858527
RI
4376 int count = -ENOENT;
4377
944f4b0a 4378 if (is_of_node(fwnode))
adcad536 4379 count = of_gpio_count(fwnode, con_id);
944f4b0a 4380 else if (is_acpi_node(fwnode))
8122c7c6 4381 count = acpi_gpio_count(fwnode, con_id);
e7f9ff5d
DT
4382 else if (is_software_node(fwnode))
4383 count = swnode_gpio_count(fwnode, con_id);
66858527
RI
4384
4385 if (count < 0)
4386 count = platform_gpio_count(dev, con_id);
4387
4388 return count;
4389}
4390EXPORT_SYMBOL_GPL(gpiod_count);
4391
bae48da2 4392/**
0879162f 4393 * gpiod_get - obtain a GPIO for a given GPIO function
ad824783 4394 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2 4395 * @con_id: function within the GPIO consumer
39b2bbe3 4396 * @flags: optional GPIO initialization flags
bae48da2 4397 *
94bd9ce1
AS
4398 * Returns:
4399 * The GPIO descriptor corresponding to the function @con_id of device
2a3cf6a3 4400 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
20a8a968 4401 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
bae48da2 4402 */
b17d1bf1 4403struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
39b2bbe3 4404 enum gpiod_flags flags)
bae48da2 4405{
39b2bbe3 4406 return gpiod_get_index(dev, con_id, 0, flags);
bae48da2 4407}
b17d1bf1 4408EXPORT_SYMBOL_GPL(gpiod_get);
bae48da2 4409
29a1f233
TR
4410/**
4411 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
4412 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4413 * @con_id: function within the GPIO consumer
39b2bbe3 4414 * @flags: optional GPIO initialization flags
29a1f233
TR
4415 *
4416 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
4417 * the requested function it will return NULL. This is convenient for drivers
4418 * that need to handle optional GPIOs.
94bd9ce1
AS
4419 *
4420 * Returns:
4421 * The GPIO descriptor corresponding to the function @con_id of device
4422 * dev, NULL if no GPIO has been assigned to the requested function, or
4423 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
29a1f233 4424 */
b17d1bf1 4425struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
39b2bbe3
AC
4426 const char *con_id,
4427 enum gpiod_flags flags)
29a1f233 4428{
39b2bbe3 4429 return gpiod_get_index_optional(dev, con_id, 0, flags);
29a1f233 4430}
b17d1bf1 4431EXPORT_SYMBOL_GPL(gpiod_get_optional);
29a1f233 4432
f625d460
BP
4433
4434/**
4435 * gpiod_configure_flags - helper function to configure a given GPIO
4436 * @desc: gpio whose value will be assigned
4437 * @con_id: function within the GPIO consumer
fed7026a
AS
4438 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4439 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4440 * @dflags: gpiod_flags - optional GPIO initialization flags
4441 *
94bd9ce1
AS
4442 * Returns:
4443 * 0 on success, -ENOENT if no GPIO has been assigned to the
f625d460
BP
4444 * requested function and/or index, or another IS_ERR() code if an error
4445 * occurred while trying to acquire the GPIO.
4446 */
c29fd9eb 4447int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
85b03b30 4448 unsigned long lflags, enum gpiod_flags dflags)
f625d460 4449{
5c887b65 4450 const char *name = function_name_or_default(con_id);
d377f56f 4451 int ret;
f625d460 4452
85b03b30
JH
4453 if (lflags & GPIO_ACTIVE_LOW)
4454 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
f926dfc1 4455
85b03b30
JH
4456 if (lflags & GPIO_OPEN_DRAIN)
4457 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
f926dfc1
LW
4458 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
4459 /*
4460 * This enforces open drain mode from the consumer side.
4461 * This is necessary for some busses like I2C, but the lookup
4462 * should *REALLY* have specified them as open drain in the
4463 * first place, so print a little warning here.
4464 */
4465 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
4466 gpiod_warn(desc,
4467 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
4468 }
4469
85b03b30
JH
4470 if (lflags & GPIO_OPEN_SOURCE)
4471 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
e10f72bf 4472
c269df8c
NS
4473 if (((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) ||
4474 ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DISABLE)) ||
4475 ((lflags & GPIO_PULL_DOWN) && (lflags & GPIO_PULL_DISABLE))) {
d449991c 4476 gpiod_err(desc,
c269df8c 4477 "multiple pull-up, pull-down or pull-disable enabled, invalid configuration\n");
d449991c
TP
4478 return -EINVAL;
4479 }
4480
4481 if (lflags & GPIO_PULL_UP)
4482 set_bit(FLAG_PULL_UP, &desc->flags);
4483 else if (lflags & GPIO_PULL_DOWN)
4484 set_bit(FLAG_PULL_DOWN, &desc->flags);
c269df8c
NS
4485 else if (lflags & GPIO_PULL_DISABLE)
4486 set_bit(FLAG_BIAS_DISABLE, &desc->flags);
d449991c 4487
d377f56f
LW
4488 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
4489 if (ret < 0)
4490 return ret;
85b03b30 4491
f625d460
BP
4492 /* No particular flag request, return here... */
4493 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
5c887b65 4494 gpiod_dbg(desc, "no flags found for GPIO %s\n", name);
f625d460
BP
4495 return 0;
4496 }
4497
4498 /* Process flags */
4499 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
d377f56f 4500 ret = gpiod_direction_output(desc,
ad17731d 4501 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
f625d460 4502 else
d377f56f 4503 ret = gpiod_direction_input(desc);
f625d460 4504
d377f56f 4505 return ret;
f625d460
BP
4506}
4507
bae48da2
AC
4508/**
4509 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
fdd6a5fe 4510 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2
AC
4511 * @con_id: function within the GPIO consumer
4512 * @idx: index of the GPIO to obtain in the consumer
39b2bbe3 4513 * @flags: optional GPIO initialization flags
bae48da2
AC
4514 *
4515 * This variant of gpiod_get() allows to access GPIOs other than the first
4516 * defined one for functions that define several GPIOs.
4517 *
94bd9ce1
AS
4518 * Returns:
4519 * A valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
2a3cf6a3 4520 * requested function and/or index, or another IS_ERR() code if an error
20a8a968 4521 * occurred while trying to acquire the GPIO.
bae48da2 4522 */
b17d1bf1 4523struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
bae48da2 4524 const char *con_id,
39b2bbe3
AC
4525 unsigned int idx,
4526 enum gpiod_flags flags)
bae48da2 4527{
07445ae1 4528 struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
7d18f0a1 4529 const char *devname = dev ? dev_name(dev) : "?";
8eb1f71e 4530 const char *label = con_id ?: devname;
bae48da2 4531
8eb1f71e 4532 return gpiod_find_and_request(dev, fwnode, con_id, idx, flags, label, true);
6392cca4 4533}
b17d1bf1 4534EXPORT_SYMBOL_GPL(gpiod_get_index);
6392cca4 4535
29a1f233
TR
4536/**
4537 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
4538 * function
4539 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4540 * @con_id: function within the GPIO consumer
4541 * @index: index of the GPIO to obtain in the consumer
39b2bbe3 4542 * @flags: optional GPIO initialization flags
29a1f233
TR
4543 *
4544 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
4545 * specified index was assigned to the requested function it will return NULL.
4546 * This is convenient for drivers that need to handle optional GPIOs.
94bd9ce1
AS
4547 *
4548 * Returns:
4549 * A valid GPIO descriptor, NULL if no GPIO has been assigned to the
4550 * requested function and/or index, or another IS_ERR() code if an error
4551 * occurred while trying to acquire the GPIO.
29a1f233 4552 */
b17d1bf1 4553struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
29a1f233 4554 const char *con_id,
39b2bbe3
AC
4555 unsigned int index,
4556 enum gpiod_flags flags)
29a1f233
TR
4557{
4558 struct gpio_desc *desc;
4559
39b2bbe3 4560 desc = gpiod_get_index(dev, con_id, index, flags);
7b58696d
AS
4561 if (gpiod_not_found(desc))
4562 return NULL;
29a1f233
TR
4563
4564 return desc;
4565}
b17d1bf1 4566EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
29a1f233 4567
f625d460
BP
4568/**
4569 * gpiod_hog - Hog the specified GPIO desc given the provided flags
4570 * @desc: gpio whose value will be assigned
4571 * @name: gpio line name
fed7026a
AS
4572 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4573 * of_find_gpio() or of_get_gpio_hog()
f625d460 4574 * @dflags: gpiod_flags - optional GPIO initialization flags
94bd9ce1
AS
4575 *
4576 * Returns:
4577 * 0 on success, or negative errno on failure.
f625d460
BP
4578 */
4579int gpiod_hog(struct gpio_desc *desc, const char *name,
4580 unsigned long lflags, enum gpiod_flags dflags)
4581{
815a1b5a 4582 struct gpio_device *gdev = desc->gdev;
f625d460
BP
4583 struct gpio_desc *local_desc;
4584 int hwnum;
d377f56f 4585 int ret;
f625d460 4586
815a1b5a
BG
4587 CLASS(gpio_chip_guard, guard)(desc);
4588 if (!guard.gc)
4589 return -ENODEV;
4590
2559f2e0
BG
4591 if (test_and_set_bit(FLAG_IS_HOGGED, &desc->flags))
4592 return 0;
4593
f625d460
BP
4594 hwnum = gpio_chip_hwgpio(desc);
4595
815a1b5a 4596 local_desc = gpiochip_request_own_desc(guard.gc, hwnum, name,
5923ea6c 4597 lflags, dflags);
f625d460 4598 if (IS_ERR(local_desc)) {
2559f2e0 4599 clear_bit(FLAG_IS_HOGGED, &desc->flags);
d377f56f 4600 ret = PTR_ERR(local_desc);
c31a571d 4601 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
815a1b5a 4602 name, gdev->label, hwnum, ret);
d377f56f 4603 return ret;
f625d460
BP
4604 }
4605
be6736cc 4606 gpiod_dbg(desc, "hogged as %s%s\n",
b27f300f
BG
4607 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
4608 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
4609 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
f625d460
BP
4610
4611 return 0;
4612}
4613
4614/**
4615 * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
a0b66a73 4616 * @gc: gpio chip to act on
f625d460 4617 */
a0b66a73 4618static void gpiochip_free_hogs(struct gpio_chip *gc)
f625d460 4619{
80c78fbe 4620 struct gpio_desc *desc;
f625d460 4621
57017edd 4622 for_each_gpio_desc_with_flag(gc, desc, FLAG_IS_HOGGED)
80c78fbe 4623 gpiochip_free_own_desc(desc);
f625d460
BP
4624}
4625
66858527
RI
4626/**
4627 * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
4628 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4629 * @con_id: function within the GPIO consumer
4630 * @flags: optional GPIO initialization flags
4631 *
4632 * This function acquires all the GPIOs defined under a given function.
4633 *
94bd9ce1
AS
4634 * Returns:
4635 * The GPIO descriptors corresponding to the function @con_id of device
4636 * dev, -ENOENT if no GPIO has been assigned to the requested function,
4637 * or another IS_ERR() code if an error occurred while trying to acquire
4638 * the GPIOs.
66858527
RI
4639 */
4640struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
4641 const char *con_id,
4642 enum gpiod_flags flags)
4643{
4644 struct gpio_desc *desc;
4645 struct gpio_descs *descs;
bf9346f5 4646 struct gpio_array *array_info = NULL;
a0b66a73 4647 struct gpio_chip *gc;
bf9346f5 4648 int count, bitmap_size;
79736429 4649 size_t descs_size;
66858527
RI
4650
4651 count = gpiod_count(dev, con_id);
4652 if (count < 0)
4653 return ERR_PTR(count);
4654
79736429
AS
4655 descs_size = struct_size(descs, desc, count);
4656 descs = kzalloc(descs_size, GFP_KERNEL);
66858527
RI
4657 if (!descs)
4658 return ERR_PTR(-ENOMEM);
4659
4ea0c977 4660 for (descs->ndescs = 0; descs->ndescs < count; descs->ndescs++) {
66858527
RI
4661 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
4662 if (IS_ERR(desc)) {
4663 gpiod_put_array(descs);
4664 return ERR_CAST(desc);
4665 }
bf9346f5 4666
66858527 4667 descs->desc[descs->ndescs] = desc;
bf9346f5 4668
a0b66a73 4669 gc = gpiod_to_chip(desc);
bf9346f5 4670 /*
c4c958aa
JK
4671 * If pin hardware number of array member 0 is also 0, select
4672 * its chip as a candidate for fast bitmap processing path.
bf9346f5 4673 */
c4c958aa 4674 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
bf9346f5
JK
4675 struct gpio_descs *array;
4676
a0b66a73
LW
4677 bitmap_size = BITS_TO_LONGS(gc->ngpio > count ?
4678 gc->ngpio : count);
bf9346f5 4679
79736429
AS
4680 array = krealloc(descs, descs_size +
4681 struct_size(array_info, invert_mask, 3 * bitmap_size),
4682 GFP_KERNEL | __GFP_ZERO);
bf9346f5
JK
4683 if (!array) {
4684 gpiod_put_array(descs);
4685 return ERR_PTR(-ENOMEM);
4686 }
4687
bf9346f5 4688 descs = array;
79736429
AS
4689
4690 array_info = (void *)descs + descs_size;
bf9346f5
JK
4691 array_info->get_mask = array_info->invert_mask +
4692 bitmap_size;
4693 array_info->set_mask = array_info->get_mask +
4694 bitmap_size;
4695
4696 array_info->desc = descs->desc;
4697 array_info->size = count;
a0b66a73 4698 array_info->chip = gc;
bf9346f5
JK
4699 bitmap_set(array_info->get_mask, descs->ndescs,
4700 count - descs->ndescs);
4701 bitmap_set(array_info->set_mask, descs->ndescs,
4702 count - descs->ndescs);
4703 descs->info = array_info;
4704 }
4ea0c977
AS
4705
4706 /* If there is no cache for fast bitmap processing path, continue */
4707 if (!array_info)
4708 continue;
4709
c4c958aa 4710 /* Unmark array members which don't belong to the 'fast' chip */
4ea0c977 4711 if (array_info->chip != gc) {
bf9346f5
JK
4712 __clear_bit(descs->ndescs, array_info->get_mask);
4713 __clear_bit(descs->ndescs, array_info->set_mask);
c4c958aa
JK
4714 }
4715 /*
4716 * Detect array members which belong to the 'fast' chip
4717 * but their pins are not in hardware order.
4718 */
4ea0c977 4719 else if (gpio_chip_hwgpio(desc) != descs->ndescs) {
c4c958aa
JK
4720 /*
4721 * Don't use fast path if all array members processed so
4722 * far belong to the same chip as this one but its pin
4723 * hardware number is different from its array index.
4724 */
4725 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
4726 array_info = NULL;
4727 } else {
4728 __clear_bit(descs->ndescs,
4729 array_info->get_mask);
4730 __clear_bit(descs->ndescs,
4731 array_info->set_mask);
4732 }
4ea0c977 4733 } else {
bf9346f5 4734 /* Exclude open drain or open source from fast output */
a0b66a73
LW
4735 if (gpiochip_line_is_open_drain(gc, descs->ndescs) ||
4736 gpiochip_line_is_open_source(gc, descs->ndescs))
bf9346f5
JK
4737 __clear_bit(descs->ndescs,
4738 array_info->set_mask);
4739 /* Identify 'fast' pins which require invertion */
4740 if (gpiod_is_active_low(desc))
4741 __set_bit(descs->ndescs,
4742 array_info->invert_mask);
4743 }
66858527 4744 }
bf9346f5
JK
4745 if (array_info)
4746 dev_dbg(dev,
4747 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
4748 array_info->chip->label, array_info->size,
4749 *array_info->get_mask, *array_info->set_mask,
4750 *array_info->invert_mask);
66858527
RI
4751 return descs;
4752}
4753EXPORT_SYMBOL_GPL(gpiod_get_array);
4754
4755/**
4756 * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
4757 * function
4758 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4759 * @con_id: function within the GPIO consumer
4760 * @flags: optional GPIO initialization flags
4761 *
4762 * This is equivalent to gpiod_get_array(), except that when no GPIO was
4763 * assigned to the requested function it will return NULL.
94bd9ce1
AS
4764 *
4765 * Returns:
4766 * The GPIO descriptors corresponding to the function @con_id of device
4767 * dev, NULL if no GPIO has been assigned to the requested function,
4768 * or another IS_ERR() code if an error occurred while trying to acquire
4769 * the GPIOs.
66858527
RI
4770 */
4771struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
4772 const char *con_id,
4773 enum gpiod_flags flags)
4774{
4775 struct gpio_descs *descs;
4776
4777 descs = gpiod_get_array(dev, con_id, flags);
7b58696d 4778 if (gpiod_not_found(descs))
66858527
RI
4779 return NULL;
4780
4781 return descs;
4782}
4783EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
4784
bae48da2
AC
4785/**
4786 * gpiod_put - dispose of a GPIO descriptor
4787 * @desc: GPIO descriptor to dispose of
4788 *
4789 * No descriptor can be used after gpiod_put() has been called on it.
4790 */
4791void gpiod_put(struct gpio_desc *desc)
4792{
1d7765ba
AS
4793 if (desc)
4794 gpiod_free(desc);
372e722e 4795}
bae48da2 4796EXPORT_SYMBOL_GPL(gpiod_put);
d2876d08 4797
66858527
RI
4798/**
4799 * gpiod_put_array - dispose of multiple GPIO descriptors
4800 * @descs: struct gpio_descs containing an array of descriptors
4801 */
4802void gpiod_put_array(struct gpio_descs *descs)
4803{
4804 unsigned int i;
4805
4806 for (i = 0; i < descs->ndescs; i++)
4807 gpiod_put(descs->desc[i]);
4808
4809 kfree(descs);
4810}
4811EXPORT_SYMBOL_GPL(gpiod_put_array);
4812
4731210c
SK
4813static int gpio_stub_drv_probe(struct device *dev)
4814{
4815 /*
4816 * The DT node of some GPIO chips have a "compatible" property, but
4817 * never have a struct device added and probed by a driver to register
4818 * the GPIO chip with gpiolib. In such cases, fw_devlink=on will cause
4819 * the consumers of the GPIO chip to get probe deferred forever because
4820 * they will be waiting for a device associated with the GPIO chip
4821 * firmware node to get added and bound to a driver.
4822 *
4823 * To allow these consumers to probe, we associate the struct
4824 * gpio_device of the GPIO chip with the firmware node and then simply
4825 * bind it to this stub driver.
4826 */
4827 return 0;
4828}
4829
4830static struct device_driver gpio_stub_drv = {
4831 .name = "gpio_stub_drv",
4832 .bus = &gpio_bus_type,
4833 .probe = gpio_stub_drv_probe,
4834};
4835
3c702e99
LW
4836static int __init gpiolib_dev_init(void)
4837{
4838 int ret;
4839
4840 /* Register GPIO sysfs bus */
b1911710 4841 ret = bus_register(&gpio_bus_type);
3c702e99
LW
4842 if (ret < 0) {
4843 pr_err("gpiolib: could not register GPIO bus type\n");
4844 return ret;
4845 }
4846
3875721e
WY
4847 ret = driver_register(&gpio_stub_drv);
4848 if (ret < 0) {
4731210c
SK
4849 pr_err("gpiolib: could not register GPIO stub driver\n");
4850 bus_unregister(&gpio_bus_type);
4851 return ret;
4852 }
4853
ddd8891e 4854 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME);
3c702e99
LW
4855 if (ret < 0) {
4856 pr_err("gpiolib: failed to allocate char dev region\n");
4731210c 4857 driver_unregister(&gpio_stub_drv);
3c702e99 4858 bus_unregister(&gpio_bus_type);
63636d95 4859 return ret;
3c702e99 4860 }
63636d95
GU
4861
4862 gpiolib_initialized = true;
4863 gpiochip_setup_devs();
4864
8650b609
DG
4865#if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO)
4866 WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier));
4867#endif /* CONFIG_OF_DYNAMIC && CONFIG_OF_GPIO */
63636d95 4868
3c702e99
LW
4869 return ret;
4870}
4871core_initcall(gpiolib_dev_init);
4872
d2876d08
DB
4873#ifdef CONFIG_DEBUG_FS
4874
fdeb8e15 4875static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
d2876d08 4876{
0338f6a6
BG
4877 bool active_low, is_irq, is_out;
4878 unsigned int gpio = gdev->base;
4879 struct gpio_desc *desc;
d83cee3d 4880 struct gpio_chip *gc;
0338f6a6 4881 int value;
d2876d08 4882
d83cee3d
BG
4883 guard(srcu)(&gdev->srcu);
4884
d82b9e08 4885 gc = srcu_dereference(gdev->chip, &gdev->srcu);
d83cee3d
BG
4886 if (!gc) {
4887 seq_puts(s, "Underlying GPIO chip is gone\n");
4888 return;
4889 }
4890
3de69ae1 4891 for_each_gpio_desc(gc, desc) {
7765ffed 4892 guard(srcu)(&desc->gdev->desc_srcu);
54a687cd
AS
4893 is_irq = test_bit(FLAG_USED_AS_IRQ, &desc->flags);
4894 if (is_irq || test_bit(FLAG_REQUESTED, &desc->flags)) {
3de69ae1
AS
4895 gpiod_get_direction(desc);
4896 is_out = test_bit(FLAG_IS_OUT, &desc->flags);
234c5209 4897 value = gpio_chip_get_value(gc, desc);
3de69ae1 4898 active_low = test_bit(FLAG_ACTIVE_LOW, &desc->flags);
8a7a6103 4899 seq_printf(s, " gpio-%-3u (%-20.20s|%-20.20s) %s %s %s%s\n",
d23dc4a9 4900 gpio, desc->name ?: "", gpiod_get_label(desc),
3de69ae1
AS
4901 is_out ? "out" : "in ",
4902 value >= 0 ? (value ? "hi" : "lo") : "? ",
4903 is_irq ? "IRQ " : "",
4904 active_low ? "ACTIVE LOW" : "");
4905 } else if (desc->name) {
8a7a6103 4906 seq_printf(s, " gpio-%-3u (%-20.20s)\n", gpio, desc->name);
ced433e2 4907 }
d2876d08 4908
3de69ae1 4909 gpio++;
d2876d08
DB
4910 }
4911}
4912
e348544f
BG
4913struct gpiolib_seq_priv {
4914 bool newline;
4915 int idx;
4916};
4917
f9c4a31f 4918static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
d2876d08 4919{
e348544f
BG
4920 struct gpiolib_seq_priv *priv;
4921 struct gpio_device *gdev;
cb1650d4 4922 loff_t index = *pos;
d2876d08 4923
e348544f
BG
4924 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
4925 if (!priv)
4926 return NULL;
4927
4928 s->private = priv;
4929 priv->idx = srcu_read_lock(&gpio_devices_srcu);
d2876d08 4930
e348544f
BG
4931 list_for_each_entry_srcu(gdev, &gpio_devices, list,
4932 srcu_read_lock_held(&gpio_devices_srcu)) {
4933 if (index-- == 0)
ff2b1359 4934 return gdev;
e348544f 4935 }
f9c4a31f 4936
cb1650d4 4937 return NULL;
f9c4a31f
TR
4938}
4939
4940static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
4941{
e348544f
BG
4942 struct gpiolib_seq_priv *priv = s->private;
4943 struct gpio_device *gdev = v, *next;
f9c4a31f 4944
e348544f
BG
4945 next = list_entry_rcu(gdev->list.next, struct gpio_device, list);
4946 gdev = &next->list == &gpio_devices ? NULL : next;
4947 priv->newline = true;
f9c4a31f
TR
4948 ++*pos;
4949
e348544f 4950 return gdev;
f9c4a31f
TR
4951}
4952
4953static void gpiolib_seq_stop(struct seq_file *s, void *v)
4954{
e348544f
BG
4955 struct gpiolib_seq_priv *priv = s->private;
4956
4957 srcu_read_unlock(&gpio_devices_srcu, priv->idx);
4958 kfree(priv);
f9c4a31f
TR
4959}
4960
4961static int gpiolib_seq_show(struct seq_file *s, void *v)
4962{
e348544f 4963 struct gpiolib_seq_priv *priv = s->private;
ff2b1359 4964 struct gpio_device *gdev = v;
d83cee3d 4965 struct gpio_chip *gc;
ff2b1359
LW
4966 struct device *parent;
4967
d83cee3d
BG
4968 guard(srcu)(&gdev->srcu);
4969
d82b9e08 4970 gc = srcu_dereference(gdev->chip, &gdev->srcu);
a0b66a73 4971 if (!gc) {
e348544f
BG
4972 seq_printf(s, "%s%s: (dangling chip)",
4973 priv->newline ? "\n" : "",
ff2b1359
LW
4974 dev_name(&gdev->dev));
4975 return 0;
4976 }
f9c4a31f 4977
8a7a6103 4978 seq_printf(s, "%s%s: GPIOs %u-%u", priv->newline ? "\n" : "",
ff2b1359 4979 dev_name(&gdev->dev),
fdeb8e15 4980 gdev->base, gdev->base + gdev->ngpio - 1);
a0b66a73 4981 parent = gc->parent;
ff2b1359
LW
4982 if (parent)
4983 seq_printf(s, ", parent: %s/%s",
4984 parent->bus ? parent->bus->name : "no-bus",
4985 dev_name(parent));
a0b66a73
LW
4986 if (gc->label)
4987 seq_printf(s, ", %s", gc->label);
4988 if (gc->can_sleep)
f9c4a31f
TR
4989 seq_printf(s, ", can sleep");
4990 seq_printf(s, ":\n");
4991
a0b66a73
LW
4992 if (gc->dbg_show)
4993 gc->dbg_show(s, gc);
f9c4a31f 4994 else
fdeb8e15 4995 gpiolib_dbg_show(s, gdev);
f9c4a31f 4996
d2876d08
DB
4997 return 0;
4998}
4999
425c5b3e 5000static const struct seq_operations gpiolib_sops = {
f9c4a31f
TR
5001 .start = gpiolib_seq_start,
5002 .next = gpiolib_seq_next,
5003 .stop = gpiolib_seq_stop,
5004 .show = gpiolib_seq_show,
5005};
425c5b3e 5006DEFINE_SEQ_ATTRIBUTE(gpiolib);
d2876d08
DB
5007
5008static int __init gpiolib_debugfs_init(void)
5009{
5010 /* /sys/kernel/debug/gpio */
425c5b3e 5011 debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops);
d2876d08
DB
5012 return 0;
5013}
5014subsys_initcall(gpiolib_debugfs_init);
5015
5016#endif /* DEBUG_FS */