Merge tag 'intel-gpio-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/andy...
[linux-2.6-block.git] / drivers / gpio / gpiolib.c
CommitLineData
dae5f0af 1// SPDX-License-Identifier: GPL-2.0
923a654c 2#include <linux/bitmap.h>
d2876d08
DB
3#include <linux/kernel.h>
4#include <linux/module.h>
ff77c352 5#include <linux/interrupt.h>
d2876d08
DB
6#include <linux/irq.h>
7#include <linux/spinlock.h>
1a989d0f 8#include <linux/list.h>
d8f388d8
DB
9#include <linux/device.h>
10#include <linux/err.h>
11#include <linux/debugfs.h>
12#include <linux/seq_file.h>
13#include <linux/gpio.h>
ff77c352 14#include <linux/idr.h>
5a0e3ad6 15#include <linux/slab.h>
7b199811 16#include <linux/acpi.h>
53e7cac3 17#include <linux/gpio/driver.h>
0a6d3158 18#include <linux/gpio/machine.h>
c771c2f4 19#include <linux/pinctrl/consumer.h>
3c702e99
LW
20#include <linux/cdev.h>
21#include <linux/fs.h>
22#include <linux/uaccess.h>
8b92e17e 23#include <linux/compat.h>
d7c51b47 24#include <linux/anon_inodes.h>
953b956a 25#include <linux/file.h>
61f922db
LW
26#include <linux/kfifo.h>
27#include <linux/poll.h>
28#include <linux/timekeeping.h>
3c702e99 29#include <uapi/linux/gpio.h>
d2876d08 30
664e3e5a 31#include "gpiolib.h"
f626d6df 32#include "gpiolib-of.h"
77cb907a 33#include "gpiolib-acpi.h"
664e3e5a 34
3f397c21
UKK
35#define CREATE_TRACE_POINTS
36#include <trace/events/gpio.h>
d2876d08 37
79a9becd 38/* Implementation infrastructure for GPIO interfaces.
d2876d08 39 *
79a9becd
AC
40 * The GPIO programming interface allows for inlining speed-critical
41 * get/set operations for common cases, so that access to SOC-integrated
42 * GPIOs can sometimes cost only an instruction or two per bit.
d2876d08
DB
43 */
44
45
46/* When debugging, extend minimal trust to callers and platform code.
47 * Also emit diagnostic messages that may help initial bringup, when
48 * board setup or driver bugs are most common.
49 *
50 * Otherwise, minimize overhead in what may be bitbanging codepaths.
51 */
52#ifdef DEBUG
53#define extra_checks 1
54#else
55#define extra_checks 0
56#endif
57
ff2b1359
LW
58/* Device and char device-related information */
59static DEFINE_IDA(gpio_ida);
3c702e99
LW
60static dev_t gpio_devt;
61#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
62static struct bus_type gpio_bus_type = {
63 .name = "gpio",
64};
ff2b1359 65
3027743f
LA
66/*
67 * Number of GPIOs to use for the fast path in set array
68 */
69#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
70
d2876d08
DB
71/* gpio_lock prevents conflicts during gpio_desc[] table updates.
72 * While any GPIO is requested, its gpio_chip is not removable;
73 * each GPIO's "requested" flag serves as a lock and refcount.
74 */
0eb4c6c2 75DEFINE_SPINLOCK(gpio_lock);
d2876d08 76
bae48da2
AC
77static DEFINE_MUTEX(gpio_lookup_lock);
78static LIST_HEAD(gpio_lookup_list);
ff2b1359 79LIST_HEAD(gpio_devices);
6d86750c 80
a411e81e
BG
81static DEFINE_MUTEX(gpio_machine_hogs_mutex);
82static LIST_HEAD(gpio_machine_hogs);
83
a0b66a73
LW
84static void gpiochip_free_hogs(struct gpio_chip *gc);
85static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
86 struct lock_class_key *lock_key,
87 struct lock_class_key *request_key);
a0b66a73
LW
88static void gpiochip_irqchip_remove(struct gpio_chip *gc);
89static int gpiochip_irqchip_init_hw(struct gpio_chip *gc);
90static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc);
91static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc);
6d86750c 92
159f3cd9 93static bool gpiolib_initialized;
6d86750c 94
d2876d08
DB
95static inline void desc_set_label(struct gpio_desc *d, const char *label)
96{
d2876d08 97 d->label = label;
d2876d08
DB
98}
99
372e722e 100/**
950d55f5
TR
101 * gpio_to_desc - Convert a GPIO number to its descriptor
102 * @gpio: global GPIO number
103 *
104 * Returns:
105 * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
106 * with the given number exists in the system.
372e722e 107 */
79a9becd 108struct gpio_desc *gpio_to_desc(unsigned gpio)
372e722e 109{
ff2b1359 110 struct gpio_device *gdev;
14e85c0e
AC
111 unsigned long flags;
112
113 spin_lock_irqsave(&gpio_lock, flags);
114
ff2b1359 115 list_for_each_entry(gdev, &gpio_devices, list) {
fdeb8e15
LW
116 if (gdev->base <= gpio &&
117 gdev->base + gdev->ngpio > gpio) {
14e85c0e 118 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 119 return &gdev->descs[gpio - gdev->base];
14e85c0e
AC
120 }
121 }
122
123 spin_unlock_irqrestore(&gpio_lock, flags);
124
0e9a5edf
AC
125 if (!gpio_is_valid(gpio))
126 WARN(1, "invalid GPIO %d\n", gpio);
127
14e85c0e 128 return NULL;
372e722e 129}
79a9becd 130EXPORT_SYMBOL_GPL(gpio_to_desc);
372e722e 131
d468bf9e 132/**
950d55f5
TR
133 * gpiochip_get_desc - get the GPIO descriptor corresponding to the given
134 * hardware number for this chip
a0b66a73 135 * @gc: GPIO chip
950d55f5
TR
136 * @hwnum: hardware number of the GPIO for this chip
137 *
138 * Returns:
35c6cfb4 139 * A pointer to the GPIO descriptor or ``ERR_PTR(-EINVAL)`` if no GPIO exists
950d55f5 140 * in the given chip for the specified hardware number.
d468bf9e 141 */
a0b66a73 142struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc,
06863620 143 unsigned int hwnum)
d468bf9e 144{
a0b66a73 145 struct gpio_device *gdev = gc->gpiodev;
fdeb8e15
LW
146
147 if (hwnum >= gdev->ngpio)
b7d0a28a 148 return ERR_PTR(-EINVAL);
d468bf9e 149
fdeb8e15 150 return &gdev->descs[hwnum];
d468bf9e 151}
97795420 152EXPORT_SYMBOL_GPL(gpiochip_get_desc);
372e722e
AC
153
154/**
950d55f5
TR
155 * desc_to_gpio - convert a GPIO descriptor to the integer namespace
156 * @desc: GPIO descriptor
157 *
372e722e 158 * This should disappear in the future but is needed since we still
950d55f5
TR
159 * use GPIO numbers for error messages and sysfs nodes.
160 *
161 * Returns:
162 * The global GPIO number for the GPIO specified by its descriptor.
372e722e 163 */
79a9becd 164int desc_to_gpio(const struct gpio_desc *desc)
372e722e 165{
fdeb8e15 166 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
372e722e 167}
79a9becd 168EXPORT_SYMBOL_GPL(desc_to_gpio);
372e722e
AC
169
170
79a9becd
AC
171/**
172 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
173 * @desc: descriptor to return the chip of
174 */
175struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
372e722e 176{
dd3b9a44 177 if (!desc || !desc->gdev)
fdeb8e15
LW
178 return NULL;
179 return desc->gdev->chip;
372e722e 180}
79a9becd 181EXPORT_SYMBOL_GPL(gpiod_to_chip);
d2876d08 182
8d0aab2f
AV
183/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
184static int gpiochip_find_base(int ngpio)
185{
ff2b1359 186 struct gpio_device *gdev;
83cabe33 187 int base = ARCH_NR_GPIOS - ngpio;
8d0aab2f 188
ff2b1359 189 list_for_each_entry_reverse(gdev, &gpio_devices, list) {
83cabe33 190 /* found a free space? */
fdeb8e15 191 if (gdev->base + gdev->ngpio <= base)
83cabe33
AC
192 break;
193 else
194 /* nope, check the space right before the chip */
fdeb8e15 195 base = gdev->base - ngpio;
8d0aab2f
AV
196 }
197
83cabe33 198 if (gpio_is_valid(base)) {
8d0aab2f 199 pr_debug("%s: found new base at %d\n", __func__, base);
83cabe33
AC
200 return base;
201 } else {
202 pr_err("%s: cannot find free range\n", __func__);
203 return -ENOSPC;
169b6a7a 204 }
169b6a7a
AV
205}
206
79a9becd
AC
207/**
208 * gpiod_get_direction - return the current direction of a GPIO
209 * @desc: GPIO to get the direction of
210 *
94fc7309 211 * Returns 0 for output, 1 for input, or an error code in case of error.
79a9becd
AC
212 *
213 * This function may sleep if gpiod_cansleep() is true.
214 */
8e53b0f1 215int gpiod_get_direction(struct gpio_desc *desc)
80b0a602 216{
a0b66a73 217 struct gpio_chip *gc;
d0121b85 218 unsigned offset;
d377f56f 219 int ret;
80b0a602 220
a0b66a73 221 gc = gpiod_to_chip(desc);
372e722e 222 offset = gpio_chip_hwgpio(desc);
80b0a602 223
256efaea
RK
224 /*
225 * Open drain emulation using input mode may incorrectly report
226 * input here, fix that up.
227 */
228 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) &&
229 test_bit(FLAG_IS_OUT, &desc->flags))
230 return 0;
231
a0b66a73 232 if (!gc->get_direction)
d0121b85 233 return -ENOTSUPP;
80b0a602 234
a0b66a73 235 ret = gc->get_direction(gc, offset);
4fc5bfeb
AS
236 if (ret < 0)
237 return ret;
238
239 /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */
240 if (ret > 0)
d377f56f 241 ret = 1;
4fc5bfeb
AS
242
243 assign_bit(FLAG_IS_OUT, &desc->flags, !ret);
244
d377f56f 245 return ret;
80b0a602 246}
79a9becd 247EXPORT_SYMBOL_GPL(gpiod_get_direction);
80b0a602 248
1a989d0f
AC
249/*
250 * Add a new chip to the global chips list, keeping the list of chips sorted
ef7c7553 251 * by range(means [base, base + ngpio - 1]) order.
1a989d0f
AC
252 *
253 * Return -EBUSY if the new chip overlaps with some other chip's integer
254 * space.
255 */
ff2b1359 256static int gpiodev_add_to_list(struct gpio_device *gdev)
1a989d0f 257{
a961f9b4 258 struct gpio_device *prev, *next;
1a989d0f 259
ff2b1359 260 if (list_empty(&gpio_devices)) {
a961f9b4 261 /* initial entry in list */
ff2b1359 262 list_add_tail(&gdev->list, &gpio_devices);
e28ecca6 263 return 0;
1a989d0f
AC
264 }
265
a961f9b4
BJZ
266 next = list_entry(gpio_devices.next, struct gpio_device, list);
267 if (gdev->base + gdev->ngpio <= next->base) {
268 /* add before first entry */
269 list_add(&gdev->list, &gpio_devices);
270 return 0;
1a989d0f
AC
271 }
272
a961f9b4
BJZ
273 prev = list_entry(gpio_devices.prev, struct gpio_device, list);
274 if (prev->base + prev->ngpio <= gdev->base) {
275 /* add behind last entry */
276 list_add_tail(&gdev->list, &gpio_devices);
96098df1 277 return 0;
1a989d0f
AC
278 }
279
a961f9b4
BJZ
280 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
281 /* at the end of the list */
282 if (&next->list == &gpio_devices)
283 break;
1a989d0f 284
a961f9b4
BJZ
285 /* add between prev and next */
286 if (prev->base + prev->ngpio <= gdev->base
287 && gdev->base + gdev->ngpio <= next->base) {
288 list_add(&gdev->list, &prev->list);
289 return 0;
290 }
291 }
292
293 dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n");
294 return -EBUSY;
1a989d0f
AC
295}
296
950d55f5 297/*
f881bab0
LW
298 * Convert a GPIO name to its descriptor
299 */
300static struct gpio_desc *gpio_name_to_desc(const char * const name)
301{
ff2b1359 302 struct gpio_device *gdev;
f881bab0
LW
303 unsigned long flags;
304
ee203bbd
MM
305 if (!name)
306 return NULL;
307
f881bab0
LW
308 spin_lock_irqsave(&gpio_lock, flags);
309
ff2b1359 310 list_for_each_entry(gdev, &gpio_devices, list) {
f881bab0
LW
311 int i;
312
fdeb8e15
LW
313 for (i = 0; i != gdev->ngpio; ++i) {
314 struct gpio_desc *desc = &gdev->descs[i];
f881bab0 315
ee203bbd 316 if (!desc->name)
f881bab0
LW
317 continue;
318
fdeb8e15 319 if (!strcmp(desc->name, name)) {
f881bab0 320 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 321 return desc;
f881bab0
LW
322 }
323 }
324 }
325
326 spin_unlock_irqrestore(&gpio_lock, flags);
327
328 return NULL;
329}
330
5f3ca732
MP
331/*
332 * Takes the names from gc->names and checks if they are all unique. If they
333 * are, they are assigned to their gpio descriptors.
334 *
ed37915c 335 * Warning if one of the names is already used for a different GPIO.
5f3ca732
MP
336 */
337static int gpiochip_set_desc_names(struct gpio_chip *gc)
338{
fdeb8e15 339 struct gpio_device *gdev = gc->gpiodev;
5f3ca732
MP
340 int i;
341
342 if (!gc->names)
343 return 0;
344
345 /* First check all names if they are unique */
346 for (i = 0; i != gc->ngpio; ++i) {
347 struct gpio_desc *gpio;
348
349 gpio = gpio_name_to_desc(gc->names[i]);
f881bab0 350 if (gpio)
fdeb8e15 351 dev_warn(&gdev->dev,
34ffd85d 352 "Detected name collision for GPIO name '%s'\n",
f881bab0 353 gc->names[i]);
5f3ca732
MP
354 }
355
356 /* Then add all names to the GPIO descriptors */
357 for (i = 0; i != gc->ngpio; ++i)
fdeb8e15 358 gdev->descs[i].name = gc->names[i];
5f3ca732
MP
359
360 return 0;
361}
362
a0b66a73 363static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc)
e4371f6e
SB
364{
365 unsigned long *p;
366
a0b66a73 367 p = bitmap_alloc(gc->ngpio, GFP_KERNEL);
e4371f6e
SB
368 if (!p)
369 return NULL;
370
371 /* Assume by default all GPIOs are valid */
a0b66a73 372 bitmap_fill(p, gc->ngpio);
e4371f6e
SB
373
374 return p;
375}
376
f626d6df 377static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
726cb3ba 378{
eb1e8bd6 379 if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask))
726cb3ba
SB
380 return 0;
381
f626d6df
LW
382 gc->valid_mask = gpiochip_allocate_mask(gc);
383 if (!gc->valid_mask)
726cb3ba
SB
384 return -ENOMEM;
385
386 return 0;
387}
388
c9fc5aff 389static int gpiochip_init_valid_mask(struct gpio_chip *gc)
f8ec92a9 390{
c9fc5aff
LW
391 if (gc->init_valid_mask)
392 return gc->init_valid_mask(gc,
393 gc->valid_mask,
394 gc->ngpio);
f8ec92a9
RRD
395
396 return 0;
397}
398
a0b66a73 399static void gpiochip_free_valid_mask(struct gpio_chip *gc)
726cb3ba 400{
a0b66a73
LW
401 bitmap_free(gc->valid_mask);
402 gc->valid_mask = NULL;
726cb3ba
SB
403}
404
b056ca1c
AS
405static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
406{
407 if (gc->add_pin_ranges)
408 return gc->add_pin_ranges(gc);
409
410 return 0;
411}
412
a0b66a73 413bool gpiochip_line_is_valid(const struct gpio_chip *gc,
726cb3ba
SB
414 unsigned int offset)
415{
416 /* No mask means all valid */
a0b66a73 417 if (likely(!gc->valid_mask))
726cb3ba 418 return true;
a0b66a73 419 return test_bit(offset, gc->valid_mask);
726cb3ba
SB
420}
421EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
422
d7c51b47
LW
423/*
424 * GPIO line handle management
425 */
426
427/**
428 * struct linehandle_state - contains the state of a userspace handle
429 * @gdev: the GPIO device the handle pertains to
430 * @label: consumer label used to tag descriptors
431 * @descs: the GPIO descriptors held by this handle
432 * @numdescs: the number of descriptors held in the descs array
433 */
434struct linehandle_state {
435 struct gpio_device *gdev;
436 const char *label;
437 struct gpio_desc *descs[GPIOHANDLES_MAX];
438 u32 numdescs;
439};
440
e3e847c7
LPC
441#define GPIOHANDLE_REQUEST_VALID_FLAGS \
442 (GPIOHANDLE_REQUEST_INPUT | \
443 GPIOHANDLE_REQUEST_OUTPUT | \
444 GPIOHANDLE_REQUEST_ACTIVE_LOW | \
9225d516
DF
445 GPIOHANDLE_REQUEST_BIAS_PULL_UP | \
446 GPIOHANDLE_REQUEST_BIAS_PULL_DOWN | \
2148ad77 447 GPIOHANDLE_REQUEST_BIAS_DISABLE | \
e3e847c7
LPC
448 GPIOHANDLE_REQUEST_OPEN_DRAIN | \
449 GPIOHANDLE_REQUEST_OPEN_SOURCE)
450
b043ed7e
KG
451static int linehandle_validate_flags(u32 flags)
452{
453 /* Return an error if an unknown flag is set */
454 if (flags & ~GPIOHANDLE_REQUEST_VALID_FLAGS)
455 return -EINVAL;
456
457 /*
458 * Do not allow both INPUT & OUTPUT flags to be set as they are
459 * contradictory.
460 */
461 if ((flags & GPIOHANDLE_REQUEST_INPUT) &&
462 (flags & GPIOHANDLE_REQUEST_OUTPUT))
463 return -EINVAL;
464
465 /*
466 * Do not allow OPEN_SOURCE & OPEN_DRAIN flags in a single request. If
467 * the hardware actually supports enabling both at the same time the
468 * electrical result would be disastrous.
469 */
470 if ((flags & GPIOHANDLE_REQUEST_OPEN_DRAIN) &&
471 (flags & GPIOHANDLE_REQUEST_OPEN_SOURCE))
472 return -EINVAL;
473
474 /* OPEN_DRAIN and OPEN_SOURCE flags only make sense for output mode. */
475 if (!(flags & GPIOHANDLE_REQUEST_OUTPUT) &&
476 ((flags & GPIOHANDLE_REQUEST_OPEN_DRAIN) ||
477 (flags & GPIOHANDLE_REQUEST_OPEN_SOURCE)))
478 return -EINVAL;
479
480 /* Bias flags only allowed for input or output mode. */
481 if (!((flags & GPIOHANDLE_REQUEST_INPUT) ||
482 (flags & GPIOHANDLE_REQUEST_OUTPUT)) &&
483 ((flags & GPIOHANDLE_REQUEST_BIAS_DISABLE) ||
484 (flags & GPIOHANDLE_REQUEST_BIAS_PULL_UP) ||
485 (flags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)))
486 return -EINVAL;
487
488 /* Only one bias flag can be set. */
489 if (((flags & GPIOHANDLE_REQUEST_BIAS_DISABLE) &&
490 (flags & (GPIOHANDLE_REQUEST_BIAS_PULL_DOWN |
491 GPIOHANDLE_REQUEST_BIAS_PULL_UP))) ||
492 ((flags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) &&
493 (flags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)))
494 return -EINVAL;
495
496 return 0;
497}
498
e588bb1e
KG
499static long linehandle_set_config(struct linehandle_state *lh,
500 void __user *ip)
501{
502 struct gpiohandle_config gcnf;
503 struct gpio_desc *desc;
504 int i, ret;
505 u32 lflags;
506 unsigned long *flagsp;
507
508 if (copy_from_user(&gcnf, ip, sizeof(gcnf)))
509 return -EFAULT;
510
511 lflags = gcnf.flags;
512 ret = linehandle_validate_flags(lflags);
513 if (ret)
514 return ret;
515
516 for (i = 0; i < lh->numdescs; i++) {
517 desc = lh->descs[i];
518 flagsp = &desc->flags;
519
4fc5bfeb 520 assign_bit(FLAG_ACTIVE_LOW, flagsp,
e588bb1e
KG
521 lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW);
522
4fc5bfeb 523 assign_bit(FLAG_OPEN_DRAIN, flagsp,
e588bb1e
KG
524 lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN);
525
4fc5bfeb 526 assign_bit(FLAG_OPEN_SOURCE, flagsp,
e588bb1e
KG
527 lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE);
528
4fc5bfeb 529 assign_bit(FLAG_PULL_UP, flagsp,
e588bb1e
KG
530 lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP);
531
4fc5bfeb 532 assign_bit(FLAG_PULL_DOWN, flagsp,
e588bb1e
KG
533 lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN);
534
4fc5bfeb 535 assign_bit(FLAG_BIAS_DISABLE, flagsp,
e588bb1e
KG
536 lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE);
537
538 /*
539 * Lines have to be requested explicitly for input
540 * or output, else the line will be treated "as is".
541 */
542 if (lflags & GPIOHANDLE_REQUEST_OUTPUT) {
543 int val = !!gcnf.default_values[i];
544
545 ret = gpiod_direction_output(desc, val);
546 if (ret)
547 return ret;
548 } else if (lflags & GPIOHANDLE_REQUEST_INPUT) {
549 ret = gpiod_direction_input(desc);
550 if (ret)
551 return ret;
552 }
51c1064e
BG
553
554 atomic_notifier_call_chain(&desc->gdev->notifier,
555 GPIOLINE_CHANGED_CONFIG, desc);
e588bb1e
KG
556 }
557 return 0;
558}
559
d7c51b47
LW
560static long linehandle_ioctl(struct file *filep, unsigned int cmd,
561 unsigned long arg)
562{
563 struct linehandle_state *lh = filep->private_data;
564 void __user *ip = (void __user *)arg;
565 struct gpiohandle_data ghd;
b9762beb 566 DECLARE_BITMAP(vals, GPIOHANDLES_MAX);
d7c51b47
LW
567 int i;
568
569 if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) {
2b955b34 570 /* NOTE: It's ok to read values of output lines. */
eec1d566
LW
571 int ret = gpiod_get_array_value_complex(false,
572 true,
573 lh->numdescs,
574 lh->descs,
77588c14 575 NULL,
eec1d566
LW
576 vals);
577 if (ret)
578 return ret;
d7c51b47 579
3eded5d8 580 memset(&ghd, 0, sizeof(ghd));
eec1d566 581 for (i = 0; i < lh->numdescs; i++)
b9762beb 582 ghd.values[i] = test_bit(i, vals);
d7c51b47
LW
583
584 if (copy_to_user(ip, &ghd, sizeof(ghd)))
585 return -EFAULT;
586
587 return 0;
588 } else if (cmd == GPIOHANDLE_SET_LINE_VALUES_IOCTL) {
e5332d54
BG
589 /*
590 * All line descriptors were created at once with the same
591 * flags so just check if the first one is really output.
592 */
593 if (!test_bit(FLAG_IS_OUT, &lh->descs[0]->flags))
594 return -EPERM;
595
d7c51b47
LW
596 if (copy_from_user(&ghd, ip, sizeof(ghd)))
597 return -EFAULT;
598
599 /* Clamp all values to [0,1] */
600 for (i = 0; i < lh->numdescs; i++)
b9762beb 601 __assign_bit(i, vals, ghd.values[i]);
d7c51b47
LW
602
603 /* Reuse the array setting function */
3027743f 604 return gpiod_set_array_value_complex(false,
d7c51b47
LW
605 true,
606 lh->numdescs,
607 lh->descs,
77588c14 608 NULL,
d7c51b47 609 vals);
e588bb1e
KG
610 } else if (cmd == GPIOHANDLE_SET_CONFIG_IOCTL) {
611 return linehandle_set_config(lh, ip);
d7c51b47
LW
612 }
613 return -EINVAL;
614}
615
616#ifdef CONFIG_COMPAT
617static long linehandle_ioctl_compat(struct file *filep, unsigned int cmd,
618 unsigned long arg)
619{
620 return linehandle_ioctl(filep, cmd, (unsigned long)compat_ptr(arg));
621}
622#endif
623
624static int linehandle_release(struct inode *inode, struct file *filep)
625{
626 struct linehandle_state *lh = filep->private_data;
627 struct gpio_device *gdev = lh->gdev;
628 int i;
629
630 for (i = 0; i < lh->numdescs; i++)
631 gpiod_free(lh->descs[i]);
632 kfree(lh->label);
633 kfree(lh);
634 put_device(&gdev->dev);
635 return 0;
636}
637
638static const struct file_operations linehandle_fileops = {
639 .release = linehandle_release,
640 .owner = THIS_MODULE,
641 .llseek = noop_llseek,
642 .unlocked_ioctl = linehandle_ioctl,
643#ifdef CONFIG_COMPAT
644 .compat_ioctl = linehandle_ioctl_compat,
645#endif
646};
647
648static int linehandle_create(struct gpio_device *gdev, void __user *ip)
649{
650 struct gpiohandle_request handlereq;
651 struct linehandle_state *lh;
953b956a 652 struct file *file;
ab3dbcf7 653 int fd, i, count = 0, ret;
418ee8e9 654 u32 lflags;
d7c51b47
LW
655
656 if (copy_from_user(&handlereq, ip, sizeof(handlereq)))
657 return -EFAULT;
658 if ((handlereq.lines == 0) || (handlereq.lines > GPIOHANDLES_MAX))
659 return -EINVAL;
660
418ee8e9
BG
661 lflags = handlereq.flags;
662
b043ed7e
KG
663 ret = linehandle_validate_flags(lflags);
664 if (ret)
665 return ret;
2148ad77 666
d7c51b47
LW
667 lh = kzalloc(sizeof(*lh), GFP_KERNEL);
668 if (!lh)
669 return -ENOMEM;
670 lh->gdev = gdev;
671 get_device(&gdev->dev);
672
673 /* Make sure this is terminated */
674 handlereq.consumer_label[sizeof(handlereq.consumer_label)-1] = '\0';
675 if (strlen(handlereq.consumer_label)) {
676 lh->label = kstrdup(handlereq.consumer_label,
677 GFP_KERNEL);
678 if (!lh->label) {
679 ret = -ENOMEM;
680 goto out_free_lh;
681 }
682 }
683
684 /* Request each GPIO */
685 for (i = 0; i < handlereq.lines; i++) {
686 u32 offset = handlereq.lineoffsets[i];
0f41dabe 687 struct gpio_desc *desc = gpiochip_get_desc(gdev->chip, offset);
d7c51b47 688
0f41dabe
BG
689 if (IS_ERR(desc)) {
690 ret = PTR_ERR(desc);
e405f9fc
LPC
691 goto out_free_descs;
692 }
693
d7c51b47
LW
694 ret = gpiod_request(desc, lh->label);
695 if (ret)
696 goto out_free_descs;
697 lh->descs[i] = desc;
19a4fbff 698 count = i + 1;
d7c51b47
LW
699
700 if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW)
701 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
702 if (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN)
703 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
704 if (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE)
705 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
2148ad77
KG
706 if (lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE)
707 set_bit(FLAG_BIAS_DISABLE, &desc->flags);
9225d516
DF
708 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)
709 set_bit(FLAG_PULL_DOWN, &desc->flags);
710 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)
711 set_bit(FLAG_PULL_UP, &desc->flags);
d7c51b47 712
e10f72bf
AJ
713 ret = gpiod_set_transitory(desc, false);
714 if (ret < 0)
715 goto out_free_descs;
716
d7c51b47
LW
717 /*
718 * Lines have to be requested explicitly for input
719 * or output, else the line will be treated "as is".
720 */
721 if (lflags & GPIOHANDLE_REQUEST_OUTPUT) {
722 int val = !!handlereq.default_values[i];
723
724 ret = gpiod_direction_output(desc, val);
725 if (ret)
726 goto out_free_descs;
727 } else if (lflags & GPIOHANDLE_REQUEST_INPUT) {
728 ret = gpiod_direction_input(desc);
729 if (ret)
730 goto out_free_descs;
731 }
732 dev_dbg(&gdev->dev, "registered chardev handle for line %d\n",
733 offset);
734 }
e2f608be
LW
735 /* Let i point at the last handle */
736 i--;
d7c51b47
LW
737 lh->numdescs = handlereq.lines;
738
953b956a 739 fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);
d7c51b47
LW
740 if (fd < 0) {
741 ret = fd;
742 goto out_free_descs;
743 }
744
953b956a
LPC
745 file = anon_inode_getfile("gpio-linehandle",
746 &linehandle_fileops,
747 lh,
748 O_RDONLY | O_CLOEXEC);
749 if (IS_ERR(file)) {
750 ret = PTR_ERR(file);
751 goto out_put_unused_fd;
752 }
753
d7c51b47 754 handlereq.fd = fd;
d932cd49 755 if (copy_to_user(ip, &handlereq, sizeof(handlereq))) {
953b956a
LPC
756 /*
757 * fput() will trigger the release() callback, so do not go onto
758 * the regular error cleanup path here.
759 */
760 fput(file);
761 put_unused_fd(fd);
762 return -EFAULT;
d932cd49 763 }
d7c51b47 764
953b956a
LPC
765 fd_install(fd, file);
766
d7c51b47
LW
767 dev_dbg(&gdev->dev, "registered chardev handle for %d lines\n",
768 lh->numdescs);
769
770 return 0;
771
953b956a
LPC
772out_put_unused_fd:
773 put_unused_fd(fd);
d7c51b47 774out_free_descs:
ab3dbcf7 775 for (i = 0; i < count; i++)
d7c51b47
LW
776 gpiod_free(lh->descs[i]);
777 kfree(lh->label);
778out_free_lh:
779 kfree(lh);
780 put_device(&gdev->dev);
781 return ret;
782}
783
61f922db
LW
784/*
785 * GPIO line event management
786 */
787
788/**
789 * struct lineevent_state - contains the state of a userspace event
790 * @gdev: the GPIO device the event pertains to
791 * @label: consumer label used to tag descriptors
792 * @desc: the GPIO descriptor held by this event
793 * @eflags: the event flags this line was requested with
794 * @irq: the interrupt that trigger in response to events on this GPIO
795 * @wait: wait queue that handles blocking reads of events
796 * @events: KFIFO for the GPIO events
d58f2bf2
LW
797 * @timestamp: cache for the timestamp storing it between hardirq
798 * and IRQ thread, used to bring the timestamp close to the actual
799 * event
61f922db
LW
800 */
801struct lineevent_state {
802 struct gpio_device *gdev;
803 const char *label;
804 struct gpio_desc *desc;
805 u32 eflags;
806 int irq;
807 wait_queue_head_t wait;
808 DECLARE_KFIFO(events, struct gpioevent_data, 16);
d58f2bf2 809 u64 timestamp;
61f922db
LW
810};
811
ac7dbb99
LPC
812#define GPIOEVENT_REQUEST_VALID_FLAGS \
813 (GPIOEVENT_REQUEST_RISING_EDGE | \
814 GPIOEVENT_REQUEST_FALLING_EDGE)
815
afc9a42b 816static __poll_t lineevent_poll(struct file *filep,
61f922db
LW
817 struct poll_table_struct *wait)
818{
819 struct lineevent_state *le = filep->private_data;
afc9a42b 820 __poll_t events = 0;
61f922db
LW
821
822 poll_wait(filep, &le->wait, wait);
823
dea9c80e 824 if (!kfifo_is_empty_spinlocked_noirqsave(&le->events, &le->wait.lock))
a9a08845 825 events = EPOLLIN | EPOLLRDNORM;
61f922db
LW
826
827 return events;
828}
829
830
831static ssize_t lineevent_read(struct file *filep,
832 char __user *buf,
833 size_t count,
834 loff_t *f_ps)
835{
836 struct lineevent_state *le = filep->private_data;
df2cd589 837 struct gpioevent_data ge;
dea9c80e 838 ssize_t bytes_read = 0;
61f922db
LW
839 int ret;
840
df2cd589 841 if (count < sizeof(ge))
61f922db
LW
842 return -EINVAL;
843
844 do {
dea9c80e 845 spin_lock(&le->wait.lock);
61f922db 846 if (kfifo_is_empty(&le->events)) {
dea9c80e
BG
847 if (bytes_read) {
848 spin_unlock(&le->wait.lock);
849 return bytes_read;
850 }
851
852 if (filep->f_flags & O_NONBLOCK) {
853 spin_unlock(&le->wait.lock);
61f922db 854 return -EAGAIN;
dea9c80e 855 }
61f922db 856
dea9c80e 857 ret = wait_event_interruptible_locked(le->wait,
61f922db 858 !kfifo_is_empty(&le->events));
dea9c80e
BG
859 if (ret) {
860 spin_unlock(&le->wait.lock);
61f922db 861 return ret;
dea9c80e 862 }
61f922db
LW
863 }
864
df2cd589 865 ret = kfifo_out(&le->events, &ge, 1);
dea9c80e
BG
866 spin_unlock(&le->wait.lock);
867 if (ret != 1) {
868 /*
869 * This should never happen - we were holding the lock
870 * from the moment we learned the fifo is no longer
871 * empty until now.
872 */
873 ret = -EIO;
874 break;
875 }
61f922db 876
df2cd589 877 if (copy_to_user(buf + bytes_read, &ge, sizeof(ge)))
dea9c80e 878 return -EFAULT;
df2cd589
AS
879 bytes_read += sizeof(ge);
880 } while (count >= bytes_read + sizeof(ge));
61f922db 881
dea9c80e 882 return bytes_read;
61f922db
LW
883}
884
885static int lineevent_release(struct inode *inode, struct file *filep)
886{
887 struct lineevent_state *le = filep->private_data;
888 struct gpio_device *gdev = le->gdev;
889
890 free_irq(le->irq, le);
891 gpiod_free(le->desc);
892 kfree(le->label);
893 kfree(le);
894 put_device(&gdev->dev);
895 return 0;
896}
897
898static long lineevent_ioctl(struct file *filep, unsigned int cmd,
899 unsigned long arg)
900{
901 struct lineevent_state *le = filep->private_data;
902 void __user *ip = (void __user *)arg;
903 struct gpiohandle_data ghd;
904
905 /*
906 * We can get the value for an event line but not set it,
907 * because it is input by definition.
908 */
909 if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) {
910 int val;
911
d82aa4a8
LPC
912 memset(&ghd, 0, sizeof(ghd));
913
61f922db
LW
914 val = gpiod_get_value_cansleep(le->desc);
915 if (val < 0)
916 return val;
917 ghd.values[0] = val;
918
919 if (copy_to_user(ip, &ghd, sizeof(ghd)))
920 return -EFAULT;
921
922 return 0;
923 }
924 return -EINVAL;
925}
926
927#ifdef CONFIG_COMPAT
928static long lineevent_ioctl_compat(struct file *filep, unsigned int cmd,
929 unsigned long arg)
930{
931 return lineevent_ioctl(filep, cmd, (unsigned long)compat_ptr(arg));
932}
933#endif
934
935static const struct file_operations lineevent_fileops = {
936 .release = lineevent_release,
937 .read = lineevent_read,
938 .poll = lineevent_poll,
939 .owner = THIS_MODULE,
940 .llseek = noop_llseek,
941 .unlocked_ioctl = lineevent_ioctl,
942#ifdef CONFIG_COMPAT
943 .compat_ioctl = lineevent_ioctl_compat,
944#endif
945};
946
33265b17 947static irqreturn_t lineevent_irq_thread(int irq, void *p)
61f922db
LW
948{
949 struct lineevent_state *le = p;
950 struct gpioevent_data ge;
fa38869b 951 int ret;
61f922db 952
24bd3efc
LW
953 /* Do not leak kernel stack to userspace */
954 memset(&ge, 0, sizeof(ge));
955
1033be58
BG
956 /*
957 * We may be running from a nested threaded interrupt in which case
958 * we didn't get the timestamp from lineevent_irq_handler().
959 */
960 if (!le->timestamp)
f8850206 961 ge.timestamp = ktime_get_ns();
1033be58
BG
962 else
963 ge.timestamp = le->timestamp;
61f922db 964
ad537b82
BG
965 if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE
966 && le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) {
fa38869b 967 int level = gpiod_get_value_cansleep(le->desc);
61f922db
LW
968 if (level)
969 /* Emit low-to-high event */
970 ge.id = GPIOEVENT_EVENT_RISING_EDGE;
971 else
972 /* Emit high-to-low event */
973 ge.id = GPIOEVENT_EVENT_FALLING_EDGE;
fa38869b 974 } else if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE) {
61f922db
LW
975 /* Emit low-to-high event */
976 ge.id = GPIOEVENT_EVENT_RISING_EDGE;
fa38869b 977 } else if (le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) {
61f922db
LW
978 /* Emit high-to-low event */
979 ge.id = GPIOEVENT_EVENT_FALLING_EDGE;
bc0207a5
AB
980 } else {
981 return IRQ_NONE;
61f922db
LW
982 }
983
dea9c80e
BG
984 ret = kfifo_in_spinlocked_noirqsave(&le->events, &ge,
985 1, &le->wait.lock);
2efc6bfa 986 if (ret)
a9a08845 987 wake_up_poll(&le->wait, EPOLLIN);
248ae175
BG
988 else
989 pr_debug_ratelimited("event FIFO is full - event dropped\n");
61f922db
LW
990
991 return IRQ_HANDLED;
992}
993
d58f2bf2
LW
994static irqreturn_t lineevent_irq_handler(int irq, void *p)
995{
996 struct lineevent_state *le = p;
997
998 /*
999 * Just store the timestamp in hardirq context so we get it as
1000 * close in time as possible to the actual event.
1001 */
f8850206 1002 le->timestamp = ktime_get_ns();
d58f2bf2
LW
1003
1004 return IRQ_WAKE_THREAD;
1005}
1006
61f922db
LW
1007static int lineevent_create(struct gpio_device *gdev, void __user *ip)
1008{
1009 struct gpioevent_request eventreq;
1010 struct lineevent_state *le;
1011 struct gpio_desc *desc;
953b956a 1012 struct file *file;
61f922db
LW
1013 u32 offset;
1014 u32 lflags;
1015 u32 eflags;
1016 int fd;
1017 int ret;
1018 int irqflags = 0;
1019
1020 if (copy_from_user(&eventreq, ip, sizeof(eventreq)))
1021 return -EFAULT;
1022
bcc6d99a
BG
1023 offset = eventreq.lineoffset;
1024 lflags = eventreq.handleflags;
1025 eflags = eventreq.eventflags;
1026
45e23604
BG
1027 desc = gpiochip_get_desc(gdev->chip, offset);
1028 if (IS_ERR(desc))
1029 return PTR_ERR(desc);
bcc6d99a
BG
1030
1031 /* Return an error if a unknown flag is set */
1032 if ((lflags & ~GPIOHANDLE_REQUEST_VALID_FLAGS) ||
1033 (eflags & ~GPIOEVENT_REQUEST_VALID_FLAGS))
1034 return -EINVAL;
1035
1036 /* This is just wrong: we don't look for events on output lines */
1037 if ((lflags & GPIOHANDLE_REQUEST_OUTPUT) ||
1038 (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN) ||
1039 (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE))
1040 return -EINVAL;
1041
2148ad77
KG
1042 /* Only one bias flag can be set. */
1043 if (((lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE) &&
1044 (lflags & (GPIOHANDLE_REQUEST_BIAS_PULL_DOWN |
1045 GPIOHANDLE_REQUEST_BIAS_PULL_UP))) ||
1046 ((lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) &&
1047 (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)))
1048 return -EINVAL;
1049
61f922db
LW
1050 le = kzalloc(sizeof(*le), GFP_KERNEL);
1051 if (!le)
1052 return -ENOMEM;
1053 le->gdev = gdev;
1054 get_device(&gdev->dev);
1055
1056 /* Make sure this is terminated */
1057 eventreq.consumer_label[sizeof(eventreq.consumer_label)-1] = '\0';
1058 if (strlen(eventreq.consumer_label)) {
1059 le->label = kstrdup(eventreq.consumer_label,
1060 GFP_KERNEL);
1061 if (!le->label) {
1062 ret = -ENOMEM;
1063 goto out_free_le;
1064 }
1065 }
1066
61f922db
LW
1067 ret = gpiod_request(desc, le->label);
1068 if (ret)
f001cc35 1069 goto out_free_label;
61f922db
LW
1070 le->desc = desc;
1071 le->eflags = eflags;
1072
1073 if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW)
1074 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
2148ad77
KG
1075 if (lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE)
1076 set_bit(FLAG_BIAS_DISABLE, &desc->flags);
7b479a84
KG
1077 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)
1078 set_bit(FLAG_PULL_DOWN, &desc->flags);
1079 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)
1080 set_bit(FLAG_PULL_UP, &desc->flags);
61f922db
LW
1081
1082 ret = gpiod_direction_input(desc);
1083 if (ret)
1084 goto out_free_desc;
1085
1086 le->irq = gpiod_to_irq(desc);
1087 if (le->irq <= 0) {
1088 ret = -ENODEV;
1089 goto out_free_desc;
1090 }
1091
1092 if (eflags & GPIOEVENT_REQUEST_RISING_EDGE)
223ecaf1
MW
1093 irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
1094 IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING;
61f922db 1095 if (eflags & GPIOEVENT_REQUEST_FALLING_EDGE)
223ecaf1
MW
1096 irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
1097 IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING;
61f922db 1098 irqflags |= IRQF_ONESHOT;
61f922db
LW
1099
1100 INIT_KFIFO(le->events);
1101 init_waitqueue_head(&le->wait);
61f922db
LW
1102
1103 /* Request a thread to read the events */
1104 ret = request_threaded_irq(le->irq,
d58f2bf2 1105 lineevent_irq_handler,
61f922db
LW
1106 lineevent_irq_thread,
1107 irqflags,
1108 le->label,
1109 le);
1110 if (ret)
1111 goto out_free_desc;
1112
953b956a 1113 fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);
61f922db
LW
1114 if (fd < 0) {
1115 ret = fd;
1116 goto out_free_irq;
1117 }
1118
953b956a
LPC
1119 file = anon_inode_getfile("gpio-event",
1120 &lineevent_fileops,
1121 le,
1122 O_RDONLY | O_CLOEXEC);
1123 if (IS_ERR(file)) {
1124 ret = PTR_ERR(file);
1125 goto out_put_unused_fd;
1126 }
1127
61f922db 1128 eventreq.fd = fd;
d932cd49 1129 if (copy_to_user(ip, &eventreq, sizeof(eventreq))) {
953b956a
LPC
1130 /*
1131 * fput() will trigger the release() callback, so do not go onto
1132 * the regular error cleanup path here.
1133 */
1134 fput(file);
1135 put_unused_fd(fd);
1136 return -EFAULT;
d932cd49 1137 }
61f922db 1138
953b956a
LPC
1139 fd_install(fd, file);
1140
61f922db
LW
1141 return 0;
1142
953b956a
LPC
1143out_put_unused_fd:
1144 put_unused_fd(fd);
61f922db
LW
1145out_free_irq:
1146 free_irq(le->irq, le);
1147out_free_desc:
1148 gpiod_free(le->desc);
1149out_free_label:
1150 kfree(le->label);
1151out_free_le:
1152 kfree(le);
1153 put_device(&gdev->dev);
1154 return ret;
1155}
1156
d2ac2579
BG
1157static void gpio_desc_to_lineinfo(struct gpio_desc *desc,
1158 struct gpioline_info *info)
1159{
a0b66a73 1160 struct gpio_chip *gc = desc->gdev->chip;
d2ac2579
BG
1161 unsigned long flags;
1162
1163 spin_lock_irqsave(&gpio_lock, flags);
1164
1165 if (desc->name) {
1166 strncpy(info->name, desc->name, sizeof(info->name));
1167 info->name[sizeof(info->name) - 1] = '\0';
1168 } else {
1169 info->name[0] = '\0';
1170 }
1171
1172 if (desc->label) {
1173 strncpy(info->consumer, desc->label, sizeof(info->consumer));
1174 info->consumer[sizeof(info->consumer) - 1] = '\0';
1175 } else {
1176 info->consumer[0] = '\0';
1177 }
1178
1179 /*
1180 * Userspace only need to know that the kernel is using this GPIO so
1181 * it can't use it.
1182 */
1183 info->flags = 0;
1184 if (test_bit(FLAG_REQUESTED, &desc->flags) ||
1185 test_bit(FLAG_IS_HOGGED, &desc->flags) ||
1186 test_bit(FLAG_USED_AS_IRQ, &desc->flags) ||
1187 test_bit(FLAG_EXPORT, &desc->flags) ||
1188 test_bit(FLAG_SYSFS, &desc->flags) ||
a0b66a73 1189 !pinctrl_gpio_can_use_line(gc->base + info->line_offset))
d2ac2579
BG
1190 info->flags |= GPIOLINE_FLAG_KERNEL;
1191 if (test_bit(FLAG_IS_OUT, &desc->flags))
1192 info->flags |= GPIOLINE_FLAG_IS_OUT;
1193 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
1194 info->flags |= GPIOLINE_FLAG_ACTIVE_LOW;
1195 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
1196 info->flags |= (GPIOLINE_FLAG_OPEN_DRAIN |
1197 GPIOLINE_FLAG_IS_OUT);
1198 if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
1199 info->flags |= (GPIOLINE_FLAG_OPEN_SOURCE |
1200 GPIOLINE_FLAG_IS_OUT);
1201 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
1202 info->flags |= GPIOLINE_FLAG_BIAS_DISABLE;
1203 if (test_bit(FLAG_PULL_DOWN, &desc->flags))
1204 info->flags |= GPIOLINE_FLAG_BIAS_PULL_DOWN;
1205 if (test_bit(FLAG_PULL_UP, &desc->flags))
1206 info->flags |= GPIOLINE_FLAG_BIAS_PULL_UP;
1207
1208 spin_unlock_irqrestore(&gpio_lock, flags);
1209}
1210
51c1064e
BG
1211struct gpio_chardev_data {
1212 struct gpio_device *gdev;
1213 wait_queue_head_t wait;
1214 DECLARE_KFIFO(events, struct gpioline_info_changed, 32);
1215 struct notifier_block lineinfo_changed_nb;
1216 unsigned long *watched_lines;
1217};
1218
950d55f5 1219/*
3c702e99
LW
1220 * gpio_ioctl() - ioctl handler for the GPIO chardev
1221 */
1222static long gpio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
1223{
51c1064e
BG
1224 struct gpio_chardev_data *priv = filp->private_data;
1225 struct gpio_device *gdev = priv->gdev;
a0b66a73 1226 struct gpio_chip *gc = gdev->chip;
8b92e17e 1227 void __user *ip = (void __user *)arg;
51c1064e
BG
1228 struct gpio_desc *desc;
1229 __u32 offset;
3c702e99
LW
1230
1231 /* We fail any subsequent ioctl():s when the chip is gone */
a0b66a73 1232 if (!gc)
3c702e99
LW
1233 return -ENODEV;
1234
521a2ad6 1235 /* Fill in the struct and pass to userspace */
3c702e99 1236 if (cmd == GPIO_GET_CHIPINFO_IOCTL) {
521a2ad6
LW
1237 struct gpiochip_info chipinfo;
1238
0f4bbb23
LPC
1239 memset(&chipinfo, 0, sizeof(chipinfo));
1240
3c702e99
LW
1241 strncpy(chipinfo.name, dev_name(&gdev->dev),
1242 sizeof(chipinfo.name));
1243 chipinfo.name[sizeof(chipinfo.name)-1] = '\0';
df4878e9
LW
1244 strncpy(chipinfo.label, gdev->label,
1245 sizeof(chipinfo.label));
1246 chipinfo.label[sizeof(chipinfo.label)-1] = '\0';
fdeb8e15 1247 chipinfo.lines = gdev->ngpio;
3c702e99
LW
1248 if (copy_to_user(ip, &chipinfo, sizeof(chipinfo)))
1249 return -EFAULT;
1250 return 0;
51c1064e
BG
1251 } else if (cmd == GPIO_GET_LINEINFO_IOCTL ||
1252 cmd == GPIO_GET_LINEINFO_WATCH_IOCTL) {
521a2ad6 1253 struct gpioline_info lineinfo;
521a2ad6
LW
1254
1255 if (copy_from_user(&lineinfo, ip, sizeof(lineinfo)))
1256 return -EFAULT;
521a2ad6 1257
a0b66a73 1258 desc = gpiochip_get_desc(gc, lineinfo.line_offset);
2a2cabd8
BG
1259 if (IS_ERR(desc))
1260 return PTR_ERR(desc);
1261
d2ac2579 1262 gpio_desc_to_lineinfo(desc, &lineinfo);
521a2ad6
LW
1263
1264 if (copy_to_user(ip, &lineinfo, sizeof(lineinfo)))
1265 return -EFAULT;
51c1064e
BG
1266
1267 if (cmd == GPIO_GET_LINEINFO_WATCH_IOCTL)
19314797 1268 set_bit(gpio_chip_hwgpio(desc), priv->watched_lines);
51c1064e 1269
521a2ad6 1270 return 0;
d7c51b47
LW
1271 } else if (cmd == GPIO_GET_LINEHANDLE_IOCTL) {
1272 return linehandle_create(gdev, ip);
61f922db
LW
1273 } else if (cmd == GPIO_GET_LINEEVENT_IOCTL) {
1274 return lineevent_create(gdev, ip);
51c1064e
BG
1275 } else if (cmd == GPIO_GET_LINEINFO_UNWATCH_IOCTL) {
1276 if (copy_from_user(&offset, ip, sizeof(offset)))
1277 return -EFAULT;
1278
a0b66a73 1279 desc = gpiochip_get_desc(gc, offset);
51c1064e
BG
1280 if (IS_ERR(desc))
1281 return PTR_ERR(desc);
1282
19314797 1283 clear_bit(gpio_chip_hwgpio(desc), priv->watched_lines);
51c1064e 1284 return 0;
3c702e99
LW
1285 }
1286 return -EINVAL;
1287}
1288
8b92e17e
LW
1289#ifdef CONFIG_COMPAT
1290static long gpio_ioctl_compat(struct file *filp, unsigned int cmd,
1291 unsigned long arg)
1292{
1293 return gpio_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
1294}
1295#endif
1296
51c1064e
BG
1297static struct gpio_chardev_data *
1298to_gpio_chardev_data(struct notifier_block *nb)
1299{
1300 return container_of(nb, struct gpio_chardev_data, lineinfo_changed_nb);
1301}
1302
1303static int lineinfo_changed_notify(struct notifier_block *nb,
1304 unsigned long action, void *data)
1305{
1306 struct gpio_chardev_data *priv = to_gpio_chardev_data(nb);
1307 struct gpioline_info_changed chg;
1308 struct gpio_desc *desc = data;
1309 int ret;
1310
19314797 1311 if (!test_bit(gpio_chip_hwgpio(desc), priv->watched_lines))
51c1064e
BG
1312 return NOTIFY_DONE;
1313
1314 memset(&chg, 0, sizeof(chg));
1315 chg.info.line_offset = gpio_chip_hwgpio(desc);
1316 chg.event_type = action;
1317 chg.timestamp = ktime_get_ns();
1318 gpio_desc_to_lineinfo(desc, &chg.info);
1319
1320 ret = kfifo_in_spinlocked(&priv->events, &chg, 1, &priv->wait.lock);
1321 if (ret)
1322 wake_up_poll(&priv->wait, EPOLLIN);
1323 else
1324 pr_debug_ratelimited("lineinfo event FIFO is full - event dropped\n");
1325
1326 return NOTIFY_OK;
1327}
1328
1329static __poll_t lineinfo_watch_poll(struct file *filep,
1330 struct poll_table_struct *pollt)
1331{
1332 struct gpio_chardev_data *priv = filep->private_data;
1333 __poll_t events = 0;
1334
1335 poll_wait(filep, &priv->wait, pollt);
1336
1337 if (!kfifo_is_empty_spinlocked_noirqsave(&priv->events,
1338 &priv->wait.lock))
1339 events = EPOLLIN | EPOLLRDNORM;
1340
1341 return events;
1342}
1343
1344static ssize_t lineinfo_watch_read(struct file *filep, char __user *buf,
1345 size_t count, loff_t *off)
1346{
1347 struct gpio_chardev_data *priv = filep->private_data;
1348 struct gpioline_info_changed event;
1349 ssize_t bytes_read = 0;
1350 int ret;
1351
1352 if (count < sizeof(event))
1353 return -EINVAL;
1354
1355 do {
1356 spin_lock(&priv->wait.lock);
1357 if (kfifo_is_empty(&priv->events)) {
1358 if (bytes_read) {
1359 spin_unlock(&priv->wait.lock);
1360 return bytes_read;
1361 }
1362
1363 if (filep->f_flags & O_NONBLOCK) {
1364 spin_unlock(&priv->wait.lock);
1365 return -EAGAIN;
1366 }
1367
1368 ret = wait_event_interruptible_locked(priv->wait,
1369 !kfifo_is_empty(&priv->events));
1370 if (ret) {
1371 spin_unlock(&priv->wait.lock);
1372 return ret;
1373 }
1374 }
1375
1376 ret = kfifo_out(&priv->events, &event, 1);
1377 spin_unlock(&priv->wait.lock);
1378 if (ret != 1) {
1379 ret = -EIO;
1380 break;
1381 /* We should never get here. See lineevent_read(). */
1382 }
1383
1384 if (copy_to_user(buf + bytes_read, &event, sizeof(event)))
1385 return -EFAULT;
1386 bytes_read += sizeof(event);
1387 } while (count >= bytes_read + sizeof(event));
1388
1389 return bytes_read;
1390}
1391
3c702e99
LW
1392/**
1393 * gpio_chrdev_open() - open the chardev for ioctl operations
1394 * @inode: inode for this chardev
1395 * @filp: file struct for storing private data
1396 * Returns 0 on success
1397 */
1398static int gpio_chrdev_open(struct inode *inode, struct file *filp)
1399{
1400 struct gpio_device *gdev = container_of(inode->i_cdev,
1401 struct gpio_device, chrdev);
51c1064e
BG
1402 struct gpio_chardev_data *priv;
1403 int ret = -ENOMEM;
3c702e99
LW
1404
1405 /* Fail on open if the backing gpiochip is gone */
fb505747 1406 if (!gdev->chip)
3c702e99 1407 return -ENODEV;
51c1064e
BG
1408
1409 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1410 if (!priv)
1411 return -ENOMEM;
1412
1413 priv->watched_lines = bitmap_zalloc(gdev->chip->ngpio, GFP_KERNEL);
1414 if (!priv->watched_lines)
1415 goto out_free_priv;
1416
1417 init_waitqueue_head(&priv->wait);
1418 INIT_KFIFO(priv->events);
1419 priv->gdev = gdev;
1420
1421 priv->lineinfo_changed_nb.notifier_call = lineinfo_changed_notify;
1422 ret = atomic_notifier_chain_register(&gdev->notifier,
1423 &priv->lineinfo_changed_nb);
1424 if (ret)
1425 goto out_free_bitmap;
1426
3c702e99 1427 get_device(&gdev->dev);
51c1064e 1428 filp->private_data = priv;
f4e81c52 1429
51c1064e
BG
1430 ret = nonseekable_open(inode, filp);
1431 if (ret)
1432 goto out_unregister_notifier;
1433
1434 return ret;
1435
1436out_unregister_notifier:
1437 atomic_notifier_chain_unregister(&gdev->notifier,
1438 &priv->lineinfo_changed_nb);
1439out_free_bitmap:
1440 bitmap_free(priv->watched_lines);
1441out_free_priv:
1442 kfree(priv);
1443 return ret;
3c702e99
LW
1444}
1445
1446/**
1447 * gpio_chrdev_release() - close chardev after ioctl operations
1448 * @inode: inode for this chardev
1449 * @filp: file struct for storing private data
1450 * Returns 0 on success
1451 */
1452static int gpio_chrdev_release(struct inode *inode, struct file *filp)
1453{
51c1064e
BG
1454 struct gpio_chardev_data *priv = filp->private_data;
1455 struct gpio_device *gdev = priv->gdev;
3c702e99 1456
51c1064e
BG
1457 bitmap_free(priv->watched_lines);
1458 atomic_notifier_chain_unregister(&gdev->notifier,
1459 &priv->lineinfo_changed_nb);
3c702e99 1460 put_device(&gdev->dev);
51c1064e
BG
1461 kfree(priv);
1462
3c702e99
LW
1463 return 0;
1464}
1465
3c702e99
LW
1466static const struct file_operations gpio_fileops = {
1467 .release = gpio_chrdev_release,
1468 .open = gpio_chrdev_open,
51c1064e
BG
1469 .poll = lineinfo_watch_poll,
1470 .read = lineinfo_watch_read,
3c702e99 1471 .owner = THIS_MODULE,
f4e81c52 1472 .llseek = no_llseek,
3c702e99 1473 .unlocked_ioctl = gpio_ioctl,
8b92e17e
LW
1474#ifdef CONFIG_COMPAT
1475 .compat_ioctl = gpio_ioctl_compat,
1476#endif
3c702e99
LW
1477};
1478
ff2b1359
LW
1479static void gpiodevice_release(struct device *dev)
1480{
1481 struct gpio_device *gdev = dev_get_drvdata(dev);
1482
1483 list_del(&gdev->list);
1484 ida_simple_remove(&gpio_ida, gdev->id);
fcf273e5 1485 kfree_const(gdev->label);
476e2fc5 1486 kfree(gdev->descs);
9efd9e69 1487 kfree(gdev);
ff2b1359
LW
1488}
1489
159f3cd9
GR
1490static int gpiochip_setup_dev(struct gpio_device *gdev)
1491{
d377f56f 1492 int ret;
159f3cd9
GR
1493
1494 cdev_init(&gdev->chrdev, &gpio_fileops);
1495 gdev->chrdev.owner = THIS_MODULE;
159f3cd9 1496 gdev->dev.devt = MKDEV(MAJOR(gpio_devt), gdev->id);
111379dc 1497
d377f56f
LW
1498 ret = cdev_device_add(&gdev->chrdev, &gdev->dev);
1499 if (ret)
1500 return ret;
111379dc
LG
1501
1502 chip_dbg(gdev->chip, "added GPIO chardev (%d:%d)\n",
1503 MAJOR(gpio_devt), gdev->id);
159f3cd9 1504
d377f56f
LW
1505 ret = gpiochip_sysfs_register(gdev);
1506 if (ret)
159f3cd9
GR
1507 goto err_remove_device;
1508
1509 /* From this point, the .release() function cleans up gpio_device */
1510 gdev->dev.release = gpiodevice_release;
262b9011
GU
1511 dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base,
1512 gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic");
159f3cd9
GR
1513
1514 return 0;
1515
1516err_remove_device:
111379dc 1517 cdev_device_del(&gdev->chrdev, &gdev->dev);
d377f56f 1518 return ret;
159f3cd9
GR
1519}
1520
a0b66a73 1521static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog)
a411e81e
BG
1522{
1523 struct gpio_desc *desc;
1524 int rv;
1525
a0b66a73 1526 desc = gpiochip_get_desc(gc, hog->chip_hwnum);
a411e81e 1527 if (IS_ERR(desc)) {
262b9011
GU
1528 chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__,
1529 PTR_ERR(desc));
a411e81e
BG
1530 return;
1531 }
1532
ba3efdff 1533 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
a411e81e
BG
1534 return;
1535
1536 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
1537 if (rv)
262b9011
GU
1538 gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n",
1539 __func__, gc->label, hog->chip_hwnum, rv);
a411e81e
BG
1540}
1541
a0b66a73 1542static void machine_gpiochip_add(struct gpio_chip *gc)
a411e81e
BG
1543{
1544 struct gpiod_hog *hog;
1545
1546 mutex_lock(&gpio_machine_hogs_mutex);
1547
1548 list_for_each_entry(hog, &gpio_machine_hogs, list) {
a0b66a73
LW
1549 if (!strcmp(gc->label, hog->chip_label))
1550 gpiochip_machine_hog(gc, hog);
a411e81e
BG
1551 }
1552
1553 mutex_unlock(&gpio_machine_hogs_mutex);
1554}
1555
159f3cd9
GR
1556static void gpiochip_setup_devs(void)
1557{
1558 struct gpio_device *gdev;
d377f56f 1559 int ret;
159f3cd9
GR
1560
1561 list_for_each_entry(gdev, &gpio_devices, list) {
d377f56f
LW
1562 ret = gpiochip_setup_dev(gdev);
1563 if (ret)
262b9011
GU
1564 dev_err(&gdev->dev,
1565 "Failed to initialize gpio device (%d)\n", ret);
159f3cd9
GR
1566 }
1567}
1568
a0b66a73 1569int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
39c3fd58
AL
1570 struct lock_class_key *lock_key,
1571 struct lock_class_key *request_key)
d2876d08
DB
1572{
1573 unsigned long flags;
d377f56f 1574 int ret = 0;
ff2b1359 1575 unsigned i;
a0b66a73 1576 int base = gc->base;
ff2b1359 1577 struct gpio_device *gdev;
d2876d08 1578
ff2b1359
LW
1579 /*
1580 * First: allocate and populate the internal stat container, and
1581 * set up the struct device.
1582 */
969f07b4 1583 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
ff2b1359 1584 if (!gdev)
14e85c0e 1585 return -ENOMEM;
3c702e99 1586 gdev->dev.bus = &gpio_bus_type;
a0b66a73
LW
1587 gdev->chip = gc;
1588 gc->gpiodev = gdev;
1589 if (gc->parent) {
1590 gdev->dev.parent = gc->parent;
1591 gdev->dev.of_node = gc->parent->of_node;
acc6e331
TR
1592 }
1593
ff2b1359
LW
1594#ifdef CONFIG_OF_GPIO
1595 /* If the gpiochip has an assigned OF node this takes precedence */
a0b66a73
LW
1596 if (gc->of_node)
1597 gdev->dev.of_node = gc->of_node;
6ff04974 1598 else
a0b66a73 1599 gc->of_node = gdev->dev.of_node;
ff2b1359 1600#endif
acc6e331 1601
ff2b1359
LW
1602 gdev->id = ida_simple_get(&gpio_ida, 0, 0, GFP_KERNEL);
1603 if (gdev->id < 0) {
d377f56f 1604 ret = gdev->id;
ff2b1359
LW
1605 goto err_free_gdev;
1606 }
ddd8891e 1607 dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id);
ff2b1359
LW
1608 device_initialize(&gdev->dev);
1609 dev_set_drvdata(&gdev->dev, gdev);
a0b66a73
LW
1610 if (gc->parent && gc->parent->driver)
1611 gdev->owner = gc->parent->driver->owner;
1612 else if (gc->owner)
ff2b1359 1613 /* TODO: remove chip->owner */
a0b66a73 1614 gdev->owner = gc->owner;
ff2b1359
LW
1615 else
1616 gdev->owner = THIS_MODULE;
d2876d08 1617
a0b66a73 1618 gdev->descs = kcalloc(gc->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL);
1c3cdb18 1619 if (!gdev->descs) {
d377f56f 1620 ret = -ENOMEM;
a05a1404 1621 goto err_free_ida;
ff2b1359
LW
1622 }
1623
a0b66a73
LW
1624 if (gc->ngpio == 0) {
1625 chip_err(gc, "tried to insert a GPIO chip with zero lines\n");
d377f56f 1626 ret = -EINVAL;
159f3cd9 1627 goto err_free_descs;
5ed41cc4 1628 }
df4878e9 1629
a0b66a73
LW
1630 if (gc->ngpio > FASTPATH_NGPIO)
1631 chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n",
1632 gc->ngpio, FASTPATH_NGPIO);
3027743f 1633
a0b66a73 1634 gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL);
df4878e9 1635 if (!gdev->label) {
d377f56f 1636 ret = -ENOMEM;
476e2fc5 1637 goto err_free_descs;
df4878e9
LW
1638 }
1639
a0b66a73 1640 gdev->ngpio = gc->ngpio;
43c54eca 1641 gdev->data = data;
5ed41cc4 1642
d2876d08
DB
1643 spin_lock_irqsave(&gpio_lock, flags);
1644
fdeb8e15
LW
1645 /*
1646 * TODO: this allocates a Linux GPIO number base in the global
1647 * GPIO numberspace for this chip. In the long run we want to
1648 * get *rid* of this numberspace and use only descriptors, but
1649 * it may be a pipe dream. It will not happen before we get rid
1650 * of the sysfs interface anyways.
1651 */
8d0aab2f 1652 if (base < 0) {
a0b66a73 1653 base = gpiochip_find_base(gc->ngpio);
8d0aab2f 1654 if (base < 0) {
d377f56f 1655 ret = base;
225fce83 1656 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1657 goto err_free_label;
8d0aab2f 1658 }
fdeb8e15
LW
1659 /*
1660 * TODO: it should not be necessary to reflect the assigned
1661 * base outside of the GPIO subsystem. Go over drivers and
1662 * see if anyone makes use of this, else drop this and assign
1663 * a poison instead.
1664 */
a0b66a73 1665 gc->base = base;
8d0aab2f 1666 }
fdeb8e15 1667 gdev->base = base;
8d0aab2f 1668
d377f56f
LW
1669 ret = gpiodev_add_to_list(gdev);
1670 if (ret) {
05aa5203 1671 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1672 goto err_free_label;
05aa5203 1673 }
1a989d0f 1674
a0b66a73 1675 for (i = 0; i < gc->ngpio; i++)
767cd17a 1676 gdev->descs[i].gdev = gdev;
14e85c0e 1677
207270dd
DC
1678 spin_unlock_irqrestore(&gpio_lock, flags);
1679
51c1064e
BG
1680 ATOMIC_INIT_NOTIFIER_HEAD(&gdev->notifier);
1681
f23f1516 1682#ifdef CONFIG_PINCTRL
20ec3e39 1683 INIT_LIST_HEAD(&gdev->pin_ranges);
f23f1516
SH
1684#endif
1685
a0b66a73 1686 ret = gpiochip_set_desc_names(gc);
d377f56f 1687 if (ret)
5f3ca732
MP
1688 goto err_remove_from_list;
1689
a0b66a73 1690 ret = gpiochip_alloc_valid_mask(gc);
d377f56f 1691 if (ret)
48057ed1 1692 goto err_remove_from_list;
e0d89728 1693
a0b66a73 1694 ret = of_gpiochip_add(gc);
d377f56f 1695 if (ret)
48057ed1 1696 goto err_free_gpiochip_mask;
28355f81 1697
a0b66a73 1698 ret = gpiochip_init_valid_mask(gc);
d377f56f 1699 if (ret)
35779890 1700 goto err_remove_of_chip;
f8ec92a9 1701
a0b66a73 1702 for (i = 0; i < gc->ngpio; i++) {
3edfb7bd
RRD
1703 struct gpio_desc *desc = &gdev->descs[i];
1704
a0b66a73 1705 if (gc->get_direction && gpiochip_line_is_valid(gc, i)) {
4fc5bfeb 1706 assign_bit(FLAG_IS_OUT,
a0b66a73 1707 &desc->flags, !gc->get_direction(gc, i));
d95da993 1708 } else {
4fc5bfeb 1709 assign_bit(FLAG_IS_OUT,
a0b66a73 1710 &desc->flags, !gc->direction_input);
d95da993 1711 }
3edfb7bd
RRD
1712 }
1713
a0b66a73 1714 ret = gpiochip_add_pin_ranges(gc);
b056ca1c
AS
1715 if (ret)
1716 goto err_remove_of_chip;
1717
a0b66a73 1718 acpi_gpiochip_add(gc);
391c970c 1719
a0b66a73 1720 machine_gpiochip_add(gc);
a411e81e 1721
a0b66a73 1722 ret = gpiochip_irqchip_init_valid_mask(gc);
9411e3aa
AS
1723 if (ret)
1724 goto err_remove_acpi_chip;
1725
a0b66a73 1726 ret = gpiochip_irqchip_init_hw(gc);
fbdf8d4b 1727 if (ret)
48057ed1
LW
1728 goto err_remove_acpi_chip;
1729
a0b66a73 1730 ret = gpiochip_add_irqchip(gc, lock_key, request_key);
fbdf8d4b 1731 if (ret)
48057ed1
LW
1732 goto err_remove_irqchip_mask;
1733
3c702e99
LW
1734 /*
1735 * By first adding the chardev, and then adding the device,
1736 * we get a device node entry in sysfs under
1737 * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
1738 * coldplug of device nodes and other udev business.
159f3cd9
GR
1739 * We can do this only if gpiolib has been initialized.
1740 * Otherwise, defer until later.
3c702e99 1741 */
159f3cd9 1742 if (gpiolib_initialized) {
d377f56f
LW
1743 ret = gpiochip_setup_dev(gdev);
1744 if (ret)
48057ed1 1745 goto err_remove_irqchip;
159f3cd9 1746 }
cedb1881 1747 return 0;
3bae4811 1748
48057ed1 1749err_remove_irqchip:
a0b66a73 1750 gpiochip_irqchip_remove(gc);
48057ed1 1751err_remove_irqchip_mask:
a0b66a73 1752 gpiochip_irqchip_free_valid_mask(gc);
35779890 1753err_remove_acpi_chip:
a0b66a73 1754 acpi_gpiochip_remove(gc);
35779890 1755err_remove_of_chip:
a0b66a73
LW
1756 gpiochip_free_hogs(gc);
1757 of_gpiochip_remove(gc);
35779890 1758err_free_gpiochip_mask:
a0b66a73
LW
1759 gpiochip_remove_pin_ranges(gc);
1760 gpiochip_free_valid_mask(gc);
5f3ca732 1761err_remove_from_list:
225fce83 1762 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1763 list_del(&gdev->list);
3bae4811 1764 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1765err_free_label:
fcf273e5 1766 kfree_const(gdev->label);
476e2fc5
GR
1767err_free_descs:
1768 kfree(gdev->descs);
a05a1404 1769err_free_ida:
ff2b1359 1770 ida_simple_remove(&gpio_ida, gdev->id);
a05a1404 1771err_free_gdev:
d2876d08 1772 /* failures here can mean systems won't boot... */
1777fc97 1773 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
fdeb8e15 1774 gdev->base, gdev->base + gdev->ngpio - 1,
a0b66a73 1775 gc->label ? : "generic", ret);
fdeb8e15 1776 kfree(gdev);
d377f56f 1777 return ret;
d2876d08 1778}
959bc7b2 1779EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
d2876d08 1780
43c54eca
LW
1781/**
1782 * gpiochip_get_data() - get per-subdriver data for the chip
a0b66a73 1783 * @gc: GPIO chip
950d55f5
TR
1784 *
1785 * Returns:
1786 * The per-subdriver data for the chip.
43c54eca 1787 */
a0b66a73 1788void *gpiochip_get_data(struct gpio_chip *gc)
43c54eca 1789{
a0b66a73 1790 return gc->gpiodev->data;
43c54eca
LW
1791}
1792EXPORT_SYMBOL_GPL(gpiochip_get_data);
1793
d2876d08
DB
1794/**
1795 * gpiochip_remove() - unregister a gpio_chip
a0b66a73 1796 * @gc: the chip to unregister
d2876d08
DB
1797 *
1798 * A gpio_chip with any GPIOs still requested may not be removed.
1799 */
a0b66a73 1800void gpiochip_remove(struct gpio_chip *gc)
d2876d08 1801{
a0b66a73 1802 struct gpio_device *gdev = gc->gpiodev;
d2876d08 1803 unsigned long flags;
869233f8 1804 unsigned int i;
d2876d08 1805
ff2b1359 1806 /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
afbc4f31 1807 gpiochip_sysfs_unregister(gdev);
a0b66a73 1808 gpiochip_free_hogs(gc);
bd203bd5
BJZ
1809 /* Numb the device, cancelling all outstanding operations */
1810 gdev->chip = NULL;
a0b66a73
LW
1811 gpiochip_irqchip_remove(gc);
1812 acpi_gpiochip_remove(gc);
1813 of_gpiochip_remove(gc);
1814 gpiochip_remove_pin_ranges(gc);
1815 gpiochip_free_valid_mask(gc);
43c54eca
LW
1816 /*
1817 * We accept no more calls into the driver from this point, so
1818 * NULL the driver data pointer
1819 */
1820 gdev->data = NULL;
391c970c 1821
6798acaa 1822 spin_lock_irqsave(&gpio_lock, flags);
fdeb8e15 1823 for (i = 0; i < gdev->ngpio; i++) {
a0b66a73 1824 if (gpiochip_is_requested(gc, i))
869233f8 1825 break;
d2876d08 1826 }
d2876d08 1827 spin_unlock_irqrestore(&gpio_lock, flags);
14e85c0e 1828
ca18a852 1829 if (i != gdev->ngpio)
fdeb8e15 1830 dev_crit(&gdev->dev,
58383c78 1831 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
fab28b89 1832
ff2b1359
LW
1833 /*
1834 * The gpiochip side puts its use of the device to rest here:
1835 * if there are no userspace clients, the chardev and device will
1836 * be removed, else it will be dangling until the last user is
1837 * gone.
1838 */
111379dc 1839 cdev_device_del(&gdev->chrdev, &gdev->dev);
ff2b1359 1840 put_device(&gdev->dev);
d2876d08
DB
1841}
1842EXPORT_SYMBOL_GPL(gpiochip_remove);
1843
594fa265
GL
1844/**
1845 * gpiochip_find() - iterator for locating a specific gpio_chip
1846 * @data: data to pass to match function
950d55f5 1847 * @match: Callback function to check gpio_chip
594fa265
GL
1848 *
1849 * Similar to bus_find_device. It returns a reference to a gpio_chip as
1850 * determined by a user supplied @match callback. The callback should return
1851 * 0 if the device doesn't match and non-zero if it does. If the callback is
1852 * non-zero, this function will return to the caller and not iterate over any
1853 * more gpio_chips.
1854 */
07ce8ec7 1855struct gpio_chip *gpiochip_find(void *data,
a0b66a73 1856 int (*match)(struct gpio_chip *gc,
3d0f7cf0 1857 void *data))
594fa265 1858{
ff2b1359 1859 struct gpio_device *gdev;
a0b66a73 1860 struct gpio_chip *gc = NULL;
594fa265 1861 unsigned long flags;
594fa265
GL
1862
1863 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1864 list_for_each_entry(gdev, &gpio_devices, list)
acf06ff7 1865 if (gdev->chip && match(gdev->chip, data)) {
a0b66a73 1866 gc = gdev->chip;
594fa265 1867 break;
acf06ff7 1868 }
ff2b1359 1869
594fa265
GL
1870 spin_unlock_irqrestore(&gpio_lock, flags);
1871
a0b66a73 1872 return gc;
594fa265 1873}
8fa0c9bf 1874EXPORT_SYMBOL_GPL(gpiochip_find);
d2876d08 1875
a0b66a73 1876static int gpiochip_match_name(struct gpio_chip *gc, void *data)
79697ef9
AC
1877{
1878 const char *name = data;
1879
a0b66a73 1880 return !strcmp(gc->label, name);
79697ef9
AC
1881}
1882
1883static struct gpio_chip *find_chip_by_name(const char *name)
1884{
1885 return gpiochip_find((void *)name, gpiochip_match_name);
1886}
1887
14250520
LW
1888#ifdef CONFIG_GPIOLIB_IRQCHIP
1889
1890/*
1891 * The following is irqchip helper code for gpiochips.
1892 */
1893
9411e3aa
AS
1894static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
1895{
1896 struct gpio_irq_chip *girq = &gc->irq;
1897
1898 if (!girq->init_hw)
1899 return 0;
1900
1901 return girq->init_hw(gc);
1902}
1903
5fbe5b58 1904static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb 1905{
5fbe5b58
LW
1906 struct gpio_irq_chip *girq = &gc->irq;
1907
1908 if (!girq->init_valid_mask)
79b804cb
MW
1909 return 0;
1910
5fbe5b58
LW
1911 girq->valid_mask = gpiochip_allocate_mask(gc);
1912 if (!girq->valid_mask)
79b804cb
MW
1913 return -ENOMEM;
1914
5fbe5b58
LW
1915 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
1916
79b804cb
MW
1917 return 0;
1918}
1919
a0b66a73 1920static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 1921{
a0b66a73
LW
1922 bitmap_free(gc->irq.valid_mask);
1923 gc->irq.valid_mask = NULL;
79b804cb
MW
1924}
1925
a0b66a73 1926bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc,
64ff2c8e 1927 unsigned int offset)
79b804cb 1928{
a0b66a73 1929 if (!gpiochip_line_is_valid(gc, offset))
726cb3ba 1930 return false;
79b804cb 1931 /* No mask means all valid */
a0b66a73 1932 if (likely(!gc->irq.valid_mask))
79b804cb 1933 return true;
a0b66a73 1934 return test_bit(offset, gc->irq.valid_mask);
79b804cb 1935}
64ff2c8e 1936EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
79b804cb 1937
14250520 1938/**
d245b3f9 1939 * gpiochip_set_cascaded_irqchip() - connects a cascaded irqchip to a gpiochip
4892d3a6 1940 * @gc: the gpiochip to set the irqchip chain to
14250520 1941 * @parent_irq: the irq number corresponding to the parent IRQ for this
72780ce5 1942 * cascaded irqchip
14250520 1943 * @parent_handler: the parent interrupt handler for the accumulated IRQ
3f97d5fc
LW
1944 * coming out of the gpiochip. If the interrupt is nested rather than
1945 * cascaded, pass NULL in this handler argument
14250520 1946 */
4892d3a6 1947static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gc,
6f79309a 1948 unsigned int parent_irq,
d245b3f9 1949 irq_flow_handler_t parent_handler)
14250520 1950{
4892d3a6
LW
1951 struct gpio_irq_chip *girq = &gc->irq;
1952 struct device *dev = &gc->gpiodev->dev;
1953
1954 if (!girq->domain) {
1955 chip_err(gc, "called %s before setting up irqchip\n",
83141a77 1956 __func__);
1c8732bb
LW
1957 return;
1958 }
1959
3f97d5fc 1960 if (parent_handler) {
4892d3a6
LW
1961 if (gc->can_sleep) {
1962 chip_err(gc,
b1911710 1963 "you cannot have chained interrupts on a chip that may sleep\n");
3f97d5fc
LW
1964 return;
1965 }
4892d3a6
LW
1966 girq->parents = devm_kcalloc(dev, 1,
1967 sizeof(*girq->parents),
1968 GFP_KERNEL);
1969 if (!girq->parents) {
1970 chip_err(gc, "out of memory allocating parent IRQ\n");
1971 return;
1972 }
1973 girq->parents[0] = parent_irq;
1974 girq->num_parents = 1;
3f97d5fc
LW
1975 /*
1976 * The parent irqchip is already using the chip_data for this
1977 * irqchip, so our callbacks simply use the handler_data.
1978 */
f7f87753 1979 irq_set_chained_handler_and_data(parent_irq, parent_handler,
4892d3a6 1980 gc);
3f97d5fc 1981 }
14250520 1982}
d245b3f9 1983
d245b3f9
LW
1984/**
1985 * gpiochip_set_nested_irqchip() - connects a nested irqchip to a gpiochip
a0b66a73 1986 * @gc: the gpiochip to set the irqchip nested handler to
d245b3f9
LW
1987 * @irqchip: the irqchip to nest to the gpiochip
1988 * @parent_irq: the irq number corresponding to the parent IRQ for this
1989 * nested irqchip
1990 */
a0b66a73 1991void gpiochip_set_nested_irqchip(struct gpio_chip *gc,
d245b3f9 1992 struct irq_chip *irqchip,
6f79309a 1993 unsigned int parent_irq)
d245b3f9 1994{
a0b66a73 1995 gpiochip_set_cascaded_irqchip(gc, parent_irq, NULL);
d245b3f9
LW
1996}
1997EXPORT_SYMBOL_GPL(gpiochip_set_nested_irqchip);
1998
fdd61a01
LW
1999#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2000
2001/**
2002 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
2003 * to a gpiochip
2004 * @gc: the gpiochip to set the irqchip hierarchical handler to
2005 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
2006 * will then percolate up to the parent
2007 */
2008static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
2009 struct irq_chip *irqchip)
2010{
2011 /* DT will deal with mapping each IRQ as we go along */
2012 if (is_of_node(gc->irq.fwnode))
2013 return;
2014
2015 /*
2016 * This is for legacy and boardfile "irqchip" fwnodes: allocate
2017 * irqs upfront instead of dynamically since we don't have the
2018 * dynamic type of allocation that hardware description languages
2019 * provide. Once all GPIO drivers using board files are gone from
2020 * the kernel we can delete this code, but for a transitional period
2021 * it is necessary to keep this around.
2022 */
2023 if (is_fwnode_irqchip(gc->irq.fwnode)) {
2024 int i;
2025 int ret;
2026
2027 for (i = 0; i < gc->ngpio; i++) {
2028 struct irq_fwspec fwspec;
2029 unsigned int parent_hwirq;
2030 unsigned int parent_type;
2031 struct gpio_irq_chip *girq = &gc->irq;
2032
2033 /*
2034 * We call the child to parent translation function
2035 * only to check if the child IRQ is valid or not.
2036 * Just pick the rising edge type here as that is what
2037 * we likely need to support.
2038 */
2039 ret = girq->child_to_parent_hwirq(gc, i,
2040 IRQ_TYPE_EDGE_RISING,
2041 &parent_hwirq,
2042 &parent_type);
2043 if (ret) {
2044 chip_err(gc, "skip set-up on hwirq %d\n",
2045 i);
2046 continue;
2047 }
2048
2049 fwspec.fwnode = gc->irq.fwnode;
2050 /* This is the hwirq for the GPIO line side of things */
2051 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
2052 /* Just pick something */
2053 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
2054 fwspec.param_count = 2;
2055 ret = __irq_domain_alloc_irqs(gc->irq.domain,
2056 /* just pick something */
2057 -1,
2058 1,
2059 NUMA_NO_NODE,
2060 &fwspec,
2061 false,
2062 NULL);
2063 if (ret < 0) {
2064 chip_err(gc,
2065 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
2066 i, parent_hwirq,
2067 ret);
2068 }
2069 }
2070 }
2071
2072 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
2073
2074 return;
2075}
2076
2077static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
2078 struct irq_fwspec *fwspec,
2079 unsigned long *hwirq,
2080 unsigned int *type)
2081{
2082 /* We support standard DT translation */
2083 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
2084 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
2085 }
2086
2087 /* This is for board files and others not using DT */
2088 if (is_fwnode_irqchip(fwspec->fwnode)) {
2089 int ret;
2090
2091 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
2092 if (ret)
2093 return ret;
2094 WARN_ON(*type == IRQ_TYPE_NONE);
2095 return 0;
2096 }
2097 return -EINVAL;
2098}
2099
2100static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
2101 unsigned int irq,
2102 unsigned int nr_irqs,
2103 void *data)
2104{
2105 struct gpio_chip *gc = d->host_data;
2106 irq_hw_number_t hwirq;
2107 unsigned int type = IRQ_TYPE_NONE;
2108 struct irq_fwspec *fwspec = data;
24258761 2109 void *parent_arg;
fdd61a01
LW
2110 unsigned int parent_hwirq;
2111 unsigned int parent_type;
2112 struct gpio_irq_chip *girq = &gc->irq;
2113 int ret;
2114
2115 /*
2116 * The nr_irqs parameter is always one except for PCI multi-MSI
2117 * so this should not happen.
2118 */
2119 WARN_ON(nr_irqs != 1);
2120
2121 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
2122 if (ret)
2123 return ret;
2124
366950ee 2125 chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
fdd61a01
LW
2126
2127 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
2128 &parent_hwirq, &parent_type);
2129 if (ret) {
2130 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
2131 return ret;
2132 }
366950ee 2133 chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq);
fdd61a01
LW
2134
2135 /*
2136 * We set handle_bad_irq because the .set_type() should
2137 * always be invoked and set the right type of handler.
2138 */
2139 irq_domain_set_info(d,
2140 irq,
2141 hwirq,
2142 gc->irq.chip,
2143 gc,
2144 girq->handler,
2145 NULL, NULL);
2146 irq_set_probe(irq);
2147
fdd61a01 2148 /* This parent only handles asserted level IRQs */
24258761
KH
2149 parent_arg = girq->populate_parent_alloc_arg(gc, parent_hwirq, parent_type);
2150 if (!parent_arg)
2151 return -ENOMEM;
2152
366950ee 2153 chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
fdd61a01 2154 irq, parent_hwirq);
c34f6dc8 2155 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
24258761 2156 ret = irq_domain_alloc_irqs_parent(d, irq, 1, parent_arg);
880b7cf2
KH
2157 /*
2158 * If the parent irqdomain is msi, the interrupts have already
2159 * been allocated, so the EEXIST is good.
2160 */
2161 if (irq_domain_is_msi(d->parent) && (ret == -EEXIST))
2162 ret = 0;
fdd61a01
LW
2163 if (ret)
2164 chip_err(gc,
2165 "failed to allocate parent hwirq %d for hwirq %lu\n",
2166 parent_hwirq, hwirq);
2167
24258761 2168 kfree(parent_arg);
fdd61a01
LW
2169 return ret;
2170}
2171
a0b66a73 2172static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc,
fdd61a01
LW
2173 unsigned int offset)
2174{
2175 return offset;
2176}
2177
2178static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
2179{
2180 ops->activate = gpiochip_irq_domain_activate;
2181 ops->deactivate = gpiochip_irq_domain_deactivate;
2182 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
2183 ops->free = irq_domain_free_irqs_common;
2184
2185 /*
2186 * We only allow overriding the translate() function for
2187 * hierarchical chips, and this should only be done if the user
2188 * really need something other than 1:1 translation.
2189 */
2190 if (!ops->translate)
2191 ops->translate = gpiochip_hierarchy_irq_domain_translate;
2192}
2193
2194static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
2195{
2196 if (!gc->irq.child_to_parent_hwirq ||
2197 !gc->irq.fwnode) {
2198 chip_err(gc, "missing irqdomain vital data\n");
2199 return -EINVAL;
2200 }
2201
2202 if (!gc->irq.child_offset_to_irq)
2203 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
2204
24258761
KH
2205 if (!gc->irq.populate_parent_alloc_arg)
2206 gc->irq.populate_parent_alloc_arg =
fdd61a01
LW
2207 gpiochip_populate_parent_fwspec_twocell;
2208
2209 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
2210
2211 gc->irq.domain = irq_domain_create_hierarchy(
2212 gc->irq.parent_domain,
2213 0,
2214 gc->ngpio,
2215 gc->irq.fwnode,
2216 &gc->irq.child_irq_domain_ops,
2217 gc);
2218
2219 if (!gc->irq.domain)
2220 return -ENOMEM;
2221
2222 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
2223
2224 return 0;
2225}
2226
2227static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
2228{
2229 return !!gc->irq.parent_domain;
2230}
2231
a0b66a73 2232void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc,
fdd61a01
LW
2233 unsigned int parent_hwirq,
2234 unsigned int parent_type)
2235{
24258761
KH
2236 struct irq_fwspec *fwspec;
2237
2238 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
2239 if (!fwspec)
2240 return NULL;
2241
a0b66a73 2242 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
2243 fwspec->param_count = 2;
2244 fwspec->param[0] = parent_hwirq;
2245 fwspec->param[1] = parent_type;
24258761
KH
2246
2247 return fwspec;
fdd61a01
LW
2248}
2249EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
2250
a0b66a73 2251void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc,
fdd61a01
LW
2252 unsigned int parent_hwirq,
2253 unsigned int parent_type)
2254{
24258761
KH
2255 struct irq_fwspec *fwspec;
2256
2257 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
2258 if (!fwspec)
2259 return NULL;
2260
a0b66a73 2261 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
2262 fwspec->param_count = 4;
2263 fwspec->param[0] = 0;
2264 fwspec->param[1] = parent_hwirq;
2265 fwspec->param[2] = 0;
2266 fwspec->param[3] = parent_type;
24258761
KH
2267
2268 return fwspec;
fdd61a01
LW
2269}
2270EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
2271
2272#else
2273
2274static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
2275{
2276 return -EINVAL;
2277}
2278
2279static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
2280{
2281 return false;
2282}
2283
2284#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
2285
14250520
LW
2286/**
2287 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
2288 * @d: the irqdomain used by this irqchip
2289 * @irq: the global irq number used by this GPIO irqchip irq
2290 * @hwirq: the local IRQ/GPIO line offset on this gpiochip
2291 *
2292 * This function will set up the mapping for a certain IRQ line on a
2293 * gpiochip by assigning the gpiochip as chip data, and using the irqchip
2294 * stored inside the gpiochip.
2295 */
1b95b4eb
TR
2296int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
2297 irq_hw_number_t hwirq)
14250520 2298{
a0b66a73 2299 struct gpio_chip *gc = d->host_data;
d377f56f 2300 int ret = 0;
14250520 2301
a0b66a73 2302 if (!gpiochip_irqchip_irq_valid(gc, hwirq))
dc749a09
GS
2303 return -ENXIO;
2304
a0b66a73 2305 irq_set_chip_data(irq, gc);
a0a8bcf4
GS
2306 /*
2307 * This lock class tells lockdep that GPIO irqs are in a different
2308 * category than their parents, so it won't report false recursion.
2309 */
a0b66a73
LW
2310 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
2311 irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler);
d245b3f9 2312 /* Chips that use nested thread handlers have them marked */
a0b66a73 2313 if (gc->irq.threaded)
1c8732bb 2314 irq_set_nested_thread(irq, 1);
14250520 2315 irq_set_noprobe(irq);
23393d49 2316
a0b66a73
LW
2317 if (gc->irq.num_parents == 1)
2318 ret = irq_set_parent(irq, gc->irq.parents[0]);
2319 else if (gc->irq.map)
2320 ret = irq_set_parent(irq, gc->irq.map[hwirq]);
e0d89728 2321
d377f56f
LW
2322 if (ret < 0)
2323 return ret;
e0d89728 2324
1333b90f
LW
2325 /*
2326 * No set-up of the hardware will happen if IRQ_TYPE_NONE
2327 * is passed as default type.
2328 */
a0b66a73
LW
2329 if (gc->irq.default_type != IRQ_TYPE_NONE)
2330 irq_set_irq_type(irq, gc->irq.default_type);
14250520
LW
2331
2332 return 0;
2333}
1b95b4eb 2334EXPORT_SYMBOL_GPL(gpiochip_irq_map);
14250520 2335
1b95b4eb 2336void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
c3626fde 2337{
a0b66a73 2338 struct gpio_chip *gc = d->host_data;
1c8732bb 2339
a0b66a73 2340 if (gc->irq.threaded)
1c8732bb 2341 irq_set_nested_thread(irq, 0);
c3626fde
LW
2342 irq_set_chip_and_handler(irq, NULL, NULL);
2343 irq_set_chip_data(irq, NULL);
2344}
1b95b4eb 2345EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
c3626fde 2346
14250520
LW
2347static const struct irq_domain_ops gpiochip_domain_ops = {
2348 .map = gpiochip_irq_map,
c3626fde 2349 .unmap = gpiochip_irq_unmap,
14250520
LW
2350 /* Virtually all GPIO irqchips are twocell:ed */
2351 .xlate = irq_domain_xlate_twocell,
2352};
2353
fdd61a01
LW
2354/*
2355 * TODO: move these activate/deactivate in under the hierarchicial
2356 * irqchip implementation as static once SPMI and SSBI (all external
2357 * users) are phased over.
2358 */
ef74f70e
BM
2359/**
2360 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
2361 * @domain: The IRQ domain used by this IRQ chip
2362 * @data: Outermost irq_data associated with the IRQ
2363 * @reserve: If set, only reserve an interrupt vector instead of assigning one
2364 *
2365 * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
2366 * used as the activate function for the &struct irq_domain_ops. The host_data
2367 * for the IRQ domain must be the &struct gpio_chip.
2368 */
2369int gpiochip_irq_domain_activate(struct irq_domain *domain,
2370 struct irq_data *data, bool reserve)
2371{
a0b66a73 2372 struct gpio_chip *gc = domain->host_data;
ef74f70e 2373
a0b66a73 2374 return gpiochip_lock_as_irq(gc, data->hwirq);
ef74f70e
BM
2375}
2376EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
2377
2378/**
2379 * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
2380 * @domain: The IRQ domain used by this IRQ chip
2381 * @data: Outermost irq_data associated with the IRQ
2382 *
2383 * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
2384 * be used as the deactivate function for the &struct irq_domain_ops. The
2385 * host_data for the IRQ domain must be the &struct gpio_chip.
2386 */
2387void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
2388 struct irq_data *data)
2389{
a0b66a73 2390 struct gpio_chip *gc = domain->host_data;
ef74f70e 2391
a0b66a73 2392 return gpiochip_unlock_as_irq(gc, data->hwirq);
ef74f70e
BM
2393}
2394EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
2395
a0b66a73 2396static int gpiochip_to_irq(struct gpio_chip *gc, unsigned offset)
14250520 2397{
a0b66a73 2398 struct irq_domain *domain = gc->irq.domain;
fdd61a01 2399
a0b66a73 2400 if (!gpiochip_irqchip_irq_valid(gc, offset))
4e6b8238 2401 return -ENXIO;
5b76e79c 2402
fdd61a01
LW
2403#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2404 if (irq_domain_is_hierarchy(domain)) {
2405 struct irq_fwspec spec;
2406
2407 spec.fwnode = domain->fwnode;
2408 spec.param_count = 2;
a0b66a73 2409 spec.param[0] = gc->irq.child_offset_to_irq(gc, offset);
fdd61a01
LW
2410 spec.param[1] = IRQ_TYPE_NONE;
2411
2412 return irq_create_fwspec_mapping(&spec);
2413 }
2414#endif
2415
2416 return irq_create_mapping(domain, offset);
14250520
LW
2417}
2418
14250520
LW
2419static int gpiochip_irq_reqres(struct irq_data *d)
2420{
a0b66a73 2421 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
5b76e79c 2422
a0b66a73 2423 return gpiochip_reqres_irq(gc, d->hwirq);
14250520
LW
2424}
2425
2426static void gpiochip_irq_relres(struct irq_data *d)
2427{
a0b66a73 2428 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
14250520 2429
a0b66a73 2430 gpiochip_relres_irq(gc, d->hwirq);
14250520
LW
2431}
2432
461c1a7d 2433static void gpiochip_irq_enable(struct irq_data *d)
14250520 2434{
a0b66a73 2435 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
e0d89728 2436
a0b66a73
LW
2437 gpiochip_enable_irq(gc, d->hwirq);
2438 if (gc->irq.irq_enable)
2439 gc->irq.irq_enable(d);
461c1a7d 2440 else
a0b66a73 2441 gc->irq.chip->irq_unmask(d);
461c1a7d
HV
2442}
2443
2444static void gpiochip_irq_disable(struct irq_data *d)
2445{
a0b66a73 2446 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
461c1a7d 2447
8959b304
LW
2448 /*
2449 * Since we override .irq_disable() we need to mimic the
2450 * behaviour of __irq_disable() in irq/chip.c.
2451 * First call .irq_disable() if it exists, else mimic the
2452 * behaviour of mask_irq() which calls .irq_mask() if
2453 * it exists.
2454 */
a0b66a73
LW
2455 if (gc->irq.irq_disable)
2456 gc->irq.irq_disable(d);
828907ef 2457 else if (gc->irq.chip->irq_mask)
a0b66a73
LW
2458 gc->irq.chip->irq_mask(d);
2459 gpiochip_disable_irq(gc, d->hwirq);
461c1a7d
HV
2460}
2461
a0b66a73 2462static void gpiochip_set_irq_hooks(struct gpio_chip *gc)
ca620f2d 2463{
a0b66a73 2464 struct irq_chip *irqchip = gc->irq.chip;
ca620f2d
HV
2465
2466 if (!irqchip->irq_request_resources &&
2467 !irqchip->irq_release_resources) {
2468 irqchip->irq_request_resources = gpiochip_irq_reqres;
2469 irqchip->irq_release_resources = gpiochip_irq_relres;
2470 }
a0b66a73 2471 if (WARN_ON(gc->irq.irq_enable))
461c1a7d 2472 return;
171948ea
HV
2473 /* Check if the irqchip already has this hook... */
2474 if (irqchip->irq_enable == gpiochip_irq_enable) {
2475 /*
2476 * ...and if so, give a gentle warning that this is bad
2477 * practice.
2478 */
a0b66a73 2479 chip_info(gc,
171948ea
HV
2480 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
2481 return;
2482 }
a0b66a73
LW
2483 gc->irq.irq_enable = irqchip->irq_enable;
2484 gc->irq.irq_disable = irqchip->irq_disable;
461c1a7d
HV
2485 irqchip->irq_enable = gpiochip_irq_enable;
2486 irqchip->irq_disable = gpiochip_irq_disable;
14250520
LW
2487}
2488
e0d89728
TR
2489/**
2490 * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
a0b66a73 2491 * @gc: the GPIO chip to add the IRQ chip to
39c3fd58
AL
2492 * @lock_key: lockdep class for IRQ lock
2493 * @request_key: lockdep class for IRQ request
e0d89728 2494 */
a0b66a73 2495static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
2496 struct lock_class_key *lock_key,
2497 struct lock_class_key *request_key)
e0d89728 2498{
a0b66a73 2499 struct irq_chip *irqchip = gc->irq.chip;
fdd61a01 2500 const struct irq_domain_ops *ops = NULL;
e0d89728
TR
2501 struct device_node *np;
2502 unsigned int type;
2503 unsigned int i;
2504
2505 if (!irqchip)
2506 return 0;
2507
a0b66a73
LW
2508 if (gc->irq.parent_handler && gc->can_sleep) {
2509 chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n");
e0d89728
TR
2510 return -EINVAL;
2511 }
2512
a0b66a73
LW
2513 np = gc->gpiodev->dev.of_node;
2514 type = gc->irq.default_type;
e0d89728
TR
2515
2516 /*
2517 * Specifying a default trigger is a terrible idea if DT or ACPI is
2518 * used to configure the interrupts, as you may end up with
2519 * conflicting triggers. Tell the user, and reset to NONE.
2520 */
2521 if (WARN(np && type != IRQ_TYPE_NONE,
2522 "%s: Ignoring %u default trigger\n", np->full_name, type))
2523 type = IRQ_TYPE_NONE;
2524
a0b66a73
LW
2525 if (has_acpi_companion(gc->parent) && type != IRQ_TYPE_NONE) {
2526 acpi_handle_warn(ACPI_HANDLE(gc->parent),
e0d89728
TR
2527 "Ignoring %u default trigger\n", type);
2528 type = IRQ_TYPE_NONE;
2529 }
2530
a0b66a73
LW
2531 gc->to_irq = gpiochip_to_irq;
2532 gc->irq.default_type = type;
2533 gc->irq.lock_key = lock_key;
2534 gc->irq.request_key = request_key;
e0d89728 2535
fdd61a01 2536 /* If a parent irqdomain is provided, let's build a hierarchy */
a0b66a73
LW
2537 if (gpiochip_hierarchy_is_hierarchical(gc)) {
2538 int ret = gpiochip_hierarchy_add_domain(gc);
fdd61a01
LW
2539 if (ret)
2540 return ret;
2541 } else {
2542 /* Some drivers provide custom irqdomain ops */
a0b66a73
LW
2543 if (gc->irq.domain_ops)
2544 ops = gc->irq.domain_ops;
fdd61a01
LW
2545
2546 if (!ops)
2547 ops = &gpiochip_domain_ops;
a0b66a73
LW
2548 gc->irq.domain = irq_domain_add_simple(np,
2549 gc->ngpio,
2550 gc->irq.first,
2551 ops, gc);
2552 if (!gc->irq.domain)
fdd61a01
LW
2553 return -EINVAL;
2554 }
e0d89728 2555
a0b66a73
LW
2556 if (gc->irq.parent_handler) {
2557 void *data = gc->irq.parent_handler_data ?: gc;
e0d89728 2558
a0b66a73 2559 for (i = 0; i < gc->irq.num_parents; i++) {
e0d89728
TR
2560 /*
2561 * The parent IRQ chip is already using the chip_data
2562 * for this IRQ chip, so our callbacks simply use the
2563 * handler_data.
2564 */
a0b66a73
LW
2565 irq_set_chained_handler_and_data(gc->irq.parents[i],
2566 gc->irq.parent_handler,
e0d89728
TR
2567 data);
2568 }
e0d89728
TR
2569 }
2570
a0b66a73 2571 gpiochip_set_irq_hooks(gc);
ca620f2d 2572
a0b66a73 2573 acpi_gpiochip_request_interrupts(gc);
e0d89728
TR
2574
2575 return 0;
2576}
2577
14250520
LW
2578/**
2579 * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
a0b66a73 2580 * @gc: the gpiochip to remove the irqchip from
14250520
LW
2581 *
2582 * This is called only from gpiochip_remove()
2583 */
a0b66a73 2584static void gpiochip_irqchip_remove(struct gpio_chip *gc)
14250520 2585{
a0b66a73 2586 struct irq_chip *irqchip = gc->irq.chip;
39e5f096 2587 unsigned int offset;
c3626fde 2588
a0b66a73 2589 acpi_gpiochip_free_interrupts(gc);
afa82fab 2590
a0b66a73
LW
2591 if (irqchip && gc->irq.parent_handler) {
2592 struct gpio_irq_chip *irq = &gc->irq;
39e5f096
TR
2593 unsigned int i;
2594
2595 for (i = 0; i < irq->num_parents; i++)
2596 irq_set_chained_handler_and_data(irq->parents[i],
2597 NULL, NULL);
25e4fe92
DES
2598 }
2599
c3626fde 2600 /* Remove all IRQ mappings and delete the domain */
a0b66a73 2601 if (gc->irq.domain) {
39e5f096
TR
2602 unsigned int irq;
2603
a0b66a73
LW
2604 for (offset = 0; offset < gc->ngpio; offset++) {
2605 if (!gpiochip_irqchip_irq_valid(gc, offset))
79b804cb 2606 continue;
f0fbe7bc 2607
a0b66a73 2608 irq = irq_find_mapping(gc->irq.domain, offset);
f0fbe7bc 2609 irq_dispose_mapping(irq);
79b804cb 2610 }
f0fbe7bc 2611
a0b66a73 2612 irq_domain_remove(gc->irq.domain);
c3626fde 2613 }
14250520 2614
461c1a7d
HV
2615 if (irqchip) {
2616 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
2617 irqchip->irq_request_resources = NULL;
2618 irqchip->irq_release_resources = NULL;
2619 }
2620 if (irqchip->irq_enable == gpiochip_irq_enable) {
a0b66a73
LW
2621 irqchip->irq_enable = gc->irq.irq_enable;
2622 irqchip->irq_disable = gc->irq.irq_disable;
461c1a7d 2623 }
14250520 2624 }
a0b66a73
LW
2625 gc->irq.irq_enable = NULL;
2626 gc->irq.irq_disable = NULL;
2627 gc->irq.chip = NULL;
79b804cb 2628
a0b66a73 2629 gpiochip_irqchip_free_valid_mask(gc);
14250520
LW
2630}
2631
2632/**
739e6f59 2633 * gpiochip_irqchip_add_key() - adds an irqchip to a gpiochip
a0b66a73 2634 * @gc: the gpiochip to add the irqchip to
14250520
LW
2635 * @irqchip: the irqchip to add to the gpiochip
2636 * @first_irq: if not dynamically assigned, the base (first) IRQ to
2637 * allocate gpiochip irqs from
2638 * @handler: the irq handler to use (often a predefined irq core function)
1333b90f
LW
2639 * @type: the default type for IRQs on this irqchip, pass IRQ_TYPE_NONE
2640 * to have the core avoid setting up any default type in the hardware.
60ed54ca 2641 * @threaded: whether this irqchip uses a nested thread handler
39c3fd58
AL
2642 * @lock_key: lockdep class for IRQ lock
2643 * @request_key: lockdep class for IRQ request
14250520
LW
2644 *
2645 * This function closely associates a certain irqchip with a certain
2646 * gpiochip, providing an irq domain to translate the local IRQs to
2647 * global irqs in the gpiolib core, and making sure that the gpiochip
2648 * is passed as chip data to all related functions. Driver callbacks
09dd5f9e 2649 * need to use gpiochip_get_data() to get their local state containers back
14250520
LW
2650 * from the gpiochip passed as chip data. An irqdomain will be stored
2651 * in the gpiochip that shall be used by the driver to handle IRQ number
2652 * translation. The gpiochip will need to be initialized and registered
2653 * before calling this function.
2654 *
c3626fde
LW
2655 * This function will handle two cell:ed simple IRQs and assumes all
2656 * the pins on the gpiochip can generate a unique IRQ. Everything else
14250520
LW
2657 * need to be open coded.
2658 */
a0b66a73 2659int gpiochip_irqchip_add_key(struct gpio_chip *gc,
739e6f59
LW
2660 struct irq_chip *irqchip,
2661 unsigned int first_irq,
2662 irq_flow_handler_t handler,
2663 unsigned int type,
60ed54ca 2664 bool threaded,
39c3fd58
AL
2665 struct lock_class_key *lock_key,
2666 struct lock_class_key *request_key)
14250520
LW
2667{
2668 struct device_node *of_node;
14250520 2669
a0b66a73 2670 if (!gc || !irqchip)
14250520
LW
2671 return -EINVAL;
2672
a0b66a73 2673 if (!gc->parent) {
262b9011 2674 chip_err(gc, "missing gpiochip .dev parent pointer\n");
14250520
LW
2675 return -EINVAL;
2676 }
a0b66a73
LW
2677 gc->irq.threaded = threaded;
2678 of_node = gc->parent->of_node;
14250520
LW
2679#ifdef CONFIG_OF_GPIO
2680 /*
20a8a968 2681 * If the gpiochip has an assigned OF node this takes precedence
a0b66a73 2682 * FIXME: get rid of this and use gc->parent->of_node
c88402c2 2683 * everywhere
14250520 2684 */
a0b66a73
LW
2685 if (gc->of_node)
2686 of_node = gc->of_node;
14250520 2687#endif
332e99d5 2688 /*
0a1e0053 2689 * Specifying a default trigger is a terrible idea if DT or ACPI is
332e99d5
MZ
2690 * used to configure the interrupts, as you may end-up with
2691 * conflicting triggers. Tell the user, and reset to NONE.
2692 */
2693 if (WARN(of_node && type != IRQ_TYPE_NONE,
7eb6ce2f 2694 "%pOF: Ignoring %d default trigger\n", of_node, type))
332e99d5 2695 type = IRQ_TYPE_NONE;
a0b66a73
LW
2696 if (has_acpi_companion(gc->parent) && type != IRQ_TYPE_NONE) {
2697 acpi_handle_warn(ACPI_HANDLE(gc->parent),
0a1e0053
MW
2698 "Ignoring %d default trigger\n", type);
2699 type = IRQ_TYPE_NONE;
2700 }
332e99d5 2701
a0b66a73
LW
2702 gc->irq.chip = irqchip;
2703 gc->irq.handler = handler;
2704 gc->irq.default_type = type;
2705 gc->to_irq = gpiochip_to_irq;
2706 gc->irq.lock_key = lock_key;
2707 gc->irq.request_key = request_key;
2708 gc->irq.domain = irq_domain_add_simple(of_node,
2709 gc->ngpio, first_irq,
2710 &gpiochip_domain_ops, gc);
2711 if (!gc->irq.domain) {
2712 gc->irq.chip = NULL;
14250520
LW
2713 return -EINVAL;
2714 }
8b67a1f0 2715
a0b66a73 2716 gpiochip_set_irq_hooks(gc);
14250520 2717
a0b66a73 2718 acpi_gpiochip_request_interrupts(gc);
afa82fab 2719
14250520
LW
2720 return 0;
2721}
739e6f59 2722EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_key);
14250520
LW
2723
2724#else /* CONFIG_GPIOLIB_IRQCHIP */
2725
a0b66a73 2726static inline int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
2727 struct lock_class_key *lock_key,
2728 struct lock_class_key *request_key)
e0d89728
TR
2729{
2730 return 0;
2731}
a0b66a73 2732static void gpiochip_irqchip_remove(struct gpio_chip *gc) {}
9411e3aa 2733
a0b66a73 2734static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
9411e3aa
AS
2735{
2736 return 0;
2737}
2738
a0b66a73 2739static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb
MW
2740{
2741 return 0;
2742}
a0b66a73 2743static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 2744{ }
14250520
LW
2745
2746#endif /* CONFIG_GPIOLIB_IRQCHIP */
2747
c771c2f4
JG
2748/**
2749 * gpiochip_generic_request() - request the gpio function for a pin
a0b66a73 2750 * @gc: the gpiochip owning the GPIO
c771c2f4
JG
2751 * @offset: the offset of the GPIO to request for GPIO function
2752 */
a0b66a73 2753int gpiochip_generic_request(struct gpio_chip *gc, unsigned offset)
c771c2f4 2754{
89ad556b 2755#ifdef CONFIG_PINCTRL
a0b66a73 2756 if (list_empty(&gc->gpiodev->pin_ranges))
89ad556b
TR
2757 return 0;
2758#endif
2ab73c6d 2759
a0b66a73 2760 return pinctrl_gpio_request(gc->gpiodev->base + offset);
c771c2f4
JG
2761}
2762EXPORT_SYMBOL_GPL(gpiochip_generic_request);
2763
2764/**
2765 * gpiochip_generic_free() - free the gpio function from a pin
a0b66a73 2766 * @gc: the gpiochip to request the gpio function for
c771c2f4
JG
2767 * @offset: the offset of the GPIO to free from GPIO function
2768 */
a0b66a73 2769void gpiochip_generic_free(struct gpio_chip *gc, unsigned offset)
c771c2f4 2770{
a0b66a73 2771 pinctrl_gpio_free(gc->gpiodev->base + offset);
c771c2f4
JG
2772}
2773EXPORT_SYMBOL_GPL(gpiochip_generic_free);
2774
2956b5d9
MW
2775/**
2776 * gpiochip_generic_config() - apply configuration for a pin
a0b66a73 2777 * @gc: the gpiochip owning the GPIO
2956b5d9
MW
2778 * @offset: the offset of the GPIO to apply the configuration
2779 * @config: the configuration to be applied
2780 */
a0b66a73 2781int gpiochip_generic_config(struct gpio_chip *gc, unsigned offset,
2956b5d9
MW
2782 unsigned long config)
2783{
a0b66a73 2784 return pinctrl_gpio_set_config(gc->gpiodev->base + offset, config);
2956b5d9
MW
2785}
2786EXPORT_SYMBOL_GPL(gpiochip_generic_config);
2787
f23f1516 2788#ifdef CONFIG_PINCTRL
165adc9c 2789
586a87e6
CR
2790/**
2791 * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
a0b66a73 2792 * @gc: the gpiochip to add the range for
d32651f6 2793 * @pctldev: the pin controller to map to
586a87e6
CR
2794 * @gpio_offset: the start offset in the current gpio_chip number space
2795 * @pin_group: name of the pin group inside the pin controller
973c1714
CL
2796 *
2797 * Calling this function directly from a DeviceTree-supported
2798 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2799 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2800 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
586a87e6 2801 */
a0b66a73 2802int gpiochip_add_pingroup_range(struct gpio_chip *gc,
586a87e6
CR
2803 struct pinctrl_dev *pctldev,
2804 unsigned int gpio_offset, const char *pin_group)
2805{
2806 struct gpio_pin_range *pin_range;
a0b66a73 2807 struct gpio_device *gdev = gc->gpiodev;
586a87e6
CR
2808 int ret;
2809
2810 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
2811 if (!pin_range) {
a0b66a73 2812 chip_err(gc, "failed to allocate pin ranges\n");
586a87e6
CR
2813 return -ENOMEM;
2814 }
2815
2816 /* Use local offset as range ID */
2817 pin_range->range.id = gpio_offset;
a0b66a73
LW
2818 pin_range->range.gc = gc;
2819 pin_range->range.name = gc->label;
fdeb8e15 2820 pin_range->range.base = gdev->base + gpio_offset;
586a87e6
CR
2821 pin_range->pctldev = pctldev;
2822
2823 ret = pinctrl_get_group_pins(pctldev, pin_group,
2824 &pin_range->range.pins,
2825 &pin_range->range.npins);
61c6375d
MN
2826 if (ret < 0) {
2827 kfree(pin_range);
586a87e6 2828 return ret;
61c6375d 2829 }
586a87e6
CR
2830
2831 pinctrl_add_gpio_range(pctldev, &pin_range->range);
2832
a0b66a73 2833 chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n",
1a2a99c6 2834 gpio_offset, gpio_offset + pin_range->range.npins - 1,
586a87e6
CR
2835 pinctrl_dev_get_devname(pctldev), pin_group);
2836
20ec3e39 2837 list_add_tail(&pin_range->node, &gdev->pin_ranges);
586a87e6
CR
2838
2839 return 0;
2840}
2841EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
2842
3f0f8670
LW
2843/**
2844 * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
a0b66a73 2845 * @gc: the gpiochip to add the range for
950d55f5 2846 * @pinctl_name: the dev_name() of the pin controller to map to
316511c0
LW
2847 * @gpio_offset: the start offset in the current gpio_chip number space
2848 * @pin_offset: the start offset in the pin controller number space
3f0f8670
LW
2849 * @npins: the number of pins from the offset of each pin space (GPIO and
2850 * pin controller) to accumulate in this range
950d55f5
TR
2851 *
2852 * Returns:
2853 * 0 on success, or a negative error-code on failure.
973c1714
CL
2854 *
2855 * Calling this function directly from a DeviceTree-supported
2856 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2857 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2858 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
3f0f8670 2859 */
a0b66a73 2860int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
316511c0 2861 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 2862 unsigned int npins)
f23f1516
SH
2863{
2864 struct gpio_pin_range *pin_range;
a0b66a73 2865 struct gpio_device *gdev = gc->gpiodev;
b4d4b1f0 2866 int ret;
f23f1516 2867
3f0f8670 2868 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
f23f1516 2869 if (!pin_range) {
a0b66a73 2870 chip_err(gc, "failed to allocate pin ranges\n");
1e63d7b9 2871 return -ENOMEM;
f23f1516
SH
2872 }
2873
3f0f8670 2874 /* Use local offset as range ID */
316511c0 2875 pin_range->range.id = gpio_offset;
a0b66a73
LW
2876 pin_range->range.gc = gc;
2877 pin_range->range.name = gc->label;
fdeb8e15 2878 pin_range->range.base = gdev->base + gpio_offset;
316511c0 2879 pin_range->range.pin_base = pin_offset;
f23f1516 2880 pin_range->range.npins = npins;
192c369c 2881 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
f23f1516 2882 &pin_range->range);
8f23ca1a 2883 if (IS_ERR(pin_range->pctldev)) {
b4d4b1f0 2884 ret = PTR_ERR(pin_range->pctldev);
a0b66a73 2885 chip_err(gc, "could not create pin range\n");
3f0f8670 2886 kfree(pin_range);
b4d4b1f0 2887 return ret;
3f0f8670 2888 }
a0b66a73 2889 chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
1a2a99c6 2890 gpio_offset, gpio_offset + npins - 1,
316511c0
LW
2891 pinctl_name,
2892 pin_offset, pin_offset + npins - 1);
f23f1516 2893
20ec3e39 2894 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1e63d7b9
LW
2895
2896 return 0;
f23f1516 2897}
165adc9c 2898EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
f23f1516 2899
3f0f8670
LW
2900/**
2901 * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
a0b66a73 2902 * @gc: the chip to remove all the mappings for
3f0f8670 2903 */
a0b66a73 2904void gpiochip_remove_pin_ranges(struct gpio_chip *gc)
f23f1516
SH
2905{
2906 struct gpio_pin_range *pin_range, *tmp;
a0b66a73 2907 struct gpio_device *gdev = gc->gpiodev;
f23f1516 2908
20ec3e39 2909 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
f23f1516
SH
2910 list_del(&pin_range->node);
2911 pinctrl_remove_gpio_range(pin_range->pctldev,
2912 &pin_range->range);
3f0f8670 2913 kfree(pin_range);
f23f1516
SH
2914 }
2915}
165adc9c
LW
2916EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
2917
2918#endif /* CONFIG_PINCTRL */
f23f1516 2919
d2876d08
DB
2920/* These "optional" allocation calls help prevent drivers from stomping
2921 * on each other, and help provide better diagnostics in debugfs.
2922 * They're called even less than the "set direction" calls.
2923 */
fac9d885 2924static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
d2876d08 2925{
a0b66a73 2926 struct gpio_chip *gc = desc->gdev->chip;
d377f56f 2927 int ret;
d2876d08 2928 unsigned long flags;
3789f5ac 2929 unsigned offset;
d2876d08 2930
18534df4
MS
2931 if (label) {
2932 label = kstrdup_const(label, GFP_KERNEL);
2933 if (!label)
2934 return -ENOMEM;
2935 }
2936
bcabdef1
AC
2937 spin_lock_irqsave(&gpio_lock, flags);
2938
d2876d08 2939 /* NOTE: gpio_request() can be called in early boot,
35e8bb51 2940 * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
d2876d08
DB
2941 */
2942
2943 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
2944 desc_set_label(desc, label ? : "?");
d377f56f 2945 ret = 0;
438d8908 2946 } else {
18534df4 2947 kfree_const(label);
d377f56f 2948 ret = -EBUSY;
7460db56 2949 goto done;
35e8bb51
DB
2950 }
2951
a0b66a73
LW
2952 if (gc->request) {
2953 /* gc->request may sleep */
35e8bb51 2954 spin_unlock_irqrestore(&gpio_lock, flags);
3789f5ac 2955 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
2956 if (gpiochip_line_is_valid(gc, offset))
2957 ret = gc->request(gc, offset);
3789f5ac 2958 else
d377f56f 2959 ret = -EINVAL;
35e8bb51
DB
2960 spin_lock_irqsave(&gpio_lock, flags);
2961
d377f56f 2962 if (ret < 0) {
35e8bb51 2963 desc_set_label(desc, NULL);
18534df4 2964 kfree_const(label);
35e8bb51 2965 clear_bit(FLAG_REQUESTED, &desc->flags);
80b0a602 2966 goto done;
35e8bb51 2967 }
438d8908 2968 }
a0b66a73
LW
2969 if (gc->get_direction) {
2970 /* gc->get_direction may sleep */
80b0a602 2971 spin_unlock_irqrestore(&gpio_lock, flags);
372e722e 2972 gpiod_get_direction(desc);
80b0a602
MN
2973 spin_lock_irqsave(&gpio_lock, flags);
2974 }
77c2d792
MW
2975done:
2976 spin_unlock_irqrestore(&gpio_lock, flags);
51c1064e
BG
2977 atomic_notifier_call_chain(&desc->gdev->notifier,
2978 GPIOLINE_CHANGED_REQUESTED, desc);
d377f56f 2979 return ret;
77c2d792
MW
2980}
2981
fdeb8e15
LW
2982/*
2983 * This descriptor validation needs to be inserted verbatim into each
2984 * function taking a descriptor, so we need to use a preprocessor
54d77198
LW
2985 * macro to avoid endless duplication. If the desc is NULL it is an
2986 * optional GPIO and calls should just bail out.
fdeb8e15 2987 */
a746a232
RV
2988static int validate_desc(const struct gpio_desc *desc, const char *func)
2989{
2990 if (!desc)
2991 return 0;
2992 if (IS_ERR(desc)) {
2993 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
2994 return PTR_ERR(desc);
2995 }
2996 if (!desc->gdev) {
2997 pr_warn("%s: invalid GPIO (no device)\n", func);
2998 return -EINVAL;
2999 }
3000 if (!desc->gdev->chip) {
3001 dev_warn(&desc->gdev->dev,
3002 "%s: backing chip is gone\n", func);
3003 return 0;
3004 }
3005 return 1;
3006}
3007
fdeb8e15 3008#define VALIDATE_DESC(desc) do { \
a746a232
RV
3009 int __valid = validate_desc(desc, __func__); \
3010 if (__valid <= 0) \
3011 return __valid; \
3012 } while (0)
fdeb8e15
LW
3013
3014#define VALIDATE_DESC_VOID(desc) do { \
a746a232
RV
3015 int __valid = validate_desc(desc, __func__); \
3016 if (__valid <= 0) \
fdeb8e15 3017 return; \
a746a232 3018 } while (0)
fdeb8e15 3019
0eb4c6c2 3020int gpiod_request(struct gpio_desc *desc, const char *label)
77c2d792 3021{
d377f56f 3022 int ret = -EPROBE_DEFER;
fdeb8e15 3023 struct gpio_device *gdev;
77c2d792 3024
fdeb8e15
LW
3025 VALIDATE_DESC(desc);
3026 gdev = desc->gdev;
77c2d792 3027
fdeb8e15 3028 if (try_module_get(gdev->owner)) {
d377f56f
LW
3029 ret = gpiod_request_commit(desc, label);
3030 if (ret < 0)
fdeb8e15 3031 module_put(gdev->owner);
33a68e86
LW
3032 else
3033 get_device(&gdev->dev);
77c2d792
MW
3034 }
3035
d377f56f
LW
3036 if (ret)
3037 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
77c2d792 3038
d377f56f 3039 return ret;
d2876d08 3040}
372e722e 3041
fac9d885 3042static bool gpiod_free_commit(struct gpio_desc *desc)
d2876d08 3043{
77c2d792 3044 bool ret = false;
d2876d08 3045 unsigned long flags;
a0b66a73 3046 struct gpio_chip *gc;
d2876d08 3047
3d599d1c
UKK
3048 might_sleep();
3049
372e722e 3050 gpiod_unexport(desc);
d8f388d8 3051
d2876d08
DB
3052 spin_lock_irqsave(&gpio_lock, flags);
3053
a0b66a73
LW
3054 gc = desc->gdev->chip;
3055 if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) {
3056 if (gc->free) {
35e8bb51 3057 spin_unlock_irqrestore(&gpio_lock, flags);
a0b66a73
LW
3058 might_sleep_if(gc->can_sleep);
3059 gc->free(gc, gpio_chip_hwgpio(desc));
35e8bb51
DB
3060 spin_lock_irqsave(&gpio_lock, flags);
3061 }
18534df4 3062 kfree_const(desc->label);
d2876d08 3063 desc_set_label(desc, NULL);
07697461 3064 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
35e8bb51 3065 clear_bit(FLAG_REQUESTED, &desc->flags);
aca5ce14 3066 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
25553ff0 3067 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
9225d516
DF
3068 clear_bit(FLAG_PULL_UP, &desc->flags);
3069 clear_bit(FLAG_PULL_DOWN, &desc->flags);
2148ad77 3070 clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
f625d460 3071 clear_bit(FLAG_IS_HOGGED, &desc->flags);
63636d95
GU
3072#ifdef CONFIG_OF_DYNAMIC
3073 desc->hog = NULL;
3074#endif
77c2d792
MW
3075 ret = true;
3076 }
d2876d08
DB
3077
3078 spin_unlock_irqrestore(&gpio_lock, flags);
51c1064e
BG
3079 atomic_notifier_call_chain(&desc->gdev->notifier,
3080 GPIOLINE_CHANGED_RELEASED, desc);
3081
77c2d792
MW
3082 return ret;
3083}
3084
0eb4c6c2 3085void gpiod_free(struct gpio_desc *desc)
77c2d792 3086{
fac9d885 3087 if (desc && desc->gdev && gpiod_free_commit(desc)) {
fdeb8e15 3088 module_put(desc->gdev->owner);
33a68e86
LW
3089 put_device(&desc->gdev->dev);
3090 } else {
77c2d792 3091 WARN_ON(extra_checks);
33a68e86 3092 }
d2876d08 3093}
372e722e 3094
d2876d08
DB
3095/**
3096 * gpiochip_is_requested - return string iff signal was requested
a0b66a73 3097 * @gc: controller managing the signal
d2876d08
DB
3098 * @offset: of signal within controller's 0..(ngpio - 1) range
3099 *
3100 * Returns NULL if the GPIO is not currently requested, else a string.
9c8318ff
AC
3101 * The string returned is the label passed to gpio_request(); if none has been
3102 * passed it is a meaningless, non-NULL constant.
d2876d08
DB
3103 *
3104 * This function is for use by GPIO controller drivers. The label can
3105 * help with diagnostics, and knowing that the signal is used as a GPIO
3106 * can help avoid accidentally multiplexing it to another controller.
3107 */
a0b66a73 3108const char *gpiochip_is_requested(struct gpio_chip *gc, unsigned offset)
d2876d08 3109{
6c0b4e6c 3110 struct gpio_desc *desc;
d2876d08 3111
a0b66a73 3112 if (offset >= gc->ngpio)
d2876d08 3113 return NULL;
6c0b4e6c 3114
a0b66a73 3115 desc = gpiochip_get_desc(gc, offset);
1739a2d8
BG
3116 if (IS_ERR(desc))
3117 return NULL;
6c0b4e6c 3118
372e722e 3119 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
d2876d08 3120 return NULL;
372e722e 3121 return desc->label;
d2876d08
DB
3122}
3123EXPORT_SYMBOL_GPL(gpiochip_is_requested);
3124
77c2d792
MW
3125/**
3126 * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
a0b66a73 3127 * @gc: GPIO chip
950d55f5 3128 * @hwnum: hardware number of the GPIO for which to request the descriptor
77c2d792 3129 * @label: label for the GPIO
5923ea6c
LW
3130 * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
3131 * specify things like line inversion semantics with the machine flags
3132 * such as GPIO_OUT_LOW
3133 * @dflags: descriptor request flags for this GPIO or 0 if default, this
3134 * can be used to specify consumer semantics such as open drain
77c2d792
MW
3135 *
3136 * Function allows GPIO chip drivers to request and use their own GPIO
3137 * descriptors via gpiolib API. Difference to gpiod_request() is that this
3138 * function will not increase reference count of the GPIO chip module. This
3139 * allows the GPIO chip module to be unloaded as needed (we assume that the
3140 * GPIO chip driver handles freeing the GPIOs it has requested).
950d55f5
TR
3141 *
3142 * Returns:
3143 * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
3144 * code on failure.
77c2d792 3145 */
a0b66a73 3146struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc,
06863620 3147 unsigned int hwnum,
21abf103 3148 const char *label,
5923ea6c
LW
3149 enum gpio_lookup_flags lflags,
3150 enum gpiod_flags dflags)
77c2d792 3151{
a0b66a73 3152 struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum);
d377f56f 3153 int ret;
77c2d792 3154
abdc08a3 3155 if (IS_ERR(desc)) {
a0b66a73 3156 chip_err(gc, "failed to get GPIO descriptor\n");
abdc08a3
AC
3157 return desc;
3158 }
3159
d377f56f
LW
3160 ret = gpiod_request_commit(desc, label);
3161 if (ret < 0)
3162 return ERR_PTR(ret);
77c2d792 3163
d377f56f
LW
3164 ret = gpiod_configure_flags(desc, label, lflags, dflags);
3165 if (ret) {
a0b66a73 3166 chip_err(gc, "setup of own GPIO %s failed\n", label);
21abf103 3167 gpiod_free_commit(desc);
d377f56f 3168 return ERR_PTR(ret);
21abf103
LW
3169 }
3170
abdc08a3 3171 return desc;
77c2d792 3172}
f7d4ad98 3173EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
77c2d792
MW
3174
3175/**
3176 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
3177 * @desc: GPIO descriptor to free
3178 *
3179 * Function frees the given GPIO requested previously with
3180 * gpiochip_request_own_desc().
3181 */
3182void gpiochip_free_own_desc(struct gpio_desc *desc)
3183{
3184 if (desc)
fac9d885 3185 gpiod_free_commit(desc);
77c2d792 3186}
f7d4ad98 3187EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
d2876d08 3188
fdeb8e15
LW
3189/*
3190 * Drivers MUST set GPIO direction before making get/set calls. In
d2876d08
DB
3191 * some cases this is done in early boot, before IRQs are enabled.
3192 *
3193 * As a rule these aren't called more than once (except for drivers
3194 * using the open-drain emulation idiom) so these are natural places
3195 * to accumulate extra debugging checks. Note that we can't (yet)
3196 * rely on gpio_request() having been called beforehand.
3197 */
3198
d99f8876 3199static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset,
62adc6f3 3200 unsigned long config)
71479789 3201{
d90f3685
BG
3202 if (!gc->set_config)
3203 return -ENOTSUPP;
542f3615 3204
62adc6f3 3205 return gc->set_config(gc, offset, config);
71479789
TP
3206}
3207
83522358 3208static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode)
d99f8876 3209{
a0b66a73 3210 struct gpio_chip *gc = desc->gdev->chip;
91b4ea5f 3211 unsigned long config;
d99f8876
BG
3212 unsigned arg;
3213
3214 switch (mode) {
d99f8876
BG
3215 case PIN_CONFIG_BIAS_PULL_DOWN:
3216 case PIN_CONFIG_BIAS_PULL_UP:
3217 arg = 1;
3218 break;
3219
3220 default:
3221 arg = 0;
3222 }
3223
91b4ea5f 3224 config = PIN_CONF_PACKED(mode, arg);
a0b66a73 3225 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
d99f8876
BG
3226}
3227
5f4bf171 3228static int gpio_set_bias(struct gpio_desc *desc)
2148ad77
KG
3229{
3230 int bias = 0;
3231 int ret = 0;
3232
3233 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
3234 bias = PIN_CONFIG_BIAS_DISABLE;
3235 else if (test_bit(FLAG_PULL_UP, &desc->flags))
3236 bias = PIN_CONFIG_BIAS_PULL_UP;
3237 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
3238 bias = PIN_CONFIG_BIAS_PULL_DOWN;
3239
3240 if (bias) {
83522358 3241 ret = gpio_set_config(desc, bias);
2148ad77
KG
3242 if (ret != -ENOTSUPP)
3243 return ret;
3244 }
3245 return 0;
3246}
3247
79a9becd
AC
3248/**
3249 * gpiod_direction_input - set the GPIO direction to input
3250 * @desc: GPIO to set to input
3251 *
3252 * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
3253 * be called safely on it.
3254 *
3255 * Return 0 in case of success, else an error code.
3256 */
3257int gpiod_direction_input(struct gpio_desc *desc)
d2876d08 3258{
a0b66a73 3259 struct gpio_chip *gc;
d377f56f 3260 int ret = 0;
d2876d08 3261
fdeb8e15 3262 VALIDATE_DESC(desc);
a0b66a73 3263 gc = desc->gdev->chip;
bcabdef1 3264
e48d194d
LW
3265 /*
3266 * It is legal to have no .get() and .direction_input() specified if
3267 * the chip is output-only, but you can't specify .direction_input()
3268 * and not support the .get() operation, that doesn't make sense.
3269 */
a0b66a73 3270 if (!gc->get && gc->direction_input) {
6424de5a 3271 gpiod_warn(desc,
e48d194d
LW
3272 "%s: missing get() but have direction_input()\n",
3273 __func__);
be1a4b13
LW
3274 return -EIO;
3275 }
3276
e48d194d
LW
3277 /*
3278 * If we have a .direction_input() callback, things are simple,
3279 * just call it. Else we are some input-only chip so try to check the
3280 * direction (if .get_direction() is supported) else we silently
3281 * assume we are in input mode after this.
3282 */
a0b66a73
LW
3283 if (gc->direction_input) {
3284 ret = gc->direction_input(gc, gpio_chip_hwgpio(desc));
3285 } else if (gc->get_direction &&
3286 (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) {
ae9847f4 3287 gpiod_warn(desc,
e48d194d
LW
3288 "%s: missing direction_input() operation and line is output\n",
3289 __func__);
ae9847f4
RRD
3290 return -EIO;
3291 }
2148ad77 3292 if (ret == 0) {
d2876d08 3293 clear_bit(FLAG_IS_OUT, &desc->flags);
5f4bf171 3294 ret = gpio_set_bias(desc);
2148ad77 3295 }
d449991c 3296
d377f56f 3297 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
d82da797 3298
d377f56f 3299 return ret;
d2876d08 3300}
79a9becd 3301EXPORT_SYMBOL_GPL(gpiod_direction_input);
372e722e 3302
fac9d885 3303static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
d2876d08 3304{
c663e5f5 3305 struct gpio_chip *gc = desc->gdev->chip;
ad17731d 3306 int val = !!value;
ae9847f4 3307 int ret = 0;
d2876d08 3308
e48d194d
LW
3309 /*
3310 * It's OK not to specify .direction_output() if the gpiochip is
3311 * output-only, but if there is then not even a .set() operation it
3312 * is pretty tricky to drive the output line.
3313 */
ae9847f4 3314 if (!gc->set && !gc->direction_output) {
6424de5a 3315 gpiod_warn(desc,
e48d194d
LW
3316 "%s: missing set() and direction_output() operations\n",
3317 __func__);
be1a4b13
LW
3318 return -EIO;
3319 }
3320
ae9847f4
RRD
3321 if (gc->direction_output) {
3322 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
3323 } else {
e48d194d 3324 /* Check that we are in output mode if we can */
ae9847f4
RRD
3325 if (gc->get_direction &&
3326 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
3327 gpiod_warn(desc,
3328 "%s: missing direction_output() operation\n",
3329 __func__);
3330 return -EIO;
3331 }
e48d194d
LW
3332 /*
3333 * If we can't actively set the direction, we are some
3334 * output-only chip, so just drive the output as desired.
3335 */
ae9847f4
RRD
3336 gc->set(gc, gpio_chip_hwgpio(desc), val);
3337 }
3338
c663e5f5 3339 if (!ret)
d2876d08 3340 set_bit(FLAG_IS_OUT, &desc->flags);
ad17731d 3341 trace_gpio_value(desc_to_gpio(desc), 0, val);
c663e5f5
LW
3342 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
3343 return ret;
d2876d08 3344}
ef70bbe1
PZ
3345
3346/**
3347 * gpiod_direction_output_raw - set the GPIO direction to output
3348 * @desc: GPIO to set to output
3349 * @value: initial output value of the GPIO
3350 *
3351 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
3352 * be called safely on it. The initial value of the output must be specified
3353 * as raw value on the physical line without regard for the ACTIVE_LOW status.
3354 *
3355 * Return 0 in case of success, else an error code.
3356 */
3357int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
3358{
fdeb8e15 3359 VALIDATE_DESC(desc);
fac9d885 3360 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1
PZ
3361}
3362EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
3363
3364/**
90df4fe0 3365 * gpiod_direction_output - set the GPIO direction to output
ef70bbe1
PZ
3366 * @desc: GPIO to set to output
3367 * @value: initial output value of the GPIO
3368 *
3369 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
3370 * be called safely on it. The initial value of the output must be specified
3371 * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
3372 * account.
3373 *
3374 * Return 0 in case of success, else an error code.
3375 */
3376int gpiod_direction_output(struct gpio_desc *desc, int value)
3377{
02e47980
LW
3378 int ret;
3379
fdeb8e15 3380 VALIDATE_DESC(desc);
ef70bbe1
PZ
3381 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3382 value = !value;
ad17731d
LW
3383 else
3384 value = !!value;
02e47980 3385
4e9439dd
HV
3386 /* GPIOs used for enabled IRQs shall not be set as output */
3387 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
3388 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
02e47980
LW
3389 gpiod_err(desc,
3390 "%s: tried to set a GPIO tied to an IRQ as output\n",
3391 __func__);
3392 return -EIO;
3393 }
3394
3395 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
3396 /* First see if we can enable open drain in hardware */
83522358 3397 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN);
02e47980
LW
3398 if (!ret)
3399 goto set_output_value;
3400 /* Emulate open drain by not actively driving the line high */
e735244e
BG
3401 if (value) {
3402 ret = gpiod_direction_input(desc);
3403 goto set_output_flag;
3404 }
02e47980
LW
3405 }
3406 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
83522358 3407 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE);
02e47980
LW
3408 if (!ret)
3409 goto set_output_value;
3410 /* Emulate open source by not actively driving the line low */
e735244e
BG
3411 if (!value) {
3412 ret = gpiod_direction_input(desc);
3413 goto set_output_flag;
3414 }
02e47980 3415 } else {
83522358 3416 gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL);
02e47980
LW
3417 }
3418
3419set_output_value:
5f4bf171 3420 ret = gpio_set_bias(desc);
2821ae5f
KG
3421 if (ret)
3422 return ret;
fac9d885 3423 return gpiod_direction_output_raw_commit(desc, value);
e735244e
BG
3424
3425set_output_flag:
3426 /*
3427 * When emulating open-source or open-drain functionalities by not
3428 * actively driving the line (setting mode to input) we still need to
3429 * set the IS_OUT flag or otherwise we won't be able to set the line
3430 * value anymore.
3431 */
3432 if (ret == 0)
3433 set_bit(FLAG_IS_OUT, &desc->flags);
3434 return ret;
ef70bbe1 3435}
79a9becd 3436EXPORT_SYMBOL_GPL(gpiod_direction_output);
d2876d08 3437
8ced32ff
GU
3438/**
3439 * gpiod_set_config - sets @config for a GPIO
3440 * @desc: descriptor of the GPIO for which to set the configuration
3441 * @config: Same packed config format as generic pinconf
3442 *
3443 * Returns:
3444 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
3445 * configuration.
3446 */
3447int gpiod_set_config(struct gpio_desc *desc, unsigned long config)
3448{
a0b66a73 3449 struct gpio_chip *gc;
8ced32ff
GU
3450
3451 VALIDATE_DESC(desc);
a0b66a73 3452 gc = desc->gdev->chip;
8ced32ff 3453
a0b66a73 3454 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
8ced32ff
GU
3455}
3456EXPORT_SYMBOL_GPL(gpiod_set_config);
3457
c4b5be98 3458/**
950d55f5
TR
3459 * gpiod_set_debounce - sets @debounce time for a GPIO
3460 * @desc: descriptor of the GPIO for which to set debounce time
3461 * @debounce: debounce time in microseconds
65d87656 3462 *
950d55f5
TR
3463 * Returns:
3464 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
3465 * debounce time.
c4b5be98 3466 */
79a9becd 3467int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce)
c4b5be98 3468{
8ced32ff 3469 unsigned long config;
be1a4b13 3470
2956b5d9 3471 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
8ced32ff 3472 return gpiod_set_config(desc, config);
c4b5be98 3473}
79a9becd 3474EXPORT_SYMBOL_GPL(gpiod_set_debounce);
372e722e 3475
e10f72bf
AJ
3476/**
3477 * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
3478 * @desc: descriptor of the GPIO for which to configure persistence
3479 * @transitory: True to lose state on suspend or reset, false for persistence
3480 *
3481 * Returns:
3482 * 0 on success, otherwise a negative error code.
3483 */
3484int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
3485{
a0b66a73 3486 struct gpio_chip *gc;
e10f72bf
AJ
3487 unsigned long packed;
3488 int gpio;
3489 int rc;
3490
156dd392 3491 VALIDATE_DESC(desc);
e10f72bf
AJ
3492 /*
3493 * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
3494 * persistence state.
3495 */
4fc5bfeb 3496 assign_bit(FLAG_TRANSITORY, &desc->flags, transitory);
e10f72bf
AJ
3497
3498 /* If the driver supports it, set the persistence state now */
a0b66a73
LW
3499 gc = desc->gdev->chip;
3500 if (!gc->set_config)
e10f72bf
AJ
3501 return 0;
3502
3503 packed = pinconf_to_config_packed(PIN_CONFIG_PERSIST_STATE,
3504 !transitory);
3505 gpio = gpio_chip_hwgpio(desc);
a0b66a73 3506 rc = gpio_do_set_config(gc, gpio, packed);
e10f72bf
AJ
3507 if (rc == -ENOTSUPP) {
3508 dev_dbg(&desc->gdev->dev, "Persistence not supported for GPIO %d\n",
3509 gpio);
3510 return 0;
3511 }
3512
3513 return rc;
3514}
3515EXPORT_SYMBOL_GPL(gpiod_set_transitory);
3516
79a9becd
AC
3517/**
3518 * gpiod_is_active_low - test whether a GPIO is active-low or not
3519 * @desc: the gpio descriptor to test
3520 *
3521 * Returns 1 if the GPIO is active-low, 0 otherwise.
3522 */
3523int gpiod_is_active_low(const struct gpio_desc *desc)
372e722e 3524{
fdeb8e15 3525 VALIDATE_DESC(desc);
79a9becd 3526 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
372e722e 3527}
79a9becd 3528EXPORT_SYMBOL_GPL(gpiod_is_active_low);
d2876d08 3529
d3a5bcb4
MM
3530/**
3531 * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not
3532 * @desc: the gpio descriptor to change
3533 */
3534void gpiod_toggle_active_low(struct gpio_desc *desc)
3535{
3536 VALIDATE_DESC_VOID(desc);
3537 change_bit(FLAG_ACTIVE_LOW, &desc->flags);
3538}
3539EXPORT_SYMBOL_GPL(gpiod_toggle_active_low);
3540
d2876d08
DB
3541/* I/O calls are only valid after configuration completed; the relevant
3542 * "is this a valid GPIO" error checks should already have been done.
3543 *
3544 * "Get" operations are often inlinable as reading a pin value register,
3545 * and masking the relevant bit in that register.
3546 *
3547 * When "set" operations are inlinable, they involve writing that mask to
3548 * one register to set a low value, or a different register to set it high.
3549 * Otherwise locking is needed, so there may be little value to inlining.
3550 *
3551 *------------------------------------------------------------------------
3552 *
3553 * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
3554 * have requested the GPIO. That can include implicit requesting by
3555 * a direction setting call. Marking a gpio as requested locks its chip
3556 * in memory, guaranteeing that these table lookups need no more locking
3557 * and that gpiochip_remove() will fail.
3558 *
3559 * REVISIT when debugging, consider adding some instrumentation to ensure
3560 * that the GPIO was actually requested.
3561 */
3562
fac9d885 3563static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
d2876d08 3564{
a0b66a73 3565 struct gpio_chip *gc;
372e722e 3566 int offset;
e20538b8 3567 int value;
d2876d08 3568
a0b66a73 3569 gc = desc->gdev->chip;
372e722e 3570 offset = gpio_chip_hwgpio(desc);
a0b66a73 3571 value = gc->get ? gc->get(gc, offset) : -EIO;
723a6303 3572 value = value < 0 ? value : !!value;
372e722e 3573 trace_gpio_value(desc_to_gpio(desc), 1, value);
3f397c21 3574 return value;
d2876d08 3575}
372e722e 3576
a0b66a73 3577static int gpio_chip_get_multiple(struct gpio_chip *gc,
eec1d566
LW
3578 unsigned long *mask, unsigned long *bits)
3579{
a0b66a73
LW
3580 if (gc->get_multiple) {
3581 return gc->get_multiple(gc, mask, bits);
3582 } else if (gc->get) {
eec1d566
LW
3583 int i, value;
3584
a0b66a73
LW
3585 for_each_set_bit(i, mask, gc->ngpio) {
3586 value = gc->get(gc, i);
eec1d566
LW
3587 if (value < 0)
3588 return value;
3589 __assign_bit(i, bits, value);
3590 }
3591 return 0;
3592 }
3593 return -EIO;
3594}
3595
3596int gpiod_get_array_value_complex(bool raw, bool can_sleep,
3597 unsigned int array_size,
3598 struct gpio_desc **desc_array,
77588c14 3599 struct gpio_array *array_info,
b9762beb 3600 unsigned long *value_bitmap)
eec1d566 3601{
d377f56f 3602 int ret, i = 0;
b17566a6
JK
3603
3604 /*
3605 * Validate array_info against desc_array and its size.
3606 * It should immediately follow desc_array if both
3607 * have been obtained from the same gpiod_get_array() call.
3608 */
3609 if (array_info && array_info->desc == desc_array &&
3610 array_size <= array_info->size &&
3611 (void *)array_info == desc_array + array_info->size) {
3612 if (!can_sleep)
3613 WARN_ON(array_info->chip->can_sleep);
3614
d377f56f 3615 ret = gpio_chip_get_multiple(array_info->chip,
b17566a6
JK
3616 array_info->get_mask,
3617 value_bitmap);
d377f56f
LW
3618 if (ret)
3619 return ret;
b17566a6
JK
3620
3621 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3622 bitmap_xor(value_bitmap, value_bitmap,
3623 array_info->invert_mask, array_size);
3624
3625 if (bitmap_full(array_info->get_mask, array_size))
3626 return 0;
3627
3628 i = find_first_zero_bit(array_info->get_mask, array_size);
3629 } else {
3630 array_info = NULL;
3631 }
eec1d566
LW
3632
3633 while (i < array_size) {
a0b66a73 3634 struct gpio_chip *gc = desc_array[i]->gdev->chip;
3027743f
LA
3635 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
3636 unsigned long *mask, *bits;
eec1d566
LW
3637 int first, j, ret;
3638
a0b66a73 3639 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
3027743f
LA
3640 mask = fastpath;
3641 } else {
a0b66a73 3642 mask = kmalloc_array(2 * BITS_TO_LONGS(gc->ngpio),
3027743f
LA
3643 sizeof(*mask),
3644 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
3645 if (!mask)
3646 return -ENOMEM;
3647 }
3648
a0b66a73
LW
3649 bits = mask + BITS_TO_LONGS(gc->ngpio);
3650 bitmap_zero(mask, gc->ngpio);
3027743f 3651
eec1d566 3652 if (!can_sleep)
a0b66a73 3653 WARN_ON(gc->can_sleep);
eec1d566
LW
3654
3655 /* collect all inputs belonging to the same chip */
3656 first = i;
eec1d566
LW
3657 do {
3658 const struct gpio_desc *desc = desc_array[i];
3659 int hwgpio = gpio_chip_hwgpio(desc);
3660
3661 __set_bit(hwgpio, mask);
3662 i++;
b17566a6
JK
3663
3664 if (array_info)
35ae7f96
JK
3665 i = find_next_zero_bit(array_info->get_mask,
3666 array_size, i);
eec1d566 3667 } while ((i < array_size) &&
a0b66a73 3668 (desc_array[i]->gdev->chip == gc));
eec1d566 3669
a0b66a73 3670 ret = gpio_chip_get_multiple(gc, mask, bits);
3027743f
LA
3671 if (ret) {
3672 if (mask != fastpath)
3673 kfree(mask);
eec1d566 3674 return ret;
3027743f 3675 }
eec1d566 3676
b17566a6 3677 for (j = first; j < i; ) {
eec1d566
LW
3678 const struct gpio_desc *desc = desc_array[j];
3679 int hwgpio = gpio_chip_hwgpio(desc);
3680 int value = test_bit(hwgpio, bits);
3681
3682 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3683 value = !value;
b9762beb 3684 __assign_bit(j, value_bitmap, value);
eec1d566 3685 trace_gpio_value(desc_to_gpio(desc), 1, value);
799d5eb4 3686 j++;
b17566a6
JK
3687
3688 if (array_info)
35ae7f96
JK
3689 j = find_next_zero_bit(array_info->get_mask, i,
3690 j);
eec1d566 3691 }
3027743f
LA
3692
3693 if (mask != fastpath)
3694 kfree(mask);
eec1d566
LW
3695 }
3696 return 0;
3697}
3698
d2876d08 3699/**
79a9becd
AC
3700 * gpiod_get_raw_value() - return a gpio's raw value
3701 * @desc: gpio whose value will be returned
d2876d08 3702 *
79a9becd 3703 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3704 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd 3705 *
827a9b8b 3706 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3707 * complain if the GPIO chip functions potentially sleep.
d2876d08 3708 */
79a9becd 3709int gpiod_get_raw_value(const struct gpio_desc *desc)
d2876d08 3710{
fdeb8e15 3711 VALIDATE_DESC(desc);
3285170f 3712 /* Should be using gpiod_get_raw_value_cansleep() */
fdeb8e15 3713 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3714 return gpiod_get_raw_value_commit(desc);
d2876d08 3715}
79a9becd 3716EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
372e722e 3717
79a9becd
AC
3718/**
3719 * gpiod_get_value() - return a gpio's value
3720 * @desc: gpio whose value will be returned
3721 *
3722 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3723 * account, or negative errno on failure.
79a9becd 3724 *
827a9b8b 3725 * This function can be called from contexts where we cannot sleep, and will
79a9becd
AC
3726 * complain if the GPIO chip functions potentially sleep.
3727 */
3728int gpiod_get_value(const struct gpio_desc *desc)
372e722e 3729{
79a9becd 3730 int value;
fdeb8e15
LW
3731
3732 VALIDATE_DESC(desc);
3285170f 3733 /* Should be using gpiod_get_value_cansleep() */
fdeb8e15 3734 WARN_ON(desc->gdev->chip->can_sleep);
79a9becd 3735
fac9d885 3736 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3737 if (value < 0)
3738 return value;
3739
79a9becd
AC
3740 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3741 value = !value;
3742
3743 return value;
372e722e 3744}
79a9becd 3745EXPORT_SYMBOL_GPL(gpiod_get_value);
d2876d08 3746
eec1d566
LW
3747/**
3748 * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
b9762beb 3749 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3750 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3751 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3752 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3753 *
3754 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3755 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3756 * else an error code.
3757 *
827a9b8b 3758 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
3759 * and it will complain if the GPIO chip functions potentially sleep.
3760 */
3761int gpiod_get_raw_array_value(unsigned int array_size,
b9762beb 3762 struct gpio_desc **desc_array,
77588c14 3763 struct gpio_array *array_info,
b9762beb 3764 unsigned long *value_bitmap)
eec1d566
LW
3765{
3766 if (!desc_array)
3767 return -EINVAL;
3768 return gpiod_get_array_value_complex(true, false, array_size,
77588c14
JK
3769 desc_array, array_info,
3770 value_bitmap);
eec1d566
LW
3771}
3772EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
3773
3774/**
3775 * gpiod_get_array_value() - read values from an array of GPIOs
b9762beb 3776 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3777 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3778 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3779 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3780 *
3781 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3782 * into account. Return 0 in case of success, else an error code.
3783 *
827a9b8b 3784 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
3785 * and it will complain if the GPIO chip functions potentially sleep.
3786 */
3787int gpiod_get_array_value(unsigned int array_size,
b9762beb 3788 struct gpio_desc **desc_array,
77588c14 3789 struct gpio_array *array_info,
b9762beb 3790 unsigned long *value_bitmap)
eec1d566
LW
3791{
3792 if (!desc_array)
3793 return -EINVAL;
3794 return gpiod_get_array_value_complex(false, false, array_size,
77588c14
JK
3795 desc_array, array_info,
3796 value_bitmap);
eec1d566
LW
3797}
3798EXPORT_SYMBOL_GPL(gpiod_get_array_value);
3799
aca5ce14 3800/*
fac9d885 3801 * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
79a9becd 3802 * @desc: gpio descriptor whose state need to be set.
20a8a968 3803 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
aca5ce14 3804 */
fac9d885 3805static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
aca5ce14 3806{
d377f56f 3807 int ret = 0;
a0b66a73 3808 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
3809 int offset = gpio_chip_hwgpio(desc);
3810
aca5ce14 3811 if (value) {
a0b66a73 3812 ret = gc->direction_input(gc, offset);
aca5ce14 3813 } else {
a0b66a73 3814 ret = gc->direction_output(gc, offset, 0);
d377f56f 3815 if (!ret)
372e722e 3816 set_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 3817 }
d377f56f
LW
3818 trace_gpio_direction(desc_to_gpio(desc), value, ret);
3819 if (ret < 0)
6424de5a
MB
3820 gpiod_err(desc,
3821 "%s: Error in set_value for open drain err %d\n",
d377f56f 3822 __func__, ret);
aca5ce14
LD
3823}
3824
25553ff0 3825/*
79a9becd
AC
3826 * _gpio_set_open_source_value() - Set the open source gpio's value.
3827 * @desc: gpio descriptor whose state need to be set.
20a8a968 3828 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
25553ff0 3829 */
fac9d885 3830static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
25553ff0 3831{
d377f56f 3832 int ret = 0;
a0b66a73 3833 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
3834 int offset = gpio_chip_hwgpio(desc);
3835
25553ff0 3836 if (value) {
a0b66a73 3837 ret = gc->direction_output(gc, offset, 1);
d377f56f 3838 if (!ret)
372e722e 3839 set_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 3840 } else {
a0b66a73 3841 ret = gc->direction_input(gc, offset);
25553ff0 3842 }
d377f56f
LW
3843 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
3844 if (ret < 0)
6424de5a
MB
3845 gpiod_err(desc,
3846 "%s: Error in set_value for open source err %d\n",
d377f56f 3847 __func__, ret);
25553ff0
LD
3848}
3849
fac9d885 3850static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
d2876d08 3851{
a0b66a73 3852 struct gpio_chip *gc;
d2876d08 3853
a0b66a73 3854 gc = desc->gdev->chip;
372e722e 3855 trace_gpio_value(desc_to_gpio(desc), 0, value);
a0b66a73 3856 gc->set(gc, gpio_chip_hwgpio(desc), value);
372e722e
AC
3857}
3858
5f424243
RI
3859/*
3860 * set multiple outputs on the same chip;
3861 * use the chip's set_multiple function if available;
3862 * otherwise set the outputs sequentially;
a0b66a73 3863 * @chip: the GPIO chip we operate on
5f424243
RI
3864 * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
3865 * defines which outputs are to be changed
3866 * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
3867 * defines the values the outputs specified by mask are to be set to
3868 */
a0b66a73 3869static void gpio_chip_set_multiple(struct gpio_chip *gc,
5f424243
RI
3870 unsigned long *mask, unsigned long *bits)
3871{
a0b66a73
LW
3872 if (gc->set_multiple) {
3873 gc->set_multiple(gc, mask, bits);
5f424243 3874 } else {
5e4e6fb3
AS
3875 unsigned int i;
3876
3877 /* set outputs if the corresponding mask bit is set */
a0b66a73
LW
3878 for_each_set_bit(i, mask, gc->ngpio)
3879 gc->set(gc, i, test_bit(i, bits));
5f424243
RI
3880 }
3881}
3882
3027743f 3883int gpiod_set_array_value_complex(bool raw, bool can_sleep,
3c940660
GU
3884 unsigned int array_size,
3885 struct gpio_desc **desc_array,
3886 struct gpio_array *array_info,
3887 unsigned long *value_bitmap)
5f424243
RI
3888{
3889 int i = 0;
3890
b17566a6
JK
3891 /*
3892 * Validate array_info against desc_array and its size.
3893 * It should immediately follow desc_array if both
3894 * have been obtained from the same gpiod_get_array() call.
3895 */
3896 if (array_info && array_info->desc == desc_array &&
3897 array_size <= array_info->size &&
3898 (void *)array_info == desc_array + array_info->size) {
3899 if (!can_sleep)
3900 WARN_ON(array_info->chip->can_sleep);
3901
3902 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3903 bitmap_xor(value_bitmap, value_bitmap,
3904 array_info->invert_mask, array_size);
3905
3906 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
3907 value_bitmap);
3908
3909 if (bitmap_full(array_info->set_mask, array_size))
3910 return 0;
3911
3912 i = find_first_zero_bit(array_info->set_mask, array_size);
3913 } else {
3914 array_info = NULL;
3915 }
3916
5f424243 3917 while (i < array_size) {
a0b66a73 3918 struct gpio_chip *gc = desc_array[i]->gdev->chip;
3027743f
LA
3919 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
3920 unsigned long *mask, *bits;
5f424243
RI
3921 int count = 0;
3922
a0b66a73 3923 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
3027743f
LA
3924 mask = fastpath;
3925 } else {
a0b66a73 3926 mask = kmalloc_array(2 * BITS_TO_LONGS(gc->ngpio),
3027743f
LA
3927 sizeof(*mask),
3928 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
3929 if (!mask)
3930 return -ENOMEM;
3931 }
3932
a0b66a73
LW
3933 bits = mask + BITS_TO_LONGS(gc->ngpio);
3934 bitmap_zero(mask, gc->ngpio);
3027743f 3935
38e003f4 3936 if (!can_sleep)
a0b66a73 3937 WARN_ON(gc->can_sleep);
38e003f4 3938
5f424243
RI
3939 do {
3940 struct gpio_desc *desc = desc_array[i];
3941 int hwgpio = gpio_chip_hwgpio(desc);
b9762beb 3942 int value = test_bit(i, value_bitmap);
5f424243 3943
b17566a6
JK
3944 /*
3945 * Pins applicable for fast input but not for
3946 * fast output processing may have been already
3947 * inverted inside the fast path, skip them.
3948 */
3949 if (!raw && !(array_info &&
3950 test_bit(i, array_info->invert_mask)) &&
3951 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
5f424243
RI
3952 value = !value;
3953 trace_gpio_value(desc_to_gpio(desc), 0, value);
3954 /*
3955 * collect all normal outputs belonging to the same chip
3956 * open drain and open source outputs are set individually
3957 */
02e47980 3958 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
fac9d885 3959 gpio_set_open_drain_value_commit(desc, value);
02e47980 3960 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
fac9d885 3961 gpio_set_open_source_value_commit(desc, value);
5f424243
RI
3962 } else {
3963 __set_bit(hwgpio, mask);
4fc5bfeb 3964 __assign_bit(hwgpio, bits, value);
5f424243
RI
3965 count++;
3966 }
3967 i++;
b17566a6
JK
3968
3969 if (array_info)
35ae7f96
JK
3970 i = find_next_zero_bit(array_info->set_mask,
3971 array_size, i);
fdeb8e15 3972 } while ((i < array_size) &&
a0b66a73 3973 (desc_array[i]->gdev->chip == gc));
5f424243 3974 /* push collected bits to outputs */
38e003f4 3975 if (count != 0)
a0b66a73 3976 gpio_chip_set_multiple(gc, mask, bits);
3027743f
LA
3977
3978 if (mask != fastpath)
3979 kfree(mask);
5f424243 3980 }
3027743f 3981 return 0;
5f424243
RI
3982}
3983
d2876d08 3984/**
79a9becd
AC
3985 * gpiod_set_raw_value() - assign a gpio's raw value
3986 * @desc: gpio whose value will be assigned
d2876d08 3987 * @value: value to assign
d2876d08 3988 *
79a9becd
AC
3989 * Set the raw value of the GPIO, i.e. the value of its physical line without
3990 * regard for its ACTIVE_LOW status.
3991 *
827a9b8b 3992 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3993 * complain if the GPIO chip functions potentially sleep.
d2876d08 3994 */
79a9becd 3995void gpiod_set_raw_value(struct gpio_desc *desc, int value)
372e722e 3996{
fdeb8e15 3997 VALIDATE_DESC_VOID(desc);
3285170f 3998 /* Should be using gpiod_set_raw_value_cansleep() */
fdeb8e15 3999 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 4000 gpiod_set_raw_value_commit(desc, value);
d2876d08 4001}
79a9becd 4002EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
d2876d08 4003
1e77fc82
GU
4004/**
4005 * gpiod_set_value_nocheck() - set a GPIO line value without checking
4006 * @desc: the descriptor to set the value on
4007 * @value: value to set
4008 *
4009 * This sets the value of a GPIO line backing a descriptor, applying
4010 * different semantic quirks like active low and open drain/source
4011 * handling.
4012 */
4013static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
4014{
4015 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
4016 value = !value;
4017 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
4018 gpio_set_open_drain_value_commit(desc, value);
4019 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
4020 gpio_set_open_source_value_commit(desc, value);
4021 else
4022 gpiod_set_raw_value_commit(desc, value);
4023}
4024
d2876d08 4025/**
79a9becd
AC
4026 * gpiod_set_value() - assign a gpio's value
4027 * @desc: gpio whose value will be assigned
4028 * @value: value to assign
4029 *
02e47980
LW
4030 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
4031 * OPEN_DRAIN and OPEN_SOURCE flags into account.
d2876d08 4032 *
827a9b8b 4033 * This function can be called from contexts where we cannot sleep, and will
79a9becd 4034 * complain if the GPIO chip functions potentially sleep.
d2876d08 4035 */
79a9becd 4036void gpiod_set_value(struct gpio_desc *desc, int value)
d2876d08 4037{
fdeb8e15 4038 VALIDATE_DESC_VOID(desc);
3285170f 4039 /* Should be using gpiod_set_value_cansleep() */
fdeb8e15 4040 WARN_ON(desc->gdev->chip->can_sleep);
1e77fc82 4041 gpiod_set_value_nocheck(desc, value);
372e722e 4042}
79a9becd 4043EXPORT_SYMBOL_GPL(gpiod_set_value);
d2876d08 4044
5f424243 4045/**
3fff99bc 4046 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
b9762beb 4047 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4048 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4049 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4050 * @value_bitmap: bitmap of values to assign
5f424243
RI
4051 *
4052 * Set the raw values of the GPIOs, i.e. the values of the physical lines
4053 * without regard for their ACTIVE_LOW status.
4054 *
827a9b8b 4055 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
4056 * complain if the GPIO chip functions potentially sleep.
4057 */
3027743f 4058int gpiod_set_raw_array_value(unsigned int array_size,
3c940660
GU
4059 struct gpio_desc **desc_array,
4060 struct gpio_array *array_info,
4061 unsigned long *value_bitmap)
5f424243
RI
4062{
4063 if (!desc_array)
3027743f
LA
4064 return -EINVAL;
4065 return gpiod_set_array_value_complex(true, false, array_size,
77588c14 4066 desc_array, array_info, value_bitmap);
5f424243 4067}
3fff99bc 4068EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
5f424243
RI
4069
4070/**
3fff99bc 4071 * gpiod_set_array_value() - assign values to an array of GPIOs
b9762beb 4072 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4073 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4074 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4075 * @value_bitmap: bitmap of values to assign
5f424243
RI
4076 *
4077 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
4078 * into account.
4079 *
827a9b8b 4080 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
4081 * complain if the GPIO chip functions potentially sleep.
4082 */
cf9af0d5
GU
4083int gpiod_set_array_value(unsigned int array_size,
4084 struct gpio_desc **desc_array,
4085 struct gpio_array *array_info,
4086 unsigned long *value_bitmap)
5f424243
RI
4087{
4088 if (!desc_array)
cf9af0d5
GU
4089 return -EINVAL;
4090 return gpiod_set_array_value_complex(false, false, array_size,
4091 desc_array, array_info,
4092 value_bitmap);
5f424243 4093}
3fff99bc 4094EXPORT_SYMBOL_GPL(gpiod_set_array_value);
5f424243 4095
d2876d08 4096/**
79a9becd
AC
4097 * gpiod_cansleep() - report whether gpio value access may sleep
4098 * @desc: gpio to check
d2876d08 4099 *
d2876d08 4100 */
79a9becd 4101int gpiod_cansleep(const struct gpio_desc *desc)
372e722e 4102{
fdeb8e15
LW
4103 VALIDATE_DESC(desc);
4104 return desc->gdev->chip->can_sleep;
d2876d08 4105}
79a9becd 4106EXPORT_SYMBOL_GPL(gpiod_cansleep);
d2876d08 4107
90b39402
LW
4108/**
4109 * gpiod_set_consumer_name() - set the consumer name for the descriptor
4110 * @desc: gpio to set the consumer name on
4111 * @name: the new consumer name
4112 */
18534df4 4113int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
90b39402 4114{
18534df4
MS
4115 VALIDATE_DESC(desc);
4116 if (name) {
4117 name = kstrdup_const(name, GFP_KERNEL);
4118 if (!name)
4119 return -ENOMEM;
4120 }
4121
4122 kfree_const(desc->label);
4123 desc_set_label(desc, name);
4124
4125 return 0;
90b39402
LW
4126}
4127EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
4128
0f6d504e 4129/**
79a9becd
AC
4130 * gpiod_to_irq() - return the IRQ corresponding to a GPIO
4131 * @desc: gpio whose IRQ will be returned (already requested)
0f6d504e 4132 *
79a9becd
AC
4133 * Return the IRQ corresponding to the passed GPIO, or an error code in case of
4134 * error.
0f6d504e 4135 */
79a9becd 4136int gpiod_to_irq(const struct gpio_desc *desc)
0f6d504e 4137{
a0b66a73 4138 struct gpio_chip *gc;
4c37ce86 4139 int offset;
0f6d504e 4140
79bb71bd
LW
4141 /*
4142 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
4143 * requires this function to not return zero on an invalid descriptor
4144 * but rather a negative error number.
4145 */
bfbbe44d 4146 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
79bb71bd
LW
4147 return -EINVAL;
4148
a0b66a73 4149 gc = desc->gdev->chip;
372e722e 4150 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
4151 if (gc->to_irq) {
4152 int retirq = gc->to_irq(gc, offset);
4c37ce86
LW
4153
4154 /* Zero means NO_IRQ */
4155 if (!retirq)
4156 return -ENXIO;
4157
4158 return retirq;
4159 }
4160 return -ENXIO;
0f6d504e 4161}
79a9becd 4162EXPORT_SYMBOL_GPL(gpiod_to_irq);
0f6d504e 4163
d468bf9e 4164/**
e3a2e878 4165 * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
a0b66a73 4166 * @gc: the chip the GPIO to lock belongs to
d74be6df 4167 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
4168 *
4169 * This is used directly by GPIO drivers that want to lock down
f438acdf 4170 * a certain GPIO line to be used for IRQs.
d468bf9e 4171 */
a0b66a73 4172int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset)
372e722e 4173{
9c10280d
LW
4174 struct gpio_desc *desc;
4175
a0b66a73 4176 desc = gpiochip_get_desc(gc, offset);
9c10280d
LW
4177 if (IS_ERR(desc))
4178 return PTR_ERR(desc);
4179
60f8339e
LW
4180 /*
4181 * If it's fast: flush the direction setting if something changed
4182 * behind our back
4183 */
a0b66a73 4184 if (!gc->can_sleep && gc->get_direction) {
80956790 4185 int dir = gpiod_get_direction(desc);
9c10280d 4186
36b31279 4187 if (dir < 0) {
a0b66a73 4188 chip_err(gc, "%s: cannot get GPIO direction\n",
36b31279
AS
4189 __func__);
4190 return dir;
4191 }
9c10280d 4192 }
d468bf9e 4193
9c10280d 4194 if (test_bit(FLAG_IS_OUT, &desc->flags)) {
a0b66a73 4195 chip_err(gc,
b1911710
AS
4196 "%s: tried to flag a GPIO set as output for IRQ\n",
4197 __func__);
d468bf9e
LW
4198 return -EIO;
4199 }
4200
9c10280d 4201 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 4202 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
4203
4204 /*
4205 * If the consumer has not set up a label (such as when the
4206 * IRQ is referenced from .to_irq()) we set up a label here
4207 * so it is clear this is used as an interrupt.
4208 */
4209 if (!desc->label)
4210 desc_set_label(desc, "interrupt");
4211
d468bf9e 4212 return 0;
372e722e 4213}
e3a2e878 4214EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
d2876d08 4215
d468bf9e 4216/**
e3a2e878 4217 * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
a0b66a73 4218 * @gc: the chip the GPIO to lock belongs to
d74be6df 4219 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
4220 *
4221 * This is used directly by GPIO drivers that want to indicate
4222 * that a certain GPIO is no longer used exclusively for IRQ.
d2876d08 4223 */
a0b66a73 4224void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset)
d468bf9e 4225{
3940c34a
LW
4226 struct gpio_desc *desc;
4227
a0b66a73 4228 desc = gpiochip_get_desc(gc, offset);
3940c34a 4229 if (IS_ERR(desc))
d468bf9e 4230 return;
d2876d08 4231
3940c34a 4232 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 4233 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
4234
4235 /* If we only had this marking, erase it */
4236 if (desc->label && !strcmp(desc->label, "interrupt"))
4237 desc_set_label(desc, NULL);
d468bf9e 4238}
e3a2e878 4239EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
d468bf9e 4240
a0b66a73 4241void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 4242{
a0b66a73 4243 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
4244
4245 if (!IS_ERR(desc) &&
4246 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
4247 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
4248}
4249EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
4250
a0b66a73 4251void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 4252{
a0b66a73 4253 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
4254
4255 if (!IS_ERR(desc) &&
4256 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
4257 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags));
4258 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
4259 }
4260}
4261EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
4262
a0b66a73 4263bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset)
6cee3821 4264{
a0b66a73 4265 if (offset >= gc->ngpio)
6cee3821
LW
4266 return false;
4267
a0b66a73 4268 return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags);
6cee3821
LW
4269}
4270EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
4271
a0b66a73 4272int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238
HV
4273{
4274 int ret;
4275
a0b66a73 4276 if (!try_module_get(gc->gpiodev->owner))
4e6b8238
HV
4277 return -ENODEV;
4278
a0b66a73 4279 ret = gpiochip_lock_as_irq(gc, offset);
4e6b8238 4280 if (ret) {
a0b66a73
LW
4281 chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset);
4282 module_put(gc->gpiodev->owner);
4e6b8238
HV
4283 return ret;
4284 }
4285 return 0;
4286}
4287EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
4288
a0b66a73 4289void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238 4290{
a0b66a73
LW
4291 gpiochip_unlock_as_irq(gc, offset);
4292 module_put(gc->gpiodev->owner);
4e6b8238
HV
4293}
4294EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
4295
a0b66a73 4296bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset)
143b65d6 4297{
a0b66a73 4298 if (offset >= gc->ngpio)
143b65d6
LW
4299 return false;
4300
a0b66a73 4301 return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
4302}
4303EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
4304
a0b66a73 4305bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset)
143b65d6 4306{
a0b66a73 4307 if (offset >= gc->ngpio)
143b65d6
LW
4308 return false;
4309
a0b66a73 4310 return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
4311}
4312EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
4313
a0b66a73 4314bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset)
05f479bf 4315{
a0b66a73 4316 if (offset >= gc->ngpio)
05f479bf
CK
4317 return false;
4318
a0b66a73 4319 return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags);
05f479bf
CK
4320}
4321EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
4322
79a9becd
AC
4323/**
4324 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
4325 * @desc: gpio whose value will be returned
4326 *
4327 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 4328 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd
AC
4329 *
4330 * This function is to be called from contexts that can sleep.
d2876d08 4331 */
79a9becd 4332int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
d2876d08 4333{
d2876d08 4334 might_sleep_if(extra_checks);
fdeb8e15 4335 VALIDATE_DESC(desc);
fac9d885 4336 return gpiod_get_raw_value_commit(desc);
d2876d08 4337}
79a9becd 4338EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
372e722e 4339
79a9becd
AC
4340/**
4341 * gpiod_get_value_cansleep() - return a gpio's value
4342 * @desc: gpio whose value will be returned
4343 *
4344 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 4345 * account, or negative errno on failure.
79a9becd
AC
4346 *
4347 * This function is to be called from contexts that can sleep.
4348 */
4349int gpiod_get_value_cansleep(const struct gpio_desc *desc)
d2876d08 4350{
3f397c21 4351 int value;
d2876d08
DB
4352
4353 might_sleep_if(extra_checks);
fdeb8e15 4354 VALIDATE_DESC(desc);
fac9d885 4355 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
4356 if (value < 0)
4357 return value;
4358
79a9becd
AC
4359 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
4360 value = !value;
4361
3f397c21 4362 return value;
d2876d08 4363}
79a9becd 4364EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
372e722e 4365
eec1d566
LW
4366/**
4367 * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
b9762beb 4368 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 4369 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 4370 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4371 * @value_bitmap: bitmap to store the read values
eec1d566
LW
4372 *
4373 * Read the raw values of the GPIOs, i.e. the values of the physical lines
4374 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
4375 * else an error code.
4376 *
4377 * This function is to be called from contexts that can sleep.
4378 */
4379int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
4380 struct gpio_desc **desc_array,
77588c14 4381 struct gpio_array *array_info,
b9762beb 4382 unsigned long *value_bitmap)
eec1d566
LW
4383{
4384 might_sleep_if(extra_checks);
4385 if (!desc_array)
4386 return -EINVAL;
4387 return gpiod_get_array_value_complex(true, true, array_size,
77588c14
JK
4388 desc_array, array_info,
4389 value_bitmap);
eec1d566
LW
4390}
4391EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
4392
4393/**
4394 * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
b9762beb 4395 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 4396 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 4397 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4398 * @value_bitmap: bitmap to store the read values
eec1d566
LW
4399 *
4400 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
4401 * into account. Return 0 in case of success, else an error code.
4402 *
4403 * This function is to be called from contexts that can sleep.
4404 */
4405int gpiod_get_array_value_cansleep(unsigned int array_size,
4406 struct gpio_desc **desc_array,
77588c14 4407 struct gpio_array *array_info,
b9762beb 4408 unsigned long *value_bitmap)
eec1d566
LW
4409{
4410 might_sleep_if(extra_checks);
4411 if (!desc_array)
4412 return -EINVAL;
4413 return gpiod_get_array_value_complex(false, true, array_size,
77588c14
JK
4414 desc_array, array_info,
4415 value_bitmap);
eec1d566
LW
4416}
4417EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
4418
79a9becd
AC
4419/**
4420 * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
4421 * @desc: gpio whose value will be assigned
4422 * @value: value to assign
4423 *
4424 * Set the raw value of the GPIO, i.e. the value of its physical line without
4425 * regard for its ACTIVE_LOW status.
4426 *
4427 * This function is to be called from contexts that can sleep.
4428 */
4429void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
372e722e 4430{
d2876d08 4431 might_sleep_if(extra_checks);
fdeb8e15 4432 VALIDATE_DESC_VOID(desc);
fac9d885 4433 gpiod_set_raw_value_commit(desc, value);
372e722e 4434}
79a9becd 4435EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
d2876d08 4436
79a9becd
AC
4437/**
4438 * gpiod_set_value_cansleep() - assign a gpio's value
4439 * @desc: gpio whose value will be assigned
4440 * @value: value to assign
4441 *
4442 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
4443 * account
4444 *
4445 * This function is to be called from contexts that can sleep.
4446 */
4447void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
d2876d08 4448{
d2876d08 4449 might_sleep_if(extra_checks);
fdeb8e15 4450 VALIDATE_DESC_VOID(desc);
1e77fc82 4451 gpiod_set_value_nocheck(desc, value);
372e722e 4452}
79a9becd 4453EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
d2876d08 4454
5f424243 4455/**
3fff99bc 4456 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 4457 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4458 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4459 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4460 * @value_bitmap: bitmap of values to assign
5f424243
RI
4461 *
4462 * Set the raw values of the GPIOs, i.e. the values of the physical lines
4463 * without regard for their ACTIVE_LOW status.
4464 *
4465 * This function is to be called from contexts that can sleep.
4466 */
3027743f 4467int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3c940660
GU
4468 struct gpio_desc **desc_array,
4469 struct gpio_array *array_info,
4470 unsigned long *value_bitmap)
5f424243
RI
4471{
4472 might_sleep_if(extra_checks);
4473 if (!desc_array)
3027743f
LA
4474 return -EINVAL;
4475 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
77588c14 4476 array_info, value_bitmap);
5f424243 4477}
3fff99bc 4478EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
5f424243 4479
3946d187
DT
4480/**
4481 * gpiod_add_lookup_tables() - register GPIO device consumers
4482 * @tables: list of tables of consumers to register
4483 * @n: number of tables in the list
4484 */
4485void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
4486{
4487 unsigned int i;
4488
4489 mutex_lock(&gpio_lookup_lock);
4490
4491 for (i = 0; i < n; i++)
4492 list_add_tail(&tables[i]->list, &gpio_lookup_list);
4493
4494 mutex_unlock(&gpio_lookup_lock);
4495}
4496
5f424243 4497/**
3fff99bc 4498 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 4499 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4500 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4501 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4502 * @value_bitmap: bitmap of values to assign
5f424243
RI
4503 *
4504 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
4505 * into account.
4506 *
4507 * This function is to be called from contexts that can sleep.
4508 */
cf9af0d5
GU
4509int gpiod_set_array_value_cansleep(unsigned int array_size,
4510 struct gpio_desc **desc_array,
4511 struct gpio_array *array_info,
4512 unsigned long *value_bitmap)
5f424243
RI
4513{
4514 might_sleep_if(extra_checks);
4515 if (!desc_array)
cf9af0d5
GU
4516 return -EINVAL;
4517 return gpiod_set_array_value_complex(false, true, array_size,
4518 desc_array, array_info,
4519 value_bitmap);
5f424243 4520}
3fff99bc 4521EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
5f424243 4522
bae48da2 4523/**
ad824783
AC
4524 * gpiod_add_lookup_table() - register GPIO device consumers
4525 * @table: table of consumers to register
bae48da2 4526 */
ad824783 4527void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
bae48da2
AC
4528{
4529 mutex_lock(&gpio_lookup_lock);
4530
ad824783 4531 list_add_tail(&table->list, &gpio_lookup_list);
bae48da2
AC
4532
4533 mutex_unlock(&gpio_lookup_lock);
4534}
226b2242 4535EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
bae48da2 4536
be9015ab
SK
4537/**
4538 * gpiod_remove_lookup_table() - unregister GPIO device consumers
4539 * @table: table of consumers to unregister
4540 */
4541void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
4542{
4543 mutex_lock(&gpio_lookup_lock);
4544
4545 list_del(&table->list);
4546
4547 mutex_unlock(&gpio_lookup_lock);
4548}
226b2242 4549EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
be9015ab 4550
a411e81e
BG
4551/**
4552 * gpiod_add_hogs() - register a set of GPIO hogs from machine code
4553 * @hogs: table of gpio hog entries with a zeroed sentinel at the end
4554 */
4555void gpiod_add_hogs(struct gpiod_hog *hogs)
4556{
a0b66a73 4557 struct gpio_chip *gc;
a411e81e
BG
4558 struct gpiod_hog *hog;
4559
4560 mutex_lock(&gpio_machine_hogs_mutex);
4561
4562 for (hog = &hogs[0]; hog->chip_label; hog++) {
4563 list_add_tail(&hog->list, &gpio_machine_hogs);
4564
4565 /*
4566 * The chip may have been registered earlier, so check if it
4567 * exists and, if so, try to hog the line now.
4568 */
a0b66a73
LW
4569 gc = find_chip_by_name(hog->chip_label);
4570 if (gc)
4571 gpiochip_machine_hog(gc, hog);
a411e81e
BG
4572 }
4573
4574 mutex_unlock(&gpio_machine_hogs_mutex);
4575}
4576EXPORT_SYMBOL_GPL(gpiod_add_hogs);
4577
ad824783 4578static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
bae48da2
AC
4579{
4580 const char *dev_id = dev ? dev_name(dev) : NULL;
ad824783 4581 struct gpiod_lookup_table *table;
bae48da2
AC
4582
4583 mutex_lock(&gpio_lookup_lock);
4584
ad824783
AC
4585 list_for_each_entry(table, &gpio_lookup_list, list) {
4586 if (table->dev_id && dev_id) {
4587 /*
4588 * Valid strings on both ends, must be identical to have
4589 * a match
4590 */
4591 if (!strcmp(table->dev_id, dev_id))
4592 goto found;
4593 } else {
4594 /*
4595 * One of the pointers is NULL, so both must be to have
4596 * a match
4597 */
4598 if (dev_id == table->dev_id)
4599 goto found;
4600 }
4601 }
4602 table = NULL;
bae48da2 4603
ad824783
AC
4604found:
4605 mutex_unlock(&gpio_lookup_lock);
4606 return table;
4607}
bae48da2 4608
ad824783 4609static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
fed7026a 4610 unsigned int idx, unsigned long *flags)
ad824783 4611{
2a3cf6a3 4612 struct gpio_desc *desc = ERR_PTR(-ENOENT);
ad824783
AC
4613 struct gpiod_lookup_table *table;
4614 struct gpiod_lookup *p;
bae48da2 4615
ad824783
AC
4616 table = gpiod_find_lookup_table(dev);
4617 if (!table)
4618 return desc;
bae48da2 4619
ad824783 4620 for (p = &table->table[0]; p->chip_label; p++) {
a0b66a73 4621 struct gpio_chip *gc;
bae48da2 4622
ad824783 4623 /* idx must always match exactly */
bae48da2
AC
4624 if (p->idx != idx)
4625 continue;
4626
ad824783
AC
4627 /* If the lookup entry has a con_id, require exact match */
4628 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
4629 continue;
bae48da2 4630
a0b66a73 4631 gc = find_chip_by_name(p->chip_label);
bae48da2 4632
a0b66a73 4633 if (!gc) {
8853daf3
JK
4634 /*
4635 * As the lookup table indicates a chip with
4636 * p->chip_label should exist, assume it may
4637 * still appear later and let the interested
4638 * consumer be probed again or let the Deferred
4639 * Probe infrastructure handle the error.
4640 */
4641 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
4642 p->chip_label);
4643 return ERR_PTR(-EPROBE_DEFER);
ad824783 4644 }
bae48da2 4645
a0b66a73 4646 if (gc->ngpio <= p->chip_hwnum) {
2a3cf6a3 4647 dev_err(dev,
d935bd50 4648 "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n",
a0b66a73
LW
4649 idx, p->chip_hwnum, gc->ngpio - 1,
4650 gc->label);
2a3cf6a3 4651 return ERR_PTR(-EINVAL);
bae48da2 4652 }
bae48da2 4653
a0b66a73 4654 desc = gpiochip_get_desc(gc, p->chip_hwnum);
ad824783 4655 *flags = p->flags;
bae48da2 4656
2a3cf6a3 4657 return desc;
bae48da2
AC
4658 }
4659
bae48da2
AC
4660 return desc;
4661}
4662
66858527
RI
4663static int platform_gpio_count(struct device *dev, const char *con_id)
4664{
4665 struct gpiod_lookup_table *table;
4666 struct gpiod_lookup *p;
4667 unsigned int count = 0;
4668
4669 table = gpiod_find_lookup_table(dev);
4670 if (!table)
4671 return -ENOENT;
4672
4673 for (p = &table->table[0]; p->chip_label; p++) {
4674 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
4675 (!con_id && !p->con_id))
4676 count++;
4677 }
4678 if (!count)
4679 return -ENOENT;
4680
4681 return count;
4682}
4683
13949fa9
DT
4684/**
4685 * fwnode_gpiod_get_index - obtain a GPIO from firmware node
4686 * @fwnode: handle of the firmware node
4687 * @con_id: function within the GPIO consumer
4688 * @index: index of the GPIO to obtain for the consumer
4689 * @flags: GPIO initialization flags
4690 * @label: label to attach to the requested GPIO
4691 *
4692 * This function can be used for drivers that get their configuration
4693 * from opaque firmware.
4694 *
4695 * The function properly finds the corresponding GPIO using whatever is the
4696 * underlying firmware interface and then makes sure that the GPIO
4697 * descriptor is requested before it is returned to the caller.
4698 *
4699 * Returns:
4700 * On successful request the GPIO pin is configured in accordance with
4701 * provided @flags.
4702 *
4703 * In case of error an ERR_PTR() is returned.
4704 */
4705struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
4706 const char *con_id, int index,
4707 enum gpiod_flags flags,
4708 const char *label)
4709{
4710 struct gpio_desc *desc;
4711 char prop_name[32]; /* 32 is max size of property name */
4712 unsigned int i;
4713
4714 for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) {
4715 if (con_id)
4716 snprintf(prop_name, sizeof(prop_name), "%s-%s",
4717 con_id, gpio_suffixes[i]);
4718 else
4719 snprintf(prop_name, sizeof(prop_name), "%s",
4720 gpio_suffixes[i]);
4721
4722 desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags,
4723 label);
4724 if (!IS_ERR(desc) || (PTR_ERR(desc) != -ENOENT))
4725 break;
4726 }
4727
4728 return desc;
4729}
4730EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
4731
66858527
RI
4732/**
4733 * gpiod_count - return the number of GPIOs associated with a device / function
4734 * or -ENOENT if no GPIO has been assigned to the requested function
4735 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4736 * @con_id: function within the GPIO consumer
4737 */
4738int gpiod_count(struct device *dev, const char *con_id)
4739{
4740 int count = -ENOENT;
4741
4742 if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node)
f626d6df 4743 count = of_gpio_get_count(dev, con_id);
66858527
RI
4744 else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev))
4745 count = acpi_gpio_count(dev, con_id);
4746
4747 if (count < 0)
4748 count = platform_gpio_count(dev, con_id);
4749
4750 return count;
4751}
4752EXPORT_SYMBOL_GPL(gpiod_count);
4753
bae48da2 4754/**
0879162f 4755 * gpiod_get - obtain a GPIO for a given GPIO function
ad824783 4756 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2 4757 * @con_id: function within the GPIO consumer
39b2bbe3 4758 * @flags: optional GPIO initialization flags
bae48da2
AC
4759 *
4760 * Return the GPIO descriptor corresponding to the function con_id of device
2a3cf6a3 4761 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
20a8a968 4762 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
bae48da2 4763 */
b17d1bf1 4764struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
39b2bbe3 4765 enum gpiod_flags flags)
bae48da2 4766{
39b2bbe3 4767 return gpiod_get_index(dev, con_id, 0, flags);
bae48da2 4768}
b17d1bf1 4769EXPORT_SYMBOL_GPL(gpiod_get);
bae48da2 4770
29a1f233
TR
4771/**
4772 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
4773 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4774 * @con_id: function within the GPIO consumer
39b2bbe3 4775 * @flags: optional GPIO initialization flags
29a1f233
TR
4776 *
4777 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
4778 * the requested function it will return NULL. This is convenient for drivers
4779 * that need to handle optional GPIOs.
4780 */
b17d1bf1 4781struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
39b2bbe3
AC
4782 const char *con_id,
4783 enum gpiod_flags flags)
29a1f233 4784{
39b2bbe3 4785 return gpiod_get_index_optional(dev, con_id, 0, flags);
29a1f233 4786}
b17d1bf1 4787EXPORT_SYMBOL_GPL(gpiod_get_optional);
29a1f233 4788
f625d460
BP
4789
4790/**
4791 * gpiod_configure_flags - helper function to configure a given GPIO
4792 * @desc: gpio whose value will be assigned
4793 * @con_id: function within the GPIO consumer
fed7026a
AS
4794 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4795 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4796 * @dflags: gpiod_flags - optional GPIO initialization flags
4797 *
4798 * Return 0 on success, -ENOENT if no GPIO has been assigned to the
4799 * requested function and/or index, or another IS_ERR() code if an error
4800 * occurred while trying to acquire the GPIO.
4801 */
c29fd9eb 4802int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
85b03b30 4803 unsigned long lflags, enum gpiod_flags dflags)
f625d460 4804{
d377f56f 4805 int ret;
f625d460 4806
85b03b30
JH
4807 if (lflags & GPIO_ACTIVE_LOW)
4808 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
f926dfc1 4809
85b03b30
JH
4810 if (lflags & GPIO_OPEN_DRAIN)
4811 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
f926dfc1
LW
4812 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
4813 /*
4814 * This enforces open drain mode from the consumer side.
4815 * This is necessary for some busses like I2C, but the lookup
4816 * should *REALLY* have specified them as open drain in the
4817 * first place, so print a little warning here.
4818 */
4819 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
4820 gpiod_warn(desc,
4821 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
4822 }
4823
85b03b30
JH
4824 if (lflags & GPIO_OPEN_SOURCE)
4825 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
e10f72bf 4826
d449991c
TP
4827 if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) {
4828 gpiod_err(desc,
4829 "both pull-up and pull-down enabled, invalid configuration\n");
4830 return -EINVAL;
4831 }
4832
4833 if (lflags & GPIO_PULL_UP)
4834 set_bit(FLAG_PULL_UP, &desc->flags);
4835 else if (lflags & GPIO_PULL_DOWN)
4836 set_bit(FLAG_PULL_DOWN, &desc->flags);
4837
d377f56f
LW
4838 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
4839 if (ret < 0)
4840 return ret;
85b03b30 4841
f625d460
BP
4842 /* No particular flag request, return here... */
4843 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
262b9011 4844 gpiod_dbg(desc, "no flags found for %s\n", con_id);
f625d460
BP
4845 return 0;
4846 }
4847
4848 /* Process flags */
4849 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
d377f56f 4850 ret = gpiod_direction_output(desc,
ad17731d 4851 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
f625d460 4852 else
d377f56f 4853 ret = gpiod_direction_input(desc);
f625d460 4854
d377f56f 4855 return ret;
f625d460
BP
4856}
4857
bae48da2
AC
4858/**
4859 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
fdd6a5fe 4860 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2
AC
4861 * @con_id: function within the GPIO consumer
4862 * @idx: index of the GPIO to obtain in the consumer
39b2bbe3 4863 * @flags: optional GPIO initialization flags
bae48da2
AC
4864 *
4865 * This variant of gpiod_get() allows to access GPIOs other than the first
4866 * defined one for functions that define several GPIOs.
4867 *
2a3cf6a3
AC
4868 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
4869 * requested function and/or index, or another IS_ERR() code if an error
20a8a968 4870 * occurred while trying to acquire the GPIO.
bae48da2 4871 */
b17d1bf1 4872struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
bae48da2 4873 const char *con_id,
39b2bbe3
AC
4874 unsigned int idx,
4875 enum gpiod_flags flags)
bae48da2 4876{
2d6c06f5 4877 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
35c5d7fd 4878 struct gpio_desc *desc = NULL;
d377f56f 4879 int ret;
7d18f0a1
LW
4880 /* Maybe we have a device name, maybe not */
4881 const char *devname = dev ? dev_name(dev) : "?";
bae48da2
AC
4882
4883 dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id);
4884
4d8440b9
RW
4885 if (dev) {
4886 /* Using device tree? */
4887 if (IS_ENABLED(CONFIG_OF) && dev->of_node) {
4888 dev_dbg(dev, "using device tree for GPIO lookup\n");
4889 desc = of_find_gpio(dev, con_id, idx, &lookupflags);
4890 } else if (ACPI_COMPANION(dev)) {
4891 dev_dbg(dev, "using ACPI for GPIO lookup\n");
a31f5c3a 4892 desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags);
4d8440b9 4893 }
35c5d7fd
AC
4894 }
4895
4896 /*
4897 * Either we are not using DT or ACPI, or their lookup did not return
4898 * a result. In that case, use platform lookup as a fallback.
4899 */
2a3cf6a3 4900 if (!desc || desc == ERR_PTR(-ENOENT)) {
43a8785a 4901 dev_dbg(dev, "using lookup tables for GPIO lookup\n");
39b2bbe3 4902 desc = gpiod_find(dev, con_id, idx, &lookupflags);
bae48da2
AC
4903 }
4904
4905 if (IS_ERR(desc)) {
9d5a1f2c 4906 dev_dbg(dev, "No GPIO consumer %s found\n", con_id);
bae48da2
AC
4907 return desc;
4908 }
4909
7d18f0a1
LW
4910 /*
4911 * If a connection label was passed use that, else attempt to use
4912 * the device name as label
4913 */
d377f56f
LW
4914 ret = gpiod_request(desc, con_id ? con_id : devname);
4915 if (ret < 0) {
4916 if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) {
b0ce7b29
LW
4917 /*
4918 * This happens when there are several consumers for
4919 * the same GPIO line: we just return here without
4920 * further initialization. It is a bit if a hack.
4921 * This is necessary to support fixed regulators.
4922 *
4923 * FIXME: Make this more sane and safe.
4924 */
4925 dev_info(dev, "nonexclusive access to GPIO for %s\n",
4926 con_id ? con_id : devname);
4927 return desc;
4928 } else {
d377f56f 4929 return ERR_PTR(ret);
b0ce7b29
LW
4930 }
4931 }
bae48da2 4932
d377f56f 4933 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
6392cca4 4934 if (ret < 0) {
39b2bbe3 4935 dev_dbg(dev, "setup of GPIO %s failed\n", con_id);
6392cca4
LW
4936 gpiod_put(desc);
4937 return ERR_PTR(ret);
4938 }
4939
4940 return desc;
4941}
b17d1bf1 4942EXPORT_SYMBOL_GPL(gpiod_get_index);
6392cca4 4943
40b73183
MW
4944/**
4945 * fwnode_get_named_gpiod - obtain a GPIO from firmware node
4946 * @fwnode: handle of the firmware node
4947 * @propname: name of the firmware property representing the GPIO
6392cca4 4948 * @index: index of the GPIO to obtain for the consumer
a264d10f 4949 * @dflags: GPIO initialization flags
950d55f5 4950 * @label: label to attach to the requested GPIO
40b73183
MW
4951 *
4952 * This function can be used for drivers that get their configuration
6392cca4 4953 * from opaque firmware.
40b73183 4954 *
6392cca4 4955 * The function properly finds the corresponding GPIO using whatever is the
40b73183
MW
4956 * underlying firmware interface and then makes sure that the GPIO
4957 * descriptor is requested before it is returned to the caller.
4958 *
950d55f5 4959 * Returns:
ff21378a 4960 * On successful request the GPIO pin is configured in accordance with
a264d10f
AS
4961 * provided @dflags.
4962 *
40b73183
MW
4963 * In case of error an ERR_PTR() is returned.
4964 */
4965struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
537b94da 4966 const char *propname, int index,
b2987d74
AS
4967 enum gpiod_flags dflags,
4968 const char *label)
40b73183 4969{
2d6c06f5 4970 unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT;
40b73183 4971 struct gpio_desc *desc = ERR_PTR(-ENODEV);
40b73183
MW
4972 int ret;
4973
4974 if (!fwnode)
4975 return ERR_PTR(-EINVAL);
4976
4977 if (is_of_node(fwnode)) {
6392cca4
LW
4978 desc = gpiod_get_from_of_node(to_of_node(fwnode),
4979 propname, index,
4980 dflags,
4981 label);
4982 return desc;
40b73183
MW
4983 } else if (is_acpi_node(fwnode)) {
4984 struct acpi_gpio_info info;
4985
537b94da 4986 desc = acpi_node_get_gpiod(fwnode, propname, index, &info);
6392cca4
LW
4987 if (IS_ERR(desc))
4988 return desc;
40b73183 4989
6392cca4 4990 acpi_gpio_update_gpiod_flags(&dflags, &info);
606be344 4991 acpi_gpio_update_gpiod_lookup_flags(&lflags, &info);
6392cca4 4992 }
40b73183 4993
6392cca4 4994 /* Currently only ACPI takes this path */
b2987d74 4995 ret = gpiod_request(desc, label);
85b03b30
JH
4996 if (ret)
4997 return ERR_PTR(ret);
4998
a264d10f
AS
4999 ret = gpiod_configure_flags(desc, propname, lflags, dflags);
5000 if (ret < 0) {
5001 gpiod_put(desc);
5002 return ERR_PTR(ret);
90b665f6
LP
5003 }
5004
40b73183
MW
5005 return desc;
5006}
5007EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod);
5008
29a1f233
TR
5009/**
5010 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
5011 * function
5012 * @dev: GPIO consumer, can be NULL for system-global GPIOs
5013 * @con_id: function within the GPIO consumer
5014 * @index: index of the GPIO to obtain in the consumer
39b2bbe3 5015 * @flags: optional GPIO initialization flags
29a1f233
TR
5016 *
5017 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
5018 * specified index was assigned to the requested function it will return NULL.
5019 * This is convenient for drivers that need to handle optional GPIOs.
5020 */
b17d1bf1 5021struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
29a1f233 5022 const char *con_id,
39b2bbe3
AC
5023 unsigned int index,
5024 enum gpiod_flags flags)
29a1f233
TR
5025{
5026 struct gpio_desc *desc;
5027
39b2bbe3 5028 desc = gpiod_get_index(dev, con_id, index, flags);
29a1f233
TR
5029 if (IS_ERR(desc)) {
5030 if (PTR_ERR(desc) == -ENOENT)
5031 return NULL;
5032 }
5033
5034 return desc;
5035}
b17d1bf1 5036EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
29a1f233 5037
f625d460
BP
5038/**
5039 * gpiod_hog - Hog the specified GPIO desc given the provided flags
5040 * @desc: gpio whose value will be assigned
5041 * @name: gpio line name
fed7026a
AS
5042 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
5043 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
5044 * @dflags: gpiod_flags - optional GPIO initialization flags
5045 */
5046int gpiod_hog(struct gpio_desc *desc, const char *name,
5047 unsigned long lflags, enum gpiod_flags dflags)
5048{
a0b66a73 5049 struct gpio_chip *gc;
f625d460
BP
5050 struct gpio_desc *local_desc;
5051 int hwnum;
d377f56f 5052 int ret;
f625d460 5053
a0b66a73 5054 gc = gpiod_to_chip(desc);
f625d460
BP
5055 hwnum = gpio_chip_hwgpio(desc);
5056
a0b66a73 5057 local_desc = gpiochip_request_own_desc(gc, hwnum, name,
5923ea6c 5058 lflags, dflags);
f625d460 5059 if (IS_ERR(local_desc)) {
d377f56f 5060 ret = PTR_ERR(local_desc);
c31a571d 5061 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
a0b66a73 5062 name, gc->label, hwnum, ret);
d377f56f 5063 return ret;
f625d460
BP
5064 }
5065
f625d460
BP
5066 /* Mark GPIO as hogged so it can be identified and removed later */
5067 set_bit(FLAG_IS_HOGGED, &desc->flags);
5068
262b9011 5069 gpiod_info(desc, "hogged as %s%s\n",
b27f300f
BG
5070 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
5071 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
5072 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
f625d460
BP
5073
5074 return 0;
5075}
5076
5077/**
5078 * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
a0b66a73 5079 * @gc: gpio chip to act on
f625d460 5080 */
a0b66a73 5081static void gpiochip_free_hogs(struct gpio_chip *gc)
f625d460
BP
5082{
5083 int id;
5084
a0b66a73
LW
5085 for (id = 0; id < gc->ngpio; id++) {
5086 if (test_bit(FLAG_IS_HOGGED, &gc->gpiodev->descs[id].flags))
5087 gpiochip_free_own_desc(&gc->gpiodev->descs[id]);
f625d460
BP
5088 }
5089}
5090
66858527
RI
5091/**
5092 * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
5093 * @dev: GPIO consumer, can be NULL for system-global GPIOs
5094 * @con_id: function within the GPIO consumer
5095 * @flags: optional GPIO initialization flags
5096 *
5097 * This function acquires all the GPIOs defined under a given function.
5098 *
5099 * Return a struct gpio_descs containing an array of descriptors, -ENOENT if
5100 * no GPIO has been assigned to the requested function, or another IS_ERR()
5101 * code if an error occurred while trying to acquire the GPIOs.
5102 */
5103struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
5104 const char *con_id,
5105 enum gpiod_flags flags)
5106{
5107 struct gpio_desc *desc;
5108 struct gpio_descs *descs;
bf9346f5 5109 struct gpio_array *array_info = NULL;
a0b66a73 5110 struct gpio_chip *gc;
bf9346f5 5111 int count, bitmap_size;
66858527
RI
5112
5113 count = gpiod_count(dev, con_id);
5114 if (count < 0)
5115 return ERR_PTR(count);
5116
acafe7e3 5117 descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL);
66858527
RI
5118 if (!descs)
5119 return ERR_PTR(-ENOMEM);
5120
5121 for (descs->ndescs = 0; descs->ndescs < count; ) {
5122 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
5123 if (IS_ERR(desc)) {
5124 gpiod_put_array(descs);
5125 return ERR_CAST(desc);
5126 }
bf9346f5 5127
66858527 5128 descs->desc[descs->ndescs] = desc;
bf9346f5 5129
a0b66a73 5130 gc = gpiod_to_chip(desc);
bf9346f5 5131 /*
c4c958aa
JK
5132 * If pin hardware number of array member 0 is also 0, select
5133 * its chip as a candidate for fast bitmap processing path.
bf9346f5 5134 */
c4c958aa 5135 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
bf9346f5
JK
5136 struct gpio_descs *array;
5137
a0b66a73
LW
5138 bitmap_size = BITS_TO_LONGS(gc->ngpio > count ?
5139 gc->ngpio : count);
bf9346f5
JK
5140
5141 array = kzalloc(struct_size(descs, desc, count) +
5142 struct_size(array_info, invert_mask,
5143 3 * bitmap_size), GFP_KERNEL);
5144 if (!array) {
5145 gpiod_put_array(descs);
5146 return ERR_PTR(-ENOMEM);
5147 }
5148
5149 memcpy(array, descs,
5150 struct_size(descs, desc, descs->ndescs + 1));
5151 kfree(descs);
5152
5153 descs = array;
5154 array_info = (void *)(descs->desc + count);
5155 array_info->get_mask = array_info->invert_mask +
5156 bitmap_size;
5157 array_info->set_mask = array_info->get_mask +
5158 bitmap_size;
5159
5160 array_info->desc = descs->desc;
5161 array_info->size = count;
a0b66a73 5162 array_info->chip = gc;
bf9346f5
JK
5163 bitmap_set(array_info->get_mask, descs->ndescs,
5164 count - descs->ndescs);
5165 bitmap_set(array_info->set_mask, descs->ndescs,
5166 count - descs->ndescs);
5167 descs->info = array_info;
5168 }
c4c958aa 5169 /* Unmark array members which don't belong to the 'fast' chip */
a0b66a73 5170 if (array_info && array_info->chip != gc) {
bf9346f5
JK
5171 __clear_bit(descs->ndescs, array_info->get_mask);
5172 __clear_bit(descs->ndescs, array_info->set_mask);
c4c958aa
JK
5173 }
5174 /*
5175 * Detect array members which belong to the 'fast' chip
5176 * but their pins are not in hardware order.
5177 */
5178 else if (array_info &&
5179 gpio_chip_hwgpio(desc) != descs->ndescs) {
5180 /*
5181 * Don't use fast path if all array members processed so
5182 * far belong to the same chip as this one but its pin
5183 * hardware number is different from its array index.
5184 */
5185 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
5186 array_info = NULL;
5187 } else {
5188 __clear_bit(descs->ndescs,
5189 array_info->get_mask);
5190 __clear_bit(descs->ndescs,
5191 array_info->set_mask);
5192 }
bf9346f5
JK
5193 } else if (array_info) {
5194 /* Exclude open drain or open source from fast output */
a0b66a73
LW
5195 if (gpiochip_line_is_open_drain(gc, descs->ndescs) ||
5196 gpiochip_line_is_open_source(gc, descs->ndescs))
bf9346f5
JK
5197 __clear_bit(descs->ndescs,
5198 array_info->set_mask);
5199 /* Identify 'fast' pins which require invertion */
5200 if (gpiod_is_active_low(desc))
5201 __set_bit(descs->ndescs,
5202 array_info->invert_mask);
5203 }
5204
66858527
RI
5205 descs->ndescs++;
5206 }
bf9346f5
JK
5207 if (array_info)
5208 dev_dbg(dev,
5209 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
5210 array_info->chip->label, array_info->size,
5211 *array_info->get_mask, *array_info->set_mask,
5212 *array_info->invert_mask);
66858527
RI
5213 return descs;
5214}
5215EXPORT_SYMBOL_GPL(gpiod_get_array);
5216
5217/**
5218 * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
5219 * function
5220 * @dev: GPIO consumer, can be NULL for system-global GPIOs
5221 * @con_id: function within the GPIO consumer
5222 * @flags: optional GPIO initialization flags
5223 *
5224 * This is equivalent to gpiod_get_array(), except that when no GPIO was
5225 * assigned to the requested function it will return NULL.
5226 */
5227struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
5228 const char *con_id,
5229 enum gpiod_flags flags)
5230{
5231 struct gpio_descs *descs;
5232
5233 descs = gpiod_get_array(dev, con_id, flags);
45586c70 5234 if (PTR_ERR(descs) == -ENOENT)
66858527
RI
5235 return NULL;
5236
5237 return descs;
5238}
5239EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
5240
bae48da2
AC
5241/**
5242 * gpiod_put - dispose of a GPIO descriptor
5243 * @desc: GPIO descriptor to dispose of
5244 *
5245 * No descriptor can be used after gpiod_put() has been called on it.
5246 */
5247void gpiod_put(struct gpio_desc *desc)
5248{
1d7765ba
AS
5249 if (desc)
5250 gpiod_free(desc);
372e722e 5251}
bae48da2 5252EXPORT_SYMBOL_GPL(gpiod_put);
d2876d08 5253
66858527
RI
5254/**
5255 * gpiod_put_array - dispose of multiple GPIO descriptors
5256 * @descs: struct gpio_descs containing an array of descriptors
5257 */
5258void gpiod_put_array(struct gpio_descs *descs)
5259{
5260 unsigned int i;
5261
5262 for (i = 0; i < descs->ndescs; i++)
5263 gpiod_put(descs->desc[i]);
5264
5265 kfree(descs);
5266}
5267EXPORT_SYMBOL_GPL(gpiod_put_array);
5268
3c702e99
LW
5269static int __init gpiolib_dev_init(void)
5270{
5271 int ret;
5272
5273 /* Register GPIO sysfs bus */
b1911710 5274 ret = bus_register(&gpio_bus_type);
3c702e99
LW
5275 if (ret < 0) {
5276 pr_err("gpiolib: could not register GPIO bus type\n");
5277 return ret;
5278 }
5279
ddd8891e 5280 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME);
3c702e99
LW
5281 if (ret < 0) {
5282 pr_err("gpiolib: failed to allocate char dev region\n");
5283 bus_unregister(&gpio_bus_type);
63636d95 5284 return ret;
3c702e99 5285 }
63636d95
GU
5286
5287 gpiolib_initialized = true;
5288 gpiochip_setup_devs();
5289
5290 if (IS_ENABLED(CONFIG_OF_DYNAMIC))
5291 WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier));
5292
3c702e99
LW
5293 return ret;
5294}
5295core_initcall(gpiolib_dev_init);
5296
d2876d08
DB
5297#ifdef CONFIG_DEBUG_FS
5298
fdeb8e15 5299static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
d2876d08
DB
5300{
5301 unsigned i;
a0b66a73 5302 struct gpio_chip *gc = gdev->chip;
fdeb8e15
LW
5303 unsigned gpio = gdev->base;
5304 struct gpio_desc *gdesc = &gdev->descs[0];
90fd2270
LW
5305 bool is_out;
5306 bool is_irq;
5307 bool active_low;
d2876d08 5308
fdeb8e15 5309 for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) {
ced433e2
MP
5310 if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) {
5311 if (gdesc->name) {
5312 seq_printf(s, " gpio-%-3d (%-20.20s)\n",
5313 gpio, gdesc->name);
5314 }
d2876d08 5315 continue;
ced433e2 5316 }
d2876d08 5317
372e722e 5318 gpiod_get_direction(gdesc);
d2876d08 5319 is_out = test_bit(FLAG_IS_OUT, &gdesc->flags);
d468bf9e 5320 is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags);
90fd2270
LW
5321 active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags);
5322 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s",
ced433e2 5323 gpio, gdesc->name ? gdesc->name : "", gdesc->label,
d2876d08 5324 is_out ? "out" : "in ",
a0b66a73 5325 gc->get ? (gc->get(gc, i) ? "hi" : "lo") : "? ",
90fd2270
LW
5326 is_irq ? "IRQ " : "",
5327 active_low ? "ACTIVE LOW" : "");
d2876d08
DB
5328 seq_printf(s, "\n");
5329 }
5330}
5331
f9c4a31f 5332static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
d2876d08 5333{
362432ae 5334 unsigned long flags;
ff2b1359 5335 struct gpio_device *gdev = NULL;
cb1650d4 5336 loff_t index = *pos;
d2876d08 5337
f9c4a31f 5338 s->private = "";
d2876d08 5339
362432ae 5340 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 5341 list_for_each_entry(gdev, &gpio_devices, list)
362432ae
GL
5342 if (index-- == 0) {
5343 spin_unlock_irqrestore(&gpio_lock, flags);
ff2b1359 5344 return gdev;
f9c4a31f 5345 }
362432ae 5346 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f 5347
cb1650d4 5348 return NULL;
f9c4a31f
TR
5349}
5350
5351static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
5352{
362432ae 5353 unsigned long flags;
ff2b1359 5354 struct gpio_device *gdev = v;
f9c4a31f
TR
5355 void *ret = NULL;
5356
362432ae 5357 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 5358 if (list_is_last(&gdev->list, &gpio_devices))
cb1650d4
AC
5359 ret = NULL;
5360 else
ff2b1359 5361 ret = list_entry(gdev->list.next, struct gpio_device, list);
362432ae 5362 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f
TR
5363
5364 s->private = "\n";
5365 ++*pos;
5366
5367 return ret;
5368}
5369
5370static void gpiolib_seq_stop(struct seq_file *s, void *v)
5371{
5372}
5373
5374static int gpiolib_seq_show(struct seq_file *s, void *v)
5375{
ff2b1359 5376 struct gpio_device *gdev = v;
a0b66a73 5377 struct gpio_chip *gc = gdev->chip;
ff2b1359
LW
5378 struct device *parent;
5379
a0b66a73 5380 if (!gc) {
ff2b1359
LW
5381 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
5382 dev_name(&gdev->dev));
5383 return 0;
5384 }
f9c4a31f 5385
ff2b1359
LW
5386 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
5387 dev_name(&gdev->dev),
fdeb8e15 5388 gdev->base, gdev->base + gdev->ngpio - 1);
a0b66a73 5389 parent = gc->parent;
ff2b1359
LW
5390 if (parent)
5391 seq_printf(s, ", parent: %s/%s",
5392 parent->bus ? parent->bus->name : "no-bus",
5393 dev_name(parent));
a0b66a73
LW
5394 if (gc->label)
5395 seq_printf(s, ", %s", gc->label);
5396 if (gc->can_sleep)
f9c4a31f
TR
5397 seq_printf(s, ", can sleep");
5398 seq_printf(s, ":\n");
5399
a0b66a73
LW
5400 if (gc->dbg_show)
5401 gc->dbg_show(s, gc);
f9c4a31f 5402 else
fdeb8e15 5403 gpiolib_dbg_show(s, gdev);
f9c4a31f 5404
d2876d08
DB
5405 return 0;
5406}
5407
f9c4a31f
TR
5408static const struct seq_operations gpiolib_seq_ops = {
5409 .start = gpiolib_seq_start,
5410 .next = gpiolib_seq_next,
5411 .stop = gpiolib_seq_stop,
5412 .show = gpiolib_seq_show,
5413};
5414
d2876d08
DB
5415static int gpiolib_open(struct inode *inode, struct file *file)
5416{
f9c4a31f 5417 return seq_open(file, &gpiolib_seq_ops);
d2876d08
DB
5418}
5419
828c0950 5420static const struct file_operations gpiolib_operations = {
f9c4a31f 5421 .owner = THIS_MODULE,
d2876d08
DB
5422 .open = gpiolib_open,
5423 .read = seq_read,
5424 .llseek = seq_lseek,
f9c4a31f 5425 .release = seq_release,
d2876d08
DB
5426};
5427
5428static int __init gpiolib_debugfs_init(void)
5429{
5430 /* /sys/kernel/debug/gpio */
acc68b0e
GKH
5431 debugfs_create_file("gpio", S_IFREG | S_IRUGO, NULL, NULL,
5432 &gpiolib_operations);
d2876d08
DB
5433 return 0;
5434}
5435subsys_initcall(gpiolib_debugfs_init);
5436
5437#endif /* DEBUG_FS */