Commit | Line | Data |
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dae5f0af | 1 | // SPDX-License-Identifier: GPL-2.0 |
c47d9e1b | 2 | |
923a654c | 3 | #include <linux/bitmap.h> |
d2876d08 DB |
4 | #include <linux/kernel.h> |
5 | #include <linux/module.h> | |
ff77c352 | 6 | #include <linux/interrupt.h> |
d2876d08 DB |
7 | #include <linux/irq.h> |
8 | #include <linux/spinlock.h> | |
1a989d0f | 9 | #include <linux/list.h> |
d8f388d8 DB |
10 | #include <linux/device.h> |
11 | #include <linux/err.h> | |
12 | #include <linux/debugfs.h> | |
13 | #include <linux/seq_file.h> | |
14 | #include <linux/gpio.h> | |
ff77c352 | 15 | #include <linux/idr.h> |
5a0e3ad6 | 16 | #include <linux/slab.h> |
7b199811 | 17 | #include <linux/acpi.h> |
53e7cac3 | 18 | #include <linux/gpio/driver.h> |
0a6d3158 | 19 | #include <linux/gpio/machine.h> |
c771c2f4 | 20 | #include <linux/pinctrl/consumer.h> |
3c702e99 | 21 | #include <linux/fs.h> |
8b92e17e | 22 | #include <linux/compat.h> |
953b956a | 23 | #include <linux/file.h> |
3c702e99 | 24 | #include <uapi/linux/gpio.h> |
d2876d08 | 25 | |
664e3e5a | 26 | #include "gpiolib.h" |
f626d6df | 27 | #include "gpiolib-of.h" |
77cb907a | 28 | #include "gpiolib-acpi.h" |
925ca369 | 29 | #include "gpiolib-cdev.h" |
ef087d8e | 30 | #include "gpiolib-sysfs.h" |
664e3e5a | 31 | |
3f397c21 UKK |
32 | #define CREATE_TRACE_POINTS |
33 | #include <trace/events/gpio.h> | |
d2876d08 | 34 | |
79a9becd | 35 | /* Implementation infrastructure for GPIO interfaces. |
d2876d08 | 36 | * |
79a9becd AC |
37 | * The GPIO programming interface allows for inlining speed-critical |
38 | * get/set operations for common cases, so that access to SOC-integrated | |
39 | * GPIOs can sometimes cost only an instruction or two per bit. | |
d2876d08 DB |
40 | */ |
41 | ||
42 | ||
43 | /* When debugging, extend minimal trust to callers and platform code. | |
44 | * Also emit diagnostic messages that may help initial bringup, when | |
45 | * board setup or driver bugs are most common. | |
46 | * | |
47 | * Otherwise, minimize overhead in what may be bitbanging codepaths. | |
48 | */ | |
49 | #ifdef DEBUG | |
50 | #define extra_checks 1 | |
51 | #else | |
52 | #define extra_checks 0 | |
53 | #endif | |
54 | ||
ff2b1359 LW |
55 | /* Device and char device-related information */ |
56 | static DEFINE_IDA(gpio_ida); | |
3c702e99 LW |
57 | static dev_t gpio_devt; |
58 | #define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */ | |
ced2af41 | 59 | static int gpio_bus_match(struct device *dev, struct device_driver *drv); |
3c702e99 LW |
60 | static struct bus_type gpio_bus_type = { |
61 | .name = "gpio", | |
ced2af41 | 62 | .match = gpio_bus_match, |
3c702e99 | 63 | }; |
ff2b1359 | 64 | |
3027743f LA |
65 | /* |
66 | * Number of GPIOs to use for the fast path in set array | |
67 | */ | |
68 | #define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT | |
69 | ||
d2876d08 DB |
70 | /* gpio_lock prevents conflicts during gpio_desc[] table updates. |
71 | * While any GPIO is requested, its gpio_chip is not removable; | |
72 | * each GPIO's "requested" flag serves as a lock and refcount. | |
73 | */ | |
0eb4c6c2 | 74 | DEFINE_SPINLOCK(gpio_lock); |
d2876d08 | 75 | |
bae48da2 AC |
76 | static DEFINE_MUTEX(gpio_lookup_lock); |
77 | static LIST_HEAD(gpio_lookup_list); | |
ff2b1359 | 78 | LIST_HEAD(gpio_devices); |
6d86750c | 79 | |
a411e81e BG |
80 | static DEFINE_MUTEX(gpio_machine_hogs_mutex); |
81 | static LIST_HEAD(gpio_machine_hogs); | |
82 | ||
a0b66a73 LW |
83 | static void gpiochip_free_hogs(struct gpio_chip *gc); |
84 | static int gpiochip_add_irqchip(struct gpio_chip *gc, | |
39c3fd58 AL |
85 | struct lock_class_key *lock_key, |
86 | struct lock_class_key *request_key); | |
a0b66a73 LW |
87 | static void gpiochip_irqchip_remove(struct gpio_chip *gc); |
88 | static int gpiochip_irqchip_init_hw(struct gpio_chip *gc); | |
89 | static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc); | |
90 | static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc); | |
6d86750c | 91 | |
159f3cd9 | 92 | static bool gpiolib_initialized; |
6d86750c | 93 | |
d2876d08 DB |
94 | static inline void desc_set_label(struct gpio_desc *d, const char *label) |
95 | { | |
d2876d08 | 96 | d->label = label; |
d2876d08 DB |
97 | } |
98 | ||
372e722e | 99 | /** |
950d55f5 TR |
100 | * gpio_to_desc - Convert a GPIO number to its descriptor |
101 | * @gpio: global GPIO number | |
102 | * | |
103 | * Returns: | |
104 | * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO | |
105 | * with the given number exists in the system. | |
372e722e | 106 | */ |
79a9becd | 107 | struct gpio_desc *gpio_to_desc(unsigned gpio) |
372e722e | 108 | { |
ff2b1359 | 109 | struct gpio_device *gdev; |
14e85c0e AC |
110 | unsigned long flags; |
111 | ||
112 | spin_lock_irqsave(&gpio_lock, flags); | |
113 | ||
ff2b1359 | 114 | list_for_each_entry(gdev, &gpio_devices, list) { |
fdeb8e15 LW |
115 | if (gdev->base <= gpio && |
116 | gdev->base + gdev->ngpio > gpio) { | |
14e85c0e | 117 | spin_unlock_irqrestore(&gpio_lock, flags); |
fdeb8e15 | 118 | return &gdev->descs[gpio - gdev->base]; |
14e85c0e AC |
119 | } |
120 | } | |
121 | ||
122 | spin_unlock_irqrestore(&gpio_lock, flags); | |
123 | ||
0e9a5edf | 124 | if (!gpio_is_valid(gpio)) |
c47d9e1b | 125 | pr_warn("invalid GPIO %d\n", gpio); |
0e9a5edf | 126 | |
14e85c0e | 127 | return NULL; |
372e722e | 128 | } |
79a9becd | 129 | EXPORT_SYMBOL_GPL(gpio_to_desc); |
372e722e | 130 | |
d468bf9e | 131 | /** |
950d55f5 TR |
132 | * gpiochip_get_desc - get the GPIO descriptor corresponding to the given |
133 | * hardware number for this chip | |
a0b66a73 | 134 | * @gc: GPIO chip |
950d55f5 TR |
135 | * @hwnum: hardware number of the GPIO for this chip |
136 | * | |
137 | * Returns: | |
35c6cfb4 | 138 | * A pointer to the GPIO descriptor or ``ERR_PTR(-EINVAL)`` if no GPIO exists |
950d55f5 | 139 | * in the given chip for the specified hardware number. |
d468bf9e | 140 | */ |
a0b66a73 | 141 | struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc, |
06863620 | 142 | unsigned int hwnum) |
d468bf9e | 143 | { |
a0b66a73 | 144 | struct gpio_device *gdev = gc->gpiodev; |
fdeb8e15 LW |
145 | |
146 | if (hwnum >= gdev->ngpio) | |
b7d0a28a | 147 | return ERR_PTR(-EINVAL); |
d468bf9e | 148 | |
fdeb8e15 | 149 | return &gdev->descs[hwnum]; |
d468bf9e | 150 | } |
97795420 | 151 | EXPORT_SYMBOL_GPL(gpiochip_get_desc); |
372e722e AC |
152 | |
153 | /** | |
950d55f5 TR |
154 | * desc_to_gpio - convert a GPIO descriptor to the integer namespace |
155 | * @desc: GPIO descriptor | |
156 | * | |
372e722e | 157 | * This should disappear in the future but is needed since we still |
950d55f5 TR |
158 | * use GPIO numbers for error messages and sysfs nodes. |
159 | * | |
160 | * Returns: | |
161 | * The global GPIO number for the GPIO specified by its descriptor. | |
372e722e | 162 | */ |
79a9becd | 163 | int desc_to_gpio(const struct gpio_desc *desc) |
372e722e | 164 | { |
fdeb8e15 | 165 | return desc->gdev->base + (desc - &desc->gdev->descs[0]); |
372e722e | 166 | } |
79a9becd | 167 | EXPORT_SYMBOL_GPL(desc_to_gpio); |
372e722e AC |
168 | |
169 | ||
79a9becd AC |
170 | /** |
171 | * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs | |
172 | * @desc: descriptor to return the chip of | |
173 | */ | |
174 | struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc) | |
372e722e | 175 | { |
dd3b9a44 | 176 | if (!desc || !desc->gdev) |
fdeb8e15 LW |
177 | return NULL; |
178 | return desc->gdev->chip; | |
372e722e | 179 | } |
79a9becd | 180 | EXPORT_SYMBOL_GPL(gpiod_to_chip); |
d2876d08 | 181 | |
8d0aab2f AV |
182 | /* dynamic allocation of GPIOs, e.g. on a hotplugged device */ |
183 | static int gpiochip_find_base(int ngpio) | |
184 | { | |
ff2b1359 | 185 | struct gpio_device *gdev; |
83cabe33 | 186 | int base = ARCH_NR_GPIOS - ngpio; |
8d0aab2f | 187 | |
ff2b1359 | 188 | list_for_each_entry_reverse(gdev, &gpio_devices, list) { |
83cabe33 | 189 | /* found a free space? */ |
fdeb8e15 | 190 | if (gdev->base + gdev->ngpio <= base) |
83cabe33 AC |
191 | break; |
192 | else | |
193 | /* nope, check the space right before the chip */ | |
fdeb8e15 | 194 | base = gdev->base - ngpio; |
8d0aab2f AV |
195 | } |
196 | ||
83cabe33 | 197 | if (gpio_is_valid(base)) { |
8d0aab2f | 198 | pr_debug("%s: found new base at %d\n", __func__, base); |
83cabe33 AC |
199 | return base; |
200 | } else { | |
201 | pr_err("%s: cannot find free range\n", __func__); | |
202 | return -ENOSPC; | |
169b6a7a | 203 | } |
169b6a7a AV |
204 | } |
205 | ||
79a9becd AC |
206 | /** |
207 | * gpiod_get_direction - return the current direction of a GPIO | |
208 | * @desc: GPIO to get the direction of | |
209 | * | |
94fc7309 | 210 | * Returns 0 for output, 1 for input, or an error code in case of error. |
79a9becd AC |
211 | * |
212 | * This function may sleep if gpiod_cansleep() is true. | |
213 | */ | |
8e53b0f1 | 214 | int gpiod_get_direction(struct gpio_desc *desc) |
80b0a602 | 215 | { |
a0b66a73 | 216 | struct gpio_chip *gc; |
13daf489 | 217 | unsigned int offset; |
d377f56f | 218 | int ret; |
80b0a602 | 219 | |
a0b66a73 | 220 | gc = gpiod_to_chip(desc); |
372e722e | 221 | offset = gpio_chip_hwgpio(desc); |
80b0a602 | 222 | |
256efaea RK |
223 | /* |
224 | * Open drain emulation using input mode may incorrectly report | |
225 | * input here, fix that up. | |
226 | */ | |
227 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && | |
228 | test_bit(FLAG_IS_OUT, &desc->flags)) | |
229 | return 0; | |
230 | ||
a0b66a73 | 231 | if (!gc->get_direction) |
d0121b85 | 232 | return -ENOTSUPP; |
80b0a602 | 233 | |
a0b66a73 | 234 | ret = gc->get_direction(gc, offset); |
4fc5bfeb AS |
235 | if (ret < 0) |
236 | return ret; | |
237 | ||
238 | /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */ | |
239 | if (ret > 0) | |
d377f56f | 240 | ret = 1; |
4fc5bfeb AS |
241 | |
242 | assign_bit(FLAG_IS_OUT, &desc->flags, !ret); | |
243 | ||
d377f56f | 244 | return ret; |
80b0a602 | 245 | } |
79a9becd | 246 | EXPORT_SYMBOL_GPL(gpiod_get_direction); |
80b0a602 | 247 | |
1a989d0f AC |
248 | /* |
249 | * Add a new chip to the global chips list, keeping the list of chips sorted | |
ef7c7553 | 250 | * by range(means [base, base + ngpio - 1]) order. |
1a989d0f AC |
251 | * |
252 | * Return -EBUSY if the new chip overlaps with some other chip's integer | |
253 | * space. | |
254 | */ | |
ff2b1359 | 255 | static int gpiodev_add_to_list(struct gpio_device *gdev) |
1a989d0f | 256 | { |
a961f9b4 | 257 | struct gpio_device *prev, *next; |
1a989d0f | 258 | |
ff2b1359 | 259 | if (list_empty(&gpio_devices)) { |
a961f9b4 | 260 | /* initial entry in list */ |
ff2b1359 | 261 | list_add_tail(&gdev->list, &gpio_devices); |
e28ecca6 | 262 | return 0; |
1a989d0f AC |
263 | } |
264 | ||
a961f9b4 BJZ |
265 | next = list_entry(gpio_devices.next, struct gpio_device, list); |
266 | if (gdev->base + gdev->ngpio <= next->base) { | |
267 | /* add before first entry */ | |
268 | list_add(&gdev->list, &gpio_devices); | |
269 | return 0; | |
1a989d0f AC |
270 | } |
271 | ||
a961f9b4 BJZ |
272 | prev = list_entry(gpio_devices.prev, struct gpio_device, list); |
273 | if (prev->base + prev->ngpio <= gdev->base) { | |
274 | /* add behind last entry */ | |
275 | list_add_tail(&gdev->list, &gpio_devices); | |
96098df1 | 276 | return 0; |
1a989d0f AC |
277 | } |
278 | ||
a961f9b4 BJZ |
279 | list_for_each_entry_safe(prev, next, &gpio_devices, list) { |
280 | /* at the end of the list */ | |
281 | if (&next->list == &gpio_devices) | |
282 | break; | |
1a989d0f | 283 | |
a961f9b4 BJZ |
284 | /* add between prev and next */ |
285 | if (prev->base + prev->ngpio <= gdev->base | |
286 | && gdev->base + gdev->ngpio <= next->base) { | |
287 | list_add(&gdev->list, &prev->list); | |
288 | return 0; | |
289 | } | |
290 | } | |
291 | ||
292 | dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n"); | |
293 | return -EBUSY; | |
1a989d0f AC |
294 | } |
295 | ||
950d55f5 | 296 | /* |
f881bab0 | 297 | * Convert a GPIO name to its descriptor |
582838ea GU |
298 | * Note that there is no guarantee that GPIO names are globally unique! |
299 | * Hence this function will return, if it exists, a reference to the first GPIO | |
300 | * line found that matches the given name. | |
f881bab0 LW |
301 | */ |
302 | static struct gpio_desc *gpio_name_to_desc(const char * const name) | |
303 | { | |
ff2b1359 | 304 | struct gpio_device *gdev; |
f881bab0 LW |
305 | unsigned long flags; |
306 | ||
ee203bbd MM |
307 | if (!name) |
308 | return NULL; | |
309 | ||
f881bab0 LW |
310 | spin_lock_irqsave(&gpio_lock, flags); |
311 | ||
ff2b1359 | 312 | list_for_each_entry(gdev, &gpio_devices, list) { |
f881bab0 LW |
313 | int i; |
314 | ||
fdeb8e15 LW |
315 | for (i = 0; i != gdev->ngpio; ++i) { |
316 | struct gpio_desc *desc = &gdev->descs[i]; | |
f881bab0 | 317 | |
ee203bbd | 318 | if (!desc->name) |
f881bab0 LW |
319 | continue; |
320 | ||
fdeb8e15 | 321 | if (!strcmp(desc->name, name)) { |
f881bab0 | 322 | spin_unlock_irqrestore(&gpio_lock, flags); |
fdeb8e15 | 323 | return desc; |
f881bab0 LW |
324 | } |
325 | } | |
326 | } | |
327 | ||
328 | spin_unlock_irqrestore(&gpio_lock, flags); | |
329 | ||
330 | return NULL; | |
331 | } | |
332 | ||
5f3ca732 | 333 | /* |
582838ea GU |
334 | * Take the names from gc->names and assign them to their GPIO descriptors. |
335 | * Warn if a name is already used for a GPIO line on a different GPIO chip. | |
5f3ca732 | 336 | * |
582838ea GU |
337 | * Note that: |
338 | * 1. Non-unique names are still accepted, | |
339 | * 2. Name collisions within the same GPIO chip are not reported. | |
5f3ca732 MP |
340 | */ |
341 | static int gpiochip_set_desc_names(struct gpio_chip *gc) | |
342 | { | |
fdeb8e15 | 343 | struct gpio_device *gdev = gc->gpiodev; |
5f3ca732 MP |
344 | int i; |
345 | ||
5f3ca732 MP |
346 | /* First check all names if they are unique */ |
347 | for (i = 0; i != gc->ngpio; ++i) { | |
348 | struct gpio_desc *gpio; | |
349 | ||
350 | gpio = gpio_name_to_desc(gc->names[i]); | |
f881bab0 | 351 | if (gpio) |
fdeb8e15 | 352 | dev_warn(&gdev->dev, |
34ffd85d | 353 | "Detected name collision for GPIO name '%s'\n", |
f881bab0 | 354 | gc->names[i]); |
5f3ca732 MP |
355 | } |
356 | ||
357 | /* Then add all names to the GPIO descriptors */ | |
358 | for (i = 0; i != gc->ngpio; ++i) | |
fdeb8e15 | 359 | gdev->descs[i].name = gc->names[i]; |
5f3ca732 MP |
360 | |
361 | return 0; | |
362 | } | |
363 | ||
32fc5aa2 BG |
364 | /* |
365 | * devprop_gpiochip_set_names - Set GPIO line names using device properties | |
366 | * @chip: GPIO chip whose lines should be named, if possible | |
367 | * | |
368 | * Looks for device property "gpio-line-names" and if it exists assigns | |
369 | * GPIO line names for the chip. The memory allocated for the assigned | |
370 | * names belong to the underlying software node and should not be released | |
371 | * by the caller. | |
372 | */ | |
373 | static int devprop_gpiochip_set_names(struct gpio_chip *chip) | |
374 | { | |
375 | struct gpio_device *gdev = chip->gpiodev; | |
376 | struct device *dev = chip->parent; | |
377 | const char **names; | |
378 | int ret, i; | |
379 | int count; | |
380 | ||
587823d3 BG |
381 | /* GPIO chip may not have a parent device whose properties we inspect. */ |
382 | if (!dev) | |
383 | return 0; | |
384 | ||
32fc5aa2 BG |
385 | count = device_property_string_array_count(dev, "gpio-line-names"); |
386 | if (count < 0) | |
387 | return 0; | |
388 | ||
389 | if (count > gdev->ngpio) { | |
390 | dev_warn(&gdev->dev, "gpio-line-names is length %d but should be at most length %d", | |
391 | count, gdev->ngpio); | |
392 | count = gdev->ngpio; | |
393 | } | |
394 | ||
395 | names = kcalloc(count, sizeof(*names), GFP_KERNEL); | |
396 | if (!names) | |
397 | return -ENOMEM; | |
398 | ||
399 | ret = device_property_read_string_array(dev, "gpio-line-names", | |
400 | names, count); | |
401 | if (ret < 0) { | |
402 | dev_warn(&gdev->dev, "failed to read GPIO line names\n"); | |
403 | kfree(names); | |
404 | return ret; | |
405 | } | |
406 | ||
407 | for (i = 0; i < count; i++) | |
408 | gdev->descs[i].name = names[i]; | |
409 | ||
410 | kfree(names); | |
411 | ||
412 | return 0; | |
413 | } | |
414 | ||
a0b66a73 | 415 | static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc) |
e4371f6e SB |
416 | { |
417 | unsigned long *p; | |
418 | ||
a0b66a73 | 419 | p = bitmap_alloc(gc->ngpio, GFP_KERNEL); |
e4371f6e SB |
420 | if (!p) |
421 | return NULL; | |
422 | ||
423 | /* Assume by default all GPIOs are valid */ | |
a0b66a73 | 424 | bitmap_fill(p, gc->ngpio); |
e4371f6e SB |
425 | |
426 | return p; | |
427 | } | |
428 | ||
f626d6df | 429 | static int gpiochip_alloc_valid_mask(struct gpio_chip *gc) |
726cb3ba | 430 | { |
eb1e8bd6 | 431 | if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask)) |
726cb3ba SB |
432 | return 0; |
433 | ||
f626d6df LW |
434 | gc->valid_mask = gpiochip_allocate_mask(gc); |
435 | if (!gc->valid_mask) | |
726cb3ba SB |
436 | return -ENOMEM; |
437 | ||
438 | return 0; | |
439 | } | |
440 | ||
c9fc5aff | 441 | static int gpiochip_init_valid_mask(struct gpio_chip *gc) |
f8ec92a9 | 442 | { |
c9fc5aff LW |
443 | if (gc->init_valid_mask) |
444 | return gc->init_valid_mask(gc, | |
445 | gc->valid_mask, | |
446 | gc->ngpio); | |
f8ec92a9 RRD |
447 | |
448 | return 0; | |
449 | } | |
450 | ||
a0b66a73 | 451 | static void gpiochip_free_valid_mask(struct gpio_chip *gc) |
726cb3ba | 452 | { |
a0b66a73 LW |
453 | bitmap_free(gc->valid_mask); |
454 | gc->valid_mask = NULL; | |
726cb3ba SB |
455 | } |
456 | ||
b056ca1c AS |
457 | static int gpiochip_add_pin_ranges(struct gpio_chip *gc) |
458 | { | |
459 | if (gc->add_pin_ranges) | |
460 | return gc->add_pin_ranges(gc); | |
461 | ||
462 | return 0; | |
463 | } | |
464 | ||
a0b66a73 | 465 | bool gpiochip_line_is_valid(const struct gpio_chip *gc, |
726cb3ba SB |
466 | unsigned int offset) |
467 | { | |
468 | /* No mask means all valid */ | |
a0b66a73 | 469 | if (likely(!gc->valid_mask)) |
726cb3ba | 470 | return true; |
a0b66a73 | 471 | return test_bit(offset, gc->valid_mask); |
726cb3ba SB |
472 | } |
473 | EXPORT_SYMBOL_GPL(gpiochip_line_is_valid); | |
474 | ||
ff2b1359 LW |
475 | static void gpiodevice_release(struct device *dev) |
476 | { | |
a6112998 | 477 | struct gpio_device *gdev = container_of(dev, struct gpio_device, dev); |
cf25ef6b | 478 | unsigned long flags; |
ff2b1359 | 479 | |
cf25ef6b | 480 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 481 | list_del(&gdev->list); |
cf25ef6b JH |
482 | spin_unlock_irqrestore(&gpio_lock, flags); |
483 | ||
8d4a85b6 | 484 | ida_free(&gpio_ida, gdev->id); |
fcf273e5 | 485 | kfree_const(gdev->label); |
476e2fc5 | 486 | kfree(gdev->descs); |
9efd9e69 | 487 | kfree(gdev); |
ff2b1359 LW |
488 | } |
489 | ||
1f5eb8b1 KG |
490 | #ifdef CONFIG_GPIO_CDEV |
491 | #define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt)) | |
492 | #define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev)) | |
493 | #else | |
494 | /* | |
495 | * gpiolib_cdev_register() indirectly calls device_add(), which is still | |
496 | * required even when cdev is not selected. | |
497 | */ | |
498 | #define gcdev_register(gdev, devt) device_add(&(gdev)->dev) | |
499 | #define gcdev_unregister(gdev) device_del(&(gdev)->dev) | |
500 | #endif | |
501 | ||
159f3cd9 GR |
502 | static int gpiochip_setup_dev(struct gpio_device *gdev) |
503 | { | |
d377f56f | 504 | int ret; |
159f3cd9 | 505 | |
1f5eb8b1 | 506 | ret = gcdev_register(gdev, gpio_devt); |
d377f56f LW |
507 | if (ret) |
508 | return ret; | |
111379dc | 509 | |
d377f56f LW |
510 | ret = gpiochip_sysfs_register(gdev); |
511 | if (ret) | |
159f3cd9 GR |
512 | goto err_remove_device; |
513 | ||
514 | /* From this point, the .release() function cleans up gpio_device */ | |
515 | gdev->dev.release = gpiodevice_release; | |
262b9011 GU |
516 | dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base, |
517 | gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic"); | |
159f3cd9 GR |
518 | |
519 | return 0; | |
520 | ||
521 | err_remove_device: | |
1f5eb8b1 | 522 | gcdev_unregister(gdev); |
d377f56f | 523 | return ret; |
159f3cd9 GR |
524 | } |
525 | ||
a0b66a73 | 526 | static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog) |
a411e81e BG |
527 | { |
528 | struct gpio_desc *desc; | |
529 | int rv; | |
530 | ||
a0b66a73 | 531 | desc = gpiochip_get_desc(gc, hog->chip_hwnum); |
a411e81e | 532 | if (IS_ERR(desc)) { |
262b9011 GU |
533 | chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__, |
534 | PTR_ERR(desc)); | |
a411e81e BG |
535 | return; |
536 | } | |
537 | ||
ba3efdff | 538 | if (test_bit(FLAG_IS_HOGGED, &desc->flags)) |
a411e81e BG |
539 | return; |
540 | ||
541 | rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags); | |
542 | if (rv) | |
262b9011 GU |
543 | gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n", |
544 | __func__, gc->label, hog->chip_hwnum, rv); | |
a411e81e BG |
545 | } |
546 | ||
a0b66a73 | 547 | static void machine_gpiochip_add(struct gpio_chip *gc) |
a411e81e BG |
548 | { |
549 | struct gpiod_hog *hog; | |
550 | ||
551 | mutex_lock(&gpio_machine_hogs_mutex); | |
552 | ||
553 | list_for_each_entry(hog, &gpio_machine_hogs, list) { | |
a0b66a73 LW |
554 | if (!strcmp(gc->label, hog->chip_label)) |
555 | gpiochip_machine_hog(gc, hog); | |
a411e81e BG |
556 | } |
557 | ||
558 | mutex_unlock(&gpio_machine_hogs_mutex); | |
559 | } | |
560 | ||
159f3cd9 GR |
561 | static void gpiochip_setup_devs(void) |
562 | { | |
563 | struct gpio_device *gdev; | |
d377f56f | 564 | int ret; |
159f3cd9 GR |
565 | |
566 | list_for_each_entry(gdev, &gpio_devices, list) { | |
d377f56f LW |
567 | ret = gpiochip_setup_dev(gdev); |
568 | if (ret) | |
262b9011 GU |
569 | dev_err(&gdev->dev, |
570 | "Failed to initialize gpio device (%d)\n", ret); | |
159f3cd9 GR |
571 | } |
572 | } | |
573 | ||
a0b66a73 | 574 | int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data, |
39c3fd58 AL |
575 | struct lock_class_key *lock_key, |
576 | struct lock_class_key *request_key) | |
d2876d08 DB |
577 | { |
578 | unsigned long flags; | |
d377f56f | 579 | int ret = 0; |
ff2b1359 | 580 | unsigned i; |
a0b66a73 | 581 | int base = gc->base; |
ff2b1359 | 582 | struct gpio_device *gdev; |
d2876d08 | 583 | |
ff2b1359 LW |
584 | /* |
585 | * First: allocate and populate the internal stat container, and | |
586 | * set up the struct device. | |
587 | */ | |
969f07b4 | 588 | gdev = kzalloc(sizeof(*gdev), GFP_KERNEL); |
ff2b1359 | 589 | if (!gdev) |
14e85c0e | 590 | return -ENOMEM; |
3c702e99 | 591 | gdev->dev.bus = &gpio_bus_type; |
a0b66a73 LW |
592 | gdev->chip = gc; |
593 | gc->gpiodev = gdev; | |
594 | if (gc->parent) { | |
595 | gdev->dev.parent = gc->parent; | |
596 | gdev->dev.of_node = gc->parent->of_node; | |
acc6e331 TR |
597 | } |
598 | ||
4731210c | 599 | of_gpio_dev_init(gc, gdev); |
acc6e331 | 600 | |
8d4a85b6 | 601 | gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL); |
ff2b1359 | 602 | if (gdev->id < 0) { |
d377f56f | 603 | ret = gdev->id; |
ff2b1359 LW |
604 | goto err_free_gdev; |
605 | } | |
c351bb64 QW |
606 | |
607 | ret = dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id); | |
608 | if (ret) | |
609 | goto err_free_ida; | |
610 | ||
ff2b1359 | 611 | device_initialize(&gdev->dev); |
a0b66a73 LW |
612 | if (gc->parent && gc->parent->driver) |
613 | gdev->owner = gc->parent->driver->owner; | |
614 | else if (gc->owner) | |
ff2b1359 | 615 | /* TODO: remove chip->owner */ |
a0b66a73 | 616 | gdev->owner = gc->owner; |
ff2b1359 LW |
617 | else |
618 | gdev->owner = THIS_MODULE; | |
d2876d08 | 619 | |
a0b66a73 | 620 | gdev->descs = kcalloc(gc->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL); |
1c3cdb18 | 621 | if (!gdev->descs) { |
d377f56f | 622 | ret = -ENOMEM; |
c351bb64 | 623 | goto err_free_dev_name; |
ff2b1359 LW |
624 | } |
625 | ||
a0b66a73 LW |
626 | if (gc->ngpio == 0) { |
627 | chip_err(gc, "tried to insert a GPIO chip with zero lines\n"); | |
d377f56f | 628 | ret = -EINVAL; |
159f3cd9 | 629 | goto err_free_descs; |
5ed41cc4 | 630 | } |
df4878e9 | 631 | |
a0b66a73 LW |
632 | if (gc->ngpio > FASTPATH_NGPIO) |
633 | chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n", | |
634 | gc->ngpio, FASTPATH_NGPIO); | |
3027743f | 635 | |
a0b66a73 | 636 | gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL); |
df4878e9 | 637 | if (!gdev->label) { |
d377f56f | 638 | ret = -ENOMEM; |
476e2fc5 | 639 | goto err_free_descs; |
df4878e9 LW |
640 | } |
641 | ||
a0b66a73 | 642 | gdev->ngpio = gc->ngpio; |
43c54eca | 643 | gdev->data = data; |
5ed41cc4 | 644 | |
d2876d08 DB |
645 | spin_lock_irqsave(&gpio_lock, flags); |
646 | ||
fdeb8e15 LW |
647 | /* |
648 | * TODO: this allocates a Linux GPIO number base in the global | |
649 | * GPIO numberspace for this chip. In the long run we want to | |
650 | * get *rid* of this numberspace and use only descriptors, but | |
651 | * it may be a pipe dream. It will not happen before we get rid | |
652 | * of the sysfs interface anyways. | |
653 | */ | |
8d0aab2f | 654 | if (base < 0) { |
a0b66a73 | 655 | base = gpiochip_find_base(gc->ngpio); |
8d0aab2f | 656 | if (base < 0) { |
d377f56f | 657 | ret = base; |
225fce83 | 658 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 659 | goto err_free_label; |
8d0aab2f | 660 | } |
fdeb8e15 LW |
661 | /* |
662 | * TODO: it should not be necessary to reflect the assigned | |
663 | * base outside of the GPIO subsystem. Go over drivers and | |
664 | * see if anyone makes use of this, else drop this and assign | |
665 | * a poison instead. | |
666 | */ | |
a0b66a73 | 667 | gc->base = base; |
8d0aab2f | 668 | } |
fdeb8e15 | 669 | gdev->base = base; |
8d0aab2f | 670 | |
d377f56f LW |
671 | ret = gpiodev_add_to_list(gdev); |
672 | if (ret) { | |
05aa5203 | 673 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 674 | goto err_free_label; |
05aa5203 | 675 | } |
1a989d0f | 676 | |
a0b66a73 | 677 | for (i = 0; i < gc->ngpio; i++) |
767cd17a | 678 | gdev->descs[i].gdev = gdev; |
14e85c0e | 679 | |
207270dd DC |
680 | spin_unlock_irqrestore(&gpio_lock, flags); |
681 | ||
6accc376 | 682 | BLOCKING_INIT_NOTIFIER_HEAD(&gdev->notifier); |
51c1064e | 683 | |
f23f1516 | 684 | #ifdef CONFIG_PINCTRL |
20ec3e39 | 685 | INIT_LIST_HEAD(&gdev->pin_ranges); |
f23f1516 SH |
686 | #endif |
687 | ||
7cba1a4d BG |
688 | if (gc->names) |
689 | ret = gpiochip_set_desc_names(gc); | |
690 | else | |
691 | ret = devprop_gpiochip_set_names(gc); | |
d377f56f | 692 | if (ret) |
5f3ca732 MP |
693 | goto err_remove_from_list; |
694 | ||
a0b66a73 | 695 | ret = gpiochip_alloc_valid_mask(gc); |
d377f56f | 696 | if (ret) |
48057ed1 | 697 | goto err_remove_from_list; |
e0d89728 | 698 | |
a0b66a73 | 699 | ret = of_gpiochip_add(gc); |
d377f56f | 700 | if (ret) |
48057ed1 | 701 | goto err_free_gpiochip_mask; |
28355f81 | 702 | |
a0b66a73 | 703 | ret = gpiochip_init_valid_mask(gc); |
d377f56f | 704 | if (ret) |
35779890 | 705 | goto err_remove_of_chip; |
f8ec92a9 | 706 | |
a0b66a73 | 707 | for (i = 0; i < gc->ngpio; i++) { |
3edfb7bd RRD |
708 | struct gpio_desc *desc = &gdev->descs[i]; |
709 | ||
a0b66a73 | 710 | if (gc->get_direction && gpiochip_line_is_valid(gc, i)) { |
4fc5bfeb | 711 | assign_bit(FLAG_IS_OUT, |
a0b66a73 | 712 | &desc->flags, !gc->get_direction(gc, i)); |
d95da993 | 713 | } else { |
4fc5bfeb | 714 | assign_bit(FLAG_IS_OUT, |
a0b66a73 | 715 | &desc->flags, !gc->direction_input); |
d95da993 | 716 | } |
3edfb7bd RRD |
717 | } |
718 | ||
a0b66a73 | 719 | ret = gpiochip_add_pin_ranges(gc); |
b056ca1c AS |
720 | if (ret) |
721 | goto err_remove_of_chip; | |
722 | ||
a0b66a73 | 723 | acpi_gpiochip_add(gc); |
391c970c | 724 | |
a0b66a73 | 725 | machine_gpiochip_add(gc); |
a411e81e | 726 | |
a0b66a73 | 727 | ret = gpiochip_irqchip_init_valid_mask(gc); |
9411e3aa AS |
728 | if (ret) |
729 | goto err_remove_acpi_chip; | |
730 | ||
a0b66a73 | 731 | ret = gpiochip_irqchip_init_hw(gc); |
fbdf8d4b | 732 | if (ret) |
48057ed1 LW |
733 | goto err_remove_acpi_chip; |
734 | ||
a0b66a73 | 735 | ret = gpiochip_add_irqchip(gc, lock_key, request_key); |
fbdf8d4b | 736 | if (ret) |
48057ed1 LW |
737 | goto err_remove_irqchip_mask; |
738 | ||
3c702e99 LW |
739 | /* |
740 | * By first adding the chardev, and then adding the device, | |
741 | * we get a device node entry in sysfs under | |
742 | * /sys/bus/gpio/devices/gpiochipN/dev that can be used for | |
743 | * coldplug of device nodes and other udev business. | |
159f3cd9 GR |
744 | * We can do this only if gpiolib has been initialized. |
745 | * Otherwise, defer until later. | |
3c702e99 | 746 | */ |
159f3cd9 | 747 | if (gpiolib_initialized) { |
d377f56f LW |
748 | ret = gpiochip_setup_dev(gdev); |
749 | if (ret) | |
48057ed1 | 750 | goto err_remove_irqchip; |
159f3cd9 | 751 | } |
cedb1881 | 752 | return 0; |
3bae4811 | 753 | |
48057ed1 | 754 | err_remove_irqchip: |
a0b66a73 | 755 | gpiochip_irqchip_remove(gc); |
48057ed1 | 756 | err_remove_irqchip_mask: |
a0b66a73 | 757 | gpiochip_irqchip_free_valid_mask(gc); |
35779890 | 758 | err_remove_acpi_chip: |
a0b66a73 | 759 | acpi_gpiochip_remove(gc); |
35779890 | 760 | err_remove_of_chip: |
a0b66a73 LW |
761 | gpiochip_free_hogs(gc); |
762 | of_gpiochip_remove(gc); | |
35779890 | 763 | err_free_gpiochip_mask: |
a0b66a73 LW |
764 | gpiochip_remove_pin_ranges(gc); |
765 | gpiochip_free_valid_mask(gc); | |
5f3ca732 | 766 | err_remove_from_list: |
225fce83 | 767 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 768 | list_del(&gdev->list); |
3bae4811 | 769 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 770 | err_free_label: |
fcf273e5 | 771 | kfree_const(gdev->label); |
476e2fc5 GR |
772 | err_free_descs: |
773 | kfree(gdev->descs); | |
c351bb64 QW |
774 | err_free_dev_name: |
775 | kfree(dev_name(&gdev->dev)); | |
a05a1404 | 776 | err_free_ida: |
8d4a85b6 | 777 | ida_free(&gpio_ida, gdev->id); |
a05a1404 | 778 | err_free_gdev: |
d2876d08 | 779 | /* failures here can mean systems won't boot... */ |
3cc1fb73 GS |
780 | if (ret != -EPROBE_DEFER) { |
781 | pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__, | |
782 | gdev->base, gdev->base + gdev->ngpio - 1, | |
783 | gc->label ? : "generic", ret); | |
784 | } | |
fdeb8e15 | 785 | kfree(gdev); |
d377f56f | 786 | return ret; |
d2876d08 | 787 | } |
959bc7b2 | 788 | EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key); |
d2876d08 | 789 | |
43c54eca LW |
790 | /** |
791 | * gpiochip_get_data() - get per-subdriver data for the chip | |
a0b66a73 | 792 | * @gc: GPIO chip |
950d55f5 TR |
793 | * |
794 | * Returns: | |
795 | * The per-subdriver data for the chip. | |
43c54eca | 796 | */ |
a0b66a73 | 797 | void *gpiochip_get_data(struct gpio_chip *gc) |
43c54eca | 798 | { |
a0b66a73 | 799 | return gc->gpiodev->data; |
43c54eca LW |
800 | } |
801 | EXPORT_SYMBOL_GPL(gpiochip_get_data); | |
802 | ||
d2876d08 DB |
803 | /** |
804 | * gpiochip_remove() - unregister a gpio_chip | |
a0b66a73 | 805 | * @gc: the chip to unregister |
d2876d08 DB |
806 | * |
807 | * A gpio_chip with any GPIOs still requested may not be removed. | |
808 | */ | |
a0b66a73 | 809 | void gpiochip_remove(struct gpio_chip *gc) |
d2876d08 | 810 | { |
a0b66a73 | 811 | struct gpio_device *gdev = gc->gpiodev; |
d2876d08 | 812 | unsigned long flags; |
869233f8 | 813 | unsigned int i; |
d2876d08 | 814 | |
ff2b1359 | 815 | /* FIXME: should the legacy sysfs handling be moved to gpio_device? */ |
afbc4f31 | 816 | gpiochip_sysfs_unregister(gdev); |
a0b66a73 | 817 | gpiochip_free_hogs(gc); |
bd203bd5 BJZ |
818 | /* Numb the device, cancelling all outstanding operations */ |
819 | gdev->chip = NULL; | |
a0b66a73 LW |
820 | gpiochip_irqchip_remove(gc); |
821 | acpi_gpiochip_remove(gc); | |
822 | of_gpiochip_remove(gc); | |
823 | gpiochip_remove_pin_ranges(gc); | |
824 | gpiochip_free_valid_mask(gc); | |
43c54eca LW |
825 | /* |
826 | * We accept no more calls into the driver from this point, so | |
827 | * NULL the driver data pointer | |
828 | */ | |
829 | gdev->data = NULL; | |
391c970c | 830 | |
6798acaa | 831 | spin_lock_irqsave(&gpio_lock, flags); |
fdeb8e15 | 832 | for (i = 0; i < gdev->ngpio; i++) { |
a0b66a73 | 833 | if (gpiochip_is_requested(gc, i)) |
869233f8 | 834 | break; |
d2876d08 | 835 | } |
d2876d08 | 836 | spin_unlock_irqrestore(&gpio_lock, flags); |
14e85c0e | 837 | |
ca18a852 | 838 | if (i != gdev->ngpio) |
fdeb8e15 | 839 | dev_crit(&gdev->dev, |
58383c78 | 840 | "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n"); |
fab28b89 | 841 | |
ff2b1359 LW |
842 | /* |
843 | * The gpiochip side puts its use of the device to rest here: | |
844 | * if there are no userspace clients, the chardev and device will | |
845 | * be removed, else it will be dangling until the last user is | |
846 | * gone. | |
847 | */ | |
1f5eb8b1 | 848 | gcdev_unregister(gdev); |
ff2b1359 | 849 | put_device(&gdev->dev); |
d2876d08 DB |
850 | } |
851 | EXPORT_SYMBOL_GPL(gpiochip_remove); | |
852 | ||
594fa265 GL |
853 | /** |
854 | * gpiochip_find() - iterator for locating a specific gpio_chip | |
855 | * @data: data to pass to match function | |
950d55f5 | 856 | * @match: Callback function to check gpio_chip |
594fa265 GL |
857 | * |
858 | * Similar to bus_find_device. It returns a reference to a gpio_chip as | |
859 | * determined by a user supplied @match callback. The callback should return | |
860 | * 0 if the device doesn't match and non-zero if it does. If the callback is | |
861 | * non-zero, this function will return to the caller and not iterate over any | |
862 | * more gpio_chips. | |
863 | */ | |
07ce8ec7 | 864 | struct gpio_chip *gpiochip_find(void *data, |
a0b66a73 | 865 | int (*match)(struct gpio_chip *gc, |
3d0f7cf0 | 866 | void *data)) |
594fa265 | 867 | { |
ff2b1359 | 868 | struct gpio_device *gdev; |
a0b66a73 | 869 | struct gpio_chip *gc = NULL; |
594fa265 | 870 | unsigned long flags; |
594fa265 GL |
871 | |
872 | spin_lock_irqsave(&gpio_lock, flags); | |
ff2b1359 | 873 | list_for_each_entry(gdev, &gpio_devices, list) |
acf06ff7 | 874 | if (gdev->chip && match(gdev->chip, data)) { |
a0b66a73 | 875 | gc = gdev->chip; |
594fa265 | 876 | break; |
acf06ff7 | 877 | } |
ff2b1359 | 878 | |
594fa265 GL |
879 | spin_unlock_irqrestore(&gpio_lock, flags); |
880 | ||
a0b66a73 | 881 | return gc; |
594fa265 | 882 | } |
8fa0c9bf | 883 | EXPORT_SYMBOL_GPL(gpiochip_find); |
d2876d08 | 884 | |
a0b66a73 | 885 | static int gpiochip_match_name(struct gpio_chip *gc, void *data) |
79697ef9 AC |
886 | { |
887 | const char *name = data; | |
888 | ||
a0b66a73 | 889 | return !strcmp(gc->label, name); |
79697ef9 AC |
890 | } |
891 | ||
892 | static struct gpio_chip *find_chip_by_name(const char *name) | |
893 | { | |
894 | return gpiochip_find((void *)name, gpiochip_match_name); | |
895 | } | |
896 | ||
14250520 LW |
897 | #ifdef CONFIG_GPIOLIB_IRQCHIP |
898 | ||
899 | /* | |
900 | * The following is irqchip helper code for gpiochips. | |
901 | */ | |
902 | ||
9411e3aa AS |
903 | static int gpiochip_irqchip_init_hw(struct gpio_chip *gc) |
904 | { | |
905 | struct gpio_irq_chip *girq = &gc->irq; | |
906 | ||
907 | if (!girq->init_hw) | |
908 | return 0; | |
909 | ||
910 | return girq->init_hw(gc); | |
911 | } | |
912 | ||
5fbe5b58 | 913 | static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc) |
79b804cb | 914 | { |
5fbe5b58 LW |
915 | struct gpio_irq_chip *girq = &gc->irq; |
916 | ||
917 | if (!girq->init_valid_mask) | |
79b804cb MW |
918 | return 0; |
919 | ||
5fbe5b58 LW |
920 | girq->valid_mask = gpiochip_allocate_mask(gc); |
921 | if (!girq->valid_mask) | |
79b804cb MW |
922 | return -ENOMEM; |
923 | ||
5fbe5b58 LW |
924 | girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio); |
925 | ||
79b804cb MW |
926 | return 0; |
927 | } | |
928 | ||
a0b66a73 | 929 | static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc) |
79b804cb | 930 | { |
a0b66a73 LW |
931 | bitmap_free(gc->irq.valid_mask); |
932 | gc->irq.valid_mask = NULL; | |
79b804cb MW |
933 | } |
934 | ||
a0b66a73 | 935 | bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc, |
64ff2c8e | 936 | unsigned int offset) |
79b804cb | 937 | { |
a0b66a73 | 938 | if (!gpiochip_line_is_valid(gc, offset)) |
726cb3ba | 939 | return false; |
79b804cb | 940 | /* No mask means all valid */ |
a0b66a73 | 941 | if (likely(!gc->irq.valid_mask)) |
79b804cb | 942 | return true; |
a0b66a73 | 943 | return test_bit(offset, gc->irq.valid_mask); |
79b804cb | 944 | } |
64ff2c8e | 945 | EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid); |
79b804cb | 946 | |
fdd61a01 LW |
947 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
948 | ||
949 | /** | |
950 | * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip | |
951 | * to a gpiochip | |
952 | * @gc: the gpiochip to set the irqchip hierarchical handler to | |
953 | * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt | |
954 | * will then percolate up to the parent | |
955 | */ | |
956 | static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc, | |
957 | struct irq_chip *irqchip) | |
958 | { | |
959 | /* DT will deal with mapping each IRQ as we go along */ | |
960 | if (is_of_node(gc->irq.fwnode)) | |
961 | return; | |
962 | ||
963 | /* | |
964 | * This is for legacy and boardfile "irqchip" fwnodes: allocate | |
965 | * irqs upfront instead of dynamically since we don't have the | |
966 | * dynamic type of allocation that hardware description languages | |
967 | * provide. Once all GPIO drivers using board files are gone from | |
968 | * the kernel we can delete this code, but for a transitional period | |
969 | * it is necessary to keep this around. | |
970 | */ | |
971 | if (is_fwnode_irqchip(gc->irq.fwnode)) { | |
972 | int i; | |
973 | int ret; | |
974 | ||
975 | for (i = 0; i < gc->ngpio; i++) { | |
976 | struct irq_fwspec fwspec; | |
977 | unsigned int parent_hwirq; | |
978 | unsigned int parent_type; | |
979 | struct gpio_irq_chip *girq = &gc->irq; | |
980 | ||
981 | /* | |
982 | * We call the child to parent translation function | |
983 | * only to check if the child IRQ is valid or not. | |
984 | * Just pick the rising edge type here as that is what | |
985 | * we likely need to support. | |
986 | */ | |
987 | ret = girq->child_to_parent_hwirq(gc, i, | |
988 | IRQ_TYPE_EDGE_RISING, | |
989 | &parent_hwirq, | |
990 | &parent_type); | |
991 | if (ret) { | |
992 | chip_err(gc, "skip set-up on hwirq %d\n", | |
993 | i); | |
994 | continue; | |
995 | } | |
996 | ||
997 | fwspec.fwnode = gc->irq.fwnode; | |
998 | /* This is the hwirq for the GPIO line side of things */ | |
999 | fwspec.param[0] = girq->child_offset_to_irq(gc, i); | |
1000 | /* Just pick something */ | |
1001 | fwspec.param[1] = IRQ_TYPE_EDGE_RISING; | |
1002 | fwspec.param_count = 2; | |
1003 | ret = __irq_domain_alloc_irqs(gc->irq.domain, | |
1004 | /* just pick something */ | |
1005 | -1, | |
1006 | 1, | |
1007 | NUMA_NO_NODE, | |
1008 | &fwspec, | |
1009 | false, | |
1010 | NULL); | |
1011 | if (ret < 0) { | |
1012 | chip_err(gc, | |
1013 | "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n", | |
1014 | i, parent_hwirq, | |
1015 | ret); | |
1016 | } | |
1017 | } | |
1018 | } | |
1019 | ||
1020 | chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__); | |
1021 | ||
1022 | return; | |
1023 | } | |
1024 | ||
1025 | static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d, | |
1026 | struct irq_fwspec *fwspec, | |
1027 | unsigned long *hwirq, | |
1028 | unsigned int *type) | |
1029 | { | |
1030 | /* We support standard DT translation */ | |
1031 | if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) { | |
1032 | return irq_domain_translate_twocell(d, fwspec, hwirq, type); | |
1033 | } | |
1034 | ||
1035 | /* This is for board files and others not using DT */ | |
1036 | if (is_fwnode_irqchip(fwspec->fwnode)) { | |
1037 | int ret; | |
1038 | ||
1039 | ret = irq_domain_translate_twocell(d, fwspec, hwirq, type); | |
1040 | if (ret) | |
1041 | return ret; | |
1042 | WARN_ON(*type == IRQ_TYPE_NONE); | |
1043 | return 0; | |
1044 | } | |
1045 | return -EINVAL; | |
1046 | } | |
1047 | ||
1048 | static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d, | |
1049 | unsigned int irq, | |
1050 | unsigned int nr_irqs, | |
1051 | void *data) | |
1052 | { | |
1053 | struct gpio_chip *gc = d->host_data; | |
1054 | irq_hw_number_t hwirq; | |
1055 | unsigned int type = IRQ_TYPE_NONE; | |
1056 | struct irq_fwspec *fwspec = data; | |
24258761 | 1057 | void *parent_arg; |
fdd61a01 LW |
1058 | unsigned int parent_hwirq; |
1059 | unsigned int parent_type; | |
1060 | struct gpio_irq_chip *girq = &gc->irq; | |
1061 | int ret; | |
1062 | ||
1063 | /* | |
1064 | * The nr_irqs parameter is always one except for PCI multi-MSI | |
1065 | * so this should not happen. | |
1066 | */ | |
1067 | WARN_ON(nr_irqs != 1); | |
1068 | ||
1069 | ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type); | |
1070 | if (ret) | |
1071 | return ret; | |
1072 | ||
366950ee | 1073 | chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq); |
fdd61a01 LW |
1074 | |
1075 | ret = girq->child_to_parent_hwirq(gc, hwirq, type, | |
1076 | &parent_hwirq, &parent_type); | |
1077 | if (ret) { | |
1078 | chip_err(gc, "can't look up hwirq %lu\n", hwirq); | |
1079 | return ret; | |
1080 | } | |
366950ee | 1081 | chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq); |
fdd61a01 LW |
1082 | |
1083 | /* | |
1084 | * We set handle_bad_irq because the .set_type() should | |
1085 | * always be invoked and set the right type of handler. | |
1086 | */ | |
1087 | irq_domain_set_info(d, | |
1088 | irq, | |
1089 | hwirq, | |
1090 | gc->irq.chip, | |
1091 | gc, | |
1092 | girq->handler, | |
1093 | NULL, NULL); | |
1094 | irq_set_probe(irq); | |
1095 | ||
fdd61a01 | 1096 | /* This parent only handles asserted level IRQs */ |
24258761 KH |
1097 | parent_arg = girq->populate_parent_alloc_arg(gc, parent_hwirq, parent_type); |
1098 | if (!parent_arg) | |
1099 | return -ENOMEM; | |
1100 | ||
366950ee | 1101 | chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n", |
fdd61a01 | 1102 | irq, parent_hwirq); |
c34f6dc8 | 1103 | irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key); |
24258761 | 1104 | ret = irq_domain_alloc_irqs_parent(d, irq, 1, parent_arg); |
880b7cf2 KH |
1105 | /* |
1106 | * If the parent irqdomain is msi, the interrupts have already | |
1107 | * been allocated, so the EEXIST is good. | |
1108 | */ | |
1109 | if (irq_domain_is_msi(d->parent) && (ret == -EEXIST)) | |
1110 | ret = 0; | |
fdd61a01 LW |
1111 | if (ret) |
1112 | chip_err(gc, | |
1113 | "failed to allocate parent hwirq %d for hwirq %lu\n", | |
1114 | parent_hwirq, hwirq); | |
1115 | ||
24258761 | 1116 | kfree(parent_arg); |
fdd61a01 LW |
1117 | return ret; |
1118 | } | |
1119 | ||
a0b66a73 | 1120 | static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc, |
fdd61a01 LW |
1121 | unsigned int offset) |
1122 | { | |
1123 | return offset; | |
1124 | } | |
1125 | ||
1126 | static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops) | |
1127 | { | |
1128 | ops->activate = gpiochip_irq_domain_activate; | |
1129 | ops->deactivate = gpiochip_irq_domain_deactivate; | |
1130 | ops->alloc = gpiochip_hierarchy_irq_domain_alloc; | |
1131 | ops->free = irq_domain_free_irqs_common; | |
1132 | ||
1133 | /* | |
1134 | * We only allow overriding the translate() function for | |
1135 | * hierarchical chips, and this should only be done if the user | |
1136 | * really need something other than 1:1 translation. | |
1137 | */ | |
1138 | if (!ops->translate) | |
1139 | ops->translate = gpiochip_hierarchy_irq_domain_translate; | |
1140 | } | |
1141 | ||
1142 | static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc) | |
1143 | { | |
1144 | if (!gc->irq.child_to_parent_hwirq || | |
1145 | !gc->irq.fwnode) { | |
1146 | chip_err(gc, "missing irqdomain vital data\n"); | |
1147 | return -EINVAL; | |
1148 | } | |
1149 | ||
1150 | if (!gc->irq.child_offset_to_irq) | |
1151 | gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop; | |
1152 | ||
24258761 KH |
1153 | if (!gc->irq.populate_parent_alloc_arg) |
1154 | gc->irq.populate_parent_alloc_arg = | |
fdd61a01 LW |
1155 | gpiochip_populate_parent_fwspec_twocell; |
1156 | ||
1157 | gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops); | |
1158 | ||
1159 | gc->irq.domain = irq_domain_create_hierarchy( | |
1160 | gc->irq.parent_domain, | |
1161 | 0, | |
1162 | gc->ngpio, | |
1163 | gc->irq.fwnode, | |
1164 | &gc->irq.child_irq_domain_ops, | |
1165 | gc); | |
1166 | ||
1167 | if (!gc->irq.domain) | |
1168 | return -ENOMEM; | |
1169 | ||
1170 | gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip); | |
1171 | ||
1172 | return 0; | |
1173 | } | |
1174 | ||
1175 | static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc) | |
1176 | { | |
1177 | return !!gc->irq.parent_domain; | |
1178 | } | |
1179 | ||
a0b66a73 | 1180 | void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc, |
fdd61a01 LW |
1181 | unsigned int parent_hwirq, |
1182 | unsigned int parent_type) | |
1183 | { | |
24258761 KH |
1184 | struct irq_fwspec *fwspec; |
1185 | ||
1186 | fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL); | |
1187 | if (!fwspec) | |
1188 | return NULL; | |
1189 | ||
a0b66a73 | 1190 | fwspec->fwnode = gc->irq.parent_domain->fwnode; |
fdd61a01 LW |
1191 | fwspec->param_count = 2; |
1192 | fwspec->param[0] = parent_hwirq; | |
1193 | fwspec->param[1] = parent_type; | |
24258761 KH |
1194 | |
1195 | return fwspec; | |
fdd61a01 LW |
1196 | } |
1197 | EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell); | |
1198 | ||
a0b66a73 | 1199 | void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc, |
fdd61a01 LW |
1200 | unsigned int parent_hwirq, |
1201 | unsigned int parent_type) | |
1202 | { | |
24258761 KH |
1203 | struct irq_fwspec *fwspec; |
1204 | ||
1205 | fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL); | |
1206 | if (!fwspec) | |
1207 | return NULL; | |
1208 | ||
a0b66a73 | 1209 | fwspec->fwnode = gc->irq.parent_domain->fwnode; |
fdd61a01 LW |
1210 | fwspec->param_count = 4; |
1211 | fwspec->param[0] = 0; | |
1212 | fwspec->param[1] = parent_hwirq; | |
1213 | fwspec->param[2] = 0; | |
1214 | fwspec->param[3] = parent_type; | |
24258761 KH |
1215 | |
1216 | return fwspec; | |
fdd61a01 LW |
1217 | } |
1218 | EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell); | |
1219 | ||
1220 | #else | |
1221 | ||
1222 | static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc) | |
1223 | { | |
1224 | return -EINVAL; | |
1225 | } | |
1226 | ||
1227 | static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc) | |
1228 | { | |
1229 | return false; | |
1230 | } | |
1231 | ||
1232 | #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ | |
1233 | ||
14250520 LW |
1234 | /** |
1235 | * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip | |
1236 | * @d: the irqdomain used by this irqchip | |
1237 | * @irq: the global irq number used by this GPIO irqchip irq | |
1238 | * @hwirq: the local IRQ/GPIO line offset on this gpiochip | |
1239 | * | |
1240 | * This function will set up the mapping for a certain IRQ line on a | |
1241 | * gpiochip by assigning the gpiochip as chip data, and using the irqchip | |
1242 | * stored inside the gpiochip. | |
1243 | */ | |
1b95b4eb TR |
1244 | int gpiochip_irq_map(struct irq_domain *d, unsigned int irq, |
1245 | irq_hw_number_t hwirq) | |
14250520 | 1246 | { |
a0b66a73 | 1247 | struct gpio_chip *gc = d->host_data; |
d377f56f | 1248 | int ret = 0; |
14250520 | 1249 | |
a0b66a73 | 1250 | if (!gpiochip_irqchip_irq_valid(gc, hwirq)) |
dc749a09 GS |
1251 | return -ENXIO; |
1252 | ||
a0b66a73 | 1253 | irq_set_chip_data(irq, gc); |
a0a8bcf4 GS |
1254 | /* |
1255 | * This lock class tells lockdep that GPIO irqs are in a different | |
1256 | * category than their parents, so it won't report false recursion. | |
1257 | */ | |
a0b66a73 LW |
1258 | irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key); |
1259 | irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler); | |
d245b3f9 | 1260 | /* Chips that use nested thread handlers have them marked */ |
a0b66a73 | 1261 | if (gc->irq.threaded) |
1c8732bb | 1262 | irq_set_nested_thread(irq, 1); |
14250520 | 1263 | irq_set_noprobe(irq); |
23393d49 | 1264 | |
a0b66a73 LW |
1265 | if (gc->irq.num_parents == 1) |
1266 | ret = irq_set_parent(irq, gc->irq.parents[0]); | |
1267 | else if (gc->irq.map) | |
1268 | ret = irq_set_parent(irq, gc->irq.map[hwirq]); | |
e0d89728 | 1269 | |
d377f56f LW |
1270 | if (ret < 0) |
1271 | return ret; | |
e0d89728 | 1272 | |
1333b90f LW |
1273 | /* |
1274 | * No set-up of the hardware will happen if IRQ_TYPE_NONE | |
1275 | * is passed as default type. | |
1276 | */ | |
a0b66a73 LW |
1277 | if (gc->irq.default_type != IRQ_TYPE_NONE) |
1278 | irq_set_irq_type(irq, gc->irq.default_type); | |
14250520 LW |
1279 | |
1280 | return 0; | |
1281 | } | |
1b95b4eb | 1282 | EXPORT_SYMBOL_GPL(gpiochip_irq_map); |
14250520 | 1283 | |
1b95b4eb | 1284 | void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq) |
c3626fde | 1285 | { |
a0b66a73 | 1286 | struct gpio_chip *gc = d->host_data; |
1c8732bb | 1287 | |
a0b66a73 | 1288 | if (gc->irq.threaded) |
1c8732bb | 1289 | irq_set_nested_thread(irq, 0); |
c3626fde LW |
1290 | irq_set_chip_and_handler(irq, NULL, NULL); |
1291 | irq_set_chip_data(irq, NULL); | |
1292 | } | |
1b95b4eb | 1293 | EXPORT_SYMBOL_GPL(gpiochip_irq_unmap); |
c3626fde | 1294 | |
14250520 LW |
1295 | static const struct irq_domain_ops gpiochip_domain_ops = { |
1296 | .map = gpiochip_irq_map, | |
c3626fde | 1297 | .unmap = gpiochip_irq_unmap, |
14250520 LW |
1298 | /* Virtually all GPIO irqchips are twocell:ed */ |
1299 | .xlate = irq_domain_xlate_twocell, | |
1300 | }; | |
1301 | ||
fdd61a01 LW |
1302 | /* |
1303 | * TODO: move these activate/deactivate in under the hierarchicial | |
1304 | * irqchip implementation as static once SPMI and SSBI (all external | |
1305 | * users) are phased over. | |
1306 | */ | |
ef74f70e BM |
1307 | /** |
1308 | * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ | |
1309 | * @domain: The IRQ domain used by this IRQ chip | |
1310 | * @data: Outermost irq_data associated with the IRQ | |
1311 | * @reserve: If set, only reserve an interrupt vector instead of assigning one | |
1312 | * | |
1313 | * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be | |
1314 | * used as the activate function for the &struct irq_domain_ops. The host_data | |
1315 | * for the IRQ domain must be the &struct gpio_chip. | |
1316 | */ | |
1317 | int gpiochip_irq_domain_activate(struct irq_domain *domain, | |
1318 | struct irq_data *data, bool reserve) | |
1319 | { | |
a0b66a73 | 1320 | struct gpio_chip *gc = domain->host_data; |
ef74f70e | 1321 | |
a0b66a73 | 1322 | return gpiochip_lock_as_irq(gc, data->hwirq); |
ef74f70e BM |
1323 | } |
1324 | EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate); | |
1325 | ||
1326 | /** | |
1327 | * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ | |
1328 | * @domain: The IRQ domain used by this IRQ chip | |
1329 | * @data: Outermost irq_data associated with the IRQ | |
1330 | * | |
1331 | * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to | |
1332 | * be used as the deactivate function for the &struct irq_domain_ops. The | |
1333 | * host_data for the IRQ domain must be the &struct gpio_chip. | |
1334 | */ | |
1335 | void gpiochip_irq_domain_deactivate(struct irq_domain *domain, | |
1336 | struct irq_data *data) | |
1337 | { | |
a0b66a73 | 1338 | struct gpio_chip *gc = domain->host_data; |
ef74f70e | 1339 | |
a0b66a73 | 1340 | return gpiochip_unlock_as_irq(gc, data->hwirq); |
ef74f70e BM |
1341 | } |
1342 | EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate); | |
1343 | ||
13daf489 | 1344 | static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset) |
14250520 | 1345 | { |
a0b66a73 | 1346 | struct irq_domain *domain = gc->irq.domain; |
fdd61a01 | 1347 | |
a0b66a73 | 1348 | if (!gpiochip_irqchip_irq_valid(gc, offset)) |
4e6b8238 | 1349 | return -ENXIO; |
5b76e79c | 1350 | |
fdd61a01 LW |
1351 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
1352 | if (irq_domain_is_hierarchy(domain)) { | |
1353 | struct irq_fwspec spec; | |
1354 | ||
1355 | spec.fwnode = domain->fwnode; | |
1356 | spec.param_count = 2; | |
a0b66a73 | 1357 | spec.param[0] = gc->irq.child_offset_to_irq(gc, offset); |
fdd61a01 LW |
1358 | spec.param[1] = IRQ_TYPE_NONE; |
1359 | ||
1360 | return irq_create_fwspec_mapping(&spec); | |
1361 | } | |
1362 | #endif | |
1363 | ||
1364 | return irq_create_mapping(domain, offset); | |
14250520 LW |
1365 | } |
1366 | ||
14250520 LW |
1367 | static int gpiochip_irq_reqres(struct irq_data *d) |
1368 | { | |
a0b66a73 | 1369 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
5b76e79c | 1370 | |
a0b66a73 | 1371 | return gpiochip_reqres_irq(gc, d->hwirq); |
14250520 LW |
1372 | } |
1373 | ||
1374 | static void gpiochip_irq_relres(struct irq_data *d) | |
1375 | { | |
a0b66a73 | 1376 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
14250520 | 1377 | |
a0b66a73 | 1378 | gpiochip_relres_irq(gc, d->hwirq); |
14250520 LW |
1379 | } |
1380 | ||
a8173820 MS |
1381 | static void gpiochip_irq_mask(struct irq_data *d) |
1382 | { | |
1383 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | |
1384 | ||
1385 | if (gc->irq.irq_mask) | |
1386 | gc->irq.irq_mask(d); | |
1387 | gpiochip_disable_irq(gc, d->hwirq); | |
1388 | } | |
1389 | ||
1390 | static void gpiochip_irq_unmask(struct irq_data *d) | |
1391 | { | |
1392 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | |
1393 | ||
1394 | gpiochip_enable_irq(gc, d->hwirq); | |
1395 | if (gc->irq.irq_unmask) | |
1396 | gc->irq.irq_unmask(d); | |
1397 | } | |
1398 | ||
461c1a7d | 1399 | static void gpiochip_irq_enable(struct irq_data *d) |
14250520 | 1400 | { |
a0b66a73 | 1401 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
e0d89728 | 1402 | |
a0b66a73 | 1403 | gpiochip_enable_irq(gc, d->hwirq); |
a8173820 | 1404 | gc->irq.irq_enable(d); |
461c1a7d HV |
1405 | } |
1406 | ||
1407 | static void gpiochip_irq_disable(struct irq_data *d) | |
1408 | { | |
a0b66a73 | 1409 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
461c1a7d | 1410 | |
a8173820 | 1411 | gc->irq.irq_disable(d); |
a0b66a73 | 1412 | gpiochip_disable_irq(gc, d->hwirq); |
461c1a7d HV |
1413 | } |
1414 | ||
a0b66a73 | 1415 | static void gpiochip_set_irq_hooks(struct gpio_chip *gc) |
ca620f2d | 1416 | { |
a0b66a73 | 1417 | struct irq_chip *irqchip = gc->irq.chip; |
ca620f2d HV |
1418 | |
1419 | if (!irqchip->irq_request_resources && | |
1420 | !irqchip->irq_release_resources) { | |
1421 | irqchip->irq_request_resources = gpiochip_irq_reqres; | |
1422 | irqchip->irq_release_resources = gpiochip_irq_relres; | |
1423 | } | |
a0b66a73 | 1424 | if (WARN_ON(gc->irq.irq_enable)) |
461c1a7d | 1425 | return; |
171948ea | 1426 | /* Check if the irqchip already has this hook... */ |
9d552219 NS |
1427 | if (irqchip->irq_enable == gpiochip_irq_enable || |
1428 | irqchip->irq_mask == gpiochip_irq_mask) { | |
171948ea HV |
1429 | /* |
1430 | * ...and if so, give a gentle warning that this is bad | |
1431 | * practice. | |
1432 | */ | |
a0b66a73 | 1433 | chip_info(gc, |
171948ea HV |
1434 | "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n"); |
1435 | return; | |
1436 | } | |
a8173820 MS |
1437 | |
1438 | if (irqchip->irq_disable) { | |
1439 | gc->irq.irq_disable = irqchip->irq_disable; | |
1440 | irqchip->irq_disable = gpiochip_irq_disable; | |
1441 | } else { | |
1442 | gc->irq.irq_mask = irqchip->irq_mask; | |
1443 | irqchip->irq_mask = gpiochip_irq_mask; | |
1444 | } | |
1445 | ||
1446 | if (irqchip->irq_enable) { | |
1447 | gc->irq.irq_enable = irqchip->irq_enable; | |
1448 | irqchip->irq_enable = gpiochip_irq_enable; | |
1449 | } else { | |
1450 | gc->irq.irq_unmask = irqchip->irq_unmask; | |
1451 | irqchip->irq_unmask = gpiochip_irq_unmask; | |
1452 | } | |
14250520 LW |
1453 | } |
1454 | ||
e0d89728 TR |
1455 | /** |
1456 | * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip | |
a0b66a73 | 1457 | * @gc: the GPIO chip to add the IRQ chip to |
39c3fd58 AL |
1458 | * @lock_key: lockdep class for IRQ lock |
1459 | * @request_key: lockdep class for IRQ request | |
e0d89728 | 1460 | */ |
a0b66a73 | 1461 | static int gpiochip_add_irqchip(struct gpio_chip *gc, |
39c3fd58 AL |
1462 | struct lock_class_key *lock_key, |
1463 | struct lock_class_key *request_key) | |
e0d89728 | 1464 | { |
a0b66a73 | 1465 | struct irq_chip *irqchip = gc->irq.chip; |
fdd61a01 | 1466 | const struct irq_domain_ops *ops = NULL; |
e0d89728 TR |
1467 | struct device_node *np; |
1468 | unsigned int type; | |
1469 | unsigned int i; | |
1470 | ||
1471 | if (!irqchip) | |
1472 | return 0; | |
1473 | ||
a0b66a73 LW |
1474 | if (gc->irq.parent_handler && gc->can_sleep) { |
1475 | chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n"); | |
e0d89728 TR |
1476 | return -EINVAL; |
1477 | } | |
1478 | ||
a0b66a73 LW |
1479 | np = gc->gpiodev->dev.of_node; |
1480 | type = gc->irq.default_type; | |
e0d89728 TR |
1481 | |
1482 | /* | |
1483 | * Specifying a default trigger is a terrible idea if DT or ACPI is | |
1484 | * used to configure the interrupts, as you may end up with | |
1485 | * conflicting triggers. Tell the user, and reset to NONE. | |
1486 | */ | |
1487 | if (WARN(np && type != IRQ_TYPE_NONE, | |
1488 | "%s: Ignoring %u default trigger\n", np->full_name, type)) | |
1489 | type = IRQ_TYPE_NONE; | |
1490 | ||
a0b66a73 LW |
1491 | if (has_acpi_companion(gc->parent) && type != IRQ_TYPE_NONE) { |
1492 | acpi_handle_warn(ACPI_HANDLE(gc->parent), | |
e0d89728 TR |
1493 | "Ignoring %u default trigger\n", type); |
1494 | type = IRQ_TYPE_NONE; | |
1495 | } | |
1496 | ||
ef382374 NS |
1497 | if (gc->to_irq) |
1498 | chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__); | |
1499 | ||
a0b66a73 LW |
1500 | gc->to_irq = gpiochip_to_irq; |
1501 | gc->irq.default_type = type; | |
1502 | gc->irq.lock_key = lock_key; | |
1503 | gc->irq.request_key = request_key; | |
e0d89728 | 1504 | |
fdd61a01 | 1505 | /* If a parent irqdomain is provided, let's build a hierarchy */ |
a0b66a73 LW |
1506 | if (gpiochip_hierarchy_is_hierarchical(gc)) { |
1507 | int ret = gpiochip_hierarchy_add_domain(gc); | |
fdd61a01 LW |
1508 | if (ret) |
1509 | return ret; | |
1510 | } else { | |
1511 | /* Some drivers provide custom irqdomain ops */ | |
a0b66a73 LW |
1512 | if (gc->irq.domain_ops) |
1513 | ops = gc->irq.domain_ops; | |
fdd61a01 LW |
1514 | |
1515 | if (!ops) | |
1516 | ops = &gpiochip_domain_ops; | |
a0b66a73 LW |
1517 | gc->irq.domain = irq_domain_add_simple(np, |
1518 | gc->ngpio, | |
1519 | gc->irq.first, | |
1520 | ops, gc); | |
1521 | if (!gc->irq.domain) | |
fdd61a01 LW |
1522 | return -EINVAL; |
1523 | } | |
e0d89728 | 1524 | |
a0b66a73 LW |
1525 | if (gc->irq.parent_handler) { |
1526 | void *data = gc->irq.parent_handler_data ?: gc; | |
e0d89728 | 1527 | |
a0b66a73 | 1528 | for (i = 0; i < gc->irq.num_parents; i++) { |
e0d89728 TR |
1529 | /* |
1530 | * The parent IRQ chip is already using the chip_data | |
1531 | * for this IRQ chip, so our callbacks simply use the | |
1532 | * handler_data. | |
1533 | */ | |
a0b66a73 LW |
1534 | irq_set_chained_handler_and_data(gc->irq.parents[i], |
1535 | gc->irq.parent_handler, | |
e0d89728 TR |
1536 | data); |
1537 | } | |
e0d89728 TR |
1538 | } |
1539 | ||
a0b66a73 | 1540 | gpiochip_set_irq_hooks(gc); |
ca620f2d | 1541 | |
a0b66a73 | 1542 | acpi_gpiochip_request_interrupts(gc); |
e0d89728 TR |
1543 | |
1544 | return 0; | |
1545 | } | |
1546 | ||
14250520 LW |
1547 | /** |
1548 | * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip | |
a0b66a73 | 1549 | * @gc: the gpiochip to remove the irqchip from |
14250520 LW |
1550 | * |
1551 | * This is called only from gpiochip_remove() | |
1552 | */ | |
a0b66a73 | 1553 | static void gpiochip_irqchip_remove(struct gpio_chip *gc) |
14250520 | 1554 | { |
a0b66a73 | 1555 | struct irq_chip *irqchip = gc->irq.chip; |
39e5f096 | 1556 | unsigned int offset; |
c3626fde | 1557 | |
a0b66a73 | 1558 | acpi_gpiochip_free_interrupts(gc); |
afa82fab | 1559 | |
a0b66a73 LW |
1560 | if (irqchip && gc->irq.parent_handler) { |
1561 | struct gpio_irq_chip *irq = &gc->irq; | |
39e5f096 TR |
1562 | unsigned int i; |
1563 | ||
1564 | for (i = 0; i < irq->num_parents; i++) | |
1565 | irq_set_chained_handler_and_data(irq->parents[i], | |
1566 | NULL, NULL); | |
25e4fe92 DES |
1567 | } |
1568 | ||
c3626fde | 1569 | /* Remove all IRQ mappings and delete the domain */ |
a0b66a73 | 1570 | if (gc->irq.domain) { |
39e5f096 TR |
1571 | unsigned int irq; |
1572 | ||
a0b66a73 LW |
1573 | for (offset = 0; offset < gc->ngpio; offset++) { |
1574 | if (!gpiochip_irqchip_irq_valid(gc, offset)) | |
79b804cb | 1575 | continue; |
f0fbe7bc | 1576 | |
a0b66a73 | 1577 | irq = irq_find_mapping(gc->irq.domain, offset); |
f0fbe7bc | 1578 | irq_dispose_mapping(irq); |
79b804cb | 1579 | } |
f0fbe7bc | 1580 | |
a0b66a73 | 1581 | irq_domain_remove(gc->irq.domain); |
c3626fde | 1582 | } |
14250520 | 1583 | |
461c1a7d HV |
1584 | if (irqchip) { |
1585 | if (irqchip->irq_request_resources == gpiochip_irq_reqres) { | |
1586 | irqchip->irq_request_resources = NULL; | |
1587 | irqchip->irq_release_resources = NULL; | |
1588 | } | |
1589 | if (irqchip->irq_enable == gpiochip_irq_enable) { | |
a0b66a73 LW |
1590 | irqchip->irq_enable = gc->irq.irq_enable; |
1591 | irqchip->irq_disable = gc->irq.irq_disable; | |
461c1a7d | 1592 | } |
14250520 | 1593 | } |
a0b66a73 LW |
1594 | gc->irq.irq_enable = NULL; |
1595 | gc->irq.irq_disable = NULL; | |
1596 | gc->irq.chip = NULL; | |
79b804cb | 1597 | |
a0b66a73 | 1598 | gpiochip_irqchip_free_valid_mask(gc); |
14250520 LW |
1599 | } |
1600 | ||
6a45b0e2 MW |
1601 | /** |
1602 | * gpiochip_irqchip_add_domain() - adds an irqdomain to a gpiochip | |
1603 | * @gc: the gpiochip to add the irqchip to | |
1604 | * @domain: the irqdomain to add to the gpiochip | |
1605 | * | |
1606 | * This function adds an IRQ domain to the gpiochip. | |
1607 | */ | |
1608 | int gpiochip_irqchip_add_domain(struct gpio_chip *gc, | |
1609 | struct irq_domain *domain) | |
1610 | { | |
1611 | if (!domain) | |
1612 | return -EINVAL; | |
1613 | ||
1614 | gc->to_irq = gpiochip_to_irq; | |
1615 | gc->irq.domain = domain; | |
1616 | ||
1617 | return 0; | |
1618 | } | |
1619 | EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain); | |
1620 | ||
14250520 LW |
1621 | #else /* CONFIG_GPIOLIB_IRQCHIP */ |
1622 | ||
a0b66a73 | 1623 | static inline int gpiochip_add_irqchip(struct gpio_chip *gc, |
39c3fd58 AL |
1624 | struct lock_class_key *lock_key, |
1625 | struct lock_class_key *request_key) | |
e0d89728 TR |
1626 | { |
1627 | return 0; | |
1628 | } | |
a0b66a73 | 1629 | static void gpiochip_irqchip_remove(struct gpio_chip *gc) {} |
9411e3aa | 1630 | |
a0b66a73 | 1631 | static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc) |
9411e3aa AS |
1632 | { |
1633 | return 0; | |
1634 | } | |
1635 | ||
a0b66a73 | 1636 | static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc) |
79b804cb MW |
1637 | { |
1638 | return 0; | |
1639 | } | |
a0b66a73 | 1640 | static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc) |
79b804cb | 1641 | { } |
14250520 LW |
1642 | |
1643 | #endif /* CONFIG_GPIOLIB_IRQCHIP */ | |
1644 | ||
c771c2f4 JG |
1645 | /** |
1646 | * gpiochip_generic_request() - request the gpio function for a pin | |
a0b66a73 | 1647 | * @gc: the gpiochip owning the GPIO |
c771c2f4 JG |
1648 | * @offset: the offset of the GPIO to request for GPIO function |
1649 | */ | |
13daf489 | 1650 | int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset) |
c771c2f4 | 1651 | { |
89ad556b | 1652 | #ifdef CONFIG_PINCTRL |
a0b66a73 | 1653 | if (list_empty(&gc->gpiodev->pin_ranges)) |
89ad556b TR |
1654 | return 0; |
1655 | #endif | |
2ab73c6d | 1656 | |
a0b66a73 | 1657 | return pinctrl_gpio_request(gc->gpiodev->base + offset); |
c771c2f4 JG |
1658 | } |
1659 | EXPORT_SYMBOL_GPL(gpiochip_generic_request); | |
1660 | ||
1661 | /** | |
1662 | * gpiochip_generic_free() - free the gpio function from a pin | |
a0b66a73 | 1663 | * @gc: the gpiochip to request the gpio function for |
c771c2f4 JG |
1664 | * @offset: the offset of the GPIO to free from GPIO function |
1665 | */ | |
13daf489 | 1666 | void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset) |
c771c2f4 | 1667 | { |
6dbbf846 EC |
1668 | #ifdef CONFIG_PINCTRL |
1669 | if (list_empty(&gc->gpiodev->pin_ranges)) | |
1670 | return; | |
1671 | #endif | |
1672 | ||
a0b66a73 | 1673 | pinctrl_gpio_free(gc->gpiodev->base + offset); |
c771c2f4 JG |
1674 | } |
1675 | EXPORT_SYMBOL_GPL(gpiochip_generic_free); | |
1676 | ||
2956b5d9 MW |
1677 | /** |
1678 | * gpiochip_generic_config() - apply configuration for a pin | |
a0b66a73 | 1679 | * @gc: the gpiochip owning the GPIO |
2956b5d9 MW |
1680 | * @offset: the offset of the GPIO to apply the configuration |
1681 | * @config: the configuration to be applied | |
1682 | */ | |
13daf489 | 1683 | int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset, |
2956b5d9 MW |
1684 | unsigned long config) |
1685 | { | |
a0b66a73 | 1686 | return pinctrl_gpio_set_config(gc->gpiodev->base + offset, config); |
2956b5d9 MW |
1687 | } |
1688 | EXPORT_SYMBOL_GPL(gpiochip_generic_config); | |
1689 | ||
f23f1516 | 1690 | #ifdef CONFIG_PINCTRL |
165adc9c | 1691 | |
586a87e6 CR |
1692 | /** |
1693 | * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping | |
a0b66a73 | 1694 | * @gc: the gpiochip to add the range for |
d32651f6 | 1695 | * @pctldev: the pin controller to map to |
586a87e6 CR |
1696 | * @gpio_offset: the start offset in the current gpio_chip number space |
1697 | * @pin_group: name of the pin group inside the pin controller | |
973c1714 CL |
1698 | * |
1699 | * Calling this function directly from a DeviceTree-supported | |
1700 | * pinctrl driver is DEPRECATED. Please see Section 2.1 of | |
1701 | * Documentation/devicetree/bindings/gpio/gpio.txt on how to | |
1702 | * bind pinctrl and gpio drivers via the "gpio-ranges" property. | |
586a87e6 | 1703 | */ |
a0b66a73 | 1704 | int gpiochip_add_pingroup_range(struct gpio_chip *gc, |
586a87e6 CR |
1705 | struct pinctrl_dev *pctldev, |
1706 | unsigned int gpio_offset, const char *pin_group) | |
1707 | { | |
1708 | struct gpio_pin_range *pin_range; | |
a0b66a73 | 1709 | struct gpio_device *gdev = gc->gpiodev; |
586a87e6 CR |
1710 | int ret; |
1711 | ||
1712 | pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL); | |
1713 | if (!pin_range) { | |
a0b66a73 | 1714 | chip_err(gc, "failed to allocate pin ranges\n"); |
586a87e6 CR |
1715 | return -ENOMEM; |
1716 | } | |
1717 | ||
1718 | /* Use local offset as range ID */ | |
1719 | pin_range->range.id = gpio_offset; | |
a0b66a73 LW |
1720 | pin_range->range.gc = gc; |
1721 | pin_range->range.name = gc->label; | |
fdeb8e15 | 1722 | pin_range->range.base = gdev->base + gpio_offset; |
586a87e6 CR |
1723 | pin_range->pctldev = pctldev; |
1724 | ||
1725 | ret = pinctrl_get_group_pins(pctldev, pin_group, | |
1726 | &pin_range->range.pins, | |
1727 | &pin_range->range.npins); | |
61c6375d MN |
1728 | if (ret < 0) { |
1729 | kfree(pin_range); | |
586a87e6 | 1730 | return ret; |
61c6375d | 1731 | } |
586a87e6 CR |
1732 | |
1733 | pinctrl_add_gpio_range(pctldev, &pin_range->range); | |
1734 | ||
a0b66a73 | 1735 | chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n", |
1a2a99c6 | 1736 | gpio_offset, gpio_offset + pin_range->range.npins - 1, |
586a87e6 CR |
1737 | pinctrl_dev_get_devname(pctldev), pin_group); |
1738 | ||
20ec3e39 | 1739 | list_add_tail(&pin_range->node, &gdev->pin_ranges); |
586a87e6 CR |
1740 | |
1741 | return 0; | |
1742 | } | |
1743 | EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range); | |
1744 | ||
3f0f8670 LW |
1745 | /** |
1746 | * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping | |
a0b66a73 | 1747 | * @gc: the gpiochip to add the range for |
950d55f5 | 1748 | * @pinctl_name: the dev_name() of the pin controller to map to |
316511c0 LW |
1749 | * @gpio_offset: the start offset in the current gpio_chip number space |
1750 | * @pin_offset: the start offset in the pin controller number space | |
3f0f8670 LW |
1751 | * @npins: the number of pins from the offset of each pin space (GPIO and |
1752 | * pin controller) to accumulate in this range | |
950d55f5 TR |
1753 | * |
1754 | * Returns: | |
1755 | * 0 on success, or a negative error-code on failure. | |
973c1714 CL |
1756 | * |
1757 | * Calling this function directly from a DeviceTree-supported | |
1758 | * pinctrl driver is DEPRECATED. Please see Section 2.1 of | |
1759 | * Documentation/devicetree/bindings/gpio/gpio.txt on how to | |
1760 | * bind pinctrl and gpio drivers via the "gpio-ranges" property. | |
3f0f8670 | 1761 | */ |
a0b66a73 | 1762 | int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name, |
316511c0 | 1763 | unsigned int gpio_offset, unsigned int pin_offset, |
3f0f8670 | 1764 | unsigned int npins) |
f23f1516 SH |
1765 | { |
1766 | struct gpio_pin_range *pin_range; | |
a0b66a73 | 1767 | struct gpio_device *gdev = gc->gpiodev; |
b4d4b1f0 | 1768 | int ret; |
f23f1516 | 1769 | |
3f0f8670 | 1770 | pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL); |
f23f1516 | 1771 | if (!pin_range) { |
a0b66a73 | 1772 | chip_err(gc, "failed to allocate pin ranges\n"); |
1e63d7b9 | 1773 | return -ENOMEM; |
f23f1516 SH |
1774 | } |
1775 | ||
3f0f8670 | 1776 | /* Use local offset as range ID */ |
316511c0 | 1777 | pin_range->range.id = gpio_offset; |
a0b66a73 LW |
1778 | pin_range->range.gc = gc; |
1779 | pin_range->range.name = gc->label; | |
fdeb8e15 | 1780 | pin_range->range.base = gdev->base + gpio_offset; |
316511c0 | 1781 | pin_range->range.pin_base = pin_offset; |
f23f1516 | 1782 | pin_range->range.npins = npins; |
192c369c | 1783 | pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name, |
f23f1516 | 1784 | &pin_range->range); |
8f23ca1a | 1785 | if (IS_ERR(pin_range->pctldev)) { |
b4d4b1f0 | 1786 | ret = PTR_ERR(pin_range->pctldev); |
a0b66a73 | 1787 | chip_err(gc, "could not create pin range\n"); |
3f0f8670 | 1788 | kfree(pin_range); |
b4d4b1f0 | 1789 | return ret; |
3f0f8670 | 1790 | } |
a0b66a73 | 1791 | chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n", |
1a2a99c6 | 1792 | gpio_offset, gpio_offset + npins - 1, |
316511c0 LW |
1793 | pinctl_name, |
1794 | pin_offset, pin_offset + npins - 1); | |
f23f1516 | 1795 | |
20ec3e39 | 1796 | list_add_tail(&pin_range->node, &gdev->pin_ranges); |
1e63d7b9 LW |
1797 | |
1798 | return 0; | |
f23f1516 | 1799 | } |
165adc9c | 1800 | EXPORT_SYMBOL_GPL(gpiochip_add_pin_range); |
f23f1516 | 1801 | |
3f0f8670 LW |
1802 | /** |
1803 | * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings | |
a0b66a73 | 1804 | * @gc: the chip to remove all the mappings for |
3f0f8670 | 1805 | */ |
a0b66a73 | 1806 | void gpiochip_remove_pin_ranges(struct gpio_chip *gc) |
f23f1516 SH |
1807 | { |
1808 | struct gpio_pin_range *pin_range, *tmp; | |
a0b66a73 | 1809 | struct gpio_device *gdev = gc->gpiodev; |
f23f1516 | 1810 | |
20ec3e39 | 1811 | list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) { |
f23f1516 SH |
1812 | list_del(&pin_range->node); |
1813 | pinctrl_remove_gpio_range(pin_range->pctldev, | |
1814 | &pin_range->range); | |
3f0f8670 | 1815 | kfree(pin_range); |
f23f1516 SH |
1816 | } |
1817 | } | |
165adc9c LW |
1818 | EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges); |
1819 | ||
1820 | #endif /* CONFIG_PINCTRL */ | |
f23f1516 | 1821 | |
d2876d08 DB |
1822 | /* These "optional" allocation calls help prevent drivers from stomping |
1823 | * on each other, and help provide better diagnostics in debugfs. | |
1824 | * They're called even less than the "set direction" calls. | |
1825 | */ | |
fac9d885 | 1826 | static int gpiod_request_commit(struct gpio_desc *desc, const char *label) |
d2876d08 | 1827 | { |
a0b66a73 | 1828 | struct gpio_chip *gc = desc->gdev->chip; |
d377f56f | 1829 | int ret; |
d2876d08 | 1830 | unsigned long flags; |
3789f5ac | 1831 | unsigned offset; |
d2876d08 | 1832 | |
18534df4 MS |
1833 | if (label) { |
1834 | label = kstrdup_const(label, GFP_KERNEL); | |
1835 | if (!label) | |
1836 | return -ENOMEM; | |
1837 | } | |
1838 | ||
bcabdef1 AC |
1839 | spin_lock_irqsave(&gpio_lock, flags); |
1840 | ||
d2876d08 | 1841 | /* NOTE: gpio_request() can be called in early boot, |
35e8bb51 | 1842 | * before IRQs are enabled, for non-sleeping (SOC) GPIOs. |
d2876d08 DB |
1843 | */ |
1844 | ||
1845 | if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) { | |
1846 | desc_set_label(desc, label ? : "?"); | |
438d8908 | 1847 | } else { |
d377f56f | 1848 | ret = -EBUSY; |
95d9f84f | 1849 | goto out_free_unlock; |
35e8bb51 DB |
1850 | } |
1851 | ||
a0b66a73 LW |
1852 | if (gc->request) { |
1853 | /* gc->request may sleep */ | |
35e8bb51 | 1854 | spin_unlock_irqrestore(&gpio_lock, flags); |
3789f5ac | 1855 | offset = gpio_chip_hwgpio(desc); |
a0b66a73 LW |
1856 | if (gpiochip_line_is_valid(gc, offset)) |
1857 | ret = gc->request(gc, offset); | |
3789f5ac | 1858 | else |
d377f56f | 1859 | ret = -EINVAL; |
35e8bb51 DB |
1860 | spin_lock_irqsave(&gpio_lock, flags); |
1861 | ||
8bbff39c | 1862 | if (ret) { |
35e8bb51 | 1863 | desc_set_label(desc, NULL); |
35e8bb51 | 1864 | clear_bit(FLAG_REQUESTED, &desc->flags); |
95d9f84f | 1865 | goto out_free_unlock; |
35e8bb51 | 1866 | } |
438d8908 | 1867 | } |
a0b66a73 LW |
1868 | if (gc->get_direction) { |
1869 | /* gc->get_direction may sleep */ | |
80b0a602 | 1870 | spin_unlock_irqrestore(&gpio_lock, flags); |
372e722e | 1871 | gpiod_get_direction(desc); |
80b0a602 MN |
1872 | spin_lock_irqsave(&gpio_lock, flags); |
1873 | } | |
77c2d792 | 1874 | spin_unlock_irqrestore(&gpio_lock, flags); |
95d9f84f AS |
1875 | return 0; |
1876 | ||
1877 | out_free_unlock: | |
1878 | spin_unlock_irqrestore(&gpio_lock, flags); | |
1879 | kfree_const(label); | |
d377f56f | 1880 | return ret; |
77c2d792 MW |
1881 | } |
1882 | ||
fdeb8e15 LW |
1883 | /* |
1884 | * This descriptor validation needs to be inserted verbatim into each | |
1885 | * function taking a descriptor, so we need to use a preprocessor | |
54d77198 LW |
1886 | * macro to avoid endless duplication. If the desc is NULL it is an |
1887 | * optional GPIO and calls should just bail out. | |
fdeb8e15 | 1888 | */ |
a746a232 RV |
1889 | static int validate_desc(const struct gpio_desc *desc, const char *func) |
1890 | { | |
1891 | if (!desc) | |
1892 | return 0; | |
1893 | if (IS_ERR(desc)) { | |
1894 | pr_warn("%s: invalid GPIO (errorpointer)\n", func); | |
1895 | return PTR_ERR(desc); | |
1896 | } | |
1897 | if (!desc->gdev) { | |
1898 | pr_warn("%s: invalid GPIO (no device)\n", func); | |
1899 | return -EINVAL; | |
1900 | } | |
1901 | if (!desc->gdev->chip) { | |
1902 | dev_warn(&desc->gdev->dev, | |
1903 | "%s: backing chip is gone\n", func); | |
1904 | return 0; | |
1905 | } | |
1906 | return 1; | |
1907 | } | |
1908 | ||
fdeb8e15 | 1909 | #define VALIDATE_DESC(desc) do { \ |
a746a232 RV |
1910 | int __valid = validate_desc(desc, __func__); \ |
1911 | if (__valid <= 0) \ | |
1912 | return __valid; \ | |
1913 | } while (0) | |
fdeb8e15 LW |
1914 | |
1915 | #define VALIDATE_DESC_VOID(desc) do { \ | |
a746a232 RV |
1916 | int __valid = validate_desc(desc, __func__); \ |
1917 | if (__valid <= 0) \ | |
fdeb8e15 | 1918 | return; \ |
a746a232 | 1919 | } while (0) |
fdeb8e15 | 1920 | |
0eb4c6c2 | 1921 | int gpiod_request(struct gpio_desc *desc, const char *label) |
77c2d792 | 1922 | { |
d377f56f | 1923 | int ret = -EPROBE_DEFER; |
fdeb8e15 | 1924 | struct gpio_device *gdev; |
77c2d792 | 1925 | |
fdeb8e15 LW |
1926 | VALIDATE_DESC(desc); |
1927 | gdev = desc->gdev; | |
77c2d792 | 1928 | |
fdeb8e15 | 1929 | if (try_module_get(gdev->owner)) { |
d377f56f | 1930 | ret = gpiod_request_commit(desc, label); |
8bbff39c | 1931 | if (ret) |
fdeb8e15 | 1932 | module_put(gdev->owner); |
33a68e86 LW |
1933 | else |
1934 | get_device(&gdev->dev); | |
77c2d792 MW |
1935 | } |
1936 | ||
d377f56f LW |
1937 | if (ret) |
1938 | gpiod_dbg(desc, "%s: status %d\n", __func__, ret); | |
77c2d792 | 1939 | |
d377f56f | 1940 | return ret; |
d2876d08 | 1941 | } |
372e722e | 1942 | |
fac9d885 | 1943 | static bool gpiod_free_commit(struct gpio_desc *desc) |
d2876d08 | 1944 | { |
77c2d792 | 1945 | bool ret = false; |
d2876d08 | 1946 | unsigned long flags; |
a0b66a73 | 1947 | struct gpio_chip *gc; |
d2876d08 | 1948 | |
3d599d1c UKK |
1949 | might_sleep(); |
1950 | ||
372e722e | 1951 | gpiod_unexport(desc); |
d8f388d8 | 1952 | |
d2876d08 DB |
1953 | spin_lock_irqsave(&gpio_lock, flags); |
1954 | ||
a0b66a73 LW |
1955 | gc = desc->gdev->chip; |
1956 | if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) { | |
1957 | if (gc->free) { | |
35e8bb51 | 1958 | spin_unlock_irqrestore(&gpio_lock, flags); |
a0b66a73 LW |
1959 | might_sleep_if(gc->can_sleep); |
1960 | gc->free(gc, gpio_chip_hwgpio(desc)); | |
35e8bb51 DB |
1961 | spin_lock_irqsave(&gpio_lock, flags); |
1962 | } | |
18534df4 | 1963 | kfree_const(desc->label); |
d2876d08 | 1964 | desc_set_label(desc, NULL); |
07697461 | 1965 | clear_bit(FLAG_ACTIVE_LOW, &desc->flags); |
35e8bb51 | 1966 | clear_bit(FLAG_REQUESTED, &desc->flags); |
aca5ce14 | 1967 | clear_bit(FLAG_OPEN_DRAIN, &desc->flags); |
25553ff0 | 1968 | clear_bit(FLAG_OPEN_SOURCE, &desc->flags); |
9225d516 DF |
1969 | clear_bit(FLAG_PULL_UP, &desc->flags); |
1970 | clear_bit(FLAG_PULL_DOWN, &desc->flags); | |
2148ad77 | 1971 | clear_bit(FLAG_BIAS_DISABLE, &desc->flags); |
73e03419 KG |
1972 | clear_bit(FLAG_EDGE_RISING, &desc->flags); |
1973 | clear_bit(FLAG_EDGE_FALLING, &desc->flags); | |
f625d460 | 1974 | clear_bit(FLAG_IS_HOGGED, &desc->flags); |
63636d95 GU |
1975 | #ifdef CONFIG_OF_DYNAMIC |
1976 | desc->hog = NULL; | |
65cff704 KG |
1977 | #endif |
1978 | #ifdef CONFIG_GPIO_CDEV | |
1979 | WRITE_ONCE(desc->debounce_period_us, 0); | |
63636d95 | 1980 | #endif |
77c2d792 MW |
1981 | ret = true; |
1982 | } | |
d2876d08 DB |
1983 | |
1984 | spin_unlock_irqrestore(&gpio_lock, flags); | |
6accc376 KG |
1985 | blocking_notifier_call_chain(&desc->gdev->notifier, |
1986 | GPIOLINE_CHANGED_RELEASED, desc); | |
51c1064e | 1987 | |
77c2d792 MW |
1988 | return ret; |
1989 | } | |
1990 | ||
0eb4c6c2 | 1991 | void gpiod_free(struct gpio_desc *desc) |
77c2d792 | 1992 | { |
fac9d885 | 1993 | if (desc && desc->gdev && gpiod_free_commit(desc)) { |
fdeb8e15 | 1994 | module_put(desc->gdev->owner); |
33a68e86 LW |
1995 | put_device(&desc->gdev->dev); |
1996 | } else { | |
77c2d792 | 1997 | WARN_ON(extra_checks); |
33a68e86 | 1998 | } |
d2876d08 | 1999 | } |
372e722e | 2000 | |
d2876d08 DB |
2001 | /** |
2002 | * gpiochip_is_requested - return string iff signal was requested | |
a0b66a73 | 2003 | * @gc: controller managing the signal |
d2876d08 DB |
2004 | * @offset: of signal within controller's 0..(ngpio - 1) range |
2005 | * | |
2006 | * Returns NULL if the GPIO is not currently requested, else a string. | |
9c8318ff AC |
2007 | * The string returned is the label passed to gpio_request(); if none has been |
2008 | * passed it is a meaningless, non-NULL constant. | |
d2876d08 DB |
2009 | * |
2010 | * This function is for use by GPIO controller drivers. The label can | |
2011 | * help with diagnostics, and knowing that the signal is used as a GPIO | |
2012 | * can help avoid accidentally multiplexing it to another controller. | |
2013 | */ | |
13daf489 | 2014 | const char *gpiochip_is_requested(struct gpio_chip *gc, unsigned int offset) |
d2876d08 | 2015 | { |
6c0b4e6c | 2016 | struct gpio_desc *desc; |
d2876d08 | 2017 | |
a0b66a73 | 2018 | if (offset >= gc->ngpio) |
d2876d08 | 2019 | return NULL; |
6c0b4e6c | 2020 | |
a0b66a73 | 2021 | desc = gpiochip_get_desc(gc, offset); |
1739a2d8 BG |
2022 | if (IS_ERR(desc)) |
2023 | return NULL; | |
6c0b4e6c | 2024 | |
372e722e | 2025 | if (test_bit(FLAG_REQUESTED, &desc->flags) == 0) |
d2876d08 | 2026 | return NULL; |
372e722e | 2027 | return desc->label; |
d2876d08 DB |
2028 | } |
2029 | EXPORT_SYMBOL_GPL(gpiochip_is_requested); | |
2030 | ||
77c2d792 MW |
2031 | /** |
2032 | * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor | |
a0b66a73 | 2033 | * @gc: GPIO chip |
950d55f5 | 2034 | * @hwnum: hardware number of the GPIO for which to request the descriptor |
77c2d792 | 2035 | * @label: label for the GPIO |
5923ea6c LW |
2036 | * @lflags: lookup flags for this GPIO or 0 if default, this can be used to |
2037 | * specify things like line inversion semantics with the machine flags | |
2038 | * such as GPIO_OUT_LOW | |
2039 | * @dflags: descriptor request flags for this GPIO or 0 if default, this | |
2040 | * can be used to specify consumer semantics such as open drain | |
77c2d792 MW |
2041 | * |
2042 | * Function allows GPIO chip drivers to request and use their own GPIO | |
2043 | * descriptors via gpiolib API. Difference to gpiod_request() is that this | |
2044 | * function will not increase reference count of the GPIO chip module. This | |
2045 | * allows the GPIO chip module to be unloaded as needed (we assume that the | |
2046 | * GPIO chip driver handles freeing the GPIOs it has requested). | |
950d55f5 TR |
2047 | * |
2048 | * Returns: | |
2049 | * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error | |
2050 | * code on failure. | |
77c2d792 | 2051 | */ |
a0b66a73 | 2052 | struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc, |
06863620 | 2053 | unsigned int hwnum, |
21abf103 | 2054 | const char *label, |
5923ea6c LW |
2055 | enum gpio_lookup_flags lflags, |
2056 | enum gpiod_flags dflags) | |
77c2d792 | 2057 | { |
a0b66a73 | 2058 | struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum); |
d377f56f | 2059 | int ret; |
77c2d792 | 2060 | |
abdc08a3 | 2061 | if (IS_ERR(desc)) { |
a0b66a73 | 2062 | chip_err(gc, "failed to get GPIO descriptor\n"); |
abdc08a3 AC |
2063 | return desc; |
2064 | } | |
2065 | ||
d377f56f LW |
2066 | ret = gpiod_request_commit(desc, label); |
2067 | if (ret < 0) | |
2068 | return ERR_PTR(ret); | |
77c2d792 | 2069 | |
d377f56f LW |
2070 | ret = gpiod_configure_flags(desc, label, lflags, dflags); |
2071 | if (ret) { | |
a0b66a73 | 2072 | chip_err(gc, "setup of own GPIO %s failed\n", label); |
21abf103 | 2073 | gpiod_free_commit(desc); |
d377f56f | 2074 | return ERR_PTR(ret); |
21abf103 LW |
2075 | } |
2076 | ||
abdc08a3 | 2077 | return desc; |
77c2d792 | 2078 | } |
f7d4ad98 | 2079 | EXPORT_SYMBOL_GPL(gpiochip_request_own_desc); |
77c2d792 MW |
2080 | |
2081 | /** | |
2082 | * gpiochip_free_own_desc - Free GPIO requested by the chip driver | |
2083 | * @desc: GPIO descriptor to free | |
2084 | * | |
2085 | * Function frees the given GPIO requested previously with | |
2086 | * gpiochip_request_own_desc(). | |
2087 | */ | |
2088 | void gpiochip_free_own_desc(struct gpio_desc *desc) | |
2089 | { | |
2090 | if (desc) | |
fac9d885 | 2091 | gpiod_free_commit(desc); |
77c2d792 | 2092 | } |
f7d4ad98 | 2093 | EXPORT_SYMBOL_GPL(gpiochip_free_own_desc); |
d2876d08 | 2094 | |
fdeb8e15 LW |
2095 | /* |
2096 | * Drivers MUST set GPIO direction before making get/set calls. In | |
d2876d08 DB |
2097 | * some cases this is done in early boot, before IRQs are enabled. |
2098 | * | |
2099 | * As a rule these aren't called more than once (except for drivers | |
2100 | * using the open-drain emulation idiom) so these are natural places | |
2101 | * to accumulate extra debugging checks. Note that we can't (yet) | |
2102 | * rely on gpio_request() having been called beforehand. | |
2103 | */ | |
2104 | ||
d99f8876 | 2105 | static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset, |
62adc6f3 | 2106 | unsigned long config) |
71479789 | 2107 | { |
d90f3685 BG |
2108 | if (!gc->set_config) |
2109 | return -ENOTSUPP; | |
542f3615 | 2110 | |
62adc6f3 | 2111 | return gc->set_config(gc, offset, config); |
71479789 TP |
2112 | } |
2113 | ||
0c4d8666 AS |
2114 | static int gpio_set_config_with_argument(struct gpio_desc *desc, |
2115 | enum pin_config_param mode, | |
2116 | u32 argument) | |
d99f8876 | 2117 | { |
a0b66a73 | 2118 | struct gpio_chip *gc = desc->gdev->chip; |
91b4ea5f | 2119 | unsigned long config; |
0c4d8666 AS |
2120 | |
2121 | config = pinconf_to_config_packed(mode, argument); | |
2122 | return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config); | |
2123 | } | |
2124 | ||
baca3b15 AS |
2125 | static int gpio_set_config_with_argument_optional(struct gpio_desc *desc, |
2126 | enum pin_config_param mode, | |
2127 | u32 argument) | |
2128 | { | |
2129 | struct device *dev = &desc->gdev->dev; | |
2130 | int gpio = gpio_chip_hwgpio(desc); | |
2131 | int ret; | |
2132 | ||
2133 | ret = gpio_set_config_with_argument(desc, mode, argument); | |
2134 | if (ret != -ENOTSUPP) | |
2135 | return ret; | |
d99f8876 BG |
2136 | |
2137 | switch (mode) { | |
baca3b15 AS |
2138 | case PIN_CONFIG_PERSIST_STATE: |
2139 | dev_dbg(dev, "Persistence not supported for GPIO %d\n", gpio); | |
d99f8876 | 2140 | break; |
d99f8876 | 2141 | default: |
baca3b15 | 2142 | break; |
d99f8876 BG |
2143 | } |
2144 | ||
baca3b15 AS |
2145 | return 0; |
2146 | } | |
2147 | ||
0c4d8666 AS |
2148 | static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode) |
2149 | { | |
6aa32ad7 | 2150 | return gpio_set_config_with_argument(desc, mode, 0); |
d99f8876 BG |
2151 | } |
2152 | ||
5f4bf171 | 2153 | static int gpio_set_bias(struct gpio_desc *desc) |
2148ad77 | 2154 | { |
9ef6293c | 2155 | enum pin_config_param bias; |
6aa32ad7 | 2156 | unsigned int arg; |
2148ad77 KG |
2157 | |
2158 | if (test_bit(FLAG_BIAS_DISABLE, &desc->flags)) | |
2159 | bias = PIN_CONFIG_BIAS_DISABLE; | |
2160 | else if (test_bit(FLAG_PULL_UP, &desc->flags)) | |
2161 | bias = PIN_CONFIG_BIAS_PULL_UP; | |
2162 | else if (test_bit(FLAG_PULL_DOWN, &desc->flags)) | |
2163 | bias = PIN_CONFIG_BIAS_PULL_DOWN; | |
9ef6293c AS |
2164 | else |
2165 | return 0; | |
2148ad77 | 2166 | |
6aa32ad7 AS |
2167 | switch (bias) { |
2168 | case PIN_CONFIG_BIAS_PULL_DOWN: | |
2169 | case PIN_CONFIG_BIAS_PULL_UP: | |
2170 | arg = 1; | |
2171 | break; | |
2172 | ||
2173 | default: | |
2174 | arg = 0; | |
2175 | break; | |
2148ad77 | 2176 | } |
6aa32ad7 | 2177 | |
baca3b15 | 2178 | return gpio_set_config_with_argument_optional(desc, bias, arg); |
2148ad77 KG |
2179 | } |
2180 | ||
f725edd8 AS |
2181 | int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce) |
2182 | { | |
2183 | return gpio_set_config_with_argument_optional(desc, | |
2184 | PIN_CONFIG_INPUT_DEBOUNCE, | |
2185 | debounce); | |
2148ad77 KG |
2186 | } |
2187 | ||
79a9becd AC |
2188 | /** |
2189 | * gpiod_direction_input - set the GPIO direction to input | |
2190 | * @desc: GPIO to set to input | |
2191 | * | |
2192 | * Set the direction of the passed GPIO to input, such as gpiod_get_value() can | |
2193 | * be called safely on it. | |
2194 | * | |
2195 | * Return 0 in case of success, else an error code. | |
2196 | */ | |
2197 | int gpiod_direction_input(struct gpio_desc *desc) | |
d2876d08 | 2198 | { |
a0b66a73 | 2199 | struct gpio_chip *gc; |
d377f56f | 2200 | int ret = 0; |
d2876d08 | 2201 | |
fdeb8e15 | 2202 | VALIDATE_DESC(desc); |
a0b66a73 | 2203 | gc = desc->gdev->chip; |
bcabdef1 | 2204 | |
e48d194d LW |
2205 | /* |
2206 | * It is legal to have no .get() and .direction_input() specified if | |
2207 | * the chip is output-only, but you can't specify .direction_input() | |
2208 | * and not support the .get() operation, that doesn't make sense. | |
2209 | */ | |
a0b66a73 | 2210 | if (!gc->get && gc->direction_input) { |
6424de5a | 2211 | gpiod_warn(desc, |
e48d194d LW |
2212 | "%s: missing get() but have direction_input()\n", |
2213 | __func__); | |
be1a4b13 LW |
2214 | return -EIO; |
2215 | } | |
2216 | ||
e48d194d LW |
2217 | /* |
2218 | * If we have a .direction_input() callback, things are simple, | |
2219 | * just call it. Else we are some input-only chip so try to check the | |
2220 | * direction (if .get_direction() is supported) else we silently | |
2221 | * assume we are in input mode after this. | |
2222 | */ | |
a0b66a73 LW |
2223 | if (gc->direction_input) { |
2224 | ret = gc->direction_input(gc, gpio_chip_hwgpio(desc)); | |
2225 | } else if (gc->get_direction && | |
2226 | (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) { | |
ae9847f4 | 2227 | gpiod_warn(desc, |
e48d194d LW |
2228 | "%s: missing direction_input() operation and line is output\n", |
2229 | __func__); | |
ae9847f4 RRD |
2230 | return -EIO; |
2231 | } | |
2148ad77 | 2232 | if (ret == 0) { |
d2876d08 | 2233 | clear_bit(FLAG_IS_OUT, &desc->flags); |
5f4bf171 | 2234 | ret = gpio_set_bias(desc); |
2148ad77 | 2235 | } |
d449991c | 2236 | |
d377f56f | 2237 | trace_gpio_direction(desc_to_gpio(desc), 1, ret); |
d82da797 | 2238 | |
d377f56f | 2239 | return ret; |
d2876d08 | 2240 | } |
79a9becd | 2241 | EXPORT_SYMBOL_GPL(gpiod_direction_input); |
372e722e | 2242 | |
fac9d885 | 2243 | static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value) |
d2876d08 | 2244 | { |
c663e5f5 | 2245 | struct gpio_chip *gc = desc->gdev->chip; |
ad17731d | 2246 | int val = !!value; |
ae9847f4 | 2247 | int ret = 0; |
d2876d08 | 2248 | |
e48d194d LW |
2249 | /* |
2250 | * It's OK not to specify .direction_output() if the gpiochip is | |
2251 | * output-only, but if there is then not even a .set() operation it | |
2252 | * is pretty tricky to drive the output line. | |
2253 | */ | |
ae9847f4 | 2254 | if (!gc->set && !gc->direction_output) { |
6424de5a | 2255 | gpiod_warn(desc, |
e48d194d LW |
2256 | "%s: missing set() and direction_output() operations\n", |
2257 | __func__); | |
be1a4b13 LW |
2258 | return -EIO; |
2259 | } | |
2260 | ||
ae9847f4 RRD |
2261 | if (gc->direction_output) { |
2262 | ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val); | |
2263 | } else { | |
e48d194d | 2264 | /* Check that we are in output mode if we can */ |
ae9847f4 RRD |
2265 | if (gc->get_direction && |
2266 | gc->get_direction(gc, gpio_chip_hwgpio(desc))) { | |
2267 | gpiod_warn(desc, | |
2268 | "%s: missing direction_output() operation\n", | |
2269 | __func__); | |
2270 | return -EIO; | |
2271 | } | |
e48d194d LW |
2272 | /* |
2273 | * If we can't actively set the direction, we are some | |
2274 | * output-only chip, so just drive the output as desired. | |
2275 | */ | |
ae9847f4 RRD |
2276 | gc->set(gc, gpio_chip_hwgpio(desc), val); |
2277 | } | |
2278 | ||
c663e5f5 | 2279 | if (!ret) |
d2876d08 | 2280 | set_bit(FLAG_IS_OUT, &desc->flags); |
ad17731d | 2281 | trace_gpio_value(desc_to_gpio(desc), 0, val); |
c663e5f5 LW |
2282 | trace_gpio_direction(desc_to_gpio(desc), 0, ret); |
2283 | return ret; | |
d2876d08 | 2284 | } |
ef70bbe1 PZ |
2285 | |
2286 | /** | |
2287 | * gpiod_direction_output_raw - set the GPIO direction to output | |
2288 | * @desc: GPIO to set to output | |
2289 | * @value: initial output value of the GPIO | |
2290 | * | |
2291 | * Set the direction of the passed GPIO to output, such as gpiod_set_value() can | |
2292 | * be called safely on it. The initial value of the output must be specified | |
2293 | * as raw value on the physical line without regard for the ACTIVE_LOW status. | |
2294 | * | |
2295 | * Return 0 in case of success, else an error code. | |
2296 | */ | |
2297 | int gpiod_direction_output_raw(struct gpio_desc *desc, int value) | |
2298 | { | |
fdeb8e15 | 2299 | VALIDATE_DESC(desc); |
fac9d885 | 2300 | return gpiod_direction_output_raw_commit(desc, value); |
ef70bbe1 PZ |
2301 | } |
2302 | EXPORT_SYMBOL_GPL(gpiod_direction_output_raw); | |
2303 | ||
2304 | /** | |
90df4fe0 | 2305 | * gpiod_direction_output - set the GPIO direction to output |
ef70bbe1 PZ |
2306 | * @desc: GPIO to set to output |
2307 | * @value: initial output value of the GPIO | |
2308 | * | |
2309 | * Set the direction of the passed GPIO to output, such as gpiod_set_value() can | |
2310 | * be called safely on it. The initial value of the output must be specified | |
2311 | * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into | |
2312 | * account. | |
2313 | * | |
2314 | * Return 0 in case of success, else an error code. | |
2315 | */ | |
2316 | int gpiod_direction_output(struct gpio_desc *desc, int value) | |
2317 | { | |
02e47980 LW |
2318 | int ret; |
2319 | ||
fdeb8e15 | 2320 | VALIDATE_DESC(desc); |
ef70bbe1 PZ |
2321 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
2322 | value = !value; | |
ad17731d LW |
2323 | else |
2324 | value = !!value; | |
02e47980 | 2325 | |
4e9439dd HV |
2326 | /* GPIOs used for enabled IRQs shall not be set as output */ |
2327 | if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) && | |
2328 | test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) { | |
02e47980 LW |
2329 | gpiod_err(desc, |
2330 | "%s: tried to set a GPIO tied to an IRQ as output\n", | |
2331 | __func__); | |
2332 | return -EIO; | |
2333 | } | |
2334 | ||
2335 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) { | |
2336 | /* First see if we can enable open drain in hardware */ | |
83522358 | 2337 | ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN); |
02e47980 LW |
2338 | if (!ret) |
2339 | goto set_output_value; | |
2340 | /* Emulate open drain by not actively driving the line high */ | |
e735244e BG |
2341 | if (value) { |
2342 | ret = gpiod_direction_input(desc); | |
2343 | goto set_output_flag; | |
2344 | } | |
02e47980 LW |
2345 | } |
2346 | else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) { | |
83522358 | 2347 | ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE); |
02e47980 LW |
2348 | if (!ret) |
2349 | goto set_output_value; | |
2350 | /* Emulate open source by not actively driving the line low */ | |
e735244e BG |
2351 | if (!value) { |
2352 | ret = gpiod_direction_input(desc); | |
2353 | goto set_output_flag; | |
2354 | } | |
02e47980 | 2355 | } else { |
83522358 | 2356 | gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL); |
02e47980 LW |
2357 | } |
2358 | ||
2359 | set_output_value: | |
5f4bf171 | 2360 | ret = gpio_set_bias(desc); |
2821ae5f KG |
2361 | if (ret) |
2362 | return ret; | |
fac9d885 | 2363 | return gpiod_direction_output_raw_commit(desc, value); |
e735244e BG |
2364 | |
2365 | set_output_flag: | |
2366 | /* | |
2367 | * When emulating open-source or open-drain functionalities by not | |
2368 | * actively driving the line (setting mode to input) we still need to | |
2369 | * set the IS_OUT flag or otherwise we won't be able to set the line | |
2370 | * value anymore. | |
2371 | */ | |
2372 | if (ret == 0) | |
2373 | set_bit(FLAG_IS_OUT, &desc->flags); | |
2374 | return ret; | |
ef70bbe1 | 2375 | } |
79a9becd | 2376 | EXPORT_SYMBOL_GPL(gpiod_direction_output); |
d2876d08 | 2377 | |
8ced32ff GU |
2378 | /** |
2379 | * gpiod_set_config - sets @config for a GPIO | |
2380 | * @desc: descriptor of the GPIO for which to set the configuration | |
2381 | * @config: Same packed config format as generic pinconf | |
2382 | * | |
2383 | * Returns: | |
2384 | * 0 on success, %-ENOTSUPP if the controller doesn't support setting the | |
2385 | * configuration. | |
2386 | */ | |
2387 | int gpiod_set_config(struct gpio_desc *desc, unsigned long config) | |
2388 | { | |
a0b66a73 | 2389 | struct gpio_chip *gc; |
8ced32ff GU |
2390 | |
2391 | VALIDATE_DESC(desc); | |
a0b66a73 | 2392 | gc = desc->gdev->chip; |
8ced32ff | 2393 | |
a0b66a73 | 2394 | return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config); |
8ced32ff GU |
2395 | } |
2396 | EXPORT_SYMBOL_GPL(gpiod_set_config); | |
2397 | ||
c4b5be98 | 2398 | /** |
950d55f5 TR |
2399 | * gpiod_set_debounce - sets @debounce time for a GPIO |
2400 | * @desc: descriptor of the GPIO for which to set debounce time | |
2401 | * @debounce: debounce time in microseconds | |
65d87656 | 2402 | * |
950d55f5 TR |
2403 | * Returns: |
2404 | * 0 on success, %-ENOTSUPP if the controller doesn't support setting the | |
2405 | * debounce time. | |
c4b5be98 | 2406 | */ |
13daf489 | 2407 | int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce) |
c4b5be98 | 2408 | { |
8ced32ff | 2409 | unsigned long config; |
be1a4b13 | 2410 | |
2956b5d9 | 2411 | config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce); |
8ced32ff | 2412 | return gpiod_set_config(desc, config); |
c4b5be98 | 2413 | } |
79a9becd | 2414 | EXPORT_SYMBOL_GPL(gpiod_set_debounce); |
372e722e | 2415 | |
e10f72bf AJ |
2416 | /** |
2417 | * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset | |
2418 | * @desc: descriptor of the GPIO for which to configure persistence | |
2419 | * @transitory: True to lose state on suspend or reset, false for persistence | |
2420 | * | |
2421 | * Returns: | |
2422 | * 0 on success, otherwise a negative error code. | |
2423 | */ | |
2424 | int gpiod_set_transitory(struct gpio_desc *desc, bool transitory) | |
2425 | { | |
156dd392 | 2426 | VALIDATE_DESC(desc); |
e10f72bf AJ |
2427 | /* |
2428 | * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for | |
2429 | * persistence state. | |
2430 | */ | |
4fc5bfeb | 2431 | assign_bit(FLAG_TRANSITORY, &desc->flags, transitory); |
e10f72bf AJ |
2432 | |
2433 | /* If the driver supports it, set the persistence state now */ | |
baca3b15 AS |
2434 | return gpio_set_config_with_argument_optional(desc, |
2435 | PIN_CONFIG_PERSIST_STATE, | |
2436 | !transitory); | |
e10f72bf AJ |
2437 | } |
2438 | EXPORT_SYMBOL_GPL(gpiod_set_transitory); | |
2439 | ||
79a9becd AC |
2440 | /** |
2441 | * gpiod_is_active_low - test whether a GPIO is active-low or not | |
2442 | * @desc: the gpio descriptor to test | |
2443 | * | |
2444 | * Returns 1 if the GPIO is active-low, 0 otherwise. | |
2445 | */ | |
2446 | int gpiod_is_active_low(const struct gpio_desc *desc) | |
372e722e | 2447 | { |
fdeb8e15 | 2448 | VALIDATE_DESC(desc); |
79a9becd | 2449 | return test_bit(FLAG_ACTIVE_LOW, &desc->flags); |
372e722e | 2450 | } |
79a9becd | 2451 | EXPORT_SYMBOL_GPL(gpiod_is_active_low); |
d2876d08 | 2452 | |
d3a5bcb4 MM |
2453 | /** |
2454 | * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not | |
2455 | * @desc: the gpio descriptor to change | |
2456 | */ | |
2457 | void gpiod_toggle_active_low(struct gpio_desc *desc) | |
2458 | { | |
2459 | VALIDATE_DESC_VOID(desc); | |
2460 | change_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
2461 | } | |
2462 | EXPORT_SYMBOL_GPL(gpiod_toggle_active_low); | |
2463 | ||
d2876d08 DB |
2464 | /* I/O calls are only valid after configuration completed; the relevant |
2465 | * "is this a valid GPIO" error checks should already have been done. | |
2466 | * | |
2467 | * "Get" operations are often inlinable as reading a pin value register, | |
2468 | * and masking the relevant bit in that register. | |
2469 | * | |
2470 | * When "set" operations are inlinable, they involve writing that mask to | |
2471 | * one register to set a low value, or a different register to set it high. | |
2472 | * Otherwise locking is needed, so there may be little value to inlining. | |
2473 | * | |
2474 | *------------------------------------------------------------------------ | |
2475 | * | |
2476 | * IMPORTANT!!! The hot paths -- get/set value -- assume that callers | |
2477 | * have requested the GPIO. That can include implicit requesting by | |
2478 | * a direction setting call. Marking a gpio as requested locks its chip | |
2479 | * in memory, guaranteeing that these table lookups need no more locking | |
2480 | * and that gpiochip_remove() will fail. | |
2481 | * | |
2482 | * REVISIT when debugging, consider adding some instrumentation to ensure | |
2483 | * that the GPIO was actually requested. | |
2484 | */ | |
2485 | ||
fac9d885 | 2486 | static int gpiod_get_raw_value_commit(const struct gpio_desc *desc) |
d2876d08 | 2487 | { |
a0b66a73 | 2488 | struct gpio_chip *gc; |
372e722e | 2489 | int offset; |
e20538b8 | 2490 | int value; |
d2876d08 | 2491 | |
a0b66a73 | 2492 | gc = desc->gdev->chip; |
372e722e | 2493 | offset = gpio_chip_hwgpio(desc); |
a0b66a73 | 2494 | value = gc->get ? gc->get(gc, offset) : -EIO; |
723a6303 | 2495 | value = value < 0 ? value : !!value; |
372e722e | 2496 | trace_gpio_value(desc_to_gpio(desc), 1, value); |
3f397c21 | 2497 | return value; |
d2876d08 | 2498 | } |
372e722e | 2499 | |
a0b66a73 | 2500 | static int gpio_chip_get_multiple(struct gpio_chip *gc, |
eec1d566 LW |
2501 | unsigned long *mask, unsigned long *bits) |
2502 | { | |
a0b66a73 LW |
2503 | if (gc->get_multiple) { |
2504 | return gc->get_multiple(gc, mask, bits); | |
2505 | } else if (gc->get) { | |
eec1d566 LW |
2506 | int i, value; |
2507 | ||
a0b66a73 LW |
2508 | for_each_set_bit(i, mask, gc->ngpio) { |
2509 | value = gc->get(gc, i); | |
eec1d566 LW |
2510 | if (value < 0) |
2511 | return value; | |
2512 | __assign_bit(i, bits, value); | |
2513 | } | |
2514 | return 0; | |
2515 | } | |
2516 | return -EIO; | |
2517 | } | |
2518 | ||
2519 | int gpiod_get_array_value_complex(bool raw, bool can_sleep, | |
2520 | unsigned int array_size, | |
2521 | struct gpio_desc **desc_array, | |
77588c14 | 2522 | struct gpio_array *array_info, |
b9762beb | 2523 | unsigned long *value_bitmap) |
eec1d566 | 2524 | { |
d377f56f | 2525 | int ret, i = 0; |
b17566a6 JK |
2526 | |
2527 | /* | |
2528 | * Validate array_info against desc_array and its size. | |
2529 | * It should immediately follow desc_array if both | |
2530 | * have been obtained from the same gpiod_get_array() call. | |
2531 | */ | |
2532 | if (array_info && array_info->desc == desc_array && | |
2533 | array_size <= array_info->size && | |
2534 | (void *)array_info == desc_array + array_info->size) { | |
2535 | if (!can_sleep) | |
2536 | WARN_ON(array_info->chip->can_sleep); | |
2537 | ||
d377f56f | 2538 | ret = gpio_chip_get_multiple(array_info->chip, |
b17566a6 JK |
2539 | array_info->get_mask, |
2540 | value_bitmap); | |
d377f56f LW |
2541 | if (ret) |
2542 | return ret; | |
b17566a6 JK |
2543 | |
2544 | if (!raw && !bitmap_empty(array_info->invert_mask, array_size)) | |
2545 | bitmap_xor(value_bitmap, value_bitmap, | |
2546 | array_info->invert_mask, array_size); | |
2547 | ||
b17566a6 | 2548 | i = find_first_zero_bit(array_info->get_mask, array_size); |
ae66eca0 AS |
2549 | if (i == array_size) |
2550 | return 0; | |
b17566a6 JK |
2551 | } else { |
2552 | array_info = NULL; | |
2553 | } | |
eec1d566 LW |
2554 | |
2555 | while (i < array_size) { | |
a0b66a73 | 2556 | struct gpio_chip *gc = desc_array[i]->gdev->chip; |
3027743f LA |
2557 | unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)]; |
2558 | unsigned long *mask, *bits; | |
c07ea8d0 | 2559 | int first, j; |
eec1d566 | 2560 | |
a0b66a73 | 2561 | if (likely(gc->ngpio <= FASTPATH_NGPIO)) { |
3027743f LA |
2562 | mask = fastpath; |
2563 | } else { | |
a0b66a73 | 2564 | mask = kmalloc_array(2 * BITS_TO_LONGS(gc->ngpio), |
3027743f LA |
2565 | sizeof(*mask), |
2566 | can_sleep ? GFP_KERNEL : GFP_ATOMIC); | |
2567 | if (!mask) | |
2568 | return -ENOMEM; | |
2569 | } | |
2570 | ||
a0b66a73 LW |
2571 | bits = mask + BITS_TO_LONGS(gc->ngpio); |
2572 | bitmap_zero(mask, gc->ngpio); | |
3027743f | 2573 | |
eec1d566 | 2574 | if (!can_sleep) |
a0b66a73 | 2575 | WARN_ON(gc->can_sleep); |
eec1d566 LW |
2576 | |
2577 | /* collect all inputs belonging to the same chip */ | |
2578 | first = i; | |
eec1d566 LW |
2579 | do { |
2580 | const struct gpio_desc *desc = desc_array[i]; | |
2581 | int hwgpio = gpio_chip_hwgpio(desc); | |
2582 | ||
2583 | __set_bit(hwgpio, mask); | |
2584 | i++; | |
b17566a6 JK |
2585 | |
2586 | if (array_info) | |
35ae7f96 JK |
2587 | i = find_next_zero_bit(array_info->get_mask, |
2588 | array_size, i); | |
eec1d566 | 2589 | } while ((i < array_size) && |
a0b66a73 | 2590 | (desc_array[i]->gdev->chip == gc)); |
eec1d566 | 2591 | |
a0b66a73 | 2592 | ret = gpio_chip_get_multiple(gc, mask, bits); |
3027743f LA |
2593 | if (ret) { |
2594 | if (mask != fastpath) | |
2595 | kfree(mask); | |
eec1d566 | 2596 | return ret; |
3027743f | 2597 | } |
eec1d566 | 2598 | |
b17566a6 | 2599 | for (j = first; j < i; ) { |
eec1d566 LW |
2600 | const struct gpio_desc *desc = desc_array[j]; |
2601 | int hwgpio = gpio_chip_hwgpio(desc); | |
2602 | int value = test_bit(hwgpio, bits); | |
2603 | ||
2604 | if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
2605 | value = !value; | |
b9762beb | 2606 | __assign_bit(j, value_bitmap, value); |
eec1d566 | 2607 | trace_gpio_value(desc_to_gpio(desc), 1, value); |
799d5eb4 | 2608 | j++; |
b17566a6 JK |
2609 | |
2610 | if (array_info) | |
35ae7f96 JK |
2611 | j = find_next_zero_bit(array_info->get_mask, i, |
2612 | j); | |
eec1d566 | 2613 | } |
3027743f LA |
2614 | |
2615 | if (mask != fastpath) | |
2616 | kfree(mask); | |
eec1d566 LW |
2617 | } |
2618 | return 0; | |
2619 | } | |
2620 | ||
d2876d08 | 2621 | /** |
79a9becd AC |
2622 | * gpiod_get_raw_value() - return a gpio's raw value |
2623 | * @desc: gpio whose value will be returned | |
d2876d08 | 2624 | * |
79a9becd | 2625 | * Return the GPIO's raw value, i.e. the value of the physical line disregarding |
e20538b8 | 2626 | * its ACTIVE_LOW status, or negative errno on failure. |
79a9becd | 2627 | * |
827a9b8b | 2628 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 2629 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 2630 | */ |
79a9becd | 2631 | int gpiod_get_raw_value(const struct gpio_desc *desc) |
d2876d08 | 2632 | { |
fdeb8e15 | 2633 | VALIDATE_DESC(desc); |
3285170f | 2634 | /* Should be using gpiod_get_raw_value_cansleep() */ |
fdeb8e15 | 2635 | WARN_ON(desc->gdev->chip->can_sleep); |
fac9d885 | 2636 | return gpiod_get_raw_value_commit(desc); |
d2876d08 | 2637 | } |
79a9becd | 2638 | EXPORT_SYMBOL_GPL(gpiod_get_raw_value); |
372e722e | 2639 | |
79a9becd AC |
2640 | /** |
2641 | * gpiod_get_value() - return a gpio's value | |
2642 | * @desc: gpio whose value will be returned | |
2643 | * | |
2644 | * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into | |
e20538b8 | 2645 | * account, or negative errno on failure. |
79a9becd | 2646 | * |
827a9b8b | 2647 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd AC |
2648 | * complain if the GPIO chip functions potentially sleep. |
2649 | */ | |
2650 | int gpiod_get_value(const struct gpio_desc *desc) | |
372e722e | 2651 | { |
79a9becd | 2652 | int value; |
fdeb8e15 LW |
2653 | |
2654 | VALIDATE_DESC(desc); | |
3285170f | 2655 | /* Should be using gpiod_get_value_cansleep() */ |
fdeb8e15 | 2656 | WARN_ON(desc->gdev->chip->can_sleep); |
79a9becd | 2657 | |
fac9d885 | 2658 | value = gpiod_get_raw_value_commit(desc); |
e20538b8 BA |
2659 | if (value < 0) |
2660 | return value; | |
2661 | ||
79a9becd AC |
2662 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
2663 | value = !value; | |
2664 | ||
2665 | return value; | |
372e722e | 2666 | } |
79a9becd | 2667 | EXPORT_SYMBOL_GPL(gpiod_get_value); |
d2876d08 | 2668 | |
eec1d566 LW |
2669 | /** |
2670 | * gpiod_get_raw_array_value() - read raw values from an array of GPIOs | |
b9762beb | 2671 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 2672 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 2673 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 2674 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
2675 | * |
2676 | * Read the raw values of the GPIOs, i.e. the values of the physical lines | |
2677 | * without regard for their ACTIVE_LOW status. Return 0 in case of success, | |
2678 | * else an error code. | |
2679 | * | |
827a9b8b | 2680 | * This function can be called from contexts where we cannot sleep, |
eec1d566 LW |
2681 | * and it will complain if the GPIO chip functions potentially sleep. |
2682 | */ | |
2683 | int gpiod_get_raw_array_value(unsigned int array_size, | |
b9762beb | 2684 | struct gpio_desc **desc_array, |
77588c14 | 2685 | struct gpio_array *array_info, |
b9762beb | 2686 | unsigned long *value_bitmap) |
eec1d566 LW |
2687 | { |
2688 | if (!desc_array) | |
2689 | return -EINVAL; | |
2690 | return gpiod_get_array_value_complex(true, false, array_size, | |
77588c14 JK |
2691 | desc_array, array_info, |
2692 | value_bitmap); | |
eec1d566 LW |
2693 | } |
2694 | EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value); | |
2695 | ||
2696 | /** | |
2697 | * gpiod_get_array_value() - read values from an array of GPIOs | |
b9762beb | 2698 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 2699 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 2700 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 2701 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
2702 | * |
2703 | * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
2704 | * into account. Return 0 in case of success, else an error code. | |
2705 | * | |
827a9b8b | 2706 | * This function can be called from contexts where we cannot sleep, |
eec1d566 LW |
2707 | * and it will complain if the GPIO chip functions potentially sleep. |
2708 | */ | |
2709 | int gpiod_get_array_value(unsigned int array_size, | |
b9762beb | 2710 | struct gpio_desc **desc_array, |
77588c14 | 2711 | struct gpio_array *array_info, |
b9762beb | 2712 | unsigned long *value_bitmap) |
eec1d566 LW |
2713 | { |
2714 | if (!desc_array) | |
2715 | return -EINVAL; | |
2716 | return gpiod_get_array_value_complex(false, false, array_size, | |
77588c14 JK |
2717 | desc_array, array_info, |
2718 | value_bitmap); | |
eec1d566 LW |
2719 | } |
2720 | EXPORT_SYMBOL_GPL(gpiod_get_array_value); | |
2721 | ||
aca5ce14 | 2722 | /* |
fac9d885 | 2723 | * gpio_set_open_drain_value_commit() - Set the open drain gpio's value. |
79a9becd | 2724 | * @desc: gpio descriptor whose state need to be set. |
20a8a968 | 2725 | * @value: Non-zero for setting it HIGH otherwise it will set to LOW. |
aca5ce14 | 2726 | */ |
fac9d885 | 2727 | static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value) |
aca5ce14 | 2728 | { |
d377f56f | 2729 | int ret = 0; |
a0b66a73 | 2730 | struct gpio_chip *gc = desc->gdev->chip; |
372e722e AC |
2731 | int offset = gpio_chip_hwgpio(desc); |
2732 | ||
aca5ce14 | 2733 | if (value) { |
a0b66a73 | 2734 | ret = gc->direction_input(gc, offset); |
aca5ce14 | 2735 | } else { |
a0b66a73 | 2736 | ret = gc->direction_output(gc, offset, 0); |
d377f56f | 2737 | if (!ret) |
372e722e | 2738 | set_bit(FLAG_IS_OUT, &desc->flags); |
aca5ce14 | 2739 | } |
d377f56f LW |
2740 | trace_gpio_direction(desc_to_gpio(desc), value, ret); |
2741 | if (ret < 0) | |
6424de5a MB |
2742 | gpiod_err(desc, |
2743 | "%s: Error in set_value for open drain err %d\n", | |
d377f56f | 2744 | __func__, ret); |
aca5ce14 LD |
2745 | } |
2746 | ||
25553ff0 | 2747 | /* |
79a9becd AC |
2748 | * _gpio_set_open_source_value() - Set the open source gpio's value. |
2749 | * @desc: gpio descriptor whose state need to be set. | |
20a8a968 | 2750 | * @value: Non-zero for setting it HIGH otherwise it will set to LOW. |
25553ff0 | 2751 | */ |
fac9d885 | 2752 | static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value) |
25553ff0 | 2753 | { |
d377f56f | 2754 | int ret = 0; |
a0b66a73 | 2755 | struct gpio_chip *gc = desc->gdev->chip; |
372e722e AC |
2756 | int offset = gpio_chip_hwgpio(desc); |
2757 | ||
25553ff0 | 2758 | if (value) { |
a0b66a73 | 2759 | ret = gc->direction_output(gc, offset, 1); |
d377f56f | 2760 | if (!ret) |
372e722e | 2761 | set_bit(FLAG_IS_OUT, &desc->flags); |
25553ff0 | 2762 | } else { |
a0b66a73 | 2763 | ret = gc->direction_input(gc, offset); |
25553ff0 | 2764 | } |
d377f56f LW |
2765 | trace_gpio_direction(desc_to_gpio(desc), !value, ret); |
2766 | if (ret < 0) | |
6424de5a MB |
2767 | gpiod_err(desc, |
2768 | "%s: Error in set_value for open source err %d\n", | |
d377f56f | 2769 | __func__, ret); |
25553ff0 LD |
2770 | } |
2771 | ||
fac9d885 | 2772 | static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value) |
d2876d08 | 2773 | { |
a0b66a73 | 2774 | struct gpio_chip *gc; |
d2876d08 | 2775 | |
a0b66a73 | 2776 | gc = desc->gdev->chip; |
372e722e | 2777 | trace_gpio_value(desc_to_gpio(desc), 0, value); |
a0b66a73 | 2778 | gc->set(gc, gpio_chip_hwgpio(desc), value); |
372e722e AC |
2779 | } |
2780 | ||
5f424243 RI |
2781 | /* |
2782 | * set multiple outputs on the same chip; | |
2783 | * use the chip's set_multiple function if available; | |
2784 | * otherwise set the outputs sequentially; | |
a0b66a73 | 2785 | * @chip: the GPIO chip we operate on |
5f424243 RI |
2786 | * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word |
2787 | * defines which outputs are to be changed | |
2788 | * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word | |
2789 | * defines the values the outputs specified by mask are to be set to | |
2790 | */ | |
a0b66a73 | 2791 | static void gpio_chip_set_multiple(struct gpio_chip *gc, |
5f424243 RI |
2792 | unsigned long *mask, unsigned long *bits) |
2793 | { | |
a0b66a73 LW |
2794 | if (gc->set_multiple) { |
2795 | gc->set_multiple(gc, mask, bits); | |
5f424243 | 2796 | } else { |
5e4e6fb3 AS |
2797 | unsigned int i; |
2798 | ||
2799 | /* set outputs if the corresponding mask bit is set */ | |
a0b66a73 LW |
2800 | for_each_set_bit(i, mask, gc->ngpio) |
2801 | gc->set(gc, i, test_bit(i, bits)); | |
5f424243 RI |
2802 | } |
2803 | } | |
2804 | ||
3027743f | 2805 | int gpiod_set_array_value_complex(bool raw, bool can_sleep, |
3c940660 GU |
2806 | unsigned int array_size, |
2807 | struct gpio_desc **desc_array, | |
2808 | struct gpio_array *array_info, | |
2809 | unsigned long *value_bitmap) | |
5f424243 RI |
2810 | { |
2811 | int i = 0; | |
2812 | ||
b17566a6 JK |
2813 | /* |
2814 | * Validate array_info against desc_array and its size. | |
2815 | * It should immediately follow desc_array if both | |
2816 | * have been obtained from the same gpiod_get_array() call. | |
2817 | */ | |
2818 | if (array_info && array_info->desc == desc_array && | |
2819 | array_size <= array_info->size && | |
2820 | (void *)array_info == desc_array + array_info->size) { | |
2821 | if (!can_sleep) | |
2822 | WARN_ON(array_info->chip->can_sleep); | |
2823 | ||
2824 | if (!raw && !bitmap_empty(array_info->invert_mask, array_size)) | |
2825 | bitmap_xor(value_bitmap, value_bitmap, | |
2826 | array_info->invert_mask, array_size); | |
2827 | ||
2828 | gpio_chip_set_multiple(array_info->chip, array_info->set_mask, | |
2829 | value_bitmap); | |
2830 | ||
b17566a6 | 2831 | i = find_first_zero_bit(array_info->set_mask, array_size); |
ae66eca0 AS |
2832 | if (i == array_size) |
2833 | return 0; | |
b17566a6 JK |
2834 | } else { |
2835 | array_info = NULL; | |
2836 | } | |
2837 | ||
5f424243 | 2838 | while (i < array_size) { |
a0b66a73 | 2839 | struct gpio_chip *gc = desc_array[i]->gdev->chip; |
3027743f LA |
2840 | unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)]; |
2841 | unsigned long *mask, *bits; | |
5f424243 RI |
2842 | int count = 0; |
2843 | ||
a0b66a73 | 2844 | if (likely(gc->ngpio <= FASTPATH_NGPIO)) { |
3027743f LA |
2845 | mask = fastpath; |
2846 | } else { | |
a0b66a73 | 2847 | mask = kmalloc_array(2 * BITS_TO_LONGS(gc->ngpio), |
3027743f LA |
2848 | sizeof(*mask), |
2849 | can_sleep ? GFP_KERNEL : GFP_ATOMIC); | |
2850 | if (!mask) | |
2851 | return -ENOMEM; | |
2852 | } | |
2853 | ||
a0b66a73 LW |
2854 | bits = mask + BITS_TO_LONGS(gc->ngpio); |
2855 | bitmap_zero(mask, gc->ngpio); | |
3027743f | 2856 | |
38e003f4 | 2857 | if (!can_sleep) |
a0b66a73 | 2858 | WARN_ON(gc->can_sleep); |
38e003f4 | 2859 | |
5f424243 RI |
2860 | do { |
2861 | struct gpio_desc *desc = desc_array[i]; | |
2862 | int hwgpio = gpio_chip_hwgpio(desc); | |
b9762beb | 2863 | int value = test_bit(i, value_bitmap); |
5f424243 | 2864 | |
b17566a6 JK |
2865 | /* |
2866 | * Pins applicable for fast input but not for | |
2867 | * fast output processing may have been already | |
2868 | * inverted inside the fast path, skip them. | |
2869 | */ | |
2870 | if (!raw && !(array_info && | |
2871 | test_bit(i, array_info->invert_mask)) && | |
2872 | test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
5f424243 RI |
2873 | value = !value; |
2874 | trace_gpio_value(desc_to_gpio(desc), 0, value); | |
2875 | /* | |
2876 | * collect all normal outputs belonging to the same chip | |
2877 | * open drain and open source outputs are set individually | |
2878 | */ | |
02e47980 | 2879 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) { |
fac9d885 | 2880 | gpio_set_open_drain_value_commit(desc, value); |
02e47980 | 2881 | } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) { |
fac9d885 | 2882 | gpio_set_open_source_value_commit(desc, value); |
5f424243 RI |
2883 | } else { |
2884 | __set_bit(hwgpio, mask); | |
4fc5bfeb | 2885 | __assign_bit(hwgpio, bits, value); |
5f424243 RI |
2886 | count++; |
2887 | } | |
2888 | i++; | |
b17566a6 JK |
2889 | |
2890 | if (array_info) | |
35ae7f96 JK |
2891 | i = find_next_zero_bit(array_info->set_mask, |
2892 | array_size, i); | |
fdeb8e15 | 2893 | } while ((i < array_size) && |
a0b66a73 | 2894 | (desc_array[i]->gdev->chip == gc)); |
5f424243 | 2895 | /* push collected bits to outputs */ |
38e003f4 | 2896 | if (count != 0) |
a0b66a73 | 2897 | gpio_chip_set_multiple(gc, mask, bits); |
3027743f LA |
2898 | |
2899 | if (mask != fastpath) | |
2900 | kfree(mask); | |
5f424243 | 2901 | } |
3027743f | 2902 | return 0; |
5f424243 RI |
2903 | } |
2904 | ||
d2876d08 | 2905 | /** |
79a9becd AC |
2906 | * gpiod_set_raw_value() - assign a gpio's raw value |
2907 | * @desc: gpio whose value will be assigned | |
d2876d08 | 2908 | * @value: value to assign |
d2876d08 | 2909 | * |
79a9becd AC |
2910 | * Set the raw value of the GPIO, i.e. the value of its physical line without |
2911 | * regard for its ACTIVE_LOW status. | |
2912 | * | |
827a9b8b | 2913 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 2914 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 2915 | */ |
79a9becd | 2916 | void gpiod_set_raw_value(struct gpio_desc *desc, int value) |
372e722e | 2917 | { |
fdeb8e15 | 2918 | VALIDATE_DESC_VOID(desc); |
3285170f | 2919 | /* Should be using gpiod_set_raw_value_cansleep() */ |
fdeb8e15 | 2920 | WARN_ON(desc->gdev->chip->can_sleep); |
fac9d885 | 2921 | gpiod_set_raw_value_commit(desc, value); |
d2876d08 | 2922 | } |
79a9becd | 2923 | EXPORT_SYMBOL_GPL(gpiod_set_raw_value); |
d2876d08 | 2924 | |
1e77fc82 GU |
2925 | /** |
2926 | * gpiod_set_value_nocheck() - set a GPIO line value without checking | |
2927 | * @desc: the descriptor to set the value on | |
2928 | * @value: value to set | |
2929 | * | |
2930 | * This sets the value of a GPIO line backing a descriptor, applying | |
2931 | * different semantic quirks like active low and open drain/source | |
2932 | * handling. | |
2933 | */ | |
2934 | static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value) | |
2935 | { | |
2936 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
2937 | value = !value; | |
2938 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) | |
2939 | gpio_set_open_drain_value_commit(desc, value); | |
2940 | else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) | |
2941 | gpio_set_open_source_value_commit(desc, value); | |
2942 | else | |
2943 | gpiod_set_raw_value_commit(desc, value); | |
2944 | } | |
2945 | ||
d2876d08 | 2946 | /** |
79a9becd AC |
2947 | * gpiod_set_value() - assign a gpio's value |
2948 | * @desc: gpio whose value will be assigned | |
2949 | * @value: value to assign | |
2950 | * | |
02e47980 LW |
2951 | * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW, |
2952 | * OPEN_DRAIN and OPEN_SOURCE flags into account. | |
d2876d08 | 2953 | * |
827a9b8b | 2954 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 2955 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 2956 | */ |
79a9becd | 2957 | void gpiod_set_value(struct gpio_desc *desc, int value) |
d2876d08 | 2958 | { |
fdeb8e15 | 2959 | VALIDATE_DESC_VOID(desc); |
3285170f | 2960 | /* Should be using gpiod_set_value_cansleep() */ |
fdeb8e15 | 2961 | WARN_ON(desc->gdev->chip->can_sleep); |
1e77fc82 | 2962 | gpiod_set_value_nocheck(desc, value); |
372e722e | 2963 | } |
79a9becd | 2964 | EXPORT_SYMBOL_GPL(gpiod_set_value); |
d2876d08 | 2965 | |
5f424243 | 2966 | /** |
3fff99bc | 2967 | * gpiod_set_raw_array_value() - assign values to an array of GPIOs |
b9762beb | 2968 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 2969 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 2970 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 2971 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
2972 | * |
2973 | * Set the raw values of the GPIOs, i.e. the values of the physical lines | |
2974 | * without regard for their ACTIVE_LOW status. | |
2975 | * | |
827a9b8b | 2976 | * This function can be called from contexts where we cannot sleep, and will |
5f424243 RI |
2977 | * complain if the GPIO chip functions potentially sleep. |
2978 | */ | |
3027743f | 2979 | int gpiod_set_raw_array_value(unsigned int array_size, |
3c940660 GU |
2980 | struct gpio_desc **desc_array, |
2981 | struct gpio_array *array_info, | |
2982 | unsigned long *value_bitmap) | |
5f424243 RI |
2983 | { |
2984 | if (!desc_array) | |
3027743f LA |
2985 | return -EINVAL; |
2986 | return gpiod_set_array_value_complex(true, false, array_size, | |
77588c14 | 2987 | desc_array, array_info, value_bitmap); |
5f424243 | 2988 | } |
3fff99bc | 2989 | EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value); |
5f424243 RI |
2990 | |
2991 | /** | |
3fff99bc | 2992 | * gpiod_set_array_value() - assign values to an array of GPIOs |
b9762beb | 2993 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 2994 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 2995 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 2996 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
2997 | * |
2998 | * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
2999 | * into account. | |
3000 | * | |
827a9b8b | 3001 | * This function can be called from contexts where we cannot sleep, and will |
5f424243 RI |
3002 | * complain if the GPIO chip functions potentially sleep. |
3003 | */ | |
cf9af0d5 GU |
3004 | int gpiod_set_array_value(unsigned int array_size, |
3005 | struct gpio_desc **desc_array, | |
3006 | struct gpio_array *array_info, | |
3007 | unsigned long *value_bitmap) | |
5f424243 RI |
3008 | { |
3009 | if (!desc_array) | |
cf9af0d5 GU |
3010 | return -EINVAL; |
3011 | return gpiod_set_array_value_complex(false, false, array_size, | |
3012 | desc_array, array_info, | |
3013 | value_bitmap); | |
5f424243 | 3014 | } |
3fff99bc | 3015 | EXPORT_SYMBOL_GPL(gpiod_set_array_value); |
5f424243 | 3016 | |
d2876d08 | 3017 | /** |
79a9becd AC |
3018 | * gpiod_cansleep() - report whether gpio value access may sleep |
3019 | * @desc: gpio to check | |
d2876d08 | 3020 | * |
d2876d08 | 3021 | */ |
79a9becd | 3022 | int gpiod_cansleep(const struct gpio_desc *desc) |
372e722e | 3023 | { |
fdeb8e15 LW |
3024 | VALIDATE_DESC(desc); |
3025 | return desc->gdev->chip->can_sleep; | |
d2876d08 | 3026 | } |
79a9becd | 3027 | EXPORT_SYMBOL_GPL(gpiod_cansleep); |
d2876d08 | 3028 | |
90b39402 LW |
3029 | /** |
3030 | * gpiod_set_consumer_name() - set the consumer name for the descriptor | |
3031 | * @desc: gpio to set the consumer name on | |
3032 | * @name: the new consumer name | |
3033 | */ | |
18534df4 | 3034 | int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name) |
90b39402 | 3035 | { |
18534df4 MS |
3036 | VALIDATE_DESC(desc); |
3037 | if (name) { | |
3038 | name = kstrdup_const(name, GFP_KERNEL); | |
3039 | if (!name) | |
3040 | return -ENOMEM; | |
3041 | } | |
3042 | ||
3043 | kfree_const(desc->label); | |
3044 | desc_set_label(desc, name); | |
3045 | ||
3046 | return 0; | |
90b39402 LW |
3047 | } |
3048 | EXPORT_SYMBOL_GPL(gpiod_set_consumer_name); | |
3049 | ||
0f6d504e | 3050 | /** |
79a9becd AC |
3051 | * gpiod_to_irq() - return the IRQ corresponding to a GPIO |
3052 | * @desc: gpio whose IRQ will be returned (already requested) | |
0f6d504e | 3053 | * |
79a9becd AC |
3054 | * Return the IRQ corresponding to the passed GPIO, or an error code in case of |
3055 | * error. | |
0f6d504e | 3056 | */ |
79a9becd | 3057 | int gpiod_to_irq(const struct gpio_desc *desc) |
0f6d504e | 3058 | { |
a0b66a73 | 3059 | struct gpio_chip *gc; |
4c37ce86 | 3060 | int offset; |
0f6d504e | 3061 | |
79bb71bd LW |
3062 | /* |
3063 | * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics | |
3064 | * requires this function to not return zero on an invalid descriptor | |
3065 | * but rather a negative error number. | |
3066 | */ | |
bfbbe44d | 3067 | if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip) |
79bb71bd LW |
3068 | return -EINVAL; |
3069 | ||
a0b66a73 | 3070 | gc = desc->gdev->chip; |
372e722e | 3071 | offset = gpio_chip_hwgpio(desc); |
a0b66a73 LW |
3072 | if (gc->to_irq) { |
3073 | int retirq = gc->to_irq(gc, offset); | |
4c37ce86 LW |
3074 | |
3075 | /* Zero means NO_IRQ */ | |
3076 | if (!retirq) | |
3077 | return -ENXIO; | |
3078 | ||
3079 | return retirq; | |
3080 | } | |
3081 | return -ENXIO; | |
0f6d504e | 3082 | } |
79a9becd | 3083 | EXPORT_SYMBOL_GPL(gpiod_to_irq); |
0f6d504e | 3084 | |
d468bf9e | 3085 | /** |
e3a2e878 | 3086 | * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ |
a0b66a73 | 3087 | * @gc: the chip the GPIO to lock belongs to |
d74be6df | 3088 | * @offset: the offset of the GPIO to lock as IRQ |
d468bf9e LW |
3089 | * |
3090 | * This is used directly by GPIO drivers that want to lock down | |
f438acdf | 3091 | * a certain GPIO line to be used for IRQs. |
d468bf9e | 3092 | */ |
a0b66a73 | 3093 | int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset) |
372e722e | 3094 | { |
9c10280d LW |
3095 | struct gpio_desc *desc; |
3096 | ||
a0b66a73 | 3097 | desc = gpiochip_get_desc(gc, offset); |
9c10280d LW |
3098 | if (IS_ERR(desc)) |
3099 | return PTR_ERR(desc); | |
3100 | ||
60f8339e LW |
3101 | /* |
3102 | * If it's fast: flush the direction setting if something changed | |
3103 | * behind our back | |
3104 | */ | |
a0b66a73 | 3105 | if (!gc->can_sleep && gc->get_direction) { |
80956790 | 3106 | int dir = gpiod_get_direction(desc); |
9c10280d | 3107 | |
36b31279 | 3108 | if (dir < 0) { |
a0b66a73 | 3109 | chip_err(gc, "%s: cannot get GPIO direction\n", |
36b31279 AS |
3110 | __func__); |
3111 | return dir; | |
3112 | } | |
9c10280d | 3113 | } |
d468bf9e | 3114 | |
e9bdf7e6 LW |
3115 | /* To be valid for IRQ the line needs to be input or open drain */ |
3116 | if (test_bit(FLAG_IS_OUT, &desc->flags) && | |
3117 | !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) { | |
a0b66a73 | 3118 | chip_err(gc, |
b1911710 AS |
3119 | "%s: tried to flag a GPIO set as output for IRQ\n", |
3120 | __func__); | |
d468bf9e LW |
3121 | return -EIO; |
3122 | } | |
3123 | ||
9c10280d | 3124 | set_bit(FLAG_USED_AS_IRQ, &desc->flags); |
4e9439dd | 3125 | set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3940c34a LW |
3126 | |
3127 | /* | |
3128 | * If the consumer has not set up a label (such as when the | |
3129 | * IRQ is referenced from .to_irq()) we set up a label here | |
3130 | * so it is clear this is used as an interrupt. | |
3131 | */ | |
3132 | if (!desc->label) | |
3133 | desc_set_label(desc, "interrupt"); | |
3134 | ||
d468bf9e | 3135 | return 0; |
372e722e | 3136 | } |
e3a2e878 | 3137 | EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq); |
d2876d08 | 3138 | |
d468bf9e | 3139 | /** |
e3a2e878 | 3140 | * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ |
a0b66a73 | 3141 | * @gc: the chip the GPIO to lock belongs to |
d74be6df | 3142 | * @offset: the offset of the GPIO to lock as IRQ |
d468bf9e LW |
3143 | * |
3144 | * This is used directly by GPIO drivers that want to indicate | |
3145 | * that a certain GPIO is no longer used exclusively for IRQ. | |
d2876d08 | 3146 | */ |
a0b66a73 | 3147 | void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset) |
d468bf9e | 3148 | { |
3940c34a LW |
3149 | struct gpio_desc *desc; |
3150 | ||
a0b66a73 | 3151 | desc = gpiochip_get_desc(gc, offset); |
3940c34a | 3152 | if (IS_ERR(desc)) |
d468bf9e | 3153 | return; |
d2876d08 | 3154 | |
3940c34a | 3155 | clear_bit(FLAG_USED_AS_IRQ, &desc->flags); |
4e9439dd | 3156 | clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3940c34a LW |
3157 | |
3158 | /* If we only had this marking, erase it */ | |
3159 | if (desc->label && !strcmp(desc->label, "interrupt")) | |
3160 | desc_set_label(desc, NULL); | |
d468bf9e | 3161 | } |
e3a2e878 | 3162 | EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq); |
d468bf9e | 3163 | |
a0b66a73 | 3164 | void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset) |
4e9439dd | 3165 | { |
a0b66a73 | 3166 | struct gpio_desc *desc = gpiochip_get_desc(gc, offset); |
4e9439dd HV |
3167 | |
3168 | if (!IS_ERR(desc) && | |
3169 | !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) | |
3170 | clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); | |
3171 | } | |
3172 | EXPORT_SYMBOL_GPL(gpiochip_disable_irq); | |
3173 | ||
a0b66a73 | 3174 | void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset) |
4e9439dd | 3175 | { |
a0b66a73 | 3176 | struct gpio_desc *desc = gpiochip_get_desc(gc, offset); |
4e9439dd HV |
3177 | |
3178 | if (!IS_ERR(desc) && | |
3179 | !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) { | |
e9bdf7e6 LW |
3180 | /* |
3181 | * We must not be output when using IRQ UNLESS we are | |
3182 | * open drain. | |
3183 | */ | |
3184 | WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) && | |
3185 | !test_bit(FLAG_OPEN_DRAIN, &desc->flags)); | |
4e9439dd HV |
3186 | set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3187 | } | |
3188 | } | |
3189 | EXPORT_SYMBOL_GPL(gpiochip_enable_irq); | |
3190 | ||
a0b66a73 | 3191 | bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset) |
6cee3821 | 3192 | { |
a0b66a73 | 3193 | if (offset >= gc->ngpio) |
6cee3821 LW |
3194 | return false; |
3195 | ||
a0b66a73 | 3196 | return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags); |
6cee3821 LW |
3197 | } |
3198 | EXPORT_SYMBOL_GPL(gpiochip_line_is_irq); | |
3199 | ||
a0b66a73 | 3200 | int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset) |
4e6b8238 HV |
3201 | { |
3202 | int ret; | |
3203 | ||
a0b66a73 | 3204 | if (!try_module_get(gc->gpiodev->owner)) |
4e6b8238 HV |
3205 | return -ENODEV; |
3206 | ||
a0b66a73 | 3207 | ret = gpiochip_lock_as_irq(gc, offset); |
4e6b8238 | 3208 | if (ret) { |
a0b66a73 LW |
3209 | chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset); |
3210 | module_put(gc->gpiodev->owner); | |
4e6b8238 HV |
3211 | return ret; |
3212 | } | |
3213 | return 0; | |
3214 | } | |
3215 | EXPORT_SYMBOL_GPL(gpiochip_reqres_irq); | |
3216 | ||
a0b66a73 | 3217 | void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset) |
4e6b8238 | 3218 | { |
a0b66a73 LW |
3219 | gpiochip_unlock_as_irq(gc, offset); |
3220 | module_put(gc->gpiodev->owner); | |
4e6b8238 HV |
3221 | } |
3222 | EXPORT_SYMBOL_GPL(gpiochip_relres_irq); | |
3223 | ||
a0b66a73 | 3224 | bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset) |
143b65d6 | 3225 | { |
a0b66a73 | 3226 | if (offset >= gc->ngpio) |
143b65d6 LW |
3227 | return false; |
3228 | ||
a0b66a73 | 3229 | return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags); |
143b65d6 LW |
3230 | } |
3231 | EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain); | |
3232 | ||
a0b66a73 | 3233 | bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset) |
143b65d6 | 3234 | { |
a0b66a73 | 3235 | if (offset >= gc->ngpio) |
143b65d6 LW |
3236 | return false; |
3237 | ||
a0b66a73 | 3238 | return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags); |
143b65d6 LW |
3239 | } |
3240 | EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source); | |
3241 | ||
a0b66a73 | 3242 | bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset) |
05f479bf | 3243 | { |
a0b66a73 | 3244 | if (offset >= gc->ngpio) |
05f479bf CK |
3245 | return false; |
3246 | ||
a0b66a73 | 3247 | return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags); |
05f479bf CK |
3248 | } |
3249 | EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent); | |
3250 | ||
79a9becd AC |
3251 | /** |
3252 | * gpiod_get_raw_value_cansleep() - return a gpio's raw value | |
3253 | * @desc: gpio whose value will be returned | |
3254 | * | |
3255 | * Return the GPIO's raw value, i.e. the value of the physical line disregarding | |
e20538b8 | 3256 | * its ACTIVE_LOW status, or negative errno on failure. |
79a9becd AC |
3257 | * |
3258 | * This function is to be called from contexts that can sleep. | |
d2876d08 | 3259 | */ |
79a9becd | 3260 | int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc) |
d2876d08 | 3261 | { |
d2876d08 | 3262 | might_sleep_if(extra_checks); |
fdeb8e15 | 3263 | VALIDATE_DESC(desc); |
fac9d885 | 3264 | return gpiod_get_raw_value_commit(desc); |
d2876d08 | 3265 | } |
79a9becd | 3266 | EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep); |
372e722e | 3267 | |
79a9becd AC |
3268 | /** |
3269 | * gpiod_get_value_cansleep() - return a gpio's value | |
3270 | * @desc: gpio whose value will be returned | |
3271 | * | |
3272 | * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into | |
e20538b8 | 3273 | * account, or negative errno on failure. |
79a9becd AC |
3274 | * |
3275 | * This function is to be called from contexts that can sleep. | |
3276 | */ | |
3277 | int gpiod_get_value_cansleep(const struct gpio_desc *desc) | |
d2876d08 | 3278 | { |
3f397c21 | 3279 | int value; |
d2876d08 DB |
3280 | |
3281 | might_sleep_if(extra_checks); | |
fdeb8e15 | 3282 | VALIDATE_DESC(desc); |
fac9d885 | 3283 | value = gpiod_get_raw_value_commit(desc); |
e20538b8 BA |
3284 | if (value < 0) |
3285 | return value; | |
3286 | ||
79a9becd AC |
3287 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
3288 | value = !value; | |
3289 | ||
3f397c21 | 3290 | return value; |
d2876d08 | 3291 | } |
79a9becd | 3292 | EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep); |
372e722e | 3293 | |
eec1d566 LW |
3294 | /** |
3295 | * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs | |
b9762beb | 3296 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 3297 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 3298 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3299 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
3300 | * |
3301 | * Read the raw values of the GPIOs, i.e. the values of the physical lines | |
3302 | * without regard for their ACTIVE_LOW status. Return 0 in case of success, | |
3303 | * else an error code. | |
3304 | * | |
3305 | * This function is to be called from contexts that can sleep. | |
3306 | */ | |
3307 | int gpiod_get_raw_array_value_cansleep(unsigned int array_size, | |
3308 | struct gpio_desc **desc_array, | |
77588c14 | 3309 | struct gpio_array *array_info, |
b9762beb | 3310 | unsigned long *value_bitmap) |
eec1d566 LW |
3311 | { |
3312 | might_sleep_if(extra_checks); | |
3313 | if (!desc_array) | |
3314 | return -EINVAL; | |
3315 | return gpiod_get_array_value_complex(true, true, array_size, | |
77588c14 JK |
3316 | desc_array, array_info, |
3317 | value_bitmap); | |
eec1d566 LW |
3318 | } |
3319 | EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep); | |
3320 | ||
3321 | /** | |
3322 | * gpiod_get_array_value_cansleep() - read values from an array of GPIOs | |
b9762beb | 3323 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 3324 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 3325 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3326 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
3327 | * |
3328 | * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
3329 | * into account. Return 0 in case of success, else an error code. | |
3330 | * | |
3331 | * This function is to be called from contexts that can sleep. | |
3332 | */ | |
3333 | int gpiod_get_array_value_cansleep(unsigned int array_size, | |
3334 | struct gpio_desc **desc_array, | |
77588c14 | 3335 | struct gpio_array *array_info, |
b9762beb | 3336 | unsigned long *value_bitmap) |
eec1d566 LW |
3337 | { |
3338 | might_sleep_if(extra_checks); | |
3339 | if (!desc_array) | |
3340 | return -EINVAL; | |
3341 | return gpiod_get_array_value_complex(false, true, array_size, | |
77588c14 JK |
3342 | desc_array, array_info, |
3343 | value_bitmap); | |
eec1d566 LW |
3344 | } |
3345 | EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep); | |
3346 | ||
79a9becd AC |
3347 | /** |
3348 | * gpiod_set_raw_value_cansleep() - assign a gpio's raw value | |
3349 | * @desc: gpio whose value will be assigned | |
3350 | * @value: value to assign | |
3351 | * | |
3352 | * Set the raw value of the GPIO, i.e. the value of its physical line without | |
3353 | * regard for its ACTIVE_LOW status. | |
3354 | * | |
3355 | * This function is to be called from contexts that can sleep. | |
3356 | */ | |
3357 | void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value) | |
372e722e | 3358 | { |
d2876d08 | 3359 | might_sleep_if(extra_checks); |
fdeb8e15 | 3360 | VALIDATE_DESC_VOID(desc); |
fac9d885 | 3361 | gpiod_set_raw_value_commit(desc, value); |
372e722e | 3362 | } |
79a9becd | 3363 | EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep); |
d2876d08 | 3364 | |
79a9becd AC |
3365 | /** |
3366 | * gpiod_set_value_cansleep() - assign a gpio's value | |
3367 | * @desc: gpio whose value will be assigned | |
3368 | * @value: value to assign | |
3369 | * | |
3370 | * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into | |
3371 | * account | |
3372 | * | |
3373 | * This function is to be called from contexts that can sleep. | |
3374 | */ | |
3375 | void gpiod_set_value_cansleep(struct gpio_desc *desc, int value) | |
d2876d08 | 3376 | { |
d2876d08 | 3377 | might_sleep_if(extra_checks); |
fdeb8e15 | 3378 | VALIDATE_DESC_VOID(desc); |
1e77fc82 | 3379 | gpiod_set_value_nocheck(desc, value); |
372e722e | 3380 | } |
79a9becd | 3381 | EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep); |
d2876d08 | 3382 | |
5f424243 | 3383 | /** |
3fff99bc | 3384 | * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs |
b9762beb | 3385 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 3386 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 3387 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3388 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
3389 | * |
3390 | * Set the raw values of the GPIOs, i.e. the values of the physical lines | |
3391 | * without regard for their ACTIVE_LOW status. | |
3392 | * | |
3393 | * This function is to be called from contexts that can sleep. | |
3394 | */ | |
3027743f | 3395 | int gpiod_set_raw_array_value_cansleep(unsigned int array_size, |
3c940660 GU |
3396 | struct gpio_desc **desc_array, |
3397 | struct gpio_array *array_info, | |
3398 | unsigned long *value_bitmap) | |
5f424243 RI |
3399 | { |
3400 | might_sleep_if(extra_checks); | |
3401 | if (!desc_array) | |
3027743f LA |
3402 | return -EINVAL; |
3403 | return gpiod_set_array_value_complex(true, true, array_size, desc_array, | |
77588c14 | 3404 | array_info, value_bitmap); |
5f424243 | 3405 | } |
3fff99bc | 3406 | EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep); |
5f424243 | 3407 | |
3946d187 DT |
3408 | /** |
3409 | * gpiod_add_lookup_tables() - register GPIO device consumers | |
3410 | * @tables: list of tables of consumers to register | |
3411 | * @n: number of tables in the list | |
3412 | */ | |
3413 | void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n) | |
3414 | { | |
3415 | unsigned int i; | |
3416 | ||
3417 | mutex_lock(&gpio_lookup_lock); | |
3418 | ||
3419 | for (i = 0; i < n; i++) | |
3420 | list_add_tail(&tables[i]->list, &gpio_lookup_list); | |
3421 | ||
3422 | mutex_unlock(&gpio_lookup_lock); | |
3423 | } | |
3424 | ||
5f424243 | 3425 | /** |
3fff99bc | 3426 | * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs |
b9762beb | 3427 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 3428 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 3429 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3430 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
3431 | * |
3432 | * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
3433 | * into account. | |
3434 | * | |
3435 | * This function is to be called from contexts that can sleep. | |
3436 | */ | |
cf9af0d5 GU |
3437 | int gpiod_set_array_value_cansleep(unsigned int array_size, |
3438 | struct gpio_desc **desc_array, | |
3439 | struct gpio_array *array_info, | |
3440 | unsigned long *value_bitmap) | |
5f424243 RI |
3441 | { |
3442 | might_sleep_if(extra_checks); | |
3443 | if (!desc_array) | |
cf9af0d5 GU |
3444 | return -EINVAL; |
3445 | return gpiod_set_array_value_complex(false, true, array_size, | |
3446 | desc_array, array_info, | |
3447 | value_bitmap); | |
5f424243 | 3448 | } |
3fff99bc | 3449 | EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep); |
5f424243 | 3450 | |
bae48da2 | 3451 | /** |
ad824783 AC |
3452 | * gpiod_add_lookup_table() - register GPIO device consumers |
3453 | * @table: table of consumers to register | |
bae48da2 | 3454 | */ |
ad824783 | 3455 | void gpiod_add_lookup_table(struct gpiod_lookup_table *table) |
bae48da2 AC |
3456 | { |
3457 | mutex_lock(&gpio_lookup_lock); | |
3458 | ||
ad824783 | 3459 | list_add_tail(&table->list, &gpio_lookup_list); |
bae48da2 AC |
3460 | |
3461 | mutex_unlock(&gpio_lookup_lock); | |
3462 | } | |
226b2242 | 3463 | EXPORT_SYMBOL_GPL(gpiod_add_lookup_table); |
bae48da2 | 3464 | |
be9015ab SK |
3465 | /** |
3466 | * gpiod_remove_lookup_table() - unregister GPIO device consumers | |
3467 | * @table: table of consumers to unregister | |
3468 | */ | |
3469 | void gpiod_remove_lookup_table(struct gpiod_lookup_table *table) | |
3470 | { | |
d321ad12 AS |
3471 | /* Nothing to remove */ |
3472 | if (!table) | |
3473 | return; | |
3474 | ||
be9015ab SK |
3475 | mutex_lock(&gpio_lookup_lock); |
3476 | ||
3477 | list_del(&table->list); | |
3478 | ||
3479 | mutex_unlock(&gpio_lookup_lock); | |
3480 | } | |
226b2242 | 3481 | EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table); |
be9015ab | 3482 | |
a411e81e BG |
3483 | /** |
3484 | * gpiod_add_hogs() - register a set of GPIO hogs from machine code | |
3485 | * @hogs: table of gpio hog entries with a zeroed sentinel at the end | |
3486 | */ | |
3487 | void gpiod_add_hogs(struct gpiod_hog *hogs) | |
3488 | { | |
a0b66a73 | 3489 | struct gpio_chip *gc; |
a411e81e BG |
3490 | struct gpiod_hog *hog; |
3491 | ||
3492 | mutex_lock(&gpio_machine_hogs_mutex); | |
3493 | ||
3494 | for (hog = &hogs[0]; hog->chip_label; hog++) { | |
3495 | list_add_tail(&hog->list, &gpio_machine_hogs); | |
3496 | ||
3497 | /* | |
3498 | * The chip may have been registered earlier, so check if it | |
3499 | * exists and, if so, try to hog the line now. | |
3500 | */ | |
a0b66a73 LW |
3501 | gc = find_chip_by_name(hog->chip_label); |
3502 | if (gc) | |
3503 | gpiochip_machine_hog(gc, hog); | |
a411e81e BG |
3504 | } |
3505 | ||
3506 | mutex_unlock(&gpio_machine_hogs_mutex); | |
3507 | } | |
3508 | EXPORT_SYMBOL_GPL(gpiod_add_hogs); | |
3509 | ||
ad824783 | 3510 | static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev) |
bae48da2 AC |
3511 | { |
3512 | const char *dev_id = dev ? dev_name(dev) : NULL; | |
ad824783 | 3513 | struct gpiod_lookup_table *table; |
bae48da2 AC |
3514 | |
3515 | mutex_lock(&gpio_lookup_lock); | |
3516 | ||
ad824783 AC |
3517 | list_for_each_entry(table, &gpio_lookup_list, list) { |
3518 | if (table->dev_id && dev_id) { | |
3519 | /* | |
3520 | * Valid strings on both ends, must be identical to have | |
3521 | * a match | |
3522 | */ | |
3523 | if (!strcmp(table->dev_id, dev_id)) | |
3524 | goto found; | |
3525 | } else { | |
3526 | /* | |
3527 | * One of the pointers is NULL, so both must be to have | |
3528 | * a match | |
3529 | */ | |
3530 | if (dev_id == table->dev_id) | |
3531 | goto found; | |
3532 | } | |
3533 | } | |
3534 | table = NULL; | |
bae48da2 | 3535 | |
ad824783 AC |
3536 | found: |
3537 | mutex_unlock(&gpio_lookup_lock); | |
3538 | return table; | |
3539 | } | |
bae48da2 | 3540 | |
ad824783 | 3541 | static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id, |
fed7026a | 3542 | unsigned int idx, unsigned long *flags) |
ad824783 | 3543 | { |
2a3cf6a3 | 3544 | struct gpio_desc *desc = ERR_PTR(-ENOENT); |
ad824783 AC |
3545 | struct gpiod_lookup_table *table; |
3546 | struct gpiod_lookup *p; | |
bae48da2 | 3547 | |
ad824783 AC |
3548 | table = gpiod_find_lookup_table(dev); |
3549 | if (!table) | |
3550 | return desc; | |
bae48da2 | 3551 | |
4c033b54 | 3552 | for (p = &table->table[0]; p->key; p++) { |
a0b66a73 | 3553 | struct gpio_chip *gc; |
bae48da2 | 3554 | |
ad824783 | 3555 | /* idx must always match exactly */ |
bae48da2 AC |
3556 | if (p->idx != idx) |
3557 | continue; | |
3558 | ||
ad824783 AC |
3559 | /* If the lookup entry has a con_id, require exact match */ |
3560 | if (p->con_id && (!con_id || strcmp(p->con_id, con_id))) | |
3561 | continue; | |
bae48da2 | 3562 | |
4c033b54 GU |
3563 | if (p->chip_hwnum == U16_MAX) { |
3564 | desc = gpio_name_to_desc(p->key); | |
3565 | if (desc) { | |
3566 | *flags = p->flags; | |
3567 | return desc; | |
3568 | } | |
3569 | ||
3570 | dev_warn(dev, "cannot find GPIO line %s, deferring\n", | |
3571 | p->key); | |
3572 | return ERR_PTR(-EPROBE_DEFER); | |
3573 | } | |
3574 | ||
3575 | gc = find_chip_by_name(p->key); | |
bae48da2 | 3576 | |
a0b66a73 | 3577 | if (!gc) { |
8853daf3 JK |
3578 | /* |
3579 | * As the lookup table indicates a chip with | |
4c033b54 | 3580 | * p->key should exist, assume it may |
8853daf3 JK |
3581 | * still appear later and let the interested |
3582 | * consumer be probed again or let the Deferred | |
3583 | * Probe infrastructure handle the error. | |
3584 | */ | |
3585 | dev_warn(dev, "cannot find GPIO chip %s, deferring\n", | |
4c033b54 | 3586 | p->key); |
8853daf3 | 3587 | return ERR_PTR(-EPROBE_DEFER); |
ad824783 | 3588 | } |
bae48da2 | 3589 | |
a0b66a73 | 3590 | if (gc->ngpio <= p->chip_hwnum) { |
2a3cf6a3 | 3591 | dev_err(dev, |
d935bd50 | 3592 | "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n", |
a0b66a73 LW |
3593 | idx, p->chip_hwnum, gc->ngpio - 1, |
3594 | gc->label); | |
2a3cf6a3 | 3595 | return ERR_PTR(-EINVAL); |
bae48da2 | 3596 | } |
bae48da2 | 3597 | |
a0b66a73 | 3598 | desc = gpiochip_get_desc(gc, p->chip_hwnum); |
ad824783 | 3599 | *flags = p->flags; |
bae48da2 | 3600 | |
2a3cf6a3 | 3601 | return desc; |
bae48da2 AC |
3602 | } |
3603 | ||
bae48da2 AC |
3604 | return desc; |
3605 | } | |
3606 | ||
66858527 RI |
3607 | static int platform_gpio_count(struct device *dev, const char *con_id) |
3608 | { | |
3609 | struct gpiod_lookup_table *table; | |
3610 | struct gpiod_lookup *p; | |
3611 | unsigned int count = 0; | |
3612 | ||
3613 | table = gpiod_find_lookup_table(dev); | |
3614 | if (!table) | |
3615 | return -ENOENT; | |
3616 | ||
4c033b54 | 3617 | for (p = &table->table[0]; p->key; p++) { |
66858527 RI |
3618 | if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) || |
3619 | (!con_id && !p->con_id)) | |
3620 | count++; | |
3621 | } | |
3622 | if (!count) | |
3623 | return -ENOENT; | |
3624 | ||
3625 | return count; | |
3626 | } | |
3627 | ||
13949fa9 DT |
3628 | /** |
3629 | * fwnode_gpiod_get_index - obtain a GPIO from firmware node | |
3630 | * @fwnode: handle of the firmware node | |
3631 | * @con_id: function within the GPIO consumer | |
3632 | * @index: index of the GPIO to obtain for the consumer | |
3633 | * @flags: GPIO initialization flags | |
3634 | * @label: label to attach to the requested GPIO | |
3635 | * | |
3636 | * This function can be used for drivers that get their configuration | |
3637 | * from opaque firmware. | |
3638 | * | |
3639 | * The function properly finds the corresponding GPIO using whatever is the | |
3640 | * underlying firmware interface and then makes sure that the GPIO | |
3641 | * descriptor is requested before it is returned to the caller. | |
3642 | * | |
3643 | * Returns: | |
3644 | * On successful request the GPIO pin is configured in accordance with | |
3645 | * provided @flags. | |
3646 | * | |
3647 | * In case of error an ERR_PTR() is returned. | |
3648 | */ | |
3649 | struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode, | |
3650 | const char *con_id, int index, | |
3651 | enum gpiod_flags flags, | |
3652 | const char *label) | |
3653 | { | |
3654 | struct gpio_desc *desc; | |
3655 | char prop_name[32]; /* 32 is max size of property name */ | |
3656 | unsigned int i; | |
3657 | ||
3658 | for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) { | |
3659 | if (con_id) | |
3660 | snprintf(prop_name, sizeof(prop_name), "%s-%s", | |
3661 | con_id, gpio_suffixes[i]); | |
3662 | else | |
3663 | snprintf(prop_name, sizeof(prop_name), "%s", | |
3664 | gpio_suffixes[i]); | |
3665 | ||
3666 | desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags, | |
3667 | label); | |
7b58696d | 3668 | if (!gpiod_not_found(desc)) |
13949fa9 DT |
3669 | break; |
3670 | } | |
3671 | ||
3672 | return desc; | |
3673 | } | |
3674 | EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index); | |
3675 | ||
66858527 RI |
3676 | /** |
3677 | * gpiod_count - return the number of GPIOs associated with a device / function | |
3678 | * or -ENOENT if no GPIO has been assigned to the requested function | |
3679 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
3680 | * @con_id: function within the GPIO consumer | |
3681 | */ | |
3682 | int gpiod_count(struct device *dev, const char *con_id) | |
3683 | { | |
3684 | int count = -ENOENT; | |
3685 | ||
3686 | if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node) | |
f626d6df | 3687 | count = of_gpio_get_count(dev, con_id); |
66858527 RI |
3688 | else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev)) |
3689 | count = acpi_gpio_count(dev, con_id); | |
3690 | ||
3691 | if (count < 0) | |
3692 | count = platform_gpio_count(dev, con_id); | |
3693 | ||
3694 | return count; | |
3695 | } | |
3696 | EXPORT_SYMBOL_GPL(gpiod_count); | |
3697 | ||
bae48da2 | 3698 | /** |
0879162f | 3699 | * gpiod_get - obtain a GPIO for a given GPIO function |
ad824783 | 3700 | * @dev: GPIO consumer, can be NULL for system-global GPIOs |
bae48da2 | 3701 | * @con_id: function within the GPIO consumer |
39b2bbe3 | 3702 | * @flags: optional GPIO initialization flags |
bae48da2 AC |
3703 | * |
3704 | * Return the GPIO descriptor corresponding to the function con_id of device | |
2a3cf6a3 | 3705 | * dev, -ENOENT if no GPIO has been assigned to the requested function, or |
20a8a968 | 3706 | * another IS_ERR() code if an error occurred while trying to acquire the GPIO. |
bae48da2 | 3707 | */ |
b17d1bf1 | 3708 | struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id, |
39b2bbe3 | 3709 | enum gpiod_flags flags) |
bae48da2 | 3710 | { |
39b2bbe3 | 3711 | return gpiod_get_index(dev, con_id, 0, flags); |
bae48da2 | 3712 | } |
b17d1bf1 | 3713 | EXPORT_SYMBOL_GPL(gpiod_get); |
bae48da2 | 3714 | |
29a1f233 TR |
3715 | /** |
3716 | * gpiod_get_optional - obtain an optional GPIO for a given GPIO function | |
3717 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
3718 | * @con_id: function within the GPIO consumer | |
39b2bbe3 | 3719 | * @flags: optional GPIO initialization flags |
29a1f233 TR |
3720 | * |
3721 | * This is equivalent to gpiod_get(), except that when no GPIO was assigned to | |
3722 | * the requested function it will return NULL. This is convenient for drivers | |
3723 | * that need to handle optional GPIOs. | |
3724 | */ | |
b17d1bf1 | 3725 | struct gpio_desc *__must_check gpiod_get_optional(struct device *dev, |
39b2bbe3 AC |
3726 | const char *con_id, |
3727 | enum gpiod_flags flags) | |
29a1f233 | 3728 | { |
39b2bbe3 | 3729 | return gpiod_get_index_optional(dev, con_id, 0, flags); |
29a1f233 | 3730 | } |
b17d1bf1 | 3731 | EXPORT_SYMBOL_GPL(gpiod_get_optional); |
29a1f233 | 3732 | |
f625d460 BP |
3733 | |
3734 | /** | |
3735 | * gpiod_configure_flags - helper function to configure a given GPIO | |
3736 | * @desc: gpio whose value will be assigned | |
3737 | * @con_id: function within the GPIO consumer | |
fed7026a AS |
3738 | * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from |
3739 | * of_find_gpio() or of_get_gpio_hog() | |
f625d460 BP |
3740 | * @dflags: gpiod_flags - optional GPIO initialization flags |
3741 | * | |
3742 | * Return 0 on success, -ENOENT if no GPIO has been assigned to the | |
3743 | * requested function and/or index, or another IS_ERR() code if an error | |
3744 | * occurred while trying to acquire the GPIO. | |
3745 | */ | |
c29fd9eb | 3746 | int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id, |
85b03b30 | 3747 | unsigned long lflags, enum gpiod_flags dflags) |
f625d460 | 3748 | { |
d377f56f | 3749 | int ret; |
f625d460 | 3750 | |
85b03b30 JH |
3751 | if (lflags & GPIO_ACTIVE_LOW) |
3752 | set_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
f926dfc1 | 3753 | |
85b03b30 JH |
3754 | if (lflags & GPIO_OPEN_DRAIN) |
3755 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | |
f926dfc1 LW |
3756 | else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) { |
3757 | /* | |
3758 | * This enforces open drain mode from the consumer side. | |
3759 | * This is necessary for some busses like I2C, but the lookup | |
3760 | * should *REALLY* have specified them as open drain in the | |
3761 | * first place, so print a little warning here. | |
3762 | */ | |
3763 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | |
3764 | gpiod_warn(desc, | |
3765 | "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n"); | |
3766 | } | |
3767 | ||
85b03b30 JH |
3768 | if (lflags & GPIO_OPEN_SOURCE) |
3769 | set_bit(FLAG_OPEN_SOURCE, &desc->flags); | |
e10f72bf | 3770 | |
d449991c TP |
3771 | if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) { |
3772 | gpiod_err(desc, | |
3773 | "both pull-up and pull-down enabled, invalid configuration\n"); | |
3774 | return -EINVAL; | |
3775 | } | |
3776 | ||
3777 | if (lflags & GPIO_PULL_UP) | |
3778 | set_bit(FLAG_PULL_UP, &desc->flags); | |
3779 | else if (lflags & GPIO_PULL_DOWN) | |
3780 | set_bit(FLAG_PULL_DOWN, &desc->flags); | |
3781 | ||
d377f56f LW |
3782 | ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY)); |
3783 | if (ret < 0) | |
3784 | return ret; | |
85b03b30 | 3785 | |
f625d460 BP |
3786 | /* No particular flag request, return here... */ |
3787 | if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) { | |
262b9011 | 3788 | gpiod_dbg(desc, "no flags found for %s\n", con_id); |
f625d460 BP |
3789 | return 0; |
3790 | } | |
3791 | ||
3792 | /* Process flags */ | |
3793 | if (dflags & GPIOD_FLAGS_BIT_DIR_OUT) | |
d377f56f | 3794 | ret = gpiod_direction_output(desc, |
ad17731d | 3795 | !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL)); |
f625d460 | 3796 | else |
d377f56f | 3797 | ret = gpiod_direction_input(desc); |
f625d460 | 3798 | |
d377f56f | 3799 | return ret; |
f625d460 BP |
3800 | } |
3801 | ||
bae48da2 AC |
3802 | /** |
3803 | * gpiod_get_index - obtain a GPIO from a multi-index GPIO function | |
fdd6a5fe | 3804 | * @dev: GPIO consumer, can be NULL for system-global GPIOs |
bae48da2 AC |
3805 | * @con_id: function within the GPIO consumer |
3806 | * @idx: index of the GPIO to obtain in the consumer | |
39b2bbe3 | 3807 | * @flags: optional GPIO initialization flags |
bae48da2 AC |
3808 | * |
3809 | * This variant of gpiod_get() allows to access GPIOs other than the first | |
3810 | * defined one for functions that define several GPIOs. | |
3811 | * | |
2a3cf6a3 AC |
3812 | * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the |
3813 | * requested function and/or index, or another IS_ERR() code if an error | |
20a8a968 | 3814 | * occurred while trying to acquire the GPIO. |
bae48da2 | 3815 | */ |
b17d1bf1 | 3816 | struct gpio_desc *__must_check gpiod_get_index(struct device *dev, |
bae48da2 | 3817 | const char *con_id, |
39b2bbe3 AC |
3818 | unsigned int idx, |
3819 | enum gpiod_flags flags) | |
bae48da2 | 3820 | { |
2d6c06f5 | 3821 | unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT; |
35c5d7fd | 3822 | struct gpio_desc *desc = NULL; |
d377f56f | 3823 | int ret; |
7d18f0a1 LW |
3824 | /* Maybe we have a device name, maybe not */ |
3825 | const char *devname = dev ? dev_name(dev) : "?"; | |
bae48da2 AC |
3826 | |
3827 | dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id); | |
3828 | ||
4d8440b9 RW |
3829 | if (dev) { |
3830 | /* Using device tree? */ | |
3831 | if (IS_ENABLED(CONFIG_OF) && dev->of_node) { | |
3832 | dev_dbg(dev, "using device tree for GPIO lookup\n"); | |
3833 | desc = of_find_gpio(dev, con_id, idx, &lookupflags); | |
3834 | } else if (ACPI_COMPANION(dev)) { | |
3835 | dev_dbg(dev, "using ACPI for GPIO lookup\n"); | |
a31f5c3a | 3836 | desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags); |
4d8440b9 | 3837 | } |
35c5d7fd AC |
3838 | } |
3839 | ||
3840 | /* | |
3841 | * Either we are not using DT or ACPI, or their lookup did not return | |
3842 | * a result. In that case, use platform lookup as a fallback. | |
3843 | */ | |
7b58696d | 3844 | if (!desc || gpiod_not_found(desc)) { |
43a8785a | 3845 | dev_dbg(dev, "using lookup tables for GPIO lookup\n"); |
39b2bbe3 | 3846 | desc = gpiod_find(dev, con_id, idx, &lookupflags); |
bae48da2 AC |
3847 | } |
3848 | ||
3849 | if (IS_ERR(desc)) { | |
9d5a1f2c | 3850 | dev_dbg(dev, "No GPIO consumer %s found\n", con_id); |
bae48da2 AC |
3851 | return desc; |
3852 | } | |
3853 | ||
7d18f0a1 LW |
3854 | /* |
3855 | * If a connection label was passed use that, else attempt to use | |
3856 | * the device name as label | |
3857 | */ | |
d377f56f | 3858 | ret = gpiod_request(desc, con_id ? con_id : devname); |
8bbff39c | 3859 | if (ret) { |
d377f56f | 3860 | if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) { |
b0ce7b29 LW |
3861 | /* |
3862 | * This happens when there are several consumers for | |
3863 | * the same GPIO line: we just return here without | |
3864 | * further initialization. It is a bit if a hack. | |
3865 | * This is necessary to support fixed regulators. | |
3866 | * | |
3867 | * FIXME: Make this more sane and safe. | |
3868 | */ | |
3869 | dev_info(dev, "nonexclusive access to GPIO for %s\n", | |
3870 | con_id ? con_id : devname); | |
3871 | return desc; | |
3872 | } else { | |
d377f56f | 3873 | return ERR_PTR(ret); |
b0ce7b29 LW |
3874 | } |
3875 | } | |
bae48da2 | 3876 | |
d377f56f | 3877 | ret = gpiod_configure_flags(desc, con_id, lookupflags, flags); |
6392cca4 | 3878 | if (ret < 0) { |
39b2bbe3 | 3879 | dev_dbg(dev, "setup of GPIO %s failed\n", con_id); |
6392cca4 LW |
3880 | gpiod_put(desc); |
3881 | return ERR_PTR(ret); | |
3882 | } | |
3883 | ||
6accc376 KG |
3884 | blocking_notifier_call_chain(&desc->gdev->notifier, |
3885 | GPIOLINE_CHANGED_REQUESTED, desc); | |
9fefca77 | 3886 | |
6392cca4 LW |
3887 | return desc; |
3888 | } | |
b17d1bf1 | 3889 | EXPORT_SYMBOL_GPL(gpiod_get_index); |
6392cca4 | 3890 | |
40b73183 MW |
3891 | /** |
3892 | * fwnode_get_named_gpiod - obtain a GPIO from firmware node | |
3893 | * @fwnode: handle of the firmware node | |
3894 | * @propname: name of the firmware property representing the GPIO | |
6392cca4 | 3895 | * @index: index of the GPIO to obtain for the consumer |
a264d10f | 3896 | * @dflags: GPIO initialization flags |
950d55f5 | 3897 | * @label: label to attach to the requested GPIO |
40b73183 MW |
3898 | * |
3899 | * This function can be used for drivers that get their configuration | |
6392cca4 | 3900 | * from opaque firmware. |
40b73183 | 3901 | * |
6392cca4 | 3902 | * The function properly finds the corresponding GPIO using whatever is the |
40b73183 MW |
3903 | * underlying firmware interface and then makes sure that the GPIO |
3904 | * descriptor is requested before it is returned to the caller. | |
3905 | * | |
950d55f5 | 3906 | * Returns: |
ff21378a | 3907 | * On successful request the GPIO pin is configured in accordance with |
a264d10f AS |
3908 | * provided @dflags. |
3909 | * | |
40b73183 MW |
3910 | * In case of error an ERR_PTR() is returned. |
3911 | */ | |
3912 | struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode, | |
537b94da | 3913 | const char *propname, int index, |
b2987d74 AS |
3914 | enum gpiod_flags dflags, |
3915 | const char *label) | |
40b73183 | 3916 | { |
2d6c06f5 | 3917 | unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT; |
40b73183 | 3918 | struct gpio_desc *desc = ERR_PTR(-ENODEV); |
40b73183 MW |
3919 | int ret; |
3920 | ||
3921 | if (!fwnode) | |
3922 | return ERR_PTR(-EINVAL); | |
3923 | ||
3924 | if (is_of_node(fwnode)) { | |
6392cca4 LW |
3925 | desc = gpiod_get_from_of_node(to_of_node(fwnode), |
3926 | propname, index, | |
3927 | dflags, | |
3928 | label); | |
3929 | return desc; | |
40b73183 MW |
3930 | } else if (is_acpi_node(fwnode)) { |
3931 | struct acpi_gpio_info info; | |
3932 | ||
537b94da | 3933 | desc = acpi_node_get_gpiod(fwnode, propname, index, &info); |
6392cca4 LW |
3934 | if (IS_ERR(desc)) |
3935 | return desc; | |
40b73183 | 3936 | |
6392cca4 | 3937 | acpi_gpio_update_gpiod_flags(&dflags, &info); |
606be344 | 3938 | acpi_gpio_update_gpiod_lookup_flags(&lflags, &info); |
6392cca4 | 3939 | } |
40b73183 | 3940 | |
6392cca4 | 3941 | /* Currently only ACPI takes this path */ |
b2987d74 | 3942 | ret = gpiod_request(desc, label); |
85b03b30 JH |
3943 | if (ret) |
3944 | return ERR_PTR(ret); | |
3945 | ||
a264d10f AS |
3946 | ret = gpiod_configure_flags(desc, propname, lflags, dflags); |
3947 | if (ret < 0) { | |
3948 | gpiod_put(desc); | |
3949 | return ERR_PTR(ret); | |
90b665f6 LP |
3950 | } |
3951 | ||
6accc376 KG |
3952 | blocking_notifier_call_chain(&desc->gdev->notifier, |
3953 | GPIOLINE_CHANGED_REQUESTED, desc); | |
9fefca77 | 3954 | |
40b73183 MW |
3955 | return desc; |
3956 | } | |
3957 | EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod); | |
3958 | ||
29a1f233 TR |
3959 | /** |
3960 | * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO | |
3961 | * function | |
3962 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
3963 | * @con_id: function within the GPIO consumer | |
3964 | * @index: index of the GPIO to obtain in the consumer | |
39b2bbe3 | 3965 | * @flags: optional GPIO initialization flags |
29a1f233 TR |
3966 | * |
3967 | * This is equivalent to gpiod_get_index(), except that when no GPIO with the | |
3968 | * specified index was assigned to the requested function it will return NULL. | |
3969 | * This is convenient for drivers that need to handle optional GPIOs. | |
3970 | */ | |
b17d1bf1 | 3971 | struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev, |
29a1f233 | 3972 | const char *con_id, |
39b2bbe3 AC |
3973 | unsigned int index, |
3974 | enum gpiod_flags flags) | |
29a1f233 TR |
3975 | { |
3976 | struct gpio_desc *desc; | |
3977 | ||
39b2bbe3 | 3978 | desc = gpiod_get_index(dev, con_id, index, flags); |
7b58696d AS |
3979 | if (gpiod_not_found(desc)) |
3980 | return NULL; | |
29a1f233 TR |
3981 | |
3982 | return desc; | |
3983 | } | |
b17d1bf1 | 3984 | EXPORT_SYMBOL_GPL(gpiod_get_index_optional); |
29a1f233 | 3985 | |
f625d460 BP |
3986 | /** |
3987 | * gpiod_hog - Hog the specified GPIO desc given the provided flags | |
3988 | * @desc: gpio whose value will be assigned | |
3989 | * @name: gpio line name | |
fed7026a AS |
3990 | * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from |
3991 | * of_find_gpio() or of_get_gpio_hog() | |
f625d460 BP |
3992 | * @dflags: gpiod_flags - optional GPIO initialization flags |
3993 | */ | |
3994 | int gpiod_hog(struct gpio_desc *desc, const char *name, | |
3995 | unsigned long lflags, enum gpiod_flags dflags) | |
3996 | { | |
a0b66a73 | 3997 | struct gpio_chip *gc; |
f625d460 BP |
3998 | struct gpio_desc *local_desc; |
3999 | int hwnum; | |
d377f56f | 4000 | int ret; |
f625d460 | 4001 | |
a0b66a73 | 4002 | gc = gpiod_to_chip(desc); |
f625d460 BP |
4003 | hwnum = gpio_chip_hwgpio(desc); |
4004 | ||
a0b66a73 | 4005 | local_desc = gpiochip_request_own_desc(gc, hwnum, name, |
5923ea6c | 4006 | lflags, dflags); |
f625d460 | 4007 | if (IS_ERR(local_desc)) { |
d377f56f | 4008 | ret = PTR_ERR(local_desc); |
c31a571d | 4009 | pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n", |
a0b66a73 | 4010 | name, gc->label, hwnum, ret); |
d377f56f | 4011 | return ret; |
f625d460 BP |
4012 | } |
4013 | ||
f625d460 BP |
4014 | /* Mark GPIO as hogged so it can be identified and removed later */ |
4015 | set_bit(FLAG_IS_HOGGED, &desc->flags); | |
4016 | ||
262b9011 | 4017 | gpiod_info(desc, "hogged as %s%s\n", |
b27f300f BG |
4018 | (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input", |
4019 | (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? | |
4020 | (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : ""); | |
f625d460 BP |
4021 | |
4022 | return 0; | |
4023 | } | |
4024 | ||
4025 | /** | |
4026 | * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog | |
a0b66a73 | 4027 | * @gc: gpio chip to act on |
f625d460 | 4028 | */ |
a0b66a73 | 4029 | static void gpiochip_free_hogs(struct gpio_chip *gc) |
f625d460 BP |
4030 | { |
4031 | int id; | |
4032 | ||
a0b66a73 LW |
4033 | for (id = 0; id < gc->ngpio; id++) { |
4034 | if (test_bit(FLAG_IS_HOGGED, &gc->gpiodev->descs[id].flags)) | |
4035 | gpiochip_free_own_desc(&gc->gpiodev->descs[id]); | |
f625d460 BP |
4036 | } |
4037 | } | |
4038 | ||
66858527 RI |
4039 | /** |
4040 | * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function | |
4041 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4042 | * @con_id: function within the GPIO consumer | |
4043 | * @flags: optional GPIO initialization flags | |
4044 | * | |
4045 | * This function acquires all the GPIOs defined under a given function. | |
4046 | * | |
4047 | * Return a struct gpio_descs containing an array of descriptors, -ENOENT if | |
4048 | * no GPIO has been assigned to the requested function, or another IS_ERR() | |
4049 | * code if an error occurred while trying to acquire the GPIOs. | |
4050 | */ | |
4051 | struct gpio_descs *__must_check gpiod_get_array(struct device *dev, | |
4052 | const char *con_id, | |
4053 | enum gpiod_flags flags) | |
4054 | { | |
4055 | struct gpio_desc *desc; | |
4056 | struct gpio_descs *descs; | |
bf9346f5 | 4057 | struct gpio_array *array_info = NULL; |
a0b66a73 | 4058 | struct gpio_chip *gc; |
bf9346f5 | 4059 | int count, bitmap_size; |
66858527 RI |
4060 | |
4061 | count = gpiod_count(dev, con_id); | |
4062 | if (count < 0) | |
4063 | return ERR_PTR(count); | |
4064 | ||
acafe7e3 | 4065 | descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL); |
66858527 RI |
4066 | if (!descs) |
4067 | return ERR_PTR(-ENOMEM); | |
4068 | ||
4069 | for (descs->ndescs = 0; descs->ndescs < count; ) { | |
4070 | desc = gpiod_get_index(dev, con_id, descs->ndescs, flags); | |
4071 | if (IS_ERR(desc)) { | |
4072 | gpiod_put_array(descs); | |
4073 | return ERR_CAST(desc); | |
4074 | } | |
bf9346f5 | 4075 | |
66858527 | 4076 | descs->desc[descs->ndescs] = desc; |
bf9346f5 | 4077 | |
a0b66a73 | 4078 | gc = gpiod_to_chip(desc); |
bf9346f5 | 4079 | /* |
c4c958aa JK |
4080 | * If pin hardware number of array member 0 is also 0, select |
4081 | * its chip as a candidate for fast bitmap processing path. | |
bf9346f5 | 4082 | */ |
c4c958aa | 4083 | if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) { |
bf9346f5 JK |
4084 | struct gpio_descs *array; |
4085 | ||
a0b66a73 LW |
4086 | bitmap_size = BITS_TO_LONGS(gc->ngpio > count ? |
4087 | gc->ngpio : count); | |
bf9346f5 JK |
4088 | |
4089 | array = kzalloc(struct_size(descs, desc, count) + | |
4090 | struct_size(array_info, invert_mask, | |
4091 | 3 * bitmap_size), GFP_KERNEL); | |
4092 | if (!array) { | |
4093 | gpiod_put_array(descs); | |
4094 | return ERR_PTR(-ENOMEM); | |
4095 | } | |
4096 | ||
4097 | memcpy(array, descs, | |
4098 | struct_size(descs, desc, descs->ndescs + 1)); | |
4099 | kfree(descs); | |
4100 | ||
4101 | descs = array; | |
4102 | array_info = (void *)(descs->desc + count); | |
4103 | array_info->get_mask = array_info->invert_mask + | |
4104 | bitmap_size; | |
4105 | array_info->set_mask = array_info->get_mask + | |
4106 | bitmap_size; | |
4107 | ||
4108 | array_info->desc = descs->desc; | |
4109 | array_info->size = count; | |
a0b66a73 | 4110 | array_info->chip = gc; |
bf9346f5 JK |
4111 | bitmap_set(array_info->get_mask, descs->ndescs, |
4112 | count - descs->ndescs); | |
4113 | bitmap_set(array_info->set_mask, descs->ndescs, | |
4114 | count - descs->ndescs); | |
4115 | descs->info = array_info; | |
4116 | } | |
c4c958aa | 4117 | /* Unmark array members which don't belong to the 'fast' chip */ |
a0b66a73 | 4118 | if (array_info && array_info->chip != gc) { |
bf9346f5 JK |
4119 | __clear_bit(descs->ndescs, array_info->get_mask); |
4120 | __clear_bit(descs->ndescs, array_info->set_mask); | |
c4c958aa JK |
4121 | } |
4122 | /* | |
4123 | * Detect array members which belong to the 'fast' chip | |
4124 | * but their pins are not in hardware order. | |
4125 | */ | |
4126 | else if (array_info && | |
4127 | gpio_chip_hwgpio(desc) != descs->ndescs) { | |
4128 | /* | |
4129 | * Don't use fast path if all array members processed so | |
4130 | * far belong to the same chip as this one but its pin | |
4131 | * hardware number is different from its array index. | |
4132 | */ | |
4133 | if (bitmap_full(array_info->get_mask, descs->ndescs)) { | |
4134 | array_info = NULL; | |
4135 | } else { | |
4136 | __clear_bit(descs->ndescs, | |
4137 | array_info->get_mask); | |
4138 | __clear_bit(descs->ndescs, | |
4139 | array_info->set_mask); | |
4140 | } | |
bf9346f5 JK |
4141 | } else if (array_info) { |
4142 | /* Exclude open drain or open source from fast output */ | |
a0b66a73 LW |
4143 | if (gpiochip_line_is_open_drain(gc, descs->ndescs) || |
4144 | gpiochip_line_is_open_source(gc, descs->ndescs)) | |
bf9346f5 JK |
4145 | __clear_bit(descs->ndescs, |
4146 | array_info->set_mask); | |
4147 | /* Identify 'fast' pins which require invertion */ | |
4148 | if (gpiod_is_active_low(desc)) | |
4149 | __set_bit(descs->ndescs, | |
4150 | array_info->invert_mask); | |
4151 | } | |
4152 | ||
66858527 RI |
4153 | descs->ndescs++; |
4154 | } | |
bf9346f5 JK |
4155 | if (array_info) |
4156 | dev_dbg(dev, | |
4157 | "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n", | |
4158 | array_info->chip->label, array_info->size, | |
4159 | *array_info->get_mask, *array_info->set_mask, | |
4160 | *array_info->invert_mask); | |
66858527 RI |
4161 | return descs; |
4162 | } | |
4163 | EXPORT_SYMBOL_GPL(gpiod_get_array); | |
4164 | ||
4165 | /** | |
4166 | * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO | |
4167 | * function | |
4168 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4169 | * @con_id: function within the GPIO consumer | |
4170 | * @flags: optional GPIO initialization flags | |
4171 | * | |
4172 | * This is equivalent to gpiod_get_array(), except that when no GPIO was | |
4173 | * assigned to the requested function it will return NULL. | |
4174 | */ | |
4175 | struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev, | |
4176 | const char *con_id, | |
4177 | enum gpiod_flags flags) | |
4178 | { | |
4179 | struct gpio_descs *descs; | |
4180 | ||
4181 | descs = gpiod_get_array(dev, con_id, flags); | |
7b58696d | 4182 | if (gpiod_not_found(descs)) |
66858527 RI |
4183 | return NULL; |
4184 | ||
4185 | return descs; | |
4186 | } | |
4187 | EXPORT_SYMBOL_GPL(gpiod_get_array_optional); | |
4188 | ||
bae48da2 AC |
4189 | /** |
4190 | * gpiod_put - dispose of a GPIO descriptor | |
4191 | * @desc: GPIO descriptor to dispose of | |
4192 | * | |
4193 | * No descriptor can be used after gpiod_put() has been called on it. | |
4194 | */ | |
4195 | void gpiod_put(struct gpio_desc *desc) | |
4196 | { | |
1d7765ba AS |
4197 | if (desc) |
4198 | gpiod_free(desc); | |
372e722e | 4199 | } |
bae48da2 | 4200 | EXPORT_SYMBOL_GPL(gpiod_put); |
d2876d08 | 4201 | |
66858527 RI |
4202 | /** |
4203 | * gpiod_put_array - dispose of multiple GPIO descriptors | |
4204 | * @descs: struct gpio_descs containing an array of descriptors | |
4205 | */ | |
4206 | void gpiod_put_array(struct gpio_descs *descs) | |
4207 | { | |
4208 | unsigned int i; | |
4209 | ||
4210 | for (i = 0; i < descs->ndescs; i++) | |
4211 | gpiod_put(descs->desc[i]); | |
4212 | ||
4213 | kfree(descs); | |
4214 | } | |
4215 | EXPORT_SYMBOL_GPL(gpiod_put_array); | |
4216 | ||
ced2af41 SK |
4217 | |
4218 | static int gpio_bus_match(struct device *dev, struct device_driver *drv) | |
4219 | { | |
4220 | /* | |
4221 | * Only match if the fwnode doesn't already have a proper struct device | |
4222 | * created for it. | |
4223 | */ | |
4224 | if (dev->fwnode && dev->fwnode->dev != dev) | |
4225 | return 0; | |
4226 | return 1; | |
4227 | } | |
4228 | ||
4731210c SK |
4229 | static int gpio_stub_drv_probe(struct device *dev) |
4230 | { | |
4231 | /* | |
4232 | * The DT node of some GPIO chips have a "compatible" property, but | |
4233 | * never have a struct device added and probed by a driver to register | |
4234 | * the GPIO chip with gpiolib. In such cases, fw_devlink=on will cause | |
4235 | * the consumers of the GPIO chip to get probe deferred forever because | |
4236 | * they will be waiting for a device associated with the GPIO chip | |
4237 | * firmware node to get added and bound to a driver. | |
4238 | * | |
4239 | * To allow these consumers to probe, we associate the struct | |
4240 | * gpio_device of the GPIO chip with the firmware node and then simply | |
4241 | * bind it to this stub driver. | |
4242 | */ | |
4243 | return 0; | |
4244 | } | |
4245 | ||
4246 | static struct device_driver gpio_stub_drv = { | |
4247 | .name = "gpio_stub_drv", | |
4248 | .bus = &gpio_bus_type, | |
4249 | .probe = gpio_stub_drv_probe, | |
4250 | }; | |
4251 | ||
3c702e99 LW |
4252 | static int __init gpiolib_dev_init(void) |
4253 | { | |
4254 | int ret; | |
4255 | ||
4256 | /* Register GPIO sysfs bus */ | |
b1911710 | 4257 | ret = bus_register(&gpio_bus_type); |
3c702e99 LW |
4258 | if (ret < 0) { |
4259 | pr_err("gpiolib: could not register GPIO bus type\n"); | |
4260 | return ret; | |
4261 | } | |
4262 | ||
4731210c SK |
4263 | if (driver_register(&gpio_stub_drv) < 0) { |
4264 | pr_err("gpiolib: could not register GPIO stub driver\n"); | |
4265 | bus_unregister(&gpio_bus_type); | |
4266 | return ret; | |
4267 | } | |
4268 | ||
ddd8891e | 4269 | ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME); |
3c702e99 LW |
4270 | if (ret < 0) { |
4271 | pr_err("gpiolib: failed to allocate char dev region\n"); | |
4731210c | 4272 | driver_unregister(&gpio_stub_drv); |
3c702e99 | 4273 | bus_unregister(&gpio_bus_type); |
63636d95 | 4274 | return ret; |
3c702e99 | 4275 | } |
63636d95 GU |
4276 | |
4277 | gpiolib_initialized = true; | |
4278 | gpiochip_setup_devs(); | |
4279 | ||
8650b609 DG |
4280 | #if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO) |
4281 | WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier)); | |
4282 | #endif /* CONFIG_OF_DYNAMIC && CONFIG_OF_GPIO */ | |
63636d95 | 4283 | |
3c702e99 LW |
4284 | return ret; |
4285 | } | |
4286 | core_initcall(gpiolib_dev_init); | |
4287 | ||
d2876d08 DB |
4288 | #ifdef CONFIG_DEBUG_FS |
4289 | ||
fdeb8e15 | 4290 | static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev) |
d2876d08 DB |
4291 | { |
4292 | unsigned i; | |
a0b66a73 | 4293 | struct gpio_chip *gc = gdev->chip; |
fdeb8e15 LW |
4294 | unsigned gpio = gdev->base; |
4295 | struct gpio_desc *gdesc = &gdev->descs[0]; | |
90fd2270 LW |
4296 | bool is_out; |
4297 | bool is_irq; | |
4298 | bool active_low; | |
d2876d08 | 4299 | |
fdeb8e15 | 4300 | for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) { |
ced433e2 MP |
4301 | if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) { |
4302 | if (gdesc->name) { | |
4303 | seq_printf(s, " gpio-%-3d (%-20.20s)\n", | |
4304 | gpio, gdesc->name); | |
4305 | } | |
d2876d08 | 4306 | continue; |
ced433e2 | 4307 | } |
d2876d08 | 4308 | |
372e722e | 4309 | gpiod_get_direction(gdesc); |
d2876d08 | 4310 | is_out = test_bit(FLAG_IS_OUT, &gdesc->flags); |
d468bf9e | 4311 | is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags); |
90fd2270 LW |
4312 | active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags); |
4313 | seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s", | |
ced433e2 | 4314 | gpio, gdesc->name ? gdesc->name : "", gdesc->label, |
d2876d08 | 4315 | is_out ? "out" : "in ", |
a0b66a73 | 4316 | gc->get ? (gc->get(gc, i) ? "hi" : "lo") : "? ", |
90fd2270 LW |
4317 | is_irq ? "IRQ " : "", |
4318 | active_low ? "ACTIVE LOW" : ""); | |
d2876d08 DB |
4319 | seq_printf(s, "\n"); |
4320 | } | |
4321 | } | |
4322 | ||
f9c4a31f | 4323 | static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos) |
d2876d08 | 4324 | { |
362432ae | 4325 | unsigned long flags; |
ff2b1359 | 4326 | struct gpio_device *gdev = NULL; |
cb1650d4 | 4327 | loff_t index = *pos; |
d2876d08 | 4328 | |
f9c4a31f | 4329 | s->private = ""; |
d2876d08 | 4330 | |
362432ae | 4331 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 4332 | list_for_each_entry(gdev, &gpio_devices, list) |
362432ae GL |
4333 | if (index-- == 0) { |
4334 | spin_unlock_irqrestore(&gpio_lock, flags); | |
ff2b1359 | 4335 | return gdev; |
f9c4a31f | 4336 | } |
362432ae | 4337 | spin_unlock_irqrestore(&gpio_lock, flags); |
f9c4a31f | 4338 | |
cb1650d4 | 4339 | return NULL; |
f9c4a31f TR |
4340 | } |
4341 | ||
4342 | static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos) | |
4343 | { | |
362432ae | 4344 | unsigned long flags; |
ff2b1359 | 4345 | struct gpio_device *gdev = v; |
f9c4a31f TR |
4346 | void *ret = NULL; |
4347 | ||
362432ae | 4348 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 4349 | if (list_is_last(&gdev->list, &gpio_devices)) |
cb1650d4 AC |
4350 | ret = NULL; |
4351 | else | |
ff2b1359 | 4352 | ret = list_entry(gdev->list.next, struct gpio_device, list); |
362432ae | 4353 | spin_unlock_irqrestore(&gpio_lock, flags); |
f9c4a31f TR |
4354 | |
4355 | s->private = "\n"; | |
4356 | ++*pos; | |
4357 | ||
4358 | return ret; | |
4359 | } | |
4360 | ||
4361 | static void gpiolib_seq_stop(struct seq_file *s, void *v) | |
4362 | { | |
4363 | } | |
4364 | ||
4365 | static int gpiolib_seq_show(struct seq_file *s, void *v) | |
4366 | { | |
ff2b1359 | 4367 | struct gpio_device *gdev = v; |
a0b66a73 | 4368 | struct gpio_chip *gc = gdev->chip; |
ff2b1359 LW |
4369 | struct device *parent; |
4370 | ||
a0b66a73 | 4371 | if (!gc) { |
ff2b1359 LW |
4372 | seq_printf(s, "%s%s: (dangling chip)", (char *)s->private, |
4373 | dev_name(&gdev->dev)); | |
4374 | return 0; | |
4375 | } | |
f9c4a31f | 4376 | |
ff2b1359 LW |
4377 | seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private, |
4378 | dev_name(&gdev->dev), | |
fdeb8e15 | 4379 | gdev->base, gdev->base + gdev->ngpio - 1); |
a0b66a73 | 4380 | parent = gc->parent; |
ff2b1359 LW |
4381 | if (parent) |
4382 | seq_printf(s, ", parent: %s/%s", | |
4383 | parent->bus ? parent->bus->name : "no-bus", | |
4384 | dev_name(parent)); | |
a0b66a73 LW |
4385 | if (gc->label) |
4386 | seq_printf(s, ", %s", gc->label); | |
4387 | if (gc->can_sleep) | |
f9c4a31f TR |
4388 | seq_printf(s, ", can sleep"); |
4389 | seq_printf(s, ":\n"); | |
4390 | ||
a0b66a73 LW |
4391 | if (gc->dbg_show) |
4392 | gc->dbg_show(s, gc); | |
f9c4a31f | 4393 | else |
fdeb8e15 | 4394 | gpiolib_dbg_show(s, gdev); |
f9c4a31f | 4395 | |
d2876d08 DB |
4396 | return 0; |
4397 | } | |
4398 | ||
425c5b3e | 4399 | static const struct seq_operations gpiolib_sops = { |
f9c4a31f TR |
4400 | .start = gpiolib_seq_start, |
4401 | .next = gpiolib_seq_next, | |
4402 | .stop = gpiolib_seq_stop, | |
4403 | .show = gpiolib_seq_show, | |
4404 | }; | |
425c5b3e | 4405 | DEFINE_SEQ_ATTRIBUTE(gpiolib); |
d2876d08 DB |
4406 | |
4407 | static int __init gpiolib_debugfs_init(void) | |
4408 | { | |
4409 | /* /sys/kernel/debug/gpio */ | |
425c5b3e | 4410 | debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops); |
d2876d08 DB |
4411 | return 0; |
4412 | } | |
4413 | subsys_initcall(gpiolib_debugfs_init); | |
4414 | ||
4415 | #endif /* DEBUG_FS */ |