gpiolib: have a single place of calling set_config()
[linux-2.6-block.git] / drivers / gpio / gpiolib.c
CommitLineData
dae5f0af 1// SPDX-License-Identifier: GPL-2.0
923a654c 2#include <linux/bitmap.h>
d2876d08
DB
3#include <linux/kernel.h>
4#include <linux/module.h>
ff77c352 5#include <linux/interrupt.h>
d2876d08
DB
6#include <linux/irq.h>
7#include <linux/spinlock.h>
1a989d0f 8#include <linux/list.h>
d8f388d8
DB
9#include <linux/device.h>
10#include <linux/err.h>
11#include <linux/debugfs.h>
12#include <linux/seq_file.h>
13#include <linux/gpio.h>
ff77c352 14#include <linux/idr.h>
5a0e3ad6 15#include <linux/slab.h>
7b199811 16#include <linux/acpi.h>
53e7cac3 17#include <linux/gpio/driver.h>
0a6d3158 18#include <linux/gpio/machine.h>
c771c2f4 19#include <linux/pinctrl/consumer.h>
3c702e99
LW
20#include <linux/cdev.h>
21#include <linux/fs.h>
22#include <linux/uaccess.h>
8b92e17e 23#include <linux/compat.h>
d7c51b47 24#include <linux/anon_inodes.h>
953b956a 25#include <linux/file.h>
61f922db
LW
26#include <linux/kfifo.h>
27#include <linux/poll.h>
28#include <linux/timekeeping.h>
3c702e99 29#include <uapi/linux/gpio.h>
d2876d08 30
664e3e5a 31#include "gpiolib.h"
f626d6df 32#include "gpiolib-of.h"
77cb907a 33#include "gpiolib-acpi.h"
664e3e5a 34
3f397c21
UKK
35#define CREATE_TRACE_POINTS
36#include <trace/events/gpio.h>
d2876d08 37
79a9becd 38/* Implementation infrastructure for GPIO interfaces.
d2876d08 39 *
79a9becd
AC
40 * The GPIO programming interface allows for inlining speed-critical
41 * get/set operations for common cases, so that access to SOC-integrated
42 * GPIOs can sometimes cost only an instruction or two per bit.
d2876d08
DB
43 */
44
45
46/* When debugging, extend minimal trust to callers and platform code.
47 * Also emit diagnostic messages that may help initial bringup, when
48 * board setup or driver bugs are most common.
49 *
50 * Otherwise, minimize overhead in what may be bitbanging codepaths.
51 */
52#ifdef DEBUG
53#define extra_checks 1
54#else
55#define extra_checks 0
56#endif
57
ff2b1359
LW
58/* Device and char device-related information */
59static DEFINE_IDA(gpio_ida);
3c702e99
LW
60static dev_t gpio_devt;
61#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
62static struct bus_type gpio_bus_type = {
63 .name = "gpio",
64};
ff2b1359 65
3027743f
LA
66/*
67 * Number of GPIOs to use for the fast path in set array
68 */
69#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
70
d2876d08
DB
71/* gpio_lock prevents conflicts during gpio_desc[] table updates.
72 * While any GPIO is requested, its gpio_chip is not removable;
73 * each GPIO's "requested" flag serves as a lock and refcount.
74 */
0eb4c6c2 75DEFINE_SPINLOCK(gpio_lock);
d2876d08 76
bae48da2
AC
77static DEFINE_MUTEX(gpio_lookup_lock);
78static LIST_HEAD(gpio_lookup_list);
ff2b1359 79LIST_HEAD(gpio_devices);
6d86750c 80
a411e81e
BG
81static DEFINE_MUTEX(gpio_machine_hogs_mutex);
82static LIST_HEAD(gpio_machine_hogs);
83
6d86750c 84static void gpiochip_free_hogs(struct gpio_chip *chip);
959bc7b2 85static int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
86 struct lock_class_key *lock_key,
87 struct lock_class_key *request_key);
6d86750c 88static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip);
9411e3aa 89static int gpiochip_irqchip_init_hw(struct gpio_chip *gpiochip);
79b804cb
MW
90static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip);
91static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip);
6d86750c 92
159f3cd9 93static bool gpiolib_initialized;
6d86750c 94
d2876d08
DB
95static inline void desc_set_label(struct gpio_desc *d, const char *label)
96{
d2876d08 97 d->label = label;
d2876d08
DB
98}
99
372e722e 100/**
950d55f5
TR
101 * gpio_to_desc - Convert a GPIO number to its descriptor
102 * @gpio: global GPIO number
103 *
104 * Returns:
105 * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
106 * with the given number exists in the system.
372e722e 107 */
79a9becd 108struct gpio_desc *gpio_to_desc(unsigned gpio)
372e722e 109{
ff2b1359 110 struct gpio_device *gdev;
14e85c0e
AC
111 unsigned long flags;
112
113 spin_lock_irqsave(&gpio_lock, flags);
114
ff2b1359 115 list_for_each_entry(gdev, &gpio_devices, list) {
fdeb8e15
LW
116 if (gdev->base <= gpio &&
117 gdev->base + gdev->ngpio > gpio) {
14e85c0e 118 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 119 return &gdev->descs[gpio - gdev->base];
14e85c0e
AC
120 }
121 }
122
123 spin_unlock_irqrestore(&gpio_lock, flags);
124
0e9a5edf
AC
125 if (!gpio_is_valid(gpio))
126 WARN(1, "invalid GPIO %d\n", gpio);
127
14e85c0e 128 return NULL;
372e722e 129}
79a9becd 130EXPORT_SYMBOL_GPL(gpio_to_desc);
372e722e 131
d468bf9e 132/**
950d55f5
TR
133 * gpiochip_get_desc - get the GPIO descriptor corresponding to the given
134 * hardware number for this chip
135 * @chip: GPIO chip
136 * @hwnum: hardware number of the GPIO for this chip
137 *
138 * Returns:
139 * A pointer to the GPIO descriptor or %ERR_PTR(-EINVAL) if no GPIO exists
140 * in the given chip for the specified hardware number.
d468bf9e 141 */
bb1e88cc
AC
142struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip,
143 u16 hwnum)
d468bf9e 144{
fdeb8e15
LW
145 struct gpio_device *gdev = chip->gpiodev;
146
147 if (hwnum >= gdev->ngpio)
b7d0a28a 148 return ERR_PTR(-EINVAL);
d468bf9e 149
fdeb8e15 150 return &gdev->descs[hwnum];
d468bf9e 151}
372e722e
AC
152
153/**
950d55f5
TR
154 * desc_to_gpio - convert a GPIO descriptor to the integer namespace
155 * @desc: GPIO descriptor
156 *
372e722e 157 * This should disappear in the future but is needed since we still
950d55f5
TR
158 * use GPIO numbers for error messages and sysfs nodes.
159 *
160 * Returns:
161 * The global GPIO number for the GPIO specified by its descriptor.
372e722e 162 */
79a9becd 163int desc_to_gpio(const struct gpio_desc *desc)
372e722e 164{
fdeb8e15 165 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
372e722e 166}
79a9becd 167EXPORT_SYMBOL_GPL(desc_to_gpio);
372e722e
AC
168
169
79a9becd
AC
170/**
171 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
172 * @desc: descriptor to return the chip of
173 */
174struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
372e722e 175{
dd3b9a44 176 if (!desc || !desc->gdev)
fdeb8e15
LW
177 return NULL;
178 return desc->gdev->chip;
372e722e 179}
79a9becd 180EXPORT_SYMBOL_GPL(gpiod_to_chip);
d2876d08 181
8d0aab2f
AV
182/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
183static int gpiochip_find_base(int ngpio)
184{
ff2b1359 185 struct gpio_device *gdev;
83cabe33 186 int base = ARCH_NR_GPIOS - ngpio;
8d0aab2f 187
ff2b1359 188 list_for_each_entry_reverse(gdev, &gpio_devices, list) {
83cabe33 189 /* found a free space? */
fdeb8e15 190 if (gdev->base + gdev->ngpio <= base)
83cabe33
AC
191 break;
192 else
193 /* nope, check the space right before the chip */
fdeb8e15 194 base = gdev->base - ngpio;
8d0aab2f
AV
195 }
196
83cabe33 197 if (gpio_is_valid(base)) {
8d0aab2f 198 pr_debug("%s: found new base at %d\n", __func__, base);
83cabe33
AC
199 return base;
200 } else {
201 pr_err("%s: cannot find free range\n", __func__);
202 return -ENOSPC;
169b6a7a 203 }
169b6a7a
AV
204}
205
79a9becd
AC
206/**
207 * gpiod_get_direction - return the current direction of a GPIO
208 * @desc: GPIO to get the direction of
209 *
94fc7309 210 * Returns 0 for output, 1 for input, or an error code in case of error.
79a9becd
AC
211 *
212 * This function may sleep if gpiod_cansleep() is true.
213 */
8e53b0f1 214int gpiod_get_direction(struct gpio_desc *desc)
80b0a602 215{
d0121b85
WS
216 struct gpio_chip *chip;
217 unsigned offset;
d377f56f 218 int ret;
80b0a602 219
372e722e
AC
220 chip = gpiod_to_chip(desc);
221 offset = gpio_chip_hwgpio(desc);
80b0a602
MN
222
223 if (!chip->get_direction)
d0121b85 224 return -ENOTSUPP;
80b0a602 225
d377f56f
LW
226 ret = chip->get_direction(chip, offset);
227 if (ret > 0) {
80b0a602 228 /* GPIOF_DIR_IN, or other positive */
d377f56f 229 ret = 1;
8e53b0f1 230 clear_bit(FLAG_IS_OUT, &desc->flags);
80b0a602 231 }
d377f56f 232 if (ret == 0) {
80b0a602 233 /* GPIOF_DIR_OUT */
8e53b0f1 234 set_bit(FLAG_IS_OUT, &desc->flags);
80b0a602 235 }
d377f56f 236 return ret;
80b0a602 237}
79a9becd 238EXPORT_SYMBOL_GPL(gpiod_get_direction);
80b0a602 239
1a989d0f
AC
240/*
241 * Add a new chip to the global chips list, keeping the list of chips sorted
ef7c7553 242 * by range(means [base, base + ngpio - 1]) order.
1a989d0f
AC
243 *
244 * Return -EBUSY if the new chip overlaps with some other chip's integer
245 * space.
246 */
ff2b1359 247static int gpiodev_add_to_list(struct gpio_device *gdev)
1a989d0f 248{
a961f9b4 249 struct gpio_device *prev, *next;
1a989d0f 250
ff2b1359 251 if (list_empty(&gpio_devices)) {
a961f9b4 252 /* initial entry in list */
ff2b1359 253 list_add_tail(&gdev->list, &gpio_devices);
e28ecca6 254 return 0;
1a989d0f
AC
255 }
256
a961f9b4
BJZ
257 next = list_entry(gpio_devices.next, struct gpio_device, list);
258 if (gdev->base + gdev->ngpio <= next->base) {
259 /* add before first entry */
260 list_add(&gdev->list, &gpio_devices);
261 return 0;
1a989d0f
AC
262 }
263
a961f9b4
BJZ
264 prev = list_entry(gpio_devices.prev, struct gpio_device, list);
265 if (prev->base + prev->ngpio <= gdev->base) {
266 /* add behind last entry */
267 list_add_tail(&gdev->list, &gpio_devices);
96098df1 268 return 0;
1a989d0f
AC
269 }
270
a961f9b4
BJZ
271 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
272 /* at the end of the list */
273 if (&next->list == &gpio_devices)
274 break;
1a989d0f 275
a961f9b4
BJZ
276 /* add between prev and next */
277 if (prev->base + prev->ngpio <= gdev->base
278 && gdev->base + gdev->ngpio <= next->base) {
279 list_add(&gdev->list, &prev->list);
280 return 0;
281 }
282 }
283
284 dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n");
285 return -EBUSY;
1a989d0f
AC
286}
287
950d55f5 288/*
f881bab0
LW
289 * Convert a GPIO name to its descriptor
290 */
291static struct gpio_desc *gpio_name_to_desc(const char * const name)
292{
ff2b1359 293 struct gpio_device *gdev;
f881bab0
LW
294 unsigned long flags;
295
296 spin_lock_irqsave(&gpio_lock, flags);
297
ff2b1359 298 list_for_each_entry(gdev, &gpio_devices, list) {
f881bab0
LW
299 int i;
300
fdeb8e15
LW
301 for (i = 0; i != gdev->ngpio; ++i) {
302 struct gpio_desc *desc = &gdev->descs[i];
f881bab0 303
fdeb8e15 304 if (!desc->name || !name)
f881bab0
LW
305 continue;
306
fdeb8e15 307 if (!strcmp(desc->name, name)) {
f881bab0 308 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 309 return desc;
f881bab0
LW
310 }
311 }
312 }
313
314 spin_unlock_irqrestore(&gpio_lock, flags);
315
316 return NULL;
317}
318
5f3ca732
MP
319/*
320 * Takes the names from gc->names and checks if they are all unique. If they
321 * are, they are assigned to their gpio descriptors.
322 *
ed37915c 323 * Warning if one of the names is already used for a different GPIO.
5f3ca732
MP
324 */
325static int gpiochip_set_desc_names(struct gpio_chip *gc)
326{
fdeb8e15 327 struct gpio_device *gdev = gc->gpiodev;
5f3ca732
MP
328 int i;
329
330 if (!gc->names)
331 return 0;
332
333 /* First check all names if they are unique */
334 for (i = 0; i != gc->ngpio; ++i) {
335 struct gpio_desc *gpio;
336
337 gpio = gpio_name_to_desc(gc->names[i]);
f881bab0 338 if (gpio)
fdeb8e15 339 dev_warn(&gdev->dev,
34ffd85d 340 "Detected name collision for GPIO name '%s'\n",
f881bab0 341 gc->names[i]);
5f3ca732
MP
342 }
343
344 /* Then add all names to the GPIO descriptors */
345 for (i = 0; i != gc->ngpio; ++i)
fdeb8e15 346 gdev->descs[i].name = gc->names[i];
5f3ca732
MP
347
348 return 0;
349}
350
e4371f6e
SB
351static unsigned long *gpiochip_allocate_mask(struct gpio_chip *chip)
352{
353 unsigned long *p;
354
7bdbd1ec 355 p = bitmap_alloc(chip->ngpio, GFP_KERNEL);
e4371f6e
SB
356 if (!p)
357 return NULL;
358
359 /* Assume by default all GPIOs are valid */
360 bitmap_fill(p, chip->ngpio);
361
362 return p;
363}
364
f626d6df 365static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
726cb3ba 366{
eb1e8bd6 367 if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask))
726cb3ba
SB
368 return 0;
369
f626d6df
LW
370 gc->valid_mask = gpiochip_allocate_mask(gc);
371 if (!gc->valid_mask)
726cb3ba
SB
372 return -ENOMEM;
373
374 return 0;
375}
376
c9fc5aff 377static int gpiochip_init_valid_mask(struct gpio_chip *gc)
f8ec92a9 378{
c9fc5aff
LW
379 if (gc->init_valid_mask)
380 return gc->init_valid_mask(gc,
381 gc->valid_mask,
382 gc->ngpio);
f8ec92a9
RRD
383
384 return 0;
385}
386
726cb3ba
SB
387static void gpiochip_free_valid_mask(struct gpio_chip *gpiochip)
388{
7bdbd1ec 389 bitmap_free(gpiochip->valid_mask);
726cb3ba
SB
390 gpiochip->valid_mask = NULL;
391}
392
b056ca1c
AS
393static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
394{
395 if (gc->add_pin_ranges)
396 return gc->add_pin_ranges(gc);
397
398 return 0;
399}
400
726cb3ba
SB
401bool gpiochip_line_is_valid(const struct gpio_chip *gpiochip,
402 unsigned int offset)
403{
404 /* No mask means all valid */
405 if (likely(!gpiochip->valid_mask))
406 return true;
407 return test_bit(offset, gpiochip->valid_mask);
408}
409EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
410
d7c51b47
LW
411/*
412 * GPIO line handle management
413 */
414
415/**
416 * struct linehandle_state - contains the state of a userspace handle
417 * @gdev: the GPIO device the handle pertains to
418 * @label: consumer label used to tag descriptors
419 * @descs: the GPIO descriptors held by this handle
420 * @numdescs: the number of descriptors held in the descs array
421 */
422struct linehandle_state {
423 struct gpio_device *gdev;
424 const char *label;
425 struct gpio_desc *descs[GPIOHANDLES_MAX];
426 u32 numdescs;
427};
428
e3e847c7
LPC
429#define GPIOHANDLE_REQUEST_VALID_FLAGS \
430 (GPIOHANDLE_REQUEST_INPUT | \
431 GPIOHANDLE_REQUEST_OUTPUT | \
432 GPIOHANDLE_REQUEST_ACTIVE_LOW | \
9225d516
DF
433 GPIOHANDLE_REQUEST_BIAS_PULL_UP | \
434 GPIOHANDLE_REQUEST_BIAS_PULL_DOWN | \
2148ad77 435 GPIOHANDLE_REQUEST_BIAS_DISABLE | \
e3e847c7
LPC
436 GPIOHANDLE_REQUEST_OPEN_DRAIN | \
437 GPIOHANDLE_REQUEST_OPEN_SOURCE)
438
b043ed7e
KG
439static int linehandle_validate_flags(u32 flags)
440{
441 /* Return an error if an unknown flag is set */
442 if (flags & ~GPIOHANDLE_REQUEST_VALID_FLAGS)
443 return -EINVAL;
444
445 /*
446 * Do not allow both INPUT & OUTPUT flags to be set as they are
447 * contradictory.
448 */
449 if ((flags & GPIOHANDLE_REQUEST_INPUT) &&
450 (flags & GPIOHANDLE_REQUEST_OUTPUT))
451 return -EINVAL;
452
453 /*
454 * Do not allow OPEN_SOURCE & OPEN_DRAIN flags in a single request. If
455 * the hardware actually supports enabling both at the same time the
456 * electrical result would be disastrous.
457 */
458 if ((flags & GPIOHANDLE_REQUEST_OPEN_DRAIN) &&
459 (flags & GPIOHANDLE_REQUEST_OPEN_SOURCE))
460 return -EINVAL;
461
462 /* OPEN_DRAIN and OPEN_SOURCE flags only make sense for output mode. */
463 if (!(flags & GPIOHANDLE_REQUEST_OUTPUT) &&
464 ((flags & GPIOHANDLE_REQUEST_OPEN_DRAIN) ||
465 (flags & GPIOHANDLE_REQUEST_OPEN_SOURCE)))
466 return -EINVAL;
467
468 /* Bias flags only allowed for input or output mode. */
469 if (!((flags & GPIOHANDLE_REQUEST_INPUT) ||
470 (flags & GPIOHANDLE_REQUEST_OUTPUT)) &&
471 ((flags & GPIOHANDLE_REQUEST_BIAS_DISABLE) ||
472 (flags & GPIOHANDLE_REQUEST_BIAS_PULL_UP) ||
473 (flags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)))
474 return -EINVAL;
475
476 /* Only one bias flag can be set. */
477 if (((flags & GPIOHANDLE_REQUEST_BIAS_DISABLE) &&
478 (flags & (GPIOHANDLE_REQUEST_BIAS_PULL_DOWN |
479 GPIOHANDLE_REQUEST_BIAS_PULL_UP))) ||
480 ((flags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) &&
481 (flags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)))
482 return -EINVAL;
483
484 return 0;
485}
486
e588bb1e
KG
487static void linehandle_configure_flag(unsigned long *flagsp,
488 u32 bit, bool active)
489{
490 if (active)
491 set_bit(bit, flagsp);
492 else
493 clear_bit(bit, flagsp);
494}
495
496static long linehandle_set_config(struct linehandle_state *lh,
497 void __user *ip)
498{
499 struct gpiohandle_config gcnf;
500 struct gpio_desc *desc;
501 int i, ret;
502 u32 lflags;
503 unsigned long *flagsp;
504
505 if (copy_from_user(&gcnf, ip, sizeof(gcnf)))
506 return -EFAULT;
507
508 lflags = gcnf.flags;
509 ret = linehandle_validate_flags(lflags);
510 if (ret)
511 return ret;
512
513 for (i = 0; i < lh->numdescs; i++) {
514 desc = lh->descs[i];
515 flagsp = &desc->flags;
516
517 linehandle_configure_flag(flagsp, FLAG_ACTIVE_LOW,
518 lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW);
519
520 linehandle_configure_flag(flagsp, FLAG_OPEN_DRAIN,
521 lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN);
522
523 linehandle_configure_flag(flagsp, FLAG_OPEN_SOURCE,
524 lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE);
525
526 linehandle_configure_flag(flagsp, FLAG_PULL_UP,
527 lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP);
528
529 linehandle_configure_flag(flagsp, FLAG_PULL_DOWN,
530 lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN);
531
532 linehandle_configure_flag(flagsp, FLAG_BIAS_DISABLE,
533 lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE);
534
535 /*
536 * Lines have to be requested explicitly for input
537 * or output, else the line will be treated "as is".
538 */
539 if (lflags & GPIOHANDLE_REQUEST_OUTPUT) {
540 int val = !!gcnf.default_values[i];
541
542 ret = gpiod_direction_output(desc, val);
543 if (ret)
544 return ret;
545 } else if (lflags & GPIOHANDLE_REQUEST_INPUT) {
546 ret = gpiod_direction_input(desc);
547 if (ret)
548 return ret;
549 }
550 }
551 return 0;
552}
553
d7c51b47
LW
554static long linehandle_ioctl(struct file *filep, unsigned int cmd,
555 unsigned long arg)
556{
557 struct linehandle_state *lh = filep->private_data;
558 void __user *ip = (void __user *)arg;
559 struct gpiohandle_data ghd;
b9762beb 560 DECLARE_BITMAP(vals, GPIOHANDLES_MAX);
d7c51b47
LW
561 int i;
562
563 if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) {
2b955b34 564 /* NOTE: It's ok to read values of output lines. */
eec1d566
LW
565 int ret = gpiod_get_array_value_complex(false,
566 true,
567 lh->numdescs,
568 lh->descs,
77588c14 569 NULL,
eec1d566
LW
570 vals);
571 if (ret)
572 return ret;
d7c51b47 573
3eded5d8 574 memset(&ghd, 0, sizeof(ghd));
eec1d566 575 for (i = 0; i < lh->numdescs; i++)
b9762beb 576 ghd.values[i] = test_bit(i, vals);
d7c51b47
LW
577
578 if (copy_to_user(ip, &ghd, sizeof(ghd)))
579 return -EFAULT;
580
581 return 0;
582 } else if (cmd == GPIOHANDLE_SET_LINE_VALUES_IOCTL) {
e5332d54
BG
583 /*
584 * All line descriptors were created at once with the same
585 * flags so just check if the first one is really output.
586 */
587 if (!test_bit(FLAG_IS_OUT, &lh->descs[0]->flags))
588 return -EPERM;
589
d7c51b47
LW
590 if (copy_from_user(&ghd, ip, sizeof(ghd)))
591 return -EFAULT;
592
593 /* Clamp all values to [0,1] */
594 for (i = 0; i < lh->numdescs; i++)
b9762beb 595 __assign_bit(i, vals, ghd.values[i]);
d7c51b47
LW
596
597 /* Reuse the array setting function */
3027743f 598 return gpiod_set_array_value_complex(false,
d7c51b47
LW
599 true,
600 lh->numdescs,
601 lh->descs,
77588c14 602 NULL,
d7c51b47 603 vals);
e588bb1e
KG
604 } else if (cmd == GPIOHANDLE_SET_CONFIG_IOCTL) {
605 return linehandle_set_config(lh, ip);
d7c51b47
LW
606 }
607 return -EINVAL;
608}
609
610#ifdef CONFIG_COMPAT
611static long linehandle_ioctl_compat(struct file *filep, unsigned int cmd,
612 unsigned long arg)
613{
614 return linehandle_ioctl(filep, cmd, (unsigned long)compat_ptr(arg));
615}
616#endif
617
618static int linehandle_release(struct inode *inode, struct file *filep)
619{
620 struct linehandle_state *lh = filep->private_data;
621 struct gpio_device *gdev = lh->gdev;
622 int i;
623
624 for (i = 0; i < lh->numdescs; i++)
625 gpiod_free(lh->descs[i]);
626 kfree(lh->label);
627 kfree(lh);
628 put_device(&gdev->dev);
629 return 0;
630}
631
632static const struct file_operations linehandle_fileops = {
633 .release = linehandle_release,
634 .owner = THIS_MODULE,
635 .llseek = noop_llseek,
636 .unlocked_ioctl = linehandle_ioctl,
637#ifdef CONFIG_COMPAT
638 .compat_ioctl = linehandle_ioctl_compat,
639#endif
640};
641
642static int linehandle_create(struct gpio_device *gdev, void __user *ip)
643{
644 struct gpiohandle_request handlereq;
645 struct linehandle_state *lh;
953b956a 646 struct file *file;
ab3dbcf7 647 int fd, i, count = 0, ret;
418ee8e9 648 u32 lflags;
d7c51b47
LW
649
650 if (copy_from_user(&handlereq, ip, sizeof(handlereq)))
651 return -EFAULT;
652 if ((handlereq.lines == 0) || (handlereq.lines > GPIOHANDLES_MAX))
653 return -EINVAL;
654
418ee8e9
BG
655 lflags = handlereq.flags;
656
b043ed7e
KG
657 ret = linehandle_validate_flags(lflags);
658 if (ret)
659 return ret;
2148ad77 660
d7c51b47
LW
661 lh = kzalloc(sizeof(*lh), GFP_KERNEL);
662 if (!lh)
663 return -ENOMEM;
664 lh->gdev = gdev;
665 get_device(&gdev->dev);
666
667 /* Make sure this is terminated */
668 handlereq.consumer_label[sizeof(handlereq.consumer_label)-1] = '\0';
669 if (strlen(handlereq.consumer_label)) {
670 lh->label = kstrdup(handlereq.consumer_label,
671 GFP_KERNEL);
672 if (!lh->label) {
673 ret = -ENOMEM;
674 goto out_free_lh;
675 }
676 }
677
678 /* Request each GPIO */
679 for (i = 0; i < handlereq.lines; i++) {
680 u32 offset = handlereq.lineoffsets[i];
d7c51b47
LW
681 struct gpio_desc *desc;
682
e405f9fc
LPC
683 if (offset >= gdev->ngpio) {
684 ret = -EINVAL;
685 goto out_free_descs;
686 }
687
d7c51b47
LW
688 desc = &gdev->descs[offset];
689 ret = gpiod_request(desc, lh->label);
690 if (ret)
691 goto out_free_descs;
692 lh->descs[i] = desc;
19a4fbff 693 count = i + 1;
d7c51b47
LW
694
695 if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW)
696 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
697 if (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN)
698 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
699 if (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE)
700 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
2148ad77
KG
701 if (lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE)
702 set_bit(FLAG_BIAS_DISABLE, &desc->flags);
9225d516
DF
703 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)
704 set_bit(FLAG_PULL_DOWN, &desc->flags);
705 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)
706 set_bit(FLAG_PULL_UP, &desc->flags);
d7c51b47 707
e10f72bf
AJ
708 ret = gpiod_set_transitory(desc, false);
709 if (ret < 0)
710 goto out_free_descs;
711
d7c51b47
LW
712 /*
713 * Lines have to be requested explicitly for input
714 * or output, else the line will be treated "as is".
715 */
716 if (lflags & GPIOHANDLE_REQUEST_OUTPUT) {
717 int val = !!handlereq.default_values[i];
718
719 ret = gpiod_direction_output(desc, val);
720 if (ret)
721 goto out_free_descs;
722 } else if (lflags & GPIOHANDLE_REQUEST_INPUT) {
723 ret = gpiod_direction_input(desc);
724 if (ret)
725 goto out_free_descs;
726 }
727 dev_dbg(&gdev->dev, "registered chardev handle for line %d\n",
728 offset);
729 }
e2f608be
LW
730 /* Let i point at the last handle */
731 i--;
d7c51b47
LW
732 lh->numdescs = handlereq.lines;
733
953b956a 734 fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);
d7c51b47
LW
735 if (fd < 0) {
736 ret = fd;
737 goto out_free_descs;
738 }
739
953b956a
LPC
740 file = anon_inode_getfile("gpio-linehandle",
741 &linehandle_fileops,
742 lh,
743 O_RDONLY | O_CLOEXEC);
744 if (IS_ERR(file)) {
745 ret = PTR_ERR(file);
746 goto out_put_unused_fd;
747 }
748
d7c51b47 749 handlereq.fd = fd;
d932cd49 750 if (copy_to_user(ip, &handlereq, sizeof(handlereq))) {
953b956a
LPC
751 /*
752 * fput() will trigger the release() callback, so do not go onto
753 * the regular error cleanup path here.
754 */
755 fput(file);
756 put_unused_fd(fd);
757 return -EFAULT;
d932cd49 758 }
d7c51b47 759
953b956a
LPC
760 fd_install(fd, file);
761
d7c51b47
LW
762 dev_dbg(&gdev->dev, "registered chardev handle for %d lines\n",
763 lh->numdescs);
764
765 return 0;
766
953b956a
LPC
767out_put_unused_fd:
768 put_unused_fd(fd);
d7c51b47 769out_free_descs:
ab3dbcf7 770 for (i = 0; i < count; i++)
d7c51b47
LW
771 gpiod_free(lh->descs[i]);
772 kfree(lh->label);
773out_free_lh:
774 kfree(lh);
775 put_device(&gdev->dev);
776 return ret;
777}
778
61f922db
LW
779/*
780 * GPIO line event management
781 */
782
783/**
784 * struct lineevent_state - contains the state of a userspace event
785 * @gdev: the GPIO device the event pertains to
786 * @label: consumer label used to tag descriptors
787 * @desc: the GPIO descriptor held by this event
788 * @eflags: the event flags this line was requested with
789 * @irq: the interrupt that trigger in response to events on this GPIO
790 * @wait: wait queue that handles blocking reads of events
791 * @events: KFIFO for the GPIO events
792 * @read_lock: mutex lock to protect reads from colliding with adding
793 * new events to the FIFO
d58f2bf2
LW
794 * @timestamp: cache for the timestamp storing it between hardirq
795 * and IRQ thread, used to bring the timestamp close to the actual
796 * event
61f922db
LW
797 */
798struct lineevent_state {
799 struct gpio_device *gdev;
800 const char *label;
801 struct gpio_desc *desc;
802 u32 eflags;
803 int irq;
804 wait_queue_head_t wait;
805 DECLARE_KFIFO(events, struct gpioevent_data, 16);
806 struct mutex read_lock;
d58f2bf2 807 u64 timestamp;
61f922db
LW
808};
809
ac7dbb99
LPC
810#define GPIOEVENT_REQUEST_VALID_FLAGS \
811 (GPIOEVENT_REQUEST_RISING_EDGE | \
812 GPIOEVENT_REQUEST_FALLING_EDGE)
813
afc9a42b 814static __poll_t lineevent_poll(struct file *filep,
61f922db
LW
815 struct poll_table_struct *wait)
816{
817 struct lineevent_state *le = filep->private_data;
afc9a42b 818 __poll_t events = 0;
61f922db
LW
819
820 poll_wait(filep, &le->wait, wait);
821
822 if (!kfifo_is_empty(&le->events))
a9a08845 823 events = EPOLLIN | EPOLLRDNORM;
61f922db
LW
824
825 return events;
826}
827
828
829static ssize_t lineevent_read(struct file *filep,
830 char __user *buf,
831 size_t count,
832 loff_t *f_ps)
833{
834 struct lineevent_state *le = filep->private_data;
835 unsigned int copied;
836 int ret;
837
838 if (count < sizeof(struct gpioevent_data))
839 return -EINVAL;
840
841 do {
842 if (kfifo_is_empty(&le->events)) {
843 if (filep->f_flags & O_NONBLOCK)
844 return -EAGAIN;
845
846 ret = wait_event_interruptible(le->wait,
847 !kfifo_is_empty(&le->events));
848 if (ret)
849 return ret;
850 }
851
852 if (mutex_lock_interruptible(&le->read_lock))
853 return -ERESTARTSYS;
854 ret = kfifo_to_user(&le->events, buf, count, &copied);
855 mutex_unlock(&le->read_lock);
856
857 if (ret)
858 return ret;
859
860 /*
861 * If we couldn't read anything from the fifo (a different
862 * thread might have been faster) we either return -EAGAIN if
863 * the file descriptor is non-blocking, otherwise we go back to
864 * sleep and wait for more data to arrive.
865 */
866 if (copied == 0 && (filep->f_flags & O_NONBLOCK))
867 return -EAGAIN;
868
869 } while (copied == 0);
870
871 return copied;
872}
873
874static int lineevent_release(struct inode *inode, struct file *filep)
875{
876 struct lineevent_state *le = filep->private_data;
877 struct gpio_device *gdev = le->gdev;
878
879 free_irq(le->irq, le);
880 gpiod_free(le->desc);
881 kfree(le->label);
882 kfree(le);
883 put_device(&gdev->dev);
884 return 0;
885}
886
887static long lineevent_ioctl(struct file *filep, unsigned int cmd,
888 unsigned long arg)
889{
890 struct lineevent_state *le = filep->private_data;
891 void __user *ip = (void __user *)arg;
892 struct gpiohandle_data ghd;
893
894 /*
895 * We can get the value for an event line but not set it,
896 * because it is input by definition.
897 */
898 if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) {
899 int val;
900
d82aa4a8
LPC
901 memset(&ghd, 0, sizeof(ghd));
902
61f922db
LW
903 val = gpiod_get_value_cansleep(le->desc);
904 if (val < 0)
905 return val;
906 ghd.values[0] = val;
907
908 if (copy_to_user(ip, &ghd, sizeof(ghd)))
909 return -EFAULT;
910
911 return 0;
912 }
913 return -EINVAL;
914}
915
916#ifdef CONFIG_COMPAT
917static long lineevent_ioctl_compat(struct file *filep, unsigned int cmd,
918 unsigned long arg)
919{
920 return lineevent_ioctl(filep, cmd, (unsigned long)compat_ptr(arg));
921}
922#endif
923
924static const struct file_operations lineevent_fileops = {
925 .release = lineevent_release,
926 .read = lineevent_read,
927 .poll = lineevent_poll,
928 .owner = THIS_MODULE,
929 .llseek = noop_llseek,
930 .unlocked_ioctl = lineevent_ioctl,
931#ifdef CONFIG_COMPAT
932 .compat_ioctl = lineevent_ioctl_compat,
933#endif
934};
935
33265b17 936static irqreturn_t lineevent_irq_thread(int irq, void *p)
61f922db
LW
937{
938 struct lineevent_state *le = p;
939 struct gpioevent_data ge;
fa38869b 940 int ret;
61f922db 941
24bd3efc
LW
942 /* Do not leak kernel stack to userspace */
943 memset(&ge, 0, sizeof(ge));
944
1033be58
BG
945 /*
946 * We may be running from a nested threaded interrupt in which case
947 * we didn't get the timestamp from lineevent_irq_handler().
948 */
949 if (!le->timestamp)
950 ge.timestamp = ktime_get_real_ns();
951 else
952 ge.timestamp = le->timestamp;
61f922db 953
ad537b82
BG
954 if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE
955 && le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) {
fa38869b 956 int level = gpiod_get_value_cansleep(le->desc);
61f922db
LW
957 if (level)
958 /* Emit low-to-high event */
959 ge.id = GPIOEVENT_EVENT_RISING_EDGE;
960 else
961 /* Emit high-to-low event */
962 ge.id = GPIOEVENT_EVENT_FALLING_EDGE;
fa38869b 963 } else if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE) {
61f922db
LW
964 /* Emit low-to-high event */
965 ge.id = GPIOEVENT_EVENT_RISING_EDGE;
fa38869b 966 } else if (le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) {
61f922db
LW
967 /* Emit high-to-low event */
968 ge.id = GPIOEVENT_EVENT_FALLING_EDGE;
bc0207a5
AB
969 } else {
970 return IRQ_NONE;
61f922db
LW
971 }
972
973 ret = kfifo_put(&le->events, ge);
2efc6bfa 974 if (ret)
a9a08845 975 wake_up_poll(&le->wait, EPOLLIN);
61f922db
LW
976
977 return IRQ_HANDLED;
978}
979
d58f2bf2
LW
980static irqreturn_t lineevent_irq_handler(int irq, void *p)
981{
982 struct lineevent_state *le = p;
983
984 /*
985 * Just store the timestamp in hardirq context so we get it as
986 * close in time as possible to the actual event.
987 */
988 le->timestamp = ktime_get_real_ns();
989
990 return IRQ_WAKE_THREAD;
991}
992
61f922db
LW
993static int lineevent_create(struct gpio_device *gdev, void __user *ip)
994{
995 struct gpioevent_request eventreq;
996 struct lineevent_state *le;
997 struct gpio_desc *desc;
953b956a 998 struct file *file;
61f922db
LW
999 u32 offset;
1000 u32 lflags;
1001 u32 eflags;
1002 int fd;
1003 int ret;
1004 int irqflags = 0;
1005
1006 if (copy_from_user(&eventreq, ip, sizeof(eventreq)))
1007 return -EFAULT;
1008
bcc6d99a
BG
1009 offset = eventreq.lineoffset;
1010 lflags = eventreq.handleflags;
1011 eflags = eventreq.eventflags;
1012
1013 if (offset >= gdev->ngpio)
1014 return -EINVAL;
1015
1016 /* Return an error if a unknown flag is set */
1017 if ((lflags & ~GPIOHANDLE_REQUEST_VALID_FLAGS) ||
1018 (eflags & ~GPIOEVENT_REQUEST_VALID_FLAGS))
1019 return -EINVAL;
1020
1021 /* This is just wrong: we don't look for events on output lines */
1022 if ((lflags & GPIOHANDLE_REQUEST_OUTPUT) ||
1023 (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN) ||
1024 (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE))
1025 return -EINVAL;
1026
2148ad77
KG
1027 /* Only one bias flag can be set. */
1028 if (((lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE) &&
1029 (lflags & (GPIOHANDLE_REQUEST_BIAS_PULL_DOWN |
1030 GPIOHANDLE_REQUEST_BIAS_PULL_UP))) ||
1031 ((lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) &&
1032 (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)))
1033 return -EINVAL;
1034
61f922db
LW
1035 le = kzalloc(sizeof(*le), GFP_KERNEL);
1036 if (!le)
1037 return -ENOMEM;
1038 le->gdev = gdev;
1039 get_device(&gdev->dev);
1040
1041 /* Make sure this is terminated */
1042 eventreq.consumer_label[sizeof(eventreq.consumer_label)-1] = '\0';
1043 if (strlen(eventreq.consumer_label)) {
1044 le->label = kstrdup(eventreq.consumer_label,
1045 GFP_KERNEL);
1046 if (!le->label) {
1047 ret = -ENOMEM;
1048 goto out_free_le;
1049 }
1050 }
1051
61f922db
LW
1052 desc = &gdev->descs[offset];
1053 ret = gpiod_request(desc, le->label);
1054 if (ret)
f001cc35 1055 goto out_free_label;
61f922db
LW
1056 le->desc = desc;
1057 le->eflags = eflags;
1058
1059 if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW)
1060 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
2148ad77
KG
1061 if (lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE)
1062 set_bit(FLAG_BIAS_DISABLE, &desc->flags);
7b479a84
KG
1063 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)
1064 set_bit(FLAG_PULL_DOWN, &desc->flags);
1065 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)
1066 set_bit(FLAG_PULL_UP, &desc->flags);
61f922db
LW
1067
1068 ret = gpiod_direction_input(desc);
1069 if (ret)
1070 goto out_free_desc;
1071
1072 le->irq = gpiod_to_irq(desc);
1073 if (le->irq <= 0) {
1074 ret = -ENODEV;
1075 goto out_free_desc;
1076 }
1077
1078 if (eflags & GPIOEVENT_REQUEST_RISING_EDGE)
223ecaf1
MW
1079 irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
1080 IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING;
61f922db 1081 if (eflags & GPIOEVENT_REQUEST_FALLING_EDGE)
223ecaf1
MW
1082 irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
1083 IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING;
61f922db 1084 irqflags |= IRQF_ONESHOT;
61f922db
LW
1085
1086 INIT_KFIFO(le->events);
1087 init_waitqueue_head(&le->wait);
1088 mutex_init(&le->read_lock);
1089
1090 /* Request a thread to read the events */
1091 ret = request_threaded_irq(le->irq,
d58f2bf2 1092 lineevent_irq_handler,
61f922db
LW
1093 lineevent_irq_thread,
1094 irqflags,
1095 le->label,
1096 le);
1097 if (ret)
1098 goto out_free_desc;
1099
953b956a 1100 fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);
61f922db
LW
1101 if (fd < 0) {
1102 ret = fd;
1103 goto out_free_irq;
1104 }
1105
953b956a
LPC
1106 file = anon_inode_getfile("gpio-event",
1107 &lineevent_fileops,
1108 le,
1109 O_RDONLY | O_CLOEXEC);
1110 if (IS_ERR(file)) {
1111 ret = PTR_ERR(file);
1112 goto out_put_unused_fd;
1113 }
1114
61f922db 1115 eventreq.fd = fd;
d932cd49 1116 if (copy_to_user(ip, &eventreq, sizeof(eventreq))) {
953b956a
LPC
1117 /*
1118 * fput() will trigger the release() callback, so do not go onto
1119 * the regular error cleanup path here.
1120 */
1121 fput(file);
1122 put_unused_fd(fd);
1123 return -EFAULT;
d932cd49 1124 }
61f922db 1125
953b956a
LPC
1126 fd_install(fd, file);
1127
61f922db
LW
1128 return 0;
1129
953b956a
LPC
1130out_put_unused_fd:
1131 put_unused_fd(fd);
61f922db
LW
1132out_free_irq:
1133 free_irq(le->irq, le);
1134out_free_desc:
1135 gpiod_free(le->desc);
1136out_free_label:
1137 kfree(le->label);
1138out_free_le:
1139 kfree(le);
1140 put_device(&gdev->dev);
1141 return ret;
1142}
1143
950d55f5 1144/*
3c702e99
LW
1145 * gpio_ioctl() - ioctl handler for the GPIO chardev
1146 */
1147static long gpio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
1148{
1149 struct gpio_device *gdev = filp->private_data;
1150 struct gpio_chip *chip = gdev->chip;
8b92e17e 1151 void __user *ip = (void __user *)arg;
3c702e99
LW
1152
1153 /* We fail any subsequent ioctl():s when the chip is gone */
1154 if (!chip)
1155 return -ENODEV;
1156
521a2ad6 1157 /* Fill in the struct and pass to userspace */
3c702e99 1158 if (cmd == GPIO_GET_CHIPINFO_IOCTL) {
521a2ad6
LW
1159 struct gpiochip_info chipinfo;
1160
0f4bbb23
LPC
1161 memset(&chipinfo, 0, sizeof(chipinfo));
1162
3c702e99
LW
1163 strncpy(chipinfo.name, dev_name(&gdev->dev),
1164 sizeof(chipinfo.name));
1165 chipinfo.name[sizeof(chipinfo.name)-1] = '\0';
df4878e9
LW
1166 strncpy(chipinfo.label, gdev->label,
1167 sizeof(chipinfo.label));
1168 chipinfo.label[sizeof(chipinfo.label)-1] = '\0';
fdeb8e15 1169 chipinfo.lines = gdev->ngpio;
3c702e99
LW
1170 if (copy_to_user(ip, &chipinfo, sizeof(chipinfo)))
1171 return -EFAULT;
1172 return 0;
521a2ad6
LW
1173 } else if (cmd == GPIO_GET_LINEINFO_IOCTL) {
1174 struct gpioline_info lineinfo;
1175 struct gpio_desc *desc;
1176
1177 if (copy_from_user(&lineinfo, ip, sizeof(lineinfo)))
1178 return -EFAULT;
1f1cc456 1179 if (lineinfo.line_offset >= gdev->ngpio)
521a2ad6
LW
1180 return -EINVAL;
1181
1182 desc = &gdev->descs[lineinfo.line_offset];
1183 if (desc->name) {
1184 strncpy(lineinfo.name, desc->name,
1185 sizeof(lineinfo.name));
1186 lineinfo.name[sizeof(lineinfo.name)-1] = '\0';
1187 } else {
1188 lineinfo.name[0] = '\0';
1189 }
1190 if (desc->label) {
214338e3
LW
1191 strncpy(lineinfo.consumer, desc->label,
1192 sizeof(lineinfo.consumer));
1193 lineinfo.consumer[sizeof(lineinfo.consumer)-1] = '\0';
521a2ad6 1194 } else {
214338e3 1195 lineinfo.consumer[0] = '\0';
521a2ad6
LW
1196 }
1197
1198 /*
1199 * Userspace only need to know that the kernel is using
1200 * this GPIO so it can't use it.
1201 */
1202 lineinfo.flags = 0;
9d8cc89c
LW
1203 if (test_bit(FLAG_REQUESTED, &desc->flags) ||
1204 test_bit(FLAG_IS_HOGGED, &desc->flags) ||
1205 test_bit(FLAG_USED_AS_IRQ, &desc->flags) ||
1206 test_bit(FLAG_EXPORT, &desc->flags) ||
472a61e7
SW
1207 test_bit(FLAG_SYSFS, &desc->flags) ||
1208 !pinctrl_gpio_can_use_line(chip->base + lineinfo.line_offset))
521a2ad6 1209 lineinfo.flags |= GPIOLINE_FLAG_KERNEL;
9d8cc89c 1210 if (test_bit(FLAG_IS_OUT, &desc->flags))
521a2ad6 1211 lineinfo.flags |= GPIOLINE_FLAG_IS_OUT;
9d8cc89c 1212 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
521a2ad6 1213 lineinfo.flags |= GPIOLINE_FLAG_ACTIVE_LOW;
9d8cc89c 1214 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
2c60e6b5
BG
1215 lineinfo.flags |= (GPIOLINE_FLAG_OPEN_DRAIN |
1216 GPIOLINE_FLAG_IS_OUT);
9d8cc89c 1217 if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
2c60e6b5
BG
1218 lineinfo.flags |= (GPIOLINE_FLAG_OPEN_SOURCE |
1219 GPIOLINE_FLAG_IS_OUT);
2148ad77
KG
1220 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
1221 lineinfo.flags |= GPIOLINE_FLAG_BIAS_DISABLE;
9225d516
DF
1222 if (test_bit(FLAG_PULL_DOWN, &desc->flags))
1223 lineinfo.flags |= GPIOLINE_FLAG_BIAS_PULL_DOWN;
1224 if (test_bit(FLAG_PULL_UP, &desc->flags))
1225 lineinfo.flags |= GPIOLINE_FLAG_BIAS_PULL_UP;
521a2ad6
LW
1226
1227 if (copy_to_user(ip, &lineinfo, sizeof(lineinfo)))
1228 return -EFAULT;
1229 return 0;
d7c51b47
LW
1230 } else if (cmd == GPIO_GET_LINEHANDLE_IOCTL) {
1231 return linehandle_create(gdev, ip);
61f922db
LW
1232 } else if (cmd == GPIO_GET_LINEEVENT_IOCTL) {
1233 return lineevent_create(gdev, ip);
3c702e99
LW
1234 }
1235 return -EINVAL;
1236}
1237
8b92e17e
LW
1238#ifdef CONFIG_COMPAT
1239static long gpio_ioctl_compat(struct file *filp, unsigned int cmd,
1240 unsigned long arg)
1241{
1242 return gpio_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
1243}
1244#endif
1245
3c702e99
LW
1246/**
1247 * gpio_chrdev_open() - open the chardev for ioctl operations
1248 * @inode: inode for this chardev
1249 * @filp: file struct for storing private data
1250 * Returns 0 on success
1251 */
1252static int gpio_chrdev_open(struct inode *inode, struct file *filp)
1253{
1254 struct gpio_device *gdev = container_of(inode->i_cdev,
1255 struct gpio_device, chrdev);
1256
1257 /* Fail on open if the backing gpiochip is gone */
fb505747 1258 if (!gdev->chip)
3c702e99
LW
1259 return -ENODEV;
1260 get_device(&gdev->dev);
1261 filp->private_data = gdev;
f4e81c52
LPC
1262
1263 return nonseekable_open(inode, filp);
3c702e99
LW
1264}
1265
1266/**
1267 * gpio_chrdev_release() - close chardev after ioctl operations
1268 * @inode: inode for this chardev
1269 * @filp: file struct for storing private data
1270 * Returns 0 on success
1271 */
1272static int gpio_chrdev_release(struct inode *inode, struct file *filp)
1273{
1274 struct gpio_device *gdev = container_of(inode->i_cdev,
1275 struct gpio_device, chrdev);
1276
3c702e99
LW
1277 put_device(&gdev->dev);
1278 return 0;
1279}
1280
1281
1282static const struct file_operations gpio_fileops = {
1283 .release = gpio_chrdev_release,
1284 .open = gpio_chrdev_open,
1285 .owner = THIS_MODULE,
f4e81c52 1286 .llseek = no_llseek,
3c702e99 1287 .unlocked_ioctl = gpio_ioctl,
8b92e17e
LW
1288#ifdef CONFIG_COMPAT
1289 .compat_ioctl = gpio_ioctl_compat,
1290#endif
3c702e99
LW
1291};
1292
ff2b1359
LW
1293static void gpiodevice_release(struct device *dev)
1294{
1295 struct gpio_device *gdev = dev_get_drvdata(dev);
1296
1297 list_del(&gdev->list);
1298 ida_simple_remove(&gpio_ida, gdev->id);
fcf273e5 1299 kfree_const(gdev->label);
476e2fc5 1300 kfree(gdev->descs);
9efd9e69 1301 kfree(gdev);
ff2b1359
LW
1302}
1303
159f3cd9
GR
1304static int gpiochip_setup_dev(struct gpio_device *gdev)
1305{
d377f56f 1306 int ret;
159f3cd9
GR
1307
1308 cdev_init(&gdev->chrdev, &gpio_fileops);
1309 gdev->chrdev.owner = THIS_MODULE;
159f3cd9 1310 gdev->dev.devt = MKDEV(MAJOR(gpio_devt), gdev->id);
111379dc 1311
d377f56f
LW
1312 ret = cdev_device_add(&gdev->chrdev, &gdev->dev);
1313 if (ret)
1314 return ret;
111379dc
LG
1315
1316 chip_dbg(gdev->chip, "added GPIO chardev (%d:%d)\n",
1317 MAJOR(gpio_devt), gdev->id);
159f3cd9 1318
d377f56f
LW
1319 ret = gpiochip_sysfs_register(gdev);
1320 if (ret)
159f3cd9
GR
1321 goto err_remove_device;
1322
1323 /* From this point, the .release() function cleans up gpio_device */
1324 gdev->dev.release = gpiodevice_release;
159f3cd9
GR
1325 pr_debug("%s: registered GPIOs %d to %d on device: %s (%s)\n",
1326 __func__, gdev->base, gdev->base + gdev->ngpio - 1,
1327 dev_name(&gdev->dev), gdev->chip->label ? : "generic");
1328
1329 return 0;
1330
1331err_remove_device:
111379dc 1332 cdev_device_del(&gdev->chrdev, &gdev->dev);
d377f56f 1333 return ret;
159f3cd9
GR
1334}
1335
a411e81e
BG
1336static void gpiochip_machine_hog(struct gpio_chip *chip, struct gpiod_hog *hog)
1337{
1338 struct gpio_desc *desc;
1339 int rv;
1340
1341 desc = gpiochip_get_desc(chip, hog->chip_hwnum);
1342 if (IS_ERR(desc)) {
1343 pr_err("%s: unable to get GPIO desc: %ld\n",
1344 __func__, PTR_ERR(desc));
1345 return;
1346 }
1347
ba3efdff 1348 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
a411e81e
BG
1349 return;
1350
1351 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
1352 if (rv)
1353 pr_err("%s: unable to hog GPIO line (%s:%u): %d\n",
1354 __func__, chip->label, hog->chip_hwnum, rv);
1355}
1356
1357static void machine_gpiochip_add(struct gpio_chip *chip)
1358{
1359 struct gpiod_hog *hog;
1360
1361 mutex_lock(&gpio_machine_hogs_mutex);
1362
1363 list_for_each_entry(hog, &gpio_machine_hogs, list) {
1364 if (!strcmp(chip->label, hog->chip_label))
1365 gpiochip_machine_hog(chip, hog);
1366 }
1367
1368 mutex_unlock(&gpio_machine_hogs_mutex);
1369}
1370
159f3cd9
GR
1371static void gpiochip_setup_devs(void)
1372{
1373 struct gpio_device *gdev;
d377f56f 1374 int ret;
159f3cd9
GR
1375
1376 list_for_each_entry(gdev, &gpio_devices, list) {
d377f56f
LW
1377 ret = gpiochip_setup_dev(gdev);
1378 if (ret)
159f3cd9 1379 pr_err("%s: Failed to initialize gpio device (%d)\n",
d377f56f 1380 dev_name(&gdev->dev), ret);
159f3cd9
GR
1381 }
1382}
1383
959bc7b2 1384int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data,
39c3fd58
AL
1385 struct lock_class_key *lock_key,
1386 struct lock_class_key *request_key)
d2876d08
DB
1387{
1388 unsigned long flags;
d377f56f 1389 int ret = 0;
ff2b1359 1390 unsigned i;
8d0aab2f 1391 int base = chip->base;
ff2b1359 1392 struct gpio_device *gdev;
d2876d08 1393
ff2b1359
LW
1394 /*
1395 * First: allocate and populate the internal stat container, and
1396 * set up the struct device.
1397 */
969f07b4 1398 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
ff2b1359 1399 if (!gdev)
14e85c0e 1400 return -ENOMEM;
3c702e99 1401 gdev->dev.bus = &gpio_bus_type;
ff2b1359
LW
1402 gdev->chip = chip;
1403 chip->gpiodev = gdev;
1404 if (chip->parent) {
1405 gdev->dev.parent = chip->parent;
1406 gdev->dev.of_node = chip->parent->of_node;
acc6e331
TR
1407 }
1408
ff2b1359
LW
1409#ifdef CONFIG_OF_GPIO
1410 /* If the gpiochip has an assigned OF node this takes precedence */
acc6e331
TR
1411 if (chip->of_node)
1412 gdev->dev.of_node = chip->of_node;
6ff04974
BD
1413 else
1414 chip->of_node = gdev->dev.of_node;
ff2b1359 1415#endif
acc6e331 1416
ff2b1359
LW
1417 gdev->id = ida_simple_get(&gpio_ida, 0, 0, GFP_KERNEL);
1418 if (gdev->id < 0) {
d377f56f 1419 ret = gdev->id;
ff2b1359
LW
1420 goto err_free_gdev;
1421 }
1422 dev_set_name(&gdev->dev, "gpiochip%d", gdev->id);
1423 device_initialize(&gdev->dev);
1424 dev_set_drvdata(&gdev->dev, gdev);
1425 if (chip->parent && chip->parent->driver)
1426 gdev->owner = chip->parent->driver->owner;
1427 else if (chip->owner)
1428 /* TODO: remove chip->owner */
1429 gdev->owner = chip->owner;
1430 else
1431 gdev->owner = THIS_MODULE;
d2876d08 1432
476e2fc5 1433 gdev->descs = kcalloc(chip->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL);
1c3cdb18 1434 if (!gdev->descs) {
d377f56f 1435 ret = -ENOMEM;
a05a1404 1436 goto err_free_ida;
ff2b1359
LW
1437 }
1438
5ed41cc4
BJZ
1439 if (chip->ngpio == 0) {
1440 chip_err(chip, "tried to insert a GPIO chip with zero lines\n");
d377f56f 1441 ret = -EINVAL;
159f3cd9 1442 goto err_free_descs;
5ed41cc4 1443 }
df4878e9 1444
3027743f
LA
1445 if (chip->ngpio > FASTPATH_NGPIO)
1446 chip_warn(chip, "line cnt %u is greater than fast path cnt %u\n",
2ddac5ae 1447 chip->ngpio, FASTPATH_NGPIO);
3027743f 1448
fcf273e5 1449 gdev->label = kstrdup_const(chip->label ?: "unknown", GFP_KERNEL);
df4878e9 1450 if (!gdev->label) {
d377f56f 1451 ret = -ENOMEM;
476e2fc5 1452 goto err_free_descs;
df4878e9
LW
1453 }
1454
fdeb8e15 1455 gdev->ngpio = chip->ngpio;
43c54eca 1456 gdev->data = data;
5ed41cc4 1457
d2876d08
DB
1458 spin_lock_irqsave(&gpio_lock, flags);
1459
fdeb8e15
LW
1460 /*
1461 * TODO: this allocates a Linux GPIO number base in the global
1462 * GPIO numberspace for this chip. In the long run we want to
1463 * get *rid* of this numberspace and use only descriptors, but
1464 * it may be a pipe dream. It will not happen before we get rid
1465 * of the sysfs interface anyways.
1466 */
8d0aab2f
AV
1467 if (base < 0) {
1468 base = gpiochip_find_base(chip->ngpio);
1469 if (base < 0) {
d377f56f 1470 ret = base;
225fce83 1471 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1472 goto err_free_label;
8d0aab2f 1473 }
fdeb8e15
LW
1474 /*
1475 * TODO: it should not be necessary to reflect the assigned
1476 * base outside of the GPIO subsystem. Go over drivers and
1477 * see if anyone makes use of this, else drop this and assign
1478 * a poison instead.
1479 */
8d0aab2f
AV
1480 chip->base = base;
1481 }
fdeb8e15 1482 gdev->base = base;
8d0aab2f 1483
d377f56f
LW
1484 ret = gpiodev_add_to_list(gdev);
1485 if (ret) {
05aa5203 1486 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1487 goto err_free_label;
05aa5203 1488 }
1a989d0f 1489
545ebd9a
LW
1490 spin_unlock_irqrestore(&gpio_lock, flags);
1491
767cd17a
RRD
1492 for (i = 0; i < chip->ngpio; i++)
1493 gdev->descs[i].gdev = gdev;
14e85c0e 1494
f23f1516 1495#ifdef CONFIG_PINCTRL
20ec3e39 1496 INIT_LIST_HEAD(&gdev->pin_ranges);
f23f1516
SH
1497#endif
1498
d377f56f
LW
1499 ret = gpiochip_set_desc_names(chip);
1500 if (ret)
5f3ca732
MP
1501 goto err_remove_from_list;
1502
d377f56f
LW
1503 ret = gpiochip_alloc_valid_mask(chip);
1504 if (ret)
48057ed1 1505 goto err_remove_from_list;
e0d89728 1506
d377f56f
LW
1507 ret = of_gpiochip_add(chip);
1508 if (ret)
48057ed1 1509 goto err_free_gpiochip_mask;
28355f81 1510
d377f56f
LW
1511 ret = gpiochip_init_valid_mask(chip);
1512 if (ret)
35779890 1513 goto err_remove_of_chip;
f8ec92a9 1514
3edfb7bd
RRD
1515 for (i = 0; i < chip->ngpio; i++) {
1516 struct gpio_desc *desc = &gdev->descs[i];
1517
d95da993
CP
1518 if (chip->get_direction && gpiochip_line_is_valid(chip, i)) {
1519 if (!chip->get_direction(chip, i))
1520 set_bit(FLAG_IS_OUT, &desc->flags);
1521 else
1522 clear_bit(FLAG_IS_OUT, &desc->flags);
1523 } else {
1524 if (!chip->direction_input)
1525 set_bit(FLAG_IS_OUT, &desc->flags);
1526 else
1527 clear_bit(FLAG_IS_OUT, &desc->flags);
1528 }
3edfb7bd
RRD
1529 }
1530
b056ca1c
AS
1531 ret = gpiochip_add_pin_ranges(chip);
1532 if (ret)
1533 goto err_remove_of_chip;
1534
664e3e5a 1535 acpi_gpiochip_add(chip);
391c970c 1536
a411e81e
BG
1537 machine_gpiochip_add(chip);
1538
504369cd 1539 ret = gpiochip_irqchip_init_valid_mask(chip);
9411e3aa
AS
1540 if (ret)
1541 goto err_remove_acpi_chip;
1542
504369cd 1543 ret = gpiochip_irqchip_init_hw(chip);
fbdf8d4b 1544 if (ret)
48057ed1
LW
1545 goto err_remove_acpi_chip;
1546
fbdf8d4b
LW
1547 ret = gpiochip_add_irqchip(chip, lock_key, request_key);
1548 if (ret)
48057ed1
LW
1549 goto err_remove_irqchip_mask;
1550
3c702e99
LW
1551 /*
1552 * By first adding the chardev, and then adding the device,
1553 * we get a device node entry in sysfs under
1554 * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
1555 * coldplug of device nodes and other udev business.
159f3cd9
GR
1556 * We can do this only if gpiolib has been initialized.
1557 * Otherwise, defer until later.
3c702e99 1558 */
159f3cd9 1559 if (gpiolib_initialized) {
d377f56f
LW
1560 ret = gpiochip_setup_dev(gdev);
1561 if (ret)
48057ed1 1562 goto err_remove_irqchip;
159f3cd9 1563 }
cedb1881 1564 return 0;
3bae4811 1565
48057ed1
LW
1566err_remove_irqchip:
1567 gpiochip_irqchip_remove(chip);
1568err_remove_irqchip_mask:
1569 gpiochip_irqchip_free_valid_mask(chip);
35779890 1570err_remove_acpi_chip:
225fce83 1571 acpi_gpiochip_remove(chip);
35779890 1572err_remove_of_chip:
6d86750c 1573 gpiochip_free_hogs(chip);
225fce83 1574 of_gpiochip_remove(chip);
35779890 1575err_free_gpiochip_mask:
2f4133bb 1576 gpiochip_remove_pin_ranges(chip);
726cb3ba 1577 gpiochip_free_valid_mask(chip);
5f3ca732 1578err_remove_from_list:
225fce83 1579 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1580 list_del(&gdev->list);
3bae4811 1581 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1582err_free_label:
fcf273e5 1583 kfree_const(gdev->label);
476e2fc5
GR
1584err_free_descs:
1585 kfree(gdev->descs);
a05a1404 1586err_free_ida:
ff2b1359 1587 ida_simple_remove(&gpio_ida, gdev->id);
a05a1404 1588err_free_gdev:
d2876d08 1589 /* failures here can mean systems won't boot... */
1777fc97 1590 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
fdeb8e15 1591 gdev->base, gdev->base + gdev->ngpio - 1,
d377f56f 1592 chip->label ? : "generic", ret);
fdeb8e15 1593 kfree(gdev);
d377f56f 1594 return ret;
d2876d08 1595}
959bc7b2 1596EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
d2876d08 1597
43c54eca
LW
1598/**
1599 * gpiochip_get_data() - get per-subdriver data for the chip
950d55f5
TR
1600 * @chip: GPIO chip
1601 *
1602 * Returns:
1603 * The per-subdriver data for the chip.
43c54eca
LW
1604 */
1605void *gpiochip_get_data(struct gpio_chip *chip)
1606{
1607 return chip->gpiodev->data;
1608}
1609EXPORT_SYMBOL_GPL(gpiochip_get_data);
1610
d2876d08
DB
1611/**
1612 * gpiochip_remove() - unregister a gpio_chip
1613 * @chip: the chip to unregister
1614 *
1615 * A gpio_chip with any GPIOs still requested may not be removed.
1616 */
e1db1706 1617void gpiochip_remove(struct gpio_chip *chip)
d2876d08 1618{
ff2b1359 1619 struct gpio_device *gdev = chip->gpiodev;
fab28b89 1620 struct gpio_desc *desc;
d2876d08 1621 unsigned long flags;
1c3cdb18 1622 unsigned i;
fab28b89 1623 bool requested = false;
d2876d08 1624
ff2b1359 1625 /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
afbc4f31 1626 gpiochip_sysfs_unregister(gdev);
5018ada6 1627 gpiochip_free_hogs(chip);
bd203bd5
BJZ
1628 /* Numb the device, cancelling all outstanding operations */
1629 gdev->chip = NULL;
00acc3dc 1630 gpiochip_irqchip_remove(chip);
6072b9dc 1631 acpi_gpiochip_remove(chip);
391c970c 1632 of_gpiochip_remove(chip);
2f4133bb 1633 gpiochip_remove_pin_ranges(chip);
726cb3ba 1634 gpiochip_free_valid_mask(chip);
43c54eca
LW
1635 /*
1636 * We accept no more calls into the driver from this point, so
1637 * NULL the driver data pointer
1638 */
1639 gdev->data = NULL;
391c970c 1640
6798acaa 1641 spin_lock_irqsave(&gpio_lock, flags);
fdeb8e15 1642 for (i = 0; i < gdev->ngpio; i++) {
1c3cdb18 1643 desc = &gdev->descs[i];
fab28b89
JH
1644 if (test_bit(FLAG_REQUESTED, &desc->flags))
1645 requested = true;
d2876d08 1646 }
d2876d08 1647 spin_unlock_irqrestore(&gpio_lock, flags);
14e85c0e 1648
fab28b89 1649 if (requested)
fdeb8e15 1650 dev_crit(&gdev->dev,
58383c78 1651 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
fab28b89 1652
ff2b1359
LW
1653 /*
1654 * The gpiochip side puts its use of the device to rest here:
1655 * if there are no userspace clients, the chardev and device will
1656 * be removed, else it will be dangling until the last user is
1657 * gone.
1658 */
111379dc 1659 cdev_device_del(&gdev->chrdev, &gdev->dev);
ff2b1359 1660 put_device(&gdev->dev);
d2876d08
DB
1661}
1662EXPORT_SYMBOL_GPL(gpiochip_remove);
1663
0cf3292c
LD
1664static void devm_gpio_chip_release(struct device *dev, void *res)
1665{
1666 struct gpio_chip *chip = *(struct gpio_chip **)res;
1667
1668 gpiochip_remove(chip);
1669}
1670
0cf3292c 1671/**
51158416 1672 * devm_gpiochip_add_data() - Resource managed gpiochip_add_data()
3925b90f 1673 * @dev: pointer to the device that gpio_chip belongs to.
0cf3292c 1674 * @chip: the chip to register, with chip->base initialized
950d55f5 1675 * @data: driver-private data associated with this chip
0cf3292c 1676 *
950d55f5 1677 * Context: potentially before irqs will work
0cf3292c
LD
1678 *
1679 * The gpio chip automatically be released when the device is unbound.
950d55f5
TR
1680 *
1681 * Returns:
1682 * A negative errno if the chip can't be registered, such as because the
1683 * chip->base is invalid or already associated with a different chip.
1684 * Otherwise it returns zero as a success code.
0cf3292c
LD
1685 */
1686int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip,
1687 void *data)
1688{
1689 struct gpio_chip **ptr;
1690 int ret;
1691
1692 ptr = devres_alloc(devm_gpio_chip_release, sizeof(*ptr),
1693 GFP_KERNEL);
1694 if (!ptr)
1695 return -ENOMEM;
1696
1697 ret = gpiochip_add_data(chip, data);
1698 if (ret < 0) {
1699 devres_free(ptr);
1700 return ret;
1701 }
1702
1703 *ptr = chip;
1704 devres_add(dev, ptr);
1705
1706 return 0;
1707}
1708EXPORT_SYMBOL_GPL(devm_gpiochip_add_data);
1709
594fa265
GL
1710/**
1711 * gpiochip_find() - iterator for locating a specific gpio_chip
1712 * @data: data to pass to match function
950d55f5 1713 * @match: Callback function to check gpio_chip
594fa265
GL
1714 *
1715 * Similar to bus_find_device. It returns a reference to a gpio_chip as
1716 * determined by a user supplied @match callback. The callback should return
1717 * 0 if the device doesn't match and non-zero if it does. If the callback is
1718 * non-zero, this function will return to the caller and not iterate over any
1719 * more gpio_chips.
1720 */
07ce8ec7 1721struct gpio_chip *gpiochip_find(void *data,
6e2cf651 1722 int (*match)(struct gpio_chip *chip,
3d0f7cf0 1723 void *data))
594fa265 1724{
ff2b1359 1725 struct gpio_device *gdev;
acf06ff7 1726 struct gpio_chip *chip = NULL;
594fa265 1727 unsigned long flags;
594fa265
GL
1728
1729 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1730 list_for_each_entry(gdev, &gpio_devices, list)
acf06ff7
MY
1731 if (gdev->chip && match(gdev->chip, data)) {
1732 chip = gdev->chip;
594fa265 1733 break;
acf06ff7 1734 }
ff2b1359 1735
594fa265
GL
1736 spin_unlock_irqrestore(&gpio_lock, flags);
1737
1738 return chip;
1739}
8fa0c9bf 1740EXPORT_SYMBOL_GPL(gpiochip_find);
d2876d08 1741
79697ef9
AC
1742static int gpiochip_match_name(struct gpio_chip *chip, void *data)
1743{
1744 const char *name = data;
1745
1746 return !strcmp(chip->label, name);
1747}
1748
1749static struct gpio_chip *find_chip_by_name(const char *name)
1750{
1751 return gpiochip_find((void *)name, gpiochip_match_name);
1752}
1753
14250520
LW
1754#ifdef CONFIG_GPIOLIB_IRQCHIP
1755
1756/*
1757 * The following is irqchip helper code for gpiochips.
1758 */
1759
9411e3aa
AS
1760static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
1761{
1762 struct gpio_irq_chip *girq = &gc->irq;
1763
1764 if (!girq->init_hw)
1765 return 0;
1766
1767 return girq->init_hw(gc);
1768}
1769
5fbe5b58 1770static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb 1771{
5fbe5b58
LW
1772 struct gpio_irq_chip *girq = &gc->irq;
1773
1774 if (!girq->init_valid_mask)
79b804cb
MW
1775 return 0;
1776
5fbe5b58
LW
1777 girq->valid_mask = gpiochip_allocate_mask(gc);
1778 if (!girq->valid_mask)
79b804cb
MW
1779 return -ENOMEM;
1780
5fbe5b58
LW
1781 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
1782
79b804cb
MW
1783 return 0;
1784}
1785
1786static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip)
1787{
7bdbd1ec 1788 bitmap_free(gpiochip->irq.valid_mask);
dc7b0387 1789 gpiochip->irq.valid_mask = NULL;
79b804cb
MW
1790}
1791
64ff2c8e
SB
1792bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gpiochip,
1793 unsigned int offset)
79b804cb 1794{
726cb3ba
SB
1795 if (!gpiochip_line_is_valid(gpiochip, offset))
1796 return false;
79b804cb 1797 /* No mask means all valid */
dc7b0387 1798 if (likely(!gpiochip->irq.valid_mask))
79b804cb 1799 return true;
dc7b0387 1800 return test_bit(offset, gpiochip->irq.valid_mask);
79b804cb 1801}
64ff2c8e 1802EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
79b804cb 1803
14250520 1804/**
d245b3f9 1805 * gpiochip_set_cascaded_irqchip() - connects a cascaded irqchip to a gpiochip
4892d3a6 1806 * @gc: the gpiochip to set the irqchip chain to
14250520
LW
1807 * @parent_irq: the irq number corresponding to the parent IRQ for this
1808 * chained irqchip
1809 * @parent_handler: the parent interrupt handler for the accumulated IRQ
3f97d5fc
LW
1810 * coming out of the gpiochip. If the interrupt is nested rather than
1811 * cascaded, pass NULL in this handler argument
14250520 1812 */
4892d3a6 1813static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gc,
6f79309a 1814 unsigned int parent_irq,
d245b3f9 1815 irq_flow_handler_t parent_handler)
14250520 1816{
4892d3a6
LW
1817 struct gpio_irq_chip *girq = &gc->irq;
1818 struct device *dev = &gc->gpiodev->dev;
1819
1820 if (!girq->domain) {
1821 chip_err(gc, "called %s before setting up irqchip\n",
83141a77 1822 __func__);
1c8732bb
LW
1823 return;
1824 }
1825
3f97d5fc 1826 if (parent_handler) {
4892d3a6
LW
1827 if (gc->can_sleep) {
1828 chip_err(gc,
b1911710 1829 "you cannot have chained interrupts on a chip that may sleep\n");
3f97d5fc
LW
1830 return;
1831 }
4892d3a6
LW
1832 girq->parents = devm_kcalloc(dev, 1,
1833 sizeof(*girq->parents),
1834 GFP_KERNEL);
1835 if (!girq->parents) {
1836 chip_err(gc, "out of memory allocating parent IRQ\n");
1837 return;
1838 }
1839 girq->parents[0] = parent_irq;
1840 girq->num_parents = 1;
3f97d5fc
LW
1841 /*
1842 * The parent irqchip is already using the chip_data for this
1843 * irqchip, so our callbacks simply use the handler_data.
1844 */
f7f87753 1845 irq_set_chained_handler_and_data(parent_irq, parent_handler,
4892d3a6 1846 gc);
3f97d5fc 1847 }
14250520 1848}
d245b3f9
LW
1849
1850/**
1851 * gpiochip_set_chained_irqchip() - connects a chained irqchip to a gpiochip
1852 * @gpiochip: the gpiochip to set the irqchip chain to
1853 * @irqchip: the irqchip to chain to the gpiochip
1854 * @parent_irq: the irq number corresponding to the parent IRQ for this
1855 * chained irqchip
1856 * @parent_handler: the parent interrupt handler for the accumulated IRQ
40f5ff4f 1857 * coming out of the gpiochip.
d245b3f9
LW
1858 */
1859void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
1860 struct irq_chip *irqchip,
6f79309a 1861 unsigned int parent_irq,
d245b3f9
LW
1862 irq_flow_handler_t parent_handler)
1863{
60ed54ca
TR
1864 if (gpiochip->irq.threaded) {
1865 chip_err(gpiochip, "tried to chain a threaded gpiochip\n");
1866 return;
1867 }
1868
3c1f6b2d 1869 gpiochip_set_cascaded_irqchip(gpiochip, parent_irq, parent_handler);
d245b3f9 1870}
14250520
LW
1871EXPORT_SYMBOL_GPL(gpiochip_set_chained_irqchip);
1872
d245b3f9
LW
1873/**
1874 * gpiochip_set_nested_irqchip() - connects a nested irqchip to a gpiochip
1875 * @gpiochip: the gpiochip to set the irqchip nested handler to
1876 * @irqchip: the irqchip to nest to the gpiochip
1877 * @parent_irq: the irq number corresponding to the parent IRQ for this
1878 * nested irqchip
1879 */
1880void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip,
1881 struct irq_chip *irqchip,
6f79309a 1882 unsigned int parent_irq)
d245b3f9 1883{
3c1f6b2d 1884 gpiochip_set_cascaded_irqchip(gpiochip, parent_irq, NULL);
d245b3f9
LW
1885}
1886EXPORT_SYMBOL_GPL(gpiochip_set_nested_irqchip);
1887
fdd61a01
LW
1888#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1889
1890/**
1891 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
1892 * to a gpiochip
1893 * @gc: the gpiochip to set the irqchip hierarchical handler to
1894 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
1895 * will then percolate up to the parent
1896 */
1897static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
1898 struct irq_chip *irqchip)
1899{
1900 /* DT will deal with mapping each IRQ as we go along */
1901 if (is_of_node(gc->irq.fwnode))
1902 return;
1903
1904 /*
1905 * This is for legacy and boardfile "irqchip" fwnodes: allocate
1906 * irqs upfront instead of dynamically since we don't have the
1907 * dynamic type of allocation that hardware description languages
1908 * provide. Once all GPIO drivers using board files are gone from
1909 * the kernel we can delete this code, but for a transitional period
1910 * it is necessary to keep this around.
1911 */
1912 if (is_fwnode_irqchip(gc->irq.fwnode)) {
1913 int i;
1914 int ret;
1915
1916 for (i = 0; i < gc->ngpio; i++) {
1917 struct irq_fwspec fwspec;
1918 unsigned int parent_hwirq;
1919 unsigned int parent_type;
1920 struct gpio_irq_chip *girq = &gc->irq;
1921
1922 /*
1923 * We call the child to parent translation function
1924 * only to check if the child IRQ is valid or not.
1925 * Just pick the rising edge type here as that is what
1926 * we likely need to support.
1927 */
1928 ret = girq->child_to_parent_hwirq(gc, i,
1929 IRQ_TYPE_EDGE_RISING,
1930 &parent_hwirq,
1931 &parent_type);
1932 if (ret) {
1933 chip_err(gc, "skip set-up on hwirq %d\n",
1934 i);
1935 continue;
1936 }
1937
1938 fwspec.fwnode = gc->irq.fwnode;
1939 /* This is the hwirq for the GPIO line side of things */
1940 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
1941 /* Just pick something */
1942 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
1943 fwspec.param_count = 2;
1944 ret = __irq_domain_alloc_irqs(gc->irq.domain,
1945 /* just pick something */
1946 -1,
1947 1,
1948 NUMA_NO_NODE,
1949 &fwspec,
1950 false,
1951 NULL);
1952 if (ret < 0) {
1953 chip_err(gc,
1954 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1955 i, parent_hwirq,
1956 ret);
1957 }
1958 }
1959 }
1960
1961 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1962
1963 return;
1964}
1965
1966static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1967 struct irq_fwspec *fwspec,
1968 unsigned long *hwirq,
1969 unsigned int *type)
1970{
1971 /* We support standard DT translation */
1972 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1973 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1974 }
1975
1976 /* This is for board files and others not using DT */
1977 if (is_fwnode_irqchip(fwspec->fwnode)) {
1978 int ret;
1979
1980 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1981 if (ret)
1982 return ret;
1983 WARN_ON(*type == IRQ_TYPE_NONE);
1984 return 0;
1985 }
1986 return -EINVAL;
1987}
1988
1989static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1990 unsigned int irq,
1991 unsigned int nr_irqs,
1992 void *data)
1993{
1994 struct gpio_chip *gc = d->host_data;
1995 irq_hw_number_t hwirq;
1996 unsigned int type = IRQ_TYPE_NONE;
1997 struct irq_fwspec *fwspec = data;
1998 struct irq_fwspec parent_fwspec;
1999 unsigned int parent_hwirq;
2000 unsigned int parent_type;
2001 struct gpio_irq_chip *girq = &gc->irq;
2002 int ret;
2003
2004 /*
2005 * The nr_irqs parameter is always one except for PCI multi-MSI
2006 * so this should not happen.
2007 */
2008 WARN_ON(nr_irqs != 1);
2009
2010 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
2011 if (ret)
2012 return ret;
2013
2014 chip_info(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
2015
2016 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
2017 &parent_hwirq, &parent_type);
2018 if (ret) {
2019 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
2020 return ret;
2021 }
2022 chip_info(gc, "found parent hwirq %u\n", parent_hwirq);
2023
2024 /*
2025 * We set handle_bad_irq because the .set_type() should
2026 * always be invoked and set the right type of handler.
2027 */
2028 irq_domain_set_info(d,
2029 irq,
2030 hwirq,
2031 gc->irq.chip,
2032 gc,
2033 girq->handler,
2034 NULL, NULL);
2035 irq_set_probe(irq);
2036
2037 /*
2038 * Create a IRQ fwspec to send up to the parent irqdomain:
2039 * specify the hwirq we address on the parent and tie it
2040 * all together up the chain.
2041 */
2042 parent_fwspec.fwnode = d->parent->fwnode;
2043 /* This parent only handles asserted level IRQs */
2044 girq->populate_parent_fwspec(gc, &parent_fwspec, parent_hwirq,
2045 parent_type);
2046 chip_info(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
2047 irq, parent_hwirq);
2048 ret = irq_domain_alloc_irqs_parent(d, irq, 1, &parent_fwspec);
2049 if (ret)
2050 chip_err(gc,
2051 "failed to allocate parent hwirq %d for hwirq %lu\n",
2052 parent_hwirq, hwirq);
2053
2054 return ret;
2055}
2056
2057static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *chip,
2058 unsigned int offset)
2059{
2060 return offset;
2061}
2062
2063static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
2064{
2065 ops->activate = gpiochip_irq_domain_activate;
2066 ops->deactivate = gpiochip_irq_domain_deactivate;
2067 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
2068 ops->free = irq_domain_free_irqs_common;
2069
2070 /*
2071 * We only allow overriding the translate() function for
2072 * hierarchical chips, and this should only be done if the user
2073 * really need something other than 1:1 translation.
2074 */
2075 if (!ops->translate)
2076 ops->translate = gpiochip_hierarchy_irq_domain_translate;
2077}
2078
2079static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
2080{
2081 if (!gc->irq.child_to_parent_hwirq ||
2082 !gc->irq.fwnode) {
2083 chip_err(gc, "missing irqdomain vital data\n");
2084 return -EINVAL;
2085 }
2086
2087 if (!gc->irq.child_offset_to_irq)
2088 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
2089
2090 if (!gc->irq.populate_parent_fwspec)
2091 gc->irq.populate_parent_fwspec =
2092 gpiochip_populate_parent_fwspec_twocell;
2093
2094 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
2095
2096 gc->irq.domain = irq_domain_create_hierarchy(
2097 gc->irq.parent_domain,
2098 0,
2099 gc->ngpio,
2100 gc->irq.fwnode,
2101 &gc->irq.child_irq_domain_ops,
2102 gc);
2103
2104 if (!gc->irq.domain)
2105 return -ENOMEM;
2106
2107 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
2108
2109 return 0;
2110}
2111
2112static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
2113{
2114 return !!gc->irq.parent_domain;
2115}
2116
2117void gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *chip,
2118 struct irq_fwspec *fwspec,
2119 unsigned int parent_hwirq,
2120 unsigned int parent_type)
2121{
2122 fwspec->param_count = 2;
2123 fwspec->param[0] = parent_hwirq;
2124 fwspec->param[1] = parent_type;
2125}
2126EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
2127
2128void gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *chip,
2129 struct irq_fwspec *fwspec,
2130 unsigned int parent_hwirq,
2131 unsigned int parent_type)
2132{
2133 fwspec->param_count = 4;
2134 fwspec->param[0] = 0;
2135 fwspec->param[1] = parent_hwirq;
2136 fwspec->param[2] = 0;
2137 fwspec->param[3] = parent_type;
2138}
2139EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
2140
2141#else
2142
2143static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
2144{
2145 return -EINVAL;
2146}
2147
2148static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
2149{
2150 return false;
2151}
2152
2153#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
2154
14250520
LW
2155/**
2156 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
2157 * @d: the irqdomain used by this irqchip
2158 * @irq: the global irq number used by this GPIO irqchip irq
2159 * @hwirq: the local IRQ/GPIO line offset on this gpiochip
2160 *
2161 * This function will set up the mapping for a certain IRQ line on a
2162 * gpiochip by assigning the gpiochip as chip data, and using the irqchip
2163 * stored inside the gpiochip.
2164 */
1b95b4eb
TR
2165int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
2166 irq_hw_number_t hwirq)
14250520
LW
2167{
2168 struct gpio_chip *chip = d->host_data;
d377f56f 2169 int ret = 0;
14250520 2170
dc749a09
GS
2171 if (!gpiochip_irqchip_irq_valid(chip, hwirq))
2172 return -ENXIO;
2173
14250520 2174 irq_set_chip_data(irq, chip);
a0a8bcf4
GS
2175 /*
2176 * This lock class tells lockdep that GPIO irqs are in a different
2177 * category than their parents, so it won't report false recursion.
2178 */
39c3fd58 2179 irq_set_lockdep_class(irq, chip->irq.lock_key, chip->irq.request_key);
c7a0aa59 2180 irq_set_chip_and_handler(irq, chip->irq.chip, chip->irq.handler);
d245b3f9 2181 /* Chips that use nested thread handlers have them marked */
60ed54ca 2182 if (chip->irq.threaded)
1c8732bb 2183 irq_set_nested_thread(irq, 1);
14250520 2184 irq_set_noprobe(irq);
23393d49 2185
e0d89728 2186 if (chip->irq.num_parents == 1)
d377f56f 2187 ret = irq_set_parent(irq, chip->irq.parents[0]);
e0d89728 2188 else if (chip->irq.map)
d377f56f 2189 ret = irq_set_parent(irq, chip->irq.map[hwirq]);
e0d89728 2190
d377f56f
LW
2191 if (ret < 0)
2192 return ret;
e0d89728 2193
1333b90f
LW
2194 /*
2195 * No set-up of the hardware will happen if IRQ_TYPE_NONE
2196 * is passed as default type.
2197 */
3634eeb0
TR
2198 if (chip->irq.default_type != IRQ_TYPE_NONE)
2199 irq_set_irq_type(irq, chip->irq.default_type);
14250520
LW
2200
2201 return 0;
2202}
1b95b4eb 2203EXPORT_SYMBOL_GPL(gpiochip_irq_map);
14250520 2204
1b95b4eb 2205void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
c3626fde 2206{
1c8732bb
LW
2207 struct gpio_chip *chip = d->host_data;
2208
60ed54ca 2209 if (chip->irq.threaded)
1c8732bb 2210 irq_set_nested_thread(irq, 0);
c3626fde
LW
2211 irq_set_chip_and_handler(irq, NULL, NULL);
2212 irq_set_chip_data(irq, NULL);
2213}
1b95b4eb 2214EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
c3626fde 2215
14250520
LW
2216static const struct irq_domain_ops gpiochip_domain_ops = {
2217 .map = gpiochip_irq_map,
c3626fde 2218 .unmap = gpiochip_irq_unmap,
14250520
LW
2219 /* Virtually all GPIO irqchips are twocell:ed */
2220 .xlate = irq_domain_xlate_twocell,
2221};
2222
fdd61a01
LW
2223/*
2224 * TODO: move these activate/deactivate in under the hierarchicial
2225 * irqchip implementation as static once SPMI and SSBI (all external
2226 * users) are phased over.
2227 */
ef74f70e
BM
2228/**
2229 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
2230 * @domain: The IRQ domain used by this IRQ chip
2231 * @data: Outermost irq_data associated with the IRQ
2232 * @reserve: If set, only reserve an interrupt vector instead of assigning one
2233 *
2234 * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
2235 * used as the activate function for the &struct irq_domain_ops. The host_data
2236 * for the IRQ domain must be the &struct gpio_chip.
2237 */
2238int gpiochip_irq_domain_activate(struct irq_domain *domain,
2239 struct irq_data *data, bool reserve)
2240{
2241 struct gpio_chip *chip = domain->host_data;
2242
2243 return gpiochip_lock_as_irq(chip, data->hwirq);
2244}
2245EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
2246
2247/**
2248 * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
2249 * @domain: The IRQ domain used by this IRQ chip
2250 * @data: Outermost irq_data associated with the IRQ
2251 *
2252 * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
2253 * be used as the deactivate function for the &struct irq_domain_ops. The
2254 * host_data for the IRQ domain must be the &struct gpio_chip.
2255 */
2256void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
2257 struct irq_data *data)
2258{
2259 struct gpio_chip *chip = domain->host_data;
2260
2261 return gpiochip_unlock_as_irq(chip, data->hwirq);
2262}
2263EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
2264
4e6b8238 2265static int gpiochip_to_irq(struct gpio_chip *chip, unsigned offset)
14250520 2266{
fdd61a01
LW
2267 struct irq_domain *domain = chip->irq.domain;
2268
4e6b8238
HV
2269 if (!gpiochip_irqchip_irq_valid(chip, offset))
2270 return -ENXIO;
5b76e79c 2271
fdd61a01
LW
2272#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2273 if (irq_domain_is_hierarchy(domain)) {
2274 struct irq_fwspec spec;
2275
2276 spec.fwnode = domain->fwnode;
2277 spec.param_count = 2;
2278 spec.param[0] = chip->irq.child_offset_to_irq(chip, offset);
2279 spec.param[1] = IRQ_TYPE_NONE;
2280
2281 return irq_create_fwspec_mapping(&spec);
2282 }
2283#endif
2284
2285 return irq_create_mapping(domain, offset);
14250520
LW
2286}
2287
14250520
LW
2288static int gpiochip_irq_reqres(struct irq_data *d)
2289{
2290 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
5b76e79c 2291
4e6b8238 2292 return gpiochip_reqres_irq(chip, d->hwirq);
14250520
LW
2293}
2294
2295static void gpiochip_irq_relres(struct irq_data *d)
2296{
2297 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
2298
4e6b8238 2299 gpiochip_relres_irq(chip, d->hwirq);
14250520
LW
2300}
2301
461c1a7d 2302static void gpiochip_irq_enable(struct irq_data *d)
14250520 2303{
461c1a7d 2304 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
e0d89728 2305
461c1a7d
HV
2306 gpiochip_enable_irq(chip, d->hwirq);
2307 if (chip->irq.irq_enable)
2308 chip->irq.irq_enable(d);
2309 else
2310 chip->irq.chip->irq_unmask(d);
2311}
2312
2313static void gpiochip_irq_disable(struct irq_data *d)
2314{
2315 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
2316
2317 if (chip->irq.irq_disable)
2318 chip->irq.irq_disable(d);
2319 else
2320 chip->irq.chip->irq_mask(d);
2321 gpiochip_disable_irq(chip, d->hwirq);
2322}
2323
ca620f2d
HV
2324static void gpiochip_set_irq_hooks(struct gpio_chip *gpiochip)
2325{
2326 struct irq_chip *irqchip = gpiochip->irq.chip;
2327
2328 if (!irqchip->irq_request_resources &&
2329 !irqchip->irq_release_resources) {
2330 irqchip->irq_request_resources = gpiochip_irq_reqres;
2331 irqchip->irq_release_resources = gpiochip_irq_relres;
2332 }
461c1a7d
HV
2333 if (WARN_ON(gpiochip->irq.irq_enable))
2334 return;
171948ea
HV
2335 /* Check if the irqchip already has this hook... */
2336 if (irqchip->irq_enable == gpiochip_irq_enable) {
2337 /*
2338 * ...and if so, give a gentle warning that this is bad
2339 * practice.
2340 */
2341 chip_info(gpiochip,
2342 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
2343 return;
2344 }
461c1a7d
HV
2345 gpiochip->irq.irq_enable = irqchip->irq_enable;
2346 gpiochip->irq.irq_disable = irqchip->irq_disable;
2347 irqchip->irq_enable = gpiochip_irq_enable;
2348 irqchip->irq_disable = gpiochip_irq_disable;
14250520
LW
2349}
2350
e0d89728
TR
2351/**
2352 * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
2353 * @gpiochip: the GPIO chip to add the IRQ chip to
39c3fd58
AL
2354 * @lock_key: lockdep class for IRQ lock
2355 * @request_key: lockdep class for IRQ request
e0d89728 2356 */
959bc7b2 2357static int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
2358 struct lock_class_key *lock_key,
2359 struct lock_class_key *request_key)
e0d89728
TR
2360{
2361 struct irq_chip *irqchip = gpiochip->irq.chip;
fdd61a01 2362 const struct irq_domain_ops *ops = NULL;
e0d89728
TR
2363 struct device_node *np;
2364 unsigned int type;
2365 unsigned int i;
2366
2367 if (!irqchip)
2368 return 0;
2369
2370 if (gpiochip->irq.parent_handler && gpiochip->can_sleep) {
b1911710 2371 chip_err(gpiochip, "you cannot have chained interrupts on a chip that may sleep\n");
e0d89728
TR
2372 return -EINVAL;
2373 }
2374
2375 np = gpiochip->gpiodev->dev.of_node;
2376 type = gpiochip->irq.default_type;
2377
2378 /*
2379 * Specifying a default trigger is a terrible idea if DT or ACPI is
2380 * used to configure the interrupts, as you may end up with
2381 * conflicting triggers. Tell the user, and reset to NONE.
2382 */
2383 if (WARN(np && type != IRQ_TYPE_NONE,
2384 "%s: Ignoring %u default trigger\n", np->full_name, type))
2385 type = IRQ_TYPE_NONE;
2386
2387 if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) {
2388 acpi_handle_warn(ACPI_HANDLE(gpiochip->parent),
2389 "Ignoring %u default trigger\n", type);
2390 type = IRQ_TYPE_NONE;
2391 }
2392
2393 gpiochip->to_irq = gpiochip_to_irq;
2394 gpiochip->irq.default_type = type;
959bc7b2 2395 gpiochip->irq.lock_key = lock_key;
39c3fd58 2396 gpiochip->irq.request_key = request_key;
e0d89728 2397
fdd61a01
LW
2398 /* If a parent irqdomain is provided, let's build a hierarchy */
2399 if (gpiochip_hierarchy_is_hierarchical(gpiochip)) {
2400 int ret = gpiochip_hierarchy_add_domain(gpiochip);
2401 if (ret)
2402 return ret;
2403 } else {
2404 /* Some drivers provide custom irqdomain ops */
2405 if (gpiochip->irq.domain_ops)
2406 ops = gpiochip->irq.domain_ops;
2407
2408 if (!ops)
2409 ops = &gpiochip_domain_ops;
2410 gpiochip->irq.domain = irq_domain_add_simple(np,
2411 gpiochip->ngpio,
2412 gpiochip->irq.first,
2413 ops, gpiochip);
2414 if (!gpiochip->irq.domain)
2415 return -EINVAL;
2416 }
e0d89728 2417
e0d89728
TR
2418 if (gpiochip->irq.parent_handler) {
2419 void *data = gpiochip->irq.parent_handler_data ?: gpiochip;
2420
2421 for (i = 0; i < gpiochip->irq.num_parents; i++) {
2422 /*
2423 * The parent IRQ chip is already using the chip_data
2424 * for this IRQ chip, so our callbacks simply use the
2425 * handler_data.
2426 */
2427 irq_set_chained_handler_and_data(gpiochip->irq.parents[i],
2428 gpiochip->irq.parent_handler,
2429 data);
2430 }
e0d89728
TR
2431 }
2432
ca620f2d
HV
2433 gpiochip_set_irq_hooks(gpiochip);
2434
e0d89728
TR
2435 acpi_gpiochip_request_interrupts(gpiochip);
2436
2437 return 0;
2438}
2439
14250520
LW
2440/**
2441 * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
2442 * @gpiochip: the gpiochip to remove the irqchip from
2443 *
2444 * This is called only from gpiochip_remove()
2445 */
2446static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)
2447{
ca620f2d 2448 struct irq_chip *irqchip = gpiochip->irq.chip;
39e5f096 2449 unsigned int offset;
c3626fde 2450
afa82fab
MW
2451 acpi_gpiochip_free_interrupts(gpiochip);
2452
ca620f2d 2453 if (irqchip && gpiochip->irq.parent_handler) {
39e5f096
TR
2454 struct gpio_irq_chip *irq = &gpiochip->irq;
2455 unsigned int i;
2456
2457 for (i = 0; i < irq->num_parents; i++)
2458 irq_set_chained_handler_and_data(irq->parents[i],
2459 NULL, NULL);
25e4fe92
DES
2460 }
2461
c3626fde 2462 /* Remove all IRQ mappings and delete the domain */
f0fbe7bc 2463 if (gpiochip->irq.domain) {
39e5f096
TR
2464 unsigned int irq;
2465
79b804cb
MW
2466 for (offset = 0; offset < gpiochip->ngpio; offset++) {
2467 if (!gpiochip_irqchip_irq_valid(gpiochip, offset))
2468 continue;
f0fbe7bc
TR
2469
2470 irq = irq_find_mapping(gpiochip->irq.domain, offset);
2471 irq_dispose_mapping(irq);
79b804cb 2472 }
f0fbe7bc
TR
2473
2474 irq_domain_remove(gpiochip->irq.domain);
c3626fde 2475 }
14250520 2476
461c1a7d
HV
2477 if (irqchip) {
2478 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
2479 irqchip->irq_request_resources = NULL;
2480 irqchip->irq_release_resources = NULL;
2481 }
2482 if (irqchip->irq_enable == gpiochip_irq_enable) {
2483 irqchip->irq_enable = gpiochip->irq.irq_enable;
2484 irqchip->irq_disable = gpiochip->irq.irq_disable;
2485 }
14250520 2486 }
461c1a7d
HV
2487 gpiochip->irq.irq_enable = NULL;
2488 gpiochip->irq.irq_disable = NULL;
ca620f2d 2489 gpiochip->irq.chip = NULL;
79b804cb
MW
2490
2491 gpiochip_irqchip_free_valid_mask(gpiochip);
14250520
LW
2492}
2493
2494/**
739e6f59 2495 * gpiochip_irqchip_add_key() - adds an irqchip to a gpiochip
14250520
LW
2496 * @gpiochip: the gpiochip to add the irqchip to
2497 * @irqchip: the irqchip to add to the gpiochip
2498 * @first_irq: if not dynamically assigned, the base (first) IRQ to
2499 * allocate gpiochip irqs from
2500 * @handler: the irq handler to use (often a predefined irq core function)
1333b90f
LW
2501 * @type: the default type for IRQs on this irqchip, pass IRQ_TYPE_NONE
2502 * to have the core avoid setting up any default type in the hardware.
60ed54ca 2503 * @threaded: whether this irqchip uses a nested thread handler
39c3fd58
AL
2504 * @lock_key: lockdep class for IRQ lock
2505 * @request_key: lockdep class for IRQ request
14250520
LW
2506 *
2507 * This function closely associates a certain irqchip with a certain
2508 * gpiochip, providing an irq domain to translate the local IRQs to
2509 * global irqs in the gpiolib core, and making sure that the gpiochip
2510 * is passed as chip data to all related functions. Driver callbacks
09dd5f9e 2511 * need to use gpiochip_get_data() to get their local state containers back
14250520
LW
2512 * from the gpiochip passed as chip data. An irqdomain will be stored
2513 * in the gpiochip that shall be used by the driver to handle IRQ number
2514 * translation. The gpiochip will need to be initialized and registered
2515 * before calling this function.
2516 *
c3626fde
LW
2517 * This function will handle two cell:ed simple IRQs and assumes all
2518 * the pins on the gpiochip can generate a unique IRQ. Everything else
14250520
LW
2519 * need to be open coded.
2520 */
739e6f59
LW
2521int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip,
2522 struct irq_chip *irqchip,
2523 unsigned int first_irq,
2524 irq_flow_handler_t handler,
2525 unsigned int type,
60ed54ca 2526 bool threaded,
39c3fd58
AL
2527 struct lock_class_key *lock_key,
2528 struct lock_class_key *request_key)
14250520
LW
2529{
2530 struct device_node *of_node;
14250520
LW
2531
2532 if (!gpiochip || !irqchip)
2533 return -EINVAL;
2534
58383c78 2535 if (!gpiochip->parent) {
14250520
LW
2536 pr_err("missing gpiochip .dev parent pointer\n");
2537 return -EINVAL;
2538 }
60ed54ca 2539 gpiochip->irq.threaded = threaded;
58383c78 2540 of_node = gpiochip->parent->of_node;
14250520
LW
2541#ifdef CONFIG_OF_GPIO
2542 /*
20a8a968 2543 * If the gpiochip has an assigned OF node this takes precedence
c88402c2
BJZ
2544 * FIXME: get rid of this and use gpiochip->parent->of_node
2545 * everywhere
14250520
LW
2546 */
2547 if (gpiochip->of_node)
2548 of_node = gpiochip->of_node;
2549#endif
332e99d5 2550 /*
0a1e0053 2551 * Specifying a default trigger is a terrible idea if DT or ACPI is
332e99d5
MZ
2552 * used to configure the interrupts, as you may end-up with
2553 * conflicting triggers. Tell the user, and reset to NONE.
2554 */
2555 if (WARN(of_node && type != IRQ_TYPE_NONE,
7eb6ce2f 2556 "%pOF: Ignoring %d default trigger\n", of_node, type))
332e99d5 2557 type = IRQ_TYPE_NONE;
0a1e0053
MW
2558 if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) {
2559 acpi_handle_warn(ACPI_HANDLE(gpiochip->parent),
2560 "Ignoring %d default trigger\n", type);
2561 type = IRQ_TYPE_NONE;
2562 }
332e99d5 2563
da80ff81 2564 gpiochip->irq.chip = irqchip;
c7a0aa59 2565 gpiochip->irq.handler = handler;
3634eeb0 2566 gpiochip->irq.default_type = type;
14250520 2567 gpiochip->to_irq = gpiochip_to_irq;
ca9df053 2568 gpiochip->irq.lock_key = lock_key;
39c3fd58 2569 gpiochip->irq.request_key = request_key;
f0fbe7bc 2570 gpiochip->irq.domain = irq_domain_add_simple(of_node,
14250520
LW
2571 gpiochip->ngpio, first_irq,
2572 &gpiochip_domain_ops, gpiochip);
f0fbe7bc 2573 if (!gpiochip->irq.domain) {
da80ff81 2574 gpiochip->irq.chip = NULL;
14250520
LW
2575 return -EINVAL;
2576 }
8b67a1f0 2577
ca620f2d 2578 gpiochip_set_irq_hooks(gpiochip);
14250520 2579
afa82fab
MW
2580 acpi_gpiochip_request_interrupts(gpiochip);
2581
14250520
LW
2582 return 0;
2583}
739e6f59 2584EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_key);
14250520
LW
2585
2586#else /* CONFIG_GPIOLIB_IRQCHIP */
2587
959bc7b2 2588static inline int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
2589 struct lock_class_key *lock_key,
2590 struct lock_class_key *request_key)
e0d89728
TR
2591{
2592 return 0;
2593}
14250520 2594static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip) {}
9411e3aa
AS
2595
2596static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gpiochip)
2597{
2598 return 0;
2599}
2600
79b804cb
MW
2601static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip)
2602{
2603 return 0;
2604}
2605static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip)
2606{ }
14250520
LW
2607
2608#endif /* CONFIG_GPIOLIB_IRQCHIP */
2609
c771c2f4
JG
2610/**
2611 * gpiochip_generic_request() - request the gpio function for a pin
2612 * @chip: the gpiochip owning the GPIO
2613 * @offset: the offset of the GPIO to request for GPIO function
2614 */
2615int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset)
2616{
a9a1d2a7 2617 return pinctrl_gpio_request(chip->gpiodev->base + offset);
c771c2f4
JG
2618}
2619EXPORT_SYMBOL_GPL(gpiochip_generic_request);
2620
2621/**
2622 * gpiochip_generic_free() - free the gpio function from a pin
2623 * @chip: the gpiochip to request the gpio function for
2624 * @offset: the offset of the GPIO to free from GPIO function
2625 */
2626void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset)
2627{
a9a1d2a7 2628 pinctrl_gpio_free(chip->gpiodev->base + offset);
c771c2f4
JG
2629}
2630EXPORT_SYMBOL_GPL(gpiochip_generic_free);
2631
2956b5d9
MW
2632/**
2633 * gpiochip_generic_config() - apply configuration for a pin
2634 * @chip: the gpiochip owning the GPIO
2635 * @offset: the offset of the GPIO to apply the configuration
2636 * @config: the configuration to be applied
2637 */
2638int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset,
2639 unsigned long config)
2640{
2641 return pinctrl_gpio_set_config(chip->gpiodev->base + offset, config);
2642}
2643EXPORT_SYMBOL_GPL(gpiochip_generic_config);
2644
f23f1516 2645#ifdef CONFIG_PINCTRL
165adc9c 2646
586a87e6
CR
2647/**
2648 * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
2649 * @chip: the gpiochip to add the range for
d32651f6 2650 * @pctldev: the pin controller to map to
586a87e6
CR
2651 * @gpio_offset: the start offset in the current gpio_chip number space
2652 * @pin_group: name of the pin group inside the pin controller
973c1714
CL
2653 *
2654 * Calling this function directly from a DeviceTree-supported
2655 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2656 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2657 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
586a87e6
CR
2658 */
2659int gpiochip_add_pingroup_range(struct gpio_chip *chip,
2660 struct pinctrl_dev *pctldev,
2661 unsigned int gpio_offset, const char *pin_group)
2662{
2663 struct gpio_pin_range *pin_range;
fdeb8e15 2664 struct gpio_device *gdev = chip->gpiodev;
586a87e6
CR
2665 int ret;
2666
2667 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
2668 if (!pin_range) {
1a2a99c6 2669 chip_err(chip, "failed to allocate pin ranges\n");
586a87e6
CR
2670 return -ENOMEM;
2671 }
2672
2673 /* Use local offset as range ID */
2674 pin_range->range.id = gpio_offset;
2675 pin_range->range.gc = chip;
2676 pin_range->range.name = chip->label;
fdeb8e15 2677 pin_range->range.base = gdev->base + gpio_offset;
586a87e6
CR
2678 pin_range->pctldev = pctldev;
2679
2680 ret = pinctrl_get_group_pins(pctldev, pin_group,
2681 &pin_range->range.pins,
2682 &pin_range->range.npins);
61c6375d
MN
2683 if (ret < 0) {
2684 kfree(pin_range);
586a87e6 2685 return ret;
61c6375d 2686 }
586a87e6
CR
2687
2688 pinctrl_add_gpio_range(pctldev, &pin_range->range);
2689
1a2a99c6
AS
2690 chip_dbg(chip, "created GPIO range %d->%d ==> %s PINGRP %s\n",
2691 gpio_offset, gpio_offset + pin_range->range.npins - 1,
586a87e6
CR
2692 pinctrl_dev_get_devname(pctldev), pin_group);
2693
20ec3e39 2694 list_add_tail(&pin_range->node, &gdev->pin_ranges);
586a87e6
CR
2695
2696 return 0;
2697}
2698EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
2699
3f0f8670
LW
2700/**
2701 * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
2702 * @chip: the gpiochip to add the range for
950d55f5 2703 * @pinctl_name: the dev_name() of the pin controller to map to
316511c0
LW
2704 * @gpio_offset: the start offset in the current gpio_chip number space
2705 * @pin_offset: the start offset in the pin controller number space
3f0f8670
LW
2706 * @npins: the number of pins from the offset of each pin space (GPIO and
2707 * pin controller) to accumulate in this range
950d55f5
TR
2708 *
2709 * Returns:
2710 * 0 on success, or a negative error-code on failure.
973c1714
CL
2711 *
2712 * Calling this function directly from a DeviceTree-supported
2713 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2714 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2715 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
3f0f8670 2716 */
1e63d7b9 2717int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
316511c0 2718 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 2719 unsigned int npins)
f23f1516
SH
2720{
2721 struct gpio_pin_range *pin_range;
fdeb8e15 2722 struct gpio_device *gdev = chip->gpiodev;
b4d4b1f0 2723 int ret;
f23f1516 2724
3f0f8670 2725 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
f23f1516 2726 if (!pin_range) {
1a2a99c6 2727 chip_err(chip, "failed to allocate pin ranges\n");
1e63d7b9 2728 return -ENOMEM;
f23f1516
SH
2729 }
2730
3f0f8670 2731 /* Use local offset as range ID */
316511c0 2732 pin_range->range.id = gpio_offset;
3f0f8670 2733 pin_range->range.gc = chip;
f23f1516 2734 pin_range->range.name = chip->label;
fdeb8e15 2735 pin_range->range.base = gdev->base + gpio_offset;
316511c0 2736 pin_range->range.pin_base = pin_offset;
f23f1516 2737 pin_range->range.npins = npins;
192c369c 2738 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
f23f1516 2739 &pin_range->range);
8f23ca1a 2740 if (IS_ERR(pin_range->pctldev)) {
b4d4b1f0 2741 ret = PTR_ERR(pin_range->pctldev);
1a2a99c6 2742 chip_err(chip, "could not create pin range\n");
3f0f8670 2743 kfree(pin_range);
b4d4b1f0 2744 return ret;
3f0f8670 2745 }
1a2a99c6
AS
2746 chip_dbg(chip, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
2747 gpio_offset, gpio_offset + npins - 1,
316511c0
LW
2748 pinctl_name,
2749 pin_offset, pin_offset + npins - 1);
f23f1516 2750
20ec3e39 2751 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1e63d7b9
LW
2752
2753 return 0;
f23f1516 2754}
165adc9c 2755EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
f23f1516 2756
3f0f8670
LW
2757/**
2758 * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
2759 * @chip: the chip to remove all the mappings for
2760 */
f23f1516
SH
2761void gpiochip_remove_pin_ranges(struct gpio_chip *chip)
2762{
2763 struct gpio_pin_range *pin_range, *tmp;
20ec3e39 2764 struct gpio_device *gdev = chip->gpiodev;
f23f1516 2765
20ec3e39 2766 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
f23f1516
SH
2767 list_del(&pin_range->node);
2768 pinctrl_remove_gpio_range(pin_range->pctldev,
2769 &pin_range->range);
3f0f8670 2770 kfree(pin_range);
f23f1516
SH
2771 }
2772}
165adc9c
LW
2773EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
2774
2775#endif /* CONFIG_PINCTRL */
f23f1516 2776
d2876d08
DB
2777/* These "optional" allocation calls help prevent drivers from stomping
2778 * on each other, and help provide better diagnostics in debugfs.
2779 * They're called even less than the "set direction" calls.
2780 */
fac9d885 2781static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
d2876d08 2782{
fdeb8e15 2783 struct gpio_chip *chip = desc->gdev->chip;
d377f56f 2784 int ret;
d2876d08 2785 unsigned long flags;
3789f5ac 2786 unsigned offset;
d2876d08 2787
18534df4
MS
2788 if (label) {
2789 label = kstrdup_const(label, GFP_KERNEL);
2790 if (!label)
2791 return -ENOMEM;
2792 }
2793
bcabdef1
AC
2794 spin_lock_irqsave(&gpio_lock, flags);
2795
d2876d08 2796 /* NOTE: gpio_request() can be called in early boot,
35e8bb51 2797 * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
d2876d08
DB
2798 */
2799
2800 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
2801 desc_set_label(desc, label ? : "?");
d377f56f 2802 ret = 0;
438d8908 2803 } else {
18534df4 2804 kfree_const(label);
d377f56f 2805 ret = -EBUSY;
7460db56 2806 goto done;
35e8bb51
DB
2807 }
2808
2809 if (chip->request) {
2810 /* chip->request may sleep */
2811 spin_unlock_irqrestore(&gpio_lock, flags);
3789f5ac
BD
2812 offset = gpio_chip_hwgpio(desc);
2813 if (gpiochip_line_is_valid(chip, offset))
d377f56f 2814 ret = chip->request(chip, offset);
3789f5ac 2815 else
d377f56f 2816 ret = -EINVAL;
35e8bb51
DB
2817 spin_lock_irqsave(&gpio_lock, flags);
2818
d377f56f 2819 if (ret < 0) {
35e8bb51 2820 desc_set_label(desc, NULL);
18534df4 2821 kfree_const(label);
35e8bb51 2822 clear_bit(FLAG_REQUESTED, &desc->flags);
80b0a602 2823 goto done;
35e8bb51 2824 }
438d8908 2825 }
80b0a602
MN
2826 if (chip->get_direction) {
2827 /* chip->get_direction may sleep */
2828 spin_unlock_irqrestore(&gpio_lock, flags);
372e722e 2829 gpiod_get_direction(desc);
80b0a602
MN
2830 spin_lock_irqsave(&gpio_lock, flags);
2831 }
77c2d792
MW
2832done:
2833 spin_unlock_irqrestore(&gpio_lock, flags);
d377f56f 2834 return ret;
77c2d792
MW
2835}
2836
fdeb8e15
LW
2837/*
2838 * This descriptor validation needs to be inserted verbatim into each
2839 * function taking a descriptor, so we need to use a preprocessor
54d77198
LW
2840 * macro to avoid endless duplication. If the desc is NULL it is an
2841 * optional GPIO and calls should just bail out.
fdeb8e15 2842 */
a746a232
RV
2843static int validate_desc(const struct gpio_desc *desc, const char *func)
2844{
2845 if (!desc)
2846 return 0;
2847 if (IS_ERR(desc)) {
2848 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
2849 return PTR_ERR(desc);
2850 }
2851 if (!desc->gdev) {
2852 pr_warn("%s: invalid GPIO (no device)\n", func);
2853 return -EINVAL;
2854 }
2855 if (!desc->gdev->chip) {
2856 dev_warn(&desc->gdev->dev,
2857 "%s: backing chip is gone\n", func);
2858 return 0;
2859 }
2860 return 1;
2861}
2862
fdeb8e15 2863#define VALIDATE_DESC(desc) do { \
a746a232
RV
2864 int __valid = validate_desc(desc, __func__); \
2865 if (__valid <= 0) \
2866 return __valid; \
2867 } while (0)
fdeb8e15
LW
2868
2869#define VALIDATE_DESC_VOID(desc) do { \
a746a232
RV
2870 int __valid = validate_desc(desc, __func__); \
2871 if (__valid <= 0) \
fdeb8e15 2872 return; \
a746a232 2873 } while (0)
fdeb8e15 2874
0eb4c6c2 2875int gpiod_request(struct gpio_desc *desc, const char *label)
77c2d792 2876{
d377f56f 2877 int ret = -EPROBE_DEFER;
fdeb8e15 2878 struct gpio_device *gdev;
77c2d792 2879
fdeb8e15
LW
2880 VALIDATE_DESC(desc);
2881 gdev = desc->gdev;
77c2d792 2882
fdeb8e15 2883 if (try_module_get(gdev->owner)) {
d377f56f
LW
2884 ret = gpiod_request_commit(desc, label);
2885 if (ret < 0)
fdeb8e15 2886 module_put(gdev->owner);
33a68e86
LW
2887 else
2888 get_device(&gdev->dev);
77c2d792
MW
2889 }
2890
d377f56f
LW
2891 if (ret)
2892 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
77c2d792 2893
d377f56f 2894 return ret;
d2876d08 2895}
372e722e 2896
fac9d885 2897static bool gpiod_free_commit(struct gpio_desc *desc)
d2876d08 2898{
77c2d792 2899 bool ret = false;
d2876d08 2900 unsigned long flags;
35e8bb51 2901 struct gpio_chip *chip;
d2876d08 2902
3d599d1c
UKK
2903 might_sleep();
2904
372e722e 2905 gpiod_unexport(desc);
d8f388d8 2906
d2876d08
DB
2907 spin_lock_irqsave(&gpio_lock, flags);
2908
fdeb8e15 2909 chip = desc->gdev->chip;
35e8bb51
DB
2910 if (chip && test_bit(FLAG_REQUESTED, &desc->flags)) {
2911 if (chip->free) {
2912 spin_unlock_irqrestore(&gpio_lock, flags);
9c4ba946 2913 might_sleep_if(chip->can_sleep);
372e722e 2914 chip->free(chip, gpio_chip_hwgpio(desc));
35e8bb51
DB
2915 spin_lock_irqsave(&gpio_lock, flags);
2916 }
18534df4 2917 kfree_const(desc->label);
d2876d08 2918 desc_set_label(desc, NULL);
07697461 2919 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
35e8bb51 2920 clear_bit(FLAG_REQUESTED, &desc->flags);
aca5ce14 2921 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
25553ff0 2922 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
9225d516
DF
2923 clear_bit(FLAG_PULL_UP, &desc->flags);
2924 clear_bit(FLAG_PULL_DOWN, &desc->flags);
2148ad77 2925 clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
f625d460 2926 clear_bit(FLAG_IS_HOGGED, &desc->flags);
77c2d792
MW
2927 ret = true;
2928 }
d2876d08
DB
2929
2930 spin_unlock_irqrestore(&gpio_lock, flags);
77c2d792
MW
2931 return ret;
2932}
2933
0eb4c6c2 2934void gpiod_free(struct gpio_desc *desc)
77c2d792 2935{
fac9d885 2936 if (desc && desc->gdev && gpiod_free_commit(desc)) {
fdeb8e15 2937 module_put(desc->gdev->owner);
33a68e86
LW
2938 put_device(&desc->gdev->dev);
2939 } else {
77c2d792 2940 WARN_ON(extra_checks);
33a68e86 2941 }
d2876d08 2942}
372e722e 2943
d2876d08
DB
2944/**
2945 * gpiochip_is_requested - return string iff signal was requested
2946 * @chip: controller managing the signal
2947 * @offset: of signal within controller's 0..(ngpio - 1) range
2948 *
2949 * Returns NULL if the GPIO is not currently requested, else a string.
9c8318ff
AC
2950 * The string returned is the label passed to gpio_request(); if none has been
2951 * passed it is a meaningless, non-NULL constant.
d2876d08
DB
2952 *
2953 * This function is for use by GPIO controller drivers. The label can
2954 * help with diagnostics, and knowing that the signal is used as a GPIO
2955 * can help avoid accidentally multiplexing it to another controller.
2956 */
2957const char *gpiochip_is_requested(struct gpio_chip *chip, unsigned offset)
2958{
6c0b4e6c 2959 struct gpio_desc *desc;
d2876d08 2960
48b5953e 2961 if (offset >= chip->ngpio)
d2876d08 2962 return NULL;
6c0b4e6c 2963
1c3cdb18 2964 desc = &chip->gpiodev->descs[offset];
6c0b4e6c 2965
372e722e 2966 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
d2876d08 2967 return NULL;
372e722e 2968 return desc->label;
d2876d08
DB
2969}
2970EXPORT_SYMBOL_GPL(gpiochip_is_requested);
2971
77c2d792
MW
2972/**
2973 * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
950d55f5
TR
2974 * @chip: GPIO chip
2975 * @hwnum: hardware number of the GPIO for which to request the descriptor
77c2d792 2976 * @label: label for the GPIO
5923ea6c
LW
2977 * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
2978 * specify things like line inversion semantics with the machine flags
2979 * such as GPIO_OUT_LOW
2980 * @dflags: descriptor request flags for this GPIO or 0 if default, this
2981 * can be used to specify consumer semantics such as open drain
77c2d792
MW
2982 *
2983 * Function allows GPIO chip drivers to request and use their own GPIO
2984 * descriptors via gpiolib API. Difference to gpiod_request() is that this
2985 * function will not increase reference count of the GPIO chip module. This
2986 * allows the GPIO chip module to be unloaded as needed (we assume that the
2987 * GPIO chip driver handles freeing the GPIOs it has requested).
950d55f5
TR
2988 *
2989 * Returns:
2990 * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
2991 * code on failure.
77c2d792 2992 */
abdc08a3 2993struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum,
21abf103 2994 const char *label,
5923ea6c
LW
2995 enum gpio_lookup_flags lflags,
2996 enum gpiod_flags dflags)
77c2d792 2997{
abdc08a3 2998 struct gpio_desc *desc = gpiochip_get_desc(chip, hwnum);
d377f56f 2999 int ret;
77c2d792 3000
abdc08a3
AC
3001 if (IS_ERR(desc)) {
3002 chip_err(chip, "failed to get GPIO descriptor\n");
3003 return desc;
3004 }
3005
d377f56f
LW
3006 ret = gpiod_request_commit(desc, label);
3007 if (ret < 0)
3008 return ERR_PTR(ret);
77c2d792 3009
d377f56f
LW
3010 ret = gpiod_configure_flags(desc, label, lflags, dflags);
3011 if (ret) {
21abf103
LW
3012 chip_err(chip, "setup of own GPIO %s failed\n", label);
3013 gpiod_free_commit(desc);
d377f56f 3014 return ERR_PTR(ret);
21abf103
LW
3015 }
3016
abdc08a3 3017 return desc;
77c2d792 3018}
f7d4ad98 3019EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
77c2d792
MW
3020
3021/**
3022 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
3023 * @desc: GPIO descriptor to free
3024 *
3025 * Function frees the given GPIO requested previously with
3026 * gpiochip_request_own_desc().
3027 */
3028void gpiochip_free_own_desc(struct gpio_desc *desc)
3029{
3030 if (desc)
fac9d885 3031 gpiod_free_commit(desc);
77c2d792 3032}
f7d4ad98 3033EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
d2876d08 3034
fdeb8e15
LW
3035/*
3036 * Drivers MUST set GPIO direction before making get/set calls. In
d2876d08
DB
3037 * some cases this is done in early boot, before IRQs are enabled.
3038 *
3039 * As a rule these aren't called more than once (except for drivers
3040 * using the open-drain emulation idiom) so these are natural places
3041 * to accumulate extra debugging checks. Note that we can't (yet)
3042 * rely on gpio_request() having been called beforehand.
3043 */
3044
d90f3685
BG
3045static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset,
3046 enum pin_config_param mode)
3047{
3048 if (!gc->set_config)
3049 return -ENOTSUPP;
3050
3051 return gc->set_config(gc, offset, mode);
3052}
3053
a9001764 3054static int gpio_set_config(struct gpio_chip *gc, unsigned int offset,
71479789
TP
3055 enum pin_config_param mode)
3056{
542f3615
MR
3057 unsigned long config;
3058 unsigned arg;
71479789 3059
542f3615 3060 switch (mode) {
2148ad77 3061 case PIN_CONFIG_BIAS_DISABLE:
542f3615
MR
3062 case PIN_CONFIG_BIAS_PULL_DOWN:
3063 case PIN_CONFIG_BIAS_PULL_UP:
3064 arg = 1;
3065 break;
3066
3067 default:
3068 arg = 0;
3069 }
3070
3071 config = PIN_CONF_PACKED(mode, arg);
d90f3685 3072 return gpio_do_set_config(gc, offset, mode);
71479789
TP
3073}
3074
2148ad77
KG
3075static int gpio_set_bias(struct gpio_chip *chip, struct gpio_desc *desc)
3076{
3077 int bias = 0;
3078 int ret = 0;
3079
3080 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
3081 bias = PIN_CONFIG_BIAS_DISABLE;
3082 else if (test_bit(FLAG_PULL_UP, &desc->flags))
3083 bias = PIN_CONFIG_BIAS_PULL_UP;
3084 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
3085 bias = PIN_CONFIG_BIAS_PULL_DOWN;
3086
3087 if (bias) {
3088 ret = gpio_set_config(chip, gpio_chip_hwgpio(desc), bias);
3089 if (ret != -ENOTSUPP)
3090 return ret;
3091 }
3092 return 0;
3093}
3094
79a9becd
AC
3095/**
3096 * gpiod_direction_input - set the GPIO direction to input
3097 * @desc: GPIO to set to input
3098 *
3099 * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
3100 * be called safely on it.
3101 *
3102 * Return 0 in case of success, else an error code.
3103 */
3104int gpiod_direction_input(struct gpio_desc *desc)
d2876d08 3105{
d2876d08 3106 struct gpio_chip *chip;
d377f56f 3107 int ret = 0;
d2876d08 3108
fdeb8e15
LW
3109 VALIDATE_DESC(desc);
3110 chip = desc->gdev->chip;
bcabdef1 3111
e48d194d
LW
3112 /*
3113 * It is legal to have no .get() and .direction_input() specified if
3114 * the chip is output-only, but you can't specify .direction_input()
3115 * and not support the .get() operation, that doesn't make sense.
3116 */
ae9847f4 3117 if (!chip->get && chip->direction_input) {
6424de5a 3118 gpiod_warn(desc,
e48d194d
LW
3119 "%s: missing get() but have direction_input()\n",
3120 __func__);
be1a4b13
LW
3121 return -EIO;
3122 }
3123
e48d194d
LW
3124 /*
3125 * If we have a .direction_input() callback, things are simple,
3126 * just call it. Else we are some input-only chip so try to check the
3127 * direction (if .get_direction() is supported) else we silently
3128 * assume we are in input mode after this.
3129 */
ae9847f4 3130 if (chip->direction_input) {
d377f56f 3131 ret = chip->direction_input(chip, gpio_chip_hwgpio(desc));
ae9847f4
RRD
3132 } else if (chip->get_direction &&
3133 (chip->get_direction(chip, gpio_chip_hwgpio(desc)) != 1)) {
3134 gpiod_warn(desc,
e48d194d
LW
3135 "%s: missing direction_input() operation and line is output\n",
3136 __func__);
ae9847f4
RRD
3137 return -EIO;
3138 }
2148ad77 3139 if (ret == 0) {
d2876d08 3140 clear_bit(FLAG_IS_OUT, &desc->flags);
2148ad77
KG
3141 ret = gpio_set_bias(chip, desc);
3142 }
d449991c 3143
d377f56f 3144 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
d82da797 3145
d377f56f 3146 return ret;
d2876d08 3147}
79a9becd 3148EXPORT_SYMBOL_GPL(gpiod_direction_input);
372e722e 3149
fac9d885 3150static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
d2876d08 3151{
c663e5f5 3152 struct gpio_chip *gc = desc->gdev->chip;
ad17731d 3153 int val = !!value;
ae9847f4 3154 int ret = 0;
d2876d08 3155
e48d194d
LW
3156 /*
3157 * It's OK not to specify .direction_output() if the gpiochip is
3158 * output-only, but if there is then not even a .set() operation it
3159 * is pretty tricky to drive the output line.
3160 */
ae9847f4 3161 if (!gc->set && !gc->direction_output) {
6424de5a 3162 gpiod_warn(desc,
e48d194d
LW
3163 "%s: missing set() and direction_output() operations\n",
3164 __func__);
be1a4b13
LW
3165 return -EIO;
3166 }
3167
ae9847f4
RRD
3168 if (gc->direction_output) {
3169 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
3170 } else {
e48d194d 3171 /* Check that we are in output mode if we can */
ae9847f4
RRD
3172 if (gc->get_direction &&
3173 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
3174 gpiod_warn(desc,
3175 "%s: missing direction_output() operation\n",
3176 __func__);
3177 return -EIO;
3178 }
e48d194d
LW
3179 /*
3180 * If we can't actively set the direction, we are some
3181 * output-only chip, so just drive the output as desired.
3182 */
ae9847f4
RRD
3183 gc->set(gc, gpio_chip_hwgpio(desc), val);
3184 }
3185
c663e5f5 3186 if (!ret)
d2876d08 3187 set_bit(FLAG_IS_OUT, &desc->flags);
ad17731d 3188 trace_gpio_value(desc_to_gpio(desc), 0, val);
c663e5f5
LW
3189 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
3190 return ret;
d2876d08 3191}
ef70bbe1
PZ
3192
3193/**
3194 * gpiod_direction_output_raw - set the GPIO direction to output
3195 * @desc: GPIO to set to output
3196 * @value: initial output value of the GPIO
3197 *
3198 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
3199 * be called safely on it. The initial value of the output must be specified
3200 * as raw value on the physical line without regard for the ACTIVE_LOW status.
3201 *
3202 * Return 0 in case of success, else an error code.
3203 */
3204int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
3205{
fdeb8e15 3206 VALIDATE_DESC(desc);
fac9d885 3207 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1
PZ
3208}
3209EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
3210
3211/**
90df4fe0 3212 * gpiod_direction_output - set the GPIO direction to output
ef70bbe1
PZ
3213 * @desc: GPIO to set to output
3214 * @value: initial output value of the GPIO
3215 *
3216 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
3217 * be called safely on it. The initial value of the output must be specified
3218 * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
3219 * account.
3220 *
3221 * Return 0 in case of success, else an error code.
3222 */
3223int gpiod_direction_output(struct gpio_desc *desc, int value)
3224{
30322bcf 3225 struct gpio_chip *gc;
02e47980
LW
3226 int ret;
3227
fdeb8e15 3228 VALIDATE_DESC(desc);
ef70bbe1
PZ
3229 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3230 value = !value;
ad17731d
LW
3231 else
3232 value = !!value;
02e47980 3233
4e9439dd
HV
3234 /* GPIOs used for enabled IRQs shall not be set as output */
3235 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
3236 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
02e47980
LW
3237 gpiod_err(desc,
3238 "%s: tried to set a GPIO tied to an IRQ as output\n",
3239 __func__);
3240 return -EIO;
3241 }
3242
30322bcf 3243 gc = desc->gdev->chip;
02e47980
LW
3244 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
3245 /* First see if we can enable open drain in hardware */
71479789
TP
3246 ret = gpio_set_config(gc, gpio_chip_hwgpio(desc),
3247 PIN_CONFIG_DRIVE_OPEN_DRAIN);
02e47980
LW
3248 if (!ret)
3249 goto set_output_value;
3250 /* Emulate open drain by not actively driving the line high */
e735244e
BG
3251 if (value) {
3252 ret = gpiod_direction_input(desc);
3253 goto set_output_flag;
3254 }
02e47980
LW
3255 }
3256 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
71479789
TP
3257 ret = gpio_set_config(gc, gpio_chip_hwgpio(desc),
3258 PIN_CONFIG_DRIVE_OPEN_SOURCE);
02e47980
LW
3259 if (!ret)
3260 goto set_output_value;
3261 /* Emulate open source by not actively driving the line low */
e735244e
BG
3262 if (!value) {
3263 ret = gpiod_direction_input(desc);
3264 goto set_output_flag;
3265 }
02e47980 3266 } else {
71479789
TP
3267 gpio_set_config(gc, gpio_chip_hwgpio(desc),
3268 PIN_CONFIG_DRIVE_PUSH_PULL);
02e47980
LW
3269 }
3270
3271set_output_value:
2821ae5f
KG
3272 ret = gpio_set_bias(gc, desc);
3273 if (ret)
3274 return ret;
fac9d885 3275 return gpiod_direction_output_raw_commit(desc, value);
e735244e
BG
3276
3277set_output_flag:
3278 /*
3279 * When emulating open-source or open-drain functionalities by not
3280 * actively driving the line (setting mode to input) we still need to
3281 * set the IS_OUT flag or otherwise we won't be able to set the line
3282 * value anymore.
3283 */
3284 if (ret == 0)
3285 set_bit(FLAG_IS_OUT, &desc->flags);
3286 return ret;
ef70bbe1 3287}
79a9becd 3288EXPORT_SYMBOL_GPL(gpiod_direction_output);
d2876d08 3289
c4b5be98 3290/**
950d55f5
TR
3291 * gpiod_set_debounce - sets @debounce time for a GPIO
3292 * @desc: descriptor of the GPIO for which to set debounce time
3293 * @debounce: debounce time in microseconds
65d87656 3294 *
950d55f5
TR
3295 * Returns:
3296 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
3297 * debounce time.
c4b5be98 3298 */
79a9becd 3299int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce)
c4b5be98 3300{
c4b5be98 3301 struct gpio_chip *chip;
2956b5d9 3302 unsigned long config;
c4b5be98 3303
fdeb8e15
LW
3304 VALIDATE_DESC(desc);
3305 chip = desc->gdev->chip;
be1a4b13 3306
2956b5d9 3307 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
d90f3685 3308 return gpio_do_set_config(chip, gpio_chip_hwgpio(desc), config);
c4b5be98 3309}
79a9becd 3310EXPORT_SYMBOL_GPL(gpiod_set_debounce);
372e722e 3311
e10f72bf
AJ
3312/**
3313 * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
3314 * @desc: descriptor of the GPIO for which to configure persistence
3315 * @transitory: True to lose state on suspend or reset, false for persistence
3316 *
3317 * Returns:
3318 * 0 on success, otherwise a negative error code.
3319 */
3320int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
3321{
3322 struct gpio_chip *chip;
3323 unsigned long packed;
3324 int gpio;
3325 int rc;
3326
156dd392 3327 VALIDATE_DESC(desc);
e10f72bf
AJ
3328 /*
3329 * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
3330 * persistence state.
3331 */
3332 if (transitory)
3333 set_bit(FLAG_TRANSITORY, &desc->flags);
3334 else
3335 clear_bit(FLAG_TRANSITORY, &desc->flags);
3336
3337 /* If the driver supports it, set the persistence state now */
3338 chip = desc->gdev->chip;
3339 if (!chip->set_config)
3340 return 0;
3341
3342 packed = pinconf_to_config_packed(PIN_CONFIG_PERSIST_STATE,
3343 !transitory);
3344 gpio = gpio_chip_hwgpio(desc);
d90f3685 3345 rc = gpio_do_set_config(chip, gpio, packed);
e10f72bf
AJ
3346 if (rc == -ENOTSUPP) {
3347 dev_dbg(&desc->gdev->dev, "Persistence not supported for GPIO %d\n",
3348 gpio);
3349 return 0;
3350 }
3351
3352 return rc;
3353}
3354EXPORT_SYMBOL_GPL(gpiod_set_transitory);
3355
79a9becd
AC
3356/**
3357 * gpiod_is_active_low - test whether a GPIO is active-low or not
3358 * @desc: the gpio descriptor to test
3359 *
3360 * Returns 1 if the GPIO is active-low, 0 otherwise.
3361 */
3362int gpiod_is_active_low(const struct gpio_desc *desc)
372e722e 3363{
fdeb8e15 3364 VALIDATE_DESC(desc);
79a9becd 3365 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
372e722e 3366}
79a9becd 3367EXPORT_SYMBOL_GPL(gpiod_is_active_low);
d2876d08
DB
3368
3369/* I/O calls are only valid after configuration completed; the relevant
3370 * "is this a valid GPIO" error checks should already have been done.
3371 *
3372 * "Get" operations are often inlinable as reading a pin value register,
3373 * and masking the relevant bit in that register.
3374 *
3375 * When "set" operations are inlinable, they involve writing that mask to
3376 * one register to set a low value, or a different register to set it high.
3377 * Otherwise locking is needed, so there may be little value to inlining.
3378 *
3379 *------------------------------------------------------------------------
3380 *
3381 * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
3382 * have requested the GPIO. That can include implicit requesting by
3383 * a direction setting call. Marking a gpio as requested locks its chip
3384 * in memory, guaranteeing that these table lookups need no more locking
3385 * and that gpiochip_remove() will fail.
3386 *
3387 * REVISIT when debugging, consider adding some instrumentation to ensure
3388 * that the GPIO was actually requested.
3389 */
3390
fac9d885 3391static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
d2876d08
DB
3392{
3393 struct gpio_chip *chip;
372e722e 3394 int offset;
e20538b8 3395 int value;
d2876d08 3396
fdeb8e15 3397 chip = desc->gdev->chip;
372e722e 3398 offset = gpio_chip_hwgpio(desc);
e20538b8 3399 value = chip->get ? chip->get(chip, offset) : -EIO;
723a6303 3400 value = value < 0 ? value : !!value;
372e722e 3401 trace_gpio_value(desc_to_gpio(desc), 1, value);
3f397c21 3402 return value;
d2876d08 3403}
372e722e 3404
eec1d566
LW
3405static int gpio_chip_get_multiple(struct gpio_chip *chip,
3406 unsigned long *mask, unsigned long *bits)
3407{
3408 if (chip->get_multiple) {
3409 return chip->get_multiple(chip, mask, bits);
3410 } else if (chip->get) {
3411 int i, value;
3412
3413 for_each_set_bit(i, mask, chip->ngpio) {
3414 value = chip->get(chip, i);
3415 if (value < 0)
3416 return value;
3417 __assign_bit(i, bits, value);
3418 }
3419 return 0;
3420 }
3421 return -EIO;
3422}
3423
3424int gpiod_get_array_value_complex(bool raw, bool can_sleep,
3425 unsigned int array_size,
3426 struct gpio_desc **desc_array,
77588c14 3427 struct gpio_array *array_info,
b9762beb 3428 unsigned long *value_bitmap)
eec1d566 3429{
d377f56f 3430 int ret, i = 0;
b17566a6
JK
3431
3432 /*
3433 * Validate array_info against desc_array and its size.
3434 * It should immediately follow desc_array if both
3435 * have been obtained from the same gpiod_get_array() call.
3436 */
3437 if (array_info && array_info->desc == desc_array &&
3438 array_size <= array_info->size &&
3439 (void *)array_info == desc_array + array_info->size) {
3440 if (!can_sleep)
3441 WARN_ON(array_info->chip->can_sleep);
3442
d377f56f 3443 ret = gpio_chip_get_multiple(array_info->chip,
b17566a6
JK
3444 array_info->get_mask,
3445 value_bitmap);
d377f56f
LW
3446 if (ret)
3447 return ret;
b17566a6
JK
3448
3449 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3450 bitmap_xor(value_bitmap, value_bitmap,
3451 array_info->invert_mask, array_size);
3452
3453 if (bitmap_full(array_info->get_mask, array_size))
3454 return 0;
3455
3456 i = find_first_zero_bit(array_info->get_mask, array_size);
3457 } else {
3458 array_info = NULL;
3459 }
eec1d566
LW
3460
3461 while (i < array_size) {
3462 struct gpio_chip *chip = desc_array[i]->gdev->chip;
3027743f
LA
3463 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
3464 unsigned long *mask, *bits;
eec1d566
LW
3465 int first, j, ret;
3466
3027743f
LA
3467 if (likely(chip->ngpio <= FASTPATH_NGPIO)) {
3468 mask = fastpath;
3469 } else {
3470 mask = kmalloc_array(2 * BITS_TO_LONGS(chip->ngpio),
3471 sizeof(*mask),
3472 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
3473 if (!mask)
3474 return -ENOMEM;
3475 }
3476
3477 bits = mask + BITS_TO_LONGS(chip->ngpio);
3478 bitmap_zero(mask, chip->ngpio);
3479
eec1d566
LW
3480 if (!can_sleep)
3481 WARN_ON(chip->can_sleep);
3482
3483 /* collect all inputs belonging to the same chip */
3484 first = i;
eec1d566
LW
3485 do {
3486 const struct gpio_desc *desc = desc_array[i];
3487 int hwgpio = gpio_chip_hwgpio(desc);
3488
3489 __set_bit(hwgpio, mask);
3490 i++;
b17566a6
JK
3491
3492 if (array_info)
35ae7f96
JK
3493 i = find_next_zero_bit(array_info->get_mask,
3494 array_size, i);
eec1d566
LW
3495 } while ((i < array_size) &&
3496 (desc_array[i]->gdev->chip == chip));
3497
3498 ret = gpio_chip_get_multiple(chip, mask, bits);
3027743f
LA
3499 if (ret) {
3500 if (mask != fastpath)
3501 kfree(mask);
eec1d566 3502 return ret;
3027743f 3503 }
eec1d566 3504
b17566a6 3505 for (j = first; j < i; ) {
eec1d566
LW
3506 const struct gpio_desc *desc = desc_array[j];
3507 int hwgpio = gpio_chip_hwgpio(desc);
3508 int value = test_bit(hwgpio, bits);
3509
3510 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3511 value = !value;
b9762beb 3512 __assign_bit(j, value_bitmap, value);
eec1d566 3513 trace_gpio_value(desc_to_gpio(desc), 1, value);
799d5eb4 3514 j++;
b17566a6
JK
3515
3516 if (array_info)
35ae7f96
JK
3517 j = find_next_zero_bit(array_info->get_mask, i,
3518 j);
eec1d566 3519 }
3027743f
LA
3520
3521 if (mask != fastpath)
3522 kfree(mask);
eec1d566
LW
3523 }
3524 return 0;
3525}
3526
d2876d08 3527/**
79a9becd
AC
3528 * gpiod_get_raw_value() - return a gpio's raw value
3529 * @desc: gpio whose value will be returned
d2876d08 3530 *
79a9becd 3531 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3532 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd 3533 *
827a9b8b 3534 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3535 * complain if the GPIO chip functions potentially sleep.
d2876d08 3536 */
79a9becd 3537int gpiod_get_raw_value(const struct gpio_desc *desc)
d2876d08 3538{
fdeb8e15 3539 VALIDATE_DESC(desc);
3285170f 3540 /* Should be using gpiod_get_raw_value_cansleep() */
fdeb8e15 3541 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3542 return gpiod_get_raw_value_commit(desc);
d2876d08 3543}
79a9becd 3544EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
372e722e 3545
79a9becd
AC
3546/**
3547 * gpiod_get_value() - return a gpio's value
3548 * @desc: gpio whose value will be returned
3549 *
3550 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3551 * account, or negative errno on failure.
79a9becd 3552 *
827a9b8b 3553 * This function can be called from contexts where we cannot sleep, and will
79a9becd
AC
3554 * complain if the GPIO chip functions potentially sleep.
3555 */
3556int gpiod_get_value(const struct gpio_desc *desc)
372e722e 3557{
79a9becd 3558 int value;
fdeb8e15
LW
3559
3560 VALIDATE_DESC(desc);
3285170f 3561 /* Should be using gpiod_get_value_cansleep() */
fdeb8e15 3562 WARN_ON(desc->gdev->chip->can_sleep);
79a9becd 3563
fac9d885 3564 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3565 if (value < 0)
3566 return value;
3567
79a9becd
AC
3568 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3569 value = !value;
3570
3571 return value;
372e722e 3572}
79a9becd 3573EXPORT_SYMBOL_GPL(gpiod_get_value);
d2876d08 3574
eec1d566
LW
3575/**
3576 * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
b9762beb 3577 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3578 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3579 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3580 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3581 *
3582 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3583 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3584 * else an error code.
3585 *
827a9b8b 3586 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
3587 * and it will complain if the GPIO chip functions potentially sleep.
3588 */
3589int gpiod_get_raw_array_value(unsigned int array_size,
b9762beb 3590 struct gpio_desc **desc_array,
77588c14 3591 struct gpio_array *array_info,
b9762beb 3592 unsigned long *value_bitmap)
eec1d566
LW
3593{
3594 if (!desc_array)
3595 return -EINVAL;
3596 return gpiod_get_array_value_complex(true, false, array_size,
77588c14
JK
3597 desc_array, array_info,
3598 value_bitmap);
eec1d566
LW
3599}
3600EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
3601
3602/**
3603 * gpiod_get_array_value() - read values from an array of GPIOs
b9762beb 3604 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3605 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3606 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3607 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3608 *
3609 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3610 * into account. Return 0 in case of success, else an error code.
3611 *
827a9b8b 3612 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
3613 * and it will complain if the GPIO chip functions potentially sleep.
3614 */
3615int gpiod_get_array_value(unsigned int array_size,
b9762beb 3616 struct gpio_desc **desc_array,
77588c14 3617 struct gpio_array *array_info,
b9762beb 3618 unsigned long *value_bitmap)
eec1d566
LW
3619{
3620 if (!desc_array)
3621 return -EINVAL;
3622 return gpiod_get_array_value_complex(false, false, array_size,
77588c14
JK
3623 desc_array, array_info,
3624 value_bitmap);
eec1d566
LW
3625}
3626EXPORT_SYMBOL_GPL(gpiod_get_array_value);
3627
aca5ce14 3628/*
fac9d885 3629 * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
79a9becd 3630 * @desc: gpio descriptor whose state need to be set.
20a8a968 3631 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
aca5ce14 3632 */
fac9d885 3633static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
aca5ce14 3634{
d377f56f 3635 int ret = 0;
fdeb8e15 3636 struct gpio_chip *chip = desc->gdev->chip;
372e722e
AC
3637 int offset = gpio_chip_hwgpio(desc);
3638
aca5ce14 3639 if (value) {
d377f56f 3640 ret = chip->direction_input(chip, offset);
aca5ce14 3641 } else {
d377f56f
LW
3642 ret = chip->direction_output(chip, offset, 0);
3643 if (!ret)
372e722e 3644 set_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 3645 }
d377f56f
LW
3646 trace_gpio_direction(desc_to_gpio(desc), value, ret);
3647 if (ret < 0)
6424de5a
MB
3648 gpiod_err(desc,
3649 "%s: Error in set_value for open drain err %d\n",
d377f56f 3650 __func__, ret);
aca5ce14
LD
3651}
3652
25553ff0 3653/*
79a9becd
AC
3654 * _gpio_set_open_source_value() - Set the open source gpio's value.
3655 * @desc: gpio descriptor whose state need to be set.
20a8a968 3656 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
25553ff0 3657 */
fac9d885 3658static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
25553ff0 3659{
d377f56f 3660 int ret = 0;
fdeb8e15 3661 struct gpio_chip *chip = desc->gdev->chip;
372e722e
AC
3662 int offset = gpio_chip_hwgpio(desc);
3663
25553ff0 3664 if (value) {
d377f56f
LW
3665 ret = chip->direction_output(chip, offset, 1);
3666 if (!ret)
372e722e 3667 set_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 3668 } else {
d377f56f 3669 ret = chip->direction_input(chip, offset);
25553ff0 3670 }
d377f56f
LW
3671 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
3672 if (ret < 0)
6424de5a
MB
3673 gpiod_err(desc,
3674 "%s: Error in set_value for open source err %d\n",
d377f56f 3675 __func__, ret);
25553ff0
LD
3676}
3677
fac9d885 3678static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
d2876d08
DB
3679{
3680 struct gpio_chip *chip;
3681
fdeb8e15 3682 chip = desc->gdev->chip;
372e722e 3683 trace_gpio_value(desc_to_gpio(desc), 0, value);
02e47980 3684 chip->set(chip, gpio_chip_hwgpio(desc), value);
372e722e
AC
3685}
3686
5f424243
RI
3687/*
3688 * set multiple outputs on the same chip;
3689 * use the chip's set_multiple function if available;
3690 * otherwise set the outputs sequentially;
3691 * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
3692 * defines which outputs are to be changed
3693 * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
3694 * defines the values the outputs specified by mask are to be set to
3695 */
3696static void gpio_chip_set_multiple(struct gpio_chip *chip,
3697 unsigned long *mask, unsigned long *bits)
3698{
3699 if (chip->set_multiple) {
3700 chip->set_multiple(chip, mask, bits);
3701 } else {
5e4e6fb3
AS
3702 unsigned int i;
3703
3704 /* set outputs if the corresponding mask bit is set */
3705 for_each_set_bit(i, mask, chip->ngpio)
3706 chip->set(chip, i, test_bit(i, bits));
5f424243
RI
3707 }
3708}
3709
3027743f 3710int gpiod_set_array_value_complex(bool raw, bool can_sleep,
3c940660
GU
3711 unsigned int array_size,
3712 struct gpio_desc **desc_array,
3713 struct gpio_array *array_info,
3714 unsigned long *value_bitmap)
5f424243
RI
3715{
3716 int i = 0;
3717
b17566a6
JK
3718 /*
3719 * Validate array_info against desc_array and its size.
3720 * It should immediately follow desc_array if both
3721 * have been obtained from the same gpiod_get_array() call.
3722 */
3723 if (array_info && array_info->desc == desc_array &&
3724 array_size <= array_info->size &&
3725 (void *)array_info == desc_array + array_info->size) {
3726 if (!can_sleep)
3727 WARN_ON(array_info->chip->can_sleep);
3728
3729 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3730 bitmap_xor(value_bitmap, value_bitmap,
3731 array_info->invert_mask, array_size);
3732
3733 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
3734 value_bitmap);
3735
3736 if (bitmap_full(array_info->set_mask, array_size))
3737 return 0;
3738
3739 i = find_first_zero_bit(array_info->set_mask, array_size);
3740 } else {
3741 array_info = NULL;
3742 }
3743
5f424243 3744 while (i < array_size) {
fdeb8e15 3745 struct gpio_chip *chip = desc_array[i]->gdev->chip;
3027743f
LA
3746 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
3747 unsigned long *mask, *bits;
5f424243
RI
3748 int count = 0;
3749
3027743f
LA
3750 if (likely(chip->ngpio <= FASTPATH_NGPIO)) {
3751 mask = fastpath;
3752 } else {
3753 mask = kmalloc_array(2 * BITS_TO_LONGS(chip->ngpio),
3754 sizeof(*mask),
3755 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
3756 if (!mask)
3757 return -ENOMEM;
3758 }
3759
3760 bits = mask + BITS_TO_LONGS(chip->ngpio);
3761 bitmap_zero(mask, chip->ngpio);
3762
38e003f4 3763 if (!can_sleep)
5f424243 3764 WARN_ON(chip->can_sleep);
38e003f4 3765
5f424243
RI
3766 do {
3767 struct gpio_desc *desc = desc_array[i];
3768 int hwgpio = gpio_chip_hwgpio(desc);
b9762beb 3769 int value = test_bit(i, value_bitmap);
5f424243 3770
b17566a6
JK
3771 /*
3772 * Pins applicable for fast input but not for
3773 * fast output processing may have been already
3774 * inverted inside the fast path, skip them.
3775 */
3776 if (!raw && !(array_info &&
3777 test_bit(i, array_info->invert_mask)) &&
3778 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
5f424243
RI
3779 value = !value;
3780 trace_gpio_value(desc_to_gpio(desc), 0, value);
3781 /*
3782 * collect all normal outputs belonging to the same chip
3783 * open drain and open source outputs are set individually
3784 */
02e47980 3785 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
fac9d885 3786 gpio_set_open_drain_value_commit(desc, value);
02e47980 3787 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
fac9d885 3788 gpio_set_open_source_value_commit(desc, value);
5f424243
RI
3789 } else {
3790 __set_bit(hwgpio, mask);
38e003f4 3791 if (value)
5f424243 3792 __set_bit(hwgpio, bits);
38e003f4 3793 else
5f424243 3794 __clear_bit(hwgpio, bits);
5f424243
RI
3795 count++;
3796 }
3797 i++;
b17566a6
JK
3798
3799 if (array_info)
35ae7f96
JK
3800 i = find_next_zero_bit(array_info->set_mask,
3801 array_size, i);
fdeb8e15
LW
3802 } while ((i < array_size) &&
3803 (desc_array[i]->gdev->chip == chip));
5f424243 3804 /* push collected bits to outputs */
38e003f4 3805 if (count != 0)
5f424243 3806 gpio_chip_set_multiple(chip, mask, bits);
3027743f
LA
3807
3808 if (mask != fastpath)
3809 kfree(mask);
5f424243 3810 }
3027743f 3811 return 0;
5f424243
RI
3812}
3813
d2876d08 3814/**
79a9becd
AC
3815 * gpiod_set_raw_value() - assign a gpio's raw value
3816 * @desc: gpio whose value will be assigned
d2876d08 3817 * @value: value to assign
d2876d08 3818 *
79a9becd
AC
3819 * Set the raw value of the GPIO, i.e. the value of its physical line without
3820 * regard for its ACTIVE_LOW status.
3821 *
827a9b8b 3822 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3823 * complain if the GPIO chip functions potentially sleep.
d2876d08 3824 */
79a9becd 3825void gpiod_set_raw_value(struct gpio_desc *desc, int value)
372e722e 3826{
fdeb8e15 3827 VALIDATE_DESC_VOID(desc);
3285170f 3828 /* Should be using gpiod_set_raw_value_cansleep() */
fdeb8e15 3829 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3830 gpiod_set_raw_value_commit(desc, value);
d2876d08 3831}
79a9becd 3832EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
d2876d08 3833
1e77fc82
GU
3834/**
3835 * gpiod_set_value_nocheck() - set a GPIO line value without checking
3836 * @desc: the descriptor to set the value on
3837 * @value: value to set
3838 *
3839 * This sets the value of a GPIO line backing a descriptor, applying
3840 * different semantic quirks like active low and open drain/source
3841 * handling.
3842 */
3843static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
3844{
3845 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3846 value = !value;
3847 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
3848 gpio_set_open_drain_value_commit(desc, value);
3849 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
3850 gpio_set_open_source_value_commit(desc, value);
3851 else
3852 gpiod_set_raw_value_commit(desc, value);
3853}
3854
d2876d08 3855/**
79a9becd
AC
3856 * gpiod_set_value() - assign a gpio's value
3857 * @desc: gpio whose value will be assigned
3858 * @value: value to assign
3859 *
02e47980
LW
3860 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
3861 * OPEN_DRAIN and OPEN_SOURCE flags into account.
d2876d08 3862 *
827a9b8b 3863 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3864 * complain if the GPIO chip functions potentially sleep.
d2876d08 3865 */
79a9becd 3866void gpiod_set_value(struct gpio_desc *desc, int value)
d2876d08 3867{
fdeb8e15 3868 VALIDATE_DESC_VOID(desc);
3285170f 3869 /* Should be using gpiod_set_value_cansleep() */
fdeb8e15 3870 WARN_ON(desc->gdev->chip->can_sleep);
1e77fc82 3871 gpiod_set_value_nocheck(desc, value);
372e722e 3872}
79a9becd 3873EXPORT_SYMBOL_GPL(gpiod_set_value);
d2876d08 3874
5f424243 3875/**
3fff99bc 3876 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
b9762beb 3877 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3878 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3879 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3880 * @value_bitmap: bitmap of values to assign
5f424243
RI
3881 *
3882 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3883 * without regard for their ACTIVE_LOW status.
3884 *
827a9b8b 3885 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3886 * complain if the GPIO chip functions potentially sleep.
3887 */
3027743f 3888int gpiod_set_raw_array_value(unsigned int array_size,
3c940660
GU
3889 struct gpio_desc **desc_array,
3890 struct gpio_array *array_info,
3891 unsigned long *value_bitmap)
5f424243
RI
3892{
3893 if (!desc_array)
3027743f
LA
3894 return -EINVAL;
3895 return gpiod_set_array_value_complex(true, false, array_size,
77588c14 3896 desc_array, array_info, value_bitmap);
5f424243 3897}
3fff99bc 3898EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
5f424243
RI
3899
3900/**
3fff99bc 3901 * gpiod_set_array_value() - assign values to an array of GPIOs
b9762beb 3902 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3903 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3904 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3905 * @value_bitmap: bitmap of values to assign
5f424243
RI
3906 *
3907 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3908 * into account.
3909 *
827a9b8b 3910 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3911 * complain if the GPIO chip functions potentially sleep.
3912 */
cf9af0d5
GU
3913int gpiod_set_array_value(unsigned int array_size,
3914 struct gpio_desc **desc_array,
3915 struct gpio_array *array_info,
3916 unsigned long *value_bitmap)
5f424243
RI
3917{
3918 if (!desc_array)
cf9af0d5
GU
3919 return -EINVAL;
3920 return gpiod_set_array_value_complex(false, false, array_size,
3921 desc_array, array_info,
3922 value_bitmap);
5f424243 3923}
3fff99bc 3924EXPORT_SYMBOL_GPL(gpiod_set_array_value);
5f424243 3925
d2876d08 3926/**
79a9becd
AC
3927 * gpiod_cansleep() - report whether gpio value access may sleep
3928 * @desc: gpio to check
d2876d08 3929 *
d2876d08 3930 */
79a9becd 3931int gpiod_cansleep(const struct gpio_desc *desc)
372e722e 3932{
fdeb8e15
LW
3933 VALIDATE_DESC(desc);
3934 return desc->gdev->chip->can_sleep;
d2876d08 3935}
79a9becd 3936EXPORT_SYMBOL_GPL(gpiod_cansleep);
d2876d08 3937
90b39402
LW
3938/**
3939 * gpiod_set_consumer_name() - set the consumer name for the descriptor
3940 * @desc: gpio to set the consumer name on
3941 * @name: the new consumer name
3942 */
18534df4 3943int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
90b39402 3944{
18534df4
MS
3945 VALIDATE_DESC(desc);
3946 if (name) {
3947 name = kstrdup_const(name, GFP_KERNEL);
3948 if (!name)
3949 return -ENOMEM;
3950 }
3951
3952 kfree_const(desc->label);
3953 desc_set_label(desc, name);
3954
3955 return 0;
90b39402
LW
3956}
3957EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
3958
0f6d504e 3959/**
79a9becd
AC
3960 * gpiod_to_irq() - return the IRQ corresponding to a GPIO
3961 * @desc: gpio whose IRQ will be returned (already requested)
0f6d504e 3962 *
79a9becd
AC
3963 * Return the IRQ corresponding to the passed GPIO, or an error code in case of
3964 * error.
0f6d504e 3965 */
79a9becd 3966int gpiod_to_irq(const struct gpio_desc *desc)
0f6d504e 3967{
4c37ce86
LW
3968 struct gpio_chip *chip;
3969 int offset;
0f6d504e 3970
79bb71bd
LW
3971 /*
3972 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
3973 * requires this function to not return zero on an invalid descriptor
3974 * but rather a negative error number.
3975 */
bfbbe44d 3976 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
79bb71bd
LW
3977 return -EINVAL;
3978
fdeb8e15 3979 chip = desc->gdev->chip;
372e722e 3980 offset = gpio_chip_hwgpio(desc);
4c37ce86
LW
3981 if (chip->to_irq) {
3982 int retirq = chip->to_irq(chip, offset);
3983
3984 /* Zero means NO_IRQ */
3985 if (!retirq)
3986 return -ENXIO;
3987
3988 return retirq;
3989 }
3990 return -ENXIO;
0f6d504e 3991}
79a9becd 3992EXPORT_SYMBOL_GPL(gpiod_to_irq);
0f6d504e 3993
d468bf9e 3994/**
e3a2e878 3995 * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
d74be6df
AC
3996 * @chip: the chip the GPIO to lock belongs to
3997 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3998 *
3999 * This is used directly by GPIO drivers that want to lock down
f438acdf 4000 * a certain GPIO line to be used for IRQs.
d468bf9e 4001 */
e3a2e878 4002int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset)
372e722e 4003{
9c10280d
LW
4004 struct gpio_desc *desc;
4005
4006 desc = gpiochip_get_desc(chip, offset);
4007 if (IS_ERR(desc))
4008 return PTR_ERR(desc);
4009
60f8339e
LW
4010 /*
4011 * If it's fast: flush the direction setting if something changed
4012 * behind our back
4013 */
4014 if (!chip->can_sleep && chip->get_direction) {
80956790 4015 int dir = gpiod_get_direction(desc);
9c10280d 4016
36b31279
AS
4017 if (dir < 0) {
4018 chip_err(chip, "%s: cannot get GPIO direction\n",
4019 __func__);
4020 return dir;
4021 }
9c10280d 4022 }
d468bf9e 4023
9c10280d 4024 if (test_bit(FLAG_IS_OUT, &desc->flags)) {
d74be6df 4025 chip_err(chip,
b1911710
AS
4026 "%s: tried to flag a GPIO set as output for IRQ\n",
4027 __func__);
d468bf9e
LW
4028 return -EIO;
4029 }
4030
9c10280d 4031 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 4032 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
4033
4034 /*
4035 * If the consumer has not set up a label (such as when the
4036 * IRQ is referenced from .to_irq()) we set up a label here
4037 * so it is clear this is used as an interrupt.
4038 */
4039 if (!desc->label)
4040 desc_set_label(desc, "interrupt");
4041
d468bf9e 4042 return 0;
372e722e 4043}
e3a2e878 4044EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
d2876d08 4045
d468bf9e 4046/**
e3a2e878 4047 * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
d74be6df
AC
4048 * @chip: the chip the GPIO to lock belongs to
4049 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
4050 *
4051 * This is used directly by GPIO drivers that want to indicate
4052 * that a certain GPIO is no longer used exclusively for IRQ.
d2876d08 4053 */
e3a2e878 4054void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset)
d468bf9e 4055{
3940c34a
LW
4056 struct gpio_desc *desc;
4057
4058 desc = gpiochip_get_desc(chip, offset);
4059 if (IS_ERR(desc))
d468bf9e 4060 return;
d2876d08 4061
3940c34a 4062 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 4063 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
4064
4065 /* If we only had this marking, erase it */
4066 if (desc->label && !strcmp(desc->label, "interrupt"))
4067 desc_set_label(desc, NULL);
d468bf9e 4068}
e3a2e878 4069EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
d468bf9e 4070
4e9439dd
HV
4071void gpiochip_disable_irq(struct gpio_chip *chip, unsigned int offset)
4072{
4073 struct gpio_desc *desc = gpiochip_get_desc(chip, offset);
4074
4075 if (!IS_ERR(desc) &&
4076 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
4077 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
4078}
4079EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
4080
4081void gpiochip_enable_irq(struct gpio_chip *chip, unsigned int offset)
4082{
4083 struct gpio_desc *desc = gpiochip_get_desc(chip, offset);
4084
4085 if (!IS_ERR(desc) &&
4086 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
4087 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags));
4088 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
4089 }
4090}
4091EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
4092
6cee3821
LW
4093bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset)
4094{
4095 if (offset >= chip->ngpio)
4096 return false;
4097
4098 return test_bit(FLAG_USED_AS_IRQ, &chip->gpiodev->descs[offset].flags);
4099}
4100EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
4101
4e6b8238
HV
4102int gpiochip_reqres_irq(struct gpio_chip *chip, unsigned int offset)
4103{
4104 int ret;
4105
4106 if (!try_module_get(chip->gpiodev->owner))
4107 return -ENODEV;
4108
4109 ret = gpiochip_lock_as_irq(chip, offset);
4110 if (ret) {
4111 chip_err(chip, "unable to lock HW IRQ %u for IRQ\n", offset);
4112 module_put(chip->gpiodev->owner);
4113 return ret;
4114 }
4115 return 0;
4116}
4117EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
4118
4119void gpiochip_relres_irq(struct gpio_chip *chip, unsigned int offset)
4120{
4121 gpiochip_unlock_as_irq(chip, offset);
4122 module_put(chip->gpiodev->owner);
4123}
4124EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
4125
143b65d6
LW
4126bool gpiochip_line_is_open_drain(struct gpio_chip *chip, unsigned int offset)
4127{
4128 if (offset >= chip->ngpio)
4129 return false;
4130
4131 return test_bit(FLAG_OPEN_DRAIN, &chip->gpiodev->descs[offset].flags);
4132}
4133EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
4134
4135bool gpiochip_line_is_open_source(struct gpio_chip *chip, unsigned int offset)
4136{
4137 if (offset >= chip->ngpio)
4138 return false;
4139
4140 return test_bit(FLAG_OPEN_SOURCE, &chip->gpiodev->descs[offset].flags);
4141}
4142EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
4143
05f479bf
CK
4144bool gpiochip_line_is_persistent(struct gpio_chip *chip, unsigned int offset)
4145{
4146 if (offset >= chip->ngpio)
4147 return false;
4148
e10f72bf 4149 return !test_bit(FLAG_TRANSITORY, &chip->gpiodev->descs[offset].flags);
05f479bf
CK
4150}
4151EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
4152
79a9becd
AC
4153/**
4154 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
4155 * @desc: gpio whose value will be returned
4156 *
4157 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 4158 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd
AC
4159 *
4160 * This function is to be called from contexts that can sleep.
d2876d08 4161 */
79a9becd 4162int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
d2876d08 4163{
d2876d08 4164 might_sleep_if(extra_checks);
fdeb8e15 4165 VALIDATE_DESC(desc);
fac9d885 4166 return gpiod_get_raw_value_commit(desc);
d2876d08 4167}
79a9becd 4168EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
372e722e 4169
79a9becd
AC
4170/**
4171 * gpiod_get_value_cansleep() - return a gpio's value
4172 * @desc: gpio whose value will be returned
4173 *
4174 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 4175 * account, or negative errno on failure.
79a9becd
AC
4176 *
4177 * This function is to be called from contexts that can sleep.
4178 */
4179int gpiod_get_value_cansleep(const struct gpio_desc *desc)
d2876d08 4180{
3f397c21 4181 int value;
d2876d08
DB
4182
4183 might_sleep_if(extra_checks);
fdeb8e15 4184 VALIDATE_DESC(desc);
fac9d885 4185 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
4186 if (value < 0)
4187 return value;
4188
79a9becd
AC
4189 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
4190 value = !value;
4191
3f397c21 4192 return value;
d2876d08 4193}
79a9becd 4194EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
372e722e 4195
eec1d566
LW
4196/**
4197 * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
b9762beb 4198 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 4199 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 4200 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4201 * @value_bitmap: bitmap to store the read values
eec1d566
LW
4202 *
4203 * Read the raw values of the GPIOs, i.e. the values of the physical lines
4204 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
4205 * else an error code.
4206 *
4207 * This function is to be called from contexts that can sleep.
4208 */
4209int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
4210 struct gpio_desc **desc_array,
77588c14 4211 struct gpio_array *array_info,
b9762beb 4212 unsigned long *value_bitmap)
eec1d566
LW
4213{
4214 might_sleep_if(extra_checks);
4215 if (!desc_array)
4216 return -EINVAL;
4217 return gpiod_get_array_value_complex(true, true, array_size,
77588c14
JK
4218 desc_array, array_info,
4219 value_bitmap);
eec1d566
LW
4220}
4221EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
4222
4223/**
4224 * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
b9762beb 4225 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 4226 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 4227 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4228 * @value_bitmap: bitmap to store the read values
eec1d566
LW
4229 *
4230 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
4231 * into account. Return 0 in case of success, else an error code.
4232 *
4233 * This function is to be called from contexts that can sleep.
4234 */
4235int gpiod_get_array_value_cansleep(unsigned int array_size,
4236 struct gpio_desc **desc_array,
77588c14 4237 struct gpio_array *array_info,
b9762beb 4238 unsigned long *value_bitmap)
eec1d566
LW
4239{
4240 might_sleep_if(extra_checks);
4241 if (!desc_array)
4242 return -EINVAL;
4243 return gpiod_get_array_value_complex(false, true, array_size,
77588c14
JK
4244 desc_array, array_info,
4245 value_bitmap);
eec1d566
LW
4246}
4247EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
4248
79a9becd
AC
4249/**
4250 * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
4251 * @desc: gpio whose value will be assigned
4252 * @value: value to assign
4253 *
4254 * Set the raw value of the GPIO, i.e. the value of its physical line without
4255 * regard for its ACTIVE_LOW status.
4256 *
4257 * This function is to be called from contexts that can sleep.
4258 */
4259void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
372e722e 4260{
d2876d08 4261 might_sleep_if(extra_checks);
fdeb8e15 4262 VALIDATE_DESC_VOID(desc);
fac9d885 4263 gpiod_set_raw_value_commit(desc, value);
372e722e 4264}
79a9becd 4265EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
d2876d08 4266
79a9becd
AC
4267/**
4268 * gpiod_set_value_cansleep() - assign a gpio's value
4269 * @desc: gpio whose value will be assigned
4270 * @value: value to assign
4271 *
4272 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
4273 * account
4274 *
4275 * This function is to be called from contexts that can sleep.
4276 */
4277void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
d2876d08 4278{
d2876d08 4279 might_sleep_if(extra_checks);
fdeb8e15 4280 VALIDATE_DESC_VOID(desc);
1e77fc82 4281 gpiod_set_value_nocheck(desc, value);
372e722e 4282}
79a9becd 4283EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
d2876d08 4284
5f424243 4285/**
3fff99bc 4286 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 4287 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4288 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4289 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4290 * @value_bitmap: bitmap of values to assign
5f424243
RI
4291 *
4292 * Set the raw values of the GPIOs, i.e. the values of the physical lines
4293 * without regard for their ACTIVE_LOW status.
4294 *
4295 * This function is to be called from contexts that can sleep.
4296 */
3027743f 4297int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3c940660
GU
4298 struct gpio_desc **desc_array,
4299 struct gpio_array *array_info,
4300 unsigned long *value_bitmap)
5f424243
RI
4301{
4302 might_sleep_if(extra_checks);
4303 if (!desc_array)
3027743f
LA
4304 return -EINVAL;
4305 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
77588c14 4306 array_info, value_bitmap);
5f424243 4307}
3fff99bc 4308EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
5f424243 4309
3946d187
DT
4310/**
4311 * gpiod_add_lookup_tables() - register GPIO device consumers
4312 * @tables: list of tables of consumers to register
4313 * @n: number of tables in the list
4314 */
4315void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
4316{
4317 unsigned int i;
4318
4319 mutex_lock(&gpio_lookup_lock);
4320
4321 for (i = 0; i < n; i++)
4322 list_add_tail(&tables[i]->list, &gpio_lookup_list);
4323
4324 mutex_unlock(&gpio_lookup_lock);
4325}
4326
5f424243 4327/**
3fff99bc 4328 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 4329 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4330 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4331 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4332 * @value_bitmap: bitmap of values to assign
5f424243
RI
4333 *
4334 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
4335 * into account.
4336 *
4337 * This function is to be called from contexts that can sleep.
4338 */
cf9af0d5
GU
4339int gpiod_set_array_value_cansleep(unsigned int array_size,
4340 struct gpio_desc **desc_array,
4341 struct gpio_array *array_info,
4342 unsigned long *value_bitmap)
5f424243
RI
4343{
4344 might_sleep_if(extra_checks);
4345 if (!desc_array)
cf9af0d5
GU
4346 return -EINVAL;
4347 return gpiod_set_array_value_complex(false, true, array_size,
4348 desc_array, array_info,
4349 value_bitmap);
5f424243 4350}
3fff99bc 4351EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
5f424243 4352
bae48da2 4353/**
ad824783
AC
4354 * gpiod_add_lookup_table() - register GPIO device consumers
4355 * @table: table of consumers to register
bae48da2 4356 */
ad824783 4357void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
bae48da2
AC
4358{
4359 mutex_lock(&gpio_lookup_lock);
4360
ad824783 4361 list_add_tail(&table->list, &gpio_lookup_list);
bae48da2
AC
4362
4363 mutex_unlock(&gpio_lookup_lock);
4364}
226b2242 4365EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
bae48da2 4366
be9015ab
SK
4367/**
4368 * gpiod_remove_lookup_table() - unregister GPIO device consumers
4369 * @table: table of consumers to unregister
4370 */
4371void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
4372{
4373 mutex_lock(&gpio_lookup_lock);
4374
4375 list_del(&table->list);
4376
4377 mutex_unlock(&gpio_lookup_lock);
4378}
226b2242 4379EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
be9015ab 4380
a411e81e
BG
4381/**
4382 * gpiod_add_hogs() - register a set of GPIO hogs from machine code
4383 * @hogs: table of gpio hog entries with a zeroed sentinel at the end
4384 */
4385void gpiod_add_hogs(struct gpiod_hog *hogs)
4386{
4387 struct gpio_chip *chip;
4388 struct gpiod_hog *hog;
4389
4390 mutex_lock(&gpio_machine_hogs_mutex);
4391
4392 for (hog = &hogs[0]; hog->chip_label; hog++) {
4393 list_add_tail(&hog->list, &gpio_machine_hogs);
4394
4395 /*
4396 * The chip may have been registered earlier, so check if it
4397 * exists and, if so, try to hog the line now.
4398 */
4399 chip = find_chip_by_name(hog->chip_label);
4400 if (chip)
4401 gpiochip_machine_hog(chip, hog);
4402 }
4403
4404 mutex_unlock(&gpio_machine_hogs_mutex);
4405}
4406EXPORT_SYMBOL_GPL(gpiod_add_hogs);
4407
ad824783 4408static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
bae48da2
AC
4409{
4410 const char *dev_id = dev ? dev_name(dev) : NULL;
ad824783 4411 struct gpiod_lookup_table *table;
bae48da2
AC
4412
4413 mutex_lock(&gpio_lookup_lock);
4414
ad824783
AC
4415 list_for_each_entry(table, &gpio_lookup_list, list) {
4416 if (table->dev_id && dev_id) {
4417 /*
4418 * Valid strings on both ends, must be identical to have
4419 * a match
4420 */
4421 if (!strcmp(table->dev_id, dev_id))
4422 goto found;
4423 } else {
4424 /*
4425 * One of the pointers is NULL, so both must be to have
4426 * a match
4427 */
4428 if (dev_id == table->dev_id)
4429 goto found;
4430 }
4431 }
4432 table = NULL;
bae48da2 4433
ad824783
AC
4434found:
4435 mutex_unlock(&gpio_lookup_lock);
4436 return table;
4437}
bae48da2 4438
ad824783 4439static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
fed7026a 4440 unsigned int idx, unsigned long *flags)
ad824783 4441{
2a3cf6a3 4442 struct gpio_desc *desc = ERR_PTR(-ENOENT);
ad824783
AC
4443 struct gpiod_lookup_table *table;
4444 struct gpiod_lookup *p;
bae48da2 4445
ad824783
AC
4446 table = gpiod_find_lookup_table(dev);
4447 if (!table)
4448 return desc;
bae48da2 4449
ad824783
AC
4450 for (p = &table->table[0]; p->chip_label; p++) {
4451 struct gpio_chip *chip;
bae48da2 4452
ad824783 4453 /* idx must always match exactly */
bae48da2
AC
4454 if (p->idx != idx)
4455 continue;
4456
ad824783
AC
4457 /* If the lookup entry has a con_id, require exact match */
4458 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
4459 continue;
bae48da2 4460
ad824783 4461 chip = find_chip_by_name(p->chip_label);
bae48da2 4462
ad824783 4463 if (!chip) {
8853daf3
JK
4464 /*
4465 * As the lookup table indicates a chip with
4466 * p->chip_label should exist, assume it may
4467 * still appear later and let the interested
4468 * consumer be probed again or let the Deferred
4469 * Probe infrastructure handle the error.
4470 */
4471 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
4472 p->chip_label);
4473 return ERR_PTR(-EPROBE_DEFER);
ad824783 4474 }
bae48da2 4475
ad824783 4476 if (chip->ngpio <= p->chip_hwnum) {
2a3cf6a3
AC
4477 dev_err(dev,
4478 "requested GPIO %d is out of range [0..%d] for chip %s\n",
4479 idx, chip->ngpio, chip->label);
4480 return ERR_PTR(-EINVAL);
bae48da2 4481 }
bae48da2 4482
bb1e88cc 4483 desc = gpiochip_get_desc(chip, p->chip_hwnum);
ad824783 4484 *flags = p->flags;
bae48da2 4485
2a3cf6a3 4486 return desc;
bae48da2
AC
4487 }
4488
bae48da2
AC
4489 return desc;
4490}
4491
66858527
RI
4492static int platform_gpio_count(struct device *dev, const char *con_id)
4493{
4494 struct gpiod_lookup_table *table;
4495 struct gpiod_lookup *p;
4496 unsigned int count = 0;
4497
4498 table = gpiod_find_lookup_table(dev);
4499 if (!table)
4500 return -ENOENT;
4501
4502 for (p = &table->table[0]; p->chip_label; p++) {
4503 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
4504 (!con_id && !p->con_id))
4505 count++;
4506 }
4507 if (!count)
4508 return -ENOENT;
4509
4510 return count;
4511}
4512
13949fa9
DT
4513/**
4514 * fwnode_gpiod_get_index - obtain a GPIO from firmware node
4515 * @fwnode: handle of the firmware node
4516 * @con_id: function within the GPIO consumer
4517 * @index: index of the GPIO to obtain for the consumer
4518 * @flags: GPIO initialization flags
4519 * @label: label to attach to the requested GPIO
4520 *
4521 * This function can be used for drivers that get their configuration
4522 * from opaque firmware.
4523 *
4524 * The function properly finds the corresponding GPIO using whatever is the
4525 * underlying firmware interface and then makes sure that the GPIO
4526 * descriptor is requested before it is returned to the caller.
4527 *
4528 * Returns:
4529 * On successful request the GPIO pin is configured in accordance with
4530 * provided @flags.
4531 *
4532 * In case of error an ERR_PTR() is returned.
4533 */
4534struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
4535 const char *con_id, int index,
4536 enum gpiod_flags flags,
4537 const char *label)
4538{
4539 struct gpio_desc *desc;
4540 char prop_name[32]; /* 32 is max size of property name */
4541 unsigned int i;
4542
4543 for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) {
4544 if (con_id)
4545 snprintf(prop_name, sizeof(prop_name), "%s-%s",
4546 con_id, gpio_suffixes[i]);
4547 else
4548 snprintf(prop_name, sizeof(prop_name), "%s",
4549 gpio_suffixes[i]);
4550
4551 desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags,
4552 label);
4553 if (!IS_ERR(desc) || (PTR_ERR(desc) != -ENOENT))
4554 break;
4555 }
4556
4557 return desc;
4558}
4559EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
4560
66858527
RI
4561/**
4562 * gpiod_count - return the number of GPIOs associated with a device / function
4563 * or -ENOENT if no GPIO has been assigned to the requested function
4564 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4565 * @con_id: function within the GPIO consumer
4566 */
4567int gpiod_count(struct device *dev, const char *con_id)
4568{
4569 int count = -ENOENT;
4570
4571 if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node)
f626d6df 4572 count = of_gpio_get_count(dev, con_id);
66858527
RI
4573 else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev))
4574 count = acpi_gpio_count(dev, con_id);
4575
4576 if (count < 0)
4577 count = platform_gpio_count(dev, con_id);
4578
4579 return count;
4580}
4581EXPORT_SYMBOL_GPL(gpiod_count);
4582
bae48da2 4583/**
0879162f 4584 * gpiod_get - obtain a GPIO for a given GPIO function
ad824783 4585 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2 4586 * @con_id: function within the GPIO consumer
39b2bbe3 4587 * @flags: optional GPIO initialization flags
bae48da2
AC
4588 *
4589 * Return the GPIO descriptor corresponding to the function con_id of device
2a3cf6a3 4590 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
20a8a968 4591 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
bae48da2 4592 */
b17d1bf1 4593struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
39b2bbe3 4594 enum gpiod_flags flags)
bae48da2 4595{
39b2bbe3 4596 return gpiod_get_index(dev, con_id, 0, flags);
bae48da2 4597}
b17d1bf1 4598EXPORT_SYMBOL_GPL(gpiod_get);
bae48da2 4599
29a1f233
TR
4600/**
4601 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
4602 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4603 * @con_id: function within the GPIO consumer
39b2bbe3 4604 * @flags: optional GPIO initialization flags
29a1f233
TR
4605 *
4606 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
4607 * the requested function it will return NULL. This is convenient for drivers
4608 * that need to handle optional GPIOs.
4609 */
b17d1bf1 4610struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
39b2bbe3
AC
4611 const char *con_id,
4612 enum gpiod_flags flags)
29a1f233 4613{
39b2bbe3 4614 return gpiod_get_index_optional(dev, con_id, 0, flags);
29a1f233 4615}
b17d1bf1 4616EXPORT_SYMBOL_GPL(gpiod_get_optional);
29a1f233 4617
f625d460
BP
4618
4619/**
4620 * gpiod_configure_flags - helper function to configure a given GPIO
4621 * @desc: gpio whose value will be assigned
4622 * @con_id: function within the GPIO consumer
fed7026a
AS
4623 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4624 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4625 * @dflags: gpiod_flags - optional GPIO initialization flags
4626 *
4627 * Return 0 on success, -ENOENT if no GPIO has been assigned to the
4628 * requested function and/or index, or another IS_ERR() code if an error
4629 * occurred while trying to acquire the GPIO.
4630 */
c29fd9eb 4631int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
85b03b30 4632 unsigned long lflags, enum gpiod_flags dflags)
f625d460 4633{
d377f56f 4634 int ret;
f625d460 4635
85b03b30
JH
4636 if (lflags & GPIO_ACTIVE_LOW)
4637 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
f926dfc1 4638
85b03b30
JH
4639 if (lflags & GPIO_OPEN_DRAIN)
4640 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
f926dfc1
LW
4641 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
4642 /*
4643 * This enforces open drain mode from the consumer side.
4644 * This is necessary for some busses like I2C, but the lookup
4645 * should *REALLY* have specified them as open drain in the
4646 * first place, so print a little warning here.
4647 */
4648 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
4649 gpiod_warn(desc,
4650 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
4651 }
4652
85b03b30
JH
4653 if (lflags & GPIO_OPEN_SOURCE)
4654 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
e10f72bf 4655
d449991c
TP
4656 if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) {
4657 gpiod_err(desc,
4658 "both pull-up and pull-down enabled, invalid configuration\n");
4659 return -EINVAL;
4660 }
4661
4662 if (lflags & GPIO_PULL_UP)
4663 set_bit(FLAG_PULL_UP, &desc->flags);
4664 else if (lflags & GPIO_PULL_DOWN)
4665 set_bit(FLAG_PULL_DOWN, &desc->flags);
4666
d377f56f
LW
4667 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
4668 if (ret < 0)
4669 return ret;
85b03b30 4670
f625d460
BP
4671 /* No particular flag request, return here... */
4672 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
4673 pr_debug("no flags found for %s\n", con_id);
4674 return 0;
4675 }
4676
4677 /* Process flags */
4678 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
d377f56f 4679 ret = gpiod_direction_output(desc,
ad17731d 4680 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
f625d460 4681 else
d377f56f 4682 ret = gpiod_direction_input(desc);
f625d460 4683
d377f56f 4684 return ret;
f625d460
BP
4685}
4686
bae48da2
AC
4687/**
4688 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
fdd6a5fe 4689 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2
AC
4690 * @con_id: function within the GPIO consumer
4691 * @idx: index of the GPIO to obtain in the consumer
39b2bbe3 4692 * @flags: optional GPIO initialization flags
bae48da2
AC
4693 *
4694 * This variant of gpiod_get() allows to access GPIOs other than the first
4695 * defined one for functions that define several GPIOs.
4696 *
2a3cf6a3
AC
4697 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
4698 * requested function and/or index, or another IS_ERR() code if an error
20a8a968 4699 * occurred while trying to acquire the GPIO.
bae48da2 4700 */
b17d1bf1 4701struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
bae48da2 4702 const char *con_id,
39b2bbe3
AC
4703 unsigned int idx,
4704 enum gpiod_flags flags)
bae48da2 4705{
2d6c06f5 4706 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
35c5d7fd 4707 struct gpio_desc *desc = NULL;
d377f56f 4708 int ret;
7d18f0a1
LW
4709 /* Maybe we have a device name, maybe not */
4710 const char *devname = dev ? dev_name(dev) : "?";
bae48da2
AC
4711
4712 dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id);
4713
4d8440b9
RW
4714 if (dev) {
4715 /* Using device tree? */
4716 if (IS_ENABLED(CONFIG_OF) && dev->of_node) {
4717 dev_dbg(dev, "using device tree for GPIO lookup\n");
4718 desc = of_find_gpio(dev, con_id, idx, &lookupflags);
4719 } else if (ACPI_COMPANION(dev)) {
4720 dev_dbg(dev, "using ACPI for GPIO lookup\n");
a31f5c3a 4721 desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags);
4d8440b9 4722 }
35c5d7fd
AC
4723 }
4724
4725 /*
4726 * Either we are not using DT or ACPI, or their lookup did not return
4727 * a result. In that case, use platform lookup as a fallback.
4728 */
2a3cf6a3 4729 if (!desc || desc == ERR_PTR(-ENOENT)) {
43a8785a 4730 dev_dbg(dev, "using lookup tables for GPIO lookup\n");
39b2bbe3 4731 desc = gpiod_find(dev, con_id, idx, &lookupflags);
bae48da2
AC
4732 }
4733
4734 if (IS_ERR(desc)) {
9d5a1f2c 4735 dev_dbg(dev, "No GPIO consumer %s found\n", con_id);
bae48da2
AC
4736 return desc;
4737 }
4738
7d18f0a1
LW
4739 /*
4740 * If a connection label was passed use that, else attempt to use
4741 * the device name as label
4742 */
d377f56f
LW
4743 ret = gpiod_request(desc, con_id ? con_id : devname);
4744 if (ret < 0) {
4745 if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) {
b0ce7b29
LW
4746 /*
4747 * This happens when there are several consumers for
4748 * the same GPIO line: we just return here without
4749 * further initialization. It is a bit if a hack.
4750 * This is necessary to support fixed regulators.
4751 *
4752 * FIXME: Make this more sane and safe.
4753 */
4754 dev_info(dev, "nonexclusive access to GPIO for %s\n",
4755 con_id ? con_id : devname);
4756 return desc;
4757 } else {
d377f56f 4758 return ERR_PTR(ret);
b0ce7b29
LW
4759 }
4760 }
bae48da2 4761
d377f56f 4762 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
6392cca4 4763 if (ret < 0) {
39b2bbe3 4764 dev_dbg(dev, "setup of GPIO %s failed\n", con_id);
6392cca4
LW
4765 gpiod_put(desc);
4766 return ERR_PTR(ret);
4767 }
4768
4769 return desc;
4770}
b17d1bf1 4771EXPORT_SYMBOL_GPL(gpiod_get_index);
6392cca4 4772
40b73183
MW
4773/**
4774 * fwnode_get_named_gpiod - obtain a GPIO from firmware node
4775 * @fwnode: handle of the firmware node
4776 * @propname: name of the firmware property representing the GPIO
6392cca4 4777 * @index: index of the GPIO to obtain for the consumer
a264d10f 4778 * @dflags: GPIO initialization flags
950d55f5 4779 * @label: label to attach to the requested GPIO
40b73183
MW
4780 *
4781 * This function can be used for drivers that get their configuration
6392cca4 4782 * from opaque firmware.
40b73183 4783 *
6392cca4 4784 * The function properly finds the corresponding GPIO using whatever is the
40b73183
MW
4785 * underlying firmware interface and then makes sure that the GPIO
4786 * descriptor is requested before it is returned to the caller.
4787 *
950d55f5 4788 * Returns:
ff21378a 4789 * On successful request the GPIO pin is configured in accordance with
a264d10f
AS
4790 * provided @dflags.
4791 *
40b73183
MW
4792 * In case of error an ERR_PTR() is returned.
4793 */
4794struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
537b94da 4795 const char *propname, int index,
b2987d74
AS
4796 enum gpiod_flags dflags,
4797 const char *label)
40b73183 4798{
2d6c06f5 4799 unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT;
40b73183 4800 struct gpio_desc *desc = ERR_PTR(-ENODEV);
40b73183
MW
4801 int ret;
4802
4803 if (!fwnode)
4804 return ERR_PTR(-EINVAL);
4805
4806 if (is_of_node(fwnode)) {
6392cca4
LW
4807 desc = gpiod_get_from_of_node(to_of_node(fwnode),
4808 propname, index,
4809 dflags,
4810 label);
4811 return desc;
40b73183
MW
4812 } else if (is_acpi_node(fwnode)) {
4813 struct acpi_gpio_info info;
4814
537b94da 4815 desc = acpi_node_get_gpiod(fwnode, propname, index, &info);
6392cca4
LW
4816 if (IS_ERR(desc))
4817 return desc;
40b73183 4818
6392cca4 4819 acpi_gpio_update_gpiod_flags(&dflags, &info);
606be344 4820 acpi_gpio_update_gpiod_lookup_flags(&lflags, &info);
6392cca4 4821 }
40b73183 4822
6392cca4 4823 /* Currently only ACPI takes this path */
b2987d74 4824 ret = gpiod_request(desc, label);
85b03b30
JH
4825 if (ret)
4826 return ERR_PTR(ret);
4827
a264d10f
AS
4828 ret = gpiod_configure_flags(desc, propname, lflags, dflags);
4829 if (ret < 0) {
4830 gpiod_put(desc);
4831 return ERR_PTR(ret);
90b665f6
LP
4832 }
4833
40b73183
MW
4834 return desc;
4835}
4836EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod);
4837
29a1f233
TR
4838/**
4839 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
4840 * function
4841 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4842 * @con_id: function within the GPIO consumer
4843 * @index: index of the GPIO to obtain in the consumer
39b2bbe3 4844 * @flags: optional GPIO initialization flags
29a1f233
TR
4845 *
4846 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
4847 * specified index was assigned to the requested function it will return NULL.
4848 * This is convenient for drivers that need to handle optional GPIOs.
4849 */
b17d1bf1 4850struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
29a1f233 4851 const char *con_id,
39b2bbe3
AC
4852 unsigned int index,
4853 enum gpiod_flags flags)
29a1f233
TR
4854{
4855 struct gpio_desc *desc;
4856
39b2bbe3 4857 desc = gpiod_get_index(dev, con_id, index, flags);
29a1f233
TR
4858 if (IS_ERR(desc)) {
4859 if (PTR_ERR(desc) == -ENOENT)
4860 return NULL;
4861 }
4862
4863 return desc;
4864}
b17d1bf1 4865EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
29a1f233 4866
f625d460
BP
4867/**
4868 * gpiod_hog - Hog the specified GPIO desc given the provided flags
4869 * @desc: gpio whose value will be assigned
4870 * @name: gpio line name
fed7026a
AS
4871 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4872 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4873 * @dflags: gpiod_flags - optional GPIO initialization flags
4874 */
4875int gpiod_hog(struct gpio_desc *desc, const char *name,
4876 unsigned long lflags, enum gpiod_flags dflags)
4877{
4878 struct gpio_chip *chip;
4879 struct gpio_desc *local_desc;
4880 int hwnum;
d377f56f 4881 int ret;
f625d460
BP
4882
4883 chip = gpiod_to_chip(desc);
4884 hwnum = gpio_chip_hwgpio(desc);
4885
5923ea6c
LW
4886 local_desc = gpiochip_request_own_desc(chip, hwnum, name,
4887 lflags, dflags);
f625d460 4888 if (IS_ERR(local_desc)) {
d377f56f 4889 ret = PTR_ERR(local_desc);
c31a571d 4890 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
d377f56f
LW
4891 name, chip->label, hwnum, ret);
4892 return ret;
f625d460
BP
4893 }
4894
f625d460
BP
4895 /* Mark GPIO as hogged so it can be identified and removed later */
4896 set_bit(FLAG_IS_HOGGED, &desc->flags);
4897
4898 pr_info("GPIO line %d (%s) hogged as %s%s\n",
4899 desc_to_gpio(desc), name,
b27f300f
BG
4900 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
4901 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
4902 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
f625d460
BP
4903
4904 return 0;
4905}
4906
4907/**
4908 * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
4909 * @chip: gpio chip to act on
f625d460
BP
4910 */
4911static void gpiochip_free_hogs(struct gpio_chip *chip)
4912{
4913 int id;
4914
4915 for (id = 0; id < chip->ngpio; id++) {
1c3cdb18
LW
4916 if (test_bit(FLAG_IS_HOGGED, &chip->gpiodev->descs[id].flags))
4917 gpiochip_free_own_desc(&chip->gpiodev->descs[id]);
f625d460
BP
4918 }
4919}
4920
66858527
RI
4921/**
4922 * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
4923 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4924 * @con_id: function within the GPIO consumer
4925 * @flags: optional GPIO initialization flags
4926 *
4927 * This function acquires all the GPIOs defined under a given function.
4928 *
4929 * Return a struct gpio_descs containing an array of descriptors, -ENOENT if
4930 * no GPIO has been assigned to the requested function, or another IS_ERR()
4931 * code if an error occurred while trying to acquire the GPIOs.
4932 */
4933struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
4934 const char *con_id,
4935 enum gpiod_flags flags)
4936{
4937 struct gpio_desc *desc;
4938 struct gpio_descs *descs;
bf9346f5
JK
4939 struct gpio_array *array_info = NULL;
4940 struct gpio_chip *chip;
4941 int count, bitmap_size;
66858527
RI
4942
4943 count = gpiod_count(dev, con_id);
4944 if (count < 0)
4945 return ERR_PTR(count);
4946
acafe7e3 4947 descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL);
66858527
RI
4948 if (!descs)
4949 return ERR_PTR(-ENOMEM);
4950
4951 for (descs->ndescs = 0; descs->ndescs < count; ) {
4952 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
4953 if (IS_ERR(desc)) {
4954 gpiod_put_array(descs);
4955 return ERR_CAST(desc);
4956 }
bf9346f5 4957
66858527 4958 descs->desc[descs->ndescs] = desc;
bf9346f5
JK
4959
4960 chip = gpiod_to_chip(desc);
4961 /*
c4c958aa
JK
4962 * If pin hardware number of array member 0 is also 0, select
4963 * its chip as a candidate for fast bitmap processing path.
bf9346f5 4964 */
c4c958aa 4965 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
bf9346f5
JK
4966 struct gpio_descs *array;
4967
4968 bitmap_size = BITS_TO_LONGS(chip->ngpio > count ?
4969 chip->ngpio : count);
4970
4971 array = kzalloc(struct_size(descs, desc, count) +
4972 struct_size(array_info, invert_mask,
4973 3 * bitmap_size), GFP_KERNEL);
4974 if (!array) {
4975 gpiod_put_array(descs);
4976 return ERR_PTR(-ENOMEM);
4977 }
4978
4979 memcpy(array, descs,
4980 struct_size(descs, desc, descs->ndescs + 1));
4981 kfree(descs);
4982
4983 descs = array;
4984 array_info = (void *)(descs->desc + count);
4985 array_info->get_mask = array_info->invert_mask +
4986 bitmap_size;
4987 array_info->set_mask = array_info->get_mask +
4988 bitmap_size;
4989
4990 array_info->desc = descs->desc;
4991 array_info->size = count;
4992 array_info->chip = chip;
4993 bitmap_set(array_info->get_mask, descs->ndescs,
4994 count - descs->ndescs);
4995 bitmap_set(array_info->set_mask, descs->ndescs,
4996 count - descs->ndescs);
4997 descs->info = array_info;
4998 }
c4c958aa
JK
4999 /* Unmark array members which don't belong to the 'fast' chip */
5000 if (array_info && array_info->chip != chip) {
bf9346f5
JK
5001 __clear_bit(descs->ndescs, array_info->get_mask);
5002 __clear_bit(descs->ndescs, array_info->set_mask);
c4c958aa
JK
5003 }
5004 /*
5005 * Detect array members which belong to the 'fast' chip
5006 * but their pins are not in hardware order.
5007 */
5008 else if (array_info &&
5009 gpio_chip_hwgpio(desc) != descs->ndescs) {
5010 /*
5011 * Don't use fast path if all array members processed so
5012 * far belong to the same chip as this one but its pin
5013 * hardware number is different from its array index.
5014 */
5015 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
5016 array_info = NULL;
5017 } else {
5018 __clear_bit(descs->ndescs,
5019 array_info->get_mask);
5020 __clear_bit(descs->ndescs,
5021 array_info->set_mask);
5022 }
bf9346f5
JK
5023 } else if (array_info) {
5024 /* Exclude open drain or open source from fast output */
5025 if (gpiochip_line_is_open_drain(chip, descs->ndescs) ||
5026 gpiochip_line_is_open_source(chip, descs->ndescs))
5027 __clear_bit(descs->ndescs,
5028 array_info->set_mask);
5029 /* Identify 'fast' pins which require invertion */
5030 if (gpiod_is_active_low(desc))
5031 __set_bit(descs->ndescs,
5032 array_info->invert_mask);
5033 }
5034
66858527
RI
5035 descs->ndescs++;
5036 }
bf9346f5
JK
5037 if (array_info)
5038 dev_dbg(dev,
5039 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
5040 array_info->chip->label, array_info->size,
5041 *array_info->get_mask, *array_info->set_mask,
5042 *array_info->invert_mask);
66858527
RI
5043 return descs;
5044}
5045EXPORT_SYMBOL_GPL(gpiod_get_array);
5046
5047/**
5048 * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
5049 * function
5050 * @dev: GPIO consumer, can be NULL for system-global GPIOs
5051 * @con_id: function within the GPIO consumer
5052 * @flags: optional GPIO initialization flags
5053 *
5054 * This is equivalent to gpiod_get_array(), except that when no GPIO was
5055 * assigned to the requested function it will return NULL.
5056 */
5057struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
5058 const char *con_id,
5059 enum gpiod_flags flags)
5060{
5061 struct gpio_descs *descs;
5062
5063 descs = gpiod_get_array(dev, con_id, flags);
5064 if (IS_ERR(descs) && (PTR_ERR(descs) == -ENOENT))
5065 return NULL;
5066
5067 return descs;
5068}
5069EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
5070
bae48da2
AC
5071/**
5072 * gpiod_put - dispose of a GPIO descriptor
5073 * @desc: GPIO descriptor to dispose of
5074 *
5075 * No descriptor can be used after gpiod_put() has been called on it.
5076 */
5077void gpiod_put(struct gpio_desc *desc)
5078{
1d7765ba
AS
5079 if (desc)
5080 gpiod_free(desc);
372e722e 5081}
bae48da2 5082EXPORT_SYMBOL_GPL(gpiod_put);
d2876d08 5083
66858527
RI
5084/**
5085 * gpiod_put_array - dispose of multiple GPIO descriptors
5086 * @descs: struct gpio_descs containing an array of descriptors
5087 */
5088void gpiod_put_array(struct gpio_descs *descs)
5089{
5090 unsigned int i;
5091
5092 for (i = 0; i < descs->ndescs; i++)
5093 gpiod_put(descs->desc[i]);
5094
5095 kfree(descs);
5096}
5097EXPORT_SYMBOL_GPL(gpiod_put_array);
5098
3c702e99
LW
5099static int __init gpiolib_dev_init(void)
5100{
5101 int ret;
5102
5103 /* Register GPIO sysfs bus */
b1911710 5104 ret = bus_register(&gpio_bus_type);
3c702e99
LW
5105 if (ret < 0) {
5106 pr_err("gpiolib: could not register GPIO bus type\n");
5107 return ret;
5108 }
5109
5110 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpiochip");
5111 if (ret < 0) {
5112 pr_err("gpiolib: failed to allocate char dev region\n");
5113 bus_unregister(&gpio_bus_type);
159f3cd9
GR
5114 } else {
5115 gpiolib_initialized = true;
5116 gpiochip_setup_devs();
3c702e99
LW
5117 }
5118 return ret;
5119}
5120core_initcall(gpiolib_dev_init);
5121
d2876d08
DB
5122#ifdef CONFIG_DEBUG_FS
5123
fdeb8e15 5124static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
d2876d08
DB
5125{
5126 unsigned i;
fdeb8e15
LW
5127 struct gpio_chip *chip = gdev->chip;
5128 unsigned gpio = gdev->base;
5129 struct gpio_desc *gdesc = &gdev->descs[0];
90fd2270
LW
5130 bool is_out;
5131 bool is_irq;
5132 bool active_low;
d2876d08 5133
fdeb8e15 5134 for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) {
ced433e2
MP
5135 if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) {
5136 if (gdesc->name) {
5137 seq_printf(s, " gpio-%-3d (%-20.20s)\n",
5138 gpio, gdesc->name);
5139 }
d2876d08 5140 continue;
ced433e2 5141 }
d2876d08 5142
372e722e 5143 gpiod_get_direction(gdesc);
d2876d08 5144 is_out = test_bit(FLAG_IS_OUT, &gdesc->flags);
d468bf9e 5145 is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags);
90fd2270
LW
5146 active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags);
5147 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s",
ced433e2 5148 gpio, gdesc->name ? gdesc->name : "", gdesc->label,
d2876d08 5149 is_out ? "out" : "in ",
1c22a252 5150 chip->get ? (chip->get(chip, i) ? "hi" : "lo") : "? ",
90fd2270
LW
5151 is_irq ? "IRQ " : "",
5152 active_low ? "ACTIVE LOW" : "");
d2876d08
DB
5153 seq_printf(s, "\n");
5154 }
5155}
5156
f9c4a31f 5157static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
d2876d08 5158{
362432ae 5159 unsigned long flags;
ff2b1359 5160 struct gpio_device *gdev = NULL;
cb1650d4 5161 loff_t index = *pos;
d2876d08 5162
f9c4a31f 5163 s->private = "";
d2876d08 5164
362432ae 5165 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 5166 list_for_each_entry(gdev, &gpio_devices, list)
362432ae
GL
5167 if (index-- == 0) {
5168 spin_unlock_irqrestore(&gpio_lock, flags);
ff2b1359 5169 return gdev;
f9c4a31f 5170 }
362432ae 5171 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f 5172
cb1650d4 5173 return NULL;
f9c4a31f
TR
5174}
5175
5176static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
5177{
362432ae 5178 unsigned long flags;
ff2b1359 5179 struct gpio_device *gdev = v;
f9c4a31f
TR
5180 void *ret = NULL;
5181
362432ae 5182 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 5183 if (list_is_last(&gdev->list, &gpio_devices))
cb1650d4
AC
5184 ret = NULL;
5185 else
ff2b1359 5186 ret = list_entry(gdev->list.next, struct gpio_device, list);
362432ae 5187 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f
TR
5188
5189 s->private = "\n";
5190 ++*pos;
5191
5192 return ret;
5193}
5194
5195static void gpiolib_seq_stop(struct seq_file *s, void *v)
5196{
5197}
5198
5199static int gpiolib_seq_show(struct seq_file *s, void *v)
5200{
ff2b1359
LW
5201 struct gpio_device *gdev = v;
5202 struct gpio_chip *chip = gdev->chip;
5203 struct device *parent;
5204
5205 if (!chip) {
5206 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
5207 dev_name(&gdev->dev));
5208 return 0;
5209 }
f9c4a31f 5210
ff2b1359
LW
5211 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
5212 dev_name(&gdev->dev),
fdeb8e15 5213 gdev->base, gdev->base + gdev->ngpio - 1);
ff2b1359
LW
5214 parent = chip->parent;
5215 if (parent)
5216 seq_printf(s, ", parent: %s/%s",
5217 parent->bus ? parent->bus->name : "no-bus",
5218 dev_name(parent));
f9c4a31f
TR
5219 if (chip->label)
5220 seq_printf(s, ", %s", chip->label);
5221 if (chip->can_sleep)
5222 seq_printf(s, ", can sleep");
5223 seq_printf(s, ":\n");
5224
5225 if (chip->dbg_show)
5226 chip->dbg_show(s, chip);
5227 else
fdeb8e15 5228 gpiolib_dbg_show(s, gdev);
f9c4a31f 5229
d2876d08
DB
5230 return 0;
5231}
5232
f9c4a31f
TR
5233static const struct seq_operations gpiolib_seq_ops = {
5234 .start = gpiolib_seq_start,
5235 .next = gpiolib_seq_next,
5236 .stop = gpiolib_seq_stop,
5237 .show = gpiolib_seq_show,
5238};
5239
d2876d08
DB
5240static int gpiolib_open(struct inode *inode, struct file *file)
5241{
f9c4a31f 5242 return seq_open(file, &gpiolib_seq_ops);
d2876d08
DB
5243}
5244
828c0950 5245static const struct file_operations gpiolib_operations = {
f9c4a31f 5246 .owner = THIS_MODULE,
d2876d08
DB
5247 .open = gpiolib_open,
5248 .read = seq_read,
5249 .llseek = seq_lseek,
f9c4a31f 5250 .release = seq_release,
d2876d08
DB
5251};
5252
5253static int __init gpiolib_debugfs_init(void)
5254{
5255 /* /sys/kernel/debug/gpio */
acc68b0e
GKH
5256 debugfs_create_file("gpio", S_IFREG | S_IRUGO, NULL, NULL,
5257 &gpiolib_operations);
d2876d08
DB
5258 return 0;
5259}
5260subsys_initcall(gpiolib_debugfs_init);
5261
5262#endif /* DEBUG_FS */