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dae5f0af | 1 | // SPDX-License-Identifier: GPL-2.0 |
923a654c | 2 | #include <linux/bitmap.h> |
d2876d08 DB |
3 | #include <linux/kernel.h> |
4 | #include <linux/module.h> | |
ff77c352 | 5 | #include <linux/interrupt.h> |
d2876d08 DB |
6 | #include <linux/irq.h> |
7 | #include <linux/spinlock.h> | |
1a989d0f | 8 | #include <linux/list.h> |
d8f388d8 DB |
9 | #include <linux/device.h> |
10 | #include <linux/err.h> | |
11 | #include <linux/debugfs.h> | |
12 | #include <linux/seq_file.h> | |
13 | #include <linux/gpio.h> | |
ff77c352 | 14 | #include <linux/idr.h> |
5a0e3ad6 | 15 | #include <linux/slab.h> |
7b199811 | 16 | #include <linux/acpi.h> |
53e7cac3 | 17 | #include <linux/gpio/driver.h> |
0a6d3158 | 18 | #include <linux/gpio/machine.h> |
c771c2f4 | 19 | #include <linux/pinctrl/consumer.h> |
3c702e99 LW |
20 | #include <linux/cdev.h> |
21 | #include <linux/fs.h> | |
22 | #include <linux/uaccess.h> | |
8b92e17e | 23 | #include <linux/compat.h> |
d7c51b47 | 24 | #include <linux/anon_inodes.h> |
953b956a | 25 | #include <linux/file.h> |
61f922db LW |
26 | #include <linux/kfifo.h> |
27 | #include <linux/poll.h> | |
28 | #include <linux/timekeeping.h> | |
3c702e99 | 29 | #include <uapi/linux/gpio.h> |
d2876d08 | 30 | |
664e3e5a | 31 | #include "gpiolib.h" |
f626d6df | 32 | #include "gpiolib-of.h" |
77cb907a | 33 | #include "gpiolib-acpi.h" |
664e3e5a | 34 | |
3f397c21 UKK |
35 | #define CREATE_TRACE_POINTS |
36 | #include <trace/events/gpio.h> | |
d2876d08 | 37 | |
79a9becd | 38 | /* Implementation infrastructure for GPIO interfaces. |
d2876d08 | 39 | * |
79a9becd AC |
40 | * The GPIO programming interface allows for inlining speed-critical |
41 | * get/set operations for common cases, so that access to SOC-integrated | |
42 | * GPIOs can sometimes cost only an instruction or two per bit. | |
d2876d08 DB |
43 | */ |
44 | ||
45 | ||
46 | /* When debugging, extend minimal trust to callers and platform code. | |
47 | * Also emit diagnostic messages that may help initial bringup, when | |
48 | * board setup or driver bugs are most common. | |
49 | * | |
50 | * Otherwise, minimize overhead in what may be bitbanging codepaths. | |
51 | */ | |
52 | #ifdef DEBUG | |
53 | #define extra_checks 1 | |
54 | #else | |
55 | #define extra_checks 0 | |
56 | #endif | |
57 | ||
ff2b1359 LW |
58 | /* Device and char device-related information */ |
59 | static DEFINE_IDA(gpio_ida); | |
3c702e99 LW |
60 | static dev_t gpio_devt; |
61 | #define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */ | |
62 | static struct bus_type gpio_bus_type = { | |
63 | .name = "gpio", | |
64 | }; | |
ff2b1359 | 65 | |
3027743f LA |
66 | /* |
67 | * Number of GPIOs to use for the fast path in set array | |
68 | */ | |
69 | #define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT | |
70 | ||
d2876d08 DB |
71 | /* gpio_lock prevents conflicts during gpio_desc[] table updates. |
72 | * While any GPIO is requested, its gpio_chip is not removable; | |
73 | * each GPIO's "requested" flag serves as a lock and refcount. | |
74 | */ | |
0eb4c6c2 | 75 | DEFINE_SPINLOCK(gpio_lock); |
d2876d08 | 76 | |
bae48da2 AC |
77 | static DEFINE_MUTEX(gpio_lookup_lock); |
78 | static LIST_HEAD(gpio_lookup_list); | |
ff2b1359 | 79 | LIST_HEAD(gpio_devices); |
6d86750c | 80 | |
a411e81e BG |
81 | static DEFINE_MUTEX(gpio_machine_hogs_mutex); |
82 | static LIST_HEAD(gpio_machine_hogs); | |
83 | ||
6d86750c | 84 | static void gpiochip_free_hogs(struct gpio_chip *chip); |
959bc7b2 | 85 | static int gpiochip_add_irqchip(struct gpio_chip *gpiochip, |
39c3fd58 AL |
86 | struct lock_class_key *lock_key, |
87 | struct lock_class_key *request_key); | |
6d86750c | 88 | static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip); |
9411e3aa | 89 | static int gpiochip_irqchip_init_hw(struct gpio_chip *gpiochip); |
79b804cb MW |
90 | static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip); |
91 | static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip); | |
6d86750c | 92 | |
159f3cd9 | 93 | static bool gpiolib_initialized; |
6d86750c | 94 | |
d2876d08 DB |
95 | static inline void desc_set_label(struct gpio_desc *d, const char *label) |
96 | { | |
d2876d08 | 97 | d->label = label; |
d2876d08 DB |
98 | } |
99 | ||
372e722e | 100 | /** |
950d55f5 TR |
101 | * gpio_to_desc - Convert a GPIO number to its descriptor |
102 | * @gpio: global GPIO number | |
103 | * | |
104 | * Returns: | |
105 | * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO | |
106 | * with the given number exists in the system. | |
372e722e | 107 | */ |
79a9becd | 108 | struct gpio_desc *gpio_to_desc(unsigned gpio) |
372e722e | 109 | { |
ff2b1359 | 110 | struct gpio_device *gdev; |
14e85c0e AC |
111 | unsigned long flags; |
112 | ||
113 | spin_lock_irqsave(&gpio_lock, flags); | |
114 | ||
ff2b1359 | 115 | list_for_each_entry(gdev, &gpio_devices, list) { |
fdeb8e15 LW |
116 | if (gdev->base <= gpio && |
117 | gdev->base + gdev->ngpio > gpio) { | |
14e85c0e | 118 | spin_unlock_irqrestore(&gpio_lock, flags); |
fdeb8e15 | 119 | return &gdev->descs[gpio - gdev->base]; |
14e85c0e AC |
120 | } |
121 | } | |
122 | ||
123 | spin_unlock_irqrestore(&gpio_lock, flags); | |
124 | ||
0e9a5edf AC |
125 | if (!gpio_is_valid(gpio)) |
126 | WARN(1, "invalid GPIO %d\n", gpio); | |
127 | ||
14e85c0e | 128 | return NULL; |
372e722e | 129 | } |
79a9becd | 130 | EXPORT_SYMBOL_GPL(gpio_to_desc); |
372e722e | 131 | |
d468bf9e | 132 | /** |
950d55f5 TR |
133 | * gpiochip_get_desc - get the GPIO descriptor corresponding to the given |
134 | * hardware number for this chip | |
135 | * @chip: GPIO chip | |
136 | * @hwnum: hardware number of the GPIO for this chip | |
137 | * | |
138 | * Returns: | |
139 | * A pointer to the GPIO descriptor or %ERR_PTR(-EINVAL) if no GPIO exists | |
140 | * in the given chip for the specified hardware number. | |
d468bf9e | 141 | */ |
bb1e88cc | 142 | struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip, |
06863620 | 143 | unsigned int hwnum) |
d468bf9e | 144 | { |
fdeb8e15 LW |
145 | struct gpio_device *gdev = chip->gpiodev; |
146 | ||
147 | if (hwnum >= gdev->ngpio) | |
b7d0a28a | 148 | return ERR_PTR(-EINVAL); |
d468bf9e | 149 | |
fdeb8e15 | 150 | return &gdev->descs[hwnum]; |
d468bf9e | 151 | } |
372e722e AC |
152 | |
153 | /** | |
950d55f5 TR |
154 | * desc_to_gpio - convert a GPIO descriptor to the integer namespace |
155 | * @desc: GPIO descriptor | |
156 | * | |
372e722e | 157 | * This should disappear in the future but is needed since we still |
950d55f5 TR |
158 | * use GPIO numbers for error messages and sysfs nodes. |
159 | * | |
160 | * Returns: | |
161 | * The global GPIO number for the GPIO specified by its descriptor. | |
372e722e | 162 | */ |
79a9becd | 163 | int desc_to_gpio(const struct gpio_desc *desc) |
372e722e | 164 | { |
fdeb8e15 | 165 | return desc->gdev->base + (desc - &desc->gdev->descs[0]); |
372e722e | 166 | } |
79a9becd | 167 | EXPORT_SYMBOL_GPL(desc_to_gpio); |
372e722e AC |
168 | |
169 | ||
79a9becd AC |
170 | /** |
171 | * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs | |
172 | * @desc: descriptor to return the chip of | |
173 | */ | |
174 | struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc) | |
372e722e | 175 | { |
dd3b9a44 | 176 | if (!desc || !desc->gdev) |
fdeb8e15 LW |
177 | return NULL; |
178 | return desc->gdev->chip; | |
372e722e | 179 | } |
79a9becd | 180 | EXPORT_SYMBOL_GPL(gpiod_to_chip); |
d2876d08 | 181 | |
8d0aab2f AV |
182 | /* dynamic allocation of GPIOs, e.g. on a hotplugged device */ |
183 | static int gpiochip_find_base(int ngpio) | |
184 | { | |
ff2b1359 | 185 | struct gpio_device *gdev; |
83cabe33 | 186 | int base = ARCH_NR_GPIOS - ngpio; |
8d0aab2f | 187 | |
ff2b1359 | 188 | list_for_each_entry_reverse(gdev, &gpio_devices, list) { |
83cabe33 | 189 | /* found a free space? */ |
fdeb8e15 | 190 | if (gdev->base + gdev->ngpio <= base) |
83cabe33 AC |
191 | break; |
192 | else | |
193 | /* nope, check the space right before the chip */ | |
fdeb8e15 | 194 | base = gdev->base - ngpio; |
8d0aab2f AV |
195 | } |
196 | ||
83cabe33 | 197 | if (gpio_is_valid(base)) { |
8d0aab2f | 198 | pr_debug("%s: found new base at %d\n", __func__, base); |
83cabe33 AC |
199 | return base; |
200 | } else { | |
201 | pr_err("%s: cannot find free range\n", __func__); | |
202 | return -ENOSPC; | |
169b6a7a | 203 | } |
169b6a7a AV |
204 | } |
205 | ||
79a9becd AC |
206 | /** |
207 | * gpiod_get_direction - return the current direction of a GPIO | |
208 | * @desc: GPIO to get the direction of | |
209 | * | |
94fc7309 | 210 | * Returns 0 for output, 1 for input, or an error code in case of error. |
79a9becd AC |
211 | * |
212 | * This function may sleep if gpiod_cansleep() is true. | |
213 | */ | |
8e53b0f1 | 214 | int gpiod_get_direction(struct gpio_desc *desc) |
80b0a602 | 215 | { |
d0121b85 WS |
216 | struct gpio_chip *chip; |
217 | unsigned offset; | |
d377f56f | 218 | int ret; |
80b0a602 | 219 | |
372e722e AC |
220 | chip = gpiod_to_chip(desc); |
221 | offset = gpio_chip_hwgpio(desc); | |
80b0a602 | 222 | |
256efaea RK |
223 | /* |
224 | * Open drain emulation using input mode may incorrectly report | |
225 | * input here, fix that up. | |
226 | */ | |
227 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && | |
228 | test_bit(FLAG_IS_OUT, &desc->flags)) | |
229 | return 0; | |
230 | ||
80b0a602 | 231 | if (!chip->get_direction) |
d0121b85 | 232 | return -ENOTSUPP; |
80b0a602 | 233 | |
d377f56f | 234 | ret = chip->get_direction(chip, offset); |
4fc5bfeb AS |
235 | if (ret < 0) |
236 | return ret; | |
237 | ||
238 | /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */ | |
239 | if (ret > 0) | |
d377f56f | 240 | ret = 1; |
4fc5bfeb AS |
241 | |
242 | assign_bit(FLAG_IS_OUT, &desc->flags, !ret); | |
243 | ||
d377f56f | 244 | return ret; |
80b0a602 | 245 | } |
79a9becd | 246 | EXPORT_SYMBOL_GPL(gpiod_get_direction); |
80b0a602 | 247 | |
1a989d0f AC |
248 | /* |
249 | * Add a new chip to the global chips list, keeping the list of chips sorted | |
ef7c7553 | 250 | * by range(means [base, base + ngpio - 1]) order. |
1a989d0f AC |
251 | * |
252 | * Return -EBUSY if the new chip overlaps with some other chip's integer | |
253 | * space. | |
254 | */ | |
ff2b1359 | 255 | static int gpiodev_add_to_list(struct gpio_device *gdev) |
1a989d0f | 256 | { |
a961f9b4 | 257 | struct gpio_device *prev, *next; |
1a989d0f | 258 | |
ff2b1359 | 259 | if (list_empty(&gpio_devices)) { |
a961f9b4 | 260 | /* initial entry in list */ |
ff2b1359 | 261 | list_add_tail(&gdev->list, &gpio_devices); |
e28ecca6 | 262 | return 0; |
1a989d0f AC |
263 | } |
264 | ||
a961f9b4 BJZ |
265 | next = list_entry(gpio_devices.next, struct gpio_device, list); |
266 | if (gdev->base + gdev->ngpio <= next->base) { | |
267 | /* add before first entry */ | |
268 | list_add(&gdev->list, &gpio_devices); | |
269 | return 0; | |
1a989d0f AC |
270 | } |
271 | ||
a961f9b4 BJZ |
272 | prev = list_entry(gpio_devices.prev, struct gpio_device, list); |
273 | if (prev->base + prev->ngpio <= gdev->base) { | |
274 | /* add behind last entry */ | |
275 | list_add_tail(&gdev->list, &gpio_devices); | |
96098df1 | 276 | return 0; |
1a989d0f AC |
277 | } |
278 | ||
a961f9b4 BJZ |
279 | list_for_each_entry_safe(prev, next, &gpio_devices, list) { |
280 | /* at the end of the list */ | |
281 | if (&next->list == &gpio_devices) | |
282 | break; | |
1a989d0f | 283 | |
a961f9b4 BJZ |
284 | /* add between prev and next */ |
285 | if (prev->base + prev->ngpio <= gdev->base | |
286 | && gdev->base + gdev->ngpio <= next->base) { | |
287 | list_add(&gdev->list, &prev->list); | |
288 | return 0; | |
289 | } | |
290 | } | |
291 | ||
292 | dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n"); | |
293 | return -EBUSY; | |
1a989d0f AC |
294 | } |
295 | ||
950d55f5 | 296 | /* |
f881bab0 LW |
297 | * Convert a GPIO name to its descriptor |
298 | */ | |
299 | static struct gpio_desc *gpio_name_to_desc(const char * const name) | |
300 | { | |
ff2b1359 | 301 | struct gpio_device *gdev; |
f881bab0 LW |
302 | unsigned long flags; |
303 | ||
304 | spin_lock_irqsave(&gpio_lock, flags); | |
305 | ||
ff2b1359 | 306 | list_for_each_entry(gdev, &gpio_devices, list) { |
f881bab0 LW |
307 | int i; |
308 | ||
fdeb8e15 LW |
309 | for (i = 0; i != gdev->ngpio; ++i) { |
310 | struct gpio_desc *desc = &gdev->descs[i]; | |
f881bab0 | 311 | |
fdeb8e15 | 312 | if (!desc->name || !name) |
f881bab0 LW |
313 | continue; |
314 | ||
fdeb8e15 | 315 | if (!strcmp(desc->name, name)) { |
f881bab0 | 316 | spin_unlock_irqrestore(&gpio_lock, flags); |
fdeb8e15 | 317 | return desc; |
f881bab0 LW |
318 | } |
319 | } | |
320 | } | |
321 | ||
322 | spin_unlock_irqrestore(&gpio_lock, flags); | |
323 | ||
324 | return NULL; | |
325 | } | |
326 | ||
5f3ca732 MP |
327 | /* |
328 | * Takes the names from gc->names and checks if they are all unique. If they | |
329 | * are, they are assigned to their gpio descriptors. | |
330 | * | |
ed37915c | 331 | * Warning if one of the names is already used for a different GPIO. |
5f3ca732 MP |
332 | */ |
333 | static int gpiochip_set_desc_names(struct gpio_chip *gc) | |
334 | { | |
fdeb8e15 | 335 | struct gpio_device *gdev = gc->gpiodev; |
5f3ca732 MP |
336 | int i; |
337 | ||
338 | if (!gc->names) | |
339 | return 0; | |
340 | ||
341 | /* First check all names if they are unique */ | |
342 | for (i = 0; i != gc->ngpio; ++i) { | |
343 | struct gpio_desc *gpio; | |
344 | ||
345 | gpio = gpio_name_to_desc(gc->names[i]); | |
f881bab0 | 346 | if (gpio) |
fdeb8e15 | 347 | dev_warn(&gdev->dev, |
34ffd85d | 348 | "Detected name collision for GPIO name '%s'\n", |
f881bab0 | 349 | gc->names[i]); |
5f3ca732 MP |
350 | } |
351 | ||
352 | /* Then add all names to the GPIO descriptors */ | |
353 | for (i = 0; i != gc->ngpio; ++i) | |
fdeb8e15 | 354 | gdev->descs[i].name = gc->names[i]; |
5f3ca732 MP |
355 | |
356 | return 0; | |
357 | } | |
358 | ||
e4371f6e SB |
359 | static unsigned long *gpiochip_allocate_mask(struct gpio_chip *chip) |
360 | { | |
361 | unsigned long *p; | |
362 | ||
7bdbd1ec | 363 | p = bitmap_alloc(chip->ngpio, GFP_KERNEL); |
e4371f6e SB |
364 | if (!p) |
365 | return NULL; | |
366 | ||
367 | /* Assume by default all GPIOs are valid */ | |
368 | bitmap_fill(p, chip->ngpio); | |
369 | ||
370 | return p; | |
371 | } | |
372 | ||
f626d6df | 373 | static int gpiochip_alloc_valid_mask(struct gpio_chip *gc) |
726cb3ba | 374 | { |
eb1e8bd6 | 375 | if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask)) |
726cb3ba SB |
376 | return 0; |
377 | ||
f626d6df LW |
378 | gc->valid_mask = gpiochip_allocate_mask(gc); |
379 | if (!gc->valid_mask) | |
726cb3ba SB |
380 | return -ENOMEM; |
381 | ||
382 | return 0; | |
383 | } | |
384 | ||
c9fc5aff | 385 | static int gpiochip_init_valid_mask(struct gpio_chip *gc) |
f8ec92a9 | 386 | { |
c9fc5aff LW |
387 | if (gc->init_valid_mask) |
388 | return gc->init_valid_mask(gc, | |
389 | gc->valid_mask, | |
390 | gc->ngpio); | |
f8ec92a9 RRD |
391 | |
392 | return 0; | |
393 | } | |
394 | ||
726cb3ba SB |
395 | static void gpiochip_free_valid_mask(struct gpio_chip *gpiochip) |
396 | { | |
7bdbd1ec | 397 | bitmap_free(gpiochip->valid_mask); |
726cb3ba SB |
398 | gpiochip->valid_mask = NULL; |
399 | } | |
400 | ||
b056ca1c AS |
401 | static int gpiochip_add_pin_ranges(struct gpio_chip *gc) |
402 | { | |
403 | if (gc->add_pin_ranges) | |
404 | return gc->add_pin_ranges(gc); | |
405 | ||
406 | return 0; | |
407 | } | |
408 | ||
726cb3ba SB |
409 | bool gpiochip_line_is_valid(const struct gpio_chip *gpiochip, |
410 | unsigned int offset) | |
411 | { | |
412 | /* No mask means all valid */ | |
413 | if (likely(!gpiochip->valid_mask)) | |
414 | return true; | |
415 | return test_bit(offset, gpiochip->valid_mask); | |
416 | } | |
417 | EXPORT_SYMBOL_GPL(gpiochip_line_is_valid); | |
418 | ||
d7c51b47 LW |
419 | /* |
420 | * GPIO line handle management | |
421 | */ | |
422 | ||
423 | /** | |
424 | * struct linehandle_state - contains the state of a userspace handle | |
425 | * @gdev: the GPIO device the handle pertains to | |
426 | * @label: consumer label used to tag descriptors | |
427 | * @descs: the GPIO descriptors held by this handle | |
428 | * @numdescs: the number of descriptors held in the descs array | |
429 | */ | |
430 | struct linehandle_state { | |
431 | struct gpio_device *gdev; | |
432 | const char *label; | |
433 | struct gpio_desc *descs[GPIOHANDLES_MAX]; | |
434 | u32 numdescs; | |
435 | }; | |
436 | ||
e3e847c7 LPC |
437 | #define GPIOHANDLE_REQUEST_VALID_FLAGS \ |
438 | (GPIOHANDLE_REQUEST_INPUT | \ | |
439 | GPIOHANDLE_REQUEST_OUTPUT | \ | |
440 | GPIOHANDLE_REQUEST_ACTIVE_LOW | \ | |
9225d516 DF |
441 | GPIOHANDLE_REQUEST_BIAS_PULL_UP | \ |
442 | GPIOHANDLE_REQUEST_BIAS_PULL_DOWN | \ | |
2148ad77 | 443 | GPIOHANDLE_REQUEST_BIAS_DISABLE | \ |
e3e847c7 LPC |
444 | GPIOHANDLE_REQUEST_OPEN_DRAIN | \ |
445 | GPIOHANDLE_REQUEST_OPEN_SOURCE) | |
446 | ||
b043ed7e KG |
447 | static int linehandle_validate_flags(u32 flags) |
448 | { | |
449 | /* Return an error if an unknown flag is set */ | |
450 | if (flags & ~GPIOHANDLE_REQUEST_VALID_FLAGS) | |
451 | return -EINVAL; | |
452 | ||
453 | /* | |
454 | * Do not allow both INPUT & OUTPUT flags to be set as they are | |
455 | * contradictory. | |
456 | */ | |
457 | if ((flags & GPIOHANDLE_REQUEST_INPUT) && | |
458 | (flags & GPIOHANDLE_REQUEST_OUTPUT)) | |
459 | return -EINVAL; | |
460 | ||
461 | /* | |
462 | * Do not allow OPEN_SOURCE & OPEN_DRAIN flags in a single request. If | |
463 | * the hardware actually supports enabling both at the same time the | |
464 | * electrical result would be disastrous. | |
465 | */ | |
466 | if ((flags & GPIOHANDLE_REQUEST_OPEN_DRAIN) && | |
467 | (flags & GPIOHANDLE_REQUEST_OPEN_SOURCE)) | |
468 | return -EINVAL; | |
469 | ||
470 | /* OPEN_DRAIN and OPEN_SOURCE flags only make sense for output mode. */ | |
471 | if (!(flags & GPIOHANDLE_REQUEST_OUTPUT) && | |
472 | ((flags & GPIOHANDLE_REQUEST_OPEN_DRAIN) || | |
473 | (flags & GPIOHANDLE_REQUEST_OPEN_SOURCE))) | |
474 | return -EINVAL; | |
475 | ||
476 | /* Bias flags only allowed for input or output mode. */ | |
477 | if (!((flags & GPIOHANDLE_REQUEST_INPUT) || | |
478 | (flags & GPIOHANDLE_REQUEST_OUTPUT)) && | |
479 | ((flags & GPIOHANDLE_REQUEST_BIAS_DISABLE) || | |
480 | (flags & GPIOHANDLE_REQUEST_BIAS_PULL_UP) || | |
481 | (flags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN))) | |
482 | return -EINVAL; | |
483 | ||
484 | /* Only one bias flag can be set. */ | |
485 | if (((flags & GPIOHANDLE_REQUEST_BIAS_DISABLE) && | |
486 | (flags & (GPIOHANDLE_REQUEST_BIAS_PULL_DOWN | | |
487 | GPIOHANDLE_REQUEST_BIAS_PULL_UP))) || | |
488 | ((flags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) && | |
489 | (flags & GPIOHANDLE_REQUEST_BIAS_PULL_UP))) | |
490 | return -EINVAL; | |
491 | ||
492 | return 0; | |
493 | } | |
494 | ||
e588bb1e KG |
495 | static long linehandle_set_config(struct linehandle_state *lh, |
496 | void __user *ip) | |
497 | { | |
498 | struct gpiohandle_config gcnf; | |
499 | struct gpio_desc *desc; | |
500 | int i, ret; | |
501 | u32 lflags; | |
502 | unsigned long *flagsp; | |
503 | ||
504 | if (copy_from_user(&gcnf, ip, sizeof(gcnf))) | |
505 | return -EFAULT; | |
506 | ||
507 | lflags = gcnf.flags; | |
508 | ret = linehandle_validate_flags(lflags); | |
509 | if (ret) | |
510 | return ret; | |
511 | ||
512 | for (i = 0; i < lh->numdescs; i++) { | |
513 | desc = lh->descs[i]; | |
514 | flagsp = &desc->flags; | |
515 | ||
4fc5bfeb | 516 | assign_bit(FLAG_ACTIVE_LOW, flagsp, |
e588bb1e KG |
517 | lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW); |
518 | ||
4fc5bfeb | 519 | assign_bit(FLAG_OPEN_DRAIN, flagsp, |
e588bb1e KG |
520 | lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN); |
521 | ||
4fc5bfeb | 522 | assign_bit(FLAG_OPEN_SOURCE, flagsp, |
e588bb1e KG |
523 | lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE); |
524 | ||
4fc5bfeb | 525 | assign_bit(FLAG_PULL_UP, flagsp, |
e588bb1e KG |
526 | lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP); |
527 | ||
4fc5bfeb | 528 | assign_bit(FLAG_PULL_DOWN, flagsp, |
e588bb1e KG |
529 | lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN); |
530 | ||
4fc5bfeb | 531 | assign_bit(FLAG_BIAS_DISABLE, flagsp, |
e588bb1e KG |
532 | lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE); |
533 | ||
534 | /* | |
535 | * Lines have to be requested explicitly for input | |
536 | * or output, else the line will be treated "as is". | |
537 | */ | |
538 | if (lflags & GPIOHANDLE_REQUEST_OUTPUT) { | |
539 | int val = !!gcnf.default_values[i]; | |
540 | ||
541 | ret = gpiod_direction_output(desc, val); | |
542 | if (ret) | |
543 | return ret; | |
544 | } else if (lflags & GPIOHANDLE_REQUEST_INPUT) { | |
545 | ret = gpiod_direction_input(desc); | |
546 | if (ret) | |
547 | return ret; | |
548 | } | |
549 | } | |
550 | return 0; | |
551 | } | |
552 | ||
d7c51b47 LW |
553 | static long linehandle_ioctl(struct file *filep, unsigned int cmd, |
554 | unsigned long arg) | |
555 | { | |
556 | struct linehandle_state *lh = filep->private_data; | |
557 | void __user *ip = (void __user *)arg; | |
558 | struct gpiohandle_data ghd; | |
b9762beb | 559 | DECLARE_BITMAP(vals, GPIOHANDLES_MAX); |
d7c51b47 LW |
560 | int i; |
561 | ||
562 | if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) { | |
2b955b34 | 563 | /* NOTE: It's ok to read values of output lines. */ |
eec1d566 LW |
564 | int ret = gpiod_get_array_value_complex(false, |
565 | true, | |
566 | lh->numdescs, | |
567 | lh->descs, | |
77588c14 | 568 | NULL, |
eec1d566 LW |
569 | vals); |
570 | if (ret) | |
571 | return ret; | |
d7c51b47 | 572 | |
3eded5d8 | 573 | memset(&ghd, 0, sizeof(ghd)); |
eec1d566 | 574 | for (i = 0; i < lh->numdescs; i++) |
b9762beb | 575 | ghd.values[i] = test_bit(i, vals); |
d7c51b47 LW |
576 | |
577 | if (copy_to_user(ip, &ghd, sizeof(ghd))) | |
578 | return -EFAULT; | |
579 | ||
580 | return 0; | |
581 | } else if (cmd == GPIOHANDLE_SET_LINE_VALUES_IOCTL) { | |
e5332d54 BG |
582 | /* |
583 | * All line descriptors were created at once with the same | |
584 | * flags so just check if the first one is really output. | |
585 | */ | |
586 | if (!test_bit(FLAG_IS_OUT, &lh->descs[0]->flags)) | |
587 | return -EPERM; | |
588 | ||
d7c51b47 LW |
589 | if (copy_from_user(&ghd, ip, sizeof(ghd))) |
590 | return -EFAULT; | |
591 | ||
592 | /* Clamp all values to [0,1] */ | |
593 | for (i = 0; i < lh->numdescs; i++) | |
b9762beb | 594 | __assign_bit(i, vals, ghd.values[i]); |
d7c51b47 LW |
595 | |
596 | /* Reuse the array setting function */ | |
3027743f | 597 | return gpiod_set_array_value_complex(false, |
d7c51b47 LW |
598 | true, |
599 | lh->numdescs, | |
600 | lh->descs, | |
77588c14 | 601 | NULL, |
d7c51b47 | 602 | vals); |
e588bb1e KG |
603 | } else if (cmd == GPIOHANDLE_SET_CONFIG_IOCTL) { |
604 | return linehandle_set_config(lh, ip); | |
d7c51b47 LW |
605 | } |
606 | return -EINVAL; | |
607 | } | |
608 | ||
609 | #ifdef CONFIG_COMPAT | |
610 | static long linehandle_ioctl_compat(struct file *filep, unsigned int cmd, | |
611 | unsigned long arg) | |
612 | { | |
613 | return linehandle_ioctl(filep, cmd, (unsigned long)compat_ptr(arg)); | |
614 | } | |
615 | #endif | |
616 | ||
617 | static int linehandle_release(struct inode *inode, struct file *filep) | |
618 | { | |
619 | struct linehandle_state *lh = filep->private_data; | |
620 | struct gpio_device *gdev = lh->gdev; | |
621 | int i; | |
622 | ||
623 | for (i = 0; i < lh->numdescs; i++) | |
624 | gpiod_free(lh->descs[i]); | |
625 | kfree(lh->label); | |
626 | kfree(lh); | |
627 | put_device(&gdev->dev); | |
628 | return 0; | |
629 | } | |
630 | ||
631 | static const struct file_operations linehandle_fileops = { | |
632 | .release = linehandle_release, | |
633 | .owner = THIS_MODULE, | |
634 | .llseek = noop_llseek, | |
635 | .unlocked_ioctl = linehandle_ioctl, | |
636 | #ifdef CONFIG_COMPAT | |
637 | .compat_ioctl = linehandle_ioctl_compat, | |
638 | #endif | |
639 | }; | |
640 | ||
641 | static int linehandle_create(struct gpio_device *gdev, void __user *ip) | |
642 | { | |
643 | struct gpiohandle_request handlereq; | |
644 | struct linehandle_state *lh; | |
953b956a | 645 | struct file *file; |
ab3dbcf7 | 646 | int fd, i, count = 0, ret; |
418ee8e9 | 647 | u32 lflags; |
d7c51b47 LW |
648 | |
649 | if (copy_from_user(&handlereq, ip, sizeof(handlereq))) | |
650 | return -EFAULT; | |
651 | if ((handlereq.lines == 0) || (handlereq.lines > GPIOHANDLES_MAX)) | |
652 | return -EINVAL; | |
653 | ||
418ee8e9 BG |
654 | lflags = handlereq.flags; |
655 | ||
b043ed7e KG |
656 | ret = linehandle_validate_flags(lflags); |
657 | if (ret) | |
658 | return ret; | |
2148ad77 | 659 | |
d7c51b47 LW |
660 | lh = kzalloc(sizeof(*lh), GFP_KERNEL); |
661 | if (!lh) | |
662 | return -ENOMEM; | |
663 | lh->gdev = gdev; | |
664 | get_device(&gdev->dev); | |
665 | ||
666 | /* Make sure this is terminated */ | |
667 | handlereq.consumer_label[sizeof(handlereq.consumer_label)-1] = '\0'; | |
668 | if (strlen(handlereq.consumer_label)) { | |
669 | lh->label = kstrdup(handlereq.consumer_label, | |
670 | GFP_KERNEL); | |
671 | if (!lh->label) { | |
672 | ret = -ENOMEM; | |
673 | goto out_free_lh; | |
674 | } | |
675 | } | |
676 | ||
677 | /* Request each GPIO */ | |
678 | for (i = 0; i < handlereq.lines; i++) { | |
679 | u32 offset = handlereq.lineoffsets[i]; | |
0f41dabe | 680 | struct gpio_desc *desc = gpiochip_get_desc(gdev->chip, offset); |
d7c51b47 | 681 | |
0f41dabe BG |
682 | if (IS_ERR(desc)) { |
683 | ret = PTR_ERR(desc); | |
e405f9fc LPC |
684 | goto out_free_descs; |
685 | } | |
686 | ||
d7c51b47 LW |
687 | ret = gpiod_request(desc, lh->label); |
688 | if (ret) | |
689 | goto out_free_descs; | |
690 | lh->descs[i] = desc; | |
19a4fbff | 691 | count = i + 1; |
d7c51b47 LW |
692 | |
693 | if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW) | |
694 | set_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
695 | if (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN) | |
696 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | |
697 | if (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE) | |
698 | set_bit(FLAG_OPEN_SOURCE, &desc->flags); | |
2148ad77 KG |
699 | if (lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE) |
700 | set_bit(FLAG_BIAS_DISABLE, &desc->flags); | |
9225d516 DF |
701 | if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) |
702 | set_bit(FLAG_PULL_DOWN, &desc->flags); | |
703 | if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP) | |
704 | set_bit(FLAG_PULL_UP, &desc->flags); | |
d7c51b47 | 705 | |
e10f72bf AJ |
706 | ret = gpiod_set_transitory(desc, false); |
707 | if (ret < 0) | |
708 | goto out_free_descs; | |
709 | ||
d7c51b47 LW |
710 | /* |
711 | * Lines have to be requested explicitly for input | |
712 | * or output, else the line will be treated "as is". | |
713 | */ | |
714 | if (lflags & GPIOHANDLE_REQUEST_OUTPUT) { | |
715 | int val = !!handlereq.default_values[i]; | |
716 | ||
717 | ret = gpiod_direction_output(desc, val); | |
718 | if (ret) | |
719 | goto out_free_descs; | |
720 | } else if (lflags & GPIOHANDLE_REQUEST_INPUT) { | |
721 | ret = gpiod_direction_input(desc); | |
722 | if (ret) | |
723 | goto out_free_descs; | |
724 | } | |
725 | dev_dbg(&gdev->dev, "registered chardev handle for line %d\n", | |
726 | offset); | |
727 | } | |
e2f608be LW |
728 | /* Let i point at the last handle */ |
729 | i--; | |
d7c51b47 LW |
730 | lh->numdescs = handlereq.lines; |
731 | ||
953b956a | 732 | fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC); |
d7c51b47 LW |
733 | if (fd < 0) { |
734 | ret = fd; | |
735 | goto out_free_descs; | |
736 | } | |
737 | ||
953b956a LPC |
738 | file = anon_inode_getfile("gpio-linehandle", |
739 | &linehandle_fileops, | |
740 | lh, | |
741 | O_RDONLY | O_CLOEXEC); | |
742 | if (IS_ERR(file)) { | |
743 | ret = PTR_ERR(file); | |
744 | goto out_put_unused_fd; | |
745 | } | |
746 | ||
d7c51b47 | 747 | handlereq.fd = fd; |
d932cd49 | 748 | if (copy_to_user(ip, &handlereq, sizeof(handlereq))) { |
953b956a LPC |
749 | /* |
750 | * fput() will trigger the release() callback, so do not go onto | |
751 | * the regular error cleanup path here. | |
752 | */ | |
753 | fput(file); | |
754 | put_unused_fd(fd); | |
755 | return -EFAULT; | |
d932cd49 | 756 | } |
d7c51b47 | 757 | |
953b956a LPC |
758 | fd_install(fd, file); |
759 | ||
d7c51b47 LW |
760 | dev_dbg(&gdev->dev, "registered chardev handle for %d lines\n", |
761 | lh->numdescs); | |
762 | ||
763 | return 0; | |
764 | ||
953b956a LPC |
765 | out_put_unused_fd: |
766 | put_unused_fd(fd); | |
d7c51b47 | 767 | out_free_descs: |
ab3dbcf7 | 768 | for (i = 0; i < count; i++) |
d7c51b47 LW |
769 | gpiod_free(lh->descs[i]); |
770 | kfree(lh->label); | |
771 | out_free_lh: | |
772 | kfree(lh); | |
773 | put_device(&gdev->dev); | |
774 | return ret; | |
775 | } | |
776 | ||
61f922db LW |
777 | /* |
778 | * GPIO line event management | |
779 | */ | |
780 | ||
781 | /** | |
782 | * struct lineevent_state - contains the state of a userspace event | |
783 | * @gdev: the GPIO device the event pertains to | |
784 | * @label: consumer label used to tag descriptors | |
785 | * @desc: the GPIO descriptor held by this event | |
786 | * @eflags: the event flags this line was requested with | |
787 | * @irq: the interrupt that trigger in response to events on this GPIO | |
788 | * @wait: wait queue that handles blocking reads of events | |
789 | * @events: KFIFO for the GPIO events | |
d58f2bf2 LW |
790 | * @timestamp: cache for the timestamp storing it between hardirq |
791 | * and IRQ thread, used to bring the timestamp close to the actual | |
792 | * event | |
61f922db LW |
793 | */ |
794 | struct lineevent_state { | |
795 | struct gpio_device *gdev; | |
796 | const char *label; | |
797 | struct gpio_desc *desc; | |
798 | u32 eflags; | |
799 | int irq; | |
800 | wait_queue_head_t wait; | |
801 | DECLARE_KFIFO(events, struct gpioevent_data, 16); | |
d58f2bf2 | 802 | u64 timestamp; |
61f922db LW |
803 | }; |
804 | ||
ac7dbb99 LPC |
805 | #define GPIOEVENT_REQUEST_VALID_FLAGS \ |
806 | (GPIOEVENT_REQUEST_RISING_EDGE | \ | |
807 | GPIOEVENT_REQUEST_FALLING_EDGE) | |
808 | ||
afc9a42b | 809 | static __poll_t lineevent_poll(struct file *filep, |
61f922db LW |
810 | struct poll_table_struct *wait) |
811 | { | |
812 | struct lineevent_state *le = filep->private_data; | |
afc9a42b | 813 | __poll_t events = 0; |
61f922db LW |
814 | |
815 | poll_wait(filep, &le->wait, wait); | |
816 | ||
dea9c80e | 817 | if (!kfifo_is_empty_spinlocked_noirqsave(&le->events, &le->wait.lock)) |
a9a08845 | 818 | events = EPOLLIN | EPOLLRDNORM; |
61f922db LW |
819 | |
820 | return events; | |
821 | } | |
822 | ||
823 | ||
824 | static ssize_t lineevent_read(struct file *filep, | |
825 | char __user *buf, | |
826 | size_t count, | |
827 | loff_t *f_ps) | |
828 | { | |
829 | struct lineevent_state *le = filep->private_data; | |
dea9c80e BG |
830 | struct gpioevent_data event; |
831 | ssize_t bytes_read = 0; | |
61f922db LW |
832 | int ret; |
833 | ||
dea9c80e | 834 | if (count < sizeof(event)) |
61f922db LW |
835 | return -EINVAL; |
836 | ||
837 | do { | |
dea9c80e | 838 | spin_lock(&le->wait.lock); |
61f922db | 839 | if (kfifo_is_empty(&le->events)) { |
dea9c80e BG |
840 | if (bytes_read) { |
841 | spin_unlock(&le->wait.lock); | |
842 | return bytes_read; | |
843 | } | |
844 | ||
845 | if (filep->f_flags & O_NONBLOCK) { | |
846 | spin_unlock(&le->wait.lock); | |
61f922db | 847 | return -EAGAIN; |
dea9c80e | 848 | } |
61f922db | 849 | |
dea9c80e | 850 | ret = wait_event_interruptible_locked(le->wait, |
61f922db | 851 | !kfifo_is_empty(&le->events)); |
dea9c80e BG |
852 | if (ret) { |
853 | spin_unlock(&le->wait.lock); | |
61f922db | 854 | return ret; |
dea9c80e | 855 | } |
61f922db LW |
856 | } |
857 | ||
dea9c80e BG |
858 | ret = kfifo_out(&le->events, &event, 1); |
859 | spin_unlock(&le->wait.lock); | |
860 | if (ret != 1) { | |
861 | /* | |
862 | * This should never happen - we were holding the lock | |
863 | * from the moment we learned the fifo is no longer | |
864 | * empty until now. | |
865 | */ | |
866 | ret = -EIO; | |
867 | break; | |
868 | } | |
61f922db | 869 | |
dea9c80e BG |
870 | if (copy_to_user(buf + bytes_read, &event, sizeof(event))) |
871 | return -EFAULT; | |
872 | bytes_read += sizeof(event); | |
873 | } while (count >= bytes_read + sizeof(event)); | |
61f922db | 874 | |
dea9c80e | 875 | return bytes_read; |
61f922db LW |
876 | } |
877 | ||
878 | static int lineevent_release(struct inode *inode, struct file *filep) | |
879 | { | |
880 | struct lineevent_state *le = filep->private_data; | |
881 | struct gpio_device *gdev = le->gdev; | |
882 | ||
883 | free_irq(le->irq, le); | |
884 | gpiod_free(le->desc); | |
885 | kfree(le->label); | |
886 | kfree(le); | |
887 | put_device(&gdev->dev); | |
888 | return 0; | |
889 | } | |
890 | ||
891 | static long lineevent_ioctl(struct file *filep, unsigned int cmd, | |
892 | unsigned long arg) | |
893 | { | |
894 | struct lineevent_state *le = filep->private_data; | |
895 | void __user *ip = (void __user *)arg; | |
896 | struct gpiohandle_data ghd; | |
897 | ||
898 | /* | |
899 | * We can get the value for an event line but not set it, | |
900 | * because it is input by definition. | |
901 | */ | |
902 | if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) { | |
903 | int val; | |
904 | ||
d82aa4a8 LPC |
905 | memset(&ghd, 0, sizeof(ghd)); |
906 | ||
61f922db LW |
907 | val = gpiod_get_value_cansleep(le->desc); |
908 | if (val < 0) | |
909 | return val; | |
910 | ghd.values[0] = val; | |
911 | ||
912 | if (copy_to_user(ip, &ghd, sizeof(ghd))) | |
913 | return -EFAULT; | |
914 | ||
915 | return 0; | |
916 | } | |
917 | return -EINVAL; | |
918 | } | |
919 | ||
920 | #ifdef CONFIG_COMPAT | |
921 | static long lineevent_ioctl_compat(struct file *filep, unsigned int cmd, | |
922 | unsigned long arg) | |
923 | { | |
924 | return lineevent_ioctl(filep, cmd, (unsigned long)compat_ptr(arg)); | |
925 | } | |
926 | #endif | |
927 | ||
928 | static const struct file_operations lineevent_fileops = { | |
929 | .release = lineevent_release, | |
930 | .read = lineevent_read, | |
931 | .poll = lineevent_poll, | |
932 | .owner = THIS_MODULE, | |
933 | .llseek = noop_llseek, | |
934 | .unlocked_ioctl = lineevent_ioctl, | |
935 | #ifdef CONFIG_COMPAT | |
936 | .compat_ioctl = lineevent_ioctl_compat, | |
937 | #endif | |
938 | }; | |
939 | ||
33265b17 | 940 | static irqreturn_t lineevent_irq_thread(int irq, void *p) |
61f922db LW |
941 | { |
942 | struct lineevent_state *le = p; | |
943 | struct gpioevent_data ge; | |
fa38869b | 944 | int ret; |
61f922db | 945 | |
24bd3efc LW |
946 | /* Do not leak kernel stack to userspace */ |
947 | memset(&ge, 0, sizeof(ge)); | |
948 | ||
1033be58 BG |
949 | /* |
950 | * We may be running from a nested threaded interrupt in which case | |
951 | * we didn't get the timestamp from lineevent_irq_handler(). | |
952 | */ | |
953 | if (!le->timestamp) | |
954 | ge.timestamp = ktime_get_real_ns(); | |
955 | else | |
956 | ge.timestamp = le->timestamp; | |
61f922db | 957 | |
ad537b82 BG |
958 | if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE |
959 | && le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) { | |
fa38869b | 960 | int level = gpiod_get_value_cansleep(le->desc); |
61f922db LW |
961 | if (level) |
962 | /* Emit low-to-high event */ | |
963 | ge.id = GPIOEVENT_EVENT_RISING_EDGE; | |
964 | else | |
965 | /* Emit high-to-low event */ | |
966 | ge.id = GPIOEVENT_EVENT_FALLING_EDGE; | |
fa38869b | 967 | } else if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE) { |
61f922db LW |
968 | /* Emit low-to-high event */ |
969 | ge.id = GPIOEVENT_EVENT_RISING_EDGE; | |
fa38869b | 970 | } else if (le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) { |
61f922db LW |
971 | /* Emit high-to-low event */ |
972 | ge.id = GPIOEVENT_EVENT_FALLING_EDGE; | |
bc0207a5 AB |
973 | } else { |
974 | return IRQ_NONE; | |
61f922db LW |
975 | } |
976 | ||
dea9c80e BG |
977 | ret = kfifo_in_spinlocked_noirqsave(&le->events, &ge, |
978 | 1, &le->wait.lock); | |
2efc6bfa | 979 | if (ret) |
a9a08845 | 980 | wake_up_poll(&le->wait, EPOLLIN); |
248ae175 BG |
981 | else |
982 | pr_debug_ratelimited("event FIFO is full - event dropped\n"); | |
61f922db LW |
983 | |
984 | return IRQ_HANDLED; | |
985 | } | |
986 | ||
d58f2bf2 LW |
987 | static irqreturn_t lineevent_irq_handler(int irq, void *p) |
988 | { | |
989 | struct lineevent_state *le = p; | |
990 | ||
991 | /* | |
992 | * Just store the timestamp in hardirq context so we get it as | |
993 | * close in time as possible to the actual event. | |
994 | */ | |
995 | le->timestamp = ktime_get_real_ns(); | |
996 | ||
997 | return IRQ_WAKE_THREAD; | |
998 | } | |
999 | ||
61f922db LW |
1000 | static int lineevent_create(struct gpio_device *gdev, void __user *ip) |
1001 | { | |
1002 | struct gpioevent_request eventreq; | |
1003 | struct lineevent_state *le; | |
1004 | struct gpio_desc *desc; | |
953b956a | 1005 | struct file *file; |
61f922db LW |
1006 | u32 offset; |
1007 | u32 lflags; | |
1008 | u32 eflags; | |
1009 | int fd; | |
1010 | int ret; | |
1011 | int irqflags = 0; | |
1012 | ||
1013 | if (copy_from_user(&eventreq, ip, sizeof(eventreq))) | |
1014 | return -EFAULT; | |
1015 | ||
bcc6d99a BG |
1016 | offset = eventreq.lineoffset; |
1017 | lflags = eventreq.handleflags; | |
1018 | eflags = eventreq.eventflags; | |
1019 | ||
45e23604 BG |
1020 | desc = gpiochip_get_desc(gdev->chip, offset); |
1021 | if (IS_ERR(desc)) | |
1022 | return PTR_ERR(desc); | |
bcc6d99a BG |
1023 | |
1024 | /* Return an error if a unknown flag is set */ | |
1025 | if ((lflags & ~GPIOHANDLE_REQUEST_VALID_FLAGS) || | |
1026 | (eflags & ~GPIOEVENT_REQUEST_VALID_FLAGS)) | |
1027 | return -EINVAL; | |
1028 | ||
1029 | /* This is just wrong: we don't look for events on output lines */ | |
1030 | if ((lflags & GPIOHANDLE_REQUEST_OUTPUT) || | |
1031 | (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN) || | |
1032 | (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE)) | |
1033 | return -EINVAL; | |
1034 | ||
2148ad77 KG |
1035 | /* Only one bias flag can be set. */ |
1036 | if (((lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE) && | |
1037 | (lflags & (GPIOHANDLE_REQUEST_BIAS_PULL_DOWN | | |
1038 | GPIOHANDLE_REQUEST_BIAS_PULL_UP))) || | |
1039 | ((lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) && | |
1040 | (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP))) | |
1041 | return -EINVAL; | |
1042 | ||
61f922db LW |
1043 | le = kzalloc(sizeof(*le), GFP_KERNEL); |
1044 | if (!le) | |
1045 | return -ENOMEM; | |
1046 | le->gdev = gdev; | |
1047 | get_device(&gdev->dev); | |
1048 | ||
1049 | /* Make sure this is terminated */ | |
1050 | eventreq.consumer_label[sizeof(eventreq.consumer_label)-1] = '\0'; | |
1051 | if (strlen(eventreq.consumer_label)) { | |
1052 | le->label = kstrdup(eventreq.consumer_label, | |
1053 | GFP_KERNEL); | |
1054 | if (!le->label) { | |
1055 | ret = -ENOMEM; | |
1056 | goto out_free_le; | |
1057 | } | |
1058 | } | |
1059 | ||
61f922db LW |
1060 | ret = gpiod_request(desc, le->label); |
1061 | if (ret) | |
f001cc35 | 1062 | goto out_free_label; |
61f922db LW |
1063 | le->desc = desc; |
1064 | le->eflags = eflags; | |
1065 | ||
1066 | if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW) | |
1067 | set_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
2148ad77 KG |
1068 | if (lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE) |
1069 | set_bit(FLAG_BIAS_DISABLE, &desc->flags); | |
7b479a84 KG |
1070 | if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) |
1071 | set_bit(FLAG_PULL_DOWN, &desc->flags); | |
1072 | if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP) | |
1073 | set_bit(FLAG_PULL_UP, &desc->flags); | |
61f922db LW |
1074 | |
1075 | ret = gpiod_direction_input(desc); | |
1076 | if (ret) | |
1077 | goto out_free_desc; | |
1078 | ||
1079 | le->irq = gpiod_to_irq(desc); | |
1080 | if (le->irq <= 0) { | |
1081 | ret = -ENODEV; | |
1082 | goto out_free_desc; | |
1083 | } | |
1084 | ||
1085 | if (eflags & GPIOEVENT_REQUEST_RISING_EDGE) | |
223ecaf1 MW |
1086 | irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ? |
1087 | IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING; | |
61f922db | 1088 | if (eflags & GPIOEVENT_REQUEST_FALLING_EDGE) |
223ecaf1 MW |
1089 | irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ? |
1090 | IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING; | |
61f922db | 1091 | irqflags |= IRQF_ONESHOT; |
61f922db LW |
1092 | |
1093 | INIT_KFIFO(le->events); | |
1094 | init_waitqueue_head(&le->wait); | |
61f922db LW |
1095 | |
1096 | /* Request a thread to read the events */ | |
1097 | ret = request_threaded_irq(le->irq, | |
d58f2bf2 | 1098 | lineevent_irq_handler, |
61f922db LW |
1099 | lineevent_irq_thread, |
1100 | irqflags, | |
1101 | le->label, | |
1102 | le); | |
1103 | if (ret) | |
1104 | goto out_free_desc; | |
1105 | ||
953b956a | 1106 | fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC); |
61f922db LW |
1107 | if (fd < 0) { |
1108 | ret = fd; | |
1109 | goto out_free_irq; | |
1110 | } | |
1111 | ||
953b956a LPC |
1112 | file = anon_inode_getfile("gpio-event", |
1113 | &lineevent_fileops, | |
1114 | le, | |
1115 | O_RDONLY | O_CLOEXEC); | |
1116 | if (IS_ERR(file)) { | |
1117 | ret = PTR_ERR(file); | |
1118 | goto out_put_unused_fd; | |
1119 | } | |
1120 | ||
61f922db | 1121 | eventreq.fd = fd; |
d932cd49 | 1122 | if (copy_to_user(ip, &eventreq, sizeof(eventreq))) { |
953b956a LPC |
1123 | /* |
1124 | * fput() will trigger the release() callback, so do not go onto | |
1125 | * the regular error cleanup path here. | |
1126 | */ | |
1127 | fput(file); | |
1128 | put_unused_fd(fd); | |
1129 | return -EFAULT; | |
d932cd49 | 1130 | } |
61f922db | 1131 | |
953b956a LPC |
1132 | fd_install(fd, file); |
1133 | ||
61f922db LW |
1134 | return 0; |
1135 | ||
953b956a LPC |
1136 | out_put_unused_fd: |
1137 | put_unused_fd(fd); | |
61f922db LW |
1138 | out_free_irq: |
1139 | free_irq(le->irq, le); | |
1140 | out_free_desc: | |
1141 | gpiod_free(le->desc); | |
1142 | out_free_label: | |
1143 | kfree(le->label); | |
1144 | out_free_le: | |
1145 | kfree(le); | |
1146 | put_device(&gdev->dev); | |
1147 | return ret; | |
1148 | } | |
1149 | ||
d2ac2579 BG |
1150 | static void gpio_desc_to_lineinfo(struct gpio_desc *desc, |
1151 | struct gpioline_info *info) | |
1152 | { | |
1153 | struct gpio_chip *chip = desc->gdev->chip; | |
1154 | unsigned long flags; | |
1155 | ||
1156 | spin_lock_irqsave(&gpio_lock, flags); | |
1157 | ||
1158 | if (desc->name) { | |
1159 | strncpy(info->name, desc->name, sizeof(info->name)); | |
1160 | info->name[sizeof(info->name) - 1] = '\0'; | |
1161 | } else { | |
1162 | info->name[0] = '\0'; | |
1163 | } | |
1164 | ||
1165 | if (desc->label) { | |
1166 | strncpy(info->consumer, desc->label, sizeof(info->consumer)); | |
1167 | info->consumer[sizeof(info->consumer) - 1] = '\0'; | |
1168 | } else { | |
1169 | info->consumer[0] = '\0'; | |
1170 | } | |
1171 | ||
1172 | /* | |
1173 | * Userspace only need to know that the kernel is using this GPIO so | |
1174 | * it can't use it. | |
1175 | */ | |
1176 | info->flags = 0; | |
1177 | if (test_bit(FLAG_REQUESTED, &desc->flags) || | |
1178 | test_bit(FLAG_IS_HOGGED, &desc->flags) || | |
1179 | test_bit(FLAG_USED_AS_IRQ, &desc->flags) || | |
1180 | test_bit(FLAG_EXPORT, &desc->flags) || | |
1181 | test_bit(FLAG_SYSFS, &desc->flags) || | |
1182 | !pinctrl_gpio_can_use_line(chip->base + info->line_offset)) | |
1183 | info->flags |= GPIOLINE_FLAG_KERNEL; | |
1184 | if (test_bit(FLAG_IS_OUT, &desc->flags)) | |
1185 | info->flags |= GPIOLINE_FLAG_IS_OUT; | |
1186 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
1187 | info->flags |= GPIOLINE_FLAG_ACTIVE_LOW; | |
1188 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) | |
1189 | info->flags |= (GPIOLINE_FLAG_OPEN_DRAIN | | |
1190 | GPIOLINE_FLAG_IS_OUT); | |
1191 | if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) | |
1192 | info->flags |= (GPIOLINE_FLAG_OPEN_SOURCE | | |
1193 | GPIOLINE_FLAG_IS_OUT); | |
1194 | if (test_bit(FLAG_BIAS_DISABLE, &desc->flags)) | |
1195 | info->flags |= GPIOLINE_FLAG_BIAS_DISABLE; | |
1196 | if (test_bit(FLAG_PULL_DOWN, &desc->flags)) | |
1197 | info->flags |= GPIOLINE_FLAG_BIAS_PULL_DOWN; | |
1198 | if (test_bit(FLAG_PULL_UP, &desc->flags)) | |
1199 | info->flags |= GPIOLINE_FLAG_BIAS_PULL_UP; | |
1200 | ||
1201 | spin_unlock_irqrestore(&gpio_lock, flags); | |
1202 | } | |
1203 | ||
950d55f5 | 1204 | /* |
3c702e99 LW |
1205 | * gpio_ioctl() - ioctl handler for the GPIO chardev |
1206 | */ | |
1207 | static long gpio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) | |
1208 | { | |
1209 | struct gpio_device *gdev = filp->private_data; | |
1210 | struct gpio_chip *chip = gdev->chip; | |
8b92e17e | 1211 | void __user *ip = (void __user *)arg; |
3c702e99 LW |
1212 | |
1213 | /* We fail any subsequent ioctl():s when the chip is gone */ | |
1214 | if (!chip) | |
1215 | return -ENODEV; | |
1216 | ||
521a2ad6 | 1217 | /* Fill in the struct and pass to userspace */ |
3c702e99 | 1218 | if (cmd == GPIO_GET_CHIPINFO_IOCTL) { |
521a2ad6 LW |
1219 | struct gpiochip_info chipinfo; |
1220 | ||
0f4bbb23 LPC |
1221 | memset(&chipinfo, 0, sizeof(chipinfo)); |
1222 | ||
3c702e99 LW |
1223 | strncpy(chipinfo.name, dev_name(&gdev->dev), |
1224 | sizeof(chipinfo.name)); | |
1225 | chipinfo.name[sizeof(chipinfo.name)-1] = '\0'; | |
df4878e9 LW |
1226 | strncpy(chipinfo.label, gdev->label, |
1227 | sizeof(chipinfo.label)); | |
1228 | chipinfo.label[sizeof(chipinfo.label)-1] = '\0'; | |
fdeb8e15 | 1229 | chipinfo.lines = gdev->ngpio; |
3c702e99 LW |
1230 | if (copy_to_user(ip, &chipinfo, sizeof(chipinfo))) |
1231 | return -EFAULT; | |
1232 | return 0; | |
521a2ad6 LW |
1233 | } else if (cmd == GPIO_GET_LINEINFO_IOCTL) { |
1234 | struct gpioline_info lineinfo; | |
1235 | struct gpio_desc *desc; | |
1236 | ||
1237 | if (copy_from_user(&lineinfo, ip, sizeof(lineinfo))) | |
1238 | return -EFAULT; | |
521a2ad6 | 1239 | |
2a2cabd8 BG |
1240 | desc = gpiochip_get_desc(chip, lineinfo.line_offset); |
1241 | if (IS_ERR(desc)) | |
1242 | return PTR_ERR(desc); | |
1243 | ||
d2ac2579 | 1244 | gpio_desc_to_lineinfo(desc, &lineinfo); |
521a2ad6 LW |
1245 | |
1246 | if (copy_to_user(ip, &lineinfo, sizeof(lineinfo))) | |
1247 | return -EFAULT; | |
1248 | return 0; | |
d7c51b47 LW |
1249 | } else if (cmd == GPIO_GET_LINEHANDLE_IOCTL) { |
1250 | return linehandle_create(gdev, ip); | |
61f922db LW |
1251 | } else if (cmd == GPIO_GET_LINEEVENT_IOCTL) { |
1252 | return lineevent_create(gdev, ip); | |
3c702e99 LW |
1253 | } |
1254 | return -EINVAL; | |
1255 | } | |
1256 | ||
8b92e17e LW |
1257 | #ifdef CONFIG_COMPAT |
1258 | static long gpio_ioctl_compat(struct file *filp, unsigned int cmd, | |
1259 | unsigned long arg) | |
1260 | { | |
1261 | return gpio_ioctl(filp, cmd, (unsigned long)compat_ptr(arg)); | |
1262 | } | |
1263 | #endif | |
1264 | ||
3c702e99 LW |
1265 | /** |
1266 | * gpio_chrdev_open() - open the chardev for ioctl operations | |
1267 | * @inode: inode for this chardev | |
1268 | * @filp: file struct for storing private data | |
1269 | * Returns 0 on success | |
1270 | */ | |
1271 | static int gpio_chrdev_open(struct inode *inode, struct file *filp) | |
1272 | { | |
1273 | struct gpio_device *gdev = container_of(inode->i_cdev, | |
1274 | struct gpio_device, chrdev); | |
1275 | ||
1276 | /* Fail on open if the backing gpiochip is gone */ | |
fb505747 | 1277 | if (!gdev->chip) |
3c702e99 LW |
1278 | return -ENODEV; |
1279 | get_device(&gdev->dev); | |
1280 | filp->private_data = gdev; | |
f4e81c52 LPC |
1281 | |
1282 | return nonseekable_open(inode, filp); | |
3c702e99 LW |
1283 | } |
1284 | ||
1285 | /** | |
1286 | * gpio_chrdev_release() - close chardev after ioctl operations | |
1287 | * @inode: inode for this chardev | |
1288 | * @filp: file struct for storing private data | |
1289 | * Returns 0 on success | |
1290 | */ | |
1291 | static int gpio_chrdev_release(struct inode *inode, struct file *filp) | |
1292 | { | |
1293 | struct gpio_device *gdev = container_of(inode->i_cdev, | |
1294 | struct gpio_device, chrdev); | |
1295 | ||
3c702e99 LW |
1296 | put_device(&gdev->dev); |
1297 | return 0; | |
1298 | } | |
1299 | ||
1300 | ||
1301 | static const struct file_operations gpio_fileops = { | |
1302 | .release = gpio_chrdev_release, | |
1303 | .open = gpio_chrdev_open, | |
1304 | .owner = THIS_MODULE, | |
f4e81c52 | 1305 | .llseek = no_llseek, |
3c702e99 | 1306 | .unlocked_ioctl = gpio_ioctl, |
8b92e17e LW |
1307 | #ifdef CONFIG_COMPAT |
1308 | .compat_ioctl = gpio_ioctl_compat, | |
1309 | #endif | |
3c702e99 LW |
1310 | }; |
1311 | ||
ff2b1359 LW |
1312 | static void gpiodevice_release(struct device *dev) |
1313 | { | |
1314 | struct gpio_device *gdev = dev_get_drvdata(dev); | |
1315 | ||
1316 | list_del(&gdev->list); | |
1317 | ida_simple_remove(&gpio_ida, gdev->id); | |
fcf273e5 | 1318 | kfree_const(gdev->label); |
476e2fc5 | 1319 | kfree(gdev->descs); |
9efd9e69 | 1320 | kfree(gdev); |
ff2b1359 LW |
1321 | } |
1322 | ||
159f3cd9 GR |
1323 | static int gpiochip_setup_dev(struct gpio_device *gdev) |
1324 | { | |
d377f56f | 1325 | int ret; |
159f3cd9 GR |
1326 | |
1327 | cdev_init(&gdev->chrdev, &gpio_fileops); | |
1328 | gdev->chrdev.owner = THIS_MODULE; | |
159f3cd9 | 1329 | gdev->dev.devt = MKDEV(MAJOR(gpio_devt), gdev->id); |
111379dc | 1330 | |
d377f56f LW |
1331 | ret = cdev_device_add(&gdev->chrdev, &gdev->dev); |
1332 | if (ret) | |
1333 | return ret; | |
111379dc LG |
1334 | |
1335 | chip_dbg(gdev->chip, "added GPIO chardev (%d:%d)\n", | |
1336 | MAJOR(gpio_devt), gdev->id); | |
159f3cd9 | 1337 | |
d377f56f LW |
1338 | ret = gpiochip_sysfs_register(gdev); |
1339 | if (ret) | |
159f3cd9 GR |
1340 | goto err_remove_device; |
1341 | ||
1342 | /* From this point, the .release() function cleans up gpio_device */ | |
1343 | gdev->dev.release = gpiodevice_release; | |
159f3cd9 GR |
1344 | pr_debug("%s: registered GPIOs %d to %d on device: %s (%s)\n", |
1345 | __func__, gdev->base, gdev->base + gdev->ngpio - 1, | |
1346 | dev_name(&gdev->dev), gdev->chip->label ? : "generic"); | |
1347 | ||
1348 | return 0; | |
1349 | ||
1350 | err_remove_device: | |
111379dc | 1351 | cdev_device_del(&gdev->chrdev, &gdev->dev); |
d377f56f | 1352 | return ret; |
159f3cd9 GR |
1353 | } |
1354 | ||
a411e81e BG |
1355 | static void gpiochip_machine_hog(struct gpio_chip *chip, struct gpiod_hog *hog) |
1356 | { | |
1357 | struct gpio_desc *desc; | |
1358 | int rv; | |
1359 | ||
1360 | desc = gpiochip_get_desc(chip, hog->chip_hwnum); | |
1361 | if (IS_ERR(desc)) { | |
1362 | pr_err("%s: unable to get GPIO desc: %ld\n", | |
1363 | __func__, PTR_ERR(desc)); | |
1364 | return; | |
1365 | } | |
1366 | ||
ba3efdff | 1367 | if (test_bit(FLAG_IS_HOGGED, &desc->flags)) |
a411e81e BG |
1368 | return; |
1369 | ||
1370 | rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags); | |
1371 | if (rv) | |
1372 | pr_err("%s: unable to hog GPIO line (%s:%u): %d\n", | |
1373 | __func__, chip->label, hog->chip_hwnum, rv); | |
1374 | } | |
1375 | ||
1376 | static void machine_gpiochip_add(struct gpio_chip *chip) | |
1377 | { | |
1378 | struct gpiod_hog *hog; | |
1379 | ||
1380 | mutex_lock(&gpio_machine_hogs_mutex); | |
1381 | ||
1382 | list_for_each_entry(hog, &gpio_machine_hogs, list) { | |
1383 | if (!strcmp(chip->label, hog->chip_label)) | |
1384 | gpiochip_machine_hog(chip, hog); | |
1385 | } | |
1386 | ||
1387 | mutex_unlock(&gpio_machine_hogs_mutex); | |
1388 | } | |
1389 | ||
159f3cd9 GR |
1390 | static void gpiochip_setup_devs(void) |
1391 | { | |
1392 | struct gpio_device *gdev; | |
d377f56f | 1393 | int ret; |
159f3cd9 GR |
1394 | |
1395 | list_for_each_entry(gdev, &gpio_devices, list) { | |
d377f56f LW |
1396 | ret = gpiochip_setup_dev(gdev); |
1397 | if (ret) | |
159f3cd9 | 1398 | pr_err("%s: Failed to initialize gpio device (%d)\n", |
d377f56f | 1399 | dev_name(&gdev->dev), ret); |
159f3cd9 GR |
1400 | } |
1401 | } | |
1402 | ||
959bc7b2 | 1403 | int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data, |
39c3fd58 AL |
1404 | struct lock_class_key *lock_key, |
1405 | struct lock_class_key *request_key) | |
d2876d08 DB |
1406 | { |
1407 | unsigned long flags; | |
d377f56f | 1408 | int ret = 0; |
ff2b1359 | 1409 | unsigned i; |
8d0aab2f | 1410 | int base = chip->base; |
ff2b1359 | 1411 | struct gpio_device *gdev; |
d2876d08 | 1412 | |
ff2b1359 LW |
1413 | /* |
1414 | * First: allocate and populate the internal stat container, and | |
1415 | * set up the struct device. | |
1416 | */ | |
969f07b4 | 1417 | gdev = kzalloc(sizeof(*gdev), GFP_KERNEL); |
ff2b1359 | 1418 | if (!gdev) |
14e85c0e | 1419 | return -ENOMEM; |
3c702e99 | 1420 | gdev->dev.bus = &gpio_bus_type; |
ff2b1359 LW |
1421 | gdev->chip = chip; |
1422 | chip->gpiodev = gdev; | |
1423 | if (chip->parent) { | |
1424 | gdev->dev.parent = chip->parent; | |
1425 | gdev->dev.of_node = chip->parent->of_node; | |
acc6e331 TR |
1426 | } |
1427 | ||
ff2b1359 LW |
1428 | #ifdef CONFIG_OF_GPIO |
1429 | /* If the gpiochip has an assigned OF node this takes precedence */ | |
acc6e331 TR |
1430 | if (chip->of_node) |
1431 | gdev->dev.of_node = chip->of_node; | |
6ff04974 BD |
1432 | else |
1433 | chip->of_node = gdev->dev.of_node; | |
ff2b1359 | 1434 | #endif |
acc6e331 | 1435 | |
ff2b1359 LW |
1436 | gdev->id = ida_simple_get(&gpio_ida, 0, 0, GFP_KERNEL); |
1437 | if (gdev->id < 0) { | |
d377f56f | 1438 | ret = gdev->id; |
ff2b1359 LW |
1439 | goto err_free_gdev; |
1440 | } | |
ddd8891e | 1441 | dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id); |
ff2b1359 LW |
1442 | device_initialize(&gdev->dev); |
1443 | dev_set_drvdata(&gdev->dev, gdev); | |
1444 | if (chip->parent && chip->parent->driver) | |
1445 | gdev->owner = chip->parent->driver->owner; | |
1446 | else if (chip->owner) | |
1447 | /* TODO: remove chip->owner */ | |
1448 | gdev->owner = chip->owner; | |
1449 | else | |
1450 | gdev->owner = THIS_MODULE; | |
d2876d08 | 1451 | |
476e2fc5 | 1452 | gdev->descs = kcalloc(chip->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL); |
1c3cdb18 | 1453 | if (!gdev->descs) { |
d377f56f | 1454 | ret = -ENOMEM; |
a05a1404 | 1455 | goto err_free_ida; |
ff2b1359 LW |
1456 | } |
1457 | ||
5ed41cc4 BJZ |
1458 | if (chip->ngpio == 0) { |
1459 | chip_err(chip, "tried to insert a GPIO chip with zero lines\n"); | |
d377f56f | 1460 | ret = -EINVAL; |
159f3cd9 | 1461 | goto err_free_descs; |
5ed41cc4 | 1462 | } |
df4878e9 | 1463 | |
3027743f LA |
1464 | if (chip->ngpio > FASTPATH_NGPIO) |
1465 | chip_warn(chip, "line cnt %u is greater than fast path cnt %u\n", | |
2ddac5ae | 1466 | chip->ngpio, FASTPATH_NGPIO); |
3027743f | 1467 | |
fcf273e5 | 1468 | gdev->label = kstrdup_const(chip->label ?: "unknown", GFP_KERNEL); |
df4878e9 | 1469 | if (!gdev->label) { |
d377f56f | 1470 | ret = -ENOMEM; |
476e2fc5 | 1471 | goto err_free_descs; |
df4878e9 LW |
1472 | } |
1473 | ||
fdeb8e15 | 1474 | gdev->ngpio = chip->ngpio; |
43c54eca | 1475 | gdev->data = data; |
5ed41cc4 | 1476 | |
d2876d08 DB |
1477 | spin_lock_irqsave(&gpio_lock, flags); |
1478 | ||
fdeb8e15 LW |
1479 | /* |
1480 | * TODO: this allocates a Linux GPIO number base in the global | |
1481 | * GPIO numberspace for this chip. In the long run we want to | |
1482 | * get *rid* of this numberspace and use only descriptors, but | |
1483 | * it may be a pipe dream. It will not happen before we get rid | |
1484 | * of the sysfs interface anyways. | |
1485 | */ | |
8d0aab2f AV |
1486 | if (base < 0) { |
1487 | base = gpiochip_find_base(chip->ngpio); | |
1488 | if (base < 0) { | |
d377f56f | 1489 | ret = base; |
225fce83 | 1490 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 1491 | goto err_free_label; |
8d0aab2f | 1492 | } |
fdeb8e15 LW |
1493 | /* |
1494 | * TODO: it should not be necessary to reflect the assigned | |
1495 | * base outside of the GPIO subsystem. Go over drivers and | |
1496 | * see if anyone makes use of this, else drop this and assign | |
1497 | * a poison instead. | |
1498 | */ | |
8d0aab2f AV |
1499 | chip->base = base; |
1500 | } | |
fdeb8e15 | 1501 | gdev->base = base; |
8d0aab2f | 1502 | |
d377f56f LW |
1503 | ret = gpiodev_add_to_list(gdev); |
1504 | if (ret) { | |
05aa5203 | 1505 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 1506 | goto err_free_label; |
05aa5203 | 1507 | } |
1a989d0f | 1508 | |
767cd17a RRD |
1509 | for (i = 0; i < chip->ngpio; i++) |
1510 | gdev->descs[i].gdev = gdev; | |
14e85c0e | 1511 | |
207270dd DC |
1512 | spin_unlock_irqrestore(&gpio_lock, flags); |
1513 | ||
f23f1516 | 1514 | #ifdef CONFIG_PINCTRL |
20ec3e39 | 1515 | INIT_LIST_HEAD(&gdev->pin_ranges); |
f23f1516 SH |
1516 | #endif |
1517 | ||
d377f56f LW |
1518 | ret = gpiochip_set_desc_names(chip); |
1519 | if (ret) | |
5f3ca732 MP |
1520 | goto err_remove_from_list; |
1521 | ||
d377f56f LW |
1522 | ret = gpiochip_alloc_valid_mask(chip); |
1523 | if (ret) | |
48057ed1 | 1524 | goto err_remove_from_list; |
e0d89728 | 1525 | |
d377f56f LW |
1526 | ret = of_gpiochip_add(chip); |
1527 | if (ret) | |
48057ed1 | 1528 | goto err_free_gpiochip_mask; |
28355f81 | 1529 | |
d377f56f LW |
1530 | ret = gpiochip_init_valid_mask(chip); |
1531 | if (ret) | |
35779890 | 1532 | goto err_remove_of_chip; |
f8ec92a9 | 1533 | |
3edfb7bd RRD |
1534 | for (i = 0; i < chip->ngpio; i++) { |
1535 | struct gpio_desc *desc = &gdev->descs[i]; | |
1536 | ||
d95da993 | 1537 | if (chip->get_direction && gpiochip_line_is_valid(chip, i)) { |
4fc5bfeb AS |
1538 | assign_bit(FLAG_IS_OUT, |
1539 | &desc->flags, !chip->get_direction(chip, i)); | |
d95da993 | 1540 | } else { |
4fc5bfeb AS |
1541 | assign_bit(FLAG_IS_OUT, |
1542 | &desc->flags, !chip->direction_input); | |
d95da993 | 1543 | } |
3edfb7bd RRD |
1544 | } |
1545 | ||
b056ca1c AS |
1546 | ret = gpiochip_add_pin_ranges(chip); |
1547 | if (ret) | |
1548 | goto err_remove_of_chip; | |
1549 | ||
664e3e5a | 1550 | acpi_gpiochip_add(chip); |
391c970c | 1551 | |
a411e81e BG |
1552 | machine_gpiochip_add(chip); |
1553 | ||
504369cd | 1554 | ret = gpiochip_irqchip_init_valid_mask(chip); |
9411e3aa AS |
1555 | if (ret) |
1556 | goto err_remove_acpi_chip; | |
1557 | ||
504369cd | 1558 | ret = gpiochip_irqchip_init_hw(chip); |
fbdf8d4b | 1559 | if (ret) |
48057ed1 LW |
1560 | goto err_remove_acpi_chip; |
1561 | ||
fbdf8d4b LW |
1562 | ret = gpiochip_add_irqchip(chip, lock_key, request_key); |
1563 | if (ret) | |
48057ed1 LW |
1564 | goto err_remove_irqchip_mask; |
1565 | ||
3c702e99 LW |
1566 | /* |
1567 | * By first adding the chardev, and then adding the device, | |
1568 | * we get a device node entry in sysfs under | |
1569 | * /sys/bus/gpio/devices/gpiochipN/dev that can be used for | |
1570 | * coldplug of device nodes and other udev business. | |
159f3cd9 GR |
1571 | * We can do this only if gpiolib has been initialized. |
1572 | * Otherwise, defer until later. | |
3c702e99 | 1573 | */ |
159f3cd9 | 1574 | if (gpiolib_initialized) { |
d377f56f LW |
1575 | ret = gpiochip_setup_dev(gdev); |
1576 | if (ret) | |
48057ed1 | 1577 | goto err_remove_irqchip; |
159f3cd9 | 1578 | } |
cedb1881 | 1579 | return 0; |
3bae4811 | 1580 | |
48057ed1 LW |
1581 | err_remove_irqchip: |
1582 | gpiochip_irqchip_remove(chip); | |
1583 | err_remove_irqchip_mask: | |
1584 | gpiochip_irqchip_free_valid_mask(chip); | |
35779890 | 1585 | err_remove_acpi_chip: |
225fce83 | 1586 | acpi_gpiochip_remove(chip); |
35779890 | 1587 | err_remove_of_chip: |
6d86750c | 1588 | gpiochip_free_hogs(chip); |
225fce83 | 1589 | of_gpiochip_remove(chip); |
35779890 | 1590 | err_free_gpiochip_mask: |
2f4133bb | 1591 | gpiochip_remove_pin_ranges(chip); |
726cb3ba | 1592 | gpiochip_free_valid_mask(chip); |
5f3ca732 | 1593 | err_remove_from_list: |
225fce83 | 1594 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 1595 | list_del(&gdev->list); |
3bae4811 | 1596 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 1597 | err_free_label: |
fcf273e5 | 1598 | kfree_const(gdev->label); |
476e2fc5 GR |
1599 | err_free_descs: |
1600 | kfree(gdev->descs); | |
a05a1404 | 1601 | err_free_ida: |
ff2b1359 | 1602 | ida_simple_remove(&gpio_ida, gdev->id); |
a05a1404 | 1603 | err_free_gdev: |
d2876d08 | 1604 | /* failures here can mean systems won't boot... */ |
1777fc97 | 1605 | pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__, |
fdeb8e15 | 1606 | gdev->base, gdev->base + gdev->ngpio - 1, |
d377f56f | 1607 | chip->label ? : "generic", ret); |
fdeb8e15 | 1608 | kfree(gdev); |
d377f56f | 1609 | return ret; |
d2876d08 | 1610 | } |
959bc7b2 | 1611 | EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key); |
d2876d08 | 1612 | |
43c54eca LW |
1613 | /** |
1614 | * gpiochip_get_data() - get per-subdriver data for the chip | |
950d55f5 TR |
1615 | * @chip: GPIO chip |
1616 | * | |
1617 | * Returns: | |
1618 | * The per-subdriver data for the chip. | |
43c54eca LW |
1619 | */ |
1620 | void *gpiochip_get_data(struct gpio_chip *chip) | |
1621 | { | |
1622 | return chip->gpiodev->data; | |
1623 | } | |
1624 | EXPORT_SYMBOL_GPL(gpiochip_get_data); | |
1625 | ||
d2876d08 DB |
1626 | /** |
1627 | * gpiochip_remove() - unregister a gpio_chip | |
1628 | * @chip: the chip to unregister | |
1629 | * | |
1630 | * A gpio_chip with any GPIOs still requested may not be removed. | |
1631 | */ | |
e1db1706 | 1632 | void gpiochip_remove(struct gpio_chip *chip) |
d2876d08 | 1633 | { |
ff2b1359 | 1634 | struct gpio_device *gdev = chip->gpiodev; |
fab28b89 | 1635 | struct gpio_desc *desc; |
d2876d08 | 1636 | unsigned long flags; |
1c3cdb18 | 1637 | unsigned i; |
fab28b89 | 1638 | bool requested = false; |
d2876d08 | 1639 | |
ff2b1359 | 1640 | /* FIXME: should the legacy sysfs handling be moved to gpio_device? */ |
afbc4f31 | 1641 | gpiochip_sysfs_unregister(gdev); |
5018ada6 | 1642 | gpiochip_free_hogs(chip); |
bd203bd5 BJZ |
1643 | /* Numb the device, cancelling all outstanding operations */ |
1644 | gdev->chip = NULL; | |
00acc3dc | 1645 | gpiochip_irqchip_remove(chip); |
6072b9dc | 1646 | acpi_gpiochip_remove(chip); |
391c970c | 1647 | of_gpiochip_remove(chip); |
2f4133bb | 1648 | gpiochip_remove_pin_ranges(chip); |
726cb3ba | 1649 | gpiochip_free_valid_mask(chip); |
43c54eca LW |
1650 | /* |
1651 | * We accept no more calls into the driver from this point, so | |
1652 | * NULL the driver data pointer | |
1653 | */ | |
1654 | gdev->data = NULL; | |
391c970c | 1655 | |
6798acaa | 1656 | spin_lock_irqsave(&gpio_lock, flags); |
fdeb8e15 | 1657 | for (i = 0; i < gdev->ngpio; i++) { |
1c3cdb18 | 1658 | desc = &gdev->descs[i]; |
fab28b89 JH |
1659 | if (test_bit(FLAG_REQUESTED, &desc->flags)) |
1660 | requested = true; | |
d2876d08 | 1661 | } |
d2876d08 | 1662 | spin_unlock_irqrestore(&gpio_lock, flags); |
14e85c0e | 1663 | |
fab28b89 | 1664 | if (requested) |
fdeb8e15 | 1665 | dev_crit(&gdev->dev, |
58383c78 | 1666 | "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n"); |
fab28b89 | 1667 | |
ff2b1359 LW |
1668 | /* |
1669 | * The gpiochip side puts its use of the device to rest here: | |
1670 | * if there are no userspace clients, the chardev and device will | |
1671 | * be removed, else it will be dangling until the last user is | |
1672 | * gone. | |
1673 | */ | |
111379dc | 1674 | cdev_device_del(&gdev->chrdev, &gdev->dev); |
ff2b1359 | 1675 | put_device(&gdev->dev); |
d2876d08 DB |
1676 | } |
1677 | EXPORT_SYMBOL_GPL(gpiochip_remove); | |
1678 | ||
0cf3292c LD |
1679 | static void devm_gpio_chip_release(struct device *dev, void *res) |
1680 | { | |
1681 | struct gpio_chip *chip = *(struct gpio_chip **)res; | |
1682 | ||
1683 | gpiochip_remove(chip); | |
1684 | } | |
1685 | ||
0cf3292c | 1686 | /** |
51158416 | 1687 | * devm_gpiochip_add_data() - Resource managed gpiochip_add_data() |
3925b90f | 1688 | * @dev: pointer to the device that gpio_chip belongs to. |
0cf3292c | 1689 | * @chip: the chip to register, with chip->base initialized |
950d55f5 | 1690 | * @data: driver-private data associated with this chip |
0cf3292c | 1691 | * |
950d55f5 | 1692 | * Context: potentially before irqs will work |
0cf3292c LD |
1693 | * |
1694 | * The gpio chip automatically be released when the device is unbound. | |
950d55f5 TR |
1695 | * |
1696 | * Returns: | |
1697 | * A negative errno if the chip can't be registered, such as because the | |
1698 | * chip->base is invalid or already associated with a different chip. | |
1699 | * Otherwise it returns zero as a success code. | |
0cf3292c LD |
1700 | */ |
1701 | int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip, | |
1702 | void *data) | |
1703 | { | |
1704 | struct gpio_chip **ptr; | |
1705 | int ret; | |
1706 | ||
1707 | ptr = devres_alloc(devm_gpio_chip_release, sizeof(*ptr), | |
1708 | GFP_KERNEL); | |
1709 | if (!ptr) | |
1710 | return -ENOMEM; | |
1711 | ||
1712 | ret = gpiochip_add_data(chip, data); | |
1713 | if (ret < 0) { | |
1714 | devres_free(ptr); | |
1715 | return ret; | |
1716 | } | |
1717 | ||
1718 | *ptr = chip; | |
1719 | devres_add(dev, ptr); | |
1720 | ||
1721 | return 0; | |
1722 | } | |
1723 | EXPORT_SYMBOL_GPL(devm_gpiochip_add_data); | |
1724 | ||
594fa265 GL |
1725 | /** |
1726 | * gpiochip_find() - iterator for locating a specific gpio_chip | |
1727 | * @data: data to pass to match function | |
950d55f5 | 1728 | * @match: Callback function to check gpio_chip |
594fa265 GL |
1729 | * |
1730 | * Similar to bus_find_device. It returns a reference to a gpio_chip as | |
1731 | * determined by a user supplied @match callback. The callback should return | |
1732 | * 0 if the device doesn't match and non-zero if it does. If the callback is | |
1733 | * non-zero, this function will return to the caller and not iterate over any | |
1734 | * more gpio_chips. | |
1735 | */ | |
07ce8ec7 | 1736 | struct gpio_chip *gpiochip_find(void *data, |
6e2cf651 | 1737 | int (*match)(struct gpio_chip *chip, |
3d0f7cf0 | 1738 | void *data)) |
594fa265 | 1739 | { |
ff2b1359 | 1740 | struct gpio_device *gdev; |
acf06ff7 | 1741 | struct gpio_chip *chip = NULL; |
594fa265 | 1742 | unsigned long flags; |
594fa265 GL |
1743 | |
1744 | spin_lock_irqsave(&gpio_lock, flags); | |
ff2b1359 | 1745 | list_for_each_entry(gdev, &gpio_devices, list) |
acf06ff7 MY |
1746 | if (gdev->chip && match(gdev->chip, data)) { |
1747 | chip = gdev->chip; | |
594fa265 | 1748 | break; |
acf06ff7 | 1749 | } |
ff2b1359 | 1750 | |
594fa265 GL |
1751 | spin_unlock_irqrestore(&gpio_lock, flags); |
1752 | ||
1753 | return chip; | |
1754 | } | |
8fa0c9bf | 1755 | EXPORT_SYMBOL_GPL(gpiochip_find); |
d2876d08 | 1756 | |
79697ef9 AC |
1757 | static int gpiochip_match_name(struct gpio_chip *chip, void *data) |
1758 | { | |
1759 | const char *name = data; | |
1760 | ||
1761 | return !strcmp(chip->label, name); | |
1762 | } | |
1763 | ||
1764 | static struct gpio_chip *find_chip_by_name(const char *name) | |
1765 | { | |
1766 | return gpiochip_find((void *)name, gpiochip_match_name); | |
1767 | } | |
1768 | ||
14250520 LW |
1769 | #ifdef CONFIG_GPIOLIB_IRQCHIP |
1770 | ||
1771 | /* | |
1772 | * The following is irqchip helper code for gpiochips. | |
1773 | */ | |
1774 | ||
9411e3aa AS |
1775 | static int gpiochip_irqchip_init_hw(struct gpio_chip *gc) |
1776 | { | |
1777 | struct gpio_irq_chip *girq = &gc->irq; | |
1778 | ||
1779 | if (!girq->init_hw) | |
1780 | return 0; | |
1781 | ||
1782 | return girq->init_hw(gc); | |
1783 | } | |
1784 | ||
5fbe5b58 | 1785 | static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc) |
79b804cb | 1786 | { |
5fbe5b58 LW |
1787 | struct gpio_irq_chip *girq = &gc->irq; |
1788 | ||
1789 | if (!girq->init_valid_mask) | |
79b804cb MW |
1790 | return 0; |
1791 | ||
5fbe5b58 LW |
1792 | girq->valid_mask = gpiochip_allocate_mask(gc); |
1793 | if (!girq->valid_mask) | |
79b804cb MW |
1794 | return -ENOMEM; |
1795 | ||
5fbe5b58 LW |
1796 | girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio); |
1797 | ||
79b804cb MW |
1798 | return 0; |
1799 | } | |
1800 | ||
1801 | static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip) | |
1802 | { | |
7bdbd1ec | 1803 | bitmap_free(gpiochip->irq.valid_mask); |
dc7b0387 | 1804 | gpiochip->irq.valid_mask = NULL; |
79b804cb MW |
1805 | } |
1806 | ||
64ff2c8e SB |
1807 | bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gpiochip, |
1808 | unsigned int offset) | |
79b804cb | 1809 | { |
726cb3ba SB |
1810 | if (!gpiochip_line_is_valid(gpiochip, offset)) |
1811 | return false; | |
79b804cb | 1812 | /* No mask means all valid */ |
dc7b0387 | 1813 | if (likely(!gpiochip->irq.valid_mask)) |
79b804cb | 1814 | return true; |
dc7b0387 | 1815 | return test_bit(offset, gpiochip->irq.valid_mask); |
79b804cb | 1816 | } |
64ff2c8e | 1817 | EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid); |
79b804cb | 1818 | |
14250520 | 1819 | /** |
d245b3f9 | 1820 | * gpiochip_set_cascaded_irqchip() - connects a cascaded irqchip to a gpiochip |
4892d3a6 | 1821 | * @gc: the gpiochip to set the irqchip chain to |
14250520 | 1822 | * @parent_irq: the irq number corresponding to the parent IRQ for this |
72780ce5 | 1823 | * cascaded irqchip |
14250520 | 1824 | * @parent_handler: the parent interrupt handler for the accumulated IRQ |
3f97d5fc LW |
1825 | * coming out of the gpiochip. If the interrupt is nested rather than |
1826 | * cascaded, pass NULL in this handler argument | |
14250520 | 1827 | */ |
4892d3a6 | 1828 | static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gc, |
6f79309a | 1829 | unsigned int parent_irq, |
d245b3f9 | 1830 | irq_flow_handler_t parent_handler) |
14250520 | 1831 | { |
4892d3a6 LW |
1832 | struct gpio_irq_chip *girq = &gc->irq; |
1833 | struct device *dev = &gc->gpiodev->dev; | |
1834 | ||
1835 | if (!girq->domain) { | |
1836 | chip_err(gc, "called %s before setting up irqchip\n", | |
83141a77 | 1837 | __func__); |
1c8732bb LW |
1838 | return; |
1839 | } | |
1840 | ||
3f97d5fc | 1841 | if (parent_handler) { |
4892d3a6 LW |
1842 | if (gc->can_sleep) { |
1843 | chip_err(gc, | |
b1911710 | 1844 | "you cannot have chained interrupts on a chip that may sleep\n"); |
3f97d5fc LW |
1845 | return; |
1846 | } | |
4892d3a6 LW |
1847 | girq->parents = devm_kcalloc(dev, 1, |
1848 | sizeof(*girq->parents), | |
1849 | GFP_KERNEL); | |
1850 | if (!girq->parents) { | |
1851 | chip_err(gc, "out of memory allocating parent IRQ\n"); | |
1852 | return; | |
1853 | } | |
1854 | girq->parents[0] = parent_irq; | |
1855 | girq->num_parents = 1; | |
3f97d5fc LW |
1856 | /* |
1857 | * The parent irqchip is already using the chip_data for this | |
1858 | * irqchip, so our callbacks simply use the handler_data. | |
1859 | */ | |
f7f87753 | 1860 | irq_set_chained_handler_and_data(parent_irq, parent_handler, |
4892d3a6 | 1861 | gc); |
3f97d5fc | 1862 | } |
14250520 | 1863 | } |
d245b3f9 | 1864 | |
d245b3f9 LW |
1865 | /** |
1866 | * gpiochip_set_nested_irqchip() - connects a nested irqchip to a gpiochip | |
1867 | * @gpiochip: the gpiochip to set the irqchip nested handler to | |
1868 | * @irqchip: the irqchip to nest to the gpiochip | |
1869 | * @parent_irq: the irq number corresponding to the parent IRQ for this | |
1870 | * nested irqchip | |
1871 | */ | |
1872 | void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip, | |
1873 | struct irq_chip *irqchip, | |
6f79309a | 1874 | unsigned int parent_irq) |
d245b3f9 | 1875 | { |
3c1f6b2d | 1876 | gpiochip_set_cascaded_irqchip(gpiochip, parent_irq, NULL); |
d245b3f9 LW |
1877 | } |
1878 | EXPORT_SYMBOL_GPL(gpiochip_set_nested_irqchip); | |
1879 | ||
fdd61a01 LW |
1880 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
1881 | ||
1882 | /** | |
1883 | * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip | |
1884 | * to a gpiochip | |
1885 | * @gc: the gpiochip to set the irqchip hierarchical handler to | |
1886 | * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt | |
1887 | * will then percolate up to the parent | |
1888 | */ | |
1889 | static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc, | |
1890 | struct irq_chip *irqchip) | |
1891 | { | |
1892 | /* DT will deal with mapping each IRQ as we go along */ | |
1893 | if (is_of_node(gc->irq.fwnode)) | |
1894 | return; | |
1895 | ||
1896 | /* | |
1897 | * This is for legacy and boardfile "irqchip" fwnodes: allocate | |
1898 | * irqs upfront instead of dynamically since we don't have the | |
1899 | * dynamic type of allocation that hardware description languages | |
1900 | * provide. Once all GPIO drivers using board files are gone from | |
1901 | * the kernel we can delete this code, but for a transitional period | |
1902 | * it is necessary to keep this around. | |
1903 | */ | |
1904 | if (is_fwnode_irqchip(gc->irq.fwnode)) { | |
1905 | int i; | |
1906 | int ret; | |
1907 | ||
1908 | for (i = 0; i < gc->ngpio; i++) { | |
1909 | struct irq_fwspec fwspec; | |
1910 | unsigned int parent_hwirq; | |
1911 | unsigned int parent_type; | |
1912 | struct gpio_irq_chip *girq = &gc->irq; | |
1913 | ||
1914 | /* | |
1915 | * We call the child to parent translation function | |
1916 | * only to check if the child IRQ is valid or not. | |
1917 | * Just pick the rising edge type here as that is what | |
1918 | * we likely need to support. | |
1919 | */ | |
1920 | ret = girq->child_to_parent_hwirq(gc, i, | |
1921 | IRQ_TYPE_EDGE_RISING, | |
1922 | &parent_hwirq, | |
1923 | &parent_type); | |
1924 | if (ret) { | |
1925 | chip_err(gc, "skip set-up on hwirq %d\n", | |
1926 | i); | |
1927 | continue; | |
1928 | } | |
1929 | ||
1930 | fwspec.fwnode = gc->irq.fwnode; | |
1931 | /* This is the hwirq for the GPIO line side of things */ | |
1932 | fwspec.param[0] = girq->child_offset_to_irq(gc, i); | |
1933 | /* Just pick something */ | |
1934 | fwspec.param[1] = IRQ_TYPE_EDGE_RISING; | |
1935 | fwspec.param_count = 2; | |
1936 | ret = __irq_domain_alloc_irqs(gc->irq.domain, | |
1937 | /* just pick something */ | |
1938 | -1, | |
1939 | 1, | |
1940 | NUMA_NO_NODE, | |
1941 | &fwspec, | |
1942 | false, | |
1943 | NULL); | |
1944 | if (ret < 0) { | |
1945 | chip_err(gc, | |
1946 | "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n", | |
1947 | i, parent_hwirq, | |
1948 | ret); | |
1949 | } | |
1950 | } | |
1951 | } | |
1952 | ||
1953 | chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__); | |
1954 | ||
1955 | return; | |
1956 | } | |
1957 | ||
1958 | static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d, | |
1959 | struct irq_fwspec *fwspec, | |
1960 | unsigned long *hwirq, | |
1961 | unsigned int *type) | |
1962 | { | |
1963 | /* We support standard DT translation */ | |
1964 | if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) { | |
1965 | return irq_domain_translate_twocell(d, fwspec, hwirq, type); | |
1966 | } | |
1967 | ||
1968 | /* This is for board files and others not using DT */ | |
1969 | if (is_fwnode_irqchip(fwspec->fwnode)) { | |
1970 | int ret; | |
1971 | ||
1972 | ret = irq_domain_translate_twocell(d, fwspec, hwirq, type); | |
1973 | if (ret) | |
1974 | return ret; | |
1975 | WARN_ON(*type == IRQ_TYPE_NONE); | |
1976 | return 0; | |
1977 | } | |
1978 | return -EINVAL; | |
1979 | } | |
1980 | ||
1981 | static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d, | |
1982 | unsigned int irq, | |
1983 | unsigned int nr_irqs, | |
1984 | void *data) | |
1985 | { | |
1986 | struct gpio_chip *gc = d->host_data; | |
1987 | irq_hw_number_t hwirq; | |
1988 | unsigned int type = IRQ_TYPE_NONE; | |
1989 | struct irq_fwspec *fwspec = data; | |
24258761 | 1990 | void *parent_arg; |
fdd61a01 LW |
1991 | unsigned int parent_hwirq; |
1992 | unsigned int parent_type; | |
1993 | struct gpio_irq_chip *girq = &gc->irq; | |
1994 | int ret; | |
1995 | ||
1996 | /* | |
1997 | * The nr_irqs parameter is always one except for PCI multi-MSI | |
1998 | * so this should not happen. | |
1999 | */ | |
2000 | WARN_ON(nr_irqs != 1); | |
2001 | ||
2002 | ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type); | |
2003 | if (ret) | |
2004 | return ret; | |
2005 | ||
366950ee | 2006 | chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq); |
fdd61a01 LW |
2007 | |
2008 | ret = girq->child_to_parent_hwirq(gc, hwirq, type, | |
2009 | &parent_hwirq, &parent_type); | |
2010 | if (ret) { | |
2011 | chip_err(gc, "can't look up hwirq %lu\n", hwirq); | |
2012 | return ret; | |
2013 | } | |
366950ee | 2014 | chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq); |
fdd61a01 LW |
2015 | |
2016 | /* | |
2017 | * We set handle_bad_irq because the .set_type() should | |
2018 | * always be invoked and set the right type of handler. | |
2019 | */ | |
2020 | irq_domain_set_info(d, | |
2021 | irq, | |
2022 | hwirq, | |
2023 | gc->irq.chip, | |
2024 | gc, | |
2025 | girq->handler, | |
2026 | NULL, NULL); | |
2027 | irq_set_probe(irq); | |
2028 | ||
fdd61a01 | 2029 | /* This parent only handles asserted level IRQs */ |
24258761 KH |
2030 | parent_arg = girq->populate_parent_alloc_arg(gc, parent_hwirq, parent_type); |
2031 | if (!parent_arg) | |
2032 | return -ENOMEM; | |
2033 | ||
366950ee | 2034 | chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n", |
fdd61a01 | 2035 | irq, parent_hwirq); |
c34f6dc8 | 2036 | irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key); |
24258761 | 2037 | ret = irq_domain_alloc_irqs_parent(d, irq, 1, parent_arg); |
880b7cf2 KH |
2038 | /* |
2039 | * If the parent irqdomain is msi, the interrupts have already | |
2040 | * been allocated, so the EEXIST is good. | |
2041 | */ | |
2042 | if (irq_domain_is_msi(d->parent) && (ret == -EEXIST)) | |
2043 | ret = 0; | |
fdd61a01 LW |
2044 | if (ret) |
2045 | chip_err(gc, | |
2046 | "failed to allocate parent hwirq %d for hwirq %lu\n", | |
2047 | parent_hwirq, hwirq); | |
2048 | ||
24258761 | 2049 | kfree(parent_arg); |
fdd61a01 LW |
2050 | return ret; |
2051 | } | |
2052 | ||
2053 | static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *chip, | |
2054 | unsigned int offset) | |
2055 | { | |
2056 | return offset; | |
2057 | } | |
2058 | ||
2059 | static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops) | |
2060 | { | |
2061 | ops->activate = gpiochip_irq_domain_activate; | |
2062 | ops->deactivate = gpiochip_irq_domain_deactivate; | |
2063 | ops->alloc = gpiochip_hierarchy_irq_domain_alloc; | |
2064 | ops->free = irq_domain_free_irqs_common; | |
2065 | ||
2066 | /* | |
2067 | * We only allow overriding the translate() function for | |
2068 | * hierarchical chips, and this should only be done if the user | |
2069 | * really need something other than 1:1 translation. | |
2070 | */ | |
2071 | if (!ops->translate) | |
2072 | ops->translate = gpiochip_hierarchy_irq_domain_translate; | |
2073 | } | |
2074 | ||
2075 | static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc) | |
2076 | { | |
2077 | if (!gc->irq.child_to_parent_hwirq || | |
2078 | !gc->irq.fwnode) { | |
2079 | chip_err(gc, "missing irqdomain vital data\n"); | |
2080 | return -EINVAL; | |
2081 | } | |
2082 | ||
2083 | if (!gc->irq.child_offset_to_irq) | |
2084 | gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop; | |
2085 | ||
24258761 KH |
2086 | if (!gc->irq.populate_parent_alloc_arg) |
2087 | gc->irq.populate_parent_alloc_arg = | |
fdd61a01 LW |
2088 | gpiochip_populate_parent_fwspec_twocell; |
2089 | ||
2090 | gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops); | |
2091 | ||
2092 | gc->irq.domain = irq_domain_create_hierarchy( | |
2093 | gc->irq.parent_domain, | |
2094 | 0, | |
2095 | gc->ngpio, | |
2096 | gc->irq.fwnode, | |
2097 | &gc->irq.child_irq_domain_ops, | |
2098 | gc); | |
2099 | ||
2100 | if (!gc->irq.domain) | |
2101 | return -ENOMEM; | |
2102 | ||
2103 | gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip); | |
2104 | ||
2105 | return 0; | |
2106 | } | |
2107 | ||
2108 | static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc) | |
2109 | { | |
2110 | return !!gc->irq.parent_domain; | |
2111 | } | |
2112 | ||
24258761 | 2113 | void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *chip, |
fdd61a01 LW |
2114 | unsigned int parent_hwirq, |
2115 | unsigned int parent_type) | |
2116 | { | |
24258761 KH |
2117 | struct irq_fwspec *fwspec; |
2118 | ||
2119 | fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL); | |
2120 | if (!fwspec) | |
2121 | return NULL; | |
2122 | ||
2123 | fwspec->fwnode = chip->irq.parent_domain->fwnode; | |
fdd61a01 LW |
2124 | fwspec->param_count = 2; |
2125 | fwspec->param[0] = parent_hwirq; | |
2126 | fwspec->param[1] = parent_type; | |
24258761 KH |
2127 | |
2128 | return fwspec; | |
fdd61a01 LW |
2129 | } |
2130 | EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell); | |
2131 | ||
24258761 | 2132 | void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *chip, |
fdd61a01 LW |
2133 | unsigned int parent_hwirq, |
2134 | unsigned int parent_type) | |
2135 | { | |
24258761 KH |
2136 | struct irq_fwspec *fwspec; |
2137 | ||
2138 | fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL); | |
2139 | if (!fwspec) | |
2140 | return NULL; | |
2141 | ||
2142 | fwspec->fwnode = chip->irq.parent_domain->fwnode; | |
fdd61a01 LW |
2143 | fwspec->param_count = 4; |
2144 | fwspec->param[0] = 0; | |
2145 | fwspec->param[1] = parent_hwirq; | |
2146 | fwspec->param[2] = 0; | |
2147 | fwspec->param[3] = parent_type; | |
24258761 KH |
2148 | |
2149 | return fwspec; | |
fdd61a01 LW |
2150 | } |
2151 | EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell); | |
2152 | ||
2153 | #else | |
2154 | ||
2155 | static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc) | |
2156 | { | |
2157 | return -EINVAL; | |
2158 | } | |
2159 | ||
2160 | static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc) | |
2161 | { | |
2162 | return false; | |
2163 | } | |
2164 | ||
2165 | #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ | |
2166 | ||
14250520 LW |
2167 | /** |
2168 | * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip | |
2169 | * @d: the irqdomain used by this irqchip | |
2170 | * @irq: the global irq number used by this GPIO irqchip irq | |
2171 | * @hwirq: the local IRQ/GPIO line offset on this gpiochip | |
2172 | * | |
2173 | * This function will set up the mapping for a certain IRQ line on a | |
2174 | * gpiochip by assigning the gpiochip as chip data, and using the irqchip | |
2175 | * stored inside the gpiochip. | |
2176 | */ | |
1b95b4eb TR |
2177 | int gpiochip_irq_map(struct irq_domain *d, unsigned int irq, |
2178 | irq_hw_number_t hwirq) | |
14250520 LW |
2179 | { |
2180 | struct gpio_chip *chip = d->host_data; | |
d377f56f | 2181 | int ret = 0; |
14250520 | 2182 | |
dc749a09 GS |
2183 | if (!gpiochip_irqchip_irq_valid(chip, hwirq)) |
2184 | return -ENXIO; | |
2185 | ||
14250520 | 2186 | irq_set_chip_data(irq, chip); |
a0a8bcf4 GS |
2187 | /* |
2188 | * This lock class tells lockdep that GPIO irqs are in a different | |
2189 | * category than their parents, so it won't report false recursion. | |
2190 | */ | |
39c3fd58 | 2191 | irq_set_lockdep_class(irq, chip->irq.lock_key, chip->irq.request_key); |
c7a0aa59 | 2192 | irq_set_chip_and_handler(irq, chip->irq.chip, chip->irq.handler); |
d245b3f9 | 2193 | /* Chips that use nested thread handlers have them marked */ |
60ed54ca | 2194 | if (chip->irq.threaded) |
1c8732bb | 2195 | irq_set_nested_thread(irq, 1); |
14250520 | 2196 | irq_set_noprobe(irq); |
23393d49 | 2197 | |
e0d89728 | 2198 | if (chip->irq.num_parents == 1) |
d377f56f | 2199 | ret = irq_set_parent(irq, chip->irq.parents[0]); |
e0d89728 | 2200 | else if (chip->irq.map) |
d377f56f | 2201 | ret = irq_set_parent(irq, chip->irq.map[hwirq]); |
e0d89728 | 2202 | |
d377f56f LW |
2203 | if (ret < 0) |
2204 | return ret; | |
e0d89728 | 2205 | |
1333b90f LW |
2206 | /* |
2207 | * No set-up of the hardware will happen if IRQ_TYPE_NONE | |
2208 | * is passed as default type. | |
2209 | */ | |
3634eeb0 TR |
2210 | if (chip->irq.default_type != IRQ_TYPE_NONE) |
2211 | irq_set_irq_type(irq, chip->irq.default_type); | |
14250520 LW |
2212 | |
2213 | return 0; | |
2214 | } | |
1b95b4eb | 2215 | EXPORT_SYMBOL_GPL(gpiochip_irq_map); |
14250520 | 2216 | |
1b95b4eb | 2217 | void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq) |
c3626fde | 2218 | { |
1c8732bb LW |
2219 | struct gpio_chip *chip = d->host_data; |
2220 | ||
60ed54ca | 2221 | if (chip->irq.threaded) |
1c8732bb | 2222 | irq_set_nested_thread(irq, 0); |
c3626fde LW |
2223 | irq_set_chip_and_handler(irq, NULL, NULL); |
2224 | irq_set_chip_data(irq, NULL); | |
2225 | } | |
1b95b4eb | 2226 | EXPORT_SYMBOL_GPL(gpiochip_irq_unmap); |
c3626fde | 2227 | |
14250520 LW |
2228 | static const struct irq_domain_ops gpiochip_domain_ops = { |
2229 | .map = gpiochip_irq_map, | |
c3626fde | 2230 | .unmap = gpiochip_irq_unmap, |
14250520 LW |
2231 | /* Virtually all GPIO irqchips are twocell:ed */ |
2232 | .xlate = irq_domain_xlate_twocell, | |
2233 | }; | |
2234 | ||
fdd61a01 LW |
2235 | /* |
2236 | * TODO: move these activate/deactivate in under the hierarchicial | |
2237 | * irqchip implementation as static once SPMI and SSBI (all external | |
2238 | * users) are phased over. | |
2239 | */ | |
ef74f70e BM |
2240 | /** |
2241 | * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ | |
2242 | * @domain: The IRQ domain used by this IRQ chip | |
2243 | * @data: Outermost irq_data associated with the IRQ | |
2244 | * @reserve: If set, only reserve an interrupt vector instead of assigning one | |
2245 | * | |
2246 | * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be | |
2247 | * used as the activate function for the &struct irq_domain_ops. The host_data | |
2248 | * for the IRQ domain must be the &struct gpio_chip. | |
2249 | */ | |
2250 | int gpiochip_irq_domain_activate(struct irq_domain *domain, | |
2251 | struct irq_data *data, bool reserve) | |
2252 | { | |
2253 | struct gpio_chip *chip = domain->host_data; | |
2254 | ||
2255 | return gpiochip_lock_as_irq(chip, data->hwirq); | |
2256 | } | |
2257 | EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate); | |
2258 | ||
2259 | /** | |
2260 | * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ | |
2261 | * @domain: The IRQ domain used by this IRQ chip | |
2262 | * @data: Outermost irq_data associated with the IRQ | |
2263 | * | |
2264 | * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to | |
2265 | * be used as the deactivate function for the &struct irq_domain_ops. The | |
2266 | * host_data for the IRQ domain must be the &struct gpio_chip. | |
2267 | */ | |
2268 | void gpiochip_irq_domain_deactivate(struct irq_domain *domain, | |
2269 | struct irq_data *data) | |
2270 | { | |
2271 | struct gpio_chip *chip = domain->host_data; | |
2272 | ||
2273 | return gpiochip_unlock_as_irq(chip, data->hwirq); | |
2274 | } | |
2275 | EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate); | |
2276 | ||
4e6b8238 | 2277 | static int gpiochip_to_irq(struct gpio_chip *chip, unsigned offset) |
14250520 | 2278 | { |
fdd61a01 LW |
2279 | struct irq_domain *domain = chip->irq.domain; |
2280 | ||
4e6b8238 HV |
2281 | if (!gpiochip_irqchip_irq_valid(chip, offset)) |
2282 | return -ENXIO; | |
5b76e79c | 2283 | |
fdd61a01 LW |
2284 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
2285 | if (irq_domain_is_hierarchy(domain)) { | |
2286 | struct irq_fwspec spec; | |
2287 | ||
2288 | spec.fwnode = domain->fwnode; | |
2289 | spec.param_count = 2; | |
2290 | spec.param[0] = chip->irq.child_offset_to_irq(chip, offset); | |
2291 | spec.param[1] = IRQ_TYPE_NONE; | |
2292 | ||
2293 | return irq_create_fwspec_mapping(&spec); | |
2294 | } | |
2295 | #endif | |
2296 | ||
2297 | return irq_create_mapping(domain, offset); | |
14250520 LW |
2298 | } |
2299 | ||
14250520 LW |
2300 | static int gpiochip_irq_reqres(struct irq_data *d) |
2301 | { | |
2302 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); | |
5b76e79c | 2303 | |
4e6b8238 | 2304 | return gpiochip_reqres_irq(chip, d->hwirq); |
14250520 LW |
2305 | } |
2306 | ||
2307 | static void gpiochip_irq_relres(struct irq_data *d) | |
2308 | { | |
2309 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); | |
2310 | ||
4e6b8238 | 2311 | gpiochip_relres_irq(chip, d->hwirq); |
14250520 LW |
2312 | } |
2313 | ||
461c1a7d | 2314 | static void gpiochip_irq_enable(struct irq_data *d) |
14250520 | 2315 | { |
461c1a7d | 2316 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); |
e0d89728 | 2317 | |
461c1a7d HV |
2318 | gpiochip_enable_irq(chip, d->hwirq); |
2319 | if (chip->irq.irq_enable) | |
2320 | chip->irq.irq_enable(d); | |
2321 | else | |
2322 | chip->irq.chip->irq_unmask(d); | |
2323 | } | |
2324 | ||
2325 | static void gpiochip_irq_disable(struct irq_data *d) | |
2326 | { | |
2327 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); | |
2328 | ||
2329 | if (chip->irq.irq_disable) | |
2330 | chip->irq.irq_disable(d); | |
2331 | else | |
2332 | chip->irq.chip->irq_mask(d); | |
2333 | gpiochip_disable_irq(chip, d->hwirq); | |
2334 | } | |
2335 | ||
ca620f2d HV |
2336 | static void gpiochip_set_irq_hooks(struct gpio_chip *gpiochip) |
2337 | { | |
2338 | struct irq_chip *irqchip = gpiochip->irq.chip; | |
2339 | ||
2340 | if (!irqchip->irq_request_resources && | |
2341 | !irqchip->irq_release_resources) { | |
2342 | irqchip->irq_request_resources = gpiochip_irq_reqres; | |
2343 | irqchip->irq_release_resources = gpiochip_irq_relres; | |
2344 | } | |
461c1a7d HV |
2345 | if (WARN_ON(gpiochip->irq.irq_enable)) |
2346 | return; | |
171948ea HV |
2347 | /* Check if the irqchip already has this hook... */ |
2348 | if (irqchip->irq_enable == gpiochip_irq_enable) { | |
2349 | /* | |
2350 | * ...and if so, give a gentle warning that this is bad | |
2351 | * practice. | |
2352 | */ | |
2353 | chip_info(gpiochip, | |
2354 | "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n"); | |
2355 | return; | |
2356 | } | |
461c1a7d HV |
2357 | gpiochip->irq.irq_enable = irqchip->irq_enable; |
2358 | gpiochip->irq.irq_disable = irqchip->irq_disable; | |
2359 | irqchip->irq_enable = gpiochip_irq_enable; | |
2360 | irqchip->irq_disable = gpiochip_irq_disable; | |
14250520 LW |
2361 | } |
2362 | ||
e0d89728 TR |
2363 | /** |
2364 | * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip | |
2365 | * @gpiochip: the GPIO chip to add the IRQ chip to | |
39c3fd58 AL |
2366 | * @lock_key: lockdep class for IRQ lock |
2367 | * @request_key: lockdep class for IRQ request | |
e0d89728 | 2368 | */ |
959bc7b2 | 2369 | static int gpiochip_add_irqchip(struct gpio_chip *gpiochip, |
39c3fd58 AL |
2370 | struct lock_class_key *lock_key, |
2371 | struct lock_class_key *request_key) | |
e0d89728 TR |
2372 | { |
2373 | struct irq_chip *irqchip = gpiochip->irq.chip; | |
fdd61a01 | 2374 | const struct irq_domain_ops *ops = NULL; |
e0d89728 TR |
2375 | struct device_node *np; |
2376 | unsigned int type; | |
2377 | unsigned int i; | |
2378 | ||
2379 | if (!irqchip) | |
2380 | return 0; | |
2381 | ||
2382 | if (gpiochip->irq.parent_handler && gpiochip->can_sleep) { | |
b1911710 | 2383 | chip_err(gpiochip, "you cannot have chained interrupts on a chip that may sleep\n"); |
e0d89728 TR |
2384 | return -EINVAL; |
2385 | } | |
2386 | ||
2387 | np = gpiochip->gpiodev->dev.of_node; | |
2388 | type = gpiochip->irq.default_type; | |
2389 | ||
2390 | /* | |
2391 | * Specifying a default trigger is a terrible idea if DT or ACPI is | |
2392 | * used to configure the interrupts, as you may end up with | |
2393 | * conflicting triggers. Tell the user, and reset to NONE. | |
2394 | */ | |
2395 | if (WARN(np && type != IRQ_TYPE_NONE, | |
2396 | "%s: Ignoring %u default trigger\n", np->full_name, type)) | |
2397 | type = IRQ_TYPE_NONE; | |
2398 | ||
2399 | if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) { | |
2400 | acpi_handle_warn(ACPI_HANDLE(gpiochip->parent), | |
2401 | "Ignoring %u default trigger\n", type); | |
2402 | type = IRQ_TYPE_NONE; | |
2403 | } | |
2404 | ||
2405 | gpiochip->to_irq = gpiochip_to_irq; | |
2406 | gpiochip->irq.default_type = type; | |
959bc7b2 | 2407 | gpiochip->irq.lock_key = lock_key; |
39c3fd58 | 2408 | gpiochip->irq.request_key = request_key; |
e0d89728 | 2409 | |
fdd61a01 LW |
2410 | /* If a parent irqdomain is provided, let's build a hierarchy */ |
2411 | if (gpiochip_hierarchy_is_hierarchical(gpiochip)) { | |
2412 | int ret = gpiochip_hierarchy_add_domain(gpiochip); | |
2413 | if (ret) | |
2414 | return ret; | |
2415 | } else { | |
2416 | /* Some drivers provide custom irqdomain ops */ | |
2417 | if (gpiochip->irq.domain_ops) | |
2418 | ops = gpiochip->irq.domain_ops; | |
2419 | ||
2420 | if (!ops) | |
2421 | ops = &gpiochip_domain_ops; | |
2422 | gpiochip->irq.domain = irq_domain_add_simple(np, | |
2423 | gpiochip->ngpio, | |
2424 | gpiochip->irq.first, | |
2425 | ops, gpiochip); | |
2426 | if (!gpiochip->irq.domain) | |
2427 | return -EINVAL; | |
2428 | } | |
e0d89728 | 2429 | |
e0d89728 TR |
2430 | if (gpiochip->irq.parent_handler) { |
2431 | void *data = gpiochip->irq.parent_handler_data ?: gpiochip; | |
2432 | ||
2433 | for (i = 0; i < gpiochip->irq.num_parents; i++) { | |
2434 | /* | |
2435 | * The parent IRQ chip is already using the chip_data | |
2436 | * for this IRQ chip, so our callbacks simply use the | |
2437 | * handler_data. | |
2438 | */ | |
2439 | irq_set_chained_handler_and_data(gpiochip->irq.parents[i], | |
2440 | gpiochip->irq.parent_handler, | |
2441 | data); | |
2442 | } | |
e0d89728 TR |
2443 | } |
2444 | ||
ca620f2d HV |
2445 | gpiochip_set_irq_hooks(gpiochip); |
2446 | ||
e0d89728 TR |
2447 | acpi_gpiochip_request_interrupts(gpiochip); |
2448 | ||
2449 | return 0; | |
2450 | } | |
2451 | ||
14250520 LW |
2452 | /** |
2453 | * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip | |
2454 | * @gpiochip: the gpiochip to remove the irqchip from | |
2455 | * | |
2456 | * This is called only from gpiochip_remove() | |
2457 | */ | |
2458 | static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip) | |
2459 | { | |
ca620f2d | 2460 | struct irq_chip *irqchip = gpiochip->irq.chip; |
39e5f096 | 2461 | unsigned int offset; |
c3626fde | 2462 | |
afa82fab MW |
2463 | acpi_gpiochip_free_interrupts(gpiochip); |
2464 | ||
ca620f2d | 2465 | if (irqchip && gpiochip->irq.parent_handler) { |
39e5f096 TR |
2466 | struct gpio_irq_chip *irq = &gpiochip->irq; |
2467 | unsigned int i; | |
2468 | ||
2469 | for (i = 0; i < irq->num_parents; i++) | |
2470 | irq_set_chained_handler_and_data(irq->parents[i], | |
2471 | NULL, NULL); | |
25e4fe92 DES |
2472 | } |
2473 | ||
c3626fde | 2474 | /* Remove all IRQ mappings and delete the domain */ |
f0fbe7bc | 2475 | if (gpiochip->irq.domain) { |
39e5f096 TR |
2476 | unsigned int irq; |
2477 | ||
79b804cb MW |
2478 | for (offset = 0; offset < gpiochip->ngpio; offset++) { |
2479 | if (!gpiochip_irqchip_irq_valid(gpiochip, offset)) | |
2480 | continue; | |
f0fbe7bc TR |
2481 | |
2482 | irq = irq_find_mapping(gpiochip->irq.domain, offset); | |
2483 | irq_dispose_mapping(irq); | |
79b804cb | 2484 | } |
f0fbe7bc TR |
2485 | |
2486 | irq_domain_remove(gpiochip->irq.domain); | |
c3626fde | 2487 | } |
14250520 | 2488 | |
461c1a7d HV |
2489 | if (irqchip) { |
2490 | if (irqchip->irq_request_resources == gpiochip_irq_reqres) { | |
2491 | irqchip->irq_request_resources = NULL; | |
2492 | irqchip->irq_release_resources = NULL; | |
2493 | } | |
2494 | if (irqchip->irq_enable == gpiochip_irq_enable) { | |
2495 | irqchip->irq_enable = gpiochip->irq.irq_enable; | |
2496 | irqchip->irq_disable = gpiochip->irq.irq_disable; | |
2497 | } | |
14250520 | 2498 | } |
461c1a7d HV |
2499 | gpiochip->irq.irq_enable = NULL; |
2500 | gpiochip->irq.irq_disable = NULL; | |
ca620f2d | 2501 | gpiochip->irq.chip = NULL; |
79b804cb MW |
2502 | |
2503 | gpiochip_irqchip_free_valid_mask(gpiochip); | |
14250520 LW |
2504 | } |
2505 | ||
2506 | /** | |
739e6f59 | 2507 | * gpiochip_irqchip_add_key() - adds an irqchip to a gpiochip |
14250520 LW |
2508 | * @gpiochip: the gpiochip to add the irqchip to |
2509 | * @irqchip: the irqchip to add to the gpiochip | |
2510 | * @first_irq: if not dynamically assigned, the base (first) IRQ to | |
2511 | * allocate gpiochip irqs from | |
2512 | * @handler: the irq handler to use (often a predefined irq core function) | |
1333b90f LW |
2513 | * @type: the default type for IRQs on this irqchip, pass IRQ_TYPE_NONE |
2514 | * to have the core avoid setting up any default type in the hardware. | |
60ed54ca | 2515 | * @threaded: whether this irqchip uses a nested thread handler |
39c3fd58 AL |
2516 | * @lock_key: lockdep class for IRQ lock |
2517 | * @request_key: lockdep class for IRQ request | |
14250520 LW |
2518 | * |
2519 | * This function closely associates a certain irqchip with a certain | |
2520 | * gpiochip, providing an irq domain to translate the local IRQs to | |
2521 | * global irqs in the gpiolib core, and making sure that the gpiochip | |
2522 | * is passed as chip data to all related functions. Driver callbacks | |
09dd5f9e | 2523 | * need to use gpiochip_get_data() to get their local state containers back |
14250520 LW |
2524 | * from the gpiochip passed as chip data. An irqdomain will be stored |
2525 | * in the gpiochip that shall be used by the driver to handle IRQ number | |
2526 | * translation. The gpiochip will need to be initialized and registered | |
2527 | * before calling this function. | |
2528 | * | |
c3626fde LW |
2529 | * This function will handle two cell:ed simple IRQs and assumes all |
2530 | * the pins on the gpiochip can generate a unique IRQ. Everything else | |
14250520 LW |
2531 | * need to be open coded. |
2532 | */ | |
739e6f59 LW |
2533 | int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip, |
2534 | struct irq_chip *irqchip, | |
2535 | unsigned int first_irq, | |
2536 | irq_flow_handler_t handler, | |
2537 | unsigned int type, | |
60ed54ca | 2538 | bool threaded, |
39c3fd58 AL |
2539 | struct lock_class_key *lock_key, |
2540 | struct lock_class_key *request_key) | |
14250520 LW |
2541 | { |
2542 | struct device_node *of_node; | |
14250520 LW |
2543 | |
2544 | if (!gpiochip || !irqchip) | |
2545 | return -EINVAL; | |
2546 | ||
58383c78 | 2547 | if (!gpiochip->parent) { |
14250520 LW |
2548 | pr_err("missing gpiochip .dev parent pointer\n"); |
2549 | return -EINVAL; | |
2550 | } | |
60ed54ca | 2551 | gpiochip->irq.threaded = threaded; |
58383c78 | 2552 | of_node = gpiochip->parent->of_node; |
14250520 LW |
2553 | #ifdef CONFIG_OF_GPIO |
2554 | /* | |
20a8a968 | 2555 | * If the gpiochip has an assigned OF node this takes precedence |
c88402c2 BJZ |
2556 | * FIXME: get rid of this and use gpiochip->parent->of_node |
2557 | * everywhere | |
14250520 LW |
2558 | */ |
2559 | if (gpiochip->of_node) | |
2560 | of_node = gpiochip->of_node; | |
2561 | #endif | |
332e99d5 | 2562 | /* |
0a1e0053 | 2563 | * Specifying a default trigger is a terrible idea if DT or ACPI is |
332e99d5 MZ |
2564 | * used to configure the interrupts, as you may end-up with |
2565 | * conflicting triggers. Tell the user, and reset to NONE. | |
2566 | */ | |
2567 | if (WARN(of_node && type != IRQ_TYPE_NONE, | |
7eb6ce2f | 2568 | "%pOF: Ignoring %d default trigger\n", of_node, type)) |
332e99d5 | 2569 | type = IRQ_TYPE_NONE; |
0a1e0053 MW |
2570 | if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) { |
2571 | acpi_handle_warn(ACPI_HANDLE(gpiochip->parent), | |
2572 | "Ignoring %d default trigger\n", type); | |
2573 | type = IRQ_TYPE_NONE; | |
2574 | } | |
332e99d5 | 2575 | |
da80ff81 | 2576 | gpiochip->irq.chip = irqchip; |
c7a0aa59 | 2577 | gpiochip->irq.handler = handler; |
3634eeb0 | 2578 | gpiochip->irq.default_type = type; |
14250520 | 2579 | gpiochip->to_irq = gpiochip_to_irq; |
ca9df053 | 2580 | gpiochip->irq.lock_key = lock_key; |
39c3fd58 | 2581 | gpiochip->irq.request_key = request_key; |
f0fbe7bc | 2582 | gpiochip->irq.domain = irq_domain_add_simple(of_node, |
14250520 LW |
2583 | gpiochip->ngpio, first_irq, |
2584 | &gpiochip_domain_ops, gpiochip); | |
f0fbe7bc | 2585 | if (!gpiochip->irq.domain) { |
da80ff81 | 2586 | gpiochip->irq.chip = NULL; |
14250520 LW |
2587 | return -EINVAL; |
2588 | } | |
8b67a1f0 | 2589 | |
ca620f2d | 2590 | gpiochip_set_irq_hooks(gpiochip); |
14250520 | 2591 | |
afa82fab MW |
2592 | acpi_gpiochip_request_interrupts(gpiochip); |
2593 | ||
14250520 LW |
2594 | return 0; |
2595 | } | |
739e6f59 | 2596 | EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_key); |
14250520 LW |
2597 | |
2598 | #else /* CONFIG_GPIOLIB_IRQCHIP */ | |
2599 | ||
959bc7b2 | 2600 | static inline int gpiochip_add_irqchip(struct gpio_chip *gpiochip, |
39c3fd58 AL |
2601 | struct lock_class_key *lock_key, |
2602 | struct lock_class_key *request_key) | |
e0d89728 TR |
2603 | { |
2604 | return 0; | |
2605 | } | |
14250520 | 2606 | static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip) {} |
9411e3aa AS |
2607 | |
2608 | static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gpiochip) | |
2609 | { | |
2610 | return 0; | |
2611 | } | |
2612 | ||
79b804cb MW |
2613 | static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip) |
2614 | { | |
2615 | return 0; | |
2616 | } | |
2617 | static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip) | |
2618 | { } | |
14250520 LW |
2619 | |
2620 | #endif /* CONFIG_GPIOLIB_IRQCHIP */ | |
2621 | ||
c771c2f4 JG |
2622 | /** |
2623 | * gpiochip_generic_request() - request the gpio function for a pin | |
2624 | * @chip: the gpiochip owning the GPIO | |
2625 | * @offset: the offset of the GPIO to request for GPIO function | |
2626 | */ | |
2627 | int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset) | |
2628 | { | |
a9a1d2a7 | 2629 | return pinctrl_gpio_request(chip->gpiodev->base + offset); |
c771c2f4 JG |
2630 | } |
2631 | EXPORT_SYMBOL_GPL(gpiochip_generic_request); | |
2632 | ||
2633 | /** | |
2634 | * gpiochip_generic_free() - free the gpio function from a pin | |
2635 | * @chip: the gpiochip to request the gpio function for | |
2636 | * @offset: the offset of the GPIO to free from GPIO function | |
2637 | */ | |
2638 | void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset) | |
2639 | { | |
a9a1d2a7 | 2640 | pinctrl_gpio_free(chip->gpiodev->base + offset); |
c771c2f4 JG |
2641 | } |
2642 | EXPORT_SYMBOL_GPL(gpiochip_generic_free); | |
2643 | ||
2956b5d9 MW |
2644 | /** |
2645 | * gpiochip_generic_config() - apply configuration for a pin | |
2646 | * @chip: the gpiochip owning the GPIO | |
2647 | * @offset: the offset of the GPIO to apply the configuration | |
2648 | * @config: the configuration to be applied | |
2649 | */ | |
2650 | int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset, | |
2651 | unsigned long config) | |
2652 | { | |
2653 | return pinctrl_gpio_set_config(chip->gpiodev->base + offset, config); | |
2654 | } | |
2655 | EXPORT_SYMBOL_GPL(gpiochip_generic_config); | |
2656 | ||
f23f1516 | 2657 | #ifdef CONFIG_PINCTRL |
165adc9c | 2658 | |
586a87e6 CR |
2659 | /** |
2660 | * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping | |
2661 | * @chip: the gpiochip to add the range for | |
d32651f6 | 2662 | * @pctldev: the pin controller to map to |
586a87e6 CR |
2663 | * @gpio_offset: the start offset in the current gpio_chip number space |
2664 | * @pin_group: name of the pin group inside the pin controller | |
973c1714 CL |
2665 | * |
2666 | * Calling this function directly from a DeviceTree-supported | |
2667 | * pinctrl driver is DEPRECATED. Please see Section 2.1 of | |
2668 | * Documentation/devicetree/bindings/gpio/gpio.txt on how to | |
2669 | * bind pinctrl and gpio drivers via the "gpio-ranges" property. | |
586a87e6 CR |
2670 | */ |
2671 | int gpiochip_add_pingroup_range(struct gpio_chip *chip, | |
2672 | struct pinctrl_dev *pctldev, | |
2673 | unsigned int gpio_offset, const char *pin_group) | |
2674 | { | |
2675 | struct gpio_pin_range *pin_range; | |
fdeb8e15 | 2676 | struct gpio_device *gdev = chip->gpiodev; |
586a87e6 CR |
2677 | int ret; |
2678 | ||
2679 | pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL); | |
2680 | if (!pin_range) { | |
1a2a99c6 | 2681 | chip_err(chip, "failed to allocate pin ranges\n"); |
586a87e6 CR |
2682 | return -ENOMEM; |
2683 | } | |
2684 | ||
2685 | /* Use local offset as range ID */ | |
2686 | pin_range->range.id = gpio_offset; | |
2687 | pin_range->range.gc = chip; | |
2688 | pin_range->range.name = chip->label; | |
fdeb8e15 | 2689 | pin_range->range.base = gdev->base + gpio_offset; |
586a87e6 CR |
2690 | pin_range->pctldev = pctldev; |
2691 | ||
2692 | ret = pinctrl_get_group_pins(pctldev, pin_group, | |
2693 | &pin_range->range.pins, | |
2694 | &pin_range->range.npins); | |
61c6375d MN |
2695 | if (ret < 0) { |
2696 | kfree(pin_range); | |
586a87e6 | 2697 | return ret; |
61c6375d | 2698 | } |
586a87e6 CR |
2699 | |
2700 | pinctrl_add_gpio_range(pctldev, &pin_range->range); | |
2701 | ||
1a2a99c6 AS |
2702 | chip_dbg(chip, "created GPIO range %d->%d ==> %s PINGRP %s\n", |
2703 | gpio_offset, gpio_offset + pin_range->range.npins - 1, | |
586a87e6 CR |
2704 | pinctrl_dev_get_devname(pctldev), pin_group); |
2705 | ||
20ec3e39 | 2706 | list_add_tail(&pin_range->node, &gdev->pin_ranges); |
586a87e6 CR |
2707 | |
2708 | return 0; | |
2709 | } | |
2710 | EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range); | |
2711 | ||
3f0f8670 LW |
2712 | /** |
2713 | * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping | |
2714 | * @chip: the gpiochip to add the range for | |
950d55f5 | 2715 | * @pinctl_name: the dev_name() of the pin controller to map to |
316511c0 LW |
2716 | * @gpio_offset: the start offset in the current gpio_chip number space |
2717 | * @pin_offset: the start offset in the pin controller number space | |
3f0f8670 LW |
2718 | * @npins: the number of pins from the offset of each pin space (GPIO and |
2719 | * pin controller) to accumulate in this range | |
950d55f5 TR |
2720 | * |
2721 | * Returns: | |
2722 | * 0 on success, or a negative error-code on failure. | |
973c1714 CL |
2723 | * |
2724 | * Calling this function directly from a DeviceTree-supported | |
2725 | * pinctrl driver is DEPRECATED. Please see Section 2.1 of | |
2726 | * Documentation/devicetree/bindings/gpio/gpio.txt on how to | |
2727 | * bind pinctrl and gpio drivers via the "gpio-ranges" property. | |
3f0f8670 | 2728 | */ |
1e63d7b9 | 2729 | int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, |
316511c0 | 2730 | unsigned int gpio_offset, unsigned int pin_offset, |
3f0f8670 | 2731 | unsigned int npins) |
f23f1516 SH |
2732 | { |
2733 | struct gpio_pin_range *pin_range; | |
fdeb8e15 | 2734 | struct gpio_device *gdev = chip->gpiodev; |
b4d4b1f0 | 2735 | int ret; |
f23f1516 | 2736 | |
3f0f8670 | 2737 | pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL); |
f23f1516 | 2738 | if (!pin_range) { |
1a2a99c6 | 2739 | chip_err(chip, "failed to allocate pin ranges\n"); |
1e63d7b9 | 2740 | return -ENOMEM; |
f23f1516 SH |
2741 | } |
2742 | ||
3f0f8670 | 2743 | /* Use local offset as range ID */ |
316511c0 | 2744 | pin_range->range.id = gpio_offset; |
3f0f8670 | 2745 | pin_range->range.gc = chip; |
f23f1516 | 2746 | pin_range->range.name = chip->label; |
fdeb8e15 | 2747 | pin_range->range.base = gdev->base + gpio_offset; |
316511c0 | 2748 | pin_range->range.pin_base = pin_offset; |
f23f1516 | 2749 | pin_range->range.npins = npins; |
192c369c | 2750 | pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name, |
f23f1516 | 2751 | &pin_range->range); |
8f23ca1a | 2752 | if (IS_ERR(pin_range->pctldev)) { |
b4d4b1f0 | 2753 | ret = PTR_ERR(pin_range->pctldev); |
1a2a99c6 | 2754 | chip_err(chip, "could not create pin range\n"); |
3f0f8670 | 2755 | kfree(pin_range); |
b4d4b1f0 | 2756 | return ret; |
3f0f8670 | 2757 | } |
1a2a99c6 AS |
2758 | chip_dbg(chip, "created GPIO range %d->%d ==> %s PIN %d->%d\n", |
2759 | gpio_offset, gpio_offset + npins - 1, | |
316511c0 LW |
2760 | pinctl_name, |
2761 | pin_offset, pin_offset + npins - 1); | |
f23f1516 | 2762 | |
20ec3e39 | 2763 | list_add_tail(&pin_range->node, &gdev->pin_ranges); |
1e63d7b9 LW |
2764 | |
2765 | return 0; | |
f23f1516 | 2766 | } |
165adc9c | 2767 | EXPORT_SYMBOL_GPL(gpiochip_add_pin_range); |
f23f1516 | 2768 | |
3f0f8670 LW |
2769 | /** |
2770 | * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings | |
2771 | * @chip: the chip to remove all the mappings for | |
2772 | */ | |
f23f1516 SH |
2773 | void gpiochip_remove_pin_ranges(struct gpio_chip *chip) |
2774 | { | |
2775 | struct gpio_pin_range *pin_range, *tmp; | |
20ec3e39 | 2776 | struct gpio_device *gdev = chip->gpiodev; |
f23f1516 | 2777 | |
20ec3e39 | 2778 | list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) { |
f23f1516 SH |
2779 | list_del(&pin_range->node); |
2780 | pinctrl_remove_gpio_range(pin_range->pctldev, | |
2781 | &pin_range->range); | |
3f0f8670 | 2782 | kfree(pin_range); |
f23f1516 SH |
2783 | } |
2784 | } | |
165adc9c LW |
2785 | EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges); |
2786 | ||
2787 | #endif /* CONFIG_PINCTRL */ | |
f23f1516 | 2788 | |
d2876d08 DB |
2789 | /* These "optional" allocation calls help prevent drivers from stomping |
2790 | * on each other, and help provide better diagnostics in debugfs. | |
2791 | * They're called even less than the "set direction" calls. | |
2792 | */ | |
fac9d885 | 2793 | static int gpiod_request_commit(struct gpio_desc *desc, const char *label) |
d2876d08 | 2794 | { |
fdeb8e15 | 2795 | struct gpio_chip *chip = desc->gdev->chip; |
d377f56f | 2796 | int ret; |
d2876d08 | 2797 | unsigned long flags; |
3789f5ac | 2798 | unsigned offset; |
d2876d08 | 2799 | |
18534df4 MS |
2800 | if (label) { |
2801 | label = kstrdup_const(label, GFP_KERNEL); | |
2802 | if (!label) | |
2803 | return -ENOMEM; | |
2804 | } | |
2805 | ||
bcabdef1 AC |
2806 | spin_lock_irqsave(&gpio_lock, flags); |
2807 | ||
d2876d08 | 2808 | /* NOTE: gpio_request() can be called in early boot, |
35e8bb51 | 2809 | * before IRQs are enabled, for non-sleeping (SOC) GPIOs. |
d2876d08 DB |
2810 | */ |
2811 | ||
2812 | if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) { | |
2813 | desc_set_label(desc, label ? : "?"); | |
d377f56f | 2814 | ret = 0; |
438d8908 | 2815 | } else { |
18534df4 | 2816 | kfree_const(label); |
d377f56f | 2817 | ret = -EBUSY; |
7460db56 | 2818 | goto done; |
35e8bb51 DB |
2819 | } |
2820 | ||
2821 | if (chip->request) { | |
2822 | /* chip->request may sleep */ | |
2823 | spin_unlock_irqrestore(&gpio_lock, flags); | |
3789f5ac BD |
2824 | offset = gpio_chip_hwgpio(desc); |
2825 | if (gpiochip_line_is_valid(chip, offset)) | |
d377f56f | 2826 | ret = chip->request(chip, offset); |
3789f5ac | 2827 | else |
d377f56f | 2828 | ret = -EINVAL; |
35e8bb51 DB |
2829 | spin_lock_irqsave(&gpio_lock, flags); |
2830 | ||
d377f56f | 2831 | if (ret < 0) { |
35e8bb51 | 2832 | desc_set_label(desc, NULL); |
18534df4 | 2833 | kfree_const(label); |
35e8bb51 | 2834 | clear_bit(FLAG_REQUESTED, &desc->flags); |
80b0a602 | 2835 | goto done; |
35e8bb51 | 2836 | } |
438d8908 | 2837 | } |
80b0a602 MN |
2838 | if (chip->get_direction) { |
2839 | /* chip->get_direction may sleep */ | |
2840 | spin_unlock_irqrestore(&gpio_lock, flags); | |
372e722e | 2841 | gpiod_get_direction(desc); |
80b0a602 MN |
2842 | spin_lock_irqsave(&gpio_lock, flags); |
2843 | } | |
77c2d792 MW |
2844 | done: |
2845 | spin_unlock_irqrestore(&gpio_lock, flags); | |
d377f56f | 2846 | return ret; |
77c2d792 MW |
2847 | } |
2848 | ||
fdeb8e15 LW |
2849 | /* |
2850 | * This descriptor validation needs to be inserted verbatim into each | |
2851 | * function taking a descriptor, so we need to use a preprocessor | |
54d77198 LW |
2852 | * macro to avoid endless duplication. If the desc is NULL it is an |
2853 | * optional GPIO and calls should just bail out. | |
fdeb8e15 | 2854 | */ |
a746a232 RV |
2855 | static int validate_desc(const struct gpio_desc *desc, const char *func) |
2856 | { | |
2857 | if (!desc) | |
2858 | return 0; | |
2859 | if (IS_ERR(desc)) { | |
2860 | pr_warn("%s: invalid GPIO (errorpointer)\n", func); | |
2861 | return PTR_ERR(desc); | |
2862 | } | |
2863 | if (!desc->gdev) { | |
2864 | pr_warn("%s: invalid GPIO (no device)\n", func); | |
2865 | return -EINVAL; | |
2866 | } | |
2867 | if (!desc->gdev->chip) { | |
2868 | dev_warn(&desc->gdev->dev, | |
2869 | "%s: backing chip is gone\n", func); | |
2870 | return 0; | |
2871 | } | |
2872 | return 1; | |
2873 | } | |
2874 | ||
fdeb8e15 | 2875 | #define VALIDATE_DESC(desc) do { \ |
a746a232 RV |
2876 | int __valid = validate_desc(desc, __func__); \ |
2877 | if (__valid <= 0) \ | |
2878 | return __valid; \ | |
2879 | } while (0) | |
fdeb8e15 LW |
2880 | |
2881 | #define VALIDATE_DESC_VOID(desc) do { \ | |
a746a232 RV |
2882 | int __valid = validate_desc(desc, __func__); \ |
2883 | if (__valid <= 0) \ | |
fdeb8e15 | 2884 | return; \ |
a746a232 | 2885 | } while (0) |
fdeb8e15 | 2886 | |
0eb4c6c2 | 2887 | int gpiod_request(struct gpio_desc *desc, const char *label) |
77c2d792 | 2888 | { |
d377f56f | 2889 | int ret = -EPROBE_DEFER; |
fdeb8e15 | 2890 | struct gpio_device *gdev; |
77c2d792 | 2891 | |
fdeb8e15 LW |
2892 | VALIDATE_DESC(desc); |
2893 | gdev = desc->gdev; | |
77c2d792 | 2894 | |
fdeb8e15 | 2895 | if (try_module_get(gdev->owner)) { |
d377f56f LW |
2896 | ret = gpiod_request_commit(desc, label); |
2897 | if (ret < 0) | |
fdeb8e15 | 2898 | module_put(gdev->owner); |
33a68e86 LW |
2899 | else |
2900 | get_device(&gdev->dev); | |
77c2d792 MW |
2901 | } |
2902 | ||
d377f56f LW |
2903 | if (ret) |
2904 | gpiod_dbg(desc, "%s: status %d\n", __func__, ret); | |
77c2d792 | 2905 | |
d377f56f | 2906 | return ret; |
d2876d08 | 2907 | } |
372e722e | 2908 | |
fac9d885 | 2909 | static bool gpiod_free_commit(struct gpio_desc *desc) |
d2876d08 | 2910 | { |
77c2d792 | 2911 | bool ret = false; |
d2876d08 | 2912 | unsigned long flags; |
35e8bb51 | 2913 | struct gpio_chip *chip; |
d2876d08 | 2914 | |
3d599d1c UKK |
2915 | might_sleep(); |
2916 | ||
372e722e | 2917 | gpiod_unexport(desc); |
d8f388d8 | 2918 | |
d2876d08 DB |
2919 | spin_lock_irqsave(&gpio_lock, flags); |
2920 | ||
fdeb8e15 | 2921 | chip = desc->gdev->chip; |
35e8bb51 DB |
2922 | if (chip && test_bit(FLAG_REQUESTED, &desc->flags)) { |
2923 | if (chip->free) { | |
2924 | spin_unlock_irqrestore(&gpio_lock, flags); | |
9c4ba946 | 2925 | might_sleep_if(chip->can_sleep); |
372e722e | 2926 | chip->free(chip, gpio_chip_hwgpio(desc)); |
35e8bb51 DB |
2927 | spin_lock_irqsave(&gpio_lock, flags); |
2928 | } | |
18534df4 | 2929 | kfree_const(desc->label); |
d2876d08 | 2930 | desc_set_label(desc, NULL); |
07697461 | 2931 | clear_bit(FLAG_ACTIVE_LOW, &desc->flags); |
35e8bb51 | 2932 | clear_bit(FLAG_REQUESTED, &desc->flags); |
aca5ce14 | 2933 | clear_bit(FLAG_OPEN_DRAIN, &desc->flags); |
25553ff0 | 2934 | clear_bit(FLAG_OPEN_SOURCE, &desc->flags); |
9225d516 DF |
2935 | clear_bit(FLAG_PULL_UP, &desc->flags); |
2936 | clear_bit(FLAG_PULL_DOWN, &desc->flags); | |
2148ad77 | 2937 | clear_bit(FLAG_BIAS_DISABLE, &desc->flags); |
f625d460 | 2938 | clear_bit(FLAG_IS_HOGGED, &desc->flags); |
77c2d792 MW |
2939 | ret = true; |
2940 | } | |
d2876d08 DB |
2941 | |
2942 | spin_unlock_irqrestore(&gpio_lock, flags); | |
77c2d792 MW |
2943 | return ret; |
2944 | } | |
2945 | ||
0eb4c6c2 | 2946 | void gpiod_free(struct gpio_desc *desc) |
77c2d792 | 2947 | { |
fac9d885 | 2948 | if (desc && desc->gdev && gpiod_free_commit(desc)) { |
fdeb8e15 | 2949 | module_put(desc->gdev->owner); |
33a68e86 LW |
2950 | put_device(&desc->gdev->dev); |
2951 | } else { | |
77c2d792 | 2952 | WARN_ON(extra_checks); |
33a68e86 | 2953 | } |
d2876d08 | 2954 | } |
372e722e | 2955 | |
d2876d08 DB |
2956 | /** |
2957 | * gpiochip_is_requested - return string iff signal was requested | |
2958 | * @chip: controller managing the signal | |
2959 | * @offset: of signal within controller's 0..(ngpio - 1) range | |
2960 | * | |
2961 | * Returns NULL if the GPIO is not currently requested, else a string. | |
9c8318ff AC |
2962 | * The string returned is the label passed to gpio_request(); if none has been |
2963 | * passed it is a meaningless, non-NULL constant. | |
d2876d08 DB |
2964 | * |
2965 | * This function is for use by GPIO controller drivers. The label can | |
2966 | * help with diagnostics, and knowing that the signal is used as a GPIO | |
2967 | * can help avoid accidentally multiplexing it to another controller. | |
2968 | */ | |
2969 | const char *gpiochip_is_requested(struct gpio_chip *chip, unsigned offset) | |
2970 | { | |
6c0b4e6c | 2971 | struct gpio_desc *desc; |
d2876d08 | 2972 | |
48b5953e | 2973 | if (offset >= chip->ngpio) |
d2876d08 | 2974 | return NULL; |
6c0b4e6c | 2975 | |
1c3cdb18 | 2976 | desc = &chip->gpiodev->descs[offset]; |
6c0b4e6c | 2977 | |
372e722e | 2978 | if (test_bit(FLAG_REQUESTED, &desc->flags) == 0) |
d2876d08 | 2979 | return NULL; |
372e722e | 2980 | return desc->label; |
d2876d08 DB |
2981 | } |
2982 | EXPORT_SYMBOL_GPL(gpiochip_is_requested); | |
2983 | ||
77c2d792 MW |
2984 | /** |
2985 | * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor | |
950d55f5 TR |
2986 | * @chip: GPIO chip |
2987 | * @hwnum: hardware number of the GPIO for which to request the descriptor | |
77c2d792 | 2988 | * @label: label for the GPIO |
5923ea6c LW |
2989 | * @lflags: lookup flags for this GPIO or 0 if default, this can be used to |
2990 | * specify things like line inversion semantics with the machine flags | |
2991 | * such as GPIO_OUT_LOW | |
2992 | * @dflags: descriptor request flags for this GPIO or 0 if default, this | |
2993 | * can be used to specify consumer semantics such as open drain | |
77c2d792 MW |
2994 | * |
2995 | * Function allows GPIO chip drivers to request and use their own GPIO | |
2996 | * descriptors via gpiolib API. Difference to gpiod_request() is that this | |
2997 | * function will not increase reference count of the GPIO chip module. This | |
2998 | * allows the GPIO chip module to be unloaded as needed (we assume that the | |
2999 | * GPIO chip driver handles freeing the GPIOs it has requested). | |
950d55f5 TR |
3000 | * |
3001 | * Returns: | |
3002 | * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error | |
3003 | * code on failure. | |
77c2d792 | 3004 | */ |
06863620 BG |
3005 | struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, |
3006 | unsigned int hwnum, | |
21abf103 | 3007 | const char *label, |
5923ea6c LW |
3008 | enum gpio_lookup_flags lflags, |
3009 | enum gpiod_flags dflags) | |
77c2d792 | 3010 | { |
abdc08a3 | 3011 | struct gpio_desc *desc = gpiochip_get_desc(chip, hwnum); |
d377f56f | 3012 | int ret; |
77c2d792 | 3013 | |
abdc08a3 AC |
3014 | if (IS_ERR(desc)) { |
3015 | chip_err(chip, "failed to get GPIO descriptor\n"); | |
3016 | return desc; | |
3017 | } | |
3018 | ||
d377f56f LW |
3019 | ret = gpiod_request_commit(desc, label); |
3020 | if (ret < 0) | |
3021 | return ERR_PTR(ret); | |
77c2d792 | 3022 | |
d377f56f LW |
3023 | ret = gpiod_configure_flags(desc, label, lflags, dflags); |
3024 | if (ret) { | |
21abf103 LW |
3025 | chip_err(chip, "setup of own GPIO %s failed\n", label); |
3026 | gpiod_free_commit(desc); | |
d377f56f | 3027 | return ERR_PTR(ret); |
21abf103 LW |
3028 | } |
3029 | ||
abdc08a3 | 3030 | return desc; |
77c2d792 | 3031 | } |
f7d4ad98 | 3032 | EXPORT_SYMBOL_GPL(gpiochip_request_own_desc); |
77c2d792 MW |
3033 | |
3034 | /** | |
3035 | * gpiochip_free_own_desc - Free GPIO requested by the chip driver | |
3036 | * @desc: GPIO descriptor to free | |
3037 | * | |
3038 | * Function frees the given GPIO requested previously with | |
3039 | * gpiochip_request_own_desc(). | |
3040 | */ | |
3041 | void gpiochip_free_own_desc(struct gpio_desc *desc) | |
3042 | { | |
3043 | if (desc) | |
fac9d885 | 3044 | gpiod_free_commit(desc); |
77c2d792 | 3045 | } |
f7d4ad98 | 3046 | EXPORT_SYMBOL_GPL(gpiochip_free_own_desc); |
d2876d08 | 3047 | |
fdeb8e15 LW |
3048 | /* |
3049 | * Drivers MUST set GPIO direction before making get/set calls. In | |
d2876d08 DB |
3050 | * some cases this is done in early boot, before IRQs are enabled. |
3051 | * | |
3052 | * As a rule these aren't called more than once (except for drivers | |
3053 | * using the open-drain emulation idiom) so these are natural places | |
3054 | * to accumulate extra debugging checks. Note that we can't (yet) | |
3055 | * rely on gpio_request() having been called beforehand. | |
3056 | */ | |
3057 | ||
d18fddff | 3058 | static int gpio_set_config(struct gpio_chip *gc, unsigned int offset, |
71479789 TP |
3059 | enum pin_config_param mode) |
3060 | { | |
d90f3685 BG |
3061 | if (!gc->set_config) |
3062 | return -ENOTSUPP; | |
542f3615 | 3063 | |
d90f3685 | 3064 | return gc->set_config(gc, offset, mode); |
71479789 TP |
3065 | } |
3066 | ||
2148ad77 KG |
3067 | static int gpio_set_bias(struct gpio_chip *chip, struct gpio_desc *desc) |
3068 | { | |
3069 | int bias = 0; | |
3070 | int ret = 0; | |
3071 | ||
3072 | if (test_bit(FLAG_BIAS_DISABLE, &desc->flags)) | |
3073 | bias = PIN_CONFIG_BIAS_DISABLE; | |
3074 | else if (test_bit(FLAG_PULL_UP, &desc->flags)) | |
3075 | bias = PIN_CONFIG_BIAS_PULL_UP; | |
3076 | else if (test_bit(FLAG_PULL_DOWN, &desc->flags)) | |
3077 | bias = PIN_CONFIG_BIAS_PULL_DOWN; | |
3078 | ||
3079 | if (bias) { | |
3080 | ret = gpio_set_config(chip, gpio_chip_hwgpio(desc), bias); | |
3081 | if (ret != -ENOTSUPP) | |
3082 | return ret; | |
3083 | } | |
3084 | return 0; | |
3085 | } | |
3086 | ||
79a9becd AC |
3087 | /** |
3088 | * gpiod_direction_input - set the GPIO direction to input | |
3089 | * @desc: GPIO to set to input | |
3090 | * | |
3091 | * Set the direction of the passed GPIO to input, such as gpiod_get_value() can | |
3092 | * be called safely on it. | |
3093 | * | |
3094 | * Return 0 in case of success, else an error code. | |
3095 | */ | |
3096 | int gpiod_direction_input(struct gpio_desc *desc) | |
d2876d08 | 3097 | { |
d2876d08 | 3098 | struct gpio_chip *chip; |
d377f56f | 3099 | int ret = 0; |
d2876d08 | 3100 | |
fdeb8e15 LW |
3101 | VALIDATE_DESC(desc); |
3102 | chip = desc->gdev->chip; | |
bcabdef1 | 3103 | |
e48d194d LW |
3104 | /* |
3105 | * It is legal to have no .get() and .direction_input() specified if | |
3106 | * the chip is output-only, but you can't specify .direction_input() | |
3107 | * and not support the .get() operation, that doesn't make sense. | |
3108 | */ | |
ae9847f4 | 3109 | if (!chip->get && chip->direction_input) { |
6424de5a | 3110 | gpiod_warn(desc, |
e48d194d LW |
3111 | "%s: missing get() but have direction_input()\n", |
3112 | __func__); | |
be1a4b13 LW |
3113 | return -EIO; |
3114 | } | |
3115 | ||
e48d194d LW |
3116 | /* |
3117 | * If we have a .direction_input() callback, things are simple, | |
3118 | * just call it. Else we are some input-only chip so try to check the | |
3119 | * direction (if .get_direction() is supported) else we silently | |
3120 | * assume we are in input mode after this. | |
3121 | */ | |
ae9847f4 | 3122 | if (chip->direction_input) { |
d377f56f | 3123 | ret = chip->direction_input(chip, gpio_chip_hwgpio(desc)); |
ae9847f4 RRD |
3124 | } else if (chip->get_direction && |
3125 | (chip->get_direction(chip, gpio_chip_hwgpio(desc)) != 1)) { | |
3126 | gpiod_warn(desc, | |
e48d194d LW |
3127 | "%s: missing direction_input() operation and line is output\n", |
3128 | __func__); | |
ae9847f4 RRD |
3129 | return -EIO; |
3130 | } | |
2148ad77 | 3131 | if (ret == 0) { |
d2876d08 | 3132 | clear_bit(FLAG_IS_OUT, &desc->flags); |
2148ad77 KG |
3133 | ret = gpio_set_bias(chip, desc); |
3134 | } | |
d449991c | 3135 | |
d377f56f | 3136 | trace_gpio_direction(desc_to_gpio(desc), 1, ret); |
d82da797 | 3137 | |
d377f56f | 3138 | return ret; |
d2876d08 | 3139 | } |
79a9becd | 3140 | EXPORT_SYMBOL_GPL(gpiod_direction_input); |
372e722e | 3141 | |
fac9d885 | 3142 | static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value) |
d2876d08 | 3143 | { |
c663e5f5 | 3144 | struct gpio_chip *gc = desc->gdev->chip; |
ad17731d | 3145 | int val = !!value; |
ae9847f4 | 3146 | int ret = 0; |
d2876d08 | 3147 | |
e48d194d LW |
3148 | /* |
3149 | * It's OK not to specify .direction_output() if the gpiochip is | |
3150 | * output-only, but if there is then not even a .set() operation it | |
3151 | * is pretty tricky to drive the output line. | |
3152 | */ | |
ae9847f4 | 3153 | if (!gc->set && !gc->direction_output) { |
6424de5a | 3154 | gpiod_warn(desc, |
e48d194d LW |
3155 | "%s: missing set() and direction_output() operations\n", |
3156 | __func__); | |
be1a4b13 LW |
3157 | return -EIO; |
3158 | } | |
3159 | ||
ae9847f4 RRD |
3160 | if (gc->direction_output) { |
3161 | ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val); | |
3162 | } else { | |
e48d194d | 3163 | /* Check that we are in output mode if we can */ |
ae9847f4 RRD |
3164 | if (gc->get_direction && |
3165 | gc->get_direction(gc, gpio_chip_hwgpio(desc))) { | |
3166 | gpiod_warn(desc, | |
3167 | "%s: missing direction_output() operation\n", | |
3168 | __func__); | |
3169 | return -EIO; | |
3170 | } | |
e48d194d LW |
3171 | /* |
3172 | * If we can't actively set the direction, we are some | |
3173 | * output-only chip, so just drive the output as desired. | |
3174 | */ | |
ae9847f4 RRD |
3175 | gc->set(gc, gpio_chip_hwgpio(desc), val); |
3176 | } | |
3177 | ||
c663e5f5 | 3178 | if (!ret) |
d2876d08 | 3179 | set_bit(FLAG_IS_OUT, &desc->flags); |
ad17731d | 3180 | trace_gpio_value(desc_to_gpio(desc), 0, val); |
c663e5f5 LW |
3181 | trace_gpio_direction(desc_to_gpio(desc), 0, ret); |
3182 | return ret; | |
d2876d08 | 3183 | } |
ef70bbe1 PZ |
3184 | |
3185 | /** | |
3186 | * gpiod_direction_output_raw - set the GPIO direction to output | |
3187 | * @desc: GPIO to set to output | |
3188 | * @value: initial output value of the GPIO | |
3189 | * | |
3190 | * Set the direction of the passed GPIO to output, such as gpiod_set_value() can | |
3191 | * be called safely on it. The initial value of the output must be specified | |
3192 | * as raw value on the physical line without regard for the ACTIVE_LOW status. | |
3193 | * | |
3194 | * Return 0 in case of success, else an error code. | |
3195 | */ | |
3196 | int gpiod_direction_output_raw(struct gpio_desc *desc, int value) | |
3197 | { | |
fdeb8e15 | 3198 | VALIDATE_DESC(desc); |
fac9d885 | 3199 | return gpiod_direction_output_raw_commit(desc, value); |
ef70bbe1 PZ |
3200 | } |
3201 | EXPORT_SYMBOL_GPL(gpiod_direction_output_raw); | |
3202 | ||
3203 | /** | |
90df4fe0 | 3204 | * gpiod_direction_output - set the GPIO direction to output |
ef70bbe1 PZ |
3205 | * @desc: GPIO to set to output |
3206 | * @value: initial output value of the GPIO | |
3207 | * | |
3208 | * Set the direction of the passed GPIO to output, such as gpiod_set_value() can | |
3209 | * be called safely on it. The initial value of the output must be specified | |
3210 | * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into | |
3211 | * account. | |
3212 | * | |
3213 | * Return 0 in case of success, else an error code. | |
3214 | */ | |
3215 | int gpiod_direction_output(struct gpio_desc *desc, int value) | |
3216 | { | |
30322bcf | 3217 | struct gpio_chip *gc; |
02e47980 LW |
3218 | int ret; |
3219 | ||
fdeb8e15 | 3220 | VALIDATE_DESC(desc); |
ef70bbe1 PZ |
3221 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
3222 | value = !value; | |
ad17731d LW |
3223 | else |
3224 | value = !!value; | |
02e47980 | 3225 | |
4e9439dd HV |
3226 | /* GPIOs used for enabled IRQs shall not be set as output */ |
3227 | if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) && | |
3228 | test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) { | |
02e47980 LW |
3229 | gpiod_err(desc, |
3230 | "%s: tried to set a GPIO tied to an IRQ as output\n", | |
3231 | __func__); | |
3232 | return -EIO; | |
3233 | } | |
3234 | ||
30322bcf | 3235 | gc = desc->gdev->chip; |
02e47980 LW |
3236 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) { |
3237 | /* First see if we can enable open drain in hardware */ | |
71479789 TP |
3238 | ret = gpio_set_config(gc, gpio_chip_hwgpio(desc), |
3239 | PIN_CONFIG_DRIVE_OPEN_DRAIN); | |
02e47980 LW |
3240 | if (!ret) |
3241 | goto set_output_value; | |
3242 | /* Emulate open drain by not actively driving the line high */ | |
e735244e BG |
3243 | if (value) { |
3244 | ret = gpiod_direction_input(desc); | |
3245 | goto set_output_flag; | |
3246 | } | |
02e47980 LW |
3247 | } |
3248 | else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) { | |
71479789 TP |
3249 | ret = gpio_set_config(gc, gpio_chip_hwgpio(desc), |
3250 | PIN_CONFIG_DRIVE_OPEN_SOURCE); | |
02e47980 LW |
3251 | if (!ret) |
3252 | goto set_output_value; | |
3253 | /* Emulate open source by not actively driving the line low */ | |
e735244e BG |
3254 | if (!value) { |
3255 | ret = gpiod_direction_input(desc); | |
3256 | goto set_output_flag; | |
3257 | } | |
02e47980 | 3258 | } else { |
71479789 TP |
3259 | gpio_set_config(gc, gpio_chip_hwgpio(desc), |
3260 | PIN_CONFIG_DRIVE_PUSH_PULL); | |
02e47980 LW |
3261 | } |
3262 | ||
3263 | set_output_value: | |
2821ae5f KG |
3264 | ret = gpio_set_bias(gc, desc); |
3265 | if (ret) | |
3266 | return ret; | |
fac9d885 | 3267 | return gpiod_direction_output_raw_commit(desc, value); |
e735244e BG |
3268 | |
3269 | set_output_flag: | |
3270 | /* | |
3271 | * When emulating open-source or open-drain functionalities by not | |
3272 | * actively driving the line (setting mode to input) we still need to | |
3273 | * set the IS_OUT flag or otherwise we won't be able to set the line | |
3274 | * value anymore. | |
3275 | */ | |
3276 | if (ret == 0) | |
3277 | set_bit(FLAG_IS_OUT, &desc->flags); | |
3278 | return ret; | |
ef70bbe1 | 3279 | } |
79a9becd | 3280 | EXPORT_SYMBOL_GPL(gpiod_direction_output); |
d2876d08 | 3281 | |
c4b5be98 | 3282 | /** |
950d55f5 TR |
3283 | * gpiod_set_debounce - sets @debounce time for a GPIO |
3284 | * @desc: descriptor of the GPIO for which to set debounce time | |
3285 | * @debounce: debounce time in microseconds | |
65d87656 | 3286 | * |
950d55f5 TR |
3287 | * Returns: |
3288 | * 0 on success, %-ENOTSUPP if the controller doesn't support setting the | |
3289 | * debounce time. | |
c4b5be98 | 3290 | */ |
79a9becd | 3291 | int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce) |
c4b5be98 | 3292 | { |
c4b5be98 | 3293 | struct gpio_chip *chip; |
2956b5d9 | 3294 | unsigned long config; |
c4b5be98 | 3295 | |
fdeb8e15 LW |
3296 | VALIDATE_DESC(desc); |
3297 | chip = desc->gdev->chip; | |
be1a4b13 | 3298 | |
2956b5d9 | 3299 | config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce); |
d18fddff | 3300 | return gpio_set_config(chip, gpio_chip_hwgpio(desc), config); |
c4b5be98 | 3301 | } |
79a9becd | 3302 | EXPORT_SYMBOL_GPL(gpiod_set_debounce); |
372e722e | 3303 | |
e10f72bf AJ |
3304 | /** |
3305 | * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset | |
3306 | * @desc: descriptor of the GPIO for which to configure persistence | |
3307 | * @transitory: True to lose state on suspend or reset, false for persistence | |
3308 | * | |
3309 | * Returns: | |
3310 | * 0 on success, otherwise a negative error code. | |
3311 | */ | |
3312 | int gpiod_set_transitory(struct gpio_desc *desc, bool transitory) | |
3313 | { | |
3314 | struct gpio_chip *chip; | |
3315 | unsigned long packed; | |
3316 | int gpio; | |
3317 | int rc; | |
3318 | ||
156dd392 | 3319 | VALIDATE_DESC(desc); |
e10f72bf AJ |
3320 | /* |
3321 | * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for | |
3322 | * persistence state. | |
3323 | */ | |
4fc5bfeb | 3324 | assign_bit(FLAG_TRANSITORY, &desc->flags, transitory); |
e10f72bf AJ |
3325 | |
3326 | /* If the driver supports it, set the persistence state now */ | |
3327 | chip = desc->gdev->chip; | |
3328 | if (!chip->set_config) | |
3329 | return 0; | |
3330 | ||
3331 | packed = pinconf_to_config_packed(PIN_CONFIG_PERSIST_STATE, | |
3332 | !transitory); | |
3333 | gpio = gpio_chip_hwgpio(desc); | |
d18fddff | 3334 | rc = gpio_set_config(chip, gpio, packed); |
e10f72bf AJ |
3335 | if (rc == -ENOTSUPP) { |
3336 | dev_dbg(&desc->gdev->dev, "Persistence not supported for GPIO %d\n", | |
3337 | gpio); | |
3338 | return 0; | |
3339 | } | |
3340 | ||
3341 | return rc; | |
3342 | } | |
3343 | EXPORT_SYMBOL_GPL(gpiod_set_transitory); | |
3344 | ||
79a9becd AC |
3345 | /** |
3346 | * gpiod_is_active_low - test whether a GPIO is active-low or not | |
3347 | * @desc: the gpio descriptor to test | |
3348 | * | |
3349 | * Returns 1 if the GPIO is active-low, 0 otherwise. | |
3350 | */ | |
3351 | int gpiod_is_active_low(const struct gpio_desc *desc) | |
372e722e | 3352 | { |
fdeb8e15 | 3353 | VALIDATE_DESC(desc); |
79a9becd | 3354 | return test_bit(FLAG_ACTIVE_LOW, &desc->flags); |
372e722e | 3355 | } |
79a9becd | 3356 | EXPORT_SYMBOL_GPL(gpiod_is_active_low); |
d2876d08 | 3357 | |
d3a5bcb4 MM |
3358 | /** |
3359 | * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not | |
3360 | * @desc: the gpio descriptor to change | |
3361 | */ | |
3362 | void gpiod_toggle_active_low(struct gpio_desc *desc) | |
3363 | { | |
3364 | VALIDATE_DESC_VOID(desc); | |
3365 | change_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
3366 | } | |
3367 | EXPORT_SYMBOL_GPL(gpiod_toggle_active_low); | |
3368 | ||
d2876d08 DB |
3369 | /* I/O calls are only valid after configuration completed; the relevant |
3370 | * "is this a valid GPIO" error checks should already have been done. | |
3371 | * | |
3372 | * "Get" operations are often inlinable as reading a pin value register, | |
3373 | * and masking the relevant bit in that register. | |
3374 | * | |
3375 | * When "set" operations are inlinable, they involve writing that mask to | |
3376 | * one register to set a low value, or a different register to set it high. | |
3377 | * Otherwise locking is needed, so there may be little value to inlining. | |
3378 | * | |
3379 | *------------------------------------------------------------------------ | |
3380 | * | |
3381 | * IMPORTANT!!! The hot paths -- get/set value -- assume that callers | |
3382 | * have requested the GPIO. That can include implicit requesting by | |
3383 | * a direction setting call. Marking a gpio as requested locks its chip | |
3384 | * in memory, guaranteeing that these table lookups need no more locking | |
3385 | * and that gpiochip_remove() will fail. | |
3386 | * | |
3387 | * REVISIT when debugging, consider adding some instrumentation to ensure | |
3388 | * that the GPIO was actually requested. | |
3389 | */ | |
3390 | ||
fac9d885 | 3391 | static int gpiod_get_raw_value_commit(const struct gpio_desc *desc) |
d2876d08 DB |
3392 | { |
3393 | struct gpio_chip *chip; | |
372e722e | 3394 | int offset; |
e20538b8 | 3395 | int value; |
d2876d08 | 3396 | |
fdeb8e15 | 3397 | chip = desc->gdev->chip; |
372e722e | 3398 | offset = gpio_chip_hwgpio(desc); |
e20538b8 | 3399 | value = chip->get ? chip->get(chip, offset) : -EIO; |
723a6303 | 3400 | value = value < 0 ? value : !!value; |
372e722e | 3401 | trace_gpio_value(desc_to_gpio(desc), 1, value); |
3f397c21 | 3402 | return value; |
d2876d08 | 3403 | } |
372e722e | 3404 | |
eec1d566 LW |
3405 | static int gpio_chip_get_multiple(struct gpio_chip *chip, |
3406 | unsigned long *mask, unsigned long *bits) | |
3407 | { | |
3408 | if (chip->get_multiple) { | |
3409 | return chip->get_multiple(chip, mask, bits); | |
3410 | } else if (chip->get) { | |
3411 | int i, value; | |
3412 | ||
3413 | for_each_set_bit(i, mask, chip->ngpio) { | |
3414 | value = chip->get(chip, i); | |
3415 | if (value < 0) | |
3416 | return value; | |
3417 | __assign_bit(i, bits, value); | |
3418 | } | |
3419 | return 0; | |
3420 | } | |
3421 | return -EIO; | |
3422 | } | |
3423 | ||
3424 | int gpiod_get_array_value_complex(bool raw, bool can_sleep, | |
3425 | unsigned int array_size, | |
3426 | struct gpio_desc **desc_array, | |
77588c14 | 3427 | struct gpio_array *array_info, |
b9762beb | 3428 | unsigned long *value_bitmap) |
eec1d566 | 3429 | { |
d377f56f | 3430 | int ret, i = 0; |
b17566a6 JK |
3431 | |
3432 | /* | |
3433 | * Validate array_info against desc_array and its size. | |
3434 | * It should immediately follow desc_array if both | |
3435 | * have been obtained from the same gpiod_get_array() call. | |
3436 | */ | |
3437 | if (array_info && array_info->desc == desc_array && | |
3438 | array_size <= array_info->size && | |
3439 | (void *)array_info == desc_array + array_info->size) { | |
3440 | if (!can_sleep) | |
3441 | WARN_ON(array_info->chip->can_sleep); | |
3442 | ||
d377f56f | 3443 | ret = gpio_chip_get_multiple(array_info->chip, |
b17566a6 JK |
3444 | array_info->get_mask, |
3445 | value_bitmap); | |
d377f56f LW |
3446 | if (ret) |
3447 | return ret; | |
b17566a6 JK |
3448 | |
3449 | if (!raw && !bitmap_empty(array_info->invert_mask, array_size)) | |
3450 | bitmap_xor(value_bitmap, value_bitmap, | |
3451 | array_info->invert_mask, array_size); | |
3452 | ||
3453 | if (bitmap_full(array_info->get_mask, array_size)) | |
3454 | return 0; | |
3455 | ||
3456 | i = find_first_zero_bit(array_info->get_mask, array_size); | |
3457 | } else { | |
3458 | array_info = NULL; | |
3459 | } | |
eec1d566 LW |
3460 | |
3461 | while (i < array_size) { | |
3462 | struct gpio_chip *chip = desc_array[i]->gdev->chip; | |
3027743f LA |
3463 | unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)]; |
3464 | unsigned long *mask, *bits; | |
eec1d566 LW |
3465 | int first, j, ret; |
3466 | ||
3027743f LA |
3467 | if (likely(chip->ngpio <= FASTPATH_NGPIO)) { |
3468 | mask = fastpath; | |
3469 | } else { | |
3470 | mask = kmalloc_array(2 * BITS_TO_LONGS(chip->ngpio), | |
3471 | sizeof(*mask), | |
3472 | can_sleep ? GFP_KERNEL : GFP_ATOMIC); | |
3473 | if (!mask) | |
3474 | return -ENOMEM; | |
3475 | } | |
3476 | ||
3477 | bits = mask + BITS_TO_LONGS(chip->ngpio); | |
3478 | bitmap_zero(mask, chip->ngpio); | |
3479 | ||
eec1d566 LW |
3480 | if (!can_sleep) |
3481 | WARN_ON(chip->can_sleep); | |
3482 | ||
3483 | /* collect all inputs belonging to the same chip */ | |
3484 | first = i; | |
eec1d566 LW |
3485 | do { |
3486 | const struct gpio_desc *desc = desc_array[i]; | |
3487 | int hwgpio = gpio_chip_hwgpio(desc); | |
3488 | ||
3489 | __set_bit(hwgpio, mask); | |
3490 | i++; | |
b17566a6 JK |
3491 | |
3492 | if (array_info) | |
35ae7f96 JK |
3493 | i = find_next_zero_bit(array_info->get_mask, |
3494 | array_size, i); | |
eec1d566 LW |
3495 | } while ((i < array_size) && |
3496 | (desc_array[i]->gdev->chip == chip)); | |
3497 | ||
3498 | ret = gpio_chip_get_multiple(chip, mask, bits); | |
3027743f LA |
3499 | if (ret) { |
3500 | if (mask != fastpath) | |
3501 | kfree(mask); | |
eec1d566 | 3502 | return ret; |
3027743f | 3503 | } |
eec1d566 | 3504 | |
b17566a6 | 3505 | for (j = first; j < i; ) { |
eec1d566 LW |
3506 | const struct gpio_desc *desc = desc_array[j]; |
3507 | int hwgpio = gpio_chip_hwgpio(desc); | |
3508 | int value = test_bit(hwgpio, bits); | |
3509 | ||
3510 | if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
3511 | value = !value; | |
b9762beb | 3512 | __assign_bit(j, value_bitmap, value); |
eec1d566 | 3513 | trace_gpio_value(desc_to_gpio(desc), 1, value); |
799d5eb4 | 3514 | j++; |
b17566a6 JK |
3515 | |
3516 | if (array_info) | |
35ae7f96 JK |
3517 | j = find_next_zero_bit(array_info->get_mask, i, |
3518 | j); | |
eec1d566 | 3519 | } |
3027743f LA |
3520 | |
3521 | if (mask != fastpath) | |
3522 | kfree(mask); | |
eec1d566 LW |
3523 | } |
3524 | return 0; | |
3525 | } | |
3526 | ||
d2876d08 | 3527 | /** |
79a9becd AC |
3528 | * gpiod_get_raw_value() - return a gpio's raw value |
3529 | * @desc: gpio whose value will be returned | |
d2876d08 | 3530 | * |
79a9becd | 3531 | * Return the GPIO's raw value, i.e. the value of the physical line disregarding |
e20538b8 | 3532 | * its ACTIVE_LOW status, or negative errno on failure. |
79a9becd | 3533 | * |
827a9b8b | 3534 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 3535 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 3536 | */ |
79a9becd | 3537 | int gpiod_get_raw_value(const struct gpio_desc *desc) |
d2876d08 | 3538 | { |
fdeb8e15 | 3539 | VALIDATE_DESC(desc); |
3285170f | 3540 | /* Should be using gpiod_get_raw_value_cansleep() */ |
fdeb8e15 | 3541 | WARN_ON(desc->gdev->chip->can_sleep); |
fac9d885 | 3542 | return gpiod_get_raw_value_commit(desc); |
d2876d08 | 3543 | } |
79a9becd | 3544 | EXPORT_SYMBOL_GPL(gpiod_get_raw_value); |
372e722e | 3545 | |
79a9becd AC |
3546 | /** |
3547 | * gpiod_get_value() - return a gpio's value | |
3548 | * @desc: gpio whose value will be returned | |
3549 | * | |
3550 | * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into | |
e20538b8 | 3551 | * account, or negative errno on failure. |
79a9becd | 3552 | * |
827a9b8b | 3553 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd AC |
3554 | * complain if the GPIO chip functions potentially sleep. |
3555 | */ | |
3556 | int gpiod_get_value(const struct gpio_desc *desc) | |
372e722e | 3557 | { |
79a9becd | 3558 | int value; |
fdeb8e15 LW |
3559 | |
3560 | VALIDATE_DESC(desc); | |
3285170f | 3561 | /* Should be using gpiod_get_value_cansleep() */ |
fdeb8e15 | 3562 | WARN_ON(desc->gdev->chip->can_sleep); |
79a9becd | 3563 | |
fac9d885 | 3564 | value = gpiod_get_raw_value_commit(desc); |
e20538b8 BA |
3565 | if (value < 0) |
3566 | return value; | |
3567 | ||
79a9becd AC |
3568 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
3569 | value = !value; | |
3570 | ||
3571 | return value; | |
372e722e | 3572 | } |
79a9becd | 3573 | EXPORT_SYMBOL_GPL(gpiod_get_value); |
d2876d08 | 3574 | |
eec1d566 LW |
3575 | /** |
3576 | * gpiod_get_raw_array_value() - read raw values from an array of GPIOs | |
b9762beb | 3577 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 3578 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 3579 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3580 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
3581 | * |
3582 | * Read the raw values of the GPIOs, i.e. the values of the physical lines | |
3583 | * without regard for their ACTIVE_LOW status. Return 0 in case of success, | |
3584 | * else an error code. | |
3585 | * | |
827a9b8b | 3586 | * This function can be called from contexts where we cannot sleep, |
eec1d566 LW |
3587 | * and it will complain if the GPIO chip functions potentially sleep. |
3588 | */ | |
3589 | int gpiod_get_raw_array_value(unsigned int array_size, | |
b9762beb | 3590 | struct gpio_desc **desc_array, |
77588c14 | 3591 | struct gpio_array *array_info, |
b9762beb | 3592 | unsigned long *value_bitmap) |
eec1d566 LW |
3593 | { |
3594 | if (!desc_array) | |
3595 | return -EINVAL; | |
3596 | return gpiod_get_array_value_complex(true, false, array_size, | |
77588c14 JK |
3597 | desc_array, array_info, |
3598 | value_bitmap); | |
eec1d566 LW |
3599 | } |
3600 | EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value); | |
3601 | ||
3602 | /** | |
3603 | * gpiod_get_array_value() - read values from an array of GPIOs | |
b9762beb | 3604 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 3605 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 3606 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3607 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
3608 | * |
3609 | * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
3610 | * into account. Return 0 in case of success, else an error code. | |
3611 | * | |
827a9b8b | 3612 | * This function can be called from contexts where we cannot sleep, |
eec1d566 LW |
3613 | * and it will complain if the GPIO chip functions potentially sleep. |
3614 | */ | |
3615 | int gpiod_get_array_value(unsigned int array_size, | |
b9762beb | 3616 | struct gpio_desc **desc_array, |
77588c14 | 3617 | struct gpio_array *array_info, |
b9762beb | 3618 | unsigned long *value_bitmap) |
eec1d566 LW |
3619 | { |
3620 | if (!desc_array) | |
3621 | return -EINVAL; | |
3622 | return gpiod_get_array_value_complex(false, false, array_size, | |
77588c14 JK |
3623 | desc_array, array_info, |
3624 | value_bitmap); | |
eec1d566 LW |
3625 | } |
3626 | EXPORT_SYMBOL_GPL(gpiod_get_array_value); | |
3627 | ||
aca5ce14 | 3628 | /* |
fac9d885 | 3629 | * gpio_set_open_drain_value_commit() - Set the open drain gpio's value. |
79a9becd | 3630 | * @desc: gpio descriptor whose state need to be set. |
20a8a968 | 3631 | * @value: Non-zero for setting it HIGH otherwise it will set to LOW. |
aca5ce14 | 3632 | */ |
fac9d885 | 3633 | static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value) |
aca5ce14 | 3634 | { |
d377f56f | 3635 | int ret = 0; |
fdeb8e15 | 3636 | struct gpio_chip *chip = desc->gdev->chip; |
372e722e AC |
3637 | int offset = gpio_chip_hwgpio(desc); |
3638 | ||
aca5ce14 | 3639 | if (value) { |
d377f56f | 3640 | ret = chip->direction_input(chip, offset); |
aca5ce14 | 3641 | } else { |
d377f56f LW |
3642 | ret = chip->direction_output(chip, offset, 0); |
3643 | if (!ret) | |
372e722e | 3644 | set_bit(FLAG_IS_OUT, &desc->flags); |
aca5ce14 | 3645 | } |
d377f56f LW |
3646 | trace_gpio_direction(desc_to_gpio(desc), value, ret); |
3647 | if (ret < 0) | |
6424de5a MB |
3648 | gpiod_err(desc, |
3649 | "%s: Error in set_value for open drain err %d\n", | |
d377f56f | 3650 | __func__, ret); |
aca5ce14 LD |
3651 | } |
3652 | ||
25553ff0 | 3653 | /* |
79a9becd AC |
3654 | * _gpio_set_open_source_value() - Set the open source gpio's value. |
3655 | * @desc: gpio descriptor whose state need to be set. | |
20a8a968 | 3656 | * @value: Non-zero for setting it HIGH otherwise it will set to LOW. |
25553ff0 | 3657 | */ |
fac9d885 | 3658 | static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value) |
25553ff0 | 3659 | { |
d377f56f | 3660 | int ret = 0; |
fdeb8e15 | 3661 | struct gpio_chip *chip = desc->gdev->chip; |
372e722e AC |
3662 | int offset = gpio_chip_hwgpio(desc); |
3663 | ||
25553ff0 | 3664 | if (value) { |
d377f56f LW |
3665 | ret = chip->direction_output(chip, offset, 1); |
3666 | if (!ret) | |
372e722e | 3667 | set_bit(FLAG_IS_OUT, &desc->flags); |
25553ff0 | 3668 | } else { |
d377f56f | 3669 | ret = chip->direction_input(chip, offset); |
25553ff0 | 3670 | } |
d377f56f LW |
3671 | trace_gpio_direction(desc_to_gpio(desc), !value, ret); |
3672 | if (ret < 0) | |
6424de5a MB |
3673 | gpiod_err(desc, |
3674 | "%s: Error in set_value for open source err %d\n", | |
d377f56f | 3675 | __func__, ret); |
25553ff0 LD |
3676 | } |
3677 | ||
fac9d885 | 3678 | static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value) |
d2876d08 DB |
3679 | { |
3680 | struct gpio_chip *chip; | |
3681 | ||
fdeb8e15 | 3682 | chip = desc->gdev->chip; |
372e722e | 3683 | trace_gpio_value(desc_to_gpio(desc), 0, value); |
02e47980 | 3684 | chip->set(chip, gpio_chip_hwgpio(desc), value); |
372e722e AC |
3685 | } |
3686 | ||
5f424243 RI |
3687 | /* |
3688 | * set multiple outputs on the same chip; | |
3689 | * use the chip's set_multiple function if available; | |
3690 | * otherwise set the outputs sequentially; | |
3691 | * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word | |
3692 | * defines which outputs are to be changed | |
3693 | * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word | |
3694 | * defines the values the outputs specified by mask are to be set to | |
3695 | */ | |
3696 | static void gpio_chip_set_multiple(struct gpio_chip *chip, | |
3697 | unsigned long *mask, unsigned long *bits) | |
3698 | { | |
3699 | if (chip->set_multiple) { | |
3700 | chip->set_multiple(chip, mask, bits); | |
3701 | } else { | |
5e4e6fb3 AS |
3702 | unsigned int i; |
3703 | ||
3704 | /* set outputs if the corresponding mask bit is set */ | |
3705 | for_each_set_bit(i, mask, chip->ngpio) | |
3706 | chip->set(chip, i, test_bit(i, bits)); | |
5f424243 RI |
3707 | } |
3708 | } | |
3709 | ||
3027743f | 3710 | int gpiod_set_array_value_complex(bool raw, bool can_sleep, |
3c940660 GU |
3711 | unsigned int array_size, |
3712 | struct gpio_desc **desc_array, | |
3713 | struct gpio_array *array_info, | |
3714 | unsigned long *value_bitmap) | |
5f424243 RI |
3715 | { |
3716 | int i = 0; | |
3717 | ||
b17566a6 JK |
3718 | /* |
3719 | * Validate array_info against desc_array and its size. | |
3720 | * It should immediately follow desc_array if both | |
3721 | * have been obtained from the same gpiod_get_array() call. | |
3722 | */ | |
3723 | if (array_info && array_info->desc == desc_array && | |
3724 | array_size <= array_info->size && | |
3725 | (void *)array_info == desc_array + array_info->size) { | |
3726 | if (!can_sleep) | |
3727 | WARN_ON(array_info->chip->can_sleep); | |
3728 | ||
3729 | if (!raw && !bitmap_empty(array_info->invert_mask, array_size)) | |
3730 | bitmap_xor(value_bitmap, value_bitmap, | |
3731 | array_info->invert_mask, array_size); | |
3732 | ||
3733 | gpio_chip_set_multiple(array_info->chip, array_info->set_mask, | |
3734 | value_bitmap); | |
3735 | ||
3736 | if (bitmap_full(array_info->set_mask, array_size)) | |
3737 | return 0; | |
3738 | ||
3739 | i = find_first_zero_bit(array_info->set_mask, array_size); | |
3740 | } else { | |
3741 | array_info = NULL; | |
3742 | } | |
3743 | ||
5f424243 | 3744 | while (i < array_size) { |
fdeb8e15 | 3745 | struct gpio_chip *chip = desc_array[i]->gdev->chip; |
3027743f LA |
3746 | unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)]; |
3747 | unsigned long *mask, *bits; | |
5f424243 RI |
3748 | int count = 0; |
3749 | ||
3027743f LA |
3750 | if (likely(chip->ngpio <= FASTPATH_NGPIO)) { |
3751 | mask = fastpath; | |
3752 | } else { | |
3753 | mask = kmalloc_array(2 * BITS_TO_LONGS(chip->ngpio), | |
3754 | sizeof(*mask), | |
3755 | can_sleep ? GFP_KERNEL : GFP_ATOMIC); | |
3756 | if (!mask) | |
3757 | return -ENOMEM; | |
3758 | } | |
3759 | ||
3760 | bits = mask + BITS_TO_LONGS(chip->ngpio); | |
3761 | bitmap_zero(mask, chip->ngpio); | |
3762 | ||
38e003f4 | 3763 | if (!can_sleep) |
5f424243 | 3764 | WARN_ON(chip->can_sleep); |
38e003f4 | 3765 | |
5f424243 RI |
3766 | do { |
3767 | struct gpio_desc *desc = desc_array[i]; | |
3768 | int hwgpio = gpio_chip_hwgpio(desc); | |
b9762beb | 3769 | int value = test_bit(i, value_bitmap); |
5f424243 | 3770 | |
b17566a6 JK |
3771 | /* |
3772 | * Pins applicable for fast input but not for | |
3773 | * fast output processing may have been already | |
3774 | * inverted inside the fast path, skip them. | |
3775 | */ | |
3776 | if (!raw && !(array_info && | |
3777 | test_bit(i, array_info->invert_mask)) && | |
3778 | test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
5f424243 RI |
3779 | value = !value; |
3780 | trace_gpio_value(desc_to_gpio(desc), 0, value); | |
3781 | /* | |
3782 | * collect all normal outputs belonging to the same chip | |
3783 | * open drain and open source outputs are set individually | |
3784 | */ | |
02e47980 | 3785 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) { |
fac9d885 | 3786 | gpio_set_open_drain_value_commit(desc, value); |
02e47980 | 3787 | } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) { |
fac9d885 | 3788 | gpio_set_open_source_value_commit(desc, value); |
5f424243 RI |
3789 | } else { |
3790 | __set_bit(hwgpio, mask); | |
4fc5bfeb | 3791 | __assign_bit(hwgpio, bits, value); |
5f424243 RI |
3792 | count++; |
3793 | } | |
3794 | i++; | |
b17566a6 JK |
3795 | |
3796 | if (array_info) | |
35ae7f96 JK |
3797 | i = find_next_zero_bit(array_info->set_mask, |
3798 | array_size, i); | |
fdeb8e15 LW |
3799 | } while ((i < array_size) && |
3800 | (desc_array[i]->gdev->chip == chip)); | |
5f424243 | 3801 | /* push collected bits to outputs */ |
38e003f4 | 3802 | if (count != 0) |
5f424243 | 3803 | gpio_chip_set_multiple(chip, mask, bits); |
3027743f LA |
3804 | |
3805 | if (mask != fastpath) | |
3806 | kfree(mask); | |
5f424243 | 3807 | } |
3027743f | 3808 | return 0; |
5f424243 RI |
3809 | } |
3810 | ||
d2876d08 | 3811 | /** |
79a9becd AC |
3812 | * gpiod_set_raw_value() - assign a gpio's raw value |
3813 | * @desc: gpio whose value will be assigned | |
d2876d08 | 3814 | * @value: value to assign |
d2876d08 | 3815 | * |
79a9becd AC |
3816 | * Set the raw value of the GPIO, i.e. the value of its physical line without |
3817 | * regard for its ACTIVE_LOW status. | |
3818 | * | |
827a9b8b | 3819 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 3820 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 3821 | */ |
79a9becd | 3822 | void gpiod_set_raw_value(struct gpio_desc *desc, int value) |
372e722e | 3823 | { |
fdeb8e15 | 3824 | VALIDATE_DESC_VOID(desc); |
3285170f | 3825 | /* Should be using gpiod_set_raw_value_cansleep() */ |
fdeb8e15 | 3826 | WARN_ON(desc->gdev->chip->can_sleep); |
fac9d885 | 3827 | gpiod_set_raw_value_commit(desc, value); |
d2876d08 | 3828 | } |
79a9becd | 3829 | EXPORT_SYMBOL_GPL(gpiod_set_raw_value); |
d2876d08 | 3830 | |
1e77fc82 GU |
3831 | /** |
3832 | * gpiod_set_value_nocheck() - set a GPIO line value without checking | |
3833 | * @desc: the descriptor to set the value on | |
3834 | * @value: value to set | |
3835 | * | |
3836 | * This sets the value of a GPIO line backing a descriptor, applying | |
3837 | * different semantic quirks like active low and open drain/source | |
3838 | * handling. | |
3839 | */ | |
3840 | static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value) | |
3841 | { | |
3842 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
3843 | value = !value; | |
3844 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) | |
3845 | gpio_set_open_drain_value_commit(desc, value); | |
3846 | else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) | |
3847 | gpio_set_open_source_value_commit(desc, value); | |
3848 | else | |
3849 | gpiod_set_raw_value_commit(desc, value); | |
3850 | } | |
3851 | ||
d2876d08 | 3852 | /** |
79a9becd AC |
3853 | * gpiod_set_value() - assign a gpio's value |
3854 | * @desc: gpio whose value will be assigned | |
3855 | * @value: value to assign | |
3856 | * | |
02e47980 LW |
3857 | * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW, |
3858 | * OPEN_DRAIN and OPEN_SOURCE flags into account. | |
d2876d08 | 3859 | * |
827a9b8b | 3860 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 3861 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 3862 | */ |
79a9becd | 3863 | void gpiod_set_value(struct gpio_desc *desc, int value) |
d2876d08 | 3864 | { |
fdeb8e15 | 3865 | VALIDATE_DESC_VOID(desc); |
3285170f | 3866 | /* Should be using gpiod_set_value_cansleep() */ |
fdeb8e15 | 3867 | WARN_ON(desc->gdev->chip->can_sleep); |
1e77fc82 | 3868 | gpiod_set_value_nocheck(desc, value); |
372e722e | 3869 | } |
79a9becd | 3870 | EXPORT_SYMBOL_GPL(gpiod_set_value); |
d2876d08 | 3871 | |
5f424243 | 3872 | /** |
3fff99bc | 3873 | * gpiod_set_raw_array_value() - assign values to an array of GPIOs |
b9762beb | 3874 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 3875 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 3876 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3877 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
3878 | * |
3879 | * Set the raw values of the GPIOs, i.e. the values of the physical lines | |
3880 | * without regard for their ACTIVE_LOW status. | |
3881 | * | |
827a9b8b | 3882 | * This function can be called from contexts where we cannot sleep, and will |
5f424243 RI |
3883 | * complain if the GPIO chip functions potentially sleep. |
3884 | */ | |
3027743f | 3885 | int gpiod_set_raw_array_value(unsigned int array_size, |
3c940660 GU |
3886 | struct gpio_desc **desc_array, |
3887 | struct gpio_array *array_info, | |
3888 | unsigned long *value_bitmap) | |
5f424243 RI |
3889 | { |
3890 | if (!desc_array) | |
3027743f LA |
3891 | return -EINVAL; |
3892 | return gpiod_set_array_value_complex(true, false, array_size, | |
77588c14 | 3893 | desc_array, array_info, value_bitmap); |
5f424243 | 3894 | } |
3fff99bc | 3895 | EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value); |
5f424243 RI |
3896 | |
3897 | /** | |
3fff99bc | 3898 | * gpiod_set_array_value() - assign values to an array of GPIOs |
b9762beb | 3899 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 3900 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 3901 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3902 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
3903 | * |
3904 | * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
3905 | * into account. | |
3906 | * | |
827a9b8b | 3907 | * This function can be called from contexts where we cannot sleep, and will |
5f424243 RI |
3908 | * complain if the GPIO chip functions potentially sleep. |
3909 | */ | |
cf9af0d5 GU |
3910 | int gpiod_set_array_value(unsigned int array_size, |
3911 | struct gpio_desc **desc_array, | |
3912 | struct gpio_array *array_info, | |
3913 | unsigned long *value_bitmap) | |
5f424243 RI |
3914 | { |
3915 | if (!desc_array) | |
cf9af0d5 GU |
3916 | return -EINVAL; |
3917 | return gpiod_set_array_value_complex(false, false, array_size, | |
3918 | desc_array, array_info, | |
3919 | value_bitmap); | |
5f424243 | 3920 | } |
3fff99bc | 3921 | EXPORT_SYMBOL_GPL(gpiod_set_array_value); |
5f424243 | 3922 | |
d2876d08 | 3923 | /** |
79a9becd AC |
3924 | * gpiod_cansleep() - report whether gpio value access may sleep |
3925 | * @desc: gpio to check | |
d2876d08 | 3926 | * |
d2876d08 | 3927 | */ |
79a9becd | 3928 | int gpiod_cansleep(const struct gpio_desc *desc) |
372e722e | 3929 | { |
fdeb8e15 LW |
3930 | VALIDATE_DESC(desc); |
3931 | return desc->gdev->chip->can_sleep; | |
d2876d08 | 3932 | } |
79a9becd | 3933 | EXPORT_SYMBOL_GPL(gpiod_cansleep); |
d2876d08 | 3934 | |
90b39402 LW |
3935 | /** |
3936 | * gpiod_set_consumer_name() - set the consumer name for the descriptor | |
3937 | * @desc: gpio to set the consumer name on | |
3938 | * @name: the new consumer name | |
3939 | */ | |
18534df4 | 3940 | int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name) |
90b39402 | 3941 | { |
18534df4 MS |
3942 | VALIDATE_DESC(desc); |
3943 | if (name) { | |
3944 | name = kstrdup_const(name, GFP_KERNEL); | |
3945 | if (!name) | |
3946 | return -ENOMEM; | |
3947 | } | |
3948 | ||
3949 | kfree_const(desc->label); | |
3950 | desc_set_label(desc, name); | |
3951 | ||
3952 | return 0; | |
90b39402 LW |
3953 | } |
3954 | EXPORT_SYMBOL_GPL(gpiod_set_consumer_name); | |
3955 | ||
0f6d504e | 3956 | /** |
79a9becd AC |
3957 | * gpiod_to_irq() - return the IRQ corresponding to a GPIO |
3958 | * @desc: gpio whose IRQ will be returned (already requested) | |
0f6d504e | 3959 | * |
79a9becd AC |
3960 | * Return the IRQ corresponding to the passed GPIO, or an error code in case of |
3961 | * error. | |
0f6d504e | 3962 | */ |
79a9becd | 3963 | int gpiod_to_irq(const struct gpio_desc *desc) |
0f6d504e | 3964 | { |
4c37ce86 LW |
3965 | struct gpio_chip *chip; |
3966 | int offset; | |
0f6d504e | 3967 | |
79bb71bd LW |
3968 | /* |
3969 | * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics | |
3970 | * requires this function to not return zero on an invalid descriptor | |
3971 | * but rather a negative error number. | |
3972 | */ | |
bfbbe44d | 3973 | if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip) |
79bb71bd LW |
3974 | return -EINVAL; |
3975 | ||
fdeb8e15 | 3976 | chip = desc->gdev->chip; |
372e722e | 3977 | offset = gpio_chip_hwgpio(desc); |
4c37ce86 LW |
3978 | if (chip->to_irq) { |
3979 | int retirq = chip->to_irq(chip, offset); | |
3980 | ||
3981 | /* Zero means NO_IRQ */ | |
3982 | if (!retirq) | |
3983 | return -ENXIO; | |
3984 | ||
3985 | return retirq; | |
3986 | } | |
3987 | return -ENXIO; | |
0f6d504e | 3988 | } |
79a9becd | 3989 | EXPORT_SYMBOL_GPL(gpiod_to_irq); |
0f6d504e | 3990 | |
d468bf9e | 3991 | /** |
e3a2e878 | 3992 | * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ |
d74be6df AC |
3993 | * @chip: the chip the GPIO to lock belongs to |
3994 | * @offset: the offset of the GPIO to lock as IRQ | |
d468bf9e LW |
3995 | * |
3996 | * This is used directly by GPIO drivers that want to lock down | |
f438acdf | 3997 | * a certain GPIO line to be used for IRQs. |
d468bf9e | 3998 | */ |
e3a2e878 | 3999 | int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset) |
372e722e | 4000 | { |
9c10280d LW |
4001 | struct gpio_desc *desc; |
4002 | ||
4003 | desc = gpiochip_get_desc(chip, offset); | |
4004 | if (IS_ERR(desc)) | |
4005 | return PTR_ERR(desc); | |
4006 | ||
60f8339e LW |
4007 | /* |
4008 | * If it's fast: flush the direction setting if something changed | |
4009 | * behind our back | |
4010 | */ | |
4011 | if (!chip->can_sleep && chip->get_direction) { | |
80956790 | 4012 | int dir = gpiod_get_direction(desc); |
9c10280d | 4013 | |
36b31279 AS |
4014 | if (dir < 0) { |
4015 | chip_err(chip, "%s: cannot get GPIO direction\n", | |
4016 | __func__); | |
4017 | return dir; | |
4018 | } | |
9c10280d | 4019 | } |
d468bf9e | 4020 | |
9c10280d | 4021 | if (test_bit(FLAG_IS_OUT, &desc->flags)) { |
d74be6df | 4022 | chip_err(chip, |
b1911710 AS |
4023 | "%s: tried to flag a GPIO set as output for IRQ\n", |
4024 | __func__); | |
d468bf9e LW |
4025 | return -EIO; |
4026 | } | |
4027 | ||
9c10280d | 4028 | set_bit(FLAG_USED_AS_IRQ, &desc->flags); |
4e9439dd | 4029 | set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3940c34a LW |
4030 | |
4031 | /* | |
4032 | * If the consumer has not set up a label (such as when the | |
4033 | * IRQ is referenced from .to_irq()) we set up a label here | |
4034 | * so it is clear this is used as an interrupt. | |
4035 | */ | |
4036 | if (!desc->label) | |
4037 | desc_set_label(desc, "interrupt"); | |
4038 | ||
d468bf9e | 4039 | return 0; |
372e722e | 4040 | } |
e3a2e878 | 4041 | EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq); |
d2876d08 | 4042 | |
d468bf9e | 4043 | /** |
e3a2e878 | 4044 | * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ |
d74be6df AC |
4045 | * @chip: the chip the GPIO to lock belongs to |
4046 | * @offset: the offset of the GPIO to lock as IRQ | |
d468bf9e LW |
4047 | * |
4048 | * This is used directly by GPIO drivers that want to indicate | |
4049 | * that a certain GPIO is no longer used exclusively for IRQ. | |
d2876d08 | 4050 | */ |
e3a2e878 | 4051 | void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset) |
d468bf9e | 4052 | { |
3940c34a LW |
4053 | struct gpio_desc *desc; |
4054 | ||
4055 | desc = gpiochip_get_desc(chip, offset); | |
4056 | if (IS_ERR(desc)) | |
d468bf9e | 4057 | return; |
d2876d08 | 4058 | |
3940c34a | 4059 | clear_bit(FLAG_USED_AS_IRQ, &desc->flags); |
4e9439dd | 4060 | clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3940c34a LW |
4061 | |
4062 | /* If we only had this marking, erase it */ | |
4063 | if (desc->label && !strcmp(desc->label, "interrupt")) | |
4064 | desc_set_label(desc, NULL); | |
d468bf9e | 4065 | } |
e3a2e878 | 4066 | EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq); |
d468bf9e | 4067 | |
4e9439dd HV |
4068 | void gpiochip_disable_irq(struct gpio_chip *chip, unsigned int offset) |
4069 | { | |
4070 | struct gpio_desc *desc = gpiochip_get_desc(chip, offset); | |
4071 | ||
4072 | if (!IS_ERR(desc) && | |
4073 | !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) | |
4074 | clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); | |
4075 | } | |
4076 | EXPORT_SYMBOL_GPL(gpiochip_disable_irq); | |
4077 | ||
4078 | void gpiochip_enable_irq(struct gpio_chip *chip, unsigned int offset) | |
4079 | { | |
4080 | struct gpio_desc *desc = gpiochip_get_desc(chip, offset); | |
4081 | ||
4082 | if (!IS_ERR(desc) && | |
4083 | !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) { | |
4084 | WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags)); | |
4085 | set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); | |
4086 | } | |
4087 | } | |
4088 | EXPORT_SYMBOL_GPL(gpiochip_enable_irq); | |
4089 | ||
6cee3821 LW |
4090 | bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset) |
4091 | { | |
4092 | if (offset >= chip->ngpio) | |
4093 | return false; | |
4094 | ||
4095 | return test_bit(FLAG_USED_AS_IRQ, &chip->gpiodev->descs[offset].flags); | |
4096 | } | |
4097 | EXPORT_SYMBOL_GPL(gpiochip_line_is_irq); | |
4098 | ||
4e6b8238 HV |
4099 | int gpiochip_reqres_irq(struct gpio_chip *chip, unsigned int offset) |
4100 | { | |
4101 | int ret; | |
4102 | ||
4103 | if (!try_module_get(chip->gpiodev->owner)) | |
4104 | return -ENODEV; | |
4105 | ||
4106 | ret = gpiochip_lock_as_irq(chip, offset); | |
4107 | if (ret) { | |
4108 | chip_err(chip, "unable to lock HW IRQ %u for IRQ\n", offset); | |
4109 | module_put(chip->gpiodev->owner); | |
4110 | return ret; | |
4111 | } | |
4112 | return 0; | |
4113 | } | |
4114 | EXPORT_SYMBOL_GPL(gpiochip_reqres_irq); | |
4115 | ||
4116 | void gpiochip_relres_irq(struct gpio_chip *chip, unsigned int offset) | |
4117 | { | |
4118 | gpiochip_unlock_as_irq(chip, offset); | |
4119 | module_put(chip->gpiodev->owner); | |
4120 | } | |
4121 | EXPORT_SYMBOL_GPL(gpiochip_relres_irq); | |
4122 | ||
143b65d6 LW |
4123 | bool gpiochip_line_is_open_drain(struct gpio_chip *chip, unsigned int offset) |
4124 | { | |
4125 | if (offset >= chip->ngpio) | |
4126 | return false; | |
4127 | ||
4128 | return test_bit(FLAG_OPEN_DRAIN, &chip->gpiodev->descs[offset].flags); | |
4129 | } | |
4130 | EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain); | |
4131 | ||
4132 | bool gpiochip_line_is_open_source(struct gpio_chip *chip, unsigned int offset) | |
4133 | { | |
4134 | if (offset >= chip->ngpio) | |
4135 | return false; | |
4136 | ||
4137 | return test_bit(FLAG_OPEN_SOURCE, &chip->gpiodev->descs[offset].flags); | |
4138 | } | |
4139 | EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source); | |
4140 | ||
05f479bf CK |
4141 | bool gpiochip_line_is_persistent(struct gpio_chip *chip, unsigned int offset) |
4142 | { | |
4143 | if (offset >= chip->ngpio) | |
4144 | return false; | |
4145 | ||
e10f72bf | 4146 | return !test_bit(FLAG_TRANSITORY, &chip->gpiodev->descs[offset].flags); |
05f479bf CK |
4147 | } |
4148 | EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent); | |
4149 | ||
79a9becd AC |
4150 | /** |
4151 | * gpiod_get_raw_value_cansleep() - return a gpio's raw value | |
4152 | * @desc: gpio whose value will be returned | |
4153 | * | |
4154 | * Return the GPIO's raw value, i.e. the value of the physical line disregarding | |
e20538b8 | 4155 | * its ACTIVE_LOW status, or negative errno on failure. |
79a9becd AC |
4156 | * |
4157 | * This function is to be called from contexts that can sleep. | |
d2876d08 | 4158 | */ |
79a9becd | 4159 | int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc) |
d2876d08 | 4160 | { |
d2876d08 | 4161 | might_sleep_if(extra_checks); |
fdeb8e15 | 4162 | VALIDATE_DESC(desc); |
fac9d885 | 4163 | return gpiod_get_raw_value_commit(desc); |
d2876d08 | 4164 | } |
79a9becd | 4165 | EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep); |
372e722e | 4166 | |
79a9becd AC |
4167 | /** |
4168 | * gpiod_get_value_cansleep() - return a gpio's value | |
4169 | * @desc: gpio whose value will be returned | |
4170 | * | |
4171 | * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into | |
e20538b8 | 4172 | * account, or negative errno on failure. |
79a9becd AC |
4173 | * |
4174 | * This function is to be called from contexts that can sleep. | |
4175 | */ | |
4176 | int gpiod_get_value_cansleep(const struct gpio_desc *desc) | |
d2876d08 | 4177 | { |
3f397c21 | 4178 | int value; |
d2876d08 DB |
4179 | |
4180 | might_sleep_if(extra_checks); | |
fdeb8e15 | 4181 | VALIDATE_DESC(desc); |
fac9d885 | 4182 | value = gpiod_get_raw_value_commit(desc); |
e20538b8 BA |
4183 | if (value < 0) |
4184 | return value; | |
4185 | ||
79a9becd AC |
4186 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
4187 | value = !value; | |
4188 | ||
3f397c21 | 4189 | return value; |
d2876d08 | 4190 | } |
79a9becd | 4191 | EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep); |
372e722e | 4192 | |
eec1d566 LW |
4193 | /** |
4194 | * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs | |
b9762beb | 4195 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 4196 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 4197 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 4198 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
4199 | * |
4200 | * Read the raw values of the GPIOs, i.e. the values of the physical lines | |
4201 | * without regard for their ACTIVE_LOW status. Return 0 in case of success, | |
4202 | * else an error code. | |
4203 | * | |
4204 | * This function is to be called from contexts that can sleep. | |
4205 | */ | |
4206 | int gpiod_get_raw_array_value_cansleep(unsigned int array_size, | |
4207 | struct gpio_desc **desc_array, | |
77588c14 | 4208 | struct gpio_array *array_info, |
b9762beb | 4209 | unsigned long *value_bitmap) |
eec1d566 LW |
4210 | { |
4211 | might_sleep_if(extra_checks); | |
4212 | if (!desc_array) | |
4213 | return -EINVAL; | |
4214 | return gpiod_get_array_value_complex(true, true, array_size, | |
77588c14 JK |
4215 | desc_array, array_info, |
4216 | value_bitmap); | |
eec1d566 LW |
4217 | } |
4218 | EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep); | |
4219 | ||
4220 | /** | |
4221 | * gpiod_get_array_value_cansleep() - read values from an array of GPIOs | |
b9762beb | 4222 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 4223 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 4224 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 4225 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
4226 | * |
4227 | * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
4228 | * into account. Return 0 in case of success, else an error code. | |
4229 | * | |
4230 | * This function is to be called from contexts that can sleep. | |
4231 | */ | |
4232 | int gpiod_get_array_value_cansleep(unsigned int array_size, | |
4233 | struct gpio_desc **desc_array, | |
77588c14 | 4234 | struct gpio_array *array_info, |
b9762beb | 4235 | unsigned long *value_bitmap) |
eec1d566 LW |
4236 | { |
4237 | might_sleep_if(extra_checks); | |
4238 | if (!desc_array) | |
4239 | return -EINVAL; | |
4240 | return gpiod_get_array_value_complex(false, true, array_size, | |
77588c14 JK |
4241 | desc_array, array_info, |
4242 | value_bitmap); | |
eec1d566 LW |
4243 | } |
4244 | EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep); | |
4245 | ||
79a9becd AC |
4246 | /** |
4247 | * gpiod_set_raw_value_cansleep() - assign a gpio's raw value | |
4248 | * @desc: gpio whose value will be assigned | |
4249 | * @value: value to assign | |
4250 | * | |
4251 | * Set the raw value of the GPIO, i.e. the value of its physical line without | |
4252 | * regard for its ACTIVE_LOW status. | |
4253 | * | |
4254 | * This function is to be called from contexts that can sleep. | |
4255 | */ | |
4256 | void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value) | |
372e722e | 4257 | { |
d2876d08 | 4258 | might_sleep_if(extra_checks); |
fdeb8e15 | 4259 | VALIDATE_DESC_VOID(desc); |
fac9d885 | 4260 | gpiod_set_raw_value_commit(desc, value); |
372e722e | 4261 | } |
79a9becd | 4262 | EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep); |
d2876d08 | 4263 | |
79a9becd AC |
4264 | /** |
4265 | * gpiod_set_value_cansleep() - assign a gpio's value | |
4266 | * @desc: gpio whose value will be assigned | |
4267 | * @value: value to assign | |
4268 | * | |
4269 | * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into | |
4270 | * account | |
4271 | * | |
4272 | * This function is to be called from contexts that can sleep. | |
4273 | */ | |
4274 | void gpiod_set_value_cansleep(struct gpio_desc *desc, int value) | |
d2876d08 | 4275 | { |
d2876d08 | 4276 | might_sleep_if(extra_checks); |
fdeb8e15 | 4277 | VALIDATE_DESC_VOID(desc); |
1e77fc82 | 4278 | gpiod_set_value_nocheck(desc, value); |
372e722e | 4279 | } |
79a9becd | 4280 | EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep); |
d2876d08 | 4281 | |
5f424243 | 4282 | /** |
3fff99bc | 4283 | * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs |
b9762beb | 4284 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 4285 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 4286 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 4287 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
4288 | * |
4289 | * Set the raw values of the GPIOs, i.e. the values of the physical lines | |
4290 | * without regard for their ACTIVE_LOW status. | |
4291 | * | |
4292 | * This function is to be called from contexts that can sleep. | |
4293 | */ | |
3027743f | 4294 | int gpiod_set_raw_array_value_cansleep(unsigned int array_size, |
3c940660 GU |
4295 | struct gpio_desc **desc_array, |
4296 | struct gpio_array *array_info, | |
4297 | unsigned long *value_bitmap) | |
5f424243 RI |
4298 | { |
4299 | might_sleep_if(extra_checks); | |
4300 | if (!desc_array) | |
3027743f LA |
4301 | return -EINVAL; |
4302 | return gpiod_set_array_value_complex(true, true, array_size, desc_array, | |
77588c14 | 4303 | array_info, value_bitmap); |
5f424243 | 4304 | } |
3fff99bc | 4305 | EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep); |
5f424243 | 4306 | |
3946d187 DT |
4307 | /** |
4308 | * gpiod_add_lookup_tables() - register GPIO device consumers | |
4309 | * @tables: list of tables of consumers to register | |
4310 | * @n: number of tables in the list | |
4311 | */ | |
4312 | void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n) | |
4313 | { | |
4314 | unsigned int i; | |
4315 | ||
4316 | mutex_lock(&gpio_lookup_lock); | |
4317 | ||
4318 | for (i = 0; i < n; i++) | |
4319 | list_add_tail(&tables[i]->list, &gpio_lookup_list); | |
4320 | ||
4321 | mutex_unlock(&gpio_lookup_lock); | |
4322 | } | |
4323 | ||
5f424243 | 4324 | /** |
3fff99bc | 4325 | * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs |
b9762beb | 4326 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 4327 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 4328 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 4329 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
4330 | * |
4331 | * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
4332 | * into account. | |
4333 | * | |
4334 | * This function is to be called from contexts that can sleep. | |
4335 | */ | |
cf9af0d5 GU |
4336 | int gpiod_set_array_value_cansleep(unsigned int array_size, |
4337 | struct gpio_desc **desc_array, | |
4338 | struct gpio_array *array_info, | |
4339 | unsigned long *value_bitmap) | |
5f424243 RI |
4340 | { |
4341 | might_sleep_if(extra_checks); | |
4342 | if (!desc_array) | |
cf9af0d5 GU |
4343 | return -EINVAL; |
4344 | return gpiod_set_array_value_complex(false, true, array_size, | |
4345 | desc_array, array_info, | |
4346 | value_bitmap); | |
5f424243 | 4347 | } |
3fff99bc | 4348 | EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep); |
5f424243 | 4349 | |
bae48da2 | 4350 | /** |
ad824783 AC |
4351 | * gpiod_add_lookup_table() - register GPIO device consumers |
4352 | * @table: table of consumers to register | |
bae48da2 | 4353 | */ |
ad824783 | 4354 | void gpiod_add_lookup_table(struct gpiod_lookup_table *table) |
bae48da2 AC |
4355 | { |
4356 | mutex_lock(&gpio_lookup_lock); | |
4357 | ||
ad824783 | 4358 | list_add_tail(&table->list, &gpio_lookup_list); |
bae48da2 AC |
4359 | |
4360 | mutex_unlock(&gpio_lookup_lock); | |
4361 | } | |
226b2242 | 4362 | EXPORT_SYMBOL_GPL(gpiod_add_lookup_table); |
bae48da2 | 4363 | |
be9015ab SK |
4364 | /** |
4365 | * gpiod_remove_lookup_table() - unregister GPIO device consumers | |
4366 | * @table: table of consumers to unregister | |
4367 | */ | |
4368 | void gpiod_remove_lookup_table(struct gpiod_lookup_table *table) | |
4369 | { | |
4370 | mutex_lock(&gpio_lookup_lock); | |
4371 | ||
4372 | list_del(&table->list); | |
4373 | ||
4374 | mutex_unlock(&gpio_lookup_lock); | |
4375 | } | |
226b2242 | 4376 | EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table); |
be9015ab | 4377 | |
a411e81e BG |
4378 | /** |
4379 | * gpiod_add_hogs() - register a set of GPIO hogs from machine code | |
4380 | * @hogs: table of gpio hog entries with a zeroed sentinel at the end | |
4381 | */ | |
4382 | void gpiod_add_hogs(struct gpiod_hog *hogs) | |
4383 | { | |
4384 | struct gpio_chip *chip; | |
4385 | struct gpiod_hog *hog; | |
4386 | ||
4387 | mutex_lock(&gpio_machine_hogs_mutex); | |
4388 | ||
4389 | for (hog = &hogs[0]; hog->chip_label; hog++) { | |
4390 | list_add_tail(&hog->list, &gpio_machine_hogs); | |
4391 | ||
4392 | /* | |
4393 | * The chip may have been registered earlier, so check if it | |
4394 | * exists and, if so, try to hog the line now. | |
4395 | */ | |
4396 | chip = find_chip_by_name(hog->chip_label); | |
4397 | if (chip) | |
4398 | gpiochip_machine_hog(chip, hog); | |
4399 | } | |
4400 | ||
4401 | mutex_unlock(&gpio_machine_hogs_mutex); | |
4402 | } | |
4403 | EXPORT_SYMBOL_GPL(gpiod_add_hogs); | |
4404 | ||
ad824783 | 4405 | static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev) |
bae48da2 AC |
4406 | { |
4407 | const char *dev_id = dev ? dev_name(dev) : NULL; | |
ad824783 | 4408 | struct gpiod_lookup_table *table; |
bae48da2 AC |
4409 | |
4410 | mutex_lock(&gpio_lookup_lock); | |
4411 | ||
ad824783 AC |
4412 | list_for_each_entry(table, &gpio_lookup_list, list) { |
4413 | if (table->dev_id && dev_id) { | |
4414 | /* | |
4415 | * Valid strings on both ends, must be identical to have | |
4416 | * a match | |
4417 | */ | |
4418 | if (!strcmp(table->dev_id, dev_id)) | |
4419 | goto found; | |
4420 | } else { | |
4421 | /* | |
4422 | * One of the pointers is NULL, so both must be to have | |
4423 | * a match | |
4424 | */ | |
4425 | if (dev_id == table->dev_id) | |
4426 | goto found; | |
4427 | } | |
4428 | } | |
4429 | table = NULL; | |
bae48da2 | 4430 | |
ad824783 AC |
4431 | found: |
4432 | mutex_unlock(&gpio_lookup_lock); | |
4433 | return table; | |
4434 | } | |
bae48da2 | 4435 | |
ad824783 | 4436 | static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id, |
fed7026a | 4437 | unsigned int idx, unsigned long *flags) |
ad824783 | 4438 | { |
2a3cf6a3 | 4439 | struct gpio_desc *desc = ERR_PTR(-ENOENT); |
ad824783 AC |
4440 | struct gpiod_lookup_table *table; |
4441 | struct gpiod_lookup *p; | |
bae48da2 | 4442 | |
ad824783 AC |
4443 | table = gpiod_find_lookup_table(dev); |
4444 | if (!table) | |
4445 | return desc; | |
bae48da2 | 4446 | |
ad824783 AC |
4447 | for (p = &table->table[0]; p->chip_label; p++) { |
4448 | struct gpio_chip *chip; | |
bae48da2 | 4449 | |
ad824783 | 4450 | /* idx must always match exactly */ |
bae48da2 AC |
4451 | if (p->idx != idx) |
4452 | continue; | |
4453 | ||
ad824783 AC |
4454 | /* If the lookup entry has a con_id, require exact match */ |
4455 | if (p->con_id && (!con_id || strcmp(p->con_id, con_id))) | |
4456 | continue; | |
bae48da2 | 4457 | |
ad824783 | 4458 | chip = find_chip_by_name(p->chip_label); |
bae48da2 | 4459 | |
ad824783 | 4460 | if (!chip) { |
8853daf3 JK |
4461 | /* |
4462 | * As the lookup table indicates a chip with | |
4463 | * p->chip_label should exist, assume it may | |
4464 | * still appear later and let the interested | |
4465 | * consumer be probed again or let the Deferred | |
4466 | * Probe infrastructure handle the error. | |
4467 | */ | |
4468 | dev_warn(dev, "cannot find GPIO chip %s, deferring\n", | |
4469 | p->chip_label); | |
4470 | return ERR_PTR(-EPROBE_DEFER); | |
ad824783 | 4471 | } |
bae48da2 | 4472 | |
ad824783 | 4473 | if (chip->ngpio <= p->chip_hwnum) { |
2a3cf6a3 | 4474 | dev_err(dev, |
d935bd50 GU |
4475 | "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n", |
4476 | idx, p->chip_hwnum, chip->ngpio - 1, | |
4477 | chip->label); | |
2a3cf6a3 | 4478 | return ERR_PTR(-EINVAL); |
bae48da2 | 4479 | } |
bae48da2 | 4480 | |
bb1e88cc | 4481 | desc = gpiochip_get_desc(chip, p->chip_hwnum); |
ad824783 | 4482 | *flags = p->flags; |
bae48da2 | 4483 | |
2a3cf6a3 | 4484 | return desc; |
bae48da2 AC |
4485 | } |
4486 | ||
bae48da2 AC |
4487 | return desc; |
4488 | } | |
4489 | ||
66858527 RI |
4490 | static int platform_gpio_count(struct device *dev, const char *con_id) |
4491 | { | |
4492 | struct gpiod_lookup_table *table; | |
4493 | struct gpiod_lookup *p; | |
4494 | unsigned int count = 0; | |
4495 | ||
4496 | table = gpiod_find_lookup_table(dev); | |
4497 | if (!table) | |
4498 | return -ENOENT; | |
4499 | ||
4500 | for (p = &table->table[0]; p->chip_label; p++) { | |
4501 | if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) || | |
4502 | (!con_id && !p->con_id)) | |
4503 | count++; | |
4504 | } | |
4505 | if (!count) | |
4506 | return -ENOENT; | |
4507 | ||
4508 | return count; | |
4509 | } | |
4510 | ||
13949fa9 DT |
4511 | /** |
4512 | * fwnode_gpiod_get_index - obtain a GPIO from firmware node | |
4513 | * @fwnode: handle of the firmware node | |
4514 | * @con_id: function within the GPIO consumer | |
4515 | * @index: index of the GPIO to obtain for the consumer | |
4516 | * @flags: GPIO initialization flags | |
4517 | * @label: label to attach to the requested GPIO | |
4518 | * | |
4519 | * This function can be used for drivers that get their configuration | |
4520 | * from opaque firmware. | |
4521 | * | |
4522 | * The function properly finds the corresponding GPIO using whatever is the | |
4523 | * underlying firmware interface and then makes sure that the GPIO | |
4524 | * descriptor is requested before it is returned to the caller. | |
4525 | * | |
4526 | * Returns: | |
4527 | * On successful request the GPIO pin is configured in accordance with | |
4528 | * provided @flags. | |
4529 | * | |
4530 | * In case of error an ERR_PTR() is returned. | |
4531 | */ | |
4532 | struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode, | |
4533 | const char *con_id, int index, | |
4534 | enum gpiod_flags flags, | |
4535 | const char *label) | |
4536 | { | |
4537 | struct gpio_desc *desc; | |
4538 | char prop_name[32]; /* 32 is max size of property name */ | |
4539 | unsigned int i; | |
4540 | ||
4541 | for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) { | |
4542 | if (con_id) | |
4543 | snprintf(prop_name, sizeof(prop_name), "%s-%s", | |
4544 | con_id, gpio_suffixes[i]); | |
4545 | else | |
4546 | snprintf(prop_name, sizeof(prop_name), "%s", | |
4547 | gpio_suffixes[i]); | |
4548 | ||
4549 | desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags, | |
4550 | label); | |
4551 | if (!IS_ERR(desc) || (PTR_ERR(desc) != -ENOENT)) | |
4552 | break; | |
4553 | } | |
4554 | ||
4555 | return desc; | |
4556 | } | |
4557 | EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index); | |
4558 | ||
66858527 RI |
4559 | /** |
4560 | * gpiod_count - return the number of GPIOs associated with a device / function | |
4561 | * or -ENOENT if no GPIO has been assigned to the requested function | |
4562 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4563 | * @con_id: function within the GPIO consumer | |
4564 | */ | |
4565 | int gpiod_count(struct device *dev, const char *con_id) | |
4566 | { | |
4567 | int count = -ENOENT; | |
4568 | ||
4569 | if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node) | |
f626d6df | 4570 | count = of_gpio_get_count(dev, con_id); |
66858527 RI |
4571 | else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev)) |
4572 | count = acpi_gpio_count(dev, con_id); | |
4573 | ||
4574 | if (count < 0) | |
4575 | count = platform_gpio_count(dev, con_id); | |
4576 | ||
4577 | return count; | |
4578 | } | |
4579 | EXPORT_SYMBOL_GPL(gpiod_count); | |
4580 | ||
bae48da2 | 4581 | /** |
0879162f | 4582 | * gpiod_get - obtain a GPIO for a given GPIO function |
ad824783 | 4583 | * @dev: GPIO consumer, can be NULL for system-global GPIOs |
bae48da2 | 4584 | * @con_id: function within the GPIO consumer |
39b2bbe3 | 4585 | * @flags: optional GPIO initialization flags |
bae48da2 AC |
4586 | * |
4587 | * Return the GPIO descriptor corresponding to the function con_id of device | |
2a3cf6a3 | 4588 | * dev, -ENOENT if no GPIO has been assigned to the requested function, or |
20a8a968 | 4589 | * another IS_ERR() code if an error occurred while trying to acquire the GPIO. |
bae48da2 | 4590 | */ |
b17d1bf1 | 4591 | struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id, |
39b2bbe3 | 4592 | enum gpiod_flags flags) |
bae48da2 | 4593 | { |
39b2bbe3 | 4594 | return gpiod_get_index(dev, con_id, 0, flags); |
bae48da2 | 4595 | } |
b17d1bf1 | 4596 | EXPORT_SYMBOL_GPL(gpiod_get); |
bae48da2 | 4597 | |
29a1f233 TR |
4598 | /** |
4599 | * gpiod_get_optional - obtain an optional GPIO for a given GPIO function | |
4600 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4601 | * @con_id: function within the GPIO consumer | |
39b2bbe3 | 4602 | * @flags: optional GPIO initialization flags |
29a1f233 TR |
4603 | * |
4604 | * This is equivalent to gpiod_get(), except that when no GPIO was assigned to | |
4605 | * the requested function it will return NULL. This is convenient for drivers | |
4606 | * that need to handle optional GPIOs. | |
4607 | */ | |
b17d1bf1 | 4608 | struct gpio_desc *__must_check gpiod_get_optional(struct device *dev, |
39b2bbe3 AC |
4609 | const char *con_id, |
4610 | enum gpiod_flags flags) | |
29a1f233 | 4611 | { |
39b2bbe3 | 4612 | return gpiod_get_index_optional(dev, con_id, 0, flags); |
29a1f233 | 4613 | } |
b17d1bf1 | 4614 | EXPORT_SYMBOL_GPL(gpiod_get_optional); |
29a1f233 | 4615 | |
f625d460 BP |
4616 | |
4617 | /** | |
4618 | * gpiod_configure_flags - helper function to configure a given GPIO | |
4619 | * @desc: gpio whose value will be assigned | |
4620 | * @con_id: function within the GPIO consumer | |
fed7026a AS |
4621 | * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from |
4622 | * of_find_gpio() or of_get_gpio_hog() | |
f625d460 BP |
4623 | * @dflags: gpiod_flags - optional GPIO initialization flags |
4624 | * | |
4625 | * Return 0 on success, -ENOENT if no GPIO has been assigned to the | |
4626 | * requested function and/or index, or another IS_ERR() code if an error | |
4627 | * occurred while trying to acquire the GPIO. | |
4628 | */ | |
c29fd9eb | 4629 | int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id, |
85b03b30 | 4630 | unsigned long lflags, enum gpiod_flags dflags) |
f625d460 | 4631 | { |
d377f56f | 4632 | int ret; |
f625d460 | 4633 | |
85b03b30 JH |
4634 | if (lflags & GPIO_ACTIVE_LOW) |
4635 | set_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
f926dfc1 | 4636 | |
85b03b30 JH |
4637 | if (lflags & GPIO_OPEN_DRAIN) |
4638 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | |
f926dfc1 LW |
4639 | else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) { |
4640 | /* | |
4641 | * This enforces open drain mode from the consumer side. | |
4642 | * This is necessary for some busses like I2C, but the lookup | |
4643 | * should *REALLY* have specified them as open drain in the | |
4644 | * first place, so print a little warning here. | |
4645 | */ | |
4646 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | |
4647 | gpiod_warn(desc, | |
4648 | "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n"); | |
4649 | } | |
4650 | ||
85b03b30 JH |
4651 | if (lflags & GPIO_OPEN_SOURCE) |
4652 | set_bit(FLAG_OPEN_SOURCE, &desc->flags); | |
e10f72bf | 4653 | |
d449991c TP |
4654 | if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) { |
4655 | gpiod_err(desc, | |
4656 | "both pull-up and pull-down enabled, invalid configuration\n"); | |
4657 | return -EINVAL; | |
4658 | } | |
4659 | ||
4660 | if (lflags & GPIO_PULL_UP) | |
4661 | set_bit(FLAG_PULL_UP, &desc->flags); | |
4662 | else if (lflags & GPIO_PULL_DOWN) | |
4663 | set_bit(FLAG_PULL_DOWN, &desc->flags); | |
4664 | ||
d377f56f LW |
4665 | ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY)); |
4666 | if (ret < 0) | |
4667 | return ret; | |
85b03b30 | 4668 | |
f625d460 BP |
4669 | /* No particular flag request, return here... */ |
4670 | if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) { | |
4671 | pr_debug("no flags found for %s\n", con_id); | |
4672 | return 0; | |
4673 | } | |
4674 | ||
4675 | /* Process flags */ | |
4676 | if (dflags & GPIOD_FLAGS_BIT_DIR_OUT) | |
d377f56f | 4677 | ret = gpiod_direction_output(desc, |
ad17731d | 4678 | !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL)); |
f625d460 | 4679 | else |
d377f56f | 4680 | ret = gpiod_direction_input(desc); |
f625d460 | 4681 | |
d377f56f | 4682 | return ret; |
f625d460 BP |
4683 | } |
4684 | ||
bae48da2 AC |
4685 | /** |
4686 | * gpiod_get_index - obtain a GPIO from a multi-index GPIO function | |
fdd6a5fe | 4687 | * @dev: GPIO consumer, can be NULL for system-global GPIOs |
bae48da2 AC |
4688 | * @con_id: function within the GPIO consumer |
4689 | * @idx: index of the GPIO to obtain in the consumer | |
39b2bbe3 | 4690 | * @flags: optional GPIO initialization flags |
bae48da2 AC |
4691 | * |
4692 | * This variant of gpiod_get() allows to access GPIOs other than the first | |
4693 | * defined one for functions that define several GPIOs. | |
4694 | * | |
2a3cf6a3 AC |
4695 | * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the |
4696 | * requested function and/or index, or another IS_ERR() code if an error | |
20a8a968 | 4697 | * occurred while trying to acquire the GPIO. |
bae48da2 | 4698 | */ |
b17d1bf1 | 4699 | struct gpio_desc *__must_check gpiod_get_index(struct device *dev, |
bae48da2 | 4700 | const char *con_id, |
39b2bbe3 AC |
4701 | unsigned int idx, |
4702 | enum gpiod_flags flags) | |
bae48da2 | 4703 | { |
2d6c06f5 | 4704 | unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT; |
35c5d7fd | 4705 | struct gpio_desc *desc = NULL; |
d377f56f | 4706 | int ret; |
7d18f0a1 LW |
4707 | /* Maybe we have a device name, maybe not */ |
4708 | const char *devname = dev ? dev_name(dev) : "?"; | |
bae48da2 AC |
4709 | |
4710 | dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id); | |
4711 | ||
4d8440b9 RW |
4712 | if (dev) { |
4713 | /* Using device tree? */ | |
4714 | if (IS_ENABLED(CONFIG_OF) && dev->of_node) { | |
4715 | dev_dbg(dev, "using device tree for GPIO lookup\n"); | |
4716 | desc = of_find_gpio(dev, con_id, idx, &lookupflags); | |
4717 | } else if (ACPI_COMPANION(dev)) { | |
4718 | dev_dbg(dev, "using ACPI for GPIO lookup\n"); | |
a31f5c3a | 4719 | desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags); |
4d8440b9 | 4720 | } |
35c5d7fd AC |
4721 | } |
4722 | ||
4723 | /* | |
4724 | * Either we are not using DT or ACPI, or their lookup did not return | |
4725 | * a result. In that case, use platform lookup as a fallback. | |
4726 | */ | |
2a3cf6a3 | 4727 | if (!desc || desc == ERR_PTR(-ENOENT)) { |
43a8785a | 4728 | dev_dbg(dev, "using lookup tables for GPIO lookup\n"); |
39b2bbe3 | 4729 | desc = gpiod_find(dev, con_id, idx, &lookupflags); |
bae48da2 AC |
4730 | } |
4731 | ||
4732 | if (IS_ERR(desc)) { | |
9d5a1f2c | 4733 | dev_dbg(dev, "No GPIO consumer %s found\n", con_id); |
bae48da2 AC |
4734 | return desc; |
4735 | } | |
4736 | ||
7d18f0a1 LW |
4737 | /* |
4738 | * If a connection label was passed use that, else attempt to use | |
4739 | * the device name as label | |
4740 | */ | |
d377f56f LW |
4741 | ret = gpiod_request(desc, con_id ? con_id : devname); |
4742 | if (ret < 0) { | |
4743 | if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) { | |
b0ce7b29 LW |
4744 | /* |
4745 | * This happens when there are several consumers for | |
4746 | * the same GPIO line: we just return here without | |
4747 | * further initialization. It is a bit if a hack. | |
4748 | * This is necessary to support fixed regulators. | |
4749 | * | |
4750 | * FIXME: Make this more sane and safe. | |
4751 | */ | |
4752 | dev_info(dev, "nonexclusive access to GPIO for %s\n", | |
4753 | con_id ? con_id : devname); | |
4754 | return desc; | |
4755 | } else { | |
d377f56f | 4756 | return ERR_PTR(ret); |
b0ce7b29 LW |
4757 | } |
4758 | } | |
bae48da2 | 4759 | |
d377f56f | 4760 | ret = gpiod_configure_flags(desc, con_id, lookupflags, flags); |
6392cca4 | 4761 | if (ret < 0) { |
39b2bbe3 | 4762 | dev_dbg(dev, "setup of GPIO %s failed\n", con_id); |
6392cca4 LW |
4763 | gpiod_put(desc); |
4764 | return ERR_PTR(ret); | |
4765 | } | |
4766 | ||
4767 | return desc; | |
4768 | } | |
b17d1bf1 | 4769 | EXPORT_SYMBOL_GPL(gpiod_get_index); |
6392cca4 | 4770 | |
40b73183 MW |
4771 | /** |
4772 | * fwnode_get_named_gpiod - obtain a GPIO from firmware node | |
4773 | * @fwnode: handle of the firmware node | |
4774 | * @propname: name of the firmware property representing the GPIO | |
6392cca4 | 4775 | * @index: index of the GPIO to obtain for the consumer |
a264d10f | 4776 | * @dflags: GPIO initialization flags |
950d55f5 | 4777 | * @label: label to attach to the requested GPIO |
40b73183 MW |
4778 | * |
4779 | * This function can be used for drivers that get their configuration | |
6392cca4 | 4780 | * from opaque firmware. |
40b73183 | 4781 | * |
6392cca4 | 4782 | * The function properly finds the corresponding GPIO using whatever is the |
40b73183 MW |
4783 | * underlying firmware interface and then makes sure that the GPIO |
4784 | * descriptor is requested before it is returned to the caller. | |
4785 | * | |
950d55f5 | 4786 | * Returns: |
ff21378a | 4787 | * On successful request the GPIO pin is configured in accordance with |
a264d10f AS |
4788 | * provided @dflags. |
4789 | * | |
40b73183 MW |
4790 | * In case of error an ERR_PTR() is returned. |
4791 | */ | |
4792 | struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode, | |
537b94da | 4793 | const char *propname, int index, |
b2987d74 AS |
4794 | enum gpiod_flags dflags, |
4795 | const char *label) | |
40b73183 | 4796 | { |
2d6c06f5 | 4797 | unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT; |
40b73183 | 4798 | struct gpio_desc *desc = ERR_PTR(-ENODEV); |
40b73183 MW |
4799 | int ret; |
4800 | ||
4801 | if (!fwnode) | |
4802 | return ERR_PTR(-EINVAL); | |
4803 | ||
4804 | if (is_of_node(fwnode)) { | |
6392cca4 LW |
4805 | desc = gpiod_get_from_of_node(to_of_node(fwnode), |
4806 | propname, index, | |
4807 | dflags, | |
4808 | label); | |
4809 | return desc; | |
40b73183 MW |
4810 | } else if (is_acpi_node(fwnode)) { |
4811 | struct acpi_gpio_info info; | |
4812 | ||
537b94da | 4813 | desc = acpi_node_get_gpiod(fwnode, propname, index, &info); |
6392cca4 LW |
4814 | if (IS_ERR(desc)) |
4815 | return desc; | |
40b73183 | 4816 | |
6392cca4 | 4817 | acpi_gpio_update_gpiod_flags(&dflags, &info); |
606be344 | 4818 | acpi_gpio_update_gpiod_lookup_flags(&lflags, &info); |
6392cca4 | 4819 | } |
40b73183 | 4820 | |
6392cca4 | 4821 | /* Currently only ACPI takes this path */ |
b2987d74 | 4822 | ret = gpiod_request(desc, label); |
85b03b30 JH |
4823 | if (ret) |
4824 | return ERR_PTR(ret); | |
4825 | ||
a264d10f AS |
4826 | ret = gpiod_configure_flags(desc, propname, lflags, dflags); |
4827 | if (ret < 0) { | |
4828 | gpiod_put(desc); | |
4829 | return ERR_PTR(ret); | |
90b665f6 LP |
4830 | } |
4831 | ||
40b73183 MW |
4832 | return desc; |
4833 | } | |
4834 | EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod); | |
4835 | ||
29a1f233 TR |
4836 | /** |
4837 | * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO | |
4838 | * function | |
4839 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4840 | * @con_id: function within the GPIO consumer | |
4841 | * @index: index of the GPIO to obtain in the consumer | |
39b2bbe3 | 4842 | * @flags: optional GPIO initialization flags |
29a1f233 TR |
4843 | * |
4844 | * This is equivalent to gpiod_get_index(), except that when no GPIO with the | |
4845 | * specified index was assigned to the requested function it will return NULL. | |
4846 | * This is convenient for drivers that need to handle optional GPIOs. | |
4847 | */ | |
b17d1bf1 | 4848 | struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev, |
29a1f233 | 4849 | const char *con_id, |
39b2bbe3 AC |
4850 | unsigned int index, |
4851 | enum gpiod_flags flags) | |
29a1f233 TR |
4852 | { |
4853 | struct gpio_desc *desc; | |
4854 | ||
39b2bbe3 | 4855 | desc = gpiod_get_index(dev, con_id, index, flags); |
29a1f233 TR |
4856 | if (IS_ERR(desc)) { |
4857 | if (PTR_ERR(desc) == -ENOENT) | |
4858 | return NULL; | |
4859 | } | |
4860 | ||
4861 | return desc; | |
4862 | } | |
b17d1bf1 | 4863 | EXPORT_SYMBOL_GPL(gpiod_get_index_optional); |
29a1f233 | 4864 | |
f625d460 BP |
4865 | /** |
4866 | * gpiod_hog - Hog the specified GPIO desc given the provided flags | |
4867 | * @desc: gpio whose value will be assigned | |
4868 | * @name: gpio line name | |
fed7026a AS |
4869 | * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from |
4870 | * of_find_gpio() or of_get_gpio_hog() | |
f625d460 BP |
4871 | * @dflags: gpiod_flags - optional GPIO initialization flags |
4872 | */ | |
4873 | int gpiod_hog(struct gpio_desc *desc, const char *name, | |
4874 | unsigned long lflags, enum gpiod_flags dflags) | |
4875 | { | |
4876 | struct gpio_chip *chip; | |
4877 | struct gpio_desc *local_desc; | |
4878 | int hwnum; | |
d377f56f | 4879 | int ret; |
f625d460 BP |
4880 | |
4881 | chip = gpiod_to_chip(desc); | |
4882 | hwnum = gpio_chip_hwgpio(desc); | |
4883 | ||
5923ea6c LW |
4884 | local_desc = gpiochip_request_own_desc(chip, hwnum, name, |
4885 | lflags, dflags); | |
f625d460 | 4886 | if (IS_ERR(local_desc)) { |
d377f56f | 4887 | ret = PTR_ERR(local_desc); |
c31a571d | 4888 | pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n", |
d377f56f LW |
4889 | name, chip->label, hwnum, ret); |
4890 | return ret; | |
f625d460 BP |
4891 | } |
4892 | ||
f625d460 BP |
4893 | /* Mark GPIO as hogged so it can be identified and removed later */ |
4894 | set_bit(FLAG_IS_HOGGED, &desc->flags); | |
4895 | ||
4896 | pr_info("GPIO line %d (%s) hogged as %s%s\n", | |
4897 | desc_to_gpio(desc), name, | |
b27f300f BG |
4898 | (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input", |
4899 | (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? | |
4900 | (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : ""); | |
f625d460 BP |
4901 | |
4902 | return 0; | |
4903 | } | |
4904 | ||
4905 | /** | |
4906 | * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog | |
4907 | * @chip: gpio chip to act on | |
f625d460 BP |
4908 | */ |
4909 | static void gpiochip_free_hogs(struct gpio_chip *chip) | |
4910 | { | |
4911 | int id; | |
4912 | ||
4913 | for (id = 0; id < chip->ngpio; id++) { | |
1c3cdb18 LW |
4914 | if (test_bit(FLAG_IS_HOGGED, &chip->gpiodev->descs[id].flags)) |
4915 | gpiochip_free_own_desc(&chip->gpiodev->descs[id]); | |
f625d460 BP |
4916 | } |
4917 | } | |
4918 | ||
66858527 RI |
4919 | /** |
4920 | * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function | |
4921 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4922 | * @con_id: function within the GPIO consumer | |
4923 | * @flags: optional GPIO initialization flags | |
4924 | * | |
4925 | * This function acquires all the GPIOs defined under a given function. | |
4926 | * | |
4927 | * Return a struct gpio_descs containing an array of descriptors, -ENOENT if | |
4928 | * no GPIO has been assigned to the requested function, or another IS_ERR() | |
4929 | * code if an error occurred while trying to acquire the GPIOs. | |
4930 | */ | |
4931 | struct gpio_descs *__must_check gpiod_get_array(struct device *dev, | |
4932 | const char *con_id, | |
4933 | enum gpiod_flags flags) | |
4934 | { | |
4935 | struct gpio_desc *desc; | |
4936 | struct gpio_descs *descs; | |
bf9346f5 JK |
4937 | struct gpio_array *array_info = NULL; |
4938 | struct gpio_chip *chip; | |
4939 | int count, bitmap_size; | |
66858527 RI |
4940 | |
4941 | count = gpiod_count(dev, con_id); | |
4942 | if (count < 0) | |
4943 | return ERR_PTR(count); | |
4944 | ||
acafe7e3 | 4945 | descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL); |
66858527 RI |
4946 | if (!descs) |
4947 | return ERR_PTR(-ENOMEM); | |
4948 | ||
4949 | for (descs->ndescs = 0; descs->ndescs < count; ) { | |
4950 | desc = gpiod_get_index(dev, con_id, descs->ndescs, flags); | |
4951 | if (IS_ERR(desc)) { | |
4952 | gpiod_put_array(descs); | |
4953 | return ERR_CAST(desc); | |
4954 | } | |
bf9346f5 | 4955 | |
66858527 | 4956 | descs->desc[descs->ndescs] = desc; |
bf9346f5 JK |
4957 | |
4958 | chip = gpiod_to_chip(desc); | |
4959 | /* | |
c4c958aa JK |
4960 | * If pin hardware number of array member 0 is also 0, select |
4961 | * its chip as a candidate for fast bitmap processing path. | |
bf9346f5 | 4962 | */ |
c4c958aa | 4963 | if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) { |
bf9346f5 JK |
4964 | struct gpio_descs *array; |
4965 | ||
4966 | bitmap_size = BITS_TO_LONGS(chip->ngpio > count ? | |
4967 | chip->ngpio : count); | |
4968 | ||
4969 | array = kzalloc(struct_size(descs, desc, count) + | |
4970 | struct_size(array_info, invert_mask, | |
4971 | 3 * bitmap_size), GFP_KERNEL); | |
4972 | if (!array) { | |
4973 | gpiod_put_array(descs); | |
4974 | return ERR_PTR(-ENOMEM); | |
4975 | } | |
4976 | ||
4977 | memcpy(array, descs, | |
4978 | struct_size(descs, desc, descs->ndescs + 1)); | |
4979 | kfree(descs); | |
4980 | ||
4981 | descs = array; | |
4982 | array_info = (void *)(descs->desc + count); | |
4983 | array_info->get_mask = array_info->invert_mask + | |
4984 | bitmap_size; | |
4985 | array_info->set_mask = array_info->get_mask + | |
4986 | bitmap_size; | |
4987 | ||
4988 | array_info->desc = descs->desc; | |
4989 | array_info->size = count; | |
4990 | array_info->chip = chip; | |
4991 | bitmap_set(array_info->get_mask, descs->ndescs, | |
4992 | count - descs->ndescs); | |
4993 | bitmap_set(array_info->set_mask, descs->ndescs, | |
4994 | count - descs->ndescs); | |
4995 | descs->info = array_info; | |
4996 | } | |
c4c958aa JK |
4997 | /* Unmark array members which don't belong to the 'fast' chip */ |
4998 | if (array_info && array_info->chip != chip) { | |
bf9346f5 JK |
4999 | __clear_bit(descs->ndescs, array_info->get_mask); |
5000 | __clear_bit(descs->ndescs, array_info->set_mask); | |
c4c958aa JK |
5001 | } |
5002 | /* | |
5003 | * Detect array members which belong to the 'fast' chip | |
5004 | * but their pins are not in hardware order. | |
5005 | */ | |
5006 | else if (array_info && | |
5007 | gpio_chip_hwgpio(desc) != descs->ndescs) { | |
5008 | /* | |
5009 | * Don't use fast path if all array members processed so | |
5010 | * far belong to the same chip as this one but its pin | |
5011 | * hardware number is different from its array index. | |
5012 | */ | |
5013 | if (bitmap_full(array_info->get_mask, descs->ndescs)) { | |
5014 | array_info = NULL; | |
5015 | } else { | |
5016 | __clear_bit(descs->ndescs, | |
5017 | array_info->get_mask); | |
5018 | __clear_bit(descs->ndescs, | |
5019 | array_info->set_mask); | |
5020 | } | |
bf9346f5 JK |
5021 | } else if (array_info) { |
5022 | /* Exclude open drain or open source from fast output */ | |
5023 | if (gpiochip_line_is_open_drain(chip, descs->ndescs) || | |
5024 | gpiochip_line_is_open_source(chip, descs->ndescs)) | |
5025 | __clear_bit(descs->ndescs, | |
5026 | array_info->set_mask); | |
5027 | /* Identify 'fast' pins which require invertion */ | |
5028 | if (gpiod_is_active_low(desc)) | |
5029 | __set_bit(descs->ndescs, | |
5030 | array_info->invert_mask); | |
5031 | } | |
5032 | ||
66858527 RI |
5033 | descs->ndescs++; |
5034 | } | |
bf9346f5 JK |
5035 | if (array_info) |
5036 | dev_dbg(dev, | |
5037 | "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n", | |
5038 | array_info->chip->label, array_info->size, | |
5039 | *array_info->get_mask, *array_info->set_mask, | |
5040 | *array_info->invert_mask); | |
66858527 RI |
5041 | return descs; |
5042 | } | |
5043 | EXPORT_SYMBOL_GPL(gpiod_get_array); | |
5044 | ||
5045 | /** | |
5046 | * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO | |
5047 | * function | |
5048 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
5049 | * @con_id: function within the GPIO consumer | |
5050 | * @flags: optional GPIO initialization flags | |
5051 | * | |
5052 | * This is equivalent to gpiod_get_array(), except that when no GPIO was | |
5053 | * assigned to the requested function it will return NULL. | |
5054 | */ | |
5055 | struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev, | |
5056 | const char *con_id, | |
5057 | enum gpiod_flags flags) | |
5058 | { | |
5059 | struct gpio_descs *descs; | |
5060 | ||
5061 | descs = gpiod_get_array(dev, con_id, flags); | |
45586c70 | 5062 | if (PTR_ERR(descs) == -ENOENT) |
66858527 RI |
5063 | return NULL; |
5064 | ||
5065 | return descs; | |
5066 | } | |
5067 | EXPORT_SYMBOL_GPL(gpiod_get_array_optional); | |
5068 | ||
bae48da2 AC |
5069 | /** |
5070 | * gpiod_put - dispose of a GPIO descriptor | |
5071 | * @desc: GPIO descriptor to dispose of | |
5072 | * | |
5073 | * No descriptor can be used after gpiod_put() has been called on it. | |
5074 | */ | |
5075 | void gpiod_put(struct gpio_desc *desc) | |
5076 | { | |
1d7765ba AS |
5077 | if (desc) |
5078 | gpiod_free(desc); | |
372e722e | 5079 | } |
bae48da2 | 5080 | EXPORT_SYMBOL_GPL(gpiod_put); |
d2876d08 | 5081 | |
66858527 RI |
5082 | /** |
5083 | * gpiod_put_array - dispose of multiple GPIO descriptors | |
5084 | * @descs: struct gpio_descs containing an array of descriptors | |
5085 | */ | |
5086 | void gpiod_put_array(struct gpio_descs *descs) | |
5087 | { | |
5088 | unsigned int i; | |
5089 | ||
5090 | for (i = 0; i < descs->ndescs; i++) | |
5091 | gpiod_put(descs->desc[i]); | |
5092 | ||
5093 | kfree(descs); | |
5094 | } | |
5095 | EXPORT_SYMBOL_GPL(gpiod_put_array); | |
5096 | ||
3c702e99 LW |
5097 | static int __init gpiolib_dev_init(void) |
5098 | { | |
5099 | int ret; | |
5100 | ||
5101 | /* Register GPIO sysfs bus */ | |
b1911710 | 5102 | ret = bus_register(&gpio_bus_type); |
3c702e99 LW |
5103 | if (ret < 0) { |
5104 | pr_err("gpiolib: could not register GPIO bus type\n"); | |
5105 | return ret; | |
5106 | } | |
5107 | ||
ddd8891e | 5108 | ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME); |
3c702e99 LW |
5109 | if (ret < 0) { |
5110 | pr_err("gpiolib: failed to allocate char dev region\n"); | |
5111 | bus_unregister(&gpio_bus_type); | |
159f3cd9 GR |
5112 | } else { |
5113 | gpiolib_initialized = true; | |
5114 | gpiochip_setup_devs(); | |
3c702e99 LW |
5115 | } |
5116 | return ret; | |
5117 | } | |
5118 | core_initcall(gpiolib_dev_init); | |
5119 | ||
d2876d08 DB |
5120 | #ifdef CONFIG_DEBUG_FS |
5121 | ||
fdeb8e15 | 5122 | static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev) |
d2876d08 DB |
5123 | { |
5124 | unsigned i; | |
fdeb8e15 LW |
5125 | struct gpio_chip *chip = gdev->chip; |
5126 | unsigned gpio = gdev->base; | |
5127 | struct gpio_desc *gdesc = &gdev->descs[0]; | |
90fd2270 LW |
5128 | bool is_out; |
5129 | bool is_irq; | |
5130 | bool active_low; | |
d2876d08 | 5131 | |
fdeb8e15 | 5132 | for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) { |
ced433e2 MP |
5133 | if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) { |
5134 | if (gdesc->name) { | |
5135 | seq_printf(s, " gpio-%-3d (%-20.20s)\n", | |
5136 | gpio, gdesc->name); | |
5137 | } | |
d2876d08 | 5138 | continue; |
ced433e2 | 5139 | } |
d2876d08 | 5140 | |
372e722e | 5141 | gpiod_get_direction(gdesc); |
d2876d08 | 5142 | is_out = test_bit(FLAG_IS_OUT, &gdesc->flags); |
d468bf9e | 5143 | is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags); |
90fd2270 LW |
5144 | active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags); |
5145 | seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s", | |
ced433e2 | 5146 | gpio, gdesc->name ? gdesc->name : "", gdesc->label, |
d2876d08 | 5147 | is_out ? "out" : "in ", |
1c22a252 | 5148 | chip->get ? (chip->get(chip, i) ? "hi" : "lo") : "? ", |
90fd2270 LW |
5149 | is_irq ? "IRQ " : "", |
5150 | active_low ? "ACTIVE LOW" : ""); | |
d2876d08 DB |
5151 | seq_printf(s, "\n"); |
5152 | } | |
5153 | } | |
5154 | ||
f9c4a31f | 5155 | static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos) |
d2876d08 | 5156 | { |
362432ae | 5157 | unsigned long flags; |
ff2b1359 | 5158 | struct gpio_device *gdev = NULL; |
cb1650d4 | 5159 | loff_t index = *pos; |
d2876d08 | 5160 | |
f9c4a31f | 5161 | s->private = ""; |
d2876d08 | 5162 | |
362432ae | 5163 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 5164 | list_for_each_entry(gdev, &gpio_devices, list) |
362432ae GL |
5165 | if (index-- == 0) { |
5166 | spin_unlock_irqrestore(&gpio_lock, flags); | |
ff2b1359 | 5167 | return gdev; |
f9c4a31f | 5168 | } |
362432ae | 5169 | spin_unlock_irqrestore(&gpio_lock, flags); |
f9c4a31f | 5170 | |
cb1650d4 | 5171 | return NULL; |
f9c4a31f TR |
5172 | } |
5173 | ||
5174 | static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos) | |
5175 | { | |
362432ae | 5176 | unsigned long flags; |
ff2b1359 | 5177 | struct gpio_device *gdev = v; |
f9c4a31f TR |
5178 | void *ret = NULL; |
5179 | ||
362432ae | 5180 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 5181 | if (list_is_last(&gdev->list, &gpio_devices)) |
cb1650d4 AC |
5182 | ret = NULL; |
5183 | else | |
ff2b1359 | 5184 | ret = list_entry(gdev->list.next, struct gpio_device, list); |
362432ae | 5185 | spin_unlock_irqrestore(&gpio_lock, flags); |
f9c4a31f TR |
5186 | |
5187 | s->private = "\n"; | |
5188 | ++*pos; | |
5189 | ||
5190 | return ret; | |
5191 | } | |
5192 | ||
5193 | static void gpiolib_seq_stop(struct seq_file *s, void *v) | |
5194 | { | |
5195 | } | |
5196 | ||
5197 | static int gpiolib_seq_show(struct seq_file *s, void *v) | |
5198 | { | |
ff2b1359 LW |
5199 | struct gpio_device *gdev = v; |
5200 | struct gpio_chip *chip = gdev->chip; | |
5201 | struct device *parent; | |
5202 | ||
5203 | if (!chip) { | |
5204 | seq_printf(s, "%s%s: (dangling chip)", (char *)s->private, | |
5205 | dev_name(&gdev->dev)); | |
5206 | return 0; | |
5207 | } | |
f9c4a31f | 5208 | |
ff2b1359 LW |
5209 | seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private, |
5210 | dev_name(&gdev->dev), | |
fdeb8e15 | 5211 | gdev->base, gdev->base + gdev->ngpio - 1); |
ff2b1359 LW |
5212 | parent = chip->parent; |
5213 | if (parent) | |
5214 | seq_printf(s, ", parent: %s/%s", | |
5215 | parent->bus ? parent->bus->name : "no-bus", | |
5216 | dev_name(parent)); | |
f9c4a31f TR |
5217 | if (chip->label) |
5218 | seq_printf(s, ", %s", chip->label); | |
5219 | if (chip->can_sleep) | |
5220 | seq_printf(s, ", can sleep"); | |
5221 | seq_printf(s, ":\n"); | |
5222 | ||
5223 | if (chip->dbg_show) | |
5224 | chip->dbg_show(s, chip); | |
5225 | else | |
fdeb8e15 | 5226 | gpiolib_dbg_show(s, gdev); |
f9c4a31f | 5227 | |
d2876d08 DB |
5228 | return 0; |
5229 | } | |
5230 | ||
f9c4a31f TR |
5231 | static const struct seq_operations gpiolib_seq_ops = { |
5232 | .start = gpiolib_seq_start, | |
5233 | .next = gpiolib_seq_next, | |
5234 | .stop = gpiolib_seq_stop, | |
5235 | .show = gpiolib_seq_show, | |
5236 | }; | |
5237 | ||
d2876d08 DB |
5238 | static int gpiolib_open(struct inode *inode, struct file *file) |
5239 | { | |
f9c4a31f | 5240 | return seq_open(file, &gpiolib_seq_ops); |
d2876d08 DB |
5241 | } |
5242 | ||
828c0950 | 5243 | static const struct file_operations gpiolib_operations = { |
f9c4a31f | 5244 | .owner = THIS_MODULE, |
d2876d08 DB |
5245 | .open = gpiolib_open, |
5246 | .read = seq_read, | |
5247 | .llseek = seq_lseek, | |
f9c4a31f | 5248 | .release = seq_release, |
d2876d08 DB |
5249 | }; |
5250 | ||
5251 | static int __init gpiolib_debugfs_init(void) | |
5252 | { | |
5253 | /* /sys/kernel/debug/gpio */ | |
acc68b0e GKH |
5254 | debugfs_create_file("gpio", S_IFREG | S_IRUGO, NULL, NULL, |
5255 | &gpiolib_operations); | |
d2876d08 DB |
5256 | return 0; |
5257 | } | |
5258 | subsys_initcall(gpiolib_debugfs_init); | |
5259 | ||
5260 | #endif /* DEBUG_FS */ |