gpio: sim: implement the dbg_show() callback
[linux-block.git] / drivers / gpio / gpiolib.c
CommitLineData
dae5f0af 1// SPDX-License-Identifier: GPL-2.0
c47d9e1b 2
79aabb1e 3#include <linux/acpi.h>
923a654c 4#include <linux/bitmap.h>
79aabb1e
AS
5#include <linux/compat.h>
6#include <linux/debugfs.h>
d8f388d8
DB
7#include <linux/device.h>
8#include <linux/err.h>
380c7ba3 9#include <linux/errno.h>
79aabb1e
AS
10#include <linux/file.h>
11#include <linux/fs.h>
79aabb1e
AS
12#include <linux/idr.h>
13#include <linux/interrupt.h>
14#include <linux/irq.h>
15#include <linux/kernel.h>
16#include <linux/list.h>
17#include <linux/module.h>
380c7ba3 18#include <linux/of.h>
c771c2f4 19#include <linux/pinctrl/consumer.h>
79aabb1e
AS
20#include <linux/seq_file.h>
21#include <linux/slab.h>
22#include <linux/spinlock.h>
d62fcd9f 23#include <linux/string.h>
79aabb1e 24
380c7ba3
AS
25#include <linux/gpio.h>
26#include <linux/gpio/driver.h>
27#include <linux/gpio/machine.h>
28
3c702e99 29#include <uapi/linux/gpio.h>
d2876d08 30
77cb907a 31#include "gpiolib-acpi.h"
925ca369 32#include "gpiolib-cdev.h"
79aabb1e
AS
33#include "gpiolib-of.h"
34#include "gpiolib-swnode.h"
ef087d8e 35#include "gpiolib-sysfs.h"
79aabb1e 36#include "gpiolib.h"
664e3e5a 37
3f397c21
UKK
38#define CREATE_TRACE_POINTS
39#include <trace/events/gpio.h>
d2876d08 40
79a9becd 41/* Implementation infrastructure for GPIO interfaces.
d2876d08 42 *
79a9becd
AC
43 * The GPIO programming interface allows for inlining speed-critical
44 * get/set operations for common cases, so that access to SOC-integrated
45 * GPIOs can sometimes cost only an instruction or two per bit.
d2876d08
DB
46 */
47
48
49/* When debugging, extend minimal trust to callers and platform code.
50 * Also emit diagnostic messages that may help initial bringup, when
51 * board setup or driver bugs are most common.
52 *
53 * Otherwise, minimize overhead in what may be bitbanging codepaths.
54 */
55#ifdef DEBUG
56#define extra_checks 1
57#else
58#define extra_checks 0
59#endif
60
ff2b1359
LW
61/* Device and char device-related information */
62static DEFINE_IDA(gpio_ida);
3c702e99
LW
63static dev_t gpio_devt;
64#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
c135f401
AS
65
66static int gpio_bus_match(struct device *dev, struct device_driver *drv)
67{
68 struct fwnode_handle *fwnode = dev_fwnode(dev);
69
70 /*
71 * Only match if the fwnode doesn't already have a proper struct device
72 * created for it.
73 */
74 if (fwnode && fwnode->dev != dev)
75 return 0;
76 return 1;
77}
78
3c702e99
LW
79static struct bus_type gpio_bus_type = {
80 .name = "gpio",
ced2af41 81 .match = gpio_bus_match,
3c702e99 82};
ff2b1359 83
3027743f
LA
84/*
85 * Number of GPIOs to use for the fast path in set array
86 */
87#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
88
d2876d08
DB
89/* gpio_lock prevents conflicts during gpio_desc[] table updates.
90 * While any GPIO is requested, its gpio_chip is not removable;
91 * each GPIO's "requested" flag serves as a lock and refcount.
92 */
0eb4c6c2 93DEFINE_SPINLOCK(gpio_lock);
d2876d08 94
bae48da2
AC
95static DEFINE_MUTEX(gpio_lookup_lock);
96static LIST_HEAD(gpio_lookup_list);
ff2b1359 97LIST_HEAD(gpio_devices);
6d86750c 98
a411e81e
BG
99static DEFINE_MUTEX(gpio_machine_hogs_mutex);
100static LIST_HEAD(gpio_machine_hogs);
101
a0b66a73
LW
102static void gpiochip_free_hogs(struct gpio_chip *gc);
103static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
104 struct lock_class_key *lock_key,
105 struct lock_class_key *request_key);
a0b66a73
LW
106static void gpiochip_irqchip_remove(struct gpio_chip *gc);
107static int gpiochip_irqchip_init_hw(struct gpio_chip *gc);
108static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc);
109static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc);
6d86750c 110
159f3cd9 111static bool gpiolib_initialized;
6d86750c 112
d2876d08
DB
113static inline void desc_set_label(struct gpio_desc *d, const char *label)
114{
d2876d08 115 d->label = label;
d2876d08
DB
116}
117
372e722e 118/**
950d55f5
TR
119 * gpio_to_desc - Convert a GPIO number to its descriptor
120 * @gpio: global GPIO number
121 *
122 * Returns:
123 * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
124 * with the given number exists in the system.
372e722e 125 */
79a9becd 126struct gpio_desc *gpio_to_desc(unsigned gpio)
372e722e 127{
ff2b1359 128 struct gpio_device *gdev;
14e85c0e
AC
129 unsigned long flags;
130
131 spin_lock_irqsave(&gpio_lock, flags);
132
ff2b1359 133 list_for_each_entry(gdev, &gpio_devices, list) {
fdeb8e15
LW
134 if (gdev->base <= gpio &&
135 gdev->base + gdev->ngpio > gpio) {
14e85c0e 136 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 137 return &gdev->descs[gpio - gdev->base];
14e85c0e
AC
138 }
139 }
140
141 spin_unlock_irqrestore(&gpio_lock, flags);
142
0e9a5edf 143 if (!gpio_is_valid(gpio))
c47d9e1b 144 pr_warn("invalid GPIO %d\n", gpio);
0e9a5edf 145
14e85c0e 146 return NULL;
372e722e 147}
79a9becd 148EXPORT_SYMBOL_GPL(gpio_to_desc);
372e722e 149
93548f8b
BG
150/* This function is deprecated and will be removed soon, don't use. */
151struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc,
152 unsigned int hwnum)
153{
154 return gpio_device_get_desc(gc->gpiodev, hwnum);
155}
156EXPORT_SYMBOL_GPL(gpiochip_get_desc);
157
d468bf9e 158/**
93548f8b
BG
159 * gpio_device_get_desc() - get the GPIO descriptor corresponding to the given
160 * hardware number for this GPIO device
161 * @gdev: GPIO device to get the descriptor from
950d55f5
TR
162 * @hwnum: hardware number of the GPIO for this chip
163 *
164 * Returns:
93548f8b
BG
165 * A pointer to the GPIO descriptor or %EINVAL if no GPIO exists in the given
166 * chip for the specified hardware number or %ENODEV if the underlying chip
167 * already vanished.
168 *
169 * The reference count of struct gpio_device is *NOT* increased like when the
170 * GPIO is being requested for exclusive usage. It's up to the caller to make
171 * sure the GPIO device will stay alive together with the descriptor returned
172 * by this function.
d468bf9e 173 */
93548f8b
BG
174struct gpio_desc *
175gpio_device_get_desc(struct gpio_device *gdev, unsigned int hwnum)
d468bf9e 176{
93548f8b
BG
177 struct gpio_chip *gc;
178
179 /*
180 * FIXME: This will be locked once we protect gdev->chip everywhere
181 * with SRCU.
182 */
183 gc = gdev->chip;
184 if (!gc)
185 return ERR_PTR(-ENODEV);
fdeb8e15
LW
186
187 if (hwnum >= gdev->ngpio)
b7d0a28a 188 return ERR_PTR(-EINVAL);
d468bf9e 189
fdeb8e15 190 return &gdev->descs[hwnum];
d468bf9e 191}
93548f8b 192EXPORT_SYMBOL_GPL(gpio_device_get_desc);
372e722e
AC
193
194/**
950d55f5
TR
195 * desc_to_gpio - convert a GPIO descriptor to the integer namespace
196 * @desc: GPIO descriptor
197 *
372e722e 198 * This should disappear in the future but is needed since we still
950d55f5
TR
199 * use GPIO numbers for error messages and sysfs nodes.
200 *
201 * Returns:
202 * The global GPIO number for the GPIO specified by its descriptor.
372e722e 203 */
79a9becd 204int desc_to_gpio(const struct gpio_desc *desc)
372e722e 205{
fdeb8e15 206 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
372e722e 207}
79a9becd 208EXPORT_SYMBOL_GPL(desc_to_gpio);
372e722e
AC
209
210
79a9becd
AC
211/**
212 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
213 * @desc: descriptor to return the chip of
214 */
215struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
372e722e 216{
dd3b9a44 217 if (!desc || !desc->gdev)
fdeb8e15
LW
218 return NULL;
219 return desc->gdev->chip;
372e722e 220}
79a9becd 221EXPORT_SYMBOL_GPL(gpiod_to_chip);
d2876d08 222
370232d0
BG
223/**
224 * gpiod_to_gpio_device() - Return the GPIO device to which this descriptor
225 * belongs.
226 * @desc: Descriptor for which to return the GPIO device.
227 *
228 * This *DOES NOT* increase the reference count of the GPIO device as it's
229 * expected that the descriptor is requested and the users already holds a
230 * reference to the device.
231 *
232 * Returns:
233 * Address of the GPIO device owning this descriptor.
234 */
235struct gpio_device *gpiod_to_gpio_device(struct gpio_desc *desc)
236{
237 if (!desc)
238 return NULL;
239
240 return desc->gdev;
241}
242EXPORT_SYMBOL_GPL(gpiod_to_gpio_device);
243
8c85a102
BG
244/**
245 * gpio_device_get_base() - Get the base GPIO number allocated by this device
246 * @gdev: GPIO device
247 *
248 * Returns:
249 * First GPIO number in the global GPIO numberspace for this device.
250 */
251int gpio_device_get_base(struct gpio_device *gdev)
252{
253 return gdev->base;
254}
255EXPORT_SYMBOL_GPL(gpio_device_get_base);
256
d1f77282
BG
257/**
258 * gpio_device_get_label() - Get the label of this GPIO device
259 * @gdev: GPIO device
260 *
261 * Returns:
262 * Pointer to the string containing the GPIO device label. The string's
263 * lifetime is tied to that of the underlying GPIO device.
264 */
265const char *gpio_device_get_label(struct gpio_device *gdev)
266{
267 return gdev->label;
268}
269EXPORT_SYMBOL(gpio_device_get_label);
270
9b418780
BG
271/**
272 * gpio_device_get_chip() - Get the gpio_chip implementation of this GPIO device
273 * @gdev: GPIO device
274 *
275 * Returns:
276 * Address of the GPIO chip backing this device.
277 *
278 * Until we can get rid of all non-driver users of struct gpio_chip, we must
279 * provide a way of retrieving the pointer to it from struct gpio_device. This
280 * is *NOT* safe as the GPIO API is considered to be hot-unpluggable and the
281 * chip can dissapear at any moment (unlike reference-counted struct
282 * gpio_device).
283 *
284 * Use at your own risk.
285 */
286struct gpio_chip *gpio_device_get_chip(struct gpio_device *gdev)
287{
288 return gdev->chip;
289}
290EXPORT_SYMBOL_GPL(gpio_device_get_chip);
291
8d0aab2f
AV
292/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
293static int gpiochip_find_base(int ngpio)
294{
ff2b1359 295 struct gpio_device *gdev;
7b61212f 296 int base = GPIO_DYNAMIC_BASE;
8d0aab2f 297
7b61212f 298 list_for_each_entry(gdev, &gpio_devices, list) {
83cabe33 299 /* found a free space? */
7b61212f 300 if (gdev->base >= base + ngpio)
83cabe33 301 break;
7b61212f
CL
302 /* nope, check the space right after the chip */
303 base = gdev->base + gdev->ngpio;
7dd3d9bd
AK
304 if (base < GPIO_DYNAMIC_BASE)
305 base = GPIO_DYNAMIC_BASE;
8d0aab2f
AV
306 }
307
83cabe33 308 if (gpio_is_valid(base)) {
8d0aab2f 309 pr_debug("%s: found new base at %d\n", __func__, base);
83cabe33
AC
310 return base;
311 } else {
312 pr_err("%s: cannot find free range\n", __func__);
313 return -ENOSPC;
169b6a7a 314 }
169b6a7a
AV
315}
316
79a9becd
AC
317/**
318 * gpiod_get_direction - return the current direction of a GPIO
319 * @desc: GPIO to get the direction of
320 *
94fc7309 321 * Returns 0 for output, 1 for input, or an error code in case of error.
79a9becd
AC
322 *
323 * This function may sleep if gpiod_cansleep() is true.
324 */
8e53b0f1 325int gpiod_get_direction(struct gpio_desc *desc)
80b0a602 326{
a0b66a73 327 struct gpio_chip *gc;
13daf489 328 unsigned int offset;
d377f56f 329 int ret;
80b0a602 330
a0b66a73 331 gc = gpiod_to_chip(desc);
372e722e 332 offset = gpio_chip_hwgpio(desc);
80b0a602 333
256efaea
RK
334 /*
335 * Open drain emulation using input mode may incorrectly report
336 * input here, fix that up.
337 */
338 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) &&
339 test_bit(FLAG_IS_OUT, &desc->flags))
340 return 0;
341
a0b66a73 342 if (!gc->get_direction)
d0121b85 343 return -ENOTSUPP;
80b0a602 344
a0b66a73 345 ret = gc->get_direction(gc, offset);
4fc5bfeb
AS
346 if (ret < 0)
347 return ret;
348
349 /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */
350 if (ret > 0)
d377f56f 351 ret = 1;
4fc5bfeb
AS
352
353 assign_bit(FLAG_IS_OUT, &desc->flags, !ret);
354
d377f56f 355 return ret;
80b0a602 356}
79a9becd 357EXPORT_SYMBOL_GPL(gpiod_get_direction);
80b0a602 358
1a989d0f
AC
359/*
360 * Add a new chip to the global chips list, keeping the list of chips sorted
ef7c7553 361 * by range(means [base, base + ngpio - 1]) order.
1a989d0f
AC
362 *
363 * Return -EBUSY if the new chip overlaps with some other chip's integer
364 * space.
365 */
ff2b1359 366static int gpiodev_add_to_list(struct gpio_device *gdev)
1a989d0f 367{
a961f9b4 368 struct gpio_device *prev, *next;
1a989d0f 369
ff2b1359 370 if (list_empty(&gpio_devices)) {
a961f9b4 371 /* initial entry in list */
ff2b1359 372 list_add_tail(&gdev->list, &gpio_devices);
e28ecca6 373 return 0;
1a989d0f
AC
374 }
375
243cfa6a 376 next = list_first_entry(&gpio_devices, struct gpio_device, list);
a961f9b4
BJZ
377 if (gdev->base + gdev->ngpio <= next->base) {
378 /* add before first entry */
379 list_add(&gdev->list, &gpio_devices);
380 return 0;
1a989d0f
AC
381 }
382
243cfa6a 383 prev = list_last_entry(&gpio_devices, struct gpio_device, list);
a961f9b4
BJZ
384 if (prev->base + prev->ngpio <= gdev->base) {
385 /* add behind last entry */
386 list_add_tail(&gdev->list, &gpio_devices);
96098df1 387 return 0;
1a989d0f
AC
388 }
389
a961f9b4
BJZ
390 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
391 /* at the end of the list */
392 if (&next->list == &gpio_devices)
393 break;
1a989d0f 394
a961f9b4
BJZ
395 /* add between prev and next */
396 if (prev->base + prev->ngpio <= gdev->base
397 && gdev->base + gdev->ngpio <= next->base) {
398 list_add(&gdev->list, &prev->list);
399 return 0;
400 }
401 }
402
a961f9b4 403 return -EBUSY;
1a989d0f
AC
404}
405
950d55f5 406/*
f881bab0 407 * Convert a GPIO name to its descriptor
582838ea
GU
408 * Note that there is no guarantee that GPIO names are globally unique!
409 * Hence this function will return, if it exists, a reference to the first GPIO
410 * line found that matches the given name.
f881bab0
LW
411 */
412static struct gpio_desc *gpio_name_to_desc(const char * const name)
413{
ff2b1359 414 struct gpio_device *gdev;
f881bab0
LW
415 unsigned long flags;
416
ee203bbd
MM
417 if (!name)
418 return NULL;
419
f881bab0
LW
420 spin_lock_irqsave(&gpio_lock, flags);
421
ff2b1359 422 list_for_each_entry(gdev, &gpio_devices, list) {
66f46e37 423 struct gpio_desc *desc;
f881bab0 424
66f46e37
AS
425 for_each_gpio_desc(gdev->chip, desc) {
426 if (desc->name && !strcmp(desc->name, name)) {
f881bab0 427 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 428 return desc;
f881bab0
LW
429 }
430 }
431 }
432
433 spin_unlock_irqrestore(&gpio_lock, flags);
434
435 return NULL;
436}
437
5f3ca732 438/*
582838ea
GU
439 * Take the names from gc->names and assign them to their GPIO descriptors.
440 * Warn if a name is already used for a GPIO line on a different GPIO chip.
5f3ca732 441 *
582838ea
GU
442 * Note that:
443 * 1. Non-unique names are still accepted,
444 * 2. Name collisions within the same GPIO chip are not reported.
5f3ca732
MP
445 */
446static int gpiochip_set_desc_names(struct gpio_chip *gc)
447{
fdeb8e15 448 struct gpio_device *gdev = gc->gpiodev;
5f3ca732
MP
449 int i;
450
5f3ca732
MP
451 /* First check all names if they are unique */
452 for (i = 0; i != gc->ngpio; ++i) {
453 struct gpio_desc *gpio;
454
455 gpio = gpio_name_to_desc(gc->names[i]);
f881bab0 456 if (gpio)
fdeb8e15 457 dev_warn(&gdev->dev,
34ffd85d 458 "Detected name collision for GPIO name '%s'\n",
f881bab0 459 gc->names[i]);
5f3ca732
MP
460 }
461
462 /* Then add all names to the GPIO descriptors */
463 for (i = 0; i != gc->ngpio; ++i)
fdeb8e15 464 gdev->descs[i].name = gc->names[i];
5f3ca732
MP
465
466 return 0;
467}
468
32fc5aa2 469/*
0c5ebb4c 470 * gpiochip_set_names - Set GPIO line names using device properties
32fc5aa2
BG
471 * @chip: GPIO chip whose lines should be named, if possible
472 *
473 * Looks for device property "gpio-line-names" and if it exists assigns
474 * GPIO line names for the chip. The memory allocated for the assigned
b41ba2ec 475 * names belong to the underlying firmware node and should not be released
32fc5aa2
BG
476 * by the caller.
477 */
0c5ebb4c 478static int gpiochip_set_names(struct gpio_chip *chip)
32fc5aa2
BG
479{
480 struct gpio_device *gdev = chip->gpiodev;
4ef339bc 481 struct device *dev = &gdev->dev;
32fc5aa2
BG
482 const char **names;
483 int ret, i;
484 int count;
485
4ef339bc 486 count = device_property_string_array_count(dev, "gpio-line-names");
32fc5aa2
BG
487 if (count < 0)
488 return 0;
489
4e804c39
SP
490 /*
491 * When offset is set in the driver side we assume the driver internally
492 * is using more than one gpiochip per the same device. We have to stop
493 * setting friendly names if the specified ones with 'gpio-line-names'
494 * are less than the offset in the device itself. This means all the
495 * lines are not present for every single pin within all the internal
496 * gpiochips.
497 */
498 if (count <= chip->offset) {
4ef339bc 499 dev_warn(dev, "gpio-line-names too short (length %d), cannot map names for the gpiochip at offset %u\n",
4e804c39
SP
500 count, chip->offset);
501 return 0;
32fc5aa2
BG
502 }
503
504 names = kcalloc(count, sizeof(*names), GFP_KERNEL);
505 if (!names)
506 return -ENOMEM;
507
4ef339bc 508 ret = device_property_read_string_array(dev, "gpio-line-names",
32fc5aa2
BG
509 names, count);
510 if (ret < 0) {
4ef339bc 511 dev_warn(dev, "failed to read GPIO line names\n");
32fc5aa2
BG
512 kfree(names);
513 return ret;
514 }
515
4e804c39
SP
516 /*
517 * When more that one gpiochip per device is used, 'count' can
518 * contain at most number gpiochips x chip->ngpio. We have to
519 * correctly distribute all defined lines taking into account
520 * chip->offset as starting point from where we will assign
521 * the names to pins from the 'names' array. Since property
522 * 'gpio-line-names' cannot contains gaps, we have to be sure
523 * we only assign those pins that really exists since chip->ngpio
524 * can be different of the chip->offset.
525 */
526 count = (count > chip->offset) ? count - chip->offset : count;
527 if (count > chip->ngpio)
528 count = chip->ngpio;
529
c73960bb
PR
530 for (i = 0; i < count; i++) {
531 /*
532 * Allow overriding "fixed" names provided by the GPIO
533 * provider. The "fixed" names are more often than not
534 * generic and less informative than the names given in
535 * device properties.
536 */
537 if (names[chip->offset + i] && names[chip->offset + i][0])
538 gdev->descs[i].name = names[chip->offset + i];
539 }
32fc5aa2
BG
540
541 kfree(names);
542
543 return 0;
544}
545
a0b66a73 546static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc)
e4371f6e
SB
547{
548 unsigned long *p;
549
a0b66a73 550 p = bitmap_alloc(gc->ngpio, GFP_KERNEL);
e4371f6e
SB
551 if (!p)
552 return NULL;
553
554 /* Assume by default all GPIOs are valid */
a0b66a73 555 bitmap_fill(p, gc->ngpio);
e4371f6e
SB
556
557 return p;
558}
559
05a854c5
AS
560static void gpiochip_free_mask(unsigned long **p)
561{
562 bitmap_free(*p);
563 *p = NULL;
564}
565
27043a7d
AS
566static unsigned int gpiochip_count_reserved_ranges(struct gpio_chip *gc)
567{
4ef339bc 568 struct device *dev = &gc->gpiodev->dev;
27043a7d
AS
569 int size;
570
571 /* Format is "start, count, ..." */
4ef339bc 572 size = device_property_count_u32(dev, "gpio-reserved-ranges");
27043a7d
AS
573 if (size > 0 && size % 2 == 0)
574 return size;
575
576 return 0;
577}
578
27043a7d
AS
579static int gpiochip_apply_reserved_ranges(struct gpio_chip *gc)
580{
4ef339bc 581 struct device *dev = &gc->gpiodev->dev;
27043a7d
AS
582 unsigned int size;
583 u32 *ranges;
584 int ret;
585
586 size = gpiochip_count_reserved_ranges(gc);
587 if (size == 0)
588 return 0;
589
590 ranges = kmalloc_array(size, sizeof(*ranges), GFP_KERNEL);
591 if (!ranges)
592 return -ENOMEM;
593
4ef339bc
AS
594 ret = device_property_read_u32_array(dev, "gpio-reserved-ranges",
595 ranges, size);
27043a7d
AS
596 if (ret) {
597 kfree(ranges);
598 return ret;
599 }
600
601 while (size) {
602 u32 count = ranges[--size];
603 u32 start = ranges[--size];
604
605 if (start >= gc->ngpio || start + count > gc->ngpio)
606 continue;
607
608 bitmap_clear(gc->valid_mask, start, count);
609 }
610
611 kfree(ranges);
612 return 0;
613}
614
c9fc5aff 615static int gpiochip_init_valid_mask(struct gpio_chip *gc)
f8ec92a9 616{
27043a7d
AS
617 int ret;
618
1a55fc40
AS
619 if (!(gpiochip_count_reserved_ranges(gc) || gc->init_valid_mask))
620 return 0;
621
622 gc->valid_mask = gpiochip_allocate_mask(gc);
623 if (!gc->valid_mask)
624 return -ENOMEM;
625
27043a7d
AS
626 ret = gpiochip_apply_reserved_ranges(gc);
627 if (ret)
628 return ret;
629
c9fc5aff
LW
630 if (gc->init_valid_mask)
631 return gc->init_valid_mask(gc,
632 gc->valid_mask,
633 gc->ngpio);
f8ec92a9
RRD
634
635 return 0;
636}
637
a0b66a73 638static void gpiochip_free_valid_mask(struct gpio_chip *gc)
726cb3ba 639{
05a854c5 640 gpiochip_free_mask(&gc->valid_mask);
726cb3ba
SB
641}
642
b056ca1c
AS
643static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
644{
c40aa80d
AS
645 /*
646 * Device Tree platforms are supposed to use "gpio-ranges"
647 * property. This check ensures that the ->add_pin_ranges()
648 * won't be called for them.
649 */
650 if (device_property_present(&gc->gpiodev->dev, "gpio-ranges"))
651 return 0;
652
b056ca1c
AS
653 if (gc->add_pin_ranges)
654 return gc->add_pin_ranges(gc);
655
656 return 0;
657}
658
a0b66a73 659bool gpiochip_line_is_valid(const struct gpio_chip *gc,
726cb3ba
SB
660 unsigned int offset)
661{
662 /* No mask means all valid */
a0b66a73 663 if (likely(!gc->valid_mask))
726cb3ba 664 return true;
a0b66a73 665 return test_bit(offset, gc->valid_mask);
726cb3ba
SB
666}
667EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
668
7aa90f90 669static void gpiodev_release(struct device *dev)
ff2b1359 670{
3b7c7478 671 struct gpio_device *gdev = to_gpio_device(dev);
cf25ef6b 672 unsigned long flags;
ff2b1359 673
cf25ef6b 674 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 675 list_del(&gdev->list);
cf25ef6b
JH
676 spin_unlock_irqrestore(&gpio_lock, flags);
677
8d4a85b6 678 ida_free(&gpio_ida, gdev->id);
fcf273e5 679 kfree_const(gdev->label);
476e2fc5 680 kfree(gdev->descs);
9efd9e69 681 kfree(gdev);
ff2b1359
LW
682}
683
1f5eb8b1
KG
684#ifdef CONFIG_GPIO_CDEV
685#define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt))
686#define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev))
687#else
688/*
689 * gpiolib_cdev_register() indirectly calls device_add(), which is still
690 * required even when cdev is not selected.
691 */
692#define gcdev_register(gdev, devt) device_add(&(gdev)->dev)
693#define gcdev_unregister(gdev) device_del(&(gdev)->dev)
694#endif
695
159f3cd9
GR
696static int gpiochip_setup_dev(struct gpio_device *gdev)
697{
67f64d15 698 struct fwnode_handle *fwnode = dev_fwnode(&gdev->dev);
d377f56f 699 int ret;
159f3cd9 700
38dfa56b
SK
701 /*
702 * If fwnode doesn't belong to another device, it's safe to clear its
703 * initialized flag.
704 */
67f64d15
AS
705 if (fwnode && !fwnode->dev)
706 fwnode_dev_initialized(fwnode, false);
38dfa56b 707
1f5eb8b1 708 ret = gcdev_register(gdev, gpio_devt);
d377f56f
LW
709 if (ret)
710 return ret;
111379dc 711
ec851b23 712 /* From this point, the .release() function cleans up gpio_device */
7aa90f90 713 gdev->dev.release = gpiodev_release;
ec851b23 714
d377f56f
LW
715 ret = gpiochip_sysfs_register(gdev);
716 if (ret)
159f3cd9
GR
717 goto err_remove_device;
718
262b9011
GU
719 dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base,
720 gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic");
159f3cd9
GR
721
722 return 0;
723
724err_remove_device:
1f5eb8b1 725 gcdev_unregister(gdev);
d377f56f 726 return ret;
159f3cd9
GR
727}
728
a0b66a73 729static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog)
a411e81e
BG
730{
731 struct gpio_desc *desc;
732 int rv;
733
a0b66a73 734 desc = gpiochip_get_desc(gc, hog->chip_hwnum);
a411e81e 735 if (IS_ERR(desc)) {
262b9011
GU
736 chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__,
737 PTR_ERR(desc));
a411e81e
BG
738 return;
739 }
740
ba3efdff 741 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
a411e81e
BG
742 return;
743
744 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
745 if (rv)
262b9011
GU
746 gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n",
747 __func__, gc->label, hog->chip_hwnum, rv);
a411e81e
BG
748}
749
a0b66a73 750static void machine_gpiochip_add(struct gpio_chip *gc)
a411e81e
BG
751{
752 struct gpiod_hog *hog;
753
754 mutex_lock(&gpio_machine_hogs_mutex);
755
756 list_for_each_entry(hog, &gpio_machine_hogs, list) {
a0b66a73
LW
757 if (!strcmp(gc->label, hog->chip_label))
758 gpiochip_machine_hog(gc, hog);
a411e81e
BG
759 }
760
761 mutex_unlock(&gpio_machine_hogs_mutex);
762}
763
159f3cd9
GR
764static void gpiochip_setup_devs(void)
765{
766 struct gpio_device *gdev;
d377f56f 767 int ret;
159f3cd9
GR
768
769 list_for_each_entry(gdev, &gpio_devices, list) {
d377f56f
LW
770 ret = gpiochip_setup_dev(gdev);
771 if (ret)
262b9011
GU
772 dev_err(&gdev->dev,
773 "Failed to initialize gpio device (%d)\n", ret);
159f3cd9
GR
774 }
775}
776
7b59bdbc
AS
777static void gpiochip_set_data(struct gpio_chip *gc, void *data)
778{
779 gc->gpiodev->data = data;
780}
781
8deb779d
AS
782/**
783 * gpiochip_get_data() - get per-subdriver data for the chip
784 * @gc: GPIO chip
785 *
786 * Returns:
787 * The per-subdriver data for the chip.
788 */
789void *gpiochip_get_data(struct gpio_chip *gc)
790{
791 return gc->gpiodev->data;
792}
793EXPORT_SYMBOL_GPL(gpiochip_get_data);
794
55b2395e
AM
795int gpiochip_get_ngpios(struct gpio_chip *gc, struct device *dev)
796{
797 u32 ngpios = gc->ngpio;
798 int ret;
799
800 if (ngpios == 0) {
801 ret = device_property_read_u32(dev, "ngpios", &ngpios);
802 if (ret == -ENODATA)
803 /*
804 * -ENODATA means that there is no property found and
805 * we want to issue the error message to the user.
806 * Besides that, we want to return different error code
807 * to state that supplied value is not valid.
808 */
809 ngpios = 0;
810 else if (ret)
811 return ret;
812
813 gc->ngpio = ngpios;
814 }
815
816 if (gc->ngpio == 0) {
817 chip_err(gc, "tried to insert a GPIO chip with zero lines\n");
818 return -EINVAL;
819 }
820
821 if (gc->ngpio > FASTPATH_NGPIO)
822 chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n",
823 gc->ngpio, FASTPATH_NGPIO);
824
825 return 0;
826}
827EXPORT_SYMBOL_GPL(gpiochip_get_ngpios);
828
a0b66a73 829int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
39c3fd58
AL
830 struct lock_class_key *lock_key,
831 struct lock_class_key *request_key)
d2876d08 832{
ff2b1359 833 struct gpio_device *gdev;
e5ab49cd 834 unsigned long flags;
e5ab49cd 835 unsigned int i;
ec851b23 836 int base = 0;
e5ab49cd 837 int ret = 0;
d2876d08 838
ff2b1359
LW
839 /*
840 * First: allocate and populate the internal stat container, and
841 * set up the struct device.
842 */
969f07b4 843 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
ff2b1359 844 if (!gdev)
14e85c0e 845 return -ENOMEM;
3c702e99 846 gdev->dev.bus = &gpio_bus_type;
1df62542 847 gdev->dev.parent = gc->parent;
a0b66a73 848 gdev->chip = gc;
7b59bdbc 849
a0b66a73 850 gc->gpiodev = gdev;
7b59bdbc 851 gpiochip_set_data(gc, data);
acc6e331 852
daecca4b
AS
853 /*
854 * If the calling driver did not initialize firmware node,
855 * do it here using the parent device, if any.
856 */
857 if (gc->fwnode)
858 device_set_node(&gdev->dev, gc->fwnode);
859 else if (gc->parent)
860 device_set_node(&gdev->dev, dev_fwnode(gc->parent));
6cb59afe 861
8d4a85b6 862 gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL);
ff2b1359 863 if (gdev->id < 0) {
d377f56f 864 ret = gdev->id;
ff2b1359
LW
865 goto err_free_gdev;
866 }
c351bb64
QW
867
868 ret = dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id);
869 if (ret)
870 goto err_free_ida;
871
ff2b1359 872 device_initialize(&gdev->dev);
a0b66a73
LW
873 if (gc->parent && gc->parent->driver)
874 gdev->owner = gc->parent->driver->owner;
875 else if (gc->owner)
ff2b1359 876 /* TODO: remove chip->owner */
a0b66a73 877 gdev->owner = gc->owner;
ff2b1359
LW
878 else
879 gdev->owner = THIS_MODULE;
d2876d08 880
55b2395e
AM
881 ret = gpiochip_get_ngpios(gc, &gdev->dev);
882 if (ret)
ec851b23 883 goto err_free_dev_name;
3027743f 884
ec851b23
ZH
885 gdev->descs = kcalloc(gc->ngpio, sizeof(*gdev->descs), GFP_KERNEL);
886 if (!gdev->descs) {
887 ret = -ENOMEM;
888 goto err_free_dev_name;
889 }
890
a0b66a73 891 gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL);
df4878e9 892 if (!gdev->label) {
d377f56f 893 ret = -ENOMEM;
476e2fc5 894 goto err_free_descs;
df4878e9
LW
895 }
896
a0b66a73 897 gdev->ngpio = gc->ngpio;
5ed41cc4 898
d2876d08
DB
899 spin_lock_irqsave(&gpio_lock, flags);
900
fdeb8e15
LW
901 /*
902 * TODO: this allocates a Linux GPIO number base in the global
903 * GPIO numberspace for this chip. In the long run we want to
904 * get *rid* of this numberspace and use only descriptors, but
905 * it may be a pipe dream. It will not happen before we get rid
906 * of the sysfs interface anyways.
907 */
ec851b23 908 base = gc->base;
8d0aab2f 909 if (base < 0) {
a0b66a73 910 base = gpiochip_find_base(gc->ngpio);
8d0aab2f 911 if (base < 0) {
225fce83 912 spin_unlock_irqrestore(&gpio_lock, flags);
ec851b23
ZH
913 ret = base;
914 base = 0;
476e2fc5 915 goto err_free_label;
8d0aab2f 916 }
fdeb8e15
LW
917 /*
918 * TODO: it should not be necessary to reflect the assigned
919 * base outside of the GPIO subsystem. Go over drivers and
920 * see if anyone makes use of this, else drop this and assign
921 * a poison instead.
922 */
a0b66a73 923 gc->base = base;
502df79b
CL
924 } else {
925 dev_warn(&gdev->dev,
926 "Static allocation of GPIO base is deprecated, use dynamic allocation.\n");
8d0aab2f 927 }
fdeb8e15 928 gdev->base = base;
8d0aab2f 929
d377f56f
LW
930 ret = gpiodev_add_to_list(gdev);
931 if (ret) {
05aa5203 932 spin_unlock_irqrestore(&gpio_lock, flags);
24a9dbb1 933 chip_err(gc, "GPIO integer space overlap, cannot add chip\n");
476e2fc5 934 goto err_free_label;
05aa5203 935 }
1a989d0f 936
a0b66a73 937 for (i = 0; i < gc->ngpio; i++)
767cd17a 938 gdev->descs[i].gdev = gdev;
14e85c0e 939
207270dd
DC
940 spin_unlock_irqrestore(&gpio_lock, flags);
941
17a7ca35 942 BLOCKING_INIT_NOTIFIER_HEAD(&gdev->line_state_notifier);
a067419b 943 BLOCKING_INIT_NOTIFIER_HEAD(&gdev->device_notifier);
bdbbae24 944 init_rwsem(&gdev->sem);
51c1064e 945
f23f1516 946#ifdef CONFIG_PINCTRL
20ec3e39 947 INIT_LIST_HEAD(&gdev->pin_ranges);
f23f1516
SH
948#endif
949
c73960bb 950 if (gc->names) {
7cba1a4d 951 ret = gpiochip_set_desc_names(gc);
c73960bb
PR
952 if (ret)
953 goto err_remove_from_list;
954 }
0c5ebb4c 955 ret = gpiochip_set_names(gc);
d377f56f 956 if (ret)
5f3ca732
MP
957 goto err_remove_from_list;
958
1a55fc40 959 ret = gpiochip_init_valid_mask(gc);
d377f56f 960 if (ret)
48057ed1 961 goto err_remove_from_list;
e0d89728 962
a0b66a73 963 ret = of_gpiochip_add(gc);
d377f56f 964 if (ret)
48057ed1 965 goto err_free_gpiochip_mask;
28355f81 966
a0b66a73 967 for (i = 0; i < gc->ngpio; i++) {
3edfb7bd
RRD
968 struct gpio_desc *desc = &gdev->descs[i];
969
a0b66a73 970 if (gc->get_direction && gpiochip_line_is_valid(gc, i)) {
4fc5bfeb 971 assign_bit(FLAG_IS_OUT,
a0b66a73 972 &desc->flags, !gc->get_direction(gc, i));
d95da993 973 } else {
4fc5bfeb 974 assign_bit(FLAG_IS_OUT,
a0b66a73 975 &desc->flags, !gc->direction_input);
d95da993 976 }
3edfb7bd
RRD
977 }
978
a0b66a73 979 ret = gpiochip_add_pin_ranges(gc);
b056ca1c
AS
980 if (ret)
981 goto err_remove_of_chip;
982
a0b66a73 983 acpi_gpiochip_add(gc);
391c970c 984
a0b66a73 985 machine_gpiochip_add(gc);
a411e81e 986
a0b66a73 987 ret = gpiochip_irqchip_init_valid_mask(gc);
9411e3aa
AS
988 if (ret)
989 goto err_remove_acpi_chip;
990
a0b66a73 991 ret = gpiochip_irqchip_init_hw(gc);
fbdf8d4b 992 if (ret)
48057ed1
LW
993 goto err_remove_acpi_chip;
994
a0b66a73 995 ret = gpiochip_add_irqchip(gc, lock_key, request_key);
fbdf8d4b 996 if (ret)
48057ed1
LW
997 goto err_remove_irqchip_mask;
998
3c702e99
LW
999 /*
1000 * By first adding the chardev, and then adding the device,
1001 * we get a device node entry in sysfs under
1002 * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
1003 * coldplug of device nodes and other udev business.
159f3cd9
GR
1004 * We can do this only if gpiolib has been initialized.
1005 * Otherwise, defer until later.
3c702e99 1006 */
159f3cd9 1007 if (gpiolib_initialized) {
d377f56f
LW
1008 ret = gpiochip_setup_dev(gdev);
1009 if (ret)
48057ed1 1010 goto err_remove_irqchip;
159f3cd9 1011 }
cedb1881 1012 return 0;
3bae4811 1013
48057ed1 1014err_remove_irqchip:
a0b66a73 1015 gpiochip_irqchip_remove(gc);
48057ed1 1016err_remove_irqchip_mask:
a0b66a73 1017 gpiochip_irqchip_free_valid_mask(gc);
35779890 1018err_remove_acpi_chip:
a0b66a73 1019 acpi_gpiochip_remove(gc);
35779890 1020err_remove_of_chip:
a0b66a73
LW
1021 gpiochip_free_hogs(gc);
1022 of_gpiochip_remove(gc);
35779890 1023err_free_gpiochip_mask:
a0b66a73
LW
1024 gpiochip_remove_pin_ranges(gc);
1025 gpiochip_free_valid_mask(gc);
ec851b23
ZH
1026 if (gdev->dev.release) {
1027 /* release() has been registered by gpiochip_setup_dev() */
dc0989e3 1028 gpio_device_put(gdev);
ec851b23
ZH
1029 goto err_print_message;
1030 }
5f3ca732 1031err_remove_from_list:
225fce83 1032 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1033 list_del(&gdev->list);
3bae4811 1034 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1035err_free_label:
fcf273e5 1036 kfree_const(gdev->label);
476e2fc5
GR
1037err_free_descs:
1038 kfree(gdev->descs);
c351bb64
QW
1039err_free_dev_name:
1040 kfree(dev_name(&gdev->dev));
a05a1404 1041err_free_ida:
8d4a85b6 1042 ida_free(&gpio_ida, gdev->id);
a05a1404 1043err_free_gdev:
ec851b23
ZH
1044 kfree(gdev);
1045err_print_message:
d2876d08 1046 /* failures here can mean systems won't boot... */
3cc1fb73
GS
1047 if (ret != -EPROBE_DEFER) {
1048 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
55b2395e 1049 base, base + (int)gc->ngpio - 1,
3cc1fb73
GS
1050 gc->label ? : "generic", ret);
1051 }
d377f56f 1052 return ret;
d2876d08 1053}
959bc7b2 1054EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
d2876d08
DB
1055
1056/**
1057 * gpiochip_remove() - unregister a gpio_chip
a0b66a73 1058 * @gc: the chip to unregister
d2876d08
DB
1059 *
1060 * A gpio_chip with any GPIOs still requested may not be removed.
1061 */
a0b66a73 1062void gpiochip_remove(struct gpio_chip *gc)
d2876d08 1063{
a0b66a73 1064 struct gpio_device *gdev = gc->gpiodev;
d2876d08 1065 unsigned long flags;
869233f8 1066 unsigned int i;
d2876d08 1067
bdbbae24
BG
1068 down_write(&gdev->sem);
1069
ff2b1359 1070 /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
afbc4f31 1071 gpiochip_sysfs_unregister(gdev);
a0b66a73 1072 gpiochip_free_hogs(gc);
bd203bd5
BJZ
1073 /* Numb the device, cancelling all outstanding operations */
1074 gdev->chip = NULL;
a0b66a73
LW
1075 gpiochip_irqchip_remove(gc);
1076 acpi_gpiochip_remove(gc);
1077 of_gpiochip_remove(gc);
1078 gpiochip_remove_pin_ranges(gc);
1079 gpiochip_free_valid_mask(gc);
43c54eca
LW
1080 /*
1081 * We accept no more calls into the driver from this point, so
7b59bdbc 1082 * NULL the driver data pointer.
43c54eca 1083 */
7b59bdbc 1084 gpiochip_set_data(gc, NULL);
391c970c 1085
6798acaa 1086 spin_lock_irqsave(&gpio_lock, flags);
fdeb8e15 1087 for (i = 0; i < gdev->ngpio; i++) {
f8d05e27 1088 if (test_bit(FLAG_REQUESTED, &gdev->descs[i].flags))
869233f8 1089 break;
d2876d08 1090 }
d2876d08 1091 spin_unlock_irqrestore(&gpio_lock, flags);
14e85c0e 1092
ca18a852 1093 if (i != gdev->ngpio)
fdeb8e15 1094 dev_crit(&gdev->dev,
58383c78 1095 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
fab28b89 1096
ff2b1359
LW
1097 /*
1098 * The gpiochip side puts its use of the device to rest here:
1099 * if there are no userspace clients, the chardev and device will
1100 * be removed, else it will be dangling until the last user is
1101 * gone.
1102 */
1f5eb8b1 1103 gcdev_unregister(gdev);
bdbbae24 1104 up_write(&gdev->sem);
dc0989e3 1105 gpio_device_put(gdev);
d2876d08
DB
1106}
1107EXPORT_SYMBOL_GPL(gpiochip_remove);
1108
cfe102f6
BG
1109/**
1110 * gpio_device_find() - find a specific GPIO device
1111 * @data: data to pass to match function
1112 * @match: Callback function to check gpio_chip
1113 *
1114 * Returns:
1115 * New reference to struct gpio_device.
1116 *
1117 * Similar to bus_find_device(). It returns a reference to a gpio_device as
1118 * determined by a user supplied @match callback. The callback should return
1119 * 0 if the device doesn't match and non-zero if it does. If the callback
1120 * returns non-zero, this function will return to the caller and not iterate
1121 * over any more gpio_devices.
1122 *
1123 * The callback takes the GPIO chip structure as argument. During the execution
1124 * of the callback function the chip is protected from being freed. TODO: This
1125 * actually has yet to be implemented.
1126 *
1127 * If the function returns non-NULL, the returned reference must be freed by
1128 * the caller using gpio_device_put().
1129 */
1130struct gpio_device *gpio_device_find(void *data,
1131 int (*match)(struct gpio_chip *gc,
1132 void *data))
1133{
1134 struct gpio_device *gdev;
1135
1136 /*
1137 * Not yet but in the future the spinlock below will become a mutex.
1138 * Annotate this function before anyone tries to use it in interrupt
1139 * context like it happened with gpiochip_find().
1140 */
1141 might_sleep();
1142
1143 guard(spinlock_irqsave)(&gpio_lock);
1144
1145 list_for_each_entry(gdev, &gpio_devices, list) {
1146 if (gdev->chip && match(gdev->chip, data))
1147 return gpio_device_get(gdev);
1148 }
1149
1150 return NULL;
1151}
1152EXPORT_SYMBOL_GPL(gpio_device_find);
1153
d62fcd9f
BG
1154static int gpio_chip_match_by_label(struct gpio_chip *gc, void *label)
1155{
1156 return gc->label && !strcmp(gc->label, label);
1157}
1158
1159/**
1160 * gpio_device_find_by_label() - wrapper around gpio_device_find() finding the
1161 * GPIO device by its backing chip's label
1162 * @label: Label to lookup
1163 *
1164 * Returns:
1165 * Reference to the GPIO device or NULL. Reference must be released with
1166 * gpio_device_put().
1167 */
1168struct gpio_device *gpio_device_find_by_label(const char *label)
1169{
1170 return gpio_device_find((void *)label, gpio_chip_match_by_label);
1171}
1172EXPORT_SYMBOL_GPL(gpio_device_find_by_label);
1173
668706b1
AS
1174static int gpio_chip_match_by_fwnode(struct gpio_chip *gc, void *fwnode)
1175{
1176 return device_match_fwnode(&gc->gpiodev->dev, fwnode);
1177}
1178
1179/**
1180 * gpio_device_find_by_fwnode() - wrapper around gpio_device_find() finding
1181 * the GPIO device by its fwnode
1182 * @fwnode: Firmware node to lookup
1183 *
1184 * Returns:
1185 * Reference to the GPIO device or NULL. Reference must be released with
1186 * gpio_device_put().
1187 */
1188struct gpio_device *gpio_device_find_by_fwnode(const struct fwnode_handle *fwnode)
1189{
1190 return gpio_device_find((void *)fwnode, gpio_chip_match_by_fwnode);
1191}
1192EXPORT_SYMBOL_GPL(gpio_device_find_by_fwnode);
1193
36aa129f
BG
1194/**
1195 * gpio_device_get() - Increase the reference count of this GPIO device
1196 * @gdev: GPIO device to increase the refcount for
1197 *
1198 * Returns:
1199 * Pointer to @gdev.
1200 */
1201struct gpio_device *gpio_device_get(struct gpio_device *gdev)
1202{
1203 return to_gpio_device(get_device(&gdev->dev));
1204}
1205EXPORT_SYMBOL_GPL(gpio_device_get);
1206
1207/**
1208 * gpio_device_put() - Decrease the reference count of this GPIO device and
1209 * possibly free all resources associated with it.
1210 * @gdev: GPIO device to decrease the reference count for
1211 */
1212void gpio_device_put(struct gpio_device *gdev)
1213{
1214 put_device(&gdev->dev);
1215}
1216EXPORT_SYMBOL_GPL(gpio_device_put);
1217
1559d149
BG
1218/**
1219 * gpio_device_to_device() - Retrieve the address of the underlying struct
1220 * device.
1221 * @gdev: GPIO device for which to return the address.
1222 *
1223 * This does not increase the reference count of the GPIO device nor the
1224 * underlying struct device.
1225 *
1226 * Returns:
1227 * Address of struct device backing this GPIO device.
1228 */
1229struct device *gpio_device_to_device(struct gpio_device *gdev)
1230{
1231 return &gdev->dev;
1232}
1233EXPORT_SYMBOL_GPL(gpio_device_to_device);
1234
14250520
LW
1235#ifdef CONFIG_GPIOLIB_IRQCHIP
1236
1237/*
1238 * The following is irqchip helper code for gpiochips.
1239 */
1240
9411e3aa
AS
1241static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
1242{
1243 struct gpio_irq_chip *girq = &gc->irq;
1244
1245 if (!girq->init_hw)
1246 return 0;
1247
1248 return girq->init_hw(gc);
1249}
1250
5fbe5b58 1251static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb 1252{
5fbe5b58
LW
1253 struct gpio_irq_chip *girq = &gc->irq;
1254
1255 if (!girq->init_valid_mask)
79b804cb
MW
1256 return 0;
1257
5fbe5b58
LW
1258 girq->valid_mask = gpiochip_allocate_mask(gc);
1259 if (!girq->valid_mask)
79b804cb
MW
1260 return -ENOMEM;
1261
5fbe5b58
LW
1262 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
1263
79b804cb
MW
1264 return 0;
1265}
1266
a0b66a73 1267static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 1268{
05a854c5 1269 gpiochip_free_mask(&gc->irq.valid_mask);
79b804cb
MW
1270}
1271
a0b66a73 1272bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc,
64ff2c8e 1273 unsigned int offset)
79b804cb 1274{
a0b66a73 1275 if (!gpiochip_line_is_valid(gc, offset))
726cb3ba 1276 return false;
79b804cb 1277 /* No mask means all valid */
a0b66a73 1278 if (likely(!gc->irq.valid_mask))
79b804cb 1279 return true;
a0b66a73 1280 return test_bit(offset, gc->irq.valid_mask);
79b804cb 1281}
64ff2c8e 1282EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
79b804cb 1283
fdd61a01
LW
1284#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1285
1286/**
1287 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
1288 * to a gpiochip
1289 * @gc: the gpiochip to set the irqchip hierarchical handler to
1290 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
1291 * will then percolate up to the parent
1292 */
1293static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
1294 struct irq_chip *irqchip)
1295{
1296 /* DT will deal with mapping each IRQ as we go along */
1297 if (is_of_node(gc->irq.fwnode))
1298 return;
1299
1300 /*
1301 * This is for legacy and boardfile "irqchip" fwnodes: allocate
1302 * irqs upfront instead of dynamically since we don't have the
1303 * dynamic type of allocation that hardware description languages
1304 * provide. Once all GPIO drivers using board files are gone from
1305 * the kernel we can delete this code, but for a transitional period
1306 * it is necessary to keep this around.
1307 */
1308 if (is_fwnode_irqchip(gc->irq.fwnode)) {
1309 int i;
1310 int ret;
1311
1312 for (i = 0; i < gc->ngpio; i++) {
1313 struct irq_fwspec fwspec;
1314 unsigned int parent_hwirq;
1315 unsigned int parent_type;
1316 struct gpio_irq_chip *girq = &gc->irq;
1317
1318 /*
1319 * We call the child to parent translation function
1320 * only to check if the child IRQ is valid or not.
1321 * Just pick the rising edge type here as that is what
1322 * we likely need to support.
1323 */
1324 ret = girq->child_to_parent_hwirq(gc, i,
1325 IRQ_TYPE_EDGE_RISING,
1326 &parent_hwirq,
1327 &parent_type);
1328 if (ret) {
1329 chip_err(gc, "skip set-up on hwirq %d\n",
1330 i);
1331 continue;
1332 }
1333
1334 fwspec.fwnode = gc->irq.fwnode;
1335 /* This is the hwirq for the GPIO line side of things */
1336 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
1337 /* Just pick something */
1338 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
1339 fwspec.param_count = 2;
908334ab
JH
1340 ret = irq_domain_alloc_irqs(gc->irq.domain, 1,
1341 NUMA_NO_NODE, &fwspec);
fdd61a01
LW
1342 if (ret < 0) {
1343 chip_err(gc,
1344 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1345 i, parent_hwirq,
1346 ret);
1347 }
1348 }
1349 }
1350
1351 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1352
1353 return;
1354}
1355
1356static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1357 struct irq_fwspec *fwspec,
1358 unsigned long *hwirq,
1359 unsigned int *type)
1360{
1361 /* We support standard DT translation */
1362 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1363 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1364 }
1365
1366 /* This is for board files and others not using DT */
1367 if (is_fwnode_irqchip(fwspec->fwnode)) {
1368 int ret;
1369
1370 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1371 if (ret)
1372 return ret;
1373 WARN_ON(*type == IRQ_TYPE_NONE);
1374 return 0;
1375 }
1376 return -EINVAL;
1377}
1378
1379static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1380 unsigned int irq,
1381 unsigned int nr_irqs,
1382 void *data)
1383{
1384 struct gpio_chip *gc = d->host_data;
1385 irq_hw_number_t hwirq;
1386 unsigned int type = IRQ_TYPE_NONE;
1387 struct irq_fwspec *fwspec = data;
91a29af4 1388 union gpio_irq_fwspec gpio_parent_fwspec = {};
fdd61a01
LW
1389 unsigned int parent_hwirq;
1390 unsigned int parent_type;
1391 struct gpio_irq_chip *girq = &gc->irq;
1392 int ret;
1393
1394 /*
1395 * The nr_irqs parameter is always one except for PCI multi-MSI
1396 * so this should not happen.
1397 */
1398 WARN_ON(nr_irqs != 1);
1399
1400 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
1401 if (ret)
1402 return ret;
1403
db4064cc 1404 chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
fdd61a01
LW
1405
1406 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
1407 &parent_hwirq, &parent_type);
1408 if (ret) {
1409 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
1410 return ret;
1411 }
366950ee 1412 chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq);
fdd61a01
LW
1413
1414 /*
1415 * We set handle_bad_irq because the .set_type() should
1416 * always be invoked and set the right type of handler.
1417 */
1418 irq_domain_set_info(d,
1419 irq,
1420 hwirq,
1421 gc->irq.chip,
1422 gc,
1423 girq->handler,
1424 NULL, NULL);
1425 irq_set_probe(irq);
1426
fdd61a01 1427 /* This parent only handles asserted level IRQs */
91a29af4
MZ
1428 ret = girq->populate_parent_alloc_arg(gc, &gpio_parent_fwspec,
1429 parent_hwirq, parent_type);
1430 if (ret)
1431 return ret;
24258761 1432
366950ee 1433 chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
fdd61a01 1434 irq, parent_hwirq);
c34f6dc8 1435 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
91a29af4 1436 ret = irq_domain_alloc_irqs_parent(d, irq, 1, &gpio_parent_fwspec);
880b7cf2
KH
1437 /*
1438 * If the parent irqdomain is msi, the interrupts have already
1439 * been allocated, so the EEXIST is good.
1440 */
1441 if (irq_domain_is_msi(d->parent) && (ret == -EEXIST))
1442 ret = 0;
fdd61a01
LW
1443 if (ret)
1444 chip_err(gc,
1445 "failed to allocate parent hwirq %d for hwirq %lu\n",
1446 parent_hwirq, hwirq);
1447
1448 return ret;
1449}
1450
a0b66a73 1451static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc,
fdd61a01
LW
1452 unsigned int offset)
1453{
1454 return offset;
1455}
1456
1457static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
1458{
1459 ops->activate = gpiochip_irq_domain_activate;
1460 ops->deactivate = gpiochip_irq_domain_deactivate;
1461 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
fdd61a01
LW
1462
1463 /*
08f12b45 1464 * We only allow overriding the translate() and free() functions for
fdd61a01 1465 * hierarchical chips, and this should only be done if the user
08f12b45
LP
1466 * really need something other than 1:1 translation for translate()
1467 * callback and free if user wants to free up any resources which
1468 * were allocated during callbacks, for example populate_parent_alloc_arg.
fdd61a01
LW
1469 */
1470 if (!ops->translate)
1471 ops->translate = gpiochip_hierarchy_irq_domain_translate;
08f12b45
LP
1472 if (!ops->free)
1473 ops->free = irq_domain_free_irqs_common;
fdd61a01
LW
1474}
1475
b683b487 1476static struct irq_domain *gpiochip_hierarchy_create_domain(struct gpio_chip *gc)
fdd61a01 1477{
b683b487
AS
1478 struct irq_domain *domain;
1479
fdd61a01
LW
1480 if (!gc->irq.child_to_parent_hwirq ||
1481 !gc->irq.fwnode) {
1482 chip_err(gc, "missing irqdomain vital data\n");
b683b487 1483 return ERR_PTR(-EINVAL);
fdd61a01
LW
1484 }
1485
1486 if (!gc->irq.child_offset_to_irq)
1487 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
1488
24258761
KH
1489 if (!gc->irq.populate_parent_alloc_arg)
1490 gc->irq.populate_parent_alloc_arg =
fdd61a01
LW
1491 gpiochip_populate_parent_fwspec_twocell;
1492
1493 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
1494
b683b487 1495 domain = irq_domain_create_hierarchy(
fdd61a01
LW
1496 gc->irq.parent_domain,
1497 0,
1498 gc->ngpio,
1499 gc->irq.fwnode,
1500 &gc->irq.child_irq_domain_ops,
1501 gc);
1502
b683b487
AS
1503 if (!domain)
1504 return ERR_PTR(-ENOMEM);
fdd61a01
LW
1505
1506 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
1507
b683b487 1508 return domain;
fdd61a01
LW
1509}
1510
1511static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1512{
1513 return !!gc->irq.parent_domain;
1514}
1515
91a29af4
MZ
1516int gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc,
1517 union gpio_irq_fwspec *gfwspec,
1518 unsigned int parent_hwirq,
1519 unsigned int parent_type)
fdd61a01 1520{
91a29af4 1521 struct irq_fwspec *fwspec = &gfwspec->fwspec;
24258761 1522
a0b66a73 1523 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1524 fwspec->param_count = 2;
1525 fwspec->param[0] = parent_hwirq;
1526 fwspec->param[1] = parent_type;
24258761 1527
91a29af4 1528 return 0;
fdd61a01
LW
1529}
1530EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
1531
91a29af4
MZ
1532int gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc,
1533 union gpio_irq_fwspec *gfwspec,
1534 unsigned int parent_hwirq,
1535 unsigned int parent_type)
fdd61a01 1536{
91a29af4 1537 struct irq_fwspec *fwspec = &gfwspec->fwspec;
24258761 1538
a0b66a73 1539 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1540 fwspec->param_count = 4;
1541 fwspec->param[0] = 0;
1542 fwspec->param[1] = parent_hwirq;
1543 fwspec->param[2] = 0;
1544 fwspec->param[3] = parent_type;
24258761 1545
91a29af4 1546 return 0;
fdd61a01
LW
1547}
1548EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
1549
1550#else
1551
b683b487 1552static struct irq_domain *gpiochip_hierarchy_create_domain(struct gpio_chip *gc)
fdd61a01 1553{
b683b487 1554 return ERR_PTR(-EINVAL);
fdd61a01
LW
1555}
1556
1557static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1558{
1559 return false;
1560}
1561
1562#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
1563
14250520
LW
1564/**
1565 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
1566 * @d: the irqdomain used by this irqchip
1567 * @irq: the global irq number used by this GPIO irqchip irq
1568 * @hwirq: the local IRQ/GPIO line offset on this gpiochip
1569 *
1570 * This function will set up the mapping for a certain IRQ line on a
1571 * gpiochip by assigning the gpiochip as chip data, and using the irqchip
1572 * stored inside the gpiochip.
1573 */
db4064cc 1574int gpiochip_irq_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hwirq)
14250520 1575{
a0b66a73 1576 struct gpio_chip *gc = d->host_data;
d377f56f 1577 int ret = 0;
14250520 1578
a0b66a73 1579 if (!gpiochip_irqchip_irq_valid(gc, hwirq))
dc749a09
GS
1580 return -ENXIO;
1581
a0b66a73 1582 irq_set_chip_data(irq, gc);
a0a8bcf4
GS
1583 /*
1584 * This lock class tells lockdep that GPIO irqs are in a different
1585 * category than their parents, so it won't report false recursion.
1586 */
a0b66a73
LW
1587 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
1588 irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler);
d245b3f9 1589 /* Chips that use nested thread handlers have them marked */
a0b66a73 1590 if (gc->irq.threaded)
1c8732bb 1591 irq_set_nested_thread(irq, 1);
14250520 1592 irq_set_noprobe(irq);
23393d49 1593
a0b66a73
LW
1594 if (gc->irq.num_parents == 1)
1595 ret = irq_set_parent(irq, gc->irq.parents[0]);
1596 else if (gc->irq.map)
1597 ret = irq_set_parent(irq, gc->irq.map[hwirq]);
e0d89728 1598
d377f56f
LW
1599 if (ret < 0)
1600 return ret;
e0d89728 1601
1333b90f
LW
1602 /*
1603 * No set-up of the hardware will happen if IRQ_TYPE_NONE
1604 * is passed as default type.
1605 */
a0b66a73
LW
1606 if (gc->irq.default_type != IRQ_TYPE_NONE)
1607 irq_set_irq_type(irq, gc->irq.default_type);
14250520
LW
1608
1609 return 0;
1610}
1b95b4eb 1611EXPORT_SYMBOL_GPL(gpiochip_irq_map);
14250520 1612
1b95b4eb 1613void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
c3626fde 1614{
a0b66a73 1615 struct gpio_chip *gc = d->host_data;
1c8732bb 1616
a0b66a73 1617 if (gc->irq.threaded)
1c8732bb 1618 irq_set_nested_thread(irq, 0);
c3626fde
LW
1619 irq_set_chip_and_handler(irq, NULL, NULL);
1620 irq_set_chip_data(irq, NULL);
1621}
1b95b4eb 1622EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
c3626fde 1623
14250520
LW
1624static const struct irq_domain_ops gpiochip_domain_ops = {
1625 .map = gpiochip_irq_map,
c3626fde 1626 .unmap = gpiochip_irq_unmap,
14250520
LW
1627 /* Virtually all GPIO irqchips are twocell:ed */
1628 .xlate = irq_domain_xlate_twocell,
1629};
1630
1efc43de
AS
1631static struct irq_domain *gpiochip_simple_create_domain(struct gpio_chip *gc)
1632{
1633 struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev);
1634 struct irq_domain *domain;
1635
1636 domain = irq_domain_create_simple(fwnode, gc->ngpio, gc->irq.first,
1637 &gpiochip_domain_ops, gc);
1638 if (!domain)
1639 return ERR_PTR(-EINVAL);
1640
1641 return domain;
1642}
1643
fdd61a01
LW
1644/*
1645 * TODO: move these activate/deactivate in under the hierarchicial
1646 * irqchip implementation as static once SPMI and SSBI (all external
1647 * users) are phased over.
1648 */
ef74f70e
BM
1649/**
1650 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
1651 * @domain: The IRQ domain used by this IRQ chip
1652 * @data: Outermost irq_data associated with the IRQ
1653 * @reserve: If set, only reserve an interrupt vector instead of assigning one
1654 *
1655 * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
1656 * used as the activate function for the &struct irq_domain_ops. The host_data
1657 * for the IRQ domain must be the &struct gpio_chip.
1658 */
1659int gpiochip_irq_domain_activate(struct irq_domain *domain,
1660 struct irq_data *data, bool reserve)
1661{
a0b66a73 1662 struct gpio_chip *gc = domain->host_data;
db4064cc 1663 unsigned int hwirq = irqd_to_hwirq(data);
ef74f70e 1664
db4064cc 1665 return gpiochip_lock_as_irq(gc, hwirq);
ef74f70e
BM
1666}
1667EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
1668
1669/**
1670 * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
1671 * @domain: The IRQ domain used by this IRQ chip
1672 * @data: Outermost irq_data associated with the IRQ
1673 *
1674 * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
1675 * be used as the deactivate function for the &struct irq_domain_ops. The
1676 * host_data for the IRQ domain must be the &struct gpio_chip.
1677 */
1678void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
1679 struct irq_data *data)
1680{
a0b66a73 1681 struct gpio_chip *gc = domain->host_data;
db4064cc 1682 unsigned int hwirq = irqd_to_hwirq(data);
ef74f70e 1683
db4064cc 1684 return gpiochip_unlock_as_irq(gc, hwirq);
ef74f70e
BM
1685}
1686EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
1687
13daf489 1688static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset)
14250520 1689{
a0b66a73 1690 struct irq_domain *domain = gc->irq.domain;
fdd61a01 1691
5467801f
SP
1692#ifdef CONFIG_GPIOLIB_IRQCHIP
1693 /*
1694 * Avoid race condition with other code, which tries to lookup
1695 * an IRQ before the irqchip has been properly registered,
1696 * i.e. while gpiochip is still being brought up.
1697 */
1698 if (!gc->irq.initialized)
1699 return -EPROBE_DEFER;
1700#endif
1701
a0b66a73 1702 if (!gpiochip_irqchip_irq_valid(gc, offset))
4e6b8238 1703 return -ENXIO;
5b76e79c 1704
fdd61a01
LW
1705#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1706 if (irq_domain_is_hierarchy(domain)) {
1707 struct irq_fwspec spec;
1708
1709 spec.fwnode = domain->fwnode;
1710 spec.param_count = 2;
a0b66a73 1711 spec.param[0] = gc->irq.child_offset_to_irq(gc, offset);
fdd61a01
LW
1712 spec.param[1] = IRQ_TYPE_NONE;
1713
1714 return irq_create_fwspec_mapping(&spec);
1715 }
1716#endif
1717
1718 return irq_create_mapping(domain, offset);
14250520
LW
1719}
1720
704f0875 1721int gpiochip_irq_reqres(struct irq_data *d)
14250520 1722{
a0b66a73 1723 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1724 unsigned int hwirq = irqd_to_hwirq(d);
5b76e79c 1725
db4064cc 1726 return gpiochip_reqres_irq(gc, hwirq);
14250520 1727}
704f0875 1728EXPORT_SYMBOL(gpiochip_irq_reqres);
14250520 1729
704f0875 1730void gpiochip_irq_relres(struct irq_data *d)
14250520 1731{
a0b66a73 1732 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1733 unsigned int hwirq = irqd_to_hwirq(d);
14250520 1734
db4064cc 1735 gpiochip_relres_irq(gc, hwirq);
14250520 1736}
704f0875 1737EXPORT_SYMBOL(gpiochip_irq_relres);
14250520 1738
a8173820
MS
1739static void gpiochip_irq_mask(struct irq_data *d)
1740{
1741 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1742 unsigned int hwirq = irqd_to_hwirq(d);
a8173820
MS
1743
1744 if (gc->irq.irq_mask)
1745 gc->irq.irq_mask(d);
db4064cc 1746 gpiochip_disable_irq(gc, hwirq);
a8173820
MS
1747}
1748
1749static void gpiochip_irq_unmask(struct irq_data *d)
1750{
1751 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1752 unsigned int hwirq = irqd_to_hwirq(d);
a8173820 1753
db4064cc 1754 gpiochip_enable_irq(gc, hwirq);
a8173820
MS
1755 if (gc->irq.irq_unmask)
1756 gc->irq.irq_unmask(d);
1757}
1758
461c1a7d 1759static void gpiochip_irq_enable(struct irq_data *d)
14250520 1760{
a0b66a73 1761 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1762 unsigned int hwirq = irqd_to_hwirq(d);
e0d89728 1763
db4064cc 1764 gpiochip_enable_irq(gc, hwirq);
a8173820 1765 gc->irq.irq_enable(d);
461c1a7d
HV
1766}
1767
1768static void gpiochip_irq_disable(struct irq_data *d)
1769{
a0b66a73 1770 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1771 unsigned int hwirq = irqd_to_hwirq(d);
461c1a7d 1772
a8173820 1773 gc->irq.irq_disable(d);
db4064cc 1774 gpiochip_disable_irq(gc, hwirq);
461c1a7d
HV
1775}
1776
a0b66a73 1777static void gpiochip_set_irq_hooks(struct gpio_chip *gc)
ca620f2d 1778{
a0b66a73 1779 struct irq_chip *irqchip = gc->irq.chip;
ca620f2d 1780
6c846d02
MZ
1781 if (irqchip->flags & IRQCHIP_IMMUTABLE)
1782 return;
1783
1784 chip_warn(gc, "not an immutable chip, please consider fixing it!\n");
1785
ca620f2d
HV
1786 if (!irqchip->irq_request_resources &&
1787 !irqchip->irq_release_resources) {
1788 irqchip->irq_request_resources = gpiochip_irq_reqres;
1789 irqchip->irq_release_resources = gpiochip_irq_relres;
1790 }
a0b66a73 1791 if (WARN_ON(gc->irq.irq_enable))
461c1a7d 1792 return;
171948ea 1793 /* Check if the irqchip already has this hook... */
9d552219
NS
1794 if (irqchip->irq_enable == gpiochip_irq_enable ||
1795 irqchip->irq_mask == gpiochip_irq_mask) {
171948ea
HV
1796 /*
1797 * ...and if so, give a gentle warning that this is bad
1798 * practice.
1799 */
a0b66a73 1800 chip_info(gc,
171948ea
HV
1801 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
1802 return;
1803 }
a8173820
MS
1804
1805 if (irqchip->irq_disable) {
1806 gc->irq.irq_disable = irqchip->irq_disable;
1807 irqchip->irq_disable = gpiochip_irq_disable;
1808 } else {
1809 gc->irq.irq_mask = irqchip->irq_mask;
1810 irqchip->irq_mask = gpiochip_irq_mask;
1811 }
1812
1813 if (irqchip->irq_enable) {
1814 gc->irq.irq_enable = irqchip->irq_enable;
1815 irqchip->irq_enable = gpiochip_irq_enable;
1816 } else {
1817 gc->irq.irq_unmask = irqchip->irq_unmask;
1818 irqchip->irq_unmask = gpiochip_irq_unmask;
1819 }
14250520
LW
1820}
1821
081bfdb3
AS
1822static int gpiochip_irqchip_add_allocated_domain(struct gpio_chip *gc,
1823 struct irq_domain *domain,
1824 bool allocated_externally)
1825{
1826 if (!domain)
1827 return -EINVAL;
1828
eec349db
AS
1829 if (gc->to_irq)
1830 chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__);
1831
081bfdb3
AS
1832 gc->to_irq = gpiochip_to_irq;
1833 gc->irq.domain = domain;
1834 gc->irq.domain_is_allocated_externally = allocated_externally;
1835
1836 /*
1837 * Using barrier() here to prevent compiler from reordering
1838 * gc->irq.initialized before adding irqdomain.
1839 */
1840 barrier();
1841
1842 gc->irq.initialized = true;
1843
1844 return 0;
1845}
1846
e0d89728
TR
1847/**
1848 * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
a0b66a73 1849 * @gc: the GPIO chip to add the IRQ chip to
39c3fd58
AL
1850 * @lock_key: lockdep class for IRQ lock
1851 * @request_key: lockdep class for IRQ request
e0d89728 1852 */
a0b66a73 1853static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1854 struct lock_class_key *lock_key,
1855 struct lock_class_key *request_key)
e0d89728 1856{
5c63a9db 1857 struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev);
a0b66a73 1858 struct irq_chip *irqchip = gc->irq.chip;
39f3ad73 1859 struct irq_domain *domain;
e0d89728
TR
1860 unsigned int type;
1861 unsigned int i;
eec349db 1862 int ret;
e0d89728
TR
1863
1864 if (!irqchip)
1865 return 0;
1866
a0b66a73
LW
1867 if (gc->irq.parent_handler && gc->can_sleep) {
1868 chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n");
e0d89728
TR
1869 return -EINVAL;
1870 }
1871
a0b66a73 1872 type = gc->irq.default_type;
e0d89728
TR
1873
1874 /*
1875 * Specifying a default trigger is a terrible idea if DT or ACPI is
1876 * used to configure the interrupts, as you may end up with
1877 * conflicting triggers. Tell the user, and reset to NONE.
1878 */
5c63a9db
AS
1879 if (WARN(fwnode && type != IRQ_TYPE_NONE,
1880 "%pfw: Ignoring %u default trigger\n", fwnode, type))
e0d89728
TR
1881 type = IRQ_TYPE_NONE;
1882
a0b66a73
LW
1883 gc->irq.default_type = type;
1884 gc->irq.lock_key = lock_key;
1885 gc->irq.request_key = request_key;
e0d89728 1886
fdd61a01 1887 /* If a parent irqdomain is provided, let's build a hierarchy */
a0b66a73 1888 if (gpiochip_hierarchy_is_hierarchical(gc)) {
39f3ad73 1889 domain = gpiochip_hierarchy_create_domain(gc);
fdd61a01 1890 } else {
39f3ad73 1891 domain = gpiochip_simple_create_domain(gc);
fdd61a01 1892 }
39f3ad73
AS
1893 if (IS_ERR(domain))
1894 return PTR_ERR(domain);
e0d89728 1895
a0b66a73 1896 if (gc->irq.parent_handler) {
a0b66a73 1897 for (i = 0; i < gc->irq.num_parents; i++) {
cfe6807d
MZ
1898 void *data;
1899
1900 if (gc->irq.per_parent_data)
1901 data = gc->irq.parent_handler_data_array[i];
1902 else
1903 data = gc->irq.parent_handler_data ?: gc;
1904
e0d89728
TR
1905 /*
1906 * The parent IRQ chip is already using the chip_data
1907 * for this IRQ chip, so our callbacks simply use the
1908 * handler_data.
1909 */
a0b66a73
LW
1910 irq_set_chained_handler_and_data(gc->irq.parents[i],
1911 gc->irq.parent_handler,
e0d89728
TR
1912 data);
1913 }
e0d89728
TR
1914 }
1915
a0b66a73 1916 gpiochip_set_irq_hooks(gc);
ca620f2d 1917
eec349db
AS
1918 ret = gpiochip_irqchip_add_allocated_domain(gc, domain, false);
1919 if (ret)
1920 return ret;
5467801f 1921
06fb4ecf
ML
1922 acpi_gpiochip_request_interrupts(gc);
1923
e0d89728
TR
1924 return 0;
1925}
1926
14250520
LW
1927/**
1928 * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
a0b66a73 1929 * @gc: the gpiochip to remove the irqchip from
14250520
LW
1930 *
1931 * This is called only from gpiochip_remove()
1932 */
a0b66a73 1933static void gpiochip_irqchip_remove(struct gpio_chip *gc)
14250520 1934{
a0b66a73 1935 struct irq_chip *irqchip = gc->irq.chip;
39e5f096 1936 unsigned int offset;
c3626fde 1937
a0b66a73 1938 acpi_gpiochip_free_interrupts(gc);
afa82fab 1939
a0b66a73
LW
1940 if (irqchip && gc->irq.parent_handler) {
1941 struct gpio_irq_chip *irq = &gc->irq;
39e5f096
TR
1942 unsigned int i;
1943
1944 for (i = 0; i < irq->num_parents; i++)
1945 irq_set_chained_handler_and_data(irq->parents[i],
1946 NULL, NULL);
25e4fe92
DES
1947 }
1948
c3626fde 1949 /* Remove all IRQ mappings and delete the domain */
ff7a1790 1950 if (!gc->irq.domain_is_allocated_externally && gc->irq.domain) {
39e5f096
TR
1951 unsigned int irq;
1952
a0b66a73
LW
1953 for (offset = 0; offset < gc->ngpio; offset++) {
1954 if (!gpiochip_irqchip_irq_valid(gc, offset))
79b804cb 1955 continue;
f0fbe7bc 1956
a0b66a73 1957 irq = irq_find_mapping(gc->irq.domain, offset);
f0fbe7bc 1958 irq_dispose_mapping(irq);
79b804cb 1959 }
f0fbe7bc 1960
a0b66a73 1961 irq_domain_remove(gc->irq.domain);
c3626fde 1962 }
14250520 1963
6c846d02 1964 if (irqchip && !(irqchip->flags & IRQCHIP_IMMUTABLE)) {
461c1a7d
HV
1965 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
1966 irqchip->irq_request_resources = NULL;
1967 irqchip->irq_release_resources = NULL;
1968 }
1969 if (irqchip->irq_enable == gpiochip_irq_enable) {
a0b66a73
LW
1970 irqchip->irq_enable = gc->irq.irq_enable;
1971 irqchip->irq_disable = gc->irq.irq_disable;
461c1a7d 1972 }
14250520 1973 }
a0b66a73
LW
1974 gc->irq.irq_enable = NULL;
1975 gc->irq.irq_disable = NULL;
1976 gc->irq.chip = NULL;
79b804cb 1977
a0b66a73 1978 gpiochip_irqchip_free_valid_mask(gc);
14250520
LW
1979}
1980
6a45b0e2
MW
1981/**
1982 * gpiochip_irqchip_add_domain() - adds an irqdomain to a gpiochip
1983 * @gc: the gpiochip to add the irqchip to
1984 * @domain: the irqdomain to add to the gpiochip
1985 *
1986 * This function adds an IRQ domain to the gpiochip.
1987 */
1988int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
1989 struct irq_domain *domain)
1990{
081bfdb3 1991 return gpiochip_irqchip_add_allocated_domain(gc, domain, true);
6a45b0e2
MW
1992}
1993EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain);
1994
14250520
LW
1995#else /* CONFIG_GPIOLIB_IRQCHIP */
1996
a0b66a73 1997static inline int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1998 struct lock_class_key *lock_key,
1999 struct lock_class_key *request_key)
e0d89728
TR
2000{
2001 return 0;
2002}
a0b66a73 2003static void gpiochip_irqchip_remove(struct gpio_chip *gc) {}
9411e3aa 2004
a0b66a73 2005static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
9411e3aa
AS
2006{
2007 return 0;
2008}
2009
a0b66a73 2010static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb
MW
2011{
2012 return 0;
2013}
a0b66a73 2014static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 2015{ }
14250520
LW
2016
2017#endif /* CONFIG_GPIOLIB_IRQCHIP */
2018
c771c2f4
JG
2019/**
2020 * gpiochip_generic_request() - request the gpio function for a pin
a0b66a73 2021 * @gc: the gpiochip owning the GPIO
c771c2f4
JG
2022 * @offset: the offset of the GPIO to request for GPIO function
2023 */
13daf489 2024int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset)
c771c2f4 2025{
56e337f2
BG
2026#ifdef CONFIG_PINCTRL
2027 if (list_empty(&gc->gpiodev->pin_ranges))
2028 return 0;
2029#endif
2030
acb38be6 2031 return pinctrl_gpio_request(gc, offset);
c771c2f4
JG
2032}
2033EXPORT_SYMBOL_GPL(gpiochip_generic_request);
2034
2035/**
2036 * gpiochip_generic_free() - free the gpio function from a pin
a0b66a73 2037 * @gc: the gpiochip to request the gpio function for
c771c2f4
JG
2038 * @offset: the offset of the GPIO to free from GPIO function
2039 */
13daf489 2040void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset)
c771c2f4 2041{
56e337f2
BG
2042#ifdef CONFIG_PINCTRL
2043 if (list_empty(&gc->gpiodev->pin_ranges))
2044 return;
2045#endif
2046
4fccb263 2047 pinctrl_gpio_free(gc, offset);
c771c2f4
JG
2048}
2049EXPORT_SYMBOL_GPL(gpiochip_generic_free);
2050
2956b5d9
MW
2051/**
2052 * gpiochip_generic_config() - apply configuration for a pin
a0b66a73 2053 * @gc: the gpiochip owning the GPIO
2956b5d9
MW
2054 * @offset: the offset of the GPIO to apply the configuration
2055 * @config: the configuration to be applied
2056 */
13daf489 2057int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset,
2956b5d9
MW
2058 unsigned long config)
2059{
acf2981b 2060 return pinctrl_gpio_set_config(gc, offset, config);
2956b5d9
MW
2061}
2062EXPORT_SYMBOL_GPL(gpiochip_generic_config);
2063
f23f1516 2064#ifdef CONFIG_PINCTRL
165adc9c 2065
586a87e6
CR
2066/**
2067 * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
a0b66a73 2068 * @gc: the gpiochip to add the range for
d32651f6 2069 * @pctldev: the pin controller to map to
586a87e6
CR
2070 * @gpio_offset: the start offset in the current gpio_chip number space
2071 * @pin_group: name of the pin group inside the pin controller
973c1714
CL
2072 *
2073 * Calling this function directly from a DeviceTree-supported
2074 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2075 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2076 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
586a87e6 2077 */
a0b66a73 2078int gpiochip_add_pingroup_range(struct gpio_chip *gc,
586a87e6
CR
2079 struct pinctrl_dev *pctldev,
2080 unsigned int gpio_offset, const char *pin_group)
2081{
2082 struct gpio_pin_range *pin_range;
a0b66a73 2083 struct gpio_device *gdev = gc->gpiodev;
586a87e6
CR
2084 int ret;
2085
2086 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
2087 if (!pin_range) {
a0b66a73 2088 chip_err(gc, "failed to allocate pin ranges\n");
586a87e6
CR
2089 return -ENOMEM;
2090 }
2091
2092 /* Use local offset as range ID */
2093 pin_range->range.id = gpio_offset;
a0b66a73
LW
2094 pin_range->range.gc = gc;
2095 pin_range->range.name = gc->label;
fdeb8e15 2096 pin_range->range.base = gdev->base + gpio_offset;
586a87e6
CR
2097 pin_range->pctldev = pctldev;
2098
2099 ret = pinctrl_get_group_pins(pctldev, pin_group,
2100 &pin_range->range.pins,
2101 &pin_range->range.npins);
61c6375d
MN
2102 if (ret < 0) {
2103 kfree(pin_range);
586a87e6 2104 return ret;
61c6375d 2105 }
586a87e6
CR
2106
2107 pinctrl_add_gpio_range(pctldev, &pin_range->range);
2108
a0b66a73 2109 chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n",
1a2a99c6 2110 gpio_offset, gpio_offset + pin_range->range.npins - 1,
586a87e6
CR
2111 pinctrl_dev_get_devname(pctldev), pin_group);
2112
20ec3e39 2113 list_add_tail(&pin_range->node, &gdev->pin_ranges);
586a87e6
CR
2114
2115 return 0;
2116}
2117EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
2118
3f0f8670
LW
2119/**
2120 * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
a0b66a73 2121 * @gc: the gpiochip to add the range for
950d55f5 2122 * @pinctl_name: the dev_name() of the pin controller to map to
316511c0
LW
2123 * @gpio_offset: the start offset in the current gpio_chip number space
2124 * @pin_offset: the start offset in the pin controller number space
3f0f8670
LW
2125 * @npins: the number of pins from the offset of each pin space (GPIO and
2126 * pin controller) to accumulate in this range
950d55f5
TR
2127 *
2128 * Returns:
2129 * 0 on success, or a negative error-code on failure.
973c1714
CL
2130 *
2131 * Calling this function directly from a DeviceTree-supported
2132 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2133 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2134 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
3f0f8670 2135 */
a0b66a73 2136int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
316511c0 2137 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 2138 unsigned int npins)
f23f1516
SH
2139{
2140 struct gpio_pin_range *pin_range;
a0b66a73 2141 struct gpio_device *gdev = gc->gpiodev;
b4d4b1f0 2142 int ret;
f23f1516 2143
3f0f8670 2144 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
f23f1516 2145 if (!pin_range) {
a0b66a73 2146 chip_err(gc, "failed to allocate pin ranges\n");
1e63d7b9 2147 return -ENOMEM;
f23f1516
SH
2148 }
2149
3f0f8670 2150 /* Use local offset as range ID */
316511c0 2151 pin_range->range.id = gpio_offset;
a0b66a73
LW
2152 pin_range->range.gc = gc;
2153 pin_range->range.name = gc->label;
fdeb8e15 2154 pin_range->range.base = gdev->base + gpio_offset;
316511c0 2155 pin_range->range.pin_base = pin_offset;
f23f1516 2156 pin_range->range.npins = npins;
192c369c 2157 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
f23f1516 2158 &pin_range->range);
8f23ca1a 2159 if (IS_ERR(pin_range->pctldev)) {
b4d4b1f0 2160 ret = PTR_ERR(pin_range->pctldev);
a0b66a73 2161 chip_err(gc, "could not create pin range\n");
3f0f8670 2162 kfree(pin_range);
b4d4b1f0 2163 return ret;
3f0f8670 2164 }
a0b66a73 2165 chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
1a2a99c6 2166 gpio_offset, gpio_offset + npins - 1,
316511c0
LW
2167 pinctl_name,
2168 pin_offset, pin_offset + npins - 1);
f23f1516 2169
20ec3e39 2170 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1e63d7b9
LW
2171
2172 return 0;
f23f1516 2173}
165adc9c 2174EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
f23f1516 2175
3f0f8670
LW
2176/**
2177 * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
a0b66a73 2178 * @gc: the chip to remove all the mappings for
3f0f8670 2179 */
a0b66a73 2180void gpiochip_remove_pin_ranges(struct gpio_chip *gc)
f23f1516
SH
2181{
2182 struct gpio_pin_range *pin_range, *tmp;
a0b66a73 2183 struct gpio_device *gdev = gc->gpiodev;
f23f1516 2184
20ec3e39 2185 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
f23f1516
SH
2186 list_del(&pin_range->node);
2187 pinctrl_remove_gpio_range(pin_range->pctldev,
2188 &pin_range->range);
3f0f8670 2189 kfree(pin_range);
f23f1516
SH
2190 }
2191}
165adc9c
LW
2192EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
2193
2194#endif /* CONFIG_PINCTRL */
f23f1516 2195
d2876d08
DB
2196/* These "optional" allocation calls help prevent drivers from stomping
2197 * on each other, and help provide better diagnostics in debugfs.
2198 * They're called even less than the "set direction" calls.
2199 */
fac9d885 2200static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
d2876d08 2201{
a0b66a73 2202 struct gpio_chip *gc = desc->gdev->chip;
d377f56f 2203 int ret;
d2876d08 2204 unsigned long flags;
3789f5ac 2205 unsigned offset;
d2876d08 2206
18534df4
MS
2207 if (label) {
2208 label = kstrdup_const(label, GFP_KERNEL);
2209 if (!label)
2210 return -ENOMEM;
2211 }
2212
bcabdef1
AC
2213 spin_lock_irqsave(&gpio_lock, flags);
2214
d2876d08 2215 /* NOTE: gpio_request() can be called in early boot,
35e8bb51 2216 * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
d2876d08
DB
2217 */
2218
2219 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
2220 desc_set_label(desc, label ? : "?");
438d8908 2221 } else {
d377f56f 2222 ret = -EBUSY;
95d9f84f 2223 goto out_free_unlock;
35e8bb51
DB
2224 }
2225
a0b66a73
LW
2226 if (gc->request) {
2227 /* gc->request may sleep */
35e8bb51 2228 spin_unlock_irqrestore(&gpio_lock, flags);
3789f5ac 2229 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
2230 if (gpiochip_line_is_valid(gc, offset))
2231 ret = gc->request(gc, offset);
3789f5ac 2232 else
d377f56f 2233 ret = -EINVAL;
35e8bb51
DB
2234 spin_lock_irqsave(&gpio_lock, flags);
2235
8bbff39c 2236 if (ret) {
35e8bb51 2237 desc_set_label(desc, NULL);
35e8bb51 2238 clear_bit(FLAG_REQUESTED, &desc->flags);
95d9f84f 2239 goto out_free_unlock;
35e8bb51 2240 }
438d8908 2241 }
a0b66a73
LW
2242 if (gc->get_direction) {
2243 /* gc->get_direction may sleep */
80b0a602 2244 spin_unlock_irqrestore(&gpio_lock, flags);
372e722e 2245 gpiod_get_direction(desc);
80b0a602
MN
2246 spin_lock_irqsave(&gpio_lock, flags);
2247 }
77c2d792 2248 spin_unlock_irqrestore(&gpio_lock, flags);
95d9f84f
AS
2249 return 0;
2250
2251out_free_unlock:
2252 spin_unlock_irqrestore(&gpio_lock, flags);
2253 kfree_const(label);
d377f56f 2254 return ret;
77c2d792
MW
2255}
2256
fdeb8e15
LW
2257/*
2258 * This descriptor validation needs to be inserted verbatim into each
2259 * function taking a descriptor, so we need to use a preprocessor
54d77198
LW
2260 * macro to avoid endless duplication. If the desc is NULL it is an
2261 * optional GPIO and calls should just bail out.
fdeb8e15 2262 */
a746a232
RV
2263static int validate_desc(const struct gpio_desc *desc, const char *func)
2264{
2265 if (!desc)
2266 return 0;
2267 if (IS_ERR(desc)) {
2268 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
2269 return PTR_ERR(desc);
2270 }
2271 if (!desc->gdev) {
2272 pr_warn("%s: invalid GPIO (no device)\n", func);
2273 return -EINVAL;
2274 }
2275 if (!desc->gdev->chip) {
2276 dev_warn(&desc->gdev->dev,
2277 "%s: backing chip is gone\n", func);
2278 return 0;
2279 }
2280 return 1;
2281}
2282
fdeb8e15 2283#define VALIDATE_DESC(desc) do { \
a746a232
RV
2284 int __valid = validate_desc(desc, __func__); \
2285 if (__valid <= 0) \
2286 return __valid; \
2287 } while (0)
fdeb8e15
LW
2288
2289#define VALIDATE_DESC_VOID(desc) do { \
a746a232
RV
2290 int __valid = validate_desc(desc, __func__); \
2291 if (__valid <= 0) \
fdeb8e15 2292 return; \
a746a232 2293 } while (0)
fdeb8e15 2294
0eb4c6c2 2295int gpiod_request(struct gpio_desc *desc, const char *label)
77c2d792 2296{
d377f56f 2297 int ret = -EPROBE_DEFER;
77c2d792 2298
fdeb8e15 2299 VALIDATE_DESC(desc);
77c2d792 2300
dc0989e3 2301 if (try_module_get(desc->gdev->owner)) {
d377f56f 2302 ret = gpiod_request_commit(desc, label);
8bbff39c 2303 if (ret)
dc0989e3 2304 module_put(desc->gdev->owner);
33a68e86 2305 else
dc0989e3 2306 gpio_device_get(desc->gdev);
77c2d792
MW
2307 }
2308
d377f56f
LW
2309 if (ret)
2310 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
77c2d792 2311
d377f56f 2312 return ret;
d2876d08 2313}
372e722e 2314
fac9d885 2315static bool gpiod_free_commit(struct gpio_desc *desc)
d2876d08 2316{
77c2d792 2317 bool ret = false;
d2876d08 2318 unsigned long flags;
a0b66a73 2319 struct gpio_chip *gc;
d2876d08 2320
3d599d1c
UKK
2321 might_sleep();
2322
d2876d08
DB
2323 spin_lock_irqsave(&gpio_lock, flags);
2324
a0b66a73
LW
2325 gc = desc->gdev->chip;
2326 if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) {
2327 if (gc->free) {
35e8bb51 2328 spin_unlock_irqrestore(&gpio_lock, flags);
a0b66a73
LW
2329 might_sleep_if(gc->can_sleep);
2330 gc->free(gc, gpio_chip_hwgpio(desc));
35e8bb51
DB
2331 spin_lock_irqsave(&gpio_lock, flags);
2332 }
18534df4 2333 kfree_const(desc->label);
d2876d08 2334 desc_set_label(desc, NULL);
07697461 2335 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
35e8bb51 2336 clear_bit(FLAG_REQUESTED, &desc->flags);
aca5ce14 2337 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
25553ff0 2338 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
9225d516
DF
2339 clear_bit(FLAG_PULL_UP, &desc->flags);
2340 clear_bit(FLAG_PULL_DOWN, &desc->flags);
2148ad77 2341 clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
73e03419
KG
2342 clear_bit(FLAG_EDGE_RISING, &desc->flags);
2343 clear_bit(FLAG_EDGE_FALLING, &desc->flags);
f625d460 2344 clear_bit(FLAG_IS_HOGGED, &desc->flags);
63636d95
GU
2345#ifdef CONFIG_OF_DYNAMIC
2346 desc->hog = NULL;
65cff704
KG
2347#endif
2348#ifdef CONFIG_GPIO_CDEV
2349 WRITE_ONCE(desc->debounce_period_us, 0);
63636d95 2350#endif
77c2d792
MW
2351 ret = true;
2352 }
d2876d08
DB
2353
2354 spin_unlock_irqrestore(&gpio_lock, flags);
9ce4ed5b 2355 gpiod_line_state_notify(desc, GPIOLINE_CHANGED_RELEASED);
51c1064e 2356
77c2d792
MW
2357 return ret;
2358}
2359
0eb4c6c2 2360void gpiod_free(struct gpio_desc *desc)
77c2d792 2361{
3386fb86
BG
2362 /*
2363 * We must not use VALIDATE_DESC_VOID() as the underlying gdev->chip
2364 * may already be NULL but we still want to put the references.
2365 */
2366 if (!desc)
2367 return;
2368
2369 if (!gpiod_free_commit(desc))
77c2d792 2370 WARN_ON(extra_checks);
3386fb86
BG
2371
2372 module_put(desc->gdev->owner);
2373 gpio_device_put(desc->gdev);
d2876d08 2374}
372e722e 2375
d2876d08 2376/**
ee25fba7
BG
2377 * gpiochip_dup_line_label - Get a copy of the consumer label.
2378 * @gc: GPIO chip controlling this line.
2379 * @offset: Hardware offset of the line.
d2876d08 2380 *
ee25fba7
BG
2381 * Returns:
2382 * Pointer to a copy of the consumer label if the line is requested or NULL
2383 * if it's not. If a valid pointer was returned, it must be freed using
2384 * kfree(). In case of a memory allocation error, the function returns %ENOMEM.
d2876d08 2385 *
ee25fba7 2386 * Must not be called from atomic context.
d2876d08 2387 */
ee25fba7 2388char *gpiochip_dup_line_label(struct gpio_chip *gc, unsigned int offset)
d2876d08 2389{
6c0b4e6c 2390 struct gpio_desc *desc;
f8d05e27 2391 char *label;
6c0b4e6c 2392
a0b66a73 2393 desc = gpiochip_get_desc(gc, offset);
1739a2d8
BG
2394 if (IS_ERR(desc))
2395 return NULL;
6c0b4e6c 2396
f8d05e27
BG
2397 guard(spinlock_irqsave)(&gpio_lock);
2398
2399 if (!test_bit(FLAG_REQUESTED, &desc->flags))
d2876d08 2400 return NULL;
f8d05e27
BG
2401
2402 label = kstrdup(desc->label, GFP_KERNEL);
2403 if (!label)
ee25fba7
BG
2404 return ERR_PTR(-ENOMEM);
2405
f8d05e27 2406 return label;
d2876d08 2407}
ee25fba7 2408EXPORT_SYMBOL_GPL(gpiochip_dup_line_label);
d2876d08 2409
77c2d792
MW
2410/**
2411 * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
a0b66a73 2412 * @gc: GPIO chip
950d55f5 2413 * @hwnum: hardware number of the GPIO for which to request the descriptor
77c2d792 2414 * @label: label for the GPIO
5923ea6c
LW
2415 * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
2416 * specify things like line inversion semantics with the machine flags
2417 * such as GPIO_OUT_LOW
2418 * @dflags: descriptor request flags for this GPIO or 0 if default, this
2419 * can be used to specify consumer semantics such as open drain
77c2d792
MW
2420 *
2421 * Function allows GPIO chip drivers to request and use their own GPIO
2422 * descriptors via gpiolib API. Difference to gpiod_request() is that this
2423 * function will not increase reference count of the GPIO chip module. This
2424 * allows the GPIO chip module to be unloaded as needed (we assume that the
2425 * GPIO chip driver handles freeing the GPIOs it has requested).
950d55f5
TR
2426 *
2427 * Returns:
2428 * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
2429 * code on failure.
77c2d792 2430 */
a0b66a73 2431struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc,
06863620 2432 unsigned int hwnum,
21abf103 2433 const char *label,
5923ea6c
LW
2434 enum gpio_lookup_flags lflags,
2435 enum gpiod_flags dflags)
77c2d792 2436{
a0b66a73 2437 struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum);
d377f56f 2438 int ret;
77c2d792 2439
abdc08a3 2440 if (IS_ERR(desc)) {
a0b66a73 2441 chip_err(gc, "failed to get GPIO descriptor\n");
abdc08a3
AC
2442 return desc;
2443 }
2444
d377f56f
LW
2445 ret = gpiod_request_commit(desc, label);
2446 if (ret < 0)
2447 return ERR_PTR(ret);
77c2d792 2448
d377f56f
LW
2449 ret = gpiod_configure_flags(desc, label, lflags, dflags);
2450 if (ret) {
a0b66a73 2451 chip_err(gc, "setup of own GPIO %s failed\n", label);
21abf103 2452 gpiod_free_commit(desc);
d377f56f 2453 return ERR_PTR(ret);
21abf103
LW
2454 }
2455
abdc08a3 2456 return desc;
77c2d792 2457}
f7d4ad98 2458EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
77c2d792
MW
2459
2460/**
2461 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
2462 * @desc: GPIO descriptor to free
2463 *
2464 * Function frees the given GPIO requested previously with
2465 * gpiochip_request_own_desc().
2466 */
2467void gpiochip_free_own_desc(struct gpio_desc *desc)
2468{
2469 if (desc)
fac9d885 2470 gpiod_free_commit(desc);
77c2d792 2471}
f7d4ad98 2472EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
d2876d08 2473
fdeb8e15
LW
2474/*
2475 * Drivers MUST set GPIO direction before making get/set calls. In
d2876d08
DB
2476 * some cases this is done in early boot, before IRQs are enabled.
2477 *
2478 * As a rule these aren't called more than once (except for drivers
2479 * using the open-drain emulation idiom) so these are natural places
2480 * to accumulate extra debugging checks. Note that we can't (yet)
2481 * rely on gpio_request() having been called beforehand.
2482 */
2483
d99f8876 2484static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset,
62adc6f3 2485 unsigned long config)
71479789 2486{
d90f3685
BG
2487 if (!gc->set_config)
2488 return -ENOTSUPP;
542f3615 2489
62adc6f3 2490 return gc->set_config(gc, offset, config);
71479789
TP
2491}
2492
0c4d8666
AS
2493static int gpio_set_config_with_argument(struct gpio_desc *desc,
2494 enum pin_config_param mode,
2495 u32 argument)
d99f8876 2496{
a0b66a73 2497 struct gpio_chip *gc = desc->gdev->chip;
91b4ea5f 2498 unsigned long config;
0c4d8666
AS
2499
2500 config = pinconf_to_config_packed(mode, argument);
2501 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
2502}
2503
baca3b15
AS
2504static int gpio_set_config_with_argument_optional(struct gpio_desc *desc,
2505 enum pin_config_param mode,
2506 u32 argument)
2507{
2508 struct device *dev = &desc->gdev->dev;
2509 int gpio = gpio_chip_hwgpio(desc);
2510 int ret;
2511
2512 ret = gpio_set_config_with_argument(desc, mode, argument);
2513 if (ret != -ENOTSUPP)
2514 return ret;
d99f8876
BG
2515
2516 switch (mode) {
baca3b15
AS
2517 case PIN_CONFIG_PERSIST_STATE:
2518 dev_dbg(dev, "Persistence not supported for GPIO %d\n", gpio);
d99f8876 2519 break;
d99f8876 2520 default:
baca3b15 2521 break;
d99f8876
BG
2522 }
2523
baca3b15
AS
2524 return 0;
2525}
2526
0c4d8666
AS
2527static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode)
2528{
6aa32ad7 2529 return gpio_set_config_with_argument(desc, mode, 0);
d99f8876
BG
2530}
2531
5f4bf171 2532static int gpio_set_bias(struct gpio_desc *desc)
2148ad77 2533{
9ef6293c 2534 enum pin_config_param bias;
6aa32ad7 2535 unsigned int arg;
2148ad77
KG
2536
2537 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
2538 bias = PIN_CONFIG_BIAS_DISABLE;
2539 else if (test_bit(FLAG_PULL_UP, &desc->flags))
2540 bias = PIN_CONFIG_BIAS_PULL_UP;
2541 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
2542 bias = PIN_CONFIG_BIAS_PULL_DOWN;
9ef6293c
AS
2543 else
2544 return 0;
2148ad77 2545
6aa32ad7
AS
2546 switch (bias) {
2547 case PIN_CONFIG_BIAS_PULL_DOWN:
2548 case PIN_CONFIG_BIAS_PULL_UP:
2549 arg = 1;
2550 break;
2551
2552 default:
2553 arg = 0;
2554 break;
2148ad77 2555 }
6aa32ad7 2556
baca3b15 2557 return gpio_set_config_with_argument_optional(desc, bias, arg);
2148ad77
KG
2558}
2559
660c619b
AS
2560/**
2561 * gpio_set_debounce_timeout() - Set debounce timeout
2562 * @desc: GPIO descriptor to set the debounce timeout
2563 * @debounce: Debounce timeout in microseconds
2564 *
2565 * The function calls the certain GPIO driver to set debounce timeout
2566 * in the hardware.
2567 *
2568 * Returns 0 on success, or negative error code otherwise.
2569 */
f725edd8
AS
2570int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce)
2571{
2572 return gpio_set_config_with_argument_optional(desc,
2573 PIN_CONFIG_INPUT_DEBOUNCE,
2574 debounce);
2148ad77
KG
2575}
2576
79a9becd
AC
2577/**
2578 * gpiod_direction_input - set the GPIO direction to input
2579 * @desc: GPIO to set to input
2580 *
2581 * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
2582 * be called safely on it.
2583 *
2584 * Return 0 in case of success, else an error code.
2585 */
2586int gpiod_direction_input(struct gpio_desc *desc)
d2876d08 2587{
a0b66a73 2588 struct gpio_chip *gc;
d377f56f 2589 int ret = 0;
d2876d08 2590
fdeb8e15 2591 VALIDATE_DESC(desc);
a0b66a73 2592 gc = desc->gdev->chip;
bcabdef1 2593
e48d194d
LW
2594 /*
2595 * It is legal to have no .get() and .direction_input() specified if
2596 * the chip is output-only, but you can't specify .direction_input()
2597 * and not support the .get() operation, that doesn't make sense.
2598 */
a0b66a73 2599 if (!gc->get && gc->direction_input) {
6424de5a 2600 gpiod_warn(desc,
e48d194d
LW
2601 "%s: missing get() but have direction_input()\n",
2602 __func__);
be1a4b13
LW
2603 return -EIO;
2604 }
2605
e48d194d
LW
2606 /*
2607 * If we have a .direction_input() callback, things are simple,
2608 * just call it. Else we are some input-only chip so try to check the
2609 * direction (if .get_direction() is supported) else we silently
2610 * assume we are in input mode after this.
2611 */
a0b66a73
LW
2612 if (gc->direction_input) {
2613 ret = gc->direction_input(gc, gpio_chip_hwgpio(desc));
2614 } else if (gc->get_direction &&
2615 (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) {
ae9847f4 2616 gpiod_warn(desc,
e48d194d
LW
2617 "%s: missing direction_input() operation and line is output\n",
2618 __func__);
ae9847f4
RRD
2619 return -EIO;
2620 }
2148ad77 2621 if (ret == 0) {
d2876d08 2622 clear_bit(FLAG_IS_OUT, &desc->flags);
5f4bf171 2623 ret = gpio_set_bias(desc);
2148ad77 2624 }
d449991c 2625
d377f56f 2626 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
d82da797 2627
d377f56f 2628 return ret;
d2876d08 2629}
79a9becd 2630EXPORT_SYMBOL_GPL(gpiod_direction_input);
372e722e 2631
fac9d885 2632static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
d2876d08 2633{
c663e5f5 2634 struct gpio_chip *gc = desc->gdev->chip;
ad17731d 2635 int val = !!value;
ae9847f4 2636 int ret = 0;
d2876d08 2637
e48d194d
LW
2638 /*
2639 * It's OK not to specify .direction_output() if the gpiochip is
2640 * output-only, but if there is then not even a .set() operation it
2641 * is pretty tricky to drive the output line.
2642 */
ae9847f4 2643 if (!gc->set && !gc->direction_output) {
6424de5a 2644 gpiod_warn(desc,
e48d194d
LW
2645 "%s: missing set() and direction_output() operations\n",
2646 __func__);
be1a4b13
LW
2647 return -EIO;
2648 }
2649
ae9847f4
RRD
2650 if (gc->direction_output) {
2651 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
2652 } else {
e48d194d 2653 /* Check that we are in output mode if we can */
ae9847f4
RRD
2654 if (gc->get_direction &&
2655 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
2656 gpiod_warn(desc,
2657 "%s: missing direction_output() operation\n",
2658 __func__);
2659 return -EIO;
2660 }
e48d194d
LW
2661 /*
2662 * If we can't actively set the direction, we are some
2663 * output-only chip, so just drive the output as desired.
2664 */
ae9847f4
RRD
2665 gc->set(gc, gpio_chip_hwgpio(desc), val);
2666 }
2667
c663e5f5 2668 if (!ret)
d2876d08 2669 set_bit(FLAG_IS_OUT, &desc->flags);
ad17731d 2670 trace_gpio_value(desc_to_gpio(desc), 0, val);
c663e5f5
LW
2671 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
2672 return ret;
d2876d08 2673}
ef70bbe1
PZ
2674
2675/**
2676 * gpiod_direction_output_raw - set the GPIO direction to output
2677 * @desc: GPIO to set to output
2678 * @value: initial output value of the GPIO
2679 *
2680 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2681 * be called safely on it. The initial value of the output must be specified
2682 * as raw value on the physical line without regard for the ACTIVE_LOW status.
2683 *
2684 * Return 0 in case of success, else an error code.
2685 */
2686int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
2687{
fdeb8e15 2688 VALIDATE_DESC(desc);
fac9d885 2689 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1
PZ
2690}
2691EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
2692
2693/**
90df4fe0 2694 * gpiod_direction_output - set the GPIO direction to output
ef70bbe1
PZ
2695 * @desc: GPIO to set to output
2696 * @value: initial output value of the GPIO
2697 *
2698 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2699 * be called safely on it. The initial value of the output must be specified
2700 * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
2701 * account.
2702 *
2703 * Return 0 in case of success, else an error code.
2704 */
2705int gpiod_direction_output(struct gpio_desc *desc, int value)
2706{
02e47980
LW
2707 int ret;
2708
fdeb8e15 2709 VALIDATE_DESC(desc);
ef70bbe1
PZ
2710 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2711 value = !value;
ad17731d
LW
2712 else
2713 value = !!value;
02e47980 2714
4e9439dd
HV
2715 /* GPIOs used for enabled IRQs shall not be set as output */
2716 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
2717 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
02e47980
LW
2718 gpiod_err(desc,
2719 "%s: tried to set a GPIO tied to an IRQ as output\n",
2720 __func__);
2721 return -EIO;
2722 }
2723
2724 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
2725 /* First see if we can enable open drain in hardware */
83522358 2726 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN);
02e47980
LW
2727 if (!ret)
2728 goto set_output_value;
2729 /* Emulate open drain by not actively driving the line high */
e735244e
BG
2730 if (value) {
2731 ret = gpiod_direction_input(desc);
2732 goto set_output_flag;
2733 }
1cef8b50 2734 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
83522358 2735 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE);
02e47980
LW
2736 if (!ret)
2737 goto set_output_value;
2738 /* Emulate open source by not actively driving the line low */
e735244e
BG
2739 if (!value) {
2740 ret = gpiod_direction_input(desc);
2741 goto set_output_flag;
2742 }
02e47980 2743 } else {
83522358 2744 gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL);
02e47980
LW
2745 }
2746
2747set_output_value:
5f4bf171 2748 ret = gpio_set_bias(desc);
2821ae5f
KG
2749 if (ret)
2750 return ret;
fac9d885 2751 return gpiod_direction_output_raw_commit(desc, value);
e735244e
BG
2752
2753set_output_flag:
2754 /*
2755 * When emulating open-source or open-drain functionalities by not
2756 * actively driving the line (setting mode to input) we still need to
2757 * set the IS_OUT flag or otherwise we won't be able to set the line
2758 * value anymore.
2759 */
2760 if (ret == 0)
2761 set_bit(FLAG_IS_OUT, &desc->flags);
2762 return ret;
ef70bbe1 2763}
79a9becd 2764EXPORT_SYMBOL_GPL(gpiod_direction_output);
d2876d08 2765
42112dd7
DP
2766/**
2767 * gpiod_enable_hw_timestamp_ns - Enable hardware timestamp in nanoseconds.
2768 *
2769 * @desc: GPIO to enable.
2770 * @flags: Flags related to GPIO edge.
2771 *
2772 * Return 0 in case of success, else negative error code.
2773 */
2774int gpiod_enable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags)
2775{
2776 int ret = 0;
2777 struct gpio_chip *gc;
2778
2779 VALIDATE_DESC(desc);
2780
2781 gc = desc->gdev->chip;
2782 if (!gc->en_hw_timestamp) {
2783 gpiod_warn(desc, "%s: hw ts not supported\n", __func__);
2784 return -ENOTSUPP;
2785 }
2786
2787 ret = gc->en_hw_timestamp(gc, gpio_chip_hwgpio(desc), flags);
2788 if (ret)
2789 gpiod_warn(desc, "%s: hw ts request failed\n", __func__);
2790
2791 return ret;
2792}
2793EXPORT_SYMBOL_GPL(gpiod_enable_hw_timestamp_ns);
2794
2795/**
2796 * gpiod_disable_hw_timestamp_ns - Disable hardware timestamp.
2797 *
2798 * @desc: GPIO to disable.
2799 * @flags: Flags related to GPIO edge, same value as used during enable call.
2800 *
2801 * Return 0 in case of success, else negative error code.
2802 */
2803int gpiod_disable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags)
2804{
2805 int ret = 0;
2806 struct gpio_chip *gc;
2807
2808 VALIDATE_DESC(desc);
2809
2810 gc = desc->gdev->chip;
2811 if (!gc->dis_hw_timestamp) {
2812 gpiod_warn(desc, "%s: hw ts not supported\n", __func__);
2813 return -ENOTSUPP;
2814 }
2815
2816 ret = gc->dis_hw_timestamp(gc, gpio_chip_hwgpio(desc), flags);
2817 if (ret)
2818 gpiod_warn(desc, "%s: hw ts release failed\n", __func__);
2819
2820 return ret;
2821}
2822EXPORT_SYMBOL_GPL(gpiod_disable_hw_timestamp_ns);
2823
8ced32ff
GU
2824/**
2825 * gpiod_set_config - sets @config for a GPIO
2826 * @desc: descriptor of the GPIO for which to set the configuration
2827 * @config: Same packed config format as generic pinconf
2828 *
2829 * Returns:
2830 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2831 * configuration.
2832 */
2833int gpiod_set_config(struct gpio_desc *desc, unsigned long config)
2834{
a0b66a73 2835 struct gpio_chip *gc;
8ced32ff
GU
2836
2837 VALIDATE_DESC(desc);
a0b66a73 2838 gc = desc->gdev->chip;
8ced32ff 2839
a0b66a73 2840 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
8ced32ff
GU
2841}
2842EXPORT_SYMBOL_GPL(gpiod_set_config);
2843
c4b5be98 2844/**
950d55f5
TR
2845 * gpiod_set_debounce - sets @debounce time for a GPIO
2846 * @desc: descriptor of the GPIO for which to set debounce time
2847 * @debounce: debounce time in microseconds
65d87656 2848 *
950d55f5
TR
2849 * Returns:
2850 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2851 * debounce time.
c4b5be98 2852 */
13daf489 2853int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce)
c4b5be98 2854{
8ced32ff 2855 unsigned long config;
be1a4b13 2856
2956b5d9 2857 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
8ced32ff 2858 return gpiod_set_config(desc, config);
c4b5be98 2859}
79a9becd 2860EXPORT_SYMBOL_GPL(gpiod_set_debounce);
372e722e 2861
e10f72bf
AJ
2862/**
2863 * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
2864 * @desc: descriptor of the GPIO for which to configure persistence
2865 * @transitory: True to lose state on suspend or reset, false for persistence
2866 *
2867 * Returns:
2868 * 0 on success, otherwise a negative error code.
2869 */
2870int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
2871{
156dd392 2872 VALIDATE_DESC(desc);
e10f72bf
AJ
2873 /*
2874 * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
2875 * persistence state.
2876 */
4fc5bfeb 2877 assign_bit(FLAG_TRANSITORY, &desc->flags, transitory);
e10f72bf
AJ
2878
2879 /* If the driver supports it, set the persistence state now */
baca3b15
AS
2880 return gpio_set_config_with_argument_optional(desc,
2881 PIN_CONFIG_PERSIST_STATE,
2882 !transitory);
e10f72bf 2883}
e10f72bf 2884
79a9becd
AC
2885/**
2886 * gpiod_is_active_low - test whether a GPIO is active-low or not
2887 * @desc: the gpio descriptor to test
2888 *
2889 * Returns 1 if the GPIO is active-low, 0 otherwise.
2890 */
2891int gpiod_is_active_low(const struct gpio_desc *desc)
372e722e 2892{
fdeb8e15 2893 VALIDATE_DESC(desc);
79a9becd 2894 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
372e722e 2895}
79a9becd 2896EXPORT_SYMBOL_GPL(gpiod_is_active_low);
d2876d08 2897
d3a5bcb4
MM
2898/**
2899 * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not
2900 * @desc: the gpio descriptor to change
2901 */
2902void gpiod_toggle_active_low(struct gpio_desc *desc)
2903{
2904 VALIDATE_DESC_VOID(desc);
2905 change_bit(FLAG_ACTIVE_LOW, &desc->flags);
2906}
2907EXPORT_SYMBOL_GPL(gpiod_toggle_active_low);
2908
234c5209
AS
2909static int gpio_chip_get_value(struct gpio_chip *gc, const struct gpio_desc *desc)
2910{
2911 return gc->get ? gc->get(gc, gpio_chip_hwgpio(desc)) : -EIO;
2912}
2913
d2876d08
DB
2914/* I/O calls are only valid after configuration completed; the relevant
2915 * "is this a valid GPIO" error checks should already have been done.
2916 *
2917 * "Get" operations are often inlinable as reading a pin value register,
2918 * and masking the relevant bit in that register.
2919 *
2920 * When "set" operations are inlinable, they involve writing that mask to
2921 * one register to set a low value, or a different register to set it high.
2922 * Otherwise locking is needed, so there may be little value to inlining.
2923 *
2924 *------------------------------------------------------------------------
2925 *
2926 * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
2927 * have requested the GPIO. That can include implicit requesting by
2928 * a direction setting call. Marking a gpio as requested locks its chip
2929 * in memory, guaranteeing that these table lookups need no more locking
2930 * and that gpiochip_remove() will fail.
2931 *
2932 * REVISIT when debugging, consider adding some instrumentation to ensure
2933 * that the GPIO was actually requested.
2934 */
2935
fac9d885 2936static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
d2876d08 2937{
a0b66a73 2938 struct gpio_chip *gc;
e20538b8 2939 int value;
d2876d08 2940
a0b66a73 2941 gc = desc->gdev->chip;
234c5209 2942 value = gpio_chip_get_value(gc, desc);
723a6303 2943 value = value < 0 ? value : !!value;
372e722e 2944 trace_gpio_value(desc_to_gpio(desc), 1, value);
3f397c21 2945 return value;
d2876d08 2946}
372e722e 2947
a0b66a73 2948static int gpio_chip_get_multiple(struct gpio_chip *gc,
eec1d566
LW
2949 unsigned long *mask, unsigned long *bits)
2950{
1cef8b50 2951 if (gc->get_multiple)
a0b66a73 2952 return gc->get_multiple(gc, mask, bits);
1cef8b50 2953 if (gc->get) {
eec1d566
LW
2954 int i, value;
2955
a0b66a73
LW
2956 for_each_set_bit(i, mask, gc->ngpio) {
2957 value = gc->get(gc, i);
eec1d566
LW
2958 if (value < 0)
2959 return value;
2960 __assign_bit(i, bits, value);
2961 }
2962 return 0;
2963 }
2964 return -EIO;
2965}
2966
2967int gpiod_get_array_value_complex(bool raw, bool can_sleep,
2968 unsigned int array_size,
2969 struct gpio_desc **desc_array,
77588c14 2970 struct gpio_array *array_info,
b9762beb 2971 unsigned long *value_bitmap)
eec1d566 2972{
d377f56f 2973 int ret, i = 0;
b17566a6
JK
2974
2975 /*
2976 * Validate array_info against desc_array and its size.
2977 * It should immediately follow desc_array if both
2978 * have been obtained from the same gpiod_get_array() call.
2979 */
2980 if (array_info && array_info->desc == desc_array &&
2981 array_size <= array_info->size &&
2982 (void *)array_info == desc_array + array_info->size) {
2983 if (!can_sleep)
2984 WARN_ON(array_info->chip->can_sleep);
2985
d377f56f 2986 ret = gpio_chip_get_multiple(array_info->chip,
b17566a6
JK
2987 array_info->get_mask,
2988 value_bitmap);
d377f56f
LW
2989 if (ret)
2990 return ret;
b17566a6
JK
2991
2992 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2993 bitmap_xor(value_bitmap, value_bitmap,
2994 array_info->invert_mask, array_size);
2995
b17566a6 2996 i = find_first_zero_bit(array_info->get_mask, array_size);
ae66eca0
AS
2997 if (i == array_size)
2998 return 0;
b17566a6
JK
2999 } else {
3000 array_info = NULL;
3001 }
eec1d566
LW
3002
3003 while (i < array_size) {
a0b66a73 3004 struct gpio_chip *gc = desc_array[i]->gdev->chip;
c80c4435
AS
3005 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
3006 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
3027743f 3007 unsigned long *mask, *bits;
c07ea8d0 3008 int first, j;
eec1d566 3009
a0b66a73 3010 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
c80c4435
AS
3011 mask = fastpath_mask;
3012 bits = fastpath_bits;
3027743f 3013 } else {
c354c295
AS
3014 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
3015
3016 mask = bitmap_alloc(gc->ngpio, flags);
3027743f
LA
3017 if (!mask)
3018 return -ENOMEM;
c80c4435 3019
c354c295
AS
3020 bits = bitmap_alloc(gc->ngpio, flags);
3021 if (!bits) {
3022 bitmap_free(mask);
3023 return -ENOMEM;
3024 }
3027743f
LA
3025 }
3026
a0b66a73 3027 bitmap_zero(mask, gc->ngpio);
3027743f 3028
eec1d566 3029 if (!can_sleep)
a0b66a73 3030 WARN_ON(gc->can_sleep);
eec1d566
LW
3031
3032 /* collect all inputs belonging to the same chip */
3033 first = i;
eec1d566
LW
3034 do {
3035 const struct gpio_desc *desc = desc_array[i];
3036 int hwgpio = gpio_chip_hwgpio(desc);
3037
3038 __set_bit(hwgpio, mask);
3039 i++;
b17566a6
JK
3040
3041 if (array_info)
35ae7f96
JK
3042 i = find_next_zero_bit(array_info->get_mask,
3043 array_size, i);
eec1d566 3044 } while ((i < array_size) &&
a0b66a73 3045 (desc_array[i]->gdev->chip == gc));
eec1d566 3046
a0b66a73 3047 ret = gpio_chip_get_multiple(gc, mask, bits);
3027743f 3048 if (ret) {
c80c4435 3049 if (mask != fastpath_mask)
c354c295
AS
3050 bitmap_free(mask);
3051 if (bits != fastpath_bits)
3052 bitmap_free(bits);
eec1d566 3053 return ret;
3027743f 3054 }
eec1d566 3055
b17566a6 3056 for (j = first; j < i; ) {
eec1d566
LW
3057 const struct gpio_desc *desc = desc_array[j];
3058 int hwgpio = gpio_chip_hwgpio(desc);
3059 int value = test_bit(hwgpio, bits);
3060
3061 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3062 value = !value;
b9762beb 3063 __assign_bit(j, value_bitmap, value);
eec1d566 3064 trace_gpio_value(desc_to_gpio(desc), 1, value);
799d5eb4 3065 j++;
b17566a6
JK
3066
3067 if (array_info)
35ae7f96
JK
3068 j = find_next_zero_bit(array_info->get_mask, i,
3069 j);
eec1d566 3070 }
3027743f 3071
c80c4435 3072 if (mask != fastpath_mask)
c354c295
AS
3073 bitmap_free(mask);
3074 if (bits != fastpath_bits)
3075 bitmap_free(bits);
eec1d566
LW
3076 }
3077 return 0;
3078}
3079
d2876d08 3080/**
79a9becd
AC
3081 * gpiod_get_raw_value() - return a gpio's raw value
3082 * @desc: gpio whose value will be returned
d2876d08 3083 *
79a9becd 3084 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3085 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd 3086 *
827a9b8b 3087 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3088 * complain if the GPIO chip functions potentially sleep.
d2876d08 3089 */
79a9becd 3090int gpiod_get_raw_value(const struct gpio_desc *desc)
d2876d08 3091{
fdeb8e15 3092 VALIDATE_DESC(desc);
3285170f 3093 /* Should be using gpiod_get_raw_value_cansleep() */
fdeb8e15 3094 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3095 return gpiod_get_raw_value_commit(desc);
d2876d08 3096}
79a9becd 3097EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
372e722e 3098
79a9becd
AC
3099/**
3100 * gpiod_get_value() - return a gpio's value
3101 * @desc: gpio whose value will be returned
3102 *
3103 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3104 * account, or negative errno on failure.
79a9becd 3105 *
827a9b8b 3106 * This function can be called from contexts where we cannot sleep, and will
79a9becd
AC
3107 * complain if the GPIO chip functions potentially sleep.
3108 */
3109int gpiod_get_value(const struct gpio_desc *desc)
372e722e 3110{
79a9becd 3111 int value;
fdeb8e15
LW
3112
3113 VALIDATE_DESC(desc);
3285170f 3114 /* Should be using gpiod_get_value_cansleep() */
fdeb8e15 3115 WARN_ON(desc->gdev->chip->can_sleep);
79a9becd 3116
fac9d885 3117 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3118 if (value < 0)
3119 return value;
3120
79a9becd
AC
3121 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3122 value = !value;
3123
3124 return value;
372e722e 3125}
79a9becd 3126EXPORT_SYMBOL_GPL(gpiod_get_value);
d2876d08 3127
eec1d566
LW
3128/**
3129 * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
b9762beb 3130 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3131 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3132 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3133 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3134 *
3135 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3136 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3137 * else an error code.
3138 *
827a9b8b 3139 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
3140 * and it will complain if the GPIO chip functions potentially sleep.
3141 */
3142int gpiod_get_raw_array_value(unsigned int array_size,
b9762beb 3143 struct gpio_desc **desc_array,
77588c14 3144 struct gpio_array *array_info,
b9762beb 3145 unsigned long *value_bitmap)
eec1d566
LW
3146{
3147 if (!desc_array)
3148 return -EINVAL;
3149 return gpiod_get_array_value_complex(true, false, array_size,
77588c14
JK
3150 desc_array, array_info,
3151 value_bitmap);
eec1d566
LW
3152}
3153EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
3154
3155/**
3156 * gpiod_get_array_value() - read values from an array of GPIOs
b9762beb 3157 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3158 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3159 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3160 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3161 *
3162 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3163 * into account. Return 0 in case of success, else an error code.
3164 *
827a9b8b 3165 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
3166 * and it will complain if the GPIO chip functions potentially sleep.
3167 */
3168int gpiod_get_array_value(unsigned int array_size,
b9762beb 3169 struct gpio_desc **desc_array,
77588c14 3170 struct gpio_array *array_info,
b9762beb 3171 unsigned long *value_bitmap)
eec1d566
LW
3172{
3173 if (!desc_array)
3174 return -EINVAL;
3175 return gpiod_get_array_value_complex(false, false, array_size,
77588c14
JK
3176 desc_array, array_info,
3177 value_bitmap);
eec1d566
LW
3178}
3179EXPORT_SYMBOL_GPL(gpiod_get_array_value);
3180
aca5ce14 3181/*
fac9d885 3182 * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
79a9becd 3183 * @desc: gpio descriptor whose state need to be set.
20a8a968 3184 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
aca5ce14 3185 */
fac9d885 3186static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
aca5ce14 3187{
d377f56f 3188 int ret = 0;
a0b66a73 3189 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
3190 int offset = gpio_chip_hwgpio(desc);
3191
aca5ce14 3192 if (value) {
a0b66a73 3193 ret = gc->direction_input(gc, offset);
aca5ce14 3194 } else {
a0b66a73 3195 ret = gc->direction_output(gc, offset, 0);
d377f56f 3196 if (!ret)
372e722e 3197 set_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 3198 }
d377f56f
LW
3199 trace_gpio_direction(desc_to_gpio(desc), value, ret);
3200 if (ret < 0)
6424de5a
MB
3201 gpiod_err(desc,
3202 "%s: Error in set_value for open drain err %d\n",
d377f56f 3203 __func__, ret);
aca5ce14
LD
3204}
3205
25553ff0 3206/*
79a9becd
AC
3207 * _gpio_set_open_source_value() - Set the open source gpio's value.
3208 * @desc: gpio descriptor whose state need to be set.
20a8a968 3209 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
25553ff0 3210 */
fac9d885 3211static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
25553ff0 3212{
d377f56f 3213 int ret = 0;
a0b66a73 3214 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
3215 int offset = gpio_chip_hwgpio(desc);
3216
25553ff0 3217 if (value) {
a0b66a73 3218 ret = gc->direction_output(gc, offset, 1);
d377f56f 3219 if (!ret)
372e722e 3220 set_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 3221 } else {
a0b66a73 3222 ret = gc->direction_input(gc, offset);
25553ff0 3223 }
d377f56f
LW
3224 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
3225 if (ret < 0)
6424de5a
MB
3226 gpiod_err(desc,
3227 "%s: Error in set_value for open source err %d\n",
d377f56f 3228 __func__, ret);
25553ff0
LD
3229}
3230
fac9d885 3231static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
d2876d08 3232{
a0b66a73 3233 struct gpio_chip *gc;
d2876d08 3234
a0b66a73 3235 gc = desc->gdev->chip;
372e722e 3236 trace_gpio_value(desc_to_gpio(desc), 0, value);
a0b66a73 3237 gc->set(gc, gpio_chip_hwgpio(desc), value);
372e722e
AC
3238}
3239
5f424243
RI
3240/*
3241 * set multiple outputs on the same chip;
3242 * use the chip's set_multiple function if available;
3243 * otherwise set the outputs sequentially;
a0b66a73 3244 * @chip: the GPIO chip we operate on
5f424243
RI
3245 * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
3246 * defines which outputs are to be changed
3247 * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
3248 * defines the values the outputs specified by mask are to be set to
3249 */
a0b66a73 3250static void gpio_chip_set_multiple(struct gpio_chip *gc,
5f424243
RI
3251 unsigned long *mask, unsigned long *bits)
3252{
a0b66a73
LW
3253 if (gc->set_multiple) {
3254 gc->set_multiple(gc, mask, bits);
5f424243 3255 } else {
5e4e6fb3
AS
3256 unsigned int i;
3257
3258 /* set outputs if the corresponding mask bit is set */
a0b66a73
LW
3259 for_each_set_bit(i, mask, gc->ngpio)
3260 gc->set(gc, i, test_bit(i, bits));
5f424243
RI
3261 }
3262}
3263
3027743f 3264int gpiod_set_array_value_complex(bool raw, bool can_sleep,
3c940660
GU
3265 unsigned int array_size,
3266 struct gpio_desc **desc_array,
3267 struct gpio_array *array_info,
3268 unsigned long *value_bitmap)
5f424243
RI
3269{
3270 int i = 0;
3271
b17566a6
JK
3272 /*
3273 * Validate array_info against desc_array and its size.
3274 * It should immediately follow desc_array if both
3275 * have been obtained from the same gpiod_get_array() call.
3276 */
3277 if (array_info && array_info->desc == desc_array &&
3278 array_size <= array_info->size &&
3279 (void *)array_info == desc_array + array_info->size) {
3280 if (!can_sleep)
3281 WARN_ON(array_info->chip->can_sleep);
3282
3283 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3284 bitmap_xor(value_bitmap, value_bitmap,
3285 array_info->invert_mask, array_size);
3286
3287 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
3288 value_bitmap);
3289
b17566a6 3290 i = find_first_zero_bit(array_info->set_mask, array_size);
ae66eca0
AS
3291 if (i == array_size)
3292 return 0;
b17566a6
JK
3293 } else {
3294 array_info = NULL;
3295 }
3296
5f424243 3297 while (i < array_size) {
a0b66a73 3298 struct gpio_chip *gc = desc_array[i]->gdev->chip;
c80c4435
AS
3299 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
3300 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
3027743f 3301 unsigned long *mask, *bits;
5f424243
RI
3302 int count = 0;
3303
a0b66a73 3304 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
c80c4435
AS
3305 mask = fastpath_mask;
3306 bits = fastpath_bits;
3027743f 3307 } else {
c354c295
AS
3308 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
3309
3310 mask = bitmap_alloc(gc->ngpio, flags);
3027743f
LA
3311 if (!mask)
3312 return -ENOMEM;
c80c4435 3313
c354c295
AS
3314 bits = bitmap_alloc(gc->ngpio, flags);
3315 if (!bits) {
3316 bitmap_free(mask);
3317 return -ENOMEM;
3318 }
3027743f
LA
3319 }
3320
a0b66a73 3321 bitmap_zero(mask, gc->ngpio);
3027743f 3322
38e003f4 3323 if (!can_sleep)
a0b66a73 3324 WARN_ON(gc->can_sleep);
38e003f4 3325
5f424243
RI
3326 do {
3327 struct gpio_desc *desc = desc_array[i];
3328 int hwgpio = gpio_chip_hwgpio(desc);
b9762beb 3329 int value = test_bit(i, value_bitmap);
5f424243 3330
b17566a6
JK
3331 /*
3332 * Pins applicable for fast input but not for
3333 * fast output processing may have been already
3334 * inverted inside the fast path, skip them.
3335 */
3336 if (!raw && !(array_info &&
3337 test_bit(i, array_info->invert_mask)) &&
3338 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
5f424243
RI
3339 value = !value;
3340 trace_gpio_value(desc_to_gpio(desc), 0, value);
3341 /*
3342 * collect all normal outputs belonging to the same chip
3343 * open drain and open source outputs are set individually
3344 */
02e47980 3345 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
fac9d885 3346 gpio_set_open_drain_value_commit(desc, value);
02e47980 3347 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
fac9d885 3348 gpio_set_open_source_value_commit(desc, value);
5f424243
RI
3349 } else {
3350 __set_bit(hwgpio, mask);
4fc5bfeb 3351 __assign_bit(hwgpio, bits, value);
5f424243
RI
3352 count++;
3353 }
3354 i++;
b17566a6
JK
3355
3356 if (array_info)
35ae7f96
JK
3357 i = find_next_zero_bit(array_info->set_mask,
3358 array_size, i);
fdeb8e15 3359 } while ((i < array_size) &&
a0b66a73 3360 (desc_array[i]->gdev->chip == gc));
5f424243 3361 /* push collected bits to outputs */
38e003f4 3362 if (count != 0)
a0b66a73 3363 gpio_chip_set_multiple(gc, mask, bits);
3027743f 3364
c80c4435 3365 if (mask != fastpath_mask)
c354c295
AS
3366 bitmap_free(mask);
3367 if (bits != fastpath_bits)
3368 bitmap_free(bits);
5f424243 3369 }
3027743f 3370 return 0;
5f424243
RI
3371}
3372
d2876d08 3373/**
79a9becd
AC
3374 * gpiod_set_raw_value() - assign a gpio's raw value
3375 * @desc: gpio whose value will be assigned
d2876d08 3376 * @value: value to assign
d2876d08 3377 *
79a9becd
AC
3378 * Set the raw value of the GPIO, i.e. the value of its physical line without
3379 * regard for its ACTIVE_LOW status.
3380 *
827a9b8b 3381 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3382 * complain if the GPIO chip functions potentially sleep.
d2876d08 3383 */
79a9becd 3384void gpiod_set_raw_value(struct gpio_desc *desc, int value)
372e722e 3385{
fdeb8e15 3386 VALIDATE_DESC_VOID(desc);
3285170f 3387 /* Should be using gpiod_set_raw_value_cansleep() */
fdeb8e15 3388 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3389 gpiod_set_raw_value_commit(desc, value);
d2876d08 3390}
79a9becd 3391EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
d2876d08 3392
1e77fc82
GU
3393/**
3394 * gpiod_set_value_nocheck() - set a GPIO line value without checking
3395 * @desc: the descriptor to set the value on
3396 * @value: value to set
3397 *
3398 * This sets the value of a GPIO line backing a descriptor, applying
3399 * different semantic quirks like active low and open drain/source
3400 * handling.
3401 */
3402static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
3403{
3404 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3405 value = !value;
3406 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
3407 gpio_set_open_drain_value_commit(desc, value);
3408 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
3409 gpio_set_open_source_value_commit(desc, value);
3410 else
3411 gpiod_set_raw_value_commit(desc, value);
3412}
3413
d2876d08 3414/**
79a9becd
AC
3415 * gpiod_set_value() - assign a gpio's value
3416 * @desc: gpio whose value will be assigned
3417 * @value: value to assign
3418 *
02e47980
LW
3419 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
3420 * OPEN_DRAIN and OPEN_SOURCE flags into account.
d2876d08 3421 *
827a9b8b 3422 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3423 * complain if the GPIO chip functions potentially sleep.
d2876d08 3424 */
79a9becd 3425void gpiod_set_value(struct gpio_desc *desc, int value)
d2876d08 3426{
fdeb8e15 3427 VALIDATE_DESC_VOID(desc);
3285170f 3428 /* Should be using gpiod_set_value_cansleep() */
fdeb8e15 3429 WARN_ON(desc->gdev->chip->can_sleep);
1e77fc82 3430 gpiod_set_value_nocheck(desc, value);
372e722e 3431}
79a9becd 3432EXPORT_SYMBOL_GPL(gpiod_set_value);
d2876d08 3433
5f424243 3434/**
3fff99bc 3435 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
b9762beb 3436 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3437 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3438 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3439 * @value_bitmap: bitmap of values to assign
5f424243
RI
3440 *
3441 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3442 * without regard for their ACTIVE_LOW status.
3443 *
827a9b8b 3444 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3445 * complain if the GPIO chip functions potentially sleep.
3446 */
3027743f 3447int gpiod_set_raw_array_value(unsigned int array_size,
3c940660
GU
3448 struct gpio_desc **desc_array,
3449 struct gpio_array *array_info,
3450 unsigned long *value_bitmap)
5f424243
RI
3451{
3452 if (!desc_array)
3027743f
LA
3453 return -EINVAL;
3454 return gpiod_set_array_value_complex(true, false, array_size,
77588c14 3455 desc_array, array_info, value_bitmap);
5f424243 3456}
3fff99bc 3457EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
5f424243
RI
3458
3459/**
3fff99bc 3460 * gpiod_set_array_value() - assign values to an array of GPIOs
b9762beb 3461 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3462 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3463 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3464 * @value_bitmap: bitmap of values to assign
5f424243
RI
3465 *
3466 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3467 * into account.
3468 *
827a9b8b 3469 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3470 * complain if the GPIO chip functions potentially sleep.
3471 */
cf9af0d5
GU
3472int gpiod_set_array_value(unsigned int array_size,
3473 struct gpio_desc **desc_array,
3474 struct gpio_array *array_info,
3475 unsigned long *value_bitmap)
5f424243
RI
3476{
3477 if (!desc_array)
cf9af0d5
GU
3478 return -EINVAL;
3479 return gpiod_set_array_value_complex(false, false, array_size,
3480 desc_array, array_info,
3481 value_bitmap);
5f424243 3482}
3fff99bc 3483EXPORT_SYMBOL_GPL(gpiod_set_array_value);
5f424243 3484
d2876d08 3485/**
79a9becd
AC
3486 * gpiod_cansleep() - report whether gpio value access may sleep
3487 * @desc: gpio to check
d2876d08 3488 *
d2876d08 3489 */
79a9becd 3490int gpiod_cansleep(const struct gpio_desc *desc)
372e722e 3491{
fdeb8e15
LW
3492 VALIDATE_DESC(desc);
3493 return desc->gdev->chip->can_sleep;
d2876d08 3494}
79a9becd 3495EXPORT_SYMBOL_GPL(gpiod_cansleep);
d2876d08 3496
90b39402
LW
3497/**
3498 * gpiod_set_consumer_name() - set the consumer name for the descriptor
3499 * @desc: gpio to set the consumer name on
3500 * @name: the new consumer name
3501 */
18534df4 3502int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
90b39402 3503{
18534df4
MS
3504 VALIDATE_DESC(desc);
3505 if (name) {
3506 name = kstrdup_const(name, GFP_KERNEL);
3507 if (!name)
3508 return -ENOMEM;
3509 }
3510
3511 kfree_const(desc->label);
3512 desc_set_label(desc, name);
3513
3514 return 0;
90b39402
LW
3515}
3516EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
3517
0f6d504e 3518/**
79a9becd
AC
3519 * gpiod_to_irq() - return the IRQ corresponding to a GPIO
3520 * @desc: gpio whose IRQ will be returned (already requested)
0f6d504e 3521 *
79a9becd
AC
3522 * Return the IRQ corresponding to the passed GPIO, or an error code in case of
3523 * error.
0f6d504e 3524 */
79a9becd 3525int gpiod_to_irq(const struct gpio_desc *desc)
0f6d504e 3526{
a0b66a73 3527 struct gpio_chip *gc;
4c37ce86 3528 int offset;
0f6d504e 3529
79bb71bd
LW
3530 /*
3531 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
3532 * requires this function to not return zero on an invalid descriptor
3533 * but rather a negative error number.
3534 */
bfbbe44d 3535 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
79bb71bd
LW
3536 return -EINVAL;
3537
a0b66a73 3538 gc = desc->gdev->chip;
372e722e 3539 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
3540 if (gc->to_irq) {
3541 int retirq = gc->to_irq(gc, offset);
4c37ce86
LW
3542
3543 /* Zero means NO_IRQ */
3544 if (!retirq)
3545 return -ENXIO;
3546
3547 return retirq;
3548 }
ae42f928
SP
3549#ifdef CONFIG_GPIOLIB_IRQCHIP
3550 if (gc->irq.chip) {
3551 /*
3552 * Avoid race condition with other code, which tries to lookup
3553 * an IRQ before the irqchip has been properly registered,
3554 * i.e. while gpiochip is still being brought up.
3555 */
3556 return -EPROBE_DEFER;
3557 }
3558#endif
4c37ce86 3559 return -ENXIO;
0f6d504e 3560}
79a9becd 3561EXPORT_SYMBOL_GPL(gpiod_to_irq);
0f6d504e 3562
d468bf9e 3563/**
e3a2e878 3564 * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
a0b66a73 3565 * @gc: the chip the GPIO to lock belongs to
d74be6df 3566 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3567 *
3568 * This is used directly by GPIO drivers that want to lock down
f438acdf 3569 * a certain GPIO line to be used for IRQs.
d468bf9e 3570 */
a0b66a73 3571int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset)
372e722e 3572{
9c10280d
LW
3573 struct gpio_desc *desc;
3574
a0b66a73 3575 desc = gpiochip_get_desc(gc, offset);
9c10280d
LW
3576 if (IS_ERR(desc))
3577 return PTR_ERR(desc);
3578
60f8339e
LW
3579 /*
3580 * If it's fast: flush the direction setting if something changed
3581 * behind our back
3582 */
a0b66a73 3583 if (!gc->can_sleep && gc->get_direction) {
80956790 3584 int dir = gpiod_get_direction(desc);
9c10280d 3585
36b31279 3586 if (dir < 0) {
a0b66a73 3587 chip_err(gc, "%s: cannot get GPIO direction\n",
36b31279
AS
3588 __func__);
3589 return dir;
3590 }
9c10280d 3591 }
d468bf9e 3592
e9bdf7e6
LW
3593 /* To be valid for IRQ the line needs to be input or open drain */
3594 if (test_bit(FLAG_IS_OUT, &desc->flags) &&
3595 !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
a0b66a73 3596 chip_err(gc,
b1911710
AS
3597 "%s: tried to flag a GPIO set as output for IRQ\n",
3598 __func__);
d468bf9e
LW
3599 return -EIO;
3600 }
3601
9c10280d 3602 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3603 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3604
3605 /*
3606 * If the consumer has not set up a label (such as when the
3607 * IRQ is referenced from .to_irq()) we set up a label here
3608 * so it is clear this is used as an interrupt.
3609 */
3610 if (!desc->label)
3611 desc_set_label(desc, "interrupt");
3612
d468bf9e 3613 return 0;
372e722e 3614}
e3a2e878 3615EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
d2876d08 3616
d468bf9e 3617/**
e3a2e878 3618 * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
a0b66a73 3619 * @gc: the chip the GPIO to lock belongs to
d74be6df 3620 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3621 *
3622 * This is used directly by GPIO drivers that want to indicate
3623 * that a certain GPIO is no longer used exclusively for IRQ.
d2876d08 3624 */
a0b66a73 3625void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset)
d468bf9e 3626{
3940c34a
LW
3627 struct gpio_desc *desc;
3628
a0b66a73 3629 desc = gpiochip_get_desc(gc, offset);
3940c34a 3630 if (IS_ERR(desc))
d468bf9e 3631 return;
d2876d08 3632
3940c34a 3633 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3634 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3635
3636 /* If we only had this marking, erase it */
3637 if (desc->label && !strcmp(desc->label, "interrupt"))
3638 desc_set_label(desc, NULL);
d468bf9e 3639}
e3a2e878 3640EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
d468bf9e 3641
a0b66a73 3642void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3643{
a0b66a73 3644 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3645
3646 if (!IS_ERR(desc) &&
3647 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
3648 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3649}
3650EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
3651
a0b66a73 3652void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3653{
a0b66a73 3654 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3655
3656 if (!IS_ERR(desc) &&
3657 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
e9bdf7e6
LW
3658 /*
3659 * We must not be output when using IRQ UNLESS we are
3660 * open drain.
3661 */
3662 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) &&
3663 !test_bit(FLAG_OPEN_DRAIN, &desc->flags));
4e9439dd
HV
3664 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3665 }
3666}
3667EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
3668
a0b66a73 3669bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset)
6cee3821 3670{
a0b66a73 3671 if (offset >= gc->ngpio)
6cee3821
LW
3672 return false;
3673
a0b66a73 3674 return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags);
6cee3821
LW
3675}
3676EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
3677
a0b66a73 3678int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238
HV
3679{
3680 int ret;
3681
a0b66a73 3682 if (!try_module_get(gc->gpiodev->owner))
4e6b8238
HV
3683 return -ENODEV;
3684
a0b66a73 3685 ret = gpiochip_lock_as_irq(gc, offset);
4e6b8238 3686 if (ret) {
a0b66a73
LW
3687 chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset);
3688 module_put(gc->gpiodev->owner);
4e6b8238
HV
3689 return ret;
3690 }
3691 return 0;
3692}
3693EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
3694
a0b66a73 3695void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238 3696{
a0b66a73
LW
3697 gpiochip_unlock_as_irq(gc, offset);
3698 module_put(gc->gpiodev->owner);
4e6b8238
HV
3699}
3700EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
3701
a0b66a73 3702bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset)
143b65d6 3703{
a0b66a73 3704 if (offset >= gc->ngpio)
143b65d6
LW
3705 return false;
3706
a0b66a73 3707 return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3708}
3709EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
3710
a0b66a73 3711bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset)
143b65d6 3712{
a0b66a73 3713 if (offset >= gc->ngpio)
143b65d6
LW
3714 return false;
3715
a0b66a73 3716 return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3717}
3718EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
3719
a0b66a73 3720bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset)
05f479bf 3721{
a0b66a73 3722 if (offset >= gc->ngpio)
05f479bf
CK
3723 return false;
3724
a0b66a73 3725 return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags);
05f479bf
CK
3726}
3727EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
3728
79a9becd
AC
3729/**
3730 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
3731 * @desc: gpio whose value will be returned
3732 *
3733 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3734 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd
AC
3735 *
3736 * This function is to be called from contexts that can sleep.
d2876d08 3737 */
79a9becd 3738int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
d2876d08 3739{
d2876d08 3740 might_sleep_if(extra_checks);
fdeb8e15 3741 VALIDATE_DESC(desc);
fac9d885 3742 return gpiod_get_raw_value_commit(desc);
d2876d08 3743}
79a9becd 3744EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
372e722e 3745
79a9becd
AC
3746/**
3747 * gpiod_get_value_cansleep() - return a gpio's value
3748 * @desc: gpio whose value will be returned
3749 *
3750 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3751 * account, or negative errno on failure.
79a9becd
AC
3752 *
3753 * This function is to be called from contexts that can sleep.
3754 */
3755int gpiod_get_value_cansleep(const struct gpio_desc *desc)
d2876d08 3756{
3f397c21 3757 int value;
d2876d08
DB
3758
3759 might_sleep_if(extra_checks);
fdeb8e15 3760 VALIDATE_DESC(desc);
fac9d885 3761 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3762 if (value < 0)
3763 return value;
3764
79a9becd
AC
3765 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3766 value = !value;
3767
3f397c21 3768 return value;
d2876d08 3769}
79a9becd 3770EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
372e722e 3771
eec1d566
LW
3772/**
3773 * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
b9762beb 3774 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3775 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3776 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3777 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3778 *
3779 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3780 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3781 * else an error code.
3782 *
3783 * This function is to be called from contexts that can sleep.
3784 */
3785int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
3786 struct gpio_desc **desc_array,
77588c14 3787 struct gpio_array *array_info,
b9762beb 3788 unsigned long *value_bitmap)
eec1d566
LW
3789{
3790 might_sleep_if(extra_checks);
3791 if (!desc_array)
3792 return -EINVAL;
3793 return gpiod_get_array_value_complex(true, true, array_size,
77588c14
JK
3794 desc_array, array_info,
3795 value_bitmap);
eec1d566
LW
3796}
3797EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
3798
3799/**
3800 * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
b9762beb 3801 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3802 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3803 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3804 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3805 *
3806 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3807 * into account. Return 0 in case of success, else an error code.
3808 *
3809 * This function is to be called from contexts that can sleep.
3810 */
3811int gpiod_get_array_value_cansleep(unsigned int array_size,
3812 struct gpio_desc **desc_array,
77588c14 3813 struct gpio_array *array_info,
b9762beb 3814 unsigned long *value_bitmap)
eec1d566
LW
3815{
3816 might_sleep_if(extra_checks);
3817 if (!desc_array)
3818 return -EINVAL;
3819 return gpiod_get_array_value_complex(false, true, array_size,
77588c14
JK
3820 desc_array, array_info,
3821 value_bitmap);
eec1d566
LW
3822}
3823EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
3824
79a9becd
AC
3825/**
3826 * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
3827 * @desc: gpio whose value will be assigned
3828 * @value: value to assign
3829 *
3830 * Set the raw value of the GPIO, i.e. the value of its physical line without
3831 * regard for its ACTIVE_LOW status.
3832 *
3833 * This function is to be called from contexts that can sleep.
3834 */
3835void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
372e722e 3836{
d2876d08 3837 might_sleep_if(extra_checks);
fdeb8e15 3838 VALIDATE_DESC_VOID(desc);
fac9d885 3839 gpiod_set_raw_value_commit(desc, value);
372e722e 3840}
79a9becd 3841EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
d2876d08 3842
79a9becd
AC
3843/**
3844 * gpiod_set_value_cansleep() - assign a gpio's value
3845 * @desc: gpio whose value will be assigned
3846 * @value: value to assign
3847 *
3848 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
3849 * account
3850 *
3851 * This function is to be called from contexts that can sleep.
3852 */
3853void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
d2876d08 3854{
d2876d08 3855 might_sleep_if(extra_checks);
fdeb8e15 3856 VALIDATE_DESC_VOID(desc);
1e77fc82 3857 gpiod_set_value_nocheck(desc, value);
372e722e 3858}
79a9becd 3859EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
d2876d08 3860
5f424243 3861/**
3fff99bc 3862 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3863 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3864 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3865 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3866 * @value_bitmap: bitmap of values to assign
5f424243
RI
3867 *
3868 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3869 * without regard for their ACTIVE_LOW status.
3870 *
3871 * This function is to be called from contexts that can sleep.
3872 */
3027743f 3873int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3c940660
GU
3874 struct gpio_desc **desc_array,
3875 struct gpio_array *array_info,
3876 unsigned long *value_bitmap)
5f424243
RI
3877{
3878 might_sleep_if(extra_checks);
3879 if (!desc_array)
3027743f
LA
3880 return -EINVAL;
3881 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
77588c14 3882 array_info, value_bitmap);
5f424243 3883}
3fff99bc 3884EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
5f424243 3885
3946d187
DT
3886/**
3887 * gpiod_add_lookup_tables() - register GPIO device consumers
3888 * @tables: list of tables of consumers to register
3889 * @n: number of tables in the list
3890 */
3891void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
3892{
3893 unsigned int i;
3894
3895 mutex_lock(&gpio_lookup_lock);
3896
3897 for (i = 0; i < n; i++)
3898 list_add_tail(&tables[i]->list, &gpio_lookup_list);
3899
3900 mutex_unlock(&gpio_lookup_lock);
3901}
3902
5f424243 3903/**
3fff99bc 3904 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3905 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3906 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3907 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3908 * @value_bitmap: bitmap of values to assign
5f424243
RI
3909 *
3910 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3911 * into account.
3912 *
3913 * This function is to be called from contexts that can sleep.
3914 */
cf9af0d5
GU
3915int gpiod_set_array_value_cansleep(unsigned int array_size,
3916 struct gpio_desc **desc_array,
3917 struct gpio_array *array_info,
3918 unsigned long *value_bitmap)
5f424243
RI
3919{
3920 might_sleep_if(extra_checks);
3921 if (!desc_array)
cf9af0d5
GU
3922 return -EINVAL;
3923 return gpiod_set_array_value_complex(false, true, array_size,
3924 desc_array, array_info,
3925 value_bitmap);
5f424243 3926}
3fff99bc 3927EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
5f424243 3928
9ce4ed5b
BG
3929void gpiod_line_state_notify(struct gpio_desc *desc, unsigned long action)
3930{
3931 blocking_notifier_call_chain(&desc->gdev->line_state_notifier,
3932 action, desc);
3933}
3934
bae48da2 3935/**
ad824783
AC
3936 * gpiod_add_lookup_table() - register GPIO device consumers
3937 * @table: table of consumers to register
bae48da2 3938 */
ad824783 3939void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
bae48da2 3940{
49fdfe66 3941 gpiod_add_lookup_tables(&table, 1);
bae48da2 3942}
226b2242 3943EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
bae48da2 3944
be9015ab
SK
3945/**
3946 * gpiod_remove_lookup_table() - unregister GPIO device consumers
3947 * @table: table of consumers to unregister
3948 */
3949void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
3950{
d321ad12
AS
3951 /* Nothing to remove */
3952 if (!table)
3953 return;
3954
be9015ab
SK
3955 mutex_lock(&gpio_lookup_lock);
3956
3957 list_del(&table->list);
3958
3959 mutex_unlock(&gpio_lookup_lock);
3960}
226b2242 3961EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
be9015ab 3962
a411e81e
BG
3963/**
3964 * gpiod_add_hogs() - register a set of GPIO hogs from machine code
3965 * @hogs: table of gpio hog entries with a zeroed sentinel at the end
3966 */
3967void gpiod_add_hogs(struct gpiod_hog *hogs)
3968{
a411e81e
BG
3969 struct gpiod_hog *hog;
3970
3971 mutex_lock(&gpio_machine_hogs_mutex);
3972
3973 for (hog = &hogs[0]; hog->chip_label; hog++) {
3974 list_add_tail(&hog->list, &gpio_machine_hogs);
3975
3976 /*
3977 * The chip may have been registered earlier, so check if it
3978 * exists and, if so, try to hog the line now.
3979 */
db546960
BG
3980 struct gpio_device *gdev __free(gpio_device_put) =
3981 gpio_device_find_by_label(hog->chip_label);
3982 if (gdev)
3983 gpiochip_machine_hog(gpio_device_get_chip(gdev), hog);
a411e81e
BG
3984 }
3985
3986 mutex_unlock(&gpio_machine_hogs_mutex);
3987}
3988EXPORT_SYMBOL_GPL(gpiod_add_hogs);
3989
dd61b292
BG
3990void gpiod_remove_hogs(struct gpiod_hog *hogs)
3991{
3992 struct gpiod_hog *hog;
3993
3994 mutex_lock(&gpio_machine_hogs_mutex);
3995 for (hog = &hogs[0]; hog->chip_label; hog++)
3996 list_del(&hog->list);
3997 mutex_unlock(&gpio_machine_hogs_mutex);
3998}
3999EXPORT_SYMBOL_GPL(gpiod_remove_hogs);
4000
ad824783 4001static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
bae48da2
AC
4002{
4003 const char *dev_id = dev ? dev_name(dev) : NULL;
ad824783 4004 struct gpiod_lookup_table *table;
bae48da2 4005
ad824783
AC
4006 list_for_each_entry(table, &gpio_lookup_list, list) {
4007 if (table->dev_id && dev_id) {
4008 /*
4009 * Valid strings on both ends, must be identical to have
4010 * a match
4011 */
4012 if (!strcmp(table->dev_id, dev_id))
c31071ea 4013 return table;
ad824783
AC
4014 } else {
4015 /*
4016 * One of the pointers is NULL, so both must be to have
4017 * a match
4018 */
4019 if (dev_id == table->dev_id)
c31071ea 4020 return table;
ad824783
AC
4021 }
4022 }
bae48da2 4023
c31071ea 4024 return NULL;
ad824783 4025}
bae48da2 4026
ad824783 4027static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
fed7026a 4028 unsigned int idx, unsigned long *flags)
ad824783 4029{
2a3cf6a3 4030 struct gpio_desc *desc = ERR_PTR(-ENOENT);
ad824783
AC
4031 struct gpiod_lookup_table *table;
4032 struct gpiod_lookup *p;
db546960 4033 struct gpio_chip *gc;
bae48da2 4034
c31071ea
BG
4035 guard(mutex)(&gpio_lookup_lock);
4036
ad824783
AC
4037 table = gpiod_find_lookup_table(dev);
4038 if (!table)
4039 return desc;
bae48da2 4040
4c033b54 4041 for (p = &table->table[0]; p->key; p++) {
ad824783 4042 /* idx must always match exactly */
bae48da2
AC
4043 if (p->idx != idx)
4044 continue;
4045
ad824783
AC
4046 /* If the lookup entry has a con_id, require exact match */
4047 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
4048 continue;
bae48da2 4049
4c033b54
GU
4050 if (p->chip_hwnum == U16_MAX) {
4051 desc = gpio_name_to_desc(p->key);
4052 if (desc) {
4053 *flags = p->flags;
4054 return desc;
4055 }
4056
4057 dev_warn(dev, "cannot find GPIO line %s, deferring\n",
4058 p->key);
4059 return ERR_PTR(-EPROBE_DEFER);
4060 }
4061
db546960
BG
4062 struct gpio_device *gdev __free(gpio_device_put) =
4063 gpio_device_find_by_label(p->key);
4064 if (!gdev) {
8853daf3
JK
4065 /*
4066 * As the lookup table indicates a chip with
4c033b54 4067 * p->key should exist, assume it may
8853daf3
JK
4068 * still appear later and let the interested
4069 * consumer be probed again or let the Deferred
4070 * Probe infrastructure handle the error.
4071 */
4072 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
4c033b54 4073 p->key);
8853daf3 4074 return ERR_PTR(-EPROBE_DEFER);
ad824783 4075 }
bae48da2 4076
db546960
BG
4077 gc = gpio_device_get_chip(gdev);
4078
a0b66a73 4079 if (gc->ngpio <= p->chip_hwnum) {
2a3cf6a3 4080 dev_err(dev,
d935bd50 4081 "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n",
a0b66a73
LW
4082 idx, p->chip_hwnum, gc->ngpio - 1,
4083 gc->label);
2a3cf6a3 4084 return ERR_PTR(-EINVAL);
bae48da2 4085 }
bae48da2 4086
db546960 4087 desc = gpio_device_get_desc(gdev, p->chip_hwnum);
ad824783 4088 *flags = p->flags;
bae48da2 4089
2a3cf6a3 4090 return desc;
bae48da2
AC
4091 }
4092
bae48da2
AC
4093 return desc;
4094}
4095
66858527
RI
4096static int platform_gpio_count(struct device *dev, const char *con_id)
4097{
4098 struct gpiod_lookup_table *table;
4099 struct gpiod_lookup *p;
4100 unsigned int count = 0;
4101
c31071ea
BG
4102 scoped_guard(mutex, &gpio_lookup_lock) {
4103 table = gpiod_find_lookup_table(dev);
4104 if (!table)
4105 return -ENOENT;
66858527 4106
c31071ea
BG
4107 for (p = &table->table[0]; p->key; p++) {
4108 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
4109 (!con_id && !p->con_id))
4110 count++;
4111 }
66858527 4112 }
c31071ea 4113
66858527
RI
4114 if (!count)
4115 return -ENOENT;
4116
4117 return count;
4118}
4119
8eb1f71e
DT
4120static struct gpio_desc *gpiod_find_by_fwnode(struct fwnode_handle *fwnode,
4121 struct device *consumer,
4122 const char *con_id,
4123 unsigned int idx,
4124 enum gpiod_flags *flags,
4125 unsigned long *lookupflags)
0eadd36d 4126{
8eb1f71e 4127 struct gpio_desc *desc = ERR_PTR(-ENOENT);
0eadd36d
DT
4128
4129 if (is_of_node(fwnode)) {
8eb1f71e
DT
4130 dev_dbg(consumer, "using DT '%pfw' for '%s' GPIO lookup\n",
4131 fwnode, con_id);
4132 desc = of_find_gpio(to_of_node(fwnode), con_id, idx, lookupflags);
0eadd36d 4133 } else if (is_acpi_node(fwnode)) {
8eb1f71e
DT
4134 dev_dbg(consumer, "using ACPI '%pfw' for '%s' GPIO lookup\n",
4135 fwnode, con_id);
4136 desc = acpi_find_gpio(fwnode, con_id, idx, flags, lookupflags);
e7f9ff5d
DT
4137 } else if (is_software_node(fwnode)) {
4138 dev_dbg(consumer, "using swnode '%pfw' for '%s' GPIO lookup\n",
4139 fwnode, con_id);
4140 desc = swnode_find_gpio(fwnode, con_id, idx, lookupflags);
0eadd36d 4141 }
0eadd36d 4142
8eb1f71e
DT
4143 return desc;
4144}
0eadd36d 4145
8eb1f71e
DT
4146static struct gpio_desc *gpiod_find_and_request(struct device *consumer,
4147 struct fwnode_handle *fwnode,
4148 const char *con_id,
4149 unsigned int idx,
4150 enum gpiod_flags flags,
4151 const char *label,
4152 bool platform_lookup_allowed)
4153{
ba2dc1cb 4154 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
c122f461 4155 struct gpio_desc *desc;
8eb1f71e
DT
4156 int ret;
4157
c122f461 4158 desc = gpiod_find_by_fwnode(fwnode, consumer, con_id, idx, &flags, &lookupflags);
8eb1f71e
DT
4159 if (gpiod_not_found(desc) && platform_lookup_allowed) {
4160 /*
4161 * Either we are not using DT or ACPI, or their lookup did not
4162 * return a result. In that case, use platform lookup as a
4163 * fallback.
4164 */
4165 dev_dbg(consumer, "using lookup tables for GPIO lookup\n");
4166 desc = gpiod_find(consumer, con_id, idx, &lookupflags);
0eadd36d
DT
4167 }
4168
8eb1f71e
DT
4169 if (IS_ERR(desc)) {
4170 dev_dbg(consumer, "No GPIO consumer %s found\n", con_id);
4171 return desc;
4172 }
4173
4174 /*
4175 * If a connection label was passed use that, else attempt to use
4176 * the device name as label
4177 */
0eadd36d 4178 ret = gpiod_request(desc, label);
8eb1f71e
DT
4179 if (ret) {
4180 if (!(ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE))
4181 return ERR_PTR(ret);
0eadd36d 4182
8eb1f71e
DT
4183 /*
4184 * This happens when there are several consumers for
4185 * the same GPIO line: we just return here without
4186 * further initialization. It is a bit of a hack.
4187 * This is necessary to support fixed regulators.
4188 *
4189 * FIXME: Make this more sane and safe.
4190 */
4191 dev_info(consumer,
4192 "nonexclusive access to GPIO for %s\n", con_id);
4193 return desc;
4194 }
0eadd36d 4195
8eb1f71e 4196 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
0eadd36d 4197 if (ret < 0) {
8eb1f71e 4198 dev_dbg(consumer, "setup of GPIO %s failed\n", con_id);
0eadd36d
DT
4199 gpiod_put(desc);
4200 return ERR_PTR(ret);
4201 }
4202
9ce4ed5b 4203 gpiod_line_state_notify(desc, GPIOLINE_CHANGED_REQUESTED);
0eadd36d
DT
4204
4205 return desc;
4206}
4207
13949fa9
DT
4208/**
4209 * fwnode_gpiod_get_index - obtain a GPIO from firmware node
4210 * @fwnode: handle of the firmware node
4211 * @con_id: function within the GPIO consumer
4212 * @index: index of the GPIO to obtain for the consumer
4213 * @flags: GPIO initialization flags
4214 * @label: label to attach to the requested GPIO
4215 *
4216 * This function can be used for drivers that get their configuration
4217 * from opaque firmware.
4218 *
4219 * The function properly finds the corresponding GPIO using whatever is the
4220 * underlying firmware interface and then makes sure that the GPIO
4221 * descriptor is requested before it is returned to the caller.
4222 *
4223 * Returns:
4224 * On successful request the GPIO pin is configured in accordance with
4225 * provided @flags.
4226 *
4227 * In case of error an ERR_PTR() is returned.
4228 */
4229struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
8eb1f71e
DT
4230 const char *con_id,
4231 int index,
13949fa9
DT
4232 enum gpiod_flags flags,
4233 const char *label)
4234{
8eb1f71e 4235 return gpiod_find_and_request(NULL, fwnode, con_id, index, flags, label, false);
13949fa9
DT
4236}
4237EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
4238
66858527
RI
4239/**
4240 * gpiod_count - return the number of GPIOs associated with a device / function
4241 * or -ENOENT if no GPIO has been assigned to the requested function
4242 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4243 * @con_id: function within the GPIO consumer
4244 */
4245int gpiod_count(struct device *dev, const char *con_id)
4246{
944f4b0a 4247 const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
66858527
RI
4248 int count = -ENOENT;
4249
944f4b0a 4250 if (is_of_node(fwnode))
f626d6df 4251 count = of_gpio_get_count(dev, con_id);
944f4b0a 4252 else if (is_acpi_node(fwnode))
66858527 4253 count = acpi_gpio_count(dev, con_id);
e7f9ff5d
DT
4254 else if (is_software_node(fwnode))
4255 count = swnode_gpio_count(fwnode, con_id);
66858527
RI
4256
4257 if (count < 0)
4258 count = platform_gpio_count(dev, con_id);
4259
4260 return count;
4261}
4262EXPORT_SYMBOL_GPL(gpiod_count);
4263
bae48da2 4264/**
0879162f 4265 * gpiod_get - obtain a GPIO for a given GPIO function
ad824783 4266 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2 4267 * @con_id: function within the GPIO consumer
39b2bbe3 4268 * @flags: optional GPIO initialization flags
bae48da2
AC
4269 *
4270 * Return the GPIO descriptor corresponding to the function con_id of device
2a3cf6a3 4271 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
20a8a968 4272 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
bae48da2 4273 */
b17d1bf1 4274struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
39b2bbe3 4275 enum gpiod_flags flags)
bae48da2 4276{
39b2bbe3 4277 return gpiod_get_index(dev, con_id, 0, flags);
bae48da2 4278}
b17d1bf1 4279EXPORT_SYMBOL_GPL(gpiod_get);
bae48da2 4280
29a1f233
TR
4281/**
4282 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
4283 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4284 * @con_id: function within the GPIO consumer
39b2bbe3 4285 * @flags: optional GPIO initialization flags
29a1f233
TR
4286 *
4287 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
4288 * the requested function it will return NULL. This is convenient for drivers
4289 * that need to handle optional GPIOs.
4290 */
b17d1bf1 4291struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
39b2bbe3
AC
4292 const char *con_id,
4293 enum gpiod_flags flags)
29a1f233 4294{
39b2bbe3 4295 return gpiod_get_index_optional(dev, con_id, 0, flags);
29a1f233 4296}
b17d1bf1 4297EXPORT_SYMBOL_GPL(gpiod_get_optional);
29a1f233 4298
f625d460
BP
4299
4300/**
4301 * gpiod_configure_flags - helper function to configure a given GPIO
4302 * @desc: gpio whose value will be assigned
4303 * @con_id: function within the GPIO consumer
fed7026a
AS
4304 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4305 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4306 * @dflags: gpiod_flags - optional GPIO initialization flags
4307 *
4308 * Return 0 on success, -ENOENT if no GPIO has been assigned to the
4309 * requested function and/or index, or another IS_ERR() code if an error
4310 * occurred while trying to acquire the GPIO.
4311 */
c29fd9eb 4312int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
85b03b30 4313 unsigned long lflags, enum gpiod_flags dflags)
f625d460 4314{
d377f56f 4315 int ret;
f625d460 4316
85b03b30
JH
4317 if (lflags & GPIO_ACTIVE_LOW)
4318 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
f926dfc1 4319
85b03b30
JH
4320 if (lflags & GPIO_OPEN_DRAIN)
4321 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
f926dfc1
LW
4322 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
4323 /*
4324 * This enforces open drain mode from the consumer side.
4325 * This is necessary for some busses like I2C, but the lookup
4326 * should *REALLY* have specified them as open drain in the
4327 * first place, so print a little warning here.
4328 */
4329 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
4330 gpiod_warn(desc,
4331 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
4332 }
4333
85b03b30
JH
4334 if (lflags & GPIO_OPEN_SOURCE)
4335 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
e10f72bf 4336
c269df8c
NS
4337 if (((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) ||
4338 ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DISABLE)) ||
4339 ((lflags & GPIO_PULL_DOWN) && (lflags & GPIO_PULL_DISABLE))) {
d449991c 4340 gpiod_err(desc,
c269df8c 4341 "multiple pull-up, pull-down or pull-disable enabled, invalid configuration\n");
d449991c
TP
4342 return -EINVAL;
4343 }
4344
4345 if (lflags & GPIO_PULL_UP)
4346 set_bit(FLAG_PULL_UP, &desc->flags);
4347 else if (lflags & GPIO_PULL_DOWN)
4348 set_bit(FLAG_PULL_DOWN, &desc->flags);
c269df8c
NS
4349 else if (lflags & GPIO_PULL_DISABLE)
4350 set_bit(FLAG_BIAS_DISABLE, &desc->flags);
d449991c 4351
d377f56f
LW
4352 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
4353 if (ret < 0)
4354 return ret;
85b03b30 4355
f625d460
BP
4356 /* No particular flag request, return here... */
4357 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
262b9011 4358 gpiod_dbg(desc, "no flags found for %s\n", con_id);
f625d460
BP
4359 return 0;
4360 }
4361
4362 /* Process flags */
4363 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
d377f56f 4364 ret = gpiod_direction_output(desc,
ad17731d 4365 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
f625d460 4366 else
d377f56f 4367 ret = gpiod_direction_input(desc);
f625d460 4368
d377f56f 4369 return ret;
f625d460
BP
4370}
4371
bae48da2
AC
4372/**
4373 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
fdd6a5fe 4374 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2
AC
4375 * @con_id: function within the GPIO consumer
4376 * @idx: index of the GPIO to obtain in the consumer
39b2bbe3 4377 * @flags: optional GPIO initialization flags
bae48da2
AC
4378 *
4379 * This variant of gpiod_get() allows to access GPIOs other than the first
4380 * defined one for functions that define several GPIOs.
4381 *
2a3cf6a3
AC
4382 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
4383 * requested function and/or index, or another IS_ERR() code if an error
20a8a968 4384 * occurred while trying to acquire the GPIO.
bae48da2 4385 */
b17d1bf1 4386struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
bae48da2 4387 const char *con_id,
39b2bbe3
AC
4388 unsigned int idx,
4389 enum gpiod_flags flags)
bae48da2 4390{
07445ae1 4391 struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
7d18f0a1 4392 const char *devname = dev ? dev_name(dev) : "?";
8eb1f71e 4393 const char *label = con_id ?: devname;
bae48da2 4394
8eb1f71e 4395 return gpiod_find_and_request(dev, fwnode, con_id, idx, flags, label, true);
6392cca4 4396}
b17d1bf1 4397EXPORT_SYMBOL_GPL(gpiod_get_index);
6392cca4 4398
29a1f233
TR
4399/**
4400 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
4401 * function
4402 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4403 * @con_id: function within the GPIO consumer
4404 * @index: index of the GPIO to obtain in the consumer
39b2bbe3 4405 * @flags: optional GPIO initialization flags
29a1f233
TR
4406 *
4407 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
4408 * specified index was assigned to the requested function it will return NULL.
4409 * This is convenient for drivers that need to handle optional GPIOs.
4410 */
b17d1bf1 4411struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
29a1f233 4412 const char *con_id,
39b2bbe3
AC
4413 unsigned int index,
4414 enum gpiod_flags flags)
29a1f233
TR
4415{
4416 struct gpio_desc *desc;
4417
39b2bbe3 4418 desc = gpiod_get_index(dev, con_id, index, flags);
7b58696d
AS
4419 if (gpiod_not_found(desc))
4420 return NULL;
29a1f233
TR
4421
4422 return desc;
4423}
b17d1bf1 4424EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
29a1f233 4425
f625d460
BP
4426/**
4427 * gpiod_hog - Hog the specified GPIO desc given the provided flags
4428 * @desc: gpio whose value will be assigned
4429 * @name: gpio line name
fed7026a
AS
4430 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4431 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4432 * @dflags: gpiod_flags - optional GPIO initialization flags
4433 */
4434int gpiod_hog(struct gpio_desc *desc, const char *name,
4435 unsigned long lflags, enum gpiod_flags dflags)
4436{
a0b66a73 4437 struct gpio_chip *gc;
f625d460
BP
4438 struct gpio_desc *local_desc;
4439 int hwnum;
d377f56f 4440 int ret;
f625d460 4441
a0b66a73 4442 gc = gpiod_to_chip(desc);
f625d460
BP
4443 hwnum = gpio_chip_hwgpio(desc);
4444
a0b66a73 4445 local_desc = gpiochip_request_own_desc(gc, hwnum, name,
5923ea6c 4446 lflags, dflags);
f625d460 4447 if (IS_ERR(local_desc)) {
d377f56f 4448 ret = PTR_ERR(local_desc);
c31a571d 4449 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
a0b66a73 4450 name, gc->label, hwnum, ret);
d377f56f 4451 return ret;
f625d460
BP
4452 }
4453
f625d460
BP
4454 /* Mark GPIO as hogged so it can be identified and removed later */
4455 set_bit(FLAG_IS_HOGGED, &desc->flags);
4456
be6736cc 4457 gpiod_dbg(desc, "hogged as %s%s\n",
b27f300f
BG
4458 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
4459 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
4460 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
f625d460
BP
4461
4462 return 0;
4463}
4464
4465/**
4466 * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
a0b66a73 4467 * @gc: gpio chip to act on
f625d460 4468 */
a0b66a73 4469static void gpiochip_free_hogs(struct gpio_chip *gc)
f625d460 4470{
80c78fbe 4471 struct gpio_desc *desc;
f625d460 4472
57017edd 4473 for_each_gpio_desc_with_flag(gc, desc, FLAG_IS_HOGGED)
80c78fbe 4474 gpiochip_free_own_desc(desc);
f625d460
BP
4475}
4476
66858527
RI
4477/**
4478 * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
4479 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4480 * @con_id: function within the GPIO consumer
4481 * @flags: optional GPIO initialization flags
4482 *
4483 * This function acquires all the GPIOs defined under a given function.
4484 *
4485 * Return a struct gpio_descs containing an array of descriptors, -ENOENT if
4486 * no GPIO has been assigned to the requested function, or another IS_ERR()
4487 * code if an error occurred while trying to acquire the GPIOs.
4488 */
4489struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
4490 const char *con_id,
4491 enum gpiod_flags flags)
4492{
4493 struct gpio_desc *desc;
4494 struct gpio_descs *descs;
bf9346f5 4495 struct gpio_array *array_info = NULL;
a0b66a73 4496 struct gpio_chip *gc;
bf9346f5 4497 int count, bitmap_size;
79736429 4498 size_t descs_size;
66858527
RI
4499
4500 count = gpiod_count(dev, con_id);
4501 if (count < 0)
4502 return ERR_PTR(count);
4503
79736429
AS
4504 descs_size = struct_size(descs, desc, count);
4505 descs = kzalloc(descs_size, GFP_KERNEL);
66858527
RI
4506 if (!descs)
4507 return ERR_PTR(-ENOMEM);
4508
4ea0c977 4509 for (descs->ndescs = 0; descs->ndescs < count; descs->ndescs++) {
66858527
RI
4510 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
4511 if (IS_ERR(desc)) {
4512 gpiod_put_array(descs);
4513 return ERR_CAST(desc);
4514 }
bf9346f5 4515
66858527 4516 descs->desc[descs->ndescs] = desc;
bf9346f5 4517
a0b66a73 4518 gc = gpiod_to_chip(desc);
bf9346f5 4519 /*
c4c958aa
JK
4520 * If pin hardware number of array member 0 is also 0, select
4521 * its chip as a candidate for fast bitmap processing path.
bf9346f5 4522 */
c4c958aa 4523 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
bf9346f5
JK
4524 struct gpio_descs *array;
4525
a0b66a73
LW
4526 bitmap_size = BITS_TO_LONGS(gc->ngpio > count ?
4527 gc->ngpio : count);
bf9346f5 4528
79736429
AS
4529 array = krealloc(descs, descs_size +
4530 struct_size(array_info, invert_mask, 3 * bitmap_size),
4531 GFP_KERNEL | __GFP_ZERO);
bf9346f5
JK
4532 if (!array) {
4533 gpiod_put_array(descs);
4534 return ERR_PTR(-ENOMEM);
4535 }
4536
bf9346f5 4537 descs = array;
79736429
AS
4538
4539 array_info = (void *)descs + descs_size;
bf9346f5
JK
4540 array_info->get_mask = array_info->invert_mask +
4541 bitmap_size;
4542 array_info->set_mask = array_info->get_mask +
4543 bitmap_size;
4544
4545 array_info->desc = descs->desc;
4546 array_info->size = count;
a0b66a73 4547 array_info->chip = gc;
bf9346f5
JK
4548 bitmap_set(array_info->get_mask, descs->ndescs,
4549 count - descs->ndescs);
4550 bitmap_set(array_info->set_mask, descs->ndescs,
4551 count - descs->ndescs);
4552 descs->info = array_info;
4553 }
4ea0c977
AS
4554
4555 /* If there is no cache for fast bitmap processing path, continue */
4556 if (!array_info)
4557 continue;
4558
c4c958aa 4559 /* Unmark array members which don't belong to the 'fast' chip */
4ea0c977 4560 if (array_info->chip != gc) {
bf9346f5
JK
4561 __clear_bit(descs->ndescs, array_info->get_mask);
4562 __clear_bit(descs->ndescs, array_info->set_mask);
c4c958aa
JK
4563 }
4564 /*
4565 * Detect array members which belong to the 'fast' chip
4566 * but their pins are not in hardware order.
4567 */
4ea0c977 4568 else if (gpio_chip_hwgpio(desc) != descs->ndescs) {
c4c958aa
JK
4569 /*
4570 * Don't use fast path if all array members processed so
4571 * far belong to the same chip as this one but its pin
4572 * hardware number is different from its array index.
4573 */
4574 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
4575 array_info = NULL;
4576 } else {
4577 __clear_bit(descs->ndescs,
4578 array_info->get_mask);
4579 __clear_bit(descs->ndescs,
4580 array_info->set_mask);
4581 }
4ea0c977 4582 } else {
bf9346f5 4583 /* Exclude open drain or open source from fast output */
a0b66a73
LW
4584 if (gpiochip_line_is_open_drain(gc, descs->ndescs) ||
4585 gpiochip_line_is_open_source(gc, descs->ndescs))
bf9346f5
JK
4586 __clear_bit(descs->ndescs,
4587 array_info->set_mask);
4588 /* Identify 'fast' pins which require invertion */
4589 if (gpiod_is_active_low(desc))
4590 __set_bit(descs->ndescs,
4591 array_info->invert_mask);
4592 }
66858527 4593 }
bf9346f5
JK
4594 if (array_info)
4595 dev_dbg(dev,
4596 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
4597 array_info->chip->label, array_info->size,
4598 *array_info->get_mask, *array_info->set_mask,
4599 *array_info->invert_mask);
66858527
RI
4600 return descs;
4601}
4602EXPORT_SYMBOL_GPL(gpiod_get_array);
4603
4604/**
4605 * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
4606 * function
4607 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4608 * @con_id: function within the GPIO consumer
4609 * @flags: optional GPIO initialization flags
4610 *
4611 * This is equivalent to gpiod_get_array(), except that when no GPIO was
4612 * assigned to the requested function it will return NULL.
4613 */
4614struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
4615 const char *con_id,
4616 enum gpiod_flags flags)
4617{
4618 struct gpio_descs *descs;
4619
4620 descs = gpiod_get_array(dev, con_id, flags);
7b58696d 4621 if (gpiod_not_found(descs))
66858527
RI
4622 return NULL;
4623
4624 return descs;
4625}
4626EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
4627
bae48da2
AC
4628/**
4629 * gpiod_put - dispose of a GPIO descriptor
4630 * @desc: GPIO descriptor to dispose of
4631 *
4632 * No descriptor can be used after gpiod_put() has been called on it.
4633 */
4634void gpiod_put(struct gpio_desc *desc)
4635{
1d7765ba
AS
4636 if (desc)
4637 gpiod_free(desc);
372e722e 4638}
bae48da2 4639EXPORT_SYMBOL_GPL(gpiod_put);
d2876d08 4640
66858527
RI
4641/**
4642 * gpiod_put_array - dispose of multiple GPIO descriptors
4643 * @descs: struct gpio_descs containing an array of descriptors
4644 */
4645void gpiod_put_array(struct gpio_descs *descs)
4646{
4647 unsigned int i;
4648
4649 for (i = 0; i < descs->ndescs; i++)
4650 gpiod_put(descs->desc[i]);
4651
4652 kfree(descs);
4653}
4654EXPORT_SYMBOL_GPL(gpiod_put_array);
4655
4731210c
SK
4656static int gpio_stub_drv_probe(struct device *dev)
4657{
4658 /*
4659 * The DT node of some GPIO chips have a "compatible" property, but
4660 * never have a struct device added and probed by a driver to register
4661 * the GPIO chip with gpiolib. In such cases, fw_devlink=on will cause
4662 * the consumers of the GPIO chip to get probe deferred forever because
4663 * they will be waiting for a device associated with the GPIO chip
4664 * firmware node to get added and bound to a driver.
4665 *
4666 * To allow these consumers to probe, we associate the struct
4667 * gpio_device of the GPIO chip with the firmware node and then simply
4668 * bind it to this stub driver.
4669 */
4670 return 0;
4671}
4672
4673static struct device_driver gpio_stub_drv = {
4674 .name = "gpio_stub_drv",
4675 .bus = &gpio_bus_type,
4676 .probe = gpio_stub_drv_probe,
4677};
4678
3c702e99
LW
4679static int __init gpiolib_dev_init(void)
4680{
4681 int ret;
4682
4683 /* Register GPIO sysfs bus */
b1911710 4684 ret = bus_register(&gpio_bus_type);
3c702e99
LW
4685 if (ret < 0) {
4686 pr_err("gpiolib: could not register GPIO bus type\n");
4687 return ret;
4688 }
4689
3875721e
WY
4690 ret = driver_register(&gpio_stub_drv);
4691 if (ret < 0) {
4731210c
SK
4692 pr_err("gpiolib: could not register GPIO stub driver\n");
4693 bus_unregister(&gpio_bus_type);
4694 return ret;
4695 }
4696
ddd8891e 4697 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME);
3c702e99
LW
4698 if (ret < 0) {
4699 pr_err("gpiolib: failed to allocate char dev region\n");
4731210c 4700 driver_unregister(&gpio_stub_drv);
3c702e99 4701 bus_unregister(&gpio_bus_type);
63636d95 4702 return ret;
3c702e99 4703 }
63636d95
GU
4704
4705 gpiolib_initialized = true;
4706 gpiochip_setup_devs();
4707
8650b609
DG
4708#if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO)
4709 WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier));
4710#endif /* CONFIG_OF_DYNAMIC && CONFIG_OF_GPIO */
63636d95 4711
3c702e99
LW
4712 return ret;
4713}
4714core_initcall(gpiolib_dev_init);
4715
d2876d08
DB
4716#ifdef CONFIG_DEBUG_FS
4717
fdeb8e15 4718static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
d2876d08 4719{
a0b66a73 4720 struct gpio_chip *gc = gdev->chip;
3de69ae1 4721 struct gpio_desc *desc;
fdeb8e15 4722 unsigned gpio = gdev->base;
3de69ae1 4723 int value;
90fd2270
LW
4724 bool is_out;
4725 bool is_irq;
4726 bool active_low;
d2876d08 4727
3de69ae1
AS
4728 for_each_gpio_desc(gc, desc) {
4729 if (test_bit(FLAG_REQUESTED, &desc->flags)) {
4730 gpiod_get_direction(desc);
4731 is_out = test_bit(FLAG_IS_OUT, &desc->flags);
234c5209 4732 value = gpio_chip_get_value(gc, desc);
3de69ae1
AS
4733 is_irq = test_bit(FLAG_USED_AS_IRQ, &desc->flags);
4734 active_low = test_bit(FLAG_ACTIVE_LOW, &desc->flags);
4735 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s\n",
4736 gpio, desc->name ?: "", desc->label,
4737 is_out ? "out" : "in ",
4738 value >= 0 ? (value ? "hi" : "lo") : "? ",
4739 is_irq ? "IRQ " : "",
4740 active_low ? "ACTIVE LOW" : "");
4741 } else if (desc->name) {
4742 seq_printf(s, " gpio-%-3d (%-20.20s)\n", gpio, desc->name);
ced433e2 4743 }
d2876d08 4744
3de69ae1 4745 gpio++;
d2876d08
DB
4746 }
4747}
4748
f9c4a31f 4749static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
d2876d08 4750{
362432ae 4751 unsigned long flags;
ff2b1359 4752 struct gpio_device *gdev = NULL;
cb1650d4 4753 loff_t index = *pos;
d2876d08 4754
f9c4a31f 4755 s->private = "";
d2876d08 4756
362432ae 4757 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4758 list_for_each_entry(gdev, &gpio_devices, list)
362432ae
GL
4759 if (index-- == 0) {
4760 spin_unlock_irqrestore(&gpio_lock, flags);
ff2b1359 4761 return gdev;
f9c4a31f 4762 }
362432ae 4763 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f 4764
cb1650d4 4765 return NULL;
f9c4a31f
TR
4766}
4767
4768static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
4769{
362432ae 4770 unsigned long flags;
ff2b1359 4771 struct gpio_device *gdev = v;
f9c4a31f
TR
4772 void *ret = NULL;
4773
362432ae 4774 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4775 if (list_is_last(&gdev->list, &gpio_devices))
cb1650d4
AC
4776 ret = NULL;
4777 else
243cfa6a 4778 ret = list_first_entry(&gdev->list, struct gpio_device, list);
362432ae 4779 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f
TR
4780
4781 s->private = "\n";
4782 ++*pos;
4783
4784 return ret;
4785}
4786
4787static void gpiolib_seq_stop(struct seq_file *s, void *v)
4788{
4789}
4790
4791static int gpiolib_seq_show(struct seq_file *s, void *v)
4792{
ff2b1359 4793 struct gpio_device *gdev = v;
a0b66a73 4794 struct gpio_chip *gc = gdev->chip;
ff2b1359
LW
4795 struct device *parent;
4796
a0b66a73 4797 if (!gc) {
ff2b1359
LW
4798 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
4799 dev_name(&gdev->dev));
4800 return 0;
4801 }
f9c4a31f 4802
ff2b1359
LW
4803 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
4804 dev_name(&gdev->dev),
fdeb8e15 4805 gdev->base, gdev->base + gdev->ngpio - 1);
a0b66a73 4806 parent = gc->parent;
ff2b1359
LW
4807 if (parent)
4808 seq_printf(s, ", parent: %s/%s",
4809 parent->bus ? parent->bus->name : "no-bus",
4810 dev_name(parent));
a0b66a73
LW
4811 if (gc->label)
4812 seq_printf(s, ", %s", gc->label);
4813 if (gc->can_sleep)
f9c4a31f
TR
4814 seq_printf(s, ", can sleep");
4815 seq_printf(s, ":\n");
4816
a0b66a73
LW
4817 if (gc->dbg_show)
4818 gc->dbg_show(s, gc);
f9c4a31f 4819 else
fdeb8e15 4820 gpiolib_dbg_show(s, gdev);
f9c4a31f 4821
d2876d08
DB
4822 return 0;
4823}
4824
425c5b3e 4825static const struct seq_operations gpiolib_sops = {
f9c4a31f
TR
4826 .start = gpiolib_seq_start,
4827 .next = gpiolib_seq_next,
4828 .stop = gpiolib_seq_stop,
4829 .show = gpiolib_seq_show,
4830};
425c5b3e 4831DEFINE_SEQ_ATTRIBUTE(gpiolib);
d2876d08
DB
4832
4833static int __init gpiolib_debugfs_init(void)
4834{
4835 /* /sys/kernel/debug/gpio */
425c5b3e 4836 debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops);
d2876d08
DB
4837 return 0;
4838}
4839subsys_initcall(gpiolib_debugfs_init);
4840
4841#endif /* DEBUG_FS */