gpio: mxc: Only get the second IRQ when there is more than one IRQ
[linux-block.git] / drivers / gpio / gpiolib.c
CommitLineData
dae5f0af 1// SPDX-License-Identifier: GPL-2.0
923a654c 2#include <linux/bitmap.h>
d2876d08
DB
3#include <linux/kernel.h>
4#include <linux/module.h>
ff77c352 5#include <linux/interrupt.h>
d2876d08
DB
6#include <linux/irq.h>
7#include <linux/spinlock.h>
1a989d0f 8#include <linux/list.h>
d8f388d8
DB
9#include <linux/device.h>
10#include <linux/err.h>
11#include <linux/debugfs.h>
12#include <linux/seq_file.h>
13#include <linux/gpio.h>
ff77c352 14#include <linux/idr.h>
5a0e3ad6 15#include <linux/slab.h>
7b199811 16#include <linux/acpi.h>
53e7cac3 17#include <linux/gpio/driver.h>
0a6d3158 18#include <linux/gpio/machine.h>
c771c2f4 19#include <linux/pinctrl/consumer.h>
3c702e99
LW
20#include <linux/cdev.h>
21#include <linux/fs.h>
22#include <linux/uaccess.h>
8b92e17e 23#include <linux/compat.h>
d7c51b47 24#include <linux/anon_inodes.h>
953b956a 25#include <linux/file.h>
61f922db
LW
26#include <linux/kfifo.h>
27#include <linux/poll.h>
28#include <linux/timekeeping.h>
3c702e99 29#include <uapi/linux/gpio.h>
d2876d08 30
664e3e5a 31#include "gpiolib.h"
f626d6df 32#include "gpiolib-of.h"
77cb907a 33#include "gpiolib-acpi.h"
664e3e5a 34
3f397c21
UKK
35#define CREATE_TRACE_POINTS
36#include <trace/events/gpio.h>
d2876d08 37
79a9becd 38/* Implementation infrastructure for GPIO interfaces.
d2876d08 39 *
79a9becd
AC
40 * The GPIO programming interface allows for inlining speed-critical
41 * get/set operations for common cases, so that access to SOC-integrated
42 * GPIOs can sometimes cost only an instruction or two per bit.
d2876d08
DB
43 */
44
45
46/* When debugging, extend minimal trust to callers and platform code.
47 * Also emit diagnostic messages that may help initial bringup, when
48 * board setup or driver bugs are most common.
49 *
50 * Otherwise, minimize overhead in what may be bitbanging codepaths.
51 */
52#ifdef DEBUG
53#define extra_checks 1
54#else
55#define extra_checks 0
56#endif
57
ff2b1359
LW
58/* Device and char device-related information */
59static DEFINE_IDA(gpio_ida);
3c702e99
LW
60static dev_t gpio_devt;
61#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
62static struct bus_type gpio_bus_type = {
63 .name = "gpio",
64};
ff2b1359 65
3027743f
LA
66/*
67 * Number of GPIOs to use for the fast path in set array
68 */
69#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
70
d2876d08
DB
71/* gpio_lock prevents conflicts during gpio_desc[] table updates.
72 * While any GPIO is requested, its gpio_chip is not removable;
73 * each GPIO's "requested" flag serves as a lock and refcount.
74 */
0eb4c6c2 75DEFINE_SPINLOCK(gpio_lock);
d2876d08 76
bae48da2
AC
77static DEFINE_MUTEX(gpio_lookup_lock);
78static LIST_HEAD(gpio_lookup_list);
ff2b1359 79LIST_HEAD(gpio_devices);
6d86750c 80
a411e81e
BG
81static DEFINE_MUTEX(gpio_machine_hogs_mutex);
82static LIST_HEAD(gpio_machine_hogs);
83
6d86750c 84static void gpiochip_free_hogs(struct gpio_chip *chip);
959bc7b2 85static int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
86 struct lock_class_key *lock_key,
87 struct lock_class_key *request_key);
6d86750c 88static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip);
79b804cb
MW
89static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip);
90static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip);
6d86750c 91
159f3cd9 92static bool gpiolib_initialized;
6d86750c 93
d2876d08
DB
94static inline void desc_set_label(struct gpio_desc *d, const char *label)
95{
d2876d08 96 d->label = label;
d2876d08
DB
97}
98
372e722e 99/**
950d55f5
TR
100 * gpio_to_desc - Convert a GPIO number to its descriptor
101 * @gpio: global GPIO number
102 *
103 * Returns:
104 * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
105 * with the given number exists in the system.
372e722e 106 */
79a9becd 107struct gpio_desc *gpio_to_desc(unsigned gpio)
372e722e 108{
ff2b1359 109 struct gpio_device *gdev;
14e85c0e
AC
110 unsigned long flags;
111
112 spin_lock_irqsave(&gpio_lock, flags);
113
ff2b1359 114 list_for_each_entry(gdev, &gpio_devices, list) {
fdeb8e15
LW
115 if (gdev->base <= gpio &&
116 gdev->base + gdev->ngpio > gpio) {
14e85c0e 117 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 118 return &gdev->descs[gpio - gdev->base];
14e85c0e
AC
119 }
120 }
121
122 spin_unlock_irqrestore(&gpio_lock, flags);
123
0e9a5edf
AC
124 if (!gpio_is_valid(gpio))
125 WARN(1, "invalid GPIO %d\n", gpio);
126
14e85c0e 127 return NULL;
372e722e 128}
79a9becd 129EXPORT_SYMBOL_GPL(gpio_to_desc);
372e722e 130
d468bf9e 131/**
950d55f5
TR
132 * gpiochip_get_desc - get the GPIO descriptor corresponding to the given
133 * hardware number for this chip
134 * @chip: GPIO chip
135 * @hwnum: hardware number of the GPIO for this chip
136 *
137 * Returns:
138 * A pointer to the GPIO descriptor or %ERR_PTR(-EINVAL) if no GPIO exists
139 * in the given chip for the specified hardware number.
d468bf9e 140 */
bb1e88cc
AC
141struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip,
142 u16 hwnum)
d468bf9e 143{
fdeb8e15
LW
144 struct gpio_device *gdev = chip->gpiodev;
145
146 if (hwnum >= gdev->ngpio)
b7d0a28a 147 return ERR_PTR(-EINVAL);
d468bf9e 148
fdeb8e15 149 return &gdev->descs[hwnum];
d468bf9e 150}
372e722e
AC
151
152/**
950d55f5
TR
153 * desc_to_gpio - convert a GPIO descriptor to the integer namespace
154 * @desc: GPIO descriptor
155 *
372e722e 156 * This should disappear in the future but is needed since we still
950d55f5
TR
157 * use GPIO numbers for error messages and sysfs nodes.
158 *
159 * Returns:
160 * The global GPIO number for the GPIO specified by its descriptor.
372e722e 161 */
79a9becd 162int desc_to_gpio(const struct gpio_desc *desc)
372e722e 163{
fdeb8e15 164 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
372e722e 165}
79a9becd 166EXPORT_SYMBOL_GPL(desc_to_gpio);
372e722e
AC
167
168
79a9becd
AC
169/**
170 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
171 * @desc: descriptor to return the chip of
172 */
173struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
372e722e 174{
dd3b9a44 175 if (!desc || !desc->gdev)
fdeb8e15
LW
176 return NULL;
177 return desc->gdev->chip;
372e722e 178}
79a9becd 179EXPORT_SYMBOL_GPL(gpiod_to_chip);
d2876d08 180
8d0aab2f
AV
181/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
182static int gpiochip_find_base(int ngpio)
183{
ff2b1359 184 struct gpio_device *gdev;
83cabe33 185 int base = ARCH_NR_GPIOS - ngpio;
8d0aab2f 186
ff2b1359 187 list_for_each_entry_reverse(gdev, &gpio_devices, list) {
83cabe33 188 /* found a free space? */
fdeb8e15 189 if (gdev->base + gdev->ngpio <= base)
83cabe33
AC
190 break;
191 else
192 /* nope, check the space right before the chip */
fdeb8e15 193 base = gdev->base - ngpio;
8d0aab2f
AV
194 }
195
83cabe33 196 if (gpio_is_valid(base)) {
8d0aab2f 197 pr_debug("%s: found new base at %d\n", __func__, base);
83cabe33
AC
198 return base;
199 } else {
200 pr_err("%s: cannot find free range\n", __func__);
201 return -ENOSPC;
169b6a7a 202 }
169b6a7a
AV
203}
204
79a9becd
AC
205/**
206 * gpiod_get_direction - return the current direction of a GPIO
207 * @desc: GPIO to get the direction of
208 *
94fc7309 209 * Returns 0 for output, 1 for input, or an error code in case of error.
79a9becd
AC
210 *
211 * This function may sleep if gpiod_cansleep() is true.
212 */
8e53b0f1 213int gpiod_get_direction(struct gpio_desc *desc)
80b0a602 214{
d0121b85
WS
215 struct gpio_chip *chip;
216 unsigned offset;
d377f56f 217 int ret;
80b0a602 218
372e722e
AC
219 chip = gpiod_to_chip(desc);
220 offset = gpio_chip_hwgpio(desc);
80b0a602
MN
221
222 if (!chip->get_direction)
d0121b85 223 return -ENOTSUPP;
80b0a602 224
d377f56f
LW
225 ret = chip->get_direction(chip, offset);
226 if (ret > 0) {
80b0a602 227 /* GPIOF_DIR_IN, or other positive */
d377f56f 228 ret = 1;
8e53b0f1 229 clear_bit(FLAG_IS_OUT, &desc->flags);
80b0a602 230 }
d377f56f 231 if (ret == 0) {
80b0a602 232 /* GPIOF_DIR_OUT */
8e53b0f1 233 set_bit(FLAG_IS_OUT, &desc->flags);
80b0a602 234 }
d377f56f 235 return ret;
80b0a602 236}
79a9becd 237EXPORT_SYMBOL_GPL(gpiod_get_direction);
80b0a602 238
1a989d0f
AC
239/*
240 * Add a new chip to the global chips list, keeping the list of chips sorted
ef7c7553 241 * by range(means [base, base + ngpio - 1]) order.
1a989d0f
AC
242 *
243 * Return -EBUSY if the new chip overlaps with some other chip's integer
244 * space.
245 */
ff2b1359 246static int gpiodev_add_to_list(struct gpio_device *gdev)
1a989d0f 247{
a961f9b4 248 struct gpio_device *prev, *next;
1a989d0f 249
ff2b1359 250 if (list_empty(&gpio_devices)) {
a961f9b4 251 /* initial entry in list */
ff2b1359 252 list_add_tail(&gdev->list, &gpio_devices);
e28ecca6 253 return 0;
1a989d0f
AC
254 }
255
a961f9b4
BJZ
256 next = list_entry(gpio_devices.next, struct gpio_device, list);
257 if (gdev->base + gdev->ngpio <= next->base) {
258 /* add before first entry */
259 list_add(&gdev->list, &gpio_devices);
260 return 0;
1a989d0f
AC
261 }
262
a961f9b4
BJZ
263 prev = list_entry(gpio_devices.prev, struct gpio_device, list);
264 if (prev->base + prev->ngpio <= gdev->base) {
265 /* add behind last entry */
266 list_add_tail(&gdev->list, &gpio_devices);
96098df1 267 return 0;
1a989d0f
AC
268 }
269
a961f9b4
BJZ
270 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
271 /* at the end of the list */
272 if (&next->list == &gpio_devices)
273 break;
1a989d0f 274
a961f9b4
BJZ
275 /* add between prev and next */
276 if (prev->base + prev->ngpio <= gdev->base
277 && gdev->base + gdev->ngpio <= next->base) {
278 list_add(&gdev->list, &prev->list);
279 return 0;
280 }
281 }
282
283 dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n");
284 return -EBUSY;
1a989d0f
AC
285}
286
950d55f5 287/*
f881bab0
LW
288 * Convert a GPIO name to its descriptor
289 */
290static struct gpio_desc *gpio_name_to_desc(const char * const name)
291{
ff2b1359 292 struct gpio_device *gdev;
f881bab0
LW
293 unsigned long flags;
294
295 spin_lock_irqsave(&gpio_lock, flags);
296
ff2b1359 297 list_for_each_entry(gdev, &gpio_devices, list) {
f881bab0
LW
298 int i;
299
fdeb8e15
LW
300 for (i = 0; i != gdev->ngpio; ++i) {
301 struct gpio_desc *desc = &gdev->descs[i];
f881bab0 302
fdeb8e15 303 if (!desc->name || !name)
f881bab0
LW
304 continue;
305
fdeb8e15 306 if (!strcmp(desc->name, name)) {
f881bab0 307 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 308 return desc;
f881bab0
LW
309 }
310 }
311 }
312
313 spin_unlock_irqrestore(&gpio_lock, flags);
314
315 return NULL;
316}
317
5f3ca732
MP
318/*
319 * Takes the names from gc->names and checks if they are all unique. If they
320 * are, they are assigned to their gpio descriptors.
321 *
ed37915c 322 * Warning if one of the names is already used for a different GPIO.
5f3ca732
MP
323 */
324static int gpiochip_set_desc_names(struct gpio_chip *gc)
325{
fdeb8e15 326 struct gpio_device *gdev = gc->gpiodev;
5f3ca732
MP
327 int i;
328
329 if (!gc->names)
330 return 0;
331
332 /* First check all names if they are unique */
333 for (i = 0; i != gc->ngpio; ++i) {
334 struct gpio_desc *gpio;
335
336 gpio = gpio_name_to_desc(gc->names[i]);
f881bab0 337 if (gpio)
fdeb8e15 338 dev_warn(&gdev->dev,
34ffd85d 339 "Detected name collision for GPIO name '%s'\n",
f881bab0 340 gc->names[i]);
5f3ca732
MP
341 }
342
343 /* Then add all names to the GPIO descriptors */
344 for (i = 0; i != gc->ngpio; ++i)
fdeb8e15 345 gdev->descs[i].name = gc->names[i];
5f3ca732
MP
346
347 return 0;
348}
349
e4371f6e
SB
350static unsigned long *gpiochip_allocate_mask(struct gpio_chip *chip)
351{
352 unsigned long *p;
353
7bdbd1ec 354 p = bitmap_alloc(chip->ngpio, GFP_KERNEL);
e4371f6e
SB
355 if (!p)
356 return NULL;
357
358 /* Assume by default all GPIOs are valid */
359 bitmap_fill(p, chip->ngpio);
360
361 return p;
362}
363
f626d6df 364static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
726cb3ba 365{
eb1e8bd6 366 if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask))
726cb3ba
SB
367 return 0;
368
f626d6df
LW
369 gc->valid_mask = gpiochip_allocate_mask(gc);
370 if (!gc->valid_mask)
726cb3ba
SB
371 return -ENOMEM;
372
373 return 0;
374}
375
c9fc5aff 376static int gpiochip_init_valid_mask(struct gpio_chip *gc)
f8ec92a9 377{
c9fc5aff
LW
378 if (gc->init_valid_mask)
379 return gc->init_valid_mask(gc,
380 gc->valid_mask,
381 gc->ngpio);
f8ec92a9
RRD
382
383 return 0;
384}
385
726cb3ba
SB
386static void gpiochip_free_valid_mask(struct gpio_chip *gpiochip)
387{
7bdbd1ec 388 bitmap_free(gpiochip->valid_mask);
726cb3ba
SB
389 gpiochip->valid_mask = NULL;
390}
391
392bool gpiochip_line_is_valid(const struct gpio_chip *gpiochip,
393 unsigned int offset)
394{
395 /* No mask means all valid */
396 if (likely(!gpiochip->valid_mask))
397 return true;
398 return test_bit(offset, gpiochip->valid_mask);
399}
400EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
401
d7c51b47
LW
402/*
403 * GPIO line handle management
404 */
405
406/**
407 * struct linehandle_state - contains the state of a userspace handle
408 * @gdev: the GPIO device the handle pertains to
409 * @label: consumer label used to tag descriptors
410 * @descs: the GPIO descriptors held by this handle
411 * @numdescs: the number of descriptors held in the descs array
412 */
413struct linehandle_state {
414 struct gpio_device *gdev;
415 const char *label;
416 struct gpio_desc *descs[GPIOHANDLES_MAX];
417 u32 numdescs;
418};
419
e3e847c7
LPC
420#define GPIOHANDLE_REQUEST_VALID_FLAGS \
421 (GPIOHANDLE_REQUEST_INPUT | \
422 GPIOHANDLE_REQUEST_OUTPUT | \
423 GPIOHANDLE_REQUEST_ACTIVE_LOW | \
424 GPIOHANDLE_REQUEST_OPEN_DRAIN | \
425 GPIOHANDLE_REQUEST_OPEN_SOURCE)
426
d7c51b47
LW
427static long linehandle_ioctl(struct file *filep, unsigned int cmd,
428 unsigned long arg)
429{
430 struct linehandle_state *lh = filep->private_data;
431 void __user *ip = (void __user *)arg;
432 struct gpiohandle_data ghd;
b9762beb 433 DECLARE_BITMAP(vals, GPIOHANDLES_MAX);
d7c51b47
LW
434 int i;
435
436 if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) {
2b955b34 437 /* NOTE: It's ok to read values of output lines. */
eec1d566
LW
438 int ret = gpiod_get_array_value_complex(false,
439 true,
440 lh->numdescs,
441 lh->descs,
77588c14 442 NULL,
eec1d566
LW
443 vals);
444 if (ret)
445 return ret;
d7c51b47 446
3eded5d8 447 memset(&ghd, 0, sizeof(ghd));
eec1d566 448 for (i = 0; i < lh->numdescs; i++)
b9762beb 449 ghd.values[i] = test_bit(i, vals);
d7c51b47
LW
450
451 if (copy_to_user(ip, &ghd, sizeof(ghd)))
452 return -EFAULT;
453
454 return 0;
455 } else if (cmd == GPIOHANDLE_SET_LINE_VALUES_IOCTL) {
e5332d54
BG
456 /*
457 * All line descriptors were created at once with the same
458 * flags so just check if the first one is really output.
459 */
460 if (!test_bit(FLAG_IS_OUT, &lh->descs[0]->flags))
461 return -EPERM;
462
d7c51b47
LW
463 if (copy_from_user(&ghd, ip, sizeof(ghd)))
464 return -EFAULT;
465
466 /* Clamp all values to [0,1] */
467 for (i = 0; i < lh->numdescs; i++)
b9762beb 468 __assign_bit(i, vals, ghd.values[i]);
d7c51b47
LW
469
470 /* Reuse the array setting function */
3027743f 471 return gpiod_set_array_value_complex(false,
d7c51b47
LW
472 true,
473 lh->numdescs,
474 lh->descs,
77588c14 475 NULL,
d7c51b47 476 vals);
d7c51b47
LW
477 }
478 return -EINVAL;
479}
480
481#ifdef CONFIG_COMPAT
482static long linehandle_ioctl_compat(struct file *filep, unsigned int cmd,
483 unsigned long arg)
484{
485 return linehandle_ioctl(filep, cmd, (unsigned long)compat_ptr(arg));
486}
487#endif
488
489static int linehandle_release(struct inode *inode, struct file *filep)
490{
491 struct linehandle_state *lh = filep->private_data;
492 struct gpio_device *gdev = lh->gdev;
493 int i;
494
495 for (i = 0; i < lh->numdescs; i++)
496 gpiod_free(lh->descs[i]);
497 kfree(lh->label);
498 kfree(lh);
499 put_device(&gdev->dev);
500 return 0;
501}
502
503static const struct file_operations linehandle_fileops = {
504 .release = linehandle_release,
505 .owner = THIS_MODULE,
506 .llseek = noop_llseek,
507 .unlocked_ioctl = linehandle_ioctl,
508#ifdef CONFIG_COMPAT
509 .compat_ioctl = linehandle_ioctl_compat,
510#endif
511};
512
513static int linehandle_create(struct gpio_device *gdev, void __user *ip)
514{
515 struct gpiohandle_request handlereq;
516 struct linehandle_state *lh;
953b956a 517 struct file *file;
ab3dbcf7 518 int fd, i, count = 0, ret;
418ee8e9 519 u32 lflags;
d7c51b47
LW
520
521 if (copy_from_user(&handlereq, ip, sizeof(handlereq)))
522 return -EFAULT;
523 if ((handlereq.lines == 0) || (handlereq.lines > GPIOHANDLES_MAX))
524 return -EINVAL;
525
418ee8e9
BG
526 lflags = handlereq.flags;
527
528 /* Return an error if an unknown flag is set */
529 if (lflags & ~GPIOHANDLE_REQUEST_VALID_FLAGS)
530 return -EINVAL;
531
e95fbc13
KG
532 /*
533 * Do not allow both INPUT & OUTPUT flags to be set as they are
534 * contradictory.
535 */
536 if ((lflags & GPIOHANDLE_REQUEST_INPUT) &&
537 (lflags & GPIOHANDLE_REQUEST_OUTPUT))
538 return -EINVAL;
539
588fc3bc
BG
540 /*
541 * Do not allow OPEN_SOURCE & OPEN_DRAIN flags in a single request. If
542 * the hardware actually supports enabling both at the same time the
543 * electrical result would be disastrous.
544 */
545 if ((lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN) &&
546 (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE))
547 return -EINVAL;
548
609aaf6a
BG
549 /* OPEN_DRAIN and OPEN_SOURCE flags only make sense for output mode. */
550 if (!(lflags & GPIOHANDLE_REQUEST_OUTPUT) &&
551 ((lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN) ||
552 (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE)))
553 return -EINVAL;
554
d7c51b47
LW
555 lh = kzalloc(sizeof(*lh), GFP_KERNEL);
556 if (!lh)
557 return -ENOMEM;
558 lh->gdev = gdev;
559 get_device(&gdev->dev);
560
561 /* Make sure this is terminated */
562 handlereq.consumer_label[sizeof(handlereq.consumer_label)-1] = '\0';
563 if (strlen(handlereq.consumer_label)) {
564 lh->label = kstrdup(handlereq.consumer_label,
565 GFP_KERNEL);
566 if (!lh->label) {
567 ret = -ENOMEM;
568 goto out_free_lh;
569 }
570 }
571
572 /* Request each GPIO */
573 for (i = 0; i < handlereq.lines; i++) {
574 u32 offset = handlereq.lineoffsets[i];
d7c51b47
LW
575 struct gpio_desc *desc;
576
e405f9fc
LPC
577 if (offset >= gdev->ngpio) {
578 ret = -EINVAL;
579 goto out_free_descs;
580 }
581
d7c51b47
LW
582 desc = &gdev->descs[offset];
583 ret = gpiod_request(desc, lh->label);
584 if (ret)
585 goto out_free_descs;
586 lh->descs[i] = desc;
19a4fbff 587 count = i + 1;
d7c51b47
LW
588
589 if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW)
590 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
591 if (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN)
592 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
593 if (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE)
594 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
595
e10f72bf
AJ
596 ret = gpiod_set_transitory(desc, false);
597 if (ret < 0)
598 goto out_free_descs;
599
d7c51b47
LW
600 /*
601 * Lines have to be requested explicitly for input
602 * or output, else the line will be treated "as is".
603 */
604 if (lflags & GPIOHANDLE_REQUEST_OUTPUT) {
605 int val = !!handlereq.default_values[i];
606
607 ret = gpiod_direction_output(desc, val);
608 if (ret)
609 goto out_free_descs;
610 } else if (lflags & GPIOHANDLE_REQUEST_INPUT) {
611 ret = gpiod_direction_input(desc);
612 if (ret)
613 goto out_free_descs;
614 }
615 dev_dbg(&gdev->dev, "registered chardev handle for line %d\n",
616 offset);
617 }
e2f608be
LW
618 /* Let i point at the last handle */
619 i--;
d7c51b47
LW
620 lh->numdescs = handlereq.lines;
621
953b956a 622 fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);
d7c51b47
LW
623 if (fd < 0) {
624 ret = fd;
625 goto out_free_descs;
626 }
627
953b956a
LPC
628 file = anon_inode_getfile("gpio-linehandle",
629 &linehandle_fileops,
630 lh,
631 O_RDONLY | O_CLOEXEC);
632 if (IS_ERR(file)) {
633 ret = PTR_ERR(file);
634 goto out_put_unused_fd;
635 }
636
d7c51b47 637 handlereq.fd = fd;
d932cd49 638 if (copy_to_user(ip, &handlereq, sizeof(handlereq))) {
953b956a
LPC
639 /*
640 * fput() will trigger the release() callback, so do not go onto
641 * the regular error cleanup path here.
642 */
643 fput(file);
644 put_unused_fd(fd);
645 return -EFAULT;
d932cd49 646 }
d7c51b47 647
953b956a
LPC
648 fd_install(fd, file);
649
d7c51b47
LW
650 dev_dbg(&gdev->dev, "registered chardev handle for %d lines\n",
651 lh->numdescs);
652
653 return 0;
654
953b956a
LPC
655out_put_unused_fd:
656 put_unused_fd(fd);
d7c51b47 657out_free_descs:
ab3dbcf7 658 for (i = 0; i < count; i++)
d7c51b47
LW
659 gpiod_free(lh->descs[i]);
660 kfree(lh->label);
661out_free_lh:
662 kfree(lh);
663 put_device(&gdev->dev);
664 return ret;
665}
666
61f922db
LW
667/*
668 * GPIO line event management
669 */
670
671/**
672 * struct lineevent_state - contains the state of a userspace event
673 * @gdev: the GPIO device the event pertains to
674 * @label: consumer label used to tag descriptors
675 * @desc: the GPIO descriptor held by this event
676 * @eflags: the event flags this line was requested with
677 * @irq: the interrupt that trigger in response to events on this GPIO
678 * @wait: wait queue that handles blocking reads of events
679 * @events: KFIFO for the GPIO events
680 * @read_lock: mutex lock to protect reads from colliding with adding
681 * new events to the FIFO
d58f2bf2
LW
682 * @timestamp: cache for the timestamp storing it between hardirq
683 * and IRQ thread, used to bring the timestamp close to the actual
684 * event
61f922db
LW
685 */
686struct lineevent_state {
687 struct gpio_device *gdev;
688 const char *label;
689 struct gpio_desc *desc;
690 u32 eflags;
691 int irq;
692 wait_queue_head_t wait;
693 DECLARE_KFIFO(events, struct gpioevent_data, 16);
694 struct mutex read_lock;
d58f2bf2 695 u64 timestamp;
61f922db
LW
696};
697
ac7dbb99
LPC
698#define GPIOEVENT_REQUEST_VALID_FLAGS \
699 (GPIOEVENT_REQUEST_RISING_EDGE | \
700 GPIOEVENT_REQUEST_FALLING_EDGE)
701
afc9a42b 702static __poll_t lineevent_poll(struct file *filep,
61f922db
LW
703 struct poll_table_struct *wait)
704{
705 struct lineevent_state *le = filep->private_data;
afc9a42b 706 __poll_t events = 0;
61f922db
LW
707
708 poll_wait(filep, &le->wait, wait);
709
710 if (!kfifo_is_empty(&le->events))
a9a08845 711 events = EPOLLIN | EPOLLRDNORM;
61f922db
LW
712
713 return events;
714}
715
716
717static ssize_t lineevent_read(struct file *filep,
718 char __user *buf,
719 size_t count,
720 loff_t *f_ps)
721{
722 struct lineevent_state *le = filep->private_data;
723 unsigned int copied;
724 int ret;
725
726 if (count < sizeof(struct gpioevent_data))
727 return -EINVAL;
728
729 do {
730 if (kfifo_is_empty(&le->events)) {
731 if (filep->f_flags & O_NONBLOCK)
732 return -EAGAIN;
733
734 ret = wait_event_interruptible(le->wait,
735 !kfifo_is_empty(&le->events));
736 if (ret)
737 return ret;
738 }
739
740 if (mutex_lock_interruptible(&le->read_lock))
741 return -ERESTARTSYS;
742 ret = kfifo_to_user(&le->events, buf, count, &copied);
743 mutex_unlock(&le->read_lock);
744
745 if (ret)
746 return ret;
747
748 /*
749 * If we couldn't read anything from the fifo (a different
750 * thread might have been faster) we either return -EAGAIN if
751 * the file descriptor is non-blocking, otherwise we go back to
752 * sleep and wait for more data to arrive.
753 */
754 if (copied == 0 && (filep->f_flags & O_NONBLOCK))
755 return -EAGAIN;
756
757 } while (copied == 0);
758
759 return copied;
760}
761
762static int lineevent_release(struct inode *inode, struct file *filep)
763{
764 struct lineevent_state *le = filep->private_data;
765 struct gpio_device *gdev = le->gdev;
766
767 free_irq(le->irq, le);
768 gpiod_free(le->desc);
769 kfree(le->label);
770 kfree(le);
771 put_device(&gdev->dev);
772 return 0;
773}
774
775static long lineevent_ioctl(struct file *filep, unsigned int cmd,
776 unsigned long arg)
777{
778 struct lineevent_state *le = filep->private_data;
779 void __user *ip = (void __user *)arg;
780 struct gpiohandle_data ghd;
781
782 /*
783 * We can get the value for an event line but not set it,
784 * because it is input by definition.
785 */
786 if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) {
787 int val;
788
d82aa4a8
LPC
789 memset(&ghd, 0, sizeof(ghd));
790
61f922db
LW
791 val = gpiod_get_value_cansleep(le->desc);
792 if (val < 0)
793 return val;
794 ghd.values[0] = val;
795
796 if (copy_to_user(ip, &ghd, sizeof(ghd)))
797 return -EFAULT;
798
799 return 0;
800 }
801 return -EINVAL;
802}
803
804#ifdef CONFIG_COMPAT
805static long lineevent_ioctl_compat(struct file *filep, unsigned int cmd,
806 unsigned long arg)
807{
808 return lineevent_ioctl(filep, cmd, (unsigned long)compat_ptr(arg));
809}
810#endif
811
812static const struct file_operations lineevent_fileops = {
813 .release = lineevent_release,
814 .read = lineevent_read,
815 .poll = lineevent_poll,
816 .owner = THIS_MODULE,
817 .llseek = noop_llseek,
818 .unlocked_ioctl = lineevent_ioctl,
819#ifdef CONFIG_COMPAT
820 .compat_ioctl = lineevent_ioctl_compat,
821#endif
822};
823
33265b17 824static irqreturn_t lineevent_irq_thread(int irq, void *p)
61f922db
LW
825{
826 struct lineevent_state *le = p;
827 struct gpioevent_data ge;
fa38869b 828 int ret;
61f922db 829
24bd3efc
LW
830 /* Do not leak kernel stack to userspace */
831 memset(&ge, 0, sizeof(ge));
832
1033be58
BG
833 /*
834 * We may be running from a nested threaded interrupt in which case
835 * we didn't get the timestamp from lineevent_irq_handler().
836 */
837 if (!le->timestamp)
838 ge.timestamp = ktime_get_real_ns();
839 else
840 ge.timestamp = le->timestamp;
61f922db 841
ad537b82
BG
842 if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE
843 && le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) {
fa38869b 844 int level = gpiod_get_value_cansleep(le->desc);
61f922db
LW
845 if (level)
846 /* Emit low-to-high event */
847 ge.id = GPIOEVENT_EVENT_RISING_EDGE;
848 else
849 /* Emit high-to-low event */
850 ge.id = GPIOEVENT_EVENT_FALLING_EDGE;
fa38869b 851 } else if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE) {
61f922db
LW
852 /* Emit low-to-high event */
853 ge.id = GPIOEVENT_EVENT_RISING_EDGE;
fa38869b 854 } else if (le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) {
61f922db
LW
855 /* Emit high-to-low event */
856 ge.id = GPIOEVENT_EVENT_FALLING_EDGE;
bc0207a5
AB
857 } else {
858 return IRQ_NONE;
61f922db
LW
859 }
860
861 ret = kfifo_put(&le->events, ge);
2efc6bfa 862 if (ret)
a9a08845 863 wake_up_poll(&le->wait, EPOLLIN);
61f922db
LW
864
865 return IRQ_HANDLED;
866}
867
d58f2bf2
LW
868static irqreturn_t lineevent_irq_handler(int irq, void *p)
869{
870 struct lineevent_state *le = p;
871
872 /*
873 * Just store the timestamp in hardirq context so we get it as
874 * close in time as possible to the actual event.
875 */
876 le->timestamp = ktime_get_real_ns();
877
878 return IRQ_WAKE_THREAD;
879}
880
61f922db
LW
881static int lineevent_create(struct gpio_device *gdev, void __user *ip)
882{
883 struct gpioevent_request eventreq;
884 struct lineevent_state *le;
885 struct gpio_desc *desc;
953b956a 886 struct file *file;
61f922db
LW
887 u32 offset;
888 u32 lflags;
889 u32 eflags;
890 int fd;
891 int ret;
892 int irqflags = 0;
893
894 if (copy_from_user(&eventreq, ip, sizeof(eventreq)))
895 return -EFAULT;
896
897 le = kzalloc(sizeof(*le), GFP_KERNEL);
898 if (!le)
899 return -ENOMEM;
900 le->gdev = gdev;
901 get_device(&gdev->dev);
902
903 /* Make sure this is terminated */
904 eventreq.consumer_label[sizeof(eventreq.consumer_label)-1] = '\0';
905 if (strlen(eventreq.consumer_label)) {
906 le->label = kstrdup(eventreq.consumer_label,
907 GFP_KERNEL);
908 if (!le->label) {
909 ret = -ENOMEM;
910 goto out_free_le;
911 }
912 }
913
914 offset = eventreq.lineoffset;
915 lflags = eventreq.handleflags;
916 eflags = eventreq.eventflags;
917
b8b0e3d3
LPC
918 if (offset >= gdev->ngpio) {
919 ret = -EINVAL;
920 goto out_free_label;
921 }
922
ac7dbb99
LPC
923 /* Return an error if a unknown flag is set */
924 if ((lflags & ~GPIOHANDLE_REQUEST_VALID_FLAGS) ||
925 (eflags & ~GPIOEVENT_REQUEST_VALID_FLAGS)) {
926 ret = -EINVAL;
927 goto out_free_label;
928 }
929
61f922db 930 /* This is just wrong: we don't look for events on output lines */
5ca2f54b
KG
931 if ((lflags & GPIOHANDLE_REQUEST_OUTPUT) ||
932 (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN) ||
933 (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE)) {
61f922db
LW
934 ret = -EINVAL;
935 goto out_free_label;
936 }
937
938 desc = &gdev->descs[offset];
939 ret = gpiod_request(desc, le->label);
940 if (ret)
f001cc35 941 goto out_free_label;
61f922db
LW
942 le->desc = desc;
943 le->eflags = eflags;
944
945 if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW)
946 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
61f922db
LW
947
948 ret = gpiod_direction_input(desc);
949 if (ret)
950 goto out_free_desc;
951
952 le->irq = gpiod_to_irq(desc);
953 if (le->irq <= 0) {
954 ret = -ENODEV;
955 goto out_free_desc;
956 }
957
958 if (eflags & GPIOEVENT_REQUEST_RISING_EDGE)
223ecaf1
MW
959 irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
960 IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING;
61f922db 961 if (eflags & GPIOEVENT_REQUEST_FALLING_EDGE)
223ecaf1
MW
962 irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
963 IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING;
61f922db 964 irqflags |= IRQF_ONESHOT;
61f922db
LW
965
966 INIT_KFIFO(le->events);
967 init_waitqueue_head(&le->wait);
968 mutex_init(&le->read_lock);
969
970 /* Request a thread to read the events */
971 ret = request_threaded_irq(le->irq,
d58f2bf2 972 lineevent_irq_handler,
61f922db
LW
973 lineevent_irq_thread,
974 irqflags,
975 le->label,
976 le);
977 if (ret)
978 goto out_free_desc;
979
953b956a 980 fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);
61f922db
LW
981 if (fd < 0) {
982 ret = fd;
983 goto out_free_irq;
984 }
985
953b956a
LPC
986 file = anon_inode_getfile("gpio-event",
987 &lineevent_fileops,
988 le,
989 O_RDONLY | O_CLOEXEC);
990 if (IS_ERR(file)) {
991 ret = PTR_ERR(file);
992 goto out_put_unused_fd;
993 }
994
61f922db 995 eventreq.fd = fd;
d932cd49 996 if (copy_to_user(ip, &eventreq, sizeof(eventreq))) {
953b956a
LPC
997 /*
998 * fput() will trigger the release() callback, so do not go onto
999 * the regular error cleanup path here.
1000 */
1001 fput(file);
1002 put_unused_fd(fd);
1003 return -EFAULT;
d932cd49 1004 }
61f922db 1005
953b956a
LPC
1006 fd_install(fd, file);
1007
61f922db
LW
1008 return 0;
1009
953b956a
LPC
1010out_put_unused_fd:
1011 put_unused_fd(fd);
61f922db
LW
1012out_free_irq:
1013 free_irq(le->irq, le);
1014out_free_desc:
1015 gpiod_free(le->desc);
1016out_free_label:
1017 kfree(le->label);
1018out_free_le:
1019 kfree(le);
1020 put_device(&gdev->dev);
1021 return ret;
1022}
1023
950d55f5 1024/*
3c702e99
LW
1025 * gpio_ioctl() - ioctl handler for the GPIO chardev
1026 */
1027static long gpio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
1028{
1029 struct gpio_device *gdev = filp->private_data;
1030 struct gpio_chip *chip = gdev->chip;
8b92e17e 1031 void __user *ip = (void __user *)arg;
3c702e99
LW
1032
1033 /* We fail any subsequent ioctl():s when the chip is gone */
1034 if (!chip)
1035 return -ENODEV;
1036
521a2ad6 1037 /* Fill in the struct and pass to userspace */
3c702e99 1038 if (cmd == GPIO_GET_CHIPINFO_IOCTL) {
521a2ad6
LW
1039 struct gpiochip_info chipinfo;
1040
0f4bbb23
LPC
1041 memset(&chipinfo, 0, sizeof(chipinfo));
1042
3c702e99
LW
1043 strncpy(chipinfo.name, dev_name(&gdev->dev),
1044 sizeof(chipinfo.name));
1045 chipinfo.name[sizeof(chipinfo.name)-1] = '\0';
df4878e9
LW
1046 strncpy(chipinfo.label, gdev->label,
1047 sizeof(chipinfo.label));
1048 chipinfo.label[sizeof(chipinfo.label)-1] = '\0';
fdeb8e15 1049 chipinfo.lines = gdev->ngpio;
3c702e99
LW
1050 if (copy_to_user(ip, &chipinfo, sizeof(chipinfo)))
1051 return -EFAULT;
1052 return 0;
521a2ad6
LW
1053 } else if (cmd == GPIO_GET_LINEINFO_IOCTL) {
1054 struct gpioline_info lineinfo;
1055 struct gpio_desc *desc;
1056
1057 if (copy_from_user(&lineinfo, ip, sizeof(lineinfo)))
1058 return -EFAULT;
1f1cc456 1059 if (lineinfo.line_offset >= gdev->ngpio)
521a2ad6
LW
1060 return -EINVAL;
1061
1062 desc = &gdev->descs[lineinfo.line_offset];
1063 if (desc->name) {
1064 strncpy(lineinfo.name, desc->name,
1065 sizeof(lineinfo.name));
1066 lineinfo.name[sizeof(lineinfo.name)-1] = '\0';
1067 } else {
1068 lineinfo.name[0] = '\0';
1069 }
1070 if (desc->label) {
214338e3
LW
1071 strncpy(lineinfo.consumer, desc->label,
1072 sizeof(lineinfo.consumer));
1073 lineinfo.consumer[sizeof(lineinfo.consumer)-1] = '\0';
521a2ad6 1074 } else {
214338e3 1075 lineinfo.consumer[0] = '\0';
521a2ad6
LW
1076 }
1077
1078 /*
1079 * Userspace only need to know that the kernel is using
1080 * this GPIO so it can't use it.
1081 */
1082 lineinfo.flags = 0;
9d8cc89c
LW
1083 if (test_bit(FLAG_REQUESTED, &desc->flags) ||
1084 test_bit(FLAG_IS_HOGGED, &desc->flags) ||
1085 test_bit(FLAG_USED_AS_IRQ, &desc->flags) ||
1086 test_bit(FLAG_EXPORT, &desc->flags) ||
472a61e7
SW
1087 test_bit(FLAG_SYSFS, &desc->flags) ||
1088 !pinctrl_gpio_can_use_line(chip->base + lineinfo.line_offset))
521a2ad6 1089 lineinfo.flags |= GPIOLINE_FLAG_KERNEL;
9d8cc89c 1090 if (test_bit(FLAG_IS_OUT, &desc->flags))
521a2ad6 1091 lineinfo.flags |= GPIOLINE_FLAG_IS_OUT;
9d8cc89c 1092 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
521a2ad6 1093 lineinfo.flags |= GPIOLINE_FLAG_ACTIVE_LOW;
9d8cc89c 1094 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
2c60e6b5
BG
1095 lineinfo.flags |= (GPIOLINE_FLAG_OPEN_DRAIN |
1096 GPIOLINE_FLAG_IS_OUT);
9d8cc89c 1097 if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
2c60e6b5
BG
1098 lineinfo.flags |= (GPIOLINE_FLAG_OPEN_SOURCE |
1099 GPIOLINE_FLAG_IS_OUT);
521a2ad6
LW
1100
1101 if (copy_to_user(ip, &lineinfo, sizeof(lineinfo)))
1102 return -EFAULT;
1103 return 0;
d7c51b47
LW
1104 } else if (cmd == GPIO_GET_LINEHANDLE_IOCTL) {
1105 return linehandle_create(gdev, ip);
61f922db
LW
1106 } else if (cmd == GPIO_GET_LINEEVENT_IOCTL) {
1107 return lineevent_create(gdev, ip);
3c702e99
LW
1108 }
1109 return -EINVAL;
1110}
1111
8b92e17e
LW
1112#ifdef CONFIG_COMPAT
1113static long gpio_ioctl_compat(struct file *filp, unsigned int cmd,
1114 unsigned long arg)
1115{
1116 return gpio_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
1117}
1118#endif
1119
3c702e99
LW
1120/**
1121 * gpio_chrdev_open() - open the chardev for ioctl operations
1122 * @inode: inode for this chardev
1123 * @filp: file struct for storing private data
1124 * Returns 0 on success
1125 */
1126static int gpio_chrdev_open(struct inode *inode, struct file *filp)
1127{
1128 struct gpio_device *gdev = container_of(inode->i_cdev,
1129 struct gpio_device, chrdev);
1130
1131 /* Fail on open if the backing gpiochip is gone */
fb505747 1132 if (!gdev->chip)
3c702e99
LW
1133 return -ENODEV;
1134 get_device(&gdev->dev);
1135 filp->private_data = gdev;
f4e81c52
LPC
1136
1137 return nonseekable_open(inode, filp);
3c702e99
LW
1138}
1139
1140/**
1141 * gpio_chrdev_release() - close chardev after ioctl operations
1142 * @inode: inode for this chardev
1143 * @filp: file struct for storing private data
1144 * Returns 0 on success
1145 */
1146static int gpio_chrdev_release(struct inode *inode, struct file *filp)
1147{
1148 struct gpio_device *gdev = container_of(inode->i_cdev,
1149 struct gpio_device, chrdev);
1150
3c702e99
LW
1151 put_device(&gdev->dev);
1152 return 0;
1153}
1154
1155
1156static const struct file_operations gpio_fileops = {
1157 .release = gpio_chrdev_release,
1158 .open = gpio_chrdev_open,
1159 .owner = THIS_MODULE,
f4e81c52 1160 .llseek = no_llseek,
3c702e99 1161 .unlocked_ioctl = gpio_ioctl,
8b92e17e
LW
1162#ifdef CONFIG_COMPAT
1163 .compat_ioctl = gpio_ioctl_compat,
1164#endif
3c702e99
LW
1165};
1166
ff2b1359
LW
1167static void gpiodevice_release(struct device *dev)
1168{
1169 struct gpio_device *gdev = dev_get_drvdata(dev);
1170
1171 list_del(&gdev->list);
1172 ida_simple_remove(&gpio_ida, gdev->id);
fcf273e5 1173 kfree_const(gdev->label);
476e2fc5 1174 kfree(gdev->descs);
9efd9e69 1175 kfree(gdev);
ff2b1359
LW
1176}
1177
159f3cd9
GR
1178static int gpiochip_setup_dev(struct gpio_device *gdev)
1179{
d377f56f 1180 int ret;
159f3cd9
GR
1181
1182 cdev_init(&gdev->chrdev, &gpio_fileops);
1183 gdev->chrdev.owner = THIS_MODULE;
159f3cd9 1184 gdev->dev.devt = MKDEV(MAJOR(gpio_devt), gdev->id);
111379dc 1185
d377f56f
LW
1186 ret = cdev_device_add(&gdev->chrdev, &gdev->dev);
1187 if (ret)
1188 return ret;
111379dc
LG
1189
1190 chip_dbg(gdev->chip, "added GPIO chardev (%d:%d)\n",
1191 MAJOR(gpio_devt), gdev->id);
159f3cd9 1192
d377f56f
LW
1193 ret = gpiochip_sysfs_register(gdev);
1194 if (ret)
159f3cd9
GR
1195 goto err_remove_device;
1196
1197 /* From this point, the .release() function cleans up gpio_device */
1198 gdev->dev.release = gpiodevice_release;
159f3cd9
GR
1199 pr_debug("%s: registered GPIOs %d to %d on device: %s (%s)\n",
1200 __func__, gdev->base, gdev->base + gdev->ngpio - 1,
1201 dev_name(&gdev->dev), gdev->chip->label ? : "generic");
1202
1203 return 0;
1204
1205err_remove_device:
111379dc 1206 cdev_device_del(&gdev->chrdev, &gdev->dev);
d377f56f 1207 return ret;
159f3cd9
GR
1208}
1209
a411e81e
BG
1210static void gpiochip_machine_hog(struct gpio_chip *chip, struct gpiod_hog *hog)
1211{
1212 struct gpio_desc *desc;
1213 int rv;
1214
1215 desc = gpiochip_get_desc(chip, hog->chip_hwnum);
1216 if (IS_ERR(desc)) {
1217 pr_err("%s: unable to get GPIO desc: %ld\n",
1218 __func__, PTR_ERR(desc));
1219 return;
1220 }
1221
ba3efdff 1222 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
a411e81e
BG
1223 return;
1224
1225 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
1226 if (rv)
1227 pr_err("%s: unable to hog GPIO line (%s:%u): %d\n",
1228 __func__, chip->label, hog->chip_hwnum, rv);
1229}
1230
1231static void machine_gpiochip_add(struct gpio_chip *chip)
1232{
1233 struct gpiod_hog *hog;
1234
1235 mutex_lock(&gpio_machine_hogs_mutex);
1236
1237 list_for_each_entry(hog, &gpio_machine_hogs, list) {
1238 if (!strcmp(chip->label, hog->chip_label))
1239 gpiochip_machine_hog(chip, hog);
1240 }
1241
1242 mutex_unlock(&gpio_machine_hogs_mutex);
1243}
1244
159f3cd9
GR
1245static void gpiochip_setup_devs(void)
1246{
1247 struct gpio_device *gdev;
d377f56f 1248 int ret;
159f3cd9
GR
1249
1250 list_for_each_entry(gdev, &gpio_devices, list) {
d377f56f
LW
1251 ret = gpiochip_setup_dev(gdev);
1252 if (ret)
159f3cd9 1253 pr_err("%s: Failed to initialize gpio device (%d)\n",
d377f56f 1254 dev_name(&gdev->dev), ret);
159f3cd9
GR
1255 }
1256}
1257
959bc7b2 1258int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data,
39c3fd58
AL
1259 struct lock_class_key *lock_key,
1260 struct lock_class_key *request_key)
d2876d08
DB
1261{
1262 unsigned long flags;
d377f56f 1263 int ret = 0;
ff2b1359 1264 unsigned i;
8d0aab2f 1265 int base = chip->base;
ff2b1359 1266 struct gpio_device *gdev;
d2876d08 1267
ff2b1359
LW
1268 /*
1269 * First: allocate and populate the internal stat container, and
1270 * set up the struct device.
1271 */
969f07b4 1272 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
ff2b1359 1273 if (!gdev)
14e85c0e 1274 return -ENOMEM;
3c702e99 1275 gdev->dev.bus = &gpio_bus_type;
ff2b1359
LW
1276 gdev->chip = chip;
1277 chip->gpiodev = gdev;
1278 if (chip->parent) {
1279 gdev->dev.parent = chip->parent;
1280 gdev->dev.of_node = chip->parent->of_node;
acc6e331
TR
1281 }
1282
ff2b1359
LW
1283#ifdef CONFIG_OF_GPIO
1284 /* If the gpiochip has an assigned OF node this takes precedence */
acc6e331
TR
1285 if (chip->of_node)
1286 gdev->dev.of_node = chip->of_node;
6ff04974
BD
1287 else
1288 chip->of_node = gdev->dev.of_node;
ff2b1359 1289#endif
acc6e331 1290
ff2b1359
LW
1291 gdev->id = ida_simple_get(&gpio_ida, 0, 0, GFP_KERNEL);
1292 if (gdev->id < 0) {
d377f56f 1293 ret = gdev->id;
ff2b1359
LW
1294 goto err_free_gdev;
1295 }
1296 dev_set_name(&gdev->dev, "gpiochip%d", gdev->id);
1297 device_initialize(&gdev->dev);
1298 dev_set_drvdata(&gdev->dev, gdev);
1299 if (chip->parent && chip->parent->driver)
1300 gdev->owner = chip->parent->driver->owner;
1301 else if (chip->owner)
1302 /* TODO: remove chip->owner */
1303 gdev->owner = chip->owner;
1304 else
1305 gdev->owner = THIS_MODULE;
d2876d08 1306
476e2fc5 1307 gdev->descs = kcalloc(chip->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL);
1c3cdb18 1308 if (!gdev->descs) {
d377f56f 1309 ret = -ENOMEM;
a05a1404 1310 goto err_free_ida;
ff2b1359
LW
1311 }
1312
5ed41cc4
BJZ
1313 if (chip->ngpio == 0) {
1314 chip_err(chip, "tried to insert a GPIO chip with zero lines\n");
d377f56f 1315 ret = -EINVAL;
159f3cd9 1316 goto err_free_descs;
5ed41cc4 1317 }
df4878e9 1318
3027743f
LA
1319 if (chip->ngpio > FASTPATH_NGPIO)
1320 chip_warn(chip, "line cnt %u is greater than fast path cnt %u\n",
1321 chip->ngpio, FASTPATH_NGPIO);
1322
fcf273e5 1323 gdev->label = kstrdup_const(chip->label ?: "unknown", GFP_KERNEL);
df4878e9 1324 if (!gdev->label) {
d377f56f 1325 ret = -ENOMEM;
476e2fc5 1326 goto err_free_descs;
df4878e9
LW
1327 }
1328
fdeb8e15 1329 gdev->ngpio = chip->ngpio;
43c54eca 1330 gdev->data = data;
5ed41cc4 1331
d2876d08
DB
1332 spin_lock_irqsave(&gpio_lock, flags);
1333
fdeb8e15
LW
1334 /*
1335 * TODO: this allocates a Linux GPIO number base in the global
1336 * GPIO numberspace for this chip. In the long run we want to
1337 * get *rid* of this numberspace and use only descriptors, but
1338 * it may be a pipe dream. It will not happen before we get rid
1339 * of the sysfs interface anyways.
1340 */
8d0aab2f
AV
1341 if (base < 0) {
1342 base = gpiochip_find_base(chip->ngpio);
1343 if (base < 0) {
d377f56f 1344 ret = base;
225fce83 1345 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1346 goto err_free_label;
8d0aab2f 1347 }
fdeb8e15
LW
1348 /*
1349 * TODO: it should not be necessary to reflect the assigned
1350 * base outside of the GPIO subsystem. Go over drivers and
1351 * see if anyone makes use of this, else drop this and assign
1352 * a poison instead.
1353 */
8d0aab2f
AV
1354 chip->base = base;
1355 }
fdeb8e15 1356 gdev->base = base;
8d0aab2f 1357
d377f56f
LW
1358 ret = gpiodev_add_to_list(gdev);
1359 if (ret) {
05aa5203 1360 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1361 goto err_free_label;
05aa5203 1362 }
1a989d0f 1363
545ebd9a
LW
1364 spin_unlock_irqrestore(&gpio_lock, flags);
1365
767cd17a
RRD
1366 for (i = 0; i < chip->ngpio; i++)
1367 gdev->descs[i].gdev = gdev;
14e85c0e 1368
f23f1516 1369#ifdef CONFIG_PINCTRL
20ec3e39 1370 INIT_LIST_HEAD(&gdev->pin_ranges);
f23f1516
SH
1371#endif
1372
d377f56f
LW
1373 ret = gpiochip_set_desc_names(chip);
1374 if (ret)
5f3ca732
MP
1375 goto err_remove_from_list;
1376
d377f56f
LW
1377 ret = gpiochip_alloc_valid_mask(chip);
1378 if (ret)
48057ed1 1379 goto err_remove_from_list;
e0d89728 1380
d377f56f
LW
1381 ret = of_gpiochip_add(chip);
1382 if (ret)
48057ed1 1383 goto err_free_gpiochip_mask;
28355f81 1384
d377f56f
LW
1385 ret = gpiochip_init_valid_mask(chip);
1386 if (ret)
35779890 1387 goto err_remove_of_chip;
f8ec92a9 1388
3edfb7bd
RRD
1389 for (i = 0; i < chip->ngpio; i++) {
1390 struct gpio_desc *desc = &gdev->descs[i];
1391
d95da993
CP
1392 if (chip->get_direction && gpiochip_line_is_valid(chip, i)) {
1393 if (!chip->get_direction(chip, i))
1394 set_bit(FLAG_IS_OUT, &desc->flags);
1395 else
1396 clear_bit(FLAG_IS_OUT, &desc->flags);
1397 } else {
1398 if (!chip->direction_input)
1399 set_bit(FLAG_IS_OUT, &desc->flags);
1400 else
1401 clear_bit(FLAG_IS_OUT, &desc->flags);
1402 }
3edfb7bd
RRD
1403 }
1404
664e3e5a 1405 acpi_gpiochip_add(chip);
391c970c 1406
a411e81e
BG
1407 machine_gpiochip_add(chip);
1408
fbdf8d4b
LW
1409 ret = gpiochip_irqchip_init_valid_mask(chip);
1410 if (ret)
48057ed1
LW
1411 goto err_remove_acpi_chip;
1412
fbdf8d4b
LW
1413 ret = gpiochip_add_irqchip(chip, lock_key, request_key);
1414 if (ret)
48057ed1
LW
1415 goto err_remove_irqchip_mask;
1416
3c702e99
LW
1417 /*
1418 * By first adding the chardev, and then adding the device,
1419 * we get a device node entry in sysfs under
1420 * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
1421 * coldplug of device nodes and other udev business.
159f3cd9
GR
1422 * We can do this only if gpiolib has been initialized.
1423 * Otherwise, defer until later.
3c702e99 1424 */
159f3cd9 1425 if (gpiolib_initialized) {
d377f56f
LW
1426 ret = gpiochip_setup_dev(gdev);
1427 if (ret)
48057ed1 1428 goto err_remove_irqchip;
159f3cd9 1429 }
cedb1881 1430 return 0;
3bae4811 1431
48057ed1
LW
1432err_remove_irqchip:
1433 gpiochip_irqchip_remove(chip);
1434err_remove_irqchip_mask:
1435 gpiochip_irqchip_free_valid_mask(chip);
35779890 1436err_remove_acpi_chip:
225fce83 1437 acpi_gpiochip_remove(chip);
35779890 1438err_remove_of_chip:
6d86750c 1439 gpiochip_free_hogs(chip);
225fce83 1440 of_gpiochip_remove(chip);
35779890 1441err_free_gpiochip_mask:
726cb3ba 1442 gpiochip_free_valid_mask(chip);
5f3ca732 1443err_remove_from_list:
225fce83 1444 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1445 list_del(&gdev->list);
3bae4811 1446 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1447err_free_label:
fcf273e5 1448 kfree_const(gdev->label);
476e2fc5
GR
1449err_free_descs:
1450 kfree(gdev->descs);
a05a1404 1451err_free_ida:
ff2b1359 1452 ida_simple_remove(&gpio_ida, gdev->id);
a05a1404 1453err_free_gdev:
d2876d08 1454 /* failures here can mean systems won't boot... */
1777fc97 1455 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
fdeb8e15 1456 gdev->base, gdev->base + gdev->ngpio - 1,
d377f56f 1457 chip->label ? : "generic", ret);
fdeb8e15 1458 kfree(gdev);
d377f56f 1459 return ret;
d2876d08 1460}
959bc7b2 1461EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
d2876d08 1462
43c54eca
LW
1463/**
1464 * gpiochip_get_data() - get per-subdriver data for the chip
950d55f5
TR
1465 * @chip: GPIO chip
1466 *
1467 * Returns:
1468 * The per-subdriver data for the chip.
43c54eca
LW
1469 */
1470void *gpiochip_get_data(struct gpio_chip *chip)
1471{
1472 return chip->gpiodev->data;
1473}
1474EXPORT_SYMBOL_GPL(gpiochip_get_data);
1475
d2876d08
DB
1476/**
1477 * gpiochip_remove() - unregister a gpio_chip
1478 * @chip: the chip to unregister
1479 *
1480 * A gpio_chip with any GPIOs still requested may not be removed.
1481 */
e1db1706 1482void gpiochip_remove(struct gpio_chip *chip)
d2876d08 1483{
ff2b1359 1484 struct gpio_device *gdev = chip->gpiodev;
fab28b89 1485 struct gpio_desc *desc;
d2876d08 1486 unsigned long flags;
1c3cdb18 1487 unsigned i;
fab28b89 1488 bool requested = false;
d2876d08 1489
ff2b1359 1490 /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
afbc4f31 1491 gpiochip_sysfs_unregister(gdev);
5018ada6 1492 gpiochip_free_hogs(chip);
bd203bd5
BJZ
1493 /* Numb the device, cancelling all outstanding operations */
1494 gdev->chip = NULL;
00acc3dc 1495 gpiochip_irqchip_remove(chip);
6072b9dc 1496 acpi_gpiochip_remove(chip);
9ef0d6f7 1497 gpiochip_remove_pin_ranges(chip);
391c970c 1498 of_gpiochip_remove(chip);
726cb3ba 1499 gpiochip_free_valid_mask(chip);
43c54eca
LW
1500 /*
1501 * We accept no more calls into the driver from this point, so
1502 * NULL the driver data pointer
1503 */
1504 gdev->data = NULL;
391c970c 1505
6798acaa 1506 spin_lock_irqsave(&gpio_lock, flags);
fdeb8e15 1507 for (i = 0; i < gdev->ngpio; i++) {
1c3cdb18 1508 desc = &gdev->descs[i];
fab28b89
JH
1509 if (test_bit(FLAG_REQUESTED, &desc->flags))
1510 requested = true;
d2876d08 1511 }
d2876d08 1512 spin_unlock_irqrestore(&gpio_lock, flags);
14e85c0e 1513
fab28b89 1514 if (requested)
fdeb8e15 1515 dev_crit(&gdev->dev,
58383c78 1516 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
fab28b89 1517
ff2b1359
LW
1518 /*
1519 * The gpiochip side puts its use of the device to rest here:
1520 * if there are no userspace clients, the chardev and device will
1521 * be removed, else it will be dangling until the last user is
1522 * gone.
1523 */
111379dc 1524 cdev_device_del(&gdev->chrdev, &gdev->dev);
ff2b1359 1525 put_device(&gdev->dev);
d2876d08
DB
1526}
1527EXPORT_SYMBOL_GPL(gpiochip_remove);
1528
0cf3292c
LD
1529static void devm_gpio_chip_release(struct device *dev, void *res)
1530{
1531 struct gpio_chip *chip = *(struct gpio_chip **)res;
1532
1533 gpiochip_remove(chip);
1534}
1535
0cf3292c 1536/**
689fd02e 1537 * devm_gpiochip_add_data() - Resource manager gpiochip_add_data()
3925b90f 1538 * @dev: pointer to the device that gpio_chip belongs to.
0cf3292c 1539 * @chip: the chip to register, with chip->base initialized
950d55f5 1540 * @data: driver-private data associated with this chip
0cf3292c 1541 *
950d55f5 1542 * Context: potentially before irqs will work
0cf3292c
LD
1543 *
1544 * The gpio chip automatically be released when the device is unbound.
950d55f5
TR
1545 *
1546 * Returns:
1547 * A negative errno if the chip can't be registered, such as because the
1548 * chip->base is invalid or already associated with a different chip.
1549 * Otherwise it returns zero as a success code.
0cf3292c
LD
1550 */
1551int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip,
1552 void *data)
1553{
1554 struct gpio_chip **ptr;
1555 int ret;
1556
1557 ptr = devres_alloc(devm_gpio_chip_release, sizeof(*ptr),
1558 GFP_KERNEL);
1559 if (!ptr)
1560 return -ENOMEM;
1561
1562 ret = gpiochip_add_data(chip, data);
1563 if (ret < 0) {
1564 devres_free(ptr);
1565 return ret;
1566 }
1567
1568 *ptr = chip;
1569 devres_add(dev, ptr);
1570
1571 return 0;
1572}
1573EXPORT_SYMBOL_GPL(devm_gpiochip_add_data);
1574
594fa265
GL
1575/**
1576 * gpiochip_find() - iterator for locating a specific gpio_chip
1577 * @data: data to pass to match function
950d55f5 1578 * @match: Callback function to check gpio_chip
594fa265
GL
1579 *
1580 * Similar to bus_find_device. It returns a reference to a gpio_chip as
1581 * determined by a user supplied @match callback. The callback should return
1582 * 0 if the device doesn't match and non-zero if it does. If the callback is
1583 * non-zero, this function will return to the caller and not iterate over any
1584 * more gpio_chips.
1585 */
07ce8ec7 1586struct gpio_chip *gpiochip_find(void *data,
6e2cf651 1587 int (*match)(struct gpio_chip *chip,
3d0f7cf0 1588 void *data))
594fa265 1589{
ff2b1359 1590 struct gpio_device *gdev;
acf06ff7 1591 struct gpio_chip *chip = NULL;
594fa265 1592 unsigned long flags;
594fa265
GL
1593
1594 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1595 list_for_each_entry(gdev, &gpio_devices, list)
acf06ff7
MY
1596 if (gdev->chip && match(gdev->chip, data)) {
1597 chip = gdev->chip;
594fa265 1598 break;
acf06ff7 1599 }
ff2b1359 1600
594fa265
GL
1601 spin_unlock_irqrestore(&gpio_lock, flags);
1602
1603 return chip;
1604}
8fa0c9bf 1605EXPORT_SYMBOL_GPL(gpiochip_find);
d2876d08 1606
79697ef9
AC
1607static int gpiochip_match_name(struct gpio_chip *chip, void *data)
1608{
1609 const char *name = data;
1610
1611 return !strcmp(chip->label, name);
1612}
1613
1614static struct gpio_chip *find_chip_by_name(const char *name)
1615{
1616 return gpiochip_find((void *)name, gpiochip_match_name);
1617}
1618
14250520
LW
1619#ifdef CONFIG_GPIOLIB_IRQCHIP
1620
1621/*
1622 * The following is irqchip helper code for gpiochips.
1623 */
1624
5fbe5b58 1625static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb 1626{
5fbe5b58
LW
1627 struct gpio_irq_chip *girq = &gc->irq;
1628
1629 if (!girq->init_valid_mask)
79b804cb
MW
1630 return 0;
1631
5fbe5b58
LW
1632 girq->valid_mask = gpiochip_allocate_mask(gc);
1633 if (!girq->valid_mask)
79b804cb
MW
1634 return -ENOMEM;
1635
5fbe5b58
LW
1636 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
1637
79b804cb
MW
1638 return 0;
1639}
1640
1641static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip)
1642{
7bdbd1ec 1643 bitmap_free(gpiochip->irq.valid_mask);
dc7b0387 1644 gpiochip->irq.valid_mask = NULL;
79b804cb
MW
1645}
1646
64ff2c8e
SB
1647bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gpiochip,
1648 unsigned int offset)
79b804cb 1649{
726cb3ba
SB
1650 if (!gpiochip_line_is_valid(gpiochip, offset))
1651 return false;
79b804cb 1652 /* No mask means all valid */
dc7b0387 1653 if (likely(!gpiochip->irq.valid_mask))
79b804cb 1654 return true;
dc7b0387 1655 return test_bit(offset, gpiochip->irq.valid_mask);
79b804cb 1656}
64ff2c8e 1657EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
79b804cb 1658
14250520 1659/**
d245b3f9 1660 * gpiochip_set_cascaded_irqchip() - connects a cascaded irqchip to a gpiochip
4892d3a6 1661 * @gc: the gpiochip to set the irqchip chain to
14250520
LW
1662 * @parent_irq: the irq number corresponding to the parent IRQ for this
1663 * chained irqchip
1664 * @parent_handler: the parent interrupt handler for the accumulated IRQ
3f97d5fc
LW
1665 * coming out of the gpiochip. If the interrupt is nested rather than
1666 * cascaded, pass NULL in this handler argument
14250520 1667 */
4892d3a6 1668static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gc,
6f79309a 1669 unsigned int parent_irq,
d245b3f9 1670 irq_flow_handler_t parent_handler)
14250520 1671{
4892d3a6
LW
1672 struct gpio_irq_chip *girq = &gc->irq;
1673 struct device *dev = &gc->gpiodev->dev;
1674
1675 if (!girq->domain) {
1676 chip_err(gc, "called %s before setting up irqchip\n",
83141a77 1677 __func__);
1c8732bb
LW
1678 return;
1679 }
1680
3f97d5fc 1681 if (parent_handler) {
4892d3a6
LW
1682 if (gc->can_sleep) {
1683 chip_err(gc,
b1911710 1684 "you cannot have chained interrupts on a chip that may sleep\n");
3f97d5fc
LW
1685 return;
1686 }
4892d3a6
LW
1687 girq->parents = devm_kcalloc(dev, 1,
1688 sizeof(*girq->parents),
1689 GFP_KERNEL);
1690 if (!girq->parents) {
1691 chip_err(gc, "out of memory allocating parent IRQ\n");
1692 return;
1693 }
1694 girq->parents[0] = parent_irq;
1695 girq->num_parents = 1;
3f97d5fc
LW
1696 /*
1697 * The parent irqchip is already using the chip_data for this
1698 * irqchip, so our callbacks simply use the handler_data.
1699 */
f7f87753 1700 irq_set_chained_handler_and_data(parent_irq, parent_handler,
4892d3a6 1701 gc);
3f97d5fc 1702 }
14250520 1703}
d245b3f9
LW
1704
1705/**
1706 * gpiochip_set_chained_irqchip() - connects a chained irqchip to a gpiochip
1707 * @gpiochip: the gpiochip to set the irqchip chain to
1708 * @irqchip: the irqchip to chain to the gpiochip
1709 * @parent_irq: the irq number corresponding to the parent IRQ for this
1710 * chained irqchip
1711 * @parent_handler: the parent interrupt handler for the accumulated IRQ
40f5ff4f 1712 * coming out of the gpiochip.
d245b3f9
LW
1713 */
1714void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
1715 struct irq_chip *irqchip,
6f79309a 1716 unsigned int parent_irq,
d245b3f9
LW
1717 irq_flow_handler_t parent_handler)
1718{
60ed54ca
TR
1719 if (gpiochip->irq.threaded) {
1720 chip_err(gpiochip, "tried to chain a threaded gpiochip\n");
1721 return;
1722 }
1723
3c1f6b2d 1724 gpiochip_set_cascaded_irqchip(gpiochip, parent_irq, parent_handler);
d245b3f9 1725}
14250520
LW
1726EXPORT_SYMBOL_GPL(gpiochip_set_chained_irqchip);
1727
d245b3f9
LW
1728/**
1729 * gpiochip_set_nested_irqchip() - connects a nested irqchip to a gpiochip
1730 * @gpiochip: the gpiochip to set the irqchip nested handler to
1731 * @irqchip: the irqchip to nest to the gpiochip
1732 * @parent_irq: the irq number corresponding to the parent IRQ for this
1733 * nested irqchip
1734 */
1735void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip,
1736 struct irq_chip *irqchip,
6f79309a 1737 unsigned int parent_irq)
d245b3f9 1738{
3c1f6b2d 1739 gpiochip_set_cascaded_irqchip(gpiochip, parent_irq, NULL);
d245b3f9
LW
1740}
1741EXPORT_SYMBOL_GPL(gpiochip_set_nested_irqchip);
1742
fdd61a01
LW
1743#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1744
1745/**
1746 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
1747 * to a gpiochip
1748 * @gc: the gpiochip to set the irqchip hierarchical handler to
1749 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
1750 * will then percolate up to the parent
1751 */
1752static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
1753 struct irq_chip *irqchip)
1754{
1755 /* DT will deal with mapping each IRQ as we go along */
1756 if (is_of_node(gc->irq.fwnode))
1757 return;
1758
1759 /*
1760 * This is for legacy and boardfile "irqchip" fwnodes: allocate
1761 * irqs upfront instead of dynamically since we don't have the
1762 * dynamic type of allocation that hardware description languages
1763 * provide. Once all GPIO drivers using board files are gone from
1764 * the kernel we can delete this code, but for a transitional period
1765 * it is necessary to keep this around.
1766 */
1767 if (is_fwnode_irqchip(gc->irq.fwnode)) {
1768 int i;
1769 int ret;
1770
1771 for (i = 0; i < gc->ngpio; i++) {
1772 struct irq_fwspec fwspec;
1773 unsigned int parent_hwirq;
1774 unsigned int parent_type;
1775 struct gpio_irq_chip *girq = &gc->irq;
1776
1777 /*
1778 * We call the child to parent translation function
1779 * only to check if the child IRQ is valid or not.
1780 * Just pick the rising edge type here as that is what
1781 * we likely need to support.
1782 */
1783 ret = girq->child_to_parent_hwirq(gc, i,
1784 IRQ_TYPE_EDGE_RISING,
1785 &parent_hwirq,
1786 &parent_type);
1787 if (ret) {
1788 chip_err(gc, "skip set-up on hwirq %d\n",
1789 i);
1790 continue;
1791 }
1792
1793 fwspec.fwnode = gc->irq.fwnode;
1794 /* This is the hwirq for the GPIO line side of things */
1795 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
1796 /* Just pick something */
1797 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
1798 fwspec.param_count = 2;
1799 ret = __irq_domain_alloc_irqs(gc->irq.domain,
1800 /* just pick something */
1801 -1,
1802 1,
1803 NUMA_NO_NODE,
1804 &fwspec,
1805 false,
1806 NULL);
1807 if (ret < 0) {
1808 chip_err(gc,
1809 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1810 i, parent_hwirq,
1811 ret);
1812 }
1813 }
1814 }
1815
1816 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1817
1818 return;
1819}
1820
1821static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1822 struct irq_fwspec *fwspec,
1823 unsigned long *hwirq,
1824 unsigned int *type)
1825{
1826 /* We support standard DT translation */
1827 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1828 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1829 }
1830
1831 /* This is for board files and others not using DT */
1832 if (is_fwnode_irqchip(fwspec->fwnode)) {
1833 int ret;
1834
1835 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1836 if (ret)
1837 return ret;
1838 WARN_ON(*type == IRQ_TYPE_NONE);
1839 return 0;
1840 }
1841 return -EINVAL;
1842}
1843
1844static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1845 unsigned int irq,
1846 unsigned int nr_irqs,
1847 void *data)
1848{
1849 struct gpio_chip *gc = d->host_data;
1850 irq_hw_number_t hwirq;
1851 unsigned int type = IRQ_TYPE_NONE;
1852 struct irq_fwspec *fwspec = data;
1853 struct irq_fwspec parent_fwspec;
1854 unsigned int parent_hwirq;
1855 unsigned int parent_type;
1856 struct gpio_irq_chip *girq = &gc->irq;
1857 int ret;
1858
1859 /*
1860 * The nr_irqs parameter is always one except for PCI multi-MSI
1861 * so this should not happen.
1862 */
1863 WARN_ON(nr_irqs != 1);
1864
1865 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
1866 if (ret)
1867 return ret;
1868
1869 chip_info(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
1870
1871 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
1872 &parent_hwirq, &parent_type);
1873 if (ret) {
1874 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
1875 return ret;
1876 }
1877 chip_info(gc, "found parent hwirq %u\n", parent_hwirq);
1878
1879 /*
1880 * We set handle_bad_irq because the .set_type() should
1881 * always be invoked and set the right type of handler.
1882 */
1883 irq_domain_set_info(d,
1884 irq,
1885 hwirq,
1886 gc->irq.chip,
1887 gc,
1888 girq->handler,
1889 NULL, NULL);
1890 irq_set_probe(irq);
1891
1892 /*
1893 * Create a IRQ fwspec to send up to the parent irqdomain:
1894 * specify the hwirq we address on the parent and tie it
1895 * all together up the chain.
1896 */
1897 parent_fwspec.fwnode = d->parent->fwnode;
1898 /* This parent only handles asserted level IRQs */
1899 girq->populate_parent_fwspec(gc, &parent_fwspec, parent_hwirq,
1900 parent_type);
1901 chip_info(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
1902 irq, parent_hwirq);
1903 ret = irq_domain_alloc_irqs_parent(d, irq, 1, &parent_fwspec);
1904 if (ret)
1905 chip_err(gc,
1906 "failed to allocate parent hwirq %d for hwirq %lu\n",
1907 parent_hwirq, hwirq);
1908
1909 return ret;
1910}
1911
1912static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *chip,
1913 unsigned int offset)
1914{
1915 return offset;
1916}
1917
1918static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
1919{
1920 ops->activate = gpiochip_irq_domain_activate;
1921 ops->deactivate = gpiochip_irq_domain_deactivate;
1922 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
1923 ops->free = irq_domain_free_irqs_common;
1924
1925 /*
1926 * We only allow overriding the translate() function for
1927 * hierarchical chips, and this should only be done if the user
1928 * really need something other than 1:1 translation.
1929 */
1930 if (!ops->translate)
1931 ops->translate = gpiochip_hierarchy_irq_domain_translate;
1932}
1933
1934static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1935{
1936 if (!gc->irq.child_to_parent_hwirq ||
1937 !gc->irq.fwnode) {
1938 chip_err(gc, "missing irqdomain vital data\n");
1939 return -EINVAL;
1940 }
1941
1942 if (!gc->irq.child_offset_to_irq)
1943 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
1944
1945 if (!gc->irq.populate_parent_fwspec)
1946 gc->irq.populate_parent_fwspec =
1947 gpiochip_populate_parent_fwspec_twocell;
1948
1949 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
1950
1951 gc->irq.domain = irq_domain_create_hierarchy(
1952 gc->irq.parent_domain,
1953 0,
1954 gc->ngpio,
1955 gc->irq.fwnode,
1956 &gc->irq.child_irq_domain_ops,
1957 gc);
1958
1959 if (!gc->irq.domain)
1960 return -ENOMEM;
1961
1962 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
1963
1964 return 0;
1965}
1966
1967static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1968{
1969 return !!gc->irq.parent_domain;
1970}
1971
1972void gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *chip,
1973 struct irq_fwspec *fwspec,
1974 unsigned int parent_hwirq,
1975 unsigned int parent_type)
1976{
1977 fwspec->param_count = 2;
1978 fwspec->param[0] = parent_hwirq;
1979 fwspec->param[1] = parent_type;
1980}
1981EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
1982
1983void gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *chip,
1984 struct irq_fwspec *fwspec,
1985 unsigned int parent_hwirq,
1986 unsigned int parent_type)
1987{
1988 fwspec->param_count = 4;
1989 fwspec->param[0] = 0;
1990 fwspec->param[1] = parent_hwirq;
1991 fwspec->param[2] = 0;
1992 fwspec->param[3] = parent_type;
1993}
1994EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
1995
1996#else
1997
1998static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1999{
2000 return -EINVAL;
2001}
2002
2003static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
2004{
2005 return false;
2006}
2007
2008#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
2009
14250520
LW
2010/**
2011 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
2012 * @d: the irqdomain used by this irqchip
2013 * @irq: the global irq number used by this GPIO irqchip irq
2014 * @hwirq: the local IRQ/GPIO line offset on this gpiochip
2015 *
2016 * This function will set up the mapping for a certain IRQ line on a
2017 * gpiochip by assigning the gpiochip as chip data, and using the irqchip
2018 * stored inside the gpiochip.
2019 */
1b95b4eb
TR
2020int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
2021 irq_hw_number_t hwirq)
14250520
LW
2022{
2023 struct gpio_chip *chip = d->host_data;
d377f56f 2024 int ret = 0;
14250520 2025
dc749a09
GS
2026 if (!gpiochip_irqchip_irq_valid(chip, hwirq))
2027 return -ENXIO;
2028
14250520 2029 irq_set_chip_data(irq, chip);
a0a8bcf4
GS
2030 /*
2031 * This lock class tells lockdep that GPIO irqs are in a different
2032 * category than their parents, so it won't report false recursion.
2033 */
39c3fd58 2034 irq_set_lockdep_class(irq, chip->irq.lock_key, chip->irq.request_key);
c7a0aa59 2035 irq_set_chip_and_handler(irq, chip->irq.chip, chip->irq.handler);
d245b3f9 2036 /* Chips that use nested thread handlers have them marked */
60ed54ca 2037 if (chip->irq.threaded)
1c8732bb 2038 irq_set_nested_thread(irq, 1);
14250520 2039 irq_set_noprobe(irq);
23393d49 2040
e0d89728 2041 if (chip->irq.num_parents == 1)
d377f56f 2042 ret = irq_set_parent(irq, chip->irq.parents[0]);
e0d89728 2043 else if (chip->irq.map)
d377f56f 2044 ret = irq_set_parent(irq, chip->irq.map[hwirq]);
e0d89728 2045
d377f56f
LW
2046 if (ret < 0)
2047 return ret;
e0d89728 2048
1333b90f
LW
2049 /*
2050 * No set-up of the hardware will happen if IRQ_TYPE_NONE
2051 * is passed as default type.
2052 */
3634eeb0
TR
2053 if (chip->irq.default_type != IRQ_TYPE_NONE)
2054 irq_set_irq_type(irq, chip->irq.default_type);
14250520
LW
2055
2056 return 0;
2057}
1b95b4eb 2058EXPORT_SYMBOL_GPL(gpiochip_irq_map);
14250520 2059
1b95b4eb 2060void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
c3626fde 2061{
1c8732bb
LW
2062 struct gpio_chip *chip = d->host_data;
2063
60ed54ca 2064 if (chip->irq.threaded)
1c8732bb 2065 irq_set_nested_thread(irq, 0);
c3626fde
LW
2066 irq_set_chip_and_handler(irq, NULL, NULL);
2067 irq_set_chip_data(irq, NULL);
2068}
1b95b4eb 2069EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
c3626fde 2070
14250520
LW
2071static const struct irq_domain_ops gpiochip_domain_ops = {
2072 .map = gpiochip_irq_map,
c3626fde 2073 .unmap = gpiochip_irq_unmap,
14250520
LW
2074 /* Virtually all GPIO irqchips are twocell:ed */
2075 .xlate = irq_domain_xlate_twocell,
2076};
2077
fdd61a01
LW
2078/*
2079 * TODO: move these activate/deactivate in under the hierarchicial
2080 * irqchip implementation as static once SPMI and SSBI (all external
2081 * users) are phased over.
2082 */
ef74f70e
BM
2083/**
2084 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
2085 * @domain: The IRQ domain used by this IRQ chip
2086 * @data: Outermost irq_data associated with the IRQ
2087 * @reserve: If set, only reserve an interrupt vector instead of assigning one
2088 *
2089 * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
2090 * used as the activate function for the &struct irq_domain_ops. The host_data
2091 * for the IRQ domain must be the &struct gpio_chip.
2092 */
2093int gpiochip_irq_domain_activate(struct irq_domain *domain,
2094 struct irq_data *data, bool reserve)
2095{
2096 struct gpio_chip *chip = domain->host_data;
2097
2098 return gpiochip_lock_as_irq(chip, data->hwirq);
2099}
2100EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
2101
2102/**
2103 * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
2104 * @domain: The IRQ domain used by this IRQ chip
2105 * @data: Outermost irq_data associated with the IRQ
2106 *
2107 * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
2108 * be used as the deactivate function for the &struct irq_domain_ops. The
2109 * host_data for the IRQ domain must be the &struct gpio_chip.
2110 */
2111void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
2112 struct irq_data *data)
2113{
2114 struct gpio_chip *chip = domain->host_data;
2115
2116 return gpiochip_unlock_as_irq(chip, data->hwirq);
2117}
2118EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
2119
4e6b8238 2120static int gpiochip_to_irq(struct gpio_chip *chip, unsigned offset)
14250520 2121{
fdd61a01
LW
2122 struct irq_domain *domain = chip->irq.domain;
2123
4e6b8238
HV
2124 if (!gpiochip_irqchip_irq_valid(chip, offset))
2125 return -ENXIO;
5b76e79c 2126
fdd61a01
LW
2127#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2128 if (irq_domain_is_hierarchy(domain)) {
2129 struct irq_fwspec spec;
2130
2131 spec.fwnode = domain->fwnode;
2132 spec.param_count = 2;
2133 spec.param[0] = chip->irq.child_offset_to_irq(chip, offset);
2134 spec.param[1] = IRQ_TYPE_NONE;
2135
2136 return irq_create_fwspec_mapping(&spec);
2137 }
2138#endif
2139
2140 return irq_create_mapping(domain, offset);
14250520
LW
2141}
2142
14250520
LW
2143static int gpiochip_irq_reqres(struct irq_data *d)
2144{
2145 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
5b76e79c 2146
4e6b8238 2147 return gpiochip_reqres_irq(chip, d->hwirq);
14250520
LW
2148}
2149
2150static void gpiochip_irq_relres(struct irq_data *d)
2151{
2152 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
2153
4e6b8238 2154 gpiochip_relres_irq(chip, d->hwirq);
14250520
LW
2155}
2156
461c1a7d 2157static void gpiochip_irq_enable(struct irq_data *d)
14250520 2158{
461c1a7d 2159 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
e0d89728 2160
461c1a7d
HV
2161 gpiochip_enable_irq(chip, d->hwirq);
2162 if (chip->irq.irq_enable)
2163 chip->irq.irq_enable(d);
2164 else
2165 chip->irq.chip->irq_unmask(d);
2166}
2167
2168static void gpiochip_irq_disable(struct irq_data *d)
2169{
2170 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
2171
2172 if (chip->irq.irq_disable)
2173 chip->irq.irq_disable(d);
2174 else
2175 chip->irq.chip->irq_mask(d);
2176 gpiochip_disable_irq(chip, d->hwirq);
2177}
2178
ca620f2d
HV
2179static void gpiochip_set_irq_hooks(struct gpio_chip *gpiochip)
2180{
2181 struct irq_chip *irqchip = gpiochip->irq.chip;
2182
2183 if (!irqchip->irq_request_resources &&
2184 !irqchip->irq_release_resources) {
2185 irqchip->irq_request_resources = gpiochip_irq_reqres;
2186 irqchip->irq_release_resources = gpiochip_irq_relres;
2187 }
461c1a7d
HV
2188 if (WARN_ON(gpiochip->irq.irq_enable))
2189 return;
171948ea
HV
2190 /* Check if the irqchip already has this hook... */
2191 if (irqchip->irq_enable == gpiochip_irq_enable) {
2192 /*
2193 * ...and if so, give a gentle warning that this is bad
2194 * practice.
2195 */
2196 chip_info(gpiochip,
2197 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
2198 return;
2199 }
461c1a7d
HV
2200 gpiochip->irq.irq_enable = irqchip->irq_enable;
2201 gpiochip->irq.irq_disable = irqchip->irq_disable;
2202 irqchip->irq_enable = gpiochip_irq_enable;
2203 irqchip->irq_disable = gpiochip_irq_disable;
14250520
LW
2204}
2205
e0d89728
TR
2206/**
2207 * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
2208 * @gpiochip: the GPIO chip to add the IRQ chip to
39c3fd58
AL
2209 * @lock_key: lockdep class for IRQ lock
2210 * @request_key: lockdep class for IRQ request
e0d89728 2211 */
959bc7b2 2212static int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
2213 struct lock_class_key *lock_key,
2214 struct lock_class_key *request_key)
e0d89728
TR
2215{
2216 struct irq_chip *irqchip = gpiochip->irq.chip;
fdd61a01 2217 const struct irq_domain_ops *ops = NULL;
e0d89728
TR
2218 struct device_node *np;
2219 unsigned int type;
2220 unsigned int i;
2221
2222 if (!irqchip)
2223 return 0;
2224
2225 if (gpiochip->irq.parent_handler && gpiochip->can_sleep) {
b1911710 2226 chip_err(gpiochip, "you cannot have chained interrupts on a chip that may sleep\n");
e0d89728
TR
2227 return -EINVAL;
2228 }
2229
2230 np = gpiochip->gpiodev->dev.of_node;
2231 type = gpiochip->irq.default_type;
2232
2233 /*
2234 * Specifying a default trigger is a terrible idea if DT or ACPI is
2235 * used to configure the interrupts, as you may end up with
2236 * conflicting triggers. Tell the user, and reset to NONE.
2237 */
2238 if (WARN(np && type != IRQ_TYPE_NONE,
2239 "%s: Ignoring %u default trigger\n", np->full_name, type))
2240 type = IRQ_TYPE_NONE;
2241
2242 if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) {
2243 acpi_handle_warn(ACPI_HANDLE(gpiochip->parent),
2244 "Ignoring %u default trigger\n", type);
2245 type = IRQ_TYPE_NONE;
2246 }
2247
2248 gpiochip->to_irq = gpiochip_to_irq;
2249 gpiochip->irq.default_type = type;
959bc7b2 2250 gpiochip->irq.lock_key = lock_key;
39c3fd58 2251 gpiochip->irq.request_key = request_key;
e0d89728 2252
fdd61a01
LW
2253 /* If a parent irqdomain is provided, let's build a hierarchy */
2254 if (gpiochip_hierarchy_is_hierarchical(gpiochip)) {
2255 int ret = gpiochip_hierarchy_add_domain(gpiochip);
2256 if (ret)
2257 return ret;
2258 } else {
2259 /* Some drivers provide custom irqdomain ops */
2260 if (gpiochip->irq.domain_ops)
2261 ops = gpiochip->irq.domain_ops;
2262
2263 if (!ops)
2264 ops = &gpiochip_domain_ops;
2265 gpiochip->irq.domain = irq_domain_add_simple(np,
2266 gpiochip->ngpio,
2267 gpiochip->irq.first,
2268 ops, gpiochip);
2269 if (!gpiochip->irq.domain)
2270 return -EINVAL;
2271 }
e0d89728 2272
e0d89728
TR
2273 if (gpiochip->irq.parent_handler) {
2274 void *data = gpiochip->irq.parent_handler_data ?: gpiochip;
2275
2276 for (i = 0; i < gpiochip->irq.num_parents; i++) {
2277 /*
2278 * The parent IRQ chip is already using the chip_data
2279 * for this IRQ chip, so our callbacks simply use the
2280 * handler_data.
2281 */
2282 irq_set_chained_handler_and_data(gpiochip->irq.parents[i],
2283 gpiochip->irq.parent_handler,
2284 data);
2285 }
e0d89728
TR
2286 }
2287
ca620f2d
HV
2288 gpiochip_set_irq_hooks(gpiochip);
2289
e0d89728
TR
2290 acpi_gpiochip_request_interrupts(gpiochip);
2291
2292 return 0;
2293}
2294
14250520
LW
2295/**
2296 * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
2297 * @gpiochip: the gpiochip to remove the irqchip from
2298 *
2299 * This is called only from gpiochip_remove()
2300 */
2301static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)
2302{
ca620f2d 2303 struct irq_chip *irqchip = gpiochip->irq.chip;
39e5f096 2304 unsigned int offset;
c3626fde 2305
afa82fab
MW
2306 acpi_gpiochip_free_interrupts(gpiochip);
2307
ca620f2d 2308 if (irqchip && gpiochip->irq.parent_handler) {
39e5f096
TR
2309 struct gpio_irq_chip *irq = &gpiochip->irq;
2310 unsigned int i;
2311
2312 for (i = 0; i < irq->num_parents; i++)
2313 irq_set_chained_handler_and_data(irq->parents[i],
2314 NULL, NULL);
25e4fe92
DES
2315 }
2316
c3626fde 2317 /* Remove all IRQ mappings and delete the domain */
f0fbe7bc 2318 if (gpiochip->irq.domain) {
39e5f096
TR
2319 unsigned int irq;
2320
79b804cb
MW
2321 for (offset = 0; offset < gpiochip->ngpio; offset++) {
2322 if (!gpiochip_irqchip_irq_valid(gpiochip, offset))
2323 continue;
f0fbe7bc
TR
2324
2325 irq = irq_find_mapping(gpiochip->irq.domain, offset);
2326 irq_dispose_mapping(irq);
79b804cb 2327 }
f0fbe7bc
TR
2328
2329 irq_domain_remove(gpiochip->irq.domain);
c3626fde 2330 }
14250520 2331
461c1a7d
HV
2332 if (irqchip) {
2333 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
2334 irqchip->irq_request_resources = NULL;
2335 irqchip->irq_release_resources = NULL;
2336 }
2337 if (irqchip->irq_enable == gpiochip_irq_enable) {
2338 irqchip->irq_enable = gpiochip->irq.irq_enable;
2339 irqchip->irq_disable = gpiochip->irq.irq_disable;
2340 }
14250520 2341 }
461c1a7d
HV
2342 gpiochip->irq.irq_enable = NULL;
2343 gpiochip->irq.irq_disable = NULL;
ca620f2d 2344 gpiochip->irq.chip = NULL;
79b804cb
MW
2345
2346 gpiochip_irqchip_free_valid_mask(gpiochip);
14250520
LW
2347}
2348
2349/**
739e6f59 2350 * gpiochip_irqchip_add_key() - adds an irqchip to a gpiochip
14250520
LW
2351 * @gpiochip: the gpiochip to add the irqchip to
2352 * @irqchip: the irqchip to add to the gpiochip
2353 * @first_irq: if not dynamically assigned, the base (first) IRQ to
2354 * allocate gpiochip irqs from
2355 * @handler: the irq handler to use (often a predefined irq core function)
1333b90f
LW
2356 * @type: the default type for IRQs on this irqchip, pass IRQ_TYPE_NONE
2357 * to have the core avoid setting up any default type in the hardware.
60ed54ca 2358 * @threaded: whether this irqchip uses a nested thread handler
39c3fd58
AL
2359 * @lock_key: lockdep class for IRQ lock
2360 * @request_key: lockdep class for IRQ request
14250520
LW
2361 *
2362 * This function closely associates a certain irqchip with a certain
2363 * gpiochip, providing an irq domain to translate the local IRQs to
2364 * global irqs in the gpiolib core, and making sure that the gpiochip
2365 * is passed as chip data to all related functions. Driver callbacks
09dd5f9e 2366 * need to use gpiochip_get_data() to get their local state containers back
14250520
LW
2367 * from the gpiochip passed as chip data. An irqdomain will be stored
2368 * in the gpiochip that shall be used by the driver to handle IRQ number
2369 * translation. The gpiochip will need to be initialized and registered
2370 * before calling this function.
2371 *
c3626fde
LW
2372 * This function will handle two cell:ed simple IRQs and assumes all
2373 * the pins on the gpiochip can generate a unique IRQ. Everything else
14250520
LW
2374 * need to be open coded.
2375 */
739e6f59
LW
2376int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip,
2377 struct irq_chip *irqchip,
2378 unsigned int first_irq,
2379 irq_flow_handler_t handler,
2380 unsigned int type,
60ed54ca 2381 bool threaded,
39c3fd58
AL
2382 struct lock_class_key *lock_key,
2383 struct lock_class_key *request_key)
14250520
LW
2384{
2385 struct device_node *of_node;
14250520
LW
2386
2387 if (!gpiochip || !irqchip)
2388 return -EINVAL;
2389
58383c78 2390 if (!gpiochip->parent) {
14250520
LW
2391 pr_err("missing gpiochip .dev parent pointer\n");
2392 return -EINVAL;
2393 }
60ed54ca 2394 gpiochip->irq.threaded = threaded;
58383c78 2395 of_node = gpiochip->parent->of_node;
14250520
LW
2396#ifdef CONFIG_OF_GPIO
2397 /*
20a8a968 2398 * If the gpiochip has an assigned OF node this takes precedence
c88402c2
BJZ
2399 * FIXME: get rid of this and use gpiochip->parent->of_node
2400 * everywhere
14250520
LW
2401 */
2402 if (gpiochip->of_node)
2403 of_node = gpiochip->of_node;
2404#endif
332e99d5 2405 /*
0a1e0053 2406 * Specifying a default trigger is a terrible idea if DT or ACPI is
332e99d5
MZ
2407 * used to configure the interrupts, as you may end-up with
2408 * conflicting triggers. Tell the user, and reset to NONE.
2409 */
2410 if (WARN(of_node && type != IRQ_TYPE_NONE,
7eb6ce2f 2411 "%pOF: Ignoring %d default trigger\n", of_node, type))
332e99d5 2412 type = IRQ_TYPE_NONE;
0a1e0053
MW
2413 if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) {
2414 acpi_handle_warn(ACPI_HANDLE(gpiochip->parent),
2415 "Ignoring %d default trigger\n", type);
2416 type = IRQ_TYPE_NONE;
2417 }
332e99d5 2418
da80ff81 2419 gpiochip->irq.chip = irqchip;
c7a0aa59 2420 gpiochip->irq.handler = handler;
3634eeb0 2421 gpiochip->irq.default_type = type;
14250520 2422 gpiochip->to_irq = gpiochip_to_irq;
ca9df053 2423 gpiochip->irq.lock_key = lock_key;
39c3fd58 2424 gpiochip->irq.request_key = request_key;
f0fbe7bc 2425 gpiochip->irq.domain = irq_domain_add_simple(of_node,
14250520
LW
2426 gpiochip->ngpio, first_irq,
2427 &gpiochip_domain_ops, gpiochip);
f0fbe7bc 2428 if (!gpiochip->irq.domain) {
da80ff81 2429 gpiochip->irq.chip = NULL;
14250520
LW
2430 return -EINVAL;
2431 }
8b67a1f0 2432
ca620f2d 2433 gpiochip_set_irq_hooks(gpiochip);
14250520 2434
afa82fab
MW
2435 acpi_gpiochip_request_interrupts(gpiochip);
2436
14250520
LW
2437 return 0;
2438}
739e6f59 2439EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_key);
14250520
LW
2440
2441#else /* CONFIG_GPIOLIB_IRQCHIP */
2442
959bc7b2 2443static inline int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
2444 struct lock_class_key *lock_key,
2445 struct lock_class_key *request_key)
e0d89728
TR
2446{
2447 return 0;
2448}
2449
14250520 2450static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip) {}
79b804cb
MW
2451static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip)
2452{
2453 return 0;
2454}
2455static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip)
2456{ }
14250520
LW
2457
2458#endif /* CONFIG_GPIOLIB_IRQCHIP */
2459
c771c2f4
JG
2460/**
2461 * gpiochip_generic_request() - request the gpio function for a pin
2462 * @chip: the gpiochip owning the GPIO
2463 * @offset: the offset of the GPIO to request for GPIO function
2464 */
2465int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset)
2466{
a9a1d2a7 2467 return pinctrl_gpio_request(chip->gpiodev->base + offset);
c771c2f4
JG
2468}
2469EXPORT_SYMBOL_GPL(gpiochip_generic_request);
2470
2471/**
2472 * gpiochip_generic_free() - free the gpio function from a pin
2473 * @chip: the gpiochip to request the gpio function for
2474 * @offset: the offset of the GPIO to free from GPIO function
2475 */
2476void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset)
2477{
a9a1d2a7 2478 pinctrl_gpio_free(chip->gpiodev->base + offset);
c771c2f4
JG
2479}
2480EXPORT_SYMBOL_GPL(gpiochip_generic_free);
2481
2956b5d9
MW
2482/**
2483 * gpiochip_generic_config() - apply configuration for a pin
2484 * @chip: the gpiochip owning the GPIO
2485 * @offset: the offset of the GPIO to apply the configuration
2486 * @config: the configuration to be applied
2487 */
2488int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset,
2489 unsigned long config)
2490{
2491 return pinctrl_gpio_set_config(chip->gpiodev->base + offset, config);
2492}
2493EXPORT_SYMBOL_GPL(gpiochip_generic_config);
2494
f23f1516 2495#ifdef CONFIG_PINCTRL
165adc9c 2496
586a87e6
CR
2497/**
2498 * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
2499 * @chip: the gpiochip to add the range for
d32651f6 2500 * @pctldev: the pin controller to map to
586a87e6
CR
2501 * @gpio_offset: the start offset in the current gpio_chip number space
2502 * @pin_group: name of the pin group inside the pin controller
973c1714
CL
2503 *
2504 * Calling this function directly from a DeviceTree-supported
2505 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2506 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2507 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
586a87e6
CR
2508 */
2509int gpiochip_add_pingroup_range(struct gpio_chip *chip,
2510 struct pinctrl_dev *pctldev,
2511 unsigned int gpio_offset, const char *pin_group)
2512{
2513 struct gpio_pin_range *pin_range;
fdeb8e15 2514 struct gpio_device *gdev = chip->gpiodev;
586a87e6
CR
2515 int ret;
2516
2517 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
2518 if (!pin_range) {
1a2a99c6 2519 chip_err(chip, "failed to allocate pin ranges\n");
586a87e6
CR
2520 return -ENOMEM;
2521 }
2522
2523 /* Use local offset as range ID */
2524 pin_range->range.id = gpio_offset;
2525 pin_range->range.gc = chip;
2526 pin_range->range.name = chip->label;
fdeb8e15 2527 pin_range->range.base = gdev->base + gpio_offset;
586a87e6
CR
2528 pin_range->pctldev = pctldev;
2529
2530 ret = pinctrl_get_group_pins(pctldev, pin_group,
2531 &pin_range->range.pins,
2532 &pin_range->range.npins);
61c6375d
MN
2533 if (ret < 0) {
2534 kfree(pin_range);
586a87e6 2535 return ret;
61c6375d 2536 }
586a87e6
CR
2537
2538 pinctrl_add_gpio_range(pctldev, &pin_range->range);
2539
1a2a99c6
AS
2540 chip_dbg(chip, "created GPIO range %d->%d ==> %s PINGRP %s\n",
2541 gpio_offset, gpio_offset + pin_range->range.npins - 1,
586a87e6
CR
2542 pinctrl_dev_get_devname(pctldev), pin_group);
2543
20ec3e39 2544 list_add_tail(&pin_range->node, &gdev->pin_ranges);
586a87e6
CR
2545
2546 return 0;
2547}
2548EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
2549
3f0f8670
LW
2550/**
2551 * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
2552 * @chip: the gpiochip to add the range for
950d55f5 2553 * @pinctl_name: the dev_name() of the pin controller to map to
316511c0
LW
2554 * @gpio_offset: the start offset in the current gpio_chip number space
2555 * @pin_offset: the start offset in the pin controller number space
3f0f8670
LW
2556 * @npins: the number of pins from the offset of each pin space (GPIO and
2557 * pin controller) to accumulate in this range
950d55f5
TR
2558 *
2559 * Returns:
2560 * 0 on success, or a negative error-code on failure.
973c1714
CL
2561 *
2562 * Calling this function directly from a DeviceTree-supported
2563 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2564 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2565 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
3f0f8670 2566 */
1e63d7b9 2567int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
316511c0 2568 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 2569 unsigned int npins)
f23f1516
SH
2570{
2571 struct gpio_pin_range *pin_range;
fdeb8e15 2572 struct gpio_device *gdev = chip->gpiodev;
b4d4b1f0 2573 int ret;
f23f1516 2574
3f0f8670 2575 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
f23f1516 2576 if (!pin_range) {
1a2a99c6 2577 chip_err(chip, "failed to allocate pin ranges\n");
1e63d7b9 2578 return -ENOMEM;
f23f1516
SH
2579 }
2580
3f0f8670 2581 /* Use local offset as range ID */
316511c0 2582 pin_range->range.id = gpio_offset;
3f0f8670 2583 pin_range->range.gc = chip;
f23f1516 2584 pin_range->range.name = chip->label;
fdeb8e15 2585 pin_range->range.base = gdev->base + gpio_offset;
316511c0 2586 pin_range->range.pin_base = pin_offset;
f23f1516 2587 pin_range->range.npins = npins;
192c369c 2588 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
f23f1516 2589 &pin_range->range);
8f23ca1a 2590 if (IS_ERR(pin_range->pctldev)) {
b4d4b1f0 2591 ret = PTR_ERR(pin_range->pctldev);
1a2a99c6 2592 chip_err(chip, "could not create pin range\n");
3f0f8670 2593 kfree(pin_range);
b4d4b1f0 2594 return ret;
3f0f8670 2595 }
1a2a99c6
AS
2596 chip_dbg(chip, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
2597 gpio_offset, gpio_offset + npins - 1,
316511c0
LW
2598 pinctl_name,
2599 pin_offset, pin_offset + npins - 1);
f23f1516 2600
20ec3e39 2601 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1e63d7b9
LW
2602
2603 return 0;
f23f1516 2604}
165adc9c 2605EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
f23f1516 2606
3f0f8670
LW
2607/**
2608 * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
2609 * @chip: the chip to remove all the mappings for
2610 */
f23f1516
SH
2611void gpiochip_remove_pin_ranges(struct gpio_chip *chip)
2612{
2613 struct gpio_pin_range *pin_range, *tmp;
20ec3e39 2614 struct gpio_device *gdev = chip->gpiodev;
f23f1516 2615
20ec3e39 2616 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
f23f1516
SH
2617 list_del(&pin_range->node);
2618 pinctrl_remove_gpio_range(pin_range->pctldev,
2619 &pin_range->range);
3f0f8670 2620 kfree(pin_range);
f23f1516
SH
2621 }
2622}
165adc9c
LW
2623EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
2624
2625#endif /* CONFIG_PINCTRL */
f23f1516 2626
d2876d08
DB
2627/* These "optional" allocation calls help prevent drivers from stomping
2628 * on each other, and help provide better diagnostics in debugfs.
2629 * They're called even less than the "set direction" calls.
2630 */
fac9d885 2631static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
d2876d08 2632{
fdeb8e15 2633 struct gpio_chip *chip = desc->gdev->chip;
d377f56f 2634 int ret;
d2876d08 2635 unsigned long flags;
3789f5ac 2636 unsigned offset;
d2876d08 2637
18534df4
MS
2638 if (label) {
2639 label = kstrdup_const(label, GFP_KERNEL);
2640 if (!label)
2641 return -ENOMEM;
2642 }
2643
bcabdef1
AC
2644 spin_lock_irqsave(&gpio_lock, flags);
2645
d2876d08 2646 /* NOTE: gpio_request() can be called in early boot,
35e8bb51 2647 * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
d2876d08
DB
2648 */
2649
2650 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
2651 desc_set_label(desc, label ? : "?");
d377f56f 2652 ret = 0;
438d8908 2653 } else {
18534df4 2654 kfree_const(label);
d377f56f 2655 ret = -EBUSY;
7460db56 2656 goto done;
35e8bb51
DB
2657 }
2658
2659 if (chip->request) {
2660 /* chip->request may sleep */
2661 spin_unlock_irqrestore(&gpio_lock, flags);
3789f5ac
BD
2662 offset = gpio_chip_hwgpio(desc);
2663 if (gpiochip_line_is_valid(chip, offset))
d377f56f 2664 ret = chip->request(chip, offset);
3789f5ac 2665 else
d377f56f 2666 ret = -EINVAL;
35e8bb51
DB
2667 spin_lock_irqsave(&gpio_lock, flags);
2668
d377f56f 2669 if (ret < 0) {
35e8bb51 2670 desc_set_label(desc, NULL);
18534df4 2671 kfree_const(label);
35e8bb51 2672 clear_bit(FLAG_REQUESTED, &desc->flags);
80b0a602 2673 goto done;
35e8bb51 2674 }
438d8908 2675 }
80b0a602
MN
2676 if (chip->get_direction) {
2677 /* chip->get_direction may sleep */
2678 spin_unlock_irqrestore(&gpio_lock, flags);
372e722e 2679 gpiod_get_direction(desc);
80b0a602
MN
2680 spin_lock_irqsave(&gpio_lock, flags);
2681 }
77c2d792
MW
2682done:
2683 spin_unlock_irqrestore(&gpio_lock, flags);
d377f56f 2684 return ret;
77c2d792
MW
2685}
2686
fdeb8e15
LW
2687/*
2688 * This descriptor validation needs to be inserted verbatim into each
2689 * function taking a descriptor, so we need to use a preprocessor
54d77198
LW
2690 * macro to avoid endless duplication. If the desc is NULL it is an
2691 * optional GPIO and calls should just bail out.
fdeb8e15 2692 */
a746a232
RV
2693static int validate_desc(const struct gpio_desc *desc, const char *func)
2694{
2695 if (!desc)
2696 return 0;
2697 if (IS_ERR(desc)) {
2698 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
2699 return PTR_ERR(desc);
2700 }
2701 if (!desc->gdev) {
2702 pr_warn("%s: invalid GPIO (no device)\n", func);
2703 return -EINVAL;
2704 }
2705 if (!desc->gdev->chip) {
2706 dev_warn(&desc->gdev->dev,
2707 "%s: backing chip is gone\n", func);
2708 return 0;
2709 }
2710 return 1;
2711}
2712
fdeb8e15 2713#define VALIDATE_DESC(desc) do { \
a746a232
RV
2714 int __valid = validate_desc(desc, __func__); \
2715 if (__valid <= 0) \
2716 return __valid; \
2717 } while (0)
fdeb8e15
LW
2718
2719#define VALIDATE_DESC_VOID(desc) do { \
a746a232
RV
2720 int __valid = validate_desc(desc, __func__); \
2721 if (__valid <= 0) \
fdeb8e15 2722 return; \
a746a232 2723 } while (0)
fdeb8e15 2724
0eb4c6c2 2725int gpiod_request(struct gpio_desc *desc, const char *label)
77c2d792 2726{
d377f56f 2727 int ret = -EPROBE_DEFER;
fdeb8e15 2728 struct gpio_device *gdev;
77c2d792 2729
fdeb8e15
LW
2730 VALIDATE_DESC(desc);
2731 gdev = desc->gdev;
77c2d792 2732
fdeb8e15 2733 if (try_module_get(gdev->owner)) {
d377f56f
LW
2734 ret = gpiod_request_commit(desc, label);
2735 if (ret < 0)
fdeb8e15 2736 module_put(gdev->owner);
33a68e86
LW
2737 else
2738 get_device(&gdev->dev);
77c2d792
MW
2739 }
2740
d377f56f
LW
2741 if (ret)
2742 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
77c2d792 2743
d377f56f 2744 return ret;
d2876d08 2745}
372e722e 2746
fac9d885 2747static bool gpiod_free_commit(struct gpio_desc *desc)
d2876d08 2748{
77c2d792 2749 bool ret = false;
d2876d08 2750 unsigned long flags;
35e8bb51 2751 struct gpio_chip *chip;
d2876d08 2752
3d599d1c
UKK
2753 might_sleep();
2754
372e722e 2755 gpiod_unexport(desc);
d8f388d8 2756
d2876d08
DB
2757 spin_lock_irqsave(&gpio_lock, flags);
2758
fdeb8e15 2759 chip = desc->gdev->chip;
35e8bb51
DB
2760 if (chip && test_bit(FLAG_REQUESTED, &desc->flags)) {
2761 if (chip->free) {
2762 spin_unlock_irqrestore(&gpio_lock, flags);
9c4ba946 2763 might_sleep_if(chip->can_sleep);
372e722e 2764 chip->free(chip, gpio_chip_hwgpio(desc));
35e8bb51
DB
2765 spin_lock_irqsave(&gpio_lock, flags);
2766 }
18534df4 2767 kfree_const(desc->label);
d2876d08 2768 desc_set_label(desc, NULL);
07697461 2769 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
35e8bb51 2770 clear_bit(FLAG_REQUESTED, &desc->flags);
aca5ce14 2771 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
25553ff0 2772 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
f625d460 2773 clear_bit(FLAG_IS_HOGGED, &desc->flags);
77c2d792
MW
2774 ret = true;
2775 }
d2876d08
DB
2776
2777 spin_unlock_irqrestore(&gpio_lock, flags);
77c2d792
MW
2778 return ret;
2779}
2780
0eb4c6c2 2781void gpiod_free(struct gpio_desc *desc)
77c2d792 2782{
fac9d885 2783 if (desc && desc->gdev && gpiod_free_commit(desc)) {
fdeb8e15 2784 module_put(desc->gdev->owner);
33a68e86
LW
2785 put_device(&desc->gdev->dev);
2786 } else {
77c2d792 2787 WARN_ON(extra_checks);
33a68e86 2788 }
d2876d08 2789}
372e722e 2790
d2876d08
DB
2791/**
2792 * gpiochip_is_requested - return string iff signal was requested
2793 * @chip: controller managing the signal
2794 * @offset: of signal within controller's 0..(ngpio - 1) range
2795 *
2796 * Returns NULL if the GPIO is not currently requested, else a string.
9c8318ff
AC
2797 * The string returned is the label passed to gpio_request(); if none has been
2798 * passed it is a meaningless, non-NULL constant.
d2876d08
DB
2799 *
2800 * This function is for use by GPIO controller drivers. The label can
2801 * help with diagnostics, and knowing that the signal is used as a GPIO
2802 * can help avoid accidentally multiplexing it to another controller.
2803 */
2804const char *gpiochip_is_requested(struct gpio_chip *chip, unsigned offset)
2805{
6c0b4e6c 2806 struct gpio_desc *desc;
d2876d08 2807
48b5953e 2808 if (offset >= chip->ngpio)
d2876d08 2809 return NULL;
6c0b4e6c 2810
1c3cdb18 2811 desc = &chip->gpiodev->descs[offset];
6c0b4e6c 2812
372e722e 2813 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
d2876d08 2814 return NULL;
372e722e 2815 return desc->label;
d2876d08
DB
2816}
2817EXPORT_SYMBOL_GPL(gpiochip_is_requested);
2818
77c2d792
MW
2819/**
2820 * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
950d55f5
TR
2821 * @chip: GPIO chip
2822 * @hwnum: hardware number of the GPIO for which to request the descriptor
77c2d792 2823 * @label: label for the GPIO
5923ea6c
LW
2824 * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
2825 * specify things like line inversion semantics with the machine flags
2826 * such as GPIO_OUT_LOW
2827 * @dflags: descriptor request flags for this GPIO or 0 if default, this
2828 * can be used to specify consumer semantics such as open drain
77c2d792
MW
2829 *
2830 * Function allows GPIO chip drivers to request and use their own GPIO
2831 * descriptors via gpiolib API. Difference to gpiod_request() is that this
2832 * function will not increase reference count of the GPIO chip module. This
2833 * allows the GPIO chip module to be unloaded as needed (we assume that the
2834 * GPIO chip driver handles freeing the GPIOs it has requested).
950d55f5
TR
2835 *
2836 * Returns:
2837 * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
2838 * code on failure.
77c2d792 2839 */
abdc08a3 2840struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum,
21abf103 2841 const char *label,
5923ea6c
LW
2842 enum gpio_lookup_flags lflags,
2843 enum gpiod_flags dflags)
77c2d792 2844{
abdc08a3 2845 struct gpio_desc *desc = gpiochip_get_desc(chip, hwnum);
d377f56f 2846 int ret;
77c2d792 2847
abdc08a3
AC
2848 if (IS_ERR(desc)) {
2849 chip_err(chip, "failed to get GPIO descriptor\n");
2850 return desc;
2851 }
2852
d377f56f
LW
2853 ret = gpiod_request_commit(desc, label);
2854 if (ret < 0)
2855 return ERR_PTR(ret);
77c2d792 2856
d377f56f
LW
2857 ret = gpiod_configure_flags(desc, label, lflags, dflags);
2858 if (ret) {
21abf103
LW
2859 chip_err(chip, "setup of own GPIO %s failed\n", label);
2860 gpiod_free_commit(desc);
d377f56f 2861 return ERR_PTR(ret);
21abf103
LW
2862 }
2863
abdc08a3 2864 return desc;
77c2d792 2865}
f7d4ad98 2866EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
77c2d792
MW
2867
2868/**
2869 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
2870 * @desc: GPIO descriptor to free
2871 *
2872 * Function frees the given GPIO requested previously with
2873 * gpiochip_request_own_desc().
2874 */
2875void gpiochip_free_own_desc(struct gpio_desc *desc)
2876{
2877 if (desc)
fac9d885 2878 gpiod_free_commit(desc);
77c2d792 2879}
f7d4ad98 2880EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
d2876d08 2881
fdeb8e15
LW
2882/*
2883 * Drivers MUST set GPIO direction before making get/set calls. In
d2876d08
DB
2884 * some cases this is done in early boot, before IRQs are enabled.
2885 *
2886 * As a rule these aren't called more than once (except for drivers
2887 * using the open-drain emulation idiom) so these are natural places
2888 * to accumulate extra debugging checks. Note that we can't (yet)
2889 * rely on gpio_request() having been called beforehand.
2890 */
2891
71479789
TP
2892static int gpio_set_config(struct gpio_chip *gc, unsigned offset,
2893 enum pin_config_param mode)
2894{
542f3615
MR
2895 unsigned long config;
2896 unsigned arg;
71479789 2897
542f3615
MR
2898 switch (mode) {
2899 case PIN_CONFIG_BIAS_PULL_DOWN:
2900 case PIN_CONFIG_BIAS_PULL_UP:
2901 arg = 1;
2902 break;
2903
2904 default:
2905 arg = 0;
2906 }
2907
2908 config = PIN_CONF_PACKED(mode, arg);
71479789
TP
2909 return gc->set_config ? gc->set_config(gc, offset, config) : -ENOTSUPP;
2910}
2911
79a9becd
AC
2912/**
2913 * gpiod_direction_input - set the GPIO direction to input
2914 * @desc: GPIO to set to input
2915 *
2916 * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
2917 * be called safely on it.
2918 *
2919 * Return 0 in case of success, else an error code.
2920 */
2921int gpiod_direction_input(struct gpio_desc *desc)
d2876d08 2922{
d2876d08 2923 struct gpio_chip *chip;
d377f56f 2924 int ret = 0;
d2876d08 2925
fdeb8e15
LW
2926 VALIDATE_DESC(desc);
2927 chip = desc->gdev->chip;
bcabdef1 2928
e48d194d
LW
2929 /*
2930 * It is legal to have no .get() and .direction_input() specified if
2931 * the chip is output-only, but you can't specify .direction_input()
2932 * and not support the .get() operation, that doesn't make sense.
2933 */
ae9847f4 2934 if (!chip->get && chip->direction_input) {
6424de5a 2935 gpiod_warn(desc,
e48d194d
LW
2936 "%s: missing get() but have direction_input()\n",
2937 __func__);
be1a4b13
LW
2938 return -EIO;
2939 }
2940
e48d194d
LW
2941 /*
2942 * If we have a .direction_input() callback, things are simple,
2943 * just call it. Else we are some input-only chip so try to check the
2944 * direction (if .get_direction() is supported) else we silently
2945 * assume we are in input mode after this.
2946 */
ae9847f4 2947 if (chip->direction_input) {
d377f56f 2948 ret = chip->direction_input(chip, gpio_chip_hwgpio(desc));
ae9847f4
RRD
2949 } else if (chip->get_direction &&
2950 (chip->get_direction(chip, gpio_chip_hwgpio(desc)) != 1)) {
2951 gpiod_warn(desc,
e48d194d
LW
2952 "%s: missing direction_input() operation and line is output\n",
2953 __func__);
ae9847f4
RRD
2954 return -EIO;
2955 }
d377f56f 2956 if (ret == 0)
d2876d08 2957 clear_bit(FLAG_IS_OUT, &desc->flags);
3f397c21 2958
d449991c
TP
2959 if (test_bit(FLAG_PULL_UP, &desc->flags))
2960 gpio_set_config(chip, gpio_chip_hwgpio(desc),
2961 PIN_CONFIG_BIAS_PULL_UP);
2962 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
2963 gpio_set_config(chip, gpio_chip_hwgpio(desc),
2964 PIN_CONFIG_BIAS_PULL_DOWN);
2965
d377f56f 2966 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
d82da797 2967
d377f56f 2968 return ret;
d2876d08 2969}
79a9becd 2970EXPORT_SYMBOL_GPL(gpiod_direction_input);
372e722e 2971
fac9d885 2972static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
d2876d08 2973{
c663e5f5 2974 struct gpio_chip *gc = desc->gdev->chip;
ad17731d 2975 int val = !!value;
ae9847f4 2976 int ret = 0;
d2876d08 2977
e48d194d
LW
2978 /*
2979 * It's OK not to specify .direction_output() if the gpiochip is
2980 * output-only, but if there is then not even a .set() operation it
2981 * is pretty tricky to drive the output line.
2982 */
ae9847f4 2983 if (!gc->set && !gc->direction_output) {
6424de5a 2984 gpiod_warn(desc,
e48d194d
LW
2985 "%s: missing set() and direction_output() operations\n",
2986 __func__);
be1a4b13
LW
2987 return -EIO;
2988 }
2989
ae9847f4
RRD
2990 if (gc->direction_output) {
2991 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
2992 } else {
e48d194d 2993 /* Check that we are in output mode if we can */
ae9847f4
RRD
2994 if (gc->get_direction &&
2995 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
2996 gpiod_warn(desc,
2997 "%s: missing direction_output() operation\n",
2998 __func__);
2999 return -EIO;
3000 }
e48d194d
LW
3001 /*
3002 * If we can't actively set the direction, we are some
3003 * output-only chip, so just drive the output as desired.
3004 */
ae9847f4
RRD
3005 gc->set(gc, gpio_chip_hwgpio(desc), val);
3006 }
3007
c663e5f5 3008 if (!ret)
d2876d08 3009 set_bit(FLAG_IS_OUT, &desc->flags);
ad17731d 3010 trace_gpio_value(desc_to_gpio(desc), 0, val);
c663e5f5
LW
3011 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
3012 return ret;
d2876d08 3013}
ef70bbe1
PZ
3014
3015/**
3016 * gpiod_direction_output_raw - set the GPIO direction to output
3017 * @desc: GPIO to set to output
3018 * @value: initial output value of the GPIO
3019 *
3020 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
3021 * be called safely on it. The initial value of the output must be specified
3022 * as raw value on the physical line without regard for the ACTIVE_LOW status.
3023 *
3024 * Return 0 in case of success, else an error code.
3025 */
3026int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
3027{
fdeb8e15 3028 VALIDATE_DESC(desc);
fac9d885 3029 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1
PZ
3030}
3031EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
3032
3033/**
90df4fe0 3034 * gpiod_direction_output - set the GPIO direction to output
ef70bbe1
PZ
3035 * @desc: GPIO to set to output
3036 * @value: initial output value of the GPIO
3037 *
3038 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
3039 * be called safely on it. The initial value of the output must be specified
3040 * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
3041 * account.
3042 *
3043 * Return 0 in case of success, else an error code.
3044 */
3045int gpiod_direction_output(struct gpio_desc *desc, int value)
3046{
30322bcf 3047 struct gpio_chip *gc;
02e47980
LW
3048 int ret;
3049
fdeb8e15 3050 VALIDATE_DESC(desc);
ef70bbe1
PZ
3051 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3052 value = !value;
ad17731d
LW
3053 else
3054 value = !!value;
02e47980 3055
4e9439dd
HV
3056 /* GPIOs used for enabled IRQs shall not be set as output */
3057 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
3058 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
02e47980
LW
3059 gpiod_err(desc,
3060 "%s: tried to set a GPIO tied to an IRQ as output\n",
3061 __func__);
3062 return -EIO;
3063 }
3064
30322bcf 3065 gc = desc->gdev->chip;
02e47980
LW
3066 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
3067 /* First see if we can enable open drain in hardware */
71479789
TP
3068 ret = gpio_set_config(gc, gpio_chip_hwgpio(desc),
3069 PIN_CONFIG_DRIVE_OPEN_DRAIN);
02e47980
LW
3070 if (!ret)
3071 goto set_output_value;
3072 /* Emulate open drain by not actively driving the line high */
3073 if (value)
3074 return gpiod_direction_input(desc);
3075 }
3076 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
71479789
TP
3077 ret = gpio_set_config(gc, gpio_chip_hwgpio(desc),
3078 PIN_CONFIG_DRIVE_OPEN_SOURCE);
02e47980
LW
3079 if (!ret)
3080 goto set_output_value;
3081 /* Emulate open source by not actively driving the line low */
3082 if (!value)
3083 return gpiod_direction_input(desc);
3084 } else {
71479789
TP
3085 gpio_set_config(gc, gpio_chip_hwgpio(desc),
3086 PIN_CONFIG_DRIVE_PUSH_PULL);
02e47980
LW
3087 }
3088
3089set_output_value:
fac9d885 3090 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1 3091}
79a9becd 3092EXPORT_SYMBOL_GPL(gpiod_direction_output);
d2876d08 3093
c4b5be98 3094/**
950d55f5
TR
3095 * gpiod_set_debounce - sets @debounce time for a GPIO
3096 * @desc: descriptor of the GPIO for which to set debounce time
3097 * @debounce: debounce time in microseconds
65d87656 3098 *
950d55f5
TR
3099 * Returns:
3100 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
3101 * debounce time.
c4b5be98 3102 */
79a9becd 3103int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce)
c4b5be98 3104{
c4b5be98 3105 struct gpio_chip *chip;
2956b5d9 3106 unsigned long config;
c4b5be98 3107
fdeb8e15
LW
3108 VALIDATE_DESC(desc);
3109 chip = desc->gdev->chip;
2956b5d9 3110 if (!chip->set || !chip->set_config) {
6424de5a 3111 gpiod_dbg(desc,
2956b5d9 3112 "%s: missing set() or set_config() operations\n",
6424de5a 3113 __func__);
65d87656 3114 return -ENOTSUPP;
be1a4b13
LW
3115 }
3116
2956b5d9 3117 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
fa59dd23 3118 return chip->set_config(chip, gpio_chip_hwgpio(desc), config);
c4b5be98 3119}
79a9becd 3120EXPORT_SYMBOL_GPL(gpiod_set_debounce);
372e722e 3121
e10f72bf
AJ
3122/**
3123 * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
3124 * @desc: descriptor of the GPIO for which to configure persistence
3125 * @transitory: True to lose state on suspend or reset, false for persistence
3126 *
3127 * Returns:
3128 * 0 on success, otherwise a negative error code.
3129 */
3130int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
3131{
3132 struct gpio_chip *chip;
3133 unsigned long packed;
3134 int gpio;
3135 int rc;
3136
156dd392 3137 VALIDATE_DESC(desc);
e10f72bf
AJ
3138 /*
3139 * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
3140 * persistence state.
3141 */
3142 if (transitory)
3143 set_bit(FLAG_TRANSITORY, &desc->flags);
3144 else
3145 clear_bit(FLAG_TRANSITORY, &desc->flags);
3146
3147 /* If the driver supports it, set the persistence state now */
3148 chip = desc->gdev->chip;
3149 if (!chip->set_config)
3150 return 0;
3151
3152 packed = pinconf_to_config_packed(PIN_CONFIG_PERSIST_STATE,
3153 !transitory);
3154 gpio = gpio_chip_hwgpio(desc);
fa59dd23 3155 rc = chip->set_config(chip, gpio, packed);
e10f72bf
AJ
3156 if (rc == -ENOTSUPP) {
3157 dev_dbg(&desc->gdev->dev, "Persistence not supported for GPIO %d\n",
3158 gpio);
3159 return 0;
3160 }
3161
3162 return rc;
3163}
3164EXPORT_SYMBOL_GPL(gpiod_set_transitory);
3165
79a9becd
AC
3166/**
3167 * gpiod_is_active_low - test whether a GPIO is active-low or not
3168 * @desc: the gpio descriptor to test
3169 *
3170 * Returns 1 if the GPIO is active-low, 0 otherwise.
3171 */
3172int gpiod_is_active_low(const struct gpio_desc *desc)
372e722e 3173{
fdeb8e15 3174 VALIDATE_DESC(desc);
79a9becd 3175 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
372e722e 3176}
79a9becd 3177EXPORT_SYMBOL_GPL(gpiod_is_active_low);
d2876d08
DB
3178
3179/* I/O calls are only valid after configuration completed; the relevant
3180 * "is this a valid GPIO" error checks should already have been done.
3181 *
3182 * "Get" operations are often inlinable as reading a pin value register,
3183 * and masking the relevant bit in that register.
3184 *
3185 * When "set" operations are inlinable, they involve writing that mask to
3186 * one register to set a low value, or a different register to set it high.
3187 * Otherwise locking is needed, so there may be little value to inlining.
3188 *
3189 *------------------------------------------------------------------------
3190 *
3191 * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
3192 * have requested the GPIO. That can include implicit requesting by
3193 * a direction setting call. Marking a gpio as requested locks its chip
3194 * in memory, guaranteeing that these table lookups need no more locking
3195 * and that gpiochip_remove() will fail.
3196 *
3197 * REVISIT when debugging, consider adding some instrumentation to ensure
3198 * that the GPIO was actually requested.
3199 */
3200
fac9d885 3201static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
d2876d08
DB
3202{
3203 struct gpio_chip *chip;
372e722e 3204 int offset;
e20538b8 3205 int value;
d2876d08 3206
fdeb8e15 3207 chip = desc->gdev->chip;
372e722e 3208 offset = gpio_chip_hwgpio(desc);
e20538b8 3209 value = chip->get ? chip->get(chip, offset) : -EIO;
723a6303 3210 value = value < 0 ? value : !!value;
372e722e 3211 trace_gpio_value(desc_to_gpio(desc), 1, value);
3f397c21 3212 return value;
d2876d08 3213}
372e722e 3214
eec1d566
LW
3215static int gpio_chip_get_multiple(struct gpio_chip *chip,
3216 unsigned long *mask, unsigned long *bits)
3217{
3218 if (chip->get_multiple) {
3219 return chip->get_multiple(chip, mask, bits);
3220 } else if (chip->get) {
3221 int i, value;
3222
3223 for_each_set_bit(i, mask, chip->ngpio) {
3224 value = chip->get(chip, i);
3225 if (value < 0)
3226 return value;
3227 __assign_bit(i, bits, value);
3228 }
3229 return 0;
3230 }
3231 return -EIO;
3232}
3233
3234int gpiod_get_array_value_complex(bool raw, bool can_sleep,
3235 unsigned int array_size,
3236 struct gpio_desc **desc_array,
77588c14 3237 struct gpio_array *array_info,
b9762beb 3238 unsigned long *value_bitmap)
eec1d566 3239{
d377f56f 3240 int ret, i = 0;
b17566a6
JK
3241
3242 /*
3243 * Validate array_info against desc_array and its size.
3244 * It should immediately follow desc_array if both
3245 * have been obtained from the same gpiod_get_array() call.
3246 */
3247 if (array_info && array_info->desc == desc_array &&
3248 array_size <= array_info->size &&
3249 (void *)array_info == desc_array + array_info->size) {
3250 if (!can_sleep)
3251 WARN_ON(array_info->chip->can_sleep);
3252
d377f56f 3253 ret = gpio_chip_get_multiple(array_info->chip,
b17566a6
JK
3254 array_info->get_mask,
3255 value_bitmap);
d377f56f
LW
3256 if (ret)
3257 return ret;
b17566a6
JK
3258
3259 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3260 bitmap_xor(value_bitmap, value_bitmap,
3261 array_info->invert_mask, array_size);
3262
3263 if (bitmap_full(array_info->get_mask, array_size))
3264 return 0;
3265
3266 i = find_first_zero_bit(array_info->get_mask, array_size);
3267 } else {
3268 array_info = NULL;
3269 }
eec1d566
LW
3270
3271 while (i < array_size) {
3272 struct gpio_chip *chip = desc_array[i]->gdev->chip;
3027743f
LA
3273 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
3274 unsigned long *mask, *bits;
eec1d566
LW
3275 int first, j, ret;
3276
3027743f
LA
3277 if (likely(chip->ngpio <= FASTPATH_NGPIO)) {
3278 mask = fastpath;
3279 } else {
3280 mask = kmalloc_array(2 * BITS_TO_LONGS(chip->ngpio),
3281 sizeof(*mask),
3282 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
3283 if (!mask)
3284 return -ENOMEM;
3285 }
3286
3287 bits = mask + BITS_TO_LONGS(chip->ngpio);
3288 bitmap_zero(mask, chip->ngpio);
3289
eec1d566
LW
3290 if (!can_sleep)
3291 WARN_ON(chip->can_sleep);
3292
3293 /* collect all inputs belonging to the same chip */
3294 first = i;
eec1d566
LW
3295 do {
3296 const struct gpio_desc *desc = desc_array[i];
3297 int hwgpio = gpio_chip_hwgpio(desc);
3298
3299 __set_bit(hwgpio, mask);
3300 i++;
b17566a6
JK
3301
3302 if (array_info)
35ae7f96
JK
3303 i = find_next_zero_bit(array_info->get_mask,
3304 array_size, i);
eec1d566
LW
3305 } while ((i < array_size) &&
3306 (desc_array[i]->gdev->chip == chip));
3307
3308 ret = gpio_chip_get_multiple(chip, mask, bits);
3027743f
LA
3309 if (ret) {
3310 if (mask != fastpath)
3311 kfree(mask);
eec1d566 3312 return ret;
3027743f 3313 }
eec1d566 3314
b17566a6 3315 for (j = first; j < i; ) {
eec1d566
LW
3316 const struct gpio_desc *desc = desc_array[j];
3317 int hwgpio = gpio_chip_hwgpio(desc);
3318 int value = test_bit(hwgpio, bits);
3319
3320 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3321 value = !value;
b9762beb 3322 __assign_bit(j, value_bitmap, value);
eec1d566 3323 trace_gpio_value(desc_to_gpio(desc), 1, value);
799d5eb4 3324 j++;
b17566a6
JK
3325
3326 if (array_info)
35ae7f96
JK
3327 j = find_next_zero_bit(array_info->get_mask, i,
3328 j);
eec1d566 3329 }
3027743f
LA
3330
3331 if (mask != fastpath)
3332 kfree(mask);
eec1d566
LW
3333 }
3334 return 0;
3335}
3336
d2876d08 3337/**
79a9becd
AC
3338 * gpiod_get_raw_value() - return a gpio's raw value
3339 * @desc: gpio whose value will be returned
d2876d08 3340 *
79a9becd 3341 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3342 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd 3343 *
827a9b8b 3344 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3345 * complain if the GPIO chip functions potentially sleep.
d2876d08 3346 */
79a9becd 3347int gpiod_get_raw_value(const struct gpio_desc *desc)
d2876d08 3348{
fdeb8e15 3349 VALIDATE_DESC(desc);
3285170f 3350 /* Should be using gpiod_get_raw_value_cansleep() */
fdeb8e15 3351 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3352 return gpiod_get_raw_value_commit(desc);
d2876d08 3353}
79a9becd 3354EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
372e722e 3355
79a9becd
AC
3356/**
3357 * gpiod_get_value() - return a gpio's value
3358 * @desc: gpio whose value will be returned
3359 *
3360 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3361 * account, or negative errno on failure.
79a9becd 3362 *
827a9b8b 3363 * This function can be called from contexts where we cannot sleep, and will
79a9becd
AC
3364 * complain if the GPIO chip functions potentially sleep.
3365 */
3366int gpiod_get_value(const struct gpio_desc *desc)
372e722e 3367{
79a9becd 3368 int value;
fdeb8e15
LW
3369
3370 VALIDATE_DESC(desc);
3285170f 3371 /* Should be using gpiod_get_value_cansleep() */
fdeb8e15 3372 WARN_ON(desc->gdev->chip->can_sleep);
79a9becd 3373
fac9d885 3374 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3375 if (value < 0)
3376 return value;
3377
79a9becd
AC
3378 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3379 value = !value;
3380
3381 return value;
372e722e 3382}
79a9becd 3383EXPORT_SYMBOL_GPL(gpiod_get_value);
d2876d08 3384
eec1d566
LW
3385/**
3386 * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
b9762beb 3387 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3388 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3389 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3390 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3391 *
3392 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3393 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3394 * else an error code.
3395 *
827a9b8b 3396 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
3397 * and it will complain if the GPIO chip functions potentially sleep.
3398 */
3399int gpiod_get_raw_array_value(unsigned int array_size,
b9762beb 3400 struct gpio_desc **desc_array,
77588c14 3401 struct gpio_array *array_info,
b9762beb 3402 unsigned long *value_bitmap)
eec1d566
LW
3403{
3404 if (!desc_array)
3405 return -EINVAL;
3406 return gpiod_get_array_value_complex(true, false, array_size,
77588c14
JK
3407 desc_array, array_info,
3408 value_bitmap);
eec1d566
LW
3409}
3410EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
3411
3412/**
3413 * gpiod_get_array_value() - read values from an array of GPIOs
b9762beb 3414 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3415 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3416 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3417 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3418 *
3419 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3420 * into account. Return 0 in case of success, else an error code.
3421 *
827a9b8b 3422 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
3423 * and it will complain if the GPIO chip functions potentially sleep.
3424 */
3425int gpiod_get_array_value(unsigned int array_size,
b9762beb 3426 struct gpio_desc **desc_array,
77588c14 3427 struct gpio_array *array_info,
b9762beb 3428 unsigned long *value_bitmap)
eec1d566
LW
3429{
3430 if (!desc_array)
3431 return -EINVAL;
3432 return gpiod_get_array_value_complex(false, false, array_size,
77588c14
JK
3433 desc_array, array_info,
3434 value_bitmap);
eec1d566
LW
3435}
3436EXPORT_SYMBOL_GPL(gpiod_get_array_value);
3437
aca5ce14 3438/*
fac9d885 3439 * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
79a9becd 3440 * @desc: gpio descriptor whose state need to be set.
20a8a968 3441 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
aca5ce14 3442 */
fac9d885 3443static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
aca5ce14 3444{
d377f56f 3445 int ret = 0;
fdeb8e15 3446 struct gpio_chip *chip = desc->gdev->chip;
372e722e
AC
3447 int offset = gpio_chip_hwgpio(desc);
3448
aca5ce14 3449 if (value) {
d377f56f
LW
3450 ret = chip->direction_input(chip, offset);
3451 if (!ret)
372e722e 3452 clear_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 3453 } else {
d377f56f
LW
3454 ret = chip->direction_output(chip, offset, 0);
3455 if (!ret)
372e722e 3456 set_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 3457 }
d377f56f
LW
3458 trace_gpio_direction(desc_to_gpio(desc), value, ret);
3459 if (ret < 0)
6424de5a
MB
3460 gpiod_err(desc,
3461 "%s: Error in set_value for open drain err %d\n",
d377f56f 3462 __func__, ret);
aca5ce14
LD
3463}
3464
25553ff0 3465/*
79a9becd
AC
3466 * _gpio_set_open_source_value() - Set the open source gpio's value.
3467 * @desc: gpio descriptor whose state need to be set.
20a8a968 3468 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
25553ff0 3469 */
fac9d885 3470static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
25553ff0 3471{
d377f56f 3472 int ret = 0;
fdeb8e15 3473 struct gpio_chip *chip = desc->gdev->chip;
372e722e
AC
3474 int offset = gpio_chip_hwgpio(desc);
3475
25553ff0 3476 if (value) {
d377f56f
LW
3477 ret = chip->direction_output(chip, offset, 1);
3478 if (!ret)
372e722e 3479 set_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 3480 } else {
d377f56f
LW
3481 ret = chip->direction_input(chip, offset);
3482 if (!ret)
372e722e 3483 clear_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 3484 }
d377f56f
LW
3485 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
3486 if (ret < 0)
6424de5a
MB
3487 gpiod_err(desc,
3488 "%s: Error in set_value for open source err %d\n",
d377f56f 3489 __func__, ret);
25553ff0
LD
3490}
3491
fac9d885 3492static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
d2876d08
DB
3493{
3494 struct gpio_chip *chip;
3495
fdeb8e15 3496 chip = desc->gdev->chip;
372e722e 3497 trace_gpio_value(desc_to_gpio(desc), 0, value);
02e47980 3498 chip->set(chip, gpio_chip_hwgpio(desc), value);
372e722e
AC
3499}
3500
5f424243
RI
3501/*
3502 * set multiple outputs on the same chip;
3503 * use the chip's set_multiple function if available;
3504 * otherwise set the outputs sequentially;
3505 * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
3506 * defines which outputs are to be changed
3507 * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
3508 * defines the values the outputs specified by mask are to be set to
3509 */
3510static void gpio_chip_set_multiple(struct gpio_chip *chip,
3511 unsigned long *mask, unsigned long *bits)
3512{
3513 if (chip->set_multiple) {
3514 chip->set_multiple(chip, mask, bits);
3515 } else {
5e4e6fb3
AS
3516 unsigned int i;
3517
3518 /* set outputs if the corresponding mask bit is set */
3519 for_each_set_bit(i, mask, chip->ngpio)
3520 chip->set(chip, i, test_bit(i, bits));
5f424243
RI
3521 }
3522}
3523
3027743f 3524int gpiod_set_array_value_complex(bool raw, bool can_sleep,
3c940660
GU
3525 unsigned int array_size,
3526 struct gpio_desc **desc_array,
3527 struct gpio_array *array_info,
3528 unsigned long *value_bitmap)
5f424243
RI
3529{
3530 int i = 0;
3531
b17566a6
JK
3532 /*
3533 * Validate array_info against desc_array and its size.
3534 * It should immediately follow desc_array if both
3535 * have been obtained from the same gpiod_get_array() call.
3536 */
3537 if (array_info && array_info->desc == desc_array &&
3538 array_size <= array_info->size &&
3539 (void *)array_info == desc_array + array_info->size) {
3540 if (!can_sleep)
3541 WARN_ON(array_info->chip->can_sleep);
3542
3543 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3544 bitmap_xor(value_bitmap, value_bitmap,
3545 array_info->invert_mask, array_size);
3546
3547 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
3548 value_bitmap);
3549
3550 if (bitmap_full(array_info->set_mask, array_size))
3551 return 0;
3552
3553 i = find_first_zero_bit(array_info->set_mask, array_size);
3554 } else {
3555 array_info = NULL;
3556 }
3557
5f424243 3558 while (i < array_size) {
fdeb8e15 3559 struct gpio_chip *chip = desc_array[i]->gdev->chip;
3027743f
LA
3560 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
3561 unsigned long *mask, *bits;
5f424243
RI
3562 int count = 0;
3563
3027743f
LA
3564 if (likely(chip->ngpio <= FASTPATH_NGPIO)) {
3565 mask = fastpath;
3566 } else {
3567 mask = kmalloc_array(2 * BITS_TO_LONGS(chip->ngpio),
3568 sizeof(*mask),
3569 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
3570 if (!mask)
3571 return -ENOMEM;
3572 }
3573
3574 bits = mask + BITS_TO_LONGS(chip->ngpio);
3575 bitmap_zero(mask, chip->ngpio);
3576
38e003f4 3577 if (!can_sleep)
5f424243 3578 WARN_ON(chip->can_sleep);
38e003f4 3579
5f424243
RI
3580 do {
3581 struct gpio_desc *desc = desc_array[i];
3582 int hwgpio = gpio_chip_hwgpio(desc);
b9762beb 3583 int value = test_bit(i, value_bitmap);
5f424243 3584
b17566a6
JK
3585 /*
3586 * Pins applicable for fast input but not for
3587 * fast output processing may have been already
3588 * inverted inside the fast path, skip them.
3589 */
3590 if (!raw && !(array_info &&
3591 test_bit(i, array_info->invert_mask)) &&
3592 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
5f424243
RI
3593 value = !value;
3594 trace_gpio_value(desc_to_gpio(desc), 0, value);
3595 /*
3596 * collect all normal outputs belonging to the same chip
3597 * open drain and open source outputs are set individually
3598 */
02e47980 3599 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
fac9d885 3600 gpio_set_open_drain_value_commit(desc, value);
02e47980 3601 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
fac9d885 3602 gpio_set_open_source_value_commit(desc, value);
5f424243
RI
3603 } else {
3604 __set_bit(hwgpio, mask);
38e003f4 3605 if (value)
5f424243 3606 __set_bit(hwgpio, bits);
38e003f4 3607 else
5f424243 3608 __clear_bit(hwgpio, bits);
5f424243
RI
3609 count++;
3610 }
3611 i++;
b17566a6
JK
3612
3613 if (array_info)
35ae7f96
JK
3614 i = find_next_zero_bit(array_info->set_mask,
3615 array_size, i);
fdeb8e15
LW
3616 } while ((i < array_size) &&
3617 (desc_array[i]->gdev->chip == chip));
5f424243 3618 /* push collected bits to outputs */
38e003f4 3619 if (count != 0)
5f424243 3620 gpio_chip_set_multiple(chip, mask, bits);
3027743f
LA
3621
3622 if (mask != fastpath)
3623 kfree(mask);
5f424243 3624 }
3027743f 3625 return 0;
5f424243
RI
3626}
3627
d2876d08 3628/**
79a9becd
AC
3629 * gpiod_set_raw_value() - assign a gpio's raw value
3630 * @desc: gpio whose value will be assigned
d2876d08 3631 * @value: value to assign
d2876d08 3632 *
79a9becd
AC
3633 * Set the raw value of the GPIO, i.e. the value of its physical line without
3634 * regard for its ACTIVE_LOW status.
3635 *
827a9b8b 3636 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3637 * complain if the GPIO chip functions potentially sleep.
d2876d08 3638 */
79a9becd 3639void gpiod_set_raw_value(struct gpio_desc *desc, int value)
372e722e 3640{
fdeb8e15 3641 VALIDATE_DESC_VOID(desc);
3285170f 3642 /* Should be using gpiod_set_raw_value_cansleep() */
fdeb8e15 3643 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3644 gpiod_set_raw_value_commit(desc, value);
d2876d08 3645}
79a9becd 3646EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
d2876d08 3647
1e77fc82
GU
3648/**
3649 * gpiod_set_value_nocheck() - set a GPIO line value without checking
3650 * @desc: the descriptor to set the value on
3651 * @value: value to set
3652 *
3653 * This sets the value of a GPIO line backing a descriptor, applying
3654 * different semantic quirks like active low and open drain/source
3655 * handling.
3656 */
3657static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
3658{
3659 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3660 value = !value;
3661 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
3662 gpio_set_open_drain_value_commit(desc, value);
3663 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
3664 gpio_set_open_source_value_commit(desc, value);
3665 else
3666 gpiod_set_raw_value_commit(desc, value);
3667}
3668
d2876d08 3669/**
79a9becd
AC
3670 * gpiod_set_value() - assign a gpio's value
3671 * @desc: gpio whose value will be assigned
3672 * @value: value to assign
3673 *
02e47980
LW
3674 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
3675 * OPEN_DRAIN and OPEN_SOURCE flags into account.
d2876d08 3676 *
827a9b8b 3677 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3678 * complain if the GPIO chip functions potentially sleep.
d2876d08 3679 */
79a9becd 3680void gpiod_set_value(struct gpio_desc *desc, int value)
d2876d08 3681{
fdeb8e15 3682 VALIDATE_DESC_VOID(desc);
3285170f 3683 /* Should be using gpiod_set_value_cansleep() */
fdeb8e15 3684 WARN_ON(desc->gdev->chip->can_sleep);
1e77fc82 3685 gpiod_set_value_nocheck(desc, value);
372e722e 3686}
79a9becd 3687EXPORT_SYMBOL_GPL(gpiod_set_value);
d2876d08 3688
5f424243 3689/**
3fff99bc 3690 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
b9762beb 3691 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3692 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3693 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3694 * @value_bitmap: bitmap of values to assign
5f424243
RI
3695 *
3696 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3697 * without regard for their ACTIVE_LOW status.
3698 *
827a9b8b 3699 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3700 * complain if the GPIO chip functions potentially sleep.
3701 */
3027743f 3702int gpiod_set_raw_array_value(unsigned int array_size,
3c940660
GU
3703 struct gpio_desc **desc_array,
3704 struct gpio_array *array_info,
3705 unsigned long *value_bitmap)
5f424243
RI
3706{
3707 if (!desc_array)
3027743f
LA
3708 return -EINVAL;
3709 return gpiod_set_array_value_complex(true, false, array_size,
77588c14 3710 desc_array, array_info, value_bitmap);
5f424243 3711}
3fff99bc 3712EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
5f424243
RI
3713
3714/**
3fff99bc 3715 * gpiod_set_array_value() - assign values to an array of GPIOs
b9762beb 3716 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3717 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3718 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3719 * @value_bitmap: bitmap of values to assign
5f424243
RI
3720 *
3721 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3722 * into account.
3723 *
827a9b8b 3724 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3725 * complain if the GPIO chip functions potentially sleep.
3726 */
cf9af0d5
GU
3727int gpiod_set_array_value(unsigned int array_size,
3728 struct gpio_desc **desc_array,
3729 struct gpio_array *array_info,
3730 unsigned long *value_bitmap)
5f424243
RI
3731{
3732 if (!desc_array)
cf9af0d5
GU
3733 return -EINVAL;
3734 return gpiod_set_array_value_complex(false, false, array_size,
3735 desc_array, array_info,
3736 value_bitmap);
5f424243 3737}
3fff99bc 3738EXPORT_SYMBOL_GPL(gpiod_set_array_value);
5f424243 3739
d2876d08 3740/**
79a9becd
AC
3741 * gpiod_cansleep() - report whether gpio value access may sleep
3742 * @desc: gpio to check
d2876d08 3743 *
d2876d08 3744 */
79a9becd 3745int gpiod_cansleep(const struct gpio_desc *desc)
372e722e 3746{
fdeb8e15
LW
3747 VALIDATE_DESC(desc);
3748 return desc->gdev->chip->can_sleep;
d2876d08 3749}
79a9becd 3750EXPORT_SYMBOL_GPL(gpiod_cansleep);
d2876d08 3751
90b39402
LW
3752/**
3753 * gpiod_set_consumer_name() - set the consumer name for the descriptor
3754 * @desc: gpio to set the consumer name on
3755 * @name: the new consumer name
3756 */
18534df4 3757int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
90b39402 3758{
18534df4
MS
3759 VALIDATE_DESC(desc);
3760 if (name) {
3761 name = kstrdup_const(name, GFP_KERNEL);
3762 if (!name)
3763 return -ENOMEM;
3764 }
3765
3766 kfree_const(desc->label);
3767 desc_set_label(desc, name);
3768
3769 return 0;
90b39402
LW
3770}
3771EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
3772
0f6d504e 3773/**
79a9becd
AC
3774 * gpiod_to_irq() - return the IRQ corresponding to a GPIO
3775 * @desc: gpio whose IRQ will be returned (already requested)
0f6d504e 3776 *
79a9becd
AC
3777 * Return the IRQ corresponding to the passed GPIO, or an error code in case of
3778 * error.
0f6d504e 3779 */
79a9becd 3780int gpiod_to_irq(const struct gpio_desc *desc)
0f6d504e 3781{
4c37ce86
LW
3782 struct gpio_chip *chip;
3783 int offset;
0f6d504e 3784
79bb71bd
LW
3785 /*
3786 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
3787 * requires this function to not return zero on an invalid descriptor
3788 * but rather a negative error number.
3789 */
bfbbe44d 3790 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
79bb71bd
LW
3791 return -EINVAL;
3792
fdeb8e15 3793 chip = desc->gdev->chip;
372e722e 3794 offset = gpio_chip_hwgpio(desc);
4c37ce86
LW
3795 if (chip->to_irq) {
3796 int retirq = chip->to_irq(chip, offset);
3797
3798 /* Zero means NO_IRQ */
3799 if (!retirq)
3800 return -ENXIO;
3801
3802 return retirq;
3803 }
3804 return -ENXIO;
0f6d504e 3805}
79a9becd 3806EXPORT_SYMBOL_GPL(gpiod_to_irq);
0f6d504e 3807
d468bf9e 3808/**
e3a2e878 3809 * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
d74be6df
AC
3810 * @chip: the chip the GPIO to lock belongs to
3811 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3812 *
3813 * This is used directly by GPIO drivers that want to lock down
f438acdf 3814 * a certain GPIO line to be used for IRQs.
d468bf9e 3815 */
e3a2e878 3816int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset)
372e722e 3817{
9c10280d
LW
3818 struct gpio_desc *desc;
3819
3820 desc = gpiochip_get_desc(chip, offset);
3821 if (IS_ERR(desc))
3822 return PTR_ERR(desc);
3823
60f8339e
LW
3824 /*
3825 * If it's fast: flush the direction setting if something changed
3826 * behind our back
3827 */
3828 if (!chip->can_sleep && chip->get_direction) {
80956790 3829 int dir = gpiod_get_direction(desc);
9c10280d 3830
36b31279
AS
3831 if (dir < 0) {
3832 chip_err(chip, "%s: cannot get GPIO direction\n",
3833 __func__);
3834 return dir;
3835 }
9c10280d 3836 }
d468bf9e 3837
9c10280d 3838 if (test_bit(FLAG_IS_OUT, &desc->flags)) {
d74be6df 3839 chip_err(chip,
b1911710
AS
3840 "%s: tried to flag a GPIO set as output for IRQ\n",
3841 __func__);
d468bf9e
LW
3842 return -EIO;
3843 }
3844
9c10280d 3845 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3846 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3847
3848 /*
3849 * If the consumer has not set up a label (such as when the
3850 * IRQ is referenced from .to_irq()) we set up a label here
3851 * so it is clear this is used as an interrupt.
3852 */
3853 if (!desc->label)
3854 desc_set_label(desc, "interrupt");
3855
d468bf9e 3856 return 0;
372e722e 3857}
e3a2e878 3858EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
d2876d08 3859
d468bf9e 3860/**
e3a2e878 3861 * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
d74be6df
AC
3862 * @chip: the chip the GPIO to lock belongs to
3863 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3864 *
3865 * This is used directly by GPIO drivers that want to indicate
3866 * that a certain GPIO is no longer used exclusively for IRQ.
d2876d08 3867 */
e3a2e878 3868void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset)
d468bf9e 3869{
3940c34a
LW
3870 struct gpio_desc *desc;
3871
3872 desc = gpiochip_get_desc(chip, offset);
3873 if (IS_ERR(desc))
d468bf9e 3874 return;
d2876d08 3875
3940c34a 3876 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3877 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3878
3879 /* If we only had this marking, erase it */
3880 if (desc->label && !strcmp(desc->label, "interrupt"))
3881 desc_set_label(desc, NULL);
d468bf9e 3882}
e3a2e878 3883EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
d468bf9e 3884
4e9439dd
HV
3885void gpiochip_disable_irq(struct gpio_chip *chip, unsigned int offset)
3886{
3887 struct gpio_desc *desc = gpiochip_get_desc(chip, offset);
3888
3889 if (!IS_ERR(desc) &&
3890 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
3891 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3892}
3893EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
3894
3895void gpiochip_enable_irq(struct gpio_chip *chip, unsigned int offset)
3896{
3897 struct gpio_desc *desc = gpiochip_get_desc(chip, offset);
3898
3899 if (!IS_ERR(desc) &&
3900 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
3901 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags));
3902 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3903 }
3904}
3905EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
3906
6cee3821
LW
3907bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset)
3908{
3909 if (offset >= chip->ngpio)
3910 return false;
3911
3912 return test_bit(FLAG_USED_AS_IRQ, &chip->gpiodev->descs[offset].flags);
3913}
3914EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
3915
4e6b8238
HV
3916int gpiochip_reqres_irq(struct gpio_chip *chip, unsigned int offset)
3917{
3918 int ret;
3919
3920 if (!try_module_get(chip->gpiodev->owner))
3921 return -ENODEV;
3922
3923 ret = gpiochip_lock_as_irq(chip, offset);
3924 if (ret) {
3925 chip_err(chip, "unable to lock HW IRQ %u for IRQ\n", offset);
3926 module_put(chip->gpiodev->owner);
3927 return ret;
3928 }
3929 return 0;
3930}
3931EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
3932
3933void gpiochip_relres_irq(struct gpio_chip *chip, unsigned int offset)
3934{
3935 gpiochip_unlock_as_irq(chip, offset);
3936 module_put(chip->gpiodev->owner);
3937}
3938EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
3939
143b65d6
LW
3940bool gpiochip_line_is_open_drain(struct gpio_chip *chip, unsigned int offset)
3941{
3942 if (offset >= chip->ngpio)
3943 return false;
3944
3945 return test_bit(FLAG_OPEN_DRAIN, &chip->gpiodev->descs[offset].flags);
3946}
3947EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
3948
3949bool gpiochip_line_is_open_source(struct gpio_chip *chip, unsigned int offset)
3950{
3951 if (offset >= chip->ngpio)
3952 return false;
3953
3954 return test_bit(FLAG_OPEN_SOURCE, &chip->gpiodev->descs[offset].flags);
3955}
3956EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
3957
05f479bf
CK
3958bool gpiochip_line_is_persistent(struct gpio_chip *chip, unsigned int offset)
3959{
3960 if (offset >= chip->ngpio)
3961 return false;
3962
e10f72bf 3963 return !test_bit(FLAG_TRANSITORY, &chip->gpiodev->descs[offset].flags);
05f479bf
CK
3964}
3965EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
3966
79a9becd
AC
3967/**
3968 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
3969 * @desc: gpio whose value will be returned
3970 *
3971 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3972 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd
AC
3973 *
3974 * This function is to be called from contexts that can sleep.
d2876d08 3975 */
79a9becd 3976int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
d2876d08 3977{
d2876d08 3978 might_sleep_if(extra_checks);
fdeb8e15 3979 VALIDATE_DESC(desc);
fac9d885 3980 return gpiod_get_raw_value_commit(desc);
d2876d08 3981}
79a9becd 3982EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
372e722e 3983
79a9becd
AC
3984/**
3985 * gpiod_get_value_cansleep() - return a gpio's value
3986 * @desc: gpio whose value will be returned
3987 *
3988 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3989 * account, or negative errno on failure.
79a9becd
AC
3990 *
3991 * This function is to be called from contexts that can sleep.
3992 */
3993int gpiod_get_value_cansleep(const struct gpio_desc *desc)
d2876d08 3994{
3f397c21 3995 int value;
d2876d08
DB
3996
3997 might_sleep_if(extra_checks);
fdeb8e15 3998 VALIDATE_DESC(desc);
fac9d885 3999 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
4000 if (value < 0)
4001 return value;
4002
79a9becd
AC
4003 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
4004 value = !value;
4005
3f397c21 4006 return value;
d2876d08 4007}
79a9becd 4008EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
372e722e 4009
eec1d566
LW
4010/**
4011 * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
b9762beb 4012 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 4013 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 4014 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4015 * @value_bitmap: bitmap to store the read values
eec1d566
LW
4016 *
4017 * Read the raw values of the GPIOs, i.e. the values of the physical lines
4018 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
4019 * else an error code.
4020 *
4021 * This function is to be called from contexts that can sleep.
4022 */
4023int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
4024 struct gpio_desc **desc_array,
77588c14 4025 struct gpio_array *array_info,
b9762beb 4026 unsigned long *value_bitmap)
eec1d566
LW
4027{
4028 might_sleep_if(extra_checks);
4029 if (!desc_array)
4030 return -EINVAL;
4031 return gpiod_get_array_value_complex(true, true, array_size,
77588c14
JK
4032 desc_array, array_info,
4033 value_bitmap);
eec1d566
LW
4034}
4035EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
4036
4037/**
4038 * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
b9762beb 4039 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 4040 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 4041 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4042 * @value_bitmap: bitmap to store the read values
eec1d566
LW
4043 *
4044 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
4045 * into account. Return 0 in case of success, else an error code.
4046 *
4047 * This function is to be called from contexts that can sleep.
4048 */
4049int gpiod_get_array_value_cansleep(unsigned int array_size,
4050 struct gpio_desc **desc_array,
77588c14 4051 struct gpio_array *array_info,
b9762beb 4052 unsigned long *value_bitmap)
eec1d566
LW
4053{
4054 might_sleep_if(extra_checks);
4055 if (!desc_array)
4056 return -EINVAL;
4057 return gpiod_get_array_value_complex(false, true, array_size,
77588c14
JK
4058 desc_array, array_info,
4059 value_bitmap);
eec1d566
LW
4060}
4061EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
4062
79a9becd
AC
4063/**
4064 * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
4065 * @desc: gpio whose value will be assigned
4066 * @value: value to assign
4067 *
4068 * Set the raw value of the GPIO, i.e. the value of its physical line without
4069 * regard for its ACTIVE_LOW status.
4070 *
4071 * This function is to be called from contexts that can sleep.
4072 */
4073void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
372e722e 4074{
d2876d08 4075 might_sleep_if(extra_checks);
fdeb8e15 4076 VALIDATE_DESC_VOID(desc);
fac9d885 4077 gpiod_set_raw_value_commit(desc, value);
372e722e 4078}
79a9becd 4079EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
d2876d08 4080
79a9becd
AC
4081/**
4082 * gpiod_set_value_cansleep() - assign a gpio's value
4083 * @desc: gpio whose value will be assigned
4084 * @value: value to assign
4085 *
4086 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
4087 * account
4088 *
4089 * This function is to be called from contexts that can sleep.
4090 */
4091void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
d2876d08 4092{
d2876d08 4093 might_sleep_if(extra_checks);
fdeb8e15 4094 VALIDATE_DESC_VOID(desc);
1e77fc82 4095 gpiod_set_value_nocheck(desc, value);
372e722e 4096}
79a9becd 4097EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
d2876d08 4098
5f424243 4099/**
3fff99bc 4100 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 4101 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4102 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4103 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4104 * @value_bitmap: bitmap of values to assign
5f424243
RI
4105 *
4106 * Set the raw values of the GPIOs, i.e. the values of the physical lines
4107 * without regard for their ACTIVE_LOW status.
4108 *
4109 * This function is to be called from contexts that can sleep.
4110 */
3027743f 4111int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3c940660
GU
4112 struct gpio_desc **desc_array,
4113 struct gpio_array *array_info,
4114 unsigned long *value_bitmap)
5f424243
RI
4115{
4116 might_sleep_if(extra_checks);
4117 if (!desc_array)
3027743f
LA
4118 return -EINVAL;
4119 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
77588c14 4120 array_info, value_bitmap);
5f424243 4121}
3fff99bc 4122EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
5f424243 4123
3946d187
DT
4124/**
4125 * gpiod_add_lookup_tables() - register GPIO device consumers
4126 * @tables: list of tables of consumers to register
4127 * @n: number of tables in the list
4128 */
4129void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
4130{
4131 unsigned int i;
4132
4133 mutex_lock(&gpio_lookup_lock);
4134
4135 for (i = 0; i < n; i++)
4136 list_add_tail(&tables[i]->list, &gpio_lookup_list);
4137
4138 mutex_unlock(&gpio_lookup_lock);
4139}
4140
5f424243 4141/**
3fff99bc 4142 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 4143 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4144 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4145 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4146 * @value_bitmap: bitmap of values to assign
5f424243
RI
4147 *
4148 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
4149 * into account.
4150 *
4151 * This function is to be called from contexts that can sleep.
4152 */
cf9af0d5
GU
4153int gpiod_set_array_value_cansleep(unsigned int array_size,
4154 struct gpio_desc **desc_array,
4155 struct gpio_array *array_info,
4156 unsigned long *value_bitmap)
5f424243
RI
4157{
4158 might_sleep_if(extra_checks);
4159 if (!desc_array)
cf9af0d5
GU
4160 return -EINVAL;
4161 return gpiod_set_array_value_complex(false, true, array_size,
4162 desc_array, array_info,
4163 value_bitmap);
5f424243 4164}
3fff99bc 4165EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
5f424243 4166
bae48da2 4167/**
ad824783
AC
4168 * gpiod_add_lookup_table() - register GPIO device consumers
4169 * @table: table of consumers to register
bae48da2 4170 */
ad824783 4171void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
bae48da2
AC
4172{
4173 mutex_lock(&gpio_lookup_lock);
4174
ad824783 4175 list_add_tail(&table->list, &gpio_lookup_list);
bae48da2
AC
4176
4177 mutex_unlock(&gpio_lookup_lock);
4178}
226b2242 4179EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
bae48da2 4180
be9015ab
SK
4181/**
4182 * gpiod_remove_lookup_table() - unregister GPIO device consumers
4183 * @table: table of consumers to unregister
4184 */
4185void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
4186{
4187 mutex_lock(&gpio_lookup_lock);
4188
4189 list_del(&table->list);
4190
4191 mutex_unlock(&gpio_lookup_lock);
4192}
226b2242 4193EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
be9015ab 4194
a411e81e
BG
4195/**
4196 * gpiod_add_hogs() - register a set of GPIO hogs from machine code
4197 * @hogs: table of gpio hog entries with a zeroed sentinel at the end
4198 */
4199void gpiod_add_hogs(struct gpiod_hog *hogs)
4200{
4201 struct gpio_chip *chip;
4202 struct gpiod_hog *hog;
4203
4204 mutex_lock(&gpio_machine_hogs_mutex);
4205
4206 for (hog = &hogs[0]; hog->chip_label; hog++) {
4207 list_add_tail(&hog->list, &gpio_machine_hogs);
4208
4209 /*
4210 * The chip may have been registered earlier, so check if it
4211 * exists and, if so, try to hog the line now.
4212 */
4213 chip = find_chip_by_name(hog->chip_label);
4214 if (chip)
4215 gpiochip_machine_hog(chip, hog);
4216 }
4217
4218 mutex_unlock(&gpio_machine_hogs_mutex);
4219}
4220EXPORT_SYMBOL_GPL(gpiod_add_hogs);
4221
ad824783 4222static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
bae48da2
AC
4223{
4224 const char *dev_id = dev ? dev_name(dev) : NULL;
ad824783 4225 struct gpiod_lookup_table *table;
bae48da2
AC
4226
4227 mutex_lock(&gpio_lookup_lock);
4228
ad824783
AC
4229 list_for_each_entry(table, &gpio_lookup_list, list) {
4230 if (table->dev_id && dev_id) {
4231 /*
4232 * Valid strings on both ends, must be identical to have
4233 * a match
4234 */
4235 if (!strcmp(table->dev_id, dev_id))
4236 goto found;
4237 } else {
4238 /*
4239 * One of the pointers is NULL, so both must be to have
4240 * a match
4241 */
4242 if (dev_id == table->dev_id)
4243 goto found;
4244 }
4245 }
4246 table = NULL;
bae48da2 4247
ad824783
AC
4248found:
4249 mutex_unlock(&gpio_lookup_lock);
4250 return table;
4251}
bae48da2 4252
ad824783 4253static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
fed7026a 4254 unsigned int idx, unsigned long *flags)
ad824783 4255{
2a3cf6a3 4256 struct gpio_desc *desc = ERR_PTR(-ENOENT);
ad824783
AC
4257 struct gpiod_lookup_table *table;
4258 struct gpiod_lookup *p;
bae48da2 4259
ad824783
AC
4260 table = gpiod_find_lookup_table(dev);
4261 if (!table)
4262 return desc;
bae48da2 4263
ad824783
AC
4264 for (p = &table->table[0]; p->chip_label; p++) {
4265 struct gpio_chip *chip;
bae48da2 4266
ad824783 4267 /* idx must always match exactly */
bae48da2
AC
4268 if (p->idx != idx)
4269 continue;
4270
ad824783
AC
4271 /* If the lookup entry has a con_id, require exact match */
4272 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
4273 continue;
bae48da2 4274
ad824783 4275 chip = find_chip_by_name(p->chip_label);
bae48da2 4276
ad824783 4277 if (!chip) {
8853daf3
JK
4278 /*
4279 * As the lookup table indicates a chip with
4280 * p->chip_label should exist, assume it may
4281 * still appear later and let the interested
4282 * consumer be probed again or let the Deferred
4283 * Probe infrastructure handle the error.
4284 */
4285 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
4286 p->chip_label);
4287 return ERR_PTR(-EPROBE_DEFER);
ad824783 4288 }
bae48da2 4289
ad824783 4290 if (chip->ngpio <= p->chip_hwnum) {
2a3cf6a3
AC
4291 dev_err(dev,
4292 "requested GPIO %d is out of range [0..%d] for chip %s\n",
4293 idx, chip->ngpio, chip->label);
4294 return ERR_PTR(-EINVAL);
bae48da2 4295 }
bae48da2 4296
bb1e88cc 4297 desc = gpiochip_get_desc(chip, p->chip_hwnum);
ad824783 4298 *flags = p->flags;
bae48da2 4299
2a3cf6a3 4300 return desc;
bae48da2
AC
4301 }
4302
bae48da2
AC
4303 return desc;
4304}
4305
66858527
RI
4306static int platform_gpio_count(struct device *dev, const char *con_id)
4307{
4308 struct gpiod_lookup_table *table;
4309 struct gpiod_lookup *p;
4310 unsigned int count = 0;
4311
4312 table = gpiod_find_lookup_table(dev);
4313 if (!table)
4314 return -ENOENT;
4315
4316 for (p = &table->table[0]; p->chip_label; p++) {
4317 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
4318 (!con_id && !p->con_id))
4319 count++;
4320 }
4321 if (!count)
4322 return -ENOENT;
4323
4324 return count;
4325}
4326
4327/**
4328 * gpiod_count - return the number of GPIOs associated with a device / function
4329 * or -ENOENT if no GPIO has been assigned to the requested function
4330 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4331 * @con_id: function within the GPIO consumer
4332 */
4333int gpiod_count(struct device *dev, const char *con_id)
4334{
4335 int count = -ENOENT;
4336
4337 if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node)
f626d6df 4338 count = of_gpio_get_count(dev, con_id);
66858527
RI
4339 else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev))
4340 count = acpi_gpio_count(dev, con_id);
4341
4342 if (count < 0)
4343 count = platform_gpio_count(dev, con_id);
4344
4345 return count;
4346}
4347EXPORT_SYMBOL_GPL(gpiod_count);
4348
bae48da2 4349/**
0879162f 4350 * gpiod_get - obtain a GPIO for a given GPIO function
ad824783 4351 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2 4352 * @con_id: function within the GPIO consumer
39b2bbe3 4353 * @flags: optional GPIO initialization flags
bae48da2
AC
4354 *
4355 * Return the GPIO descriptor corresponding to the function con_id of device
2a3cf6a3 4356 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
20a8a968 4357 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
bae48da2 4358 */
b17d1bf1 4359struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
39b2bbe3 4360 enum gpiod_flags flags)
bae48da2 4361{
39b2bbe3 4362 return gpiod_get_index(dev, con_id, 0, flags);
bae48da2 4363}
b17d1bf1 4364EXPORT_SYMBOL_GPL(gpiod_get);
bae48da2 4365
29a1f233
TR
4366/**
4367 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
4368 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4369 * @con_id: function within the GPIO consumer
39b2bbe3 4370 * @flags: optional GPIO initialization flags
29a1f233
TR
4371 *
4372 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
4373 * the requested function it will return NULL. This is convenient for drivers
4374 * that need to handle optional GPIOs.
4375 */
b17d1bf1 4376struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
39b2bbe3
AC
4377 const char *con_id,
4378 enum gpiod_flags flags)
29a1f233 4379{
39b2bbe3 4380 return gpiod_get_index_optional(dev, con_id, 0, flags);
29a1f233 4381}
b17d1bf1 4382EXPORT_SYMBOL_GPL(gpiod_get_optional);
29a1f233 4383
f625d460
BP
4384
4385/**
4386 * gpiod_configure_flags - helper function to configure a given GPIO
4387 * @desc: gpio whose value will be assigned
4388 * @con_id: function within the GPIO consumer
fed7026a
AS
4389 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4390 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4391 * @dflags: gpiod_flags - optional GPIO initialization flags
4392 *
4393 * Return 0 on success, -ENOENT if no GPIO has been assigned to the
4394 * requested function and/or index, or another IS_ERR() code if an error
4395 * occurred while trying to acquire the GPIO.
4396 */
c29fd9eb 4397int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
85b03b30 4398 unsigned long lflags, enum gpiod_flags dflags)
f625d460 4399{
d377f56f 4400 int ret;
f625d460 4401
85b03b30
JH
4402 if (lflags & GPIO_ACTIVE_LOW)
4403 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
f926dfc1 4404
85b03b30
JH
4405 if (lflags & GPIO_OPEN_DRAIN)
4406 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
f926dfc1
LW
4407 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
4408 /*
4409 * This enforces open drain mode from the consumer side.
4410 * This is necessary for some busses like I2C, but the lookup
4411 * should *REALLY* have specified them as open drain in the
4412 * first place, so print a little warning here.
4413 */
4414 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
4415 gpiod_warn(desc,
4416 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
4417 }
4418
85b03b30
JH
4419 if (lflags & GPIO_OPEN_SOURCE)
4420 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
e10f72bf 4421
d449991c
TP
4422 if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) {
4423 gpiod_err(desc,
4424 "both pull-up and pull-down enabled, invalid configuration\n");
4425 return -EINVAL;
4426 }
4427
4428 if (lflags & GPIO_PULL_UP)
4429 set_bit(FLAG_PULL_UP, &desc->flags);
4430 else if (lflags & GPIO_PULL_DOWN)
4431 set_bit(FLAG_PULL_DOWN, &desc->flags);
4432
d377f56f
LW
4433 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
4434 if (ret < 0)
4435 return ret;
85b03b30 4436
f625d460
BP
4437 /* No particular flag request, return here... */
4438 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
4439 pr_debug("no flags found for %s\n", con_id);
4440 return 0;
4441 }
4442
4443 /* Process flags */
4444 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
d377f56f 4445 ret = gpiod_direction_output(desc,
ad17731d 4446 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
f625d460 4447 else
d377f56f 4448 ret = gpiod_direction_input(desc);
f625d460 4449
d377f56f 4450 return ret;
f625d460
BP
4451}
4452
bae48da2
AC
4453/**
4454 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
fdd6a5fe 4455 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2
AC
4456 * @con_id: function within the GPIO consumer
4457 * @idx: index of the GPIO to obtain in the consumer
39b2bbe3 4458 * @flags: optional GPIO initialization flags
bae48da2
AC
4459 *
4460 * This variant of gpiod_get() allows to access GPIOs other than the first
4461 * defined one for functions that define several GPIOs.
4462 *
2a3cf6a3
AC
4463 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
4464 * requested function and/or index, or another IS_ERR() code if an error
20a8a968 4465 * occurred while trying to acquire the GPIO.
bae48da2 4466 */
b17d1bf1 4467struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
bae48da2 4468 const char *con_id,
39b2bbe3
AC
4469 unsigned int idx,
4470 enum gpiod_flags flags)
bae48da2 4471{
2d6c06f5 4472 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
35c5d7fd 4473 struct gpio_desc *desc = NULL;
d377f56f 4474 int ret;
7d18f0a1
LW
4475 /* Maybe we have a device name, maybe not */
4476 const char *devname = dev ? dev_name(dev) : "?";
bae48da2
AC
4477
4478 dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id);
4479
4d8440b9
RW
4480 if (dev) {
4481 /* Using device tree? */
4482 if (IS_ENABLED(CONFIG_OF) && dev->of_node) {
4483 dev_dbg(dev, "using device tree for GPIO lookup\n");
4484 desc = of_find_gpio(dev, con_id, idx, &lookupflags);
4485 } else if (ACPI_COMPANION(dev)) {
4486 dev_dbg(dev, "using ACPI for GPIO lookup\n");
a31f5c3a 4487 desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags);
4d8440b9 4488 }
35c5d7fd
AC
4489 }
4490
4491 /*
4492 * Either we are not using DT or ACPI, or their lookup did not return
4493 * a result. In that case, use platform lookup as a fallback.
4494 */
2a3cf6a3 4495 if (!desc || desc == ERR_PTR(-ENOENT)) {
43a8785a 4496 dev_dbg(dev, "using lookup tables for GPIO lookup\n");
39b2bbe3 4497 desc = gpiod_find(dev, con_id, idx, &lookupflags);
bae48da2
AC
4498 }
4499
4500 if (IS_ERR(desc)) {
9d5a1f2c 4501 dev_dbg(dev, "No GPIO consumer %s found\n", con_id);
bae48da2
AC
4502 return desc;
4503 }
4504
7d18f0a1
LW
4505 /*
4506 * If a connection label was passed use that, else attempt to use
4507 * the device name as label
4508 */
d377f56f
LW
4509 ret = gpiod_request(desc, con_id ? con_id : devname);
4510 if (ret < 0) {
4511 if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) {
b0ce7b29
LW
4512 /*
4513 * This happens when there are several consumers for
4514 * the same GPIO line: we just return here without
4515 * further initialization. It is a bit if a hack.
4516 * This is necessary to support fixed regulators.
4517 *
4518 * FIXME: Make this more sane and safe.
4519 */
4520 dev_info(dev, "nonexclusive access to GPIO for %s\n",
4521 con_id ? con_id : devname);
4522 return desc;
4523 } else {
d377f56f 4524 return ERR_PTR(ret);
b0ce7b29
LW
4525 }
4526 }
bae48da2 4527
d377f56f 4528 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
6392cca4 4529 if (ret < 0) {
39b2bbe3 4530 dev_dbg(dev, "setup of GPIO %s failed\n", con_id);
6392cca4
LW
4531 gpiod_put(desc);
4532 return ERR_PTR(ret);
4533 }
4534
4535 return desc;
4536}
b17d1bf1 4537EXPORT_SYMBOL_GPL(gpiod_get_index);
6392cca4 4538
40b73183
MW
4539/**
4540 * fwnode_get_named_gpiod - obtain a GPIO from firmware node
4541 * @fwnode: handle of the firmware node
4542 * @propname: name of the firmware property representing the GPIO
6392cca4 4543 * @index: index of the GPIO to obtain for the consumer
a264d10f 4544 * @dflags: GPIO initialization flags
950d55f5 4545 * @label: label to attach to the requested GPIO
40b73183
MW
4546 *
4547 * This function can be used for drivers that get their configuration
6392cca4 4548 * from opaque firmware.
40b73183 4549 *
6392cca4 4550 * The function properly finds the corresponding GPIO using whatever is the
40b73183
MW
4551 * underlying firmware interface and then makes sure that the GPIO
4552 * descriptor is requested before it is returned to the caller.
4553 *
950d55f5 4554 * Returns:
ff21378a 4555 * On successful request the GPIO pin is configured in accordance with
a264d10f
AS
4556 * provided @dflags.
4557 *
40b73183
MW
4558 * In case of error an ERR_PTR() is returned.
4559 */
4560struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
537b94da 4561 const char *propname, int index,
b2987d74
AS
4562 enum gpiod_flags dflags,
4563 const char *label)
40b73183 4564{
2d6c06f5 4565 unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT;
40b73183 4566 struct gpio_desc *desc = ERR_PTR(-ENODEV);
40b73183
MW
4567 int ret;
4568
4569 if (!fwnode)
4570 return ERR_PTR(-EINVAL);
4571
4572 if (is_of_node(fwnode)) {
6392cca4
LW
4573 desc = gpiod_get_from_of_node(to_of_node(fwnode),
4574 propname, index,
4575 dflags,
4576 label);
4577 return desc;
40b73183
MW
4578 } else if (is_acpi_node(fwnode)) {
4579 struct acpi_gpio_info info;
4580
537b94da 4581 desc = acpi_node_get_gpiod(fwnode, propname, index, &info);
6392cca4
LW
4582 if (IS_ERR(desc))
4583 return desc;
40b73183 4584
6392cca4 4585 acpi_gpio_update_gpiod_flags(&dflags, &info);
606be344 4586 acpi_gpio_update_gpiod_lookup_flags(&lflags, &info);
6392cca4 4587 }
40b73183 4588
6392cca4 4589 /* Currently only ACPI takes this path */
b2987d74 4590 ret = gpiod_request(desc, label);
85b03b30
JH
4591 if (ret)
4592 return ERR_PTR(ret);
4593
a264d10f
AS
4594 ret = gpiod_configure_flags(desc, propname, lflags, dflags);
4595 if (ret < 0) {
4596 gpiod_put(desc);
4597 return ERR_PTR(ret);
90b665f6
LP
4598 }
4599
40b73183
MW
4600 return desc;
4601}
4602EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod);
4603
29a1f233
TR
4604/**
4605 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
4606 * function
4607 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4608 * @con_id: function within the GPIO consumer
4609 * @index: index of the GPIO to obtain in the consumer
39b2bbe3 4610 * @flags: optional GPIO initialization flags
29a1f233
TR
4611 *
4612 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
4613 * specified index was assigned to the requested function it will return NULL.
4614 * This is convenient for drivers that need to handle optional GPIOs.
4615 */
b17d1bf1 4616struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
29a1f233 4617 const char *con_id,
39b2bbe3
AC
4618 unsigned int index,
4619 enum gpiod_flags flags)
29a1f233
TR
4620{
4621 struct gpio_desc *desc;
4622
39b2bbe3 4623 desc = gpiod_get_index(dev, con_id, index, flags);
29a1f233
TR
4624 if (IS_ERR(desc)) {
4625 if (PTR_ERR(desc) == -ENOENT)
4626 return NULL;
4627 }
4628
4629 return desc;
4630}
b17d1bf1 4631EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
29a1f233 4632
f625d460
BP
4633/**
4634 * gpiod_hog - Hog the specified GPIO desc given the provided flags
4635 * @desc: gpio whose value will be assigned
4636 * @name: gpio line name
fed7026a
AS
4637 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4638 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4639 * @dflags: gpiod_flags - optional GPIO initialization flags
4640 */
4641int gpiod_hog(struct gpio_desc *desc, const char *name,
4642 unsigned long lflags, enum gpiod_flags dflags)
4643{
4644 struct gpio_chip *chip;
4645 struct gpio_desc *local_desc;
4646 int hwnum;
d377f56f 4647 int ret;
f625d460
BP
4648
4649 chip = gpiod_to_chip(desc);
4650 hwnum = gpio_chip_hwgpio(desc);
4651
5923ea6c
LW
4652 local_desc = gpiochip_request_own_desc(chip, hwnum, name,
4653 lflags, dflags);
f625d460 4654 if (IS_ERR(local_desc)) {
d377f56f 4655 ret = PTR_ERR(local_desc);
c31a571d 4656 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
d377f56f
LW
4657 name, chip->label, hwnum, ret);
4658 return ret;
f625d460
BP
4659 }
4660
f625d460
BP
4661 /* Mark GPIO as hogged so it can be identified and removed later */
4662 set_bit(FLAG_IS_HOGGED, &desc->flags);
4663
4664 pr_info("GPIO line %d (%s) hogged as %s%s\n",
4665 desc_to_gpio(desc), name,
4666 (dflags&GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
4667 (dflags&GPIOD_FLAGS_BIT_DIR_OUT) ?
4668 (dflags&GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low":"");
4669
4670 return 0;
4671}
4672
4673/**
4674 * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
4675 * @chip: gpio chip to act on
f625d460
BP
4676 */
4677static void gpiochip_free_hogs(struct gpio_chip *chip)
4678{
4679 int id;
4680
4681 for (id = 0; id < chip->ngpio; id++) {
1c3cdb18
LW
4682 if (test_bit(FLAG_IS_HOGGED, &chip->gpiodev->descs[id].flags))
4683 gpiochip_free_own_desc(&chip->gpiodev->descs[id]);
f625d460
BP
4684 }
4685}
4686
66858527
RI
4687/**
4688 * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
4689 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4690 * @con_id: function within the GPIO consumer
4691 * @flags: optional GPIO initialization flags
4692 *
4693 * This function acquires all the GPIOs defined under a given function.
4694 *
4695 * Return a struct gpio_descs containing an array of descriptors, -ENOENT if
4696 * no GPIO has been assigned to the requested function, or another IS_ERR()
4697 * code if an error occurred while trying to acquire the GPIOs.
4698 */
4699struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
4700 const char *con_id,
4701 enum gpiod_flags flags)
4702{
4703 struct gpio_desc *desc;
4704 struct gpio_descs *descs;
bf9346f5
JK
4705 struct gpio_array *array_info = NULL;
4706 struct gpio_chip *chip;
4707 int count, bitmap_size;
66858527
RI
4708
4709 count = gpiod_count(dev, con_id);
4710 if (count < 0)
4711 return ERR_PTR(count);
4712
acafe7e3 4713 descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL);
66858527
RI
4714 if (!descs)
4715 return ERR_PTR(-ENOMEM);
4716
4717 for (descs->ndescs = 0; descs->ndescs < count; ) {
4718 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
4719 if (IS_ERR(desc)) {
4720 gpiod_put_array(descs);
4721 return ERR_CAST(desc);
4722 }
bf9346f5 4723
66858527 4724 descs->desc[descs->ndescs] = desc;
bf9346f5
JK
4725
4726 chip = gpiod_to_chip(desc);
4727 /*
c4c958aa
JK
4728 * If pin hardware number of array member 0 is also 0, select
4729 * its chip as a candidate for fast bitmap processing path.
bf9346f5 4730 */
c4c958aa 4731 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
bf9346f5
JK
4732 struct gpio_descs *array;
4733
4734 bitmap_size = BITS_TO_LONGS(chip->ngpio > count ?
4735 chip->ngpio : count);
4736
4737 array = kzalloc(struct_size(descs, desc, count) +
4738 struct_size(array_info, invert_mask,
4739 3 * bitmap_size), GFP_KERNEL);
4740 if (!array) {
4741 gpiod_put_array(descs);
4742 return ERR_PTR(-ENOMEM);
4743 }
4744
4745 memcpy(array, descs,
4746 struct_size(descs, desc, descs->ndescs + 1));
4747 kfree(descs);
4748
4749 descs = array;
4750 array_info = (void *)(descs->desc + count);
4751 array_info->get_mask = array_info->invert_mask +
4752 bitmap_size;
4753 array_info->set_mask = array_info->get_mask +
4754 bitmap_size;
4755
4756 array_info->desc = descs->desc;
4757 array_info->size = count;
4758 array_info->chip = chip;
4759 bitmap_set(array_info->get_mask, descs->ndescs,
4760 count - descs->ndescs);
4761 bitmap_set(array_info->set_mask, descs->ndescs,
4762 count - descs->ndescs);
4763 descs->info = array_info;
4764 }
c4c958aa
JK
4765 /* Unmark array members which don't belong to the 'fast' chip */
4766 if (array_info && array_info->chip != chip) {
bf9346f5
JK
4767 __clear_bit(descs->ndescs, array_info->get_mask);
4768 __clear_bit(descs->ndescs, array_info->set_mask);
c4c958aa
JK
4769 }
4770 /*
4771 * Detect array members which belong to the 'fast' chip
4772 * but their pins are not in hardware order.
4773 */
4774 else if (array_info &&
4775 gpio_chip_hwgpio(desc) != descs->ndescs) {
4776 /*
4777 * Don't use fast path if all array members processed so
4778 * far belong to the same chip as this one but its pin
4779 * hardware number is different from its array index.
4780 */
4781 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
4782 array_info = NULL;
4783 } else {
4784 __clear_bit(descs->ndescs,
4785 array_info->get_mask);
4786 __clear_bit(descs->ndescs,
4787 array_info->set_mask);
4788 }
bf9346f5
JK
4789 } else if (array_info) {
4790 /* Exclude open drain or open source from fast output */
4791 if (gpiochip_line_is_open_drain(chip, descs->ndescs) ||
4792 gpiochip_line_is_open_source(chip, descs->ndescs))
4793 __clear_bit(descs->ndescs,
4794 array_info->set_mask);
4795 /* Identify 'fast' pins which require invertion */
4796 if (gpiod_is_active_low(desc))
4797 __set_bit(descs->ndescs,
4798 array_info->invert_mask);
4799 }
4800
66858527
RI
4801 descs->ndescs++;
4802 }
bf9346f5
JK
4803 if (array_info)
4804 dev_dbg(dev,
4805 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
4806 array_info->chip->label, array_info->size,
4807 *array_info->get_mask, *array_info->set_mask,
4808 *array_info->invert_mask);
66858527
RI
4809 return descs;
4810}
4811EXPORT_SYMBOL_GPL(gpiod_get_array);
4812
4813/**
4814 * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
4815 * function
4816 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4817 * @con_id: function within the GPIO consumer
4818 * @flags: optional GPIO initialization flags
4819 *
4820 * This is equivalent to gpiod_get_array(), except that when no GPIO was
4821 * assigned to the requested function it will return NULL.
4822 */
4823struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
4824 const char *con_id,
4825 enum gpiod_flags flags)
4826{
4827 struct gpio_descs *descs;
4828
4829 descs = gpiod_get_array(dev, con_id, flags);
4830 if (IS_ERR(descs) && (PTR_ERR(descs) == -ENOENT))
4831 return NULL;
4832
4833 return descs;
4834}
4835EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
4836
bae48da2
AC
4837/**
4838 * gpiod_put - dispose of a GPIO descriptor
4839 * @desc: GPIO descriptor to dispose of
4840 *
4841 * No descriptor can be used after gpiod_put() has been called on it.
4842 */
4843void gpiod_put(struct gpio_desc *desc)
4844{
1d7765ba
AS
4845 if (desc)
4846 gpiod_free(desc);
372e722e 4847}
bae48da2 4848EXPORT_SYMBOL_GPL(gpiod_put);
d2876d08 4849
66858527
RI
4850/**
4851 * gpiod_put_array - dispose of multiple GPIO descriptors
4852 * @descs: struct gpio_descs containing an array of descriptors
4853 */
4854void gpiod_put_array(struct gpio_descs *descs)
4855{
4856 unsigned int i;
4857
4858 for (i = 0; i < descs->ndescs; i++)
4859 gpiod_put(descs->desc[i]);
4860
4861 kfree(descs);
4862}
4863EXPORT_SYMBOL_GPL(gpiod_put_array);
4864
3c702e99
LW
4865static int __init gpiolib_dev_init(void)
4866{
4867 int ret;
4868
4869 /* Register GPIO sysfs bus */
b1911710 4870 ret = bus_register(&gpio_bus_type);
3c702e99
LW
4871 if (ret < 0) {
4872 pr_err("gpiolib: could not register GPIO bus type\n");
4873 return ret;
4874 }
4875
4876 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpiochip");
4877 if (ret < 0) {
4878 pr_err("gpiolib: failed to allocate char dev region\n");
4879 bus_unregister(&gpio_bus_type);
159f3cd9
GR
4880 } else {
4881 gpiolib_initialized = true;
4882 gpiochip_setup_devs();
3c702e99
LW
4883 }
4884 return ret;
4885}
4886core_initcall(gpiolib_dev_init);
4887
d2876d08
DB
4888#ifdef CONFIG_DEBUG_FS
4889
fdeb8e15 4890static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
d2876d08
DB
4891{
4892 unsigned i;
fdeb8e15
LW
4893 struct gpio_chip *chip = gdev->chip;
4894 unsigned gpio = gdev->base;
4895 struct gpio_desc *gdesc = &gdev->descs[0];
90fd2270
LW
4896 bool is_out;
4897 bool is_irq;
4898 bool active_low;
d2876d08 4899
fdeb8e15 4900 for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) {
ced433e2
MP
4901 if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) {
4902 if (gdesc->name) {
4903 seq_printf(s, " gpio-%-3d (%-20.20s)\n",
4904 gpio, gdesc->name);
4905 }
d2876d08 4906 continue;
ced433e2 4907 }
d2876d08 4908
372e722e 4909 gpiod_get_direction(gdesc);
d2876d08 4910 is_out = test_bit(FLAG_IS_OUT, &gdesc->flags);
d468bf9e 4911 is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags);
90fd2270
LW
4912 active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags);
4913 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s",
ced433e2 4914 gpio, gdesc->name ? gdesc->name : "", gdesc->label,
d2876d08 4915 is_out ? "out" : "in ",
1c22a252 4916 chip->get ? (chip->get(chip, i) ? "hi" : "lo") : "? ",
90fd2270
LW
4917 is_irq ? "IRQ " : "",
4918 active_low ? "ACTIVE LOW" : "");
d2876d08
DB
4919 seq_printf(s, "\n");
4920 }
4921}
4922
f9c4a31f 4923static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
d2876d08 4924{
362432ae 4925 unsigned long flags;
ff2b1359 4926 struct gpio_device *gdev = NULL;
cb1650d4 4927 loff_t index = *pos;
d2876d08 4928
f9c4a31f 4929 s->private = "";
d2876d08 4930
362432ae 4931 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4932 list_for_each_entry(gdev, &gpio_devices, list)
362432ae
GL
4933 if (index-- == 0) {
4934 spin_unlock_irqrestore(&gpio_lock, flags);
ff2b1359 4935 return gdev;
f9c4a31f 4936 }
362432ae 4937 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f 4938
cb1650d4 4939 return NULL;
f9c4a31f
TR
4940}
4941
4942static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
4943{
362432ae 4944 unsigned long flags;
ff2b1359 4945 struct gpio_device *gdev = v;
f9c4a31f
TR
4946 void *ret = NULL;
4947
362432ae 4948 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4949 if (list_is_last(&gdev->list, &gpio_devices))
cb1650d4
AC
4950 ret = NULL;
4951 else
ff2b1359 4952 ret = list_entry(gdev->list.next, struct gpio_device, list);
362432ae 4953 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f
TR
4954
4955 s->private = "\n";
4956 ++*pos;
4957
4958 return ret;
4959}
4960
4961static void gpiolib_seq_stop(struct seq_file *s, void *v)
4962{
4963}
4964
4965static int gpiolib_seq_show(struct seq_file *s, void *v)
4966{
ff2b1359
LW
4967 struct gpio_device *gdev = v;
4968 struct gpio_chip *chip = gdev->chip;
4969 struct device *parent;
4970
4971 if (!chip) {
4972 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
4973 dev_name(&gdev->dev));
4974 return 0;
4975 }
f9c4a31f 4976
ff2b1359
LW
4977 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
4978 dev_name(&gdev->dev),
fdeb8e15 4979 gdev->base, gdev->base + gdev->ngpio - 1);
ff2b1359
LW
4980 parent = chip->parent;
4981 if (parent)
4982 seq_printf(s, ", parent: %s/%s",
4983 parent->bus ? parent->bus->name : "no-bus",
4984 dev_name(parent));
f9c4a31f
TR
4985 if (chip->label)
4986 seq_printf(s, ", %s", chip->label);
4987 if (chip->can_sleep)
4988 seq_printf(s, ", can sleep");
4989 seq_printf(s, ":\n");
4990
4991 if (chip->dbg_show)
4992 chip->dbg_show(s, chip);
4993 else
fdeb8e15 4994 gpiolib_dbg_show(s, gdev);
f9c4a31f 4995
d2876d08
DB
4996 return 0;
4997}
4998
f9c4a31f
TR
4999static const struct seq_operations gpiolib_seq_ops = {
5000 .start = gpiolib_seq_start,
5001 .next = gpiolib_seq_next,
5002 .stop = gpiolib_seq_stop,
5003 .show = gpiolib_seq_show,
5004};
5005
d2876d08
DB
5006static int gpiolib_open(struct inode *inode, struct file *file)
5007{
f9c4a31f 5008 return seq_open(file, &gpiolib_seq_ops);
d2876d08
DB
5009}
5010
828c0950 5011static const struct file_operations gpiolib_operations = {
f9c4a31f 5012 .owner = THIS_MODULE,
d2876d08
DB
5013 .open = gpiolib_open,
5014 .read = seq_read,
5015 .llseek = seq_lseek,
f9c4a31f 5016 .release = seq_release,
d2876d08
DB
5017};
5018
5019static int __init gpiolib_debugfs_init(void)
5020{
5021 /* /sys/kernel/debug/gpio */
acc68b0e
GKH
5022 debugfs_create_file("gpio", S_IFREG | S_IRUGO, NULL, NULL,
5023 &gpiolib_operations);
d2876d08
DB
5024 return 0;
5025}
5026subsys_initcall(gpiolib_debugfs_init);
5027
5028#endif /* DEBUG_FS */