Commit | Line | Data |
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dae5f0af | 1 | // SPDX-License-Identifier: GPL-2.0 |
c47d9e1b | 2 | |
923a654c | 3 | #include <linux/bitmap.h> |
d2876d08 DB |
4 | #include <linux/kernel.h> |
5 | #include <linux/module.h> | |
ff77c352 | 6 | #include <linux/interrupt.h> |
d2876d08 DB |
7 | #include <linux/irq.h> |
8 | #include <linux/spinlock.h> | |
1a989d0f | 9 | #include <linux/list.h> |
d8f388d8 DB |
10 | #include <linux/device.h> |
11 | #include <linux/err.h> | |
12 | #include <linux/debugfs.h> | |
13 | #include <linux/seq_file.h> | |
14 | #include <linux/gpio.h> | |
ff77c352 | 15 | #include <linux/idr.h> |
5a0e3ad6 | 16 | #include <linux/slab.h> |
7b199811 | 17 | #include <linux/acpi.h> |
53e7cac3 | 18 | #include <linux/gpio/driver.h> |
0a6d3158 | 19 | #include <linux/gpio/machine.h> |
c771c2f4 | 20 | #include <linux/pinctrl/consumer.h> |
3c702e99 | 21 | #include <linux/fs.h> |
8b92e17e | 22 | #include <linux/compat.h> |
953b956a | 23 | #include <linux/file.h> |
3c702e99 | 24 | #include <uapi/linux/gpio.h> |
d2876d08 | 25 | |
664e3e5a | 26 | #include "gpiolib.h" |
f626d6df | 27 | #include "gpiolib-of.h" |
77cb907a | 28 | #include "gpiolib-acpi.h" |
925ca369 | 29 | #include "gpiolib-cdev.h" |
ef087d8e | 30 | #include "gpiolib-sysfs.h" |
664e3e5a | 31 | |
3f397c21 UKK |
32 | #define CREATE_TRACE_POINTS |
33 | #include <trace/events/gpio.h> | |
d2876d08 | 34 | |
79a9becd | 35 | /* Implementation infrastructure for GPIO interfaces. |
d2876d08 | 36 | * |
79a9becd AC |
37 | * The GPIO programming interface allows for inlining speed-critical |
38 | * get/set operations for common cases, so that access to SOC-integrated | |
39 | * GPIOs can sometimes cost only an instruction or two per bit. | |
d2876d08 DB |
40 | */ |
41 | ||
42 | ||
43 | /* When debugging, extend minimal trust to callers and platform code. | |
44 | * Also emit diagnostic messages that may help initial bringup, when | |
45 | * board setup or driver bugs are most common. | |
46 | * | |
47 | * Otherwise, minimize overhead in what may be bitbanging codepaths. | |
48 | */ | |
49 | #ifdef DEBUG | |
50 | #define extra_checks 1 | |
51 | #else | |
52 | #define extra_checks 0 | |
53 | #endif | |
54 | ||
ff2b1359 LW |
55 | /* Device and char device-related information */ |
56 | static DEFINE_IDA(gpio_ida); | |
3c702e99 LW |
57 | static dev_t gpio_devt; |
58 | #define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */ | |
59 | static struct bus_type gpio_bus_type = { | |
60 | .name = "gpio", | |
61 | }; | |
ff2b1359 | 62 | |
3027743f LA |
63 | /* |
64 | * Number of GPIOs to use for the fast path in set array | |
65 | */ | |
66 | #define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT | |
67 | ||
d2876d08 DB |
68 | /* gpio_lock prevents conflicts during gpio_desc[] table updates. |
69 | * While any GPIO is requested, its gpio_chip is not removable; | |
70 | * each GPIO's "requested" flag serves as a lock and refcount. | |
71 | */ | |
0eb4c6c2 | 72 | DEFINE_SPINLOCK(gpio_lock); |
d2876d08 | 73 | |
bae48da2 AC |
74 | static DEFINE_MUTEX(gpio_lookup_lock); |
75 | static LIST_HEAD(gpio_lookup_list); | |
ff2b1359 | 76 | LIST_HEAD(gpio_devices); |
6d86750c | 77 | |
a411e81e BG |
78 | static DEFINE_MUTEX(gpio_machine_hogs_mutex); |
79 | static LIST_HEAD(gpio_machine_hogs); | |
80 | ||
a0b66a73 LW |
81 | static void gpiochip_free_hogs(struct gpio_chip *gc); |
82 | static int gpiochip_add_irqchip(struct gpio_chip *gc, | |
39c3fd58 AL |
83 | struct lock_class_key *lock_key, |
84 | struct lock_class_key *request_key); | |
a0b66a73 LW |
85 | static void gpiochip_irqchip_remove(struct gpio_chip *gc); |
86 | static int gpiochip_irqchip_init_hw(struct gpio_chip *gc); | |
87 | static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc); | |
88 | static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc); | |
6d86750c | 89 | |
159f3cd9 | 90 | static bool gpiolib_initialized; |
6d86750c | 91 | |
d2876d08 DB |
92 | static inline void desc_set_label(struct gpio_desc *d, const char *label) |
93 | { | |
d2876d08 | 94 | d->label = label; |
d2876d08 DB |
95 | } |
96 | ||
372e722e | 97 | /** |
950d55f5 TR |
98 | * gpio_to_desc - Convert a GPIO number to its descriptor |
99 | * @gpio: global GPIO number | |
100 | * | |
101 | * Returns: | |
102 | * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO | |
103 | * with the given number exists in the system. | |
372e722e | 104 | */ |
79a9becd | 105 | struct gpio_desc *gpio_to_desc(unsigned gpio) |
372e722e | 106 | { |
ff2b1359 | 107 | struct gpio_device *gdev; |
14e85c0e AC |
108 | unsigned long flags; |
109 | ||
110 | spin_lock_irqsave(&gpio_lock, flags); | |
111 | ||
ff2b1359 | 112 | list_for_each_entry(gdev, &gpio_devices, list) { |
fdeb8e15 LW |
113 | if (gdev->base <= gpio && |
114 | gdev->base + gdev->ngpio > gpio) { | |
14e85c0e | 115 | spin_unlock_irqrestore(&gpio_lock, flags); |
fdeb8e15 | 116 | return &gdev->descs[gpio - gdev->base]; |
14e85c0e AC |
117 | } |
118 | } | |
119 | ||
120 | spin_unlock_irqrestore(&gpio_lock, flags); | |
121 | ||
0e9a5edf | 122 | if (!gpio_is_valid(gpio)) |
c47d9e1b | 123 | pr_warn("invalid GPIO %d\n", gpio); |
0e9a5edf | 124 | |
14e85c0e | 125 | return NULL; |
372e722e | 126 | } |
79a9becd | 127 | EXPORT_SYMBOL_GPL(gpio_to_desc); |
372e722e | 128 | |
d468bf9e | 129 | /** |
950d55f5 TR |
130 | * gpiochip_get_desc - get the GPIO descriptor corresponding to the given |
131 | * hardware number for this chip | |
a0b66a73 | 132 | * @gc: GPIO chip |
950d55f5 TR |
133 | * @hwnum: hardware number of the GPIO for this chip |
134 | * | |
135 | * Returns: | |
35c6cfb4 | 136 | * A pointer to the GPIO descriptor or ``ERR_PTR(-EINVAL)`` if no GPIO exists |
950d55f5 | 137 | * in the given chip for the specified hardware number. |
d468bf9e | 138 | */ |
a0b66a73 | 139 | struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc, |
06863620 | 140 | unsigned int hwnum) |
d468bf9e | 141 | { |
a0b66a73 | 142 | struct gpio_device *gdev = gc->gpiodev; |
fdeb8e15 LW |
143 | |
144 | if (hwnum >= gdev->ngpio) | |
b7d0a28a | 145 | return ERR_PTR(-EINVAL); |
d468bf9e | 146 | |
fdeb8e15 | 147 | return &gdev->descs[hwnum]; |
d468bf9e | 148 | } |
97795420 | 149 | EXPORT_SYMBOL_GPL(gpiochip_get_desc); |
372e722e AC |
150 | |
151 | /** | |
950d55f5 TR |
152 | * desc_to_gpio - convert a GPIO descriptor to the integer namespace |
153 | * @desc: GPIO descriptor | |
154 | * | |
372e722e | 155 | * This should disappear in the future but is needed since we still |
950d55f5 TR |
156 | * use GPIO numbers for error messages and sysfs nodes. |
157 | * | |
158 | * Returns: | |
159 | * The global GPIO number for the GPIO specified by its descriptor. | |
372e722e | 160 | */ |
79a9becd | 161 | int desc_to_gpio(const struct gpio_desc *desc) |
372e722e | 162 | { |
fdeb8e15 | 163 | return desc->gdev->base + (desc - &desc->gdev->descs[0]); |
372e722e | 164 | } |
79a9becd | 165 | EXPORT_SYMBOL_GPL(desc_to_gpio); |
372e722e AC |
166 | |
167 | ||
79a9becd AC |
168 | /** |
169 | * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs | |
170 | * @desc: descriptor to return the chip of | |
171 | */ | |
172 | struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc) | |
372e722e | 173 | { |
dd3b9a44 | 174 | if (!desc || !desc->gdev) |
fdeb8e15 LW |
175 | return NULL; |
176 | return desc->gdev->chip; | |
372e722e | 177 | } |
79a9becd | 178 | EXPORT_SYMBOL_GPL(gpiod_to_chip); |
d2876d08 | 179 | |
8d0aab2f AV |
180 | /* dynamic allocation of GPIOs, e.g. on a hotplugged device */ |
181 | static int gpiochip_find_base(int ngpio) | |
182 | { | |
ff2b1359 | 183 | struct gpio_device *gdev; |
83cabe33 | 184 | int base = ARCH_NR_GPIOS - ngpio; |
8d0aab2f | 185 | |
ff2b1359 | 186 | list_for_each_entry_reverse(gdev, &gpio_devices, list) { |
83cabe33 | 187 | /* found a free space? */ |
fdeb8e15 | 188 | if (gdev->base + gdev->ngpio <= base) |
83cabe33 AC |
189 | break; |
190 | else | |
191 | /* nope, check the space right before the chip */ | |
fdeb8e15 | 192 | base = gdev->base - ngpio; |
8d0aab2f AV |
193 | } |
194 | ||
83cabe33 | 195 | if (gpio_is_valid(base)) { |
8d0aab2f | 196 | pr_debug("%s: found new base at %d\n", __func__, base); |
83cabe33 AC |
197 | return base; |
198 | } else { | |
199 | pr_err("%s: cannot find free range\n", __func__); | |
200 | return -ENOSPC; | |
169b6a7a | 201 | } |
169b6a7a AV |
202 | } |
203 | ||
79a9becd AC |
204 | /** |
205 | * gpiod_get_direction - return the current direction of a GPIO | |
206 | * @desc: GPIO to get the direction of | |
207 | * | |
94fc7309 | 208 | * Returns 0 for output, 1 for input, or an error code in case of error. |
79a9becd AC |
209 | * |
210 | * This function may sleep if gpiod_cansleep() is true. | |
211 | */ | |
8e53b0f1 | 212 | int gpiod_get_direction(struct gpio_desc *desc) |
80b0a602 | 213 | { |
a0b66a73 | 214 | struct gpio_chip *gc; |
13daf489 | 215 | unsigned int offset; |
d377f56f | 216 | int ret; |
80b0a602 | 217 | |
a0b66a73 | 218 | gc = gpiod_to_chip(desc); |
372e722e | 219 | offset = gpio_chip_hwgpio(desc); |
80b0a602 | 220 | |
256efaea RK |
221 | /* |
222 | * Open drain emulation using input mode may incorrectly report | |
223 | * input here, fix that up. | |
224 | */ | |
225 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && | |
226 | test_bit(FLAG_IS_OUT, &desc->flags)) | |
227 | return 0; | |
228 | ||
a0b66a73 | 229 | if (!gc->get_direction) |
d0121b85 | 230 | return -ENOTSUPP; |
80b0a602 | 231 | |
a0b66a73 | 232 | ret = gc->get_direction(gc, offset); |
4fc5bfeb AS |
233 | if (ret < 0) |
234 | return ret; | |
235 | ||
236 | /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */ | |
237 | if (ret > 0) | |
d377f56f | 238 | ret = 1; |
4fc5bfeb AS |
239 | |
240 | assign_bit(FLAG_IS_OUT, &desc->flags, !ret); | |
241 | ||
d377f56f | 242 | return ret; |
80b0a602 | 243 | } |
79a9becd | 244 | EXPORT_SYMBOL_GPL(gpiod_get_direction); |
80b0a602 | 245 | |
1a989d0f AC |
246 | /* |
247 | * Add a new chip to the global chips list, keeping the list of chips sorted | |
ef7c7553 | 248 | * by range(means [base, base + ngpio - 1]) order. |
1a989d0f AC |
249 | * |
250 | * Return -EBUSY if the new chip overlaps with some other chip's integer | |
251 | * space. | |
252 | */ | |
ff2b1359 | 253 | static int gpiodev_add_to_list(struct gpio_device *gdev) |
1a989d0f | 254 | { |
a961f9b4 | 255 | struct gpio_device *prev, *next; |
1a989d0f | 256 | |
ff2b1359 | 257 | if (list_empty(&gpio_devices)) { |
a961f9b4 | 258 | /* initial entry in list */ |
ff2b1359 | 259 | list_add_tail(&gdev->list, &gpio_devices); |
e28ecca6 | 260 | return 0; |
1a989d0f AC |
261 | } |
262 | ||
a961f9b4 BJZ |
263 | next = list_entry(gpio_devices.next, struct gpio_device, list); |
264 | if (gdev->base + gdev->ngpio <= next->base) { | |
265 | /* add before first entry */ | |
266 | list_add(&gdev->list, &gpio_devices); | |
267 | return 0; | |
1a989d0f AC |
268 | } |
269 | ||
a961f9b4 BJZ |
270 | prev = list_entry(gpio_devices.prev, struct gpio_device, list); |
271 | if (prev->base + prev->ngpio <= gdev->base) { | |
272 | /* add behind last entry */ | |
273 | list_add_tail(&gdev->list, &gpio_devices); | |
96098df1 | 274 | return 0; |
1a989d0f AC |
275 | } |
276 | ||
a961f9b4 BJZ |
277 | list_for_each_entry_safe(prev, next, &gpio_devices, list) { |
278 | /* at the end of the list */ | |
279 | if (&next->list == &gpio_devices) | |
280 | break; | |
1a989d0f | 281 | |
a961f9b4 BJZ |
282 | /* add between prev and next */ |
283 | if (prev->base + prev->ngpio <= gdev->base | |
284 | && gdev->base + gdev->ngpio <= next->base) { | |
285 | list_add(&gdev->list, &prev->list); | |
286 | return 0; | |
287 | } | |
288 | } | |
289 | ||
290 | dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n"); | |
291 | return -EBUSY; | |
1a989d0f AC |
292 | } |
293 | ||
950d55f5 | 294 | /* |
f881bab0 | 295 | * Convert a GPIO name to its descriptor |
582838ea GU |
296 | * Note that there is no guarantee that GPIO names are globally unique! |
297 | * Hence this function will return, if it exists, a reference to the first GPIO | |
298 | * line found that matches the given name. | |
f881bab0 LW |
299 | */ |
300 | static struct gpio_desc *gpio_name_to_desc(const char * const name) | |
301 | { | |
ff2b1359 | 302 | struct gpio_device *gdev; |
f881bab0 LW |
303 | unsigned long flags; |
304 | ||
ee203bbd MM |
305 | if (!name) |
306 | return NULL; | |
307 | ||
f881bab0 LW |
308 | spin_lock_irqsave(&gpio_lock, flags); |
309 | ||
ff2b1359 | 310 | list_for_each_entry(gdev, &gpio_devices, list) { |
f881bab0 LW |
311 | int i; |
312 | ||
fdeb8e15 LW |
313 | for (i = 0; i != gdev->ngpio; ++i) { |
314 | struct gpio_desc *desc = &gdev->descs[i]; | |
f881bab0 | 315 | |
ee203bbd | 316 | if (!desc->name) |
f881bab0 LW |
317 | continue; |
318 | ||
fdeb8e15 | 319 | if (!strcmp(desc->name, name)) { |
f881bab0 | 320 | spin_unlock_irqrestore(&gpio_lock, flags); |
fdeb8e15 | 321 | return desc; |
f881bab0 LW |
322 | } |
323 | } | |
324 | } | |
325 | ||
326 | spin_unlock_irqrestore(&gpio_lock, flags); | |
327 | ||
328 | return NULL; | |
329 | } | |
330 | ||
5f3ca732 | 331 | /* |
582838ea GU |
332 | * Take the names from gc->names and assign them to their GPIO descriptors. |
333 | * Warn if a name is already used for a GPIO line on a different GPIO chip. | |
5f3ca732 | 334 | * |
582838ea GU |
335 | * Note that: |
336 | * 1. Non-unique names are still accepted, | |
337 | * 2. Name collisions within the same GPIO chip are not reported. | |
5f3ca732 MP |
338 | */ |
339 | static int gpiochip_set_desc_names(struct gpio_chip *gc) | |
340 | { | |
fdeb8e15 | 341 | struct gpio_device *gdev = gc->gpiodev; |
5f3ca732 MP |
342 | int i; |
343 | ||
5f3ca732 MP |
344 | /* First check all names if they are unique */ |
345 | for (i = 0; i != gc->ngpio; ++i) { | |
346 | struct gpio_desc *gpio; | |
347 | ||
348 | gpio = gpio_name_to_desc(gc->names[i]); | |
f881bab0 | 349 | if (gpio) |
fdeb8e15 | 350 | dev_warn(&gdev->dev, |
34ffd85d | 351 | "Detected name collision for GPIO name '%s'\n", |
f881bab0 | 352 | gc->names[i]); |
5f3ca732 MP |
353 | } |
354 | ||
355 | /* Then add all names to the GPIO descriptors */ | |
356 | for (i = 0; i != gc->ngpio; ++i) | |
fdeb8e15 | 357 | gdev->descs[i].name = gc->names[i]; |
5f3ca732 MP |
358 | |
359 | return 0; | |
360 | } | |
361 | ||
32fc5aa2 BG |
362 | /* |
363 | * devprop_gpiochip_set_names - Set GPIO line names using device properties | |
364 | * @chip: GPIO chip whose lines should be named, if possible | |
365 | * | |
366 | * Looks for device property "gpio-line-names" and if it exists assigns | |
367 | * GPIO line names for the chip. The memory allocated for the assigned | |
368 | * names belong to the underlying software node and should not be released | |
369 | * by the caller. | |
370 | */ | |
371 | static int devprop_gpiochip_set_names(struct gpio_chip *chip) | |
372 | { | |
373 | struct gpio_device *gdev = chip->gpiodev; | |
374 | struct device *dev = chip->parent; | |
375 | const char **names; | |
376 | int ret, i; | |
377 | int count; | |
378 | ||
587823d3 BG |
379 | /* GPIO chip may not have a parent device whose properties we inspect. */ |
380 | if (!dev) | |
381 | return 0; | |
382 | ||
32fc5aa2 BG |
383 | count = device_property_string_array_count(dev, "gpio-line-names"); |
384 | if (count < 0) | |
385 | return 0; | |
386 | ||
387 | if (count > gdev->ngpio) { | |
388 | dev_warn(&gdev->dev, "gpio-line-names is length %d but should be at most length %d", | |
389 | count, gdev->ngpio); | |
390 | count = gdev->ngpio; | |
391 | } | |
392 | ||
393 | names = kcalloc(count, sizeof(*names), GFP_KERNEL); | |
394 | if (!names) | |
395 | return -ENOMEM; | |
396 | ||
397 | ret = device_property_read_string_array(dev, "gpio-line-names", | |
398 | names, count); | |
399 | if (ret < 0) { | |
400 | dev_warn(&gdev->dev, "failed to read GPIO line names\n"); | |
401 | kfree(names); | |
402 | return ret; | |
403 | } | |
404 | ||
405 | for (i = 0; i < count; i++) | |
406 | gdev->descs[i].name = names[i]; | |
407 | ||
408 | kfree(names); | |
409 | ||
410 | return 0; | |
411 | } | |
412 | ||
a0b66a73 | 413 | static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc) |
e4371f6e SB |
414 | { |
415 | unsigned long *p; | |
416 | ||
a0b66a73 | 417 | p = bitmap_alloc(gc->ngpio, GFP_KERNEL); |
e4371f6e SB |
418 | if (!p) |
419 | return NULL; | |
420 | ||
421 | /* Assume by default all GPIOs are valid */ | |
a0b66a73 | 422 | bitmap_fill(p, gc->ngpio); |
e4371f6e SB |
423 | |
424 | return p; | |
425 | } | |
426 | ||
f626d6df | 427 | static int gpiochip_alloc_valid_mask(struct gpio_chip *gc) |
726cb3ba | 428 | { |
eb1e8bd6 | 429 | if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask)) |
726cb3ba SB |
430 | return 0; |
431 | ||
f626d6df LW |
432 | gc->valid_mask = gpiochip_allocate_mask(gc); |
433 | if (!gc->valid_mask) | |
726cb3ba SB |
434 | return -ENOMEM; |
435 | ||
436 | return 0; | |
437 | } | |
438 | ||
c9fc5aff | 439 | static int gpiochip_init_valid_mask(struct gpio_chip *gc) |
f8ec92a9 | 440 | { |
c9fc5aff LW |
441 | if (gc->init_valid_mask) |
442 | return gc->init_valid_mask(gc, | |
443 | gc->valid_mask, | |
444 | gc->ngpio); | |
f8ec92a9 RRD |
445 | |
446 | return 0; | |
447 | } | |
448 | ||
a0b66a73 | 449 | static void gpiochip_free_valid_mask(struct gpio_chip *gc) |
726cb3ba | 450 | { |
a0b66a73 LW |
451 | bitmap_free(gc->valid_mask); |
452 | gc->valid_mask = NULL; | |
726cb3ba SB |
453 | } |
454 | ||
b056ca1c AS |
455 | static int gpiochip_add_pin_ranges(struct gpio_chip *gc) |
456 | { | |
457 | if (gc->add_pin_ranges) | |
458 | return gc->add_pin_ranges(gc); | |
459 | ||
460 | return 0; | |
461 | } | |
462 | ||
a0b66a73 | 463 | bool gpiochip_line_is_valid(const struct gpio_chip *gc, |
726cb3ba SB |
464 | unsigned int offset) |
465 | { | |
466 | /* No mask means all valid */ | |
a0b66a73 | 467 | if (likely(!gc->valid_mask)) |
726cb3ba | 468 | return true; |
a0b66a73 | 469 | return test_bit(offset, gc->valid_mask); |
726cb3ba SB |
470 | } |
471 | EXPORT_SYMBOL_GPL(gpiochip_line_is_valid); | |
472 | ||
ff2b1359 LW |
473 | static void gpiodevice_release(struct device *dev) |
474 | { | |
475 | struct gpio_device *gdev = dev_get_drvdata(dev); | |
476 | ||
477 | list_del(&gdev->list); | |
8d4a85b6 | 478 | ida_free(&gpio_ida, gdev->id); |
fcf273e5 | 479 | kfree_const(gdev->label); |
476e2fc5 | 480 | kfree(gdev->descs); |
9efd9e69 | 481 | kfree(gdev); |
ff2b1359 LW |
482 | } |
483 | ||
1f5eb8b1 KG |
484 | #ifdef CONFIG_GPIO_CDEV |
485 | #define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt)) | |
486 | #define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev)) | |
487 | #else | |
488 | /* | |
489 | * gpiolib_cdev_register() indirectly calls device_add(), which is still | |
490 | * required even when cdev is not selected. | |
491 | */ | |
492 | #define gcdev_register(gdev, devt) device_add(&(gdev)->dev) | |
493 | #define gcdev_unregister(gdev) device_del(&(gdev)->dev) | |
494 | #endif | |
495 | ||
159f3cd9 GR |
496 | static int gpiochip_setup_dev(struct gpio_device *gdev) |
497 | { | |
d377f56f | 498 | int ret; |
159f3cd9 | 499 | |
1f5eb8b1 | 500 | ret = gcdev_register(gdev, gpio_devt); |
d377f56f LW |
501 | if (ret) |
502 | return ret; | |
111379dc | 503 | |
d377f56f LW |
504 | ret = gpiochip_sysfs_register(gdev); |
505 | if (ret) | |
159f3cd9 GR |
506 | goto err_remove_device; |
507 | ||
508 | /* From this point, the .release() function cleans up gpio_device */ | |
509 | gdev->dev.release = gpiodevice_release; | |
262b9011 GU |
510 | dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base, |
511 | gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic"); | |
159f3cd9 GR |
512 | |
513 | return 0; | |
514 | ||
515 | err_remove_device: | |
1f5eb8b1 | 516 | gcdev_unregister(gdev); |
d377f56f | 517 | return ret; |
159f3cd9 GR |
518 | } |
519 | ||
a0b66a73 | 520 | static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog) |
a411e81e BG |
521 | { |
522 | struct gpio_desc *desc; | |
523 | int rv; | |
524 | ||
a0b66a73 | 525 | desc = gpiochip_get_desc(gc, hog->chip_hwnum); |
a411e81e | 526 | if (IS_ERR(desc)) { |
262b9011 GU |
527 | chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__, |
528 | PTR_ERR(desc)); | |
a411e81e BG |
529 | return; |
530 | } | |
531 | ||
ba3efdff | 532 | if (test_bit(FLAG_IS_HOGGED, &desc->flags)) |
a411e81e BG |
533 | return; |
534 | ||
535 | rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags); | |
536 | if (rv) | |
262b9011 GU |
537 | gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n", |
538 | __func__, gc->label, hog->chip_hwnum, rv); | |
a411e81e BG |
539 | } |
540 | ||
a0b66a73 | 541 | static void machine_gpiochip_add(struct gpio_chip *gc) |
a411e81e BG |
542 | { |
543 | struct gpiod_hog *hog; | |
544 | ||
545 | mutex_lock(&gpio_machine_hogs_mutex); | |
546 | ||
547 | list_for_each_entry(hog, &gpio_machine_hogs, list) { | |
a0b66a73 LW |
548 | if (!strcmp(gc->label, hog->chip_label)) |
549 | gpiochip_machine_hog(gc, hog); | |
a411e81e BG |
550 | } |
551 | ||
552 | mutex_unlock(&gpio_machine_hogs_mutex); | |
553 | } | |
554 | ||
159f3cd9 GR |
555 | static void gpiochip_setup_devs(void) |
556 | { | |
557 | struct gpio_device *gdev; | |
d377f56f | 558 | int ret; |
159f3cd9 GR |
559 | |
560 | list_for_each_entry(gdev, &gpio_devices, list) { | |
d377f56f LW |
561 | ret = gpiochip_setup_dev(gdev); |
562 | if (ret) | |
262b9011 GU |
563 | dev_err(&gdev->dev, |
564 | "Failed to initialize gpio device (%d)\n", ret); | |
159f3cd9 GR |
565 | } |
566 | } | |
567 | ||
a0b66a73 | 568 | int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data, |
39c3fd58 AL |
569 | struct lock_class_key *lock_key, |
570 | struct lock_class_key *request_key) | |
d2876d08 DB |
571 | { |
572 | unsigned long flags; | |
d377f56f | 573 | int ret = 0; |
ff2b1359 | 574 | unsigned i; |
a0b66a73 | 575 | int base = gc->base; |
ff2b1359 | 576 | struct gpio_device *gdev; |
d2876d08 | 577 | |
ff2b1359 LW |
578 | /* |
579 | * First: allocate and populate the internal stat container, and | |
580 | * set up the struct device. | |
581 | */ | |
969f07b4 | 582 | gdev = kzalloc(sizeof(*gdev), GFP_KERNEL); |
ff2b1359 | 583 | if (!gdev) |
14e85c0e | 584 | return -ENOMEM; |
3c702e99 | 585 | gdev->dev.bus = &gpio_bus_type; |
a0b66a73 LW |
586 | gdev->chip = gc; |
587 | gc->gpiodev = gdev; | |
588 | if (gc->parent) { | |
589 | gdev->dev.parent = gc->parent; | |
590 | gdev->dev.of_node = gc->parent->of_node; | |
acc6e331 TR |
591 | } |
592 | ||
ff2b1359 LW |
593 | #ifdef CONFIG_OF_GPIO |
594 | /* If the gpiochip has an assigned OF node this takes precedence */ | |
a0b66a73 LW |
595 | if (gc->of_node) |
596 | gdev->dev.of_node = gc->of_node; | |
6ff04974 | 597 | else |
a0b66a73 | 598 | gc->of_node = gdev->dev.of_node; |
ff2b1359 | 599 | #endif |
acc6e331 | 600 | |
8d4a85b6 | 601 | gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL); |
ff2b1359 | 602 | if (gdev->id < 0) { |
d377f56f | 603 | ret = gdev->id; |
ff2b1359 LW |
604 | goto err_free_gdev; |
605 | } | |
ddd8891e | 606 | dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id); |
ff2b1359 LW |
607 | device_initialize(&gdev->dev); |
608 | dev_set_drvdata(&gdev->dev, gdev); | |
a0b66a73 LW |
609 | if (gc->parent && gc->parent->driver) |
610 | gdev->owner = gc->parent->driver->owner; | |
611 | else if (gc->owner) | |
ff2b1359 | 612 | /* TODO: remove chip->owner */ |
a0b66a73 | 613 | gdev->owner = gc->owner; |
ff2b1359 LW |
614 | else |
615 | gdev->owner = THIS_MODULE; | |
d2876d08 | 616 | |
a0b66a73 | 617 | gdev->descs = kcalloc(gc->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL); |
1c3cdb18 | 618 | if (!gdev->descs) { |
d377f56f | 619 | ret = -ENOMEM; |
a05a1404 | 620 | goto err_free_ida; |
ff2b1359 LW |
621 | } |
622 | ||
a0b66a73 LW |
623 | if (gc->ngpio == 0) { |
624 | chip_err(gc, "tried to insert a GPIO chip with zero lines\n"); | |
d377f56f | 625 | ret = -EINVAL; |
159f3cd9 | 626 | goto err_free_descs; |
5ed41cc4 | 627 | } |
df4878e9 | 628 | |
a0b66a73 LW |
629 | if (gc->ngpio > FASTPATH_NGPIO) |
630 | chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n", | |
631 | gc->ngpio, FASTPATH_NGPIO); | |
3027743f | 632 | |
a0b66a73 | 633 | gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL); |
df4878e9 | 634 | if (!gdev->label) { |
d377f56f | 635 | ret = -ENOMEM; |
476e2fc5 | 636 | goto err_free_descs; |
df4878e9 LW |
637 | } |
638 | ||
a0b66a73 | 639 | gdev->ngpio = gc->ngpio; |
43c54eca | 640 | gdev->data = data; |
5ed41cc4 | 641 | |
d2876d08 DB |
642 | spin_lock_irqsave(&gpio_lock, flags); |
643 | ||
fdeb8e15 LW |
644 | /* |
645 | * TODO: this allocates a Linux GPIO number base in the global | |
646 | * GPIO numberspace for this chip. In the long run we want to | |
647 | * get *rid* of this numberspace and use only descriptors, but | |
648 | * it may be a pipe dream. It will not happen before we get rid | |
649 | * of the sysfs interface anyways. | |
650 | */ | |
8d0aab2f | 651 | if (base < 0) { |
a0b66a73 | 652 | base = gpiochip_find_base(gc->ngpio); |
8d0aab2f | 653 | if (base < 0) { |
d377f56f | 654 | ret = base; |
225fce83 | 655 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 656 | goto err_free_label; |
8d0aab2f | 657 | } |
fdeb8e15 LW |
658 | /* |
659 | * TODO: it should not be necessary to reflect the assigned | |
660 | * base outside of the GPIO subsystem. Go over drivers and | |
661 | * see if anyone makes use of this, else drop this and assign | |
662 | * a poison instead. | |
663 | */ | |
a0b66a73 | 664 | gc->base = base; |
8d0aab2f | 665 | } |
fdeb8e15 | 666 | gdev->base = base; |
8d0aab2f | 667 | |
d377f56f LW |
668 | ret = gpiodev_add_to_list(gdev); |
669 | if (ret) { | |
05aa5203 | 670 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 671 | goto err_free_label; |
05aa5203 | 672 | } |
1a989d0f | 673 | |
a0b66a73 | 674 | for (i = 0; i < gc->ngpio; i++) |
767cd17a | 675 | gdev->descs[i].gdev = gdev; |
14e85c0e | 676 | |
207270dd DC |
677 | spin_unlock_irqrestore(&gpio_lock, flags); |
678 | ||
6accc376 | 679 | BLOCKING_INIT_NOTIFIER_HEAD(&gdev->notifier); |
51c1064e | 680 | |
f23f1516 | 681 | #ifdef CONFIG_PINCTRL |
20ec3e39 | 682 | INIT_LIST_HEAD(&gdev->pin_ranges); |
f23f1516 SH |
683 | #endif |
684 | ||
7cba1a4d BG |
685 | if (gc->names) |
686 | ret = gpiochip_set_desc_names(gc); | |
687 | else | |
688 | ret = devprop_gpiochip_set_names(gc); | |
d377f56f | 689 | if (ret) |
5f3ca732 MP |
690 | goto err_remove_from_list; |
691 | ||
a0b66a73 | 692 | ret = gpiochip_alloc_valid_mask(gc); |
d377f56f | 693 | if (ret) |
48057ed1 | 694 | goto err_remove_from_list; |
e0d89728 | 695 | |
a0b66a73 | 696 | ret = of_gpiochip_add(gc); |
d377f56f | 697 | if (ret) |
48057ed1 | 698 | goto err_free_gpiochip_mask; |
28355f81 | 699 | |
a0b66a73 | 700 | ret = gpiochip_init_valid_mask(gc); |
d377f56f | 701 | if (ret) |
35779890 | 702 | goto err_remove_of_chip; |
f8ec92a9 | 703 | |
a0b66a73 | 704 | for (i = 0; i < gc->ngpio; i++) { |
3edfb7bd RRD |
705 | struct gpio_desc *desc = &gdev->descs[i]; |
706 | ||
a0b66a73 | 707 | if (gc->get_direction && gpiochip_line_is_valid(gc, i)) { |
4fc5bfeb | 708 | assign_bit(FLAG_IS_OUT, |
a0b66a73 | 709 | &desc->flags, !gc->get_direction(gc, i)); |
d95da993 | 710 | } else { |
4fc5bfeb | 711 | assign_bit(FLAG_IS_OUT, |
a0b66a73 | 712 | &desc->flags, !gc->direction_input); |
d95da993 | 713 | } |
3edfb7bd RRD |
714 | } |
715 | ||
a0b66a73 | 716 | ret = gpiochip_add_pin_ranges(gc); |
b056ca1c AS |
717 | if (ret) |
718 | goto err_remove_of_chip; | |
719 | ||
a0b66a73 | 720 | acpi_gpiochip_add(gc); |
391c970c | 721 | |
a0b66a73 | 722 | machine_gpiochip_add(gc); |
a411e81e | 723 | |
a0b66a73 | 724 | ret = gpiochip_irqchip_init_valid_mask(gc); |
9411e3aa AS |
725 | if (ret) |
726 | goto err_remove_acpi_chip; | |
727 | ||
a0b66a73 | 728 | ret = gpiochip_irqchip_init_hw(gc); |
fbdf8d4b | 729 | if (ret) |
48057ed1 LW |
730 | goto err_remove_acpi_chip; |
731 | ||
a0b66a73 | 732 | ret = gpiochip_add_irqchip(gc, lock_key, request_key); |
fbdf8d4b | 733 | if (ret) |
48057ed1 LW |
734 | goto err_remove_irqchip_mask; |
735 | ||
3c702e99 LW |
736 | /* |
737 | * By first adding the chardev, and then adding the device, | |
738 | * we get a device node entry in sysfs under | |
739 | * /sys/bus/gpio/devices/gpiochipN/dev that can be used for | |
740 | * coldplug of device nodes and other udev business. | |
159f3cd9 GR |
741 | * We can do this only if gpiolib has been initialized. |
742 | * Otherwise, defer until later. | |
3c702e99 | 743 | */ |
159f3cd9 | 744 | if (gpiolib_initialized) { |
d377f56f LW |
745 | ret = gpiochip_setup_dev(gdev); |
746 | if (ret) | |
48057ed1 | 747 | goto err_remove_irqchip; |
159f3cd9 | 748 | } |
cedb1881 | 749 | return 0; |
3bae4811 | 750 | |
48057ed1 | 751 | err_remove_irqchip: |
a0b66a73 | 752 | gpiochip_irqchip_remove(gc); |
48057ed1 | 753 | err_remove_irqchip_mask: |
a0b66a73 | 754 | gpiochip_irqchip_free_valid_mask(gc); |
35779890 | 755 | err_remove_acpi_chip: |
a0b66a73 | 756 | acpi_gpiochip_remove(gc); |
35779890 | 757 | err_remove_of_chip: |
a0b66a73 LW |
758 | gpiochip_free_hogs(gc); |
759 | of_gpiochip_remove(gc); | |
35779890 | 760 | err_free_gpiochip_mask: |
a0b66a73 LW |
761 | gpiochip_remove_pin_ranges(gc); |
762 | gpiochip_free_valid_mask(gc); | |
5f3ca732 | 763 | err_remove_from_list: |
225fce83 | 764 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 765 | list_del(&gdev->list); |
3bae4811 | 766 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 767 | err_free_label: |
fcf273e5 | 768 | kfree_const(gdev->label); |
476e2fc5 GR |
769 | err_free_descs: |
770 | kfree(gdev->descs); | |
a05a1404 | 771 | err_free_ida: |
8d4a85b6 | 772 | ida_free(&gpio_ida, gdev->id); |
a05a1404 | 773 | err_free_gdev: |
d2876d08 | 774 | /* failures here can mean systems won't boot... */ |
3cc1fb73 GS |
775 | if (ret != -EPROBE_DEFER) { |
776 | pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__, | |
777 | gdev->base, gdev->base + gdev->ngpio - 1, | |
778 | gc->label ? : "generic", ret); | |
779 | } | |
fdeb8e15 | 780 | kfree(gdev); |
d377f56f | 781 | return ret; |
d2876d08 | 782 | } |
959bc7b2 | 783 | EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key); |
d2876d08 | 784 | |
43c54eca LW |
785 | /** |
786 | * gpiochip_get_data() - get per-subdriver data for the chip | |
a0b66a73 | 787 | * @gc: GPIO chip |
950d55f5 TR |
788 | * |
789 | * Returns: | |
790 | * The per-subdriver data for the chip. | |
43c54eca | 791 | */ |
a0b66a73 | 792 | void *gpiochip_get_data(struct gpio_chip *gc) |
43c54eca | 793 | { |
a0b66a73 | 794 | return gc->gpiodev->data; |
43c54eca LW |
795 | } |
796 | EXPORT_SYMBOL_GPL(gpiochip_get_data); | |
797 | ||
d2876d08 DB |
798 | /** |
799 | * gpiochip_remove() - unregister a gpio_chip | |
a0b66a73 | 800 | * @gc: the chip to unregister |
d2876d08 DB |
801 | * |
802 | * A gpio_chip with any GPIOs still requested may not be removed. | |
803 | */ | |
a0b66a73 | 804 | void gpiochip_remove(struct gpio_chip *gc) |
d2876d08 | 805 | { |
a0b66a73 | 806 | struct gpio_device *gdev = gc->gpiodev; |
d2876d08 | 807 | unsigned long flags; |
869233f8 | 808 | unsigned int i; |
d2876d08 | 809 | |
ff2b1359 | 810 | /* FIXME: should the legacy sysfs handling be moved to gpio_device? */ |
afbc4f31 | 811 | gpiochip_sysfs_unregister(gdev); |
a0b66a73 | 812 | gpiochip_free_hogs(gc); |
bd203bd5 BJZ |
813 | /* Numb the device, cancelling all outstanding operations */ |
814 | gdev->chip = NULL; | |
a0b66a73 LW |
815 | gpiochip_irqchip_remove(gc); |
816 | acpi_gpiochip_remove(gc); | |
817 | of_gpiochip_remove(gc); | |
818 | gpiochip_remove_pin_ranges(gc); | |
819 | gpiochip_free_valid_mask(gc); | |
43c54eca LW |
820 | /* |
821 | * We accept no more calls into the driver from this point, so | |
822 | * NULL the driver data pointer | |
823 | */ | |
824 | gdev->data = NULL; | |
391c970c | 825 | |
6798acaa | 826 | spin_lock_irqsave(&gpio_lock, flags); |
fdeb8e15 | 827 | for (i = 0; i < gdev->ngpio; i++) { |
a0b66a73 | 828 | if (gpiochip_is_requested(gc, i)) |
869233f8 | 829 | break; |
d2876d08 | 830 | } |
d2876d08 | 831 | spin_unlock_irqrestore(&gpio_lock, flags); |
14e85c0e | 832 | |
ca18a852 | 833 | if (i != gdev->ngpio) |
fdeb8e15 | 834 | dev_crit(&gdev->dev, |
58383c78 | 835 | "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n"); |
fab28b89 | 836 | |
ff2b1359 LW |
837 | /* |
838 | * The gpiochip side puts its use of the device to rest here: | |
839 | * if there are no userspace clients, the chardev and device will | |
840 | * be removed, else it will be dangling until the last user is | |
841 | * gone. | |
842 | */ | |
1f5eb8b1 | 843 | gcdev_unregister(gdev); |
ff2b1359 | 844 | put_device(&gdev->dev); |
d2876d08 DB |
845 | } |
846 | EXPORT_SYMBOL_GPL(gpiochip_remove); | |
847 | ||
594fa265 GL |
848 | /** |
849 | * gpiochip_find() - iterator for locating a specific gpio_chip | |
850 | * @data: data to pass to match function | |
950d55f5 | 851 | * @match: Callback function to check gpio_chip |
594fa265 GL |
852 | * |
853 | * Similar to bus_find_device. It returns a reference to a gpio_chip as | |
854 | * determined by a user supplied @match callback. The callback should return | |
855 | * 0 if the device doesn't match and non-zero if it does. If the callback is | |
856 | * non-zero, this function will return to the caller and not iterate over any | |
857 | * more gpio_chips. | |
858 | */ | |
07ce8ec7 | 859 | struct gpio_chip *gpiochip_find(void *data, |
a0b66a73 | 860 | int (*match)(struct gpio_chip *gc, |
3d0f7cf0 | 861 | void *data)) |
594fa265 | 862 | { |
ff2b1359 | 863 | struct gpio_device *gdev; |
a0b66a73 | 864 | struct gpio_chip *gc = NULL; |
594fa265 | 865 | unsigned long flags; |
594fa265 GL |
866 | |
867 | spin_lock_irqsave(&gpio_lock, flags); | |
ff2b1359 | 868 | list_for_each_entry(gdev, &gpio_devices, list) |
acf06ff7 | 869 | if (gdev->chip && match(gdev->chip, data)) { |
a0b66a73 | 870 | gc = gdev->chip; |
594fa265 | 871 | break; |
acf06ff7 | 872 | } |
ff2b1359 | 873 | |
594fa265 GL |
874 | spin_unlock_irqrestore(&gpio_lock, flags); |
875 | ||
a0b66a73 | 876 | return gc; |
594fa265 | 877 | } |
8fa0c9bf | 878 | EXPORT_SYMBOL_GPL(gpiochip_find); |
d2876d08 | 879 | |
a0b66a73 | 880 | static int gpiochip_match_name(struct gpio_chip *gc, void *data) |
79697ef9 AC |
881 | { |
882 | const char *name = data; | |
883 | ||
a0b66a73 | 884 | return !strcmp(gc->label, name); |
79697ef9 AC |
885 | } |
886 | ||
887 | static struct gpio_chip *find_chip_by_name(const char *name) | |
888 | { | |
889 | return gpiochip_find((void *)name, gpiochip_match_name); | |
890 | } | |
891 | ||
14250520 LW |
892 | #ifdef CONFIG_GPIOLIB_IRQCHIP |
893 | ||
894 | /* | |
895 | * The following is irqchip helper code for gpiochips. | |
896 | */ | |
897 | ||
9411e3aa AS |
898 | static int gpiochip_irqchip_init_hw(struct gpio_chip *gc) |
899 | { | |
900 | struct gpio_irq_chip *girq = &gc->irq; | |
901 | ||
902 | if (!girq->init_hw) | |
903 | return 0; | |
904 | ||
905 | return girq->init_hw(gc); | |
906 | } | |
907 | ||
5fbe5b58 | 908 | static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc) |
79b804cb | 909 | { |
5fbe5b58 LW |
910 | struct gpio_irq_chip *girq = &gc->irq; |
911 | ||
912 | if (!girq->init_valid_mask) | |
79b804cb MW |
913 | return 0; |
914 | ||
5fbe5b58 LW |
915 | girq->valid_mask = gpiochip_allocate_mask(gc); |
916 | if (!girq->valid_mask) | |
79b804cb MW |
917 | return -ENOMEM; |
918 | ||
5fbe5b58 LW |
919 | girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio); |
920 | ||
79b804cb MW |
921 | return 0; |
922 | } | |
923 | ||
a0b66a73 | 924 | static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc) |
79b804cb | 925 | { |
a0b66a73 LW |
926 | bitmap_free(gc->irq.valid_mask); |
927 | gc->irq.valid_mask = NULL; | |
79b804cb MW |
928 | } |
929 | ||
a0b66a73 | 930 | bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc, |
64ff2c8e | 931 | unsigned int offset) |
79b804cb | 932 | { |
a0b66a73 | 933 | if (!gpiochip_line_is_valid(gc, offset)) |
726cb3ba | 934 | return false; |
79b804cb | 935 | /* No mask means all valid */ |
a0b66a73 | 936 | if (likely(!gc->irq.valid_mask)) |
79b804cb | 937 | return true; |
a0b66a73 | 938 | return test_bit(offset, gc->irq.valid_mask); |
79b804cb | 939 | } |
64ff2c8e | 940 | EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid); |
79b804cb | 941 | |
fdd61a01 LW |
942 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
943 | ||
944 | /** | |
945 | * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip | |
946 | * to a gpiochip | |
947 | * @gc: the gpiochip to set the irqchip hierarchical handler to | |
948 | * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt | |
949 | * will then percolate up to the parent | |
950 | */ | |
951 | static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc, | |
952 | struct irq_chip *irqchip) | |
953 | { | |
954 | /* DT will deal with mapping each IRQ as we go along */ | |
955 | if (is_of_node(gc->irq.fwnode)) | |
956 | return; | |
957 | ||
958 | /* | |
959 | * This is for legacy and boardfile "irqchip" fwnodes: allocate | |
960 | * irqs upfront instead of dynamically since we don't have the | |
961 | * dynamic type of allocation that hardware description languages | |
962 | * provide. Once all GPIO drivers using board files are gone from | |
963 | * the kernel we can delete this code, but for a transitional period | |
964 | * it is necessary to keep this around. | |
965 | */ | |
966 | if (is_fwnode_irqchip(gc->irq.fwnode)) { | |
967 | int i; | |
968 | int ret; | |
969 | ||
970 | for (i = 0; i < gc->ngpio; i++) { | |
971 | struct irq_fwspec fwspec; | |
972 | unsigned int parent_hwirq; | |
973 | unsigned int parent_type; | |
974 | struct gpio_irq_chip *girq = &gc->irq; | |
975 | ||
976 | /* | |
977 | * We call the child to parent translation function | |
978 | * only to check if the child IRQ is valid or not. | |
979 | * Just pick the rising edge type here as that is what | |
980 | * we likely need to support. | |
981 | */ | |
982 | ret = girq->child_to_parent_hwirq(gc, i, | |
983 | IRQ_TYPE_EDGE_RISING, | |
984 | &parent_hwirq, | |
985 | &parent_type); | |
986 | if (ret) { | |
987 | chip_err(gc, "skip set-up on hwirq %d\n", | |
988 | i); | |
989 | continue; | |
990 | } | |
991 | ||
992 | fwspec.fwnode = gc->irq.fwnode; | |
993 | /* This is the hwirq for the GPIO line side of things */ | |
994 | fwspec.param[0] = girq->child_offset_to_irq(gc, i); | |
995 | /* Just pick something */ | |
996 | fwspec.param[1] = IRQ_TYPE_EDGE_RISING; | |
997 | fwspec.param_count = 2; | |
998 | ret = __irq_domain_alloc_irqs(gc->irq.domain, | |
999 | /* just pick something */ | |
1000 | -1, | |
1001 | 1, | |
1002 | NUMA_NO_NODE, | |
1003 | &fwspec, | |
1004 | false, | |
1005 | NULL); | |
1006 | if (ret < 0) { | |
1007 | chip_err(gc, | |
1008 | "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n", | |
1009 | i, parent_hwirq, | |
1010 | ret); | |
1011 | } | |
1012 | } | |
1013 | } | |
1014 | ||
1015 | chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__); | |
1016 | ||
1017 | return; | |
1018 | } | |
1019 | ||
1020 | static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d, | |
1021 | struct irq_fwspec *fwspec, | |
1022 | unsigned long *hwirq, | |
1023 | unsigned int *type) | |
1024 | { | |
1025 | /* We support standard DT translation */ | |
1026 | if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) { | |
1027 | return irq_domain_translate_twocell(d, fwspec, hwirq, type); | |
1028 | } | |
1029 | ||
1030 | /* This is for board files and others not using DT */ | |
1031 | if (is_fwnode_irqchip(fwspec->fwnode)) { | |
1032 | int ret; | |
1033 | ||
1034 | ret = irq_domain_translate_twocell(d, fwspec, hwirq, type); | |
1035 | if (ret) | |
1036 | return ret; | |
1037 | WARN_ON(*type == IRQ_TYPE_NONE); | |
1038 | return 0; | |
1039 | } | |
1040 | return -EINVAL; | |
1041 | } | |
1042 | ||
1043 | static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d, | |
1044 | unsigned int irq, | |
1045 | unsigned int nr_irqs, | |
1046 | void *data) | |
1047 | { | |
1048 | struct gpio_chip *gc = d->host_data; | |
1049 | irq_hw_number_t hwirq; | |
1050 | unsigned int type = IRQ_TYPE_NONE; | |
1051 | struct irq_fwspec *fwspec = data; | |
24258761 | 1052 | void *parent_arg; |
fdd61a01 LW |
1053 | unsigned int parent_hwirq; |
1054 | unsigned int parent_type; | |
1055 | struct gpio_irq_chip *girq = &gc->irq; | |
1056 | int ret; | |
1057 | ||
1058 | /* | |
1059 | * The nr_irqs parameter is always one except for PCI multi-MSI | |
1060 | * so this should not happen. | |
1061 | */ | |
1062 | WARN_ON(nr_irqs != 1); | |
1063 | ||
1064 | ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type); | |
1065 | if (ret) | |
1066 | return ret; | |
1067 | ||
366950ee | 1068 | chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq); |
fdd61a01 LW |
1069 | |
1070 | ret = girq->child_to_parent_hwirq(gc, hwirq, type, | |
1071 | &parent_hwirq, &parent_type); | |
1072 | if (ret) { | |
1073 | chip_err(gc, "can't look up hwirq %lu\n", hwirq); | |
1074 | return ret; | |
1075 | } | |
366950ee | 1076 | chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq); |
fdd61a01 LW |
1077 | |
1078 | /* | |
1079 | * We set handle_bad_irq because the .set_type() should | |
1080 | * always be invoked and set the right type of handler. | |
1081 | */ | |
1082 | irq_domain_set_info(d, | |
1083 | irq, | |
1084 | hwirq, | |
1085 | gc->irq.chip, | |
1086 | gc, | |
1087 | girq->handler, | |
1088 | NULL, NULL); | |
1089 | irq_set_probe(irq); | |
1090 | ||
fdd61a01 | 1091 | /* This parent only handles asserted level IRQs */ |
24258761 KH |
1092 | parent_arg = girq->populate_parent_alloc_arg(gc, parent_hwirq, parent_type); |
1093 | if (!parent_arg) | |
1094 | return -ENOMEM; | |
1095 | ||
366950ee | 1096 | chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n", |
fdd61a01 | 1097 | irq, parent_hwirq); |
c34f6dc8 | 1098 | irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key); |
24258761 | 1099 | ret = irq_domain_alloc_irqs_parent(d, irq, 1, parent_arg); |
880b7cf2 KH |
1100 | /* |
1101 | * If the parent irqdomain is msi, the interrupts have already | |
1102 | * been allocated, so the EEXIST is good. | |
1103 | */ | |
1104 | if (irq_domain_is_msi(d->parent) && (ret == -EEXIST)) | |
1105 | ret = 0; | |
fdd61a01 LW |
1106 | if (ret) |
1107 | chip_err(gc, | |
1108 | "failed to allocate parent hwirq %d for hwirq %lu\n", | |
1109 | parent_hwirq, hwirq); | |
1110 | ||
24258761 | 1111 | kfree(parent_arg); |
fdd61a01 LW |
1112 | return ret; |
1113 | } | |
1114 | ||
a0b66a73 | 1115 | static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc, |
fdd61a01 LW |
1116 | unsigned int offset) |
1117 | { | |
1118 | return offset; | |
1119 | } | |
1120 | ||
1121 | static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops) | |
1122 | { | |
1123 | ops->activate = gpiochip_irq_domain_activate; | |
1124 | ops->deactivate = gpiochip_irq_domain_deactivate; | |
1125 | ops->alloc = gpiochip_hierarchy_irq_domain_alloc; | |
1126 | ops->free = irq_domain_free_irqs_common; | |
1127 | ||
1128 | /* | |
1129 | * We only allow overriding the translate() function for | |
1130 | * hierarchical chips, and this should only be done if the user | |
1131 | * really need something other than 1:1 translation. | |
1132 | */ | |
1133 | if (!ops->translate) | |
1134 | ops->translate = gpiochip_hierarchy_irq_domain_translate; | |
1135 | } | |
1136 | ||
1137 | static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc) | |
1138 | { | |
1139 | if (!gc->irq.child_to_parent_hwirq || | |
1140 | !gc->irq.fwnode) { | |
1141 | chip_err(gc, "missing irqdomain vital data\n"); | |
1142 | return -EINVAL; | |
1143 | } | |
1144 | ||
1145 | if (!gc->irq.child_offset_to_irq) | |
1146 | gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop; | |
1147 | ||
24258761 KH |
1148 | if (!gc->irq.populate_parent_alloc_arg) |
1149 | gc->irq.populate_parent_alloc_arg = | |
fdd61a01 LW |
1150 | gpiochip_populate_parent_fwspec_twocell; |
1151 | ||
1152 | gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops); | |
1153 | ||
1154 | gc->irq.domain = irq_domain_create_hierarchy( | |
1155 | gc->irq.parent_domain, | |
1156 | 0, | |
1157 | gc->ngpio, | |
1158 | gc->irq.fwnode, | |
1159 | &gc->irq.child_irq_domain_ops, | |
1160 | gc); | |
1161 | ||
1162 | if (!gc->irq.domain) | |
1163 | return -ENOMEM; | |
1164 | ||
1165 | gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip); | |
1166 | ||
1167 | return 0; | |
1168 | } | |
1169 | ||
1170 | static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc) | |
1171 | { | |
1172 | return !!gc->irq.parent_domain; | |
1173 | } | |
1174 | ||
a0b66a73 | 1175 | void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc, |
fdd61a01 LW |
1176 | unsigned int parent_hwirq, |
1177 | unsigned int parent_type) | |
1178 | { | |
24258761 KH |
1179 | struct irq_fwspec *fwspec; |
1180 | ||
1181 | fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL); | |
1182 | if (!fwspec) | |
1183 | return NULL; | |
1184 | ||
a0b66a73 | 1185 | fwspec->fwnode = gc->irq.parent_domain->fwnode; |
fdd61a01 LW |
1186 | fwspec->param_count = 2; |
1187 | fwspec->param[0] = parent_hwirq; | |
1188 | fwspec->param[1] = parent_type; | |
24258761 KH |
1189 | |
1190 | return fwspec; | |
fdd61a01 LW |
1191 | } |
1192 | EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell); | |
1193 | ||
a0b66a73 | 1194 | void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc, |
fdd61a01 LW |
1195 | unsigned int parent_hwirq, |
1196 | unsigned int parent_type) | |
1197 | { | |
24258761 KH |
1198 | struct irq_fwspec *fwspec; |
1199 | ||
1200 | fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL); | |
1201 | if (!fwspec) | |
1202 | return NULL; | |
1203 | ||
a0b66a73 | 1204 | fwspec->fwnode = gc->irq.parent_domain->fwnode; |
fdd61a01 LW |
1205 | fwspec->param_count = 4; |
1206 | fwspec->param[0] = 0; | |
1207 | fwspec->param[1] = parent_hwirq; | |
1208 | fwspec->param[2] = 0; | |
1209 | fwspec->param[3] = parent_type; | |
24258761 KH |
1210 | |
1211 | return fwspec; | |
fdd61a01 LW |
1212 | } |
1213 | EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell); | |
1214 | ||
1215 | #else | |
1216 | ||
1217 | static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc) | |
1218 | { | |
1219 | return -EINVAL; | |
1220 | } | |
1221 | ||
1222 | static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc) | |
1223 | { | |
1224 | return false; | |
1225 | } | |
1226 | ||
1227 | #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ | |
1228 | ||
14250520 LW |
1229 | /** |
1230 | * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip | |
1231 | * @d: the irqdomain used by this irqchip | |
1232 | * @irq: the global irq number used by this GPIO irqchip irq | |
1233 | * @hwirq: the local IRQ/GPIO line offset on this gpiochip | |
1234 | * | |
1235 | * This function will set up the mapping for a certain IRQ line on a | |
1236 | * gpiochip by assigning the gpiochip as chip data, and using the irqchip | |
1237 | * stored inside the gpiochip. | |
1238 | */ | |
1b95b4eb TR |
1239 | int gpiochip_irq_map(struct irq_domain *d, unsigned int irq, |
1240 | irq_hw_number_t hwirq) | |
14250520 | 1241 | { |
a0b66a73 | 1242 | struct gpio_chip *gc = d->host_data; |
d377f56f | 1243 | int ret = 0; |
14250520 | 1244 | |
a0b66a73 | 1245 | if (!gpiochip_irqchip_irq_valid(gc, hwirq)) |
dc749a09 GS |
1246 | return -ENXIO; |
1247 | ||
a0b66a73 | 1248 | irq_set_chip_data(irq, gc); |
a0a8bcf4 GS |
1249 | /* |
1250 | * This lock class tells lockdep that GPIO irqs are in a different | |
1251 | * category than their parents, so it won't report false recursion. | |
1252 | */ | |
a0b66a73 LW |
1253 | irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key); |
1254 | irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler); | |
d245b3f9 | 1255 | /* Chips that use nested thread handlers have them marked */ |
a0b66a73 | 1256 | if (gc->irq.threaded) |
1c8732bb | 1257 | irq_set_nested_thread(irq, 1); |
14250520 | 1258 | irq_set_noprobe(irq); |
23393d49 | 1259 | |
a0b66a73 LW |
1260 | if (gc->irq.num_parents == 1) |
1261 | ret = irq_set_parent(irq, gc->irq.parents[0]); | |
1262 | else if (gc->irq.map) | |
1263 | ret = irq_set_parent(irq, gc->irq.map[hwirq]); | |
e0d89728 | 1264 | |
d377f56f LW |
1265 | if (ret < 0) |
1266 | return ret; | |
e0d89728 | 1267 | |
1333b90f LW |
1268 | /* |
1269 | * No set-up of the hardware will happen if IRQ_TYPE_NONE | |
1270 | * is passed as default type. | |
1271 | */ | |
a0b66a73 LW |
1272 | if (gc->irq.default_type != IRQ_TYPE_NONE) |
1273 | irq_set_irq_type(irq, gc->irq.default_type); | |
14250520 LW |
1274 | |
1275 | return 0; | |
1276 | } | |
1b95b4eb | 1277 | EXPORT_SYMBOL_GPL(gpiochip_irq_map); |
14250520 | 1278 | |
1b95b4eb | 1279 | void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq) |
c3626fde | 1280 | { |
a0b66a73 | 1281 | struct gpio_chip *gc = d->host_data; |
1c8732bb | 1282 | |
a0b66a73 | 1283 | if (gc->irq.threaded) |
1c8732bb | 1284 | irq_set_nested_thread(irq, 0); |
c3626fde LW |
1285 | irq_set_chip_and_handler(irq, NULL, NULL); |
1286 | irq_set_chip_data(irq, NULL); | |
1287 | } | |
1b95b4eb | 1288 | EXPORT_SYMBOL_GPL(gpiochip_irq_unmap); |
c3626fde | 1289 | |
14250520 LW |
1290 | static const struct irq_domain_ops gpiochip_domain_ops = { |
1291 | .map = gpiochip_irq_map, | |
c3626fde | 1292 | .unmap = gpiochip_irq_unmap, |
14250520 LW |
1293 | /* Virtually all GPIO irqchips are twocell:ed */ |
1294 | .xlate = irq_domain_xlate_twocell, | |
1295 | }; | |
1296 | ||
fdd61a01 LW |
1297 | /* |
1298 | * TODO: move these activate/deactivate in under the hierarchicial | |
1299 | * irqchip implementation as static once SPMI and SSBI (all external | |
1300 | * users) are phased over. | |
1301 | */ | |
ef74f70e BM |
1302 | /** |
1303 | * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ | |
1304 | * @domain: The IRQ domain used by this IRQ chip | |
1305 | * @data: Outermost irq_data associated with the IRQ | |
1306 | * @reserve: If set, only reserve an interrupt vector instead of assigning one | |
1307 | * | |
1308 | * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be | |
1309 | * used as the activate function for the &struct irq_domain_ops. The host_data | |
1310 | * for the IRQ domain must be the &struct gpio_chip. | |
1311 | */ | |
1312 | int gpiochip_irq_domain_activate(struct irq_domain *domain, | |
1313 | struct irq_data *data, bool reserve) | |
1314 | { | |
a0b66a73 | 1315 | struct gpio_chip *gc = domain->host_data; |
ef74f70e | 1316 | |
a0b66a73 | 1317 | return gpiochip_lock_as_irq(gc, data->hwirq); |
ef74f70e BM |
1318 | } |
1319 | EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate); | |
1320 | ||
1321 | /** | |
1322 | * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ | |
1323 | * @domain: The IRQ domain used by this IRQ chip | |
1324 | * @data: Outermost irq_data associated with the IRQ | |
1325 | * | |
1326 | * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to | |
1327 | * be used as the deactivate function for the &struct irq_domain_ops. The | |
1328 | * host_data for the IRQ domain must be the &struct gpio_chip. | |
1329 | */ | |
1330 | void gpiochip_irq_domain_deactivate(struct irq_domain *domain, | |
1331 | struct irq_data *data) | |
1332 | { | |
a0b66a73 | 1333 | struct gpio_chip *gc = domain->host_data; |
ef74f70e | 1334 | |
a0b66a73 | 1335 | return gpiochip_unlock_as_irq(gc, data->hwirq); |
ef74f70e BM |
1336 | } |
1337 | EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate); | |
1338 | ||
13daf489 | 1339 | static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset) |
14250520 | 1340 | { |
a0b66a73 | 1341 | struct irq_domain *domain = gc->irq.domain; |
fdd61a01 | 1342 | |
a0b66a73 | 1343 | if (!gpiochip_irqchip_irq_valid(gc, offset)) |
4e6b8238 | 1344 | return -ENXIO; |
5b76e79c | 1345 | |
fdd61a01 LW |
1346 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
1347 | if (irq_domain_is_hierarchy(domain)) { | |
1348 | struct irq_fwspec spec; | |
1349 | ||
1350 | spec.fwnode = domain->fwnode; | |
1351 | spec.param_count = 2; | |
a0b66a73 | 1352 | spec.param[0] = gc->irq.child_offset_to_irq(gc, offset); |
fdd61a01 LW |
1353 | spec.param[1] = IRQ_TYPE_NONE; |
1354 | ||
1355 | return irq_create_fwspec_mapping(&spec); | |
1356 | } | |
1357 | #endif | |
1358 | ||
1359 | return irq_create_mapping(domain, offset); | |
14250520 LW |
1360 | } |
1361 | ||
14250520 LW |
1362 | static int gpiochip_irq_reqres(struct irq_data *d) |
1363 | { | |
a0b66a73 | 1364 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
5b76e79c | 1365 | |
a0b66a73 | 1366 | return gpiochip_reqres_irq(gc, d->hwirq); |
14250520 LW |
1367 | } |
1368 | ||
1369 | static void gpiochip_irq_relres(struct irq_data *d) | |
1370 | { | |
a0b66a73 | 1371 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
14250520 | 1372 | |
a0b66a73 | 1373 | gpiochip_relres_irq(gc, d->hwirq); |
14250520 LW |
1374 | } |
1375 | ||
a8173820 MS |
1376 | static void gpiochip_irq_mask(struct irq_data *d) |
1377 | { | |
1378 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | |
1379 | ||
1380 | if (gc->irq.irq_mask) | |
1381 | gc->irq.irq_mask(d); | |
1382 | gpiochip_disable_irq(gc, d->hwirq); | |
1383 | } | |
1384 | ||
1385 | static void gpiochip_irq_unmask(struct irq_data *d) | |
1386 | { | |
1387 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | |
1388 | ||
1389 | gpiochip_enable_irq(gc, d->hwirq); | |
1390 | if (gc->irq.irq_unmask) | |
1391 | gc->irq.irq_unmask(d); | |
1392 | } | |
1393 | ||
461c1a7d | 1394 | static void gpiochip_irq_enable(struct irq_data *d) |
14250520 | 1395 | { |
a0b66a73 | 1396 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
e0d89728 | 1397 | |
a0b66a73 | 1398 | gpiochip_enable_irq(gc, d->hwirq); |
a8173820 | 1399 | gc->irq.irq_enable(d); |
461c1a7d HV |
1400 | } |
1401 | ||
1402 | static void gpiochip_irq_disable(struct irq_data *d) | |
1403 | { | |
a0b66a73 | 1404 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
461c1a7d | 1405 | |
a8173820 | 1406 | gc->irq.irq_disable(d); |
a0b66a73 | 1407 | gpiochip_disable_irq(gc, d->hwirq); |
461c1a7d HV |
1408 | } |
1409 | ||
a0b66a73 | 1410 | static void gpiochip_set_irq_hooks(struct gpio_chip *gc) |
ca620f2d | 1411 | { |
a0b66a73 | 1412 | struct irq_chip *irqchip = gc->irq.chip; |
ca620f2d HV |
1413 | |
1414 | if (!irqchip->irq_request_resources && | |
1415 | !irqchip->irq_release_resources) { | |
1416 | irqchip->irq_request_resources = gpiochip_irq_reqres; | |
1417 | irqchip->irq_release_resources = gpiochip_irq_relres; | |
1418 | } | |
a0b66a73 | 1419 | if (WARN_ON(gc->irq.irq_enable)) |
461c1a7d | 1420 | return; |
171948ea | 1421 | /* Check if the irqchip already has this hook... */ |
9d552219 NS |
1422 | if (irqchip->irq_enable == gpiochip_irq_enable || |
1423 | irqchip->irq_mask == gpiochip_irq_mask) { | |
171948ea HV |
1424 | /* |
1425 | * ...and if so, give a gentle warning that this is bad | |
1426 | * practice. | |
1427 | */ | |
a0b66a73 | 1428 | chip_info(gc, |
171948ea HV |
1429 | "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n"); |
1430 | return; | |
1431 | } | |
a8173820 MS |
1432 | |
1433 | if (irqchip->irq_disable) { | |
1434 | gc->irq.irq_disable = irqchip->irq_disable; | |
1435 | irqchip->irq_disable = gpiochip_irq_disable; | |
1436 | } else { | |
1437 | gc->irq.irq_mask = irqchip->irq_mask; | |
1438 | irqchip->irq_mask = gpiochip_irq_mask; | |
1439 | } | |
1440 | ||
1441 | if (irqchip->irq_enable) { | |
1442 | gc->irq.irq_enable = irqchip->irq_enable; | |
1443 | irqchip->irq_enable = gpiochip_irq_enable; | |
1444 | } else { | |
1445 | gc->irq.irq_unmask = irqchip->irq_unmask; | |
1446 | irqchip->irq_unmask = gpiochip_irq_unmask; | |
1447 | } | |
14250520 LW |
1448 | } |
1449 | ||
e0d89728 TR |
1450 | /** |
1451 | * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip | |
a0b66a73 | 1452 | * @gc: the GPIO chip to add the IRQ chip to |
39c3fd58 AL |
1453 | * @lock_key: lockdep class for IRQ lock |
1454 | * @request_key: lockdep class for IRQ request | |
e0d89728 | 1455 | */ |
a0b66a73 | 1456 | static int gpiochip_add_irqchip(struct gpio_chip *gc, |
39c3fd58 AL |
1457 | struct lock_class_key *lock_key, |
1458 | struct lock_class_key *request_key) | |
e0d89728 | 1459 | { |
a0b66a73 | 1460 | struct irq_chip *irqchip = gc->irq.chip; |
fdd61a01 | 1461 | const struct irq_domain_ops *ops = NULL; |
e0d89728 TR |
1462 | struct device_node *np; |
1463 | unsigned int type; | |
1464 | unsigned int i; | |
1465 | ||
1466 | if (!irqchip) | |
1467 | return 0; | |
1468 | ||
a0b66a73 LW |
1469 | if (gc->irq.parent_handler && gc->can_sleep) { |
1470 | chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n"); | |
e0d89728 TR |
1471 | return -EINVAL; |
1472 | } | |
1473 | ||
a0b66a73 LW |
1474 | np = gc->gpiodev->dev.of_node; |
1475 | type = gc->irq.default_type; | |
e0d89728 TR |
1476 | |
1477 | /* | |
1478 | * Specifying a default trigger is a terrible idea if DT or ACPI is | |
1479 | * used to configure the interrupts, as you may end up with | |
1480 | * conflicting triggers. Tell the user, and reset to NONE. | |
1481 | */ | |
1482 | if (WARN(np && type != IRQ_TYPE_NONE, | |
1483 | "%s: Ignoring %u default trigger\n", np->full_name, type)) | |
1484 | type = IRQ_TYPE_NONE; | |
1485 | ||
a0b66a73 LW |
1486 | if (has_acpi_companion(gc->parent) && type != IRQ_TYPE_NONE) { |
1487 | acpi_handle_warn(ACPI_HANDLE(gc->parent), | |
e0d89728 TR |
1488 | "Ignoring %u default trigger\n", type); |
1489 | type = IRQ_TYPE_NONE; | |
1490 | } | |
1491 | ||
ef382374 NS |
1492 | if (gc->to_irq) |
1493 | chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__); | |
1494 | ||
a0b66a73 LW |
1495 | gc->to_irq = gpiochip_to_irq; |
1496 | gc->irq.default_type = type; | |
1497 | gc->irq.lock_key = lock_key; | |
1498 | gc->irq.request_key = request_key; | |
e0d89728 | 1499 | |
fdd61a01 | 1500 | /* If a parent irqdomain is provided, let's build a hierarchy */ |
a0b66a73 LW |
1501 | if (gpiochip_hierarchy_is_hierarchical(gc)) { |
1502 | int ret = gpiochip_hierarchy_add_domain(gc); | |
fdd61a01 LW |
1503 | if (ret) |
1504 | return ret; | |
1505 | } else { | |
1506 | /* Some drivers provide custom irqdomain ops */ | |
a0b66a73 LW |
1507 | if (gc->irq.domain_ops) |
1508 | ops = gc->irq.domain_ops; | |
fdd61a01 LW |
1509 | |
1510 | if (!ops) | |
1511 | ops = &gpiochip_domain_ops; | |
a0b66a73 LW |
1512 | gc->irq.domain = irq_domain_add_simple(np, |
1513 | gc->ngpio, | |
1514 | gc->irq.first, | |
1515 | ops, gc); | |
1516 | if (!gc->irq.domain) | |
fdd61a01 LW |
1517 | return -EINVAL; |
1518 | } | |
e0d89728 | 1519 | |
a0b66a73 LW |
1520 | if (gc->irq.parent_handler) { |
1521 | void *data = gc->irq.parent_handler_data ?: gc; | |
e0d89728 | 1522 | |
a0b66a73 | 1523 | for (i = 0; i < gc->irq.num_parents; i++) { |
e0d89728 TR |
1524 | /* |
1525 | * The parent IRQ chip is already using the chip_data | |
1526 | * for this IRQ chip, so our callbacks simply use the | |
1527 | * handler_data. | |
1528 | */ | |
a0b66a73 LW |
1529 | irq_set_chained_handler_and_data(gc->irq.parents[i], |
1530 | gc->irq.parent_handler, | |
e0d89728 TR |
1531 | data); |
1532 | } | |
e0d89728 TR |
1533 | } |
1534 | ||
a0b66a73 | 1535 | gpiochip_set_irq_hooks(gc); |
ca620f2d | 1536 | |
a0b66a73 | 1537 | acpi_gpiochip_request_interrupts(gc); |
e0d89728 TR |
1538 | |
1539 | return 0; | |
1540 | } | |
1541 | ||
14250520 LW |
1542 | /** |
1543 | * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip | |
a0b66a73 | 1544 | * @gc: the gpiochip to remove the irqchip from |
14250520 LW |
1545 | * |
1546 | * This is called only from gpiochip_remove() | |
1547 | */ | |
a0b66a73 | 1548 | static void gpiochip_irqchip_remove(struct gpio_chip *gc) |
14250520 | 1549 | { |
a0b66a73 | 1550 | struct irq_chip *irqchip = gc->irq.chip; |
39e5f096 | 1551 | unsigned int offset; |
c3626fde | 1552 | |
a0b66a73 | 1553 | acpi_gpiochip_free_interrupts(gc); |
afa82fab | 1554 | |
a0b66a73 LW |
1555 | if (irqchip && gc->irq.parent_handler) { |
1556 | struct gpio_irq_chip *irq = &gc->irq; | |
39e5f096 TR |
1557 | unsigned int i; |
1558 | ||
1559 | for (i = 0; i < irq->num_parents; i++) | |
1560 | irq_set_chained_handler_and_data(irq->parents[i], | |
1561 | NULL, NULL); | |
25e4fe92 DES |
1562 | } |
1563 | ||
c3626fde | 1564 | /* Remove all IRQ mappings and delete the domain */ |
a0b66a73 | 1565 | if (gc->irq.domain) { |
39e5f096 TR |
1566 | unsigned int irq; |
1567 | ||
a0b66a73 LW |
1568 | for (offset = 0; offset < gc->ngpio; offset++) { |
1569 | if (!gpiochip_irqchip_irq_valid(gc, offset)) | |
79b804cb | 1570 | continue; |
f0fbe7bc | 1571 | |
a0b66a73 | 1572 | irq = irq_find_mapping(gc->irq.domain, offset); |
f0fbe7bc | 1573 | irq_dispose_mapping(irq); |
79b804cb | 1574 | } |
f0fbe7bc | 1575 | |
a0b66a73 | 1576 | irq_domain_remove(gc->irq.domain); |
c3626fde | 1577 | } |
14250520 | 1578 | |
461c1a7d HV |
1579 | if (irqchip) { |
1580 | if (irqchip->irq_request_resources == gpiochip_irq_reqres) { | |
1581 | irqchip->irq_request_resources = NULL; | |
1582 | irqchip->irq_release_resources = NULL; | |
1583 | } | |
1584 | if (irqchip->irq_enable == gpiochip_irq_enable) { | |
a0b66a73 LW |
1585 | irqchip->irq_enable = gc->irq.irq_enable; |
1586 | irqchip->irq_disable = gc->irq.irq_disable; | |
461c1a7d | 1587 | } |
14250520 | 1588 | } |
a0b66a73 LW |
1589 | gc->irq.irq_enable = NULL; |
1590 | gc->irq.irq_disable = NULL; | |
1591 | gc->irq.chip = NULL; | |
79b804cb | 1592 | |
a0b66a73 | 1593 | gpiochip_irqchip_free_valid_mask(gc); |
14250520 LW |
1594 | } |
1595 | ||
6a45b0e2 MW |
1596 | /** |
1597 | * gpiochip_irqchip_add_domain() - adds an irqdomain to a gpiochip | |
1598 | * @gc: the gpiochip to add the irqchip to | |
1599 | * @domain: the irqdomain to add to the gpiochip | |
1600 | * | |
1601 | * This function adds an IRQ domain to the gpiochip. | |
1602 | */ | |
1603 | int gpiochip_irqchip_add_domain(struct gpio_chip *gc, | |
1604 | struct irq_domain *domain) | |
1605 | { | |
1606 | if (!domain) | |
1607 | return -EINVAL; | |
1608 | ||
1609 | gc->to_irq = gpiochip_to_irq; | |
1610 | gc->irq.domain = domain; | |
1611 | ||
1612 | return 0; | |
1613 | } | |
1614 | EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain); | |
1615 | ||
14250520 LW |
1616 | #else /* CONFIG_GPIOLIB_IRQCHIP */ |
1617 | ||
a0b66a73 | 1618 | static inline int gpiochip_add_irqchip(struct gpio_chip *gc, |
39c3fd58 AL |
1619 | struct lock_class_key *lock_key, |
1620 | struct lock_class_key *request_key) | |
e0d89728 TR |
1621 | { |
1622 | return 0; | |
1623 | } | |
a0b66a73 | 1624 | static void gpiochip_irqchip_remove(struct gpio_chip *gc) {} |
9411e3aa | 1625 | |
a0b66a73 | 1626 | static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc) |
9411e3aa AS |
1627 | { |
1628 | return 0; | |
1629 | } | |
1630 | ||
a0b66a73 | 1631 | static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc) |
79b804cb MW |
1632 | { |
1633 | return 0; | |
1634 | } | |
a0b66a73 | 1635 | static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc) |
79b804cb | 1636 | { } |
14250520 LW |
1637 | |
1638 | #endif /* CONFIG_GPIOLIB_IRQCHIP */ | |
1639 | ||
c771c2f4 JG |
1640 | /** |
1641 | * gpiochip_generic_request() - request the gpio function for a pin | |
a0b66a73 | 1642 | * @gc: the gpiochip owning the GPIO |
c771c2f4 JG |
1643 | * @offset: the offset of the GPIO to request for GPIO function |
1644 | */ | |
13daf489 | 1645 | int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset) |
c771c2f4 | 1646 | { |
89ad556b | 1647 | #ifdef CONFIG_PINCTRL |
a0b66a73 | 1648 | if (list_empty(&gc->gpiodev->pin_ranges)) |
89ad556b TR |
1649 | return 0; |
1650 | #endif | |
2ab73c6d | 1651 | |
a0b66a73 | 1652 | return pinctrl_gpio_request(gc->gpiodev->base + offset); |
c771c2f4 JG |
1653 | } |
1654 | EXPORT_SYMBOL_GPL(gpiochip_generic_request); | |
1655 | ||
1656 | /** | |
1657 | * gpiochip_generic_free() - free the gpio function from a pin | |
a0b66a73 | 1658 | * @gc: the gpiochip to request the gpio function for |
c771c2f4 JG |
1659 | * @offset: the offset of the GPIO to free from GPIO function |
1660 | */ | |
13daf489 | 1661 | void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset) |
c771c2f4 | 1662 | { |
6dbbf846 EC |
1663 | #ifdef CONFIG_PINCTRL |
1664 | if (list_empty(&gc->gpiodev->pin_ranges)) | |
1665 | return; | |
1666 | #endif | |
1667 | ||
a0b66a73 | 1668 | pinctrl_gpio_free(gc->gpiodev->base + offset); |
c771c2f4 JG |
1669 | } |
1670 | EXPORT_SYMBOL_GPL(gpiochip_generic_free); | |
1671 | ||
2956b5d9 MW |
1672 | /** |
1673 | * gpiochip_generic_config() - apply configuration for a pin | |
a0b66a73 | 1674 | * @gc: the gpiochip owning the GPIO |
2956b5d9 MW |
1675 | * @offset: the offset of the GPIO to apply the configuration |
1676 | * @config: the configuration to be applied | |
1677 | */ | |
13daf489 | 1678 | int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset, |
2956b5d9 MW |
1679 | unsigned long config) |
1680 | { | |
a0b66a73 | 1681 | return pinctrl_gpio_set_config(gc->gpiodev->base + offset, config); |
2956b5d9 MW |
1682 | } |
1683 | EXPORT_SYMBOL_GPL(gpiochip_generic_config); | |
1684 | ||
f23f1516 | 1685 | #ifdef CONFIG_PINCTRL |
165adc9c | 1686 | |
586a87e6 CR |
1687 | /** |
1688 | * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping | |
a0b66a73 | 1689 | * @gc: the gpiochip to add the range for |
d32651f6 | 1690 | * @pctldev: the pin controller to map to |
586a87e6 CR |
1691 | * @gpio_offset: the start offset in the current gpio_chip number space |
1692 | * @pin_group: name of the pin group inside the pin controller | |
973c1714 CL |
1693 | * |
1694 | * Calling this function directly from a DeviceTree-supported | |
1695 | * pinctrl driver is DEPRECATED. Please see Section 2.1 of | |
1696 | * Documentation/devicetree/bindings/gpio/gpio.txt on how to | |
1697 | * bind pinctrl and gpio drivers via the "gpio-ranges" property. | |
586a87e6 | 1698 | */ |
a0b66a73 | 1699 | int gpiochip_add_pingroup_range(struct gpio_chip *gc, |
586a87e6 CR |
1700 | struct pinctrl_dev *pctldev, |
1701 | unsigned int gpio_offset, const char *pin_group) | |
1702 | { | |
1703 | struct gpio_pin_range *pin_range; | |
a0b66a73 | 1704 | struct gpio_device *gdev = gc->gpiodev; |
586a87e6 CR |
1705 | int ret; |
1706 | ||
1707 | pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL); | |
1708 | if (!pin_range) { | |
a0b66a73 | 1709 | chip_err(gc, "failed to allocate pin ranges\n"); |
586a87e6 CR |
1710 | return -ENOMEM; |
1711 | } | |
1712 | ||
1713 | /* Use local offset as range ID */ | |
1714 | pin_range->range.id = gpio_offset; | |
a0b66a73 LW |
1715 | pin_range->range.gc = gc; |
1716 | pin_range->range.name = gc->label; | |
fdeb8e15 | 1717 | pin_range->range.base = gdev->base + gpio_offset; |
586a87e6 CR |
1718 | pin_range->pctldev = pctldev; |
1719 | ||
1720 | ret = pinctrl_get_group_pins(pctldev, pin_group, | |
1721 | &pin_range->range.pins, | |
1722 | &pin_range->range.npins); | |
61c6375d MN |
1723 | if (ret < 0) { |
1724 | kfree(pin_range); | |
586a87e6 | 1725 | return ret; |
61c6375d | 1726 | } |
586a87e6 CR |
1727 | |
1728 | pinctrl_add_gpio_range(pctldev, &pin_range->range); | |
1729 | ||
a0b66a73 | 1730 | chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n", |
1a2a99c6 | 1731 | gpio_offset, gpio_offset + pin_range->range.npins - 1, |
586a87e6 CR |
1732 | pinctrl_dev_get_devname(pctldev), pin_group); |
1733 | ||
20ec3e39 | 1734 | list_add_tail(&pin_range->node, &gdev->pin_ranges); |
586a87e6 CR |
1735 | |
1736 | return 0; | |
1737 | } | |
1738 | EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range); | |
1739 | ||
3f0f8670 LW |
1740 | /** |
1741 | * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping | |
a0b66a73 | 1742 | * @gc: the gpiochip to add the range for |
950d55f5 | 1743 | * @pinctl_name: the dev_name() of the pin controller to map to |
316511c0 LW |
1744 | * @gpio_offset: the start offset in the current gpio_chip number space |
1745 | * @pin_offset: the start offset in the pin controller number space | |
3f0f8670 LW |
1746 | * @npins: the number of pins from the offset of each pin space (GPIO and |
1747 | * pin controller) to accumulate in this range | |
950d55f5 TR |
1748 | * |
1749 | * Returns: | |
1750 | * 0 on success, or a negative error-code on failure. | |
973c1714 CL |
1751 | * |
1752 | * Calling this function directly from a DeviceTree-supported | |
1753 | * pinctrl driver is DEPRECATED. Please see Section 2.1 of | |
1754 | * Documentation/devicetree/bindings/gpio/gpio.txt on how to | |
1755 | * bind pinctrl and gpio drivers via the "gpio-ranges" property. | |
3f0f8670 | 1756 | */ |
a0b66a73 | 1757 | int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name, |
316511c0 | 1758 | unsigned int gpio_offset, unsigned int pin_offset, |
3f0f8670 | 1759 | unsigned int npins) |
f23f1516 SH |
1760 | { |
1761 | struct gpio_pin_range *pin_range; | |
a0b66a73 | 1762 | struct gpio_device *gdev = gc->gpiodev; |
b4d4b1f0 | 1763 | int ret; |
f23f1516 | 1764 | |
3f0f8670 | 1765 | pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL); |
f23f1516 | 1766 | if (!pin_range) { |
a0b66a73 | 1767 | chip_err(gc, "failed to allocate pin ranges\n"); |
1e63d7b9 | 1768 | return -ENOMEM; |
f23f1516 SH |
1769 | } |
1770 | ||
3f0f8670 | 1771 | /* Use local offset as range ID */ |
316511c0 | 1772 | pin_range->range.id = gpio_offset; |
a0b66a73 LW |
1773 | pin_range->range.gc = gc; |
1774 | pin_range->range.name = gc->label; | |
fdeb8e15 | 1775 | pin_range->range.base = gdev->base + gpio_offset; |
316511c0 | 1776 | pin_range->range.pin_base = pin_offset; |
f23f1516 | 1777 | pin_range->range.npins = npins; |
192c369c | 1778 | pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name, |
f23f1516 | 1779 | &pin_range->range); |
8f23ca1a | 1780 | if (IS_ERR(pin_range->pctldev)) { |
b4d4b1f0 | 1781 | ret = PTR_ERR(pin_range->pctldev); |
a0b66a73 | 1782 | chip_err(gc, "could not create pin range\n"); |
3f0f8670 | 1783 | kfree(pin_range); |
b4d4b1f0 | 1784 | return ret; |
3f0f8670 | 1785 | } |
a0b66a73 | 1786 | chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n", |
1a2a99c6 | 1787 | gpio_offset, gpio_offset + npins - 1, |
316511c0 LW |
1788 | pinctl_name, |
1789 | pin_offset, pin_offset + npins - 1); | |
f23f1516 | 1790 | |
20ec3e39 | 1791 | list_add_tail(&pin_range->node, &gdev->pin_ranges); |
1e63d7b9 LW |
1792 | |
1793 | return 0; | |
f23f1516 | 1794 | } |
165adc9c | 1795 | EXPORT_SYMBOL_GPL(gpiochip_add_pin_range); |
f23f1516 | 1796 | |
3f0f8670 LW |
1797 | /** |
1798 | * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings | |
a0b66a73 | 1799 | * @gc: the chip to remove all the mappings for |
3f0f8670 | 1800 | */ |
a0b66a73 | 1801 | void gpiochip_remove_pin_ranges(struct gpio_chip *gc) |
f23f1516 SH |
1802 | { |
1803 | struct gpio_pin_range *pin_range, *tmp; | |
a0b66a73 | 1804 | struct gpio_device *gdev = gc->gpiodev; |
f23f1516 | 1805 | |
20ec3e39 | 1806 | list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) { |
f23f1516 SH |
1807 | list_del(&pin_range->node); |
1808 | pinctrl_remove_gpio_range(pin_range->pctldev, | |
1809 | &pin_range->range); | |
3f0f8670 | 1810 | kfree(pin_range); |
f23f1516 SH |
1811 | } |
1812 | } | |
165adc9c LW |
1813 | EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges); |
1814 | ||
1815 | #endif /* CONFIG_PINCTRL */ | |
f23f1516 | 1816 | |
d2876d08 DB |
1817 | /* These "optional" allocation calls help prevent drivers from stomping |
1818 | * on each other, and help provide better diagnostics in debugfs. | |
1819 | * They're called even less than the "set direction" calls. | |
1820 | */ | |
fac9d885 | 1821 | static int gpiod_request_commit(struct gpio_desc *desc, const char *label) |
d2876d08 | 1822 | { |
a0b66a73 | 1823 | struct gpio_chip *gc = desc->gdev->chip; |
d377f56f | 1824 | int ret; |
d2876d08 | 1825 | unsigned long flags; |
3789f5ac | 1826 | unsigned offset; |
d2876d08 | 1827 | |
18534df4 MS |
1828 | if (label) { |
1829 | label = kstrdup_const(label, GFP_KERNEL); | |
1830 | if (!label) | |
1831 | return -ENOMEM; | |
1832 | } | |
1833 | ||
bcabdef1 AC |
1834 | spin_lock_irqsave(&gpio_lock, flags); |
1835 | ||
d2876d08 | 1836 | /* NOTE: gpio_request() can be called in early boot, |
35e8bb51 | 1837 | * before IRQs are enabled, for non-sleeping (SOC) GPIOs. |
d2876d08 DB |
1838 | */ |
1839 | ||
1840 | if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) { | |
1841 | desc_set_label(desc, label ? : "?"); | |
438d8908 | 1842 | } else { |
d377f56f | 1843 | ret = -EBUSY; |
95d9f84f | 1844 | goto out_free_unlock; |
35e8bb51 DB |
1845 | } |
1846 | ||
a0b66a73 LW |
1847 | if (gc->request) { |
1848 | /* gc->request may sleep */ | |
35e8bb51 | 1849 | spin_unlock_irqrestore(&gpio_lock, flags); |
3789f5ac | 1850 | offset = gpio_chip_hwgpio(desc); |
a0b66a73 LW |
1851 | if (gpiochip_line_is_valid(gc, offset)) |
1852 | ret = gc->request(gc, offset); | |
3789f5ac | 1853 | else |
d377f56f | 1854 | ret = -EINVAL; |
35e8bb51 DB |
1855 | spin_lock_irqsave(&gpio_lock, flags); |
1856 | ||
8bbff39c | 1857 | if (ret) { |
35e8bb51 | 1858 | desc_set_label(desc, NULL); |
35e8bb51 | 1859 | clear_bit(FLAG_REQUESTED, &desc->flags); |
95d9f84f | 1860 | goto out_free_unlock; |
35e8bb51 | 1861 | } |
438d8908 | 1862 | } |
a0b66a73 LW |
1863 | if (gc->get_direction) { |
1864 | /* gc->get_direction may sleep */ | |
80b0a602 | 1865 | spin_unlock_irqrestore(&gpio_lock, flags); |
372e722e | 1866 | gpiod_get_direction(desc); |
80b0a602 MN |
1867 | spin_lock_irqsave(&gpio_lock, flags); |
1868 | } | |
77c2d792 | 1869 | spin_unlock_irqrestore(&gpio_lock, flags); |
95d9f84f AS |
1870 | return 0; |
1871 | ||
1872 | out_free_unlock: | |
1873 | spin_unlock_irqrestore(&gpio_lock, flags); | |
1874 | kfree_const(label); | |
d377f56f | 1875 | return ret; |
77c2d792 MW |
1876 | } |
1877 | ||
fdeb8e15 LW |
1878 | /* |
1879 | * This descriptor validation needs to be inserted verbatim into each | |
1880 | * function taking a descriptor, so we need to use a preprocessor | |
54d77198 LW |
1881 | * macro to avoid endless duplication. If the desc is NULL it is an |
1882 | * optional GPIO and calls should just bail out. | |
fdeb8e15 | 1883 | */ |
a746a232 RV |
1884 | static int validate_desc(const struct gpio_desc *desc, const char *func) |
1885 | { | |
1886 | if (!desc) | |
1887 | return 0; | |
1888 | if (IS_ERR(desc)) { | |
1889 | pr_warn("%s: invalid GPIO (errorpointer)\n", func); | |
1890 | return PTR_ERR(desc); | |
1891 | } | |
1892 | if (!desc->gdev) { | |
1893 | pr_warn("%s: invalid GPIO (no device)\n", func); | |
1894 | return -EINVAL; | |
1895 | } | |
1896 | if (!desc->gdev->chip) { | |
1897 | dev_warn(&desc->gdev->dev, | |
1898 | "%s: backing chip is gone\n", func); | |
1899 | return 0; | |
1900 | } | |
1901 | return 1; | |
1902 | } | |
1903 | ||
fdeb8e15 | 1904 | #define VALIDATE_DESC(desc) do { \ |
a746a232 RV |
1905 | int __valid = validate_desc(desc, __func__); \ |
1906 | if (__valid <= 0) \ | |
1907 | return __valid; \ | |
1908 | } while (0) | |
fdeb8e15 LW |
1909 | |
1910 | #define VALIDATE_DESC_VOID(desc) do { \ | |
a746a232 RV |
1911 | int __valid = validate_desc(desc, __func__); \ |
1912 | if (__valid <= 0) \ | |
fdeb8e15 | 1913 | return; \ |
a746a232 | 1914 | } while (0) |
fdeb8e15 | 1915 | |
0eb4c6c2 | 1916 | int gpiod_request(struct gpio_desc *desc, const char *label) |
77c2d792 | 1917 | { |
d377f56f | 1918 | int ret = -EPROBE_DEFER; |
fdeb8e15 | 1919 | struct gpio_device *gdev; |
77c2d792 | 1920 | |
fdeb8e15 LW |
1921 | VALIDATE_DESC(desc); |
1922 | gdev = desc->gdev; | |
77c2d792 | 1923 | |
fdeb8e15 | 1924 | if (try_module_get(gdev->owner)) { |
d377f56f | 1925 | ret = gpiod_request_commit(desc, label); |
8bbff39c | 1926 | if (ret) |
fdeb8e15 | 1927 | module_put(gdev->owner); |
33a68e86 LW |
1928 | else |
1929 | get_device(&gdev->dev); | |
77c2d792 MW |
1930 | } |
1931 | ||
d377f56f LW |
1932 | if (ret) |
1933 | gpiod_dbg(desc, "%s: status %d\n", __func__, ret); | |
77c2d792 | 1934 | |
d377f56f | 1935 | return ret; |
d2876d08 | 1936 | } |
372e722e | 1937 | |
fac9d885 | 1938 | static bool gpiod_free_commit(struct gpio_desc *desc) |
d2876d08 | 1939 | { |
77c2d792 | 1940 | bool ret = false; |
d2876d08 | 1941 | unsigned long flags; |
a0b66a73 | 1942 | struct gpio_chip *gc; |
d2876d08 | 1943 | |
3d599d1c UKK |
1944 | might_sleep(); |
1945 | ||
372e722e | 1946 | gpiod_unexport(desc); |
d8f388d8 | 1947 | |
d2876d08 DB |
1948 | spin_lock_irqsave(&gpio_lock, flags); |
1949 | ||
a0b66a73 LW |
1950 | gc = desc->gdev->chip; |
1951 | if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) { | |
1952 | if (gc->free) { | |
35e8bb51 | 1953 | spin_unlock_irqrestore(&gpio_lock, flags); |
a0b66a73 LW |
1954 | might_sleep_if(gc->can_sleep); |
1955 | gc->free(gc, gpio_chip_hwgpio(desc)); | |
35e8bb51 DB |
1956 | spin_lock_irqsave(&gpio_lock, flags); |
1957 | } | |
18534df4 | 1958 | kfree_const(desc->label); |
d2876d08 | 1959 | desc_set_label(desc, NULL); |
07697461 | 1960 | clear_bit(FLAG_ACTIVE_LOW, &desc->flags); |
35e8bb51 | 1961 | clear_bit(FLAG_REQUESTED, &desc->flags); |
aca5ce14 | 1962 | clear_bit(FLAG_OPEN_DRAIN, &desc->flags); |
25553ff0 | 1963 | clear_bit(FLAG_OPEN_SOURCE, &desc->flags); |
9225d516 DF |
1964 | clear_bit(FLAG_PULL_UP, &desc->flags); |
1965 | clear_bit(FLAG_PULL_DOWN, &desc->flags); | |
2148ad77 | 1966 | clear_bit(FLAG_BIAS_DISABLE, &desc->flags); |
73e03419 KG |
1967 | clear_bit(FLAG_EDGE_RISING, &desc->flags); |
1968 | clear_bit(FLAG_EDGE_FALLING, &desc->flags); | |
f625d460 | 1969 | clear_bit(FLAG_IS_HOGGED, &desc->flags); |
63636d95 GU |
1970 | #ifdef CONFIG_OF_DYNAMIC |
1971 | desc->hog = NULL; | |
65cff704 KG |
1972 | #endif |
1973 | #ifdef CONFIG_GPIO_CDEV | |
1974 | WRITE_ONCE(desc->debounce_period_us, 0); | |
63636d95 | 1975 | #endif |
77c2d792 MW |
1976 | ret = true; |
1977 | } | |
d2876d08 DB |
1978 | |
1979 | spin_unlock_irqrestore(&gpio_lock, flags); | |
6accc376 KG |
1980 | blocking_notifier_call_chain(&desc->gdev->notifier, |
1981 | GPIOLINE_CHANGED_RELEASED, desc); | |
51c1064e | 1982 | |
77c2d792 MW |
1983 | return ret; |
1984 | } | |
1985 | ||
0eb4c6c2 | 1986 | void gpiod_free(struct gpio_desc *desc) |
77c2d792 | 1987 | { |
fac9d885 | 1988 | if (desc && desc->gdev && gpiod_free_commit(desc)) { |
fdeb8e15 | 1989 | module_put(desc->gdev->owner); |
33a68e86 LW |
1990 | put_device(&desc->gdev->dev); |
1991 | } else { | |
77c2d792 | 1992 | WARN_ON(extra_checks); |
33a68e86 | 1993 | } |
d2876d08 | 1994 | } |
372e722e | 1995 | |
d2876d08 DB |
1996 | /** |
1997 | * gpiochip_is_requested - return string iff signal was requested | |
a0b66a73 | 1998 | * @gc: controller managing the signal |
d2876d08 DB |
1999 | * @offset: of signal within controller's 0..(ngpio - 1) range |
2000 | * | |
2001 | * Returns NULL if the GPIO is not currently requested, else a string. | |
9c8318ff AC |
2002 | * The string returned is the label passed to gpio_request(); if none has been |
2003 | * passed it is a meaningless, non-NULL constant. | |
d2876d08 DB |
2004 | * |
2005 | * This function is for use by GPIO controller drivers. The label can | |
2006 | * help with diagnostics, and knowing that the signal is used as a GPIO | |
2007 | * can help avoid accidentally multiplexing it to another controller. | |
2008 | */ | |
13daf489 | 2009 | const char *gpiochip_is_requested(struct gpio_chip *gc, unsigned int offset) |
d2876d08 | 2010 | { |
6c0b4e6c | 2011 | struct gpio_desc *desc; |
d2876d08 | 2012 | |
a0b66a73 | 2013 | if (offset >= gc->ngpio) |
d2876d08 | 2014 | return NULL; |
6c0b4e6c | 2015 | |
a0b66a73 | 2016 | desc = gpiochip_get_desc(gc, offset); |
1739a2d8 BG |
2017 | if (IS_ERR(desc)) |
2018 | return NULL; | |
6c0b4e6c | 2019 | |
372e722e | 2020 | if (test_bit(FLAG_REQUESTED, &desc->flags) == 0) |
d2876d08 | 2021 | return NULL; |
372e722e | 2022 | return desc->label; |
d2876d08 DB |
2023 | } |
2024 | EXPORT_SYMBOL_GPL(gpiochip_is_requested); | |
2025 | ||
77c2d792 MW |
2026 | /** |
2027 | * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor | |
a0b66a73 | 2028 | * @gc: GPIO chip |
950d55f5 | 2029 | * @hwnum: hardware number of the GPIO for which to request the descriptor |
77c2d792 | 2030 | * @label: label for the GPIO |
5923ea6c LW |
2031 | * @lflags: lookup flags for this GPIO or 0 if default, this can be used to |
2032 | * specify things like line inversion semantics with the machine flags | |
2033 | * such as GPIO_OUT_LOW | |
2034 | * @dflags: descriptor request flags for this GPIO or 0 if default, this | |
2035 | * can be used to specify consumer semantics such as open drain | |
77c2d792 MW |
2036 | * |
2037 | * Function allows GPIO chip drivers to request and use their own GPIO | |
2038 | * descriptors via gpiolib API. Difference to gpiod_request() is that this | |
2039 | * function will not increase reference count of the GPIO chip module. This | |
2040 | * allows the GPIO chip module to be unloaded as needed (we assume that the | |
2041 | * GPIO chip driver handles freeing the GPIOs it has requested). | |
950d55f5 TR |
2042 | * |
2043 | * Returns: | |
2044 | * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error | |
2045 | * code on failure. | |
77c2d792 | 2046 | */ |
a0b66a73 | 2047 | struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc, |
06863620 | 2048 | unsigned int hwnum, |
21abf103 | 2049 | const char *label, |
5923ea6c LW |
2050 | enum gpio_lookup_flags lflags, |
2051 | enum gpiod_flags dflags) | |
77c2d792 | 2052 | { |
a0b66a73 | 2053 | struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum); |
d377f56f | 2054 | int ret; |
77c2d792 | 2055 | |
abdc08a3 | 2056 | if (IS_ERR(desc)) { |
a0b66a73 | 2057 | chip_err(gc, "failed to get GPIO descriptor\n"); |
abdc08a3 AC |
2058 | return desc; |
2059 | } | |
2060 | ||
d377f56f LW |
2061 | ret = gpiod_request_commit(desc, label); |
2062 | if (ret < 0) | |
2063 | return ERR_PTR(ret); | |
77c2d792 | 2064 | |
d377f56f LW |
2065 | ret = gpiod_configure_flags(desc, label, lflags, dflags); |
2066 | if (ret) { | |
a0b66a73 | 2067 | chip_err(gc, "setup of own GPIO %s failed\n", label); |
21abf103 | 2068 | gpiod_free_commit(desc); |
d377f56f | 2069 | return ERR_PTR(ret); |
21abf103 LW |
2070 | } |
2071 | ||
abdc08a3 | 2072 | return desc; |
77c2d792 | 2073 | } |
f7d4ad98 | 2074 | EXPORT_SYMBOL_GPL(gpiochip_request_own_desc); |
77c2d792 MW |
2075 | |
2076 | /** | |
2077 | * gpiochip_free_own_desc - Free GPIO requested by the chip driver | |
2078 | * @desc: GPIO descriptor to free | |
2079 | * | |
2080 | * Function frees the given GPIO requested previously with | |
2081 | * gpiochip_request_own_desc(). | |
2082 | */ | |
2083 | void gpiochip_free_own_desc(struct gpio_desc *desc) | |
2084 | { | |
2085 | if (desc) | |
fac9d885 | 2086 | gpiod_free_commit(desc); |
77c2d792 | 2087 | } |
f7d4ad98 | 2088 | EXPORT_SYMBOL_GPL(gpiochip_free_own_desc); |
d2876d08 | 2089 | |
fdeb8e15 LW |
2090 | /* |
2091 | * Drivers MUST set GPIO direction before making get/set calls. In | |
d2876d08 DB |
2092 | * some cases this is done in early boot, before IRQs are enabled. |
2093 | * | |
2094 | * As a rule these aren't called more than once (except for drivers | |
2095 | * using the open-drain emulation idiom) so these are natural places | |
2096 | * to accumulate extra debugging checks. Note that we can't (yet) | |
2097 | * rely on gpio_request() having been called beforehand. | |
2098 | */ | |
2099 | ||
d99f8876 | 2100 | static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset, |
62adc6f3 | 2101 | unsigned long config) |
71479789 | 2102 | { |
d90f3685 BG |
2103 | if (!gc->set_config) |
2104 | return -ENOTSUPP; | |
542f3615 | 2105 | |
62adc6f3 | 2106 | return gc->set_config(gc, offset, config); |
71479789 TP |
2107 | } |
2108 | ||
0c4d8666 AS |
2109 | static int gpio_set_config_with_argument(struct gpio_desc *desc, |
2110 | enum pin_config_param mode, | |
2111 | u32 argument) | |
d99f8876 | 2112 | { |
a0b66a73 | 2113 | struct gpio_chip *gc = desc->gdev->chip; |
91b4ea5f | 2114 | unsigned long config; |
0c4d8666 AS |
2115 | |
2116 | config = pinconf_to_config_packed(mode, argument); | |
2117 | return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config); | |
2118 | } | |
2119 | ||
baca3b15 AS |
2120 | static int gpio_set_config_with_argument_optional(struct gpio_desc *desc, |
2121 | enum pin_config_param mode, | |
2122 | u32 argument) | |
2123 | { | |
2124 | struct device *dev = &desc->gdev->dev; | |
2125 | int gpio = gpio_chip_hwgpio(desc); | |
2126 | int ret; | |
2127 | ||
2128 | ret = gpio_set_config_with_argument(desc, mode, argument); | |
2129 | if (ret != -ENOTSUPP) | |
2130 | return ret; | |
d99f8876 BG |
2131 | |
2132 | switch (mode) { | |
baca3b15 AS |
2133 | case PIN_CONFIG_PERSIST_STATE: |
2134 | dev_dbg(dev, "Persistence not supported for GPIO %d\n", gpio); | |
d99f8876 | 2135 | break; |
d99f8876 | 2136 | default: |
baca3b15 | 2137 | break; |
d99f8876 BG |
2138 | } |
2139 | ||
baca3b15 AS |
2140 | return 0; |
2141 | } | |
2142 | ||
0c4d8666 AS |
2143 | static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode) |
2144 | { | |
6aa32ad7 | 2145 | return gpio_set_config_with_argument(desc, mode, 0); |
d99f8876 BG |
2146 | } |
2147 | ||
5f4bf171 | 2148 | static int gpio_set_bias(struct gpio_desc *desc) |
2148ad77 | 2149 | { |
9ef6293c | 2150 | enum pin_config_param bias; |
6aa32ad7 | 2151 | unsigned int arg; |
2148ad77 KG |
2152 | |
2153 | if (test_bit(FLAG_BIAS_DISABLE, &desc->flags)) | |
2154 | bias = PIN_CONFIG_BIAS_DISABLE; | |
2155 | else if (test_bit(FLAG_PULL_UP, &desc->flags)) | |
2156 | bias = PIN_CONFIG_BIAS_PULL_UP; | |
2157 | else if (test_bit(FLAG_PULL_DOWN, &desc->flags)) | |
2158 | bias = PIN_CONFIG_BIAS_PULL_DOWN; | |
9ef6293c AS |
2159 | else |
2160 | return 0; | |
2148ad77 | 2161 | |
6aa32ad7 AS |
2162 | switch (bias) { |
2163 | case PIN_CONFIG_BIAS_PULL_DOWN: | |
2164 | case PIN_CONFIG_BIAS_PULL_UP: | |
2165 | arg = 1; | |
2166 | break; | |
2167 | ||
2168 | default: | |
2169 | arg = 0; | |
2170 | break; | |
2148ad77 | 2171 | } |
6aa32ad7 | 2172 | |
baca3b15 | 2173 | return gpio_set_config_with_argument_optional(desc, bias, arg); |
2148ad77 KG |
2174 | } |
2175 | ||
f725edd8 AS |
2176 | int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce) |
2177 | { | |
2178 | return gpio_set_config_with_argument_optional(desc, | |
2179 | PIN_CONFIG_INPUT_DEBOUNCE, | |
2180 | debounce); | |
2148ad77 KG |
2181 | } |
2182 | ||
79a9becd AC |
2183 | /** |
2184 | * gpiod_direction_input - set the GPIO direction to input | |
2185 | * @desc: GPIO to set to input | |
2186 | * | |
2187 | * Set the direction of the passed GPIO to input, such as gpiod_get_value() can | |
2188 | * be called safely on it. | |
2189 | * | |
2190 | * Return 0 in case of success, else an error code. | |
2191 | */ | |
2192 | int gpiod_direction_input(struct gpio_desc *desc) | |
d2876d08 | 2193 | { |
a0b66a73 | 2194 | struct gpio_chip *gc; |
d377f56f | 2195 | int ret = 0; |
d2876d08 | 2196 | |
fdeb8e15 | 2197 | VALIDATE_DESC(desc); |
a0b66a73 | 2198 | gc = desc->gdev->chip; |
bcabdef1 | 2199 | |
e48d194d LW |
2200 | /* |
2201 | * It is legal to have no .get() and .direction_input() specified if | |
2202 | * the chip is output-only, but you can't specify .direction_input() | |
2203 | * and not support the .get() operation, that doesn't make sense. | |
2204 | */ | |
a0b66a73 | 2205 | if (!gc->get && gc->direction_input) { |
6424de5a | 2206 | gpiod_warn(desc, |
e48d194d LW |
2207 | "%s: missing get() but have direction_input()\n", |
2208 | __func__); | |
be1a4b13 LW |
2209 | return -EIO; |
2210 | } | |
2211 | ||
e48d194d LW |
2212 | /* |
2213 | * If we have a .direction_input() callback, things are simple, | |
2214 | * just call it. Else we are some input-only chip so try to check the | |
2215 | * direction (if .get_direction() is supported) else we silently | |
2216 | * assume we are in input mode after this. | |
2217 | */ | |
a0b66a73 LW |
2218 | if (gc->direction_input) { |
2219 | ret = gc->direction_input(gc, gpio_chip_hwgpio(desc)); | |
2220 | } else if (gc->get_direction && | |
2221 | (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) { | |
ae9847f4 | 2222 | gpiod_warn(desc, |
e48d194d LW |
2223 | "%s: missing direction_input() operation and line is output\n", |
2224 | __func__); | |
ae9847f4 RRD |
2225 | return -EIO; |
2226 | } | |
2148ad77 | 2227 | if (ret == 0) { |
d2876d08 | 2228 | clear_bit(FLAG_IS_OUT, &desc->flags); |
5f4bf171 | 2229 | ret = gpio_set_bias(desc); |
2148ad77 | 2230 | } |
d449991c | 2231 | |
d377f56f | 2232 | trace_gpio_direction(desc_to_gpio(desc), 1, ret); |
d82da797 | 2233 | |
d377f56f | 2234 | return ret; |
d2876d08 | 2235 | } |
79a9becd | 2236 | EXPORT_SYMBOL_GPL(gpiod_direction_input); |
372e722e | 2237 | |
fac9d885 | 2238 | static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value) |
d2876d08 | 2239 | { |
c663e5f5 | 2240 | struct gpio_chip *gc = desc->gdev->chip; |
ad17731d | 2241 | int val = !!value; |
ae9847f4 | 2242 | int ret = 0; |
d2876d08 | 2243 | |
e48d194d LW |
2244 | /* |
2245 | * It's OK not to specify .direction_output() if the gpiochip is | |
2246 | * output-only, but if there is then not even a .set() operation it | |
2247 | * is pretty tricky to drive the output line. | |
2248 | */ | |
ae9847f4 | 2249 | if (!gc->set && !gc->direction_output) { |
6424de5a | 2250 | gpiod_warn(desc, |
e48d194d LW |
2251 | "%s: missing set() and direction_output() operations\n", |
2252 | __func__); | |
be1a4b13 LW |
2253 | return -EIO; |
2254 | } | |
2255 | ||
ae9847f4 RRD |
2256 | if (gc->direction_output) { |
2257 | ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val); | |
2258 | } else { | |
e48d194d | 2259 | /* Check that we are in output mode if we can */ |
ae9847f4 RRD |
2260 | if (gc->get_direction && |
2261 | gc->get_direction(gc, gpio_chip_hwgpio(desc))) { | |
2262 | gpiod_warn(desc, | |
2263 | "%s: missing direction_output() operation\n", | |
2264 | __func__); | |
2265 | return -EIO; | |
2266 | } | |
e48d194d LW |
2267 | /* |
2268 | * If we can't actively set the direction, we are some | |
2269 | * output-only chip, so just drive the output as desired. | |
2270 | */ | |
ae9847f4 RRD |
2271 | gc->set(gc, gpio_chip_hwgpio(desc), val); |
2272 | } | |
2273 | ||
c663e5f5 | 2274 | if (!ret) |
d2876d08 | 2275 | set_bit(FLAG_IS_OUT, &desc->flags); |
ad17731d | 2276 | trace_gpio_value(desc_to_gpio(desc), 0, val); |
c663e5f5 LW |
2277 | trace_gpio_direction(desc_to_gpio(desc), 0, ret); |
2278 | return ret; | |
d2876d08 | 2279 | } |
ef70bbe1 PZ |
2280 | |
2281 | /** | |
2282 | * gpiod_direction_output_raw - set the GPIO direction to output | |
2283 | * @desc: GPIO to set to output | |
2284 | * @value: initial output value of the GPIO | |
2285 | * | |
2286 | * Set the direction of the passed GPIO to output, such as gpiod_set_value() can | |
2287 | * be called safely on it. The initial value of the output must be specified | |
2288 | * as raw value on the physical line without regard for the ACTIVE_LOW status. | |
2289 | * | |
2290 | * Return 0 in case of success, else an error code. | |
2291 | */ | |
2292 | int gpiod_direction_output_raw(struct gpio_desc *desc, int value) | |
2293 | { | |
fdeb8e15 | 2294 | VALIDATE_DESC(desc); |
fac9d885 | 2295 | return gpiod_direction_output_raw_commit(desc, value); |
ef70bbe1 PZ |
2296 | } |
2297 | EXPORT_SYMBOL_GPL(gpiod_direction_output_raw); | |
2298 | ||
2299 | /** | |
90df4fe0 | 2300 | * gpiod_direction_output - set the GPIO direction to output |
ef70bbe1 PZ |
2301 | * @desc: GPIO to set to output |
2302 | * @value: initial output value of the GPIO | |
2303 | * | |
2304 | * Set the direction of the passed GPIO to output, such as gpiod_set_value() can | |
2305 | * be called safely on it. The initial value of the output must be specified | |
2306 | * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into | |
2307 | * account. | |
2308 | * | |
2309 | * Return 0 in case of success, else an error code. | |
2310 | */ | |
2311 | int gpiod_direction_output(struct gpio_desc *desc, int value) | |
2312 | { | |
02e47980 LW |
2313 | int ret; |
2314 | ||
fdeb8e15 | 2315 | VALIDATE_DESC(desc); |
ef70bbe1 PZ |
2316 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
2317 | value = !value; | |
ad17731d LW |
2318 | else |
2319 | value = !!value; | |
02e47980 | 2320 | |
4e9439dd HV |
2321 | /* GPIOs used for enabled IRQs shall not be set as output */ |
2322 | if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) && | |
2323 | test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) { | |
02e47980 LW |
2324 | gpiod_err(desc, |
2325 | "%s: tried to set a GPIO tied to an IRQ as output\n", | |
2326 | __func__); | |
2327 | return -EIO; | |
2328 | } | |
2329 | ||
2330 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) { | |
2331 | /* First see if we can enable open drain in hardware */ | |
83522358 | 2332 | ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN); |
02e47980 LW |
2333 | if (!ret) |
2334 | goto set_output_value; | |
2335 | /* Emulate open drain by not actively driving the line high */ | |
e735244e BG |
2336 | if (value) { |
2337 | ret = gpiod_direction_input(desc); | |
2338 | goto set_output_flag; | |
2339 | } | |
02e47980 LW |
2340 | } |
2341 | else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) { | |
83522358 | 2342 | ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE); |
02e47980 LW |
2343 | if (!ret) |
2344 | goto set_output_value; | |
2345 | /* Emulate open source by not actively driving the line low */ | |
e735244e BG |
2346 | if (!value) { |
2347 | ret = gpiod_direction_input(desc); | |
2348 | goto set_output_flag; | |
2349 | } | |
02e47980 | 2350 | } else { |
83522358 | 2351 | gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL); |
02e47980 LW |
2352 | } |
2353 | ||
2354 | set_output_value: | |
5f4bf171 | 2355 | ret = gpio_set_bias(desc); |
2821ae5f KG |
2356 | if (ret) |
2357 | return ret; | |
fac9d885 | 2358 | return gpiod_direction_output_raw_commit(desc, value); |
e735244e BG |
2359 | |
2360 | set_output_flag: | |
2361 | /* | |
2362 | * When emulating open-source or open-drain functionalities by not | |
2363 | * actively driving the line (setting mode to input) we still need to | |
2364 | * set the IS_OUT flag or otherwise we won't be able to set the line | |
2365 | * value anymore. | |
2366 | */ | |
2367 | if (ret == 0) | |
2368 | set_bit(FLAG_IS_OUT, &desc->flags); | |
2369 | return ret; | |
ef70bbe1 | 2370 | } |
79a9becd | 2371 | EXPORT_SYMBOL_GPL(gpiod_direction_output); |
d2876d08 | 2372 | |
8ced32ff GU |
2373 | /** |
2374 | * gpiod_set_config - sets @config for a GPIO | |
2375 | * @desc: descriptor of the GPIO for which to set the configuration | |
2376 | * @config: Same packed config format as generic pinconf | |
2377 | * | |
2378 | * Returns: | |
2379 | * 0 on success, %-ENOTSUPP if the controller doesn't support setting the | |
2380 | * configuration. | |
2381 | */ | |
2382 | int gpiod_set_config(struct gpio_desc *desc, unsigned long config) | |
2383 | { | |
a0b66a73 | 2384 | struct gpio_chip *gc; |
8ced32ff GU |
2385 | |
2386 | VALIDATE_DESC(desc); | |
a0b66a73 | 2387 | gc = desc->gdev->chip; |
8ced32ff | 2388 | |
a0b66a73 | 2389 | return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config); |
8ced32ff GU |
2390 | } |
2391 | EXPORT_SYMBOL_GPL(gpiod_set_config); | |
2392 | ||
c4b5be98 | 2393 | /** |
950d55f5 TR |
2394 | * gpiod_set_debounce - sets @debounce time for a GPIO |
2395 | * @desc: descriptor of the GPIO for which to set debounce time | |
2396 | * @debounce: debounce time in microseconds | |
65d87656 | 2397 | * |
950d55f5 TR |
2398 | * Returns: |
2399 | * 0 on success, %-ENOTSUPP if the controller doesn't support setting the | |
2400 | * debounce time. | |
c4b5be98 | 2401 | */ |
13daf489 | 2402 | int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce) |
c4b5be98 | 2403 | { |
8ced32ff | 2404 | unsigned long config; |
be1a4b13 | 2405 | |
2956b5d9 | 2406 | config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce); |
8ced32ff | 2407 | return gpiod_set_config(desc, config); |
c4b5be98 | 2408 | } |
79a9becd | 2409 | EXPORT_SYMBOL_GPL(gpiod_set_debounce); |
372e722e | 2410 | |
e10f72bf AJ |
2411 | /** |
2412 | * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset | |
2413 | * @desc: descriptor of the GPIO for which to configure persistence | |
2414 | * @transitory: True to lose state on suspend or reset, false for persistence | |
2415 | * | |
2416 | * Returns: | |
2417 | * 0 on success, otherwise a negative error code. | |
2418 | */ | |
2419 | int gpiod_set_transitory(struct gpio_desc *desc, bool transitory) | |
2420 | { | |
156dd392 | 2421 | VALIDATE_DESC(desc); |
e10f72bf AJ |
2422 | /* |
2423 | * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for | |
2424 | * persistence state. | |
2425 | */ | |
4fc5bfeb | 2426 | assign_bit(FLAG_TRANSITORY, &desc->flags, transitory); |
e10f72bf AJ |
2427 | |
2428 | /* If the driver supports it, set the persistence state now */ | |
baca3b15 AS |
2429 | return gpio_set_config_with_argument_optional(desc, |
2430 | PIN_CONFIG_PERSIST_STATE, | |
2431 | !transitory); | |
e10f72bf AJ |
2432 | } |
2433 | EXPORT_SYMBOL_GPL(gpiod_set_transitory); | |
2434 | ||
79a9becd AC |
2435 | /** |
2436 | * gpiod_is_active_low - test whether a GPIO is active-low or not | |
2437 | * @desc: the gpio descriptor to test | |
2438 | * | |
2439 | * Returns 1 if the GPIO is active-low, 0 otherwise. | |
2440 | */ | |
2441 | int gpiod_is_active_low(const struct gpio_desc *desc) | |
372e722e | 2442 | { |
fdeb8e15 | 2443 | VALIDATE_DESC(desc); |
79a9becd | 2444 | return test_bit(FLAG_ACTIVE_LOW, &desc->flags); |
372e722e | 2445 | } |
79a9becd | 2446 | EXPORT_SYMBOL_GPL(gpiod_is_active_low); |
d2876d08 | 2447 | |
d3a5bcb4 MM |
2448 | /** |
2449 | * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not | |
2450 | * @desc: the gpio descriptor to change | |
2451 | */ | |
2452 | void gpiod_toggle_active_low(struct gpio_desc *desc) | |
2453 | { | |
2454 | VALIDATE_DESC_VOID(desc); | |
2455 | change_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
2456 | } | |
2457 | EXPORT_SYMBOL_GPL(gpiod_toggle_active_low); | |
2458 | ||
d2876d08 DB |
2459 | /* I/O calls are only valid after configuration completed; the relevant |
2460 | * "is this a valid GPIO" error checks should already have been done. | |
2461 | * | |
2462 | * "Get" operations are often inlinable as reading a pin value register, | |
2463 | * and masking the relevant bit in that register. | |
2464 | * | |
2465 | * When "set" operations are inlinable, they involve writing that mask to | |
2466 | * one register to set a low value, or a different register to set it high. | |
2467 | * Otherwise locking is needed, so there may be little value to inlining. | |
2468 | * | |
2469 | *------------------------------------------------------------------------ | |
2470 | * | |
2471 | * IMPORTANT!!! The hot paths -- get/set value -- assume that callers | |
2472 | * have requested the GPIO. That can include implicit requesting by | |
2473 | * a direction setting call. Marking a gpio as requested locks its chip | |
2474 | * in memory, guaranteeing that these table lookups need no more locking | |
2475 | * and that gpiochip_remove() will fail. | |
2476 | * | |
2477 | * REVISIT when debugging, consider adding some instrumentation to ensure | |
2478 | * that the GPIO was actually requested. | |
2479 | */ | |
2480 | ||
fac9d885 | 2481 | static int gpiod_get_raw_value_commit(const struct gpio_desc *desc) |
d2876d08 | 2482 | { |
a0b66a73 | 2483 | struct gpio_chip *gc; |
372e722e | 2484 | int offset; |
e20538b8 | 2485 | int value; |
d2876d08 | 2486 | |
a0b66a73 | 2487 | gc = desc->gdev->chip; |
372e722e | 2488 | offset = gpio_chip_hwgpio(desc); |
a0b66a73 | 2489 | value = gc->get ? gc->get(gc, offset) : -EIO; |
723a6303 | 2490 | value = value < 0 ? value : !!value; |
372e722e | 2491 | trace_gpio_value(desc_to_gpio(desc), 1, value); |
3f397c21 | 2492 | return value; |
d2876d08 | 2493 | } |
372e722e | 2494 | |
a0b66a73 | 2495 | static int gpio_chip_get_multiple(struct gpio_chip *gc, |
eec1d566 LW |
2496 | unsigned long *mask, unsigned long *bits) |
2497 | { | |
a0b66a73 LW |
2498 | if (gc->get_multiple) { |
2499 | return gc->get_multiple(gc, mask, bits); | |
2500 | } else if (gc->get) { | |
eec1d566 LW |
2501 | int i, value; |
2502 | ||
a0b66a73 LW |
2503 | for_each_set_bit(i, mask, gc->ngpio) { |
2504 | value = gc->get(gc, i); | |
eec1d566 LW |
2505 | if (value < 0) |
2506 | return value; | |
2507 | __assign_bit(i, bits, value); | |
2508 | } | |
2509 | return 0; | |
2510 | } | |
2511 | return -EIO; | |
2512 | } | |
2513 | ||
2514 | int gpiod_get_array_value_complex(bool raw, bool can_sleep, | |
2515 | unsigned int array_size, | |
2516 | struct gpio_desc **desc_array, | |
77588c14 | 2517 | struct gpio_array *array_info, |
b9762beb | 2518 | unsigned long *value_bitmap) |
eec1d566 | 2519 | { |
d377f56f | 2520 | int ret, i = 0; |
b17566a6 JK |
2521 | |
2522 | /* | |
2523 | * Validate array_info against desc_array and its size. | |
2524 | * It should immediately follow desc_array if both | |
2525 | * have been obtained from the same gpiod_get_array() call. | |
2526 | */ | |
2527 | if (array_info && array_info->desc == desc_array && | |
2528 | array_size <= array_info->size && | |
2529 | (void *)array_info == desc_array + array_info->size) { | |
2530 | if (!can_sleep) | |
2531 | WARN_ON(array_info->chip->can_sleep); | |
2532 | ||
d377f56f | 2533 | ret = gpio_chip_get_multiple(array_info->chip, |
b17566a6 JK |
2534 | array_info->get_mask, |
2535 | value_bitmap); | |
d377f56f LW |
2536 | if (ret) |
2537 | return ret; | |
b17566a6 JK |
2538 | |
2539 | if (!raw && !bitmap_empty(array_info->invert_mask, array_size)) | |
2540 | bitmap_xor(value_bitmap, value_bitmap, | |
2541 | array_info->invert_mask, array_size); | |
2542 | ||
b17566a6 | 2543 | i = find_first_zero_bit(array_info->get_mask, array_size); |
ae66eca0 AS |
2544 | if (i == array_size) |
2545 | return 0; | |
b17566a6 JK |
2546 | } else { |
2547 | array_info = NULL; | |
2548 | } | |
eec1d566 LW |
2549 | |
2550 | while (i < array_size) { | |
a0b66a73 | 2551 | struct gpio_chip *gc = desc_array[i]->gdev->chip; |
3027743f LA |
2552 | unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)]; |
2553 | unsigned long *mask, *bits; | |
eec1d566 LW |
2554 | int first, j, ret; |
2555 | ||
a0b66a73 | 2556 | if (likely(gc->ngpio <= FASTPATH_NGPIO)) { |
3027743f LA |
2557 | mask = fastpath; |
2558 | } else { | |
a0b66a73 | 2559 | mask = kmalloc_array(2 * BITS_TO_LONGS(gc->ngpio), |
3027743f LA |
2560 | sizeof(*mask), |
2561 | can_sleep ? GFP_KERNEL : GFP_ATOMIC); | |
2562 | if (!mask) | |
2563 | return -ENOMEM; | |
2564 | } | |
2565 | ||
a0b66a73 LW |
2566 | bits = mask + BITS_TO_LONGS(gc->ngpio); |
2567 | bitmap_zero(mask, gc->ngpio); | |
3027743f | 2568 | |
eec1d566 | 2569 | if (!can_sleep) |
a0b66a73 | 2570 | WARN_ON(gc->can_sleep); |
eec1d566 LW |
2571 | |
2572 | /* collect all inputs belonging to the same chip */ | |
2573 | first = i; | |
eec1d566 LW |
2574 | do { |
2575 | const struct gpio_desc *desc = desc_array[i]; | |
2576 | int hwgpio = gpio_chip_hwgpio(desc); | |
2577 | ||
2578 | __set_bit(hwgpio, mask); | |
2579 | i++; | |
b17566a6 JK |
2580 | |
2581 | if (array_info) | |
35ae7f96 JK |
2582 | i = find_next_zero_bit(array_info->get_mask, |
2583 | array_size, i); | |
eec1d566 | 2584 | } while ((i < array_size) && |
a0b66a73 | 2585 | (desc_array[i]->gdev->chip == gc)); |
eec1d566 | 2586 | |
a0b66a73 | 2587 | ret = gpio_chip_get_multiple(gc, mask, bits); |
3027743f LA |
2588 | if (ret) { |
2589 | if (mask != fastpath) | |
2590 | kfree(mask); | |
eec1d566 | 2591 | return ret; |
3027743f | 2592 | } |
eec1d566 | 2593 | |
b17566a6 | 2594 | for (j = first; j < i; ) { |
eec1d566 LW |
2595 | const struct gpio_desc *desc = desc_array[j]; |
2596 | int hwgpio = gpio_chip_hwgpio(desc); | |
2597 | int value = test_bit(hwgpio, bits); | |
2598 | ||
2599 | if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
2600 | value = !value; | |
b9762beb | 2601 | __assign_bit(j, value_bitmap, value); |
eec1d566 | 2602 | trace_gpio_value(desc_to_gpio(desc), 1, value); |
799d5eb4 | 2603 | j++; |
b17566a6 JK |
2604 | |
2605 | if (array_info) | |
35ae7f96 JK |
2606 | j = find_next_zero_bit(array_info->get_mask, i, |
2607 | j); | |
eec1d566 | 2608 | } |
3027743f LA |
2609 | |
2610 | if (mask != fastpath) | |
2611 | kfree(mask); | |
eec1d566 LW |
2612 | } |
2613 | return 0; | |
2614 | } | |
2615 | ||
d2876d08 | 2616 | /** |
79a9becd AC |
2617 | * gpiod_get_raw_value() - return a gpio's raw value |
2618 | * @desc: gpio whose value will be returned | |
d2876d08 | 2619 | * |
79a9becd | 2620 | * Return the GPIO's raw value, i.e. the value of the physical line disregarding |
e20538b8 | 2621 | * its ACTIVE_LOW status, or negative errno on failure. |
79a9becd | 2622 | * |
827a9b8b | 2623 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 2624 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 2625 | */ |
79a9becd | 2626 | int gpiod_get_raw_value(const struct gpio_desc *desc) |
d2876d08 | 2627 | { |
fdeb8e15 | 2628 | VALIDATE_DESC(desc); |
3285170f | 2629 | /* Should be using gpiod_get_raw_value_cansleep() */ |
fdeb8e15 | 2630 | WARN_ON(desc->gdev->chip->can_sleep); |
fac9d885 | 2631 | return gpiod_get_raw_value_commit(desc); |
d2876d08 | 2632 | } |
79a9becd | 2633 | EXPORT_SYMBOL_GPL(gpiod_get_raw_value); |
372e722e | 2634 | |
79a9becd AC |
2635 | /** |
2636 | * gpiod_get_value() - return a gpio's value | |
2637 | * @desc: gpio whose value will be returned | |
2638 | * | |
2639 | * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into | |
e20538b8 | 2640 | * account, or negative errno on failure. |
79a9becd | 2641 | * |
827a9b8b | 2642 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd AC |
2643 | * complain if the GPIO chip functions potentially sleep. |
2644 | */ | |
2645 | int gpiod_get_value(const struct gpio_desc *desc) | |
372e722e | 2646 | { |
79a9becd | 2647 | int value; |
fdeb8e15 LW |
2648 | |
2649 | VALIDATE_DESC(desc); | |
3285170f | 2650 | /* Should be using gpiod_get_value_cansleep() */ |
fdeb8e15 | 2651 | WARN_ON(desc->gdev->chip->can_sleep); |
79a9becd | 2652 | |
fac9d885 | 2653 | value = gpiod_get_raw_value_commit(desc); |
e20538b8 BA |
2654 | if (value < 0) |
2655 | return value; | |
2656 | ||
79a9becd AC |
2657 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
2658 | value = !value; | |
2659 | ||
2660 | return value; | |
372e722e | 2661 | } |
79a9becd | 2662 | EXPORT_SYMBOL_GPL(gpiod_get_value); |
d2876d08 | 2663 | |
eec1d566 LW |
2664 | /** |
2665 | * gpiod_get_raw_array_value() - read raw values from an array of GPIOs | |
b9762beb | 2666 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 2667 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 2668 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 2669 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
2670 | * |
2671 | * Read the raw values of the GPIOs, i.e. the values of the physical lines | |
2672 | * without regard for their ACTIVE_LOW status. Return 0 in case of success, | |
2673 | * else an error code. | |
2674 | * | |
827a9b8b | 2675 | * This function can be called from contexts where we cannot sleep, |
eec1d566 LW |
2676 | * and it will complain if the GPIO chip functions potentially sleep. |
2677 | */ | |
2678 | int gpiod_get_raw_array_value(unsigned int array_size, | |
b9762beb | 2679 | struct gpio_desc **desc_array, |
77588c14 | 2680 | struct gpio_array *array_info, |
b9762beb | 2681 | unsigned long *value_bitmap) |
eec1d566 LW |
2682 | { |
2683 | if (!desc_array) | |
2684 | return -EINVAL; | |
2685 | return gpiod_get_array_value_complex(true, false, array_size, | |
77588c14 JK |
2686 | desc_array, array_info, |
2687 | value_bitmap); | |
eec1d566 LW |
2688 | } |
2689 | EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value); | |
2690 | ||
2691 | /** | |
2692 | * gpiod_get_array_value() - read values from an array of GPIOs | |
b9762beb | 2693 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 2694 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 2695 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 2696 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
2697 | * |
2698 | * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
2699 | * into account. Return 0 in case of success, else an error code. | |
2700 | * | |
827a9b8b | 2701 | * This function can be called from contexts where we cannot sleep, |
eec1d566 LW |
2702 | * and it will complain if the GPIO chip functions potentially sleep. |
2703 | */ | |
2704 | int gpiod_get_array_value(unsigned int array_size, | |
b9762beb | 2705 | struct gpio_desc **desc_array, |
77588c14 | 2706 | struct gpio_array *array_info, |
b9762beb | 2707 | unsigned long *value_bitmap) |
eec1d566 LW |
2708 | { |
2709 | if (!desc_array) | |
2710 | return -EINVAL; | |
2711 | return gpiod_get_array_value_complex(false, false, array_size, | |
77588c14 JK |
2712 | desc_array, array_info, |
2713 | value_bitmap); | |
eec1d566 LW |
2714 | } |
2715 | EXPORT_SYMBOL_GPL(gpiod_get_array_value); | |
2716 | ||
aca5ce14 | 2717 | /* |
fac9d885 | 2718 | * gpio_set_open_drain_value_commit() - Set the open drain gpio's value. |
79a9becd | 2719 | * @desc: gpio descriptor whose state need to be set. |
20a8a968 | 2720 | * @value: Non-zero for setting it HIGH otherwise it will set to LOW. |
aca5ce14 | 2721 | */ |
fac9d885 | 2722 | static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value) |
aca5ce14 | 2723 | { |
d377f56f | 2724 | int ret = 0; |
a0b66a73 | 2725 | struct gpio_chip *gc = desc->gdev->chip; |
372e722e AC |
2726 | int offset = gpio_chip_hwgpio(desc); |
2727 | ||
aca5ce14 | 2728 | if (value) { |
a0b66a73 | 2729 | ret = gc->direction_input(gc, offset); |
aca5ce14 | 2730 | } else { |
a0b66a73 | 2731 | ret = gc->direction_output(gc, offset, 0); |
d377f56f | 2732 | if (!ret) |
372e722e | 2733 | set_bit(FLAG_IS_OUT, &desc->flags); |
aca5ce14 | 2734 | } |
d377f56f LW |
2735 | trace_gpio_direction(desc_to_gpio(desc), value, ret); |
2736 | if (ret < 0) | |
6424de5a MB |
2737 | gpiod_err(desc, |
2738 | "%s: Error in set_value for open drain err %d\n", | |
d377f56f | 2739 | __func__, ret); |
aca5ce14 LD |
2740 | } |
2741 | ||
25553ff0 | 2742 | /* |
79a9becd AC |
2743 | * _gpio_set_open_source_value() - Set the open source gpio's value. |
2744 | * @desc: gpio descriptor whose state need to be set. | |
20a8a968 | 2745 | * @value: Non-zero for setting it HIGH otherwise it will set to LOW. |
25553ff0 | 2746 | */ |
fac9d885 | 2747 | static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value) |
25553ff0 | 2748 | { |
d377f56f | 2749 | int ret = 0; |
a0b66a73 | 2750 | struct gpio_chip *gc = desc->gdev->chip; |
372e722e AC |
2751 | int offset = gpio_chip_hwgpio(desc); |
2752 | ||
25553ff0 | 2753 | if (value) { |
a0b66a73 | 2754 | ret = gc->direction_output(gc, offset, 1); |
d377f56f | 2755 | if (!ret) |
372e722e | 2756 | set_bit(FLAG_IS_OUT, &desc->flags); |
25553ff0 | 2757 | } else { |
a0b66a73 | 2758 | ret = gc->direction_input(gc, offset); |
25553ff0 | 2759 | } |
d377f56f LW |
2760 | trace_gpio_direction(desc_to_gpio(desc), !value, ret); |
2761 | if (ret < 0) | |
6424de5a MB |
2762 | gpiod_err(desc, |
2763 | "%s: Error in set_value for open source err %d\n", | |
d377f56f | 2764 | __func__, ret); |
25553ff0 LD |
2765 | } |
2766 | ||
fac9d885 | 2767 | static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value) |
d2876d08 | 2768 | { |
a0b66a73 | 2769 | struct gpio_chip *gc; |
d2876d08 | 2770 | |
a0b66a73 | 2771 | gc = desc->gdev->chip; |
372e722e | 2772 | trace_gpio_value(desc_to_gpio(desc), 0, value); |
a0b66a73 | 2773 | gc->set(gc, gpio_chip_hwgpio(desc), value); |
372e722e AC |
2774 | } |
2775 | ||
5f424243 RI |
2776 | /* |
2777 | * set multiple outputs on the same chip; | |
2778 | * use the chip's set_multiple function if available; | |
2779 | * otherwise set the outputs sequentially; | |
a0b66a73 | 2780 | * @chip: the GPIO chip we operate on |
5f424243 RI |
2781 | * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word |
2782 | * defines which outputs are to be changed | |
2783 | * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word | |
2784 | * defines the values the outputs specified by mask are to be set to | |
2785 | */ | |
a0b66a73 | 2786 | static void gpio_chip_set_multiple(struct gpio_chip *gc, |
5f424243 RI |
2787 | unsigned long *mask, unsigned long *bits) |
2788 | { | |
a0b66a73 LW |
2789 | if (gc->set_multiple) { |
2790 | gc->set_multiple(gc, mask, bits); | |
5f424243 | 2791 | } else { |
5e4e6fb3 AS |
2792 | unsigned int i; |
2793 | ||
2794 | /* set outputs if the corresponding mask bit is set */ | |
a0b66a73 LW |
2795 | for_each_set_bit(i, mask, gc->ngpio) |
2796 | gc->set(gc, i, test_bit(i, bits)); | |
5f424243 RI |
2797 | } |
2798 | } | |
2799 | ||
3027743f | 2800 | int gpiod_set_array_value_complex(bool raw, bool can_sleep, |
3c940660 GU |
2801 | unsigned int array_size, |
2802 | struct gpio_desc **desc_array, | |
2803 | struct gpio_array *array_info, | |
2804 | unsigned long *value_bitmap) | |
5f424243 RI |
2805 | { |
2806 | int i = 0; | |
2807 | ||
b17566a6 JK |
2808 | /* |
2809 | * Validate array_info against desc_array and its size. | |
2810 | * It should immediately follow desc_array if both | |
2811 | * have been obtained from the same gpiod_get_array() call. | |
2812 | */ | |
2813 | if (array_info && array_info->desc == desc_array && | |
2814 | array_size <= array_info->size && | |
2815 | (void *)array_info == desc_array + array_info->size) { | |
2816 | if (!can_sleep) | |
2817 | WARN_ON(array_info->chip->can_sleep); | |
2818 | ||
2819 | if (!raw && !bitmap_empty(array_info->invert_mask, array_size)) | |
2820 | bitmap_xor(value_bitmap, value_bitmap, | |
2821 | array_info->invert_mask, array_size); | |
2822 | ||
2823 | gpio_chip_set_multiple(array_info->chip, array_info->set_mask, | |
2824 | value_bitmap); | |
2825 | ||
b17566a6 | 2826 | i = find_first_zero_bit(array_info->set_mask, array_size); |
ae66eca0 AS |
2827 | if (i == array_size) |
2828 | return 0; | |
b17566a6 JK |
2829 | } else { |
2830 | array_info = NULL; | |
2831 | } | |
2832 | ||
5f424243 | 2833 | while (i < array_size) { |
a0b66a73 | 2834 | struct gpio_chip *gc = desc_array[i]->gdev->chip; |
3027743f LA |
2835 | unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)]; |
2836 | unsigned long *mask, *bits; | |
5f424243 RI |
2837 | int count = 0; |
2838 | ||
a0b66a73 | 2839 | if (likely(gc->ngpio <= FASTPATH_NGPIO)) { |
3027743f LA |
2840 | mask = fastpath; |
2841 | } else { | |
a0b66a73 | 2842 | mask = kmalloc_array(2 * BITS_TO_LONGS(gc->ngpio), |
3027743f LA |
2843 | sizeof(*mask), |
2844 | can_sleep ? GFP_KERNEL : GFP_ATOMIC); | |
2845 | if (!mask) | |
2846 | return -ENOMEM; | |
2847 | } | |
2848 | ||
a0b66a73 LW |
2849 | bits = mask + BITS_TO_LONGS(gc->ngpio); |
2850 | bitmap_zero(mask, gc->ngpio); | |
3027743f | 2851 | |
38e003f4 | 2852 | if (!can_sleep) |
a0b66a73 | 2853 | WARN_ON(gc->can_sleep); |
38e003f4 | 2854 | |
5f424243 RI |
2855 | do { |
2856 | struct gpio_desc *desc = desc_array[i]; | |
2857 | int hwgpio = gpio_chip_hwgpio(desc); | |
b9762beb | 2858 | int value = test_bit(i, value_bitmap); |
5f424243 | 2859 | |
b17566a6 JK |
2860 | /* |
2861 | * Pins applicable for fast input but not for | |
2862 | * fast output processing may have been already | |
2863 | * inverted inside the fast path, skip them. | |
2864 | */ | |
2865 | if (!raw && !(array_info && | |
2866 | test_bit(i, array_info->invert_mask)) && | |
2867 | test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
5f424243 RI |
2868 | value = !value; |
2869 | trace_gpio_value(desc_to_gpio(desc), 0, value); | |
2870 | /* | |
2871 | * collect all normal outputs belonging to the same chip | |
2872 | * open drain and open source outputs are set individually | |
2873 | */ | |
02e47980 | 2874 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) { |
fac9d885 | 2875 | gpio_set_open_drain_value_commit(desc, value); |
02e47980 | 2876 | } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) { |
fac9d885 | 2877 | gpio_set_open_source_value_commit(desc, value); |
5f424243 RI |
2878 | } else { |
2879 | __set_bit(hwgpio, mask); | |
4fc5bfeb | 2880 | __assign_bit(hwgpio, bits, value); |
5f424243 RI |
2881 | count++; |
2882 | } | |
2883 | i++; | |
b17566a6 JK |
2884 | |
2885 | if (array_info) | |
35ae7f96 JK |
2886 | i = find_next_zero_bit(array_info->set_mask, |
2887 | array_size, i); | |
fdeb8e15 | 2888 | } while ((i < array_size) && |
a0b66a73 | 2889 | (desc_array[i]->gdev->chip == gc)); |
5f424243 | 2890 | /* push collected bits to outputs */ |
38e003f4 | 2891 | if (count != 0) |
a0b66a73 | 2892 | gpio_chip_set_multiple(gc, mask, bits); |
3027743f LA |
2893 | |
2894 | if (mask != fastpath) | |
2895 | kfree(mask); | |
5f424243 | 2896 | } |
3027743f | 2897 | return 0; |
5f424243 RI |
2898 | } |
2899 | ||
d2876d08 | 2900 | /** |
79a9becd AC |
2901 | * gpiod_set_raw_value() - assign a gpio's raw value |
2902 | * @desc: gpio whose value will be assigned | |
d2876d08 | 2903 | * @value: value to assign |
d2876d08 | 2904 | * |
79a9becd AC |
2905 | * Set the raw value of the GPIO, i.e. the value of its physical line without |
2906 | * regard for its ACTIVE_LOW status. | |
2907 | * | |
827a9b8b | 2908 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 2909 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 2910 | */ |
79a9becd | 2911 | void gpiod_set_raw_value(struct gpio_desc *desc, int value) |
372e722e | 2912 | { |
fdeb8e15 | 2913 | VALIDATE_DESC_VOID(desc); |
3285170f | 2914 | /* Should be using gpiod_set_raw_value_cansleep() */ |
fdeb8e15 | 2915 | WARN_ON(desc->gdev->chip->can_sleep); |
fac9d885 | 2916 | gpiod_set_raw_value_commit(desc, value); |
d2876d08 | 2917 | } |
79a9becd | 2918 | EXPORT_SYMBOL_GPL(gpiod_set_raw_value); |
d2876d08 | 2919 | |
1e77fc82 GU |
2920 | /** |
2921 | * gpiod_set_value_nocheck() - set a GPIO line value without checking | |
2922 | * @desc: the descriptor to set the value on | |
2923 | * @value: value to set | |
2924 | * | |
2925 | * This sets the value of a GPIO line backing a descriptor, applying | |
2926 | * different semantic quirks like active low and open drain/source | |
2927 | * handling. | |
2928 | */ | |
2929 | static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value) | |
2930 | { | |
2931 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
2932 | value = !value; | |
2933 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) | |
2934 | gpio_set_open_drain_value_commit(desc, value); | |
2935 | else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) | |
2936 | gpio_set_open_source_value_commit(desc, value); | |
2937 | else | |
2938 | gpiod_set_raw_value_commit(desc, value); | |
2939 | } | |
2940 | ||
d2876d08 | 2941 | /** |
79a9becd AC |
2942 | * gpiod_set_value() - assign a gpio's value |
2943 | * @desc: gpio whose value will be assigned | |
2944 | * @value: value to assign | |
2945 | * | |
02e47980 LW |
2946 | * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW, |
2947 | * OPEN_DRAIN and OPEN_SOURCE flags into account. | |
d2876d08 | 2948 | * |
827a9b8b | 2949 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 2950 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 2951 | */ |
79a9becd | 2952 | void gpiod_set_value(struct gpio_desc *desc, int value) |
d2876d08 | 2953 | { |
fdeb8e15 | 2954 | VALIDATE_DESC_VOID(desc); |
3285170f | 2955 | /* Should be using gpiod_set_value_cansleep() */ |
fdeb8e15 | 2956 | WARN_ON(desc->gdev->chip->can_sleep); |
1e77fc82 | 2957 | gpiod_set_value_nocheck(desc, value); |
372e722e | 2958 | } |
79a9becd | 2959 | EXPORT_SYMBOL_GPL(gpiod_set_value); |
d2876d08 | 2960 | |
5f424243 | 2961 | /** |
3fff99bc | 2962 | * gpiod_set_raw_array_value() - assign values to an array of GPIOs |
b9762beb | 2963 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 2964 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 2965 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 2966 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
2967 | * |
2968 | * Set the raw values of the GPIOs, i.e. the values of the physical lines | |
2969 | * without regard for their ACTIVE_LOW status. | |
2970 | * | |
827a9b8b | 2971 | * This function can be called from contexts where we cannot sleep, and will |
5f424243 RI |
2972 | * complain if the GPIO chip functions potentially sleep. |
2973 | */ | |
3027743f | 2974 | int gpiod_set_raw_array_value(unsigned int array_size, |
3c940660 GU |
2975 | struct gpio_desc **desc_array, |
2976 | struct gpio_array *array_info, | |
2977 | unsigned long *value_bitmap) | |
5f424243 RI |
2978 | { |
2979 | if (!desc_array) | |
3027743f LA |
2980 | return -EINVAL; |
2981 | return gpiod_set_array_value_complex(true, false, array_size, | |
77588c14 | 2982 | desc_array, array_info, value_bitmap); |
5f424243 | 2983 | } |
3fff99bc | 2984 | EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value); |
5f424243 RI |
2985 | |
2986 | /** | |
3fff99bc | 2987 | * gpiod_set_array_value() - assign values to an array of GPIOs |
b9762beb | 2988 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 2989 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 2990 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 2991 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
2992 | * |
2993 | * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
2994 | * into account. | |
2995 | * | |
827a9b8b | 2996 | * This function can be called from contexts where we cannot sleep, and will |
5f424243 RI |
2997 | * complain if the GPIO chip functions potentially sleep. |
2998 | */ | |
cf9af0d5 GU |
2999 | int gpiod_set_array_value(unsigned int array_size, |
3000 | struct gpio_desc **desc_array, | |
3001 | struct gpio_array *array_info, | |
3002 | unsigned long *value_bitmap) | |
5f424243 RI |
3003 | { |
3004 | if (!desc_array) | |
cf9af0d5 GU |
3005 | return -EINVAL; |
3006 | return gpiod_set_array_value_complex(false, false, array_size, | |
3007 | desc_array, array_info, | |
3008 | value_bitmap); | |
5f424243 | 3009 | } |
3fff99bc | 3010 | EXPORT_SYMBOL_GPL(gpiod_set_array_value); |
5f424243 | 3011 | |
d2876d08 | 3012 | /** |
79a9becd AC |
3013 | * gpiod_cansleep() - report whether gpio value access may sleep |
3014 | * @desc: gpio to check | |
d2876d08 | 3015 | * |
d2876d08 | 3016 | */ |
79a9becd | 3017 | int gpiod_cansleep(const struct gpio_desc *desc) |
372e722e | 3018 | { |
fdeb8e15 LW |
3019 | VALIDATE_DESC(desc); |
3020 | return desc->gdev->chip->can_sleep; | |
d2876d08 | 3021 | } |
79a9becd | 3022 | EXPORT_SYMBOL_GPL(gpiod_cansleep); |
d2876d08 | 3023 | |
90b39402 LW |
3024 | /** |
3025 | * gpiod_set_consumer_name() - set the consumer name for the descriptor | |
3026 | * @desc: gpio to set the consumer name on | |
3027 | * @name: the new consumer name | |
3028 | */ | |
18534df4 | 3029 | int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name) |
90b39402 | 3030 | { |
18534df4 MS |
3031 | VALIDATE_DESC(desc); |
3032 | if (name) { | |
3033 | name = kstrdup_const(name, GFP_KERNEL); | |
3034 | if (!name) | |
3035 | return -ENOMEM; | |
3036 | } | |
3037 | ||
3038 | kfree_const(desc->label); | |
3039 | desc_set_label(desc, name); | |
3040 | ||
3041 | return 0; | |
90b39402 LW |
3042 | } |
3043 | EXPORT_SYMBOL_GPL(gpiod_set_consumer_name); | |
3044 | ||
0f6d504e | 3045 | /** |
79a9becd AC |
3046 | * gpiod_to_irq() - return the IRQ corresponding to a GPIO |
3047 | * @desc: gpio whose IRQ will be returned (already requested) | |
0f6d504e | 3048 | * |
79a9becd AC |
3049 | * Return the IRQ corresponding to the passed GPIO, or an error code in case of |
3050 | * error. | |
0f6d504e | 3051 | */ |
79a9becd | 3052 | int gpiod_to_irq(const struct gpio_desc *desc) |
0f6d504e | 3053 | { |
a0b66a73 | 3054 | struct gpio_chip *gc; |
4c37ce86 | 3055 | int offset; |
0f6d504e | 3056 | |
79bb71bd LW |
3057 | /* |
3058 | * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics | |
3059 | * requires this function to not return zero on an invalid descriptor | |
3060 | * but rather a negative error number. | |
3061 | */ | |
bfbbe44d | 3062 | if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip) |
79bb71bd LW |
3063 | return -EINVAL; |
3064 | ||
a0b66a73 | 3065 | gc = desc->gdev->chip; |
372e722e | 3066 | offset = gpio_chip_hwgpio(desc); |
a0b66a73 LW |
3067 | if (gc->to_irq) { |
3068 | int retirq = gc->to_irq(gc, offset); | |
4c37ce86 LW |
3069 | |
3070 | /* Zero means NO_IRQ */ | |
3071 | if (!retirq) | |
3072 | return -ENXIO; | |
3073 | ||
3074 | return retirq; | |
3075 | } | |
3076 | return -ENXIO; | |
0f6d504e | 3077 | } |
79a9becd | 3078 | EXPORT_SYMBOL_GPL(gpiod_to_irq); |
0f6d504e | 3079 | |
d468bf9e | 3080 | /** |
e3a2e878 | 3081 | * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ |
a0b66a73 | 3082 | * @gc: the chip the GPIO to lock belongs to |
d74be6df | 3083 | * @offset: the offset of the GPIO to lock as IRQ |
d468bf9e LW |
3084 | * |
3085 | * This is used directly by GPIO drivers that want to lock down | |
f438acdf | 3086 | * a certain GPIO line to be used for IRQs. |
d468bf9e | 3087 | */ |
a0b66a73 | 3088 | int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset) |
372e722e | 3089 | { |
9c10280d LW |
3090 | struct gpio_desc *desc; |
3091 | ||
a0b66a73 | 3092 | desc = gpiochip_get_desc(gc, offset); |
9c10280d LW |
3093 | if (IS_ERR(desc)) |
3094 | return PTR_ERR(desc); | |
3095 | ||
60f8339e LW |
3096 | /* |
3097 | * If it's fast: flush the direction setting if something changed | |
3098 | * behind our back | |
3099 | */ | |
a0b66a73 | 3100 | if (!gc->can_sleep && gc->get_direction) { |
80956790 | 3101 | int dir = gpiod_get_direction(desc); |
9c10280d | 3102 | |
36b31279 | 3103 | if (dir < 0) { |
a0b66a73 | 3104 | chip_err(gc, "%s: cannot get GPIO direction\n", |
36b31279 AS |
3105 | __func__); |
3106 | return dir; | |
3107 | } | |
9c10280d | 3108 | } |
d468bf9e | 3109 | |
e9bdf7e6 LW |
3110 | /* To be valid for IRQ the line needs to be input or open drain */ |
3111 | if (test_bit(FLAG_IS_OUT, &desc->flags) && | |
3112 | !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) { | |
a0b66a73 | 3113 | chip_err(gc, |
b1911710 AS |
3114 | "%s: tried to flag a GPIO set as output for IRQ\n", |
3115 | __func__); | |
d468bf9e LW |
3116 | return -EIO; |
3117 | } | |
3118 | ||
9c10280d | 3119 | set_bit(FLAG_USED_AS_IRQ, &desc->flags); |
4e9439dd | 3120 | set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3940c34a LW |
3121 | |
3122 | /* | |
3123 | * If the consumer has not set up a label (such as when the | |
3124 | * IRQ is referenced from .to_irq()) we set up a label here | |
3125 | * so it is clear this is used as an interrupt. | |
3126 | */ | |
3127 | if (!desc->label) | |
3128 | desc_set_label(desc, "interrupt"); | |
3129 | ||
d468bf9e | 3130 | return 0; |
372e722e | 3131 | } |
e3a2e878 | 3132 | EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq); |
d2876d08 | 3133 | |
d468bf9e | 3134 | /** |
e3a2e878 | 3135 | * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ |
a0b66a73 | 3136 | * @gc: the chip the GPIO to lock belongs to |
d74be6df | 3137 | * @offset: the offset of the GPIO to lock as IRQ |
d468bf9e LW |
3138 | * |
3139 | * This is used directly by GPIO drivers that want to indicate | |
3140 | * that a certain GPIO is no longer used exclusively for IRQ. | |
d2876d08 | 3141 | */ |
a0b66a73 | 3142 | void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset) |
d468bf9e | 3143 | { |
3940c34a LW |
3144 | struct gpio_desc *desc; |
3145 | ||
a0b66a73 | 3146 | desc = gpiochip_get_desc(gc, offset); |
3940c34a | 3147 | if (IS_ERR(desc)) |
d468bf9e | 3148 | return; |
d2876d08 | 3149 | |
3940c34a | 3150 | clear_bit(FLAG_USED_AS_IRQ, &desc->flags); |
4e9439dd | 3151 | clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3940c34a LW |
3152 | |
3153 | /* If we only had this marking, erase it */ | |
3154 | if (desc->label && !strcmp(desc->label, "interrupt")) | |
3155 | desc_set_label(desc, NULL); | |
d468bf9e | 3156 | } |
e3a2e878 | 3157 | EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq); |
d468bf9e | 3158 | |
a0b66a73 | 3159 | void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset) |
4e9439dd | 3160 | { |
a0b66a73 | 3161 | struct gpio_desc *desc = gpiochip_get_desc(gc, offset); |
4e9439dd HV |
3162 | |
3163 | if (!IS_ERR(desc) && | |
3164 | !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) | |
3165 | clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); | |
3166 | } | |
3167 | EXPORT_SYMBOL_GPL(gpiochip_disable_irq); | |
3168 | ||
a0b66a73 | 3169 | void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset) |
4e9439dd | 3170 | { |
a0b66a73 | 3171 | struct gpio_desc *desc = gpiochip_get_desc(gc, offset); |
4e9439dd HV |
3172 | |
3173 | if (!IS_ERR(desc) && | |
3174 | !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) { | |
e9bdf7e6 LW |
3175 | /* |
3176 | * We must not be output when using IRQ UNLESS we are | |
3177 | * open drain. | |
3178 | */ | |
3179 | WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) && | |
3180 | !test_bit(FLAG_OPEN_DRAIN, &desc->flags)); | |
4e9439dd HV |
3181 | set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3182 | } | |
3183 | } | |
3184 | EXPORT_SYMBOL_GPL(gpiochip_enable_irq); | |
3185 | ||
a0b66a73 | 3186 | bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset) |
6cee3821 | 3187 | { |
a0b66a73 | 3188 | if (offset >= gc->ngpio) |
6cee3821 LW |
3189 | return false; |
3190 | ||
a0b66a73 | 3191 | return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags); |
6cee3821 LW |
3192 | } |
3193 | EXPORT_SYMBOL_GPL(gpiochip_line_is_irq); | |
3194 | ||
a0b66a73 | 3195 | int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset) |
4e6b8238 HV |
3196 | { |
3197 | int ret; | |
3198 | ||
a0b66a73 | 3199 | if (!try_module_get(gc->gpiodev->owner)) |
4e6b8238 HV |
3200 | return -ENODEV; |
3201 | ||
a0b66a73 | 3202 | ret = gpiochip_lock_as_irq(gc, offset); |
4e6b8238 | 3203 | if (ret) { |
a0b66a73 LW |
3204 | chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset); |
3205 | module_put(gc->gpiodev->owner); | |
4e6b8238 HV |
3206 | return ret; |
3207 | } | |
3208 | return 0; | |
3209 | } | |
3210 | EXPORT_SYMBOL_GPL(gpiochip_reqres_irq); | |
3211 | ||
a0b66a73 | 3212 | void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset) |
4e6b8238 | 3213 | { |
a0b66a73 LW |
3214 | gpiochip_unlock_as_irq(gc, offset); |
3215 | module_put(gc->gpiodev->owner); | |
4e6b8238 HV |
3216 | } |
3217 | EXPORT_SYMBOL_GPL(gpiochip_relres_irq); | |
3218 | ||
a0b66a73 | 3219 | bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset) |
143b65d6 | 3220 | { |
a0b66a73 | 3221 | if (offset >= gc->ngpio) |
143b65d6 LW |
3222 | return false; |
3223 | ||
a0b66a73 | 3224 | return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags); |
143b65d6 LW |
3225 | } |
3226 | EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain); | |
3227 | ||
a0b66a73 | 3228 | bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset) |
143b65d6 | 3229 | { |
a0b66a73 | 3230 | if (offset >= gc->ngpio) |
143b65d6 LW |
3231 | return false; |
3232 | ||
a0b66a73 | 3233 | return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags); |
143b65d6 LW |
3234 | } |
3235 | EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source); | |
3236 | ||
a0b66a73 | 3237 | bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset) |
05f479bf | 3238 | { |
a0b66a73 | 3239 | if (offset >= gc->ngpio) |
05f479bf CK |
3240 | return false; |
3241 | ||
a0b66a73 | 3242 | return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags); |
05f479bf CK |
3243 | } |
3244 | EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent); | |
3245 | ||
79a9becd AC |
3246 | /** |
3247 | * gpiod_get_raw_value_cansleep() - return a gpio's raw value | |
3248 | * @desc: gpio whose value will be returned | |
3249 | * | |
3250 | * Return the GPIO's raw value, i.e. the value of the physical line disregarding | |
e20538b8 | 3251 | * its ACTIVE_LOW status, or negative errno on failure. |
79a9becd AC |
3252 | * |
3253 | * This function is to be called from contexts that can sleep. | |
d2876d08 | 3254 | */ |
79a9becd | 3255 | int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc) |
d2876d08 | 3256 | { |
d2876d08 | 3257 | might_sleep_if(extra_checks); |
fdeb8e15 | 3258 | VALIDATE_DESC(desc); |
fac9d885 | 3259 | return gpiod_get_raw_value_commit(desc); |
d2876d08 | 3260 | } |
79a9becd | 3261 | EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep); |
372e722e | 3262 | |
79a9becd AC |
3263 | /** |
3264 | * gpiod_get_value_cansleep() - return a gpio's value | |
3265 | * @desc: gpio whose value will be returned | |
3266 | * | |
3267 | * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into | |
e20538b8 | 3268 | * account, or negative errno on failure. |
79a9becd AC |
3269 | * |
3270 | * This function is to be called from contexts that can sleep. | |
3271 | */ | |
3272 | int gpiod_get_value_cansleep(const struct gpio_desc *desc) | |
d2876d08 | 3273 | { |
3f397c21 | 3274 | int value; |
d2876d08 DB |
3275 | |
3276 | might_sleep_if(extra_checks); | |
fdeb8e15 | 3277 | VALIDATE_DESC(desc); |
fac9d885 | 3278 | value = gpiod_get_raw_value_commit(desc); |
e20538b8 BA |
3279 | if (value < 0) |
3280 | return value; | |
3281 | ||
79a9becd AC |
3282 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
3283 | value = !value; | |
3284 | ||
3f397c21 | 3285 | return value; |
d2876d08 | 3286 | } |
79a9becd | 3287 | EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep); |
372e722e | 3288 | |
eec1d566 LW |
3289 | /** |
3290 | * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs | |
b9762beb | 3291 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 3292 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 3293 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3294 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
3295 | * |
3296 | * Read the raw values of the GPIOs, i.e. the values of the physical lines | |
3297 | * without regard for their ACTIVE_LOW status. Return 0 in case of success, | |
3298 | * else an error code. | |
3299 | * | |
3300 | * This function is to be called from contexts that can sleep. | |
3301 | */ | |
3302 | int gpiod_get_raw_array_value_cansleep(unsigned int array_size, | |
3303 | struct gpio_desc **desc_array, | |
77588c14 | 3304 | struct gpio_array *array_info, |
b9762beb | 3305 | unsigned long *value_bitmap) |
eec1d566 LW |
3306 | { |
3307 | might_sleep_if(extra_checks); | |
3308 | if (!desc_array) | |
3309 | return -EINVAL; | |
3310 | return gpiod_get_array_value_complex(true, true, array_size, | |
77588c14 JK |
3311 | desc_array, array_info, |
3312 | value_bitmap); | |
eec1d566 LW |
3313 | } |
3314 | EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep); | |
3315 | ||
3316 | /** | |
3317 | * gpiod_get_array_value_cansleep() - read values from an array of GPIOs | |
b9762beb | 3318 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 3319 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 3320 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3321 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
3322 | * |
3323 | * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
3324 | * into account. Return 0 in case of success, else an error code. | |
3325 | * | |
3326 | * This function is to be called from contexts that can sleep. | |
3327 | */ | |
3328 | int gpiod_get_array_value_cansleep(unsigned int array_size, | |
3329 | struct gpio_desc **desc_array, | |
77588c14 | 3330 | struct gpio_array *array_info, |
b9762beb | 3331 | unsigned long *value_bitmap) |
eec1d566 LW |
3332 | { |
3333 | might_sleep_if(extra_checks); | |
3334 | if (!desc_array) | |
3335 | return -EINVAL; | |
3336 | return gpiod_get_array_value_complex(false, true, array_size, | |
77588c14 JK |
3337 | desc_array, array_info, |
3338 | value_bitmap); | |
eec1d566 LW |
3339 | } |
3340 | EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep); | |
3341 | ||
79a9becd AC |
3342 | /** |
3343 | * gpiod_set_raw_value_cansleep() - assign a gpio's raw value | |
3344 | * @desc: gpio whose value will be assigned | |
3345 | * @value: value to assign | |
3346 | * | |
3347 | * Set the raw value of the GPIO, i.e. the value of its physical line without | |
3348 | * regard for its ACTIVE_LOW status. | |
3349 | * | |
3350 | * This function is to be called from contexts that can sleep. | |
3351 | */ | |
3352 | void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value) | |
372e722e | 3353 | { |
d2876d08 | 3354 | might_sleep_if(extra_checks); |
fdeb8e15 | 3355 | VALIDATE_DESC_VOID(desc); |
fac9d885 | 3356 | gpiod_set_raw_value_commit(desc, value); |
372e722e | 3357 | } |
79a9becd | 3358 | EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep); |
d2876d08 | 3359 | |
79a9becd AC |
3360 | /** |
3361 | * gpiod_set_value_cansleep() - assign a gpio's value | |
3362 | * @desc: gpio whose value will be assigned | |
3363 | * @value: value to assign | |
3364 | * | |
3365 | * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into | |
3366 | * account | |
3367 | * | |
3368 | * This function is to be called from contexts that can sleep. | |
3369 | */ | |
3370 | void gpiod_set_value_cansleep(struct gpio_desc *desc, int value) | |
d2876d08 | 3371 | { |
d2876d08 | 3372 | might_sleep_if(extra_checks); |
fdeb8e15 | 3373 | VALIDATE_DESC_VOID(desc); |
1e77fc82 | 3374 | gpiod_set_value_nocheck(desc, value); |
372e722e | 3375 | } |
79a9becd | 3376 | EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep); |
d2876d08 | 3377 | |
5f424243 | 3378 | /** |
3fff99bc | 3379 | * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs |
b9762beb | 3380 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 3381 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 3382 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3383 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
3384 | * |
3385 | * Set the raw values of the GPIOs, i.e. the values of the physical lines | |
3386 | * without regard for their ACTIVE_LOW status. | |
3387 | * | |
3388 | * This function is to be called from contexts that can sleep. | |
3389 | */ | |
3027743f | 3390 | int gpiod_set_raw_array_value_cansleep(unsigned int array_size, |
3c940660 GU |
3391 | struct gpio_desc **desc_array, |
3392 | struct gpio_array *array_info, | |
3393 | unsigned long *value_bitmap) | |
5f424243 RI |
3394 | { |
3395 | might_sleep_if(extra_checks); | |
3396 | if (!desc_array) | |
3027743f LA |
3397 | return -EINVAL; |
3398 | return gpiod_set_array_value_complex(true, true, array_size, desc_array, | |
77588c14 | 3399 | array_info, value_bitmap); |
5f424243 | 3400 | } |
3fff99bc | 3401 | EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep); |
5f424243 | 3402 | |
3946d187 DT |
3403 | /** |
3404 | * gpiod_add_lookup_tables() - register GPIO device consumers | |
3405 | * @tables: list of tables of consumers to register | |
3406 | * @n: number of tables in the list | |
3407 | */ | |
3408 | void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n) | |
3409 | { | |
3410 | unsigned int i; | |
3411 | ||
3412 | mutex_lock(&gpio_lookup_lock); | |
3413 | ||
3414 | for (i = 0; i < n; i++) | |
3415 | list_add_tail(&tables[i]->list, &gpio_lookup_list); | |
3416 | ||
3417 | mutex_unlock(&gpio_lookup_lock); | |
3418 | } | |
3419 | ||
5f424243 | 3420 | /** |
3fff99bc | 3421 | * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs |
b9762beb | 3422 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 3423 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 3424 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3425 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
3426 | * |
3427 | * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
3428 | * into account. | |
3429 | * | |
3430 | * This function is to be called from contexts that can sleep. | |
3431 | */ | |
cf9af0d5 GU |
3432 | int gpiod_set_array_value_cansleep(unsigned int array_size, |
3433 | struct gpio_desc **desc_array, | |
3434 | struct gpio_array *array_info, | |
3435 | unsigned long *value_bitmap) | |
5f424243 RI |
3436 | { |
3437 | might_sleep_if(extra_checks); | |
3438 | if (!desc_array) | |
cf9af0d5 GU |
3439 | return -EINVAL; |
3440 | return gpiod_set_array_value_complex(false, true, array_size, | |
3441 | desc_array, array_info, | |
3442 | value_bitmap); | |
5f424243 | 3443 | } |
3fff99bc | 3444 | EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep); |
5f424243 | 3445 | |
bae48da2 | 3446 | /** |
ad824783 AC |
3447 | * gpiod_add_lookup_table() - register GPIO device consumers |
3448 | * @table: table of consumers to register | |
bae48da2 | 3449 | */ |
ad824783 | 3450 | void gpiod_add_lookup_table(struct gpiod_lookup_table *table) |
bae48da2 AC |
3451 | { |
3452 | mutex_lock(&gpio_lookup_lock); | |
3453 | ||
ad824783 | 3454 | list_add_tail(&table->list, &gpio_lookup_list); |
bae48da2 AC |
3455 | |
3456 | mutex_unlock(&gpio_lookup_lock); | |
3457 | } | |
226b2242 | 3458 | EXPORT_SYMBOL_GPL(gpiod_add_lookup_table); |
bae48da2 | 3459 | |
be9015ab SK |
3460 | /** |
3461 | * gpiod_remove_lookup_table() - unregister GPIO device consumers | |
3462 | * @table: table of consumers to unregister | |
3463 | */ | |
3464 | void gpiod_remove_lookup_table(struct gpiod_lookup_table *table) | |
3465 | { | |
3466 | mutex_lock(&gpio_lookup_lock); | |
3467 | ||
3468 | list_del(&table->list); | |
3469 | ||
3470 | mutex_unlock(&gpio_lookup_lock); | |
3471 | } | |
226b2242 | 3472 | EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table); |
be9015ab | 3473 | |
a411e81e BG |
3474 | /** |
3475 | * gpiod_add_hogs() - register a set of GPIO hogs from machine code | |
3476 | * @hogs: table of gpio hog entries with a zeroed sentinel at the end | |
3477 | */ | |
3478 | void gpiod_add_hogs(struct gpiod_hog *hogs) | |
3479 | { | |
a0b66a73 | 3480 | struct gpio_chip *gc; |
a411e81e BG |
3481 | struct gpiod_hog *hog; |
3482 | ||
3483 | mutex_lock(&gpio_machine_hogs_mutex); | |
3484 | ||
3485 | for (hog = &hogs[0]; hog->chip_label; hog++) { | |
3486 | list_add_tail(&hog->list, &gpio_machine_hogs); | |
3487 | ||
3488 | /* | |
3489 | * The chip may have been registered earlier, so check if it | |
3490 | * exists and, if so, try to hog the line now. | |
3491 | */ | |
a0b66a73 LW |
3492 | gc = find_chip_by_name(hog->chip_label); |
3493 | if (gc) | |
3494 | gpiochip_machine_hog(gc, hog); | |
a411e81e BG |
3495 | } |
3496 | ||
3497 | mutex_unlock(&gpio_machine_hogs_mutex); | |
3498 | } | |
3499 | EXPORT_SYMBOL_GPL(gpiod_add_hogs); | |
3500 | ||
ad824783 | 3501 | static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev) |
bae48da2 AC |
3502 | { |
3503 | const char *dev_id = dev ? dev_name(dev) : NULL; | |
ad824783 | 3504 | struct gpiod_lookup_table *table; |
bae48da2 AC |
3505 | |
3506 | mutex_lock(&gpio_lookup_lock); | |
3507 | ||
ad824783 AC |
3508 | list_for_each_entry(table, &gpio_lookup_list, list) { |
3509 | if (table->dev_id && dev_id) { | |
3510 | /* | |
3511 | * Valid strings on both ends, must be identical to have | |
3512 | * a match | |
3513 | */ | |
3514 | if (!strcmp(table->dev_id, dev_id)) | |
3515 | goto found; | |
3516 | } else { | |
3517 | /* | |
3518 | * One of the pointers is NULL, so both must be to have | |
3519 | * a match | |
3520 | */ | |
3521 | if (dev_id == table->dev_id) | |
3522 | goto found; | |
3523 | } | |
3524 | } | |
3525 | table = NULL; | |
bae48da2 | 3526 | |
ad824783 AC |
3527 | found: |
3528 | mutex_unlock(&gpio_lookup_lock); | |
3529 | return table; | |
3530 | } | |
bae48da2 | 3531 | |
ad824783 | 3532 | static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id, |
fed7026a | 3533 | unsigned int idx, unsigned long *flags) |
ad824783 | 3534 | { |
2a3cf6a3 | 3535 | struct gpio_desc *desc = ERR_PTR(-ENOENT); |
ad824783 AC |
3536 | struct gpiod_lookup_table *table; |
3537 | struct gpiod_lookup *p; | |
bae48da2 | 3538 | |
ad824783 AC |
3539 | table = gpiod_find_lookup_table(dev); |
3540 | if (!table) | |
3541 | return desc; | |
bae48da2 | 3542 | |
4c033b54 | 3543 | for (p = &table->table[0]; p->key; p++) { |
a0b66a73 | 3544 | struct gpio_chip *gc; |
bae48da2 | 3545 | |
ad824783 | 3546 | /* idx must always match exactly */ |
bae48da2 AC |
3547 | if (p->idx != idx) |
3548 | continue; | |
3549 | ||
ad824783 AC |
3550 | /* If the lookup entry has a con_id, require exact match */ |
3551 | if (p->con_id && (!con_id || strcmp(p->con_id, con_id))) | |
3552 | continue; | |
bae48da2 | 3553 | |
4c033b54 GU |
3554 | if (p->chip_hwnum == U16_MAX) { |
3555 | desc = gpio_name_to_desc(p->key); | |
3556 | if (desc) { | |
3557 | *flags = p->flags; | |
3558 | return desc; | |
3559 | } | |
3560 | ||
3561 | dev_warn(dev, "cannot find GPIO line %s, deferring\n", | |
3562 | p->key); | |
3563 | return ERR_PTR(-EPROBE_DEFER); | |
3564 | } | |
3565 | ||
3566 | gc = find_chip_by_name(p->key); | |
bae48da2 | 3567 | |
a0b66a73 | 3568 | if (!gc) { |
8853daf3 JK |
3569 | /* |
3570 | * As the lookup table indicates a chip with | |
4c033b54 | 3571 | * p->key should exist, assume it may |
8853daf3 JK |
3572 | * still appear later and let the interested |
3573 | * consumer be probed again or let the Deferred | |
3574 | * Probe infrastructure handle the error. | |
3575 | */ | |
3576 | dev_warn(dev, "cannot find GPIO chip %s, deferring\n", | |
4c033b54 | 3577 | p->key); |
8853daf3 | 3578 | return ERR_PTR(-EPROBE_DEFER); |
ad824783 | 3579 | } |
bae48da2 | 3580 | |
a0b66a73 | 3581 | if (gc->ngpio <= p->chip_hwnum) { |
2a3cf6a3 | 3582 | dev_err(dev, |
d935bd50 | 3583 | "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n", |
a0b66a73 LW |
3584 | idx, p->chip_hwnum, gc->ngpio - 1, |
3585 | gc->label); | |
2a3cf6a3 | 3586 | return ERR_PTR(-EINVAL); |
bae48da2 | 3587 | } |
bae48da2 | 3588 | |
a0b66a73 | 3589 | desc = gpiochip_get_desc(gc, p->chip_hwnum); |
ad824783 | 3590 | *flags = p->flags; |
bae48da2 | 3591 | |
2a3cf6a3 | 3592 | return desc; |
bae48da2 AC |
3593 | } |
3594 | ||
bae48da2 AC |
3595 | return desc; |
3596 | } | |
3597 | ||
66858527 RI |
3598 | static int platform_gpio_count(struct device *dev, const char *con_id) |
3599 | { | |
3600 | struct gpiod_lookup_table *table; | |
3601 | struct gpiod_lookup *p; | |
3602 | unsigned int count = 0; | |
3603 | ||
3604 | table = gpiod_find_lookup_table(dev); | |
3605 | if (!table) | |
3606 | return -ENOENT; | |
3607 | ||
4c033b54 | 3608 | for (p = &table->table[0]; p->key; p++) { |
66858527 RI |
3609 | if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) || |
3610 | (!con_id && !p->con_id)) | |
3611 | count++; | |
3612 | } | |
3613 | if (!count) | |
3614 | return -ENOENT; | |
3615 | ||
3616 | return count; | |
3617 | } | |
3618 | ||
13949fa9 DT |
3619 | /** |
3620 | * fwnode_gpiod_get_index - obtain a GPIO from firmware node | |
3621 | * @fwnode: handle of the firmware node | |
3622 | * @con_id: function within the GPIO consumer | |
3623 | * @index: index of the GPIO to obtain for the consumer | |
3624 | * @flags: GPIO initialization flags | |
3625 | * @label: label to attach to the requested GPIO | |
3626 | * | |
3627 | * This function can be used for drivers that get their configuration | |
3628 | * from opaque firmware. | |
3629 | * | |
3630 | * The function properly finds the corresponding GPIO using whatever is the | |
3631 | * underlying firmware interface and then makes sure that the GPIO | |
3632 | * descriptor is requested before it is returned to the caller. | |
3633 | * | |
3634 | * Returns: | |
3635 | * On successful request the GPIO pin is configured in accordance with | |
3636 | * provided @flags. | |
3637 | * | |
3638 | * In case of error an ERR_PTR() is returned. | |
3639 | */ | |
3640 | struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode, | |
3641 | const char *con_id, int index, | |
3642 | enum gpiod_flags flags, | |
3643 | const char *label) | |
3644 | { | |
3645 | struct gpio_desc *desc; | |
3646 | char prop_name[32]; /* 32 is max size of property name */ | |
3647 | unsigned int i; | |
3648 | ||
3649 | for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) { | |
3650 | if (con_id) | |
3651 | snprintf(prop_name, sizeof(prop_name), "%s-%s", | |
3652 | con_id, gpio_suffixes[i]); | |
3653 | else | |
3654 | snprintf(prop_name, sizeof(prop_name), "%s", | |
3655 | gpio_suffixes[i]); | |
3656 | ||
3657 | desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags, | |
3658 | label); | |
7b58696d | 3659 | if (!gpiod_not_found(desc)) |
13949fa9 DT |
3660 | break; |
3661 | } | |
3662 | ||
3663 | return desc; | |
3664 | } | |
3665 | EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index); | |
3666 | ||
66858527 RI |
3667 | /** |
3668 | * gpiod_count - return the number of GPIOs associated with a device / function | |
3669 | * or -ENOENT if no GPIO has been assigned to the requested function | |
3670 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
3671 | * @con_id: function within the GPIO consumer | |
3672 | */ | |
3673 | int gpiod_count(struct device *dev, const char *con_id) | |
3674 | { | |
3675 | int count = -ENOENT; | |
3676 | ||
3677 | if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node) | |
f626d6df | 3678 | count = of_gpio_get_count(dev, con_id); |
66858527 RI |
3679 | else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev)) |
3680 | count = acpi_gpio_count(dev, con_id); | |
3681 | ||
3682 | if (count < 0) | |
3683 | count = platform_gpio_count(dev, con_id); | |
3684 | ||
3685 | return count; | |
3686 | } | |
3687 | EXPORT_SYMBOL_GPL(gpiod_count); | |
3688 | ||
bae48da2 | 3689 | /** |
0879162f | 3690 | * gpiod_get - obtain a GPIO for a given GPIO function |
ad824783 | 3691 | * @dev: GPIO consumer, can be NULL for system-global GPIOs |
bae48da2 | 3692 | * @con_id: function within the GPIO consumer |
39b2bbe3 | 3693 | * @flags: optional GPIO initialization flags |
bae48da2 AC |
3694 | * |
3695 | * Return the GPIO descriptor corresponding to the function con_id of device | |
2a3cf6a3 | 3696 | * dev, -ENOENT if no GPIO has been assigned to the requested function, or |
20a8a968 | 3697 | * another IS_ERR() code if an error occurred while trying to acquire the GPIO. |
bae48da2 | 3698 | */ |
b17d1bf1 | 3699 | struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id, |
39b2bbe3 | 3700 | enum gpiod_flags flags) |
bae48da2 | 3701 | { |
39b2bbe3 | 3702 | return gpiod_get_index(dev, con_id, 0, flags); |
bae48da2 | 3703 | } |
b17d1bf1 | 3704 | EXPORT_SYMBOL_GPL(gpiod_get); |
bae48da2 | 3705 | |
29a1f233 TR |
3706 | /** |
3707 | * gpiod_get_optional - obtain an optional GPIO for a given GPIO function | |
3708 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
3709 | * @con_id: function within the GPIO consumer | |
39b2bbe3 | 3710 | * @flags: optional GPIO initialization flags |
29a1f233 TR |
3711 | * |
3712 | * This is equivalent to gpiod_get(), except that when no GPIO was assigned to | |
3713 | * the requested function it will return NULL. This is convenient for drivers | |
3714 | * that need to handle optional GPIOs. | |
3715 | */ | |
b17d1bf1 | 3716 | struct gpio_desc *__must_check gpiod_get_optional(struct device *dev, |
39b2bbe3 AC |
3717 | const char *con_id, |
3718 | enum gpiod_flags flags) | |
29a1f233 | 3719 | { |
39b2bbe3 | 3720 | return gpiod_get_index_optional(dev, con_id, 0, flags); |
29a1f233 | 3721 | } |
b17d1bf1 | 3722 | EXPORT_SYMBOL_GPL(gpiod_get_optional); |
29a1f233 | 3723 | |
f625d460 BP |
3724 | |
3725 | /** | |
3726 | * gpiod_configure_flags - helper function to configure a given GPIO | |
3727 | * @desc: gpio whose value will be assigned | |
3728 | * @con_id: function within the GPIO consumer | |
fed7026a AS |
3729 | * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from |
3730 | * of_find_gpio() or of_get_gpio_hog() | |
f625d460 BP |
3731 | * @dflags: gpiod_flags - optional GPIO initialization flags |
3732 | * | |
3733 | * Return 0 on success, -ENOENT if no GPIO has been assigned to the | |
3734 | * requested function and/or index, or another IS_ERR() code if an error | |
3735 | * occurred while trying to acquire the GPIO. | |
3736 | */ | |
c29fd9eb | 3737 | int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id, |
85b03b30 | 3738 | unsigned long lflags, enum gpiod_flags dflags) |
f625d460 | 3739 | { |
d377f56f | 3740 | int ret; |
f625d460 | 3741 | |
85b03b30 JH |
3742 | if (lflags & GPIO_ACTIVE_LOW) |
3743 | set_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
f926dfc1 | 3744 | |
85b03b30 JH |
3745 | if (lflags & GPIO_OPEN_DRAIN) |
3746 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | |
f926dfc1 LW |
3747 | else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) { |
3748 | /* | |
3749 | * This enforces open drain mode from the consumer side. | |
3750 | * This is necessary for some busses like I2C, but the lookup | |
3751 | * should *REALLY* have specified them as open drain in the | |
3752 | * first place, so print a little warning here. | |
3753 | */ | |
3754 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | |
3755 | gpiod_warn(desc, | |
3756 | "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n"); | |
3757 | } | |
3758 | ||
85b03b30 JH |
3759 | if (lflags & GPIO_OPEN_SOURCE) |
3760 | set_bit(FLAG_OPEN_SOURCE, &desc->flags); | |
e10f72bf | 3761 | |
d449991c TP |
3762 | if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) { |
3763 | gpiod_err(desc, | |
3764 | "both pull-up and pull-down enabled, invalid configuration\n"); | |
3765 | return -EINVAL; | |
3766 | } | |
3767 | ||
3768 | if (lflags & GPIO_PULL_UP) | |
3769 | set_bit(FLAG_PULL_UP, &desc->flags); | |
3770 | else if (lflags & GPIO_PULL_DOWN) | |
3771 | set_bit(FLAG_PULL_DOWN, &desc->flags); | |
3772 | ||
d377f56f LW |
3773 | ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY)); |
3774 | if (ret < 0) | |
3775 | return ret; | |
85b03b30 | 3776 | |
f625d460 BP |
3777 | /* No particular flag request, return here... */ |
3778 | if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) { | |
262b9011 | 3779 | gpiod_dbg(desc, "no flags found for %s\n", con_id); |
f625d460 BP |
3780 | return 0; |
3781 | } | |
3782 | ||
3783 | /* Process flags */ | |
3784 | if (dflags & GPIOD_FLAGS_BIT_DIR_OUT) | |
d377f56f | 3785 | ret = gpiod_direction_output(desc, |
ad17731d | 3786 | !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL)); |
f625d460 | 3787 | else |
d377f56f | 3788 | ret = gpiod_direction_input(desc); |
f625d460 | 3789 | |
d377f56f | 3790 | return ret; |
f625d460 BP |
3791 | } |
3792 | ||
bae48da2 AC |
3793 | /** |
3794 | * gpiod_get_index - obtain a GPIO from a multi-index GPIO function | |
fdd6a5fe | 3795 | * @dev: GPIO consumer, can be NULL for system-global GPIOs |
bae48da2 AC |
3796 | * @con_id: function within the GPIO consumer |
3797 | * @idx: index of the GPIO to obtain in the consumer | |
39b2bbe3 | 3798 | * @flags: optional GPIO initialization flags |
bae48da2 AC |
3799 | * |
3800 | * This variant of gpiod_get() allows to access GPIOs other than the first | |
3801 | * defined one for functions that define several GPIOs. | |
3802 | * | |
2a3cf6a3 AC |
3803 | * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the |
3804 | * requested function and/or index, or another IS_ERR() code if an error | |
20a8a968 | 3805 | * occurred while trying to acquire the GPIO. |
bae48da2 | 3806 | */ |
b17d1bf1 | 3807 | struct gpio_desc *__must_check gpiod_get_index(struct device *dev, |
bae48da2 | 3808 | const char *con_id, |
39b2bbe3 AC |
3809 | unsigned int idx, |
3810 | enum gpiod_flags flags) | |
bae48da2 | 3811 | { |
2d6c06f5 | 3812 | unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT; |
35c5d7fd | 3813 | struct gpio_desc *desc = NULL; |
d377f56f | 3814 | int ret; |
7d18f0a1 LW |
3815 | /* Maybe we have a device name, maybe not */ |
3816 | const char *devname = dev ? dev_name(dev) : "?"; | |
bae48da2 AC |
3817 | |
3818 | dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id); | |
3819 | ||
4d8440b9 RW |
3820 | if (dev) { |
3821 | /* Using device tree? */ | |
3822 | if (IS_ENABLED(CONFIG_OF) && dev->of_node) { | |
3823 | dev_dbg(dev, "using device tree for GPIO lookup\n"); | |
3824 | desc = of_find_gpio(dev, con_id, idx, &lookupflags); | |
3825 | } else if (ACPI_COMPANION(dev)) { | |
3826 | dev_dbg(dev, "using ACPI for GPIO lookup\n"); | |
a31f5c3a | 3827 | desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags); |
4d8440b9 | 3828 | } |
35c5d7fd AC |
3829 | } |
3830 | ||
3831 | /* | |
3832 | * Either we are not using DT or ACPI, or their lookup did not return | |
3833 | * a result. In that case, use platform lookup as a fallback. | |
3834 | */ | |
7b58696d | 3835 | if (!desc || gpiod_not_found(desc)) { |
43a8785a | 3836 | dev_dbg(dev, "using lookup tables for GPIO lookup\n"); |
39b2bbe3 | 3837 | desc = gpiod_find(dev, con_id, idx, &lookupflags); |
bae48da2 AC |
3838 | } |
3839 | ||
3840 | if (IS_ERR(desc)) { | |
9d5a1f2c | 3841 | dev_dbg(dev, "No GPIO consumer %s found\n", con_id); |
bae48da2 AC |
3842 | return desc; |
3843 | } | |
3844 | ||
7d18f0a1 LW |
3845 | /* |
3846 | * If a connection label was passed use that, else attempt to use | |
3847 | * the device name as label | |
3848 | */ | |
d377f56f | 3849 | ret = gpiod_request(desc, con_id ? con_id : devname); |
8bbff39c | 3850 | if (ret) { |
d377f56f | 3851 | if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) { |
b0ce7b29 LW |
3852 | /* |
3853 | * This happens when there are several consumers for | |
3854 | * the same GPIO line: we just return here without | |
3855 | * further initialization. It is a bit if a hack. | |
3856 | * This is necessary to support fixed regulators. | |
3857 | * | |
3858 | * FIXME: Make this more sane and safe. | |
3859 | */ | |
3860 | dev_info(dev, "nonexclusive access to GPIO for %s\n", | |
3861 | con_id ? con_id : devname); | |
3862 | return desc; | |
3863 | } else { | |
d377f56f | 3864 | return ERR_PTR(ret); |
b0ce7b29 LW |
3865 | } |
3866 | } | |
bae48da2 | 3867 | |
d377f56f | 3868 | ret = gpiod_configure_flags(desc, con_id, lookupflags, flags); |
6392cca4 | 3869 | if (ret < 0) { |
39b2bbe3 | 3870 | dev_dbg(dev, "setup of GPIO %s failed\n", con_id); |
6392cca4 LW |
3871 | gpiod_put(desc); |
3872 | return ERR_PTR(ret); | |
3873 | } | |
3874 | ||
6accc376 KG |
3875 | blocking_notifier_call_chain(&desc->gdev->notifier, |
3876 | GPIOLINE_CHANGED_REQUESTED, desc); | |
9fefca77 | 3877 | |
6392cca4 LW |
3878 | return desc; |
3879 | } | |
b17d1bf1 | 3880 | EXPORT_SYMBOL_GPL(gpiod_get_index); |
6392cca4 | 3881 | |
40b73183 MW |
3882 | /** |
3883 | * fwnode_get_named_gpiod - obtain a GPIO from firmware node | |
3884 | * @fwnode: handle of the firmware node | |
3885 | * @propname: name of the firmware property representing the GPIO | |
6392cca4 | 3886 | * @index: index of the GPIO to obtain for the consumer |
a264d10f | 3887 | * @dflags: GPIO initialization flags |
950d55f5 | 3888 | * @label: label to attach to the requested GPIO |
40b73183 MW |
3889 | * |
3890 | * This function can be used for drivers that get their configuration | |
6392cca4 | 3891 | * from opaque firmware. |
40b73183 | 3892 | * |
6392cca4 | 3893 | * The function properly finds the corresponding GPIO using whatever is the |
40b73183 MW |
3894 | * underlying firmware interface and then makes sure that the GPIO |
3895 | * descriptor is requested before it is returned to the caller. | |
3896 | * | |
950d55f5 | 3897 | * Returns: |
ff21378a | 3898 | * On successful request the GPIO pin is configured in accordance with |
a264d10f AS |
3899 | * provided @dflags. |
3900 | * | |
40b73183 MW |
3901 | * In case of error an ERR_PTR() is returned. |
3902 | */ | |
3903 | struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode, | |
537b94da | 3904 | const char *propname, int index, |
b2987d74 AS |
3905 | enum gpiod_flags dflags, |
3906 | const char *label) | |
40b73183 | 3907 | { |
2d6c06f5 | 3908 | unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT; |
40b73183 | 3909 | struct gpio_desc *desc = ERR_PTR(-ENODEV); |
40b73183 MW |
3910 | int ret; |
3911 | ||
3912 | if (!fwnode) | |
3913 | return ERR_PTR(-EINVAL); | |
3914 | ||
3915 | if (is_of_node(fwnode)) { | |
6392cca4 LW |
3916 | desc = gpiod_get_from_of_node(to_of_node(fwnode), |
3917 | propname, index, | |
3918 | dflags, | |
3919 | label); | |
3920 | return desc; | |
40b73183 MW |
3921 | } else if (is_acpi_node(fwnode)) { |
3922 | struct acpi_gpio_info info; | |
3923 | ||
537b94da | 3924 | desc = acpi_node_get_gpiod(fwnode, propname, index, &info); |
6392cca4 LW |
3925 | if (IS_ERR(desc)) |
3926 | return desc; | |
40b73183 | 3927 | |
6392cca4 | 3928 | acpi_gpio_update_gpiod_flags(&dflags, &info); |
606be344 | 3929 | acpi_gpio_update_gpiod_lookup_flags(&lflags, &info); |
6392cca4 | 3930 | } |
40b73183 | 3931 | |
6392cca4 | 3932 | /* Currently only ACPI takes this path */ |
b2987d74 | 3933 | ret = gpiod_request(desc, label); |
85b03b30 JH |
3934 | if (ret) |
3935 | return ERR_PTR(ret); | |
3936 | ||
a264d10f AS |
3937 | ret = gpiod_configure_flags(desc, propname, lflags, dflags); |
3938 | if (ret < 0) { | |
3939 | gpiod_put(desc); | |
3940 | return ERR_PTR(ret); | |
90b665f6 LP |
3941 | } |
3942 | ||
6accc376 KG |
3943 | blocking_notifier_call_chain(&desc->gdev->notifier, |
3944 | GPIOLINE_CHANGED_REQUESTED, desc); | |
9fefca77 | 3945 | |
40b73183 MW |
3946 | return desc; |
3947 | } | |
3948 | EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod); | |
3949 | ||
29a1f233 TR |
3950 | /** |
3951 | * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO | |
3952 | * function | |
3953 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
3954 | * @con_id: function within the GPIO consumer | |
3955 | * @index: index of the GPIO to obtain in the consumer | |
39b2bbe3 | 3956 | * @flags: optional GPIO initialization flags |
29a1f233 TR |
3957 | * |
3958 | * This is equivalent to gpiod_get_index(), except that when no GPIO with the | |
3959 | * specified index was assigned to the requested function it will return NULL. | |
3960 | * This is convenient for drivers that need to handle optional GPIOs. | |
3961 | */ | |
b17d1bf1 | 3962 | struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev, |
29a1f233 | 3963 | const char *con_id, |
39b2bbe3 AC |
3964 | unsigned int index, |
3965 | enum gpiod_flags flags) | |
29a1f233 TR |
3966 | { |
3967 | struct gpio_desc *desc; | |
3968 | ||
39b2bbe3 | 3969 | desc = gpiod_get_index(dev, con_id, index, flags); |
7b58696d AS |
3970 | if (gpiod_not_found(desc)) |
3971 | return NULL; | |
29a1f233 TR |
3972 | |
3973 | return desc; | |
3974 | } | |
b17d1bf1 | 3975 | EXPORT_SYMBOL_GPL(gpiod_get_index_optional); |
29a1f233 | 3976 | |
f625d460 BP |
3977 | /** |
3978 | * gpiod_hog - Hog the specified GPIO desc given the provided flags | |
3979 | * @desc: gpio whose value will be assigned | |
3980 | * @name: gpio line name | |
fed7026a AS |
3981 | * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from |
3982 | * of_find_gpio() or of_get_gpio_hog() | |
f625d460 BP |
3983 | * @dflags: gpiod_flags - optional GPIO initialization flags |
3984 | */ | |
3985 | int gpiod_hog(struct gpio_desc *desc, const char *name, | |
3986 | unsigned long lflags, enum gpiod_flags dflags) | |
3987 | { | |
a0b66a73 | 3988 | struct gpio_chip *gc; |
f625d460 BP |
3989 | struct gpio_desc *local_desc; |
3990 | int hwnum; | |
d377f56f | 3991 | int ret; |
f625d460 | 3992 | |
a0b66a73 | 3993 | gc = gpiod_to_chip(desc); |
f625d460 BP |
3994 | hwnum = gpio_chip_hwgpio(desc); |
3995 | ||
a0b66a73 | 3996 | local_desc = gpiochip_request_own_desc(gc, hwnum, name, |
5923ea6c | 3997 | lflags, dflags); |
f625d460 | 3998 | if (IS_ERR(local_desc)) { |
d377f56f | 3999 | ret = PTR_ERR(local_desc); |
c31a571d | 4000 | pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n", |
a0b66a73 | 4001 | name, gc->label, hwnum, ret); |
d377f56f | 4002 | return ret; |
f625d460 BP |
4003 | } |
4004 | ||
f625d460 BP |
4005 | /* Mark GPIO as hogged so it can be identified and removed later */ |
4006 | set_bit(FLAG_IS_HOGGED, &desc->flags); | |
4007 | ||
262b9011 | 4008 | gpiod_info(desc, "hogged as %s%s\n", |
b27f300f BG |
4009 | (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input", |
4010 | (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? | |
4011 | (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : ""); | |
f625d460 BP |
4012 | |
4013 | return 0; | |
4014 | } | |
4015 | ||
4016 | /** | |
4017 | * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog | |
a0b66a73 | 4018 | * @gc: gpio chip to act on |
f625d460 | 4019 | */ |
a0b66a73 | 4020 | static void gpiochip_free_hogs(struct gpio_chip *gc) |
f625d460 BP |
4021 | { |
4022 | int id; | |
4023 | ||
a0b66a73 LW |
4024 | for (id = 0; id < gc->ngpio; id++) { |
4025 | if (test_bit(FLAG_IS_HOGGED, &gc->gpiodev->descs[id].flags)) | |
4026 | gpiochip_free_own_desc(&gc->gpiodev->descs[id]); | |
f625d460 BP |
4027 | } |
4028 | } | |
4029 | ||
66858527 RI |
4030 | /** |
4031 | * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function | |
4032 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4033 | * @con_id: function within the GPIO consumer | |
4034 | * @flags: optional GPIO initialization flags | |
4035 | * | |
4036 | * This function acquires all the GPIOs defined under a given function. | |
4037 | * | |
4038 | * Return a struct gpio_descs containing an array of descriptors, -ENOENT if | |
4039 | * no GPIO has been assigned to the requested function, or another IS_ERR() | |
4040 | * code if an error occurred while trying to acquire the GPIOs. | |
4041 | */ | |
4042 | struct gpio_descs *__must_check gpiod_get_array(struct device *dev, | |
4043 | const char *con_id, | |
4044 | enum gpiod_flags flags) | |
4045 | { | |
4046 | struct gpio_desc *desc; | |
4047 | struct gpio_descs *descs; | |
bf9346f5 | 4048 | struct gpio_array *array_info = NULL; |
a0b66a73 | 4049 | struct gpio_chip *gc; |
bf9346f5 | 4050 | int count, bitmap_size; |
66858527 RI |
4051 | |
4052 | count = gpiod_count(dev, con_id); | |
4053 | if (count < 0) | |
4054 | return ERR_PTR(count); | |
4055 | ||
acafe7e3 | 4056 | descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL); |
66858527 RI |
4057 | if (!descs) |
4058 | return ERR_PTR(-ENOMEM); | |
4059 | ||
4060 | for (descs->ndescs = 0; descs->ndescs < count; ) { | |
4061 | desc = gpiod_get_index(dev, con_id, descs->ndescs, flags); | |
4062 | if (IS_ERR(desc)) { | |
4063 | gpiod_put_array(descs); | |
4064 | return ERR_CAST(desc); | |
4065 | } | |
bf9346f5 | 4066 | |
66858527 | 4067 | descs->desc[descs->ndescs] = desc; |
bf9346f5 | 4068 | |
a0b66a73 | 4069 | gc = gpiod_to_chip(desc); |
bf9346f5 | 4070 | /* |
c4c958aa JK |
4071 | * If pin hardware number of array member 0 is also 0, select |
4072 | * its chip as a candidate for fast bitmap processing path. | |
bf9346f5 | 4073 | */ |
c4c958aa | 4074 | if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) { |
bf9346f5 JK |
4075 | struct gpio_descs *array; |
4076 | ||
a0b66a73 LW |
4077 | bitmap_size = BITS_TO_LONGS(gc->ngpio > count ? |
4078 | gc->ngpio : count); | |
bf9346f5 JK |
4079 | |
4080 | array = kzalloc(struct_size(descs, desc, count) + | |
4081 | struct_size(array_info, invert_mask, | |
4082 | 3 * bitmap_size), GFP_KERNEL); | |
4083 | if (!array) { | |
4084 | gpiod_put_array(descs); | |
4085 | return ERR_PTR(-ENOMEM); | |
4086 | } | |
4087 | ||
4088 | memcpy(array, descs, | |
4089 | struct_size(descs, desc, descs->ndescs + 1)); | |
4090 | kfree(descs); | |
4091 | ||
4092 | descs = array; | |
4093 | array_info = (void *)(descs->desc + count); | |
4094 | array_info->get_mask = array_info->invert_mask + | |
4095 | bitmap_size; | |
4096 | array_info->set_mask = array_info->get_mask + | |
4097 | bitmap_size; | |
4098 | ||
4099 | array_info->desc = descs->desc; | |
4100 | array_info->size = count; | |
a0b66a73 | 4101 | array_info->chip = gc; |
bf9346f5 JK |
4102 | bitmap_set(array_info->get_mask, descs->ndescs, |
4103 | count - descs->ndescs); | |
4104 | bitmap_set(array_info->set_mask, descs->ndescs, | |
4105 | count - descs->ndescs); | |
4106 | descs->info = array_info; | |
4107 | } | |
c4c958aa | 4108 | /* Unmark array members which don't belong to the 'fast' chip */ |
a0b66a73 | 4109 | if (array_info && array_info->chip != gc) { |
bf9346f5 JK |
4110 | __clear_bit(descs->ndescs, array_info->get_mask); |
4111 | __clear_bit(descs->ndescs, array_info->set_mask); | |
c4c958aa JK |
4112 | } |
4113 | /* | |
4114 | * Detect array members which belong to the 'fast' chip | |
4115 | * but their pins are not in hardware order. | |
4116 | */ | |
4117 | else if (array_info && | |
4118 | gpio_chip_hwgpio(desc) != descs->ndescs) { | |
4119 | /* | |
4120 | * Don't use fast path if all array members processed so | |
4121 | * far belong to the same chip as this one but its pin | |
4122 | * hardware number is different from its array index. | |
4123 | */ | |
4124 | if (bitmap_full(array_info->get_mask, descs->ndescs)) { | |
4125 | array_info = NULL; | |
4126 | } else { | |
4127 | __clear_bit(descs->ndescs, | |
4128 | array_info->get_mask); | |
4129 | __clear_bit(descs->ndescs, | |
4130 | array_info->set_mask); | |
4131 | } | |
bf9346f5 JK |
4132 | } else if (array_info) { |
4133 | /* Exclude open drain or open source from fast output */ | |
a0b66a73 LW |
4134 | if (gpiochip_line_is_open_drain(gc, descs->ndescs) || |
4135 | gpiochip_line_is_open_source(gc, descs->ndescs)) | |
bf9346f5 JK |
4136 | __clear_bit(descs->ndescs, |
4137 | array_info->set_mask); | |
4138 | /* Identify 'fast' pins which require invertion */ | |
4139 | if (gpiod_is_active_low(desc)) | |
4140 | __set_bit(descs->ndescs, | |
4141 | array_info->invert_mask); | |
4142 | } | |
4143 | ||
66858527 RI |
4144 | descs->ndescs++; |
4145 | } | |
bf9346f5 JK |
4146 | if (array_info) |
4147 | dev_dbg(dev, | |
4148 | "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n", | |
4149 | array_info->chip->label, array_info->size, | |
4150 | *array_info->get_mask, *array_info->set_mask, | |
4151 | *array_info->invert_mask); | |
66858527 RI |
4152 | return descs; |
4153 | } | |
4154 | EXPORT_SYMBOL_GPL(gpiod_get_array); | |
4155 | ||
4156 | /** | |
4157 | * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO | |
4158 | * function | |
4159 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4160 | * @con_id: function within the GPIO consumer | |
4161 | * @flags: optional GPIO initialization flags | |
4162 | * | |
4163 | * This is equivalent to gpiod_get_array(), except that when no GPIO was | |
4164 | * assigned to the requested function it will return NULL. | |
4165 | */ | |
4166 | struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev, | |
4167 | const char *con_id, | |
4168 | enum gpiod_flags flags) | |
4169 | { | |
4170 | struct gpio_descs *descs; | |
4171 | ||
4172 | descs = gpiod_get_array(dev, con_id, flags); | |
7b58696d | 4173 | if (gpiod_not_found(descs)) |
66858527 RI |
4174 | return NULL; |
4175 | ||
4176 | return descs; | |
4177 | } | |
4178 | EXPORT_SYMBOL_GPL(gpiod_get_array_optional); | |
4179 | ||
bae48da2 AC |
4180 | /** |
4181 | * gpiod_put - dispose of a GPIO descriptor | |
4182 | * @desc: GPIO descriptor to dispose of | |
4183 | * | |
4184 | * No descriptor can be used after gpiod_put() has been called on it. | |
4185 | */ | |
4186 | void gpiod_put(struct gpio_desc *desc) | |
4187 | { | |
1d7765ba AS |
4188 | if (desc) |
4189 | gpiod_free(desc); | |
372e722e | 4190 | } |
bae48da2 | 4191 | EXPORT_SYMBOL_GPL(gpiod_put); |
d2876d08 | 4192 | |
66858527 RI |
4193 | /** |
4194 | * gpiod_put_array - dispose of multiple GPIO descriptors | |
4195 | * @descs: struct gpio_descs containing an array of descriptors | |
4196 | */ | |
4197 | void gpiod_put_array(struct gpio_descs *descs) | |
4198 | { | |
4199 | unsigned int i; | |
4200 | ||
4201 | for (i = 0; i < descs->ndescs; i++) | |
4202 | gpiod_put(descs->desc[i]); | |
4203 | ||
4204 | kfree(descs); | |
4205 | } | |
4206 | EXPORT_SYMBOL_GPL(gpiod_put_array); | |
4207 | ||
3c702e99 LW |
4208 | static int __init gpiolib_dev_init(void) |
4209 | { | |
4210 | int ret; | |
4211 | ||
4212 | /* Register GPIO sysfs bus */ | |
b1911710 | 4213 | ret = bus_register(&gpio_bus_type); |
3c702e99 LW |
4214 | if (ret < 0) { |
4215 | pr_err("gpiolib: could not register GPIO bus type\n"); | |
4216 | return ret; | |
4217 | } | |
4218 | ||
ddd8891e | 4219 | ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME); |
3c702e99 LW |
4220 | if (ret < 0) { |
4221 | pr_err("gpiolib: failed to allocate char dev region\n"); | |
4222 | bus_unregister(&gpio_bus_type); | |
63636d95 | 4223 | return ret; |
3c702e99 | 4224 | } |
63636d95 GU |
4225 | |
4226 | gpiolib_initialized = true; | |
4227 | gpiochip_setup_devs(); | |
4228 | ||
8650b609 DG |
4229 | #if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO) |
4230 | WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier)); | |
4231 | #endif /* CONFIG_OF_DYNAMIC && CONFIG_OF_GPIO */ | |
63636d95 | 4232 | |
3c702e99 LW |
4233 | return ret; |
4234 | } | |
4235 | core_initcall(gpiolib_dev_init); | |
4236 | ||
d2876d08 DB |
4237 | #ifdef CONFIG_DEBUG_FS |
4238 | ||
fdeb8e15 | 4239 | static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev) |
d2876d08 DB |
4240 | { |
4241 | unsigned i; | |
a0b66a73 | 4242 | struct gpio_chip *gc = gdev->chip; |
fdeb8e15 LW |
4243 | unsigned gpio = gdev->base; |
4244 | struct gpio_desc *gdesc = &gdev->descs[0]; | |
90fd2270 LW |
4245 | bool is_out; |
4246 | bool is_irq; | |
4247 | bool active_low; | |
d2876d08 | 4248 | |
fdeb8e15 | 4249 | for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) { |
ced433e2 MP |
4250 | if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) { |
4251 | if (gdesc->name) { | |
4252 | seq_printf(s, " gpio-%-3d (%-20.20s)\n", | |
4253 | gpio, gdesc->name); | |
4254 | } | |
d2876d08 | 4255 | continue; |
ced433e2 | 4256 | } |
d2876d08 | 4257 | |
372e722e | 4258 | gpiod_get_direction(gdesc); |
d2876d08 | 4259 | is_out = test_bit(FLAG_IS_OUT, &gdesc->flags); |
d468bf9e | 4260 | is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags); |
90fd2270 LW |
4261 | active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags); |
4262 | seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s", | |
ced433e2 | 4263 | gpio, gdesc->name ? gdesc->name : "", gdesc->label, |
d2876d08 | 4264 | is_out ? "out" : "in ", |
a0b66a73 | 4265 | gc->get ? (gc->get(gc, i) ? "hi" : "lo") : "? ", |
90fd2270 LW |
4266 | is_irq ? "IRQ " : "", |
4267 | active_low ? "ACTIVE LOW" : ""); | |
d2876d08 DB |
4268 | seq_printf(s, "\n"); |
4269 | } | |
4270 | } | |
4271 | ||
f9c4a31f | 4272 | static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos) |
d2876d08 | 4273 | { |
362432ae | 4274 | unsigned long flags; |
ff2b1359 | 4275 | struct gpio_device *gdev = NULL; |
cb1650d4 | 4276 | loff_t index = *pos; |
d2876d08 | 4277 | |
f9c4a31f | 4278 | s->private = ""; |
d2876d08 | 4279 | |
362432ae | 4280 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 4281 | list_for_each_entry(gdev, &gpio_devices, list) |
362432ae GL |
4282 | if (index-- == 0) { |
4283 | spin_unlock_irqrestore(&gpio_lock, flags); | |
ff2b1359 | 4284 | return gdev; |
f9c4a31f | 4285 | } |
362432ae | 4286 | spin_unlock_irqrestore(&gpio_lock, flags); |
f9c4a31f | 4287 | |
cb1650d4 | 4288 | return NULL; |
f9c4a31f TR |
4289 | } |
4290 | ||
4291 | static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos) | |
4292 | { | |
362432ae | 4293 | unsigned long flags; |
ff2b1359 | 4294 | struct gpio_device *gdev = v; |
f9c4a31f TR |
4295 | void *ret = NULL; |
4296 | ||
362432ae | 4297 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 4298 | if (list_is_last(&gdev->list, &gpio_devices)) |
cb1650d4 AC |
4299 | ret = NULL; |
4300 | else | |
ff2b1359 | 4301 | ret = list_entry(gdev->list.next, struct gpio_device, list); |
362432ae | 4302 | spin_unlock_irqrestore(&gpio_lock, flags); |
f9c4a31f TR |
4303 | |
4304 | s->private = "\n"; | |
4305 | ++*pos; | |
4306 | ||
4307 | return ret; | |
4308 | } | |
4309 | ||
4310 | static void gpiolib_seq_stop(struct seq_file *s, void *v) | |
4311 | { | |
4312 | } | |
4313 | ||
4314 | static int gpiolib_seq_show(struct seq_file *s, void *v) | |
4315 | { | |
ff2b1359 | 4316 | struct gpio_device *gdev = v; |
a0b66a73 | 4317 | struct gpio_chip *gc = gdev->chip; |
ff2b1359 LW |
4318 | struct device *parent; |
4319 | ||
a0b66a73 | 4320 | if (!gc) { |
ff2b1359 LW |
4321 | seq_printf(s, "%s%s: (dangling chip)", (char *)s->private, |
4322 | dev_name(&gdev->dev)); | |
4323 | return 0; | |
4324 | } | |
f9c4a31f | 4325 | |
ff2b1359 LW |
4326 | seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private, |
4327 | dev_name(&gdev->dev), | |
fdeb8e15 | 4328 | gdev->base, gdev->base + gdev->ngpio - 1); |
a0b66a73 | 4329 | parent = gc->parent; |
ff2b1359 LW |
4330 | if (parent) |
4331 | seq_printf(s, ", parent: %s/%s", | |
4332 | parent->bus ? parent->bus->name : "no-bus", | |
4333 | dev_name(parent)); | |
a0b66a73 LW |
4334 | if (gc->label) |
4335 | seq_printf(s, ", %s", gc->label); | |
4336 | if (gc->can_sleep) | |
f9c4a31f TR |
4337 | seq_printf(s, ", can sleep"); |
4338 | seq_printf(s, ":\n"); | |
4339 | ||
a0b66a73 LW |
4340 | if (gc->dbg_show) |
4341 | gc->dbg_show(s, gc); | |
f9c4a31f | 4342 | else |
fdeb8e15 | 4343 | gpiolib_dbg_show(s, gdev); |
f9c4a31f | 4344 | |
d2876d08 DB |
4345 | return 0; |
4346 | } | |
4347 | ||
425c5b3e | 4348 | static const struct seq_operations gpiolib_sops = { |
f9c4a31f TR |
4349 | .start = gpiolib_seq_start, |
4350 | .next = gpiolib_seq_next, | |
4351 | .stop = gpiolib_seq_stop, | |
4352 | .show = gpiolib_seq_show, | |
4353 | }; | |
425c5b3e | 4354 | DEFINE_SEQ_ATTRIBUTE(gpiolib); |
d2876d08 DB |
4355 | |
4356 | static int __init gpiolib_debugfs_init(void) | |
4357 | { | |
4358 | /* /sys/kernel/debug/gpio */ | |
425c5b3e | 4359 | debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops); |
d2876d08 DB |
4360 | return 0; |
4361 | } | |
4362 | subsys_initcall(gpiolib_debugfs_init); | |
4363 | ||
4364 | #endif /* DEBUG_FS */ |