gpiolib: Check "gpio-ranges" before calling ->add_pin_ranges()
[linux-block.git] / drivers / gpio / gpiolib.c
CommitLineData
dae5f0af 1// SPDX-License-Identifier: GPL-2.0
c47d9e1b 2
923a654c 3#include <linux/bitmap.h>
d2876d08
DB
4#include <linux/kernel.h>
5#include <linux/module.h>
ff77c352 6#include <linux/interrupt.h>
d2876d08
DB
7#include <linux/irq.h>
8#include <linux/spinlock.h>
1a989d0f 9#include <linux/list.h>
d8f388d8
DB
10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/debugfs.h>
13#include <linux/seq_file.h>
14#include <linux/gpio.h>
ff77c352 15#include <linux/idr.h>
5a0e3ad6 16#include <linux/slab.h>
7b199811 17#include <linux/acpi.h>
53e7cac3 18#include <linux/gpio/driver.h>
0a6d3158 19#include <linux/gpio/machine.h>
c771c2f4 20#include <linux/pinctrl/consumer.h>
3c702e99 21#include <linux/fs.h>
8b92e17e 22#include <linux/compat.h>
953b956a 23#include <linux/file.h>
3c702e99 24#include <uapi/linux/gpio.h>
d2876d08 25
664e3e5a 26#include "gpiolib.h"
f626d6df 27#include "gpiolib-of.h"
77cb907a 28#include "gpiolib-acpi.h"
e7f9ff5d 29#include "gpiolib-swnode.h"
925ca369 30#include "gpiolib-cdev.h"
ef087d8e 31#include "gpiolib-sysfs.h"
664e3e5a 32
3f397c21
UKK
33#define CREATE_TRACE_POINTS
34#include <trace/events/gpio.h>
d2876d08 35
79a9becd 36/* Implementation infrastructure for GPIO interfaces.
d2876d08 37 *
79a9becd
AC
38 * The GPIO programming interface allows for inlining speed-critical
39 * get/set operations for common cases, so that access to SOC-integrated
40 * GPIOs can sometimes cost only an instruction or two per bit.
d2876d08
DB
41 */
42
43
44/* When debugging, extend minimal trust to callers and platform code.
45 * Also emit diagnostic messages that may help initial bringup, when
46 * board setup or driver bugs are most common.
47 *
48 * Otherwise, minimize overhead in what may be bitbanging codepaths.
49 */
50#ifdef DEBUG
51#define extra_checks 1
52#else
53#define extra_checks 0
54#endif
55
ff2b1359
LW
56/* Device and char device-related information */
57static DEFINE_IDA(gpio_ida);
3c702e99
LW
58static dev_t gpio_devt;
59#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
ced2af41 60static int gpio_bus_match(struct device *dev, struct device_driver *drv);
3c702e99
LW
61static struct bus_type gpio_bus_type = {
62 .name = "gpio",
ced2af41 63 .match = gpio_bus_match,
3c702e99 64};
ff2b1359 65
3027743f
LA
66/*
67 * Number of GPIOs to use for the fast path in set array
68 */
69#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
70
d2876d08
DB
71/* gpio_lock prevents conflicts during gpio_desc[] table updates.
72 * While any GPIO is requested, its gpio_chip is not removable;
73 * each GPIO's "requested" flag serves as a lock and refcount.
74 */
0eb4c6c2 75DEFINE_SPINLOCK(gpio_lock);
d2876d08 76
bae48da2
AC
77static DEFINE_MUTEX(gpio_lookup_lock);
78static LIST_HEAD(gpio_lookup_list);
ff2b1359 79LIST_HEAD(gpio_devices);
6d86750c 80
a411e81e
BG
81static DEFINE_MUTEX(gpio_machine_hogs_mutex);
82static LIST_HEAD(gpio_machine_hogs);
83
a0b66a73
LW
84static void gpiochip_free_hogs(struct gpio_chip *gc);
85static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
86 struct lock_class_key *lock_key,
87 struct lock_class_key *request_key);
a0b66a73
LW
88static void gpiochip_irqchip_remove(struct gpio_chip *gc);
89static int gpiochip_irqchip_init_hw(struct gpio_chip *gc);
90static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc);
91static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc);
6d86750c 92
159f3cd9 93static bool gpiolib_initialized;
6d86750c 94
d2876d08
DB
95static inline void desc_set_label(struct gpio_desc *d, const char *label)
96{
d2876d08 97 d->label = label;
d2876d08
DB
98}
99
372e722e 100/**
950d55f5
TR
101 * gpio_to_desc - Convert a GPIO number to its descriptor
102 * @gpio: global GPIO number
103 *
104 * Returns:
105 * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
106 * with the given number exists in the system.
372e722e 107 */
79a9becd 108struct gpio_desc *gpio_to_desc(unsigned gpio)
372e722e 109{
ff2b1359 110 struct gpio_device *gdev;
14e85c0e
AC
111 unsigned long flags;
112
113 spin_lock_irqsave(&gpio_lock, flags);
114
ff2b1359 115 list_for_each_entry(gdev, &gpio_devices, list) {
fdeb8e15
LW
116 if (gdev->base <= gpio &&
117 gdev->base + gdev->ngpio > gpio) {
14e85c0e 118 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 119 return &gdev->descs[gpio - gdev->base];
14e85c0e
AC
120 }
121 }
122
123 spin_unlock_irqrestore(&gpio_lock, flags);
124
0e9a5edf 125 if (!gpio_is_valid(gpio))
c47d9e1b 126 pr_warn("invalid GPIO %d\n", gpio);
0e9a5edf 127
14e85c0e 128 return NULL;
372e722e 129}
79a9becd 130EXPORT_SYMBOL_GPL(gpio_to_desc);
372e722e 131
d468bf9e 132/**
950d55f5
TR
133 * gpiochip_get_desc - get the GPIO descriptor corresponding to the given
134 * hardware number for this chip
a0b66a73 135 * @gc: GPIO chip
950d55f5
TR
136 * @hwnum: hardware number of the GPIO for this chip
137 *
138 * Returns:
35c6cfb4 139 * A pointer to the GPIO descriptor or ``ERR_PTR(-EINVAL)`` if no GPIO exists
950d55f5 140 * in the given chip for the specified hardware number.
d468bf9e 141 */
a0b66a73 142struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc,
06863620 143 unsigned int hwnum)
d468bf9e 144{
a0b66a73 145 struct gpio_device *gdev = gc->gpiodev;
fdeb8e15
LW
146
147 if (hwnum >= gdev->ngpio)
b7d0a28a 148 return ERR_PTR(-EINVAL);
d468bf9e 149
fdeb8e15 150 return &gdev->descs[hwnum];
d468bf9e 151}
97795420 152EXPORT_SYMBOL_GPL(gpiochip_get_desc);
372e722e
AC
153
154/**
950d55f5
TR
155 * desc_to_gpio - convert a GPIO descriptor to the integer namespace
156 * @desc: GPIO descriptor
157 *
372e722e 158 * This should disappear in the future but is needed since we still
950d55f5
TR
159 * use GPIO numbers for error messages and sysfs nodes.
160 *
161 * Returns:
162 * The global GPIO number for the GPIO specified by its descriptor.
372e722e 163 */
79a9becd 164int desc_to_gpio(const struct gpio_desc *desc)
372e722e 165{
fdeb8e15 166 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
372e722e 167}
79a9becd 168EXPORT_SYMBOL_GPL(desc_to_gpio);
372e722e
AC
169
170
79a9becd
AC
171/**
172 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
173 * @desc: descriptor to return the chip of
174 */
175struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
372e722e 176{
dd3b9a44 177 if (!desc || !desc->gdev)
fdeb8e15
LW
178 return NULL;
179 return desc->gdev->chip;
372e722e 180}
79a9becd 181EXPORT_SYMBOL_GPL(gpiod_to_chip);
d2876d08 182
8d0aab2f
AV
183/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
184static int gpiochip_find_base(int ngpio)
185{
ff2b1359 186 struct gpio_device *gdev;
7b61212f 187 int base = GPIO_DYNAMIC_BASE;
8d0aab2f 188
7b61212f 189 list_for_each_entry(gdev, &gpio_devices, list) {
83cabe33 190 /* found a free space? */
7b61212f 191 if (gdev->base >= base + ngpio)
83cabe33 192 break;
7b61212f
CL
193 /* nope, check the space right after the chip */
194 base = gdev->base + gdev->ngpio;
8d0aab2f
AV
195 }
196
83cabe33 197 if (gpio_is_valid(base)) {
8d0aab2f 198 pr_debug("%s: found new base at %d\n", __func__, base);
83cabe33
AC
199 return base;
200 } else {
201 pr_err("%s: cannot find free range\n", __func__);
202 return -ENOSPC;
169b6a7a 203 }
169b6a7a
AV
204}
205
79a9becd
AC
206/**
207 * gpiod_get_direction - return the current direction of a GPIO
208 * @desc: GPIO to get the direction of
209 *
94fc7309 210 * Returns 0 for output, 1 for input, or an error code in case of error.
79a9becd
AC
211 *
212 * This function may sleep if gpiod_cansleep() is true.
213 */
8e53b0f1 214int gpiod_get_direction(struct gpio_desc *desc)
80b0a602 215{
a0b66a73 216 struct gpio_chip *gc;
13daf489 217 unsigned int offset;
d377f56f 218 int ret;
80b0a602 219
a0b66a73 220 gc = gpiod_to_chip(desc);
372e722e 221 offset = gpio_chip_hwgpio(desc);
80b0a602 222
256efaea
RK
223 /*
224 * Open drain emulation using input mode may incorrectly report
225 * input here, fix that up.
226 */
227 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) &&
228 test_bit(FLAG_IS_OUT, &desc->flags))
229 return 0;
230
a0b66a73 231 if (!gc->get_direction)
d0121b85 232 return -ENOTSUPP;
80b0a602 233
a0b66a73 234 ret = gc->get_direction(gc, offset);
4fc5bfeb
AS
235 if (ret < 0)
236 return ret;
237
238 /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */
239 if (ret > 0)
d377f56f 240 ret = 1;
4fc5bfeb
AS
241
242 assign_bit(FLAG_IS_OUT, &desc->flags, !ret);
243
d377f56f 244 return ret;
80b0a602 245}
79a9becd 246EXPORT_SYMBOL_GPL(gpiod_get_direction);
80b0a602 247
1a989d0f
AC
248/*
249 * Add a new chip to the global chips list, keeping the list of chips sorted
ef7c7553 250 * by range(means [base, base + ngpio - 1]) order.
1a989d0f
AC
251 *
252 * Return -EBUSY if the new chip overlaps with some other chip's integer
253 * space.
254 */
ff2b1359 255static int gpiodev_add_to_list(struct gpio_device *gdev)
1a989d0f 256{
a961f9b4 257 struct gpio_device *prev, *next;
1a989d0f 258
ff2b1359 259 if (list_empty(&gpio_devices)) {
a961f9b4 260 /* initial entry in list */
ff2b1359 261 list_add_tail(&gdev->list, &gpio_devices);
e28ecca6 262 return 0;
1a989d0f
AC
263 }
264
243cfa6a 265 next = list_first_entry(&gpio_devices, struct gpio_device, list);
a961f9b4
BJZ
266 if (gdev->base + gdev->ngpio <= next->base) {
267 /* add before first entry */
268 list_add(&gdev->list, &gpio_devices);
269 return 0;
1a989d0f
AC
270 }
271
243cfa6a 272 prev = list_last_entry(&gpio_devices, struct gpio_device, list);
a961f9b4
BJZ
273 if (prev->base + prev->ngpio <= gdev->base) {
274 /* add behind last entry */
275 list_add_tail(&gdev->list, &gpio_devices);
96098df1 276 return 0;
1a989d0f
AC
277 }
278
a961f9b4
BJZ
279 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
280 /* at the end of the list */
281 if (&next->list == &gpio_devices)
282 break;
1a989d0f 283
a961f9b4
BJZ
284 /* add between prev and next */
285 if (prev->base + prev->ngpio <= gdev->base
286 && gdev->base + gdev->ngpio <= next->base) {
287 list_add(&gdev->list, &prev->list);
288 return 0;
289 }
290 }
291
a961f9b4 292 return -EBUSY;
1a989d0f
AC
293}
294
950d55f5 295/*
f881bab0 296 * Convert a GPIO name to its descriptor
582838ea
GU
297 * Note that there is no guarantee that GPIO names are globally unique!
298 * Hence this function will return, if it exists, a reference to the first GPIO
299 * line found that matches the given name.
f881bab0
LW
300 */
301static struct gpio_desc *gpio_name_to_desc(const char * const name)
302{
ff2b1359 303 struct gpio_device *gdev;
f881bab0
LW
304 unsigned long flags;
305
ee203bbd
MM
306 if (!name)
307 return NULL;
308
f881bab0
LW
309 spin_lock_irqsave(&gpio_lock, flags);
310
ff2b1359 311 list_for_each_entry(gdev, &gpio_devices, list) {
66f46e37 312 struct gpio_desc *desc;
f881bab0 313
66f46e37
AS
314 for_each_gpio_desc(gdev->chip, desc) {
315 if (desc->name && !strcmp(desc->name, name)) {
f881bab0 316 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 317 return desc;
f881bab0
LW
318 }
319 }
320 }
321
322 spin_unlock_irqrestore(&gpio_lock, flags);
323
324 return NULL;
325}
326
5f3ca732 327/*
582838ea
GU
328 * Take the names from gc->names and assign them to their GPIO descriptors.
329 * Warn if a name is already used for a GPIO line on a different GPIO chip.
5f3ca732 330 *
582838ea
GU
331 * Note that:
332 * 1. Non-unique names are still accepted,
333 * 2. Name collisions within the same GPIO chip are not reported.
5f3ca732
MP
334 */
335static int gpiochip_set_desc_names(struct gpio_chip *gc)
336{
fdeb8e15 337 struct gpio_device *gdev = gc->gpiodev;
5f3ca732
MP
338 int i;
339
5f3ca732
MP
340 /* First check all names if they are unique */
341 for (i = 0; i != gc->ngpio; ++i) {
342 struct gpio_desc *gpio;
343
344 gpio = gpio_name_to_desc(gc->names[i]);
f881bab0 345 if (gpio)
fdeb8e15 346 dev_warn(&gdev->dev,
34ffd85d 347 "Detected name collision for GPIO name '%s'\n",
f881bab0 348 gc->names[i]);
5f3ca732
MP
349 }
350
351 /* Then add all names to the GPIO descriptors */
352 for (i = 0; i != gc->ngpio; ++i)
fdeb8e15 353 gdev->descs[i].name = gc->names[i];
5f3ca732
MP
354
355 return 0;
356}
357
32fc5aa2
BG
358/*
359 * devprop_gpiochip_set_names - Set GPIO line names using device properties
360 * @chip: GPIO chip whose lines should be named, if possible
361 *
362 * Looks for device property "gpio-line-names" and if it exists assigns
363 * GPIO line names for the chip. The memory allocated for the assigned
b41ba2ec 364 * names belong to the underlying firmware node and should not be released
32fc5aa2
BG
365 * by the caller.
366 */
367static int devprop_gpiochip_set_names(struct gpio_chip *chip)
368{
369 struct gpio_device *gdev = chip->gpiodev;
4ef339bc 370 struct device *dev = &gdev->dev;
32fc5aa2
BG
371 const char **names;
372 int ret, i;
373 int count;
374
4ef339bc 375 count = device_property_string_array_count(dev, "gpio-line-names");
32fc5aa2
BG
376 if (count < 0)
377 return 0;
378
4e804c39
SP
379 /*
380 * When offset is set in the driver side we assume the driver internally
381 * is using more than one gpiochip per the same device. We have to stop
382 * setting friendly names if the specified ones with 'gpio-line-names'
383 * are less than the offset in the device itself. This means all the
384 * lines are not present for every single pin within all the internal
385 * gpiochips.
386 */
387 if (count <= chip->offset) {
4ef339bc 388 dev_warn(dev, "gpio-line-names too short (length %d), cannot map names for the gpiochip at offset %u\n",
4e804c39
SP
389 count, chip->offset);
390 return 0;
32fc5aa2
BG
391 }
392
393 names = kcalloc(count, sizeof(*names), GFP_KERNEL);
394 if (!names)
395 return -ENOMEM;
396
4ef339bc 397 ret = device_property_read_string_array(dev, "gpio-line-names",
32fc5aa2
BG
398 names, count);
399 if (ret < 0) {
4ef339bc 400 dev_warn(dev, "failed to read GPIO line names\n");
32fc5aa2
BG
401 kfree(names);
402 return ret;
403 }
404
4e804c39
SP
405 /*
406 * When more that one gpiochip per device is used, 'count' can
407 * contain at most number gpiochips x chip->ngpio. We have to
408 * correctly distribute all defined lines taking into account
409 * chip->offset as starting point from where we will assign
410 * the names to pins from the 'names' array. Since property
411 * 'gpio-line-names' cannot contains gaps, we have to be sure
412 * we only assign those pins that really exists since chip->ngpio
413 * can be different of the chip->offset.
414 */
415 count = (count > chip->offset) ? count - chip->offset : count;
416 if (count > chip->ngpio)
417 count = chip->ngpio;
418
c73960bb
PR
419 for (i = 0; i < count; i++) {
420 /*
421 * Allow overriding "fixed" names provided by the GPIO
422 * provider. The "fixed" names are more often than not
423 * generic and less informative than the names given in
424 * device properties.
425 */
426 if (names[chip->offset + i] && names[chip->offset + i][0])
427 gdev->descs[i].name = names[chip->offset + i];
428 }
32fc5aa2
BG
429
430 kfree(names);
431
432 return 0;
433}
434
a0b66a73 435static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc)
e4371f6e
SB
436{
437 unsigned long *p;
438
a0b66a73 439 p = bitmap_alloc(gc->ngpio, GFP_KERNEL);
e4371f6e
SB
440 if (!p)
441 return NULL;
442
443 /* Assume by default all GPIOs are valid */
a0b66a73 444 bitmap_fill(p, gc->ngpio);
e4371f6e
SB
445
446 return p;
447}
448
27043a7d
AS
449static unsigned int gpiochip_count_reserved_ranges(struct gpio_chip *gc)
450{
4ef339bc 451 struct device *dev = &gc->gpiodev->dev;
27043a7d
AS
452 int size;
453
454 /* Format is "start, count, ..." */
4ef339bc 455 size = device_property_count_u32(dev, "gpio-reserved-ranges");
27043a7d
AS
456 if (size > 0 && size % 2 == 0)
457 return size;
458
459 return 0;
460}
461
f626d6df 462static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
726cb3ba 463{
27043a7d 464 if (!(gpiochip_count_reserved_ranges(gc) || gc->init_valid_mask))
726cb3ba
SB
465 return 0;
466
f626d6df
LW
467 gc->valid_mask = gpiochip_allocate_mask(gc);
468 if (!gc->valid_mask)
726cb3ba
SB
469 return -ENOMEM;
470
471 return 0;
472}
473
27043a7d
AS
474static int gpiochip_apply_reserved_ranges(struct gpio_chip *gc)
475{
4ef339bc 476 struct device *dev = &gc->gpiodev->dev;
27043a7d
AS
477 unsigned int size;
478 u32 *ranges;
479 int ret;
480
481 size = gpiochip_count_reserved_ranges(gc);
482 if (size == 0)
483 return 0;
484
485 ranges = kmalloc_array(size, sizeof(*ranges), GFP_KERNEL);
486 if (!ranges)
487 return -ENOMEM;
488
4ef339bc
AS
489 ret = device_property_read_u32_array(dev, "gpio-reserved-ranges",
490 ranges, size);
27043a7d
AS
491 if (ret) {
492 kfree(ranges);
493 return ret;
494 }
495
496 while (size) {
497 u32 count = ranges[--size];
498 u32 start = ranges[--size];
499
500 if (start >= gc->ngpio || start + count > gc->ngpio)
501 continue;
502
503 bitmap_clear(gc->valid_mask, start, count);
504 }
505
506 kfree(ranges);
507 return 0;
508}
509
c9fc5aff 510static int gpiochip_init_valid_mask(struct gpio_chip *gc)
f8ec92a9 511{
27043a7d
AS
512 int ret;
513
514 ret = gpiochip_apply_reserved_ranges(gc);
515 if (ret)
516 return ret;
517
c9fc5aff
LW
518 if (gc->init_valid_mask)
519 return gc->init_valid_mask(gc,
520 gc->valid_mask,
521 gc->ngpio);
f8ec92a9
RRD
522
523 return 0;
524}
525
a0b66a73 526static void gpiochip_free_valid_mask(struct gpio_chip *gc)
726cb3ba 527{
a0b66a73
LW
528 bitmap_free(gc->valid_mask);
529 gc->valid_mask = NULL;
726cb3ba
SB
530}
531
b056ca1c
AS
532static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
533{
c40aa80d
AS
534 /*
535 * Device Tree platforms are supposed to use "gpio-ranges"
536 * property. This check ensures that the ->add_pin_ranges()
537 * won't be called for them.
538 */
539 if (device_property_present(&gc->gpiodev->dev, "gpio-ranges"))
540 return 0;
541
b056ca1c
AS
542 if (gc->add_pin_ranges)
543 return gc->add_pin_ranges(gc);
544
545 return 0;
546}
547
a0b66a73 548bool gpiochip_line_is_valid(const struct gpio_chip *gc,
726cb3ba
SB
549 unsigned int offset)
550{
551 /* No mask means all valid */
a0b66a73 552 if (likely(!gc->valid_mask))
726cb3ba 553 return true;
a0b66a73 554 return test_bit(offset, gc->valid_mask);
726cb3ba
SB
555}
556EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
557
ff2b1359
LW
558static void gpiodevice_release(struct device *dev)
559{
3b7c7478 560 struct gpio_device *gdev = to_gpio_device(dev);
cf25ef6b 561 unsigned long flags;
ff2b1359 562
cf25ef6b 563 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 564 list_del(&gdev->list);
cf25ef6b
JH
565 spin_unlock_irqrestore(&gpio_lock, flags);
566
8d4a85b6 567 ida_free(&gpio_ida, gdev->id);
fcf273e5 568 kfree_const(gdev->label);
476e2fc5 569 kfree(gdev->descs);
9efd9e69 570 kfree(gdev);
ff2b1359
LW
571}
572
1f5eb8b1
KG
573#ifdef CONFIG_GPIO_CDEV
574#define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt))
575#define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev))
576#else
577/*
578 * gpiolib_cdev_register() indirectly calls device_add(), which is still
579 * required even when cdev is not selected.
580 */
581#define gcdev_register(gdev, devt) device_add(&(gdev)->dev)
582#define gcdev_unregister(gdev) device_del(&(gdev)->dev)
583#endif
584
159f3cd9
GR
585static int gpiochip_setup_dev(struct gpio_device *gdev)
586{
d377f56f 587 int ret;
159f3cd9 588
1f5eb8b1 589 ret = gcdev_register(gdev, gpio_devt);
d377f56f
LW
590 if (ret)
591 return ret;
111379dc 592
ec851b23
ZH
593 /* From this point, the .release() function cleans up gpio_device */
594 gdev->dev.release = gpiodevice_release;
595
d377f56f
LW
596 ret = gpiochip_sysfs_register(gdev);
597 if (ret)
159f3cd9
GR
598 goto err_remove_device;
599
262b9011
GU
600 dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base,
601 gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic");
159f3cd9
GR
602
603 return 0;
604
605err_remove_device:
1f5eb8b1 606 gcdev_unregister(gdev);
d377f56f 607 return ret;
159f3cd9
GR
608}
609
a0b66a73 610static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog)
a411e81e
BG
611{
612 struct gpio_desc *desc;
613 int rv;
614
a0b66a73 615 desc = gpiochip_get_desc(gc, hog->chip_hwnum);
a411e81e 616 if (IS_ERR(desc)) {
262b9011
GU
617 chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__,
618 PTR_ERR(desc));
a411e81e
BG
619 return;
620 }
621
ba3efdff 622 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
a411e81e
BG
623 return;
624
625 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
626 if (rv)
262b9011
GU
627 gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n",
628 __func__, gc->label, hog->chip_hwnum, rv);
a411e81e
BG
629}
630
a0b66a73 631static void machine_gpiochip_add(struct gpio_chip *gc)
a411e81e
BG
632{
633 struct gpiod_hog *hog;
634
635 mutex_lock(&gpio_machine_hogs_mutex);
636
637 list_for_each_entry(hog, &gpio_machine_hogs, list) {
a0b66a73
LW
638 if (!strcmp(gc->label, hog->chip_label))
639 gpiochip_machine_hog(gc, hog);
a411e81e
BG
640 }
641
642 mutex_unlock(&gpio_machine_hogs_mutex);
643}
644
159f3cd9
GR
645static void gpiochip_setup_devs(void)
646{
647 struct gpio_device *gdev;
d377f56f 648 int ret;
159f3cd9
GR
649
650 list_for_each_entry(gdev, &gpio_devices, list) {
d377f56f
LW
651 ret = gpiochip_setup_dev(gdev);
652 if (ret)
262b9011
GU
653 dev_err(&gdev->dev,
654 "Failed to initialize gpio device (%d)\n", ret);
159f3cd9
GR
655 }
656}
657
a0b66a73 658int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
39c3fd58
AL
659 struct lock_class_key *lock_key,
660 struct lock_class_key *request_key)
d2876d08 661{
990f6756 662 struct fwnode_handle *fwnode = NULL;
ff2b1359 663 struct gpio_device *gdev;
e5ab49cd 664 unsigned long flags;
e5ab49cd 665 unsigned int i;
ec851b23
ZH
666 u32 ngpios = 0;
667 int base = 0;
e5ab49cd 668 int ret = 0;
d2876d08 669
990f6756
BG
670 if (gc->fwnode)
671 fwnode = gc->fwnode;
672 else if (gc->parent)
673 fwnode = dev_fwnode(gc->parent);
674
ff2b1359
LW
675 /*
676 * First: allocate and populate the internal stat container, and
677 * set up the struct device.
678 */
969f07b4 679 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
ff2b1359 680 if (!gdev)
14e85c0e 681 return -ENOMEM;
3c702e99 682 gdev->dev.bus = &gpio_bus_type;
1df62542 683 gdev->dev.parent = gc->parent;
a0b66a73
LW
684 gdev->chip = gc;
685 gc->gpiodev = gdev;
acc6e331 686
4731210c 687 of_gpio_dev_init(gc, gdev);
515321ac 688 acpi_gpio_dev_init(gc, gdev);
acc6e331 689
6cb59afe
AS
690 /*
691 * Assign fwnode depending on the result of the previous calls,
692 * if none of them succeed, assign it to the parent's one.
693 */
24c94060 694 gc->fwnode = gdev->dev.fwnode = dev_fwnode(&gdev->dev) ?: fwnode;
6cb59afe 695
8d4a85b6 696 gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL);
ff2b1359 697 if (gdev->id < 0) {
d377f56f 698 ret = gdev->id;
ff2b1359
LW
699 goto err_free_gdev;
700 }
c351bb64
QW
701
702 ret = dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id);
703 if (ret)
704 goto err_free_ida;
705
ff2b1359 706 device_initialize(&gdev->dev);
a0b66a73
LW
707 if (gc->parent && gc->parent->driver)
708 gdev->owner = gc->parent->driver->owner;
709 else if (gc->owner)
ff2b1359 710 /* TODO: remove chip->owner */
a0b66a73 711 gdev->owner = gc->owner;
ff2b1359
LW
712 else
713 gdev->owner = THIS_MODULE;
d2876d08 714
9dbd1ab2
BG
715 /*
716 * Try the device properties if the driver didn't supply the number
717 * of GPIO lines.
718 */
ec851b23
ZH
719 ngpios = gc->ngpio;
720 if (ngpios == 0) {
9dbd1ab2
BG
721 ret = device_property_read_u32(&gdev->dev, "ngpios", &ngpios);
722 if (ret == -ENODATA)
723 /*
724 * -ENODATA means that there is no property found and
725 * we want to issue the error message to the user.
726 * Besides that, we want to return different error code
727 * to state that supplied value is not valid.
728 */
729 ngpios = 0;
730 else if (ret)
ec851b23 731 goto err_free_dev_name;
9dbd1ab2
BG
732
733 gc->ngpio = ngpios;
734 }
735
a0b66a73
LW
736 if (gc->ngpio == 0) {
737 chip_err(gc, "tried to insert a GPIO chip with zero lines\n");
d377f56f 738 ret = -EINVAL;
ec851b23 739 goto err_free_dev_name;
5ed41cc4 740 }
df4878e9 741
a0b66a73
LW
742 if (gc->ngpio > FASTPATH_NGPIO)
743 chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n",
744 gc->ngpio, FASTPATH_NGPIO);
3027743f 745
ec851b23
ZH
746 gdev->descs = kcalloc(gc->ngpio, sizeof(*gdev->descs), GFP_KERNEL);
747 if (!gdev->descs) {
748 ret = -ENOMEM;
749 goto err_free_dev_name;
750 }
751
a0b66a73 752 gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL);
df4878e9 753 if (!gdev->label) {
d377f56f 754 ret = -ENOMEM;
476e2fc5 755 goto err_free_descs;
df4878e9
LW
756 }
757
a0b66a73 758 gdev->ngpio = gc->ngpio;
43c54eca 759 gdev->data = data;
5ed41cc4 760
d2876d08
DB
761 spin_lock_irqsave(&gpio_lock, flags);
762
fdeb8e15
LW
763 /*
764 * TODO: this allocates a Linux GPIO number base in the global
765 * GPIO numberspace for this chip. In the long run we want to
766 * get *rid* of this numberspace and use only descriptors, but
767 * it may be a pipe dream. It will not happen before we get rid
768 * of the sysfs interface anyways.
769 */
ec851b23 770 base = gc->base;
8d0aab2f 771 if (base < 0) {
a0b66a73 772 base = gpiochip_find_base(gc->ngpio);
8d0aab2f 773 if (base < 0) {
225fce83 774 spin_unlock_irqrestore(&gpio_lock, flags);
ec851b23
ZH
775 ret = base;
776 base = 0;
476e2fc5 777 goto err_free_label;
8d0aab2f 778 }
fdeb8e15
LW
779 /*
780 * TODO: it should not be necessary to reflect the assigned
781 * base outside of the GPIO subsystem. Go over drivers and
782 * see if anyone makes use of this, else drop this and assign
783 * a poison instead.
784 */
a0b66a73 785 gc->base = base;
502df79b
CL
786 } else {
787 dev_warn(&gdev->dev,
788 "Static allocation of GPIO base is deprecated, use dynamic allocation.\n");
8d0aab2f 789 }
fdeb8e15 790 gdev->base = base;
8d0aab2f 791
d377f56f
LW
792 ret = gpiodev_add_to_list(gdev);
793 if (ret) {
05aa5203 794 spin_unlock_irqrestore(&gpio_lock, flags);
24a9dbb1 795 chip_err(gc, "GPIO integer space overlap, cannot add chip\n");
476e2fc5 796 goto err_free_label;
05aa5203 797 }
1a989d0f 798
a0b66a73 799 for (i = 0; i < gc->ngpio; i++)
767cd17a 800 gdev->descs[i].gdev = gdev;
14e85c0e 801
207270dd
DC
802 spin_unlock_irqrestore(&gpio_lock, flags);
803
6accc376 804 BLOCKING_INIT_NOTIFIER_HEAD(&gdev->notifier);
bdbbae24 805 init_rwsem(&gdev->sem);
51c1064e 806
f23f1516 807#ifdef CONFIG_PINCTRL
20ec3e39 808 INIT_LIST_HEAD(&gdev->pin_ranges);
f23f1516
SH
809#endif
810
c73960bb 811 if (gc->names) {
7cba1a4d 812 ret = gpiochip_set_desc_names(gc);
c73960bb
PR
813 if (ret)
814 goto err_remove_from_list;
815 }
816 ret = devprop_gpiochip_set_names(gc);
d377f56f 817 if (ret)
5f3ca732
MP
818 goto err_remove_from_list;
819
a0b66a73 820 ret = gpiochip_alloc_valid_mask(gc);
d377f56f 821 if (ret)
48057ed1 822 goto err_remove_from_list;
e0d89728 823
a0b66a73 824 ret = of_gpiochip_add(gc);
d377f56f 825 if (ret)
48057ed1 826 goto err_free_gpiochip_mask;
28355f81 827
a0b66a73 828 ret = gpiochip_init_valid_mask(gc);
d377f56f 829 if (ret)
35779890 830 goto err_remove_of_chip;
f8ec92a9 831
a0b66a73 832 for (i = 0; i < gc->ngpio; i++) {
3edfb7bd
RRD
833 struct gpio_desc *desc = &gdev->descs[i];
834
a0b66a73 835 if (gc->get_direction && gpiochip_line_is_valid(gc, i)) {
4fc5bfeb 836 assign_bit(FLAG_IS_OUT,
a0b66a73 837 &desc->flags, !gc->get_direction(gc, i));
d95da993 838 } else {
4fc5bfeb 839 assign_bit(FLAG_IS_OUT,
a0b66a73 840 &desc->flags, !gc->direction_input);
d95da993 841 }
3edfb7bd
RRD
842 }
843
a0b66a73 844 ret = gpiochip_add_pin_ranges(gc);
b056ca1c
AS
845 if (ret)
846 goto err_remove_of_chip;
847
a0b66a73 848 acpi_gpiochip_add(gc);
391c970c 849
a0b66a73 850 machine_gpiochip_add(gc);
a411e81e 851
a0b66a73 852 ret = gpiochip_irqchip_init_valid_mask(gc);
9411e3aa
AS
853 if (ret)
854 goto err_remove_acpi_chip;
855
a0b66a73 856 ret = gpiochip_irqchip_init_hw(gc);
fbdf8d4b 857 if (ret)
48057ed1
LW
858 goto err_remove_acpi_chip;
859
a0b66a73 860 ret = gpiochip_add_irqchip(gc, lock_key, request_key);
fbdf8d4b 861 if (ret)
48057ed1
LW
862 goto err_remove_irqchip_mask;
863
3c702e99
LW
864 /*
865 * By first adding the chardev, and then adding the device,
866 * we get a device node entry in sysfs under
867 * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
868 * coldplug of device nodes and other udev business.
159f3cd9
GR
869 * We can do this only if gpiolib has been initialized.
870 * Otherwise, defer until later.
3c702e99 871 */
159f3cd9 872 if (gpiolib_initialized) {
d377f56f
LW
873 ret = gpiochip_setup_dev(gdev);
874 if (ret)
48057ed1 875 goto err_remove_irqchip;
159f3cd9 876 }
cedb1881 877 return 0;
3bae4811 878
48057ed1 879err_remove_irqchip:
a0b66a73 880 gpiochip_irqchip_remove(gc);
48057ed1 881err_remove_irqchip_mask:
a0b66a73 882 gpiochip_irqchip_free_valid_mask(gc);
35779890 883err_remove_acpi_chip:
a0b66a73 884 acpi_gpiochip_remove(gc);
35779890 885err_remove_of_chip:
a0b66a73
LW
886 gpiochip_free_hogs(gc);
887 of_gpiochip_remove(gc);
35779890 888err_free_gpiochip_mask:
a0b66a73
LW
889 gpiochip_remove_pin_ranges(gc);
890 gpiochip_free_valid_mask(gc);
ec851b23
ZH
891 if (gdev->dev.release) {
892 /* release() has been registered by gpiochip_setup_dev() */
893 put_device(&gdev->dev);
894 goto err_print_message;
895 }
5f3ca732 896err_remove_from_list:
225fce83 897 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 898 list_del(&gdev->list);
3bae4811 899 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 900err_free_label:
fcf273e5 901 kfree_const(gdev->label);
476e2fc5
GR
902err_free_descs:
903 kfree(gdev->descs);
c351bb64
QW
904err_free_dev_name:
905 kfree(dev_name(&gdev->dev));
a05a1404 906err_free_ida:
8d4a85b6 907 ida_free(&gpio_ida, gdev->id);
a05a1404 908err_free_gdev:
ec851b23
ZH
909 kfree(gdev);
910err_print_message:
d2876d08 911 /* failures here can mean systems won't boot... */
3cc1fb73
GS
912 if (ret != -EPROBE_DEFER) {
913 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
ec851b23 914 base, base + (int)ngpios - 1,
3cc1fb73
GS
915 gc->label ? : "generic", ret);
916 }
d377f56f 917 return ret;
d2876d08 918}
959bc7b2 919EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
d2876d08 920
43c54eca
LW
921/**
922 * gpiochip_get_data() - get per-subdriver data for the chip
a0b66a73 923 * @gc: GPIO chip
950d55f5
TR
924 *
925 * Returns:
926 * The per-subdriver data for the chip.
43c54eca 927 */
a0b66a73 928void *gpiochip_get_data(struct gpio_chip *gc)
43c54eca 929{
a0b66a73 930 return gc->gpiodev->data;
43c54eca
LW
931}
932EXPORT_SYMBOL_GPL(gpiochip_get_data);
933
d2876d08
DB
934/**
935 * gpiochip_remove() - unregister a gpio_chip
a0b66a73 936 * @gc: the chip to unregister
d2876d08
DB
937 *
938 * A gpio_chip with any GPIOs still requested may not be removed.
939 */
a0b66a73 940void gpiochip_remove(struct gpio_chip *gc)
d2876d08 941{
a0b66a73 942 struct gpio_device *gdev = gc->gpiodev;
d2876d08 943 unsigned long flags;
869233f8 944 unsigned int i;
d2876d08 945
bdbbae24
BG
946 down_write(&gdev->sem);
947
ff2b1359 948 /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
afbc4f31 949 gpiochip_sysfs_unregister(gdev);
a0b66a73 950 gpiochip_free_hogs(gc);
bd203bd5
BJZ
951 /* Numb the device, cancelling all outstanding operations */
952 gdev->chip = NULL;
a0b66a73
LW
953 gpiochip_irqchip_remove(gc);
954 acpi_gpiochip_remove(gc);
955 of_gpiochip_remove(gc);
956 gpiochip_remove_pin_ranges(gc);
957 gpiochip_free_valid_mask(gc);
43c54eca
LW
958 /*
959 * We accept no more calls into the driver from this point, so
960 * NULL the driver data pointer
961 */
962 gdev->data = NULL;
391c970c 963
6798acaa 964 spin_lock_irqsave(&gpio_lock, flags);
fdeb8e15 965 for (i = 0; i < gdev->ngpio; i++) {
a0b66a73 966 if (gpiochip_is_requested(gc, i))
869233f8 967 break;
d2876d08 968 }
d2876d08 969 spin_unlock_irqrestore(&gpio_lock, flags);
14e85c0e 970
ca18a852 971 if (i != gdev->ngpio)
fdeb8e15 972 dev_crit(&gdev->dev,
58383c78 973 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
fab28b89 974
ff2b1359
LW
975 /*
976 * The gpiochip side puts its use of the device to rest here:
977 * if there are no userspace clients, the chardev and device will
978 * be removed, else it will be dangling until the last user is
979 * gone.
980 */
1f5eb8b1 981 gcdev_unregister(gdev);
bdbbae24 982 up_write(&gdev->sem);
ff2b1359 983 put_device(&gdev->dev);
d2876d08
DB
984}
985EXPORT_SYMBOL_GPL(gpiochip_remove);
986
594fa265
GL
987/**
988 * gpiochip_find() - iterator for locating a specific gpio_chip
989 * @data: data to pass to match function
950d55f5 990 * @match: Callback function to check gpio_chip
594fa265
GL
991 *
992 * Similar to bus_find_device. It returns a reference to a gpio_chip as
993 * determined by a user supplied @match callback. The callback should return
994 * 0 if the device doesn't match and non-zero if it does. If the callback is
995 * non-zero, this function will return to the caller and not iterate over any
996 * more gpio_chips.
997 */
07ce8ec7 998struct gpio_chip *gpiochip_find(void *data,
a0b66a73 999 int (*match)(struct gpio_chip *gc,
3d0f7cf0 1000 void *data))
594fa265 1001{
ff2b1359 1002 struct gpio_device *gdev;
a0b66a73 1003 struct gpio_chip *gc = NULL;
594fa265 1004 unsigned long flags;
594fa265
GL
1005
1006 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1007 list_for_each_entry(gdev, &gpio_devices, list)
acf06ff7 1008 if (gdev->chip && match(gdev->chip, data)) {
a0b66a73 1009 gc = gdev->chip;
594fa265 1010 break;
acf06ff7 1011 }
ff2b1359 1012
594fa265
GL
1013 spin_unlock_irqrestore(&gpio_lock, flags);
1014
a0b66a73 1015 return gc;
594fa265 1016}
8fa0c9bf 1017EXPORT_SYMBOL_GPL(gpiochip_find);
d2876d08 1018
a0b66a73 1019static int gpiochip_match_name(struct gpio_chip *gc, void *data)
79697ef9
AC
1020{
1021 const char *name = data;
1022
a0b66a73 1023 return !strcmp(gc->label, name);
79697ef9
AC
1024}
1025
1026static struct gpio_chip *find_chip_by_name(const char *name)
1027{
1028 return gpiochip_find((void *)name, gpiochip_match_name);
1029}
1030
14250520
LW
1031#ifdef CONFIG_GPIOLIB_IRQCHIP
1032
1033/*
1034 * The following is irqchip helper code for gpiochips.
1035 */
1036
9411e3aa
AS
1037static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
1038{
1039 struct gpio_irq_chip *girq = &gc->irq;
1040
1041 if (!girq->init_hw)
1042 return 0;
1043
1044 return girq->init_hw(gc);
1045}
1046
5fbe5b58 1047static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb 1048{
5fbe5b58
LW
1049 struct gpio_irq_chip *girq = &gc->irq;
1050
1051 if (!girq->init_valid_mask)
79b804cb
MW
1052 return 0;
1053
5fbe5b58
LW
1054 girq->valid_mask = gpiochip_allocate_mask(gc);
1055 if (!girq->valid_mask)
79b804cb
MW
1056 return -ENOMEM;
1057
5fbe5b58
LW
1058 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
1059
79b804cb
MW
1060 return 0;
1061}
1062
a0b66a73 1063static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 1064{
a0b66a73
LW
1065 bitmap_free(gc->irq.valid_mask);
1066 gc->irq.valid_mask = NULL;
79b804cb
MW
1067}
1068
a0b66a73 1069bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc,
64ff2c8e 1070 unsigned int offset)
79b804cb 1071{
a0b66a73 1072 if (!gpiochip_line_is_valid(gc, offset))
726cb3ba 1073 return false;
79b804cb 1074 /* No mask means all valid */
a0b66a73 1075 if (likely(!gc->irq.valid_mask))
79b804cb 1076 return true;
a0b66a73 1077 return test_bit(offset, gc->irq.valid_mask);
79b804cb 1078}
64ff2c8e 1079EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
79b804cb 1080
fdd61a01
LW
1081#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1082
1083/**
1084 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
1085 * to a gpiochip
1086 * @gc: the gpiochip to set the irqchip hierarchical handler to
1087 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
1088 * will then percolate up to the parent
1089 */
1090static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
1091 struct irq_chip *irqchip)
1092{
1093 /* DT will deal with mapping each IRQ as we go along */
1094 if (is_of_node(gc->irq.fwnode))
1095 return;
1096
1097 /*
1098 * This is for legacy and boardfile "irqchip" fwnodes: allocate
1099 * irqs upfront instead of dynamically since we don't have the
1100 * dynamic type of allocation that hardware description languages
1101 * provide. Once all GPIO drivers using board files are gone from
1102 * the kernel we can delete this code, but for a transitional period
1103 * it is necessary to keep this around.
1104 */
1105 if (is_fwnode_irqchip(gc->irq.fwnode)) {
1106 int i;
1107 int ret;
1108
1109 for (i = 0; i < gc->ngpio; i++) {
1110 struct irq_fwspec fwspec;
1111 unsigned int parent_hwirq;
1112 unsigned int parent_type;
1113 struct gpio_irq_chip *girq = &gc->irq;
1114
1115 /*
1116 * We call the child to parent translation function
1117 * only to check if the child IRQ is valid or not.
1118 * Just pick the rising edge type here as that is what
1119 * we likely need to support.
1120 */
1121 ret = girq->child_to_parent_hwirq(gc, i,
1122 IRQ_TYPE_EDGE_RISING,
1123 &parent_hwirq,
1124 &parent_type);
1125 if (ret) {
1126 chip_err(gc, "skip set-up on hwirq %d\n",
1127 i);
1128 continue;
1129 }
1130
1131 fwspec.fwnode = gc->irq.fwnode;
1132 /* This is the hwirq for the GPIO line side of things */
1133 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
1134 /* Just pick something */
1135 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
1136 fwspec.param_count = 2;
1137 ret = __irq_domain_alloc_irqs(gc->irq.domain,
1138 /* just pick something */
1139 -1,
1140 1,
1141 NUMA_NO_NODE,
1142 &fwspec,
1143 false,
1144 NULL);
1145 if (ret < 0) {
1146 chip_err(gc,
1147 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1148 i, parent_hwirq,
1149 ret);
1150 }
1151 }
1152 }
1153
1154 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1155
1156 return;
1157}
1158
1159static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1160 struct irq_fwspec *fwspec,
1161 unsigned long *hwirq,
1162 unsigned int *type)
1163{
1164 /* We support standard DT translation */
1165 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1166 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1167 }
1168
1169 /* This is for board files and others not using DT */
1170 if (is_fwnode_irqchip(fwspec->fwnode)) {
1171 int ret;
1172
1173 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1174 if (ret)
1175 return ret;
1176 WARN_ON(*type == IRQ_TYPE_NONE);
1177 return 0;
1178 }
1179 return -EINVAL;
1180}
1181
1182static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1183 unsigned int irq,
1184 unsigned int nr_irqs,
1185 void *data)
1186{
1187 struct gpio_chip *gc = d->host_data;
1188 irq_hw_number_t hwirq;
1189 unsigned int type = IRQ_TYPE_NONE;
1190 struct irq_fwspec *fwspec = data;
91a29af4 1191 union gpio_irq_fwspec gpio_parent_fwspec = {};
fdd61a01
LW
1192 unsigned int parent_hwirq;
1193 unsigned int parent_type;
1194 struct gpio_irq_chip *girq = &gc->irq;
1195 int ret;
1196
1197 /*
1198 * The nr_irqs parameter is always one except for PCI multi-MSI
1199 * so this should not happen.
1200 */
1201 WARN_ON(nr_irqs != 1);
1202
1203 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
1204 if (ret)
1205 return ret;
1206
366950ee 1207 chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
fdd61a01
LW
1208
1209 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
1210 &parent_hwirq, &parent_type);
1211 if (ret) {
1212 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
1213 return ret;
1214 }
366950ee 1215 chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq);
fdd61a01
LW
1216
1217 /*
1218 * We set handle_bad_irq because the .set_type() should
1219 * always be invoked and set the right type of handler.
1220 */
1221 irq_domain_set_info(d,
1222 irq,
1223 hwirq,
1224 gc->irq.chip,
1225 gc,
1226 girq->handler,
1227 NULL, NULL);
1228 irq_set_probe(irq);
1229
fdd61a01 1230 /* This parent only handles asserted level IRQs */
91a29af4
MZ
1231 ret = girq->populate_parent_alloc_arg(gc, &gpio_parent_fwspec,
1232 parent_hwirq, parent_type);
1233 if (ret)
1234 return ret;
24258761 1235
366950ee 1236 chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
fdd61a01 1237 irq, parent_hwirq);
c34f6dc8 1238 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
91a29af4 1239 ret = irq_domain_alloc_irqs_parent(d, irq, 1, &gpio_parent_fwspec);
880b7cf2
KH
1240 /*
1241 * If the parent irqdomain is msi, the interrupts have already
1242 * been allocated, so the EEXIST is good.
1243 */
1244 if (irq_domain_is_msi(d->parent) && (ret == -EEXIST))
1245 ret = 0;
fdd61a01
LW
1246 if (ret)
1247 chip_err(gc,
1248 "failed to allocate parent hwirq %d for hwirq %lu\n",
1249 parent_hwirq, hwirq);
1250
1251 return ret;
1252}
1253
a0b66a73 1254static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc,
fdd61a01
LW
1255 unsigned int offset)
1256{
1257 return offset;
1258}
1259
1260static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
1261{
1262 ops->activate = gpiochip_irq_domain_activate;
1263 ops->deactivate = gpiochip_irq_domain_deactivate;
1264 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
fdd61a01
LW
1265
1266 /*
08f12b45 1267 * We only allow overriding the translate() and free() functions for
fdd61a01 1268 * hierarchical chips, and this should only be done if the user
08f12b45
LP
1269 * really need something other than 1:1 translation for translate()
1270 * callback and free if user wants to free up any resources which
1271 * were allocated during callbacks, for example populate_parent_alloc_arg.
fdd61a01
LW
1272 */
1273 if (!ops->translate)
1274 ops->translate = gpiochip_hierarchy_irq_domain_translate;
08f12b45
LP
1275 if (!ops->free)
1276 ops->free = irq_domain_free_irqs_common;
fdd61a01
LW
1277}
1278
1279static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1280{
1281 if (!gc->irq.child_to_parent_hwirq ||
1282 !gc->irq.fwnode) {
1283 chip_err(gc, "missing irqdomain vital data\n");
1284 return -EINVAL;
1285 }
1286
1287 if (!gc->irq.child_offset_to_irq)
1288 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
1289
24258761
KH
1290 if (!gc->irq.populate_parent_alloc_arg)
1291 gc->irq.populate_parent_alloc_arg =
fdd61a01
LW
1292 gpiochip_populate_parent_fwspec_twocell;
1293
1294 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
1295
1296 gc->irq.domain = irq_domain_create_hierarchy(
1297 gc->irq.parent_domain,
1298 0,
1299 gc->ngpio,
1300 gc->irq.fwnode,
1301 &gc->irq.child_irq_domain_ops,
1302 gc);
1303
1304 if (!gc->irq.domain)
1305 return -ENOMEM;
1306
1307 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
1308
1309 return 0;
1310}
1311
1312static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1313{
1314 return !!gc->irq.parent_domain;
1315}
1316
91a29af4
MZ
1317int gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc,
1318 union gpio_irq_fwspec *gfwspec,
1319 unsigned int parent_hwirq,
1320 unsigned int parent_type)
fdd61a01 1321{
91a29af4 1322 struct irq_fwspec *fwspec = &gfwspec->fwspec;
24258761 1323
a0b66a73 1324 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1325 fwspec->param_count = 2;
1326 fwspec->param[0] = parent_hwirq;
1327 fwspec->param[1] = parent_type;
24258761 1328
91a29af4 1329 return 0;
fdd61a01
LW
1330}
1331EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
1332
91a29af4
MZ
1333int gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc,
1334 union gpio_irq_fwspec *gfwspec,
1335 unsigned int parent_hwirq,
1336 unsigned int parent_type)
fdd61a01 1337{
91a29af4 1338 struct irq_fwspec *fwspec = &gfwspec->fwspec;
24258761 1339
a0b66a73 1340 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1341 fwspec->param_count = 4;
1342 fwspec->param[0] = 0;
1343 fwspec->param[1] = parent_hwirq;
1344 fwspec->param[2] = 0;
1345 fwspec->param[3] = parent_type;
24258761 1346
91a29af4 1347 return 0;
fdd61a01
LW
1348}
1349EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
1350
1351#else
1352
1353static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1354{
1355 return -EINVAL;
1356}
1357
1358static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1359{
1360 return false;
1361}
1362
1363#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
1364
14250520
LW
1365/**
1366 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
1367 * @d: the irqdomain used by this irqchip
1368 * @irq: the global irq number used by this GPIO irqchip irq
1369 * @hwirq: the local IRQ/GPIO line offset on this gpiochip
1370 *
1371 * This function will set up the mapping for a certain IRQ line on a
1372 * gpiochip by assigning the gpiochip as chip data, and using the irqchip
1373 * stored inside the gpiochip.
1374 */
1b95b4eb
TR
1375int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
1376 irq_hw_number_t hwirq)
14250520 1377{
a0b66a73 1378 struct gpio_chip *gc = d->host_data;
d377f56f 1379 int ret = 0;
14250520 1380
a0b66a73 1381 if (!gpiochip_irqchip_irq_valid(gc, hwirq))
dc749a09
GS
1382 return -ENXIO;
1383
a0b66a73 1384 irq_set_chip_data(irq, gc);
a0a8bcf4
GS
1385 /*
1386 * This lock class tells lockdep that GPIO irqs are in a different
1387 * category than their parents, so it won't report false recursion.
1388 */
a0b66a73
LW
1389 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
1390 irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler);
d245b3f9 1391 /* Chips that use nested thread handlers have them marked */
a0b66a73 1392 if (gc->irq.threaded)
1c8732bb 1393 irq_set_nested_thread(irq, 1);
14250520 1394 irq_set_noprobe(irq);
23393d49 1395
a0b66a73
LW
1396 if (gc->irq.num_parents == 1)
1397 ret = irq_set_parent(irq, gc->irq.parents[0]);
1398 else if (gc->irq.map)
1399 ret = irq_set_parent(irq, gc->irq.map[hwirq]);
e0d89728 1400
d377f56f
LW
1401 if (ret < 0)
1402 return ret;
e0d89728 1403
1333b90f
LW
1404 /*
1405 * No set-up of the hardware will happen if IRQ_TYPE_NONE
1406 * is passed as default type.
1407 */
a0b66a73
LW
1408 if (gc->irq.default_type != IRQ_TYPE_NONE)
1409 irq_set_irq_type(irq, gc->irq.default_type);
14250520
LW
1410
1411 return 0;
1412}
1b95b4eb 1413EXPORT_SYMBOL_GPL(gpiochip_irq_map);
14250520 1414
1b95b4eb 1415void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
c3626fde 1416{
a0b66a73 1417 struct gpio_chip *gc = d->host_data;
1c8732bb 1418
a0b66a73 1419 if (gc->irq.threaded)
1c8732bb 1420 irq_set_nested_thread(irq, 0);
c3626fde
LW
1421 irq_set_chip_and_handler(irq, NULL, NULL);
1422 irq_set_chip_data(irq, NULL);
1423}
1b95b4eb 1424EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
c3626fde 1425
14250520
LW
1426static const struct irq_domain_ops gpiochip_domain_ops = {
1427 .map = gpiochip_irq_map,
c3626fde 1428 .unmap = gpiochip_irq_unmap,
14250520
LW
1429 /* Virtually all GPIO irqchips are twocell:ed */
1430 .xlate = irq_domain_xlate_twocell,
1431};
1432
fdd61a01
LW
1433/*
1434 * TODO: move these activate/deactivate in under the hierarchicial
1435 * irqchip implementation as static once SPMI and SSBI (all external
1436 * users) are phased over.
1437 */
ef74f70e
BM
1438/**
1439 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
1440 * @domain: The IRQ domain used by this IRQ chip
1441 * @data: Outermost irq_data associated with the IRQ
1442 * @reserve: If set, only reserve an interrupt vector instead of assigning one
1443 *
1444 * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
1445 * used as the activate function for the &struct irq_domain_ops. The host_data
1446 * for the IRQ domain must be the &struct gpio_chip.
1447 */
1448int gpiochip_irq_domain_activate(struct irq_domain *domain,
1449 struct irq_data *data, bool reserve)
1450{
a0b66a73 1451 struct gpio_chip *gc = domain->host_data;
ef74f70e 1452
a0b66a73 1453 return gpiochip_lock_as_irq(gc, data->hwirq);
ef74f70e
BM
1454}
1455EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
1456
1457/**
1458 * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
1459 * @domain: The IRQ domain used by this IRQ chip
1460 * @data: Outermost irq_data associated with the IRQ
1461 *
1462 * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
1463 * be used as the deactivate function for the &struct irq_domain_ops. The
1464 * host_data for the IRQ domain must be the &struct gpio_chip.
1465 */
1466void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
1467 struct irq_data *data)
1468{
a0b66a73 1469 struct gpio_chip *gc = domain->host_data;
ef74f70e 1470
a0b66a73 1471 return gpiochip_unlock_as_irq(gc, data->hwirq);
ef74f70e
BM
1472}
1473EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
1474
13daf489 1475static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset)
14250520 1476{
a0b66a73 1477 struct irq_domain *domain = gc->irq.domain;
fdd61a01 1478
5467801f
SP
1479#ifdef CONFIG_GPIOLIB_IRQCHIP
1480 /*
1481 * Avoid race condition with other code, which tries to lookup
1482 * an IRQ before the irqchip has been properly registered,
1483 * i.e. while gpiochip is still being brought up.
1484 */
1485 if (!gc->irq.initialized)
1486 return -EPROBE_DEFER;
1487#endif
1488
a0b66a73 1489 if (!gpiochip_irqchip_irq_valid(gc, offset))
4e6b8238 1490 return -ENXIO;
5b76e79c 1491
fdd61a01
LW
1492#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1493 if (irq_domain_is_hierarchy(domain)) {
1494 struct irq_fwspec spec;
1495
1496 spec.fwnode = domain->fwnode;
1497 spec.param_count = 2;
a0b66a73 1498 spec.param[0] = gc->irq.child_offset_to_irq(gc, offset);
fdd61a01
LW
1499 spec.param[1] = IRQ_TYPE_NONE;
1500
1501 return irq_create_fwspec_mapping(&spec);
1502 }
1503#endif
1504
1505 return irq_create_mapping(domain, offset);
14250520
LW
1506}
1507
704f0875 1508int gpiochip_irq_reqres(struct irq_data *d)
14250520 1509{
a0b66a73 1510 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
5b76e79c 1511
a0b66a73 1512 return gpiochip_reqres_irq(gc, d->hwirq);
14250520 1513}
704f0875 1514EXPORT_SYMBOL(gpiochip_irq_reqres);
14250520 1515
704f0875 1516void gpiochip_irq_relres(struct irq_data *d)
14250520 1517{
a0b66a73 1518 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
14250520 1519
a0b66a73 1520 gpiochip_relres_irq(gc, d->hwirq);
14250520 1521}
704f0875 1522EXPORT_SYMBOL(gpiochip_irq_relres);
14250520 1523
a8173820
MS
1524static void gpiochip_irq_mask(struct irq_data *d)
1525{
1526 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1527
1528 if (gc->irq.irq_mask)
1529 gc->irq.irq_mask(d);
1530 gpiochip_disable_irq(gc, d->hwirq);
1531}
1532
1533static void gpiochip_irq_unmask(struct irq_data *d)
1534{
1535 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1536
1537 gpiochip_enable_irq(gc, d->hwirq);
1538 if (gc->irq.irq_unmask)
1539 gc->irq.irq_unmask(d);
1540}
1541
461c1a7d 1542static void gpiochip_irq_enable(struct irq_data *d)
14250520 1543{
a0b66a73 1544 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
e0d89728 1545
a0b66a73 1546 gpiochip_enable_irq(gc, d->hwirq);
a8173820 1547 gc->irq.irq_enable(d);
461c1a7d
HV
1548}
1549
1550static void gpiochip_irq_disable(struct irq_data *d)
1551{
a0b66a73 1552 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
461c1a7d 1553
a8173820 1554 gc->irq.irq_disable(d);
a0b66a73 1555 gpiochip_disable_irq(gc, d->hwirq);
461c1a7d
HV
1556}
1557
a0b66a73 1558static void gpiochip_set_irq_hooks(struct gpio_chip *gc)
ca620f2d 1559{
a0b66a73 1560 struct irq_chip *irqchip = gc->irq.chip;
ca620f2d 1561
6c846d02
MZ
1562 if (irqchip->flags & IRQCHIP_IMMUTABLE)
1563 return;
1564
1565 chip_warn(gc, "not an immutable chip, please consider fixing it!\n");
1566
ca620f2d
HV
1567 if (!irqchip->irq_request_resources &&
1568 !irqchip->irq_release_resources) {
1569 irqchip->irq_request_resources = gpiochip_irq_reqres;
1570 irqchip->irq_release_resources = gpiochip_irq_relres;
1571 }
a0b66a73 1572 if (WARN_ON(gc->irq.irq_enable))
461c1a7d 1573 return;
171948ea 1574 /* Check if the irqchip already has this hook... */
9d552219
NS
1575 if (irqchip->irq_enable == gpiochip_irq_enable ||
1576 irqchip->irq_mask == gpiochip_irq_mask) {
171948ea
HV
1577 /*
1578 * ...and if so, give a gentle warning that this is bad
1579 * practice.
1580 */
a0b66a73 1581 chip_info(gc,
171948ea
HV
1582 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
1583 return;
1584 }
a8173820
MS
1585
1586 if (irqchip->irq_disable) {
1587 gc->irq.irq_disable = irqchip->irq_disable;
1588 irqchip->irq_disable = gpiochip_irq_disable;
1589 } else {
1590 gc->irq.irq_mask = irqchip->irq_mask;
1591 irqchip->irq_mask = gpiochip_irq_mask;
1592 }
1593
1594 if (irqchip->irq_enable) {
1595 gc->irq.irq_enable = irqchip->irq_enable;
1596 irqchip->irq_enable = gpiochip_irq_enable;
1597 } else {
1598 gc->irq.irq_unmask = irqchip->irq_unmask;
1599 irqchip->irq_unmask = gpiochip_irq_unmask;
1600 }
14250520
LW
1601}
1602
e0d89728
TR
1603/**
1604 * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
a0b66a73 1605 * @gc: the GPIO chip to add the IRQ chip to
39c3fd58
AL
1606 * @lock_key: lockdep class for IRQ lock
1607 * @request_key: lockdep class for IRQ request
e0d89728 1608 */
a0b66a73 1609static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1610 struct lock_class_key *lock_key,
1611 struct lock_class_key *request_key)
e0d89728 1612{
5c63a9db 1613 struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev);
a0b66a73 1614 struct irq_chip *irqchip = gc->irq.chip;
e0d89728
TR
1615 unsigned int type;
1616 unsigned int i;
1617
1618 if (!irqchip)
1619 return 0;
1620
a0b66a73
LW
1621 if (gc->irq.parent_handler && gc->can_sleep) {
1622 chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n");
e0d89728
TR
1623 return -EINVAL;
1624 }
1625
a0b66a73 1626 type = gc->irq.default_type;
e0d89728
TR
1627
1628 /*
1629 * Specifying a default trigger is a terrible idea if DT or ACPI is
1630 * used to configure the interrupts, as you may end up with
1631 * conflicting triggers. Tell the user, and reset to NONE.
1632 */
5c63a9db
AS
1633 if (WARN(fwnode && type != IRQ_TYPE_NONE,
1634 "%pfw: Ignoring %u default trigger\n", fwnode, type))
e0d89728
TR
1635 type = IRQ_TYPE_NONE;
1636
ef382374
NS
1637 if (gc->to_irq)
1638 chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__);
1639
a0b66a73
LW
1640 gc->to_irq = gpiochip_to_irq;
1641 gc->irq.default_type = type;
1642 gc->irq.lock_key = lock_key;
1643 gc->irq.request_key = request_key;
e0d89728 1644
fdd61a01 1645 /* If a parent irqdomain is provided, let's build a hierarchy */
a0b66a73
LW
1646 if (gpiochip_hierarchy_is_hierarchical(gc)) {
1647 int ret = gpiochip_hierarchy_add_domain(gc);
fdd61a01
LW
1648 if (ret)
1649 return ret;
1650 } else {
1651 /* Some drivers provide custom irqdomain ops */
5c63a9db 1652 gc->irq.domain = irq_domain_create_simple(fwnode,
a0b66a73
LW
1653 gc->ngpio,
1654 gc->irq.first,
266315fb
AS
1655 gc->irq.domain_ops ?: &gpiochip_domain_ops,
1656 gc);
a0b66a73 1657 if (!gc->irq.domain)
fdd61a01
LW
1658 return -EINVAL;
1659 }
e0d89728 1660
a0b66a73 1661 if (gc->irq.parent_handler) {
a0b66a73 1662 for (i = 0; i < gc->irq.num_parents; i++) {
cfe6807d
MZ
1663 void *data;
1664
1665 if (gc->irq.per_parent_data)
1666 data = gc->irq.parent_handler_data_array[i];
1667 else
1668 data = gc->irq.parent_handler_data ?: gc;
1669
e0d89728
TR
1670 /*
1671 * The parent IRQ chip is already using the chip_data
1672 * for this IRQ chip, so our callbacks simply use the
1673 * handler_data.
1674 */
a0b66a73
LW
1675 irq_set_chained_handler_and_data(gc->irq.parents[i],
1676 gc->irq.parent_handler,
e0d89728
TR
1677 data);
1678 }
e0d89728
TR
1679 }
1680
a0b66a73 1681 gpiochip_set_irq_hooks(gc);
ca620f2d 1682
5467801f
SP
1683 /*
1684 * Using barrier() here to prevent compiler from reordering
1685 * gc->irq.initialized before initialization of above
1686 * GPIO chip irq members.
1687 */
1688 barrier();
1689
1690 gc->irq.initialized = true;
1691
06fb4ecf
ML
1692 acpi_gpiochip_request_interrupts(gc);
1693
e0d89728
TR
1694 return 0;
1695}
1696
14250520
LW
1697/**
1698 * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
a0b66a73 1699 * @gc: the gpiochip to remove the irqchip from
14250520
LW
1700 *
1701 * This is called only from gpiochip_remove()
1702 */
a0b66a73 1703static void gpiochip_irqchip_remove(struct gpio_chip *gc)
14250520 1704{
a0b66a73 1705 struct irq_chip *irqchip = gc->irq.chip;
39e5f096 1706 unsigned int offset;
c3626fde 1707
a0b66a73 1708 acpi_gpiochip_free_interrupts(gc);
afa82fab 1709
a0b66a73
LW
1710 if (irqchip && gc->irq.parent_handler) {
1711 struct gpio_irq_chip *irq = &gc->irq;
39e5f096
TR
1712 unsigned int i;
1713
1714 for (i = 0; i < irq->num_parents; i++)
1715 irq_set_chained_handler_and_data(irq->parents[i],
1716 NULL, NULL);
25e4fe92
DES
1717 }
1718
c3626fde 1719 /* Remove all IRQ mappings and delete the domain */
a0b66a73 1720 if (gc->irq.domain) {
39e5f096
TR
1721 unsigned int irq;
1722
a0b66a73
LW
1723 for (offset = 0; offset < gc->ngpio; offset++) {
1724 if (!gpiochip_irqchip_irq_valid(gc, offset))
79b804cb 1725 continue;
f0fbe7bc 1726
a0b66a73 1727 irq = irq_find_mapping(gc->irq.domain, offset);
f0fbe7bc 1728 irq_dispose_mapping(irq);
79b804cb 1729 }
f0fbe7bc 1730
a0b66a73 1731 irq_domain_remove(gc->irq.domain);
c3626fde 1732 }
14250520 1733
6c846d02 1734 if (irqchip && !(irqchip->flags & IRQCHIP_IMMUTABLE)) {
461c1a7d
HV
1735 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
1736 irqchip->irq_request_resources = NULL;
1737 irqchip->irq_release_resources = NULL;
1738 }
1739 if (irqchip->irq_enable == gpiochip_irq_enable) {
a0b66a73
LW
1740 irqchip->irq_enable = gc->irq.irq_enable;
1741 irqchip->irq_disable = gc->irq.irq_disable;
461c1a7d 1742 }
14250520 1743 }
a0b66a73
LW
1744 gc->irq.irq_enable = NULL;
1745 gc->irq.irq_disable = NULL;
1746 gc->irq.chip = NULL;
79b804cb 1747
a0b66a73 1748 gpiochip_irqchip_free_valid_mask(gc);
14250520
LW
1749}
1750
6a45b0e2
MW
1751/**
1752 * gpiochip_irqchip_add_domain() - adds an irqdomain to a gpiochip
1753 * @gc: the gpiochip to add the irqchip to
1754 * @domain: the irqdomain to add to the gpiochip
1755 *
1756 * This function adds an IRQ domain to the gpiochip.
1757 */
1758int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
1759 struct irq_domain *domain)
1760{
1761 if (!domain)
1762 return -EINVAL;
1763
1764 gc->to_irq = gpiochip_to_irq;
1765 gc->irq.domain = domain;
1766
1767 return 0;
1768}
1769EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain);
1770
14250520
LW
1771#else /* CONFIG_GPIOLIB_IRQCHIP */
1772
a0b66a73 1773static inline int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1774 struct lock_class_key *lock_key,
1775 struct lock_class_key *request_key)
e0d89728
TR
1776{
1777 return 0;
1778}
a0b66a73 1779static void gpiochip_irqchip_remove(struct gpio_chip *gc) {}
9411e3aa 1780
a0b66a73 1781static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
9411e3aa
AS
1782{
1783 return 0;
1784}
1785
a0b66a73 1786static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb
MW
1787{
1788 return 0;
1789}
a0b66a73 1790static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 1791{ }
14250520
LW
1792
1793#endif /* CONFIG_GPIOLIB_IRQCHIP */
1794
c771c2f4
JG
1795/**
1796 * gpiochip_generic_request() - request the gpio function for a pin
a0b66a73 1797 * @gc: the gpiochip owning the GPIO
c771c2f4
JG
1798 * @offset: the offset of the GPIO to request for GPIO function
1799 */
13daf489 1800int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset)
c771c2f4 1801{
56e337f2
BG
1802#ifdef CONFIG_PINCTRL
1803 if (list_empty(&gc->gpiodev->pin_ranges))
1804 return 0;
1805#endif
1806
a0b66a73 1807 return pinctrl_gpio_request(gc->gpiodev->base + offset);
c771c2f4
JG
1808}
1809EXPORT_SYMBOL_GPL(gpiochip_generic_request);
1810
1811/**
1812 * gpiochip_generic_free() - free the gpio function from a pin
a0b66a73 1813 * @gc: the gpiochip to request the gpio function for
c771c2f4
JG
1814 * @offset: the offset of the GPIO to free from GPIO function
1815 */
13daf489 1816void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset)
c771c2f4 1817{
56e337f2
BG
1818#ifdef CONFIG_PINCTRL
1819 if (list_empty(&gc->gpiodev->pin_ranges))
1820 return;
1821#endif
1822
a0b66a73 1823 pinctrl_gpio_free(gc->gpiodev->base + offset);
c771c2f4
JG
1824}
1825EXPORT_SYMBOL_GPL(gpiochip_generic_free);
1826
2956b5d9
MW
1827/**
1828 * gpiochip_generic_config() - apply configuration for a pin
a0b66a73 1829 * @gc: the gpiochip owning the GPIO
2956b5d9
MW
1830 * @offset: the offset of the GPIO to apply the configuration
1831 * @config: the configuration to be applied
1832 */
13daf489 1833int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset,
2956b5d9
MW
1834 unsigned long config)
1835{
a0b66a73 1836 return pinctrl_gpio_set_config(gc->gpiodev->base + offset, config);
2956b5d9
MW
1837}
1838EXPORT_SYMBOL_GPL(gpiochip_generic_config);
1839
f23f1516 1840#ifdef CONFIG_PINCTRL
165adc9c 1841
586a87e6
CR
1842/**
1843 * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
a0b66a73 1844 * @gc: the gpiochip to add the range for
d32651f6 1845 * @pctldev: the pin controller to map to
586a87e6
CR
1846 * @gpio_offset: the start offset in the current gpio_chip number space
1847 * @pin_group: name of the pin group inside the pin controller
973c1714
CL
1848 *
1849 * Calling this function directly from a DeviceTree-supported
1850 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
1851 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
1852 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
586a87e6 1853 */
a0b66a73 1854int gpiochip_add_pingroup_range(struct gpio_chip *gc,
586a87e6
CR
1855 struct pinctrl_dev *pctldev,
1856 unsigned int gpio_offset, const char *pin_group)
1857{
1858 struct gpio_pin_range *pin_range;
a0b66a73 1859 struct gpio_device *gdev = gc->gpiodev;
586a87e6
CR
1860 int ret;
1861
1862 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
1863 if (!pin_range) {
a0b66a73 1864 chip_err(gc, "failed to allocate pin ranges\n");
586a87e6
CR
1865 return -ENOMEM;
1866 }
1867
1868 /* Use local offset as range ID */
1869 pin_range->range.id = gpio_offset;
a0b66a73
LW
1870 pin_range->range.gc = gc;
1871 pin_range->range.name = gc->label;
fdeb8e15 1872 pin_range->range.base = gdev->base + gpio_offset;
586a87e6
CR
1873 pin_range->pctldev = pctldev;
1874
1875 ret = pinctrl_get_group_pins(pctldev, pin_group,
1876 &pin_range->range.pins,
1877 &pin_range->range.npins);
61c6375d
MN
1878 if (ret < 0) {
1879 kfree(pin_range);
586a87e6 1880 return ret;
61c6375d 1881 }
586a87e6
CR
1882
1883 pinctrl_add_gpio_range(pctldev, &pin_range->range);
1884
a0b66a73 1885 chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n",
1a2a99c6 1886 gpio_offset, gpio_offset + pin_range->range.npins - 1,
586a87e6
CR
1887 pinctrl_dev_get_devname(pctldev), pin_group);
1888
20ec3e39 1889 list_add_tail(&pin_range->node, &gdev->pin_ranges);
586a87e6
CR
1890
1891 return 0;
1892}
1893EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
1894
3f0f8670
LW
1895/**
1896 * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
a0b66a73 1897 * @gc: the gpiochip to add the range for
950d55f5 1898 * @pinctl_name: the dev_name() of the pin controller to map to
316511c0
LW
1899 * @gpio_offset: the start offset in the current gpio_chip number space
1900 * @pin_offset: the start offset in the pin controller number space
3f0f8670
LW
1901 * @npins: the number of pins from the offset of each pin space (GPIO and
1902 * pin controller) to accumulate in this range
950d55f5
TR
1903 *
1904 * Returns:
1905 * 0 on success, or a negative error-code on failure.
973c1714
CL
1906 *
1907 * Calling this function directly from a DeviceTree-supported
1908 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
1909 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
1910 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
3f0f8670 1911 */
a0b66a73 1912int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
316511c0 1913 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 1914 unsigned int npins)
f23f1516
SH
1915{
1916 struct gpio_pin_range *pin_range;
a0b66a73 1917 struct gpio_device *gdev = gc->gpiodev;
b4d4b1f0 1918 int ret;
f23f1516 1919
3f0f8670 1920 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
f23f1516 1921 if (!pin_range) {
a0b66a73 1922 chip_err(gc, "failed to allocate pin ranges\n");
1e63d7b9 1923 return -ENOMEM;
f23f1516
SH
1924 }
1925
3f0f8670 1926 /* Use local offset as range ID */
316511c0 1927 pin_range->range.id = gpio_offset;
a0b66a73
LW
1928 pin_range->range.gc = gc;
1929 pin_range->range.name = gc->label;
fdeb8e15 1930 pin_range->range.base = gdev->base + gpio_offset;
316511c0 1931 pin_range->range.pin_base = pin_offset;
f23f1516 1932 pin_range->range.npins = npins;
192c369c 1933 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
f23f1516 1934 &pin_range->range);
8f23ca1a 1935 if (IS_ERR(pin_range->pctldev)) {
b4d4b1f0 1936 ret = PTR_ERR(pin_range->pctldev);
a0b66a73 1937 chip_err(gc, "could not create pin range\n");
3f0f8670 1938 kfree(pin_range);
b4d4b1f0 1939 return ret;
3f0f8670 1940 }
a0b66a73 1941 chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
1a2a99c6 1942 gpio_offset, gpio_offset + npins - 1,
316511c0
LW
1943 pinctl_name,
1944 pin_offset, pin_offset + npins - 1);
f23f1516 1945
20ec3e39 1946 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1e63d7b9
LW
1947
1948 return 0;
f23f1516 1949}
165adc9c 1950EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
f23f1516 1951
3f0f8670
LW
1952/**
1953 * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
a0b66a73 1954 * @gc: the chip to remove all the mappings for
3f0f8670 1955 */
a0b66a73 1956void gpiochip_remove_pin_ranges(struct gpio_chip *gc)
f23f1516
SH
1957{
1958 struct gpio_pin_range *pin_range, *tmp;
a0b66a73 1959 struct gpio_device *gdev = gc->gpiodev;
f23f1516 1960
20ec3e39 1961 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
f23f1516
SH
1962 list_del(&pin_range->node);
1963 pinctrl_remove_gpio_range(pin_range->pctldev,
1964 &pin_range->range);
3f0f8670 1965 kfree(pin_range);
f23f1516
SH
1966 }
1967}
165adc9c
LW
1968EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
1969
1970#endif /* CONFIG_PINCTRL */
f23f1516 1971
d2876d08
DB
1972/* These "optional" allocation calls help prevent drivers from stomping
1973 * on each other, and help provide better diagnostics in debugfs.
1974 * They're called even less than the "set direction" calls.
1975 */
fac9d885 1976static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
d2876d08 1977{
a0b66a73 1978 struct gpio_chip *gc = desc->gdev->chip;
d377f56f 1979 int ret;
d2876d08 1980 unsigned long flags;
3789f5ac 1981 unsigned offset;
d2876d08 1982
18534df4
MS
1983 if (label) {
1984 label = kstrdup_const(label, GFP_KERNEL);
1985 if (!label)
1986 return -ENOMEM;
1987 }
1988
bcabdef1
AC
1989 spin_lock_irqsave(&gpio_lock, flags);
1990
d2876d08 1991 /* NOTE: gpio_request() can be called in early boot,
35e8bb51 1992 * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
d2876d08
DB
1993 */
1994
1995 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
1996 desc_set_label(desc, label ? : "?");
438d8908 1997 } else {
d377f56f 1998 ret = -EBUSY;
95d9f84f 1999 goto out_free_unlock;
35e8bb51
DB
2000 }
2001
a0b66a73
LW
2002 if (gc->request) {
2003 /* gc->request may sleep */
35e8bb51 2004 spin_unlock_irqrestore(&gpio_lock, flags);
3789f5ac 2005 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
2006 if (gpiochip_line_is_valid(gc, offset))
2007 ret = gc->request(gc, offset);
3789f5ac 2008 else
d377f56f 2009 ret = -EINVAL;
35e8bb51
DB
2010 spin_lock_irqsave(&gpio_lock, flags);
2011
8bbff39c 2012 if (ret) {
35e8bb51 2013 desc_set_label(desc, NULL);
35e8bb51 2014 clear_bit(FLAG_REQUESTED, &desc->flags);
95d9f84f 2015 goto out_free_unlock;
35e8bb51 2016 }
438d8908 2017 }
a0b66a73
LW
2018 if (gc->get_direction) {
2019 /* gc->get_direction may sleep */
80b0a602 2020 spin_unlock_irqrestore(&gpio_lock, flags);
372e722e 2021 gpiod_get_direction(desc);
80b0a602
MN
2022 spin_lock_irqsave(&gpio_lock, flags);
2023 }
77c2d792 2024 spin_unlock_irqrestore(&gpio_lock, flags);
95d9f84f
AS
2025 return 0;
2026
2027out_free_unlock:
2028 spin_unlock_irqrestore(&gpio_lock, flags);
2029 kfree_const(label);
d377f56f 2030 return ret;
77c2d792
MW
2031}
2032
fdeb8e15
LW
2033/*
2034 * This descriptor validation needs to be inserted verbatim into each
2035 * function taking a descriptor, so we need to use a preprocessor
54d77198
LW
2036 * macro to avoid endless duplication. If the desc is NULL it is an
2037 * optional GPIO and calls should just bail out.
fdeb8e15 2038 */
a746a232
RV
2039static int validate_desc(const struct gpio_desc *desc, const char *func)
2040{
2041 if (!desc)
2042 return 0;
2043 if (IS_ERR(desc)) {
2044 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
2045 return PTR_ERR(desc);
2046 }
2047 if (!desc->gdev) {
2048 pr_warn("%s: invalid GPIO (no device)\n", func);
2049 return -EINVAL;
2050 }
2051 if (!desc->gdev->chip) {
2052 dev_warn(&desc->gdev->dev,
2053 "%s: backing chip is gone\n", func);
2054 return 0;
2055 }
2056 return 1;
2057}
2058
fdeb8e15 2059#define VALIDATE_DESC(desc) do { \
a746a232
RV
2060 int __valid = validate_desc(desc, __func__); \
2061 if (__valid <= 0) \
2062 return __valid; \
2063 } while (0)
fdeb8e15
LW
2064
2065#define VALIDATE_DESC_VOID(desc) do { \
a746a232
RV
2066 int __valid = validate_desc(desc, __func__); \
2067 if (__valid <= 0) \
fdeb8e15 2068 return; \
a746a232 2069 } while (0)
fdeb8e15 2070
0eb4c6c2 2071int gpiod_request(struct gpio_desc *desc, const char *label)
77c2d792 2072{
d377f56f 2073 int ret = -EPROBE_DEFER;
fdeb8e15 2074 struct gpio_device *gdev;
77c2d792 2075
fdeb8e15
LW
2076 VALIDATE_DESC(desc);
2077 gdev = desc->gdev;
77c2d792 2078
fdeb8e15 2079 if (try_module_get(gdev->owner)) {
d377f56f 2080 ret = gpiod_request_commit(desc, label);
8bbff39c 2081 if (ret)
fdeb8e15 2082 module_put(gdev->owner);
33a68e86
LW
2083 else
2084 get_device(&gdev->dev);
77c2d792
MW
2085 }
2086
d377f56f
LW
2087 if (ret)
2088 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
77c2d792 2089
d377f56f 2090 return ret;
d2876d08 2091}
372e722e 2092
fac9d885 2093static bool gpiod_free_commit(struct gpio_desc *desc)
d2876d08 2094{
77c2d792 2095 bool ret = false;
d2876d08 2096 unsigned long flags;
a0b66a73 2097 struct gpio_chip *gc;
d2876d08 2098
3d599d1c
UKK
2099 might_sleep();
2100
372e722e 2101 gpiod_unexport(desc);
d8f388d8 2102
d2876d08
DB
2103 spin_lock_irqsave(&gpio_lock, flags);
2104
a0b66a73
LW
2105 gc = desc->gdev->chip;
2106 if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) {
2107 if (gc->free) {
35e8bb51 2108 spin_unlock_irqrestore(&gpio_lock, flags);
a0b66a73
LW
2109 might_sleep_if(gc->can_sleep);
2110 gc->free(gc, gpio_chip_hwgpio(desc));
35e8bb51
DB
2111 spin_lock_irqsave(&gpio_lock, flags);
2112 }
18534df4 2113 kfree_const(desc->label);
d2876d08 2114 desc_set_label(desc, NULL);
07697461 2115 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
35e8bb51 2116 clear_bit(FLAG_REQUESTED, &desc->flags);
aca5ce14 2117 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
25553ff0 2118 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
9225d516
DF
2119 clear_bit(FLAG_PULL_UP, &desc->flags);
2120 clear_bit(FLAG_PULL_DOWN, &desc->flags);
2148ad77 2121 clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
73e03419
KG
2122 clear_bit(FLAG_EDGE_RISING, &desc->flags);
2123 clear_bit(FLAG_EDGE_FALLING, &desc->flags);
f625d460 2124 clear_bit(FLAG_IS_HOGGED, &desc->flags);
63636d95
GU
2125#ifdef CONFIG_OF_DYNAMIC
2126 desc->hog = NULL;
65cff704
KG
2127#endif
2128#ifdef CONFIG_GPIO_CDEV
2129 WRITE_ONCE(desc->debounce_period_us, 0);
63636d95 2130#endif
77c2d792
MW
2131 ret = true;
2132 }
d2876d08
DB
2133
2134 spin_unlock_irqrestore(&gpio_lock, flags);
6accc376
KG
2135 blocking_notifier_call_chain(&desc->gdev->notifier,
2136 GPIOLINE_CHANGED_RELEASED, desc);
51c1064e 2137
77c2d792
MW
2138 return ret;
2139}
2140
0eb4c6c2 2141void gpiod_free(struct gpio_desc *desc)
77c2d792 2142{
fac9d885 2143 if (desc && desc->gdev && gpiod_free_commit(desc)) {
fdeb8e15 2144 module_put(desc->gdev->owner);
33a68e86
LW
2145 put_device(&desc->gdev->dev);
2146 } else {
77c2d792 2147 WARN_ON(extra_checks);
33a68e86 2148 }
d2876d08 2149}
372e722e 2150
d2876d08
DB
2151/**
2152 * gpiochip_is_requested - return string iff signal was requested
a0b66a73 2153 * @gc: controller managing the signal
d2876d08
DB
2154 * @offset: of signal within controller's 0..(ngpio - 1) range
2155 *
2156 * Returns NULL if the GPIO is not currently requested, else a string.
9c8318ff
AC
2157 * The string returned is the label passed to gpio_request(); if none has been
2158 * passed it is a meaningless, non-NULL constant.
d2876d08
DB
2159 *
2160 * This function is for use by GPIO controller drivers. The label can
2161 * help with diagnostics, and knowing that the signal is used as a GPIO
2162 * can help avoid accidentally multiplexing it to another controller.
2163 */
13daf489 2164const char *gpiochip_is_requested(struct gpio_chip *gc, unsigned int offset)
d2876d08 2165{
6c0b4e6c 2166 struct gpio_desc *desc;
6c0b4e6c 2167
a0b66a73 2168 desc = gpiochip_get_desc(gc, offset);
1739a2d8
BG
2169 if (IS_ERR(desc))
2170 return NULL;
6c0b4e6c 2171
372e722e 2172 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
d2876d08 2173 return NULL;
372e722e 2174 return desc->label;
d2876d08
DB
2175}
2176EXPORT_SYMBOL_GPL(gpiochip_is_requested);
2177
77c2d792
MW
2178/**
2179 * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
a0b66a73 2180 * @gc: GPIO chip
950d55f5 2181 * @hwnum: hardware number of the GPIO for which to request the descriptor
77c2d792 2182 * @label: label for the GPIO
5923ea6c
LW
2183 * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
2184 * specify things like line inversion semantics with the machine flags
2185 * such as GPIO_OUT_LOW
2186 * @dflags: descriptor request flags for this GPIO or 0 if default, this
2187 * can be used to specify consumer semantics such as open drain
77c2d792
MW
2188 *
2189 * Function allows GPIO chip drivers to request and use their own GPIO
2190 * descriptors via gpiolib API. Difference to gpiod_request() is that this
2191 * function will not increase reference count of the GPIO chip module. This
2192 * allows the GPIO chip module to be unloaded as needed (we assume that the
2193 * GPIO chip driver handles freeing the GPIOs it has requested).
950d55f5
TR
2194 *
2195 * Returns:
2196 * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
2197 * code on failure.
77c2d792 2198 */
a0b66a73 2199struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc,
06863620 2200 unsigned int hwnum,
21abf103 2201 const char *label,
5923ea6c
LW
2202 enum gpio_lookup_flags lflags,
2203 enum gpiod_flags dflags)
77c2d792 2204{
a0b66a73 2205 struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum);
d377f56f 2206 int ret;
77c2d792 2207
abdc08a3 2208 if (IS_ERR(desc)) {
a0b66a73 2209 chip_err(gc, "failed to get GPIO descriptor\n");
abdc08a3
AC
2210 return desc;
2211 }
2212
d377f56f
LW
2213 ret = gpiod_request_commit(desc, label);
2214 if (ret < 0)
2215 return ERR_PTR(ret);
77c2d792 2216
d377f56f
LW
2217 ret = gpiod_configure_flags(desc, label, lflags, dflags);
2218 if (ret) {
a0b66a73 2219 chip_err(gc, "setup of own GPIO %s failed\n", label);
21abf103 2220 gpiod_free_commit(desc);
d377f56f 2221 return ERR_PTR(ret);
21abf103
LW
2222 }
2223
abdc08a3 2224 return desc;
77c2d792 2225}
f7d4ad98 2226EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
77c2d792
MW
2227
2228/**
2229 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
2230 * @desc: GPIO descriptor to free
2231 *
2232 * Function frees the given GPIO requested previously with
2233 * gpiochip_request_own_desc().
2234 */
2235void gpiochip_free_own_desc(struct gpio_desc *desc)
2236{
2237 if (desc)
fac9d885 2238 gpiod_free_commit(desc);
77c2d792 2239}
f7d4ad98 2240EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
d2876d08 2241
fdeb8e15
LW
2242/*
2243 * Drivers MUST set GPIO direction before making get/set calls. In
d2876d08
DB
2244 * some cases this is done in early boot, before IRQs are enabled.
2245 *
2246 * As a rule these aren't called more than once (except for drivers
2247 * using the open-drain emulation idiom) so these are natural places
2248 * to accumulate extra debugging checks. Note that we can't (yet)
2249 * rely on gpio_request() having been called beforehand.
2250 */
2251
d99f8876 2252static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset,
62adc6f3 2253 unsigned long config)
71479789 2254{
d90f3685
BG
2255 if (!gc->set_config)
2256 return -ENOTSUPP;
542f3615 2257
62adc6f3 2258 return gc->set_config(gc, offset, config);
71479789
TP
2259}
2260
0c4d8666
AS
2261static int gpio_set_config_with_argument(struct gpio_desc *desc,
2262 enum pin_config_param mode,
2263 u32 argument)
d99f8876 2264{
a0b66a73 2265 struct gpio_chip *gc = desc->gdev->chip;
91b4ea5f 2266 unsigned long config;
0c4d8666
AS
2267
2268 config = pinconf_to_config_packed(mode, argument);
2269 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
2270}
2271
baca3b15
AS
2272static int gpio_set_config_with_argument_optional(struct gpio_desc *desc,
2273 enum pin_config_param mode,
2274 u32 argument)
2275{
2276 struct device *dev = &desc->gdev->dev;
2277 int gpio = gpio_chip_hwgpio(desc);
2278 int ret;
2279
2280 ret = gpio_set_config_with_argument(desc, mode, argument);
2281 if (ret != -ENOTSUPP)
2282 return ret;
d99f8876
BG
2283
2284 switch (mode) {
baca3b15
AS
2285 case PIN_CONFIG_PERSIST_STATE:
2286 dev_dbg(dev, "Persistence not supported for GPIO %d\n", gpio);
d99f8876 2287 break;
d99f8876 2288 default:
baca3b15 2289 break;
d99f8876
BG
2290 }
2291
baca3b15
AS
2292 return 0;
2293}
2294
0c4d8666
AS
2295static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode)
2296{
6aa32ad7 2297 return gpio_set_config_with_argument(desc, mode, 0);
d99f8876
BG
2298}
2299
5f4bf171 2300static int gpio_set_bias(struct gpio_desc *desc)
2148ad77 2301{
9ef6293c 2302 enum pin_config_param bias;
6aa32ad7 2303 unsigned int arg;
2148ad77
KG
2304
2305 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
2306 bias = PIN_CONFIG_BIAS_DISABLE;
2307 else if (test_bit(FLAG_PULL_UP, &desc->flags))
2308 bias = PIN_CONFIG_BIAS_PULL_UP;
2309 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
2310 bias = PIN_CONFIG_BIAS_PULL_DOWN;
9ef6293c
AS
2311 else
2312 return 0;
2148ad77 2313
6aa32ad7
AS
2314 switch (bias) {
2315 case PIN_CONFIG_BIAS_PULL_DOWN:
2316 case PIN_CONFIG_BIAS_PULL_UP:
2317 arg = 1;
2318 break;
2319
2320 default:
2321 arg = 0;
2322 break;
2148ad77 2323 }
6aa32ad7 2324
baca3b15 2325 return gpio_set_config_with_argument_optional(desc, bias, arg);
2148ad77
KG
2326}
2327
660c619b
AS
2328/**
2329 * gpio_set_debounce_timeout() - Set debounce timeout
2330 * @desc: GPIO descriptor to set the debounce timeout
2331 * @debounce: Debounce timeout in microseconds
2332 *
2333 * The function calls the certain GPIO driver to set debounce timeout
2334 * in the hardware.
2335 *
2336 * Returns 0 on success, or negative error code otherwise.
2337 */
f725edd8
AS
2338int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce)
2339{
2340 return gpio_set_config_with_argument_optional(desc,
2341 PIN_CONFIG_INPUT_DEBOUNCE,
2342 debounce);
2148ad77
KG
2343}
2344
79a9becd
AC
2345/**
2346 * gpiod_direction_input - set the GPIO direction to input
2347 * @desc: GPIO to set to input
2348 *
2349 * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
2350 * be called safely on it.
2351 *
2352 * Return 0 in case of success, else an error code.
2353 */
2354int gpiod_direction_input(struct gpio_desc *desc)
d2876d08 2355{
a0b66a73 2356 struct gpio_chip *gc;
d377f56f 2357 int ret = 0;
d2876d08 2358
fdeb8e15 2359 VALIDATE_DESC(desc);
a0b66a73 2360 gc = desc->gdev->chip;
bcabdef1 2361
e48d194d
LW
2362 /*
2363 * It is legal to have no .get() and .direction_input() specified if
2364 * the chip is output-only, but you can't specify .direction_input()
2365 * and not support the .get() operation, that doesn't make sense.
2366 */
a0b66a73 2367 if (!gc->get && gc->direction_input) {
6424de5a 2368 gpiod_warn(desc,
e48d194d
LW
2369 "%s: missing get() but have direction_input()\n",
2370 __func__);
be1a4b13
LW
2371 return -EIO;
2372 }
2373
e48d194d
LW
2374 /*
2375 * If we have a .direction_input() callback, things are simple,
2376 * just call it. Else we are some input-only chip so try to check the
2377 * direction (if .get_direction() is supported) else we silently
2378 * assume we are in input mode after this.
2379 */
a0b66a73
LW
2380 if (gc->direction_input) {
2381 ret = gc->direction_input(gc, gpio_chip_hwgpio(desc));
2382 } else if (gc->get_direction &&
2383 (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) {
ae9847f4 2384 gpiod_warn(desc,
e48d194d
LW
2385 "%s: missing direction_input() operation and line is output\n",
2386 __func__);
ae9847f4
RRD
2387 return -EIO;
2388 }
2148ad77 2389 if (ret == 0) {
d2876d08 2390 clear_bit(FLAG_IS_OUT, &desc->flags);
5f4bf171 2391 ret = gpio_set_bias(desc);
2148ad77 2392 }
d449991c 2393
d377f56f 2394 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
d82da797 2395
d377f56f 2396 return ret;
d2876d08 2397}
79a9becd 2398EXPORT_SYMBOL_GPL(gpiod_direction_input);
372e722e 2399
fac9d885 2400static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
d2876d08 2401{
c663e5f5 2402 struct gpio_chip *gc = desc->gdev->chip;
ad17731d 2403 int val = !!value;
ae9847f4 2404 int ret = 0;
d2876d08 2405
e48d194d
LW
2406 /*
2407 * It's OK not to specify .direction_output() if the gpiochip is
2408 * output-only, but if there is then not even a .set() operation it
2409 * is pretty tricky to drive the output line.
2410 */
ae9847f4 2411 if (!gc->set && !gc->direction_output) {
6424de5a 2412 gpiod_warn(desc,
e48d194d
LW
2413 "%s: missing set() and direction_output() operations\n",
2414 __func__);
be1a4b13
LW
2415 return -EIO;
2416 }
2417
ae9847f4
RRD
2418 if (gc->direction_output) {
2419 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
2420 } else {
e48d194d 2421 /* Check that we are in output mode if we can */
ae9847f4
RRD
2422 if (gc->get_direction &&
2423 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
2424 gpiod_warn(desc,
2425 "%s: missing direction_output() operation\n",
2426 __func__);
2427 return -EIO;
2428 }
e48d194d
LW
2429 /*
2430 * If we can't actively set the direction, we are some
2431 * output-only chip, so just drive the output as desired.
2432 */
ae9847f4
RRD
2433 gc->set(gc, gpio_chip_hwgpio(desc), val);
2434 }
2435
c663e5f5 2436 if (!ret)
d2876d08 2437 set_bit(FLAG_IS_OUT, &desc->flags);
ad17731d 2438 trace_gpio_value(desc_to_gpio(desc), 0, val);
c663e5f5
LW
2439 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
2440 return ret;
d2876d08 2441}
ef70bbe1
PZ
2442
2443/**
2444 * gpiod_direction_output_raw - set the GPIO direction to output
2445 * @desc: GPIO to set to output
2446 * @value: initial output value of the GPIO
2447 *
2448 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2449 * be called safely on it. The initial value of the output must be specified
2450 * as raw value on the physical line without regard for the ACTIVE_LOW status.
2451 *
2452 * Return 0 in case of success, else an error code.
2453 */
2454int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
2455{
fdeb8e15 2456 VALIDATE_DESC(desc);
fac9d885 2457 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1
PZ
2458}
2459EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
2460
2461/**
90df4fe0 2462 * gpiod_direction_output - set the GPIO direction to output
ef70bbe1
PZ
2463 * @desc: GPIO to set to output
2464 * @value: initial output value of the GPIO
2465 *
2466 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2467 * be called safely on it. The initial value of the output must be specified
2468 * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
2469 * account.
2470 *
2471 * Return 0 in case of success, else an error code.
2472 */
2473int gpiod_direction_output(struct gpio_desc *desc, int value)
2474{
02e47980
LW
2475 int ret;
2476
fdeb8e15 2477 VALIDATE_DESC(desc);
ef70bbe1
PZ
2478 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2479 value = !value;
ad17731d
LW
2480 else
2481 value = !!value;
02e47980 2482
4e9439dd
HV
2483 /* GPIOs used for enabled IRQs shall not be set as output */
2484 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
2485 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
02e47980
LW
2486 gpiod_err(desc,
2487 "%s: tried to set a GPIO tied to an IRQ as output\n",
2488 __func__);
2489 return -EIO;
2490 }
2491
2492 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
2493 /* First see if we can enable open drain in hardware */
83522358 2494 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN);
02e47980
LW
2495 if (!ret)
2496 goto set_output_value;
2497 /* Emulate open drain by not actively driving the line high */
e735244e
BG
2498 if (value) {
2499 ret = gpiod_direction_input(desc);
2500 goto set_output_flag;
2501 }
1cef8b50 2502 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
83522358 2503 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE);
02e47980
LW
2504 if (!ret)
2505 goto set_output_value;
2506 /* Emulate open source by not actively driving the line low */
e735244e
BG
2507 if (!value) {
2508 ret = gpiod_direction_input(desc);
2509 goto set_output_flag;
2510 }
02e47980 2511 } else {
83522358 2512 gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL);
02e47980
LW
2513 }
2514
2515set_output_value:
5f4bf171 2516 ret = gpio_set_bias(desc);
2821ae5f
KG
2517 if (ret)
2518 return ret;
fac9d885 2519 return gpiod_direction_output_raw_commit(desc, value);
e735244e
BG
2520
2521set_output_flag:
2522 /*
2523 * When emulating open-source or open-drain functionalities by not
2524 * actively driving the line (setting mode to input) we still need to
2525 * set the IS_OUT flag or otherwise we won't be able to set the line
2526 * value anymore.
2527 */
2528 if (ret == 0)
2529 set_bit(FLAG_IS_OUT, &desc->flags);
2530 return ret;
ef70bbe1 2531}
79a9becd 2532EXPORT_SYMBOL_GPL(gpiod_direction_output);
d2876d08 2533
42112dd7
DP
2534/**
2535 * gpiod_enable_hw_timestamp_ns - Enable hardware timestamp in nanoseconds.
2536 *
2537 * @desc: GPIO to enable.
2538 * @flags: Flags related to GPIO edge.
2539 *
2540 * Return 0 in case of success, else negative error code.
2541 */
2542int gpiod_enable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags)
2543{
2544 int ret = 0;
2545 struct gpio_chip *gc;
2546
2547 VALIDATE_DESC(desc);
2548
2549 gc = desc->gdev->chip;
2550 if (!gc->en_hw_timestamp) {
2551 gpiod_warn(desc, "%s: hw ts not supported\n", __func__);
2552 return -ENOTSUPP;
2553 }
2554
2555 ret = gc->en_hw_timestamp(gc, gpio_chip_hwgpio(desc), flags);
2556 if (ret)
2557 gpiod_warn(desc, "%s: hw ts request failed\n", __func__);
2558
2559 return ret;
2560}
2561EXPORT_SYMBOL_GPL(gpiod_enable_hw_timestamp_ns);
2562
2563/**
2564 * gpiod_disable_hw_timestamp_ns - Disable hardware timestamp.
2565 *
2566 * @desc: GPIO to disable.
2567 * @flags: Flags related to GPIO edge, same value as used during enable call.
2568 *
2569 * Return 0 in case of success, else negative error code.
2570 */
2571int gpiod_disable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags)
2572{
2573 int ret = 0;
2574 struct gpio_chip *gc;
2575
2576 VALIDATE_DESC(desc);
2577
2578 gc = desc->gdev->chip;
2579 if (!gc->dis_hw_timestamp) {
2580 gpiod_warn(desc, "%s: hw ts not supported\n", __func__);
2581 return -ENOTSUPP;
2582 }
2583
2584 ret = gc->dis_hw_timestamp(gc, gpio_chip_hwgpio(desc), flags);
2585 if (ret)
2586 gpiod_warn(desc, "%s: hw ts release failed\n", __func__);
2587
2588 return ret;
2589}
2590EXPORT_SYMBOL_GPL(gpiod_disable_hw_timestamp_ns);
2591
8ced32ff
GU
2592/**
2593 * gpiod_set_config - sets @config for a GPIO
2594 * @desc: descriptor of the GPIO for which to set the configuration
2595 * @config: Same packed config format as generic pinconf
2596 *
2597 * Returns:
2598 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2599 * configuration.
2600 */
2601int gpiod_set_config(struct gpio_desc *desc, unsigned long config)
2602{
a0b66a73 2603 struct gpio_chip *gc;
8ced32ff
GU
2604
2605 VALIDATE_DESC(desc);
a0b66a73 2606 gc = desc->gdev->chip;
8ced32ff 2607
a0b66a73 2608 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
8ced32ff
GU
2609}
2610EXPORT_SYMBOL_GPL(gpiod_set_config);
2611
c4b5be98 2612/**
950d55f5
TR
2613 * gpiod_set_debounce - sets @debounce time for a GPIO
2614 * @desc: descriptor of the GPIO for which to set debounce time
2615 * @debounce: debounce time in microseconds
65d87656 2616 *
950d55f5
TR
2617 * Returns:
2618 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2619 * debounce time.
c4b5be98 2620 */
13daf489 2621int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce)
c4b5be98 2622{
8ced32ff 2623 unsigned long config;
be1a4b13 2624
2956b5d9 2625 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
8ced32ff 2626 return gpiod_set_config(desc, config);
c4b5be98 2627}
79a9becd 2628EXPORT_SYMBOL_GPL(gpiod_set_debounce);
372e722e 2629
e10f72bf
AJ
2630/**
2631 * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
2632 * @desc: descriptor of the GPIO for which to configure persistence
2633 * @transitory: True to lose state on suspend or reset, false for persistence
2634 *
2635 * Returns:
2636 * 0 on success, otherwise a negative error code.
2637 */
2638int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
2639{
156dd392 2640 VALIDATE_DESC(desc);
e10f72bf
AJ
2641 /*
2642 * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
2643 * persistence state.
2644 */
4fc5bfeb 2645 assign_bit(FLAG_TRANSITORY, &desc->flags, transitory);
e10f72bf
AJ
2646
2647 /* If the driver supports it, set the persistence state now */
baca3b15
AS
2648 return gpio_set_config_with_argument_optional(desc,
2649 PIN_CONFIG_PERSIST_STATE,
2650 !transitory);
e10f72bf
AJ
2651}
2652EXPORT_SYMBOL_GPL(gpiod_set_transitory);
2653
79a9becd
AC
2654/**
2655 * gpiod_is_active_low - test whether a GPIO is active-low or not
2656 * @desc: the gpio descriptor to test
2657 *
2658 * Returns 1 if the GPIO is active-low, 0 otherwise.
2659 */
2660int gpiod_is_active_low(const struct gpio_desc *desc)
372e722e 2661{
fdeb8e15 2662 VALIDATE_DESC(desc);
79a9becd 2663 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
372e722e 2664}
79a9becd 2665EXPORT_SYMBOL_GPL(gpiod_is_active_low);
d2876d08 2666
d3a5bcb4
MM
2667/**
2668 * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not
2669 * @desc: the gpio descriptor to change
2670 */
2671void gpiod_toggle_active_low(struct gpio_desc *desc)
2672{
2673 VALIDATE_DESC_VOID(desc);
2674 change_bit(FLAG_ACTIVE_LOW, &desc->flags);
2675}
2676EXPORT_SYMBOL_GPL(gpiod_toggle_active_low);
2677
234c5209
AS
2678static int gpio_chip_get_value(struct gpio_chip *gc, const struct gpio_desc *desc)
2679{
2680 return gc->get ? gc->get(gc, gpio_chip_hwgpio(desc)) : -EIO;
2681}
2682
d2876d08
DB
2683/* I/O calls are only valid after configuration completed; the relevant
2684 * "is this a valid GPIO" error checks should already have been done.
2685 *
2686 * "Get" operations are often inlinable as reading a pin value register,
2687 * and masking the relevant bit in that register.
2688 *
2689 * When "set" operations are inlinable, they involve writing that mask to
2690 * one register to set a low value, or a different register to set it high.
2691 * Otherwise locking is needed, so there may be little value to inlining.
2692 *
2693 *------------------------------------------------------------------------
2694 *
2695 * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
2696 * have requested the GPIO. That can include implicit requesting by
2697 * a direction setting call. Marking a gpio as requested locks its chip
2698 * in memory, guaranteeing that these table lookups need no more locking
2699 * and that gpiochip_remove() will fail.
2700 *
2701 * REVISIT when debugging, consider adding some instrumentation to ensure
2702 * that the GPIO was actually requested.
2703 */
2704
fac9d885 2705static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
d2876d08 2706{
a0b66a73 2707 struct gpio_chip *gc;
e20538b8 2708 int value;
d2876d08 2709
a0b66a73 2710 gc = desc->gdev->chip;
234c5209 2711 value = gpio_chip_get_value(gc, desc);
723a6303 2712 value = value < 0 ? value : !!value;
372e722e 2713 trace_gpio_value(desc_to_gpio(desc), 1, value);
3f397c21 2714 return value;
d2876d08 2715}
372e722e 2716
a0b66a73 2717static int gpio_chip_get_multiple(struct gpio_chip *gc,
eec1d566
LW
2718 unsigned long *mask, unsigned long *bits)
2719{
1cef8b50 2720 if (gc->get_multiple)
a0b66a73 2721 return gc->get_multiple(gc, mask, bits);
1cef8b50 2722 if (gc->get) {
eec1d566
LW
2723 int i, value;
2724
a0b66a73
LW
2725 for_each_set_bit(i, mask, gc->ngpio) {
2726 value = gc->get(gc, i);
eec1d566
LW
2727 if (value < 0)
2728 return value;
2729 __assign_bit(i, bits, value);
2730 }
2731 return 0;
2732 }
2733 return -EIO;
2734}
2735
2736int gpiod_get_array_value_complex(bool raw, bool can_sleep,
2737 unsigned int array_size,
2738 struct gpio_desc **desc_array,
77588c14 2739 struct gpio_array *array_info,
b9762beb 2740 unsigned long *value_bitmap)
eec1d566 2741{
d377f56f 2742 int ret, i = 0;
b17566a6
JK
2743
2744 /*
2745 * Validate array_info against desc_array and its size.
2746 * It should immediately follow desc_array if both
2747 * have been obtained from the same gpiod_get_array() call.
2748 */
2749 if (array_info && array_info->desc == desc_array &&
2750 array_size <= array_info->size &&
2751 (void *)array_info == desc_array + array_info->size) {
2752 if (!can_sleep)
2753 WARN_ON(array_info->chip->can_sleep);
2754
d377f56f 2755 ret = gpio_chip_get_multiple(array_info->chip,
b17566a6
JK
2756 array_info->get_mask,
2757 value_bitmap);
d377f56f
LW
2758 if (ret)
2759 return ret;
b17566a6
JK
2760
2761 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2762 bitmap_xor(value_bitmap, value_bitmap,
2763 array_info->invert_mask, array_size);
2764
b17566a6 2765 i = find_first_zero_bit(array_info->get_mask, array_size);
ae66eca0
AS
2766 if (i == array_size)
2767 return 0;
b17566a6
JK
2768 } else {
2769 array_info = NULL;
2770 }
eec1d566
LW
2771
2772 while (i < array_size) {
a0b66a73 2773 struct gpio_chip *gc = desc_array[i]->gdev->chip;
c80c4435
AS
2774 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
2775 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
3027743f 2776 unsigned long *mask, *bits;
c07ea8d0 2777 int first, j;
eec1d566 2778
a0b66a73 2779 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
c80c4435
AS
2780 mask = fastpath_mask;
2781 bits = fastpath_bits;
3027743f 2782 } else {
c354c295
AS
2783 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
2784
2785 mask = bitmap_alloc(gc->ngpio, flags);
3027743f
LA
2786 if (!mask)
2787 return -ENOMEM;
c80c4435 2788
c354c295
AS
2789 bits = bitmap_alloc(gc->ngpio, flags);
2790 if (!bits) {
2791 bitmap_free(mask);
2792 return -ENOMEM;
2793 }
3027743f
LA
2794 }
2795
a0b66a73 2796 bitmap_zero(mask, gc->ngpio);
3027743f 2797
eec1d566 2798 if (!can_sleep)
a0b66a73 2799 WARN_ON(gc->can_sleep);
eec1d566
LW
2800
2801 /* collect all inputs belonging to the same chip */
2802 first = i;
eec1d566
LW
2803 do {
2804 const struct gpio_desc *desc = desc_array[i];
2805 int hwgpio = gpio_chip_hwgpio(desc);
2806
2807 __set_bit(hwgpio, mask);
2808 i++;
b17566a6
JK
2809
2810 if (array_info)
35ae7f96
JK
2811 i = find_next_zero_bit(array_info->get_mask,
2812 array_size, i);
eec1d566 2813 } while ((i < array_size) &&
a0b66a73 2814 (desc_array[i]->gdev->chip == gc));
eec1d566 2815
a0b66a73 2816 ret = gpio_chip_get_multiple(gc, mask, bits);
3027743f 2817 if (ret) {
c80c4435 2818 if (mask != fastpath_mask)
c354c295
AS
2819 bitmap_free(mask);
2820 if (bits != fastpath_bits)
2821 bitmap_free(bits);
eec1d566 2822 return ret;
3027743f 2823 }
eec1d566 2824
b17566a6 2825 for (j = first; j < i; ) {
eec1d566
LW
2826 const struct gpio_desc *desc = desc_array[j];
2827 int hwgpio = gpio_chip_hwgpio(desc);
2828 int value = test_bit(hwgpio, bits);
2829
2830 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2831 value = !value;
b9762beb 2832 __assign_bit(j, value_bitmap, value);
eec1d566 2833 trace_gpio_value(desc_to_gpio(desc), 1, value);
799d5eb4 2834 j++;
b17566a6
JK
2835
2836 if (array_info)
35ae7f96
JK
2837 j = find_next_zero_bit(array_info->get_mask, i,
2838 j);
eec1d566 2839 }
3027743f 2840
c80c4435 2841 if (mask != fastpath_mask)
c354c295
AS
2842 bitmap_free(mask);
2843 if (bits != fastpath_bits)
2844 bitmap_free(bits);
eec1d566
LW
2845 }
2846 return 0;
2847}
2848
d2876d08 2849/**
79a9becd
AC
2850 * gpiod_get_raw_value() - return a gpio's raw value
2851 * @desc: gpio whose value will be returned
d2876d08 2852 *
79a9becd 2853 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 2854 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd 2855 *
827a9b8b 2856 * This function can be called from contexts where we cannot sleep, and will
79a9becd 2857 * complain if the GPIO chip functions potentially sleep.
d2876d08 2858 */
79a9becd 2859int gpiod_get_raw_value(const struct gpio_desc *desc)
d2876d08 2860{
fdeb8e15 2861 VALIDATE_DESC(desc);
3285170f 2862 /* Should be using gpiod_get_raw_value_cansleep() */
fdeb8e15 2863 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 2864 return gpiod_get_raw_value_commit(desc);
d2876d08 2865}
79a9becd 2866EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
372e722e 2867
79a9becd
AC
2868/**
2869 * gpiod_get_value() - return a gpio's value
2870 * @desc: gpio whose value will be returned
2871 *
2872 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 2873 * account, or negative errno on failure.
79a9becd 2874 *
827a9b8b 2875 * This function can be called from contexts where we cannot sleep, and will
79a9becd
AC
2876 * complain if the GPIO chip functions potentially sleep.
2877 */
2878int gpiod_get_value(const struct gpio_desc *desc)
372e722e 2879{
79a9becd 2880 int value;
fdeb8e15
LW
2881
2882 VALIDATE_DESC(desc);
3285170f 2883 /* Should be using gpiod_get_value_cansleep() */
fdeb8e15 2884 WARN_ON(desc->gdev->chip->can_sleep);
79a9becd 2885
fac9d885 2886 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
2887 if (value < 0)
2888 return value;
2889
79a9becd
AC
2890 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2891 value = !value;
2892
2893 return value;
372e722e 2894}
79a9becd 2895EXPORT_SYMBOL_GPL(gpiod_get_value);
d2876d08 2896
eec1d566
LW
2897/**
2898 * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
b9762beb 2899 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 2900 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 2901 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2902 * @value_bitmap: bitmap to store the read values
eec1d566
LW
2903 *
2904 * Read the raw values of the GPIOs, i.e. the values of the physical lines
2905 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
2906 * else an error code.
2907 *
827a9b8b 2908 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
2909 * and it will complain if the GPIO chip functions potentially sleep.
2910 */
2911int gpiod_get_raw_array_value(unsigned int array_size,
b9762beb 2912 struct gpio_desc **desc_array,
77588c14 2913 struct gpio_array *array_info,
b9762beb 2914 unsigned long *value_bitmap)
eec1d566
LW
2915{
2916 if (!desc_array)
2917 return -EINVAL;
2918 return gpiod_get_array_value_complex(true, false, array_size,
77588c14
JK
2919 desc_array, array_info,
2920 value_bitmap);
eec1d566
LW
2921}
2922EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
2923
2924/**
2925 * gpiod_get_array_value() - read values from an array of GPIOs
b9762beb 2926 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 2927 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 2928 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2929 * @value_bitmap: bitmap to store the read values
eec1d566
LW
2930 *
2931 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
2932 * into account. Return 0 in case of success, else an error code.
2933 *
827a9b8b 2934 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
2935 * and it will complain if the GPIO chip functions potentially sleep.
2936 */
2937int gpiod_get_array_value(unsigned int array_size,
b9762beb 2938 struct gpio_desc **desc_array,
77588c14 2939 struct gpio_array *array_info,
b9762beb 2940 unsigned long *value_bitmap)
eec1d566
LW
2941{
2942 if (!desc_array)
2943 return -EINVAL;
2944 return gpiod_get_array_value_complex(false, false, array_size,
77588c14
JK
2945 desc_array, array_info,
2946 value_bitmap);
eec1d566
LW
2947}
2948EXPORT_SYMBOL_GPL(gpiod_get_array_value);
2949
aca5ce14 2950/*
fac9d885 2951 * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
79a9becd 2952 * @desc: gpio descriptor whose state need to be set.
20a8a968 2953 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
aca5ce14 2954 */
fac9d885 2955static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
aca5ce14 2956{
d377f56f 2957 int ret = 0;
a0b66a73 2958 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
2959 int offset = gpio_chip_hwgpio(desc);
2960
aca5ce14 2961 if (value) {
a0b66a73 2962 ret = gc->direction_input(gc, offset);
aca5ce14 2963 } else {
a0b66a73 2964 ret = gc->direction_output(gc, offset, 0);
d377f56f 2965 if (!ret)
372e722e 2966 set_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 2967 }
d377f56f
LW
2968 trace_gpio_direction(desc_to_gpio(desc), value, ret);
2969 if (ret < 0)
6424de5a
MB
2970 gpiod_err(desc,
2971 "%s: Error in set_value for open drain err %d\n",
d377f56f 2972 __func__, ret);
aca5ce14
LD
2973}
2974
25553ff0 2975/*
79a9becd
AC
2976 * _gpio_set_open_source_value() - Set the open source gpio's value.
2977 * @desc: gpio descriptor whose state need to be set.
20a8a968 2978 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
25553ff0 2979 */
fac9d885 2980static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
25553ff0 2981{
d377f56f 2982 int ret = 0;
a0b66a73 2983 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
2984 int offset = gpio_chip_hwgpio(desc);
2985
25553ff0 2986 if (value) {
a0b66a73 2987 ret = gc->direction_output(gc, offset, 1);
d377f56f 2988 if (!ret)
372e722e 2989 set_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 2990 } else {
a0b66a73 2991 ret = gc->direction_input(gc, offset);
25553ff0 2992 }
d377f56f
LW
2993 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
2994 if (ret < 0)
6424de5a
MB
2995 gpiod_err(desc,
2996 "%s: Error in set_value for open source err %d\n",
d377f56f 2997 __func__, ret);
25553ff0
LD
2998}
2999
fac9d885 3000static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
d2876d08 3001{
a0b66a73 3002 struct gpio_chip *gc;
d2876d08 3003
a0b66a73 3004 gc = desc->gdev->chip;
372e722e 3005 trace_gpio_value(desc_to_gpio(desc), 0, value);
a0b66a73 3006 gc->set(gc, gpio_chip_hwgpio(desc), value);
372e722e
AC
3007}
3008
5f424243
RI
3009/*
3010 * set multiple outputs on the same chip;
3011 * use the chip's set_multiple function if available;
3012 * otherwise set the outputs sequentially;
a0b66a73 3013 * @chip: the GPIO chip we operate on
5f424243
RI
3014 * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
3015 * defines which outputs are to be changed
3016 * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
3017 * defines the values the outputs specified by mask are to be set to
3018 */
a0b66a73 3019static void gpio_chip_set_multiple(struct gpio_chip *gc,
5f424243
RI
3020 unsigned long *mask, unsigned long *bits)
3021{
a0b66a73
LW
3022 if (gc->set_multiple) {
3023 gc->set_multiple(gc, mask, bits);
5f424243 3024 } else {
5e4e6fb3
AS
3025 unsigned int i;
3026
3027 /* set outputs if the corresponding mask bit is set */
a0b66a73
LW
3028 for_each_set_bit(i, mask, gc->ngpio)
3029 gc->set(gc, i, test_bit(i, bits));
5f424243
RI
3030 }
3031}
3032
3027743f 3033int gpiod_set_array_value_complex(bool raw, bool can_sleep,
3c940660
GU
3034 unsigned int array_size,
3035 struct gpio_desc **desc_array,
3036 struct gpio_array *array_info,
3037 unsigned long *value_bitmap)
5f424243
RI
3038{
3039 int i = 0;
3040
b17566a6
JK
3041 /*
3042 * Validate array_info against desc_array and its size.
3043 * It should immediately follow desc_array if both
3044 * have been obtained from the same gpiod_get_array() call.
3045 */
3046 if (array_info && array_info->desc == desc_array &&
3047 array_size <= array_info->size &&
3048 (void *)array_info == desc_array + array_info->size) {
3049 if (!can_sleep)
3050 WARN_ON(array_info->chip->can_sleep);
3051
3052 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3053 bitmap_xor(value_bitmap, value_bitmap,
3054 array_info->invert_mask, array_size);
3055
3056 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
3057 value_bitmap);
3058
b17566a6 3059 i = find_first_zero_bit(array_info->set_mask, array_size);
ae66eca0
AS
3060 if (i == array_size)
3061 return 0;
b17566a6
JK
3062 } else {
3063 array_info = NULL;
3064 }
3065
5f424243 3066 while (i < array_size) {
a0b66a73 3067 struct gpio_chip *gc = desc_array[i]->gdev->chip;
c80c4435
AS
3068 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
3069 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
3027743f 3070 unsigned long *mask, *bits;
5f424243
RI
3071 int count = 0;
3072
a0b66a73 3073 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
c80c4435
AS
3074 mask = fastpath_mask;
3075 bits = fastpath_bits;
3027743f 3076 } else {
c354c295
AS
3077 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
3078
3079 mask = bitmap_alloc(gc->ngpio, flags);
3027743f
LA
3080 if (!mask)
3081 return -ENOMEM;
c80c4435 3082
c354c295
AS
3083 bits = bitmap_alloc(gc->ngpio, flags);
3084 if (!bits) {
3085 bitmap_free(mask);
3086 return -ENOMEM;
3087 }
3027743f
LA
3088 }
3089
a0b66a73 3090 bitmap_zero(mask, gc->ngpio);
3027743f 3091
38e003f4 3092 if (!can_sleep)
a0b66a73 3093 WARN_ON(gc->can_sleep);
38e003f4 3094
5f424243
RI
3095 do {
3096 struct gpio_desc *desc = desc_array[i];
3097 int hwgpio = gpio_chip_hwgpio(desc);
b9762beb 3098 int value = test_bit(i, value_bitmap);
5f424243 3099
b17566a6
JK
3100 /*
3101 * Pins applicable for fast input but not for
3102 * fast output processing may have been already
3103 * inverted inside the fast path, skip them.
3104 */
3105 if (!raw && !(array_info &&
3106 test_bit(i, array_info->invert_mask)) &&
3107 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
5f424243
RI
3108 value = !value;
3109 trace_gpio_value(desc_to_gpio(desc), 0, value);
3110 /*
3111 * collect all normal outputs belonging to the same chip
3112 * open drain and open source outputs are set individually
3113 */
02e47980 3114 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
fac9d885 3115 gpio_set_open_drain_value_commit(desc, value);
02e47980 3116 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
fac9d885 3117 gpio_set_open_source_value_commit(desc, value);
5f424243
RI
3118 } else {
3119 __set_bit(hwgpio, mask);
4fc5bfeb 3120 __assign_bit(hwgpio, bits, value);
5f424243
RI
3121 count++;
3122 }
3123 i++;
b17566a6
JK
3124
3125 if (array_info)
35ae7f96
JK
3126 i = find_next_zero_bit(array_info->set_mask,
3127 array_size, i);
fdeb8e15 3128 } while ((i < array_size) &&
a0b66a73 3129 (desc_array[i]->gdev->chip == gc));
5f424243 3130 /* push collected bits to outputs */
38e003f4 3131 if (count != 0)
a0b66a73 3132 gpio_chip_set_multiple(gc, mask, bits);
3027743f 3133
c80c4435 3134 if (mask != fastpath_mask)
c354c295
AS
3135 bitmap_free(mask);
3136 if (bits != fastpath_bits)
3137 bitmap_free(bits);
5f424243 3138 }
3027743f 3139 return 0;
5f424243
RI
3140}
3141
d2876d08 3142/**
79a9becd
AC
3143 * gpiod_set_raw_value() - assign a gpio's raw value
3144 * @desc: gpio whose value will be assigned
d2876d08 3145 * @value: value to assign
d2876d08 3146 *
79a9becd
AC
3147 * Set the raw value of the GPIO, i.e. the value of its physical line without
3148 * regard for its ACTIVE_LOW status.
3149 *
827a9b8b 3150 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3151 * complain if the GPIO chip functions potentially sleep.
d2876d08 3152 */
79a9becd 3153void gpiod_set_raw_value(struct gpio_desc *desc, int value)
372e722e 3154{
fdeb8e15 3155 VALIDATE_DESC_VOID(desc);
3285170f 3156 /* Should be using gpiod_set_raw_value_cansleep() */
fdeb8e15 3157 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3158 gpiod_set_raw_value_commit(desc, value);
d2876d08 3159}
79a9becd 3160EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
d2876d08 3161
1e77fc82
GU
3162/**
3163 * gpiod_set_value_nocheck() - set a GPIO line value without checking
3164 * @desc: the descriptor to set the value on
3165 * @value: value to set
3166 *
3167 * This sets the value of a GPIO line backing a descriptor, applying
3168 * different semantic quirks like active low and open drain/source
3169 * handling.
3170 */
3171static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
3172{
3173 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3174 value = !value;
3175 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
3176 gpio_set_open_drain_value_commit(desc, value);
3177 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
3178 gpio_set_open_source_value_commit(desc, value);
3179 else
3180 gpiod_set_raw_value_commit(desc, value);
3181}
3182
d2876d08 3183/**
79a9becd
AC
3184 * gpiod_set_value() - assign a gpio's value
3185 * @desc: gpio whose value will be assigned
3186 * @value: value to assign
3187 *
02e47980
LW
3188 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
3189 * OPEN_DRAIN and OPEN_SOURCE flags into account.
d2876d08 3190 *
827a9b8b 3191 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3192 * complain if the GPIO chip functions potentially sleep.
d2876d08 3193 */
79a9becd 3194void gpiod_set_value(struct gpio_desc *desc, int value)
d2876d08 3195{
fdeb8e15 3196 VALIDATE_DESC_VOID(desc);
3285170f 3197 /* Should be using gpiod_set_value_cansleep() */
fdeb8e15 3198 WARN_ON(desc->gdev->chip->can_sleep);
1e77fc82 3199 gpiod_set_value_nocheck(desc, value);
372e722e 3200}
79a9becd 3201EXPORT_SYMBOL_GPL(gpiod_set_value);
d2876d08 3202
5f424243 3203/**
3fff99bc 3204 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
b9762beb 3205 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3206 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3207 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3208 * @value_bitmap: bitmap of values to assign
5f424243
RI
3209 *
3210 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3211 * without regard for their ACTIVE_LOW status.
3212 *
827a9b8b 3213 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3214 * complain if the GPIO chip functions potentially sleep.
3215 */
3027743f 3216int gpiod_set_raw_array_value(unsigned int array_size,
3c940660
GU
3217 struct gpio_desc **desc_array,
3218 struct gpio_array *array_info,
3219 unsigned long *value_bitmap)
5f424243
RI
3220{
3221 if (!desc_array)
3027743f
LA
3222 return -EINVAL;
3223 return gpiod_set_array_value_complex(true, false, array_size,
77588c14 3224 desc_array, array_info, value_bitmap);
5f424243 3225}
3fff99bc 3226EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
5f424243
RI
3227
3228/**
3fff99bc 3229 * gpiod_set_array_value() - assign values to an array of GPIOs
b9762beb 3230 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3231 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3232 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3233 * @value_bitmap: bitmap of values to assign
5f424243
RI
3234 *
3235 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3236 * into account.
3237 *
827a9b8b 3238 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3239 * complain if the GPIO chip functions potentially sleep.
3240 */
cf9af0d5
GU
3241int gpiod_set_array_value(unsigned int array_size,
3242 struct gpio_desc **desc_array,
3243 struct gpio_array *array_info,
3244 unsigned long *value_bitmap)
5f424243
RI
3245{
3246 if (!desc_array)
cf9af0d5
GU
3247 return -EINVAL;
3248 return gpiod_set_array_value_complex(false, false, array_size,
3249 desc_array, array_info,
3250 value_bitmap);
5f424243 3251}
3fff99bc 3252EXPORT_SYMBOL_GPL(gpiod_set_array_value);
5f424243 3253
d2876d08 3254/**
79a9becd
AC
3255 * gpiod_cansleep() - report whether gpio value access may sleep
3256 * @desc: gpio to check
d2876d08 3257 *
d2876d08 3258 */
79a9becd 3259int gpiod_cansleep(const struct gpio_desc *desc)
372e722e 3260{
fdeb8e15
LW
3261 VALIDATE_DESC(desc);
3262 return desc->gdev->chip->can_sleep;
d2876d08 3263}
79a9becd 3264EXPORT_SYMBOL_GPL(gpiod_cansleep);
d2876d08 3265
90b39402
LW
3266/**
3267 * gpiod_set_consumer_name() - set the consumer name for the descriptor
3268 * @desc: gpio to set the consumer name on
3269 * @name: the new consumer name
3270 */
18534df4 3271int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
90b39402 3272{
18534df4
MS
3273 VALIDATE_DESC(desc);
3274 if (name) {
3275 name = kstrdup_const(name, GFP_KERNEL);
3276 if (!name)
3277 return -ENOMEM;
3278 }
3279
3280 kfree_const(desc->label);
3281 desc_set_label(desc, name);
3282
3283 return 0;
90b39402
LW
3284}
3285EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
3286
0f6d504e 3287/**
79a9becd
AC
3288 * gpiod_to_irq() - return the IRQ corresponding to a GPIO
3289 * @desc: gpio whose IRQ will be returned (already requested)
0f6d504e 3290 *
79a9becd
AC
3291 * Return the IRQ corresponding to the passed GPIO, or an error code in case of
3292 * error.
0f6d504e 3293 */
79a9becd 3294int gpiod_to_irq(const struct gpio_desc *desc)
0f6d504e 3295{
a0b66a73 3296 struct gpio_chip *gc;
4c37ce86 3297 int offset;
0f6d504e 3298
79bb71bd
LW
3299 /*
3300 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
3301 * requires this function to not return zero on an invalid descriptor
3302 * but rather a negative error number.
3303 */
bfbbe44d 3304 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
79bb71bd
LW
3305 return -EINVAL;
3306
a0b66a73 3307 gc = desc->gdev->chip;
372e722e 3308 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
3309 if (gc->to_irq) {
3310 int retirq = gc->to_irq(gc, offset);
4c37ce86
LW
3311
3312 /* Zero means NO_IRQ */
3313 if (!retirq)
3314 return -ENXIO;
3315
3316 return retirq;
3317 }
ae42f928
SP
3318#ifdef CONFIG_GPIOLIB_IRQCHIP
3319 if (gc->irq.chip) {
3320 /*
3321 * Avoid race condition with other code, which tries to lookup
3322 * an IRQ before the irqchip has been properly registered,
3323 * i.e. while gpiochip is still being brought up.
3324 */
3325 return -EPROBE_DEFER;
3326 }
3327#endif
4c37ce86 3328 return -ENXIO;
0f6d504e 3329}
79a9becd 3330EXPORT_SYMBOL_GPL(gpiod_to_irq);
0f6d504e 3331
d468bf9e 3332/**
e3a2e878 3333 * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
a0b66a73 3334 * @gc: the chip the GPIO to lock belongs to
d74be6df 3335 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3336 *
3337 * This is used directly by GPIO drivers that want to lock down
f438acdf 3338 * a certain GPIO line to be used for IRQs.
d468bf9e 3339 */
a0b66a73 3340int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset)
372e722e 3341{
9c10280d
LW
3342 struct gpio_desc *desc;
3343
a0b66a73 3344 desc = gpiochip_get_desc(gc, offset);
9c10280d
LW
3345 if (IS_ERR(desc))
3346 return PTR_ERR(desc);
3347
60f8339e
LW
3348 /*
3349 * If it's fast: flush the direction setting if something changed
3350 * behind our back
3351 */
a0b66a73 3352 if (!gc->can_sleep && gc->get_direction) {
80956790 3353 int dir = gpiod_get_direction(desc);
9c10280d 3354
36b31279 3355 if (dir < 0) {
a0b66a73 3356 chip_err(gc, "%s: cannot get GPIO direction\n",
36b31279
AS
3357 __func__);
3358 return dir;
3359 }
9c10280d 3360 }
d468bf9e 3361
e9bdf7e6
LW
3362 /* To be valid for IRQ the line needs to be input or open drain */
3363 if (test_bit(FLAG_IS_OUT, &desc->flags) &&
3364 !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
a0b66a73 3365 chip_err(gc,
b1911710
AS
3366 "%s: tried to flag a GPIO set as output for IRQ\n",
3367 __func__);
d468bf9e
LW
3368 return -EIO;
3369 }
3370
9c10280d 3371 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3372 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3373
3374 /*
3375 * If the consumer has not set up a label (such as when the
3376 * IRQ is referenced from .to_irq()) we set up a label here
3377 * so it is clear this is used as an interrupt.
3378 */
3379 if (!desc->label)
3380 desc_set_label(desc, "interrupt");
3381
d468bf9e 3382 return 0;
372e722e 3383}
e3a2e878 3384EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
d2876d08 3385
d468bf9e 3386/**
e3a2e878 3387 * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
a0b66a73 3388 * @gc: the chip the GPIO to lock belongs to
d74be6df 3389 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3390 *
3391 * This is used directly by GPIO drivers that want to indicate
3392 * that a certain GPIO is no longer used exclusively for IRQ.
d2876d08 3393 */
a0b66a73 3394void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset)
d468bf9e 3395{
3940c34a
LW
3396 struct gpio_desc *desc;
3397
a0b66a73 3398 desc = gpiochip_get_desc(gc, offset);
3940c34a 3399 if (IS_ERR(desc))
d468bf9e 3400 return;
d2876d08 3401
3940c34a 3402 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3403 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3404
3405 /* If we only had this marking, erase it */
3406 if (desc->label && !strcmp(desc->label, "interrupt"))
3407 desc_set_label(desc, NULL);
d468bf9e 3408}
e3a2e878 3409EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
d468bf9e 3410
a0b66a73 3411void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3412{
a0b66a73 3413 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3414
3415 if (!IS_ERR(desc) &&
3416 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
3417 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3418}
3419EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
3420
a0b66a73 3421void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3422{
a0b66a73 3423 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3424
3425 if (!IS_ERR(desc) &&
3426 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
e9bdf7e6
LW
3427 /*
3428 * We must not be output when using IRQ UNLESS we are
3429 * open drain.
3430 */
3431 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) &&
3432 !test_bit(FLAG_OPEN_DRAIN, &desc->flags));
4e9439dd
HV
3433 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3434 }
3435}
3436EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
3437
a0b66a73 3438bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset)
6cee3821 3439{
a0b66a73 3440 if (offset >= gc->ngpio)
6cee3821
LW
3441 return false;
3442
a0b66a73 3443 return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags);
6cee3821
LW
3444}
3445EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
3446
a0b66a73 3447int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238
HV
3448{
3449 int ret;
3450
a0b66a73 3451 if (!try_module_get(gc->gpiodev->owner))
4e6b8238
HV
3452 return -ENODEV;
3453
a0b66a73 3454 ret = gpiochip_lock_as_irq(gc, offset);
4e6b8238 3455 if (ret) {
a0b66a73
LW
3456 chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset);
3457 module_put(gc->gpiodev->owner);
4e6b8238
HV
3458 return ret;
3459 }
3460 return 0;
3461}
3462EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
3463
a0b66a73 3464void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238 3465{
a0b66a73
LW
3466 gpiochip_unlock_as_irq(gc, offset);
3467 module_put(gc->gpiodev->owner);
4e6b8238
HV
3468}
3469EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
3470
a0b66a73 3471bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset)
143b65d6 3472{
a0b66a73 3473 if (offset >= gc->ngpio)
143b65d6
LW
3474 return false;
3475
a0b66a73 3476 return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3477}
3478EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
3479
a0b66a73 3480bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset)
143b65d6 3481{
a0b66a73 3482 if (offset >= gc->ngpio)
143b65d6
LW
3483 return false;
3484
a0b66a73 3485 return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3486}
3487EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
3488
a0b66a73 3489bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset)
05f479bf 3490{
a0b66a73 3491 if (offset >= gc->ngpio)
05f479bf
CK
3492 return false;
3493
a0b66a73 3494 return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags);
05f479bf
CK
3495}
3496EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
3497
79a9becd
AC
3498/**
3499 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
3500 * @desc: gpio whose value will be returned
3501 *
3502 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3503 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd
AC
3504 *
3505 * This function is to be called from contexts that can sleep.
d2876d08 3506 */
79a9becd 3507int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
d2876d08 3508{
d2876d08 3509 might_sleep_if(extra_checks);
fdeb8e15 3510 VALIDATE_DESC(desc);
fac9d885 3511 return gpiod_get_raw_value_commit(desc);
d2876d08 3512}
79a9becd 3513EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
372e722e 3514
79a9becd
AC
3515/**
3516 * gpiod_get_value_cansleep() - return a gpio's value
3517 * @desc: gpio whose value will be returned
3518 *
3519 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3520 * account, or negative errno on failure.
79a9becd
AC
3521 *
3522 * This function is to be called from contexts that can sleep.
3523 */
3524int gpiod_get_value_cansleep(const struct gpio_desc *desc)
d2876d08 3525{
3f397c21 3526 int value;
d2876d08
DB
3527
3528 might_sleep_if(extra_checks);
fdeb8e15 3529 VALIDATE_DESC(desc);
fac9d885 3530 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3531 if (value < 0)
3532 return value;
3533
79a9becd
AC
3534 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3535 value = !value;
3536
3f397c21 3537 return value;
d2876d08 3538}
79a9becd 3539EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
372e722e 3540
eec1d566
LW
3541/**
3542 * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
b9762beb 3543 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3544 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3545 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3546 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3547 *
3548 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3549 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3550 * else an error code.
3551 *
3552 * This function is to be called from contexts that can sleep.
3553 */
3554int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
3555 struct gpio_desc **desc_array,
77588c14 3556 struct gpio_array *array_info,
b9762beb 3557 unsigned long *value_bitmap)
eec1d566
LW
3558{
3559 might_sleep_if(extra_checks);
3560 if (!desc_array)
3561 return -EINVAL;
3562 return gpiod_get_array_value_complex(true, true, array_size,
77588c14
JK
3563 desc_array, array_info,
3564 value_bitmap);
eec1d566
LW
3565}
3566EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
3567
3568/**
3569 * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
b9762beb 3570 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3571 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3572 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3573 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3574 *
3575 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3576 * into account. Return 0 in case of success, else an error code.
3577 *
3578 * This function is to be called from contexts that can sleep.
3579 */
3580int gpiod_get_array_value_cansleep(unsigned int array_size,
3581 struct gpio_desc **desc_array,
77588c14 3582 struct gpio_array *array_info,
b9762beb 3583 unsigned long *value_bitmap)
eec1d566
LW
3584{
3585 might_sleep_if(extra_checks);
3586 if (!desc_array)
3587 return -EINVAL;
3588 return gpiod_get_array_value_complex(false, true, array_size,
77588c14
JK
3589 desc_array, array_info,
3590 value_bitmap);
eec1d566
LW
3591}
3592EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
3593
79a9becd
AC
3594/**
3595 * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
3596 * @desc: gpio whose value will be assigned
3597 * @value: value to assign
3598 *
3599 * Set the raw value of the GPIO, i.e. the value of its physical line without
3600 * regard for its ACTIVE_LOW status.
3601 *
3602 * This function is to be called from contexts that can sleep.
3603 */
3604void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
372e722e 3605{
d2876d08 3606 might_sleep_if(extra_checks);
fdeb8e15 3607 VALIDATE_DESC_VOID(desc);
fac9d885 3608 gpiod_set_raw_value_commit(desc, value);
372e722e 3609}
79a9becd 3610EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
d2876d08 3611
79a9becd
AC
3612/**
3613 * gpiod_set_value_cansleep() - assign a gpio's value
3614 * @desc: gpio whose value will be assigned
3615 * @value: value to assign
3616 *
3617 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
3618 * account
3619 *
3620 * This function is to be called from contexts that can sleep.
3621 */
3622void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
d2876d08 3623{
d2876d08 3624 might_sleep_if(extra_checks);
fdeb8e15 3625 VALIDATE_DESC_VOID(desc);
1e77fc82 3626 gpiod_set_value_nocheck(desc, value);
372e722e 3627}
79a9becd 3628EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
d2876d08 3629
5f424243 3630/**
3fff99bc 3631 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3632 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3633 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3634 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3635 * @value_bitmap: bitmap of values to assign
5f424243
RI
3636 *
3637 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3638 * without regard for their ACTIVE_LOW status.
3639 *
3640 * This function is to be called from contexts that can sleep.
3641 */
3027743f 3642int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3c940660
GU
3643 struct gpio_desc **desc_array,
3644 struct gpio_array *array_info,
3645 unsigned long *value_bitmap)
5f424243
RI
3646{
3647 might_sleep_if(extra_checks);
3648 if (!desc_array)
3027743f
LA
3649 return -EINVAL;
3650 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
77588c14 3651 array_info, value_bitmap);
5f424243 3652}
3fff99bc 3653EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
5f424243 3654
3946d187
DT
3655/**
3656 * gpiod_add_lookup_tables() - register GPIO device consumers
3657 * @tables: list of tables of consumers to register
3658 * @n: number of tables in the list
3659 */
3660void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
3661{
3662 unsigned int i;
3663
3664 mutex_lock(&gpio_lookup_lock);
3665
3666 for (i = 0; i < n; i++)
3667 list_add_tail(&tables[i]->list, &gpio_lookup_list);
3668
3669 mutex_unlock(&gpio_lookup_lock);
3670}
3671
5f424243 3672/**
3fff99bc 3673 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3674 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3675 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3676 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3677 * @value_bitmap: bitmap of values to assign
5f424243
RI
3678 *
3679 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3680 * into account.
3681 *
3682 * This function is to be called from contexts that can sleep.
3683 */
cf9af0d5
GU
3684int gpiod_set_array_value_cansleep(unsigned int array_size,
3685 struct gpio_desc **desc_array,
3686 struct gpio_array *array_info,
3687 unsigned long *value_bitmap)
5f424243
RI
3688{
3689 might_sleep_if(extra_checks);
3690 if (!desc_array)
cf9af0d5
GU
3691 return -EINVAL;
3692 return gpiod_set_array_value_complex(false, true, array_size,
3693 desc_array, array_info,
3694 value_bitmap);
5f424243 3695}
3fff99bc 3696EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
5f424243 3697
bae48da2 3698/**
ad824783
AC
3699 * gpiod_add_lookup_table() - register GPIO device consumers
3700 * @table: table of consumers to register
bae48da2 3701 */
ad824783 3702void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
bae48da2 3703{
49fdfe66 3704 gpiod_add_lookup_tables(&table, 1);
bae48da2 3705}
226b2242 3706EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
bae48da2 3707
be9015ab
SK
3708/**
3709 * gpiod_remove_lookup_table() - unregister GPIO device consumers
3710 * @table: table of consumers to unregister
3711 */
3712void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
3713{
d321ad12
AS
3714 /* Nothing to remove */
3715 if (!table)
3716 return;
3717
be9015ab
SK
3718 mutex_lock(&gpio_lookup_lock);
3719
3720 list_del(&table->list);
3721
3722 mutex_unlock(&gpio_lookup_lock);
3723}
226b2242 3724EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
be9015ab 3725
a411e81e
BG
3726/**
3727 * gpiod_add_hogs() - register a set of GPIO hogs from machine code
3728 * @hogs: table of gpio hog entries with a zeroed sentinel at the end
3729 */
3730void gpiod_add_hogs(struct gpiod_hog *hogs)
3731{
a0b66a73 3732 struct gpio_chip *gc;
a411e81e
BG
3733 struct gpiod_hog *hog;
3734
3735 mutex_lock(&gpio_machine_hogs_mutex);
3736
3737 for (hog = &hogs[0]; hog->chip_label; hog++) {
3738 list_add_tail(&hog->list, &gpio_machine_hogs);
3739
3740 /*
3741 * The chip may have been registered earlier, so check if it
3742 * exists and, if so, try to hog the line now.
3743 */
a0b66a73
LW
3744 gc = find_chip_by_name(hog->chip_label);
3745 if (gc)
3746 gpiochip_machine_hog(gc, hog);
a411e81e
BG
3747 }
3748
3749 mutex_unlock(&gpio_machine_hogs_mutex);
3750}
3751EXPORT_SYMBOL_GPL(gpiod_add_hogs);
3752
dd61b292
BG
3753void gpiod_remove_hogs(struct gpiod_hog *hogs)
3754{
3755 struct gpiod_hog *hog;
3756
3757 mutex_lock(&gpio_machine_hogs_mutex);
3758 for (hog = &hogs[0]; hog->chip_label; hog++)
3759 list_del(&hog->list);
3760 mutex_unlock(&gpio_machine_hogs_mutex);
3761}
3762EXPORT_SYMBOL_GPL(gpiod_remove_hogs);
3763
ad824783 3764static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
bae48da2
AC
3765{
3766 const char *dev_id = dev ? dev_name(dev) : NULL;
ad824783 3767 struct gpiod_lookup_table *table;
bae48da2
AC
3768
3769 mutex_lock(&gpio_lookup_lock);
3770
ad824783
AC
3771 list_for_each_entry(table, &gpio_lookup_list, list) {
3772 if (table->dev_id && dev_id) {
3773 /*
3774 * Valid strings on both ends, must be identical to have
3775 * a match
3776 */
3777 if (!strcmp(table->dev_id, dev_id))
3778 goto found;
3779 } else {
3780 /*
3781 * One of the pointers is NULL, so both must be to have
3782 * a match
3783 */
3784 if (dev_id == table->dev_id)
3785 goto found;
3786 }
3787 }
3788 table = NULL;
bae48da2 3789
ad824783
AC
3790found:
3791 mutex_unlock(&gpio_lookup_lock);
3792 return table;
3793}
bae48da2 3794
ad824783 3795static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
fed7026a 3796 unsigned int idx, unsigned long *flags)
ad824783 3797{
2a3cf6a3 3798 struct gpio_desc *desc = ERR_PTR(-ENOENT);
ad824783
AC
3799 struct gpiod_lookup_table *table;
3800 struct gpiod_lookup *p;
bae48da2 3801
ad824783
AC
3802 table = gpiod_find_lookup_table(dev);
3803 if (!table)
3804 return desc;
bae48da2 3805
4c033b54 3806 for (p = &table->table[0]; p->key; p++) {
a0b66a73 3807 struct gpio_chip *gc;
bae48da2 3808
ad824783 3809 /* idx must always match exactly */
bae48da2
AC
3810 if (p->idx != idx)
3811 continue;
3812
ad824783
AC
3813 /* If the lookup entry has a con_id, require exact match */
3814 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
3815 continue;
bae48da2 3816
4c033b54
GU
3817 if (p->chip_hwnum == U16_MAX) {
3818 desc = gpio_name_to_desc(p->key);
3819 if (desc) {
3820 *flags = p->flags;
3821 return desc;
3822 }
3823
3824 dev_warn(dev, "cannot find GPIO line %s, deferring\n",
3825 p->key);
3826 return ERR_PTR(-EPROBE_DEFER);
3827 }
3828
3829 gc = find_chip_by_name(p->key);
bae48da2 3830
a0b66a73 3831 if (!gc) {
8853daf3
JK
3832 /*
3833 * As the lookup table indicates a chip with
4c033b54 3834 * p->key should exist, assume it may
8853daf3
JK
3835 * still appear later and let the interested
3836 * consumer be probed again or let the Deferred
3837 * Probe infrastructure handle the error.
3838 */
3839 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
4c033b54 3840 p->key);
8853daf3 3841 return ERR_PTR(-EPROBE_DEFER);
ad824783 3842 }
bae48da2 3843
a0b66a73 3844 if (gc->ngpio <= p->chip_hwnum) {
2a3cf6a3 3845 dev_err(dev,
d935bd50 3846 "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n",
a0b66a73
LW
3847 idx, p->chip_hwnum, gc->ngpio - 1,
3848 gc->label);
2a3cf6a3 3849 return ERR_PTR(-EINVAL);
bae48da2 3850 }
bae48da2 3851
a0b66a73 3852 desc = gpiochip_get_desc(gc, p->chip_hwnum);
ad824783 3853 *flags = p->flags;
bae48da2 3854
2a3cf6a3 3855 return desc;
bae48da2
AC
3856 }
3857
bae48da2
AC
3858 return desc;
3859}
3860
66858527
RI
3861static int platform_gpio_count(struct device *dev, const char *con_id)
3862{
3863 struct gpiod_lookup_table *table;
3864 struct gpiod_lookup *p;
3865 unsigned int count = 0;
3866
3867 table = gpiod_find_lookup_table(dev);
3868 if (!table)
3869 return -ENOENT;
3870
4c033b54 3871 for (p = &table->table[0]; p->key; p++) {
66858527
RI
3872 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
3873 (!con_id && !p->con_id))
3874 count++;
3875 }
3876 if (!count)
3877 return -ENOENT;
3878
3879 return count;
3880}
3881
8eb1f71e
DT
3882static struct gpio_desc *gpiod_find_by_fwnode(struct fwnode_handle *fwnode,
3883 struct device *consumer,
3884 const char *con_id,
3885 unsigned int idx,
3886 enum gpiod_flags *flags,
3887 unsigned long *lookupflags)
0eadd36d 3888{
8eb1f71e 3889 struct gpio_desc *desc = ERR_PTR(-ENOENT);
0eadd36d
DT
3890
3891 if (is_of_node(fwnode)) {
8eb1f71e
DT
3892 dev_dbg(consumer, "using DT '%pfw' for '%s' GPIO lookup\n",
3893 fwnode, con_id);
3894 desc = of_find_gpio(to_of_node(fwnode), con_id, idx, lookupflags);
0eadd36d 3895 } else if (is_acpi_node(fwnode)) {
8eb1f71e
DT
3896 dev_dbg(consumer, "using ACPI '%pfw' for '%s' GPIO lookup\n",
3897 fwnode, con_id);
3898 desc = acpi_find_gpio(fwnode, con_id, idx, flags, lookupflags);
e7f9ff5d
DT
3899 } else if (is_software_node(fwnode)) {
3900 dev_dbg(consumer, "using swnode '%pfw' for '%s' GPIO lookup\n",
3901 fwnode, con_id);
3902 desc = swnode_find_gpio(fwnode, con_id, idx, lookupflags);
0eadd36d 3903 }
0eadd36d 3904
8eb1f71e
DT
3905 return desc;
3906}
0eadd36d 3907
8eb1f71e
DT
3908static struct gpio_desc *gpiod_find_and_request(struct device *consumer,
3909 struct fwnode_handle *fwnode,
3910 const char *con_id,
3911 unsigned int idx,
3912 enum gpiod_flags flags,
3913 const char *label,
3914 bool platform_lookup_allowed)
3915{
3916 struct gpio_desc *desc = ERR_PTR(-ENOENT);
3917 unsigned long lookupflags;
3918 int ret;
3919
3920 if (!IS_ERR_OR_NULL(fwnode))
3921 desc = gpiod_find_by_fwnode(fwnode, consumer, con_id, idx,
3922 &flags, &lookupflags);
3923
3924 if (gpiod_not_found(desc) && platform_lookup_allowed) {
3925 /*
3926 * Either we are not using DT or ACPI, or their lookup did not
3927 * return a result. In that case, use platform lookup as a
3928 * fallback.
3929 */
3930 dev_dbg(consumer, "using lookup tables for GPIO lookup\n");
3931 desc = gpiod_find(consumer, con_id, idx, &lookupflags);
0eadd36d
DT
3932 }
3933
8eb1f71e
DT
3934 if (IS_ERR(desc)) {
3935 dev_dbg(consumer, "No GPIO consumer %s found\n", con_id);
3936 return desc;
3937 }
3938
3939 /*
3940 * If a connection label was passed use that, else attempt to use
3941 * the device name as label
3942 */
0eadd36d 3943 ret = gpiod_request(desc, label);
8eb1f71e
DT
3944 if (ret) {
3945 if (!(ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE))
3946 return ERR_PTR(ret);
0eadd36d 3947
8eb1f71e
DT
3948 /*
3949 * This happens when there are several consumers for
3950 * the same GPIO line: we just return here without
3951 * further initialization. It is a bit of a hack.
3952 * This is necessary to support fixed regulators.
3953 *
3954 * FIXME: Make this more sane and safe.
3955 */
3956 dev_info(consumer,
3957 "nonexclusive access to GPIO for %s\n", con_id);
3958 return desc;
3959 }
0eadd36d 3960
8eb1f71e 3961 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
0eadd36d 3962 if (ret < 0) {
8eb1f71e 3963 dev_dbg(consumer, "setup of GPIO %s failed\n", con_id);
0eadd36d
DT
3964 gpiod_put(desc);
3965 return ERR_PTR(ret);
3966 }
3967
3968 blocking_notifier_call_chain(&desc->gdev->notifier,
3969 GPIOLINE_CHANGED_REQUESTED, desc);
3970
3971 return desc;
3972}
3973
13949fa9
DT
3974/**
3975 * fwnode_gpiod_get_index - obtain a GPIO from firmware node
3976 * @fwnode: handle of the firmware node
3977 * @con_id: function within the GPIO consumer
3978 * @index: index of the GPIO to obtain for the consumer
3979 * @flags: GPIO initialization flags
3980 * @label: label to attach to the requested GPIO
3981 *
3982 * This function can be used for drivers that get their configuration
3983 * from opaque firmware.
3984 *
3985 * The function properly finds the corresponding GPIO using whatever is the
3986 * underlying firmware interface and then makes sure that the GPIO
3987 * descriptor is requested before it is returned to the caller.
3988 *
3989 * Returns:
3990 * On successful request the GPIO pin is configured in accordance with
3991 * provided @flags.
3992 *
3993 * In case of error an ERR_PTR() is returned.
3994 */
3995struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
8eb1f71e
DT
3996 const char *con_id,
3997 int index,
13949fa9
DT
3998 enum gpiod_flags flags,
3999 const char *label)
4000{
8eb1f71e 4001 return gpiod_find_and_request(NULL, fwnode, con_id, index, flags, label, false);
13949fa9
DT
4002}
4003EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
4004
66858527
RI
4005/**
4006 * gpiod_count - return the number of GPIOs associated with a device / function
4007 * or -ENOENT if no GPIO has been assigned to the requested function
4008 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4009 * @con_id: function within the GPIO consumer
4010 */
4011int gpiod_count(struct device *dev, const char *con_id)
4012{
944f4b0a 4013 const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
66858527
RI
4014 int count = -ENOENT;
4015
944f4b0a 4016 if (is_of_node(fwnode))
f626d6df 4017 count = of_gpio_get_count(dev, con_id);
944f4b0a 4018 else if (is_acpi_node(fwnode))
66858527 4019 count = acpi_gpio_count(dev, con_id);
e7f9ff5d
DT
4020 else if (is_software_node(fwnode))
4021 count = swnode_gpio_count(fwnode, con_id);
66858527
RI
4022
4023 if (count < 0)
4024 count = platform_gpio_count(dev, con_id);
4025
4026 return count;
4027}
4028EXPORT_SYMBOL_GPL(gpiod_count);
4029
bae48da2 4030/**
0879162f 4031 * gpiod_get - obtain a GPIO for a given GPIO function
ad824783 4032 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2 4033 * @con_id: function within the GPIO consumer
39b2bbe3 4034 * @flags: optional GPIO initialization flags
bae48da2
AC
4035 *
4036 * Return the GPIO descriptor corresponding to the function con_id of device
2a3cf6a3 4037 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
20a8a968 4038 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
bae48da2 4039 */
b17d1bf1 4040struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
39b2bbe3 4041 enum gpiod_flags flags)
bae48da2 4042{
39b2bbe3 4043 return gpiod_get_index(dev, con_id, 0, flags);
bae48da2 4044}
b17d1bf1 4045EXPORT_SYMBOL_GPL(gpiod_get);
bae48da2 4046
29a1f233
TR
4047/**
4048 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
4049 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4050 * @con_id: function within the GPIO consumer
39b2bbe3 4051 * @flags: optional GPIO initialization flags
29a1f233
TR
4052 *
4053 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
4054 * the requested function it will return NULL. This is convenient for drivers
4055 * that need to handle optional GPIOs.
4056 */
b17d1bf1 4057struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
39b2bbe3
AC
4058 const char *con_id,
4059 enum gpiod_flags flags)
29a1f233 4060{
39b2bbe3 4061 return gpiod_get_index_optional(dev, con_id, 0, flags);
29a1f233 4062}
b17d1bf1 4063EXPORT_SYMBOL_GPL(gpiod_get_optional);
29a1f233 4064
f625d460
BP
4065
4066/**
4067 * gpiod_configure_flags - helper function to configure a given GPIO
4068 * @desc: gpio whose value will be assigned
4069 * @con_id: function within the GPIO consumer
fed7026a
AS
4070 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4071 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4072 * @dflags: gpiod_flags - optional GPIO initialization flags
4073 *
4074 * Return 0 on success, -ENOENT if no GPIO has been assigned to the
4075 * requested function and/or index, or another IS_ERR() code if an error
4076 * occurred while trying to acquire the GPIO.
4077 */
c29fd9eb 4078int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
85b03b30 4079 unsigned long lflags, enum gpiod_flags dflags)
f625d460 4080{
d377f56f 4081 int ret;
f625d460 4082
85b03b30
JH
4083 if (lflags & GPIO_ACTIVE_LOW)
4084 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
f926dfc1 4085
85b03b30
JH
4086 if (lflags & GPIO_OPEN_DRAIN)
4087 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
f926dfc1
LW
4088 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
4089 /*
4090 * This enforces open drain mode from the consumer side.
4091 * This is necessary for some busses like I2C, but the lookup
4092 * should *REALLY* have specified them as open drain in the
4093 * first place, so print a little warning here.
4094 */
4095 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
4096 gpiod_warn(desc,
4097 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
4098 }
4099
85b03b30
JH
4100 if (lflags & GPIO_OPEN_SOURCE)
4101 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
e10f72bf 4102
c269df8c
NS
4103 if (((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) ||
4104 ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DISABLE)) ||
4105 ((lflags & GPIO_PULL_DOWN) && (lflags & GPIO_PULL_DISABLE))) {
d449991c 4106 gpiod_err(desc,
c269df8c 4107 "multiple pull-up, pull-down or pull-disable enabled, invalid configuration\n");
d449991c
TP
4108 return -EINVAL;
4109 }
4110
4111 if (lflags & GPIO_PULL_UP)
4112 set_bit(FLAG_PULL_UP, &desc->flags);
4113 else if (lflags & GPIO_PULL_DOWN)
4114 set_bit(FLAG_PULL_DOWN, &desc->flags);
c269df8c
NS
4115 else if (lflags & GPIO_PULL_DISABLE)
4116 set_bit(FLAG_BIAS_DISABLE, &desc->flags);
d449991c 4117
d377f56f
LW
4118 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
4119 if (ret < 0)
4120 return ret;
85b03b30 4121
f625d460
BP
4122 /* No particular flag request, return here... */
4123 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
262b9011 4124 gpiod_dbg(desc, "no flags found for %s\n", con_id);
f625d460
BP
4125 return 0;
4126 }
4127
4128 /* Process flags */
4129 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
d377f56f 4130 ret = gpiod_direction_output(desc,
ad17731d 4131 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
f625d460 4132 else
d377f56f 4133 ret = gpiod_direction_input(desc);
f625d460 4134
d377f56f 4135 return ret;
f625d460
BP
4136}
4137
bae48da2
AC
4138/**
4139 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
fdd6a5fe 4140 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2
AC
4141 * @con_id: function within the GPIO consumer
4142 * @idx: index of the GPIO to obtain in the consumer
39b2bbe3 4143 * @flags: optional GPIO initialization flags
bae48da2
AC
4144 *
4145 * This variant of gpiod_get() allows to access GPIOs other than the first
4146 * defined one for functions that define several GPIOs.
4147 *
2a3cf6a3
AC
4148 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
4149 * requested function and/or index, or another IS_ERR() code if an error
20a8a968 4150 * occurred while trying to acquire the GPIO.
bae48da2 4151 */
b17d1bf1 4152struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
bae48da2 4153 const char *con_id,
39b2bbe3
AC
4154 unsigned int idx,
4155 enum gpiod_flags flags)
bae48da2 4156{
07445ae1 4157 struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
7d18f0a1 4158 const char *devname = dev ? dev_name(dev) : "?";
8eb1f71e 4159 const char *label = con_id ?: devname;
bae48da2 4160
8eb1f71e 4161 return gpiod_find_and_request(dev, fwnode, con_id, idx, flags, label, true);
6392cca4 4162}
b17d1bf1 4163EXPORT_SYMBOL_GPL(gpiod_get_index);
6392cca4 4164
29a1f233
TR
4165/**
4166 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
4167 * function
4168 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4169 * @con_id: function within the GPIO consumer
4170 * @index: index of the GPIO to obtain in the consumer
39b2bbe3 4171 * @flags: optional GPIO initialization flags
29a1f233
TR
4172 *
4173 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
4174 * specified index was assigned to the requested function it will return NULL.
4175 * This is convenient for drivers that need to handle optional GPIOs.
4176 */
b17d1bf1 4177struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
29a1f233 4178 const char *con_id,
39b2bbe3
AC
4179 unsigned int index,
4180 enum gpiod_flags flags)
29a1f233
TR
4181{
4182 struct gpio_desc *desc;
4183
39b2bbe3 4184 desc = gpiod_get_index(dev, con_id, index, flags);
7b58696d
AS
4185 if (gpiod_not_found(desc))
4186 return NULL;
29a1f233
TR
4187
4188 return desc;
4189}
b17d1bf1 4190EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
29a1f233 4191
f625d460
BP
4192/**
4193 * gpiod_hog - Hog the specified GPIO desc given the provided flags
4194 * @desc: gpio whose value will be assigned
4195 * @name: gpio line name
fed7026a
AS
4196 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4197 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4198 * @dflags: gpiod_flags - optional GPIO initialization flags
4199 */
4200int gpiod_hog(struct gpio_desc *desc, const char *name,
4201 unsigned long lflags, enum gpiod_flags dflags)
4202{
a0b66a73 4203 struct gpio_chip *gc;
f625d460
BP
4204 struct gpio_desc *local_desc;
4205 int hwnum;
d377f56f 4206 int ret;
f625d460 4207
a0b66a73 4208 gc = gpiod_to_chip(desc);
f625d460
BP
4209 hwnum = gpio_chip_hwgpio(desc);
4210
a0b66a73 4211 local_desc = gpiochip_request_own_desc(gc, hwnum, name,
5923ea6c 4212 lflags, dflags);
f625d460 4213 if (IS_ERR(local_desc)) {
d377f56f 4214 ret = PTR_ERR(local_desc);
c31a571d 4215 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
a0b66a73 4216 name, gc->label, hwnum, ret);
d377f56f 4217 return ret;
f625d460
BP
4218 }
4219
f625d460
BP
4220 /* Mark GPIO as hogged so it can be identified and removed later */
4221 set_bit(FLAG_IS_HOGGED, &desc->flags);
4222
262b9011 4223 gpiod_info(desc, "hogged as %s%s\n",
b27f300f
BG
4224 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
4225 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
4226 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
f625d460
BP
4227
4228 return 0;
4229}
4230
4231/**
4232 * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
a0b66a73 4233 * @gc: gpio chip to act on
f625d460 4234 */
a0b66a73 4235static void gpiochip_free_hogs(struct gpio_chip *gc)
f625d460 4236{
80c78fbe 4237 struct gpio_desc *desc;
f625d460 4238
57017edd 4239 for_each_gpio_desc_with_flag(gc, desc, FLAG_IS_HOGGED)
80c78fbe 4240 gpiochip_free_own_desc(desc);
f625d460
BP
4241}
4242
66858527
RI
4243/**
4244 * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
4245 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4246 * @con_id: function within the GPIO consumer
4247 * @flags: optional GPIO initialization flags
4248 *
4249 * This function acquires all the GPIOs defined under a given function.
4250 *
4251 * Return a struct gpio_descs containing an array of descriptors, -ENOENT if
4252 * no GPIO has been assigned to the requested function, or another IS_ERR()
4253 * code if an error occurred while trying to acquire the GPIOs.
4254 */
4255struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
4256 const char *con_id,
4257 enum gpiod_flags flags)
4258{
4259 struct gpio_desc *desc;
4260 struct gpio_descs *descs;
bf9346f5 4261 struct gpio_array *array_info = NULL;
a0b66a73 4262 struct gpio_chip *gc;
bf9346f5 4263 int count, bitmap_size;
66858527
RI
4264
4265 count = gpiod_count(dev, con_id);
4266 if (count < 0)
4267 return ERR_PTR(count);
4268
acafe7e3 4269 descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL);
66858527
RI
4270 if (!descs)
4271 return ERR_PTR(-ENOMEM);
4272
4273 for (descs->ndescs = 0; descs->ndescs < count; ) {
4274 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
4275 if (IS_ERR(desc)) {
4276 gpiod_put_array(descs);
4277 return ERR_CAST(desc);
4278 }
bf9346f5 4279
66858527 4280 descs->desc[descs->ndescs] = desc;
bf9346f5 4281
a0b66a73 4282 gc = gpiod_to_chip(desc);
bf9346f5 4283 /*
c4c958aa
JK
4284 * If pin hardware number of array member 0 is also 0, select
4285 * its chip as a candidate for fast bitmap processing path.
bf9346f5 4286 */
c4c958aa 4287 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
bf9346f5
JK
4288 struct gpio_descs *array;
4289
a0b66a73
LW
4290 bitmap_size = BITS_TO_LONGS(gc->ngpio > count ?
4291 gc->ngpio : count);
bf9346f5
JK
4292
4293 array = kzalloc(struct_size(descs, desc, count) +
4294 struct_size(array_info, invert_mask,
4295 3 * bitmap_size), GFP_KERNEL);
4296 if (!array) {
4297 gpiod_put_array(descs);
4298 return ERR_PTR(-ENOMEM);
4299 }
4300
4301 memcpy(array, descs,
4302 struct_size(descs, desc, descs->ndescs + 1));
4303 kfree(descs);
4304
4305 descs = array;
4306 array_info = (void *)(descs->desc + count);
4307 array_info->get_mask = array_info->invert_mask +
4308 bitmap_size;
4309 array_info->set_mask = array_info->get_mask +
4310 bitmap_size;
4311
4312 array_info->desc = descs->desc;
4313 array_info->size = count;
a0b66a73 4314 array_info->chip = gc;
bf9346f5
JK
4315 bitmap_set(array_info->get_mask, descs->ndescs,
4316 count - descs->ndescs);
4317 bitmap_set(array_info->set_mask, descs->ndescs,
4318 count - descs->ndescs);
4319 descs->info = array_info;
4320 }
c4c958aa 4321 /* Unmark array members which don't belong to the 'fast' chip */
a0b66a73 4322 if (array_info && array_info->chip != gc) {
bf9346f5
JK
4323 __clear_bit(descs->ndescs, array_info->get_mask);
4324 __clear_bit(descs->ndescs, array_info->set_mask);
c4c958aa
JK
4325 }
4326 /*
4327 * Detect array members which belong to the 'fast' chip
4328 * but their pins are not in hardware order.
4329 */
4330 else if (array_info &&
4331 gpio_chip_hwgpio(desc) != descs->ndescs) {
4332 /*
4333 * Don't use fast path if all array members processed so
4334 * far belong to the same chip as this one but its pin
4335 * hardware number is different from its array index.
4336 */
4337 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
4338 array_info = NULL;
4339 } else {
4340 __clear_bit(descs->ndescs,
4341 array_info->get_mask);
4342 __clear_bit(descs->ndescs,
4343 array_info->set_mask);
4344 }
bf9346f5
JK
4345 } else if (array_info) {
4346 /* Exclude open drain or open source from fast output */
a0b66a73
LW
4347 if (gpiochip_line_is_open_drain(gc, descs->ndescs) ||
4348 gpiochip_line_is_open_source(gc, descs->ndescs))
bf9346f5
JK
4349 __clear_bit(descs->ndescs,
4350 array_info->set_mask);
4351 /* Identify 'fast' pins which require invertion */
4352 if (gpiod_is_active_low(desc))
4353 __set_bit(descs->ndescs,
4354 array_info->invert_mask);
4355 }
4356
66858527
RI
4357 descs->ndescs++;
4358 }
bf9346f5
JK
4359 if (array_info)
4360 dev_dbg(dev,
4361 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
4362 array_info->chip->label, array_info->size,
4363 *array_info->get_mask, *array_info->set_mask,
4364 *array_info->invert_mask);
66858527
RI
4365 return descs;
4366}
4367EXPORT_SYMBOL_GPL(gpiod_get_array);
4368
4369/**
4370 * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
4371 * function
4372 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4373 * @con_id: function within the GPIO consumer
4374 * @flags: optional GPIO initialization flags
4375 *
4376 * This is equivalent to gpiod_get_array(), except that when no GPIO was
4377 * assigned to the requested function it will return NULL.
4378 */
4379struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
4380 const char *con_id,
4381 enum gpiod_flags flags)
4382{
4383 struct gpio_descs *descs;
4384
4385 descs = gpiod_get_array(dev, con_id, flags);
7b58696d 4386 if (gpiod_not_found(descs))
66858527
RI
4387 return NULL;
4388
4389 return descs;
4390}
4391EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
4392
bae48da2
AC
4393/**
4394 * gpiod_put - dispose of a GPIO descriptor
4395 * @desc: GPIO descriptor to dispose of
4396 *
4397 * No descriptor can be used after gpiod_put() has been called on it.
4398 */
4399void gpiod_put(struct gpio_desc *desc)
4400{
1d7765ba
AS
4401 if (desc)
4402 gpiod_free(desc);
372e722e 4403}
bae48da2 4404EXPORT_SYMBOL_GPL(gpiod_put);
d2876d08 4405
66858527
RI
4406/**
4407 * gpiod_put_array - dispose of multiple GPIO descriptors
4408 * @descs: struct gpio_descs containing an array of descriptors
4409 */
4410void gpiod_put_array(struct gpio_descs *descs)
4411{
4412 unsigned int i;
4413
4414 for (i = 0; i < descs->ndescs; i++)
4415 gpiod_put(descs->desc[i]);
4416
4417 kfree(descs);
4418}
4419EXPORT_SYMBOL_GPL(gpiod_put_array);
4420
ced2af41
SK
4421
4422static int gpio_bus_match(struct device *dev, struct device_driver *drv)
4423{
1df62542
AS
4424 struct fwnode_handle *fwnode = dev_fwnode(dev);
4425
ced2af41
SK
4426 /*
4427 * Only match if the fwnode doesn't already have a proper struct device
4428 * created for it.
4429 */
1df62542 4430 if (fwnode && fwnode->dev != dev)
ced2af41
SK
4431 return 0;
4432 return 1;
4433}
4434
4731210c
SK
4435static int gpio_stub_drv_probe(struct device *dev)
4436{
4437 /*
4438 * The DT node of some GPIO chips have a "compatible" property, but
4439 * never have a struct device added and probed by a driver to register
4440 * the GPIO chip with gpiolib. In such cases, fw_devlink=on will cause
4441 * the consumers of the GPIO chip to get probe deferred forever because
4442 * they will be waiting for a device associated with the GPIO chip
4443 * firmware node to get added and bound to a driver.
4444 *
4445 * To allow these consumers to probe, we associate the struct
4446 * gpio_device of the GPIO chip with the firmware node and then simply
4447 * bind it to this stub driver.
4448 */
4449 return 0;
4450}
4451
4452static struct device_driver gpio_stub_drv = {
4453 .name = "gpio_stub_drv",
4454 .bus = &gpio_bus_type,
4455 .probe = gpio_stub_drv_probe,
4456};
4457
3c702e99
LW
4458static int __init gpiolib_dev_init(void)
4459{
4460 int ret;
4461
4462 /* Register GPIO sysfs bus */
b1911710 4463 ret = bus_register(&gpio_bus_type);
3c702e99
LW
4464 if (ret < 0) {
4465 pr_err("gpiolib: could not register GPIO bus type\n");
4466 return ret;
4467 }
4468
3875721e
WY
4469 ret = driver_register(&gpio_stub_drv);
4470 if (ret < 0) {
4731210c
SK
4471 pr_err("gpiolib: could not register GPIO stub driver\n");
4472 bus_unregister(&gpio_bus_type);
4473 return ret;
4474 }
4475
ddd8891e 4476 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME);
3c702e99
LW
4477 if (ret < 0) {
4478 pr_err("gpiolib: failed to allocate char dev region\n");
4731210c 4479 driver_unregister(&gpio_stub_drv);
3c702e99 4480 bus_unregister(&gpio_bus_type);
63636d95 4481 return ret;
3c702e99 4482 }
63636d95
GU
4483
4484 gpiolib_initialized = true;
4485 gpiochip_setup_devs();
4486
8650b609
DG
4487#if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO)
4488 WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier));
4489#endif /* CONFIG_OF_DYNAMIC && CONFIG_OF_GPIO */
63636d95 4490
3c702e99
LW
4491 return ret;
4492}
4493core_initcall(gpiolib_dev_init);
4494
d2876d08
DB
4495#ifdef CONFIG_DEBUG_FS
4496
fdeb8e15 4497static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
d2876d08 4498{
a0b66a73 4499 struct gpio_chip *gc = gdev->chip;
3de69ae1 4500 struct gpio_desc *desc;
fdeb8e15 4501 unsigned gpio = gdev->base;
3de69ae1 4502 int value;
90fd2270
LW
4503 bool is_out;
4504 bool is_irq;
4505 bool active_low;
d2876d08 4506
3de69ae1
AS
4507 for_each_gpio_desc(gc, desc) {
4508 if (test_bit(FLAG_REQUESTED, &desc->flags)) {
4509 gpiod_get_direction(desc);
4510 is_out = test_bit(FLAG_IS_OUT, &desc->flags);
234c5209 4511 value = gpio_chip_get_value(gc, desc);
3de69ae1
AS
4512 is_irq = test_bit(FLAG_USED_AS_IRQ, &desc->flags);
4513 active_low = test_bit(FLAG_ACTIVE_LOW, &desc->flags);
4514 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s\n",
4515 gpio, desc->name ?: "", desc->label,
4516 is_out ? "out" : "in ",
4517 value >= 0 ? (value ? "hi" : "lo") : "? ",
4518 is_irq ? "IRQ " : "",
4519 active_low ? "ACTIVE LOW" : "");
4520 } else if (desc->name) {
4521 seq_printf(s, " gpio-%-3d (%-20.20s)\n", gpio, desc->name);
ced433e2 4522 }
d2876d08 4523
3de69ae1 4524 gpio++;
d2876d08
DB
4525 }
4526}
4527
f9c4a31f 4528static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
d2876d08 4529{
362432ae 4530 unsigned long flags;
ff2b1359 4531 struct gpio_device *gdev = NULL;
cb1650d4 4532 loff_t index = *pos;
d2876d08 4533
f9c4a31f 4534 s->private = "";
d2876d08 4535
362432ae 4536 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4537 list_for_each_entry(gdev, &gpio_devices, list)
362432ae
GL
4538 if (index-- == 0) {
4539 spin_unlock_irqrestore(&gpio_lock, flags);
ff2b1359 4540 return gdev;
f9c4a31f 4541 }
362432ae 4542 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f 4543
cb1650d4 4544 return NULL;
f9c4a31f
TR
4545}
4546
4547static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
4548{
362432ae 4549 unsigned long flags;
ff2b1359 4550 struct gpio_device *gdev = v;
f9c4a31f
TR
4551 void *ret = NULL;
4552
362432ae 4553 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4554 if (list_is_last(&gdev->list, &gpio_devices))
cb1650d4
AC
4555 ret = NULL;
4556 else
243cfa6a 4557 ret = list_first_entry(&gdev->list, struct gpio_device, list);
362432ae 4558 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f
TR
4559
4560 s->private = "\n";
4561 ++*pos;
4562
4563 return ret;
4564}
4565
4566static void gpiolib_seq_stop(struct seq_file *s, void *v)
4567{
4568}
4569
4570static int gpiolib_seq_show(struct seq_file *s, void *v)
4571{
ff2b1359 4572 struct gpio_device *gdev = v;
a0b66a73 4573 struct gpio_chip *gc = gdev->chip;
ff2b1359
LW
4574 struct device *parent;
4575
a0b66a73 4576 if (!gc) {
ff2b1359
LW
4577 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
4578 dev_name(&gdev->dev));
4579 return 0;
4580 }
f9c4a31f 4581
ff2b1359
LW
4582 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
4583 dev_name(&gdev->dev),
fdeb8e15 4584 gdev->base, gdev->base + gdev->ngpio - 1);
a0b66a73 4585 parent = gc->parent;
ff2b1359
LW
4586 if (parent)
4587 seq_printf(s, ", parent: %s/%s",
4588 parent->bus ? parent->bus->name : "no-bus",
4589 dev_name(parent));
a0b66a73
LW
4590 if (gc->label)
4591 seq_printf(s, ", %s", gc->label);
4592 if (gc->can_sleep)
f9c4a31f
TR
4593 seq_printf(s, ", can sleep");
4594 seq_printf(s, ":\n");
4595
a0b66a73
LW
4596 if (gc->dbg_show)
4597 gc->dbg_show(s, gc);
f9c4a31f 4598 else
fdeb8e15 4599 gpiolib_dbg_show(s, gdev);
f9c4a31f 4600
d2876d08
DB
4601 return 0;
4602}
4603
425c5b3e 4604static const struct seq_operations gpiolib_sops = {
f9c4a31f
TR
4605 .start = gpiolib_seq_start,
4606 .next = gpiolib_seq_next,
4607 .stop = gpiolib_seq_stop,
4608 .show = gpiolib_seq_show,
4609};
425c5b3e 4610DEFINE_SEQ_ATTRIBUTE(gpiolib);
d2876d08
DB
4611
4612static int __init gpiolib_debugfs_init(void)
4613{
4614 /* /sys/kernel/debug/gpio */
425c5b3e 4615 debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops);
d2876d08
DB
4616 return 0;
4617}
4618subsys_initcall(gpiolib_debugfs_init);
4619
4620#endif /* DEBUG_FS */