Merge tag 'v5.4-rc6' into devel
[linux-block.git] / drivers / gpio / gpiolib.c
CommitLineData
dae5f0af 1// SPDX-License-Identifier: GPL-2.0
923a654c 2#include <linux/bitmap.h>
d2876d08
DB
3#include <linux/kernel.h>
4#include <linux/module.h>
ff77c352 5#include <linux/interrupt.h>
d2876d08
DB
6#include <linux/irq.h>
7#include <linux/spinlock.h>
1a989d0f 8#include <linux/list.h>
d8f388d8
DB
9#include <linux/device.h>
10#include <linux/err.h>
11#include <linux/debugfs.h>
12#include <linux/seq_file.h>
13#include <linux/gpio.h>
ff77c352 14#include <linux/idr.h>
5a0e3ad6 15#include <linux/slab.h>
7b199811 16#include <linux/acpi.h>
53e7cac3 17#include <linux/gpio/driver.h>
0a6d3158 18#include <linux/gpio/machine.h>
c771c2f4 19#include <linux/pinctrl/consumer.h>
3c702e99
LW
20#include <linux/cdev.h>
21#include <linux/fs.h>
22#include <linux/uaccess.h>
8b92e17e 23#include <linux/compat.h>
d7c51b47 24#include <linux/anon_inodes.h>
953b956a 25#include <linux/file.h>
61f922db
LW
26#include <linux/kfifo.h>
27#include <linux/poll.h>
28#include <linux/timekeeping.h>
3c702e99 29#include <uapi/linux/gpio.h>
d2876d08 30
664e3e5a 31#include "gpiolib.h"
f626d6df 32#include "gpiolib-of.h"
77cb907a 33#include "gpiolib-acpi.h"
664e3e5a 34
3f397c21
UKK
35#define CREATE_TRACE_POINTS
36#include <trace/events/gpio.h>
d2876d08 37
79a9becd 38/* Implementation infrastructure for GPIO interfaces.
d2876d08 39 *
79a9becd
AC
40 * The GPIO programming interface allows for inlining speed-critical
41 * get/set operations for common cases, so that access to SOC-integrated
42 * GPIOs can sometimes cost only an instruction or two per bit.
d2876d08
DB
43 */
44
45
46/* When debugging, extend minimal trust to callers and platform code.
47 * Also emit diagnostic messages that may help initial bringup, when
48 * board setup or driver bugs are most common.
49 *
50 * Otherwise, minimize overhead in what may be bitbanging codepaths.
51 */
52#ifdef DEBUG
53#define extra_checks 1
54#else
55#define extra_checks 0
56#endif
57
ff2b1359
LW
58/* Device and char device-related information */
59static DEFINE_IDA(gpio_ida);
3c702e99
LW
60static dev_t gpio_devt;
61#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
62static struct bus_type gpio_bus_type = {
63 .name = "gpio",
64};
ff2b1359 65
3027743f
LA
66/*
67 * Number of GPIOs to use for the fast path in set array
68 */
69#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
70
d2876d08
DB
71/* gpio_lock prevents conflicts during gpio_desc[] table updates.
72 * While any GPIO is requested, its gpio_chip is not removable;
73 * each GPIO's "requested" flag serves as a lock and refcount.
74 */
0eb4c6c2 75DEFINE_SPINLOCK(gpio_lock);
d2876d08 76
bae48da2
AC
77static DEFINE_MUTEX(gpio_lookup_lock);
78static LIST_HEAD(gpio_lookup_list);
ff2b1359 79LIST_HEAD(gpio_devices);
6d86750c 80
a411e81e
BG
81static DEFINE_MUTEX(gpio_machine_hogs_mutex);
82static LIST_HEAD(gpio_machine_hogs);
83
6d86750c 84static void gpiochip_free_hogs(struct gpio_chip *chip);
959bc7b2 85static int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
86 struct lock_class_key *lock_key,
87 struct lock_class_key *request_key);
6d86750c 88static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip);
9411e3aa 89static int gpiochip_irqchip_init_hw(struct gpio_chip *gpiochip);
79b804cb
MW
90static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip);
91static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip);
6d86750c 92
159f3cd9 93static bool gpiolib_initialized;
6d86750c 94
d2876d08
DB
95static inline void desc_set_label(struct gpio_desc *d, const char *label)
96{
d2876d08 97 d->label = label;
d2876d08
DB
98}
99
372e722e 100/**
950d55f5
TR
101 * gpio_to_desc - Convert a GPIO number to its descriptor
102 * @gpio: global GPIO number
103 *
104 * Returns:
105 * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
106 * with the given number exists in the system.
372e722e 107 */
79a9becd 108struct gpio_desc *gpio_to_desc(unsigned gpio)
372e722e 109{
ff2b1359 110 struct gpio_device *gdev;
14e85c0e
AC
111 unsigned long flags;
112
113 spin_lock_irqsave(&gpio_lock, flags);
114
ff2b1359 115 list_for_each_entry(gdev, &gpio_devices, list) {
fdeb8e15
LW
116 if (gdev->base <= gpio &&
117 gdev->base + gdev->ngpio > gpio) {
14e85c0e 118 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 119 return &gdev->descs[gpio - gdev->base];
14e85c0e
AC
120 }
121 }
122
123 spin_unlock_irqrestore(&gpio_lock, flags);
124
0e9a5edf
AC
125 if (!gpio_is_valid(gpio))
126 WARN(1, "invalid GPIO %d\n", gpio);
127
14e85c0e 128 return NULL;
372e722e 129}
79a9becd 130EXPORT_SYMBOL_GPL(gpio_to_desc);
372e722e 131
d468bf9e 132/**
950d55f5
TR
133 * gpiochip_get_desc - get the GPIO descriptor corresponding to the given
134 * hardware number for this chip
135 * @chip: GPIO chip
136 * @hwnum: hardware number of the GPIO for this chip
137 *
138 * Returns:
139 * A pointer to the GPIO descriptor or %ERR_PTR(-EINVAL) if no GPIO exists
140 * in the given chip for the specified hardware number.
d468bf9e 141 */
bb1e88cc
AC
142struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip,
143 u16 hwnum)
d468bf9e 144{
fdeb8e15
LW
145 struct gpio_device *gdev = chip->gpiodev;
146
147 if (hwnum >= gdev->ngpio)
b7d0a28a 148 return ERR_PTR(-EINVAL);
d468bf9e 149
fdeb8e15 150 return &gdev->descs[hwnum];
d468bf9e 151}
372e722e
AC
152
153/**
950d55f5
TR
154 * desc_to_gpio - convert a GPIO descriptor to the integer namespace
155 * @desc: GPIO descriptor
156 *
372e722e 157 * This should disappear in the future but is needed since we still
950d55f5
TR
158 * use GPIO numbers for error messages and sysfs nodes.
159 *
160 * Returns:
161 * The global GPIO number for the GPIO specified by its descriptor.
372e722e 162 */
79a9becd 163int desc_to_gpio(const struct gpio_desc *desc)
372e722e 164{
fdeb8e15 165 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
372e722e 166}
79a9becd 167EXPORT_SYMBOL_GPL(desc_to_gpio);
372e722e
AC
168
169
79a9becd
AC
170/**
171 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
172 * @desc: descriptor to return the chip of
173 */
174struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
372e722e 175{
dd3b9a44 176 if (!desc || !desc->gdev)
fdeb8e15
LW
177 return NULL;
178 return desc->gdev->chip;
372e722e 179}
79a9becd 180EXPORT_SYMBOL_GPL(gpiod_to_chip);
d2876d08 181
8d0aab2f
AV
182/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
183static int gpiochip_find_base(int ngpio)
184{
ff2b1359 185 struct gpio_device *gdev;
83cabe33 186 int base = ARCH_NR_GPIOS - ngpio;
8d0aab2f 187
ff2b1359 188 list_for_each_entry_reverse(gdev, &gpio_devices, list) {
83cabe33 189 /* found a free space? */
fdeb8e15 190 if (gdev->base + gdev->ngpio <= base)
83cabe33
AC
191 break;
192 else
193 /* nope, check the space right before the chip */
fdeb8e15 194 base = gdev->base - ngpio;
8d0aab2f
AV
195 }
196
83cabe33 197 if (gpio_is_valid(base)) {
8d0aab2f 198 pr_debug("%s: found new base at %d\n", __func__, base);
83cabe33
AC
199 return base;
200 } else {
201 pr_err("%s: cannot find free range\n", __func__);
202 return -ENOSPC;
169b6a7a 203 }
169b6a7a
AV
204}
205
79a9becd
AC
206/**
207 * gpiod_get_direction - return the current direction of a GPIO
208 * @desc: GPIO to get the direction of
209 *
94fc7309 210 * Returns 0 for output, 1 for input, or an error code in case of error.
79a9becd
AC
211 *
212 * This function may sleep if gpiod_cansleep() is true.
213 */
8e53b0f1 214int gpiod_get_direction(struct gpio_desc *desc)
80b0a602 215{
d0121b85
WS
216 struct gpio_chip *chip;
217 unsigned offset;
d377f56f 218 int ret;
80b0a602 219
372e722e
AC
220 chip = gpiod_to_chip(desc);
221 offset = gpio_chip_hwgpio(desc);
80b0a602
MN
222
223 if (!chip->get_direction)
d0121b85 224 return -ENOTSUPP;
80b0a602 225
d377f56f
LW
226 ret = chip->get_direction(chip, offset);
227 if (ret > 0) {
80b0a602 228 /* GPIOF_DIR_IN, or other positive */
d377f56f 229 ret = 1;
8e53b0f1 230 clear_bit(FLAG_IS_OUT, &desc->flags);
80b0a602 231 }
d377f56f 232 if (ret == 0) {
80b0a602 233 /* GPIOF_DIR_OUT */
8e53b0f1 234 set_bit(FLAG_IS_OUT, &desc->flags);
80b0a602 235 }
d377f56f 236 return ret;
80b0a602 237}
79a9becd 238EXPORT_SYMBOL_GPL(gpiod_get_direction);
80b0a602 239
1a989d0f
AC
240/*
241 * Add a new chip to the global chips list, keeping the list of chips sorted
ef7c7553 242 * by range(means [base, base + ngpio - 1]) order.
1a989d0f
AC
243 *
244 * Return -EBUSY if the new chip overlaps with some other chip's integer
245 * space.
246 */
ff2b1359 247static int gpiodev_add_to_list(struct gpio_device *gdev)
1a989d0f 248{
a961f9b4 249 struct gpio_device *prev, *next;
1a989d0f 250
ff2b1359 251 if (list_empty(&gpio_devices)) {
a961f9b4 252 /* initial entry in list */
ff2b1359 253 list_add_tail(&gdev->list, &gpio_devices);
e28ecca6 254 return 0;
1a989d0f
AC
255 }
256
a961f9b4
BJZ
257 next = list_entry(gpio_devices.next, struct gpio_device, list);
258 if (gdev->base + gdev->ngpio <= next->base) {
259 /* add before first entry */
260 list_add(&gdev->list, &gpio_devices);
261 return 0;
1a989d0f
AC
262 }
263
a961f9b4
BJZ
264 prev = list_entry(gpio_devices.prev, struct gpio_device, list);
265 if (prev->base + prev->ngpio <= gdev->base) {
266 /* add behind last entry */
267 list_add_tail(&gdev->list, &gpio_devices);
96098df1 268 return 0;
1a989d0f
AC
269 }
270
a961f9b4
BJZ
271 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
272 /* at the end of the list */
273 if (&next->list == &gpio_devices)
274 break;
1a989d0f 275
a961f9b4
BJZ
276 /* add between prev and next */
277 if (prev->base + prev->ngpio <= gdev->base
278 && gdev->base + gdev->ngpio <= next->base) {
279 list_add(&gdev->list, &prev->list);
280 return 0;
281 }
282 }
283
284 dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n");
285 return -EBUSY;
1a989d0f
AC
286}
287
950d55f5 288/*
f881bab0
LW
289 * Convert a GPIO name to its descriptor
290 */
291static struct gpio_desc *gpio_name_to_desc(const char * const name)
292{
ff2b1359 293 struct gpio_device *gdev;
f881bab0
LW
294 unsigned long flags;
295
296 spin_lock_irqsave(&gpio_lock, flags);
297
ff2b1359 298 list_for_each_entry(gdev, &gpio_devices, list) {
f881bab0
LW
299 int i;
300
fdeb8e15
LW
301 for (i = 0; i != gdev->ngpio; ++i) {
302 struct gpio_desc *desc = &gdev->descs[i];
f881bab0 303
fdeb8e15 304 if (!desc->name || !name)
f881bab0
LW
305 continue;
306
fdeb8e15 307 if (!strcmp(desc->name, name)) {
f881bab0 308 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 309 return desc;
f881bab0
LW
310 }
311 }
312 }
313
314 spin_unlock_irqrestore(&gpio_lock, flags);
315
316 return NULL;
317}
318
5f3ca732
MP
319/*
320 * Takes the names from gc->names and checks if they are all unique. If they
321 * are, they are assigned to their gpio descriptors.
322 *
ed37915c 323 * Warning if one of the names is already used for a different GPIO.
5f3ca732
MP
324 */
325static int gpiochip_set_desc_names(struct gpio_chip *gc)
326{
fdeb8e15 327 struct gpio_device *gdev = gc->gpiodev;
5f3ca732
MP
328 int i;
329
330 if (!gc->names)
331 return 0;
332
333 /* First check all names if they are unique */
334 for (i = 0; i != gc->ngpio; ++i) {
335 struct gpio_desc *gpio;
336
337 gpio = gpio_name_to_desc(gc->names[i]);
f881bab0 338 if (gpio)
fdeb8e15 339 dev_warn(&gdev->dev,
34ffd85d 340 "Detected name collision for GPIO name '%s'\n",
f881bab0 341 gc->names[i]);
5f3ca732
MP
342 }
343
344 /* Then add all names to the GPIO descriptors */
345 for (i = 0; i != gc->ngpio; ++i)
fdeb8e15 346 gdev->descs[i].name = gc->names[i];
5f3ca732
MP
347
348 return 0;
349}
350
e4371f6e
SB
351static unsigned long *gpiochip_allocate_mask(struct gpio_chip *chip)
352{
353 unsigned long *p;
354
7bdbd1ec 355 p = bitmap_alloc(chip->ngpio, GFP_KERNEL);
e4371f6e
SB
356 if (!p)
357 return NULL;
358
359 /* Assume by default all GPIOs are valid */
360 bitmap_fill(p, chip->ngpio);
361
362 return p;
363}
364
f626d6df 365static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
726cb3ba 366{
eb1e8bd6 367 if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask))
726cb3ba
SB
368 return 0;
369
f626d6df
LW
370 gc->valid_mask = gpiochip_allocate_mask(gc);
371 if (!gc->valid_mask)
726cb3ba
SB
372 return -ENOMEM;
373
374 return 0;
375}
376
c9fc5aff 377static int gpiochip_init_valid_mask(struct gpio_chip *gc)
f8ec92a9 378{
c9fc5aff
LW
379 if (gc->init_valid_mask)
380 return gc->init_valid_mask(gc,
381 gc->valid_mask,
382 gc->ngpio);
f8ec92a9
RRD
383
384 return 0;
385}
386
726cb3ba
SB
387static void gpiochip_free_valid_mask(struct gpio_chip *gpiochip)
388{
7bdbd1ec 389 bitmap_free(gpiochip->valid_mask);
726cb3ba
SB
390 gpiochip->valid_mask = NULL;
391}
392
393bool gpiochip_line_is_valid(const struct gpio_chip *gpiochip,
394 unsigned int offset)
395{
396 /* No mask means all valid */
397 if (likely(!gpiochip->valid_mask))
398 return true;
399 return test_bit(offset, gpiochip->valid_mask);
400}
401EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
402
d7c51b47
LW
403/*
404 * GPIO line handle management
405 */
406
407/**
408 * struct linehandle_state - contains the state of a userspace handle
409 * @gdev: the GPIO device the handle pertains to
410 * @label: consumer label used to tag descriptors
411 * @descs: the GPIO descriptors held by this handle
412 * @numdescs: the number of descriptors held in the descs array
413 */
414struct linehandle_state {
415 struct gpio_device *gdev;
416 const char *label;
417 struct gpio_desc *descs[GPIOHANDLES_MAX];
418 u32 numdescs;
419};
420
e3e847c7
LPC
421#define GPIOHANDLE_REQUEST_VALID_FLAGS \
422 (GPIOHANDLE_REQUEST_INPUT | \
423 GPIOHANDLE_REQUEST_OUTPUT | \
424 GPIOHANDLE_REQUEST_ACTIVE_LOW | \
8c550e94
DF
425 GPIOHANDLE_REQUEST_PULL_UP | \
426 GPIOHANDLE_REQUEST_PULL_DOWN | \
e3e847c7
LPC
427 GPIOHANDLE_REQUEST_OPEN_DRAIN | \
428 GPIOHANDLE_REQUEST_OPEN_SOURCE)
429
d7c51b47
LW
430static long linehandle_ioctl(struct file *filep, unsigned int cmd,
431 unsigned long arg)
432{
433 struct linehandle_state *lh = filep->private_data;
434 void __user *ip = (void __user *)arg;
435 struct gpiohandle_data ghd;
b9762beb 436 DECLARE_BITMAP(vals, GPIOHANDLES_MAX);
d7c51b47
LW
437 int i;
438
439 if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) {
2b955b34 440 /* NOTE: It's ok to read values of output lines. */
eec1d566
LW
441 int ret = gpiod_get_array_value_complex(false,
442 true,
443 lh->numdescs,
444 lh->descs,
77588c14 445 NULL,
eec1d566
LW
446 vals);
447 if (ret)
448 return ret;
d7c51b47 449
3eded5d8 450 memset(&ghd, 0, sizeof(ghd));
eec1d566 451 for (i = 0; i < lh->numdescs; i++)
b9762beb 452 ghd.values[i] = test_bit(i, vals);
d7c51b47
LW
453
454 if (copy_to_user(ip, &ghd, sizeof(ghd)))
455 return -EFAULT;
456
457 return 0;
458 } else if (cmd == GPIOHANDLE_SET_LINE_VALUES_IOCTL) {
e5332d54
BG
459 /*
460 * All line descriptors were created at once with the same
461 * flags so just check if the first one is really output.
462 */
463 if (!test_bit(FLAG_IS_OUT, &lh->descs[0]->flags))
464 return -EPERM;
465
d7c51b47
LW
466 if (copy_from_user(&ghd, ip, sizeof(ghd)))
467 return -EFAULT;
468
469 /* Clamp all values to [0,1] */
470 for (i = 0; i < lh->numdescs; i++)
b9762beb 471 __assign_bit(i, vals, ghd.values[i]);
d7c51b47
LW
472
473 /* Reuse the array setting function */
3027743f 474 return gpiod_set_array_value_complex(false,
d7c51b47
LW
475 true,
476 lh->numdescs,
477 lh->descs,
77588c14 478 NULL,
d7c51b47 479 vals);
d7c51b47
LW
480 }
481 return -EINVAL;
482}
483
484#ifdef CONFIG_COMPAT
485static long linehandle_ioctl_compat(struct file *filep, unsigned int cmd,
486 unsigned long arg)
487{
488 return linehandle_ioctl(filep, cmd, (unsigned long)compat_ptr(arg));
489}
490#endif
491
492static int linehandle_release(struct inode *inode, struct file *filep)
493{
494 struct linehandle_state *lh = filep->private_data;
495 struct gpio_device *gdev = lh->gdev;
496 int i;
497
498 for (i = 0; i < lh->numdescs; i++)
499 gpiod_free(lh->descs[i]);
500 kfree(lh->label);
501 kfree(lh);
502 put_device(&gdev->dev);
503 return 0;
504}
505
506static const struct file_operations linehandle_fileops = {
507 .release = linehandle_release,
508 .owner = THIS_MODULE,
509 .llseek = noop_llseek,
510 .unlocked_ioctl = linehandle_ioctl,
511#ifdef CONFIG_COMPAT
512 .compat_ioctl = linehandle_ioctl_compat,
513#endif
514};
515
516static int linehandle_create(struct gpio_device *gdev, void __user *ip)
517{
518 struct gpiohandle_request handlereq;
519 struct linehandle_state *lh;
953b956a 520 struct file *file;
ab3dbcf7 521 int fd, i, count = 0, ret;
418ee8e9 522 u32 lflags;
d7c51b47
LW
523
524 if (copy_from_user(&handlereq, ip, sizeof(handlereq)))
525 return -EFAULT;
526 if ((handlereq.lines == 0) || (handlereq.lines > GPIOHANDLES_MAX))
527 return -EINVAL;
528
418ee8e9
BG
529 lflags = handlereq.flags;
530
531 /* Return an error if an unknown flag is set */
532 if (lflags & ~GPIOHANDLE_REQUEST_VALID_FLAGS)
533 return -EINVAL;
534
e95fbc13
KG
535 /*
536 * Do not allow both INPUT & OUTPUT flags to be set as they are
537 * contradictory.
538 */
539 if ((lflags & GPIOHANDLE_REQUEST_INPUT) &&
540 (lflags & GPIOHANDLE_REQUEST_OUTPUT))
541 return -EINVAL;
542
588fc3bc
BG
543 /*
544 * Do not allow OPEN_SOURCE & OPEN_DRAIN flags in a single request. If
545 * the hardware actually supports enabling both at the same time the
546 * electrical result would be disastrous.
547 */
548 if ((lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN) &&
549 (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE))
550 return -EINVAL;
551
609aaf6a
BG
552 /* OPEN_DRAIN and OPEN_SOURCE flags only make sense for output mode. */
553 if (!(lflags & GPIOHANDLE_REQUEST_OUTPUT) &&
554 ((lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN) ||
555 (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE)))
556 return -EINVAL;
557
d7c51b47
LW
558 lh = kzalloc(sizeof(*lh), GFP_KERNEL);
559 if (!lh)
560 return -ENOMEM;
561 lh->gdev = gdev;
562 get_device(&gdev->dev);
563
564 /* Make sure this is terminated */
565 handlereq.consumer_label[sizeof(handlereq.consumer_label)-1] = '\0';
566 if (strlen(handlereq.consumer_label)) {
567 lh->label = kstrdup(handlereq.consumer_label,
568 GFP_KERNEL);
569 if (!lh->label) {
570 ret = -ENOMEM;
571 goto out_free_lh;
572 }
573 }
574
575 /* Request each GPIO */
576 for (i = 0; i < handlereq.lines; i++) {
577 u32 offset = handlereq.lineoffsets[i];
d7c51b47
LW
578 struct gpio_desc *desc;
579
e405f9fc
LPC
580 if (offset >= gdev->ngpio) {
581 ret = -EINVAL;
582 goto out_free_descs;
583 }
584
d7c51b47
LW
585 desc = &gdev->descs[offset];
586 ret = gpiod_request(desc, lh->label);
587 if (ret)
588 goto out_free_descs;
589 lh->descs[i] = desc;
19a4fbff 590 count = i + 1;
d7c51b47
LW
591
592 if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW)
593 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
594 if (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN)
595 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
596 if (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE)
597 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
8c550e94
DF
598 if (lflags & GPIOHANDLE_REQUEST_PULL_DOWN)
599 set_bit(FLAG_PULL_DOWN, &desc->flags);
600 if (lflags & GPIOHANDLE_REQUEST_PULL_UP)
601 set_bit(FLAG_PULL_UP, &desc->flags);
d7c51b47 602
e10f72bf
AJ
603 ret = gpiod_set_transitory(desc, false);
604 if (ret < 0)
605 goto out_free_descs;
606
d7c51b47
LW
607 /*
608 * Lines have to be requested explicitly for input
609 * or output, else the line will be treated "as is".
610 */
611 if (lflags & GPIOHANDLE_REQUEST_OUTPUT) {
612 int val = !!handlereq.default_values[i];
613
614 ret = gpiod_direction_output(desc, val);
615 if (ret)
616 goto out_free_descs;
617 } else if (lflags & GPIOHANDLE_REQUEST_INPUT) {
618 ret = gpiod_direction_input(desc);
619 if (ret)
620 goto out_free_descs;
621 }
622 dev_dbg(&gdev->dev, "registered chardev handle for line %d\n",
623 offset);
624 }
e2f608be
LW
625 /* Let i point at the last handle */
626 i--;
d7c51b47
LW
627 lh->numdescs = handlereq.lines;
628
953b956a 629 fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);
d7c51b47
LW
630 if (fd < 0) {
631 ret = fd;
632 goto out_free_descs;
633 }
634
953b956a
LPC
635 file = anon_inode_getfile("gpio-linehandle",
636 &linehandle_fileops,
637 lh,
638 O_RDONLY | O_CLOEXEC);
639 if (IS_ERR(file)) {
640 ret = PTR_ERR(file);
641 goto out_put_unused_fd;
642 }
643
d7c51b47 644 handlereq.fd = fd;
d932cd49 645 if (copy_to_user(ip, &handlereq, sizeof(handlereq))) {
953b956a
LPC
646 /*
647 * fput() will trigger the release() callback, so do not go onto
648 * the regular error cleanup path here.
649 */
650 fput(file);
651 put_unused_fd(fd);
652 return -EFAULT;
d932cd49 653 }
d7c51b47 654
953b956a
LPC
655 fd_install(fd, file);
656
d7c51b47
LW
657 dev_dbg(&gdev->dev, "registered chardev handle for %d lines\n",
658 lh->numdescs);
659
660 return 0;
661
953b956a
LPC
662out_put_unused_fd:
663 put_unused_fd(fd);
d7c51b47 664out_free_descs:
ab3dbcf7 665 for (i = 0; i < count; i++)
d7c51b47
LW
666 gpiod_free(lh->descs[i]);
667 kfree(lh->label);
668out_free_lh:
669 kfree(lh);
670 put_device(&gdev->dev);
671 return ret;
672}
673
61f922db
LW
674/*
675 * GPIO line event management
676 */
677
678/**
679 * struct lineevent_state - contains the state of a userspace event
680 * @gdev: the GPIO device the event pertains to
681 * @label: consumer label used to tag descriptors
682 * @desc: the GPIO descriptor held by this event
683 * @eflags: the event flags this line was requested with
684 * @irq: the interrupt that trigger in response to events on this GPIO
685 * @wait: wait queue that handles blocking reads of events
686 * @events: KFIFO for the GPIO events
687 * @read_lock: mutex lock to protect reads from colliding with adding
688 * new events to the FIFO
d58f2bf2
LW
689 * @timestamp: cache for the timestamp storing it between hardirq
690 * and IRQ thread, used to bring the timestamp close to the actual
691 * event
61f922db
LW
692 */
693struct lineevent_state {
694 struct gpio_device *gdev;
695 const char *label;
696 struct gpio_desc *desc;
697 u32 eflags;
698 int irq;
699 wait_queue_head_t wait;
700 DECLARE_KFIFO(events, struct gpioevent_data, 16);
701 struct mutex read_lock;
d58f2bf2 702 u64 timestamp;
61f922db
LW
703};
704
ac7dbb99
LPC
705#define GPIOEVENT_REQUEST_VALID_FLAGS \
706 (GPIOEVENT_REQUEST_RISING_EDGE | \
707 GPIOEVENT_REQUEST_FALLING_EDGE)
708
afc9a42b 709static __poll_t lineevent_poll(struct file *filep,
61f922db
LW
710 struct poll_table_struct *wait)
711{
712 struct lineevent_state *le = filep->private_data;
afc9a42b 713 __poll_t events = 0;
61f922db
LW
714
715 poll_wait(filep, &le->wait, wait);
716
717 if (!kfifo_is_empty(&le->events))
a9a08845 718 events = EPOLLIN | EPOLLRDNORM;
61f922db
LW
719
720 return events;
721}
722
723
724static ssize_t lineevent_read(struct file *filep,
725 char __user *buf,
726 size_t count,
727 loff_t *f_ps)
728{
729 struct lineevent_state *le = filep->private_data;
730 unsigned int copied;
731 int ret;
732
733 if (count < sizeof(struct gpioevent_data))
734 return -EINVAL;
735
736 do {
737 if (kfifo_is_empty(&le->events)) {
738 if (filep->f_flags & O_NONBLOCK)
739 return -EAGAIN;
740
741 ret = wait_event_interruptible(le->wait,
742 !kfifo_is_empty(&le->events));
743 if (ret)
744 return ret;
745 }
746
747 if (mutex_lock_interruptible(&le->read_lock))
748 return -ERESTARTSYS;
749 ret = kfifo_to_user(&le->events, buf, count, &copied);
750 mutex_unlock(&le->read_lock);
751
752 if (ret)
753 return ret;
754
755 /*
756 * If we couldn't read anything from the fifo (a different
757 * thread might have been faster) we either return -EAGAIN if
758 * the file descriptor is non-blocking, otherwise we go back to
759 * sleep and wait for more data to arrive.
760 */
761 if (copied == 0 && (filep->f_flags & O_NONBLOCK))
762 return -EAGAIN;
763
764 } while (copied == 0);
765
766 return copied;
767}
768
769static int lineevent_release(struct inode *inode, struct file *filep)
770{
771 struct lineevent_state *le = filep->private_data;
772 struct gpio_device *gdev = le->gdev;
773
774 free_irq(le->irq, le);
775 gpiod_free(le->desc);
776 kfree(le->label);
777 kfree(le);
778 put_device(&gdev->dev);
779 return 0;
780}
781
782static long lineevent_ioctl(struct file *filep, unsigned int cmd,
783 unsigned long arg)
784{
785 struct lineevent_state *le = filep->private_data;
786 void __user *ip = (void __user *)arg;
787 struct gpiohandle_data ghd;
788
789 /*
790 * We can get the value for an event line but not set it,
791 * because it is input by definition.
792 */
793 if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) {
794 int val;
795
d82aa4a8
LPC
796 memset(&ghd, 0, sizeof(ghd));
797
61f922db
LW
798 val = gpiod_get_value_cansleep(le->desc);
799 if (val < 0)
800 return val;
801 ghd.values[0] = val;
802
803 if (copy_to_user(ip, &ghd, sizeof(ghd)))
804 return -EFAULT;
805
806 return 0;
807 }
808 return -EINVAL;
809}
810
811#ifdef CONFIG_COMPAT
812static long lineevent_ioctl_compat(struct file *filep, unsigned int cmd,
813 unsigned long arg)
814{
815 return lineevent_ioctl(filep, cmd, (unsigned long)compat_ptr(arg));
816}
817#endif
818
819static const struct file_operations lineevent_fileops = {
820 .release = lineevent_release,
821 .read = lineevent_read,
822 .poll = lineevent_poll,
823 .owner = THIS_MODULE,
824 .llseek = noop_llseek,
825 .unlocked_ioctl = lineevent_ioctl,
826#ifdef CONFIG_COMPAT
827 .compat_ioctl = lineevent_ioctl_compat,
828#endif
829};
830
33265b17 831static irqreturn_t lineevent_irq_thread(int irq, void *p)
61f922db
LW
832{
833 struct lineevent_state *le = p;
834 struct gpioevent_data ge;
fa38869b 835 int ret;
61f922db 836
24bd3efc
LW
837 /* Do not leak kernel stack to userspace */
838 memset(&ge, 0, sizeof(ge));
839
1033be58
BG
840 /*
841 * We may be running from a nested threaded interrupt in which case
842 * we didn't get the timestamp from lineevent_irq_handler().
843 */
844 if (!le->timestamp)
845 ge.timestamp = ktime_get_real_ns();
846 else
847 ge.timestamp = le->timestamp;
61f922db 848
ad537b82
BG
849 if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE
850 && le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) {
fa38869b 851 int level = gpiod_get_value_cansleep(le->desc);
61f922db
LW
852 if (level)
853 /* Emit low-to-high event */
854 ge.id = GPIOEVENT_EVENT_RISING_EDGE;
855 else
856 /* Emit high-to-low event */
857 ge.id = GPIOEVENT_EVENT_FALLING_EDGE;
fa38869b 858 } else if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE) {
61f922db
LW
859 /* Emit low-to-high event */
860 ge.id = GPIOEVENT_EVENT_RISING_EDGE;
fa38869b 861 } else if (le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) {
61f922db
LW
862 /* Emit high-to-low event */
863 ge.id = GPIOEVENT_EVENT_FALLING_EDGE;
bc0207a5
AB
864 } else {
865 return IRQ_NONE;
61f922db
LW
866 }
867
868 ret = kfifo_put(&le->events, ge);
2efc6bfa 869 if (ret)
a9a08845 870 wake_up_poll(&le->wait, EPOLLIN);
61f922db
LW
871
872 return IRQ_HANDLED;
873}
874
d58f2bf2
LW
875static irqreturn_t lineevent_irq_handler(int irq, void *p)
876{
877 struct lineevent_state *le = p;
878
879 /*
880 * Just store the timestamp in hardirq context so we get it as
881 * close in time as possible to the actual event.
882 */
883 le->timestamp = ktime_get_real_ns();
884
885 return IRQ_WAKE_THREAD;
886}
887
61f922db
LW
888static int lineevent_create(struct gpio_device *gdev, void __user *ip)
889{
890 struct gpioevent_request eventreq;
891 struct lineevent_state *le;
892 struct gpio_desc *desc;
953b956a 893 struct file *file;
61f922db
LW
894 u32 offset;
895 u32 lflags;
896 u32 eflags;
897 int fd;
898 int ret;
899 int irqflags = 0;
900
901 if (copy_from_user(&eventreq, ip, sizeof(eventreq)))
902 return -EFAULT;
903
bcc6d99a
BG
904 offset = eventreq.lineoffset;
905 lflags = eventreq.handleflags;
906 eflags = eventreq.eventflags;
907
908 if (offset >= gdev->ngpio)
909 return -EINVAL;
910
911 /* Return an error if a unknown flag is set */
912 if ((lflags & ~GPIOHANDLE_REQUEST_VALID_FLAGS) ||
913 (eflags & ~GPIOEVENT_REQUEST_VALID_FLAGS))
914 return -EINVAL;
915
916 /* This is just wrong: we don't look for events on output lines */
917 if ((lflags & GPIOHANDLE_REQUEST_OUTPUT) ||
918 (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN) ||
919 (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE))
920 return -EINVAL;
921
61f922db
LW
922 le = kzalloc(sizeof(*le), GFP_KERNEL);
923 if (!le)
924 return -ENOMEM;
925 le->gdev = gdev;
926 get_device(&gdev->dev);
927
928 /* Make sure this is terminated */
929 eventreq.consumer_label[sizeof(eventreq.consumer_label)-1] = '\0';
930 if (strlen(eventreq.consumer_label)) {
931 le->label = kstrdup(eventreq.consumer_label,
932 GFP_KERNEL);
933 if (!le->label) {
934 ret = -ENOMEM;
935 goto out_free_le;
936 }
937 }
938
61f922db
LW
939 desc = &gdev->descs[offset];
940 ret = gpiod_request(desc, le->label);
941 if (ret)
f001cc35 942 goto out_free_label;
61f922db
LW
943 le->desc = desc;
944 le->eflags = eflags;
945
946 if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW)
947 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
61f922db
LW
948
949 ret = gpiod_direction_input(desc);
950 if (ret)
951 goto out_free_desc;
952
953 le->irq = gpiod_to_irq(desc);
954 if (le->irq <= 0) {
955 ret = -ENODEV;
956 goto out_free_desc;
957 }
958
959 if (eflags & GPIOEVENT_REQUEST_RISING_EDGE)
223ecaf1
MW
960 irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
961 IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING;
61f922db 962 if (eflags & GPIOEVENT_REQUEST_FALLING_EDGE)
223ecaf1
MW
963 irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
964 IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING;
61f922db 965 irqflags |= IRQF_ONESHOT;
61f922db
LW
966
967 INIT_KFIFO(le->events);
968 init_waitqueue_head(&le->wait);
969 mutex_init(&le->read_lock);
970
971 /* Request a thread to read the events */
972 ret = request_threaded_irq(le->irq,
d58f2bf2 973 lineevent_irq_handler,
61f922db
LW
974 lineevent_irq_thread,
975 irqflags,
976 le->label,
977 le);
978 if (ret)
979 goto out_free_desc;
980
953b956a 981 fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);
61f922db
LW
982 if (fd < 0) {
983 ret = fd;
984 goto out_free_irq;
985 }
986
953b956a
LPC
987 file = anon_inode_getfile("gpio-event",
988 &lineevent_fileops,
989 le,
990 O_RDONLY | O_CLOEXEC);
991 if (IS_ERR(file)) {
992 ret = PTR_ERR(file);
993 goto out_put_unused_fd;
994 }
995
61f922db 996 eventreq.fd = fd;
d932cd49 997 if (copy_to_user(ip, &eventreq, sizeof(eventreq))) {
953b956a
LPC
998 /*
999 * fput() will trigger the release() callback, so do not go onto
1000 * the regular error cleanup path here.
1001 */
1002 fput(file);
1003 put_unused_fd(fd);
1004 return -EFAULT;
d932cd49 1005 }
61f922db 1006
953b956a
LPC
1007 fd_install(fd, file);
1008
61f922db
LW
1009 return 0;
1010
953b956a
LPC
1011out_put_unused_fd:
1012 put_unused_fd(fd);
61f922db
LW
1013out_free_irq:
1014 free_irq(le->irq, le);
1015out_free_desc:
1016 gpiod_free(le->desc);
1017out_free_label:
1018 kfree(le->label);
1019out_free_le:
1020 kfree(le);
1021 put_device(&gdev->dev);
1022 return ret;
1023}
1024
950d55f5 1025/*
3c702e99
LW
1026 * gpio_ioctl() - ioctl handler for the GPIO chardev
1027 */
1028static long gpio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
1029{
1030 struct gpio_device *gdev = filp->private_data;
1031 struct gpio_chip *chip = gdev->chip;
8b92e17e 1032 void __user *ip = (void __user *)arg;
3c702e99
LW
1033
1034 /* We fail any subsequent ioctl():s when the chip is gone */
1035 if (!chip)
1036 return -ENODEV;
1037
521a2ad6 1038 /* Fill in the struct and pass to userspace */
3c702e99 1039 if (cmd == GPIO_GET_CHIPINFO_IOCTL) {
521a2ad6
LW
1040 struct gpiochip_info chipinfo;
1041
0f4bbb23
LPC
1042 memset(&chipinfo, 0, sizeof(chipinfo));
1043
3c702e99
LW
1044 strncpy(chipinfo.name, dev_name(&gdev->dev),
1045 sizeof(chipinfo.name));
1046 chipinfo.name[sizeof(chipinfo.name)-1] = '\0';
df4878e9
LW
1047 strncpy(chipinfo.label, gdev->label,
1048 sizeof(chipinfo.label));
1049 chipinfo.label[sizeof(chipinfo.label)-1] = '\0';
fdeb8e15 1050 chipinfo.lines = gdev->ngpio;
3c702e99
LW
1051 if (copy_to_user(ip, &chipinfo, sizeof(chipinfo)))
1052 return -EFAULT;
1053 return 0;
521a2ad6
LW
1054 } else if (cmd == GPIO_GET_LINEINFO_IOCTL) {
1055 struct gpioline_info lineinfo;
1056 struct gpio_desc *desc;
1057
1058 if (copy_from_user(&lineinfo, ip, sizeof(lineinfo)))
1059 return -EFAULT;
1f1cc456 1060 if (lineinfo.line_offset >= gdev->ngpio)
521a2ad6
LW
1061 return -EINVAL;
1062
1063 desc = &gdev->descs[lineinfo.line_offset];
1064 if (desc->name) {
1065 strncpy(lineinfo.name, desc->name,
1066 sizeof(lineinfo.name));
1067 lineinfo.name[sizeof(lineinfo.name)-1] = '\0';
1068 } else {
1069 lineinfo.name[0] = '\0';
1070 }
1071 if (desc->label) {
214338e3
LW
1072 strncpy(lineinfo.consumer, desc->label,
1073 sizeof(lineinfo.consumer));
1074 lineinfo.consumer[sizeof(lineinfo.consumer)-1] = '\0';
521a2ad6 1075 } else {
214338e3 1076 lineinfo.consumer[0] = '\0';
521a2ad6
LW
1077 }
1078
1079 /*
1080 * Userspace only need to know that the kernel is using
1081 * this GPIO so it can't use it.
1082 */
1083 lineinfo.flags = 0;
9d8cc89c
LW
1084 if (test_bit(FLAG_REQUESTED, &desc->flags) ||
1085 test_bit(FLAG_IS_HOGGED, &desc->flags) ||
1086 test_bit(FLAG_USED_AS_IRQ, &desc->flags) ||
1087 test_bit(FLAG_EXPORT, &desc->flags) ||
472a61e7
SW
1088 test_bit(FLAG_SYSFS, &desc->flags) ||
1089 !pinctrl_gpio_can_use_line(chip->base + lineinfo.line_offset))
521a2ad6 1090 lineinfo.flags |= GPIOLINE_FLAG_KERNEL;
9d8cc89c 1091 if (test_bit(FLAG_IS_OUT, &desc->flags))
521a2ad6 1092 lineinfo.flags |= GPIOLINE_FLAG_IS_OUT;
9d8cc89c 1093 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
521a2ad6 1094 lineinfo.flags |= GPIOLINE_FLAG_ACTIVE_LOW;
9d8cc89c 1095 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
2c60e6b5
BG
1096 lineinfo.flags |= (GPIOLINE_FLAG_OPEN_DRAIN |
1097 GPIOLINE_FLAG_IS_OUT);
9d8cc89c 1098 if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
2c60e6b5
BG
1099 lineinfo.flags |= (GPIOLINE_FLAG_OPEN_SOURCE |
1100 GPIOLINE_FLAG_IS_OUT);
8c550e94
DF
1101 if (test_bit(FLAG_PULL_DOWN, &desc->flags))
1102 lineinfo.flags |= GPIOLINE_FLAG_PULL_DOWN;
1103 if (test_bit(FLAG_PULL_UP, &desc->flags))
1104 lineinfo.flags |= GPIOLINE_FLAG_PULL_UP;
521a2ad6
LW
1105
1106 if (copy_to_user(ip, &lineinfo, sizeof(lineinfo)))
1107 return -EFAULT;
1108 return 0;
d7c51b47
LW
1109 } else if (cmd == GPIO_GET_LINEHANDLE_IOCTL) {
1110 return linehandle_create(gdev, ip);
61f922db
LW
1111 } else if (cmd == GPIO_GET_LINEEVENT_IOCTL) {
1112 return lineevent_create(gdev, ip);
3c702e99
LW
1113 }
1114 return -EINVAL;
1115}
1116
8b92e17e
LW
1117#ifdef CONFIG_COMPAT
1118static long gpio_ioctl_compat(struct file *filp, unsigned int cmd,
1119 unsigned long arg)
1120{
1121 return gpio_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
1122}
1123#endif
1124
3c702e99
LW
1125/**
1126 * gpio_chrdev_open() - open the chardev for ioctl operations
1127 * @inode: inode for this chardev
1128 * @filp: file struct for storing private data
1129 * Returns 0 on success
1130 */
1131static int gpio_chrdev_open(struct inode *inode, struct file *filp)
1132{
1133 struct gpio_device *gdev = container_of(inode->i_cdev,
1134 struct gpio_device, chrdev);
1135
1136 /* Fail on open if the backing gpiochip is gone */
fb505747 1137 if (!gdev->chip)
3c702e99
LW
1138 return -ENODEV;
1139 get_device(&gdev->dev);
1140 filp->private_data = gdev;
f4e81c52
LPC
1141
1142 return nonseekable_open(inode, filp);
3c702e99
LW
1143}
1144
1145/**
1146 * gpio_chrdev_release() - close chardev after ioctl operations
1147 * @inode: inode for this chardev
1148 * @filp: file struct for storing private data
1149 * Returns 0 on success
1150 */
1151static int gpio_chrdev_release(struct inode *inode, struct file *filp)
1152{
1153 struct gpio_device *gdev = container_of(inode->i_cdev,
1154 struct gpio_device, chrdev);
1155
3c702e99
LW
1156 put_device(&gdev->dev);
1157 return 0;
1158}
1159
1160
1161static const struct file_operations gpio_fileops = {
1162 .release = gpio_chrdev_release,
1163 .open = gpio_chrdev_open,
1164 .owner = THIS_MODULE,
f4e81c52 1165 .llseek = no_llseek,
3c702e99 1166 .unlocked_ioctl = gpio_ioctl,
8b92e17e
LW
1167#ifdef CONFIG_COMPAT
1168 .compat_ioctl = gpio_ioctl_compat,
1169#endif
3c702e99
LW
1170};
1171
ff2b1359
LW
1172static void gpiodevice_release(struct device *dev)
1173{
1174 struct gpio_device *gdev = dev_get_drvdata(dev);
1175
1176 list_del(&gdev->list);
1177 ida_simple_remove(&gpio_ida, gdev->id);
fcf273e5 1178 kfree_const(gdev->label);
476e2fc5 1179 kfree(gdev->descs);
9efd9e69 1180 kfree(gdev);
ff2b1359
LW
1181}
1182
159f3cd9
GR
1183static int gpiochip_setup_dev(struct gpio_device *gdev)
1184{
d377f56f 1185 int ret;
159f3cd9
GR
1186
1187 cdev_init(&gdev->chrdev, &gpio_fileops);
1188 gdev->chrdev.owner = THIS_MODULE;
159f3cd9 1189 gdev->dev.devt = MKDEV(MAJOR(gpio_devt), gdev->id);
111379dc 1190
d377f56f
LW
1191 ret = cdev_device_add(&gdev->chrdev, &gdev->dev);
1192 if (ret)
1193 return ret;
111379dc
LG
1194
1195 chip_dbg(gdev->chip, "added GPIO chardev (%d:%d)\n",
1196 MAJOR(gpio_devt), gdev->id);
159f3cd9 1197
d377f56f
LW
1198 ret = gpiochip_sysfs_register(gdev);
1199 if (ret)
159f3cd9
GR
1200 goto err_remove_device;
1201
1202 /* From this point, the .release() function cleans up gpio_device */
1203 gdev->dev.release = gpiodevice_release;
159f3cd9
GR
1204 pr_debug("%s: registered GPIOs %d to %d on device: %s (%s)\n",
1205 __func__, gdev->base, gdev->base + gdev->ngpio - 1,
1206 dev_name(&gdev->dev), gdev->chip->label ? : "generic");
1207
1208 return 0;
1209
1210err_remove_device:
111379dc 1211 cdev_device_del(&gdev->chrdev, &gdev->dev);
d377f56f 1212 return ret;
159f3cd9
GR
1213}
1214
a411e81e
BG
1215static void gpiochip_machine_hog(struct gpio_chip *chip, struct gpiod_hog *hog)
1216{
1217 struct gpio_desc *desc;
1218 int rv;
1219
1220 desc = gpiochip_get_desc(chip, hog->chip_hwnum);
1221 if (IS_ERR(desc)) {
1222 pr_err("%s: unable to get GPIO desc: %ld\n",
1223 __func__, PTR_ERR(desc));
1224 return;
1225 }
1226
ba3efdff 1227 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
a411e81e
BG
1228 return;
1229
1230 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
1231 if (rv)
1232 pr_err("%s: unable to hog GPIO line (%s:%u): %d\n",
1233 __func__, chip->label, hog->chip_hwnum, rv);
1234}
1235
1236static void machine_gpiochip_add(struct gpio_chip *chip)
1237{
1238 struct gpiod_hog *hog;
1239
1240 mutex_lock(&gpio_machine_hogs_mutex);
1241
1242 list_for_each_entry(hog, &gpio_machine_hogs, list) {
1243 if (!strcmp(chip->label, hog->chip_label))
1244 gpiochip_machine_hog(chip, hog);
1245 }
1246
1247 mutex_unlock(&gpio_machine_hogs_mutex);
1248}
1249
159f3cd9
GR
1250static void gpiochip_setup_devs(void)
1251{
1252 struct gpio_device *gdev;
d377f56f 1253 int ret;
159f3cd9
GR
1254
1255 list_for_each_entry(gdev, &gpio_devices, list) {
d377f56f
LW
1256 ret = gpiochip_setup_dev(gdev);
1257 if (ret)
159f3cd9 1258 pr_err("%s: Failed to initialize gpio device (%d)\n",
d377f56f 1259 dev_name(&gdev->dev), ret);
159f3cd9
GR
1260 }
1261}
1262
959bc7b2 1263int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data,
39c3fd58
AL
1264 struct lock_class_key *lock_key,
1265 struct lock_class_key *request_key)
d2876d08
DB
1266{
1267 unsigned long flags;
d377f56f 1268 int ret = 0;
ff2b1359 1269 unsigned i;
8d0aab2f 1270 int base = chip->base;
ff2b1359 1271 struct gpio_device *gdev;
d2876d08 1272
ff2b1359
LW
1273 /*
1274 * First: allocate and populate the internal stat container, and
1275 * set up the struct device.
1276 */
969f07b4 1277 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
ff2b1359 1278 if (!gdev)
14e85c0e 1279 return -ENOMEM;
3c702e99 1280 gdev->dev.bus = &gpio_bus_type;
ff2b1359
LW
1281 gdev->chip = chip;
1282 chip->gpiodev = gdev;
1283 if (chip->parent) {
1284 gdev->dev.parent = chip->parent;
1285 gdev->dev.of_node = chip->parent->of_node;
acc6e331
TR
1286 }
1287
ff2b1359
LW
1288#ifdef CONFIG_OF_GPIO
1289 /* If the gpiochip has an assigned OF node this takes precedence */
acc6e331
TR
1290 if (chip->of_node)
1291 gdev->dev.of_node = chip->of_node;
6ff04974
BD
1292 else
1293 chip->of_node = gdev->dev.of_node;
ff2b1359 1294#endif
acc6e331 1295
ff2b1359
LW
1296 gdev->id = ida_simple_get(&gpio_ida, 0, 0, GFP_KERNEL);
1297 if (gdev->id < 0) {
d377f56f 1298 ret = gdev->id;
ff2b1359
LW
1299 goto err_free_gdev;
1300 }
1301 dev_set_name(&gdev->dev, "gpiochip%d", gdev->id);
1302 device_initialize(&gdev->dev);
1303 dev_set_drvdata(&gdev->dev, gdev);
1304 if (chip->parent && chip->parent->driver)
1305 gdev->owner = chip->parent->driver->owner;
1306 else if (chip->owner)
1307 /* TODO: remove chip->owner */
1308 gdev->owner = chip->owner;
1309 else
1310 gdev->owner = THIS_MODULE;
d2876d08 1311
476e2fc5 1312 gdev->descs = kcalloc(chip->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL);
1c3cdb18 1313 if (!gdev->descs) {
d377f56f 1314 ret = -ENOMEM;
a05a1404 1315 goto err_free_ida;
ff2b1359
LW
1316 }
1317
5ed41cc4
BJZ
1318 if (chip->ngpio == 0) {
1319 chip_err(chip, "tried to insert a GPIO chip with zero lines\n");
d377f56f 1320 ret = -EINVAL;
159f3cd9 1321 goto err_free_descs;
5ed41cc4 1322 }
df4878e9 1323
3027743f
LA
1324 if (chip->ngpio > FASTPATH_NGPIO)
1325 chip_warn(chip, "line cnt %u is greater than fast path cnt %u\n",
1326 chip->ngpio, FASTPATH_NGPIO);
1327
fcf273e5 1328 gdev->label = kstrdup_const(chip->label ?: "unknown", GFP_KERNEL);
df4878e9 1329 if (!gdev->label) {
d377f56f 1330 ret = -ENOMEM;
476e2fc5 1331 goto err_free_descs;
df4878e9
LW
1332 }
1333
fdeb8e15 1334 gdev->ngpio = chip->ngpio;
43c54eca 1335 gdev->data = data;
5ed41cc4 1336
d2876d08
DB
1337 spin_lock_irqsave(&gpio_lock, flags);
1338
fdeb8e15
LW
1339 /*
1340 * TODO: this allocates a Linux GPIO number base in the global
1341 * GPIO numberspace for this chip. In the long run we want to
1342 * get *rid* of this numberspace and use only descriptors, but
1343 * it may be a pipe dream. It will not happen before we get rid
1344 * of the sysfs interface anyways.
1345 */
8d0aab2f
AV
1346 if (base < 0) {
1347 base = gpiochip_find_base(chip->ngpio);
1348 if (base < 0) {
d377f56f 1349 ret = base;
225fce83 1350 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1351 goto err_free_label;
8d0aab2f 1352 }
fdeb8e15
LW
1353 /*
1354 * TODO: it should not be necessary to reflect the assigned
1355 * base outside of the GPIO subsystem. Go over drivers and
1356 * see if anyone makes use of this, else drop this and assign
1357 * a poison instead.
1358 */
8d0aab2f
AV
1359 chip->base = base;
1360 }
fdeb8e15 1361 gdev->base = base;
8d0aab2f 1362
d377f56f
LW
1363 ret = gpiodev_add_to_list(gdev);
1364 if (ret) {
05aa5203 1365 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1366 goto err_free_label;
05aa5203 1367 }
1a989d0f 1368
545ebd9a
LW
1369 spin_unlock_irqrestore(&gpio_lock, flags);
1370
767cd17a
RRD
1371 for (i = 0; i < chip->ngpio; i++)
1372 gdev->descs[i].gdev = gdev;
14e85c0e 1373
f23f1516 1374#ifdef CONFIG_PINCTRL
20ec3e39 1375 INIT_LIST_HEAD(&gdev->pin_ranges);
f23f1516
SH
1376#endif
1377
d377f56f
LW
1378 ret = gpiochip_set_desc_names(chip);
1379 if (ret)
5f3ca732
MP
1380 goto err_remove_from_list;
1381
d377f56f
LW
1382 ret = gpiochip_alloc_valid_mask(chip);
1383 if (ret)
48057ed1 1384 goto err_remove_from_list;
e0d89728 1385
d377f56f
LW
1386 ret = of_gpiochip_add(chip);
1387 if (ret)
48057ed1 1388 goto err_free_gpiochip_mask;
28355f81 1389
d377f56f
LW
1390 ret = gpiochip_init_valid_mask(chip);
1391 if (ret)
35779890 1392 goto err_remove_of_chip;
f8ec92a9 1393
3edfb7bd
RRD
1394 for (i = 0; i < chip->ngpio; i++) {
1395 struct gpio_desc *desc = &gdev->descs[i];
1396
d95da993
CP
1397 if (chip->get_direction && gpiochip_line_is_valid(chip, i)) {
1398 if (!chip->get_direction(chip, i))
1399 set_bit(FLAG_IS_OUT, &desc->flags);
1400 else
1401 clear_bit(FLAG_IS_OUT, &desc->flags);
1402 } else {
1403 if (!chip->direction_input)
1404 set_bit(FLAG_IS_OUT, &desc->flags);
1405 else
1406 clear_bit(FLAG_IS_OUT, &desc->flags);
1407 }
3edfb7bd
RRD
1408 }
1409
664e3e5a 1410 acpi_gpiochip_add(chip);
391c970c 1411
a411e81e
BG
1412 machine_gpiochip_add(chip);
1413
9411e3aa
AS
1414 ret = gpiochip_irqchip_init_hw(chip);
1415 if (ret)
1416 goto err_remove_acpi_chip;
1417
fbdf8d4b
LW
1418 ret = gpiochip_irqchip_init_valid_mask(chip);
1419 if (ret)
48057ed1
LW
1420 goto err_remove_acpi_chip;
1421
fbdf8d4b
LW
1422 ret = gpiochip_add_irqchip(chip, lock_key, request_key);
1423 if (ret)
48057ed1
LW
1424 goto err_remove_irqchip_mask;
1425
3c702e99
LW
1426 /*
1427 * By first adding the chardev, and then adding the device,
1428 * we get a device node entry in sysfs under
1429 * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
1430 * coldplug of device nodes and other udev business.
159f3cd9
GR
1431 * We can do this only if gpiolib has been initialized.
1432 * Otherwise, defer until later.
3c702e99 1433 */
159f3cd9 1434 if (gpiolib_initialized) {
d377f56f
LW
1435 ret = gpiochip_setup_dev(gdev);
1436 if (ret)
48057ed1 1437 goto err_remove_irqchip;
159f3cd9 1438 }
cedb1881 1439 return 0;
3bae4811 1440
48057ed1
LW
1441err_remove_irqchip:
1442 gpiochip_irqchip_remove(chip);
1443err_remove_irqchip_mask:
1444 gpiochip_irqchip_free_valid_mask(chip);
35779890 1445err_remove_acpi_chip:
225fce83 1446 acpi_gpiochip_remove(chip);
35779890 1447err_remove_of_chip:
6d86750c 1448 gpiochip_free_hogs(chip);
225fce83 1449 of_gpiochip_remove(chip);
35779890 1450err_free_gpiochip_mask:
726cb3ba 1451 gpiochip_free_valid_mask(chip);
5f3ca732 1452err_remove_from_list:
225fce83 1453 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1454 list_del(&gdev->list);
3bae4811 1455 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1456err_free_label:
fcf273e5 1457 kfree_const(gdev->label);
476e2fc5
GR
1458err_free_descs:
1459 kfree(gdev->descs);
a05a1404 1460err_free_ida:
ff2b1359 1461 ida_simple_remove(&gpio_ida, gdev->id);
a05a1404 1462err_free_gdev:
d2876d08 1463 /* failures here can mean systems won't boot... */
1777fc97 1464 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
fdeb8e15 1465 gdev->base, gdev->base + gdev->ngpio - 1,
d377f56f 1466 chip->label ? : "generic", ret);
fdeb8e15 1467 kfree(gdev);
d377f56f 1468 return ret;
d2876d08 1469}
959bc7b2 1470EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
d2876d08 1471
43c54eca
LW
1472/**
1473 * gpiochip_get_data() - get per-subdriver data for the chip
950d55f5
TR
1474 * @chip: GPIO chip
1475 *
1476 * Returns:
1477 * The per-subdriver data for the chip.
43c54eca
LW
1478 */
1479void *gpiochip_get_data(struct gpio_chip *chip)
1480{
1481 return chip->gpiodev->data;
1482}
1483EXPORT_SYMBOL_GPL(gpiochip_get_data);
1484
d2876d08
DB
1485/**
1486 * gpiochip_remove() - unregister a gpio_chip
1487 * @chip: the chip to unregister
1488 *
1489 * A gpio_chip with any GPIOs still requested may not be removed.
1490 */
e1db1706 1491void gpiochip_remove(struct gpio_chip *chip)
d2876d08 1492{
ff2b1359 1493 struct gpio_device *gdev = chip->gpiodev;
fab28b89 1494 struct gpio_desc *desc;
d2876d08 1495 unsigned long flags;
1c3cdb18 1496 unsigned i;
fab28b89 1497 bool requested = false;
d2876d08 1498
ff2b1359 1499 /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
afbc4f31 1500 gpiochip_sysfs_unregister(gdev);
5018ada6 1501 gpiochip_free_hogs(chip);
bd203bd5
BJZ
1502 /* Numb the device, cancelling all outstanding operations */
1503 gdev->chip = NULL;
00acc3dc 1504 gpiochip_irqchip_remove(chip);
6072b9dc 1505 acpi_gpiochip_remove(chip);
9ef0d6f7 1506 gpiochip_remove_pin_ranges(chip);
391c970c 1507 of_gpiochip_remove(chip);
726cb3ba 1508 gpiochip_free_valid_mask(chip);
43c54eca
LW
1509 /*
1510 * We accept no more calls into the driver from this point, so
1511 * NULL the driver data pointer
1512 */
1513 gdev->data = NULL;
391c970c 1514
6798acaa 1515 spin_lock_irqsave(&gpio_lock, flags);
fdeb8e15 1516 for (i = 0; i < gdev->ngpio; i++) {
1c3cdb18 1517 desc = &gdev->descs[i];
fab28b89
JH
1518 if (test_bit(FLAG_REQUESTED, &desc->flags))
1519 requested = true;
d2876d08 1520 }
d2876d08 1521 spin_unlock_irqrestore(&gpio_lock, flags);
14e85c0e 1522
fab28b89 1523 if (requested)
fdeb8e15 1524 dev_crit(&gdev->dev,
58383c78 1525 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
fab28b89 1526
ff2b1359
LW
1527 /*
1528 * The gpiochip side puts its use of the device to rest here:
1529 * if there are no userspace clients, the chardev and device will
1530 * be removed, else it will be dangling until the last user is
1531 * gone.
1532 */
111379dc 1533 cdev_device_del(&gdev->chrdev, &gdev->dev);
ff2b1359 1534 put_device(&gdev->dev);
d2876d08
DB
1535}
1536EXPORT_SYMBOL_GPL(gpiochip_remove);
1537
0cf3292c
LD
1538static void devm_gpio_chip_release(struct device *dev, void *res)
1539{
1540 struct gpio_chip *chip = *(struct gpio_chip **)res;
1541
1542 gpiochip_remove(chip);
1543}
1544
0cf3292c 1545/**
689fd02e 1546 * devm_gpiochip_add_data() - Resource manager gpiochip_add_data()
3925b90f 1547 * @dev: pointer to the device that gpio_chip belongs to.
0cf3292c 1548 * @chip: the chip to register, with chip->base initialized
950d55f5 1549 * @data: driver-private data associated with this chip
0cf3292c 1550 *
950d55f5 1551 * Context: potentially before irqs will work
0cf3292c
LD
1552 *
1553 * The gpio chip automatically be released when the device is unbound.
950d55f5
TR
1554 *
1555 * Returns:
1556 * A negative errno if the chip can't be registered, such as because the
1557 * chip->base is invalid or already associated with a different chip.
1558 * Otherwise it returns zero as a success code.
0cf3292c
LD
1559 */
1560int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip,
1561 void *data)
1562{
1563 struct gpio_chip **ptr;
1564 int ret;
1565
1566 ptr = devres_alloc(devm_gpio_chip_release, sizeof(*ptr),
1567 GFP_KERNEL);
1568 if (!ptr)
1569 return -ENOMEM;
1570
1571 ret = gpiochip_add_data(chip, data);
1572 if (ret < 0) {
1573 devres_free(ptr);
1574 return ret;
1575 }
1576
1577 *ptr = chip;
1578 devres_add(dev, ptr);
1579
1580 return 0;
1581}
1582EXPORT_SYMBOL_GPL(devm_gpiochip_add_data);
1583
594fa265
GL
1584/**
1585 * gpiochip_find() - iterator for locating a specific gpio_chip
1586 * @data: data to pass to match function
950d55f5 1587 * @match: Callback function to check gpio_chip
594fa265
GL
1588 *
1589 * Similar to bus_find_device. It returns a reference to a gpio_chip as
1590 * determined by a user supplied @match callback. The callback should return
1591 * 0 if the device doesn't match and non-zero if it does. If the callback is
1592 * non-zero, this function will return to the caller and not iterate over any
1593 * more gpio_chips.
1594 */
07ce8ec7 1595struct gpio_chip *gpiochip_find(void *data,
6e2cf651 1596 int (*match)(struct gpio_chip *chip,
3d0f7cf0 1597 void *data))
594fa265 1598{
ff2b1359 1599 struct gpio_device *gdev;
acf06ff7 1600 struct gpio_chip *chip = NULL;
594fa265 1601 unsigned long flags;
594fa265
GL
1602
1603 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1604 list_for_each_entry(gdev, &gpio_devices, list)
acf06ff7
MY
1605 if (gdev->chip && match(gdev->chip, data)) {
1606 chip = gdev->chip;
594fa265 1607 break;
acf06ff7 1608 }
ff2b1359 1609
594fa265
GL
1610 spin_unlock_irqrestore(&gpio_lock, flags);
1611
1612 return chip;
1613}
8fa0c9bf 1614EXPORT_SYMBOL_GPL(gpiochip_find);
d2876d08 1615
79697ef9
AC
1616static int gpiochip_match_name(struct gpio_chip *chip, void *data)
1617{
1618 const char *name = data;
1619
1620 return !strcmp(chip->label, name);
1621}
1622
1623static struct gpio_chip *find_chip_by_name(const char *name)
1624{
1625 return gpiochip_find((void *)name, gpiochip_match_name);
1626}
1627
14250520
LW
1628#ifdef CONFIG_GPIOLIB_IRQCHIP
1629
1630/*
1631 * The following is irqchip helper code for gpiochips.
1632 */
1633
9411e3aa
AS
1634static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
1635{
1636 struct gpio_irq_chip *girq = &gc->irq;
1637
1638 if (!girq->init_hw)
1639 return 0;
1640
1641 return girq->init_hw(gc);
1642}
1643
5fbe5b58 1644static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb 1645{
5fbe5b58
LW
1646 struct gpio_irq_chip *girq = &gc->irq;
1647
1648 if (!girq->init_valid_mask)
79b804cb
MW
1649 return 0;
1650
5fbe5b58
LW
1651 girq->valid_mask = gpiochip_allocate_mask(gc);
1652 if (!girq->valid_mask)
79b804cb
MW
1653 return -ENOMEM;
1654
5fbe5b58
LW
1655 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
1656
79b804cb
MW
1657 return 0;
1658}
1659
1660static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip)
1661{
7bdbd1ec 1662 bitmap_free(gpiochip->irq.valid_mask);
dc7b0387 1663 gpiochip->irq.valid_mask = NULL;
79b804cb
MW
1664}
1665
64ff2c8e
SB
1666bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gpiochip,
1667 unsigned int offset)
79b804cb 1668{
726cb3ba
SB
1669 if (!gpiochip_line_is_valid(gpiochip, offset))
1670 return false;
79b804cb 1671 /* No mask means all valid */
dc7b0387 1672 if (likely(!gpiochip->irq.valid_mask))
79b804cb 1673 return true;
dc7b0387 1674 return test_bit(offset, gpiochip->irq.valid_mask);
79b804cb 1675}
64ff2c8e 1676EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
79b804cb 1677
14250520 1678/**
d245b3f9 1679 * gpiochip_set_cascaded_irqchip() - connects a cascaded irqchip to a gpiochip
4892d3a6 1680 * @gc: the gpiochip to set the irqchip chain to
14250520
LW
1681 * @parent_irq: the irq number corresponding to the parent IRQ for this
1682 * chained irqchip
1683 * @parent_handler: the parent interrupt handler for the accumulated IRQ
3f97d5fc
LW
1684 * coming out of the gpiochip. If the interrupt is nested rather than
1685 * cascaded, pass NULL in this handler argument
14250520 1686 */
4892d3a6 1687static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gc,
6f79309a 1688 unsigned int parent_irq,
d245b3f9 1689 irq_flow_handler_t parent_handler)
14250520 1690{
4892d3a6
LW
1691 struct gpio_irq_chip *girq = &gc->irq;
1692 struct device *dev = &gc->gpiodev->dev;
1693
1694 if (!girq->domain) {
1695 chip_err(gc, "called %s before setting up irqchip\n",
83141a77 1696 __func__);
1c8732bb
LW
1697 return;
1698 }
1699
3f97d5fc 1700 if (parent_handler) {
4892d3a6
LW
1701 if (gc->can_sleep) {
1702 chip_err(gc,
b1911710 1703 "you cannot have chained interrupts on a chip that may sleep\n");
3f97d5fc
LW
1704 return;
1705 }
4892d3a6
LW
1706 girq->parents = devm_kcalloc(dev, 1,
1707 sizeof(*girq->parents),
1708 GFP_KERNEL);
1709 if (!girq->parents) {
1710 chip_err(gc, "out of memory allocating parent IRQ\n");
1711 return;
1712 }
1713 girq->parents[0] = parent_irq;
1714 girq->num_parents = 1;
3f97d5fc
LW
1715 /*
1716 * The parent irqchip is already using the chip_data for this
1717 * irqchip, so our callbacks simply use the handler_data.
1718 */
f7f87753 1719 irq_set_chained_handler_and_data(parent_irq, parent_handler,
4892d3a6 1720 gc);
3f97d5fc 1721 }
14250520 1722}
d245b3f9
LW
1723
1724/**
1725 * gpiochip_set_chained_irqchip() - connects a chained irqchip to a gpiochip
1726 * @gpiochip: the gpiochip to set the irqchip chain to
1727 * @irqchip: the irqchip to chain to the gpiochip
1728 * @parent_irq: the irq number corresponding to the parent IRQ for this
1729 * chained irqchip
1730 * @parent_handler: the parent interrupt handler for the accumulated IRQ
40f5ff4f 1731 * coming out of the gpiochip.
d245b3f9
LW
1732 */
1733void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
1734 struct irq_chip *irqchip,
6f79309a 1735 unsigned int parent_irq,
d245b3f9
LW
1736 irq_flow_handler_t parent_handler)
1737{
60ed54ca
TR
1738 if (gpiochip->irq.threaded) {
1739 chip_err(gpiochip, "tried to chain a threaded gpiochip\n");
1740 return;
1741 }
1742
3c1f6b2d 1743 gpiochip_set_cascaded_irqchip(gpiochip, parent_irq, parent_handler);
d245b3f9 1744}
14250520
LW
1745EXPORT_SYMBOL_GPL(gpiochip_set_chained_irqchip);
1746
d245b3f9
LW
1747/**
1748 * gpiochip_set_nested_irqchip() - connects a nested irqchip to a gpiochip
1749 * @gpiochip: the gpiochip to set the irqchip nested handler to
1750 * @irqchip: the irqchip to nest to the gpiochip
1751 * @parent_irq: the irq number corresponding to the parent IRQ for this
1752 * nested irqchip
1753 */
1754void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip,
1755 struct irq_chip *irqchip,
6f79309a 1756 unsigned int parent_irq)
d245b3f9 1757{
3c1f6b2d 1758 gpiochip_set_cascaded_irqchip(gpiochip, parent_irq, NULL);
d245b3f9
LW
1759}
1760EXPORT_SYMBOL_GPL(gpiochip_set_nested_irqchip);
1761
fdd61a01
LW
1762#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1763
1764/**
1765 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
1766 * to a gpiochip
1767 * @gc: the gpiochip to set the irqchip hierarchical handler to
1768 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
1769 * will then percolate up to the parent
1770 */
1771static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
1772 struct irq_chip *irqchip)
1773{
1774 /* DT will deal with mapping each IRQ as we go along */
1775 if (is_of_node(gc->irq.fwnode))
1776 return;
1777
1778 /*
1779 * This is for legacy and boardfile "irqchip" fwnodes: allocate
1780 * irqs upfront instead of dynamically since we don't have the
1781 * dynamic type of allocation that hardware description languages
1782 * provide. Once all GPIO drivers using board files are gone from
1783 * the kernel we can delete this code, but for a transitional period
1784 * it is necessary to keep this around.
1785 */
1786 if (is_fwnode_irqchip(gc->irq.fwnode)) {
1787 int i;
1788 int ret;
1789
1790 for (i = 0; i < gc->ngpio; i++) {
1791 struct irq_fwspec fwspec;
1792 unsigned int parent_hwirq;
1793 unsigned int parent_type;
1794 struct gpio_irq_chip *girq = &gc->irq;
1795
1796 /*
1797 * We call the child to parent translation function
1798 * only to check if the child IRQ is valid or not.
1799 * Just pick the rising edge type here as that is what
1800 * we likely need to support.
1801 */
1802 ret = girq->child_to_parent_hwirq(gc, i,
1803 IRQ_TYPE_EDGE_RISING,
1804 &parent_hwirq,
1805 &parent_type);
1806 if (ret) {
1807 chip_err(gc, "skip set-up on hwirq %d\n",
1808 i);
1809 continue;
1810 }
1811
1812 fwspec.fwnode = gc->irq.fwnode;
1813 /* This is the hwirq for the GPIO line side of things */
1814 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
1815 /* Just pick something */
1816 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
1817 fwspec.param_count = 2;
1818 ret = __irq_domain_alloc_irqs(gc->irq.domain,
1819 /* just pick something */
1820 -1,
1821 1,
1822 NUMA_NO_NODE,
1823 &fwspec,
1824 false,
1825 NULL);
1826 if (ret < 0) {
1827 chip_err(gc,
1828 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1829 i, parent_hwirq,
1830 ret);
1831 }
1832 }
1833 }
1834
1835 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1836
1837 return;
1838}
1839
1840static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1841 struct irq_fwspec *fwspec,
1842 unsigned long *hwirq,
1843 unsigned int *type)
1844{
1845 /* We support standard DT translation */
1846 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1847 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1848 }
1849
1850 /* This is for board files and others not using DT */
1851 if (is_fwnode_irqchip(fwspec->fwnode)) {
1852 int ret;
1853
1854 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1855 if (ret)
1856 return ret;
1857 WARN_ON(*type == IRQ_TYPE_NONE);
1858 return 0;
1859 }
1860 return -EINVAL;
1861}
1862
1863static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1864 unsigned int irq,
1865 unsigned int nr_irqs,
1866 void *data)
1867{
1868 struct gpio_chip *gc = d->host_data;
1869 irq_hw_number_t hwirq;
1870 unsigned int type = IRQ_TYPE_NONE;
1871 struct irq_fwspec *fwspec = data;
1872 struct irq_fwspec parent_fwspec;
1873 unsigned int parent_hwirq;
1874 unsigned int parent_type;
1875 struct gpio_irq_chip *girq = &gc->irq;
1876 int ret;
1877
1878 /*
1879 * The nr_irqs parameter is always one except for PCI multi-MSI
1880 * so this should not happen.
1881 */
1882 WARN_ON(nr_irqs != 1);
1883
1884 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
1885 if (ret)
1886 return ret;
1887
1888 chip_info(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
1889
1890 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
1891 &parent_hwirq, &parent_type);
1892 if (ret) {
1893 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
1894 return ret;
1895 }
1896 chip_info(gc, "found parent hwirq %u\n", parent_hwirq);
1897
1898 /*
1899 * We set handle_bad_irq because the .set_type() should
1900 * always be invoked and set the right type of handler.
1901 */
1902 irq_domain_set_info(d,
1903 irq,
1904 hwirq,
1905 gc->irq.chip,
1906 gc,
1907 girq->handler,
1908 NULL, NULL);
1909 irq_set_probe(irq);
1910
1911 /*
1912 * Create a IRQ fwspec to send up to the parent irqdomain:
1913 * specify the hwirq we address on the parent and tie it
1914 * all together up the chain.
1915 */
1916 parent_fwspec.fwnode = d->parent->fwnode;
1917 /* This parent only handles asserted level IRQs */
1918 girq->populate_parent_fwspec(gc, &parent_fwspec, parent_hwirq,
1919 parent_type);
1920 chip_info(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
1921 irq, parent_hwirq);
1922 ret = irq_domain_alloc_irqs_parent(d, irq, 1, &parent_fwspec);
1923 if (ret)
1924 chip_err(gc,
1925 "failed to allocate parent hwirq %d for hwirq %lu\n",
1926 parent_hwirq, hwirq);
1927
1928 return ret;
1929}
1930
1931static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *chip,
1932 unsigned int offset)
1933{
1934 return offset;
1935}
1936
1937static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
1938{
1939 ops->activate = gpiochip_irq_domain_activate;
1940 ops->deactivate = gpiochip_irq_domain_deactivate;
1941 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
1942 ops->free = irq_domain_free_irqs_common;
1943
1944 /*
1945 * We only allow overriding the translate() function for
1946 * hierarchical chips, and this should only be done if the user
1947 * really need something other than 1:1 translation.
1948 */
1949 if (!ops->translate)
1950 ops->translate = gpiochip_hierarchy_irq_domain_translate;
1951}
1952
1953static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1954{
1955 if (!gc->irq.child_to_parent_hwirq ||
1956 !gc->irq.fwnode) {
1957 chip_err(gc, "missing irqdomain vital data\n");
1958 return -EINVAL;
1959 }
1960
1961 if (!gc->irq.child_offset_to_irq)
1962 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
1963
1964 if (!gc->irq.populate_parent_fwspec)
1965 gc->irq.populate_parent_fwspec =
1966 gpiochip_populate_parent_fwspec_twocell;
1967
1968 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
1969
1970 gc->irq.domain = irq_domain_create_hierarchy(
1971 gc->irq.parent_domain,
1972 0,
1973 gc->ngpio,
1974 gc->irq.fwnode,
1975 &gc->irq.child_irq_domain_ops,
1976 gc);
1977
1978 if (!gc->irq.domain)
1979 return -ENOMEM;
1980
1981 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
1982
1983 return 0;
1984}
1985
1986static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1987{
1988 return !!gc->irq.parent_domain;
1989}
1990
1991void gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *chip,
1992 struct irq_fwspec *fwspec,
1993 unsigned int parent_hwirq,
1994 unsigned int parent_type)
1995{
1996 fwspec->param_count = 2;
1997 fwspec->param[0] = parent_hwirq;
1998 fwspec->param[1] = parent_type;
1999}
2000EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
2001
2002void gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *chip,
2003 struct irq_fwspec *fwspec,
2004 unsigned int parent_hwirq,
2005 unsigned int parent_type)
2006{
2007 fwspec->param_count = 4;
2008 fwspec->param[0] = 0;
2009 fwspec->param[1] = parent_hwirq;
2010 fwspec->param[2] = 0;
2011 fwspec->param[3] = parent_type;
2012}
2013EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
2014
2015#else
2016
2017static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
2018{
2019 return -EINVAL;
2020}
2021
2022static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
2023{
2024 return false;
2025}
2026
2027#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
2028
14250520
LW
2029/**
2030 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
2031 * @d: the irqdomain used by this irqchip
2032 * @irq: the global irq number used by this GPIO irqchip irq
2033 * @hwirq: the local IRQ/GPIO line offset on this gpiochip
2034 *
2035 * This function will set up the mapping for a certain IRQ line on a
2036 * gpiochip by assigning the gpiochip as chip data, and using the irqchip
2037 * stored inside the gpiochip.
2038 */
1b95b4eb
TR
2039int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
2040 irq_hw_number_t hwirq)
14250520
LW
2041{
2042 struct gpio_chip *chip = d->host_data;
d377f56f 2043 int ret = 0;
14250520 2044
dc749a09
GS
2045 if (!gpiochip_irqchip_irq_valid(chip, hwirq))
2046 return -ENXIO;
2047
14250520 2048 irq_set_chip_data(irq, chip);
a0a8bcf4
GS
2049 /*
2050 * This lock class tells lockdep that GPIO irqs are in a different
2051 * category than their parents, so it won't report false recursion.
2052 */
39c3fd58 2053 irq_set_lockdep_class(irq, chip->irq.lock_key, chip->irq.request_key);
c7a0aa59 2054 irq_set_chip_and_handler(irq, chip->irq.chip, chip->irq.handler);
d245b3f9 2055 /* Chips that use nested thread handlers have them marked */
60ed54ca 2056 if (chip->irq.threaded)
1c8732bb 2057 irq_set_nested_thread(irq, 1);
14250520 2058 irq_set_noprobe(irq);
23393d49 2059
e0d89728 2060 if (chip->irq.num_parents == 1)
d377f56f 2061 ret = irq_set_parent(irq, chip->irq.parents[0]);
e0d89728 2062 else if (chip->irq.map)
d377f56f 2063 ret = irq_set_parent(irq, chip->irq.map[hwirq]);
e0d89728 2064
d377f56f
LW
2065 if (ret < 0)
2066 return ret;
e0d89728 2067
1333b90f
LW
2068 /*
2069 * No set-up of the hardware will happen if IRQ_TYPE_NONE
2070 * is passed as default type.
2071 */
3634eeb0
TR
2072 if (chip->irq.default_type != IRQ_TYPE_NONE)
2073 irq_set_irq_type(irq, chip->irq.default_type);
14250520
LW
2074
2075 return 0;
2076}
1b95b4eb 2077EXPORT_SYMBOL_GPL(gpiochip_irq_map);
14250520 2078
1b95b4eb 2079void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
c3626fde 2080{
1c8732bb
LW
2081 struct gpio_chip *chip = d->host_data;
2082
60ed54ca 2083 if (chip->irq.threaded)
1c8732bb 2084 irq_set_nested_thread(irq, 0);
c3626fde
LW
2085 irq_set_chip_and_handler(irq, NULL, NULL);
2086 irq_set_chip_data(irq, NULL);
2087}
1b95b4eb 2088EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
c3626fde 2089
14250520
LW
2090static const struct irq_domain_ops gpiochip_domain_ops = {
2091 .map = gpiochip_irq_map,
c3626fde 2092 .unmap = gpiochip_irq_unmap,
14250520
LW
2093 /* Virtually all GPIO irqchips are twocell:ed */
2094 .xlate = irq_domain_xlate_twocell,
2095};
2096
fdd61a01
LW
2097/*
2098 * TODO: move these activate/deactivate in under the hierarchicial
2099 * irqchip implementation as static once SPMI and SSBI (all external
2100 * users) are phased over.
2101 */
ef74f70e
BM
2102/**
2103 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
2104 * @domain: The IRQ domain used by this IRQ chip
2105 * @data: Outermost irq_data associated with the IRQ
2106 * @reserve: If set, only reserve an interrupt vector instead of assigning one
2107 *
2108 * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
2109 * used as the activate function for the &struct irq_domain_ops. The host_data
2110 * for the IRQ domain must be the &struct gpio_chip.
2111 */
2112int gpiochip_irq_domain_activate(struct irq_domain *domain,
2113 struct irq_data *data, bool reserve)
2114{
2115 struct gpio_chip *chip = domain->host_data;
2116
2117 return gpiochip_lock_as_irq(chip, data->hwirq);
2118}
2119EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
2120
2121/**
2122 * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
2123 * @domain: The IRQ domain used by this IRQ chip
2124 * @data: Outermost irq_data associated with the IRQ
2125 *
2126 * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
2127 * be used as the deactivate function for the &struct irq_domain_ops. The
2128 * host_data for the IRQ domain must be the &struct gpio_chip.
2129 */
2130void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
2131 struct irq_data *data)
2132{
2133 struct gpio_chip *chip = domain->host_data;
2134
2135 return gpiochip_unlock_as_irq(chip, data->hwirq);
2136}
2137EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
2138
4e6b8238 2139static int gpiochip_to_irq(struct gpio_chip *chip, unsigned offset)
14250520 2140{
fdd61a01
LW
2141 struct irq_domain *domain = chip->irq.domain;
2142
4e6b8238
HV
2143 if (!gpiochip_irqchip_irq_valid(chip, offset))
2144 return -ENXIO;
5b76e79c 2145
fdd61a01
LW
2146#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2147 if (irq_domain_is_hierarchy(domain)) {
2148 struct irq_fwspec spec;
2149
2150 spec.fwnode = domain->fwnode;
2151 spec.param_count = 2;
2152 spec.param[0] = chip->irq.child_offset_to_irq(chip, offset);
2153 spec.param[1] = IRQ_TYPE_NONE;
2154
2155 return irq_create_fwspec_mapping(&spec);
2156 }
2157#endif
2158
2159 return irq_create_mapping(domain, offset);
14250520
LW
2160}
2161
14250520
LW
2162static int gpiochip_irq_reqres(struct irq_data *d)
2163{
2164 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
5b76e79c 2165
4e6b8238 2166 return gpiochip_reqres_irq(chip, d->hwirq);
14250520
LW
2167}
2168
2169static void gpiochip_irq_relres(struct irq_data *d)
2170{
2171 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
2172
4e6b8238 2173 gpiochip_relres_irq(chip, d->hwirq);
14250520
LW
2174}
2175
461c1a7d 2176static void gpiochip_irq_enable(struct irq_data *d)
14250520 2177{
461c1a7d 2178 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
e0d89728 2179
461c1a7d
HV
2180 gpiochip_enable_irq(chip, d->hwirq);
2181 if (chip->irq.irq_enable)
2182 chip->irq.irq_enable(d);
2183 else
2184 chip->irq.chip->irq_unmask(d);
2185}
2186
2187static void gpiochip_irq_disable(struct irq_data *d)
2188{
2189 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
2190
2191 if (chip->irq.irq_disable)
2192 chip->irq.irq_disable(d);
2193 else
2194 chip->irq.chip->irq_mask(d);
2195 gpiochip_disable_irq(chip, d->hwirq);
2196}
2197
ca620f2d
HV
2198static void gpiochip_set_irq_hooks(struct gpio_chip *gpiochip)
2199{
2200 struct irq_chip *irqchip = gpiochip->irq.chip;
2201
2202 if (!irqchip->irq_request_resources &&
2203 !irqchip->irq_release_resources) {
2204 irqchip->irq_request_resources = gpiochip_irq_reqres;
2205 irqchip->irq_release_resources = gpiochip_irq_relres;
2206 }
461c1a7d
HV
2207 if (WARN_ON(gpiochip->irq.irq_enable))
2208 return;
171948ea
HV
2209 /* Check if the irqchip already has this hook... */
2210 if (irqchip->irq_enable == gpiochip_irq_enable) {
2211 /*
2212 * ...and if so, give a gentle warning that this is bad
2213 * practice.
2214 */
2215 chip_info(gpiochip,
2216 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
2217 return;
2218 }
461c1a7d
HV
2219 gpiochip->irq.irq_enable = irqchip->irq_enable;
2220 gpiochip->irq.irq_disable = irqchip->irq_disable;
2221 irqchip->irq_enable = gpiochip_irq_enable;
2222 irqchip->irq_disable = gpiochip_irq_disable;
14250520
LW
2223}
2224
e0d89728
TR
2225/**
2226 * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
2227 * @gpiochip: the GPIO chip to add the IRQ chip to
39c3fd58
AL
2228 * @lock_key: lockdep class for IRQ lock
2229 * @request_key: lockdep class for IRQ request
e0d89728 2230 */
959bc7b2 2231static int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
2232 struct lock_class_key *lock_key,
2233 struct lock_class_key *request_key)
e0d89728
TR
2234{
2235 struct irq_chip *irqchip = gpiochip->irq.chip;
fdd61a01 2236 const struct irq_domain_ops *ops = NULL;
e0d89728
TR
2237 struct device_node *np;
2238 unsigned int type;
2239 unsigned int i;
2240
2241 if (!irqchip)
2242 return 0;
2243
2244 if (gpiochip->irq.parent_handler && gpiochip->can_sleep) {
b1911710 2245 chip_err(gpiochip, "you cannot have chained interrupts on a chip that may sleep\n");
e0d89728
TR
2246 return -EINVAL;
2247 }
2248
2249 np = gpiochip->gpiodev->dev.of_node;
2250 type = gpiochip->irq.default_type;
2251
2252 /*
2253 * Specifying a default trigger is a terrible idea if DT or ACPI is
2254 * used to configure the interrupts, as you may end up with
2255 * conflicting triggers. Tell the user, and reset to NONE.
2256 */
2257 if (WARN(np && type != IRQ_TYPE_NONE,
2258 "%s: Ignoring %u default trigger\n", np->full_name, type))
2259 type = IRQ_TYPE_NONE;
2260
2261 if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) {
2262 acpi_handle_warn(ACPI_HANDLE(gpiochip->parent),
2263 "Ignoring %u default trigger\n", type);
2264 type = IRQ_TYPE_NONE;
2265 }
2266
2267 gpiochip->to_irq = gpiochip_to_irq;
2268 gpiochip->irq.default_type = type;
959bc7b2 2269 gpiochip->irq.lock_key = lock_key;
39c3fd58 2270 gpiochip->irq.request_key = request_key;
e0d89728 2271
fdd61a01
LW
2272 /* If a parent irqdomain is provided, let's build a hierarchy */
2273 if (gpiochip_hierarchy_is_hierarchical(gpiochip)) {
2274 int ret = gpiochip_hierarchy_add_domain(gpiochip);
2275 if (ret)
2276 return ret;
2277 } else {
2278 /* Some drivers provide custom irqdomain ops */
2279 if (gpiochip->irq.domain_ops)
2280 ops = gpiochip->irq.domain_ops;
2281
2282 if (!ops)
2283 ops = &gpiochip_domain_ops;
2284 gpiochip->irq.domain = irq_domain_add_simple(np,
2285 gpiochip->ngpio,
2286 gpiochip->irq.first,
2287 ops, gpiochip);
2288 if (!gpiochip->irq.domain)
2289 return -EINVAL;
2290 }
e0d89728 2291
e0d89728
TR
2292 if (gpiochip->irq.parent_handler) {
2293 void *data = gpiochip->irq.parent_handler_data ?: gpiochip;
2294
2295 for (i = 0; i < gpiochip->irq.num_parents; i++) {
2296 /*
2297 * The parent IRQ chip is already using the chip_data
2298 * for this IRQ chip, so our callbacks simply use the
2299 * handler_data.
2300 */
2301 irq_set_chained_handler_and_data(gpiochip->irq.parents[i],
2302 gpiochip->irq.parent_handler,
2303 data);
2304 }
e0d89728
TR
2305 }
2306
ca620f2d
HV
2307 gpiochip_set_irq_hooks(gpiochip);
2308
e0d89728
TR
2309 acpi_gpiochip_request_interrupts(gpiochip);
2310
2311 return 0;
2312}
2313
14250520
LW
2314/**
2315 * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
2316 * @gpiochip: the gpiochip to remove the irqchip from
2317 *
2318 * This is called only from gpiochip_remove()
2319 */
2320static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)
2321{
ca620f2d 2322 struct irq_chip *irqchip = gpiochip->irq.chip;
39e5f096 2323 unsigned int offset;
c3626fde 2324
afa82fab
MW
2325 acpi_gpiochip_free_interrupts(gpiochip);
2326
ca620f2d 2327 if (irqchip && gpiochip->irq.parent_handler) {
39e5f096
TR
2328 struct gpio_irq_chip *irq = &gpiochip->irq;
2329 unsigned int i;
2330
2331 for (i = 0; i < irq->num_parents; i++)
2332 irq_set_chained_handler_and_data(irq->parents[i],
2333 NULL, NULL);
25e4fe92
DES
2334 }
2335
c3626fde 2336 /* Remove all IRQ mappings and delete the domain */
f0fbe7bc 2337 if (gpiochip->irq.domain) {
39e5f096
TR
2338 unsigned int irq;
2339
79b804cb
MW
2340 for (offset = 0; offset < gpiochip->ngpio; offset++) {
2341 if (!gpiochip_irqchip_irq_valid(gpiochip, offset))
2342 continue;
f0fbe7bc
TR
2343
2344 irq = irq_find_mapping(gpiochip->irq.domain, offset);
2345 irq_dispose_mapping(irq);
79b804cb 2346 }
f0fbe7bc
TR
2347
2348 irq_domain_remove(gpiochip->irq.domain);
c3626fde 2349 }
14250520 2350
461c1a7d
HV
2351 if (irqchip) {
2352 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
2353 irqchip->irq_request_resources = NULL;
2354 irqchip->irq_release_resources = NULL;
2355 }
2356 if (irqchip->irq_enable == gpiochip_irq_enable) {
2357 irqchip->irq_enable = gpiochip->irq.irq_enable;
2358 irqchip->irq_disable = gpiochip->irq.irq_disable;
2359 }
14250520 2360 }
461c1a7d
HV
2361 gpiochip->irq.irq_enable = NULL;
2362 gpiochip->irq.irq_disable = NULL;
ca620f2d 2363 gpiochip->irq.chip = NULL;
79b804cb
MW
2364
2365 gpiochip_irqchip_free_valid_mask(gpiochip);
14250520
LW
2366}
2367
2368/**
739e6f59 2369 * gpiochip_irqchip_add_key() - adds an irqchip to a gpiochip
14250520
LW
2370 * @gpiochip: the gpiochip to add the irqchip to
2371 * @irqchip: the irqchip to add to the gpiochip
2372 * @first_irq: if not dynamically assigned, the base (first) IRQ to
2373 * allocate gpiochip irqs from
2374 * @handler: the irq handler to use (often a predefined irq core function)
1333b90f
LW
2375 * @type: the default type for IRQs on this irqchip, pass IRQ_TYPE_NONE
2376 * to have the core avoid setting up any default type in the hardware.
60ed54ca 2377 * @threaded: whether this irqchip uses a nested thread handler
39c3fd58
AL
2378 * @lock_key: lockdep class for IRQ lock
2379 * @request_key: lockdep class for IRQ request
14250520
LW
2380 *
2381 * This function closely associates a certain irqchip with a certain
2382 * gpiochip, providing an irq domain to translate the local IRQs to
2383 * global irqs in the gpiolib core, and making sure that the gpiochip
2384 * is passed as chip data to all related functions. Driver callbacks
09dd5f9e 2385 * need to use gpiochip_get_data() to get their local state containers back
14250520
LW
2386 * from the gpiochip passed as chip data. An irqdomain will be stored
2387 * in the gpiochip that shall be used by the driver to handle IRQ number
2388 * translation. The gpiochip will need to be initialized and registered
2389 * before calling this function.
2390 *
c3626fde
LW
2391 * This function will handle two cell:ed simple IRQs and assumes all
2392 * the pins on the gpiochip can generate a unique IRQ. Everything else
14250520
LW
2393 * need to be open coded.
2394 */
739e6f59
LW
2395int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip,
2396 struct irq_chip *irqchip,
2397 unsigned int first_irq,
2398 irq_flow_handler_t handler,
2399 unsigned int type,
60ed54ca 2400 bool threaded,
39c3fd58
AL
2401 struct lock_class_key *lock_key,
2402 struct lock_class_key *request_key)
14250520
LW
2403{
2404 struct device_node *of_node;
14250520
LW
2405
2406 if (!gpiochip || !irqchip)
2407 return -EINVAL;
2408
58383c78 2409 if (!gpiochip->parent) {
14250520
LW
2410 pr_err("missing gpiochip .dev parent pointer\n");
2411 return -EINVAL;
2412 }
60ed54ca 2413 gpiochip->irq.threaded = threaded;
58383c78 2414 of_node = gpiochip->parent->of_node;
14250520
LW
2415#ifdef CONFIG_OF_GPIO
2416 /*
20a8a968 2417 * If the gpiochip has an assigned OF node this takes precedence
c88402c2
BJZ
2418 * FIXME: get rid of this and use gpiochip->parent->of_node
2419 * everywhere
14250520
LW
2420 */
2421 if (gpiochip->of_node)
2422 of_node = gpiochip->of_node;
2423#endif
332e99d5 2424 /*
0a1e0053 2425 * Specifying a default trigger is a terrible idea if DT or ACPI is
332e99d5
MZ
2426 * used to configure the interrupts, as you may end-up with
2427 * conflicting triggers. Tell the user, and reset to NONE.
2428 */
2429 if (WARN(of_node && type != IRQ_TYPE_NONE,
7eb6ce2f 2430 "%pOF: Ignoring %d default trigger\n", of_node, type))
332e99d5 2431 type = IRQ_TYPE_NONE;
0a1e0053
MW
2432 if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) {
2433 acpi_handle_warn(ACPI_HANDLE(gpiochip->parent),
2434 "Ignoring %d default trigger\n", type);
2435 type = IRQ_TYPE_NONE;
2436 }
332e99d5 2437
da80ff81 2438 gpiochip->irq.chip = irqchip;
c7a0aa59 2439 gpiochip->irq.handler = handler;
3634eeb0 2440 gpiochip->irq.default_type = type;
14250520 2441 gpiochip->to_irq = gpiochip_to_irq;
ca9df053 2442 gpiochip->irq.lock_key = lock_key;
39c3fd58 2443 gpiochip->irq.request_key = request_key;
f0fbe7bc 2444 gpiochip->irq.domain = irq_domain_add_simple(of_node,
14250520
LW
2445 gpiochip->ngpio, first_irq,
2446 &gpiochip_domain_ops, gpiochip);
f0fbe7bc 2447 if (!gpiochip->irq.domain) {
da80ff81 2448 gpiochip->irq.chip = NULL;
14250520
LW
2449 return -EINVAL;
2450 }
8b67a1f0 2451
ca620f2d 2452 gpiochip_set_irq_hooks(gpiochip);
14250520 2453
afa82fab
MW
2454 acpi_gpiochip_request_interrupts(gpiochip);
2455
14250520
LW
2456 return 0;
2457}
739e6f59 2458EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_key);
14250520
LW
2459
2460#else /* CONFIG_GPIOLIB_IRQCHIP */
2461
959bc7b2 2462static inline int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
2463 struct lock_class_key *lock_key,
2464 struct lock_class_key *request_key)
e0d89728
TR
2465{
2466 return 0;
2467}
14250520 2468static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip) {}
9411e3aa
AS
2469
2470static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gpiochip)
2471{
2472 return 0;
2473}
2474
79b804cb
MW
2475static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip)
2476{
2477 return 0;
2478}
2479static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip)
2480{ }
14250520
LW
2481
2482#endif /* CONFIG_GPIOLIB_IRQCHIP */
2483
c771c2f4
JG
2484/**
2485 * gpiochip_generic_request() - request the gpio function for a pin
2486 * @chip: the gpiochip owning the GPIO
2487 * @offset: the offset of the GPIO to request for GPIO function
2488 */
2489int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset)
2490{
a9a1d2a7 2491 return pinctrl_gpio_request(chip->gpiodev->base + offset);
c771c2f4
JG
2492}
2493EXPORT_SYMBOL_GPL(gpiochip_generic_request);
2494
2495/**
2496 * gpiochip_generic_free() - free the gpio function from a pin
2497 * @chip: the gpiochip to request the gpio function for
2498 * @offset: the offset of the GPIO to free from GPIO function
2499 */
2500void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset)
2501{
a9a1d2a7 2502 pinctrl_gpio_free(chip->gpiodev->base + offset);
c771c2f4
JG
2503}
2504EXPORT_SYMBOL_GPL(gpiochip_generic_free);
2505
2956b5d9
MW
2506/**
2507 * gpiochip_generic_config() - apply configuration for a pin
2508 * @chip: the gpiochip owning the GPIO
2509 * @offset: the offset of the GPIO to apply the configuration
2510 * @config: the configuration to be applied
2511 */
2512int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset,
2513 unsigned long config)
2514{
2515 return pinctrl_gpio_set_config(chip->gpiodev->base + offset, config);
2516}
2517EXPORT_SYMBOL_GPL(gpiochip_generic_config);
2518
f23f1516 2519#ifdef CONFIG_PINCTRL
165adc9c 2520
586a87e6
CR
2521/**
2522 * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
2523 * @chip: the gpiochip to add the range for
d32651f6 2524 * @pctldev: the pin controller to map to
586a87e6
CR
2525 * @gpio_offset: the start offset in the current gpio_chip number space
2526 * @pin_group: name of the pin group inside the pin controller
973c1714
CL
2527 *
2528 * Calling this function directly from a DeviceTree-supported
2529 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2530 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2531 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
586a87e6
CR
2532 */
2533int gpiochip_add_pingroup_range(struct gpio_chip *chip,
2534 struct pinctrl_dev *pctldev,
2535 unsigned int gpio_offset, const char *pin_group)
2536{
2537 struct gpio_pin_range *pin_range;
fdeb8e15 2538 struct gpio_device *gdev = chip->gpiodev;
586a87e6
CR
2539 int ret;
2540
2541 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
2542 if (!pin_range) {
1a2a99c6 2543 chip_err(chip, "failed to allocate pin ranges\n");
586a87e6
CR
2544 return -ENOMEM;
2545 }
2546
2547 /* Use local offset as range ID */
2548 pin_range->range.id = gpio_offset;
2549 pin_range->range.gc = chip;
2550 pin_range->range.name = chip->label;
fdeb8e15 2551 pin_range->range.base = gdev->base + gpio_offset;
586a87e6
CR
2552 pin_range->pctldev = pctldev;
2553
2554 ret = pinctrl_get_group_pins(pctldev, pin_group,
2555 &pin_range->range.pins,
2556 &pin_range->range.npins);
61c6375d
MN
2557 if (ret < 0) {
2558 kfree(pin_range);
586a87e6 2559 return ret;
61c6375d 2560 }
586a87e6
CR
2561
2562 pinctrl_add_gpio_range(pctldev, &pin_range->range);
2563
1a2a99c6
AS
2564 chip_dbg(chip, "created GPIO range %d->%d ==> %s PINGRP %s\n",
2565 gpio_offset, gpio_offset + pin_range->range.npins - 1,
586a87e6
CR
2566 pinctrl_dev_get_devname(pctldev), pin_group);
2567
20ec3e39 2568 list_add_tail(&pin_range->node, &gdev->pin_ranges);
586a87e6
CR
2569
2570 return 0;
2571}
2572EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
2573
3f0f8670
LW
2574/**
2575 * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
2576 * @chip: the gpiochip to add the range for
950d55f5 2577 * @pinctl_name: the dev_name() of the pin controller to map to
316511c0
LW
2578 * @gpio_offset: the start offset in the current gpio_chip number space
2579 * @pin_offset: the start offset in the pin controller number space
3f0f8670
LW
2580 * @npins: the number of pins from the offset of each pin space (GPIO and
2581 * pin controller) to accumulate in this range
950d55f5
TR
2582 *
2583 * Returns:
2584 * 0 on success, or a negative error-code on failure.
973c1714
CL
2585 *
2586 * Calling this function directly from a DeviceTree-supported
2587 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2588 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2589 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
3f0f8670 2590 */
1e63d7b9 2591int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
316511c0 2592 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 2593 unsigned int npins)
f23f1516
SH
2594{
2595 struct gpio_pin_range *pin_range;
fdeb8e15 2596 struct gpio_device *gdev = chip->gpiodev;
b4d4b1f0 2597 int ret;
f23f1516 2598
3f0f8670 2599 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
f23f1516 2600 if (!pin_range) {
1a2a99c6 2601 chip_err(chip, "failed to allocate pin ranges\n");
1e63d7b9 2602 return -ENOMEM;
f23f1516
SH
2603 }
2604
3f0f8670 2605 /* Use local offset as range ID */
316511c0 2606 pin_range->range.id = gpio_offset;
3f0f8670 2607 pin_range->range.gc = chip;
f23f1516 2608 pin_range->range.name = chip->label;
fdeb8e15 2609 pin_range->range.base = gdev->base + gpio_offset;
316511c0 2610 pin_range->range.pin_base = pin_offset;
f23f1516 2611 pin_range->range.npins = npins;
192c369c 2612 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
f23f1516 2613 &pin_range->range);
8f23ca1a 2614 if (IS_ERR(pin_range->pctldev)) {
b4d4b1f0 2615 ret = PTR_ERR(pin_range->pctldev);
1a2a99c6 2616 chip_err(chip, "could not create pin range\n");
3f0f8670 2617 kfree(pin_range);
b4d4b1f0 2618 return ret;
3f0f8670 2619 }
1a2a99c6
AS
2620 chip_dbg(chip, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
2621 gpio_offset, gpio_offset + npins - 1,
316511c0
LW
2622 pinctl_name,
2623 pin_offset, pin_offset + npins - 1);
f23f1516 2624
20ec3e39 2625 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1e63d7b9
LW
2626
2627 return 0;
f23f1516 2628}
165adc9c 2629EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
f23f1516 2630
3f0f8670
LW
2631/**
2632 * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
2633 * @chip: the chip to remove all the mappings for
2634 */
f23f1516
SH
2635void gpiochip_remove_pin_ranges(struct gpio_chip *chip)
2636{
2637 struct gpio_pin_range *pin_range, *tmp;
20ec3e39 2638 struct gpio_device *gdev = chip->gpiodev;
f23f1516 2639
20ec3e39 2640 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
f23f1516
SH
2641 list_del(&pin_range->node);
2642 pinctrl_remove_gpio_range(pin_range->pctldev,
2643 &pin_range->range);
3f0f8670 2644 kfree(pin_range);
f23f1516
SH
2645 }
2646}
165adc9c
LW
2647EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
2648
2649#endif /* CONFIG_PINCTRL */
f23f1516 2650
d2876d08
DB
2651/* These "optional" allocation calls help prevent drivers from stomping
2652 * on each other, and help provide better diagnostics in debugfs.
2653 * They're called even less than the "set direction" calls.
2654 */
fac9d885 2655static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
d2876d08 2656{
fdeb8e15 2657 struct gpio_chip *chip = desc->gdev->chip;
d377f56f 2658 int ret;
d2876d08 2659 unsigned long flags;
3789f5ac 2660 unsigned offset;
d2876d08 2661
18534df4
MS
2662 if (label) {
2663 label = kstrdup_const(label, GFP_KERNEL);
2664 if (!label)
2665 return -ENOMEM;
2666 }
2667
bcabdef1
AC
2668 spin_lock_irqsave(&gpio_lock, flags);
2669
d2876d08 2670 /* NOTE: gpio_request() can be called in early boot,
35e8bb51 2671 * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
d2876d08
DB
2672 */
2673
2674 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
2675 desc_set_label(desc, label ? : "?");
d377f56f 2676 ret = 0;
438d8908 2677 } else {
18534df4 2678 kfree_const(label);
d377f56f 2679 ret = -EBUSY;
7460db56 2680 goto done;
35e8bb51
DB
2681 }
2682
2683 if (chip->request) {
2684 /* chip->request may sleep */
2685 spin_unlock_irqrestore(&gpio_lock, flags);
3789f5ac
BD
2686 offset = gpio_chip_hwgpio(desc);
2687 if (gpiochip_line_is_valid(chip, offset))
d377f56f 2688 ret = chip->request(chip, offset);
3789f5ac 2689 else
d377f56f 2690 ret = -EINVAL;
35e8bb51
DB
2691 spin_lock_irqsave(&gpio_lock, flags);
2692
d377f56f 2693 if (ret < 0) {
35e8bb51 2694 desc_set_label(desc, NULL);
18534df4 2695 kfree_const(label);
35e8bb51 2696 clear_bit(FLAG_REQUESTED, &desc->flags);
80b0a602 2697 goto done;
35e8bb51 2698 }
438d8908 2699 }
80b0a602
MN
2700 if (chip->get_direction) {
2701 /* chip->get_direction may sleep */
2702 spin_unlock_irqrestore(&gpio_lock, flags);
372e722e 2703 gpiod_get_direction(desc);
80b0a602
MN
2704 spin_lock_irqsave(&gpio_lock, flags);
2705 }
77c2d792
MW
2706done:
2707 spin_unlock_irqrestore(&gpio_lock, flags);
d377f56f 2708 return ret;
77c2d792
MW
2709}
2710
fdeb8e15
LW
2711/*
2712 * This descriptor validation needs to be inserted verbatim into each
2713 * function taking a descriptor, so we need to use a preprocessor
54d77198
LW
2714 * macro to avoid endless duplication. If the desc is NULL it is an
2715 * optional GPIO and calls should just bail out.
fdeb8e15 2716 */
a746a232
RV
2717static int validate_desc(const struct gpio_desc *desc, const char *func)
2718{
2719 if (!desc)
2720 return 0;
2721 if (IS_ERR(desc)) {
2722 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
2723 return PTR_ERR(desc);
2724 }
2725 if (!desc->gdev) {
2726 pr_warn("%s: invalid GPIO (no device)\n", func);
2727 return -EINVAL;
2728 }
2729 if (!desc->gdev->chip) {
2730 dev_warn(&desc->gdev->dev,
2731 "%s: backing chip is gone\n", func);
2732 return 0;
2733 }
2734 return 1;
2735}
2736
fdeb8e15 2737#define VALIDATE_DESC(desc) do { \
a746a232
RV
2738 int __valid = validate_desc(desc, __func__); \
2739 if (__valid <= 0) \
2740 return __valid; \
2741 } while (0)
fdeb8e15
LW
2742
2743#define VALIDATE_DESC_VOID(desc) do { \
a746a232
RV
2744 int __valid = validate_desc(desc, __func__); \
2745 if (__valid <= 0) \
fdeb8e15 2746 return; \
a746a232 2747 } while (0)
fdeb8e15 2748
0eb4c6c2 2749int gpiod_request(struct gpio_desc *desc, const char *label)
77c2d792 2750{
d377f56f 2751 int ret = -EPROBE_DEFER;
fdeb8e15 2752 struct gpio_device *gdev;
77c2d792 2753
fdeb8e15
LW
2754 VALIDATE_DESC(desc);
2755 gdev = desc->gdev;
77c2d792 2756
fdeb8e15 2757 if (try_module_get(gdev->owner)) {
d377f56f
LW
2758 ret = gpiod_request_commit(desc, label);
2759 if (ret < 0)
fdeb8e15 2760 module_put(gdev->owner);
33a68e86
LW
2761 else
2762 get_device(&gdev->dev);
77c2d792
MW
2763 }
2764
d377f56f
LW
2765 if (ret)
2766 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
77c2d792 2767
d377f56f 2768 return ret;
d2876d08 2769}
372e722e 2770
fac9d885 2771static bool gpiod_free_commit(struct gpio_desc *desc)
d2876d08 2772{
77c2d792 2773 bool ret = false;
d2876d08 2774 unsigned long flags;
35e8bb51 2775 struct gpio_chip *chip;
d2876d08 2776
3d599d1c
UKK
2777 might_sleep();
2778
372e722e 2779 gpiod_unexport(desc);
d8f388d8 2780
d2876d08
DB
2781 spin_lock_irqsave(&gpio_lock, flags);
2782
fdeb8e15 2783 chip = desc->gdev->chip;
35e8bb51
DB
2784 if (chip && test_bit(FLAG_REQUESTED, &desc->flags)) {
2785 if (chip->free) {
2786 spin_unlock_irqrestore(&gpio_lock, flags);
9c4ba946 2787 might_sleep_if(chip->can_sleep);
372e722e 2788 chip->free(chip, gpio_chip_hwgpio(desc));
35e8bb51
DB
2789 spin_lock_irqsave(&gpio_lock, flags);
2790 }
18534df4 2791 kfree_const(desc->label);
d2876d08 2792 desc_set_label(desc, NULL);
07697461 2793 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
35e8bb51 2794 clear_bit(FLAG_REQUESTED, &desc->flags);
aca5ce14 2795 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
25553ff0 2796 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
8c550e94
DF
2797 clear_bit(FLAG_PULL_UP, &desc->flags);
2798 clear_bit(FLAG_PULL_DOWN, &desc->flags);
f625d460 2799 clear_bit(FLAG_IS_HOGGED, &desc->flags);
77c2d792
MW
2800 ret = true;
2801 }
d2876d08
DB
2802
2803 spin_unlock_irqrestore(&gpio_lock, flags);
77c2d792
MW
2804 return ret;
2805}
2806
0eb4c6c2 2807void gpiod_free(struct gpio_desc *desc)
77c2d792 2808{
fac9d885 2809 if (desc && desc->gdev && gpiod_free_commit(desc)) {
fdeb8e15 2810 module_put(desc->gdev->owner);
33a68e86
LW
2811 put_device(&desc->gdev->dev);
2812 } else {
77c2d792 2813 WARN_ON(extra_checks);
33a68e86 2814 }
d2876d08 2815}
372e722e 2816
d2876d08
DB
2817/**
2818 * gpiochip_is_requested - return string iff signal was requested
2819 * @chip: controller managing the signal
2820 * @offset: of signal within controller's 0..(ngpio - 1) range
2821 *
2822 * Returns NULL if the GPIO is not currently requested, else a string.
9c8318ff
AC
2823 * The string returned is the label passed to gpio_request(); if none has been
2824 * passed it is a meaningless, non-NULL constant.
d2876d08
DB
2825 *
2826 * This function is for use by GPIO controller drivers. The label can
2827 * help with diagnostics, and knowing that the signal is used as a GPIO
2828 * can help avoid accidentally multiplexing it to another controller.
2829 */
2830const char *gpiochip_is_requested(struct gpio_chip *chip, unsigned offset)
2831{
6c0b4e6c 2832 struct gpio_desc *desc;
d2876d08 2833
48b5953e 2834 if (offset >= chip->ngpio)
d2876d08 2835 return NULL;
6c0b4e6c 2836
1c3cdb18 2837 desc = &chip->gpiodev->descs[offset];
6c0b4e6c 2838
372e722e 2839 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
d2876d08 2840 return NULL;
372e722e 2841 return desc->label;
d2876d08
DB
2842}
2843EXPORT_SYMBOL_GPL(gpiochip_is_requested);
2844
77c2d792
MW
2845/**
2846 * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
950d55f5
TR
2847 * @chip: GPIO chip
2848 * @hwnum: hardware number of the GPIO for which to request the descriptor
77c2d792 2849 * @label: label for the GPIO
5923ea6c
LW
2850 * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
2851 * specify things like line inversion semantics with the machine flags
2852 * such as GPIO_OUT_LOW
2853 * @dflags: descriptor request flags for this GPIO or 0 if default, this
2854 * can be used to specify consumer semantics such as open drain
77c2d792
MW
2855 *
2856 * Function allows GPIO chip drivers to request and use their own GPIO
2857 * descriptors via gpiolib API. Difference to gpiod_request() is that this
2858 * function will not increase reference count of the GPIO chip module. This
2859 * allows the GPIO chip module to be unloaded as needed (we assume that the
2860 * GPIO chip driver handles freeing the GPIOs it has requested).
950d55f5
TR
2861 *
2862 * Returns:
2863 * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
2864 * code on failure.
77c2d792 2865 */
abdc08a3 2866struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum,
21abf103 2867 const char *label,
5923ea6c
LW
2868 enum gpio_lookup_flags lflags,
2869 enum gpiod_flags dflags)
77c2d792 2870{
abdc08a3 2871 struct gpio_desc *desc = gpiochip_get_desc(chip, hwnum);
d377f56f 2872 int ret;
77c2d792 2873
abdc08a3
AC
2874 if (IS_ERR(desc)) {
2875 chip_err(chip, "failed to get GPIO descriptor\n");
2876 return desc;
2877 }
2878
d377f56f
LW
2879 ret = gpiod_request_commit(desc, label);
2880 if (ret < 0)
2881 return ERR_PTR(ret);
77c2d792 2882
d377f56f
LW
2883 ret = gpiod_configure_flags(desc, label, lflags, dflags);
2884 if (ret) {
21abf103
LW
2885 chip_err(chip, "setup of own GPIO %s failed\n", label);
2886 gpiod_free_commit(desc);
d377f56f 2887 return ERR_PTR(ret);
21abf103
LW
2888 }
2889
abdc08a3 2890 return desc;
77c2d792 2891}
f7d4ad98 2892EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
77c2d792
MW
2893
2894/**
2895 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
2896 * @desc: GPIO descriptor to free
2897 *
2898 * Function frees the given GPIO requested previously with
2899 * gpiochip_request_own_desc().
2900 */
2901void gpiochip_free_own_desc(struct gpio_desc *desc)
2902{
2903 if (desc)
fac9d885 2904 gpiod_free_commit(desc);
77c2d792 2905}
f7d4ad98 2906EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
d2876d08 2907
fdeb8e15
LW
2908/*
2909 * Drivers MUST set GPIO direction before making get/set calls. In
d2876d08
DB
2910 * some cases this is done in early boot, before IRQs are enabled.
2911 *
2912 * As a rule these aren't called more than once (except for drivers
2913 * using the open-drain emulation idiom) so these are natural places
2914 * to accumulate extra debugging checks. Note that we can't (yet)
2915 * rely on gpio_request() having been called beforehand.
2916 */
2917
71479789
TP
2918static int gpio_set_config(struct gpio_chip *gc, unsigned offset,
2919 enum pin_config_param mode)
2920{
542f3615
MR
2921 unsigned long config;
2922 unsigned arg;
71479789 2923
542f3615
MR
2924 switch (mode) {
2925 case PIN_CONFIG_BIAS_PULL_DOWN:
2926 case PIN_CONFIG_BIAS_PULL_UP:
2927 arg = 1;
2928 break;
2929
2930 default:
2931 arg = 0;
2932 }
2933
2934 config = PIN_CONF_PACKED(mode, arg);
71479789
TP
2935 return gc->set_config ? gc->set_config(gc, offset, config) : -ENOTSUPP;
2936}
2937
79a9becd
AC
2938/**
2939 * gpiod_direction_input - set the GPIO direction to input
2940 * @desc: GPIO to set to input
2941 *
2942 * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
2943 * be called safely on it.
2944 *
2945 * Return 0 in case of success, else an error code.
2946 */
2947int gpiod_direction_input(struct gpio_desc *desc)
d2876d08 2948{
d2876d08 2949 struct gpio_chip *chip;
d377f56f 2950 int ret = 0;
d2876d08 2951
fdeb8e15
LW
2952 VALIDATE_DESC(desc);
2953 chip = desc->gdev->chip;
bcabdef1 2954
e48d194d
LW
2955 /*
2956 * It is legal to have no .get() and .direction_input() specified if
2957 * the chip is output-only, but you can't specify .direction_input()
2958 * and not support the .get() operation, that doesn't make sense.
2959 */
ae9847f4 2960 if (!chip->get && chip->direction_input) {
6424de5a 2961 gpiod_warn(desc,
e48d194d
LW
2962 "%s: missing get() but have direction_input()\n",
2963 __func__);
be1a4b13
LW
2964 return -EIO;
2965 }
2966
e48d194d
LW
2967 /*
2968 * If we have a .direction_input() callback, things are simple,
2969 * just call it. Else we are some input-only chip so try to check the
2970 * direction (if .get_direction() is supported) else we silently
2971 * assume we are in input mode after this.
2972 */
ae9847f4 2973 if (chip->direction_input) {
d377f56f 2974 ret = chip->direction_input(chip, gpio_chip_hwgpio(desc));
ae9847f4
RRD
2975 } else if (chip->get_direction &&
2976 (chip->get_direction(chip, gpio_chip_hwgpio(desc)) != 1)) {
2977 gpiod_warn(desc,
e48d194d
LW
2978 "%s: missing direction_input() operation and line is output\n",
2979 __func__);
ae9847f4
RRD
2980 return -EIO;
2981 }
d377f56f 2982 if (ret == 0)
d2876d08 2983 clear_bit(FLAG_IS_OUT, &desc->flags);
3f397c21 2984
d449991c
TP
2985 if (test_bit(FLAG_PULL_UP, &desc->flags))
2986 gpio_set_config(chip, gpio_chip_hwgpio(desc),
2987 PIN_CONFIG_BIAS_PULL_UP);
2988 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
2989 gpio_set_config(chip, gpio_chip_hwgpio(desc),
2990 PIN_CONFIG_BIAS_PULL_DOWN);
2991
d377f56f 2992 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
d82da797 2993
d377f56f 2994 return ret;
d2876d08 2995}
79a9becd 2996EXPORT_SYMBOL_GPL(gpiod_direction_input);
372e722e 2997
fac9d885 2998static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
d2876d08 2999{
c663e5f5 3000 struct gpio_chip *gc = desc->gdev->chip;
ad17731d 3001 int val = !!value;
ae9847f4 3002 int ret = 0;
d2876d08 3003
e48d194d
LW
3004 /*
3005 * It's OK not to specify .direction_output() if the gpiochip is
3006 * output-only, but if there is then not even a .set() operation it
3007 * is pretty tricky to drive the output line.
3008 */
ae9847f4 3009 if (!gc->set && !gc->direction_output) {
6424de5a 3010 gpiod_warn(desc,
e48d194d
LW
3011 "%s: missing set() and direction_output() operations\n",
3012 __func__);
be1a4b13
LW
3013 return -EIO;
3014 }
3015
ae9847f4
RRD
3016 if (gc->direction_output) {
3017 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
3018 } else {
e48d194d 3019 /* Check that we are in output mode if we can */
ae9847f4
RRD
3020 if (gc->get_direction &&
3021 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
3022 gpiod_warn(desc,
3023 "%s: missing direction_output() operation\n",
3024 __func__);
3025 return -EIO;
3026 }
e48d194d
LW
3027 /*
3028 * If we can't actively set the direction, we are some
3029 * output-only chip, so just drive the output as desired.
3030 */
ae9847f4
RRD
3031 gc->set(gc, gpio_chip_hwgpio(desc), val);
3032 }
3033
c663e5f5 3034 if (!ret)
d2876d08 3035 set_bit(FLAG_IS_OUT, &desc->flags);
ad17731d 3036 trace_gpio_value(desc_to_gpio(desc), 0, val);
c663e5f5
LW
3037 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
3038 return ret;
d2876d08 3039}
ef70bbe1
PZ
3040
3041/**
3042 * gpiod_direction_output_raw - set the GPIO direction to output
3043 * @desc: GPIO to set to output
3044 * @value: initial output value of the GPIO
3045 *
3046 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
3047 * be called safely on it. The initial value of the output must be specified
3048 * as raw value on the physical line without regard for the ACTIVE_LOW status.
3049 *
3050 * Return 0 in case of success, else an error code.
3051 */
3052int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
3053{
fdeb8e15 3054 VALIDATE_DESC(desc);
fac9d885 3055 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1
PZ
3056}
3057EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
3058
3059/**
90df4fe0 3060 * gpiod_direction_output - set the GPIO direction to output
ef70bbe1
PZ
3061 * @desc: GPIO to set to output
3062 * @value: initial output value of the GPIO
3063 *
3064 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
3065 * be called safely on it. The initial value of the output must be specified
3066 * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
3067 * account.
3068 *
3069 * Return 0 in case of success, else an error code.
3070 */
3071int gpiod_direction_output(struct gpio_desc *desc, int value)
3072{
30322bcf 3073 struct gpio_chip *gc;
02e47980
LW
3074 int ret;
3075
fdeb8e15 3076 VALIDATE_DESC(desc);
ef70bbe1
PZ
3077 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3078 value = !value;
ad17731d
LW
3079 else
3080 value = !!value;
02e47980 3081
4e9439dd
HV
3082 /* GPIOs used for enabled IRQs shall not be set as output */
3083 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
3084 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
02e47980
LW
3085 gpiod_err(desc,
3086 "%s: tried to set a GPIO tied to an IRQ as output\n",
3087 __func__);
3088 return -EIO;
3089 }
3090
30322bcf 3091 gc = desc->gdev->chip;
02e47980
LW
3092 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
3093 /* First see if we can enable open drain in hardware */
71479789
TP
3094 ret = gpio_set_config(gc, gpio_chip_hwgpio(desc),
3095 PIN_CONFIG_DRIVE_OPEN_DRAIN);
02e47980
LW
3096 if (!ret)
3097 goto set_output_value;
3098 /* Emulate open drain by not actively driving the line high */
e735244e
BG
3099 if (value) {
3100 ret = gpiod_direction_input(desc);
3101 goto set_output_flag;
3102 }
02e47980
LW
3103 }
3104 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
71479789
TP
3105 ret = gpio_set_config(gc, gpio_chip_hwgpio(desc),
3106 PIN_CONFIG_DRIVE_OPEN_SOURCE);
02e47980
LW
3107 if (!ret)
3108 goto set_output_value;
3109 /* Emulate open source by not actively driving the line low */
e735244e
BG
3110 if (!value) {
3111 ret = gpiod_direction_input(desc);
3112 goto set_output_flag;
3113 }
02e47980 3114 } else {
71479789
TP
3115 gpio_set_config(gc, gpio_chip_hwgpio(desc),
3116 PIN_CONFIG_DRIVE_PUSH_PULL);
02e47980
LW
3117 }
3118
3119set_output_value:
fac9d885 3120 return gpiod_direction_output_raw_commit(desc, value);
e735244e
BG
3121
3122set_output_flag:
3123 /*
3124 * When emulating open-source or open-drain functionalities by not
3125 * actively driving the line (setting mode to input) we still need to
3126 * set the IS_OUT flag or otherwise we won't be able to set the line
3127 * value anymore.
3128 */
3129 if (ret == 0)
3130 set_bit(FLAG_IS_OUT, &desc->flags);
3131 return ret;
ef70bbe1 3132}
79a9becd 3133EXPORT_SYMBOL_GPL(gpiod_direction_output);
d2876d08 3134
c4b5be98 3135/**
950d55f5
TR
3136 * gpiod_set_debounce - sets @debounce time for a GPIO
3137 * @desc: descriptor of the GPIO for which to set debounce time
3138 * @debounce: debounce time in microseconds
65d87656 3139 *
950d55f5
TR
3140 * Returns:
3141 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
3142 * debounce time.
c4b5be98 3143 */
79a9becd 3144int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce)
c4b5be98 3145{
c4b5be98 3146 struct gpio_chip *chip;
2956b5d9 3147 unsigned long config;
c4b5be98 3148
fdeb8e15
LW
3149 VALIDATE_DESC(desc);
3150 chip = desc->gdev->chip;
2956b5d9 3151 if (!chip->set || !chip->set_config) {
6424de5a 3152 gpiod_dbg(desc,
2956b5d9 3153 "%s: missing set() or set_config() operations\n",
6424de5a 3154 __func__);
65d87656 3155 return -ENOTSUPP;
be1a4b13
LW
3156 }
3157
2956b5d9 3158 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
fa59dd23 3159 return chip->set_config(chip, gpio_chip_hwgpio(desc), config);
c4b5be98 3160}
79a9becd 3161EXPORT_SYMBOL_GPL(gpiod_set_debounce);
372e722e 3162
e10f72bf
AJ
3163/**
3164 * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
3165 * @desc: descriptor of the GPIO for which to configure persistence
3166 * @transitory: True to lose state on suspend or reset, false for persistence
3167 *
3168 * Returns:
3169 * 0 on success, otherwise a negative error code.
3170 */
3171int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
3172{
3173 struct gpio_chip *chip;
3174 unsigned long packed;
3175 int gpio;
3176 int rc;
3177
156dd392 3178 VALIDATE_DESC(desc);
e10f72bf
AJ
3179 /*
3180 * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
3181 * persistence state.
3182 */
3183 if (transitory)
3184 set_bit(FLAG_TRANSITORY, &desc->flags);
3185 else
3186 clear_bit(FLAG_TRANSITORY, &desc->flags);
3187
3188 /* If the driver supports it, set the persistence state now */
3189 chip = desc->gdev->chip;
3190 if (!chip->set_config)
3191 return 0;
3192
3193 packed = pinconf_to_config_packed(PIN_CONFIG_PERSIST_STATE,
3194 !transitory);
3195 gpio = gpio_chip_hwgpio(desc);
fa59dd23 3196 rc = chip->set_config(chip, gpio, packed);
e10f72bf
AJ
3197 if (rc == -ENOTSUPP) {
3198 dev_dbg(&desc->gdev->dev, "Persistence not supported for GPIO %d\n",
3199 gpio);
3200 return 0;
3201 }
3202
3203 return rc;
3204}
3205EXPORT_SYMBOL_GPL(gpiod_set_transitory);
3206
79a9becd
AC
3207/**
3208 * gpiod_is_active_low - test whether a GPIO is active-low or not
3209 * @desc: the gpio descriptor to test
3210 *
3211 * Returns 1 if the GPIO is active-low, 0 otherwise.
3212 */
3213int gpiod_is_active_low(const struct gpio_desc *desc)
372e722e 3214{
fdeb8e15 3215 VALIDATE_DESC(desc);
79a9becd 3216 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
372e722e 3217}
79a9becd 3218EXPORT_SYMBOL_GPL(gpiod_is_active_low);
d2876d08
DB
3219
3220/* I/O calls are only valid after configuration completed; the relevant
3221 * "is this a valid GPIO" error checks should already have been done.
3222 *
3223 * "Get" operations are often inlinable as reading a pin value register,
3224 * and masking the relevant bit in that register.
3225 *
3226 * When "set" operations are inlinable, they involve writing that mask to
3227 * one register to set a low value, or a different register to set it high.
3228 * Otherwise locking is needed, so there may be little value to inlining.
3229 *
3230 *------------------------------------------------------------------------
3231 *
3232 * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
3233 * have requested the GPIO. That can include implicit requesting by
3234 * a direction setting call. Marking a gpio as requested locks its chip
3235 * in memory, guaranteeing that these table lookups need no more locking
3236 * and that gpiochip_remove() will fail.
3237 *
3238 * REVISIT when debugging, consider adding some instrumentation to ensure
3239 * that the GPIO was actually requested.
3240 */
3241
fac9d885 3242static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
d2876d08
DB
3243{
3244 struct gpio_chip *chip;
372e722e 3245 int offset;
e20538b8 3246 int value;
d2876d08 3247
fdeb8e15 3248 chip = desc->gdev->chip;
372e722e 3249 offset = gpio_chip_hwgpio(desc);
e20538b8 3250 value = chip->get ? chip->get(chip, offset) : -EIO;
723a6303 3251 value = value < 0 ? value : !!value;
372e722e 3252 trace_gpio_value(desc_to_gpio(desc), 1, value);
3f397c21 3253 return value;
d2876d08 3254}
372e722e 3255
eec1d566
LW
3256static int gpio_chip_get_multiple(struct gpio_chip *chip,
3257 unsigned long *mask, unsigned long *bits)
3258{
3259 if (chip->get_multiple) {
3260 return chip->get_multiple(chip, mask, bits);
3261 } else if (chip->get) {
3262 int i, value;
3263
3264 for_each_set_bit(i, mask, chip->ngpio) {
3265 value = chip->get(chip, i);
3266 if (value < 0)
3267 return value;
3268 __assign_bit(i, bits, value);
3269 }
3270 return 0;
3271 }
3272 return -EIO;
3273}
3274
3275int gpiod_get_array_value_complex(bool raw, bool can_sleep,
3276 unsigned int array_size,
3277 struct gpio_desc **desc_array,
77588c14 3278 struct gpio_array *array_info,
b9762beb 3279 unsigned long *value_bitmap)
eec1d566 3280{
d377f56f 3281 int ret, i = 0;
b17566a6
JK
3282
3283 /*
3284 * Validate array_info against desc_array and its size.
3285 * It should immediately follow desc_array if both
3286 * have been obtained from the same gpiod_get_array() call.
3287 */
3288 if (array_info && array_info->desc == desc_array &&
3289 array_size <= array_info->size &&
3290 (void *)array_info == desc_array + array_info->size) {
3291 if (!can_sleep)
3292 WARN_ON(array_info->chip->can_sleep);
3293
d377f56f 3294 ret = gpio_chip_get_multiple(array_info->chip,
b17566a6
JK
3295 array_info->get_mask,
3296 value_bitmap);
d377f56f
LW
3297 if (ret)
3298 return ret;
b17566a6
JK
3299
3300 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3301 bitmap_xor(value_bitmap, value_bitmap,
3302 array_info->invert_mask, array_size);
3303
3304 if (bitmap_full(array_info->get_mask, array_size))
3305 return 0;
3306
3307 i = find_first_zero_bit(array_info->get_mask, array_size);
3308 } else {
3309 array_info = NULL;
3310 }
eec1d566
LW
3311
3312 while (i < array_size) {
3313 struct gpio_chip *chip = desc_array[i]->gdev->chip;
3027743f
LA
3314 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
3315 unsigned long *mask, *bits;
eec1d566
LW
3316 int first, j, ret;
3317
3027743f
LA
3318 if (likely(chip->ngpio <= FASTPATH_NGPIO)) {
3319 mask = fastpath;
3320 } else {
3321 mask = kmalloc_array(2 * BITS_TO_LONGS(chip->ngpio),
3322 sizeof(*mask),
3323 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
3324 if (!mask)
3325 return -ENOMEM;
3326 }
3327
3328 bits = mask + BITS_TO_LONGS(chip->ngpio);
3329 bitmap_zero(mask, chip->ngpio);
3330
eec1d566
LW
3331 if (!can_sleep)
3332 WARN_ON(chip->can_sleep);
3333
3334 /* collect all inputs belonging to the same chip */
3335 first = i;
eec1d566
LW
3336 do {
3337 const struct gpio_desc *desc = desc_array[i];
3338 int hwgpio = gpio_chip_hwgpio(desc);
3339
3340 __set_bit(hwgpio, mask);
3341 i++;
b17566a6
JK
3342
3343 if (array_info)
35ae7f96
JK
3344 i = find_next_zero_bit(array_info->get_mask,
3345 array_size, i);
eec1d566
LW
3346 } while ((i < array_size) &&
3347 (desc_array[i]->gdev->chip == chip));
3348
3349 ret = gpio_chip_get_multiple(chip, mask, bits);
3027743f
LA
3350 if (ret) {
3351 if (mask != fastpath)
3352 kfree(mask);
eec1d566 3353 return ret;
3027743f 3354 }
eec1d566 3355
b17566a6 3356 for (j = first; j < i; ) {
eec1d566
LW
3357 const struct gpio_desc *desc = desc_array[j];
3358 int hwgpio = gpio_chip_hwgpio(desc);
3359 int value = test_bit(hwgpio, bits);
3360
3361 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3362 value = !value;
b9762beb 3363 __assign_bit(j, value_bitmap, value);
eec1d566 3364 trace_gpio_value(desc_to_gpio(desc), 1, value);
799d5eb4 3365 j++;
b17566a6
JK
3366
3367 if (array_info)
35ae7f96
JK
3368 j = find_next_zero_bit(array_info->get_mask, i,
3369 j);
eec1d566 3370 }
3027743f
LA
3371
3372 if (mask != fastpath)
3373 kfree(mask);
eec1d566
LW
3374 }
3375 return 0;
3376}
3377
d2876d08 3378/**
79a9becd
AC
3379 * gpiod_get_raw_value() - return a gpio's raw value
3380 * @desc: gpio whose value will be returned
d2876d08 3381 *
79a9becd 3382 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3383 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd 3384 *
827a9b8b 3385 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3386 * complain if the GPIO chip functions potentially sleep.
d2876d08 3387 */
79a9becd 3388int gpiod_get_raw_value(const struct gpio_desc *desc)
d2876d08 3389{
fdeb8e15 3390 VALIDATE_DESC(desc);
3285170f 3391 /* Should be using gpiod_get_raw_value_cansleep() */
fdeb8e15 3392 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3393 return gpiod_get_raw_value_commit(desc);
d2876d08 3394}
79a9becd 3395EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
372e722e 3396
79a9becd
AC
3397/**
3398 * gpiod_get_value() - return a gpio's value
3399 * @desc: gpio whose value will be returned
3400 *
3401 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3402 * account, or negative errno on failure.
79a9becd 3403 *
827a9b8b 3404 * This function can be called from contexts where we cannot sleep, and will
79a9becd
AC
3405 * complain if the GPIO chip functions potentially sleep.
3406 */
3407int gpiod_get_value(const struct gpio_desc *desc)
372e722e 3408{
79a9becd 3409 int value;
fdeb8e15
LW
3410
3411 VALIDATE_DESC(desc);
3285170f 3412 /* Should be using gpiod_get_value_cansleep() */
fdeb8e15 3413 WARN_ON(desc->gdev->chip->can_sleep);
79a9becd 3414
fac9d885 3415 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3416 if (value < 0)
3417 return value;
3418
79a9becd
AC
3419 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3420 value = !value;
3421
3422 return value;
372e722e 3423}
79a9becd 3424EXPORT_SYMBOL_GPL(gpiod_get_value);
d2876d08 3425
eec1d566
LW
3426/**
3427 * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
b9762beb 3428 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3429 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3430 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3431 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3432 *
3433 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3434 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3435 * else an error code.
3436 *
827a9b8b 3437 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
3438 * and it will complain if the GPIO chip functions potentially sleep.
3439 */
3440int gpiod_get_raw_array_value(unsigned int array_size,
b9762beb 3441 struct gpio_desc **desc_array,
77588c14 3442 struct gpio_array *array_info,
b9762beb 3443 unsigned long *value_bitmap)
eec1d566
LW
3444{
3445 if (!desc_array)
3446 return -EINVAL;
3447 return gpiod_get_array_value_complex(true, false, array_size,
77588c14
JK
3448 desc_array, array_info,
3449 value_bitmap);
eec1d566
LW
3450}
3451EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
3452
3453/**
3454 * gpiod_get_array_value() - read values from an array of GPIOs
b9762beb 3455 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3456 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3457 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3458 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3459 *
3460 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3461 * into account. Return 0 in case of success, else an error code.
3462 *
827a9b8b 3463 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
3464 * and it will complain if the GPIO chip functions potentially sleep.
3465 */
3466int gpiod_get_array_value(unsigned int array_size,
b9762beb 3467 struct gpio_desc **desc_array,
77588c14 3468 struct gpio_array *array_info,
b9762beb 3469 unsigned long *value_bitmap)
eec1d566
LW
3470{
3471 if (!desc_array)
3472 return -EINVAL;
3473 return gpiod_get_array_value_complex(false, false, array_size,
77588c14
JK
3474 desc_array, array_info,
3475 value_bitmap);
eec1d566
LW
3476}
3477EXPORT_SYMBOL_GPL(gpiod_get_array_value);
3478
aca5ce14 3479/*
fac9d885 3480 * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
79a9becd 3481 * @desc: gpio descriptor whose state need to be set.
20a8a968 3482 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
aca5ce14 3483 */
fac9d885 3484static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
aca5ce14 3485{
d377f56f 3486 int ret = 0;
fdeb8e15 3487 struct gpio_chip *chip = desc->gdev->chip;
372e722e
AC
3488 int offset = gpio_chip_hwgpio(desc);
3489
aca5ce14 3490 if (value) {
d377f56f 3491 ret = chip->direction_input(chip, offset);
aca5ce14 3492 } else {
d377f56f
LW
3493 ret = chip->direction_output(chip, offset, 0);
3494 if (!ret)
372e722e 3495 set_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 3496 }
d377f56f
LW
3497 trace_gpio_direction(desc_to_gpio(desc), value, ret);
3498 if (ret < 0)
6424de5a
MB
3499 gpiod_err(desc,
3500 "%s: Error in set_value for open drain err %d\n",
d377f56f 3501 __func__, ret);
aca5ce14
LD
3502}
3503
25553ff0 3504/*
79a9becd
AC
3505 * _gpio_set_open_source_value() - Set the open source gpio's value.
3506 * @desc: gpio descriptor whose state need to be set.
20a8a968 3507 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
25553ff0 3508 */
fac9d885 3509static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
25553ff0 3510{
d377f56f 3511 int ret = 0;
fdeb8e15 3512 struct gpio_chip *chip = desc->gdev->chip;
372e722e
AC
3513 int offset = gpio_chip_hwgpio(desc);
3514
25553ff0 3515 if (value) {
d377f56f
LW
3516 ret = chip->direction_output(chip, offset, 1);
3517 if (!ret)
372e722e 3518 set_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 3519 } else {
d377f56f 3520 ret = chip->direction_input(chip, offset);
25553ff0 3521 }
d377f56f
LW
3522 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
3523 if (ret < 0)
6424de5a
MB
3524 gpiod_err(desc,
3525 "%s: Error in set_value for open source err %d\n",
d377f56f 3526 __func__, ret);
25553ff0
LD
3527}
3528
fac9d885 3529static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
d2876d08
DB
3530{
3531 struct gpio_chip *chip;
3532
fdeb8e15 3533 chip = desc->gdev->chip;
372e722e 3534 trace_gpio_value(desc_to_gpio(desc), 0, value);
02e47980 3535 chip->set(chip, gpio_chip_hwgpio(desc), value);
372e722e
AC
3536}
3537
5f424243
RI
3538/*
3539 * set multiple outputs on the same chip;
3540 * use the chip's set_multiple function if available;
3541 * otherwise set the outputs sequentially;
3542 * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
3543 * defines which outputs are to be changed
3544 * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
3545 * defines the values the outputs specified by mask are to be set to
3546 */
3547static void gpio_chip_set_multiple(struct gpio_chip *chip,
3548 unsigned long *mask, unsigned long *bits)
3549{
3550 if (chip->set_multiple) {
3551 chip->set_multiple(chip, mask, bits);
3552 } else {
5e4e6fb3
AS
3553 unsigned int i;
3554
3555 /* set outputs if the corresponding mask bit is set */
3556 for_each_set_bit(i, mask, chip->ngpio)
3557 chip->set(chip, i, test_bit(i, bits));
5f424243
RI
3558 }
3559}
3560
3027743f 3561int gpiod_set_array_value_complex(bool raw, bool can_sleep,
3c940660
GU
3562 unsigned int array_size,
3563 struct gpio_desc **desc_array,
3564 struct gpio_array *array_info,
3565 unsigned long *value_bitmap)
5f424243
RI
3566{
3567 int i = 0;
3568
b17566a6
JK
3569 /*
3570 * Validate array_info against desc_array and its size.
3571 * It should immediately follow desc_array if both
3572 * have been obtained from the same gpiod_get_array() call.
3573 */
3574 if (array_info && array_info->desc == desc_array &&
3575 array_size <= array_info->size &&
3576 (void *)array_info == desc_array + array_info->size) {
3577 if (!can_sleep)
3578 WARN_ON(array_info->chip->can_sleep);
3579
3580 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3581 bitmap_xor(value_bitmap, value_bitmap,
3582 array_info->invert_mask, array_size);
3583
3584 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
3585 value_bitmap);
3586
3587 if (bitmap_full(array_info->set_mask, array_size))
3588 return 0;
3589
3590 i = find_first_zero_bit(array_info->set_mask, array_size);
3591 } else {
3592 array_info = NULL;
3593 }
3594
5f424243 3595 while (i < array_size) {
fdeb8e15 3596 struct gpio_chip *chip = desc_array[i]->gdev->chip;
3027743f
LA
3597 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
3598 unsigned long *mask, *bits;
5f424243
RI
3599 int count = 0;
3600
3027743f
LA
3601 if (likely(chip->ngpio <= FASTPATH_NGPIO)) {
3602 mask = fastpath;
3603 } else {
3604 mask = kmalloc_array(2 * BITS_TO_LONGS(chip->ngpio),
3605 sizeof(*mask),
3606 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
3607 if (!mask)
3608 return -ENOMEM;
3609 }
3610
3611 bits = mask + BITS_TO_LONGS(chip->ngpio);
3612 bitmap_zero(mask, chip->ngpio);
3613
38e003f4 3614 if (!can_sleep)
5f424243 3615 WARN_ON(chip->can_sleep);
38e003f4 3616
5f424243
RI
3617 do {
3618 struct gpio_desc *desc = desc_array[i];
3619 int hwgpio = gpio_chip_hwgpio(desc);
b9762beb 3620 int value = test_bit(i, value_bitmap);
5f424243 3621
b17566a6
JK
3622 /*
3623 * Pins applicable for fast input but not for
3624 * fast output processing may have been already
3625 * inverted inside the fast path, skip them.
3626 */
3627 if (!raw && !(array_info &&
3628 test_bit(i, array_info->invert_mask)) &&
3629 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
5f424243
RI
3630 value = !value;
3631 trace_gpio_value(desc_to_gpio(desc), 0, value);
3632 /*
3633 * collect all normal outputs belonging to the same chip
3634 * open drain and open source outputs are set individually
3635 */
02e47980 3636 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
fac9d885 3637 gpio_set_open_drain_value_commit(desc, value);
02e47980 3638 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
fac9d885 3639 gpio_set_open_source_value_commit(desc, value);
5f424243
RI
3640 } else {
3641 __set_bit(hwgpio, mask);
38e003f4 3642 if (value)
5f424243 3643 __set_bit(hwgpio, bits);
38e003f4 3644 else
5f424243 3645 __clear_bit(hwgpio, bits);
5f424243
RI
3646 count++;
3647 }
3648 i++;
b17566a6
JK
3649
3650 if (array_info)
35ae7f96
JK
3651 i = find_next_zero_bit(array_info->set_mask,
3652 array_size, i);
fdeb8e15
LW
3653 } while ((i < array_size) &&
3654 (desc_array[i]->gdev->chip == chip));
5f424243 3655 /* push collected bits to outputs */
38e003f4 3656 if (count != 0)
5f424243 3657 gpio_chip_set_multiple(chip, mask, bits);
3027743f
LA
3658
3659 if (mask != fastpath)
3660 kfree(mask);
5f424243 3661 }
3027743f 3662 return 0;
5f424243
RI
3663}
3664
d2876d08 3665/**
79a9becd
AC
3666 * gpiod_set_raw_value() - assign a gpio's raw value
3667 * @desc: gpio whose value will be assigned
d2876d08 3668 * @value: value to assign
d2876d08 3669 *
79a9becd
AC
3670 * Set the raw value of the GPIO, i.e. the value of its physical line without
3671 * regard for its ACTIVE_LOW status.
3672 *
827a9b8b 3673 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3674 * complain if the GPIO chip functions potentially sleep.
d2876d08 3675 */
79a9becd 3676void gpiod_set_raw_value(struct gpio_desc *desc, int value)
372e722e 3677{
fdeb8e15 3678 VALIDATE_DESC_VOID(desc);
3285170f 3679 /* Should be using gpiod_set_raw_value_cansleep() */
fdeb8e15 3680 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3681 gpiod_set_raw_value_commit(desc, value);
d2876d08 3682}
79a9becd 3683EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
d2876d08 3684
1e77fc82
GU
3685/**
3686 * gpiod_set_value_nocheck() - set a GPIO line value without checking
3687 * @desc: the descriptor to set the value on
3688 * @value: value to set
3689 *
3690 * This sets the value of a GPIO line backing a descriptor, applying
3691 * different semantic quirks like active low and open drain/source
3692 * handling.
3693 */
3694static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
3695{
3696 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3697 value = !value;
3698 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
3699 gpio_set_open_drain_value_commit(desc, value);
3700 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
3701 gpio_set_open_source_value_commit(desc, value);
3702 else
3703 gpiod_set_raw_value_commit(desc, value);
3704}
3705
d2876d08 3706/**
79a9becd
AC
3707 * gpiod_set_value() - assign a gpio's value
3708 * @desc: gpio whose value will be assigned
3709 * @value: value to assign
3710 *
02e47980
LW
3711 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
3712 * OPEN_DRAIN and OPEN_SOURCE flags into account.
d2876d08 3713 *
827a9b8b 3714 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3715 * complain if the GPIO chip functions potentially sleep.
d2876d08 3716 */
79a9becd 3717void gpiod_set_value(struct gpio_desc *desc, int value)
d2876d08 3718{
fdeb8e15 3719 VALIDATE_DESC_VOID(desc);
3285170f 3720 /* Should be using gpiod_set_value_cansleep() */
fdeb8e15 3721 WARN_ON(desc->gdev->chip->can_sleep);
1e77fc82 3722 gpiod_set_value_nocheck(desc, value);
372e722e 3723}
79a9becd 3724EXPORT_SYMBOL_GPL(gpiod_set_value);
d2876d08 3725
5f424243 3726/**
3fff99bc 3727 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
b9762beb 3728 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3729 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3730 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3731 * @value_bitmap: bitmap of values to assign
5f424243
RI
3732 *
3733 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3734 * without regard for their ACTIVE_LOW status.
3735 *
827a9b8b 3736 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3737 * complain if the GPIO chip functions potentially sleep.
3738 */
3027743f 3739int gpiod_set_raw_array_value(unsigned int array_size,
3c940660
GU
3740 struct gpio_desc **desc_array,
3741 struct gpio_array *array_info,
3742 unsigned long *value_bitmap)
5f424243
RI
3743{
3744 if (!desc_array)
3027743f
LA
3745 return -EINVAL;
3746 return gpiod_set_array_value_complex(true, false, array_size,
77588c14 3747 desc_array, array_info, value_bitmap);
5f424243 3748}
3fff99bc 3749EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
5f424243
RI
3750
3751/**
3fff99bc 3752 * gpiod_set_array_value() - assign values to an array of GPIOs
b9762beb 3753 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3754 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3755 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3756 * @value_bitmap: bitmap of values to assign
5f424243
RI
3757 *
3758 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3759 * into account.
3760 *
827a9b8b 3761 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3762 * complain if the GPIO chip functions potentially sleep.
3763 */
cf9af0d5
GU
3764int gpiod_set_array_value(unsigned int array_size,
3765 struct gpio_desc **desc_array,
3766 struct gpio_array *array_info,
3767 unsigned long *value_bitmap)
5f424243
RI
3768{
3769 if (!desc_array)
cf9af0d5
GU
3770 return -EINVAL;
3771 return gpiod_set_array_value_complex(false, false, array_size,
3772 desc_array, array_info,
3773 value_bitmap);
5f424243 3774}
3fff99bc 3775EXPORT_SYMBOL_GPL(gpiod_set_array_value);
5f424243 3776
d2876d08 3777/**
79a9becd
AC
3778 * gpiod_cansleep() - report whether gpio value access may sleep
3779 * @desc: gpio to check
d2876d08 3780 *
d2876d08 3781 */
79a9becd 3782int gpiod_cansleep(const struct gpio_desc *desc)
372e722e 3783{
fdeb8e15
LW
3784 VALIDATE_DESC(desc);
3785 return desc->gdev->chip->can_sleep;
d2876d08 3786}
79a9becd 3787EXPORT_SYMBOL_GPL(gpiod_cansleep);
d2876d08 3788
90b39402
LW
3789/**
3790 * gpiod_set_consumer_name() - set the consumer name for the descriptor
3791 * @desc: gpio to set the consumer name on
3792 * @name: the new consumer name
3793 */
18534df4 3794int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
90b39402 3795{
18534df4
MS
3796 VALIDATE_DESC(desc);
3797 if (name) {
3798 name = kstrdup_const(name, GFP_KERNEL);
3799 if (!name)
3800 return -ENOMEM;
3801 }
3802
3803 kfree_const(desc->label);
3804 desc_set_label(desc, name);
3805
3806 return 0;
90b39402
LW
3807}
3808EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
3809
0f6d504e 3810/**
79a9becd
AC
3811 * gpiod_to_irq() - return the IRQ corresponding to a GPIO
3812 * @desc: gpio whose IRQ will be returned (already requested)
0f6d504e 3813 *
79a9becd
AC
3814 * Return the IRQ corresponding to the passed GPIO, or an error code in case of
3815 * error.
0f6d504e 3816 */
79a9becd 3817int gpiod_to_irq(const struct gpio_desc *desc)
0f6d504e 3818{
4c37ce86
LW
3819 struct gpio_chip *chip;
3820 int offset;
0f6d504e 3821
79bb71bd
LW
3822 /*
3823 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
3824 * requires this function to not return zero on an invalid descriptor
3825 * but rather a negative error number.
3826 */
bfbbe44d 3827 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
79bb71bd
LW
3828 return -EINVAL;
3829
fdeb8e15 3830 chip = desc->gdev->chip;
372e722e 3831 offset = gpio_chip_hwgpio(desc);
4c37ce86
LW
3832 if (chip->to_irq) {
3833 int retirq = chip->to_irq(chip, offset);
3834
3835 /* Zero means NO_IRQ */
3836 if (!retirq)
3837 return -ENXIO;
3838
3839 return retirq;
3840 }
3841 return -ENXIO;
0f6d504e 3842}
79a9becd 3843EXPORT_SYMBOL_GPL(gpiod_to_irq);
0f6d504e 3844
d468bf9e 3845/**
e3a2e878 3846 * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
d74be6df
AC
3847 * @chip: the chip the GPIO to lock belongs to
3848 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3849 *
3850 * This is used directly by GPIO drivers that want to lock down
f438acdf 3851 * a certain GPIO line to be used for IRQs.
d468bf9e 3852 */
e3a2e878 3853int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset)
372e722e 3854{
9c10280d
LW
3855 struct gpio_desc *desc;
3856
3857 desc = gpiochip_get_desc(chip, offset);
3858 if (IS_ERR(desc))
3859 return PTR_ERR(desc);
3860
60f8339e
LW
3861 /*
3862 * If it's fast: flush the direction setting if something changed
3863 * behind our back
3864 */
3865 if (!chip->can_sleep && chip->get_direction) {
80956790 3866 int dir = gpiod_get_direction(desc);
9c10280d 3867
36b31279
AS
3868 if (dir < 0) {
3869 chip_err(chip, "%s: cannot get GPIO direction\n",
3870 __func__);
3871 return dir;
3872 }
9c10280d 3873 }
d468bf9e 3874
9c10280d 3875 if (test_bit(FLAG_IS_OUT, &desc->flags)) {
d74be6df 3876 chip_err(chip,
b1911710
AS
3877 "%s: tried to flag a GPIO set as output for IRQ\n",
3878 __func__);
d468bf9e
LW
3879 return -EIO;
3880 }
3881
9c10280d 3882 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3883 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3884
3885 /*
3886 * If the consumer has not set up a label (such as when the
3887 * IRQ is referenced from .to_irq()) we set up a label here
3888 * so it is clear this is used as an interrupt.
3889 */
3890 if (!desc->label)
3891 desc_set_label(desc, "interrupt");
3892
d468bf9e 3893 return 0;
372e722e 3894}
e3a2e878 3895EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
d2876d08 3896
d468bf9e 3897/**
e3a2e878 3898 * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
d74be6df
AC
3899 * @chip: the chip the GPIO to lock belongs to
3900 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3901 *
3902 * This is used directly by GPIO drivers that want to indicate
3903 * that a certain GPIO is no longer used exclusively for IRQ.
d2876d08 3904 */
e3a2e878 3905void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset)
d468bf9e 3906{
3940c34a
LW
3907 struct gpio_desc *desc;
3908
3909 desc = gpiochip_get_desc(chip, offset);
3910 if (IS_ERR(desc))
d468bf9e 3911 return;
d2876d08 3912
3940c34a 3913 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3914 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3915
3916 /* If we only had this marking, erase it */
3917 if (desc->label && !strcmp(desc->label, "interrupt"))
3918 desc_set_label(desc, NULL);
d468bf9e 3919}
e3a2e878 3920EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
d468bf9e 3921
4e9439dd
HV
3922void gpiochip_disable_irq(struct gpio_chip *chip, unsigned int offset)
3923{
3924 struct gpio_desc *desc = gpiochip_get_desc(chip, offset);
3925
3926 if (!IS_ERR(desc) &&
3927 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
3928 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3929}
3930EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
3931
3932void gpiochip_enable_irq(struct gpio_chip *chip, unsigned int offset)
3933{
3934 struct gpio_desc *desc = gpiochip_get_desc(chip, offset);
3935
3936 if (!IS_ERR(desc) &&
3937 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
3938 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags));
3939 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940 }
3941}
3942EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
3943
6cee3821
LW
3944bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset)
3945{
3946 if (offset >= chip->ngpio)
3947 return false;
3948
3949 return test_bit(FLAG_USED_AS_IRQ, &chip->gpiodev->descs[offset].flags);
3950}
3951EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
3952
4e6b8238
HV
3953int gpiochip_reqres_irq(struct gpio_chip *chip, unsigned int offset)
3954{
3955 int ret;
3956
3957 if (!try_module_get(chip->gpiodev->owner))
3958 return -ENODEV;
3959
3960 ret = gpiochip_lock_as_irq(chip, offset);
3961 if (ret) {
3962 chip_err(chip, "unable to lock HW IRQ %u for IRQ\n", offset);
3963 module_put(chip->gpiodev->owner);
3964 return ret;
3965 }
3966 return 0;
3967}
3968EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
3969
3970void gpiochip_relres_irq(struct gpio_chip *chip, unsigned int offset)
3971{
3972 gpiochip_unlock_as_irq(chip, offset);
3973 module_put(chip->gpiodev->owner);
3974}
3975EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
3976
143b65d6
LW
3977bool gpiochip_line_is_open_drain(struct gpio_chip *chip, unsigned int offset)
3978{
3979 if (offset >= chip->ngpio)
3980 return false;
3981
3982 return test_bit(FLAG_OPEN_DRAIN, &chip->gpiodev->descs[offset].flags);
3983}
3984EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
3985
3986bool gpiochip_line_is_open_source(struct gpio_chip *chip, unsigned int offset)
3987{
3988 if (offset >= chip->ngpio)
3989 return false;
3990
3991 return test_bit(FLAG_OPEN_SOURCE, &chip->gpiodev->descs[offset].flags);
3992}
3993EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
3994
05f479bf
CK
3995bool gpiochip_line_is_persistent(struct gpio_chip *chip, unsigned int offset)
3996{
3997 if (offset >= chip->ngpio)
3998 return false;
3999
e10f72bf 4000 return !test_bit(FLAG_TRANSITORY, &chip->gpiodev->descs[offset].flags);
05f479bf
CK
4001}
4002EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
4003
79a9becd
AC
4004/**
4005 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
4006 * @desc: gpio whose value will be returned
4007 *
4008 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 4009 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd
AC
4010 *
4011 * This function is to be called from contexts that can sleep.
d2876d08 4012 */
79a9becd 4013int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
d2876d08 4014{
d2876d08 4015 might_sleep_if(extra_checks);
fdeb8e15 4016 VALIDATE_DESC(desc);
fac9d885 4017 return gpiod_get_raw_value_commit(desc);
d2876d08 4018}
79a9becd 4019EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
372e722e 4020
79a9becd
AC
4021/**
4022 * gpiod_get_value_cansleep() - return a gpio's value
4023 * @desc: gpio whose value will be returned
4024 *
4025 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 4026 * account, or negative errno on failure.
79a9becd
AC
4027 *
4028 * This function is to be called from contexts that can sleep.
4029 */
4030int gpiod_get_value_cansleep(const struct gpio_desc *desc)
d2876d08 4031{
3f397c21 4032 int value;
d2876d08
DB
4033
4034 might_sleep_if(extra_checks);
fdeb8e15 4035 VALIDATE_DESC(desc);
fac9d885 4036 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
4037 if (value < 0)
4038 return value;
4039
79a9becd
AC
4040 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
4041 value = !value;
4042
3f397c21 4043 return value;
d2876d08 4044}
79a9becd 4045EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
372e722e 4046
eec1d566
LW
4047/**
4048 * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
b9762beb 4049 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 4050 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 4051 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4052 * @value_bitmap: bitmap to store the read values
eec1d566
LW
4053 *
4054 * Read the raw values of the GPIOs, i.e. the values of the physical lines
4055 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
4056 * else an error code.
4057 *
4058 * This function is to be called from contexts that can sleep.
4059 */
4060int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
4061 struct gpio_desc **desc_array,
77588c14 4062 struct gpio_array *array_info,
b9762beb 4063 unsigned long *value_bitmap)
eec1d566
LW
4064{
4065 might_sleep_if(extra_checks);
4066 if (!desc_array)
4067 return -EINVAL;
4068 return gpiod_get_array_value_complex(true, true, array_size,
77588c14
JK
4069 desc_array, array_info,
4070 value_bitmap);
eec1d566
LW
4071}
4072EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
4073
4074/**
4075 * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
b9762beb 4076 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 4077 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 4078 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4079 * @value_bitmap: bitmap to store the read values
eec1d566
LW
4080 *
4081 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
4082 * into account. Return 0 in case of success, else an error code.
4083 *
4084 * This function is to be called from contexts that can sleep.
4085 */
4086int gpiod_get_array_value_cansleep(unsigned int array_size,
4087 struct gpio_desc **desc_array,
77588c14 4088 struct gpio_array *array_info,
b9762beb 4089 unsigned long *value_bitmap)
eec1d566
LW
4090{
4091 might_sleep_if(extra_checks);
4092 if (!desc_array)
4093 return -EINVAL;
4094 return gpiod_get_array_value_complex(false, true, array_size,
77588c14
JK
4095 desc_array, array_info,
4096 value_bitmap);
eec1d566
LW
4097}
4098EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
4099
79a9becd
AC
4100/**
4101 * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
4102 * @desc: gpio whose value will be assigned
4103 * @value: value to assign
4104 *
4105 * Set the raw value of the GPIO, i.e. the value of its physical line without
4106 * regard for its ACTIVE_LOW status.
4107 *
4108 * This function is to be called from contexts that can sleep.
4109 */
4110void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
372e722e 4111{
d2876d08 4112 might_sleep_if(extra_checks);
fdeb8e15 4113 VALIDATE_DESC_VOID(desc);
fac9d885 4114 gpiod_set_raw_value_commit(desc, value);
372e722e 4115}
79a9becd 4116EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
d2876d08 4117
79a9becd
AC
4118/**
4119 * gpiod_set_value_cansleep() - assign a gpio's value
4120 * @desc: gpio whose value will be assigned
4121 * @value: value to assign
4122 *
4123 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
4124 * account
4125 *
4126 * This function is to be called from contexts that can sleep.
4127 */
4128void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
d2876d08 4129{
d2876d08 4130 might_sleep_if(extra_checks);
fdeb8e15 4131 VALIDATE_DESC_VOID(desc);
1e77fc82 4132 gpiod_set_value_nocheck(desc, value);
372e722e 4133}
79a9becd 4134EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
d2876d08 4135
5f424243 4136/**
3fff99bc 4137 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 4138 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4139 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4140 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4141 * @value_bitmap: bitmap of values to assign
5f424243
RI
4142 *
4143 * Set the raw values of the GPIOs, i.e. the values of the physical lines
4144 * without regard for their ACTIVE_LOW status.
4145 *
4146 * This function is to be called from contexts that can sleep.
4147 */
3027743f 4148int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3c940660
GU
4149 struct gpio_desc **desc_array,
4150 struct gpio_array *array_info,
4151 unsigned long *value_bitmap)
5f424243
RI
4152{
4153 might_sleep_if(extra_checks);
4154 if (!desc_array)
3027743f
LA
4155 return -EINVAL;
4156 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
77588c14 4157 array_info, value_bitmap);
5f424243 4158}
3fff99bc 4159EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
5f424243 4160
3946d187
DT
4161/**
4162 * gpiod_add_lookup_tables() - register GPIO device consumers
4163 * @tables: list of tables of consumers to register
4164 * @n: number of tables in the list
4165 */
4166void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
4167{
4168 unsigned int i;
4169
4170 mutex_lock(&gpio_lookup_lock);
4171
4172 for (i = 0; i < n; i++)
4173 list_add_tail(&tables[i]->list, &gpio_lookup_list);
4174
4175 mutex_unlock(&gpio_lookup_lock);
4176}
4177
5f424243 4178/**
3fff99bc 4179 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 4180 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4181 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4182 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4183 * @value_bitmap: bitmap of values to assign
5f424243
RI
4184 *
4185 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
4186 * into account.
4187 *
4188 * This function is to be called from contexts that can sleep.
4189 */
cf9af0d5
GU
4190int gpiod_set_array_value_cansleep(unsigned int array_size,
4191 struct gpio_desc **desc_array,
4192 struct gpio_array *array_info,
4193 unsigned long *value_bitmap)
5f424243
RI
4194{
4195 might_sleep_if(extra_checks);
4196 if (!desc_array)
cf9af0d5
GU
4197 return -EINVAL;
4198 return gpiod_set_array_value_complex(false, true, array_size,
4199 desc_array, array_info,
4200 value_bitmap);
5f424243 4201}
3fff99bc 4202EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
5f424243 4203
bae48da2 4204/**
ad824783
AC
4205 * gpiod_add_lookup_table() - register GPIO device consumers
4206 * @table: table of consumers to register
bae48da2 4207 */
ad824783 4208void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
bae48da2
AC
4209{
4210 mutex_lock(&gpio_lookup_lock);
4211
ad824783 4212 list_add_tail(&table->list, &gpio_lookup_list);
bae48da2
AC
4213
4214 mutex_unlock(&gpio_lookup_lock);
4215}
226b2242 4216EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
bae48da2 4217
be9015ab
SK
4218/**
4219 * gpiod_remove_lookup_table() - unregister GPIO device consumers
4220 * @table: table of consumers to unregister
4221 */
4222void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
4223{
4224 mutex_lock(&gpio_lookup_lock);
4225
4226 list_del(&table->list);
4227
4228 mutex_unlock(&gpio_lookup_lock);
4229}
226b2242 4230EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
be9015ab 4231
a411e81e
BG
4232/**
4233 * gpiod_add_hogs() - register a set of GPIO hogs from machine code
4234 * @hogs: table of gpio hog entries with a zeroed sentinel at the end
4235 */
4236void gpiod_add_hogs(struct gpiod_hog *hogs)
4237{
4238 struct gpio_chip *chip;
4239 struct gpiod_hog *hog;
4240
4241 mutex_lock(&gpio_machine_hogs_mutex);
4242
4243 for (hog = &hogs[0]; hog->chip_label; hog++) {
4244 list_add_tail(&hog->list, &gpio_machine_hogs);
4245
4246 /*
4247 * The chip may have been registered earlier, so check if it
4248 * exists and, if so, try to hog the line now.
4249 */
4250 chip = find_chip_by_name(hog->chip_label);
4251 if (chip)
4252 gpiochip_machine_hog(chip, hog);
4253 }
4254
4255 mutex_unlock(&gpio_machine_hogs_mutex);
4256}
4257EXPORT_SYMBOL_GPL(gpiod_add_hogs);
4258
ad824783 4259static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
bae48da2
AC
4260{
4261 const char *dev_id = dev ? dev_name(dev) : NULL;
ad824783 4262 struct gpiod_lookup_table *table;
bae48da2
AC
4263
4264 mutex_lock(&gpio_lookup_lock);
4265
ad824783
AC
4266 list_for_each_entry(table, &gpio_lookup_list, list) {
4267 if (table->dev_id && dev_id) {
4268 /*
4269 * Valid strings on both ends, must be identical to have
4270 * a match
4271 */
4272 if (!strcmp(table->dev_id, dev_id))
4273 goto found;
4274 } else {
4275 /*
4276 * One of the pointers is NULL, so both must be to have
4277 * a match
4278 */
4279 if (dev_id == table->dev_id)
4280 goto found;
4281 }
4282 }
4283 table = NULL;
bae48da2 4284
ad824783
AC
4285found:
4286 mutex_unlock(&gpio_lookup_lock);
4287 return table;
4288}
bae48da2 4289
ad824783 4290static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
fed7026a 4291 unsigned int idx, unsigned long *flags)
ad824783 4292{
2a3cf6a3 4293 struct gpio_desc *desc = ERR_PTR(-ENOENT);
ad824783
AC
4294 struct gpiod_lookup_table *table;
4295 struct gpiod_lookup *p;
bae48da2 4296
ad824783
AC
4297 table = gpiod_find_lookup_table(dev);
4298 if (!table)
4299 return desc;
bae48da2 4300
ad824783
AC
4301 for (p = &table->table[0]; p->chip_label; p++) {
4302 struct gpio_chip *chip;
bae48da2 4303
ad824783 4304 /* idx must always match exactly */
bae48da2
AC
4305 if (p->idx != idx)
4306 continue;
4307
ad824783
AC
4308 /* If the lookup entry has a con_id, require exact match */
4309 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
4310 continue;
bae48da2 4311
ad824783 4312 chip = find_chip_by_name(p->chip_label);
bae48da2 4313
ad824783 4314 if (!chip) {
8853daf3
JK
4315 /*
4316 * As the lookup table indicates a chip with
4317 * p->chip_label should exist, assume it may
4318 * still appear later and let the interested
4319 * consumer be probed again or let the Deferred
4320 * Probe infrastructure handle the error.
4321 */
4322 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
4323 p->chip_label);
4324 return ERR_PTR(-EPROBE_DEFER);
ad824783 4325 }
bae48da2 4326
ad824783 4327 if (chip->ngpio <= p->chip_hwnum) {
2a3cf6a3
AC
4328 dev_err(dev,
4329 "requested GPIO %d is out of range [0..%d] for chip %s\n",
4330 idx, chip->ngpio, chip->label);
4331 return ERR_PTR(-EINVAL);
bae48da2 4332 }
bae48da2 4333
bb1e88cc 4334 desc = gpiochip_get_desc(chip, p->chip_hwnum);
ad824783 4335 *flags = p->flags;
bae48da2 4336
2a3cf6a3 4337 return desc;
bae48da2
AC
4338 }
4339
bae48da2
AC
4340 return desc;
4341}
4342
66858527
RI
4343static int platform_gpio_count(struct device *dev, const char *con_id)
4344{
4345 struct gpiod_lookup_table *table;
4346 struct gpiod_lookup *p;
4347 unsigned int count = 0;
4348
4349 table = gpiod_find_lookup_table(dev);
4350 if (!table)
4351 return -ENOENT;
4352
4353 for (p = &table->table[0]; p->chip_label; p++) {
4354 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
4355 (!con_id && !p->con_id))
4356 count++;
4357 }
4358 if (!count)
4359 return -ENOENT;
4360
4361 return count;
4362}
4363
13949fa9
DT
4364/**
4365 * fwnode_gpiod_get_index - obtain a GPIO from firmware node
4366 * @fwnode: handle of the firmware node
4367 * @con_id: function within the GPIO consumer
4368 * @index: index of the GPIO to obtain for the consumer
4369 * @flags: GPIO initialization flags
4370 * @label: label to attach to the requested GPIO
4371 *
4372 * This function can be used for drivers that get their configuration
4373 * from opaque firmware.
4374 *
4375 * The function properly finds the corresponding GPIO using whatever is the
4376 * underlying firmware interface and then makes sure that the GPIO
4377 * descriptor is requested before it is returned to the caller.
4378 *
4379 * Returns:
4380 * On successful request the GPIO pin is configured in accordance with
4381 * provided @flags.
4382 *
4383 * In case of error an ERR_PTR() is returned.
4384 */
4385struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
4386 const char *con_id, int index,
4387 enum gpiod_flags flags,
4388 const char *label)
4389{
4390 struct gpio_desc *desc;
4391 char prop_name[32]; /* 32 is max size of property name */
4392 unsigned int i;
4393
4394 for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) {
4395 if (con_id)
4396 snprintf(prop_name, sizeof(prop_name), "%s-%s",
4397 con_id, gpio_suffixes[i]);
4398 else
4399 snprintf(prop_name, sizeof(prop_name), "%s",
4400 gpio_suffixes[i]);
4401
4402 desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags,
4403 label);
4404 if (!IS_ERR(desc) || (PTR_ERR(desc) != -ENOENT))
4405 break;
4406 }
4407
4408 return desc;
4409}
4410EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
4411
66858527
RI
4412/**
4413 * gpiod_count - return the number of GPIOs associated with a device / function
4414 * or -ENOENT if no GPIO has been assigned to the requested function
4415 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4416 * @con_id: function within the GPIO consumer
4417 */
4418int gpiod_count(struct device *dev, const char *con_id)
4419{
4420 int count = -ENOENT;
4421
4422 if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node)
f626d6df 4423 count = of_gpio_get_count(dev, con_id);
66858527
RI
4424 else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev))
4425 count = acpi_gpio_count(dev, con_id);
4426
4427 if (count < 0)
4428 count = platform_gpio_count(dev, con_id);
4429
4430 return count;
4431}
4432EXPORT_SYMBOL_GPL(gpiod_count);
4433
bae48da2 4434/**
0879162f 4435 * gpiod_get - obtain a GPIO for a given GPIO function
ad824783 4436 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2 4437 * @con_id: function within the GPIO consumer
39b2bbe3 4438 * @flags: optional GPIO initialization flags
bae48da2
AC
4439 *
4440 * Return the GPIO descriptor corresponding to the function con_id of device
2a3cf6a3 4441 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
20a8a968 4442 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
bae48da2 4443 */
b17d1bf1 4444struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
39b2bbe3 4445 enum gpiod_flags flags)
bae48da2 4446{
39b2bbe3 4447 return gpiod_get_index(dev, con_id, 0, flags);
bae48da2 4448}
b17d1bf1 4449EXPORT_SYMBOL_GPL(gpiod_get);
bae48da2 4450
29a1f233
TR
4451/**
4452 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
4453 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4454 * @con_id: function within the GPIO consumer
39b2bbe3 4455 * @flags: optional GPIO initialization flags
29a1f233
TR
4456 *
4457 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
4458 * the requested function it will return NULL. This is convenient for drivers
4459 * that need to handle optional GPIOs.
4460 */
b17d1bf1 4461struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
39b2bbe3
AC
4462 const char *con_id,
4463 enum gpiod_flags flags)
29a1f233 4464{
39b2bbe3 4465 return gpiod_get_index_optional(dev, con_id, 0, flags);
29a1f233 4466}
b17d1bf1 4467EXPORT_SYMBOL_GPL(gpiod_get_optional);
29a1f233 4468
f625d460
BP
4469
4470/**
4471 * gpiod_configure_flags - helper function to configure a given GPIO
4472 * @desc: gpio whose value will be assigned
4473 * @con_id: function within the GPIO consumer
fed7026a
AS
4474 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4475 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4476 * @dflags: gpiod_flags - optional GPIO initialization flags
4477 *
4478 * Return 0 on success, -ENOENT if no GPIO has been assigned to the
4479 * requested function and/or index, or another IS_ERR() code if an error
4480 * occurred while trying to acquire the GPIO.
4481 */
c29fd9eb 4482int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
85b03b30 4483 unsigned long lflags, enum gpiod_flags dflags)
f625d460 4484{
d377f56f 4485 int ret;
f625d460 4486
85b03b30
JH
4487 if (lflags & GPIO_ACTIVE_LOW)
4488 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
f926dfc1 4489
85b03b30
JH
4490 if (lflags & GPIO_OPEN_DRAIN)
4491 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
f926dfc1
LW
4492 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
4493 /*
4494 * This enforces open drain mode from the consumer side.
4495 * This is necessary for some busses like I2C, but the lookup
4496 * should *REALLY* have specified them as open drain in the
4497 * first place, so print a little warning here.
4498 */
4499 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
4500 gpiod_warn(desc,
4501 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
4502 }
4503
85b03b30
JH
4504 if (lflags & GPIO_OPEN_SOURCE)
4505 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
e10f72bf 4506
d449991c
TP
4507 if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) {
4508 gpiod_err(desc,
4509 "both pull-up and pull-down enabled, invalid configuration\n");
4510 return -EINVAL;
4511 }
4512
4513 if (lflags & GPIO_PULL_UP)
4514 set_bit(FLAG_PULL_UP, &desc->flags);
4515 else if (lflags & GPIO_PULL_DOWN)
4516 set_bit(FLAG_PULL_DOWN, &desc->flags);
4517
d377f56f
LW
4518 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
4519 if (ret < 0)
4520 return ret;
85b03b30 4521
f625d460
BP
4522 /* No particular flag request, return here... */
4523 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
4524 pr_debug("no flags found for %s\n", con_id);
4525 return 0;
4526 }
4527
4528 /* Process flags */
4529 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
d377f56f 4530 ret = gpiod_direction_output(desc,
ad17731d 4531 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
f625d460 4532 else
d377f56f 4533 ret = gpiod_direction_input(desc);
f625d460 4534
d377f56f 4535 return ret;
f625d460
BP
4536}
4537
bae48da2
AC
4538/**
4539 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
fdd6a5fe 4540 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2
AC
4541 * @con_id: function within the GPIO consumer
4542 * @idx: index of the GPIO to obtain in the consumer
39b2bbe3 4543 * @flags: optional GPIO initialization flags
bae48da2
AC
4544 *
4545 * This variant of gpiod_get() allows to access GPIOs other than the first
4546 * defined one for functions that define several GPIOs.
4547 *
2a3cf6a3
AC
4548 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
4549 * requested function and/or index, or another IS_ERR() code if an error
20a8a968 4550 * occurred while trying to acquire the GPIO.
bae48da2 4551 */
b17d1bf1 4552struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
bae48da2 4553 const char *con_id,
39b2bbe3
AC
4554 unsigned int idx,
4555 enum gpiod_flags flags)
bae48da2 4556{
2d6c06f5 4557 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
35c5d7fd 4558 struct gpio_desc *desc = NULL;
d377f56f 4559 int ret;
7d18f0a1
LW
4560 /* Maybe we have a device name, maybe not */
4561 const char *devname = dev ? dev_name(dev) : "?";
bae48da2
AC
4562
4563 dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id);
4564
4d8440b9
RW
4565 if (dev) {
4566 /* Using device tree? */
4567 if (IS_ENABLED(CONFIG_OF) && dev->of_node) {
4568 dev_dbg(dev, "using device tree for GPIO lookup\n");
4569 desc = of_find_gpio(dev, con_id, idx, &lookupflags);
4570 } else if (ACPI_COMPANION(dev)) {
4571 dev_dbg(dev, "using ACPI for GPIO lookup\n");
a31f5c3a 4572 desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags);
4d8440b9 4573 }
35c5d7fd
AC
4574 }
4575
4576 /*
4577 * Either we are not using DT or ACPI, or their lookup did not return
4578 * a result. In that case, use platform lookup as a fallback.
4579 */
2a3cf6a3 4580 if (!desc || desc == ERR_PTR(-ENOENT)) {
43a8785a 4581 dev_dbg(dev, "using lookup tables for GPIO lookup\n");
39b2bbe3 4582 desc = gpiod_find(dev, con_id, idx, &lookupflags);
bae48da2
AC
4583 }
4584
4585 if (IS_ERR(desc)) {
9d5a1f2c 4586 dev_dbg(dev, "No GPIO consumer %s found\n", con_id);
bae48da2
AC
4587 return desc;
4588 }
4589
7d18f0a1
LW
4590 /*
4591 * If a connection label was passed use that, else attempt to use
4592 * the device name as label
4593 */
d377f56f
LW
4594 ret = gpiod_request(desc, con_id ? con_id : devname);
4595 if (ret < 0) {
4596 if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) {
b0ce7b29
LW
4597 /*
4598 * This happens when there are several consumers for
4599 * the same GPIO line: we just return here without
4600 * further initialization. It is a bit if a hack.
4601 * This is necessary to support fixed regulators.
4602 *
4603 * FIXME: Make this more sane and safe.
4604 */
4605 dev_info(dev, "nonexclusive access to GPIO for %s\n",
4606 con_id ? con_id : devname);
4607 return desc;
4608 } else {
d377f56f 4609 return ERR_PTR(ret);
b0ce7b29
LW
4610 }
4611 }
bae48da2 4612
d377f56f 4613 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
6392cca4 4614 if (ret < 0) {
39b2bbe3 4615 dev_dbg(dev, "setup of GPIO %s failed\n", con_id);
6392cca4
LW
4616 gpiod_put(desc);
4617 return ERR_PTR(ret);
4618 }
4619
4620 return desc;
4621}
b17d1bf1 4622EXPORT_SYMBOL_GPL(gpiod_get_index);
6392cca4 4623
40b73183
MW
4624/**
4625 * fwnode_get_named_gpiod - obtain a GPIO from firmware node
4626 * @fwnode: handle of the firmware node
4627 * @propname: name of the firmware property representing the GPIO
6392cca4 4628 * @index: index of the GPIO to obtain for the consumer
a264d10f 4629 * @dflags: GPIO initialization flags
950d55f5 4630 * @label: label to attach to the requested GPIO
40b73183
MW
4631 *
4632 * This function can be used for drivers that get their configuration
6392cca4 4633 * from opaque firmware.
40b73183 4634 *
6392cca4 4635 * The function properly finds the corresponding GPIO using whatever is the
40b73183
MW
4636 * underlying firmware interface and then makes sure that the GPIO
4637 * descriptor is requested before it is returned to the caller.
4638 *
950d55f5 4639 * Returns:
ff21378a 4640 * On successful request the GPIO pin is configured in accordance with
a264d10f
AS
4641 * provided @dflags.
4642 *
40b73183
MW
4643 * In case of error an ERR_PTR() is returned.
4644 */
4645struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
537b94da 4646 const char *propname, int index,
b2987d74
AS
4647 enum gpiod_flags dflags,
4648 const char *label)
40b73183 4649{
2d6c06f5 4650 unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT;
40b73183 4651 struct gpio_desc *desc = ERR_PTR(-ENODEV);
40b73183
MW
4652 int ret;
4653
4654 if (!fwnode)
4655 return ERR_PTR(-EINVAL);
4656
4657 if (is_of_node(fwnode)) {
6392cca4
LW
4658 desc = gpiod_get_from_of_node(to_of_node(fwnode),
4659 propname, index,
4660 dflags,
4661 label);
4662 return desc;
40b73183
MW
4663 } else if (is_acpi_node(fwnode)) {
4664 struct acpi_gpio_info info;
4665
537b94da 4666 desc = acpi_node_get_gpiod(fwnode, propname, index, &info);
6392cca4
LW
4667 if (IS_ERR(desc))
4668 return desc;
40b73183 4669
6392cca4 4670 acpi_gpio_update_gpiod_flags(&dflags, &info);
606be344 4671 acpi_gpio_update_gpiod_lookup_flags(&lflags, &info);
6392cca4 4672 }
40b73183 4673
6392cca4 4674 /* Currently only ACPI takes this path */
b2987d74 4675 ret = gpiod_request(desc, label);
85b03b30
JH
4676 if (ret)
4677 return ERR_PTR(ret);
4678
a264d10f
AS
4679 ret = gpiod_configure_flags(desc, propname, lflags, dflags);
4680 if (ret < 0) {
4681 gpiod_put(desc);
4682 return ERR_PTR(ret);
90b665f6
LP
4683 }
4684
40b73183
MW
4685 return desc;
4686}
4687EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod);
4688
29a1f233
TR
4689/**
4690 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
4691 * function
4692 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4693 * @con_id: function within the GPIO consumer
4694 * @index: index of the GPIO to obtain in the consumer
39b2bbe3 4695 * @flags: optional GPIO initialization flags
29a1f233
TR
4696 *
4697 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
4698 * specified index was assigned to the requested function it will return NULL.
4699 * This is convenient for drivers that need to handle optional GPIOs.
4700 */
b17d1bf1 4701struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
29a1f233 4702 const char *con_id,
39b2bbe3
AC
4703 unsigned int index,
4704 enum gpiod_flags flags)
29a1f233
TR
4705{
4706 struct gpio_desc *desc;
4707
39b2bbe3 4708 desc = gpiod_get_index(dev, con_id, index, flags);
29a1f233
TR
4709 if (IS_ERR(desc)) {
4710 if (PTR_ERR(desc) == -ENOENT)
4711 return NULL;
4712 }
4713
4714 return desc;
4715}
b17d1bf1 4716EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
29a1f233 4717
f625d460
BP
4718/**
4719 * gpiod_hog - Hog the specified GPIO desc given the provided flags
4720 * @desc: gpio whose value will be assigned
4721 * @name: gpio line name
fed7026a
AS
4722 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4723 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4724 * @dflags: gpiod_flags - optional GPIO initialization flags
4725 */
4726int gpiod_hog(struct gpio_desc *desc, const char *name,
4727 unsigned long lflags, enum gpiod_flags dflags)
4728{
4729 struct gpio_chip *chip;
4730 struct gpio_desc *local_desc;
4731 int hwnum;
d377f56f 4732 int ret;
f625d460
BP
4733
4734 chip = gpiod_to_chip(desc);
4735 hwnum = gpio_chip_hwgpio(desc);
4736
5923ea6c
LW
4737 local_desc = gpiochip_request_own_desc(chip, hwnum, name,
4738 lflags, dflags);
f625d460 4739 if (IS_ERR(local_desc)) {
d377f56f 4740 ret = PTR_ERR(local_desc);
c31a571d 4741 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
d377f56f
LW
4742 name, chip->label, hwnum, ret);
4743 return ret;
f625d460
BP
4744 }
4745
f625d460
BP
4746 /* Mark GPIO as hogged so it can be identified and removed later */
4747 set_bit(FLAG_IS_HOGGED, &desc->flags);
4748
4749 pr_info("GPIO line %d (%s) hogged as %s%s\n",
4750 desc_to_gpio(desc), name,
4751 (dflags&GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
4752 (dflags&GPIOD_FLAGS_BIT_DIR_OUT) ?
4753 (dflags&GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low":"");
4754
4755 return 0;
4756}
4757
4758/**
4759 * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
4760 * @chip: gpio chip to act on
f625d460
BP
4761 */
4762static void gpiochip_free_hogs(struct gpio_chip *chip)
4763{
4764 int id;
4765
4766 for (id = 0; id < chip->ngpio; id++) {
1c3cdb18
LW
4767 if (test_bit(FLAG_IS_HOGGED, &chip->gpiodev->descs[id].flags))
4768 gpiochip_free_own_desc(&chip->gpiodev->descs[id]);
f625d460
BP
4769 }
4770}
4771
66858527
RI
4772/**
4773 * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
4774 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4775 * @con_id: function within the GPIO consumer
4776 * @flags: optional GPIO initialization flags
4777 *
4778 * This function acquires all the GPIOs defined under a given function.
4779 *
4780 * Return a struct gpio_descs containing an array of descriptors, -ENOENT if
4781 * no GPIO has been assigned to the requested function, or another IS_ERR()
4782 * code if an error occurred while trying to acquire the GPIOs.
4783 */
4784struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
4785 const char *con_id,
4786 enum gpiod_flags flags)
4787{
4788 struct gpio_desc *desc;
4789 struct gpio_descs *descs;
bf9346f5
JK
4790 struct gpio_array *array_info = NULL;
4791 struct gpio_chip *chip;
4792 int count, bitmap_size;
66858527
RI
4793
4794 count = gpiod_count(dev, con_id);
4795 if (count < 0)
4796 return ERR_PTR(count);
4797
acafe7e3 4798 descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL);
66858527
RI
4799 if (!descs)
4800 return ERR_PTR(-ENOMEM);
4801
4802 for (descs->ndescs = 0; descs->ndescs < count; ) {
4803 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
4804 if (IS_ERR(desc)) {
4805 gpiod_put_array(descs);
4806 return ERR_CAST(desc);
4807 }
bf9346f5 4808
66858527 4809 descs->desc[descs->ndescs] = desc;
bf9346f5
JK
4810
4811 chip = gpiod_to_chip(desc);
4812 /*
c4c958aa
JK
4813 * If pin hardware number of array member 0 is also 0, select
4814 * its chip as a candidate for fast bitmap processing path.
bf9346f5 4815 */
c4c958aa 4816 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
bf9346f5
JK
4817 struct gpio_descs *array;
4818
4819 bitmap_size = BITS_TO_LONGS(chip->ngpio > count ?
4820 chip->ngpio : count);
4821
4822 array = kzalloc(struct_size(descs, desc, count) +
4823 struct_size(array_info, invert_mask,
4824 3 * bitmap_size), GFP_KERNEL);
4825 if (!array) {
4826 gpiod_put_array(descs);
4827 return ERR_PTR(-ENOMEM);
4828 }
4829
4830 memcpy(array, descs,
4831 struct_size(descs, desc, descs->ndescs + 1));
4832 kfree(descs);
4833
4834 descs = array;
4835 array_info = (void *)(descs->desc + count);
4836 array_info->get_mask = array_info->invert_mask +
4837 bitmap_size;
4838 array_info->set_mask = array_info->get_mask +
4839 bitmap_size;
4840
4841 array_info->desc = descs->desc;
4842 array_info->size = count;
4843 array_info->chip = chip;
4844 bitmap_set(array_info->get_mask, descs->ndescs,
4845 count - descs->ndescs);
4846 bitmap_set(array_info->set_mask, descs->ndescs,
4847 count - descs->ndescs);
4848 descs->info = array_info;
4849 }
c4c958aa
JK
4850 /* Unmark array members which don't belong to the 'fast' chip */
4851 if (array_info && array_info->chip != chip) {
bf9346f5
JK
4852 __clear_bit(descs->ndescs, array_info->get_mask);
4853 __clear_bit(descs->ndescs, array_info->set_mask);
c4c958aa
JK
4854 }
4855 /*
4856 * Detect array members which belong to the 'fast' chip
4857 * but their pins are not in hardware order.
4858 */
4859 else if (array_info &&
4860 gpio_chip_hwgpio(desc) != descs->ndescs) {
4861 /*
4862 * Don't use fast path if all array members processed so
4863 * far belong to the same chip as this one but its pin
4864 * hardware number is different from its array index.
4865 */
4866 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
4867 array_info = NULL;
4868 } else {
4869 __clear_bit(descs->ndescs,
4870 array_info->get_mask);
4871 __clear_bit(descs->ndescs,
4872 array_info->set_mask);
4873 }
bf9346f5
JK
4874 } else if (array_info) {
4875 /* Exclude open drain or open source from fast output */
4876 if (gpiochip_line_is_open_drain(chip, descs->ndescs) ||
4877 gpiochip_line_is_open_source(chip, descs->ndescs))
4878 __clear_bit(descs->ndescs,
4879 array_info->set_mask);
4880 /* Identify 'fast' pins which require invertion */
4881 if (gpiod_is_active_low(desc))
4882 __set_bit(descs->ndescs,
4883 array_info->invert_mask);
4884 }
4885
66858527
RI
4886 descs->ndescs++;
4887 }
bf9346f5
JK
4888 if (array_info)
4889 dev_dbg(dev,
4890 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
4891 array_info->chip->label, array_info->size,
4892 *array_info->get_mask, *array_info->set_mask,
4893 *array_info->invert_mask);
66858527
RI
4894 return descs;
4895}
4896EXPORT_SYMBOL_GPL(gpiod_get_array);
4897
4898/**
4899 * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
4900 * function
4901 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4902 * @con_id: function within the GPIO consumer
4903 * @flags: optional GPIO initialization flags
4904 *
4905 * This is equivalent to gpiod_get_array(), except that when no GPIO was
4906 * assigned to the requested function it will return NULL.
4907 */
4908struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
4909 const char *con_id,
4910 enum gpiod_flags flags)
4911{
4912 struct gpio_descs *descs;
4913
4914 descs = gpiod_get_array(dev, con_id, flags);
4915 if (IS_ERR(descs) && (PTR_ERR(descs) == -ENOENT))
4916 return NULL;
4917
4918 return descs;
4919}
4920EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
4921
bae48da2
AC
4922/**
4923 * gpiod_put - dispose of a GPIO descriptor
4924 * @desc: GPIO descriptor to dispose of
4925 *
4926 * No descriptor can be used after gpiod_put() has been called on it.
4927 */
4928void gpiod_put(struct gpio_desc *desc)
4929{
1d7765ba
AS
4930 if (desc)
4931 gpiod_free(desc);
372e722e 4932}
bae48da2 4933EXPORT_SYMBOL_GPL(gpiod_put);
d2876d08 4934
66858527
RI
4935/**
4936 * gpiod_put_array - dispose of multiple GPIO descriptors
4937 * @descs: struct gpio_descs containing an array of descriptors
4938 */
4939void gpiod_put_array(struct gpio_descs *descs)
4940{
4941 unsigned int i;
4942
4943 for (i = 0; i < descs->ndescs; i++)
4944 gpiod_put(descs->desc[i]);
4945
4946 kfree(descs);
4947}
4948EXPORT_SYMBOL_GPL(gpiod_put_array);
4949
3c702e99
LW
4950static int __init gpiolib_dev_init(void)
4951{
4952 int ret;
4953
4954 /* Register GPIO sysfs bus */
b1911710 4955 ret = bus_register(&gpio_bus_type);
3c702e99
LW
4956 if (ret < 0) {
4957 pr_err("gpiolib: could not register GPIO bus type\n");
4958 return ret;
4959 }
4960
4961 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpiochip");
4962 if (ret < 0) {
4963 pr_err("gpiolib: failed to allocate char dev region\n");
4964 bus_unregister(&gpio_bus_type);
159f3cd9
GR
4965 } else {
4966 gpiolib_initialized = true;
4967 gpiochip_setup_devs();
3c702e99
LW
4968 }
4969 return ret;
4970}
4971core_initcall(gpiolib_dev_init);
4972
d2876d08
DB
4973#ifdef CONFIG_DEBUG_FS
4974
fdeb8e15 4975static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
d2876d08
DB
4976{
4977 unsigned i;
fdeb8e15
LW
4978 struct gpio_chip *chip = gdev->chip;
4979 unsigned gpio = gdev->base;
4980 struct gpio_desc *gdesc = &gdev->descs[0];
90fd2270
LW
4981 bool is_out;
4982 bool is_irq;
4983 bool active_low;
d2876d08 4984
fdeb8e15 4985 for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) {
ced433e2
MP
4986 if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) {
4987 if (gdesc->name) {
4988 seq_printf(s, " gpio-%-3d (%-20.20s)\n",
4989 gpio, gdesc->name);
4990 }
d2876d08 4991 continue;
ced433e2 4992 }
d2876d08 4993
372e722e 4994 gpiod_get_direction(gdesc);
d2876d08 4995 is_out = test_bit(FLAG_IS_OUT, &gdesc->flags);
d468bf9e 4996 is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags);
90fd2270
LW
4997 active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags);
4998 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s",
ced433e2 4999 gpio, gdesc->name ? gdesc->name : "", gdesc->label,
d2876d08 5000 is_out ? "out" : "in ",
1c22a252 5001 chip->get ? (chip->get(chip, i) ? "hi" : "lo") : "? ",
90fd2270
LW
5002 is_irq ? "IRQ " : "",
5003 active_low ? "ACTIVE LOW" : "");
d2876d08
DB
5004 seq_printf(s, "\n");
5005 }
5006}
5007
f9c4a31f 5008static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
d2876d08 5009{
362432ae 5010 unsigned long flags;
ff2b1359 5011 struct gpio_device *gdev = NULL;
cb1650d4 5012 loff_t index = *pos;
d2876d08 5013
f9c4a31f 5014 s->private = "";
d2876d08 5015
362432ae 5016 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 5017 list_for_each_entry(gdev, &gpio_devices, list)
362432ae
GL
5018 if (index-- == 0) {
5019 spin_unlock_irqrestore(&gpio_lock, flags);
ff2b1359 5020 return gdev;
f9c4a31f 5021 }
362432ae 5022 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f 5023
cb1650d4 5024 return NULL;
f9c4a31f
TR
5025}
5026
5027static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
5028{
362432ae 5029 unsigned long flags;
ff2b1359 5030 struct gpio_device *gdev = v;
f9c4a31f
TR
5031 void *ret = NULL;
5032
362432ae 5033 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 5034 if (list_is_last(&gdev->list, &gpio_devices))
cb1650d4
AC
5035 ret = NULL;
5036 else
ff2b1359 5037 ret = list_entry(gdev->list.next, struct gpio_device, list);
362432ae 5038 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f
TR
5039
5040 s->private = "\n";
5041 ++*pos;
5042
5043 return ret;
5044}
5045
5046static void gpiolib_seq_stop(struct seq_file *s, void *v)
5047{
5048}
5049
5050static int gpiolib_seq_show(struct seq_file *s, void *v)
5051{
ff2b1359
LW
5052 struct gpio_device *gdev = v;
5053 struct gpio_chip *chip = gdev->chip;
5054 struct device *parent;
5055
5056 if (!chip) {
5057 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
5058 dev_name(&gdev->dev));
5059 return 0;
5060 }
f9c4a31f 5061
ff2b1359
LW
5062 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
5063 dev_name(&gdev->dev),
fdeb8e15 5064 gdev->base, gdev->base + gdev->ngpio - 1);
ff2b1359
LW
5065 parent = chip->parent;
5066 if (parent)
5067 seq_printf(s, ", parent: %s/%s",
5068 parent->bus ? parent->bus->name : "no-bus",
5069 dev_name(parent));
f9c4a31f
TR
5070 if (chip->label)
5071 seq_printf(s, ", %s", chip->label);
5072 if (chip->can_sleep)
5073 seq_printf(s, ", can sleep");
5074 seq_printf(s, ":\n");
5075
5076 if (chip->dbg_show)
5077 chip->dbg_show(s, chip);
5078 else
fdeb8e15 5079 gpiolib_dbg_show(s, gdev);
f9c4a31f 5080
d2876d08
DB
5081 return 0;
5082}
5083
f9c4a31f
TR
5084static const struct seq_operations gpiolib_seq_ops = {
5085 .start = gpiolib_seq_start,
5086 .next = gpiolib_seq_next,
5087 .stop = gpiolib_seq_stop,
5088 .show = gpiolib_seq_show,
5089};
5090
d2876d08
DB
5091static int gpiolib_open(struct inode *inode, struct file *file)
5092{
f9c4a31f 5093 return seq_open(file, &gpiolib_seq_ops);
d2876d08
DB
5094}
5095
828c0950 5096static const struct file_operations gpiolib_operations = {
f9c4a31f 5097 .owner = THIS_MODULE,
d2876d08
DB
5098 .open = gpiolib_open,
5099 .read = seq_read,
5100 .llseek = seq_lseek,
f9c4a31f 5101 .release = seq_release,
d2876d08
DB
5102};
5103
5104static int __init gpiolib_debugfs_init(void)
5105{
5106 /* /sys/kernel/debug/gpio */
acc68b0e
GKH
5107 debugfs_create_file("gpio", S_IFREG | S_IRUGO, NULL, NULL,
5108 &gpiolib_operations);
d2876d08
DB
5109 return 0;
5110}
5111subsys_initcall(gpiolib_debugfs_init);
5112
5113#endif /* DEBUG_FS */