gpio: Add support for the Xylon LogiCVC GPIOs
[linux-block.git] / drivers / gpio / gpiolib.c
CommitLineData
dae5f0af 1// SPDX-License-Identifier: GPL-2.0
923a654c 2#include <linux/bitmap.h>
d2876d08
DB
3#include <linux/kernel.h>
4#include <linux/module.h>
ff77c352 5#include <linux/interrupt.h>
d2876d08
DB
6#include <linux/irq.h>
7#include <linux/spinlock.h>
1a989d0f 8#include <linux/list.h>
d8f388d8
DB
9#include <linux/device.h>
10#include <linux/err.h>
11#include <linux/debugfs.h>
12#include <linux/seq_file.h>
13#include <linux/gpio.h>
ff77c352 14#include <linux/idr.h>
5a0e3ad6 15#include <linux/slab.h>
7b199811 16#include <linux/acpi.h>
53e7cac3 17#include <linux/gpio/driver.h>
0a6d3158 18#include <linux/gpio/machine.h>
c771c2f4 19#include <linux/pinctrl/consumer.h>
3c702e99
LW
20#include <linux/cdev.h>
21#include <linux/fs.h>
22#include <linux/uaccess.h>
8b92e17e 23#include <linux/compat.h>
d7c51b47 24#include <linux/anon_inodes.h>
953b956a 25#include <linux/file.h>
61f922db
LW
26#include <linux/kfifo.h>
27#include <linux/poll.h>
28#include <linux/timekeeping.h>
3c702e99 29#include <uapi/linux/gpio.h>
d2876d08 30
664e3e5a 31#include "gpiolib.h"
f626d6df 32#include "gpiolib-of.h"
77cb907a 33#include "gpiolib-acpi.h"
664e3e5a 34
3f397c21
UKK
35#define CREATE_TRACE_POINTS
36#include <trace/events/gpio.h>
d2876d08 37
79a9becd 38/* Implementation infrastructure for GPIO interfaces.
d2876d08 39 *
79a9becd
AC
40 * The GPIO programming interface allows for inlining speed-critical
41 * get/set operations for common cases, so that access to SOC-integrated
42 * GPIOs can sometimes cost only an instruction or two per bit.
d2876d08
DB
43 */
44
45
46/* When debugging, extend minimal trust to callers and platform code.
47 * Also emit diagnostic messages that may help initial bringup, when
48 * board setup or driver bugs are most common.
49 *
50 * Otherwise, minimize overhead in what may be bitbanging codepaths.
51 */
52#ifdef DEBUG
53#define extra_checks 1
54#else
55#define extra_checks 0
56#endif
57
ff2b1359
LW
58/* Device and char device-related information */
59static DEFINE_IDA(gpio_ida);
3c702e99
LW
60static dev_t gpio_devt;
61#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
62static struct bus_type gpio_bus_type = {
63 .name = "gpio",
64};
ff2b1359 65
3027743f
LA
66/*
67 * Number of GPIOs to use for the fast path in set array
68 */
69#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
70
d2876d08
DB
71/* gpio_lock prevents conflicts during gpio_desc[] table updates.
72 * While any GPIO is requested, its gpio_chip is not removable;
73 * each GPIO's "requested" flag serves as a lock and refcount.
74 */
0eb4c6c2 75DEFINE_SPINLOCK(gpio_lock);
d2876d08 76
bae48da2
AC
77static DEFINE_MUTEX(gpio_lookup_lock);
78static LIST_HEAD(gpio_lookup_list);
ff2b1359 79LIST_HEAD(gpio_devices);
6d86750c 80
a411e81e
BG
81static DEFINE_MUTEX(gpio_machine_hogs_mutex);
82static LIST_HEAD(gpio_machine_hogs);
83
6d86750c 84static void gpiochip_free_hogs(struct gpio_chip *chip);
959bc7b2 85static int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
86 struct lock_class_key *lock_key,
87 struct lock_class_key *request_key);
6d86750c 88static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip);
9411e3aa 89static int gpiochip_irqchip_init_hw(struct gpio_chip *gpiochip);
79b804cb
MW
90static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip);
91static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip);
6d86750c 92
159f3cd9 93static bool gpiolib_initialized;
6d86750c 94
d2876d08
DB
95static inline void desc_set_label(struct gpio_desc *d, const char *label)
96{
d2876d08 97 d->label = label;
d2876d08
DB
98}
99
372e722e 100/**
950d55f5
TR
101 * gpio_to_desc - Convert a GPIO number to its descriptor
102 * @gpio: global GPIO number
103 *
104 * Returns:
105 * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
106 * with the given number exists in the system.
372e722e 107 */
79a9becd 108struct gpio_desc *gpio_to_desc(unsigned gpio)
372e722e 109{
ff2b1359 110 struct gpio_device *gdev;
14e85c0e
AC
111 unsigned long flags;
112
113 spin_lock_irqsave(&gpio_lock, flags);
114
ff2b1359 115 list_for_each_entry(gdev, &gpio_devices, list) {
fdeb8e15
LW
116 if (gdev->base <= gpio &&
117 gdev->base + gdev->ngpio > gpio) {
14e85c0e 118 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 119 return &gdev->descs[gpio - gdev->base];
14e85c0e
AC
120 }
121 }
122
123 spin_unlock_irqrestore(&gpio_lock, flags);
124
0e9a5edf
AC
125 if (!gpio_is_valid(gpio))
126 WARN(1, "invalid GPIO %d\n", gpio);
127
14e85c0e 128 return NULL;
372e722e 129}
79a9becd 130EXPORT_SYMBOL_GPL(gpio_to_desc);
372e722e 131
d468bf9e 132/**
950d55f5
TR
133 * gpiochip_get_desc - get the GPIO descriptor corresponding to the given
134 * hardware number for this chip
135 * @chip: GPIO chip
136 * @hwnum: hardware number of the GPIO for this chip
137 *
138 * Returns:
139 * A pointer to the GPIO descriptor or %ERR_PTR(-EINVAL) if no GPIO exists
140 * in the given chip for the specified hardware number.
d468bf9e 141 */
bb1e88cc
AC
142struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip,
143 u16 hwnum)
d468bf9e 144{
fdeb8e15
LW
145 struct gpio_device *gdev = chip->gpiodev;
146
147 if (hwnum >= gdev->ngpio)
b7d0a28a 148 return ERR_PTR(-EINVAL);
d468bf9e 149
fdeb8e15 150 return &gdev->descs[hwnum];
d468bf9e 151}
372e722e
AC
152
153/**
950d55f5
TR
154 * desc_to_gpio - convert a GPIO descriptor to the integer namespace
155 * @desc: GPIO descriptor
156 *
372e722e 157 * This should disappear in the future but is needed since we still
950d55f5
TR
158 * use GPIO numbers for error messages and sysfs nodes.
159 *
160 * Returns:
161 * The global GPIO number for the GPIO specified by its descriptor.
372e722e 162 */
79a9becd 163int desc_to_gpio(const struct gpio_desc *desc)
372e722e 164{
fdeb8e15 165 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
372e722e 166}
79a9becd 167EXPORT_SYMBOL_GPL(desc_to_gpio);
372e722e
AC
168
169
79a9becd
AC
170/**
171 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
172 * @desc: descriptor to return the chip of
173 */
174struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
372e722e 175{
dd3b9a44 176 if (!desc || !desc->gdev)
fdeb8e15
LW
177 return NULL;
178 return desc->gdev->chip;
372e722e 179}
79a9becd 180EXPORT_SYMBOL_GPL(gpiod_to_chip);
d2876d08 181
8d0aab2f
AV
182/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
183static int gpiochip_find_base(int ngpio)
184{
ff2b1359 185 struct gpio_device *gdev;
83cabe33 186 int base = ARCH_NR_GPIOS - ngpio;
8d0aab2f 187
ff2b1359 188 list_for_each_entry_reverse(gdev, &gpio_devices, list) {
83cabe33 189 /* found a free space? */
fdeb8e15 190 if (gdev->base + gdev->ngpio <= base)
83cabe33
AC
191 break;
192 else
193 /* nope, check the space right before the chip */
fdeb8e15 194 base = gdev->base - ngpio;
8d0aab2f
AV
195 }
196
83cabe33 197 if (gpio_is_valid(base)) {
8d0aab2f 198 pr_debug("%s: found new base at %d\n", __func__, base);
83cabe33
AC
199 return base;
200 } else {
201 pr_err("%s: cannot find free range\n", __func__);
202 return -ENOSPC;
169b6a7a 203 }
169b6a7a
AV
204}
205
79a9becd
AC
206/**
207 * gpiod_get_direction - return the current direction of a GPIO
208 * @desc: GPIO to get the direction of
209 *
94fc7309 210 * Returns 0 for output, 1 for input, or an error code in case of error.
79a9becd
AC
211 *
212 * This function may sleep if gpiod_cansleep() is true.
213 */
8e53b0f1 214int gpiod_get_direction(struct gpio_desc *desc)
80b0a602 215{
d0121b85
WS
216 struct gpio_chip *chip;
217 unsigned offset;
d377f56f 218 int ret;
80b0a602 219
372e722e
AC
220 chip = gpiod_to_chip(desc);
221 offset = gpio_chip_hwgpio(desc);
80b0a602
MN
222
223 if (!chip->get_direction)
d0121b85 224 return -ENOTSUPP;
80b0a602 225
d377f56f
LW
226 ret = chip->get_direction(chip, offset);
227 if (ret > 0) {
80b0a602 228 /* GPIOF_DIR_IN, or other positive */
d377f56f 229 ret = 1;
8e53b0f1 230 clear_bit(FLAG_IS_OUT, &desc->flags);
80b0a602 231 }
d377f56f 232 if (ret == 0) {
80b0a602 233 /* GPIOF_DIR_OUT */
8e53b0f1 234 set_bit(FLAG_IS_OUT, &desc->flags);
80b0a602 235 }
d377f56f 236 return ret;
80b0a602 237}
79a9becd 238EXPORT_SYMBOL_GPL(gpiod_get_direction);
80b0a602 239
1a989d0f
AC
240/*
241 * Add a new chip to the global chips list, keeping the list of chips sorted
ef7c7553 242 * by range(means [base, base + ngpio - 1]) order.
1a989d0f
AC
243 *
244 * Return -EBUSY if the new chip overlaps with some other chip's integer
245 * space.
246 */
ff2b1359 247static int gpiodev_add_to_list(struct gpio_device *gdev)
1a989d0f 248{
a961f9b4 249 struct gpio_device *prev, *next;
1a989d0f 250
ff2b1359 251 if (list_empty(&gpio_devices)) {
a961f9b4 252 /* initial entry in list */
ff2b1359 253 list_add_tail(&gdev->list, &gpio_devices);
e28ecca6 254 return 0;
1a989d0f
AC
255 }
256
a961f9b4
BJZ
257 next = list_entry(gpio_devices.next, struct gpio_device, list);
258 if (gdev->base + gdev->ngpio <= next->base) {
259 /* add before first entry */
260 list_add(&gdev->list, &gpio_devices);
261 return 0;
1a989d0f
AC
262 }
263
a961f9b4
BJZ
264 prev = list_entry(gpio_devices.prev, struct gpio_device, list);
265 if (prev->base + prev->ngpio <= gdev->base) {
266 /* add behind last entry */
267 list_add_tail(&gdev->list, &gpio_devices);
96098df1 268 return 0;
1a989d0f
AC
269 }
270
a961f9b4
BJZ
271 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
272 /* at the end of the list */
273 if (&next->list == &gpio_devices)
274 break;
1a989d0f 275
a961f9b4
BJZ
276 /* add between prev and next */
277 if (prev->base + prev->ngpio <= gdev->base
278 && gdev->base + gdev->ngpio <= next->base) {
279 list_add(&gdev->list, &prev->list);
280 return 0;
281 }
282 }
283
284 dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n");
285 return -EBUSY;
1a989d0f
AC
286}
287
950d55f5 288/*
f881bab0
LW
289 * Convert a GPIO name to its descriptor
290 */
291static struct gpio_desc *gpio_name_to_desc(const char * const name)
292{
ff2b1359 293 struct gpio_device *gdev;
f881bab0
LW
294 unsigned long flags;
295
296 spin_lock_irqsave(&gpio_lock, flags);
297
ff2b1359 298 list_for_each_entry(gdev, &gpio_devices, list) {
f881bab0
LW
299 int i;
300
fdeb8e15
LW
301 for (i = 0; i != gdev->ngpio; ++i) {
302 struct gpio_desc *desc = &gdev->descs[i];
f881bab0 303
fdeb8e15 304 if (!desc->name || !name)
f881bab0
LW
305 continue;
306
fdeb8e15 307 if (!strcmp(desc->name, name)) {
f881bab0 308 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 309 return desc;
f881bab0
LW
310 }
311 }
312 }
313
314 spin_unlock_irqrestore(&gpio_lock, flags);
315
316 return NULL;
317}
318
5f3ca732
MP
319/*
320 * Takes the names from gc->names and checks if they are all unique. If they
321 * are, they are assigned to their gpio descriptors.
322 *
ed37915c 323 * Warning if one of the names is already used for a different GPIO.
5f3ca732
MP
324 */
325static int gpiochip_set_desc_names(struct gpio_chip *gc)
326{
fdeb8e15 327 struct gpio_device *gdev = gc->gpiodev;
5f3ca732
MP
328 int i;
329
330 if (!gc->names)
331 return 0;
332
333 /* First check all names if they are unique */
334 for (i = 0; i != gc->ngpio; ++i) {
335 struct gpio_desc *gpio;
336
337 gpio = gpio_name_to_desc(gc->names[i]);
f881bab0 338 if (gpio)
fdeb8e15 339 dev_warn(&gdev->dev,
34ffd85d 340 "Detected name collision for GPIO name '%s'\n",
f881bab0 341 gc->names[i]);
5f3ca732
MP
342 }
343
344 /* Then add all names to the GPIO descriptors */
345 for (i = 0; i != gc->ngpio; ++i)
fdeb8e15 346 gdev->descs[i].name = gc->names[i];
5f3ca732
MP
347
348 return 0;
349}
350
e4371f6e
SB
351static unsigned long *gpiochip_allocate_mask(struct gpio_chip *chip)
352{
353 unsigned long *p;
354
7bdbd1ec 355 p = bitmap_alloc(chip->ngpio, GFP_KERNEL);
e4371f6e
SB
356 if (!p)
357 return NULL;
358
359 /* Assume by default all GPIOs are valid */
360 bitmap_fill(p, chip->ngpio);
361
362 return p;
363}
364
f626d6df 365static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
726cb3ba 366{
eb1e8bd6 367 if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask))
726cb3ba
SB
368 return 0;
369
f626d6df
LW
370 gc->valid_mask = gpiochip_allocate_mask(gc);
371 if (!gc->valid_mask)
726cb3ba
SB
372 return -ENOMEM;
373
374 return 0;
375}
376
c9fc5aff 377static int gpiochip_init_valid_mask(struct gpio_chip *gc)
f8ec92a9 378{
c9fc5aff
LW
379 if (gc->init_valid_mask)
380 return gc->init_valid_mask(gc,
381 gc->valid_mask,
382 gc->ngpio);
f8ec92a9
RRD
383
384 return 0;
385}
386
726cb3ba
SB
387static void gpiochip_free_valid_mask(struct gpio_chip *gpiochip)
388{
7bdbd1ec 389 bitmap_free(gpiochip->valid_mask);
726cb3ba
SB
390 gpiochip->valid_mask = NULL;
391}
392
b056ca1c
AS
393static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
394{
395 if (gc->add_pin_ranges)
396 return gc->add_pin_ranges(gc);
397
398 return 0;
399}
400
726cb3ba
SB
401bool gpiochip_line_is_valid(const struct gpio_chip *gpiochip,
402 unsigned int offset)
403{
404 /* No mask means all valid */
405 if (likely(!gpiochip->valid_mask))
406 return true;
407 return test_bit(offset, gpiochip->valid_mask);
408}
409EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
410
d7c51b47
LW
411/*
412 * GPIO line handle management
413 */
414
415/**
416 * struct linehandle_state - contains the state of a userspace handle
417 * @gdev: the GPIO device the handle pertains to
418 * @label: consumer label used to tag descriptors
419 * @descs: the GPIO descriptors held by this handle
420 * @numdescs: the number of descriptors held in the descs array
421 */
422struct linehandle_state {
423 struct gpio_device *gdev;
424 const char *label;
425 struct gpio_desc *descs[GPIOHANDLES_MAX];
426 u32 numdescs;
427};
428
e3e847c7
LPC
429#define GPIOHANDLE_REQUEST_VALID_FLAGS \
430 (GPIOHANDLE_REQUEST_INPUT | \
431 GPIOHANDLE_REQUEST_OUTPUT | \
432 GPIOHANDLE_REQUEST_ACTIVE_LOW | \
9225d516
DF
433 GPIOHANDLE_REQUEST_BIAS_PULL_UP | \
434 GPIOHANDLE_REQUEST_BIAS_PULL_DOWN | \
2148ad77 435 GPIOHANDLE_REQUEST_BIAS_DISABLE | \
e3e847c7
LPC
436 GPIOHANDLE_REQUEST_OPEN_DRAIN | \
437 GPIOHANDLE_REQUEST_OPEN_SOURCE)
438
b043ed7e
KG
439static int linehandle_validate_flags(u32 flags)
440{
441 /* Return an error if an unknown flag is set */
442 if (flags & ~GPIOHANDLE_REQUEST_VALID_FLAGS)
443 return -EINVAL;
444
445 /*
446 * Do not allow both INPUT & OUTPUT flags to be set as they are
447 * contradictory.
448 */
449 if ((flags & GPIOHANDLE_REQUEST_INPUT) &&
450 (flags & GPIOHANDLE_REQUEST_OUTPUT))
451 return -EINVAL;
452
453 /*
454 * Do not allow OPEN_SOURCE & OPEN_DRAIN flags in a single request. If
455 * the hardware actually supports enabling both at the same time the
456 * electrical result would be disastrous.
457 */
458 if ((flags & GPIOHANDLE_REQUEST_OPEN_DRAIN) &&
459 (flags & GPIOHANDLE_REQUEST_OPEN_SOURCE))
460 return -EINVAL;
461
462 /* OPEN_DRAIN and OPEN_SOURCE flags only make sense for output mode. */
463 if (!(flags & GPIOHANDLE_REQUEST_OUTPUT) &&
464 ((flags & GPIOHANDLE_REQUEST_OPEN_DRAIN) ||
465 (flags & GPIOHANDLE_REQUEST_OPEN_SOURCE)))
466 return -EINVAL;
467
468 /* Bias flags only allowed for input or output mode. */
469 if (!((flags & GPIOHANDLE_REQUEST_INPUT) ||
470 (flags & GPIOHANDLE_REQUEST_OUTPUT)) &&
471 ((flags & GPIOHANDLE_REQUEST_BIAS_DISABLE) ||
472 (flags & GPIOHANDLE_REQUEST_BIAS_PULL_UP) ||
473 (flags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)))
474 return -EINVAL;
475
476 /* Only one bias flag can be set. */
477 if (((flags & GPIOHANDLE_REQUEST_BIAS_DISABLE) &&
478 (flags & (GPIOHANDLE_REQUEST_BIAS_PULL_DOWN |
479 GPIOHANDLE_REQUEST_BIAS_PULL_UP))) ||
480 ((flags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) &&
481 (flags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)))
482 return -EINVAL;
483
484 return 0;
485}
486
e588bb1e
KG
487static void linehandle_configure_flag(unsigned long *flagsp,
488 u32 bit, bool active)
489{
490 if (active)
491 set_bit(bit, flagsp);
492 else
493 clear_bit(bit, flagsp);
494}
495
496static long linehandle_set_config(struct linehandle_state *lh,
497 void __user *ip)
498{
499 struct gpiohandle_config gcnf;
500 struct gpio_desc *desc;
501 int i, ret;
502 u32 lflags;
503 unsigned long *flagsp;
504
505 if (copy_from_user(&gcnf, ip, sizeof(gcnf)))
506 return -EFAULT;
507
508 lflags = gcnf.flags;
509 ret = linehandle_validate_flags(lflags);
510 if (ret)
511 return ret;
512
513 for (i = 0; i < lh->numdescs; i++) {
514 desc = lh->descs[i];
515 flagsp = &desc->flags;
516
517 linehandle_configure_flag(flagsp, FLAG_ACTIVE_LOW,
518 lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW);
519
520 linehandle_configure_flag(flagsp, FLAG_OPEN_DRAIN,
521 lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN);
522
523 linehandle_configure_flag(flagsp, FLAG_OPEN_SOURCE,
524 lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE);
525
526 linehandle_configure_flag(flagsp, FLAG_PULL_UP,
527 lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP);
528
529 linehandle_configure_flag(flagsp, FLAG_PULL_DOWN,
530 lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN);
531
532 linehandle_configure_flag(flagsp, FLAG_BIAS_DISABLE,
533 lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE);
534
535 /*
536 * Lines have to be requested explicitly for input
537 * or output, else the line will be treated "as is".
538 */
539 if (lflags & GPIOHANDLE_REQUEST_OUTPUT) {
540 int val = !!gcnf.default_values[i];
541
542 ret = gpiod_direction_output(desc, val);
543 if (ret)
544 return ret;
545 } else if (lflags & GPIOHANDLE_REQUEST_INPUT) {
546 ret = gpiod_direction_input(desc);
547 if (ret)
548 return ret;
549 }
550 }
551 return 0;
552}
553
d7c51b47
LW
554static long linehandle_ioctl(struct file *filep, unsigned int cmd,
555 unsigned long arg)
556{
557 struct linehandle_state *lh = filep->private_data;
558 void __user *ip = (void __user *)arg;
559 struct gpiohandle_data ghd;
b9762beb 560 DECLARE_BITMAP(vals, GPIOHANDLES_MAX);
d7c51b47
LW
561 int i;
562
563 if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) {
2b955b34 564 /* NOTE: It's ok to read values of output lines. */
eec1d566
LW
565 int ret = gpiod_get_array_value_complex(false,
566 true,
567 lh->numdescs,
568 lh->descs,
77588c14 569 NULL,
eec1d566
LW
570 vals);
571 if (ret)
572 return ret;
d7c51b47 573
3eded5d8 574 memset(&ghd, 0, sizeof(ghd));
eec1d566 575 for (i = 0; i < lh->numdescs; i++)
b9762beb 576 ghd.values[i] = test_bit(i, vals);
d7c51b47
LW
577
578 if (copy_to_user(ip, &ghd, sizeof(ghd)))
579 return -EFAULT;
580
581 return 0;
582 } else if (cmd == GPIOHANDLE_SET_LINE_VALUES_IOCTL) {
e5332d54
BG
583 /*
584 * All line descriptors were created at once with the same
585 * flags so just check if the first one is really output.
586 */
587 if (!test_bit(FLAG_IS_OUT, &lh->descs[0]->flags))
588 return -EPERM;
589
d7c51b47
LW
590 if (copy_from_user(&ghd, ip, sizeof(ghd)))
591 return -EFAULT;
592
593 /* Clamp all values to [0,1] */
594 for (i = 0; i < lh->numdescs; i++)
b9762beb 595 __assign_bit(i, vals, ghd.values[i]);
d7c51b47
LW
596
597 /* Reuse the array setting function */
3027743f 598 return gpiod_set_array_value_complex(false,
d7c51b47
LW
599 true,
600 lh->numdescs,
601 lh->descs,
77588c14 602 NULL,
d7c51b47 603 vals);
e588bb1e
KG
604 } else if (cmd == GPIOHANDLE_SET_CONFIG_IOCTL) {
605 return linehandle_set_config(lh, ip);
d7c51b47
LW
606 }
607 return -EINVAL;
608}
609
610#ifdef CONFIG_COMPAT
611static long linehandle_ioctl_compat(struct file *filep, unsigned int cmd,
612 unsigned long arg)
613{
614 return linehandle_ioctl(filep, cmd, (unsigned long)compat_ptr(arg));
615}
616#endif
617
618static int linehandle_release(struct inode *inode, struct file *filep)
619{
620 struct linehandle_state *lh = filep->private_data;
621 struct gpio_device *gdev = lh->gdev;
622 int i;
623
624 for (i = 0; i < lh->numdescs; i++)
625 gpiod_free(lh->descs[i]);
626 kfree(lh->label);
627 kfree(lh);
628 put_device(&gdev->dev);
629 return 0;
630}
631
632static const struct file_operations linehandle_fileops = {
633 .release = linehandle_release,
634 .owner = THIS_MODULE,
635 .llseek = noop_llseek,
636 .unlocked_ioctl = linehandle_ioctl,
637#ifdef CONFIG_COMPAT
638 .compat_ioctl = linehandle_ioctl_compat,
639#endif
640};
641
642static int linehandle_create(struct gpio_device *gdev, void __user *ip)
643{
644 struct gpiohandle_request handlereq;
645 struct linehandle_state *lh;
953b956a 646 struct file *file;
ab3dbcf7 647 int fd, i, count = 0, ret;
418ee8e9 648 u32 lflags;
d7c51b47
LW
649
650 if (copy_from_user(&handlereq, ip, sizeof(handlereq)))
651 return -EFAULT;
652 if ((handlereq.lines == 0) || (handlereq.lines > GPIOHANDLES_MAX))
653 return -EINVAL;
654
418ee8e9
BG
655 lflags = handlereq.flags;
656
b043ed7e
KG
657 ret = linehandle_validate_flags(lflags);
658 if (ret)
659 return ret;
2148ad77 660
d7c51b47
LW
661 lh = kzalloc(sizeof(*lh), GFP_KERNEL);
662 if (!lh)
663 return -ENOMEM;
664 lh->gdev = gdev;
665 get_device(&gdev->dev);
666
667 /* Make sure this is terminated */
668 handlereq.consumer_label[sizeof(handlereq.consumer_label)-1] = '\0';
669 if (strlen(handlereq.consumer_label)) {
670 lh->label = kstrdup(handlereq.consumer_label,
671 GFP_KERNEL);
672 if (!lh->label) {
673 ret = -ENOMEM;
674 goto out_free_lh;
675 }
676 }
677
678 /* Request each GPIO */
679 for (i = 0; i < handlereq.lines; i++) {
680 u32 offset = handlereq.lineoffsets[i];
d7c51b47
LW
681 struct gpio_desc *desc;
682
e405f9fc
LPC
683 if (offset >= gdev->ngpio) {
684 ret = -EINVAL;
685 goto out_free_descs;
686 }
687
d7c51b47
LW
688 desc = &gdev->descs[offset];
689 ret = gpiod_request(desc, lh->label);
690 if (ret)
691 goto out_free_descs;
692 lh->descs[i] = desc;
19a4fbff 693 count = i + 1;
d7c51b47
LW
694
695 if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW)
696 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
697 if (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN)
698 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
699 if (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE)
700 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
2148ad77
KG
701 if (lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE)
702 set_bit(FLAG_BIAS_DISABLE, &desc->flags);
9225d516
DF
703 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)
704 set_bit(FLAG_PULL_DOWN, &desc->flags);
705 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)
706 set_bit(FLAG_PULL_UP, &desc->flags);
d7c51b47 707
e10f72bf
AJ
708 ret = gpiod_set_transitory(desc, false);
709 if (ret < 0)
710 goto out_free_descs;
711
d7c51b47
LW
712 /*
713 * Lines have to be requested explicitly for input
714 * or output, else the line will be treated "as is".
715 */
716 if (lflags & GPIOHANDLE_REQUEST_OUTPUT) {
717 int val = !!handlereq.default_values[i];
718
719 ret = gpiod_direction_output(desc, val);
720 if (ret)
721 goto out_free_descs;
722 } else if (lflags & GPIOHANDLE_REQUEST_INPUT) {
723 ret = gpiod_direction_input(desc);
724 if (ret)
725 goto out_free_descs;
726 }
727 dev_dbg(&gdev->dev, "registered chardev handle for line %d\n",
728 offset);
729 }
e2f608be
LW
730 /* Let i point at the last handle */
731 i--;
d7c51b47
LW
732 lh->numdescs = handlereq.lines;
733
953b956a 734 fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);
d7c51b47
LW
735 if (fd < 0) {
736 ret = fd;
737 goto out_free_descs;
738 }
739
953b956a
LPC
740 file = anon_inode_getfile("gpio-linehandle",
741 &linehandle_fileops,
742 lh,
743 O_RDONLY | O_CLOEXEC);
744 if (IS_ERR(file)) {
745 ret = PTR_ERR(file);
746 goto out_put_unused_fd;
747 }
748
d7c51b47 749 handlereq.fd = fd;
d932cd49 750 if (copy_to_user(ip, &handlereq, sizeof(handlereq))) {
953b956a
LPC
751 /*
752 * fput() will trigger the release() callback, so do not go onto
753 * the regular error cleanup path here.
754 */
755 fput(file);
756 put_unused_fd(fd);
757 return -EFAULT;
d932cd49 758 }
d7c51b47 759
953b956a
LPC
760 fd_install(fd, file);
761
d7c51b47
LW
762 dev_dbg(&gdev->dev, "registered chardev handle for %d lines\n",
763 lh->numdescs);
764
765 return 0;
766
953b956a
LPC
767out_put_unused_fd:
768 put_unused_fd(fd);
d7c51b47 769out_free_descs:
ab3dbcf7 770 for (i = 0; i < count; i++)
d7c51b47
LW
771 gpiod_free(lh->descs[i]);
772 kfree(lh->label);
773out_free_lh:
774 kfree(lh);
775 put_device(&gdev->dev);
776 return ret;
777}
778
61f922db
LW
779/*
780 * GPIO line event management
781 */
782
783/**
784 * struct lineevent_state - contains the state of a userspace event
785 * @gdev: the GPIO device the event pertains to
786 * @label: consumer label used to tag descriptors
787 * @desc: the GPIO descriptor held by this event
788 * @eflags: the event flags this line was requested with
789 * @irq: the interrupt that trigger in response to events on this GPIO
790 * @wait: wait queue that handles blocking reads of events
791 * @events: KFIFO for the GPIO events
792 * @read_lock: mutex lock to protect reads from colliding with adding
793 * new events to the FIFO
d58f2bf2
LW
794 * @timestamp: cache for the timestamp storing it between hardirq
795 * and IRQ thread, used to bring the timestamp close to the actual
796 * event
61f922db
LW
797 */
798struct lineevent_state {
799 struct gpio_device *gdev;
800 const char *label;
801 struct gpio_desc *desc;
802 u32 eflags;
803 int irq;
804 wait_queue_head_t wait;
805 DECLARE_KFIFO(events, struct gpioevent_data, 16);
806 struct mutex read_lock;
d58f2bf2 807 u64 timestamp;
61f922db
LW
808};
809
ac7dbb99
LPC
810#define GPIOEVENT_REQUEST_VALID_FLAGS \
811 (GPIOEVENT_REQUEST_RISING_EDGE | \
812 GPIOEVENT_REQUEST_FALLING_EDGE)
813
afc9a42b 814static __poll_t lineevent_poll(struct file *filep,
61f922db
LW
815 struct poll_table_struct *wait)
816{
817 struct lineevent_state *le = filep->private_data;
afc9a42b 818 __poll_t events = 0;
61f922db
LW
819
820 poll_wait(filep, &le->wait, wait);
821
822 if (!kfifo_is_empty(&le->events))
a9a08845 823 events = EPOLLIN | EPOLLRDNORM;
61f922db
LW
824
825 return events;
826}
827
828
829static ssize_t lineevent_read(struct file *filep,
830 char __user *buf,
831 size_t count,
832 loff_t *f_ps)
833{
834 struct lineevent_state *le = filep->private_data;
835 unsigned int copied;
836 int ret;
837
838 if (count < sizeof(struct gpioevent_data))
839 return -EINVAL;
840
841 do {
842 if (kfifo_is_empty(&le->events)) {
843 if (filep->f_flags & O_NONBLOCK)
844 return -EAGAIN;
845
846 ret = wait_event_interruptible(le->wait,
847 !kfifo_is_empty(&le->events));
848 if (ret)
849 return ret;
850 }
851
852 if (mutex_lock_interruptible(&le->read_lock))
853 return -ERESTARTSYS;
854 ret = kfifo_to_user(&le->events, buf, count, &copied);
855 mutex_unlock(&le->read_lock);
856
857 if (ret)
858 return ret;
859
860 /*
861 * If we couldn't read anything from the fifo (a different
862 * thread might have been faster) we either return -EAGAIN if
863 * the file descriptor is non-blocking, otherwise we go back to
864 * sleep and wait for more data to arrive.
865 */
866 if (copied == 0 && (filep->f_flags & O_NONBLOCK))
867 return -EAGAIN;
868
869 } while (copied == 0);
870
871 return copied;
872}
873
874static int lineevent_release(struct inode *inode, struct file *filep)
875{
876 struct lineevent_state *le = filep->private_data;
877 struct gpio_device *gdev = le->gdev;
878
879 free_irq(le->irq, le);
880 gpiod_free(le->desc);
881 kfree(le->label);
882 kfree(le);
883 put_device(&gdev->dev);
884 return 0;
885}
886
887static long lineevent_ioctl(struct file *filep, unsigned int cmd,
888 unsigned long arg)
889{
890 struct lineevent_state *le = filep->private_data;
891 void __user *ip = (void __user *)arg;
892 struct gpiohandle_data ghd;
893
894 /*
895 * We can get the value for an event line but not set it,
896 * because it is input by definition.
897 */
898 if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) {
899 int val;
900
d82aa4a8
LPC
901 memset(&ghd, 0, sizeof(ghd));
902
61f922db
LW
903 val = gpiod_get_value_cansleep(le->desc);
904 if (val < 0)
905 return val;
906 ghd.values[0] = val;
907
908 if (copy_to_user(ip, &ghd, sizeof(ghd)))
909 return -EFAULT;
910
911 return 0;
912 }
913 return -EINVAL;
914}
915
916#ifdef CONFIG_COMPAT
917static long lineevent_ioctl_compat(struct file *filep, unsigned int cmd,
918 unsigned long arg)
919{
920 return lineevent_ioctl(filep, cmd, (unsigned long)compat_ptr(arg));
921}
922#endif
923
924static const struct file_operations lineevent_fileops = {
925 .release = lineevent_release,
926 .read = lineevent_read,
927 .poll = lineevent_poll,
928 .owner = THIS_MODULE,
929 .llseek = noop_llseek,
930 .unlocked_ioctl = lineevent_ioctl,
931#ifdef CONFIG_COMPAT
932 .compat_ioctl = lineevent_ioctl_compat,
933#endif
934};
935
33265b17 936static irqreturn_t lineevent_irq_thread(int irq, void *p)
61f922db
LW
937{
938 struct lineevent_state *le = p;
939 struct gpioevent_data ge;
fa38869b 940 int ret;
61f922db 941
24bd3efc
LW
942 /* Do not leak kernel stack to userspace */
943 memset(&ge, 0, sizeof(ge));
944
1033be58
BG
945 /*
946 * We may be running from a nested threaded interrupt in which case
947 * we didn't get the timestamp from lineevent_irq_handler().
948 */
949 if (!le->timestamp)
950 ge.timestamp = ktime_get_real_ns();
951 else
952 ge.timestamp = le->timestamp;
61f922db 953
ad537b82
BG
954 if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE
955 && le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) {
fa38869b 956 int level = gpiod_get_value_cansleep(le->desc);
61f922db
LW
957 if (level)
958 /* Emit low-to-high event */
959 ge.id = GPIOEVENT_EVENT_RISING_EDGE;
960 else
961 /* Emit high-to-low event */
962 ge.id = GPIOEVENT_EVENT_FALLING_EDGE;
fa38869b 963 } else if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE) {
61f922db
LW
964 /* Emit low-to-high event */
965 ge.id = GPIOEVENT_EVENT_RISING_EDGE;
fa38869b 966 } else if (le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) {
61f922db
LW
967 /* Emit high-to-low event */
968 ge.id = GPIOEVENT_EVENT_FALLING_EDGE;
bc0207a5
AB
969 } else {
970 return IRQ_NONE;
61f922db
LW
971 }
972
973 ret = kfifo_put(&le->events, ge);
2efc6bfa 974 if (ret)
a9a08845 975 wake_up_poll(&le->wait, EPOLLIN);
61f922db
LW
976
977 return IRQ_HANDLED;
978}
979
d58f2bf2
LW
980static irqreturn_t lineevent_irq_handler(int irq, void *p)
981{
982 struct lineevent_state *le = p;
983
984 /*
985 * Just store the timestamp in hardirq context so we get it as
986 * close in time as possible to the actual event.
987 */
988 le->timestamp = ktime_get_real_ns();
989
990 return IRQ_WAKE_THREAD;
991}
992
61f922db
LW
993static int lineevent_create(struct gpio_device *gdev, void __user *ip)
994{
995 struct gpioevent_request eventreq;
996 struct lineevent_state *le;
997 struct gpio_desc *desc;
953b956a 998 struct file *file;
61f922db
LW
999 u32 offset;
1000 u32 lflags;
1001 u32 eflags;
1002 int fd;
1003 int ret;
1004 int irqflags = 0;
1005
1006 if (copy_from_user(&eventreq, ip, sizeof(eventreq)))
1007 return -EFAULT;
1008
bcc6d99a
BG
1009 offset = eventreq.lineoffset;
1010 lflags = eventreq.handleflags;
1011 eflags = eventreq.eventflags;
1012
1013 if (offset >= gdev->ngpio)
1014 return -EINVAL;
1015
1016 /* Return an error if a unknown flag is set */
1017 if ((lflags & ~GPIOHANDLE_REQUEST_VALID_FLAGS) ||
1018 (eflags & ~GPIOEVENT_REQUEST_VALID_FLAGS))
1019 return -EINVAL;
1020
1021 /* This is just wrong: we don't look for events on output lines */
1022 if ((lflags & GPIOHANDLE_REQUEST_OUTPUT) ||
1023 (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN) ||
1024 (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE))
1025 return -EINVAL;
1026
2148ad77
KG
1027 /* Only one bias flag can be set. */
1028 if (((lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE) &&
1029 (lflags & (GPIOHANDLE_REQUEST_BIAS_PULL_DOWN |
1030 GPIOHANDLE_REQUEST_BIAS_PULL_UP))) ||
1031 ((lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) &&
1032 (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)))
1033 return -EINVAL;
1034
61f922db
LW
1035 le = kzalloc(sizeof(*le), GFP_KERNEL);
1036 if (!le)
1037 return -ENOMEM;
1038 le->gdev = gdev;
1039 get_device(&gdev->dev);
1040
1041 /* Make sure this is terminated */
1042 eventreq.consumer_label[sizeof(eventreq.consumer_label)-1] = '\0';
1043 if (strlen(eventreq.consumer_label)) {
1044 le->label = kstrdup(eventreq.consumer_label,
1045 GFP_KERNEL);
1046 if (!le->label) {
1047 ret = -ENOMEM;
1048 goto out_free_le;
1049 }
1050 }
1051
61f922db
LW
1052 desc = &gdev->descs[offset];
1053 ret = gpiod_request(desc, le->label);
1054 if (ret)
f001cc35 1055 goto out_free_label;
61f922db
LW
1056 le->desc = desc;
1057 le->eflags = eflags;
1058
1059 if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW)
1060 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
2148ad77
KG
1061 if (lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE)
1062 set_bit(FLAG_BIAS_DISABLE, &desc->flags);
7b479a84
KG
1063 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)
1064 set_bit(FLAG_PULL_DOWN, &desc->flags);
1065 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)
1066 set_bit(FLAG_PULL_UP, &desc->flags);
61f922db
LW
1067
1068 ret = gpiod_direction_input(desc);
1069 if (ret)
1070 goto out_free_desc;
1071
1072 le->irq = gpiod_to_irq(desc);
1073 if (le->irq <= 0) {
1074 ret = -ENODEV;
1075 goto out_free_desc;
1076 }
1077
1078 if (eflags & GPIOEVENT_REQUEST_RISING_EDGE)
223ecaf1
MW
1079 irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
1080 IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING;
61f922db 1081 if (eflags & GPIOEVENT_REQUEST_FALLING_EDGE)
223ecaf1
MW
1082 irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
1083 IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING;
61f922db 1084 irqflags |= IRQF_ONESHOT;
61f922db
LW
1085
1086 INIT_KFIFO(le->events);
1087 init_waitqueue_head(&le->wait);
1088 mutex_init(&le->read_lock);
1089
1090 /* Request a thread to read the events */
1091 ret = request_threaded_irq(le->irq,
d58f2bf2 1092 lineevent_irq_handler,
61f922db
LW
1093 lineevent_irq_thread,
1094 irqflags,
1095 le->label,
1096 le);
1097 if (ret)
1098 goto out_free_desc;
1099
953b956a 1100 fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);
61f922db
LW
1101 if (fd < 0) {
1102 ret = fd;
1103 goto out_free_irq;
1104 }
1105
953b956a
LPC
1106 file = anon_inode_getfile("gpio-event",
1107 &lineevent_fileops,
1108 le,
1109 O_RDONLY | O_CLOEXEC);
1110 if (IS_ERR(file)) {
1111 ret = PTR_ERR(file);
1112 goto out_put_unused_fd;
1113 }
1114
61f922db 1115 eventreq.fd = fd;
d932cd49 1116 if (copy_to_user(ip, &eventreq, sizeof(eventreq))) {
953b956a
LPC
1117 /*
1118 * fput() will trigger the release() callback, so do not go onto
1119 * the regular error cleanup path here.
1120 */
1121 fput(file);
1122 put_unused_fd(fd);
1123 return -EFAULT;
d932cd49 1124 }
61f922db 1125
953b956a
LPC
1126 fd_install(fd, file);
1127
61f922db
LW
1128 return 0;
1129
953b956a
LPC
1130out_put_unused_fd:
1131 put_unused_fd(fd);
61f922db
LW
1132out_free_irq:
1133 free_irq(le->irq, le);
1134out_free_desc:
1135 gpiod_free(le->desc);
1136out_free_label:
1137 kfree(le->label);
1138out_free_le:
1139 kfree(le);
1140 put_device(&gdev->dev);
1141 return ret;
1142}
1143
950d55f5 1144/*
3c702e99
LW
1145 * gpio_ioctl() - ioctl handler for the GPIO chardev
1146 */
1147static long gpio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
1148{
1149 struct gpio_device *gdev = filp->private_data;
1150 struct gpio_chip *chip = gdev->chip;
8b92e17e 1151 void __user *ip = (void __user *)arg;
3c702e99
LW
1152
1153 /* We fail any subsequent ioctl():s when the chip is gone */
1154 if (!chip)
1155 return -ENODEV;
1156
521a2ad6 1157 /* Fill in the struct and pass to userspace */
3c702e99 1158 if (cmd == GPIO_GET_CHIPINFO_IOCTL) {
521a2ad6
LW
1159 struct gpiochip_info chipinfo;
1160
0f4bbb23
LPC
1161 memset(&chipinfo, 0, sizeof(chipinfo));
1162
3c702e99
LW
1163 strncpy(chipinfo.name, dev_name(&gdev->dev),
1164 sizeof(chipinfo.name));
1165 chipinfo.name[sizeof(chipinfo.name)-1] = '\0';
df4878e9
LW
1166 strncpy(chipinfo.label, gdev->label,
1167 sizeof(chipinfo.label));
1168 chipinfo.label[sizeof(chipinfo.label)-1] = '\0';
fdeb8e15 1169 chipinfo.lines = gdev->ngpio;
3c702e99
LW
1170 if (copy_to_user(ip, &chipinfo, sizeof(chipinfo)))
1171 return -EFAULT;
1172 return 0;
521a2ad6
LW
1173 } else if (cmd == GPIO_GET_LINEINFO_IOCTL) {
1174 struct gpioline_info lineinfo;
1175 struct gpio_desc *desc;
1176
1177 if (copy_from_user(&lineinfo, ip, sizeof(lineinfo)))
1178 return -EFAULT;
1f1cc456 1179 if (lineinfo.line_offset >= gdev->ngpio)
521a2ad6
LW
1180 return -EINVAL;
1181
1182 desc = &gdev->descs[lineinfo.line_offset];
1183 if (desc->name) {
1184 strncpy(lineinfo.name, desc->name,
1185 sizeof(lineinfo.name));
1186 lineinfo.name[sizeof(lineinfo.name)-1] = '\0';
1187 } else {
1188 lineinfo.name[0] = '\0';
1189 }
1190 if (desc->label) {
214338e3
LW
1191 strncpy(lineinfo.consumer, desc->label,
1192 sizeof(lineinfo.consumer));
1193 lineinfo.consumer[sizeof(lineinfo.consumer)-1] = '\0';
521a2ad6 1194 } else {
214338e3 1195 lineinfo.consumer[0] = '\0';
521a2ad6
LW
1196 }
1197
1198 /*
1199 * Userspace only need to know that the kernel is using
1200 * this GPIO so it can't use it.
1201 */
1202 lineinfo.flags = 0;
9d8cc89c
LW
1203 if (test_bit(FLAG_REQUESTED, &desc->flags) ||
1204 test_bit(FLAG_IS_HOGGED, &desc->flags) ||
1205 test_bit(FLAG_USED_AS_IRQ, &desc->flags) ||
1206 test_bit(FLAG_EXPORT, &desc->flags) ||
472a61e7
SW
1207 test_bit(FLAG_SYSFS, &desc->flags) ||
1208 !pinctrl_gpio_can_use_line(chip->base + lineinfo.line_offset))
521a2ad6 1209 lineinfo.flags |= GPIOLINE_FLAG_KERNEL;
9d8cc89c 1210 if (test_bit(FLAG_IS_OUT, &desc->flags))
521a2ad6 1211 lineinfo.flags |= GPIOLINE_FLAG_IS_OUT;
9d8cc89c 1212 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
521a2ad6 1213 lineinfo.flags |= GPIOLINE_FLAG_ACTIVE_LOW;
9d8cc89c 1214 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
2c60e6b5
BG
1215 lineinfo.flags |= (GPIOLINE_FLAG_OPEN_DRAIN |
1216 GPIOLINE_FLAG_IS_OUT);
9d8cc89c 1217 if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
2c60e6b5
BG
1218 lineinfo.flags |= (GPIOLINE_FLAG_OPEN_SOURCE |
1219 GPIOLINE_FLAG_IS_OUT);
2148ad77
KG
1220 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
1221 lineinfo.flags |= GPIOLINE_FLAG_BIAS_DISABLE;
9225d516
DF
1222 if (test_bit(FLAG_PULL_DOWN, &desc->flags))
1223 lineinfo.flags |= GPIOLINE_FLAG_BIAS_PULL_DOWN;
1224 if (test_bit(FLAG_PULL_UP, &desc->flags))
1225 lineinfo.flags |= GPIOLINE_FLAG_BIAS_PULL_UP;
521a2ad6
LW
1226
1227 if (copy_to_user(ip, &lineinfo, sizeof(lineinfo)))
1228 return -EFAULT;
1229 return 0;
d7c51b47
LW
1230 } else if (cmd == GPIO_GET_LINEHANDLE_IOCTL) {
1231 return linehandle_create(gdev, ip);
61f922db
LW
1232 } else if (cmd == GPIO_GET_LINEEVENT_IOCTL) {
1233 return lineevent_create(gdev, ip);
3c702e99
LW
1234 }
1235 return -EINVAL;
1236}
1237
8b92e17e
LW
1238#ifdef CONFIG_COMPAT
1239static long gpio_ioctl_compat(struct file *filp, unsigned int cmd,
1240 unsigned long arg)
1241{
1242 return gpio_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
1243}
1244#endif
1245
3c702e99
LW
1246/**
1247 * gpio_chrdev_open() - open the chardev for ioctl operations
1248 * @inode: inode for this chardev
1249 * @filp: file struct for storing private data
1250 * Returns 0 on success
1251 */
1252static int gpio_chrdev_open(struct inode *inode, struct file *filp)
1253{
1254 struct gpio_device *gdev = container_of(inode->i_cdev,
1255 struct gpio_device, chrdev);
1256
1257 /* Fail on open if the backing gpiochip is gone */
fb505747 1258 if (!gdev->chip)
3c702e99
LW
1259 return -ENODEV;
1260 get_device(&gdev->dev);
1261 filp->private_data = gdev;
f4e81c52
LPC
1262
1263 return nonseekable_open(inode, filp);
3c702e99
LW
1264}
1265
1266/**
1267 * gpio_chrdev_release() - close chardev after ioctl operations
1268 * @inode: inode for this chardev
1269 * @filp: file struct for storing private data
1270 * Returns 0 on success
1271 */
1272static int gpio_chrdev_release(struct inode *inode, struct file *filp)
1273{
1274 struct gpio_device *gdev = container_of(inode->i_cdev,
1275 struct gpio_device, chrdev);
1276
3c702e99
LW
1277 put_device(&gdev->dev);
1278 return 0;
1279}
1280
1281
1282static const struct file_operations gpio_fileops = {
1283 .release = gpio_chrdev_release,
1284 .open = gpio_chrdev_open,
1285 .owner = THIS_MODULE,
f4e81c52 1286 .llseek = no_llseek,
3c702e99 1287 .unlocked_ioctl = gpio_ioctl,
8b92e17e
LW
1288#ifdef CONFIG_COMPAT
1289 .compat_ioctl = gpio_ioctl_compat,
1290#endif
3c702e99
LW
1291};
1292
ff2b1359
LW
1293static void gpiodevice_release(struct device *dev)
1294{
1295 struct gpio_device *gdev = dev_get_drvdata(dev);
1296
1297 list_del(&gdev->list);
1298 ida_simple_remove(&gpio_ida, gdev->id);
fcf273e5 1299 kfree_const(gdev->label);
476e2fc5 1300 kfree(gdev->descs);
9efd9e69 1301 kfree(gdev);
ff2b1359
LW
1302}
1303
159f3cd9
GR
1304static int gpiochip_setup_dev(struct gpio_device *gdev)
1305{
d377f56f 1306 int ret;
159f3cd9
GR
1307
1308 cdev_init(&gdev->chrdev, &gpio_fileops);
1309 gdev->chrdev.owner = THIS_MODULE;
159f3cd9 1310 gdev->dev.devt = MKDEV(MAJOR(gpio_devt), gdev->id);
111379dc 1311
d377f56f
LW
1312 ret = cdev_device_add(&gdev->chrdev, &gdev->dev);
1313 if (ret)
1314 return ret;
111379dc
LG
1315
1316 chip_dbg(gdev->chip, "added GPIO chardev (%d:%d)\n",
1317 MAJOR(gpio_devt), gdev->id);
159f3cd9 1318
d377f56f
LW
1319 ret = gpiochip_sysfs_register(gdev);
1320 if (ret)
159f3cd9
GR
1321 goto err_remove_device;
1322
1323 /* From this point, the .release() function cleans up gpio_device */
1324 gdev->dev.release = gpiodevice_release;
159f3cd9
GR
1325 pr_debug("%s: registered GPIOs %d to %d on device: %s (%s)\n",
1326 __func__, gdev->base, gdev->base + gdev->ngpio - 1,
1327 dev_name(&gdev->dev), gdev->chip->label ? : "generic");
1328
1329 return 0;
1330
1331err_remove_device:
111379dc 1332 cdev_device_del(&gdev->chrdev, &gdev->dev);
d377f56f 1333 return ret;
159f3cd9
GR
1334}
1335
a411e81e
BG
1336static void gpiochip_machine_hog(struct gpio_chip *chip, struct gpiod_hog *hog)
1337{
1338 struct gpio_desc *desc;
1339 int rv;
1340
1341 desc = gpiochip_get_desc(chip, hog->chip_hwnum);
1342 if (IS_ERR(desc)) {
1343 pr_err("%s: unable to get GPIO desc: %ld\n",
1344 __func__, PTR_ERR(desc));
1345 return;
1346 }
1347
ba3efdff 1348 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
a411e81e
BG
1349 return;
1350
1351 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
1352 if (rv)
1353 pr_err("%s: unable to hog GPIO line (%s:%u): %d\n",
1354 __func__, chip->label, hog->chip_hwnum, rv);
1355}
1356
1357static void machine_gpiochip_add(struct gpio_chip *chip)
1358{
1359 struct gpiod_hog *hog;
1360
1361 mutex_lock(&gpio_machine_hogs_mutex);
1362
1363 list_for_each_entry(hog, &gpio_machine_hogs, list) {
1364 if (!strcmp(chip->label, hog->chip_label))
1365 gpiochip_machine_hog(chip, hog);
1366 }
1367
1368 mutex_unlock(&gpio_machine_hogs_mutex);
1369}
1370
159f3cd9
GR
1371static void gpiochip_setup_devs(void)
1372{
1373 struct gpio_device *gdev;
d377f56f 1374 int ret;
159f3cd9
GR
1375
1376 list_for_each_entry(gdev, &gpio_devices, list) {
d377f56f
LW
1377 ret = gpiochip_setup_dev(gdev);
1378 if (ret)
159f3cd9 1379 pr_err("%s: Failed to initialize gpio device (%d)\n",
d377f56f 1380 dev_name(&gdev->dev), ret);
159f3cd9
GR
1381 }
1382}
1383
959bc7b2 1384int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data,
39c3fd58
AL
1385 struct lock_class_key *lock_key,
1386 struct lock_class_key *request_key)
d2876d08
DB
1387{
1388 unsigned long flags;
d377f56f 1389 int ret = 0;
ff2b1359 1390 unsigned i;
8d0aab2f 1391 int base = chip->base;
ff2b1359 1392 struct gpio_device *gdev;
d2876d08 1393
ff2b1359
LW
1394 /*
1395 * First: allocate and populate the internal stat container, and
1396 * set up the struct device.
1397 */
969f07b4 1398 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
ff2b1359 1399 if (!gdev)
14e85c0e 1400 return -ENOMEM;
3c702e99 1401 gdev->dev.bus = &gpio_bus_type;
ff2b1359
LW
1402 gdev->chip = chip;
1403 chip->gpiodev = gdev;
1404 if (chip->parent) {
1405 gdev->dev.parent = chip->parent;
1406 gdev->dev.of_node = chip->parent->of_node;
acc6e331
TR
1407 }
1408
ff2b1359
LW
1409#ifdef CONFIG_OF_GPIO
1410 /* If the gpiochip has an assigned OF node this takes precedence */
acc6e331
TR
1411 if (chip->of_node)
1412 gdev->dev.of_node = chip->of_node;
6ff04974
BD
1413 else
1414 chip->of_node = gdev->dev.of_node;
ff2b1359 1415#endif
acc6e331 1416
ff2b1359
LW
1417 gdev->id = ida_simple_get(&gpio_ida, 0, 0, GFP_KERNEL);
1418 if (gdev->id < 0) {
d377f56f 1419 ret = gdev->id;
ff2b1359
LW
1420 goto err_free_gdev;
1421 }
ddd8891e 1422 dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id);
ff2b1359
LW
1423 device_initialize(&gdev->dev);
1424 dev_set_drvdata(&gdev->dev, gdev);
1425 if (chip->parent && chip->parent->driver)
1426 gdev->owner = chip->parent->driver->owner;
1427 else if (chip->owner)
1428 /* TODO: remove chip->owner */
1429 gdev->owner = chip->owner;
1430 else
1431 gdev->owner = THIS_MODULE;
d2876d08 1432
476e2fc5 1433 gdev->descs = kcalloc(chip->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL);
1c3cdb18 1434 if (!gdev->descs) {
d377f56f 1435 ret = -ENOMEM;
a05a1404 1436 goto err_free_ida;
ff2b1359
LW
1437 }
1438
5ed41cc4
BJZ
1439 if (chip->ngpio == 0) {
1440 chip_err(chip, "tried to insert a GPIO chip with zero lines\n");
d377f56f 1441 ret = -EINVAL;
159f3cd9 1442 goto err_free_descs;
5ed41cc4 1443 }
df4878e9 1444
3027743f
LA
1445 if (chip->ngpio > FASTPATH_NGPIO)
1446 chip_warn(chip, "line cnt %u is greater than fast path cnt %u\n",
1447 chip->ngpio, FASTPATH_NGPIO);
1448
fcf273e5 1449 gdev->label = kstrdup_const(chip->label ?: "unknown", GFP_KERNEL);
df4878e9 1450 if (!gdev->label) {
d377f56f 1451 ret = -ENOMEM;
476e2fc5 1452 goto err_free_descs;
df4878e9
LW
1453 }
1454
fdeb8e15 1455 gdev->ngpio = chip->ngpio;
43c54eca 1456 gdev->data = data;
5ed41cc4 1457
d2876d08
DB
1458 spin_lock_irqsave(&gpio_lock, flags);
1459
fdeb8e15
LW
1460 /*
1461 * TODO: this allocates a Linux GPIO number base in the global
1462 * GPIO numberspace for this chip. In the long run we want to
1463 * get *rid* of this numberspace and use only descriptors, but
1464 * it may be a pipe dream. It will not happen before we get rid
1465 * of the sysfs interface anyways.
1466 */
8d0aab2f
AV
1467 if (base < 0) {
1468 base = gpiochip_find_base(chip->ngpio);
1469 if (base < 0) {
d377f56f 1470 ret = base;
225fce83 1471 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1472 goto err_free_label;
8d0aab2f 1473 }
fdeb8e15
LW
1474 /*
1475 * TODO: it should not be necessary to reflect the assigned
1476 * base outside of the GPIO subsystem. Go over drivers and
1477 * see if anyone makes use of this, else drop this and assign
1478 * a poison instead.
1479 */
8d0aab2f
AV
1480 chip->base = base;
1481 }
fdeb8e15 1482 gdev->base = base;
8d0aab2f 1483
d377f56f
LW
1484 ret = gpiodev_add_to_list(gdev);
1485 if (ret) {
05aa5203 1486 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1487 goto err_free_label;
05aa5203 1488 }
1a989d0f 1489
545ebd9a
LW
1490 spin_unlock_irqrestore(&gpio_lock, flags);
1491
767cd17a
RRD
1492 for (i = 0; i < chip->ngpio; i++)
1493 gdev->descs[i].gdev = gdev;
14e85c0e 1494
f23f1516 1495#ifdef CONFIG_PINCTRL
20ec3e39 1496 INIT_LIST_HEAD(&gdev->pin_ranges);
f23f1516
SH
1497#endif
1498
d377f56f
LW
1499 ret = gpiochip_set_desc_names(chip);
1500 if (ret)
5f3ca732
MP
1501 goto err_remove_from_list;
1502
d377f56f
LW
1503 ret = gpiochip_alloc_valid_mask(chip);
1504 if (ret)
48057ed1 1505 goto err_remove_from_list;
e0d89728 1506
d377f56f
LW
1507 ret = of_gpiochip_add(chip);
1508 if (ret)
48057ed1 1509 goto err_free_gpiochip_mask;
28355f81 1510
d377f56f
LW
1511 ret = gpiochip_init_valid_mask(chip);
1512 if (ret)
35779890 1513 goto err_remove_of_chip;
f8ec92a9 1514
3edfb7bd
RRD
1515 for (i = 0; i < chip->ngpio; i++) {
1516 struct gpio_desc *desc = &gdev->descs[i];
1517
d95da993
CP
1518 if (chip->get_direction && gpiochip_line_is_valid(chip, i)) {
1519 if (!chip->get_direction(chip, i))
1520 set_bit(FLAG_IS_OUT, &desc->flags);
1521 else
1522 clear_bit(FLAG_IS_OUT, &desc->flags);
1523 } else {
1524 if (!chip->direction_input)
1525 set_bit(FLAG_IS_OUT, &desc->flags);
1526 else
1527 clear_bit(FLAG_IS_OUT, &desc->flags);
1528 }
3edfb7bd
RRD
1529 }
1530
b056ca1c
AS
1531 ret = gpiochip_add_pin_ranges(chip);
1532 if (ret)
1533 goto err_remove_of_chip;
1534
664e3e5a 1535 acpi_gpiochip_add(chip);
391c970c 1536
a411e81e
BG
1537 machine_gpiochip_add(chip);
1538
504369cd 1539 ret = gpiochip_irqchip_init_valid_mask(chip);
9411e3aa
AS
1540 if (ret)
1541 goto err_remove_acpi_chip;
1542
504369cd 1543 ret = gpiochip_irqchip_init_hw(chip);
fbdf8d4b 1544 if (ret)
48057ed1
LW
1545 goto err_remove_acpi_chip;
1546
fbdf8d4b
LW
1547 ret = gpiochip_add_irqchip(chip, lock_key, request_key);
1548 if (ret)
48057ed1
LW
1549 goto err_remove_irqchip_mask;
1550
3c702e99
LW
1551 /*
1552 * By first adding the chardev, and then adding the device,
1553 * we get a device node entry in sysfs under
1554 * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
1555 * coldplug of device nodes and other udev business.
159f3cd9
GR
1556 * We can do this only if gpiolib has been initialized.
1557 * Otherwise, defer until later.
3c702e99 1558 */
159f3cd9 1559 if (gpiolib_initialized) {
d377f56f
LW
1560 ret = gpiochip_setup_dev(gdev);
1561 if (ret)
48057ed1 1562 goto err_remove_irqchip;
159f3cd9 1563 }
cedb1881 1564 return 0;
3bae4811 1565
48057ed1
LW
1566err_remove_irqchip:
1567 gpiochip_irqchip_remove(chip);
1568err_remove_irqchip_mask:
1569 gpiochip_irqchip_free_valid_mask(chip);
35779890 1570err_remove_acpi_chip:
225fce83 1571 acpi_gpiochip_remove(chip);
35779890 1572err_remove_of_chip:
6d86750c 1573 gpiochip_free_hogs(chip);
225fce83 1574 of_gpiochip_remove(chip);
35779890 1575err_free_gpiochip_mask:
2f4133bb 1576 gpiochip_remove_pin_ranges(chip);
726cb3ba 1577 gpiochip_free_valid_mask(chip);
5f3ca732 1578err_remove_from_list:
225fce83 1579 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1580 list_del(&gdev->list);
3bae4811 1581 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1582err_free_label:
fcf273e5 1583 kfree_const(gdev->label);
476e2fc5
GR
1584err_free_descs:
1585 kfree(gdev->descs);
a05a1404 1586err_free_ida:
ff2b1359 1587 ida_simple_remove(&gpio_ida, gdev->id);
a05a1404 1588err_free_gdev:
d2876d08 1589 /* failures here can mean systems won't boot... */
1777fc97 1590 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
fdeb8e15 1591 gdev->base, gdev->base + gdev->ngpio - 1,
d377f56f 1592 chip->label ? : "generic", ret);
fdeb8e15 1593 kfree(gdev);
d377f56f 1594 return ret;
d2876d08 1595}
959bc7b2 1596EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
d2876d08 1597
43c54eca
LW
1598/**
1599 * gpiochip_get_data() - get per-subdriver data for the chip
950d55f5
TR
1600 * @chip: GPIO chip
1601 *
1602 * Returns:
1603 * The per-subdriver data for the chip.
43c54eca
LW
1604 */
1605void *gpiochip_get_data(struct gpio_chip *chip)
1606{
1607 return chip->gpiodev->data;
1608}
1609EXPORT_SYMBOL_GPL(gpiochip_get_data);
1610
d2876d08
DB
1611/**
1612 * gpiochip_remove() - unregister a gpio_chip
1613 * @chip: the chip to unregister
1614 *
1615 * A gpio_chip with any GPIOs still requested may not be removed.
1616 */
e1db1706 1617void gpiochip_remove(struct gpio_chip *chip)
d2876d08 1618{
ff2b1359 1619 struct gpio_device *gdev = chip->gpiodev;
fab28b89 1620 struct gpio_desc *desc;
d2876d08 1621 unsigned long flags;
1c3cdb18 1622 unsigned i;
fab28b89 1623 bool requested = false;
d2876d08 1624
ff2b1359 1625 /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
afbc4f31 1626 gpiochip_sysfs_unregister(gdev);
5018ada6 1627 gpiochip_free_hogs(chip);
bd203bd5
BJZ
1628 /* Numb the device, cancelling all outstanding operations */
1629 gdev->chip = NULL;
00acc3dc 1630 gpiochip_irqchip_remove(chip);
6072b9dc 1631 acpi_gpiochip_remove(chip);
391c970c 1632 of_gpiochip_remove(chip);
2f4133bb 1633 gpiochip_remove_pin_ranges(chip);
726cb3ba 1634 gpiochip_free_valid_mask(chip);
43c54eca
LW
1635 /*
1636 * We accept no more calls into the driver from this point, so
1637 * NULL the driver data pointer
1638 */
1639 gdev->data = NULL;
391c970c 1640
6798acaa 1641 spin_lock_irqsave(&gpio_lock, flags);
fdeb8e15 1642 for (i = 0; i < gdev->ngpio; i++) {
1c3cdb18 1643 desc = &gdev->descs[i];
fab28b89
JH
1644 if (test_bit(FLAG_REQUESTED, &desc->flags))
1645 requested = true;
d2876d08 1646 }
d2876d08 1647 spin_unlock_irqrestore(&gpio_lock, flags);
14e85c0e 1648
fab28b89 1649 if (requested)
fdeb8e15 1650 dev_crit(&gdev->dev,
58383c78 1651 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
fab28b89 1652
ff2b1359
LW
1653 /*
1654 * The gpiochip side puts its use of the device to rest here:
1655 * if there are no userspace clients, the chardev and device will
1656 * be removed, else it will be dangling until the last user is
1657 * gone.
1658 */
111379dc 1659 cdev_device_del(&gdev->chrdev, &gdev->dev);
ff2b1359 1660 put_device(&gdev->dev);
d2876d08
DB
1661}
1662EXPORT_SYMBOL_GPL(gpiochip_remove);
1663
0cf3292c
LD
1664static void devm_gpio_chip_release(struct device *dev, void *res)
1665{
1666 struct gpio_chip *chip = *(struct gpio_chip **)res;
1667
1668 gpiochip_remove(chip);
1669}
1670
0cf3292c 1671/**
51158416 1672 * devm_gpiochip_add_data() - Resource managed gpiochip_add_data()
3925b90f 1673 * @dev: pointer to the device that gpio_chip belongs to.
0cf3292c 1674 * @chip: the chip to register, with chip->base initialized
950d55f5 1675 * @data: driver-private data associated with this chip
0cf3292c 1676 *
950d55f5 1677 * Context: potentially before irqs will work
0cf3292c
LD
1678 *
1679 * The gpio chip automatically be released when the device is unbound.
950d55f5
TR
1680 *
1681 * Returns:
1682 * A negative errno if the chip can't be registered, such as because the
1683 * chip->base is invalid or already associated with a different chip.
1684 * Otherwise it returns zero as a success code.
0cf3292c
LD
1685 */
1686int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip,
1687 void *data)
1688{
1689 struct gpio_chip **ptr;
1690 int ret;
1691
1692 ptr = devres_alloc(devm_gpio_chip_release, sizeof(*ptr),
1693 GFP_KERNEL);
1694 if (!ptr)
1695 return -ENOMEM;
1696
1697 ret = gpiochip_add_data(chip, data);
1698 if (ret < 0) {
1699 devres_free(ptr);
1700 return ret;
1701 }
1702
1703 *ptr = chip;
1704 devres_add(dev, ptr);
1705
1706 return 0;
1707}
1708EXPORT_SYMBOL_GPL(devm_gpiochip_add_data);
1709
594fa265
GL
1710/**
1711 * gpiochip_find() - iterator for locating a specific gpio_chip
1712 * @data: data to pass to match function
950d55f5 1713 * @match: Callback function to check gpio_chip
594fa265
GL
1714 *
1715 * Similar to bus_find_device. It returns a reference to a gpio_chip as
1716 * determined by a user supplied @match callback. The callback should return
1717 * 0 if the device doesn't match and non-zero if it does. If the callback is
1718 * non-zero, this function will return to the caller and not iterate over any
1719 * more gpio_chips.
1720 */
07ce8ec7 1721struct gpio_chip *gpiochip_find(void *data,
6e2cf651 1722 int (*match)(struct gpio_chip *chip,
3d0f7cf0 1723 void *data))
594fa265 1724{
ff2b1359 1725 struct gpio_device *gdev;
acf06ff7 1726 struct gpio_chip *chip = NULL;
594fa265 1727 unsigned long flags;
594fa265
GL
1728
1729 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1730 list_for_each_entry(gdev, &gpio_devices, list)
acf06ff7
MY
1731 if (gdev->chip && match(gdev->chip, data)) {
1732 chip = gdev->chip;
594fa265 1733 break;
acf06ff7 1734 }
ff2b1359 1735
594fa265
GL
1736 spin_unlock_irqrestore(&gpio_lock, flags);
1737
1738 return chip;
1739}
8fa0c9bf 1740EXPORT_SYMBOL_GPL(gpiochip_find);
d2876d08 1741
79697ef9
AC
1742static int gpiochip_match_name(struct gpio_chip *chip, void *data)
1743{
1744 const char *name = data;
1745
1746 return !strcmp(chip->label, name);
1747}
1748
1749static struct gpio_chip *find_chip_by_name(const char *name)
1750{
1751 return gpiochip_find((void *)name, gpiochip_match_name);
1752}
1753
14250520
LW
1754#ifdef CONFIG_GPIOLIB_IRQCHIP
1755
1756/*
1757 * The following is irqchip helper code for gpiochips.
1758 */
1759
9411e3aa
AS
1760static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
1761{
1762 struct gpio_irq_chip *girq = &gc->irq;
1763
1764 if (!girq->init_hw)
1765 return 0;
1766
1767 return girq->init_hw(gc);
1768}
1769
5fbe5b58 1770static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb 1771{
5fbe5b58
LW
1772 struct gpio_irq_chip *girq = &gc->irq;
1773
1774 if (!girq->init_valid_mask)
79b804cb
MW
1775 return 0;
1776
5fbe5b58
LW
1777 girq->valid_mask = gpiochip_allocate_mask(gc);
1778 if (!girq->valid_mask)
79b804cb
MW
1779 return -ENOMEM;
1780
5fbe5b58
LW
1781 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
1782
79b804cb
MW
1783 return 0;
1784}
1785
1786static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip)
1787{
7bdbd1ec 1788 bitmap_free(gpiochip->irq.valid_mask);
dc7b0387 1789 gpiochip->irq.valid_mask = NULL;
79b804cb
MW
1790}
1791
64ff2c8e
SB
1792bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gpiochip,
1793 unsigned int offset)
79b804cb 1794{
726cb3ba
SB
1795 if (!gpiochip_line_is_valid(gpiochip, offset))
1796 return false;
79b804cb 1797 /* No mask means all valid */
dc7b0387 1798 if (likely(!gpiochip->irq.valid_mask))
79b804cb 1799 return true;
dc7b0387 1800 return test_bit(offset, gpiochip->irq.valid_mask);
79b804cb 1801}
64ff2c8e 1802EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
79b804cb 1803
14250520 1804/**
d245b3f9 1805 * gpiochip_set_cascaded_irqchip() - connects a cascaded irqchip to a gpiochip
4892d3a6 1806 * @gc: the gpiochip to set the irqchip chain to
14250520
LW
1807 * @parent_irq: the irq number corresponding to the parent IRQ for this
1808 * chained irqchip
1809 * @parent_handler: the parent interrupt handler for the accumulated IRQ
3f97d5fc
LW
1810 * coming out of the gpiochip. If the interrupt is nested rather than
1811 * cascaded, pass NULL in this handler argument
14250520 1812 */
4892d3a6 1813static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gc,
6f79309a 1814 unsigned int parent_irq,
d245b3f9 1815 irq_flow_handler_t parent_handler)
14250520 1816{
4892d3a6
LW
1817 struct gpio_irq_chip *girq = &gc->irq;
1818 struct device *dev = &gc->gpiodev->dev;
1819
1820 if (!girq->domain) {
1821 chip_err(gc, "called %s before setting up irqchip\n",
83141a77 1822 __func__);
1c8732bb
LW
1823 return;
1824 }
1825
3f97d5fc 1826 if (parent_handler) {
4892d3a6
LW
1827 if (gc->can_sleep) {
1828 chip_err(gc,
b1911710 1829 "you cannot have chained interrupts on a chip that may sleep\n");
3f97d5fc
LW
1830 return;
1831 }
4892d3a6
LW
1832 girq->parents = devm_kcalloc(dev, 1,
1833 sizeof(*girq->parents),
1834 GFP_KERNEL);
1835 if (!girq->parents) {
1836 chip_err(gc, "out of memory allocating parent IRQ\n");
1837 return;
1838 }
1839 girq->parents[0] = parent_irq;
1840 girq->num_parents = 1;
3f97d5fc
LW
1841 /*
1842 * The parent irqchip is already using the chip_data for this
1843 * irqchip, so our callbacks simply use the handler_data.
1844 */
f7f87753 1845 irq_set_chained_handler_and_data(parent_irq, parent_handler,
4892d3a6 1846 gc);
3f97d5fc 1847 }
14250520 1848}
d245b3f9
LW
1849
1850/**
1851 * gpiochip_set_chained_irqchip() - connects a chained irqchip to a gpiochip
1852 * @gpiochip: the gpiochip to set the irqchip chain to
1853 * @irqchip: the irqchip to chain to the gpiochip
1854 * @parent_irq: the irq number corresponding to the parent IRQ for this
1855 * chained irqchip
1856 * @parent_handler: the parent interrupt handler for the accumulated IRQ
40f5ff4f 1857 * coming out of the gpiochip.
d245b3f9
LW
1858 */
1859void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
1860 struct irq_chip *irqchip,
6f79309a 1861 unsigned int parent_irq,
d245b3f9
LW
1862 irq_flow_handler_t parent_handler)
1863{
60ed54ca
TR
1864 if (gpiochip->irq.threaded) {
1865 chip_err(gpiochip, "tried to chain a threaded gpiochip\n");
1866 return;
1867 }
1868
3c1f6b2d 1869 gpiochip_set_cascaded_irqchip(gpiochip, parent_irq, parent_handler);
d245b3f9 1870}
14250520
LW
1871EXPORT_SYMBOL_GPL(gpiochip_set_chained_irqchip);
1872
d245b3f9
LW
1873/**
1874 * gpiochip_set_nested_irqchip() - connects a nested irqchip to a gpiochip
1875 * @gpiochip: the gpiochip to set the irqchip nested handler to
1876 * @irqchip: the irqchip to nest to the gpiochip
1877 * @parent_irq: the irq number corresponding to the parent IRQ for this
1878 * nested irqchip
1879 */
1880void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip,
1881 struct irq_chip *irqchip,
6f79309a 1882 unsigned int parent_irq)
d245b3f9 1883{
3c1f6b2d 1884 gpiochip_set_cascaded_irqchip(gpiochip, parent_irq, NULL);
d245b3f9
LW
1885}
1886EXPORT_SYMBOL_GPL(gpiochip_set_nested_irqchip);
1887
fdd61a01
LW
1888#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1889
1890/**
1891 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
1892 * to a gpiochip
1893 * @gc: the gpiochip to set the irqchip hierarchical handler to
1894 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
1895 * will then percolate up to the parent
1896 */
1897static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
1898 struct irq_chip *irqchip)
1899{
1900 /* DT will deal with mapping each IRQ as we go along */
1901 if (is_of_node(gc->irq.fwnode))
1902 return;
1903
1904 /*
1905 * This is for legacy and boardfile "irqchip" fwnodes: allocate
1906 * irqs upfront instead of dynamically since we don't have the
1907 * dynamic type of allocation that hardware description languages
1908 * provide. Once all GPIO drivers using board files are gone from
1909 * the kernel we can delete this code, but for a transitional period
1910 * it is necessary to keep this around.
1911 */
1912 if (is_fwnode_irqchip(gc->irq.fwnode)) {
1913 int i;
1914 int ret;
1915
1916 for (i = 0; i < gc->ngpio; i++) {
1917 struct irq_fwspec fwspec;
1918 unsigned int parent_hwirq;
1919 unsigned int parent_type;
1920 struct gpio_irq_chip *girq = &gc->irq;
1921
1922 /*
1923 * We call the child to parent translation function
1924 * only to check if the child IRQ is valid or not.
1925 * Just pick the rising edge type here as that is what
1926 * we likely need to support.
1927 */
1928 ret = girq->child_to_parent_hwirq(gc, i,
1929 IRQ_TYPE_EDGE_RISING,
1930 &parent_hwirq,
1931 &parent_type);
1932 if (ret) {
1933 chip_err(gc, "skip set-up on hwirq %d\n",
1934 i);
1935 continue;
1936 }
1937
1938 fwspec.fwnode = gc->irq.fwnode;
1939 /* This is the hwirq for the GPIO line side of things */
1940 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
1941 /* Just pick something */
1942 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
1943 fwspec.param_count = 2;
1944 ret = __irq_domain_alloc_irqs(gc->irq.domain,
1945 /* just pick something */
1946 -1,
1947 1,
1948 NUMA_NO_NODE,
1949 &fwspec,
1950 false,
1951 NULL);
1952 if (ret < 0) {
1953 chip_err(gc,
1954 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1955 i, parent_hwirq,
1956 ret);
1957 }
1958 }
1959 }
1960
1961 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1962
1963 return;
1964}
1965
1966static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1967 struct irq_fwspec *fwspec,
1968 unsigned long *hwirq,
1969 unsigned int *type)
1970{
1971 /* We support standard DT translation */
1972 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1973 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1974 }
1975
1976 /* This is for board files and others not using DT */
1977 if (is_fwnode_irqchip(fwspec->fwnode)) {
1978 int ret;
1979
1980 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1981 if (ret)
1982 return ret;
1983 WARN_ON(*type == IRQ_TYPE_NONE);
1984 return 0;
1985 }
1986 return -EINVAL;
1987}
1988
1989static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1990 unsigned int irq,
1991 unsigned int nr_irqs,
1992 void *data)
1993{
1994 struct gpio_chip *gc = d->host_data;
1995 irq_hw_number_t hwirq;
1996 unsigned int type = IRQ_TYPE_NONE;
1997 struct irq_fwspec *fwspec = data;
1998 struct irq_fwspec parent_fwspec;
1999 unsigned int parent_hwirq;
2000 unsigned int parent_type;
2001 struct gpio_irq_chip *girq = &gc->irq;
2002 int ret;
2003
2004 /*
2005 * The nr_irqs parameter is always one except for PCI multi-MSI
2006 * so this should not happen.
2007 */
2008 WARN_ON(nr_irqs != 1);
2009
2010 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
2011 if (ret)
2012 return ret;
2013
2014 chip_info(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
2015
2016 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
2017 &parent_hwirq, &parent_type);
2018 if (ret) {
2019 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
2020 return ret;
2021 }
2022 chip_info(gc, "found parent hwirq %u\n", parent_hwirq);
2023
2024 /*
2025 * We set handle_bad_irq because the .set_type() should
2026 * always be invoked and set the right type of handler.
2027 */
2028 irq_domain_set_info(d,
2029 irq,
2030 hwirq,
2031 gc->irq.chip,
2032 gc,
2033 girq->handler,
2034 NULL, NULL);
2035 irq_set_probe(irq);
2036
2037 /*
2038 * Create a IRQ fwspec to send up to the parent irqdomain:
2039 * specify the hwirq we address on the parent and tie it
2040 * all together up the chain.
2041 */
2042 parent_fwspec.fwnode = d->parent->fwnode;
2043 /* This parent only handles asserted level IRQs */
2044 girq->populate_parent_fwspec(gc, &parent_fwspec, parent_hwirq,
2045 parent_type);
2046 chip_info(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
2047 irq, parent_hwirq);
2048 ret = irq_domain_alloc_irqs_parent(d, irq, 1, &parent_fwspec);
2049 if (ret)
2050 chip_err(gc,
2051 "failed to allocate parent hwirq %d for hwirq %lu\n",
2052 parent_hwirq, hwirq);
2053
2054 return ret;
2055}
2056
2057static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *chip,
2058 unsigned int offset)
2059{
2060 return offset;
2061}
2062
2063static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
2064{
2065 ops->activate = gpiochip_irq_domain_activate;
2066 ops->deactivate = gpiochip_irq_domain_deactivate;
2067 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
2068 ops->free = irq_domain_free_irqs_common;
2069
2070 /*
2071 * We only allow overriding the translate() function for
2072 * hierarchical chips, and this should only be done if the user
2073 * really need something other than 1:1 translation.
2074 */
2075 if (!ops->translate)
2076 ops->translate = gpiochip_hierarchy_irq_domain_translate;
2077}
2078
2079static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
2080{
2081 if (!gc->irq.child_to_parent_hwirq ||
2082 !gc->irq.fwnode) {
2083 chip_err(gc, "missing irqdomain vital data\n");
2084 return -EINVAL;
2085 }
2086
2087 if (!gc->irq.child_offset_to_irq)
2088 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
2089
2090 if (!gc->irq.populate_parent_fwspec)
2091 gc->irq.populate_parent_fwspec =
2092 gpiochip_populate_parent_fwspec_twocell;
2093
2094 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
2095
2096 gc->irq.domain = irq_domain_create_hierarchy(
2097 gc->irq.parent_domain,
2098 0,
2099 gc->ngpio,
2100 gc->irq.fwnode,
2101 &gc->irq.child_irq_domain_ops,
2102 gc);
2103
2104 if (!gc->irq.domain)
2105 return -ENOMEM;
2106
2107 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
2108
2109 return 0;
2110}
2111
2112static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
2113{
2114 return !!gc->irq.parent_domain;
2115}
2116
2117void gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *chip,
2118 struct irq_fwspec *fwspec,
2119 unsigned int parent_hwirq,
2120 unsigned int parent_type)
2121{
2122 fwspec->param_count = 2;
2123 fwspec->param[0] = parent_hwirq;
2124 fwspec->param[1] = parent_type;
2125}
2126EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
2127
2128void gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *chip,
2129 struct irq_fwspec *fwspec,
2130 unsigned int parent_hwirq,
2131 unsigned int parent_type)
2132{
2133 fwspec->param_count = 4;
2134 fwspec->param[0] = 0;
2135 fwspec->param[1] = parent_hwirq;
2136 fwspec->param[2] = 0;
2137 fwspec->param[3] = parent_type;
2138}
2139EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
2140
2141#else
2142
2143static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
2144{
2145 return -EINVAL;
2146}
2147
2148static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
2149{
2150 return false;
2151}
2152
2153#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
2154
14250520
LW
2155/**
2156 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
2157 * @d: the irqdomain used by this irqchip
2158 * @irq: the global irq number used by this GPIO irqchip irq
2159 * @hwirq: the local IRQ/GPIO line offset on this gpiochip
2160 *
2161 * This function will set up the mapping for a certain IRQ line on a
2162 * gpiochip by assigning the gpiochip as chip data, and using the irqchip
2163 * stored inside the gpiochip.
2164 */
1b95b4eb
TR
2165int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
2166 irq_hw_number_t hwirq)
14250520
LW
2167{
2168 struct gpio_chip *chip = d->host_data;
d377f56f 2169 int ret = 0;
14250520 2170
dc749a09
GS
2171 if (!gpiochip_irqchip_irq_valid(chip, hwirq))
2172 return -ENXIO;
2173
14250520 2174 irq_set_chip_data(irq, chip);
a0a8bcf4
GS
2175 /*
2176 * This lock class tells lockdep that GPIO irqs are in a different
2177 * category than their parents, so it won't report false recursion.
2178 */
39c3fd58 2179 irq_set_lockdep_class(irq, chip->irq.lock_key, chip->irq.request_key);
c7a0aa59 2180 irq_set_chip_and_handler(irq, chip->irq.chip, chip->irq.handler);
d245b3f9 2181 /* Chips that use nested thread handlers have them marked */
60ed54ca 2182 if (chip->irq.threaded)
1c8732bb 2183 irq_set_nested_thread(irq, 1);
14250520 2184 irq_set_noprobe(irq);
23393d49 2185
e0d89728 2186 if (chip->irq.num_parents == 1)
d377f56f 2187 ret = irq_set_parent(irq, chip->irq.parents[0]);
e0d89728 2188 else if (chip->irq.map)
d377f56f 2189 ret = irq_set_parent(irq, chip->irq.map[hwirq]);
e0d89728 2190
d377f56f
LW
2191 if (ret < 0)
2192 return ret;
e0d89728 2193
1333b90f
LW
2194 /*
2195 * No set-up of the hardware will happen if IRQ_TYPE_NONE
2196 * is passed as default type.
2197 */
3634eeb0
TR
2198 if (chip->irq.default_type != IRQ_TYPE_NONE)
2199 irq_set_irq_type(irq, chip->irq.default_type);
14250520
LW
2200
2201 return 0;
2202}
1b95b4eb 2203EXPORT_SYMBOL_GPL(gpiochip_irq_map);
14250520 2204
1b95b4eb 2205void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
c3626fde 2206{
1c8732bb
LW
2207 struct gpio_chip *chip = d->host_data;
2208
60ed54ca 2209 if (chip->irq.threaded)
1c8732bb 2210 irq_set_nested_thread(irq, 0);
c3626fde
LW
2211 irq_set_chip_and_handler(irq, NULL, NULL);
2212 irq_set_chip_data(irq, NULL);
2213}
1b95b4eb 2214EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
c3626fde 2215
14250520
LW
2216static const struct irq_domain_ops gpiochip_domain_ops = {
2217 .map = gpiochip_irq_map,
c3626fde 2218 .unmap = gpiochip_irq_unmap,
14250520
LW
2219 /* Virtually all GPIO irqchips are twocell:ed */
2220 .xlate = irq_domain_xlate_twocell,
2221};
2222
fdd61a01
LW
2223/*
2224 * TODO: move these activate/deactivate in under the hierarchicial
2225 * irqchip implementation as static once SPMI and SSBI (all external
2226 * users) are phased over.
2227 */
ef74f70e
BM
2228/**
2229 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
2230 * @domain: The IRQ domain used by this IRQ chip
2231 * @data: Outermost irq_data associated with the IRQ
2232 * @reserve: If set, only reserve an interrupt vector instead of assigning one
2233 *
2234 * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
2235 * used as the activate function for the &struct irq_domain_ops. The host_data
2236 * for the IRQ domain must be the &struct gpio_chip.
2237 */
2238int gpiochip_irq_domain_activate(struct irq_domain *domain,
2239 struct irq_data *data, bool reserve)
2240{
2241 struct gpio_chip *chip = domain->host_data;
2242
2243 return gpiochip_lock_as_irq(chip, data->hwirq);
2244}
2245EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
2246
2247/**
2248 * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
2249 * @domain: The IRQ domain used by this IRQ chip
2250 * @data: Outermost irq_data associated with the IRQ
2251 *
2252 * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
2253 * be used as the deactivate function for the &struct irq_domain_ops. The
2254 * host_data for the IRQ domain must be the &struct gpio_chip.
2255 */
2256void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
2257 struct irq_data *data)
2258{
2259 struct gpio_chip *chip = domain->host_data;
2260
2261 return gpiochip_unlock_as_irq(chip, data->hwirq);
2262}
2263EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
2264
4e6b8238 2265static int gpiochip_to_irq(struct gpio_chip *chip, unsigned offset)
14250520 2266{
fdd61a01
LW
2267 struct irq_domain *domain = chip->irq.domain;
2268
4e6b8238
HV
2269 if (!gpiochip_irqchip_irq_valid(chip, offset))
2270 return -ENXIO;
5b76e79c 2271
fdd61a01
LW
2272#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2273 if (irq_domain_is_hierarchy(domain)) {
2274 struct irq_fwspec spec;
2275
2276 spec.fwnode = domain->fwnode;
2277 spec.param_count = 2;
2278 spec.param[0] = chip->irq.child_offset_to_irq(chip, offset);
2279 spec.param[1] = IRQ_TYPE_NONE;
2280
2281 return irq_create_fwspec_mapping(&spec);
2282 }
2283#endif
2284
2285 return irq_create_mapping(domain, offset);
14250520
LW
2286}
2287
14250520
LW
2288static int gpiochip_irq_reqres(struct irq_data *d)
2289{
2290 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
5b76e79c 2291
4e6b8238 2292 return gpiochip_reqres_irq(chip, d->hwirq);
14250520
LW
2293}
2294
2295static void gpiochip_irq_relres(struct irq_data *d)
2296{
2297 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
2298
4e6b8238 2299 gpiochip_relres_irq(chip, d->hwirq);
14250520
LW
2300}
2301
461c1a7d 2302static void gpiochip_irq_enable(struct irq_data *d)
14250520 2303{
461c1a7d 2304 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
e0d89728 2305
461c1a7d
HV
2306 gpiochip_enable_irq(chip, d->hwirq);
2307 if (chip->irq.irq_enable)
2308 chip->irq.irq_enable(d);
2309 else
2310 chip->irq.chip->irq_unmask(d);
2311}
2312
2313static void gpiochip_irq_disable(struct irq_data *d)
2314{
2315 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
2316
2317 if (chip->irq.irq_disable)
2318 chip->irq.irq_disable(d);
2319 else
2320 chip->irq.chip->irq_mask(d);
2321 gpiochip_disable_irq(chip, d->hwirq);
2322}
2323
ca620f2d
HV
2324static void gpiochip_set_irq_hooks(struct gpio_chip *gpiochip)
2325{
2326 struct irq_chip *irqchip = gpiochip->irq.chip;
2327
2328 if (!irqchip->irq_request_resources &&
2329 !irqchip->irq_release_resources) {
2330 irqchip->irq_request_resources = gpiochip_irq_reqres;
2331 irqchip->irq_release_resources = gpiochip_irq_relres;
2332 }
461c1a7d
HV
2333 if (WARN_ON(gpiochip->irq.irq_enable))
2334 return;
171948ea
HV
2335 /* Check if the irqchip already has this hook... */
2336 if (irqchip->irq_enable == gpiochip_irq_enable) {
2337 /*
2338 * ...and if so, give a gentle warning that this is bad
2339 * practice.
2340 */
2341 chip_info(gpiochip,
2342 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
2343 return;
2344 }
461c1a7d
HV
2345 gpiochip->irq.irq_enable = irqchip->irq_enable;
2346 gpiochip->irq.irq_disable = irqchip->irq_disable;
2347 irqchip->irq_enable = gpiochip_irq_enable;
2348 irqchip->irq_disable = gpiochip_irq_disable;
14250520
LW
2349}
2350
e0d89728
TR
2351/**
2352 * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
2353 * @gpiochip: the GPIO chip to add the IRQ chip to
39c3fd58
AL
2354 * @lock_key: lockdep class for IRQ lock
2355 * @request_key: lockdep class for IRQ request
e0d89728 2356 */
959bc7b2 2357static int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
2358 struct lock_class_key *lock_key,
2359 struct lock_class_key *request_key)
e0d89728
TR
2360{
2361 struct irq_chip *irqchip = gpiochip->irq.chip;
fdd61a01 2362 const struct irq_domain_ops *ops = NULL;
e0d89728
TR
2363 struct device_node *np;
2364 unsigned int type;
2365 unsigned int i;
2366
2367 if (!irqchip)
2368 return 0;
2369
2370 if (gpiochip->irq.parent_handler && gpiochip->can_sleep) {
b1911710 2371 chip_err(gpiochip, "you cannot have chained interrupts on a chip that may sleep\n");
e0d89728
TR
2372 return -EINVAL;
2373 }
2374
2375 np = gpiochip->gpiodev->dev.of_node;
2376 type = gpiochip->irq.default_type;
2377
2378 /*
2379 * Specifying a default trigger is a terrible idea if DT or ACPI is
2380 * used to configure the interrupts, as you may end up with
2381 * conflicting triggers. Tell the user, and reset to NONE.
2382 */
2383 if (WARN(np && type != IRQ_TYPE_NONE,
2384 "%s: Ignoring %u default trigger\n", np->full_name, type))
2385 type = IRQ_TYPE_NONE;
2386
2387 if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) {
2388 acpi_handle_warn(ACPI_HANDLE(gpiochip->parent),
2389 "Ignoring %u default trigger\n", type);
2390 type = IRQ_TYPE_NONE;
2391 }
2392
2393 gpiochip->to_irq = gpiochip_to_irq;
2394 gpiochip->irq.default_type = type;
959bc7b2 2395 gpiochip->irq.lock_key = lock_key;
39c3fd58 2396 gpiochip->irq.request_key = request_key;
e0d89728 2397
fdd61a01
LW
2398 /* If a parent irqdomain is provided, let's build a hierarchy */
2399 if (gpiochip_hierarchy_is_hierarchical(gpiochip)) {
2400 int ret = gpiochip_hierarchy_add_domain(gpiochip);
2401 if (ret)
2402 return ret;
2403 } else {
2404 /* Some drivers provide custom irqdomain ops */
2405 if (gpiochip->irq.domain_ops)
2406 ops = gpiochip->irq.domain_ops;
2407
2408 if (!ops)
2409 ops = &gpiochip_domain_ops;
2410 gpiochip->irq.domain = irq_domain_add_simple(np,
2411 gpiochip->ngpio,
2412 gpiochip->irq.first,
2413 ops, gpiochip);
2414 if (!gpiochip->irq.domain)
2415 return -EINVAL;
2416 }
e0d89728 2417
e0d89728
TR
2418 if (gpiochip->irq.parent_handler) {
2419 void *data = gpiochip->irq.parent_handler_data ?: gpiochip;
2420
2421 for (i = 0; i < gpiochip->irq.num_parents; i++) {
2422 /*
2423 * The parent IRQ chip is already using the chip_data
2424 * for this IRQ chip, so our callbacks simply use the
2425 * handler_data.
2426 */
2427 irq_set_chained_handler_and_data(gpiochip->irq.parents[i],
2428 gpiochip->irq.parent_handler,
2429 data);
2430 }
e0d89728
TR
2431 }
2432
ca620f2d
HV
2433 gpiochip_set_irq_hooks(gpiochip);
2434
e0d89728
TR
2435 acpi_gpiochip_request_interrupts(gpiochip);
2436
2437 return 0;
2438}
2439
14250520
LW
2440/**
2441 * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
2442 * @gpiochip: the gpiochip to remove the irqchip from
2443 *
2444 * This is called only from gpiochip_remove()
2445 */
2446static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)
2447{
ca620f2d 2448 struct irq_chip *irqchip = gpiochip->irq.chip;
39e5f096 2449 unsigned int offset;
c3626fde 2450
afa82fab
MW
2451 acpi_gpiochip_free_interrupts(gpiochip);
2452
ca620f2d 2453 if (irqchip && gpiochip->irq.parent_handler) {
39e5f096
TR
2454 struct gpio_irq_chip *irq = &gpiochip->irq;
2455 unsigned int i;
2456
2457 for (i = 0; i < irq->num_parents; i++)
2458 irq_set_chained_handler_and_data(irq->parents[i],
2459 NULL, NULL);
25e4fe92
DES
2460 }
2461
c3626fde 2462 /* Remove all IRQ mappings and delete the domain */
f0fbe7bc 2463 if (gpiochip->irq.domain) {
39e5f096
TR
2464 unsigned int irq;
2465
79b804cb
MW
2466 for (offset = 0; offset < gpiochip->ngpio; offset++) {
2467 if (!gpiochip_irqchip_irq_valid(gpiochip, offset))
2468 continue;
f0fbe7bc
TR
2469
2470 irq = irq_find_mapping(gpiochip->irq.domain, offset);
2471 irq_dispose_mapping(irq);
79b804cb 2472 }
f0fbe7bc
TR
2473
2474 irq_domain_remove(gpiochip->irq.domain);
c3626fde 2475 }
14250520 2476
461c1a7d
HV
2477 if (irqchip) {
2478 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
2479 irqchip->irq_request_resources = NULL;
2480 irqchip->irq_release_resources = NULL;
2481 }
2482 if (irqchip->irq_enable == gpiochip_irq_enable) {
2483 irqchip->irq_enable = gpiochip->irq.irq_enable;
2484 irqchip->irq_disable = gpiochip->irq.irq_disable;
2485 }
14250520 2486 }
461c1a7d
HV
2487 gpiochip->irq.irq_enable = NULL;
2488 gpiochip->irq.irq_disable = NULL;
ca620f2d 2489 gpiochip->irq.chip = NULL;
79b804cb
MW
2490
2491 gpiochip_irqchip_free_valid_mask(gpiochip);
14250520
LW
2492}
2493
2494/**
739e6f59 2495 * gpiochip_irqchip_add_key() - adds an irqchip to a gpiochip
14250520
LW
2496 * @gpiochip: the gpiochip to add the irqchip to
2497 * @irqchip: the irqchip to add to the gpiochip
2498 * @first_irq: if not dynamically assigned, the base (first) IRQ to
2499 * allocate gpiochip irqs from
2500 * @handler: the irq handler to use (often a predefined irq core function)
1333b90f
LW
2501 * @type: the default type for IRQs on this irqchip, pass IRQ_TYPE_NONE
2502 * to have the core avoid setting up any default type in the hardware.
60ed54ca 2503 * @threaded: whether this irqchip uses a nested thread handler
39c3fd58
AL
2504 * @lock_key: lockdep class for IRQ lock
2505 * @request_key: lockdep class for IRQ request
14250520
LW
2506 *
2507 * This function closely associates a certain irqchip with a certain
2508 * gpiochip, providing an irq domain to translate the local IRQs to
2509 * global irqs in the gpiolib core, and making sure that the gpiochip
2510 * is passed as chip data to all related functions. Driver callbacks
09dd5f9e 2511 * need to use gpiochip_get_data() to get their local state containers back
14250520
LW
2512 * from the gpiochip passed as chip data. An irqdomain will be stored
2513 * in the gpiochip that shall be used by the driver to handle IRQ number
2514 * translation. The gpiochip will need to be initialized and registered
2515 * before calling this function.
2516 *
c3626fde
LW
2517 * This function will handle two cell:ed simple IRQs and assumes all
2518 * the pins on the gpiochip can generate a unique IRQ. Everything else
14250520
LW
2519 * need to be open coded.
2520 */
739e6f59
LW
2521int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip,
2522 struct irq_chip *irqchip,
2523 unsigned int first_irq,
2524 irq_flow_handler_t handler,
2525 unsigned int type,
60ed54ca 2526 bool threaded,
39c3fd58
AL
2527 struct lock_class_key *lock_key,
2528 struct lock_class_key *request_key)
14250520
LW
2529{
2530 struct device_node *of_node;
14250520
LW
2531
2532 if (!gpiochip || !irqchip)
2533 return -EINVAL;
2534
58383c78 2535 if (!gpiochip->parent) {
14250520
LW
2536 pr_err("missing gpiochip .dev parent pointer\n");
2537 return -EINVAL;
2538 }
60ed54ca 2539 gpiochip->irq.threaded = threaded;
58383c78 2540 of_node = gpiochip->parent->of_node;
14250520
LW
2541#ifdef CONFIG_OF_GPIO
2542 /*
20a8a968 2543 * If the gpiochip has an assigned OF node this takes precedence
c88402c2
BJZ
2544 * FIXME: get rid of this and use gpiochip->parent->of_node
2545 * everywhere
14250520
LW
2546 */
2547 if (gpiochip->of_node)
2548 of_node = gpiochip->of_node;
2549#endif
332e99d5 2550 /*
0a1e0053 2551 * Specifying a default trigger is a terrible idea if DT or ACPI is
332e99d5
MZ
2552 * used to configure the interrupts, as you may end-up with
2553 * conflicting triggers. Tell the user, and reset to NONE.
2554 */
2555 if (WARN(of_node && type != IRQ_TYPE_NONE,
7eb6ce2f 2556 "%pOF: Ignoring %d default trigger\n", of_node, type))
332e99d5 2557 type = IRQ_TYPE_NONE;
0a1e0053
MW
2558 if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) {
2559 acpi_handle_warn(ACPI_HANDLE(gpiochip->parent),
2560 "Ignoring %d default trigger\n", type);
2561 type = IRQ_TYPE_NONE;
2562 }
332e99d5 2563
da80ff81 2564 gpiochip->irq.chip = irqchip;
c7a0aa59 2565 gpiochip->irq.handler = handler;
3634eeb0 2566 gpiochip->irq.default_type = type;
14250520 2567 gpiochip->to_irq = gpiochip_to_irq;
ca9df053 2568 gpiochip->irq.lock_key = lock_key;
39c3fd58 2569 gpiochip->irq.request_key = request_key;
f0fbe7bc 2570 gpiochip->irq.domain = irq_domain_add_simple(of_node,
14250520
LW
2571 gpiochip->ngpio, first_irq,
2572 &gpiochip_domain_ops, gpiochip);
f0fbe7bc 2573 if (!gpiochip->irq.domain) {
da80ff81 2574 gpiochip->irq.chip = NULL;
14250520
LW
2575 return -EINVAL;
2576 }
8b67a1f0 2577
ca620f2d 2578 gpiochip_set_irq_hooks(gpiochip);
14250520 2579
afa82fab
MW
2580 acpi_gpiochip_request_interrupts(gpiochip);
2581
14250520
LW
2582 return 0;
2583}
739e6f59 2584EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_key);
14250520
LW
2585
2586#else /* CONFIG_GPIOLIB_IRQCHIP */
2587
959bc7b2 2588static inline int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
2589 struct lock_class_key *lock_key,
2590 struct lock_class_key *request_key)
e0d89728
TR
2591{
2592 return 0;
2593}
14250520 2594static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip) {}
9411e3aa
AS
2595
2596static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gpiochip)
2597{
2598 return 0;
2599}
2600
79b804cb
MW
2601static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip)
2602{
2603 return 0;
2604}
2605static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip)
2606{ }
14250520
LW
2607
2608#endif /* CONFIG_GPIOLIB_IRQCHIP */
2609
c771c2f4
JG
2610/**
2611 * gpiochip_generic_request() - request the gpio function for a pin
2612 * @chip: the gpiochip owning the GPIO
2613 * @offset: the offset of the GPIO to request for GPIO function
2614 */
2615int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset)
2616{
a9a1d2a7 2617 return pinctrl_gpio_request(chip->gpiodev->base + offset);
c771c2f4
JG
2618}
2619EXPORT_SYMBOL_GPL(gpiochip_generic_request);
2620
2621/**
2622 * gpiochip_generic_free() - free the gpio function from a pin
2623 * @chip: the gpiochip to request the gpio function for
2624 * @offset: the offset of the GPIO to free from GPIO function
2625 */
2626void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset)
2627{
a9a1d2a7 2628 pinctrl_gpio_free(chip->gpiodev->base + offset);
c771c2f4
JG
2629}
2630EXPORT_SYMBOL_GPL(gpiochip_generic_free);
2631
2956b5d9
MW
2632/**
2633 * gpiochip_generic_config() - apply configuration for a pin
2634 * @chip: the gpiochip owning the GPIO
2635 * @offset: the offset of the GPIO to apply the configuration
2636 * @config: the configuration to be applied
2637 */
2638int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset,
2639 unsigned long config)
2640{
2641 return pinctrl_gpio_set_config(chip->gpiodev->base + offset, config);
2642}
2643EXPORT_SYMBOL_GPL(gpiochip_generic_config);
2644
f23f1516 2645#ifdef CONFIG_PINCTRL
165adc9c 2646
586a87e6
CR
2647/**
2648 * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
2649 * @chip: the gpiochip to add the range for
d32651f6 2650 * @pctldev: the pin controller to map to
586a87e6
CR
2651 * @gpio_offset: the start offset in the current gpio_chip number space
2652 * @pin_group: name of the pin group inside the pin controller
973c1714
CL
2653 *
2654 * Calling this function directly from a DeviceTree-supported
2655 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2656 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2657 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
586a87e6
CR
2658 */
2659int gpiochip_add_pingroup_range(struct gpio_chip *chip,
2660 struct pinctrl_dev *pctldev,
2661 unsigned int gpio_offset, const char *pin_group)
2662{
2663 struct gpio_pin_range *pin_range;
fdeb8e15 2664 struct gpio_device *gdev = chip->gpiodev;
586a87e6
CR
2665 int ret;
2666
2667 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
2668 if (!pin_range) {
1a2a99c6 2669 chip_err(chip, "failed to allocate pin ranges\n");
586a87e6
CR
2670 return -ENOMEM;
2671 }
2672
2673 /* Use local offset as range ID */
2674 pin_range->range.id = gpio_offset;
2675 pin_range->range.gc = chip;
2676 pin_range->range.name = chip->label;
fdeb8e15 2677 pin_range->range.base = gdev->base + gpio_offset;
586a87e6
CR
2678 pin_range->pctldev = pctldev;
2679
2680 ret = pinctrl_get_group_pins(pctldev, pin_group,
2681 &pin_range->range.pins,
2682 &pin_range->range.npins);
61c6375d
MN
2683 if (ret < 0) {
2684 kfree(pin_range);
586a87e6 2685 return ret;
61c6375d 2686 }
586a87e6
CR
2687
2688 pinctrl_add_gpio_range(pctldev, &pin_range->range);
2689
1a2a99c6
AS
2690 chip_dbg(chip, "created GPIO range %d->%d ==> %s PINGRP %s\n",
2691 gpio_offset, gpio_offset + pin_range->range.npins - 1,
586a87e6
CR
2692 pinctrl_dev_get_devname(pctldev), pin_group);
2693
20ec3e39 2694 list_add_tail(&pin_range->node, &gdev->pin_ranges);
586a87e6
CR
2695
2696 return 0;
2697}
2698EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
2699
3f0f8670
LW
2700/**
2701 * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
2702 * @chip: the gpiochip to add the range for
950d55f5 2703 * @pinctl_name: the dev_name() of the pin controller to map to
316511c0
LW
2704 * @gpio_offset: the start offset in the current gpio_chip number space
2705 * @pin_offset: the start offset in the pin controller number space
3f0f8670
LW
2706 * @npins: the number of pins from the offset of each pin space (GPIO and
2707 * pin controller) to accumulate in this range
950d55f5
TR
2708 *
2709 * Returns:
2710 * 0 on success, or a negative error-code on failure.
973c1714
CL
2711 *
2712 * Calling this function directly from a DeviceTree-supported
2713 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2714 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2715 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
3f0f8670 2716 */
1e63d7b9 2717int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
316511c0 2718 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 2719 unsigned int npins)
f23f1516
SH
2720{
2721 struct gpio_pin_range *pin_range;
fdeb8e15 2722 struct gpio_device *gdev = chip->gpiodev;
b4d4b1f0 2723 int ret;
f23f1516 2724
3f0f8670 2725 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
f23f1516 2726 if (!pin_range) {
1a2a99c6 2727 chip_err(chip, "failed to allocate pin ranges\n");
1e63d7b9 2728 return -ENOMEM;
f23f1516
SH
2729 }
2730
3f0f8670 2731 /* Use local offset as range ID */
316511c0 2732 pin_range->range.id = gpio_offset;
3f0f8670 2733 pin_range->range.gc = chip;
f23f1516 2734 pin_range->range.name = chip->label;
fdeb8e15 2735 pin_range->range.base = gdev->base + gpio_offset;
316511c0 2736 pin_range->range.pin_base = pin_offset;
f23f1516 2737 pin_range->range.npins = npins;
192c369c 2738 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
f23f1516 2739 &pin_range->range);
8f23ca1a 2740 if (IS_ERR(pin_range->pctldev)) {
b4d4b1f0 2741 ret = PTR_ERR(pin_range->pctldev);
1a2a99c6 2742 chip_err(chip, "could not create pin range\n");
3f0f8670 2743 kfree(pin_range);
b4d4b1f0 2744 return ret;
3f0f8670 2745 }
1a2a99c6
AS
2746 chip_dbg(chip, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
2747 gpio_offset, gpio_offset + npins - 1,
316511c0
LW
2748 pinctl_name,
2749 pin_offset, pin_offset + npins - 1);
f23f1516 2750
20ec3e39 2751 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1e63d7b9
LW
2752
2753 return 0;
f23f1516 2754}
165adc9c 2755EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
f23f1516 2756
3f0f8670
LW
2757/**
2758 * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
2759 * @chip: the chip to remove all the mappings for
2760 */
f23f1516
SH
2761void gpiochip_remove_pin_ranges(struct gpio_chip *chip)
2762{
2763 struct gpio_pin_range *pin_range, *tmp;
20ec3e39 2764 struct gpio_device *gdev = chip->gpiodev;
f23f1516 2765
20ec3e39 2766 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
f23f1516
SH
2767 list_del(&pin_range->node);
2768 pinctrl_remove_gpio_range(pin_range->pctldev,
2769 &pin_range->range);
3f0f8670 2770 kfree(pin_range);
f23f1516
SH
2771 }
2772}
165adc9c
LW
2773EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
2774
2775#endif /* CONFIG_PINCTRL */
f23f1516 2776
d2876d08
DB
2777/* These "optional" allocation calls help prevent drivers from stomping
2778 * on each other, and help provide better diagnostics in debugfs.
2779 * They're called even less than the "set direction" calls.
2780 */
fac9d885 2781static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
d2876d08 2782{
fdeb8e15 2783 struct gpio_chip *chip = desc->gdev->chip;
d377f56f 2784 int ret;
d2876d08 2785 unsigned long flags;
3789f5ac 2786 unsigned offset;
d2876d08 2787
18534df4
MS
2788 if (label) {
2789 label = kstrdup_const(label, GFP_KERNEL);
2790 if (!label)
2791 return -ENOMEM;
2792 }
2793
bcabdef1
AC
2794 spin_lock_irqsave(&gpio_lock, flags);
2795
d2876d08 2796 /* NOTE: gpio_request() can be called in early boot,
35e8bb51 2797 * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
d2876d08
DB
2798 */
2799
2800 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
2801 desc_set_label(desc, label ? : "?");
d377f56f 2802 ret = 0;
438d8908 2803 } else {
18534df4 2804 kfree_const(label);
d377f56f 2805 ret = -EBUSY;
7460db56 2806 goto done;
35e8bb51
DB
2807 }
2808
2809 if (chip->request) {
2810 /* chip->request may sleep */
2811 spin_unlock_irqrestore(&gpio_lock, flags);
3789f5ac
BD
2812 offset = gpio_chip_hwgpio(desc);
2813 if (gpiochip_line_is_valid(chip, offset))
d377f56f 2814 ret = chip->request(chip, offset);
3789f5ac 2815 else
d377f56f 2816 ret = -EINVAL;
35e8bb51
DB
2817 spin_lock_irqsave(&gpio_lock, flags);
2818
d377f56f 2819 if (ret < 0) {
35e8bb51 2820 desc_set_label(desc, NULL);
18534df4 2821 kfree_const(label);
35e8bb51 2822 clear_bit(FLAG_REQUESTED, &desc->flags);
80b0a602 2823 goto done;
35e8bb51 2824 }
438d8908 2825 }
80b0a602
MN
2826 if (chip->get_direction) {
2827 /* chip->get_direction may sleep */
2828 spin_unlock_irqrestore(&gpio_lock, flags);
372e722e 2829 gpiod_get_direction(desc);
80b0a602
MN
2830 spin_lock_irqsave(&gpio_lock, flags);
2831 }
77c2d792
MW
2832done:
2833 spin_unlock_irqrestore(&gpio_lock, flags);
d377f56f 2834 return ret;
77c2d792
MW
2835}
2836
fdeb8e15
LW
2837/*
2838 * This descriptor validation needs to be inserted verbatim into each
2839 * function taking a descriptor, so we need to use a preprocessor
54d77198
LW
2840 * macro to avoid endless duplication. If the desc is NULL it is an
2841 * optional GPIO and calls should just bail out.
fdeb8e15 2842 */
a746a232
RV
2843static int validate_desc(const struct gpio_desc *desc, const char *func)
2844{
2845 if (!desc)
2846 return 0;
2847 if (IS_ERR(desc)) {
2848 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
2849 return PTR_ERR(desc);
2850 }
2851 if (!desc->gdev) {
2852 pr_warn("%s: invalid GPIO (no device)\n", func);
2853 return -EINVAL;
2854 }
2855 if (!desc->gdev->chip) {
2856 dev_warn(&desc->gdev->dev,
2857 "%s: backing chip is gone\n", func);
2858 return 0;
2859 }
2860 return 1;
2861}
2862
fdeb8e15 2863#define VALIDATE_DESC(desc) do { \
a746a232
RV
2864 int __valid = validate_desc(desc, __func__); \
2865 if (__valid <= 0) \
2866 return __valid; \
2867 } while (0)
fdeb8e15
LW
2868
2869#define VALIDATE_DESC_VOID(desc) do { \
a746a232
RV
2870 int __valid = validate_desc(desc, __func__); \
2871 if (__valid <= 0) \
fdeb8e15 2872 return; \
a746a232 2873 } while (0)
fdeb8e15 2874
0eb4c6c2 2875int gpiod_request(struct gpio_desc *desc, const char *label)
77c2d792 2876{
d377f56f 2877 int ret = -EPROBE_DEFER;
fdeb8e15 2878 struct gpio_device *gdev;
77c2d792 2879
fdeb8e15
LW
2880 VALIDATE_DESC(desc);
2881 gdev = desc->gdev;
77c2d792 2882
fdeb8e15 2883 if (try_module_get(gdev->owner)) {
d377f56f
LW
2884 ret = gpiod_request_commit(desc, label);
2885 if (ret < 0)
fdeb8e15 2886 module_put(gdev->owner);
33a68e86
LW
2887 else
2888 get_device(&gdev->dev);
77c2d792
MW
2889 }
2890
d377f56f
LW
2891 if (ret)
2892 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
77c2d792 2893
d377f56f 2894 return ret;
d2876d08 2895}
372e722e 2896
fac9d885 2897static bool gpiod_free_commit(struct gpio_desc *desc)
d2876d08 2898{
77c2d792 2899 bool ret = false;
d2876d08 2900 unsigned long flags;
35e8bb51 2901 struct gpio_chip *chip;
d2876d08 2902
3d599d1c
UKK
2903 might_sleep();
2904
372e722e 2905 gpiod_unexport(desc);
d8f388d8 2906
d2876d08
DB
2907 spin_lock_irqsave(&gpio_lock, flags);
2908
fdeb8e15 2909 chip = desc->gdev->chip;
35e8bb51
DB
2910 if (chip && test_bit(FLAG_REQUESTED, &desc->flags)) {
2911 if (chip->free) {
2912 spin_unlock_irqrestore(&gpio_lock, flags);
9c4ba946 2913 might_sleep_if(chip->can_sleep);
372e722e 2914 chip->free(chip, gpio_chip_hwgpio(desc));
35e8bb51
DB
2915 spin_lock_irqsave(&gpio_lock, flags);
2916 }
18534df4 2917 kfree_const(desc->label);
d2876d08 2918 desc_set_label(desc, NULL);
07697461 2919 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
35e8bb51 2920 clear_bit(FLAG_REQUESTED, &desc->flags);
aca5ce14 2921 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
25553ff0 2922 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
9225d516
DF
2923 clear_bit(FLAG_PULL_UP, &desc->flags);
2924 clear_bit(FLAG_PULL_DOWN, &desc->flags);
2148ad77 2925 clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
f625d460 2926 clear_bit(FLAG_IS_HOGGED, &desc->flags);
77c2d792
MW
2927 ret = true;
2928 }
d2876d08
DB
2929
2930 spin_unlock_irqrestore(&gpio_lock, flags);
77c2d792
MW
2931 return ret;
2932}
2933
0eb4c6c2 2934void gpiod_free(struct gpio_desc *desc)
77c2d792 2935{
fac9d885 2936 if (desc && desc->gdev && gpiod_free_commit(desc)) {
fdeb8e15 2937 module_put(desc->gdev->owner);
33a68e86
LW
2938 put_device(&desc->gdev->dev);
2939 } else {
77c2d792 2940 WARN_ON(extra_checks);
33a68e86 2941 }
d2876d08 2942}
372e722e 2943
d2876d08
DB
2944/**
2945 * gpiochip_is_requested - return string iff signal was requested
2946 * @chip: controller managing the signal
2947 * @offset: of signal within controller's 0..(ngpio - 1) range
2948 *
2949 * Returns NULL if the GPIO is not currently requested, else a string.
9c8318ff
AC
2950 * The string returned is the label passed to gpio_request(); if none has been
2951 * passed it is a meaningless, non-NULL constant.
d2876d08
DB
2952 *
2953 * This function is for use by GPIO controller drivers. The label can
2954 * help with diagnostics, and knowing that the signal is used as a GPIO
2955 * can help avoid accidentally multiplexing it to another controller.
2956 */
2957const char *gpiochip_is_requested(struct gpio_chip *chip, unsigned offset)
2958{
6c0b4e6c 2959 struct gpio_desc *desc;
d2876d08 2960
48b5953e 2961 if (offset >= chip->ngpio)
d2876d08 2962 return NULL;
6c0b4e6c 2963
1c3cdb18 2964 desc = &chip->gpiodev->descs[offset];
6c0b4e6c 2965
372e722e 2966 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
d2876d08 2967 return NULL;
372e722e 2968 return desc->label;
d2876d08
DB
2969}
2970EXPORT_SYMBOL_GPL(gpiochip_is_requested);
2971
77c2d792
MW
2972/**
2973 * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
950d55f5
TR
2974 * @chip: GPIO chip
2975 * @hwnum: hardware number of the GPIO for which to request the descriptor
77c2d792 2976 * @label: label for the GPIO
5923ea6c
LW
2977 * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
2978 * specify things like line inversion semantics with the machine flags
2979 * such as GPIO_OUT_LOW
2980 * @dflags: descriptor request flags for this GPIO or 0 if default, this
2981 * can be used to specify consumer semantics such as open drain
77c2d792
MW
2982 *
2983 * Function allows GPIO chip drivers to request and use their own GPIO
2984 * descriptors via gpiolib API. Difference to gpiod_request() is that this
2985 * function will not increase reference count of the GPIO chip module. This
2986 * allows the GPIO chip module to be unloaded as needed (we assume that the
2987 * GPIO chip driver handles freeing the GPIOs it has requested).
950d55f5
TR
2988 *
2989 * Returns:
2990 * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
2991 * code on failure.
77c2d792 2992 */
abdc08a3 2993struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum,
21abf103 2994 const char *label,
5923ea6c
LW
2995 enum gpio_lookup_flags lflags,
2996 enum gpiod_flags dflags)
77c2d792 2997{
abdc08a3 2998 struct gpio_desc *desc = gpiochip_get_desc(chip, hwnum);
d377f56f 2999 int ret;
77c2d792 3000
abdc08a3
AC
3001 if (IS_ERR(desc)) {
3002 chip_err(chip, "failed to get GPIO descriptor\n");
3003 return desc;
3004 }
3005
d377f56f
LW
3006 ret = gpiod_request_commit(desc, label);
3007 if (ret < 0)
3008 return ERR_PTR(ret);
77c2d792 3009
d377f56f
LW
3010 ret = gpiod_configure_flags(desc, label, lflags, dflags);
3011 if (ret) {
21abf103
LW
3012 chip_err(chip, "setup of own GPIO %s failed\n", label);
3013 gpiod_free_commit(desc);
d377f56f 3014 return ERR_PTR(ret);
21abf103
LW
3015 }
3016
abdc08a3 3017 return desc;
77c2d792 3018}
f7d4ad98 3019EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
77c2d792
MW
3020
3021/**
3022 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
3023 * @desc: GPIO descriptor to free
3024 *
3025 * Function frees the given GPIO requested previously with
3026 * gpiochip_request_own_desc().
3027 */
3028void gpiochip_free_own_desc(struct gpio_desc *desc)
3029{
3030 if (desc)
fac9d885 3031 gpiod_free_commit(desc);
77c2d792 3032}
f7d4ad98 3033EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
d2876d08 3034
fdeb8e15
LW
3035/*
3036 * Drivers MUST set GPIO direction before making get/set calls. In
d2876d08
DB
3037 * some cases this is done in early boot, before IRQs are enabled.
3038 *
3039 * As a rule these aren't called more than once (except for drivers
3040 * using the open-drain emulation idiom) so these are natural places
3041 * to accumulate extra debugging checks. Note that we can't (yet)
3042 * rely on gpio_request() having been called beforehand.
3043 */
3044
71479789
TP
3045static int gpio_set_config(struct gpio_chip *gc, unsigned offset,
3046 enum pin_config_param mode)
3047{
542f3615
MR
3048 unsigned long config;
3049 unsigned arg;
71479789 3050
542f3615 3051 switch (mode) {
2148ad77 3052 case PIN_CONFIG_BIAS_DISABLE:
542f3615
MR
3053 case PIN_CONFIG_BIAS_PULL_DOWN:
3054 case PIN_CONFIG_BIAS_PULL_UP:
3055 arg = 1;
3056 break;
3057
3058 default:
3059 arg = 0;
3060 }
3061
3062 config = PIN_CONF_PACKED(mode, arg);
71479789
TP
3063 return gc->set_config ? gc->set_config(gc, offset, config) : -ENOTSUPP;
3064}
3065
2148ad77
KG
3066static int gpio_set_bias(struct gpio_chip *chip, struct gpio_desc *desc)
3067{
3068 int bias = 0;
3069 int ret = 0;
3070
3071 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
3072 bias = PIN_CONFIG_BIAS_DISABLE;
3073 else if (test_bit(FLAG_PULL_UP, &desc->flags))
3074 bias = PIN_CONFIG_BIAS_PULL_UP;
3075 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
3076 bias = PIN_CONFIG_BIAS_PULL_DOWN;
3077
3078 if (bias) {
3079 ret = gpio_set_config(chip, gpio_chip_hwgpio(desc), bias);
3080 if (ret != -ENOTSUPP)
3081 return ret;
3082 }
3083 return 0;
3084}
3085
79a9becd
AC
3086/**
3087 * gpiod_direction_input - set the GPIO direction to input
3088 * @desc: GPIO to set to input
3089 *
3090 * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
3091 * be called safely on it.
3092 *
3093 * Return 0 in case of success, else an error code.
3094 */
3095int gpiod_direction_input(struct gpio_desc *desc)
d2876d08 3096{
d2876d08 3097 struct gpio_chip *chip;
d377f56f 3098 int ret = 0;
d2876d08 3099
fdeb8e15
LW
3100 VALIDATE_DESC(desc);
3101 chip = desc->gdev->chip;
bcabdef1 3102
e48d194d
LW
3103 /*
3104 * It is legal to have no .get() and .direction_input() specified if
3105 * the chip is output-only, but you can't specify .direction_input()
3106 * and not support the .get() operation, that doesn't make sense.
3107 */
ae9847f4 3108 if (!chip->get && chip->direction_input) {
6424de5a 3109 gpiod_warn(desc,
e48d194d
LW
3110 "%s: missing get() but have direction_input()\n",
3111 __func__);
be1a4b13
LW
3112 return -EIO;
3113 }
3114
e48d194d
LW
3115 /*
3116 * If we have a .direction_input() callback, things are simple,
3117 * just call it. Else we are some input-only chip so try to check the
3118 * direction (if .get_direction() is supported) else we silently
3119 * assume we are in input mode after this.
3120 */
ae9847f4 3121 if (chip->direction_input) {
d377f56f 3122 ret = chip->direction_input(chip, gpio_chip_hwgpio(desc));
ae9847f4
RRD
3123 } else if (chip->get_direction &&
3124 (chip->get_direction(chip, gpio_chip_hwgpio(desc)) != 1)) {
3125 gpiod_warn(desc,
e48d194d
LW
3126 "%s: missing direction_input() operation and line is output\n",
3127 __func__);
ae9847f4
RRD
3128 return -EIO;
3129 }
2148ad77 3130 if (ret == 0) {
d2876d08 3131 clear_bit(FLAG_IS_OUT, &desc->flags);
2148ad77
KG
3132 ret = gpio_set_bias(chip, desc);
3133 }
d449991c 3134
d377f56f 3135 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
d82da797 3136
d377f56f 3137 return ret;
d2876d08 3138}
79a9becd 3139EXPORT_SYMBOL_GPL(gpiod_direction_input);
372e722e 3140
fac9d885 3141static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
d2876d08 3142{
c663e5f5 3143 struct gpio_chip *gc = desc->gdev->chip;
ad17731d 3144 int val = !!value;
ae9847f4 3145 int ret = 0;
d2876d08 3146
e48d194d
LW
3147 /*
3148 * It's OK not to specify .direction_output() if the gpiochip is
3149 * output-only, but if there is then not even a .set() operation it
3150 * is pretty tricky to drive the output line.
3151 */
ae9847f4 3152 if (!gc->set && !gc->direction_output) {
6424de5a 3153 gpiod_warn(desc,
e48d194d
LW
3154 "%s: missing set() and direction_output() operations\n",
3155 __func__);
be1a4b13
LW
3156 return -EIO;
3157 }
3158
ae9847f4
RRD
3159 if (gc->direction_output) {
3160 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
3161 } else {
e48d194d 3162 /* Check that we are in output mode if we can */
ae9847f4
RRD
3163 if (gc->get_direction &&
3164 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
3165 gpiod_warn(desc,
3166 "%s: missing direction_output() operation\n",
3167 __func__);
3168 return -EIO;
3169 }
e48d194d
LW
3170 /*
3171 * If we can't actively set the direction, we are some
3172 * output-only chip, so just drive the output as desired.
3173 */
ae9847f4
RRD
3174 gc->set(gc, gpio_chip_hwgpio(desc), val);
3175 }
3176
c663e5f5 3177 if (!ret)
d2876d08 3178 set_bit(FLAG_IS_OUT, &desc->flags);
ad17731d 3179 trace_gpio_value(desc_to_gpio(desc), 0, val);
c663e5f5
LW
3180 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
3181 return ret;
d2876d08 3182}
ef70bbe1
PZ
3183
3184/**
3185 * gpiod_direction_output_raw - set the GPIO direction to output
3186 * @desc: GPIO to set to output
3187 * @value: initial output value of the GPIO
3188 *
3189 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
3190 * be called safely on it. The initial value of the output must be specified
3191 * as raw value on the physical line without regard for the ACTIVE_LOW status.
3192 *
3193 * Return 0 in case of success, else an error code.
3194 */
3195int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
3196{
fdeb8e15 3197 VALIDATE_DESC(desc);
fac9d885 3198 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1
PZ
3199}
3200EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
3201
3202/**
90df4fe0 3203 * gpiod_direction_output - set the GPIO direction to output
ef70bbe1
PZ
3204 * @desc: GPIO to set to output
3205 * @value: initial output value of the GPIO
3206 *
3207 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
3208 * be called safely on it. The initial value of the output must be specified
3209 * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
3210 * account.
3211 *
3212 * Return 0 in case of success, else an error code.
3213 */
3214int gpiod_direction_output(struct gpio_desc *desc, int value)
3215{
30322bcf 3216 struct gpio_chip *gc;
02e47980
LW
3217 int ret;
3218
fdeb8e15 3219 VALIDATE_DESC(desc);
ef70bbe1
PZ
3220 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3221 value = !value;
ad17731d
LW
3222 else
3223 value = !!value;
02e47980 3224
4e9439dd
HV
3225 /* GPIOs used for enabled IRQs shall not be set as output */
3226 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
3227 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
02e47980
LW
3228 gpiod_err(desc,
3229 "%s: tried to set a GPIO tied to an IRQ as output\n",
3230 __func__);
3231 return -EIO;
3232 }
3233
30322bcf 3234 gc = desc->gdev->chip;
02e47980
LW
3235 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
3236 /* First see if we can enable open drain in hardware */
71479789
TP
3237 ret = gpio_set_config(gc, gpio_chip_hwgpio(desc),
3238 PIN_CONFIG_DRIVE_OPEN_DRAIN);
02e47980
LW
3239 if (!ret)
3240 goto set_output_value;
3241 /* Emulate open drain by not actively driving the line high */
e735244e
BG
3242 if (value) {
3243 ret = gpiod_direction_input(desc);
3244 goto set_output_flag;
3245 }
02e47980
LW
3246 }
3247 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
71479789
TP
3248 ret = gpio_set_config(gc, gpio_chip_hwgpio(desc),
3249 PIN_CONFIG_DRIVE_OPEN_SOURCE);
02e47980
LW
3250 if (!ret)
3251 goto set_output_value;
3252 /* Emulate open source by not actively driving the line low */
e735244e
BG
3253 if (!value) {
3254 ret = gpiod_direction_input(desc);
3255 goto set_output_flag;
3256 }
02e47980 3257 } else {
71479789
TP
3258 gpio_set_config(gc, gpio_chip_hwgpio(desc),
3259 PIN_CONFIG_DRIVE_PUSH_PULL);
02e47980
LW
3260 }
3261
3262set_output_value:
2821ae5f
KG
3263 ret = gpio_set_bias(gc, desc);
3264 if (ret)
3265 return ret;
fac9d885 3266 return gpiod_direction_output_raw_commit(desc, value);
e735244e
BG
3267
3268set_output_flag:
3269 /*
3270 * When emulating open-source or open-drain functionalities by not
3271 * actively driving the line (setting mode to input) we still need to
3272 * set the IS_OUT flag or otherwise we won't be able to set the line
3273 * value anymore.
3274 */
3275 if (ret == 0)
3276 set_bit(FLAG_IS_OUT, &desc->flags);
3277 return ret;
ef70bbe1 3278}
79a9becd 3279EXPORT_SYMBOL_GPL(gpiod_direction_output);
d2876d08 3280
c4b5be98 3281/**
950d55f5
TR
3282 * gpiod_set_debounce - sets @debounce time for a GPIO
3283 * @desc: descriptor of the GPIO for which to set debounce time
3284 * @debounce: debounce time in microseconds
65d87656 3285 *
950d55f5
TR
3286 * Returns:
3287 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
3288 * debounce time.
c4b5be98 3289 */
79a9becd 3290int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce)
c4b5be98 3291{
c4b5be98 3292 struct gpio_chip *chip;
2956b5d9 3293 unsigned long config;
c4b5be98 3294
fdeb8e15
LW
3295 VALIDATE_DESC(desc);
3296 chip = desc->gdev->chip;
2956b5d9 3297 if (!chip->set || !chip->set_config) {
6424de5a 3298 gpiod_dbg(desc,
2956b5d9 3299 "%s: missing set() or set_config() operations\n",
6424de5a 3300 __func__);
65d87656 3301 return -ENOTSUPP;
be1a4b13
LW
3302 }
3303
2956b5d9 3304 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
fa59dd23 3305 return chip->set_config(chip, gpio_chip_hwgpio(desc), config);
c4b5be98 3306}
79a9becd 3307EXPORT_SYMBOL_GPL(gpiod_set_debounce);
372e722e 3308
e10f72bf
AJ
3309/**
3310 * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
3311 * @desc: descriptor of the GPIO for which to configure persistence
3312 * @transitory: True to lose state on suspend or reset, false for persistence
3313 *
3314 * Returns:
3315 * 0 on success, otherwise a negative error code.
3316 */
3317int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
3318{
3319 struct gpio_chip *chip;
3320 unsigned long packed;
3321 int gpio;
3322 int rc;
3323
156dd392 3324 VALIDATE_DESC(desc);
e10f72bf
AJ
3325 /*
3326 * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
3327 * persistence state.
3328 */
3329 if (transitory)
3330 set_bit(FLAG_TRANSITORY, &desc->flags);
3331 else
3332 clear_bit(FLAG_TRANSITORY, &desc->flags);
3333
3334 /* If the driver supports it, set the persistence state now */
3335 chip = desc->gdev->chip;
3336 if (!chip->set_config)
3337 return 0;
3338
3339 packed = pinconf_to_config_packed(PIN_CONFIG_PERSIST_STATE,
3340 !transitory);
3341 gpio = gpio_chip_hwgpio(desc);
fa59dd23 3342 rc = chip->set_config(chip, gpio, packed);
e10f72bf
AJ
3343 if (rc == -ENOTSUPP) {
3344 dev_dbg(&desc->gdev->dev, "Persistence not supported for GPIO %d\n",
3345 gpio);
3346 return 0;
3347 }
3348
3349 return rc;
3350}
3351EXPORT_SYMBOL_GPL(gpiod_set_transitory);
3352
79a9becd
AC
3353/**
3354 * gpiod_is_active_low - test whether a GPIO is active-low or not
3355 * @desc: the gpio descriptor to test
3356 *
3357 * Returns 1 if the GPIO is active-low, 0 otherwise.
3358 */
3359int gpiod_is_active_low(const struct gpio_desc *desc)
372e722e 3360{
fdeb8e15 3361 VALIDATE_DESC(desc);
79a9becd 3362 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
372e722e 3363}
79a9becd 3364EXPORT_SYMBOL_GPL(gpiod_is_active_low);
d2876d08
DB
3365
3366/* I/O calls are only valid after configuration completed; the relevant
3367 * "is this a valid GPIO" error checks should already have been done.
3368 *
3369 * "Get" operations are often inlinable as reading a pin value register,
3370 * and masking the relevant bit in that register.
3371 *
3372 * When "set" operations are inlinable, they involve writing that mask to
3373 * one register to set a low value, or a different register to set it high.
3374 * Otherwise locking is needed, so there may be little value to inlining.
3375 *
3376 *------------------------------------------------------------------------
3377 *
3378 * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
3379 * have requested the GPIO. That can include implicit requesting by
3380 * a direction setting call. Marking a gpio as requested locks its chip
3381 * in memory, guaranteeing that these table lookups need no more locking
3382 * and that gpiochip_remove() will fail.
3383 *
3384 * REVISIT when debugging, consider adding some instrumentation to ensure
3385 * that the GPIO was actually requested.
3386 */
3387
fac9d885 3388static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
d2876d08
DB
3389{
3390 struct gpio_chip *chip;
372e722e 3391 int offset;
e20538b8 3392 int value;
d2876d08 3393
fdeb8e15 3394 chip = desc->gdev->chip;
372e722e 3395 offset = gpio_chip_hwgpio(desc);
e20538b8 3396 value = chip->get ? chip->get(chip, offset) : -EIO;
723a6303 3397 value = value < 0 ? value : !!value;
372e722e 3398 trace_gpio_value(desc_to_gpio(desc), 1, value);
3f397c21 3399 return value;
d2876d08 3400}
372e722e 3401
eec1d566
LW
3402static int gpio_chip_get_multiple(struct gpio_chip *chip,
3403 unsigned long *mask, unsigned long *bits)
3404{
3405 if (chip->get_multiple) {
3406 return chip->get_multiple(chip, mask, bits);
3407 } else if (chip->get) {
3408 int i, value;
3409
3410 for_each_set_bit(i, mask, chip->ngpio) {
3411 value = chip->get(chip, i);
3412 if (value < 0)
3413 return value;
3414 __assign_bit(i, bits, value);
3415 }
3416 return 0;
3417 }
3418 return -EIO;
3419}
3420
3421int gpiod_get_array_value_complex(bool raw, bool can_sleep,
3422 unsigned int array_size,
3423 struct gpio_desc **desc_array,
77588c14 3424 struct gpio_array *array_info,
b9762beb 3425 unsigned long *value_bitmap)
eec1d566 3426{
d377f56f 3427 int ret, i = 0;
b17566a6
JK
3428
3429 /*
3430 * Validate array_info against desc_array and its size.
3431 * It should immediately follow desc_array if both
3432 * have been obtained from the same gpiod_get_array() call.
3433 */
3434 if (array_info && array_info->desc == desc_array &&
3435 array_size <= array_info->size &&
3436 (void *)array_info == desc_array + array_info->size) {
3437 if (!can_sleep)
3438 WARN_ON(array_info->chip->can_sleep);
3439
d377f56f 3440 ret = gpio_chip_get_multiple(array_info->chip,
b17566a6
JK
3441 array_info->get_mask,
3442 value_bitmap);
d377f56f
LW
3443 if (ret)
3444 return ret;
b17566a6
JK
3445
3446 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3447 bitmap_xor(value_bitmap, value_bitmap,
3448 array_info->invert_mask, array_size);
3449
3450 if (bitmap_full(array_info->get_mask, array_size))
3451 return 0;
3452
3453 i = find_first_zero_bit(array_info->get_mask, array_size);
3454 } else {
3455 array_info = NULL;
3456 }
eec1d566
LW
3457
3458 while (i < array_size) {
3459 struct gpio_chip *chip = desc_array[i]->gdev->chip;
3027743f
LA
3460 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
3461 unsigned long *mask, *bits;
eec1d566
LW
3462 int first, j, ret;
3463
3027743f
LA
3464 if (likely(chip->ngpio <= FASTPATH_NGPIO)) {
3465 mask = fastpath;
3466 } else {
3467 mask = kmalloc_array(2 * BITS_TO_LONGS(chip->ngpio),
3468 sizeof(*mask),
3469 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
3470 if (!mask)
3471 return -ENOMEM;
3472 }
3473
3474 bits = mask + BITS_TO_LONGS(chip->ngpio);
3475 bitmap_zero(mask, chip->ngpio);
3476
eec1d566
LW
3477 if (!can_sleep)
3478 WARN_ON(chip->can_sleep);
3479
3480 /* collect all inputs belonging to the same chip */
3481 first = i;
eec1d566
LW
3482 do {
3483 const struct gpio_desc *desc = desc_array[i];
3484 int hwgpio = gpio_chip_hwgpio(desc);
3485
3486 __set_bit(hwgpio, mask);
3487 i++;
b17566a6
JK
3488
3489 if (array_info)
35ae7f96
JK
3490 i = find_next_zero_bit(array_info->get_mask,
3491 array_size, i);
eec1d566
LW
3492 } while ((i < array_size) &&
3493 (desc_array[i]->gdev->chip == chip));
3494
3495 ret = gpio_chip_get_multiple(chip, mask, bits);
3027743f
LA
3496 if (ret) {
3497 if (mask != fastpath)
3498 kfree(mask);
eec1d566 3499 return ret;
3027743f 3500 }
eec1d566 3501
b17566a6 3502 for (j = first; j < i; ) {
eec1d566
LW
3503 const struct gpio_desc *desc = desc_array[j];
3504 int hwgpio = gpio_chip_hwgpio(desc);
3505 int value = test_bit(hwgpio, bits);
3506
3507 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3508 value = !value;
b9762beb 3509 __assign_bit(j, value_bitmap, value);
eec1d566 3510 trace_gpio_value(desc_to_gpio(desc), 1, value);
799d5eb4 3511 j++;
b17566a6
JK
3512
3513 if (array_info)
35ae7f96
JK
3514 j = find_next_zero_bit(array_info->get_mask, i,
3515 j);
eec1d566 3516 }
3027743f
LA
3517
3518 if (mask != fastpath)
3519 kfree(mask);
eec1d566
LW
3520 }
3521 return 0;
3522}
3523
d2876d08 3524/**
79a9becd
AC
3525 * gpiod_get_raw_value() - return a gpio's raw value
3526 * @desc: gpio whose value will be returned
d2876d08 3527 *
79a9becd 3528 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3529 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd 3530 *
827a9b8b 3531 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3532 * complain if the GPIO chip functions potentially sleep.
d2876d08 3533 */
79a9becd 3534int gpiod_get_raw_value(const struct gpio_desc *desc)
d2876d08 3535{
fdeb8e15 3536 VALIDATE_DESC(desc);
3285170f 3537 /* Should be using gpiod_get_raw_value_cansleep() */
fdeb8e15 3538 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3539 return gpiod_get_raw_value_commit(desc);
d2876d08 3540}
79a9becd 3541EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
372e722e 3542
79a9becd
AC
3543/**
3544 * gpiod_get_value() - return a gpio's value
3545 * @desc: gpio whose value will be returned
3546 *
3547 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3548 * account, or negative errno on failure.
79a9becd 3549 *
827a9b8b 3550 * This function can be called from contexts where we cannot sleep, and will
79a9becd
AC
3551 * complain if the GPIO chip functions potentially sleep.
3552 */
3553int gpiod_get_value(const struct gpio_desc *desc)
372e722e 3554{
79a9becd 3555 int value;
fdeb8e15
LW
3556
3557 VALIDATE_DESC(desc);
3285170f 3558 /* Should be using gpiod_get_value_cansleep() */
fdeb8e15 3559 WARN_ON(desc->gdev->chip->can_sleep);
79a9becd 3560
fac9d885 3561 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3562 if (value < 0)
3563 return value;
3564
79a9becd
AC
3565 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3566 value = !value;
3567
3568 return value;
372e722e 3569}
79a9becd 3570EXPORT_SYMBOL_GPL(gpiod_get_value);
d2876d08 3571
eec1d566
LW
3572/**
3573 * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
b9762beb 3574 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3575 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3576 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3577 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3578 *
3579 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3580 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3581 * else an error code.
3582 *
827a9b8b 3583 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
3584 * and it will complain if the GPIO chip functions potentially sleep.
3585 */
3586int gpiod_get_raw_array_value(unsigned int array_size,
b9762beb 3587 struct gpio_desc **desc_array,
77588c14 3588 struct gpio_array *array_info,
b9762beb 3589 unsigned long *value_bitmap)
eec1d566
LW
3590{
3591 if (!desc_array)
3592 return -EINVAL;
3593 return gpiod_get_array_value_complex(true, false, array_size,
77588c14
JK
3594 desc_array, array_info,
3595 value_bitmap);
eec1d566
LW
3596}
3597EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
3598
3599/**
3600 * gpiod_get_array_value() - read values from an array of GPIOs
b9762beb 3601 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3602 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3603 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3604 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3605 *
3606 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3607 * into account. Return 0 in case of success, else an error code.
3608 *
827a9b8b 3609 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
3610 * and it will complain if the GPIO chip functions potentially sleep.
3611 */
3612int gpiod_get_array_value(unsigned int array_size,
b9762beb 3613 struct gpio_desc **desc_array,
77588c14 3614 struct gpio_array *array_info,
b9762beb 3615 unsigned long *value_bitmap)
eec1d566
LW
3616{
3617 if (!desc_array)
3618 return -EINVAL;
3619 return gpiod_get_array_value_complex(false, false, array_size,
77588c14
JK
3620 desc_array, array_info,
3621 value_bitmap);
eec1d566
LW
3622}
3623EXPORT_SYMBOL_GPL(gpiod_get_array_value);
3624
aca5ce14 3625/*
fac9d885 3626 * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
79a9becd 3627 * @desc: gpio descriptor whose state need to be set.
20a8a968 3628 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
aca5ce14 3629 */
fac9d885 3630static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
aca5ce14 3631{
d377f56f 3632 int ret = 0;
fdeb8e15 3633 struct gpio_chip *chip = desc->gdev->chip;
372e722e
AC
3634 int offset = gpio_chip_hwgpio(desc);
3635
aca5ce14 3636 if (value) {
d377f56f 3637 ret = chip->direction_input(chip, offset);
aca5ce14 3638 } else {
d377f56f
LW
3639 ret = chip->direction_output(chip, offset, 0);
3640 if (!ret)
372e722e 3641 set_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 3642 }
d377f56f
LW
3643 trace_gpio_direction(desc_to_gpio(desc), value, ret);
3644 if (ret < 0)
6424de5a
MB
3645 gpiod_err(desc,
3646 "%s: Error in set_value for open drain err %d\n",
d377f56f 3647 __func__, ret);
aca5ce14
LD
3648}
3649
25553ff0 3650/*
79a9becd
AC
3651 * _gpio_set_open_source_value() - Set the open source gpio's value.
3652 * @desc: gpio descriptor whose state need to be set.
20a8a968 3653 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
25553ff0 3654 */
fac9d885 3655static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
25553ff0 3656{
d377f56f 3657 int ret = 0;
fdeb8e15 3658 struct gpio_chip *chip = desc->gdev->chip;
372e722e
AC
3659 int offset = gpio_chip_hwgpio(desc);
3660
25553ff0 3661 if (value) {
d377f56f
LW
3662 ret = chip->direction_output(chip, offset, 1);
3663 if (!ret)
372e722e 3664 set_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 3665 } else {
d377f56f 3666 ret = chip->direction_input(chip, offset);
25553ff0 3667 }
d377f56f
LW
3668 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
3669 if (ret < 0)
6424de5a
MB
3670 gpiod_err(desc,
3671 "%s: Error in set_value for open source err %d\n",
d377f56f 3672 __func__, ret);
25553ff0
LD
3673}
3674
fac9d885 3675static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
d2876d08
DB
3676{
3677 struct gpio_chip *chip;
3678
fdeb8e15 3679 chip = desc->gdev->chip;
372e722e 3680 trace_gpio_value(desc_to_gpio(desc), 0, value);
02e47980 3681 chip->set(chip, gpio_chip_hwgpio(desc), value);
372e722e
AC
3682}
3683
5f424243
RI
3684/*
3685 * set multiple outputs on the same chip;
3686 * use the chip's set_multiple function if available;
3687 * otherwise set the outputs sequentially;
3688 * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
3689 * defines which outputs are to be changed
3690 * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
3691 * defines the values the outputs specified by mask are to be set to
3692 */
3693static void gpio_chip_set_multiple(struct gpio_chip *chip,
3694 unsigned long *mask, unsigned long *bits)
3695{
3696 if (chip->set_multiple) {
3697 chip->set_multiple(chip, mask, bits);
3698 } else {
5e4e6fb3
AS
3699 unsigned int i;
3700
3701 /* set outputs if the corresponding mask bit is set */
3702 for_each_set_bit(i, mask, chip->ngpio)
3703 chip->set(chip, i, test_bit(i, bits));
5f424243
RI
3704 }
3705}
3706
3027743f 3707int gpiod_set_array_value_complex(bool raw, bool can_sleep,
3c940660
GU
3708 unsigned int array_size,
3709 struct gpio_desc **desc_array,
3710 struct gpio_array *array_info,
3711 unsigned long *value_bitmap)
5f424243
RI
3712{
3713 int i = 0;
3714
b17566a6
JK
3715 /*
3716 * Validate array_info against desc_array and its size.
3717 * It should immediately follow desc_array if both
3718 * have been obtained from the same gpiod_get_array() call.
3719 */
3720 if (array_info && array_info->desc == desc_array &&
3721 array_size <= array_info->size &&
3722 (void *)array_info == desc_array + array_info->size) {
3723 if (!can_sleep)
3724 WARN_ON(array_info->chip->can_sleep);
3725
3726 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3727 bitmap_xor(value_bitmap, value_bitmap,
3728 array_info->invert_mask, array_size);
3729
3730 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
3731 value_bitmap);
3732
3733 if (bitmap_full(array_info->set_mask, array_size))
3734 return 0;
3735
3736 i = find_first_zero_bit(array_info->set_mask, array_size);
3737 } else {
3738 array_info = NULL;
3739 }
3740
5f424243 3741 while (i < array_size) {
fdeb8e15 3742 struct gpio_chip *chip = desc_array[i]->gdev->chip;
3027743f
LA
3743 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
3744 unsigned long *mask, *bits;
5f424243
RI
3745 int count = 0;
3746
3027743f
LA
3747 if (likely(chip->ngpio <= FASTPATH_NGPIO)) {
3748 mask = fastpath;
3749 } else {
3750 mask = kmalloc_array(2 * BITS_TO_LONGS(chip->ngpio),
3751 sizeof(*mask),
3752 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
3753 if (!mask)
3754 return -ENOMEM;
3755 }
3756
3757 bits = mask + BITS_TO_LONGS(chip->ngpio);
3758 bitmap_zero(mask, chip->ngpio);
3759
38e003f4 3760 if (!can_sleep)
5f424243 3761 WARN_ON(chip->can_sleep);
38e003f4 3762
5f424243
RI
3763 do {
3764 struct gpio_desc *desc = desc_array[i];
3765 int hwgpio = gpio_chip_hwgpio(desc);
b9762beb 3766 int value = test_bit(i, value_bitmap);
5f424243 3767
b17566a6
JK
3768 /*
3769 * Pins applicable for fast input but not for
3770 * fast output processing may have been already
3771 * inverted inside the fast path, skip them.
3772 */
3773 if (!raw && !(array_info &&
3774 test_bit(i, array_info->invert_mask)) &&
3775 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
5f424243
RI
3776 value = !value;
3777 trace_gpio_value(desc_to_gpio(desc), 0, value);
3778 /*
3779 * collect all normal outputs belonging to the same chip
3780 * open drain and open source outputs are set individually
3781 */
02e47980 3782 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
fac9d885 3783 gpio_set_open_drain_value_commit(desc, value);
02e47980 3784 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
fac9d885 3785 gpio_set_open_source_value_commit(desc, value);
5f424243
RI
3786 } else {
3787 __set_bit(hwgpio, mask);
38e003f4 3788 if (value)
5f424243 3789 __set_bit(hwgpio, bits);
38e003f4 3790 else
5f424243 3791 __clear_bit(hwgpio, bits);
5f424243
RI
3792 count++;
3793 }
3794 i++;
b17566a6
JK
3795
3796 if (array_info)
35ae7f96
JK
3797 i = find_next_zero_bit(array_info->set_mask,
3798 array_size, i);
fdeb8e15
LW
3799 } while ((i < array_size) &&
3800 (desc_array[i]->gdev->chip == chip));
5f424243 3801 /* push collected bits to outputs */
38e003f4 3802 if (count != 0)
5f424243 3803 gpio_chip_set_multiple(chip, mask, bits);
3027743f
LA
3804
3805 if (mask != fastpath)
3806 kfree(mask);
5f424243 3807 }
3027743f 3808 return 0;
5f424243
RI
3809}
3810
d2876d08 3811/**
79a9becd
AC
3812 * gpiod_set_raw_value() - assign a gpio's raw value
3813 * @desc: gpio whose value will be assigned
d2876d08 3814 * @value: value to assign
d2876d08 3815 *
79a9becd
AC
3816 * Set the raw value of the GPIO, i.e. the value of its physical line without
3817 * regard for its ACTIVE_LOW status.
3818 *
827a9b8b 3819 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3820 * complain if the GPIO chip functions potentially sleep.
d2876d08 3821 */
79a9becd 3822void gpiod_set_raw_value(struct gpio_desc *desc, int value)
372e722e 3823{
fdeb8e15 3824 VALIDATE_DESC_VOID(desc);
3285170f 3825 /* Should be using gpiod_set_raw_value_cansleep() */
fdeb8e15 3826 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3827 gpiod_set_raw_value_commit(desc, value);
d2876d08 3828}
79a9becd 3829EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
d2876d08 3830
1e77fc82
GU
3831/**
3832 * gpiod_set_value_nocheck() - set a GPIO line value without checking
3833 * @desc: the descriptor to set the value on
3834 * @value: value to set
3835 *
3836 * This sets the value of a GPIO line backing a descriptor, applying
3837 * different semantic quirks like active low and open drain/source
3838 * handling.
3839 */
3840static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
3841{
3842 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3843 value = !value;
3844 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
3845 gpio_set_open_drain_value_commit(desc, value);
3846 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
3847 gpio_set_open_source_value_commit(desc, value);
3848 else
3849 gpiod_set_raw_value_commit(desc, value);
3850}
3851
d2876d08 3852/**
79a9becd
AC
3853 * gpiod_set_value() - assign a gpio's value
3854 * @desc: gpio whose value will be assigned
3855 * @value: value to assign
3856 *
02e47980
LW
3857 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
3858 * OPEN_DRAIN and OPEN_SOURCE flags into account.
d2876d08 3859 *
827a9b8b 3860 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3861 * complain if the GPIO chip functions potentially sleep.
d2876d08 3862 */
79a9becd 3863void gpiod_set_value(struct gpio_desc *desc, int value)
d2876d08 3864{
fdeb8e15 3865 VALIDATE_DESC_VOID(desc);
3285170f 3866 /* Should be using gpiod_set_value_cansleep() */
fdeb8e15 3867 WARN_ON(desc->gdev->chip->can_sleep);
1e77fc82 3868 gpiod_set_value_nocheck(desc, value);
372e722e 3869}
79a9becd 3870EXPORT_SYMBOL_GPL(gpiod_set_value);
d2876d08 3871
5f424243 3872/**
3fff99bc 3873 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
b9762beb 3874 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3875 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3876 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3877 * @value_bitmap: bitmap of values to assign
5f424243
RI
3878 *
3879 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3880 * without regard for their ACTIVE_LOW status.
3881 *
827a9b8b 3882 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3883 * complain if the GPIO chip functions potentially sleep.
3884 */
3027743f 3885int gpiod_set_raw_array_value(unsigned int array_size,
3c940660
GU
3886 struct gpio_desc **desc_array,
3887 struct gpio_array *array_info,
3888 unsigned long *value_bitmap)
5f424243
RI
3889{
3890 if (!desc_array)
3027743f
LA
3891 return -EINVAL;
3892 return gpiod_set_array_value_complex(true, false, array_size,
77588c14 3893 desc_array, array_info, value_bitmap);
5f424243 3894}
3fff99bc 3895EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
5f424243
RI
3896
3897/**
3fff99bc 3898 * gpiod_set_array_value() - assign values to an array of GPIOs
b9762beb 3899 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3900 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3901 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3902 * @value_bitmap: bitmap of values to assign
5f424243
RI
3903 *
3904 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3905 * into account.
3906 *
827a9b8b 3907 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3908 * complain if the GPIO chip functions potentially sleep.
3909 */
cf9af0d5
GU
3910int gpiod_set_array_value(unsigned int array_size,
3911 struct gpio_desc **desc_array,
3912 struct gpio_array *array_info,
3913 unsigned long *value_bitmap)
5f424243
RI
3914{
3915 if (!desc_array)
cf9af0d5
GU
3916 return -EINVAL;
3917 return gpiod_set_array_value_complex(false, false, array_size,
3918 desc_array, array_info,
3919 value_bitmap);
5f424243 3920}
3fff99bc 3921EXPORT_SYMBOL_GPL(gpiod_set_array_value);
5f424243 3922
d2876d08 3923/**
79a9becd
AC
3924 * gpiod_cansleep() - report whether gpio value access may sleep
3925 * @desc: gpio to check
d2876d08 3926 *
d2876d08 3927 */
79a9becd 3928int gpiod_cansleep(const struct gpio_desc *desc)
372e722e 3929{
fdeb8e15
LW
3930 VALIDATE_DESC(desc);
3931 return desc->gdev->chip->can_sleep;
d2876d08 3932}
79a9becd 3933EXPORT_SYMBOL_GPL(gpiod_cansleep);
d2876d08 3934
90b39402
LW
3935/**
3936 * gpiod_set_consumer_name() - set the consumer name for the descriptor
3937 * @desc: gpio to set the consumer name on
3938 * @name: the new consumer name
3939 */
18534df4 3940int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
90b39402 3941{
18534df4
MS
3942 VALIDATE_DESC(desc);
3943 if (name) {
3944 name = kstrdup_const(name, GFP_KERNEL);
3945 if (!name)
3946 return -ENOMEM;
3947 }
3948
3949 kfree_const(desc->label);
3950 desc_set_label(desc, name);
3951
3952 return 0;
90b39402
LW
3953}
3954EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
3955
0f6d504e 3956/**
79a9becd
AC
3957 * gpiod_to_irq() - return the IRQ corresponding to a GPIO
3958 * @desc: gpio whose IRQ will be returned (already requested)
0f6d504e 3959 *
79a9becd
AC
3960 * Return the IRQ corresponding to the passed GPIO, or an error code in case of
3961 * error.
0f6d504e 3962 */
79a9becd 3963int gpiod_to_irq(const struct gpio_desc *desc)
0f6d504e 3964{
4c37ce86
LW
3965 struct gpio_chip *chip;
3966 int offset;
0f6d504e 3967
79bb71bd
LW
3968 /*
3969 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
3970 * requires this function to not return zero on an invalid descriptor
3971 * but rather a negative error number.
3972 */
bfbbe44d 3973 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
79bb71bd
LW
3974 return -EINVAL;
3975
fdeb8e15 3976 chip = desc->gdev->chip;
372e722e 3977 offset = gpio_chip_hwgpio(desc);
4c37ce86
LW
3978 if (chip->to_irq) {
3979 int retirq = chip->to_irq(chip, offset);
3980
3981 /* Zero means NO_IRQ */
3982 if (!retirq)
3983 return -ENXIO;
3984
3985 return retirq;
3986 }
3987 return -ENXIO;
0f6d504e 3988}
79a9becd 3989EXPORT_SYMBOL_GPL(gpiod_to_irq);
0f6d504e 3990
d468bf9e 3991/**
e3a2e878 3992 * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
d74be6df
AC
3993 * @chip: the chip the GPIO to lock belongs to
3994 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3995 *
3996 * This is used directly by GPIO drivers that want to lock down
f438acdf 3997 * a certain GPIO line to be used for IRQs.
d468bf9e 3998 */
e3a2e878 3999int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset)
372e722e 4000{
9c10280d
LW
4001 struct gpio_desc *desc;
4002
4003 desc = gpiochip_get_desc(chip, offset);
4004 if (IS_ERR(desc))
4005 return PTR_ERR(desc);
4006
60f8339e
LW
4007 /*
4008 * If it's fast: flush the direction setting if something changed
4009 * behind our back
4010 */
4011 if (!chip->can_sleep && chip->get_direction) {
80956790 4012 int dir = gpiod_get_direction(desc);
9c10280d 4013
36b31279
AS
4014 if (dir < 0) {
4015 chip_err(chip, "%s: cannot get GPIO direction\n",
4016 __func__);
4017 return dir;
4018 }
9c10280d 4019 }
d468bf9e 4020
9c10280d 4021 if (test_bit(FLAG_IS_OUT, &desc->flags)) {
d74be6df 4022 chip_err(chip,
b1911710
AS
4023 "%s: tried to flag a GPIO set as output for IRQ\n",
4024 __func__);
d468bf9e
LW
4025 return -EIO;
4026 }
4027
9c10280d 4028 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 4029 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
4030
4031 /*
4032 * If the consumer has not set up a label (such as when the
4033 * IRQ is referenced from .to_irq()) we set up a label here
4034 * so it is clear this is used as an interrupt.
4035 */
4036 if (!desc->label)
4037 desc_set_label(desc, "interrupt");
4038
d468bf9e 4039 return 0;
372e722e 4040}
e3a2e878 4041EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
d2876d08 4042
d468bf9e 4043/**
e3a2e878 4044 * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
d74be6df
AC
4045 * @chip: the chip the GPIO to lock belongs to
4046 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
4047 *
4048 * This is used directly by GPIO drivers that want to indicate
4049 * that a certain GPIO is no longer used exclusively for IRQ.
d2876d08 4050 */
e3a2e878 4051void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset)
d468bf9e 4052{
3940c34a
LW
4053 struct gpio_desc *desc;
4054
4055 desc = gpiochip_get_desc(chip, offset);
4056 if (IS_ERR(desc))
d468bf9e 4057 return;
d2876d08 4058
3940c34a 4059 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 4060 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
4061
4062 /* If we only had this marking, erase it */
4063 if (desc->label && !strcmp(desc->label, "interrupt"))
4064 desc_set_label(desc, NULL);
d468bf9e 4065}
e3a2e878 4066EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
d468bf9e 4067
4e9439dd
HV
4068void gpiochip_disable_irq(struct gpio_chip *chip, unsigned int offset)
4069{
4070 struct gpio_desc *desc = gpiochip_get_desc(chip, offset);
4071
4072 if (!IS_ERR(desc) &&
4073 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
4074 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
4075}
4076EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
4077
4078void gpiochip_enable_irq(struct gpio_chip *chip, unsigned int offset)
4079{
4080 struct gpio_desc *desc = gpiochip_get_desc(chip, offset);
4081
4082 if (!IS_ERR(desc) &&
4083 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
4084 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags));
4085 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
4086 }
4087}
4088EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
4089
6cee3821
LW
4090bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset)
4091{
4092 if (offset >= chip->ngpio)
4093 return false;
4094
4095 return test_bit(FLAG_USED_AS_IRQ, &chip->gpiodev->descs[offset].flags);
4096}
4097EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
4098
4e6b8238
HV
4099int gpiochip_reqres_irq(struct gpio_chip *chip, unsigned int offset)
4100{
4101 int ret;
4102
4103 if (!try_module_get(chip->gpiodev->owner))
4104 return -ENODEV;
4105
4106 ret = gpiochip_lock_as_irq(chip, offset);
4107 if (ret) {
4108 chip_err(chip, "unable to lock HW IRQ %u for IRQ\n", offset);
4109 module_put(chip->gpiodev->owner);
4110 return ret;
4111 }
4112 return 0;
4113}
4114EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
4115
4116void gpiochip_relres_irq(struct gpio_chip *chip, unsigned int offset)
4117{
4118 gpiochip_unlock_as_irq(chip, offset);
4119 module_put(chip->gpiodev->owner);
4120}
4121EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
4122
143b65d6
LW
4123bool gpiochip_line_is_open_drain(struct gpio_chip *chip, unsigned int offset)
4124{
4125 if (offset >= chip->ngpio)
4126 return false;
4127
4128 return test_bit(FLAG_OPEN_DRAIN, &chip->gpiodev->descs[offset].flags);
4129}
4130EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
4131
4132bool gpiochip_line_is_open_source(struct gpio_chip *chip, unsigned int offset)
4133{
4134 if (offset >= chip->ngpio)
4135 return false;
4136
4137 return test_bit(FLAG_OPEN_SOURCE, &chip->gpiodev->descs[offset].flags);
4138}
4139EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
4140
05f479bf
CK
4141bool gpiochip_line_is_persistent(struct gpio_chip *chip, unsigned int offset)
4142{
4143 if (offset >= chip->ngpio)
4144 return false;
4145
e10f72bf 4146 return !test_bit(FLAG_TRANSITORY, &chip->gpiodev->descs[offset].flags);
05f479bf
CK
4147}
4148EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
4149
79a9becd
AC
4150/**
4151 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
4152 * @desc: gpio whose value will be returned
4153 *
4154 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 4155 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd
AC
4156 *
4157 * This function is to be called from contexts that can sleep.
d2876d08 4158 */
79a9becd 4159int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
d2876d08 4160{
d2876d08 4161 might_sleep_if(extra_checks);
fdeb8e15 4162 VALIDATE_DESC(desc);
fac9d885 4163 return gpiod_get_raw_value_commit(desc);
d2876d08 4164}
79a9becd 4165EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
372e722e 4166
79a9becd
AC
4167/**
4168 * gpiod_get_value_cansleep() - return a gpio's value
4169 * @desc: gpio whose value will be returned
4170 *
4171 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 4172 * account, or negative errno on failure.
79a9becd
AC
4173 *
4174 * This function is to be called from contexts that can sleep.
4175 */
4176int gpiod_get_value_cansleep(const struct gpio_desc *desc)
d2876d08 4177{
3f397c21 4178 int value;
d2876d08
DB
4179
4180 might_sleep_if(extra_checks);
fdeb8e15 4181 VALIDATE_DESC(desc);
fac9d885 4182 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
4183 if (value < 0)
4184 return value;
4185
79a9becd
AC
4186 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
4187 value = !value;
4188
3f397c21 4189 return value;
d2876d08 4190}
79a9becd 4191EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
372e722e 4192
eec1d566
LW
4193/**
4194 * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
b9762beb 4195 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 4196 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 4197 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4198 * @value_bitmap: bitmap to store the read values
eec1d566
LW
4199 *
4200 * Read the raw values of the GPIOs, i.e. the values of the physical lines
4201 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
4202 * else an error code.
4203 *
4204 * This function is to be called from contexts that can sleep.
4205 */
4206int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
4207 struct gpio_desc **desc_array,
77588c14 4208 struct gpio_array *array_info,
b9762beb 4209 unsigned long *value_bitmap)
eec1d566
LW
4210{
4211 might_sleep_if(extra_checks);
4212 if (!desc_array)
4213 return -EINVAL;
4214 return gpiod_get_array_value_complex(true, true, array_size,
77588c14
JK
4215 desc_array, array_info,
4216 value_bitmap);
eec1d566
LW
4217}
4218EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
4219
4220/**
4221 * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
b9762beb 4222 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 4223 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 4224 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4225 * @value_bitmap: bitmap to store the read values
eec1d566
LW
4226 *
4227 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
4228 * into account. Return 0 in case of success, else an error code.
4229 *
4230 * This function is to be called from contexts that can sleep.
4231 */
4232int gpiod_get_array_value_cansleep(unsigned int array_size,
4233 struct gpio_desc **desc_array,
77588c14 4234 struct gpio_array *array_info,
b9762beb 4235 unsigned long *value_bitmap)
eec1d566
LW
4236{
4237 might_sleep_if(extra_checks);
4238 if (!desc_array)
4239 return -EINVAL;
4240 return gpiod_get_array_value_complex(false, true, array_size,
77588c14
JK
4241 desc_array, array_info,
4242 value_bitmap);
eec1d566
LW
4243}
4244EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
4245
79a9becd
AC
4246/**
4247 * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
4248 * @desc: gpio whose value will be assigned
4249 * @value: value to assign
4250 *
4251 * Set the raw value of the GPIO, i.e. the value of its physical line without
4252 * regard for its ACTIVE_LOW status.
4253 *
4254 * This function is to be called from contexts that can sleep.
4255 */
4256void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
372e722e 4257{
d2876d08 4258 might_sleep_if(extra_checks);
fdeb8e15 4259 VALIDATE_DESC_VOID(desc);
fac9d885 4260 gpiod_set_raw_value_commit(desc, value);
372e722e 4261}
79a9becd 4262EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
d2876d08 4263
79a9becd
AC
4264/**
4265 * gpiod_set_value_cansleep() - assign a gpio's value
4266 * @desc: gpio whose value will be assigned
4267 * @value: value to assign
4268 *
4269 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
4270 * account
4271 *
4272 * This function is to be called from contexts that can sleep.
4273 */
4274void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
d2876d08 4275{
d2876d08 4276 might_sleep_if(extra_checks);
fdeb8e15 4277 VALIDATE_DESC_VOID(desc);
1e77fc82 4278 gpiod_set_value_nocheck(desc, value);
372e722e 4279}
79a9becd 4280EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
d2876d08 4281
5f424243 4282/**
3fff99bc 4283 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 4284 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4285 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4286 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4287 * @value_bitmap: bitmap of values to assign
5f424243
RI
4288 *
4289 * Set the raw values of the GPIOs, i.e. the values of the physical lines
4290 * without regard for their ACTIVE_LOW status.
4291 *
4292 * This function is to be called from contexts that can sleep.
4293 */
3027743f 4294int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3c940660
GU
4295 struct gpio_desc **desc_array,
4296 struct gpio_array *array_info,
4297 unsigned long *value_bitmap)
5f424243
RI
4298{
4299 might_sleep_if(extra_checks);
4300 if (!desc_array)
3027743f
LA
4301 return -EINVAL;
4302 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
77588c14 4303 array_info, value_bitmap);
5f424243 4304}
3fff99bc 4305EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
5f424243 4306
3946d187
DT
4307/**
4308 * gpiod_add_lookup_tables() - register GPIO device consumers
4309 * @tables: list of tables of consumers to register
4310 * @n: number of tables in the list
4311 */
4312void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
4313{
4314 unsigned int i;
4315
4316 mutex_lock(&gpio_lookup_lock);
4317
4318 for (i = 0; i < n; i++)
4319 list_add_tail(&tables[i]->list, &gpio_lookup_list);
4320
4321 mutex_unlock(&gpio_lookup_lock);
4322}
4323
5f424243 4324/**
3fff99bc 4325 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 4326 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4327 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4328 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4329 * @value_bitmap: bitmap of values to assign
5f424243
RI
4330 *
4331 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
4332 * into account.
4333 *
4334 * This function is to be called from contexts that can sleep.
4335 */
cf9af0d5
GU
4336int gpiod_set_array_value_cansleep(unsigned int array_size,
4337 struct gpio_desc **desc_array,
4338 struct gpio_array *array_info,
4339 unsigned long *value_bitmap)
5f424243
RI
4340{
4341 might_sleep_if(extra_checks);
4342 if (!desc_array)
cf9af0d5
GU
4343 return -EINVAL;
4344 return gpiod_set_array_value_complex(false, true, array_size,
4345 desc_array, array_info,
4346 value_bitmap);
5f424243 4347}
3fff99bc 4348EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
5f424243 4349
bae48da2 4350/**
ad824783
AC
4351 * gpiod_add_lookup_table() - register GPIO device consumers
4352 * @table: table of consumers to register
bae48da2 4353 */
ad824783 4354void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
bae48da2
AC
4355{
4356 mutex_lock(&gpio_lookup_lock);
4357
ad824783 4358 list_add_tail(&table->list, &gpio_lookup_list);
bae48da2
AC
4359
4360 mutex_unlock(&gpio_lookup_lock);
4361}
226b2242 4362EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
bae48da2 4363
be9015ab
SK
4364/**
4365 * gpiod_remove_lookup_table() - unregister GPIO device consumers
4366 * @table: table of consumers to unregister
4367 */
4368void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
4369{
4370 mutex_lock(&gpio_lookup_lock);
4371
4372 list_del(&table->list);
4373
4374 mutex_unlock(&gpio_lookup_lock);
4375}
226b2242 4376EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
be9015ab 4377
a411e81e
BG
4378/**
4379 * gpiod_add_hogs() - register a set of GPIO hogs from machine code
4380 * @hogs: table of gpio hog entries with a zeroed sentinel at the end
4381 */
4382void gpiod_add_hogs(struct gpiod_hog *hogs)
4383{
4384 struct gpio_chip *chip;
4385 struct gpiod_hog *hog;
4386
4387 mutex_lock(&gpio_machine_hogs_mutex);
4388
4389 for (hog = &hogs[0]; hog->chip_label; hog++) {
4390 list_add_tail(&hog->list, &gpio_machine_hogs);
4391
4392 /*
4393 * The chip may have been registered earlier, so check if it
4394 * exists and, if so, try to hog the line now.
4395 */
4396 chip = find_chip_by_name(hog->chip_label);
4397 if (chip)
4398 gpiochip_machine_hog(chip, hog);
4399 }
4400
4401 mutex_unlock(&gpio_machine_hogs_mutex);
4402}
4403EXPORT_SYMBOL_GPL(gpiod_add_hogs);
4404
ad824783 4405static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
bae48da2
AC
4406{
4407 const char *dev_id = dev ? dev_name(dev) : NULL;
ad824783 4408 struct gpiod_lookup_table *table;
bae48da2
AC
4409
4410 mutex_lock(&gpio_lookup_lock);
4411
ad824783
AC
4412 list_for_each_entry(table, &gpio_lookup_list, list) {
4413 if (table->dev_id && dev_id) {
4414 /*
4415 * Valid strings on both ends, must be identical to have
4416 * a match
4417 */
4418 if (!strcmp(table->dev_id, dev_id))
4419 goto found;
4420 } else {
4421 /*
4422 * One of the pointers is NULL, so both must be to have
4423 * a match
4424 */
4425 if (dev_id == table->dev_id)
4426 goto found;
4427 }
4428 }
4429 table = NULL;
bae48da2 4430
ad824783
AC
4431found:
4432 mutex_unlock(&gpio_lookup_lock);
4433 return table;
4434}
bae48da2 4435
ad824783 4436static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
fed7026a 4437 unsigned int idx, unsigned long *flags)
ad824783 4438{
2a3cf6a3 4439 struct gpio_desc *desc = ERR_PTR(-ENOENT);
ad824783
AC
4440 struct gpiod_lookup_table *table;
4441 struct gpiod_lookup *p;
bae48da2 4442
ad824783
AC
4443 table = gpiod_find_lookup_table(dev);
4444 if (!table)
4445 return desc;
bae48da2 4446
ad824783
AC
4447 for (p = &table->table[0]; p->chip_label; p++) {
4448 struct gpio_chip *chip;
bae48da2 4449
ad824783 4450 /* idx must always match exactly */
bae48da2
AC
4451 if (p->idx != idx)
4452 continue;
4453
ad824783
AC
4454 /* If the lookup entry has a con_id, require exact match */
4455 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
4456 continue;
bae48da2 4457
ad824783 4458 chip = find_chip_by_name(p->chip_label);
bae48da2 4459
ad824783 4460 if (!chip) {
8853daf3
JK
4461 /*
4462 * As the lookup table indicates a chip with
4463 * p->chip_label should exist, assume it may
4464 * still appear later and let the interested
4465 * consumer be probed again or let the Deferred
4466 * Probe infrastructure handle the error.
4467 */
4468 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
4469 p->chip_label);
4470 return ERR_PTR(-EPROBE_DEFER);
ad824783 4471 }
bae48da2 4472
ad824783 4473 if (chip->ngpio <= p->chip_hwnum) {
2a3cf6a3
AC
4474 dev_err(dev,
4475 "requested GPIO %d is out of range [0..%d] for chip %s\n",
4476 idx, chip->ngpio, chip->label);
4477 return ERR_PTR(-EINVAL);
bae48da2 4478 }
bae48da2 4479
bb1e88cc 4480 desc = gpiochip_get_desc(chip, p->chip_hwnum);
ad824783 4481 *flags = p->flags;
bae48da2 4482
2a3cf6a3 4483 return desc;
bae48da2
AC
4484 }
4485
bae48da2
AC
4486 return desc;
4487}
4488
66858527
RI
4489static int platform_gpio_count(struct device *dev, const char *con_id)
4490{
4491 struct gpiod_lookup_table *table;
4492 struct gpiod_lookup *p;
4493 unsigned int count = 0;
4494
4495 table = gpiod_find_lookup_table(dev);
4496 if (!table)
4497 return -ENOENT;
4498
4499 for (p = &table->table[0]; p->chip_label; p++) {
4500 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
4501 (!con_id && !p->con_id))
4502 count++;
4503 }
4504 if (!count)
4505 return -ENOENT;
4506
4507 return count;
4508}
4509
13949fa9
DT
4510/**
4511 * fwnode_gpiod_get_index - obtain a GPIO from firmware node
4512 * @fwnode: handle of the firmware node
4513 * @con_id: function within the GPIO consumer
4514 * @index: index of the GPIO to obtain for the consumer
4515 * @flags: GPIO initialization flags
4516 * @label: label to attach to the requested GPIO
4517 *
4518 * This function can be used for drivers that get their configuration
4519 * from opaque firmware.
4520 *
4521 * The function properly finds the corresponding GPIO using whatever is the
4522 * underlying firmware interface and then makes sure that the GPIO
4523 * descriptor is requested before it is returned to the caller.
4524 *
4525 * Returns:
4526 * On successful request the GPIO pin is configured in accordance with
4527 * provided @flags.
4528 *
4529 * In case of error an ERR_PTR() is returned.
4530 */
4531struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
4532 const char *con_id, int index,
4533 enum gpiod_flags flags,
4534 const char *label)
4535{
4536 struct gpio_desc *desc;
4537 char prop_name[32]; /* 32 is max size of property name */
4538 unsigned int i;
4539
4540 for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) {
4541 if (con_id)
4542 snprintf(prop_name, sizeof(prop_name), "%s-%s",
4543 con_id, gpio_suffixes[i]);
4544 else
4545 snprintf(prop_name, sizeof(prop_name), "%s",
4546 gpio_suffixes[i]);
4547
4548 desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags,
4549 label);
4550 if (!IS_ERR(desc) || (PTR_ERR(desc) != -ENOENT))
4551 break;
4552 }
4553
4554 return desc;
4555}
4556EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
4557
66858527
RI
4558/**
4559 * gpiod_count - return the number of GPIOs associated with a device / function
4560 * or -ENOENT if no GPIO has been assigned to the requested function
4561 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4562 * @con_id: function within the GPIO consumer
4563 */
4564int gpiod_count(struct device *dev, const char *con_id)
4565{
4566 int count = -ENOENT;
4567
4568 if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node)
f626d6df 4569 count = of_gpio_get_count(dev, con_id);
66858527
RI
4570 else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev))
4571 count = acpi_gpio_count(dev, con_id);
4572
4573 if (count < 0)
4574 count = platform_gpio_count(dev, con_id);
4575
4576 return count;
4577}
4578EXPORT_SYMBOL_GPL(gpiod_count);
4579
bae48da2 4580/**
0879162f 4581 * gpiod_get - obtain a GPIO for a given GPIO function
ad824783 4582 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2 4583 * @con_id: function within the GPIO consumer
39b2bbe3 4584 * @flags: optional GPIO initialization flags
bae48da2
AC
4585 *
4586 * Return the GPIO descriptor corresponding to the function con_id of device
2a3cf6a3 4587 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
20a8a968 4588 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
bae48da2 4589 */
b17d1bf1 4590struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
39b2bbe3 4591 enum gpiod_flags flags)
bae48da2 4592{
39b2bbe3 4593 return gpiod_get_index(dev, con_id, 0, flags);
bae48da2 4594}
b17d1bf1 4595EXPORT_SYMBOL_GPL(gpiod_get);
bae48da2 4596
29a1f233
TR
4597/**
4598 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
4599 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4600 * @con_id: function within the GPIO consumer
39b2bbe3 4601 * @flags: optional GPIO initialization flags
29a1f233
TR
4602 *
4603 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
4604 * the requested function it will return NULL. This is convenient for drivers
4605 * that need to handle optional GPIOs.
4606 */
b17d1bf1 4607struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
39b2bbe3
AC
4608 const char *con_id,
4609 enum gpiod_flags flags)
29a1f233 4610{
39b2bbe3 4611 return gpiod_get_index_optional(dev, con_id, 0, flags);
29a1f233 4612}
b17d1bf1 4613EXPORT_SYMBOL_GPL(gpiod_get_optional);
29a1f233 4614
f625d460
BP
4615
4616/**
4617 * gpiod_configure_flags - helper function to configure a given GPIO
4618 * @desc: gpio whose value will be assigned
4619 * @con_id: function within the GPIO consumer
fed7026a
AS
4620 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4621 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4622 * @dflags: gpiod_flags - optional GPIO initialization flags
4623 *
4624 * Return 0 on success, -ENOENT if no GPIO has been assigned to the
4625 * requested function and/or index, or another IS_ERR() code if an error
4626 * occurred while trying to acquire the GPIO.
4627 */
c29fd9eb 4628int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
85b03b30 4629 unsigned long lflags, enum gpiod_flags dflags)
f625d460 4630{
d377f56f 4631 int ret;
f625d460 4632
85b03b30
JH
4633 if (lflags & GPIO_ACTIVE_LOW)
4634 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
f926dfc1 4635
85b03b30
JH
4636 if (lflags & GPIO_OPEN_DRAIN)
4637 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
f926dfc1
LW
4638 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
4639 /*
4640 * This enforces open drain mode from the consumer side.
4641 * This is necessary for some busses like I2C, but the lookup
4642 * should *REALLY* have specified them as open drain in the
4643 * first place, so print a little warning here.
4644 */
4645 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
4646 gpiod_warn(desc,
4647 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
4648 }
4649
85b03b30
JH
4650 if (lflags & GPIO_OPEN_SOURCE)
4651 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
e10f72bf 4652
d449991c
TP
4653 if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) {
4654 gpiod_err(desc,
4655 "both pull-up and pull-down enabled, invalid configuration\n");
4656 return -EINVAL;
4657 }
4658
4659 if (lflags & GPIO_PULL_UP)
4660 set_bit(FLAG_PULL_UP, &desc->flags);
4661 else if (lflags & GPIO_PULL_DOWN)
4662 set_bit(FLAG_PULL_DOWN, &desc->flags);
4663
d377f56f
LW
4664 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
4665 if (ret < 0)
4666 return ret;
85b03b30 4667
f625d460
BP
4668 /* No particular flag request, return here... */
4669 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
4670 pr_debug("no flags found for %s\n", con_id);
4671 return 0;
4672 }
4673
4674 /* Process flags */
4675 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
d377f56f 4676 ret = gpiod_direction_output(desc,
ad17731d 4677 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
f625d460 4678 else
d377f56f 4679 ret = gpiod_direction_input(desc);
f625d460 4680
d377f56f 4681 return ret;
f625d460
BP
4682}
4683
bae48da2
AC
4684/**
4685 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
fdd6a5fe 4686 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2
AC
4687 * @con_id: function within the GPIO consumer
4688 * @idx: index of the GPIO to obtain in the consumer
39b2bbe3 4689 * @flags: optional GPIO initialization flags
bae48da2
AC
4690 *
4691 * This variant of gpiod_get() allows to access GPIOs other than the first
4692 * defined one for functions that define several GPIOs.
4693 *
2a3cf6a3
AC
4694 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
4695 * requested function and/or index, or another IS_ERR() code if an error
20a8a968 4696 * occurred while trying to acquire the GPIO.
bae48da2 4697 */
b17d1bf1 4698struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
bae48da2 4699 const char *con_id,
39b2bbe3
AC
4700 unsigned int idx,
4701 enum gpiod_flags flags)
bae48da2 4702{
2d6c06f5 4703 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
35c5d7fd 4704 struct gpio_desc *desc = NULL;
d377f56f 4705 int ret;
7d18f0a1
LW
4706 /* Maybe we have a device name, maybe not */
4707 const char *devname = dev ? dev_name(dev) : "?";
bae48da2
AC
4708
4709 dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id);
4710
4d8440b9
RW
4711 if (dev) {
4712 /* Using device tree? */
4713 if (IS_ENABLED(CONFIG_OF) && dev->of_node) {
4714 dev_dbg(dev, "using device tree for GPIO lookup\n");
4715 desc = of_find_gpio(dev, con_id, idx, &lookupflags);
4716 } else if (ACPI_COMPANION(dev)) {
4717 dev_dbg(dev, "using ACPI for GPIO lookup\n");
a31f5c3a 4718 desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags);
4d8440b9 4719 }
35c5d7fd
AC
4720 }
4721
4722 /*
4723 * Either we are not using DT or ACPI, or their lookup did not return
4724 * a result. In that case, use platform lookup as a fallback.
4725 */
2a3cf6a3 4726 if (!desc || desc == ERR_PTR(-ENOENT)) {
43a8785a 4727 dev_dbg(dev, "using lookup tables for GPIO lookup\n");
39b2bbe3 4728 desc = gpiod_find(dev, con_id, idx, &lookupflags);
bae48da2
AC
4729 }
4730
4731 if (IS_ERR(desc)) {
9d5a1f2c 4732 dev_dbg(dev, "No GPIO consumer %s found\n", con_id);
bae48da2
AC
4733 return desc;
4734 }
4735
7d18f0a1
LW
4736 /*
4737 * If a connection label was passed use that, else attempt to use
4738 * the device name as label
4739 */
d377f56f
LW
4740 ret = gpiod_request(desc, con_id ? con_id : devname);
4741 if (ret < 0) {
4742 if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) {
b0ce7b29
LW
4743 /*
4744 * This happens when there are several consumers for
4745 * the same GPIO line: we just return here without
4746 * further initialization. It is a bit if a hack.
4747 * This is necessary to support fixed regulators.
4748 *
4749 * FIXME: Make this more sane and safe.
4750 */
4751 dev_info(dev, "nonexclusive access to GPIO for %s\n",
4752 con_id ? con_id : devname);
4753 return desc;
4754 } else {
d377f56f 4755 return ERR_PTR(ret);
b0ce7b29
LW
4756 }
4757 }
bae48da2 4758
d377f56f 4759 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
6392cca4 4760 if (ret < 0) {
39b2bbe3 4761 dev_dbg(dev, "setup of GPIO %s failed\n", con_id);
6392cca4
LW
4762 gpiod_put(desc);
4763 return ERR_PTR(ret);
4764 }
4765
4766 return desc;
4767}
b17d1bf1 4768EXPORT_SYMBOL_GPL(gpiod_get_index);
6392cca4 4769
40b73183
MW
4770/**
4771 * fwnode_get_named_gpiod - obtain a GPIO from firmware node
4772 * @fwnode: handle of the firmware node
4773 * @propname: name of the firmware property representing the GPIO
6392cca4 4774 * @index: index of the GPIO to obtain for the consumer
a264d10f 4775 * @dflags: GPIO initialization flags
950d55f5 4776 * @label: label to attach to the requested GPIO
40b73183
MW
4777 *
4778 * This function can be used for drivers that get their configuration
6392cca4 4779 * from opaque firmware.
40b73183 4780 *
6392cca4 4781 * The function properly finds the corresponding GPIO using whatever is the
40b73183
MW
4782 * underlying firmware interface and then makes sure that the GPIO
4783 * descriptor is requested before it is returned to the caller.
4784 *
950d55f5 4785 * Returns:
ff21378a 4786 * On successful request the GPIO pin is configured in accordance with
a264d10f
AS
4787 * provided @dflags.
4788 *
40b73183
MW
4789 * In case of error an ERR_PTR() is returned.
4790 */
4791struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
537b94da 4792 const char *propname, int index,
b2987d74
AS
4793 enum gpiod_flags dflags,
4794 const char *label)
40b73183 4795{
2d6c06f5 4796 unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT;
40b73183 4797 struct gpio_desc *desc = ERR_PTR(-ENODEV);
40b73183
MW
4798 int ret;
4799
4800 if (!fwnode)
4801 return ERR_PTR(-EINVAL);
4802
4803 if (is_of_node(fwnode)) {
6392cca4
LW
4804 desc = gpiod_get_from_of_node(to_of_node(fwnode),
4805 propname, index,
4806 dflags,
4807 label);
4808 return desc;
40b73183
MW
4809 } else if (is_acpi_node(fwnode)) {
4810 struct acpi_gpio_info info;
4811
537b94da 4812 desc = acpi_node_get_gpiod(fwnode, propname, index, &info);
6392cca4
LW
4813 if (IS_ERR(desc))
4814 return desc;
40b73183 4815
6392cca4 4816 acpi_gpio_update_gpiod_flags(&dflags, &info);
606be344 4817 acpi_gpio_update_gpiod_lookup_flags(&lflags, &info);
6392cca4 4818 }
40b73183 4819
6392cca4 4820 /* Currently only ACPI takes this path */
b2987d74 4821 ret = gpiod_request(desc, label);
85b03b30
JH
4822 if (ret)
4823 return ERR_PTR(ret);
4824
a264d10f
AS
4825 ret = gpiod_configure_flags(desc, propname, lflags, dflags);
4826 if (ret < 0) {
4827 gpiod_put(desc);
4828 return ERR_PTR(ret);
90b665f6
LP
4829 }
4830
40b73183
MW
4831 return desc;
4832}
4833EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod);
4834
29a1f233
TR
4835/**
4836 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
4837 * function
4838 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4839 * @con_id: function within the GPIO consumer
4840 * @index: index of the GPIO to obtain in the consumer
39b2bbe3 4841 * @flags: optional GPIO initialization flags
29a1f233
TR
4842 *
4843 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
4844 * specified index was assigned to the requested function it will return NULL.
4845 * This is convenient for drivers that need to handle optional GPIOs.
4846 */
b17d1bf1 4847struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
29a1f233 4848 const char *con_id,
39b2bbe3
AC
4849 unsigned int index,
4850 enum gpiod_flags flags)
29a1f233
TR
4851{
4852 struct gpio_desc *desc;
4853
39b2bbe3 4854 desc = gpiod_get_index(dev, con_id, index, flags);
29a1f233
TR
4855 if (IS_ERR(desc)) {
4856 if (PTR_ERR(desc) == -ENOENT)
4857 return NULL;
4858 }
4859
4860 return desc;
4861}
b17d1bf1 4862EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
29a1f233 4863
f625d460
BP
4864/**
4865 * gpiod_hog - Hog the specified GPIO desc given the provided flags
4866 * @desc: gpio whose value will be assigned
4867 * @name: gpio line name
fed7026a
AS
4868 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4869 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4870 * @dflags: gpiod_flags - optional GPIO initialization flags
4871 */
4872int gpiod_hog(struct gpio_desc *desc, const char *name,
4873 unsigned long lflags, enum gpiod_flags dflags)
4874{
4875 struct gpio_chip *chip;
4876 struct gpio_desc *local_desc;
4877 int hwnum;
d377f56f 4878 int ret;
f625d460
BP
4879
4880 chip = gpiod_to_chip(desc);
4881 hwnum = gpio_chip_hwgpio(desc);
4882
5923ea6c
LW
4883 local_desc = gpiochip_request_own_desc(chip, hwnum, name,
4884 lflags, dflags);
f625d460 4885 if (IS_ERR(local_desc)) {
d377f56f 4886 ret = PTR_ERR(local_desc);
c31a571d 4887 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
d377f56f
LW
4888 name, chip->label, hwnum, ret);
4889 return ret;
f625d460
BP
4890 }
4891
f625d460
BP
4892 /* Mark GPIO as hogged so it can be identified and removed later */
4893 set_bit(FLAG_IS_HOGGED, &desc->flags);
4894
4895 pr_info("GPIO line %d (%s) hogged as %s%s\n",
4896 desc_to_gpio(desc), name,
b27f300f
BG
4897 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
4898 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
4899 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
f625d460
BP
4900
4901 return 0;
4902}
4903
4904/**
4905 * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
4906 * @chip: gpio chip to act on
f625d460
BP
4907 */
4908static void gpiochip_free_hogs(struct gpio_chip *chip)
4909{
4910 int id;
4911
4912 for (id = 0; id < chip->ngpio; id++) {
1c3cdb18
LW
4913 if (test_bit(FLAG_IS_HOGGED, &chip->gpiodev->descs[id].flags))
4914 gpiochip_free_own_desc(&chip->gpiodev->descs[id]);
f625d460
BP
4915 }
4916}
4917
66858527
RI
4918/**
4919 * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
4920 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4921 * @con_id: function within the GPIO consumer
4922 * @flags: optional GPIO initialization flags
4923 *
4924 * This function acquires all the GPIOs defined under a given function.
4925 *
4926 * Return a struct gpio_descs containing an array of descriptors, -ENOENT if
4927 * no GPIO has been assigned to the requested function, or another IS_ERR()
4928 * code if an error occurred while trying to acquire the GPIOs.
4929 */
4930struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
4931 const char *con_id,
4932 enum gpiod_flags flags)
4933{
4934 struct gpio_desc *desc;
4935 struct gpio_descs *descs;
bf9346f5
JK
4936 struct gpio_array *array_info = NULL;
4937 struct gpio_chip *chip;
4938 int count, bitmap_size;
66858527
RI
4939
4940 count = gpiod_count(dev, con_id);
4941 if (count < 0)
4942 return ERR_PTR(count);
4943
acafe7e3 4944 descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL);
66858527
RI
4945 if (!descs)
4946 return ERR_PTR(-ENOMEM);
4947
4948 for (descs->ndescs = 0; descs->ndescs < count; ) {
4949 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
4950 if (IS_ERR(desc)) {
4951 gpiod_put_array(descs);
4952 return ERR_CAST(desc);
4953 }
bf9346f5 4954
66858527 4955 descs->desc[descs->ndescs] = desc;
bf9346f5
JK
4956
4957 chip = gpiod_to_chip(desc);
4958 /*
c4c958aa
JK
4959 * If pin hardware number of array member 0 is also 0, select
4960 * its chip as a candidate for fast bitmap processing path.
bf9346f5 4961 */
c4c958aa 4962 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
bf9346f5
JK
4963 struct gpio_descs *array;
4964
4965 bitmap_size = BITS_TO_LONGS(chip->ngpio > count ?
4966 chip->ngpio : count);
4967
4968 array = kzalloc(struct_size(descs, desc, count) +
4969 struct_size(array_info, invert_mask,
4970 3 * bitmap_size), GFP_KERNEL);
4971 if (!array) {
4972 gpiod_put_array(descs);
4973 return ERR_PTR(-ENOMEM);
4974 }
4975
4976 memcpy(array, descs,
4977 struct_size(descs, desc, descs->ndescs + 1));
4978 kfree(descs);
4979
4980 descs = array;
4981 array_info = (void *)(descs->desc + count);
4982 array_info->get_mask = array_info->invert_mask +
4983 bitmap_size;
4984 array_info->set_mask = array_info->get_mask +
4985 bitmap_size;
4986
4987 array_info->desc = descs->desc;
4988 array_info->size = count;
4989 array_info->chip = chip;
4990 bitmap_set(array_info->get_mask, descs->ndescs,
4991 count - descs->ndescs);
4992 bitmap_set(array_info->set_mask, descs->ndescs,
4993 count - descs->ndescs);
4994 descs->info = array_info;
4995 }
c4c958aa
JK
4996 /* Unmark array members which don't belong to the 'fast' chip */
4997 if (array_info && array_info->chip != chip) {
bf9346f5
JK
4998 __clear_bit(descs->ndescs, array_info->get_mask);
4999 __clear_bit(descs->ndescs, array_info->set_mask);
c4c958aa
JK
5000 }
5001 /*
5002 * Detect array members which belong to the 'fast' chip
5003 * but their pins are not in hardware order.
5004 */
5005 else if (array_info &&
5006 gpio_chip_hwgpio(desc) != descs->ndescs) {
5007 /*
5008 * Don't use fast path if all array members processed so
5009 * far belong to the same chip as this one but its pin
5010 * hardware number is different from its array index.
5011 */
5012 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
5013 array_info = NULL;
5014 } else {
5015 __clear_bit(descs->ndescs,
5016 array_info->get_mask);
5017 __clear_bit(descs->ndescs,
5018 array_info->set_mask);
5019 }
bf9346f5
JK
5020 } else if (array_info) {
5021 /* Exclude open drain or open source from fast output */
5022 if (gpiochip_line_is_open_drain(chip, descs->ndescs) ||
5023 gpiochip_line_is_open_source(chip, descs->ndescs))
5024 __clear_bit(descs->ndescs,
5025 array_info->set_mask);
5026 /* Identify 'fast' pins which require invertion */
5027 if (gpiod_is_active_low(desc))
5028 __set_bit(descs->ndescs,
5029 array_info->invert_mask);
5030 }
5031
66858527
RI
5032 descs->ndescs++;
5033 }
bf9346f5
JK
5034 if (array_info)
5035 dev_dbg(dev,
5036 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
5037 array_info->chip->label, array_info->size,
5038 *array_info->get_mask, *array_info->set_mask,
5039 *array_info->invert_mask);
66858527
RI
5040 return descs;
5041}
5042EXPORT_SYMBOL_GPL(gpiod_get_array);
5043
5044/**
5045 * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
5046 * function
5047 * @dev: GPIO consumer, can be NULL for system-global GPIOs
5048 * @con_id: function within the GPIO consumer
5049 * @flags: optional GPIO initialization flags
5050 *
5051 * This is equivalent to gpiod_get_array(), except that when no GPIO was
5052 * assigned to the requested function it will return NULL.
5053 */
5054struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
5055 const char *con_id,
5056 enum gpiod_flags flags)
5057{
5058 struct gpio_descs *descs;
5059
5060 descs = gpiod_get_array(dev, con_id, flags);
5061 if (IS_ERR(descs) && (PTR_ERR(descs) == -ENOENT))
5062 return NULL;
5063
5064 return descs;
5065}
5066EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
5067
bae48da2
AC
5068/**
5069 * gpiod_put - dispose of a GPIO descriptor
5070 * @desc: GPIO descriptor to dispose of
5071 *
5072 * No descriptor can be used after gpiod_put() has been called on it.
5073 */
5074void gpiod_put(struct gpio_desc *desc)
5075{
1d7765ba
AS
5076 if (desc)
5077 gpiod_free(desc);
372e722e 5078}
bae48da2 5079EXPORT_SYMBOL_GPL(gpiod_put);
d2876d08 5080
66858527
RI
5081/**
5082 * gpiod_put_array - dispose of multiple GPIO descriptors
5083 * @descs: struct gpio_descs containing an array of descriptors
5084 */
5085void gpiod_put_array(struct gpio_descs *descs)
5086{
5087 unsigned int i;
5088
5089 for (i = 0; i < descs->ndescs; i++)
5090 gpiod_put(descs->desc[i]);
5091
5092 kfree(descs);
5093}
5094EXPORT_SYMBOL_GPL(gpiod_put_array);
5095
3c702e99
LW
5096static int __init gpiolib_dev_init(void)
5097{
5098 int ret;
5099
5100 /* Register GPIO sysfs bus */
b1911710 5101 ret = bus_register(&gpio_bus_type);
3c702e99
LW
5102 if (ret < 0) {
5103 pr_err("gpiolib: could not register GPIO bus type\n");
5104 return ret;
5105 }
5106
ddd8891e 5107 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME);
3c702e99
LW
5108 if (ret < 0) {
5109 pr_err("gpiolib: failed to allocate char dev region\n");
5110 bus_unregister(&gpio_bus_type);
159f3cd9
GR
5111 } else {
5112 gpiolib_initialized = true;
5113 gpiochip_setup_devs();
3c702e99
LW
5114 }
5115 return ret;
5116}
5117core_initcall(gpiolib_dev_init);
5118
d2876d08
DB
5119#ifdef CONFIG_DEBUG_FS
5120
fdeb8e15 5121static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
d2876d08
DB
5122{
5123 unsigned i;
fdeb8e15
LW
5124 struct gpio_chip *chip = gdev->chip;
5125 unsigned gpio = gdev->base;
5126 struct gpio_desc *gdesc = &gdev->descs[0];
90fd2270
LW
5127 bool is_out;
5128 bool is_irq;
5129 bool active_low;
d2876d08 5130
fdeb8e15 5131 for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) {
ced433e2
MP
5132 if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) {
5133 if (gdesc->name) {
5134 seq_printf(s, " gpio-%-3d (%-20.20s)\n",
5135 gpio, gdesc->name);
5136 }
d2876d08 5137 continue;
ced433e2 5138 }
d2876d08 5139
372e722e 5140 gpiod_get_direction(gdesc);
d2876d08 5141 is_out = test_bit(FLAG_IS_OUT, &gdesc->flags);
d468bf9e 5142 is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags);
90fd2270
LW
5143 active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags);
5144 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s",
ced433e2 5145 gpio, gdesc->name ? gdesc->name : "", gdesc->label,
d2876d08 5146 is_out ? "out" : "in ",
1c22a252 5147 chip->get ? (chip->get(chip, i) ? "hi" : "lo") : "? ",
90fd2270
LW
5148 is_irq ? "IRQ " : "",
5149 active_low ? "ACTIVE LOW" : "");
d2876d08
DB
5150 seq_printf(s, "\n");
5151 }
5152}
5153
f9c4a31f 5154static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
d2876d08 5155{
362432ae 5156 unsigned long flags;
ff2b1359 5157 struct gpio_device *gdev = NULL;
cb1650d4 5158 loff_t index = *pos;
d2876d08 5159
f9c4a31f 5160 s->private = "";
d2876d08 5161
362432ae 5162 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 5163 list_for_each_entry(gdev, &gpio_devices, list)
362432ae
GL
5164 if (index-- == 0) {
5165 spin_unlock_irqrestore(&gpio_lock, flags);
ff2b1359 5166 return gdev;
f9c4a31f 5167 }
362432ae 5168 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f 5169
cb1650d4 5170 return NULL;
f9c4a31f
TR
5171}
5172
5173static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
5174{
362432ae 5175 unsigned long flags;
ff2b1359 5176 struct gpio_device *gdev = v;
f9c4a31f
TR
5177 void *ret = NULL;
5178
362432ae 5179 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 5180 if (list_is_last(&gdev->list, &gpio_devices))
cb1650d4
AC
5181 ret = NULL;
5182 else
ff2b1359 5183 ret = list_entry(gdev->list.next, struct gpio_device, list);
362432ae 5184 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f
TR
5185
5186 s->private = "\n";
5187 ++*pos;
5188
5189 return ret;
5190}
5191
5192static void gpiolib_seq_stop(struct seq_file *s, void *v)
5193{
5194}
5195
5196static int gpiolib_seq_show(struct seq_file *s, void *v)
5197{
ff2b1359
LW
5198 struct gpio_device *gdev = v;
5199 struct gpio_chip *chip = gdev->chip;
5200 struct device *parent;
5201
5202 if (!chip) {
5203 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
5204 dev_name(&gdev->dev));
5205 return 0;
5206 }
f9c4a31f 5207
ff2b1359
LW
5208 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
5209 dev_name(&gdev->dev),
fdeb8e15 5210 gdev->base, gdev->base + gdev->ngpio - 1);
ff2b1359
LW
5211 parent = chip->parent;
5212 if (parent)
5213 seq_printf(s, ", parent: %s/%s",
5214 parent->bus ? parent->bus->name : "no-bus",
5215 dev_name(parent));
f9c4a31f
TR
5216 if (chip->label)
5217 seq_printf(s, ", %s", chip->label);
5218 if (chip->can_sleep)
5219 seq_printf(s, ", can sleep");
5220 seq_printf(s, ":\n");
5221
5222 if (chip->dbg_show)
5223 chip->dbg_show(s, chip);
5224 else
fdeb8e15 5225 gpiolib_dbg_show(s, gdev);
f9c4a31f 5226
d2876d08
DB
5227 return 0;
5228}
5229
f9c4a31f
TR
5230static const struct seq_operations gpiolib_seq_ops = {
5231 .start = gpiolib_seq_start,
5232 .next = gpiolib_seq_next,
5233 .stop = gpiolib_seq_stop,
5234 .show = gpiolib_seq_show,
5235};
5236
d2876d08
DB
5237static int gpiolib_open(struct inode *inode, struct file *file)
5238{
f9c4a31f 5239 return seq_open(file, &gpiolib_seq_ops);
d2876d08
DB
5240}
5241
828c0950 5242static const struct file_operations gpiolib_operations = {
f9c4a31f 5243 .owner = THIS_MODULE,
d2876d08
DB
5244 .open = gpiolib_open,
5245 .read = seq_read,
5246 .llseek = seq_lseek,
f9c4a31f 5247 .release = seq_release,
d2876d08
DB
5248};
5249
5250static int __init gpiolib_debugfs_init(void)
5251{
5252 /* /sys/kernel/debug/gpio */
acc68b0e
GKH
5253 debugfs_create_file("gpio", S_IFREG | S_IRUGO, NULL, NULL,
5254 &gpiolib_operations);
d2876d08
DB
5255 return 0;
5256}
5257subsys_initcall(gpiolib_debugfs_init);
5258
5259#endif /* DEBUG_FS */