Linux 5.19-rc3
[linux-block.git] / drivers / gpio / gpiolib.c
CommitLineData
dae5f0af 1// SPDX-License-Identifier: GPL-2.0
c47d9e1b 2
923a654c 3#include <linux/bitmap.h>
d2876d08
DB
4#include <linux/kernel.h>
5#include <linux/module.h>
ff77c352 6#include <linux/interrupt.h>
d2876d08
DB
7#include <linux/irq.h>
8#include <linux/spinlock.h>
1a989d0f 9#include <linux/list.h>
d8f388d8
DB
10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/debugfs.h>
13#include <linux/seq_file.h>
14#include <linux/gpio.h>
ff77c352 15#include <linux/idr.h>
5a0e3ad6 16#include <linux/slab.h>
7b199811 17#include <linux/acpi.h>
53e7cac3 18#include <linux/gpio/driver.h>
0a6d3158 19#include <linux/gpio/machine.h>
c771c2f4 20#include <linux/pinctrl/consumer.h>
3c702e99 21#include <linux/fs.h>
8b92e17e 22#include <linux/compat.h>
953b956a 23#include <linux/file.h>
3c702e99 24#include <uapi/linux/gpio.h>
d2876d08 25
664e3e5a 26#include "gpiolib.h"
f626d6df 27#include "gpiolib-of.h"
77cb907a 28#include "gpiolib-acpi.h"
925ca369 29#include "gpiolib-cdev.h"
ef087d8e 30#include "gpiolib-sysfs.h"
664e3e5a 31
3f397c21
UKK
32#define CREATE_TRACE_POINTS
33#include <trace/events/gpio.h>
d2876d08 34
79a9becd 35/* Implementation infrastructure for GPIO interfaces.
d2876d08 36 *
79a9becd
AC
37 * The GPIO programming interface allows for inlining speed-critical
38 * get/set operations for common cases, so that access to SOC-integrated
39 * GPIOs can sometimes cost only an instruction or two per bit.
d2876d08
DB
40 */
41
42
43/* When debugging, extend minimal trust to callers and platform code.
44 * Also emit diagnostic messages that may help initial bringup, when
45 * board setup or driver bugs are most common.
46 *
47 * Otherwise, minimize overhead in what may be bitbanging codepaths.
48 */
49#ifdef DEBUG
50#define extra_checks 1
51#else
52#define extra_checks 0
53#endif
54
ff2b1359
LW
55/* Device and char device-related information */
56static DEFINE_IDA(gpio_ida);
3c702e99
LW
57static dev_t gpio_devt;
58#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
ced2af41 59static int gpio_bus_match(struct device *dev, struct device_driver *drv);
3c702e99
LW
60static struct bus_type gpio_bus_type = {
61 .name = "gpio",
ced2af41 62 .match = gpio_bus_match,
3c702e99 63};
ff2b1359 64
3027743f
LA
65/*
66 * Number of GPIOs to use for the fast path in set array
67 */
68#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
69
d2876d08
DB
70/* gpio_lock prevents conflicts during gpio_desc[] table updates.
71 * While any GPIO is requested, its gpio_chip is not removable;
72 * each GPIO's "requested" flag serves as a lock and refcount.
73 */
0eb4c6c2 74DEFINE_SPINLOCK(gpio_lock);
d2876d08 75
bae48da2
AC
76static DEFINE_MUTEX(gpio_lookup_lock);
77static LIST_HEAD(gpio_lookup_list);
ff2b1359 78LIST_HEAD(gpio_devices);
6d86750c 79
a411e81e
BG
80static DEFINE_MUTEX(gpio_machine_hogs_mutex);
81static LIST_HEAD(gpio_machine_hogs);
82
a0b66a73
LW
83static void gpiochip_free_hogs(struct gpio_chip *gc);
84static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
85 struct lock_class_key *lock_key,
86 struct lock_class_key *request_key);
a0b66a73
LW
87static void gpiochip_irqchip_remove(struct gpio_chip *gc);
88static int gpiochip_irqchip_init_hw(struct gpio_chip *gc);
89static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc);
90static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc);
6d86750c 91
159f3cd9 92static bool gpiolib_initialized;
6d86750c 93
d2876d08
DB
94static inline void desc_set_label(struct gpio_desc *d, const char *label)
95{
d2876d08 96 d->label = label;
d2876d08
DB
97}
98
372e722e 99/**
950d55f5
TR
100 * gpio_to_desc - Convert a GPIO number to its descriptor
101 * @gpio: global GPIO number
102 *
103 * Returns:
104 * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
105 * with the given number exists in the system.
372e722e 106 */
79a9becd 107struct gpio_desc *gpio_to_desc(unsigned gpio)
372e722e 108{
ff2b1359 109 struct gpio_device *gdev;
14e85c0e
AC
110 unsigned long flags;
111
112 spin_lock_irqsave(&gpio_lock, flags);
113
ff2b1359 114 list_for_each_entry(gdev, &gpio_devices, list) {
fdeb8e15
LW
115 if (gdev->base <= gpio &&
116 gdev->base + gdev->ngpio > gpio) {
14e85c0e 117 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 118 return &gdev->descs[gpio - gdev->base];
14e85c0e
AC
119 }
120 }
121
122 spin_unlock_irqrestore(&gpio_lock, flags);
123
0e9a5edf 124 if (!gpio_is_valid(gpio))
c47d9e1b 125 pr_warn("invalid GPIO %d\n", gpio);
0e9a5edf 126
14e85c0e 127 return NULL;
372e722e 128}
79a9becd 129EXPORT_SYMBOL_GPL(gpio_to_desc);
372e722e 130
d468bf9e 131/**
950d55f5
TR
132 * gpiochip_get_desc - get the GPIO descriptor corresponding to the given
133 * hardware number for this chip
a0b66a73 134 * @gc: GPIO chip
950d55f5
TR
135 * @hwnum: hardware number of the GPIO for this chip
136 *
137 * Returns:
35c6cfb4 138 * A pointer to the GPIO descriptor or ``ERR_PTR(-EINVAL)`` if no GPIO exists
950d55f5 139 * in the given chip for the specified hardware number.
d468bf9e 140 */
a0b66a73 141struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc,
06863620 142 unsigned int hwnum)
d468bf9e 143{
a0b66a73 144 struct gpio_device *gdev = gc->gpiodev;
fdeb8e15
LW
145
146 if (hwnum >= gdev->ngpio)
b7d0a28a 147 return ERR_PTR(-EINVAL);
d468bf9e 148
fdeb8e15 149 return &gdev->descs[hwnum];
d468bf9e 150}
97795420 151EXPORT_SYMBOL_GPL(gpiochip_get_desc);
372e722e
AC
152
153/**
950d55f5
TR
154 * desc_to_gpio - convert a GPIO descriptor to the integer namespace
155 * @desc: GPIO descriptor
156 *
372e722e 157 * This should disappear in the future but is needed since we still
950d55f5
TR
158 * use GPIO numbers for error messages and sysfs nodes.
159 *
160 * Returns:
161 * The global GPIO number for the GPIO specified by its descriptor.
372e722e 162 */
79a9becd 163int desc_to_gpio(const struct gpio_desc *desc)
372e722e 164{
fdeb8e15 165 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
372e722e 166}
79a9becd 167EXPORT_SYMBOL_GPL(desc_to_gpio);
372e722e
AC
168
169
79a9becd
AC
170/**
171 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
172 * @desc: descriptor to return the chip of
173 */
174struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
372e722e 175{
dd3b9a44 176 if (!desc || !desc->gdev)
fdeb8e15
LW
177 return NULL;
178 return desc->gdev->chip;
372e722e 179}
79a9becd 180EXPORT_SYMBOL_GPL(gpiod_to_chip);
d2876d08 181
8d0aab2f
AV
182/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
183static int gpiochip_find_base(int ngpio)
184{
ff2b1359 185 struct gpio_device *gdev;
83cabe33 186 int base = ARCH_NR_GPIOS - ngpio;
8d0aab2f 187
ff2b1359 188 list_for_each_entry_reverse(gdev, &gpio_devices, list) {
83cabe33 189 /* found a free space? */
fdeb8e15 190 if (gdev->base + gdev->ngpio <= base)
83cabe33 191 break;
1cef8b50
AS
192 /* nope, check the space right before the chip */
193 base = gdev->base - ngpio;
8d0aab2f
AV
194 }
195
83cabe33 196 if (gpio_is_valid(base)) {
8d0aab2f 197 pr_debug("%s: found new base at %d\n", __func__, base);
83cabe33
AC
198 return base;
199 } else {
200 pr_err("%s: cannot find free range\n", __func__);
201 return -ENOSPC;
169b6a7a 202 }
169b6a7a
AV
203}
204
79a9becd
AC
205/**
206 * gpiod_get_direction - return the current direction of a GPIO
207 * @desc: GPIO to get the direction of
208 *
94fc7309 209 * Returns 0 for output, 1 for input, or an error code in case of error.
79a9becd
AC
210 *
211 * This function may sleep if gpiod_cansleep() is true.
212 */
8e53b0f1 213int gpiod_get_direction(struct gpio_desc *desc)
80b0a602 214{
a0b66a73 215 struct gpio_chip *gc;
13daf489 216 unsigned int offset;
d377f56f 217 int ret;
80b0a602 218
a0b66a73 219 gc = gpiod_to_chip(desc);
372e722e 220 offset = gpio_chip_hwgpio(desc);
80b0a602 221
256efaea
RK
222 /*
223 * Open drain emulation using input mode may incorrectly report
224 * input here, fix that up.
225 */
226 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) &&
227 test_bit(FLAG_IS_OUT, &desc->flags))
228 return 0;
229
a0b66a73 230 if (!gc->get_direction)
d0121b85 231 return -ENOTSUPP;
80b0a602 232
a0b66a73 233 ret = gc->get_direction(gc, offset);
4fc5bfeb
AS
234 if (ret < 0)
235 return ret;
236
237 /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */
238 if (ret > 0)
d377f56f 239 ret = 1;
4fc5bfeb
AS
240
241 assign_bit(FLAG_IS_OUT, &desc->flags, !ret);
242
d377f56f 243 return ret;
80b0a602 244}
79a9becd 245EXPORT_SYMBOL_GPL(gpiod_get_direction);
80b0a602 246
1a989d0f
AC
247/*
248 * Add a new chip to the global chips list, keeping the list of chips sorted
ef7c7553 249 * by range(means [base, base + ngpio - 1]) order.
1a989d0f
AC
250 *
251 * Return -EBUSY if the new chip overlaps with some other chip's integer
252 * space.
253 */
ff2b1359 254static int gpiodev_add_to_list(struct gpio_device *gdev)
1a989d0f 255{
a961f9b4 256 struct gpio_device *prev, *next;
1a989d0f 257
ff2b1359 258 if (list_empty(&gpio_devices)) {
a961f9b4 259 /* initial entry in list */
ff2b1359 260 list_add_tail(&gdev->list, &gpio_devices);
e28ecca6 261 return 0;
1a989d0f
AC
262 }
263
243cfa6a 264 next = list_first_entry(&gpio_devices, struct gpio_device, list);
a961f9b4
BJZ
265 if (gdev->base + gdev->ngpio <= next->base) {
266 /* add before first entry */
267 list_add(&gdev->list, &gpio_devices);
268 return 0;
1a989d0f
AC
269 }
270
243cfa6a 271 prev = list_last_entry(&gpio_devices, struct gpio_device, list);
a961f9b4
BJZ
272 if (prev->base + prev->ngpio <= gdev->base) {
273 /* add behind last entry */
274 list_add_tail(&gdev->list, &gpio_devices);
96098df1 275 return 0;
1a989d0f
AC
276 }
277
a961f9b4
BJZ
278 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
279 /* at the end of the list */
280 if (&next->list == &gpio_devices)
281 break;
1a989d0f 282
a961f9b4
BJZ
283 /* add between prev and next */
284 if (prev->base + prev->ngpio <= gdev->base
285 && gdev->base + gdev->ngpio <= next->base) {
286 list_add(&gdev->list, &prev->list);
287 return 0;
288 }
289 }
290
a961f9b4 291 return -EBUSY;
1a989d0f
AC
292}
293
950d55f5 294/*
f881bab0 295 * Convert a GPIO name to its descriptor
582838ea
GU
296 * Note that there is no guarantee that GPIO names are globally unique!
297 * Hence this function will return, if it exists, a reference to the first GPIO
298 * line found that matches the given name.
f881bab0
LW
299 */
300static struct gpio_desc *gpio_name_to_desc(const char * const name)
301{
ff2b1359 302 struct gpio_device *gdev;
f881bab0
LW
303 unsigned long flags;
304
ee203bbd
MM
305 if (!name)
306 return NULL;
307
f881bab0
LW
308 spin_lock_irqsave(&gpio_lock, flags);
309
ff2b1359 310 list_for_each_entry(gdev, &gpio_devices, list) {
66f46e37 311 struct gpio_desc *desc;
f881bab0 312
66f46e37
AS
313 for_each_gpio_desc(gdev->chip, desc) {
314 if (desc->name && !strcmp(desc->name, name)) {
f881bab0 315 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 316 return desc;
f881bab0
LW
317 }
318 }
319 }
320
321 spin_unlock_irqrestore(&gpio_lock, flags);
322
323 return NULL;
324}
325
5f3ca732 326/*
582838ea
GU
327 * Take the names from gc->names and assign them to their GPIO descriptors.
328 * Warn if a name is already used for a GPIO line on a different GPIO chip.
5f3ca732 329 *
582838ea
GU
330 * Note that:
331 * 1. Non-unique names are still accepted,
332 * 2. Name collisions within the same GPIO chip are not reported.
5f3ca732
MP
333 */
334static int gpiochip_set_desc_names(struct gpio_chip *gc)
335{
fdeb8e15 336 struct gpio_device *gdev = gc->gpiodev;
5f3ca732
MP
337 int i;
338
5f3ca732
MP
339 /* First check all names if they are unique */
340 for (i = 0; i != gc->ngpio; ++i) {
341 struct gpio_desc *gpio;
342
343 gpio = gpio_name_to_desc(gc->names[i]);
f881bab0 344 if (gpio)
fdeb8e15 345 dev_warn(&gdev->dev,
34ffd85d 346 "Detected name collision for GPIO name '%s'\n",
f881bab0 347 gc->names[i]);
5f3ca732
MP
348 }
349
350 /* Then add all names to the GPIO descriptors */
351 for (i = 0; i != gc->ngpio; ++i)
fdeb8e15 352 gdev->descs[i].name = gc->names[i];
5f3ca732
MP
353
354 return 0;
355}
356
32fc5aa2
BG
357/*
358 * devprop_gpiochip_set_names - Set GPIO line names using device properties
359 * @chip: GPIO chip whose lines should be named, if possible
360 *
361 * Looks for device property "gpio-line-names" and if it exists assigns
362 * GPIO line names for the chip. The memory allocated for the assigned
b41ba2ec 363 * names belong to the underlying firmware node and should not be released
32fc5aa2
BG
364 * by the caller.
365 */
366static int devprop_gpiochip_set_names(struct gpio_chip *chip)
367{
368 struct gpio_device *gdev = chip->gpiodev;
b41ba2ec 369 struct fwnode_handle *fwnode = dev_fwnode(&gdev->dev);
32fc5aa2
BG
370 const char **names;
371 int ret, i;
372 int count;
373
b41ba2ec 374 count = fwnode_property_string_array_count(fwnode, "gpio-line-names");
32fc5aa2
BG
375 if (count < 0)
376 return 0;
377
4e804c39
SP
378 /*
379 * When offset is set in the driver side we assume the driver internally
380 * is using more than one gpiochip per the same device. We have to stop
381 * setting friendly names if the specified ones with 'gpio-line-names'
382 * are less than the offset in the device itself. This means all the
383 * lines are not present for every single pin within all the internal
384 * gpiochips.
385 */
386 if (count <= chip->offset) {
387 dev_warn(&gdev->dev, "gpio-line-names too short (length %d), cannot map names for the gpiochip at offset %u\n",
388 count, chip->offset);
389 return 0;
32fc5aa2
BG
390 }
391
392 names = kcalloc(count, sizeof(*names), GFP_KERNEL);
393 if (!names)
394 return -ENOMEM;
395
b41ba2ec 396 ret = fwnode_property_read_string_array(fwnode, "gpio-line-names",
32fc5aa2
BG
397 names, count);
398 if (ret < 0) {
399 dev_warn(&gdev->dev, "failed to read GPIO line names\n");
400 kfree(names);
401 return ret;
402 }
403
4e804c39
SP
404 /*
405 * When more that one gpiochip per device is used, 'count' can
406 * contain at most number gpiochips x chip->ngpio. We have to
407 * correctly distribute all defined lines taking into account
408 * chip->offset as starting point from where we will assign
409 * the names to pins from the 'names' array. Since property
410 * 'gpio-line-names' cannot contains gaps, we have to be sure
411 * we only assign those pins that really exists since chip->ngpio
412 * can be different of the chip->offset.
413 */
414 count = (count > chip->offset) ? count - chip->offset : count;
415 if (count > chip->ngpio)
416 count = chip->ngpio;
417
c73960bb
PR
418 for (i = 0; i < count; i++) {
419 /*
420 * Allow overriding "fixed" names provided by the GPIO
421 * provider. The "fixed" names are more often than not
422 * generic and less informative than the names given in
423 * device properties.
424 */
425 if (names[chip->offset + i] && names[chip->offset + i][0])
426 gdev->descs[i].name = names[chip->offset + i];
427 }
32fc5aa2
BG
428
429 kfree(names);
430
431 return 0;
432}
433
a0b66a73 434static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc)
e4371f6e
SB
435{
436 unsigned long *p;
437
a0b66a73 438 p = bitmap_alloc(gc->ngpio, GFP_KERNEL);
e4371f6e
SB
439 if (!p)
440 return NULL;
441
442 /* Assume by default all GPIOs are valid */
a0b66a73 443 bitmap_fill(p, gc->ngpio);
e4371f6e
SB
444
445 return p;
446}
447
f626d6df 448static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
726cb3ba 449{
eb1e8bd6 450 if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask))
726cb3ba
SB
451 return 0;
452
f626d6df
LW
453 gc->valid_mask = gpiochip_allocate_mask(gc);
454 if (!gc->valid_mask)
726cb3ba
SB
455 return -ENOMEM;
456
457 return 0;
458}
459
c9fc5aff 460static int gpiochip_init_valid_mask(struct gpio_chip *gc)
f8ec92a9 461{
c9fc5aff
LW
462 if (gc->init_valid_mask)
463 return gc->init_valid_mask(gc,
464 gc->valid_mask,
465 gc->ngpio);
f8ec92a9
RRD
466
467 return 0;
468}
469
a0b66a73 470static void gpiochip_free_valid_mask(struct gpio_chip *gc)
726cb3ba 471{
a0b66a73
LW
472 bitmap_free(gc->valid_mask);
473 gc->valid_mask = NULL;
726cb3ba
SB
474}
475
b056ca1c
AS
476static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
477{
478 if (gc->add_pin_ranges)
479 return gc->add_pin_ranges(gc);
480
481 return 0;
482}
483
a0b66a73 484bool gpiochip_line_is_valid(const struct gpio_chip *gc,
726cb3ba
SB
485 unsigned int offset)
486{
487 /* No mask means all valid */
a0b66a73 488 if (likely(!gc->valid_mask))
726cb3ba 489 return true;
a0b66a73 490 return test_bit(offset, gc->valid_mask);
726cb3ba
SB
491}
492EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
493
ff2b1359
LW
494static void gpiodevice_release(struct device *dev)
495{
a6112998 496 struct gpio_device *gdev = container_of(dev, struct gpio_device, dev);
cf25ef6b 497 unsigned long flags;
ff2b1359 498
cf25ef6b 499 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 500 list_del(&gdev->list);
cf25ef6b
JH
501 spin_unlock_irqrestore(&gpio_lock, flags);
502
8d4a85b6 503 ida_free(&gpio_ida, gdev->id);
fcf273e5 504 kfree_const(gdev->label);
476e2fc5 505 kfree(gdev->descs);
9efd9e69 506 kfree(gdev);
ff2b1359
LW
507}
508
1f5eb8b1
KG
509#ifdef CONFIG_GPIO_CDEV
510#define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt))
511#define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev))
512#else
513/*
514 * gpiolib_cdev_register() indirectly calls device_add(), which is still
515 * required even when cdev is not selected.
516 */
517#define gcdev_register(gdev, devt) device_add(&(gdev)->dev)
518#define gcdev_unregister(gdev) device_del(&(gdev)->dev)
519#endif
520
159f3cd9
GR
521static int gpiochip_setup_dev(struct gpio_device *gdev)
522{
d377f56f 523 int ret;
159f3cd9 524
1f5eb8b1 525 ret = gcdev_register(gdev, gpio_devt);
d377f56f
LW
526 if (ret)
527 return ret;
111379dc 528
d377f56f
LW
529 ret = gpiochip_sysfs_register(gdev);
530 if (ret)
159f3cd9
GR
531 goto err_remove_device;
532
533 /* From this point, the .release() function cleans up gpio_device */
534 gdev->dev.release = gpiodevice_release;
262b9011
GU
535 dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base,
536 gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic");
159f3cd9
GR
537
538 return 0;
539
540err_remove_device:
1f5eb8b1 541 gcdev_unregister(gdev);
d377f56f 542 return ret;
159f3cd9
GR
543}
544
a0b66a73 545static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog)
a411e81e
BG
546{
547 struct gpio_desc *desc;
548 int rv;
549
a0b66a73 550 desc = gpiochip_get_desc(gc, hog->chip_hwnum);
a411e81e 551 if (IS_ERR(desc)) {
262b9011
GU
552 chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__,
553 PTR_ERR(desc));
a411e81e
BG
554 return;
555 }
556
ba3efdff 557 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
a411e81e
BG
558 return;
559
560 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
561 if (rv)
262b9011
GU
562 gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n",
563 __func__, gc->label, hog->chip_hwnum, rv);
a411e81e
BG
564}
565
a0b66a73 566static void machine_gpiochip_add(struct gpio_chip *gc)
a411e81e
BG
567{
568 struct gpiod_hog *hog;
569
570 mutex_lock(&gpio_machine_hogs_mutex);
571
572 list_for_each_entry(hog, &gpio_machine_hogs, list) {
a0b66a73
LW
573 if (!strcmp(gc->label, hog->chip_label))
574 gpiochip_machine_hog(gc, hog);
a411e81e
BG
575 }
576
577 mutex_unlock(&gpio_machine_hogs_mutex);
578}
579
159f3cd9
GR
580static void gpiochip_setup_devs(void)
581{
582 struct gpio_device *gdev;
d377f56f 583 int ret;
159f3cd9
GR
584
585 list_for_each_entry(gdev, &gpio_devices, list) {
d377f56f
LW
586 ret = gpiochip_setup_dev(gdev);
587 if (ret)
262b9011
GU
588 dev_err(&gdev->dev,
589 "Failed to initialize gpio device (%d)\n", ret);
159f3cd9
GR
590 }
591}
592
a0b66a73 593int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
39c3fd58
AL
594 struct lock_class_key *lock_key,
595 struct lock_class_key *request_key)
d2876d08 596{
990f6756 597 struct fwnode_handle *fwnode = NULL;
ff2b1359 598 struct gpio_device *gdev;
e5ab49cd
BG
599 unsigned long flags;
600 int base = gc->base;
601 unsigned int i;
602 int ret = 0;
9dbd1ab2 603 u32 ngpios;
d2876d08 604
990f6756
BG
605 if (gc->fwnode)
606 fwnode = gc->fwnode;
607 else if (gc->parent)
608 fwnode = dev_fwnode(gc->parent);
609
ff2b1359
LW
610 /*
611 * First: allocate and populate the internal stat container, and
612 * set up the struct device.
613 */
969f07b4 614 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
ff2b1359 615 if (!gdev)
14e85c0e 616 return -ENOMEM;
3c702e99 617 gdev->dev.bus = &gpio_bus_type;
1df62542 618 gdev->dev.parent = gc->parent;
a0b66a73
LW
619 gdev->chip = gc;
620 gc->gpiodev = gdev;
acc6e331 621
4731210c 622 of_gpio_dev_init(gc, gdev);
515321ac 623 acpi_gpio_dev_init(gc, gdev);
acc6e331 624
6cb59afe
AS
625 /*
626 * Assign fwnode depending on the result of the previous calls,
627 * if none of them succeed, assign it to the parent's one.
628 */
629 gdev->dev.fwnode = dev_fwnode(&gdev->dev) ?: fwnode;
630
8d4a85b6 631 gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL);
ff2b1359 632 if (gdev->id < 0) {
d377f56f 633 ret = gdev->id;
ff2b1359
LW
634 goto err_free_gdev;
635 }
c351bb64
QW
636
637 ret = dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id);
638 if (ret)
639 goto err_free_ida;
640
ff2b1359 641 device_initialize(&gdev->dev);
a0b66a73
LW
642 if (gc->parent && gc->parent->driver)
643 gdev->owner = gc->parent->driver->owner;
644 else if (gc->owner)
ff2b1359 645 /* TODO: remove chip->owner */
a0b66a73 646 gdev->owner = gc->owner;
ff2b1359
LW
647 else
648 gdev->owner = THIS_MODULE;
d2876d08 649
a0b66a73 650 gdev->descs = kcalloc(gc->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL);
1c3cdb18 651 if (!gdev->descs) {
d377f56f 652 ret = -ENOMEM;
c351bb64 653 goto err_free_dev_name;
ff2b1359
LW
654 }
655
9dbd1ab2
BG
656 /*
657 * Try the device properties if the driver didn't supply the number
658 * of GPIO lines.
659 */
660 if (gc->ngpio == 0) {
661 ret = device_property_read_u32(&gdev->dev, "ngpios", &ngpios);
662 if (ret == -ENODATA)
663 /*
664 * -ENODATA means that there is no property found and
665 * we want to issue the error message to the user.
666 * Besides that, we want to return different error code
667 * to state that supplied value is not valid.
668 */
669 ngpios = 0;
670 else if (ret)
671 goto err_free_descs;
672
673 gc->ngpio = ngpios;
674 }
675
a0b66a73
LW
676 if (gc->ngpio == 0) {
677 chip_err(gc, "tried to insert a GPIO chip with zero lines\n");
d377f56f 678 ret = -EINVAL;
159f3cd9 679 goto err_free_descs;
5ed41cc4 680 }
df4878e9 681
a0b66a73
LW
682 if (gc->ngpio > FASTPATH_NGPIO)
683 chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n",
684 gc->ngpio, FASTPATH_NGPIO);
3027743f 685
a0b66a73 686 gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL);
df4878e9 687 if (!gdev->label) {
d377f56f 688 ret = -ENOMEM;
476e2fc5 689 goto err_free_descs;
df4878e9
LW
690 }
691
a0b66a73 692 gdev->ngpio = gc->ngpio;
43c54eca 693 gdev->data = data;
5ed41cc4 694
d2876d08
DB
695 spin_lock_irqsave(&gpio_lock, flags);
696
fdeb8e15
LW
697 /*
698 * TODO: this allocates a Linux GPIO number base in the global
699 * GPIO numberspace for this chip. In the long run we want to
700 * get *rid* of this numberspace and use only descriptors, but
701 * it may be a pipe dream. It will not happen before we get rid
702 * of the sysfs interface anyways.
703 */
8d0aab2f 704 if (base < 0) {
a0b66a73 705 base = gpiochip_find_base(gc->ngpio);
8d0aab2f 706 if (base < 0) {
d377f56f 707 ret = base;
225fce83 708 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 709 goto err_free_label;
8d0aab2f 710 }
fdeb8e15
LW
711 /*
712 * TODO: it should not be necessary to reflect the assigned
713 * base outside of the GPIO subsystem. Go over drivers and
714 * see if anyone makes use of this, else drop this and assign
715 * a poison instead.
716 */
a0b66a73 717 gc->base = base;
8d0aab2f 718 }
fdeb8e15 719 gdev->base = base;
8d0aab2f 720
d377f56f
LW
721 ret = gpiodev_add_to_list(gdev);
722 if (ret) {
05aa5203 723 spin_unlock_irqrestore(&gpio_lock, flags);
24a9dbb1 724 chip_err(gc, "GPIO integer space overlap, cannot add chip\n");
476e2fc5 725 goto err_free_label;
05aa5203 726 }
1a989d0f 727
a0b66a73 728 for (i = 0; i < gc->ngpio; i++)
767cd17a 729 gdev->descs[i].gdev = gdev;
14e85c0e 730
207270dd
DC
731 spin_unlock_irqrestore(&gpio_lock, flags);
732
6accc376 733 BLOCKING_INIT_NOTIFIER_HEAD(&gdev->notifier);
51c1064e 734
f23f1516 735#ifdef CONFIG_PINCTRL
20ec3e39 736 INIT_LIST_HEAD(&gdev->pin_ranges);
f23f1516
SH
737#endif
738
c73960bb 739 if (gc->names) {
7cba1a4d 740 ret = gpiochip_set_desc_names(gc);
c73960bb
PR
741 if (ret)
742 goto err_remove_from_list;
743 }
744 ret = devprop_gpiochip_set_names(gc);
d377f56f 745 if (ret)
5f3ca732
MP
746 goto err_remove_from_list;
747
a0b66a73 748 ret = gpiochip_alloc_valid_mask(gc);
d377f56f 749 if (ret)
48057ed1 750 goto err_remove_from_list;
e0d89728 751
a0b66a73 752 ret = of_gpiochip_add(gc);
d377f56f 753 if (ret)
48057ed1 754 goto err_free_gpiochip_mask;
28355f81 755
a0b66a73 756 ret = gpiochip_init_valid_mask(gc);
d377f56f 757 if (ret)
35779890 758 goto err_remove_of_chip;
f8ec92a9 759
a0b66a73 760 for (i = 0; i < gc->ngpio; i++) {
3edfb7bd
RRD
761 struct gpio_desc *desc = &gdev->descs[i];
762
a0b66a73 763 if (gc->get_direction && gpiochip_line_is_valid(gc, i)) {
4fc5bfeb 764 assign_bit(FLAG_IS_OUT,
a0b66a73 765 &desc->flags, !gc->get_direction(gc, i));
d95da993 766 } else {
4fc5bfeb 767 assign_bit(FLAG_IS_OUT,
a0b66a73 768 &desc->flags, !gc->direction_input);
d95da993 769 }
3edfb7bd
RRD
770 }
771
a0b66a73 772 ret = gpiochip_add_pin_ranges(gc);
b056ca1c
AS
773 if (ret)
774 goto err_remove_of_chip;
775
a0b66a73 776 acpi_gpiochip_add(gc);
391c970c 777
a0b66a73 778 machine_gpiochip_add(gc);
a411e81e 779
a0b66a73 780 ret = gpiochip_irqchip_init_valid_mask(gc);
9411e3aa
AS
781 if (ret)
782 goto err_remove_acpi_chip;
783
a0b66a73 784 ret = gpiochip_irqchip_init_hw(gc);
fbdf8d4b 785 if (ret)
48057ed1
LW
786 goto err_remove_acpi_chip;
787
a0b66a73 788 ret = gpiochip_add_irqchip(gc, lock_key, request_key);
fbdf8d4b 789 if (ret)
48057ed1
LW
790 goto err_remove_irqchip_mask;
791
3c702e99
LW
792 /*
793 * By first adding the chardev, and then adding the device,
794 * we get a device node entry in sysfs under
795 * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
796 * coldplug of device nodes and other udev business.
159f3cd9
GR
797 * We can do this only if gpiolib has been initialized.
798 * Otherwise, defer until later.
3c702e99 799 */
159f3cd9 800 if (gpiolib_initialized) {
d377f56f
LW
801 ret = gpiochip_setup_dev(gdev);
802 if (ret)
48057ed1 803 goto err_remove_irqchip;
159f3cd9 804 }
cedb1881 805 return 0;
3bae4811 806
48057ed1 807err_remove_irqchip:
a0b66a73 808 gpiochip_irqchip_remove(gc);
48057ed1 809err_remove_irqchip_mask:
a0b66a73 810 gpiochip_irqchip_free_valid_mask(gc);
35779890 811err_remove_acpi_chip:
a0b66a73 812 acpi_gpiochip_remove(gc);
35779890 813err_remove_of_chip:
a0b66a73
LW
814 gpiochip_free_hogs(gc);
815 of_gpiochip_remove(gc);
35779890 816err_free_gpiochip_mask:
a0b66a73
LW
817 gpiochip_remove_pin_ranges(gc);
818 gpiochip_free_valid_mask(gc);
5f3ca732 819err_remove_from_list:
225fce83 820 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 821 list_del(&gdev->list);
3bae4811 822 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 823err_free_label:
fcf273e5 824 kfree_const(gdev->label);
476e2fc5
GR
825err_free_descs:
826 kfree(gdev->descs);
c351bb64
QW
827err_free_dev_name:
828 kfree(dev_name(&gdev->dev));
a05a1404 829err_free_ida:
8d4a85b6 830 ida_free(&gpio_ida, gdev->id);
a05a1404 831err_free_gdev:
d2876d08 832 /* failures here can mean systems won't boot... */
3cc1fb73
GS
833 if (ret != -EPROBE_DEFER) {
834 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
835 gdev->base, gdev->base + gdev->ngpio - 1,
836 gc->label ? : "generic", ret);
837 }
fdeb8e15 838 kfree(gdev);
d377f56f 839 return ret;
d2876d08 840}
959bc7b2 841EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
d2876d08 842
43c54eca
LW
843/**
844 * gpiochip_get_data() - get per-subdriver data for the chip
a0b66a73 845 * @gc: GPIO chip
950d55f5
TR
846 *
847 * Returns:
848 * The per-subdriver data for the chip.
43c54eca 849 */
a0b66a73 850void *gpiochip_get_data(struct gpio_chip *gc)
43c54eca 851{
a0b66a73 852 return gc->gpiodev->data;
43c54eca
LW
853}
854EXPORT_SYMBOL_GPL(gpiochip_get_data);
855
d2876d08
DB
856/**
857 * gpiochip_remove() - unregister a gpio_chip
a0b66a73 858 * @gc: the chip to unregister
d2876d08
DB
859 *
860 * A gpio_chip with any GPIOs still requested may not be removed.
861 */
a0b66a73 862void gpiochip_remove(struct gpio_chip *gc)
d2876d08 863{
a0b66a73 864 struct gpio_device *gdev = gc->gpiodev;
d2876d08 865 unsigned long flags;
869233f8 866 unsigned int i;
d2876d08 867
ff2b1359 868 /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
afbc4f31 869 gpiochip_sysfs_unregister(gdev);
a0b66a73 870 gpiochip_free_hogs(gc);
bd203bd5
BJZ
871 /* Numb the device, cancelling all outstanding operations */
872 gdev->chip = NULL;
a0b66a73
LW
873 gpiochip_irqchip_remove(gc);
874 acpi_gpiochip_remove(gc);
875 of_gpiochip_remove(gc);
876 gpiochip_remove_pin_ranges(gc);
877 gpiochip_free_valid_mask(gc);
43c54eca
LW
878 /*
879 * We accept no more calls into the driver from this point, so
880 * NULL the driver data pointer
881 */
882 gdev->data = NULL;
391c970c 883
6798acaa 884 spin_lock_irqsave(&gpio_lock, flags);
fdeb8e15 885 for (i = 0; i < gdev->ngpio; i++) {
a0b66a73 886 if (gpiochip_is_requested(gc, i))
869233f8 887 break;
d2876d08 888 }
d2876d08 889 spin_unlock_irqrestore(&gpio_lock, flags);
14e85c0e 890
ca18a852 891 if (i != gdev->ngpio)
fdeb8e15 892 dev_crit(&gdev->dev,
58383c78 893 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
fab28b89 894
ff2b1359
LW
895 /*
896 * The gpiochip side puts its use of the device to rest here:
897 * if there are no userspace clients, the chardev and device will
898 * be removed, else it will be dangling until the last user is
899 * gone.
900 */
1f5eb8b1 901 gcdev_unregister(gdev);
ff2b1359 902 put_device(&gdev->dev);
d2876d08
DB
903}
904EXPORT_SYMBOL_GPL(gpiochip_remove);
905
594fa265
GL
906/**
907 * gpiochip_find() - iterator for locating a specific gpio_chip
908 * @data: data to pass to match function
950d55f5 909 * @match: Callback function to check gpio_chip
594fa265
GL
910 *
911 * Similar to bus_find_device. It returns a reference to a gpio_chip as
912 * determined by a user supplied @match callback. The callback should return
913 * 0 if the device doesn't match and non-zero if it does. If the callback is
914 * non-zero, this function will return to the caller and not iterate over any
915 * more gpio_chips.
916 */
07ce8ec7 917struct gpio_chip *gpiochip_find(void *data,
a0b66a73 918 int (*match)(struct gpio_chip *gc,
3d0f7cf0 919 void *data))
594fa265 920{
ff2b1359 921 struct gpio_device *gdev;
a0b66a73 922 struct gpio_chip *gc = NULL;
594fa265 923 unsigned long flags;
594fa265
GL
924
925 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 926 list_for_each_entry(gdev, &gpio_devices, list)
acf06ff7 927 if (gdev->chip && match(gdev->chip, data)) {
a0b66a73 928 gc = gdev->chip;
594fa265 929 break;
acf06ff7 930 }
ff2b1359 931
594fa265
GL
932 spin_unlock_irqrestore(&gpio_lock, flags);
933
a0b66a73 934 return gc;
594fa265 935}
8fa0c9bf 936EXPORT_SYMBOL_GPL(gpiochip_find);
d2876d08 937
a0b66a73 938static int gpiochip_match_name(struct gpio_chip *gc, void *data)
79697ef9
AC
939{
940 const char *name = data;
941
a0b66a73 942 return !strcmp(gc->label, name);
79697ef9
AC
943}
944
945static struct gpio_chip *find_chip_by_name(const char *name)
946{
947 return gpiochip_find((void *)name, gpiochip_match_name);
948}
949
14250520
LW
950#ifdef CONFIG_GPIOLIB_IRQCHIP
951
952/*
953 * The following is irqchip helper code for gpiochips.
954 */
955
9411e3aa
AS
956static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
957{
958 struct gpio_irq_chip *girq = &gc->irq;
959
960 if (!girq->init_hw)
961 return 0;
962
963 return girq->init_hw(gc);
964}
965
5fbe5b58 966static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb 967{
5fbe5b58
LW
968 struct gpio_irq_chip *girq = &gc->irq;
969
970 if (!girq->init_valid_mask)
79b804cb
MW
971 return 0;
972
5fbe5b58
LW
973 girq->valid_mask = gpiochip_allocate_mask(gc);
974 if (!girq->valid_mask)
79b804cb
MW
975 return -ENOMEM;
976
5fbe5b58
LW
977 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
978
79b804cb
MW
979 return 0;
980}
981
a0b66a73 982static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 983{
a0b66a73
LW
984 bitmap_free(gc->irq.valid_mask);
985 gc->irq.valid_mask = NULL;
79b804cb
MW
986}
987
a0b66a73 988bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc,
64ff2c8e 989 unsigned int offset)
79b804cb 990{
a0b66a73 991 if (!gpiochip_line_is_valid(gc, offset))
726cb3ba 992 return false;
79b804cb 993 /* No mask means all valid */
a0b66a73 994 if (likely(!gc->irq.valid_mask))
79b804cb 995 return true;
a0b66a73 996 return test_bit(offset, gc->irq.valid_mask);
79b804cb 997}
64ff2c8e 998EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
79b804cb 999
fdd61a01
LW
1000#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1001
1002/**
1003 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
1004 * to a gpiochip
1005 * @gc: the gpiochip to set the irqchip hierarchical handler to
1006 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
1007 * will then percolate up to the parent
1008 */
1009static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
1010 struct irq_chip *irqchip)
1011{
1012 /* DT will deal with mapping each IRQ as we go along */
1013 if (is_of_node(gc->irq.fwnode))
1014 return;
1015
1016 /*
1017 * This is for legacy and boardfile "irqchip" fwnodes: allocate
1018 * irqs upfront instead of dynamically since we don't have the
1019 * dynamic type of allocation that hardware description languages
1020 * provide. Once all GPIO drivers using board files are gone from
1021 * the kernel we can delete this code, but for a transitional period
1022 * it is necessary to keep this around.
1023 */
1024 if (is_fwnode_irqchip(gc->irq.fwnode)) {
1025 int i;
1026 int ret;
1027
1028 for (i = 0; i < gc->ngpio; i++) {
1029 struct irq_fwspec fwspec;
1030 unsigned int parent_hwirq;
1031 unsigned int parent_type;
1032 struct gpio_irq_chip *girq = &gc->irq;
1033
1034 /*
1035 * We call the child to parent translation function
1036 * only to check if the child IRQ is valid or not.
1037 * Just pick the rising edge type here as that is what
1038 * we likely need to support.
1039 */
1040 ret = girq->child_to_parent_hwirq(gc, i,
1041 IRQ_TYPE_EDGE_RISING,
1042 &parent_hwirq,
1043 &parent_type);
1044 if (ret) {
1045 chip_err(gc, "skip set-up on hwirq %d\n",
1046 i);
1047 continue;
1048 }
1049
1050 fwspec.fwnode = gc->irq.fwnode;
1051 /* This is the hwirq for the GPIO line side of things */
1052 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
1053 /* Just pick something */
1054 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
1055 fwspec.param_count = 2;
1056 ret = __irq_domain_alloc_irqs(gc->irq.domain,
1057 /* just pick something */
1058 -1,
1059 1,
1060 NUMA_NO_NODE,
1061 &fwspec,
1062 false,
1063 NULL);
1064 if (ret < 0) {
1065 chip_err(gc,
1066 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1067 i, parent_hwirq,
1068 ret);
1069 }
1070 }
1071 }
1072
1073 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1074
1075 return;
1076}
1077
1078static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1079 struct irq_fwspec *fwspec,
1080 unsigned long *hwirq,
1081 unsigned int *type)
1082{
1083 /* We support standard DT translation */
1084 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1085 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1086 }
1087
1088 /* This is for board files and others not using DT */
1089 if (is_fwnode_irqchip(fwspec->fwnode)) {
1090 int ret;
1091
1092 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1093 if (ret)
1094 return ret;
1095 WARN_ON(*type == IRQ_TYPE_NONE);
1096 return 0;
1097 }
1098 return -EINVAL;
1099}
1100
1101static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1102 unsigned int irq,
1103 unsigned int nr_irqs,
1104 void *data)
1105{
1106 struct gpio_chip *gc = d->host_data;
1107 irq_hw_number_t hwirq;
1108 unsigned int type = IRQ_TYPE_NONE;
1109 struct irq_fwspec *fwspec = data;
24258761 1110 void *parent_arg;
fdd61a01
LW
1111 unsigned int parent_hwirq;
1112 unsigned int parent_type;
1113 struct gpio_irq_chip *girq = &gc->irq;
1114 int ret;
1115
1116 /*
1117 * The nr_irqs parameter is always one except for PCI multi-MSI
1118 * so this should not happen.
1119 */
1120 WARN_ON(nr_irqs != 1);
1121
1122 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
1123 if (ret)
1124 return ret;
1125
366950ee 1126 chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
fdd61a01
LW
1127
1128 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
1129 &parent_hwirq, &parent_type);
1130 if (ret) {
1131 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
1132 return ret;
1133 }
366950ee 1134 chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq);
fdd61a01
LW
1135
1136 /*
1137 * We set handle_bad_irq because the .set_type() should
1138 * always be invoked and set the right type of handler.
1139 */
1140 irq_domain_set_info(d,
1141 irq,
1142 hwirq,
1143 gc->irq.chip,
1144 gc,
1145 girq->handler,
1146 NULL, NULL);
1147 irq_set_probe(irq);
1148
fdd61a01 1149 /* This parent only handles asserted level IRQs */
24258761
KH
1150 parent_arg = girq->populate_parent_alloc_arg(gc, parent_hwirq, parent_type);
1151 if (!parent_arg)
1152 return -ENOMEM;
1153
366950ee 1154 chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
fdd61a01 1155 irq, parent_hwirq);
c34f6dc8 1156 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
24258761 1157 ret = irq_domain_alloc_irqs_parent(d, irq, 1, parent_arg);
880b7cf2
KH
1158 /*
1159 * If the parent irqdomain is msi, the interrupts have already
1160 * been allocated, so the EEXIST is good.
1161 */
1162 if (irq_domain_is_msi(d->parent) && (ret == -EEXIST))
1163 ret = 0;
fdd61a01
LW
1164 if (ret)
1165 chip_err(gc,
1166 "failed to allocate parent hwirq %d for hwirq %lu\n",
1167 parent_hwirq, hwirq);
1168
24258761 1169 kfree(parent_arg);
fdd61a01
LW
1170 return ret;
1171}
1172
a0b66a73 1173static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc,
fdd61a01
LW
1174 unsigned int offset)
1175{
1176 return offset;
1177}
1178
1179static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
1180{
1181 ops->activate = gpiochip_irq_domain_activate;
1182 ops->deactivate = gpiochip_irq_domain_deactivate;
1183 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
1184 ops->free = irq_domain_free_irqs_common;
1185
1186 /*
1187 * We only allow overriding the translate() function for
1188 * hierarchical chips, and this should only be done if the user
1189 * really need something other than 1:1 translation.
1190 */
1191 if (!ops->translate)
1192 ops->translate = gpiochip_hierarchy_irq_domain_translate;
1193}
1194
1195static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1196{
1197 if (!gc->irq.child_to_parent_hwirq ||
1198 !gc->irq.fwnode) {
1199 chip_err(gc, "missing irqdomain vital data\n");
1200 return -EINVAL;
1201 }
1202
1203 if (!gc->irq.child_offset_to_irq)
1204 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
1205
24258761
KH
1206 if (!gc->irq.populate_parent_alloc_arg)
1207 gc->irq.populate_parent_alloc_arg =
fdd61a01
LW
1208 gpiochip_populate_parent_fwspec_twocell;
1209
1210 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
1211
1212 gc->irq.domain = irq_domain_create_hierarchy(
1213 gc->irq.parent_domain,
1214 0,
1215 gc->ngpio,
1216 gc->irq.fwnode,
1217 &gc->irq.child_irq_domain_ops,
1218 gc);
1219
1220 if (!gc->irq.domain)
1221 return -ENOMEM;
1222
1223 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
1224
1225 return 0;
1226}
1227
1228static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1229{
1230 return !!gc->irq.parent_domain;
1231}
1232
a0b66a73 1233void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc,
fdd61a01
LW
1234 unsigned int parent_hwirq,
1235 unsigned int parent_type)
1236{
24258761
KH
1237 struct irq_fwspec *fwspec;
1238
1239 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
1240 if (!fwspec)
1241 return NULL;
1242
a0b66a73 1243 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1244 fwspec->param_count = 2;
1245 fwspec->param[0] = parent_hwirq;
1246 fwspec->param[1] = parent_type;
24258761
KH
1247
1248 return fwspec;
fdd61a01
LW
1249}
1250EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
1251
a0b66a73 1252void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc,
fdd61a01
LW
1253 unsigned int parent_hwirq,
1254 unsigned int parent_type)
1255{
24258761
KH
1256 struct irq_fwspec *fwspec;
1257
1258 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
1259 if (!fwspec)
1260 return NULL;
1261
a0b66a73 1262 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1263 fwspec->param_count = 4;
1264 fwspec->param[0] = 0;
1265 fwspec->param[1] = parent_hwirq;
1266 fwspec->param[2] = 0;
1267 fwspec->param[3] = parent_type;
24258761
KH
1268
1269 return fwspec;
fdd61a01
LW
1270}
1271EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
1272
1273#else
1274
1275static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1276{
1277 return -EINVAL;
1278}
1279
1280static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1281{
1282 return false;
1283}
1284
1285#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
1286
14250520
LW
1287/**
1288 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
1289 * @d: the irqdomain used by this irqchip
1290 * @irq: the global irq number used by this GPIO irqchip irq
1291 * @hwirq: the local IRQ/GPIO line offset on this gpiochip
1292 *
1293 * This function will set up the mapping for a certain IRQ line on a
1294 * gpiochip by assigning the gpiochip as chip data, and using the irqchip
1295 * stored inside the gpiochip.
1296 */
1b95b4eb
TR
1297int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
1298 irq_hw_number_t hwirq)
14250520 1299{
a0b66a73 1300 struct gpio_chip *gc = d->host_data;
d377f56f 1301 int ret = 0;
14250520 1302
a0b66a73 1303 if (!gpiochip_irqchip_irq_valid(gc, hwirq))
dc749a09
GS
1304 return -ENXIO;
1305
a0b66a73 1306 irq_set_chip_data(irq, gc);
a0a8bcf4
GS
1307 /*
1308 * This lock class tells lockdep that GPIO irqs are in a different
1309 * category than their parents, so it won't report false recursion.
1310 */
a0b66a73
LW
1311 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
1312 irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler);
d245b3f9 1313 /* Chips that use nested thread handlers have them marked */
a0b66a73 1314 if (gc->irq.threaded)
1c8732bb 1315 irq_set_nested_thread(irq, 1);
14250520 1316 irq_set_noprobe(irq);
23393d49 1317
a0b66a73
LW
1318 if (gc->irq.num_parents == 1)
1319 ret = irq_set_parent(irq, gc->irq.parents[0]);
1320 else if (gc->irq.map)
1321 ret = irq_set_parent(irq, gc->irq.map[hwirq]);
e0d89728 1322
d377f56f
LW
1323 if (ret < 0)
1324 return ret;
e0d89728 1325
1333b90f
LW
1326 /*
1327 * No set-up of the hardware will happen if IRQ_TYPE_NONE
1328 * is passed as default type.
1329 */
a0b66a73
LW
1330 if (gc->irq.default_type != IRQ_TYPE_NONE)
1331 irq_set_irq_type(irq, gc->irq.default_type);
14250520
LW
1332
1333 return 0;
1334}
1b95b4eb 1335EXPORT_SYMBOL_GPL(gpiochip_irq_map);
14250520 1336
1b95b4eb 1337void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
c3626fde 1338{
a0b66a73 1339 struct gpio_chip *gc = d->host_data;
1c8732bb 1340
a0b66a73 1341 if (gc->irq.threaded)
1c8732bb 1342 irq_set_nested_thread(irq, 0);
c3626fde
LW
1343 irq_set_chip_and_handler(irq, NULL, NULL);
1344 irq_set_chip_data(irq, NULL);
1345}
1b95b4eb 1346EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
c3626fde 1347
14250520
LW
1348static const struct irq_domain_ops gpiochip_domain_ops = {
1349 .map = gpiochip_irq_map,
c3626fde 1350 .unmap = gpiochip_irq_unmap,
14250520
LW
1351 /* Virtually all GPIO irqchips are twocell:ed */
1352 .xlate = irq_domain_xlate_twocell,
1353};
1354
fdd61a01
LW
1355/*
1356 * TODO: move these activate/deactivate in under the hierarchicial
1357 * irqchip implementation as static once SPMI and SSBI (all external
1358 * users) are phased over.
1359 */
ef74f70e
BM
1360/**
1361 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
1362 * @domain: The IRQ domain used by this IRQ chip
1363 * @data: Outermost irq_data associated with the IRQ
1364 * @reserve: If set, only reserve an interrupt vector instead of assigning one
1365 *
1366 * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
1367 * used as the activate function for the &struct irq_domain_ops. The host_data
1368 * for the IRQ domain must be the &struct gpio_chip.
1369 */
1370int gpiochip_irq_domain_activate(struct irq_domain *domain,
1371 struct irq_data *data, bool reserve)
1372{
a0b66a73 1373 struct gpio_chip *gc = domain->host_data;
ef74f70e 1374
a0b66a73 1375 return gpiochip_lock_as_irq(gc, data->hwirq);
ef74f70e
BM
1376}
1377EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
1378
1379/**
1380 * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
1381 * @domain: The IRQ domain used by this IRQ chip
1382 * @data: Outermost irq_data associated with the IRQ
1383 *
1384 * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
1385 * be used as the deactivate function for the &struct irq_domain_ops. The
1386 * host_data for the IRQ domain must be the &struct gpio_chip.
1387 */
1388void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
1389 struct irq_data *data)
1390{
a0b66a73 1391 struct gpio_chip *gc = domain->host_data;
ef74f70e 1392
a0b66a73 1393 return gpiochip_unlock_as_irq(gc, data->hwirq);
ef74f70e
BM
1394}
1395EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
1396
13daf489 1397static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset)
14250520 1398{
a0b66a73 1399 struct irq_domain *domain = gc->irq.domain;
fdd61a01 1400
5467801f
SP
1401#ifdef CONFIG_GPIOLIB_IRQCHIP
1402 /*
1403 * Avoid race condition with other code, which tries to lookup
1404 * an IRQ before the irqchip has been properly registered,
1405 * i.e. while gpiochip is still being brought up.
1406 */
1407 if (!gc->irq.initialized)
1408 return -EPROBE_DEFER;
1409#endif
1410
a0b66a73 1411 if (!gpiochip_irqchip_irq_valid(gc, offset))
4e6b8238 1412 return -ENXIO;
5b76e79c 1413
fdd61a01
LW
1414#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1415 if (irq_domain_is_hierarchy(domain)) {
1416 struct irq_fwspec spec;
1417
1418 spec.fwnode = domain->fwnode;
1419 spec.param_count = 2;
a0b66a73 1420 spec.param[0] = gc->irq.child_offset_to_irq(gc, offset);
fdd61a01
LW
1421 spec.param[1] = IRQ_TYPE_NONE;
1422
1423 return irq_create_fwspec_mapping(&spec);
1424 }
1425#endif
1426
1427 return irq_create_mapping(domain, offset);
14250520
LW
1428}
1429
704f0875 1430int gpiochip_irq_reqres(struct irq_data *d)
14250520 1431{
a0b66a73 1432 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
5b76e79c 1433
a0b66a73 1434 return gpiochip_reqres_irq(gc, d->hwirq);
14250520 1435}
704f0875 1436EXPORT_SYMBOL(gpiochip_irq_reqres);
14250520 1437
704f0875 1438void gpiochip_irq_relres(struct irq_data *d)
14250520 1439{
a0b66a73 1440 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
14250520 1441
a0b66a73 1442 gpiochip_relres_irq(gc, d->hwirq);
14250520 1443}
704f0875 1444EXPORT_SYMBOL(gpiochip_irq_relres);
14250520 1445
a8173820
MS
1446static void gpiochip_irq_mask(struct irq_data *d)
1447{
1448 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1449
1450 if (gc->irq.irq_mask)
1451 gc->irq.irq_mask(d);
1452 gpiochip_disable_irq(gc, d->hwirq);
1453}
1454
1455static void gpiochip_irq_unmask(struct irq_data *d)
1456{
1457 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1458
1459 gpiochip_enable_irq(gc, d->hwirq);
1460 if (gc->irq.irq_unmask)
1461 gc->irq.irq_unmask(d);
1462}
1463
461c1a7d 1464static void gpiochip_irq_enable(struct irq_data *d)
14250520 1465{
a0b66a73 1466 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
e0d89728 1467
a0b66a73 1468 gpiochip_enable_irq(gc, d->hwirq);
a8173820 1469 gc->irq.irq_enable(d);
461c1a7d
HV
1470}
1471
1472static void gpiochip_irq_disable(struct irq_data *d)
1473{
a0b66a73 1474 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
461c1a7d 1475
a8173820 1476 gc->irq.irq_disable(d);
a0b66a73 1477 gpiochip_disable_irq(gc, d->hwirq);
461c1a7d
HV
1478}
1479
a0b66a73 1480static void gpiochip_set_irq_hooks(struct gpio_chip *gc)
ca620f2d 1481{
a0b66a73 1482 struct irq_chip *irqchip = gc->irq.chip;
ca620f2d 1483
6c846d02
MZ
1484 if (irqchip->flags & IRQCHIP_IMMUTABLE)
1485 return;
1486
1487 chip_warn(gc, "not an immutable chip, please consider fixing it!\n");
1488
ca620f2d
HV
1489 if (!irqchip->irq_request_resources &&
1490 !irqchip->irq_release_resources) {
1491 irqchip->irq_request_resources = gpiochip_irq_reqres;
1492 irqchip->irq_release_resources = gpiochip_irq_relres;
1493 }
a0b66a73 1494 if (WARN_ON(gc->irq.irq_enable))
461c1a7d 1495 return;
171948ea 1496 /* Check if the irqchip already has this hook... */
9d552219
NS
1497 if (irqchip->irq_enable == gpiochip_irq_enable ||
1498 irqchip->irq_mask == gpiochip_irq_mask) {
171948ea
HV
1499 /*
1500 * ...and if so, give a gentle warning that this is bad
1501 * practice.
1502 */
a0b66a73 1503 chip_info(gc,
171948ea
HV
1504 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
1505 return;
1506 }
a8173820
MS
1507
1508 if (irqchip->irq_disable) {
1509 gc->irq.irq_disable = irqchip->irq_disable;
1510 irqchip->irq_disable = gpiochip_irq_disable;
1511 } else {
1512 gc->irq.irq_mask = irqchip->irq_mask;
1513 irqchip->irq_mask = gpiochip_irq_mask;
1514 }
1515
1516 if (irqchip->irq_enable) {
1517 gc->irq.irq_enable = irqchip->irq_enable;
1518 irqchip->irq_enable = gpiochip_irq_enable;
1519 } else {
1520 gc->irq.irq_unmask = irqchip->irq_unmask;
1521 irqchip->irq_unmask = gpiochip_irq_unmask;
1522 }
14250520
LW
1523}
1524
e0d89728
TR
1525/**
1526 * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
a0b66a73 1527 * @gc: the GPIO chip to add the IRQ chip to
39c3fd58
AL
1528 * @lock_key: lockdep class for IRQ lock
1529 * @request_key: lockdep class for IRQ request
e0d89728 1530 */
a0b66a73 1531static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1532 struct lock_class_key *lock_key,
1533 struct lock_class_key *request_key)
e0d89728 1534{
5c63a9db 1535 struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev);
a0b66a73 1536 struct irq_chip *irqchip = gc->irq.chip;
e0d89728
TR
1537 unsigned int type;
1538 unsigned int i;
1539
1540 if (!irqchip)
1541 return 0;
1542
a0b66a73
LW
1543 if (gc->irq.parent_handler && gc->can_sleep) {
1544 chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n");
e0d89728
TR
1545 return -EINVAL;
1546 }
1547
a0b66a73 1548 type = gc->irq.default_type;
e0d89728
TR
1549
1550 /*
1551 * Specifying a default trigger is a terrible idea if DT or ACPI is
1552 * used to configure the interrupts, as you may end up with
1553 * conflicting triggers. Tell the user, and reset to NONE.
1554 */
5c63a9db
AS
1555 if (WARN(fwnode && type != IRQ_TYPE_NONE,
1556 "%pfw: Ignoring %u default trigger\n", fwnode, type))
e0d89728
TR
1557 type = IRQ_TYPE_NONE;
1558
ef382374
NS
1559 if (gc->to_irq)
1560 chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__);
1561
a0b66a73
LW
1562 gc->to_irq = gpiochip_to_irq;
1563 gc->irq.default_type = type;
1564 gc->irq.lock_key = lock_key;
1565 gc->irq.request_key = request_key;
e0d89728 1566
fdd61a01 1567 /* If a parent irqdomain is provided, let's build a hierarchy */
a0b66a73
LW
1568 if (gpiochip_hierarchy_is_hierarchical(gc)) {
1569 int ret = gpiochip_hierarchy_add_domain(gc);
fdd61a01
LW
1570 if (ret)
1571 return ret;
1572 } else {
1573 /* Some drivers provide custom irqdomain ops */
5c63a9db 1574 gc->irq.domain = irq_domain_create_simple(fwnode,
a0b66a73
LW
1575 gc->ngpio,
1576 gc->irq.first,
266315fb
AS
1577 gc->irq.domain_ops ?: &gpiochip_domain_ops,
1578 gc);
a0b66a73 1579 if (!gc->irq.domain)
fdd61a01
LW
1580 return -EINVAL;
1581 }
e0d89728 1582
a0b66a73 1583 if (gc->irq.parent_handler) {
a0b66a73 1584 for (i = 0; i < gc->irq.num_parents; i++) {
cfe6807d
MZ
1585 void *data;
1586
1587 if (gc->irq.per_parent_data)
1588 data = gc->irq.parent_handler_data_array[i];
1589 else
1590 data = gc->irq.parent_handler_data ?: gc;
1591
e0d89728
TR
1592 /*
1593 * The parent IRQ chip is already using the chip_data
1594 * for this IRQ chip, so our callbacks simply use the
1595 * handler_data.
1596 */
a0b66a73
LW
1597 irq_set_chained_handler_and_data(gc->irq.parents[i],
1598 gc->irq.parent_handler,
e0d89728
TR
1599 data);
1600 }
e0d89728
TR
1601 }
1602
a0b66a73 1603 gpiochip_set_irq_hooks(gc);
ca620f2d 1604
5467801f
SP
1605 /*
1606 * Using barrier() here to prevent compiler from reordering
1607 * gc->irq.initialized before initialization of above
1608 * GPIO chip irq members.
1609 */
1610 barrier();
1611
1612 gc->irq.initialized = true;
1613
06fb4ecf
ML
1614 acpi_gpiochip_request_interrupts(gc);
1615
e0d89728
TR
1616 return 0;
1617}
1618
14250520
LW
1619/**
1620 * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
a0b66a73 1621 * @gc: the gpiochip to remove the irqchip from
14250520
LW
1622 *
1623 * This is called only from gpiochip_remove()
1624 */
a0b66a73 1625static void gpiochip_irqchip_remove(struct gpio_chip *gc)
14250520 1626{
a0b66a73 1627 struct irq_chip *irqchip = gc->irq.chip;
39e5f096 1628 unsigned int offset;
c3626fde 1629
a0b66a73 1630 acpi_gpiochip_free_interrupts(gc);
afa82fab 1631
a0b66a73
LW
1632 if (irqchip && gc->irq.parent_handler) {
1633 struct gpio_irq_chip *irq = &gc->irq;
39e5f096
TR
1634 unsigned int i;
1635
1636 for (i = 0; i < irq->num_parents; i++)
1637 irq_set_chained_handler_and_data(irq->parents[i],
1638 NULL, NULL);
25e4fe92
DES
1639 }
1640
c3626fde 1641 /* Remove all IRQ mappings and delete the domain */
a0b66a73 1642 if (gc->irq.domain) {
39e5f096
TR
1643 unsigned int irq;
1644
a0b66a73
LW
1645 for (offset = 0; offset < gc->ngpio; offset++) {
1646 if (!gpiochip_irqchip_irq_valid(gc, offset))
79b804cb 1647 continue;
f0fbe7bc 1648
a0b66a73 1649 irq = irq_find_mapping(gc->irq.domain, offset);
f0fbe7bc 1650 irq_dispose_mapping(irq);
79b804cb 1651 }
f0fbe7bc 1652
a0b66a73 1653 irq_domain_remove(gc->irq.domain);
c3626fde 1654 }
14250520 1655
6c846d02 1656 if (irqchip && !(irqchip->flags & IRQCHIP_IMMUTABLE)) {
461c1a7d
HV
1657 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
1658 irqchip->irq_request_resources = NULL;
1659 irqchip->irq_release_resources = NULL;
1660 }
1661 if (irqchip->irq_enable == gpiochip_irq_enable) {
a0b66a73
LW
1662 irqchip->irq_enable = gc->irq.irq_enable;
1663 irqchip->irq_disable = gc->irq.irq_disable;
461c1a7d 1664 }
14250520 1665 }
a0b66a73
LW
1666 gc->irq.irq_enable = NULL;
1667 gc->irq.irq_disable = NULL;
1668 gc->irq.chip = NULL;
79b804cb 1669
a0b66a73 1670 gpiochip_irqchip_free_valid_mask(gc);
14250520
LW
1671}
1672
6a45b0e2
MW
1673/**
1674 * gpiochip_irqchip_add_domain() - adds an irqdomain to a gpiochip
1675 * @gc: the gpiochip to add the irqchip to
1676 * @domain: the irqdomain to add to the gpiochip
1677 *
1678 * This function adds an IRQ domain to the gpiochip.
1679 */
1680int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
1681 struct irq_domain *domain)
1682{
1683 if (!domain)
1684 return -EINVAL;
1685
1686 gc->to_irq = gpiochip_to_irq;
1687 gc->irq.domain = domain;
1688
1689 return 0;
1690}
1691EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain);
1692
14250520
LW
1693#else /* CONFIG_GPIOLIB_IRQCHIP */
1694
a0b66a73 1695static inline int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1696 struct lock_class_key *lock_key,
1697 struct lock_class_key *request_key)
e0d89728
TR
1698{
1699 return 0;
1700}
a0b66a73 1701static void gpiochip_irqchip_remove(struct gpio_chip *gc) {}
9411e3aa 1702
a0b66a73 1703static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
9411e3aa
AS
1704{
1705 return 0;
1706}
1707
a0b66a73 1708static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb
MW
1709{
1710 return 0;
1711}
a0b66a73 1712static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 1713{ }
14250520
LW
1714
1715#endif /* CONFIG_GPIOLIB_IRQCHIP */
1716
c771c2f4
JG
1717/**
1718 * gpiochip_generic_request() - request the gpio function for a pin
a0b66a73 1719 * @gc: the gpiochip owning the GPIO
c771c2f4
JG
1720 * @offset: the offset of the GPIO to request for GPIO function
1721 */
13daf489 1722int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset)
c771c2f4 1723{
56e337f2
BG
1724#ifdef CONFIG_PINCTRL
1725 if (list_empty(&gc->gpiodev->pin_ranges))
1726 return 0;
1727#endif
1728
a0b66a73 1729 return pinctrl_gpio_request(gc->gpiodev->base + offset);
c771c2f4
JG
1730}
1731EXPORT_SYMBOL_GPL(gpiochip_generic_request);
1732
1733/**
1734 * gpiochip_generic_free() - free the gpio function from a pin
a0b66a73 1735 * @gc: the gpiochip to request the gpio function for
c771c2f4
JG
1736 * @offset: the offset of the GPIO to free from GPIO function
1737 */
13daf489 1738void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset)
c771c2f4 1739{
56e337f2
BG
1740#ifdef CONFIG_PINCTRL
1741 if (list_empty(&gc->gpiodev->pin_ranges))
1742 return;
1743#endif
1744
a0b66a73 1745 pinctrl_gpio_free(gc->gpiodev->base + offset);
c771c2f4
JG
1746}
1747EXPORT_SYMBOL_GPL(gpiochip_generic_free);
1748
2956b5d9
MW
1749/**
1750 * gpiochip_generic_config() - apply configuration for a pin
a0b66a73 1751 * @gc: the gpiochip owning the GPIO
2956b5d9
MW
1752 * @offset: the offset of the GPIO to apply the configuration
1753 * @config: the configuration to be applied
1754 */
13daf489 1755int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset,
2956b5d9
MW
1756 unsigned long config)
1757{
a0b66a73 1758 return pinctrl_gpio_set_config(gc->gpiodev->base + offset, config);
2956b5d9
MW
1759}
1760EXPORT_SYMBOL_GPL(gpiochip_generic_config);
1761
f23f1516 1762#ifdef CONFIG_PINCTRL
165adc9c 1763
586a87e6
CR
1764/**
1765 * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
a0b66a73 1766 * @gc: the gpiochip to add the range for
d32651f6 1767 * @pctldev: the pin controller to map to
586a87e6
CR
1768 * @gpio_offset: the start offset in the current gpio_chip number space
1769 * @pin_group: name of the pin group inside the pin controller
973c1714
CL
1770 *
1771 * Calling this function directly from a DeviceTree-supported
1772 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
1773 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
1774 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
586a87e6 1775 */
a0b66a73 1776int gpiochip_add_pingroup_range(struct gpio_chip *gc,
586a87e6
CR
1777 struct pinctrl_dev *pctldev,
1778 unsigned int gpio_offset, const char *pin_group)
1779{
1780 struct gpio_pin_range *pin_range;
a0b66a73 1781 struct gpio_device *gdev = gc->gpiodev;
586a87e6
CR
1782 int ret;
1783
1784 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
1785 if (!pin_range) {
a0b66a73 1786 chip_err(gc, "failed to allocate pin ranges\n");
586a87e6
CR
1787 return -ENOMEM;
1788 }
1789
1790 /* Use local offset as range ID */
1791 pin_range->range.id = gpio_offset;
a0b66a73
LW
1792 pin_range->range.gc = gc;
1793 pin_range->range.name = gc->label;
fdeb8e15 1794 pin_range->range.base = gdev->base + gpio_offset;
586a87e6
CR
1795 pin_range->pctldev = pctldev;
1796
1797 ret = pinctrl_get_group_pins(pctldev, pin_group,
1798 &pin_range->range.pins,
1799 &pin_range->range.npins);
61c6375d
MN
1800 if (ret < 0) {
1801 kfree(pin_range);
586a87e6 1802 return ret;
61c6375d 1803 }
586a87e6
CR
1804
1805 pinctrl_add_gpio_range(pctldev, &pin_range->range);
1806
a0b66a73 1807 chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n",
1a2a99c6 1808 gpio_offset, gpio_offset + pin_range->range.npins - 1,
586a87e6
CR
1809 pinctrl_dev_get_devname(pctldev), pin_group);
1810
20ec3e39 1811 list_add_tail(&pin_range->node, &gdev->pin_ranges);
586a87e6
CR
1812
1813 return 0;
1814}
1815EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
1816
3f0f8670
LW
1817/**
1818 * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
a0b66a73 1819 * @gc: the gpiochip to add the range for
950d55f5 1820 * @pinctl_name: the dev_name() of the pin controller to map to
316511c0
LW
1821 * @gpio_offset: the start offset in the current gpio_chip number space
1822 * @pin_offset: the start offset in the pin controller number space
3f0f8670
LW
1823 * @npins: the number of pins from the offset of each pin space (GPIO and
1824 * pin controller) to accumulate in this range
950d55f5
TR
1825 *
1826 * Returns:
1827 * 0 on success, or a negative error-code on failure.
973c1714
CL
1828 *
1829 * Calling this function directly from a DeviceTree-supported
1830 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
1831 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
1832 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
3f0f8670 1833 */
a0b66a73 1834int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
316511c0 1835 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 1836 unsigned int npins)
f23f1516
SH
1837{
1838 struct gpio_pin_range *pin_range;
a0b66a73 1839 struct gpio_device *gdev = gc->gpiodev;
b4d4b1f0 1840 int ret;
f23f1516 1841
3f0f8670 1842 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
f23f1516 1843 if (!pin_range) {
a0b66a73 1844 chip_err(gc, "failed to allocate pin ranges\n");
1e63d7b9 1845 return -ENOMEM;
f23f1516
SH
1846 }
1847
3f0f8670 1848 /* Use local offset as range ID */
316511c0 1849 pin_range->range.id = gpio_offset;
a0b66a73
LW
1850 pin_range->range.gc = gc;
1851 pin_range->range.name = gc->label;
fdeb8e15 1852 pin_range->range.base = gdev->base + gpio_offset;
316511c0 1853 pin_range->range.pin_base = pin_offset;
f23f1516 1854 pin_range->range.npins = npins;
192c369c 1855 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
f23f1516 1856 &pin_range->range);
8f23ca1a 1857 if (IS_ERR(pin_range->pctldev)) {
b4d4b1f0 1858 ret = PTR_ERR(pin_range->pctldev);
a0b66a73 1859 chip_err(gc, "could not create pin range\n");
3f0f8670 1860 kfree(pin_range);
b4d4b1f0 1861 return ret;
3f0f8670 1862 }
a0b66a73 1863 chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
1a2a99c6 1864 gpio_offset, gpio_offset + npins - 1,
316511c0
LW
1865 pinctl_name,
1866 pin_offset, pin_offset + npins - 1);
f23f1516 1867
20ec3e39 1868 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1e63d7b9
LW
1869
1870 return 0;
f23f1516 1871}
165adc9c 1872EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
f23f1516 1873
3f0f8670
LW
1874/**
1875 * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
a0b66a73 1876 * @gc: the chip to remove all the mappings for
3f0f8670 1877 */
a0b66a73 1878void gpiochip_remove_pin_ranges(struct gpio_chip *gc)
f23f1516
SH
1879{
1880 struct gpio_pin_range *pin_range, *tmp;
a0b66a73 1881 struct gpio_device *gdev = gc->gpiodev;
f23f1516 1882
20ec3e39 1883 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
f23f1516
SH
1884 list_del(&pin_range->node);
1885 pinctrl_remove_gpio_range(pin_range->pctldev,
1886 &pin_range->range);
3f0f8670 1887 kfree(pin_range);
f23f1516
SH
1888 }
1889}
165adc9c
LW
1890EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
1891
1892#endif /* CONFIG_PINCTRL */
f23f1516 1893
d2876d08
DB
1894/* These "optional" allocation calls help prevent drivers from stomping
1895 * on each other, and help provide better diagnostics in debugfs.
1896 * They're called even less than the "set direction" calls.
1897 */
fac9d885 1898static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
d2876d08 1899{
a0b66a73 1900 struct gpio_chip *gc = desc->gdev->chip;
d377f56f 1901 int ret;
d2876d08 1902 unsigned long flags;
3789f5ac 1903 unsigned offset;
d2876d08 1904
18534df4
MS
1905 if (label) {
1906 label = kstrdup_const(label, GFP_KERNEL);
1907 if (!label)
1908 return -ENOMEM;
1909 }
1910
bcabdef1
AC
1911 spin_lock_irqsave(&gpio_lock, flags);
1912
d2876d08 1913 /* NOTE: gpio_request() can be called in early boot,
35e8bb51 1914 * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
d2876d08
DB
1915 */
1916
1917 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
1918 desc_set_label(desc, label ? : "?");
438d8908 1919 } else {
d377f56f 1920 ret = -EBUSY;
95d9f84f 1921 goto out_free_unlock;
35e8bb51
DB
1922 }
1923
a0b66a73
LW
1924 if (gc->request) {
1925 /* gc->request may sleep */
35e8bb51 1926 spin_unlock_irqrestore(&gpio_lock, flags);
3789f5ac 1927 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
1928 if (gpiochip_line_is_valid(gc, offset))
1929 ret = gc->request(gc, offset);
3789f5ac 1930 else
d377f56f 1931 ret = -EINVAL;
35e8bb51
DB
1932 spin_lock_irqsave(&gpio_lock, flags);
1933
8bbff39c 1934 if (ret) {
35e8bb51 1935 desc_set_label(desc, NULL);
35e8bb51 1936 clear_bit(FLAG_REQUESTED, &desc->flags);
95d9f84f 1937 goto out_free_unlock;
35e8bb51 1938 }
438d8908 1939 }
a0b66a73
LW
1940 if (gc->get_direction) {
1941 /* gc->get_direction may sleep */
80b0a602 1942 spin_unlock_irqrestore(&gpio_lock, flags);
372e722e 1943 gpiod_get_direction(desc);
80b0a602
MN
1944 spin_lock_irqsave(&gpio_lock, flags);
1945 }
77c2d792 1946 spin_unlock_irqrestore(&gpio_lock, flags);
95d9f84f
AS
1947 return 0;
1948
1949out_free_unlock:
1950 spin_unlock_irqrestore(&gpio_lock, flags);
1951 kfree_const(label);
d377f56f 1952 return ret;
77c2d792
MW
1953}
1954
fdeb8e15
LW
1955/*
1956 * This descriptor validation needs to be inserted verbatim into each
1957 * function taking a descriptor, so we need to use a preprocessor
54d77198
LW
1958 * macro to avoid endless duplication. If the desc is NULL it is an
1959 * optional GPIO and calls should just bail out.
fdeb8e15 1960 */
a746a232
RV
1961static int validate_desc(const struct gpio_desc *desc, const char *func)
1962{
1963 if (!desc)
1964 return 0;
1965 if (IS_ERR(desc)) {
1966 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
1967 return PTR_ERR(desc);
1968 }
1969 if (!desc->gdev) {
1970 pr_warn("%s: invalid GPIO (no device)\n", func);
1971 return -EINVAL;
1972 }
1973 if (!desc->gdev->chip) {
1974 dev_warn(&desc->gdev->dev,
1975 "%s: backing chip is gone\n", func);
1976 return 0;
1977 }
1978 return 1;
1979}
1980
fdeb8e15 1981#define VALIDATE_DESC(desc) do { \
a746a232
RV
1982 int __valid = validate_desc(desc, __func__); \
1983 if (__valid <= 0) \
1984 return __valid; \
1985 } while (0)
fdeb8e15
LW
1986
1987#define VALIDATE_DESC_VOID(desc) do { \
a746a232
RV
1988 int __valid = validate_desc(desc, __func__); \
1989 if (__valid <= 0) \
fdeb8e15 1990 return; \
a746a232 1991 } while (0)
fdeb8e15 1992
0eb4c6c2 1993int gpiod_request(struct gpio_desc *desc, const char *label)
77c2d792 1994{
d377f56f 1995 int ret = -EPROBE_DEFER;
fdeb8e15 1996 struct gpio_device *gdev;
77c2d792 1997
fdeb8e15
LW
1998 VALIDATE_DESC(desc);
1999 gdev = desc->gdev;
77c2d792 2000
fdeb8e15 2001 if (try_module_get(gdev->owner)) {
d377f56f 2002 ret = gpiod_request_commit(desc, label);
8bbff39c 2003 if (ret)
fdeb8e15 2004 module_put(gdev->owner);
33a68e86
LW
2005 else
2006 get_device(&gdev->dev);
77c2d792
MW
2007 }
2008
d377f56f
LW
2009 if (ret)
2010 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
77c2d792 2011
d377f56f 2012 return ret;
d2876d08 2013}
372e722e 2014
fac9d885 2015static bool gpiod_free_commit(struct gpio_desc *desc)
d2876d08 2016{
77c2d792 2017 bool ret = false;
d2876d08 2018 unsigned long flags;
a0b66a73 2019 struct gpio_chip *gc;
d2876d08 2020
3d599d1c
UKK
2021 might_sleep();
2022
372e722e 2023 gpiod_unexport(desc);
d8f388d8 2024
d2876d08
DB
2025 spin_lock_irqsave(&gpio_lock, flags);
2026
a0b66a73
LW
2027 gc = desc->gdev->chip;
2028 if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) {
2029 if (gc->free) {
35e8bb51 2030 spin_unlock_irqrestore(&gpio_lock, flags);
a0b66a73
LW
2031 might_sleep_if(gc->can_sleep);
2032 gc->free(gc, gpio_chip_hwgpio(desc));
35e8bb51
DB
2033 spin_lock_irqsave(&gpio_lock, flags);
2034 }
18534df4 2035 kfree_const(desc->label);
d2876d08 2036 desc_set_label(desc, NULL);
07697461 2037 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
35e8bb51 2038 clear_bit(FLAG_REQUESTED, &desc->flags);
aca5ce14 2039 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
25553ff0 2040 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
9225d516
DF
2041 clear_bit(FLAG_PULL_UP, &desc->flags);
2042 clear_bit(FLAG_PULL_DOWN, &desc->flags);
2148ad77 2043 clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
73e03419
KG
2044 clear_bit(FLAG_EDGE_RISING, &desc->flags);
2045 clear_bit(FLAG_EDGE_FALLING, &desc->flags);
f625d460 2046 clear_bit(FLAG_IS_HOGGED, &desc->flags);
63636d95
GU
2047#ifdef CONFIG_OF_DYNAMIC
2048 desc->hog = NULL;
65cff704
KG
2049#endif
2050#ifdef CONFIG_GPIO_CDEV
2051 WRITE_ONCE(desc->debounce_period_us, 0);
63636d95 2052#endif
77c2d792
MW
2053 ret = true;
2054 }
d2876d08
DB
2055
2056 spin_unlock_irqrestore(&gpio_lock, flags);
6accc376
KG
2057 blocking_notifier_call_chain(&desc->gdev->notifier,
2058 GPIOLINE_CHANGED_RELEASED, desc);
51c1064e 2059
77c2d792
MW
2060 return ret;
2061}
2062
0eb4c6c2 2063void gpiod_free(struct gpio_desc *desc)
77c2d792 2064{
fac9d885 2065 if (desc && desc->gdev && gpiod_free_commit(desc)) {
fdeb8e15 2066 module_put(desc->gdev->owner);
33a68e86
LW
2067 put_device(&desc->gdev->dev);
2068 } else {
77c2d792 2069 WARN_ON(extra_checks);
33a68e86 2070 }
d2876d08 2071}
372e722e 2072
d2876d08
DB
2073/**
2074 * gpiochip_is_requested - return string iff signal was requested
a0b66a73 2075 * @gc: controller managing the signal
d2876d08
DB
2076 * @offset: of signal within controller's 0..(ngpio - 1) range
2077 *
2078 * Returns NULL if the GPIO is not currently requested, else a string.
9c8318ff
AC
2079 * The string returned is the label passed to gpio_request(); if none has been
2080 * passed it is a meaningless, non-NULL constant.
d2876d08
DB
2081 *
2082 * This function is for use by GPIO controller drivers. The label can
2083 * help with diagnostics, and knowing that the signal is used as a GPIO
2084 * can help avoid accidentally multiplexing it to another controller.
2085 */
13daf489 2086const char *gpiochip_is_requested(struct gpio_chip *gc, unsigned int offset)
d2876d08 2087{
6c0b4e6c 2088 struct gpio_desc *desc;
6c0b4e6c 2089
a0b66a73 2090 desc = gpiochip_get_desc(gc, offset);
1739a2d8
BG
2091 if (IS_ERR(desc))
2092 return NULL;
6c0b4e6c 2093
372e722e 2094 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
d2876d08 2095 return NULL;
372e722e 2096 return desc->label;
d2876d08
DB
2097}
2098EXPORT_SYMBOL_GPL(gpiochip_is_requested);
2099
77c2d792
MW
2100/**
2101 * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
a0b66a73 2102 * @gc: GPIO chip
950d55f5 2103 * @hwnum: hardware number of the GPIO for which to request the descriptor
77c2d792 2104 * @label: label for the GPIO
5923ea6c
LW
2105 * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
2106 * specify things like line inversion semantics with the machine flags
2107 * such as GPIO_OUT_LOW
2108 * @dflags: descriptor request flags for this GPIO or 0 if default, this
2109 * can be used to specify consumer semantics such as open drain
77c2d792
MW
2110 *
2111 * Function allows GPIO chip drivers to request and use their own GPIO
2112 * descriptors via gpiolib API. Difference to gpiod_request() is that this
2113 * function will not increase reference count of the GPIO chip module. This
2114 * allows the GPIO chip module to be unloaded as needed (we assume that the
2115 * GPIO chip driver handles freeing the GPIOs it has requested).
950d55f5
TR
2116 *
2117 * Returns:
2118 * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
2119 * code on failure.
77c2d792 2120 */
a0b66a73 2121struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc,
06863620 2122 unsigned int hwnum,
21abf103 2123 const char *label,
5923ea6c
LW
2124 enum gpio_lookup_flags lflags,
2125 enum gpiod_flags dflags)
77c2d792 2126{
a0b66a73 2127 struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum);
d377f56f 2128 int ret;
77c2d792 2129
abdc08a3 2130 if (IS_ERR(desc)) {
a0b66a73 2131 chip_err(gc, "failed to get GPIO descriptor\n");
abdc08a3
AC
2132 return desc;
2133 }
2134
d377f56f
LW
2135 ret = gpiod_request_commit(desc, label);
2136 if (ret < 0)
2137 return ERR_PTR(ret);
77c2d792 2138
d377f56f
LW
2139 ret = gpiod_configure_flags(desc, label, lflags, dflags);
2140 if (ret) {
a0b66a73 2141 chip_err(gc, "setup of own GPIO %s failed\n", label);
21abf103 2142 gpiod_free_commit(desc);
d377f56f 2143 return ERR_PTR(ret);
21abf103
LW
2144 }
2145
abdc08a3 2146 return desc;
77c2d792 2147}
f7d4ad98 2148EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
77c2d792
MW
2149
2150/**
2151 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
2152 * @desc: GPIO descriptor to free
2153 *
2154 * Function frees the given GPIO requested previously with
2155 * gpiochip_request_own_desc().
2156 */
2157void gpiochip_free_own_desc(struct gpio_desc *desc)
2158{
2159 if (desc)
fac9d885 2160 gpiod_free_commit(desc);
77c2d792 2161}
f7d4ad98 2162EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
d2876d08 2163
fdeb8e15
LW
2164/*
2165 * Drivers MUST set GPIO direction before making get/set calls. In
d2876d08
DB
2166 * some cases this is done in early boot, before IRQs are enabled.
2167 *
2168 * As a rule these aren't called more than once (except for drivers
2169 * using the open-drain emulation idiom) so these are natural places
2170 * to accumulate extra debugging checks. Note that we can't (yet)
2171 * rely on gpio_request() having been called beforehand.
2172 */
2173
d99f8876 2174static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset,
62adc6f3 2175 unsigned long config)
71479789 2176{
d90f3685
BG
2177 if (!gc->set_config)
2178 return -ENOTSUPP;
542f3615 2179
62adc6f3 2180 return gc->set_config(gc, offset, config);
71479789
TP
2181}
2182
0c4d8666
AS
2183static int gpio_set_config_with_argument(struct gpio_desc *desc,
2184 enum pin_config_param mode,
2185 u32 argument)
d99f8876 2186{
a0b66a73 2187 struct gpio_chip *gc = desc->gdev->chip;
91b4ea5f 2188 unsigned long config;
0c4d8666
AS
2189
2190 config = pinconf_to_config_packed(mode, argument);
2191 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
2192}
2193
baca3b15
AS
2194static int gpio_set_config_with_argument_optional(struct gpio_desc *desc,
2195 enum pin_config_param mode,
2196 u32 argument)
2197{
2198 struct device *dev = &desc->gdev->dev;
2199 int gpio = gpio_chip_hwgpio(desc);
2200 int ret;
2201
2202 ret = gpio_set_config_with_argument(desc, mode, argument);
2203 if (ret != -ENOTSUPP)
2204 return ret;
d99f8876
BG
2205
2206 switch (mode) {
baca3b15
AS
2207 case PIN_CONFIG_PERSIST_STATE:
2208 dev_dbg(dev, "Persistence not supported for GPIO %d\n", gpio);
d99f8876 2209 break;
d99f8876 2210 default:
baca3b15 2211 break;
d99f8876
BG
2212 }
2213
baca3b15
AS
2214 return 0;
2215}
2216
0c4d8666
AS
2217static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode)
2218{
6aa32ad7 2219 return gpio_set_config_with_argument(desc, mode, 0);
d99f8876
BG
2220}
2221
5f4bf171 2222static int gpio_set_bias(struct gpio_desc *desc)
2148ad77 2223{
9ef6293c 2224 enum pin_config_param bias;
6aa32ad7 2225 unsigned int arg;
2148ad77
KG
2226
2227 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
2228 bias = PIN_CONFIG_BIAS_DISABLE;
2229 else if (test_bit(FLAG_PULL_UP, &desc->flags))
2230 bias = PIN_CONFIG_BIAS_PULL_UP;
2231 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
2232 bias = PIN_CONFIG_BIAS_PULL_DOWN;
9ef6293c
AS
2233 else
2234 return 0;
2148ad77 2235
6aa32ad7
AS
2236 switch (bias) {
2237 case PIN_CONFIG_BIAS_PULL_DOWN:
2238 case PIN_CONFIG_BIAS_PULL_UP:
2239 arg = 1;
2240 break;
2241
2242 default:
2243 arg = 0;
2244 break;
2148ad77 2245 }
6aa32ad7 2246
baca3b15 2247 return gpio_set_config_with_argument_optional(desc, bias, arg);
2148ad77
KG
2248}
2249
660c619b
AS
2250/**
2251 * gpio_set_debounce_timeout() - Set debounce timeout
2252 * @desc: GPIO descriptor to set the debounce timeout
2253 * @debounce: Debounce timeout in microseconds
2254 *
2255 * The function calls the certain GPIO driver to set debounce timeout
2256 * in the hardware.
2257 *
2258 * Returns 0 on success, or negative error code otherwise.
2259 */
f725edd8
AS
2260int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce)
2261{
2262 return gpio_set_config_with_argument_optional(desc,
2263 PIN_CONFIG_INPUT_DEBOUNCE,
2264 debounce);
2148ad77
KG
2265}
2266
79a9becd
AC
2267/**
2268 * gpiod_direction_input - set the GPIO direction to input
2269 * @desc: GPIO to set to input
2270 *
2271 * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
2272 * be called safely on it.
2273 *
2274 * Return 0 in case of success, else an error code.
2275 */
2276int gpiod_direction_input(struct gpio_desc *desc)
d2876d08 2277{
a0b66a73 2278 struct gpio_chip *gc;
d377f56f 2279 int ret = 0;
d2876d08 2280
fdeb8e15 2281 VALIDATE_DESC(desc);
a0b66a73 2282 gc = desc->gdev->chip;
bcabdef1 2283
e48d194d
LW
2284 /*
2285 * It is legal to have no .get() and .direction_input() specified if
2286 * the chip is output-only, but you can't specify .direction_input()
2287 * and not support the .get() operation, that doesn't make sense.
2288 */
a0b66a73 2289 if (!gc->get && gc->direction_input) {
6424de5a 2290 gpiod_warn(desc,
e48d194d
LW
2291 "%s: missing get() but have direction_input()\n",
2292 __func__);
be1a4b13
LW
2293 return -EIO;
2294 }
2295
e48d194d
LW
2296 /*
2297 * If we have a .direction_input() callback, things are simple,
2298 * just call it. Else we are some input-only chip so try to check the
2299 * direction (if .get_direction() is supported) else we silently
2300 * assume we are in input mode after this.
2301 */
a0b66a73
LW
2302 if (gc->direction_input) {
2303 ret = gc->direction_input(gc, gpio_chip_hwgpio(desc));
2304 } else if (gc->get_direction &&
2305 (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) {
ae9847f4 2306 gpiod_warn(desc,
e48d194d
LW
2307 "%s: missing direction_input() operation and line is output\n",
2308 __func__);
ae9847f4
RRD
2309 return -EIO;
2310 }
2148ad77 2311 if (ret == 0) {
d2876d08 2312 clear_bit(FLAG_IS_OUT, &desc->flags);
5f4bf171 2313 ret = gpio_set_bias(desc);
2148ad77 2314 }
d449991c 2315
d377f56f 2316 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
d82da797 2317
d377f56f 2318 return ret;
d2876d08 2319}
79a9becd 2320EXPORT_SYMBOL_GPL(gpiod_direction_input);
372e722e 2321
fac9d885 2322static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
d2876d08 2323{
c663e5f5 2324 struct gpio_chip *gc = desc->gdev->chip;
ad17731d 2325 int val = !!value;
ae9847f4 2326 int ret = 0;
d2876d08 2327
e48d194d
LW
2328 /*
2329 * It's OK not to specify .direction_output() if the gpiochip is
2330 * output-only, but if there is then not even a .set() operation it
2331 * is pretty tricky to drive the output line.
2332 */
ae9847f4 2333 if (!gc->set && !gc->direction_output) {
6424de5a 2334 gpiod_warn(desc,
e48d194d
LW
2335 "%s: missing set() and direction_output() operations\n",
2336 __func__);
be1a4b13
LW
2337 return -EIO;
2338 }
2339
ae9847f4
RRD
2340 if (gc->direction_output) {
2341 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
2342 } else {
e48d194d 2343 /* Check that we are in output mode if we can */
ae9847f4
RRD
2344 if (gc->get_direction &&
2345 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
2346 gpiod_warn(desc,
2347 "%s: missing direction_output() operation\n",
2348 __func__);
2349 return -EIO;
2350 }
e48d194d
LW
2351 /*
2352 * If we can't actively set the direction, we are some
2353 * output-only chip, so just drive the output as desired.
2354 */
ae9847f4
RRD
2355 gc->set(gc, gpio_chip_hwgpio(desc), val);
2356 }
2357
c663e5f5 2358 if (!ret)
d2876d08 2359 set_bit(FLAG_IS_OUT, &desc->flags);
ad17731d 2360 trace_gpio_value(desc_to_gpio(desc), 0, val);
c663e5f5
LW
2361 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
2362 return ret;
d2876d08 2363}
ef70bbe1
PZ
2364
2365/**
2366 * gpiod_direction_output_raw - set the GPIO direction to output
2367 * @desc: GPIO to set to output
2368 * @value: initial output value of the GPIO
2369 *
2370 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2371 * be called safely on it. The initial value of the output must be specified
2372 * as raw value on the physical line without regard for the ACTIVE_LOW status.
2373 *
2374 * Return 0 in case of success, else an error code.
2375 */
2376int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
2377{
fdeb8e15 2378 VALIDATE_DESC(desc);
fac9d885 2379 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1
PZ
2380}
2381EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
2382
2383/**
90df4fe0 2384 * gpiod_direction_output - set the GPIO direction to output
ef70bbe1
PZ
2385 * @desc: GPIO to set to output
2386 * @value: initial output value of the GPIO
2387 *
2388 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2389 * be called safely on it. The initial value of the output must be specified
2390 * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
2391 * account.
2392 *
2393 * Return 0 in case of success, else an error code.
2394 */
2395int gpiod_direction_output(struct gpio_desc *desc, int value)
2396{
02e47980
LW
2397 int ret;
2398
fdeb8e15 2399 VALIDATE_DESC(desc);
ef70bbe1
PZ
2400 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2401 value = !value;
ad17731d
LW
2402 else
2403 value = !!value;
02e47980 2404
4e9439dd
HV
2405 /* GPIOs used for enabled IRQs shall not be set as output */
2406 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
2407 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
02e47980
LW
2408 gpiod_err(desc,
2409 "%s: tried to set a GPIO tied to an IRQ as output\n",
2410 __func__);
2411 return -EIO;
2412 }
2413
2414 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
2415 /* First see if we can enable open drain in hardware */
83522358 2416 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN);
02e47980
LW
2417 if (!ret)
2418 goto set_output_value;
2419 /* Emulate open drain by not actively driving the line high */
e735244e
BG
2420 if (value) {
2421 ret = gpiod_direction_input(desc);
2422 goto set_output_flag;
2423 }
1cef8b50 2424 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
83522358 2425 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE);
02e47980
LW
2426 if (!ret)
2427 goto set_output_value;
2428 /* Emulate open source by not actively driving the line low */
e735244e
BG
2429 if (!value) {
2430 ret = gpiod_direction_input(desc);
2431 goto set_output_flag;
2432 }
02e47980 2433 } else {
83522358 2434 gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL);
02e47980
LW
2435 }
2436
2437set_output_value:
5f4bf171 2438 ret = gpio_set_bias(desc);
2821ae5f
KG
2439 if (ret)
2440 return ret;
fac9d885 2441 return gpiod_direction_output_raw_commit(desc, value);
e735244e
BG
2442
2443set_output_flag:
2444 /*
2445 * When emulating open-source or open-drain functionalities by not
2446 * actively driving the line (setting mode to input) we still need to
2447 * set the IS_OUT flag or otherwise we won't be able to set the line
2448 * value anymore.
2449 */
2450 if (ret == 0)
2451 set_bit(FLAG_IS_OUT, &desc->flags);
2452 return ret;
ef70bbe1 2453}
79a9becd 2454EXPORT_SYMBOL_GPL(gpiod_direction_output);
d2876d08 2455
42112dd7
DP
2456/**
2457 * gpiod_enable_hw_timestamp_ns - Enable hardware timestamp in nanoseconds.
2458 *
2459 * @desc: GPIO to enable.
2460 * @flags: Flags related to GPIO edge.
2461 *
2462 * Return 0 in case of success, else negative error code.
2463 */
2464int gpiod_enable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags)
2465{
2466 int ret = 0;
2467 struct gpio_chip *gc;
2468
2469 VALIDATE_DESC(desc);
2470
2471 gc = desc->gdev->chip;
2472 if (!gc->en_hw_timestamp) {
2473 gpiod_warn(desc, "%s: hw ts not supported\n", __func__);
2474 return -ENOTSUPP;
2475 }
2476
2477 ret = gc->en_hw_timestamp(gc, gpio_chip_hwgpio(desc), flags);
2478 if (ret)
2479 gpiod_warn(desc, "%s: hw ts request failed\n", __func__);
2480
2481 return ret;
2482}
2483EXPORT_SYMBOL_GPL(gpiod_enable_hw_timestamp_ns);
2484
2485/**
2486 * gpiod_disable_hw_timestamp_ns - Disable hardware timestamp.
2487 *
2488 * @desc: GPIO to disable.
2489 * @flags: Flags related to GPIO edge, same value as used during enable call.
2490 *
2491 * Return 0 in case of success, else negative error code.
2492 */
2493int gpiod_disable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags)
2494{
2495 int ret = 0;
2496 struct gpio_chip *gc;
2497
2498 VALIDATE_DESC(desc);
2499
2500 gc = desc->gdev->chip;
2501 if (!gc->dis_hw_timestamp) {
2502 gpiod_warn(desc, "%s: hw ts not supported\n", __func__);
2503 return -ENOTSUPP;
2504 }
2505
2506 ret = gc->dis_hw_timestamp(gc, gpio_chip_hwgpio(desc), flags);
2507 if (ret)
2508 gpiod_warn(desc, "%s: hw ts release failed\n", __func__);
2509
2510 return ret;
2511}
2512EXPORT_SYMBOL_GPL(gpiod_disable_hw_timestamp_ns);
2513
8ced32ff
GU
2514/**
2515 * gpiod_set_config - sets @config for a GPIO
2516 * @desc: descriptor of the GPIO for which to set the configuration
2517 * @config: Same packed config format as generic pinconf
2518 *
2519 * Returns:
2520 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2521 * configuration.
2522 */
2523int gpiod_set_config(struct gpio_desc *desc, unsigned long config)
2524{
a0b66a73 2525 struct gpio_chip *gc;
8ced32ff
GU
2526
2527 VALIDATE_DESC(desc);
a0b66a73 2528 gc = desc->gdev->chip;
8ced32ff 2529
a0b66a73 2530 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
8ced32ff
GU
2531}
2532EXPORT_SYMBOL_GPL(gpiod_set_config);
2533
c4b5be98 2534/**
950d55f5
TR
2535 * gpiod_set_debounce - sets @debounce time for a GPIO
2536 * @desc: descriptor of the GPIO for which to set debounce time
2537 * @debounce: debounce time in microseconds
65d87656 2538 *
950d55f5
TR
2539 * Returns:
2540 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2541 * debounce time.
c4b5be98 2542 */
13daf489 2543int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce)
c4b5be98 2544{
8ced32ff 2545 unsigned long config;
be1a4b13 2546
2956b5d9 2547 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
8ced32ff 2548 return gpiod_set_config(desc, config);
c4b5be98 2549}
79a9becd 2550EXPORT_SYMBOL_GPL(gpiod_set_debounce);
372e722e 2551
e10f72bf
AJ
2552/**
2553 * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
2554 * @desc: descriptor of the GPIO for which to configure persistence
2555 * @transitory: True to lose state on suspend or reset, false for persistence
2556 *
2557 * Returns:
2558 * 0 on success, otherwise a negative error code.
2559 */
2560int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
2561{
156dd392 2562 VALIDATE_DESC(desc);
e10f72bf
AJ
2563 /*
2564 * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
2565 * persistence state.
2566 */
4fc5bfeb 2567 assign_bit(FLAG_TRANSITORY, &desc->flags, transitory);
e10f72bf
AJ
2568
2569 /* If the driver supports it, set the persistence state now */
baca3b15
AS
2570 return gpio_set_config_with_argument_optional(desc,
2571 PIN_CONFIG_PERSIST_STATE,
2572 !transitory);
e10f72bf
AJ
2573}
2574EXPORT_SYMBOL_GPL(gpiod_set_transitory);
2575
79a9becd
AC
2576/**
2577 * gpiod_is_active_low - test whether a GPIO is active-low or not
2578 * @desc: the gpio descriptor to test
2579 *
2580 * Returns 1 if the GPIO is active-low, 0 otherwise.
2581 */
2582int gpiod_is_active_low(const struct gpio_desc *desc)
372e722e 2583{
fdeb8e15 2584 VALIDATE_DESC(desc);
79a9becd 2585 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
372e722e 2586}
79a9becd 2587EXPORT_SYMBOL_GPL(gpiod_is_active_low);
d2876d08 2588
d3a5bcb4
MM
2589/**
2590 * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not
2591 * @desc: the gpio descriptor to change
2592 */
2593void gpiod_toggle_active_low(struct gpio_desc *desc)
2594{
2595 VALIDATE_DESC_VOID(desc);
2596 change_bit(FLAG_ACTIVE_LOW, &desc->flags);
2597}
2598EXPORT_SYMBOL_GPL(gpiod_toggle_active_low);
2599
234c5209
AS
2600static int gpio_chip_get_value(struct gpio_chip *gc, const struct gpio_desc *desc)
2601{
2602 return gc->get ? gc->get(gc, gpio_chip_hwgpio(desc)) : -EIO;
2603}
2604
d2876d08
DB
2605/* I/O calls are only valid after configuration completed; the relevant
2606 * "is this a valid GPIO" error checks should already have been done.
2607 *
2608 * "Get" operations are often inlinable as reading a pin value register,
2609 * and masking the relevant bit in that register.
2610 *
2611 * When "set" operations are inlinable, they involve writing that mask to
2612 * one register to set a low value, or a different register to set it high.
2613 * Otherwise locking is needed, so there may be little value to inlining.
2614 *
2615 *------------------------------------------------------------------------
2616 *
2617 * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
2618 * have requested the GPIO. That can include implicit requesting by
2619 * a direction setting call. Marking a gpio as requested locks its chip
2620 * in memory, guaranteeing that these table lookups need no more locking
2621 * and that gpiochip_remove() will fail.
2622 *
2623 * REVISIT when debugging, consider adding some instrumentation to ensure
2624 * that the GPIO was actually requested.
2625 */
2626
fac9d885 2627static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
d2876d08 2628{
a0b66a73 2629 struct gpio_chip *gc;
e20538b8 2630 int value;
d2876d08 2631
a0b66a73 2632 gc = desc->gdev->chip;
234c5209 2633 value = gpio_chip_get_value(gc, desc);
723a6303 2634 value = value < 0 ? value : !!value;
372e722e 2635 trace_gpio_value(desc_to_gpio(desc), 1, value);
3f397c21 2636 return value;
d2876d08 2637}
372e722e 2638
a0b66a73 2639static int gpio_chip_get_multiple(struct gpio_chip *gc,
eec1d566
LW
2640 unsigned long *mask, unsigned long *bits)
2641{
1cef8b50 2642 if (gc->get_multiple)
a0b66a73 2643 return gc->get_multiple(gc, mask, bits);
1cef8b50 2644 if (gc->get) {
eec1d566
LW
2645 int i, value;
2646
a0b66a73
LW
2647 for_each_set_bit(i, mask, gc->ngpio) {
2648 value = gc->get(gc, i);
eec1d566
LW
2649 if (value < 0)
2650 return value;
2651 __assign_bit(i, bits, value);
2652 }
2653 return 0;
2654 }
2655 return -EIO;
2656}
2657
2658int gpiod_get_array_value_complex(bool raw, bool can_sleep,
2659 unsigned int array_size,
2660 struct gpio_desc **desc_array,
77588c14 2661 struct gpio_array *array_info,
b9762beb 2662 unsigned long *value_bitmap)
eec1d566 2663{
d377f56f 2664 int ret, i = 0;
b17566a6
JK
2665
2666 /*
2667 * Validate array_info against desc_array and its size.
2668 * It should immediately follow desc_array if both
2669 * have been obtained from the same gpiod_get_array() call.
2670 */
2671 if (array_info && array_info->desc == desc_array &&
2672 array_size <= array_info->size &&
2673 (void *)array_info == desc_array + array_info->size) {
2674 if (!can_sleep)
2675 WARN_ON(array_info->chip->can_sleep);
2676
d377f56f 2677 ret = gpio_chip_get_multiple(array_info->chip,
b17566a6
JK
2678 array_info->get_mask,
2679 value_bitmap);
d377f56f
LW
2680 if (ret)
2681 return ret;
b17566a6
JK
2682
2683 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2684 bitmap_xor(value_bitmap, value_bitmap,
2685 array_info->invert_mask, array_size);
2686
b17566a6 2687 i = find_first_zero_bit(array_info->get_mask, array_size);
ae66eca0
AS
2688 if (i == array_size)
2689 return 0;
b17566a6
JK
2690 } else {
2691 array_info = NULL;
2692 }
eec1d566
LW
2693
2694 while (i < array_size) {
a0b66a73 2695 struct gpio_chip *gc = desc_array[i]->gdev->chip;
c80c4435
AS
2696 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
2697 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
3027743f 2698 unsigned long *mask, *bits;
c07ea8d0 2699 int first, j;
eec1d566 2700
a0b66a73 2701 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
c80c4435
AS
2702 mask = fastpath_mask;
2703 bits = fastpath_bits;
3027743f 2704 } else {
c354c295
AS
2705 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
2706
2707 mask = bitmap_alloc(gc->ngpio, flags);
3027743f
LA
2708 if (!mask)
2709 return -ENOMEM;
c80c4435 2710
c354c295
AS
2711 bits = bitmap_alloc(gc->ngpio, flags);
2712 if (!bits) {
2713 bitmap_free(mask);
2714 return -ENOMEM;
2715 }
3027743f
LA
2716 }
2717
a0b66a73 2718 bitmap_zero(mask, gc->ngpio);
3027743f 2719
eec1d566 2720 if (!can_sleep)
a0b66a73 2721 WARN_ON(gc->can_sleep);
eec1d566
LW
2722
2723 /* collect all inputs belonging to the same chip */
2724 first = i;
eec1d566
LW
2725 do {
2726 const struct gpio_desc *desc = desc_array[i];
2727 int hwgpio = gpio_chip_hwgpio(desc);
2728
2729 __set_bit(hwgpio, mask);
2730 i++;
b17566a6
JK
2731
2732 if (array_info)
35ae7f96
JK
2733 i = find_next_zero_bit(array_info->get_mask,
2734 array_size, i);
eec1d566 2735 } while ((i < array_size) &&
a0b66a73 2736 (desc_array[i]->gdev->chip == gc));
eec1d566 2737
a0b66a73 2738 ret = gpio_chip_get_multiple(gc, mask, bits);
3027743f 2739 if (ret) {
c80c4435 2740 if (mask != fastpath_mask)
c354c295
AS
2741 bitmap_free(mask);
2742 if (bits != fastpath_bits)
2743 bitmap_free(bits);
eec1d566 2744 return ret;
3027743f 2745 }
eec1d566 2746
b17566a6 2747 for (j = first; j < i; ) {
eec1d566
LW
2748 const struct gpio_desc *desc = desc_array[j];
2749 int hwgpio = gpio_chip_hwgpio(desc);
2750 int value = test_bit(hwgpio, bits);
2751
2752 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2753 value = !value;
b9762beb 2754 __assign_bit(j, value_bitmap, value);
eec1d566 2755 trace_gpio_value(desc_to_gpio(desc), 1, value);
799d5eb4 2756 j++;
b17566a6
JK
2757
2758 if (array_info)
35ae7f96
JK
2759 j = find_next_zero_bit(array_info->get_mask, i,
2760 j);
eec1d566 2761 }
3027743f 2762
c80c4435 2763 if (mask != fastpath_mask)
c354c295
AS
2764 bitmap_free(mask);
2765 if (bits != fastpath_bits)
2766 bitmap_free(bits);
eec1d566
LW
2767 }
2768 return 0;
2769}
2770
d2876d08 2771/**
79a9becd
AC
2772 * gpiod_get_raw_value() - return a gpio's raw value
2773 * @desc: gpio whose value will be returned
d2876d08 2774 *
79a9becd 2775 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 2776 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd 2777 *
827a9b8b 2778 * This function can be called from contexts where we cannot sleep, and will
79a9becd 2779 * complain if the GPIO chip functions potentially sleep.
d2876d08 2780 */
79a9becd 2781int gpiod_get_raw_value(const struct gpio_desc *desc)
d2876d08 2782{
fdeb8e15 2783 VALIDATE_DESC(desc);
3285170f 2784 /* Should be using gpiod_get_raw_value_cansleep() */
fdeb8e15 2785 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 2786 return gpiod_get_raw_value_commit(desc);
d2876d08 2787}
79a9becd 2788EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
372e722e 2789
79a9becd
AC
2790/**
2791 * gpiod_get_value() - return a gpio's value
2792 * @desc: gpio whose value will be returned
2793 *
2794 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 2795 * account, or negative errno on failure.
79a9becd 2796 *
827a9b8b 2797 * This function can be called from contexts where we cannot sleep, and will
79a9becd
AC
2798 * complain if the GPIO chip functions potentially sleep.
2799 */
2800int gpiod_get_value(const struct gpio_desc *desc)
372e722e 2801{
79a9becd 2802 int value;
fdeb8e15
LW
2803
2804 VALIDATE_DESC(desc);
3285170f 2805 /* Should be using gpiod_get_value_cansleep() */
fdeb8e15 2806 WARN_ON(desc->gdev->chip->can_sleep);
79a9becd 2807
fac9d885 2808 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
2809 if (value < 0)
2810 return value;
2811
79a9becd
AC
2812 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2813 value = !value;
2814
2815 return value;
372e722e 2816}
79a9becd 2817EXPORT_SYMBOL_GPL(gpiod_get_value);
d2876d08 2818
eec1d566
LW
2819/**
2820 * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
b9762beb 2821 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 2822 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 2823 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2824 * @value_bitmap: bitmap to store the read values
eec1d566
LW
2825 *
2826 * Read the raw values of the GPIOs, i.e. the values of the physical lines
2827 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
2828 * else an error code.
2829 *
827a9b8b 2830 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
2831 * and it will complain if the GPIO chip functions potentially sleep.
2832 */
2833int gpiod_get_raw_array_value(unsigned int array_size,
b9762beb 2834 struct gpio_desc **desc_array,
77588c14 2835 struct gpio_array *array_info,
b9762beb 2836 unsigned long *value_bitmap)
eec1d566
LW
2837{
2838 if (!desc_array)
2839 return -EINVAL;
2840 return gpiod_get_array_value_complex(true, false, array_size,
77588c14
JK
2841 desc_array, array_info,
2842 value_bitmap);
eec1d566
LW
2843}
2844EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
2845
2846/**
2847 * gpiod_get_array_value() - read values from an array of GPIOs
b9762beb 2848 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 2849 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 2850 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2851 * @value_bitmap: bitmap to store the read values
eec1d566
LW
2852 *
2853 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
2854 * into account. Return 0 in case of success, else an error code.
2855 *
827a9b8b 2856 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
2857 * and it will complain if the GPIO chip functions potentially sleep.
2858 */
2859int gpiod_get_array_value(unsigned int array_size,
b9762beb 2860 struct gpio_desc **desc_array,
77588c14 2861 struct gpio_array *array_info,
b9762beb 2862 unsigned long *value_bitmap)
eec1d566
LW
2863{
2864 if (!desc_array)
2865 return -EINVAL;
2866 return gpiod_get_array_value_complex(false, false, array_size,
77588c14
JK
2867 desc_array, array_info,
2868 value_bitmap);
eec1d566
LW
2869}
2870EXPORT_SYMBOL_GPL(gpiod_get_array_value);
2871
aca5ce14 2872/*
fac9d885 2873 * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
79a9becd 2874 * @desc: gpio descriptor whose state need to be set.
20a8a968 2875 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
aca5ce14 2876 */
fac9d885 2877static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
aca5ce14 2878{
d377f56f 2879 int ret = 0;
a0b66a73 2880 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
2881 int offset = gpio_chip_hwgpio(desc);
2882
aca5ce14 2883 if (value) {
a0b66a73 2884 ret = gc->direction_input(gc, offset);
aca5ce14 2885 } else {
a0b66a73 2886 ret = gc->direction_output(gc, offset, 0);
d377f56f 2887 if (!ret)
372e722e 2888 set_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 2889 }
d377f56f
LW
2890 trace_gpio_direction(desc_to_gpio(desc), value, ret);
2891 if (ret < 0)
6424de5a
MB
2892 gpiod_err(desc,
2893 "%s: Error in set_value for open drain err %d\n",
d377f56f 2894 __func__, ret);
aca5ce14
LD
2895}
2896
25553ff0 2897/*
79a9becd
AC
2898 * _gpio_set_open_source_value() - Set the open source gpio's value.
2899 * @desc: gpio descriptor whose state need to be set.
20a8a968 2900 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
25553ff0 2901 */
fac9d885 2902static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
25553ff0 2903{
d377f56f 2904 int ret = 0;
a0b66a73 2905 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
2906 int offset = gpio_chip_hwgpio(desc);
2907
25553ff0 2908 if (value) {
a0b66a73 2909 ret = gc->direction_output(gc, offset, 1);
d377f56f 2910 if (!ret)
372e722e 2911 set_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 2912 } else {
a0b66a73 2913 ret = gc->direction_input(gc, offset);
25553ff0 2914 }
d377f56f
LW
2915 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
2916 if (ret < 0)
6424de5a
MB
2917 gpiod_err(desc,
2918 "%s: Error in set_value for open source err %d\n",
d377f56f 2919 __func__, ret);
25553ff0
LD
2920}
2921
fac9d885 2922static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
d2876d08 2923{
a0b66a73 2924 struct gpio_chip *gc;
d2876d08 2925
a0b66a73 2926 gc = desc->gdev->chip;
372e722e 2927 trace_gpio_value(desc_to_gpio(desc), 0, value);
a0b66a73 2928 gc->set(gc, gpio_chip_hwgpio(desc), value);
372e722e
AC
2929}
2930
5f424243
RI
2931/*
2932 * set multiple outputs on the same chip;
2933 * use the chip's set_multiple function if available;
2934 * otherwise set the outputs sequentially;
a0b66a73 2935 * @chip: the GPIO chip we operate on
5f424243
RI
2936 * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
2937 * defines which outputs are to be changed
2938 * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
2939 * defines the values the outputs specified by mask are to be set to
2940 */
a0b66a73 2941static void gpio_chip_set_multiple(struct gpio_chip *gc,
5f424243
RI
2942 unsigned long *mask, unsigned long *bits)
2943{
a0b66a73
LW
2944 if (gc->set_multiple) {
2945 gc->set_multiple(gc, mask, bits);
5f424243 2946 } else {
5e4e6fb3
AS
2947 unsigned int i;
2948
2949 /* set outputs if the corresponding mask bit is set */
a0b66a73
LW
2950 for_each_set_bit(i, mask, gc->ngpio)
2951 gc->set(gc, i, test_bit(i, bits));
5f424243
RI
2952 }
2953}
2954
3027743f 2955int gpiod_set_array_value_complex(bool raw, bool can_sleep,
3c940660
GU
2956 unsigned int array_size,
2957 struct gpio_desc **desc_array,
2958 struct gpio_array *array_info,
2959 unsigned long *value_bitmap)
5f424243
RI
2960{
2961 int i = 0;
2962
b17566a6
JK
2963 /*
2964 * Validate array_info against desc_array and its size.
2965 * It should immediately follow desc_array if both
2966 * have been obtained from the same gpiod_get_array() call.
2967 */
2968 if (array_info && array_info->desc == desc_array &&
2969 array_size <= array_info->size &&
2970 (void *)array_info == desc_array + array_info->size) {
2971 if (!can_sleep)
2972 WARN_ON(array_info->chip->can_sleep);
2973
2974 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2975 bitmap_xor(value_bitmap, value_bitmap,
2976 array_info->invert_mask, array_size);
2977
2978 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
2979 value_bitmap);
2980
b17566a6 2981 i = find_first_zero_bit(array_info->set_mask, array_size);
ae66eca0
AS
2982 if (i == array_size)
2983 return 0;
b17566a6
JK
2984 } else {
2985 array_info = NULL;
2986 }
2987
5f424243 2988 while (i < array_size) {
a0b66a73 2989 struct gpio_chip *gc = desc_array[i]->gdev->chip;
c80c4435
AS
2990 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
2991 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
3027743f 2992 unsigned long *mask, *bits;
5f424243
RI
2993 int count = 0;
2994
a0b66a73 2995 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
c80c4435
AS
2996 mask = fastpath_mask;
2997 bits = fastpath_bits;
3027743f 2998 } else {
c354c295
AS
2999 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
3000
3001 mask = bitmap_alloc(gc->ngpio, flags);
3027743f
LA
3002 if (!mask)
3003 return -ENOMEM;
c80c4435 3004
c354c295
AS
3005 bits = bitmap_alloc(gc->ngpio, flags);
3006 if (!bits) {
3007 bitmap_free(mask);
3008 return -ENOMEM;
3009 }
3027743f
LA
3010 }
3011
a0b66a73 3012 bitmap_zero(mask, gc->ngpio);
3027743f 3013
38e003f4 3014 if (!can_sleep)
a0b66a73 3015 WARN_ON(gc->can_sleep);
38e003f4 3016
5f424243
RI
3017 do {
3018 struct gpio_desc *desc = desc_array[i];
3019 int hwgpio = gpio_chip_hwgpio(desc);
b9762beb 3020 int value = test_bit(i, value_bitmap);
5f424243 3021
b17566a6
JK
3022 /*
3023 * Pins applicable for fast input but not for
3024 * fast output processing may have been already
3025 * inverted inside the fast path, skip them.
3026 */
3027 if (!raw && !(array_info &&
3028 test_bit(i, array_info->invert_mask)) &&
3029 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
5f424243
RI
3030 value = !value;
3031 trace_gpio_value(desc_to_gpio(desc), 0, value);
3032 /*
3033 * collect all normal outputs belonging to the same chip
3034 * open drain and open source outputs are set individually
3035 */
02e47980 3036 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
fac9d885 3037 gpio_set_open_drain_value_commit(desc, value);
02e47980 3038 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
fac9d885 3039 gpio_set_open_source_value_commit(desc, value);
5f424243
RI
3040 } else {
3041 __set_bit(hwgpio, mask);
4fc5bfeb 3042 __assign_bit(hwgpio, bits, value);
5f424243
RI
3043 count++;
3044 }
3045 i++;
b17566a6
JK
3046
3047 if (array_info)
35ae7f96
JK
3048 i = find_next_zero_bit(array_info->set_mask,
3049 array_size, i);
fdeb8e15 3050 } while ((i < array_size) &&
a0b66a73 3051 (desc_array[i]->gdev->chip == gc));
5f424243 3052 /* push collected bits to outputs */
38e003f4 3053 if (count != 0)
a0b66a73 3054 gpio_chip_set_multiple(gc, mask, bits);
3027743f 3055
c80c4435 3056 if (mask != fastpath_mask)
c354c295
AS
3057 bitmap_free(mask);
3058 if (bits != fastpath_bits)
3059 bitmap_free(bits);
5f424243 3060 }
3027743f 3061 return 0;
5f424243
RI
3062}
3063
d2876d08 3064/**
79a9becd
AC
3065 * gpiod_set_raw_value() - assign a gpio's raw value
3066 * @desc: gpio whose value will be assigned
d2876d08 3067 * @value: value to assign
d2876d08 3068 *
79a9becd
AC
3069 * Set the raw value of the GPIO, i.e. the value of its physical line without
3070 * regard for its ACTIVE_LOW status.
3071 *
827a9b8b 3072 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3073 * complain if the GPIO chip functions potentially sleep.
d2876d08 3074 */
79a9becd 3075void gpiod_set_raw_value(struct gpio_desc *desc, int value)
372e722e 3076{
fdeb8e15 3077 VALIDATE_DESC_VOID(desc);
3285170f 3078 /* Should be using gpiod_set_raw_value_cansleep() */
fdeb8e15 3079 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3080 gpiod_set_raw_value_commit(desc, value);
d2876d08 3081}
79a9becd 3082EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
d2876d08 3083
1e77fc82
GU
3084/**
3085 * gpiod_set_value_nocheck() - set a GPIO line value without checking
3086 * @desc: the descriptor to set the value on
3087 * @value: value to set
3088 *
3089 * This sets the value of a GPIO line backing a descriptor, applying
3090 * different semantic quirks like active low and open drain/source
3091 * handling.
3092 */
3093static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
3094{
3095 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3096 value = !value;
3097 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
3098 gpio_set_open_drain_value_commit(desc, value);
3099 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
3100 gpio_set_open_source_value_commit(desc, value);
3101 else
3102 gpiod_set_raw_value_commit(desc, value);
3103}
3104
d2876d08 3105/**
79a9becd
AC
3106 * gpiod_set_value() - assign a gpio's value
3107 * @desc: gpio whose value will be assigned
3108 * @value: value to assign
3109 *
02e47980
LW
3110 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
3111 * OPEN_DRAIN and OPEN_SOURCE flags into account.
d2876d08 3112 *
827a9b8b 3113 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3114 * complain if the GPIO chip functions potentially sleep.
d2876d08 3115 */
79a9becd 3116void gpiod_set_value(struct gpio_desc *desc, int value)
d2876d08 3117{
fdeb8e15 3118 VALIDATE_DESC_VOID(desc);
3285170f 3119 /* Should be using gpiod_set_value_cansleep() */
fdeb8e15 3120 WARN_ON(desc->gdev->chip->can_sleep);
1e77fc82 3121 gpiod_set_value_nocheck(desc, value);
372e722e 3122}
79a9becd 3123EXPORT_SYMBOL_GPL(gpiod_set_value);
d2876d08 3124
5f424243 3125/**
3fff99bc 3126 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
b9762beb 3127 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3128 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3129 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3130 * @value_bitmap: bitmap of values to assign
5f424243
RI
3131 *
3132 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3133 * without regard for their ACTIVE_LOW status.
3134 *
827a9b8b 3135 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3136 * complain if the GPIO chip functions potentially sleep.
3137 */
3027743f 3138int gpiod_set_raw_array_value(unsigned int array_size,
3c940660
GU
3139 struct gpio_desc **desc_array,
3140 struct gpio_array *array_info,
3141 unsigned long *value_bitmap)
5f424243
RI
3142{
3143 if (!desc_array)
3027743f
LA
3144 return -EINVAL;
3145 return gpiod_set_array_value_complex(true, false, array_size,
77588c14 3146 desc_array, array_info, value_bitmap);
5f424243 3147}
3fff99bc 3148EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
5f424243
RI
3149
3150/**
3fff99bc 3151 * gpiod_set_array_value() - assign values to an array of GPIOs
b9762beb 3152 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3153 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3154 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3155 * @value_bitmap: bitmap of values to assign
5f424243
RI
3156 *
3157 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3158 * into account.
3159 *
827a9b8b 3160 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3161 * complain if the GPIO chip functions potentially sleep.
3162 */
cf9af0d5
GU
3163int gpiod_set_array_value(unsigned int array_size,
3164 struct gpio_desc **desc_array,
3165 struct gpio_array *array_info,
3166 unsigned long *value_bitmap)
5f424243
RI
3167{
3168 if (!desc_array)
cf9af0d5
GU
3169 return -EINVAL;
3170 return gpiod_set_array_value_complex(false, false, array_size,
3171 desc_array, array_info,
3172 value_bitmap);
5f424243 3173}
3fff99bc 3174EXPORT_SYMBOL_GPL(gpiod_set_array_value);
5f424243 3175
d2876d08 3176/**
79a9becd
AC
3177 * gpiod_cansleep() - report whether gpio value access may sleep
3178 * @desc: gpio to check
d2876d08 3179 *
d2876d08 3180 */
79a9becd 3181int gpiod_cansleep(const struct gpio_desc *desc)
372e722e 3182{
fdeb8e15
LW
3183 VALIDATE_DESC(desc);
3184 return desc->gdev->chip->can_sleep;
d2876d08 3185}
79a9becd 3186EXPORT_SYMBOL_GPL(gpiod_cansleep);
d2876d08 3187
90b39402
LW
3188/**
3189 * gpiod_set_consumer_name() - set the consumer name for the descriptor
3190 * @desc: gpio to set the consumer name on
3191 * @name: the new consumer name
3192 */
18534df4 3193int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
90b39402 3194{
18534df4
MS
3195 VALIDATE_DESC(desc);
3196 if (name) {
3197 name = kstrdup_const(name, GFP_KERNEL);
3198 if (!name)
3199 return -ENOMEM;
3200 }
3201
3202 kfree_const(desc->label);
3203 desc_set_label(desc, name);
3204
3205 return 0;
90b39402
LW
3206}
3207EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
3208
0f6d504e 3209/**
79a9becd
AC
3210 * gpiod_to_irq() - return the IRQ corresponding to a GPIO
3211 * @desc: gpio whose IRQ will be returned (already requested)
0f6d504e 3212 *
79a9becd
AC
3213 * Return the IRQ corresponding to the passed GPIO, or an error code in case of
3214 * error.
0f6d504e 3215 */
79a9becd 3216int gpiod_to_irq(const struct gpio_desc *desc)
0f6d504e 3217{
a0b66a73 3218 struct gpio_chip *gc;
4c37ce86 3219 int offset;
0f6d504e 3220
79bb71bd
LW
3221 /*
3222 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
3223 * requires this function to not return zero on an invalid descriptor
3224 * but rather a negative error number.
3225 */
bfbbe44d 3226 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
79bb71bd
LW
3227 return -EINVAL;
3228
a0b66a73 3229 gc = desc->gdev->chip;
372e722e 3230 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
3231 if (gc->to_irq) {
3232 int retirq = gc->to_irq(gc, offset);
4c37ce86
LW
3233
3234 /* Zero means NO_IRQ */
3235 if (!retirq)
3236 return -ENXIO;
3237
3238 return retirq;
3239 }
ae42f928
SP
3240#ifdef CONFIG_GPIOLIB_IRQCHIP
3241 if (gc->irq.chip) {
3242 /*
3243 * Avoid race condition with other code, which tries to lookup
3244 * an IRQ before the irqchip has been properly registered,
3245 * i.e. while gpiochip is still being brought up.
3246 */
3247 return -EPROBE_DEFER;
3248 }
3249#endif
4c37ce86 3250 return -ENXIO;
0f6d504e 3251}
79a9becd 3252EXPORT_SYMBOL_GPL(gpiod_to_irq);
0f6d504e 3253
d468bf9e 3254/**
e3a2e878 3255 * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
a0b66a73 3256 * @gc: the chip the GPIO to lock belongs to
d74be6df 3257 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3258 *
3259 * This is used directly by GPIO drivers that want to lock down
f438acdf 3260 * a certain GPIO line to be used for IRQs.
d468bf9e 3261 */
a0b66a73 3262int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset)
372e722e 3263{
9c10280d
LW
3264 struct gpio_desc *desc;
3265
a0b66a73 3266 desc = gpiochip_get_desc(gc, offset);
9c10280d
LW
3267 if (IS_ERR(desc))
3268 return PTR_ERR(desc);
3269
60f8339e
LW
3270 /*
3271 * If it's fast: flush the direction setting if something changed
3272 * behind our back
3273 */
a0b66a73 3274 if (!gc->can_sleep && gc->get_direction) {
80956790 3275 int dir = gpiod_get_direction(desc);
9c10280d 3276
36b31279 3277 if (dir < 0) {
a0b66a73 3278 chip_err(gc, "%s: cannot get GPIO direction\n",
36b31279
AS
3279 __func__);
3280 return dir;
3281 }
9c10280d 3282 }
d468bf9e 3283
e9bdf7e6
LW
3284 /* To be valid for IRQ the line needs to be input or open drain */
3285 if (test_bit(FLAG_IS_OUT, &desc->flags) &&
3286 !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
a0b66a73 3287 chip_err(gc,
b1911710
AS
3288 "%s: tried to flag a GPIO set as output for IRQ\n",
3289 __func__);
d468bf9e
LW
3290 return -EIO;
3291 }
3292
9c10280d 3293 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3294 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3295
3296 /*
3297 * If the consumer has not set up a label (such as when the
3298 * IRQ is referenced from .to_irq()) we set up a label here
3299 * so it is clear this is used as an interrupt.
3300 */
3301 if (!desc->label)
3302 desc_set_label(desc, "interrupt");
3303
d468bf9e 3304 return 0;
372e722e 3305}
e3a2e878 3306EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
d2876d08 3307
d468bf9e 3308/**
e3a2e878 3309 * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
a0b66a73 3310 * @gc: the chip the GPIO to lock belongs to
d74be6df 3311 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3312 *
3313 * This is used directly by GPIO drivers that want to indicate
3314 * that a certain GPIO is no longer used exclusively for IRQ.
d2876d08 3315 */
a0b66a73 3316void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset)
d468bf9e 3317{
3940c34a
LW
3318 struct gpio_desc *desc;
3319
a0b66a73 3320 desc = gpiochip_get_desc(gc, offset);
3940c34a 3321 if (IS_ERR(desc))
d468bf9e 3322 return;
d2876d08 3323
3940c34a 3324 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3325 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3326
3327 /* If we only had this marking, erase it */
3328 if (desc->label && !strcmp(desc->label, "interrupt"))
3329 desc_set_label(desc, NULL);
d468bf9e 3330}
e3a2e878 3331EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
d468bf9e 3332
a0b66a73 3333void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3334{
a0b66a73 3335 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3336
3337 if (!IS_ERR(desc) &&
3338 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
3339 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3340}
3341EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
3342
a0b66a73 3343void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3344{
a0b66a73 3345 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3346
3347 if (!IS_ERR(desc) &&
3348 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
e9bdf7e6
LW
3349 /*
3350 * We must not be output when using IRQ UNLESS we are
3351 * open drain.
3352 */
3353 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) &&
3354 !test_bit(FLAG_OPEN_DRAIN, &desc->flags));
4e9439dd
HV
3355 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3356 }
3357}
3358EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
3359
a0b66a73 3360bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset)
6cee3821 3361{
a0b66a73 3362 if (offset >= gc->ngpio)
6cee3821
LW
3363 return false;
3364
a0b66a73 3365 return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags);
6cee3821
LW
3366}
3367EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
3368
a0b66a73 3369int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238
HV
3370{
3371 int ret;
3372
a0b66a73 3373 if (!try_module_get(gc->gpiodev->owner))
4e6b8238
HV
3374 return -ENODEV;
3375
a0b66a73 3376 ret = gpiochip_lock_as_irq(gc, offset);
4e6b8238 3377 if (ret) {
a0b66a73
LW
3378 chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset);
3379 module_put(gc->gpiodev->owner);
4e6b8238
HV
3380 return ret;
3381 }
3382 return 0;
3383}
3384EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
3385
a0b66a73 3386void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238 3387{
a0b66a73
LW
3388 gpiochip_unlock_as_irq(gc, offset);
3389 module_put(gc->gpiodev->owner);
4e6b8238
HV
3390}
3391EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
3392
a0b66a73 3393bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset)
143b65d6 3394{
a0b66a73 3395 if (offset >= gc->ngpio)
143b65d6
LW
3396 return false;
3397
a0b66a73 3398 return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3399}
3400EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
3401
a0b66a73 3402bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset)
143b65d6 3403{
a0b66a73 3404 if (offset >= gc->ngpio)
143b65d6
LW
3405 return false;
3406
a0b66a73 3407 return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3408}
3409EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
3410
a0b66a73 3411bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset)
05f479bf 3412{
a0b66a73 3413 if (offset >= gc->ngpio)
05f479bf
CK
3414 return false;
3415
a0b66a73 3416 return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags);
05f479bf
CK
3417}
3418EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
3419
79a9becd
AC
3420/**
3421 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
3422 * @desc: gpio whose value will be returned
3423 *
3424 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3425 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd
AC
3426 *
3427 * This function is to be called from contexts that can sleep.
d2876d08 3428 */
79a9becd 3429int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
d2876d08 3430{
d2876d08 3431 might_sleep_if(extra_checks);
fdeb8e15 3432 VALIDATE_DESC(desc);
fac9d885 3433 return gpiod_get_raw_value_commit(desc);
d2876d08 3434}
79a9becd 3435EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
372e722e 3436
79a9becd
AC
3437/**
3438 * gpiod_get_value_cansleep() - return a gpio's value
3439 * @desc: gpio whose value will be returned
3440 *
3441 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3442 * account, or negative errno on failure.
79a9becd
AC
3443 *
3444 * This function is to be called from contexts that can sleep.
3445 */
3446int gpiod_get_value_cansleep(const struct gpio_desc *desc)
d2876d08 3447{
3f397c21 3448 int value;
d2876d08
DB
3449
3450 might_sleep_if(extra_checks);
fdeb8e15 3451 VALIDATE_DESC(desc);
fac9d885 3452 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3453 if (value < 0)
3454 return value;
3455
79a9becd
AC
3456 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3457 value = !value;
3458
3f397c21 3459 return value;
d2876d08 3460}
79a9becd 3461EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
372e722e 3462
eec1d566
LW
3463/**
3464 * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
b9762beb 3465 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3466 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3467 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3468 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3469 *
3470 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3471 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3472 * else an error code.
3473 *
3474 * This function is to be called from contexts that can sleep.
3475 */
3476int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
3477 struct gpio_desc **desc_array,
77588c14 3478 struct gpio_array *array_info,
b9762beb 3479 unsigned long *value_bitmap)
eec1d566
LW
3480{
3481 might_sleep_if(extra_checks);
3482 if (!desc_array)
3483 return -EINVAL;
3484 return gpiod_get_array_value_complex(true, true, array_size,
77588c14
JK
3485 desc_array, array_info,
3486 value_bitmap);
eec1d566
LW
3487}
3488EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
3489
3490/**
3491 * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
b9762beb 3492 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3493 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3494 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3495 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3496 *
3497 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3498 * into account. Return 0 in case of success, else an error code.
3499 *
3500 * This function is to be called from contexts that can sleep.
3501 */
3502int gpiod_get_array_value_cansleep(unsigned int array_size,
3503 struct gpio_desc **desc_array,
77588c14 3504 struct gpio_array *array_info,
b9762beb 3505 unsigned long *value_bitmap)
eec1d566
LW
3506{
3507 might_sleep_if(extra_checks);
3508 if (!desc_array)
3509 return -EINVAL;
3510 return gpiod_get_array_value_complex(false, true, array_size,
77588c14
JK
3511 desc_array, array_info,
3512 value_bitmap);
eec1d566
LW
3513}
3514EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
3515
79a9becd
AC
3516/**
3517 * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
3518 * @desc: gpio whose value will be assigned
3519 * @value: value to assign
3520 *
3521 * Set the raw value of the GPIO, i.e. the value of its physical line without
3522 * regard for its ACTIVE_LOW status.
3523 *
3524 * This function is to be called from contexts that can sleep.
3525 */
3526void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
372e722e 3527{
d2876d08 3528 might_sleep_if(extra_checks);
fdeb8e15 3529 VALIDATE_DESC_VOID(desc);
fac9d885 3530 gpiod_set_raw_value_commit(desc, value);
372e722e 3531}
79a9becd 3532EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
d2876d08 3533
79a9becd
AC
3534/**
3535 * gpiod_set_value_cansleep() - assign a gpio's value
3536 * @desc: gpio whose value will be assigned
3537 * @value: value to assign
3538 *
3539 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
3540 * account
3541 *
3542 * This function is to be called from contexts that can sleep.
3543 */
3544void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
d2876d08 3545{
d2876d08 3546 might_sleep_if(extra_checks);
fdeb8e15 3547 VALIDATE_DESC_VOID(desc);
1e77fc82 3548 gpiod_set_value_nocheck(desc, value);
372e722e 3549}
79a9becd 3550EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
d2876d08 3551
5f424243 3552/**
3fff99bc 3553 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3554 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3555 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3556 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3557 * @value_bitmap: bitmap of values to assign
5f424243
RI
3558 *
3559 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3560 * without regard for their ACTIVE_LOW status.
3561 *
3562 * This function is to be called from contexts that can sleep.
3563 */
3027743f 3564int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3c940660
GU
3565 struct gpio_desc **desc_array,
3566 struct gpio_array *array_info,
3567 unsigned long *value_bitmap)
5f424243
RI
3568{
3569 might_sleep_if(extra_checks);
3570 if (!desc_array)
3027743f
LA
3571 return -EINVAL;
3572 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
77588c14 3573 array_info, value_bitmap);
5f424243 3574}
3fff99bc 3575EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
5f424243 3576
3946d187
DT
3577/**
3578 * gpiod_add_lookup_tables() - register GPIO device consumers
3579 * @tables: list of tables of consumers to register
3580 * @n: number of tables in the list
3581 */
3582void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
3583{
3584 unsigned int i;
3585
3586 mutex_lock(&gpio_lookup_lock);
3587
3588 for (i = 0; i < n; i++)
3589 list_add_tail(&tables[i]->list, &gpio_lookup_list);
3590
3591 mutex_unlock(&gpio_lookup_lock);
3592}
3593
5f424243 3594/**
3fff99bc 3595 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3596 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3597 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3598 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3599 * @value_bitmap: bitmap of values to assign
5f424243
RI
3600 *
3601 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3602 * into account.
3603 *
3604 * This function is to be called from contexts that can sleep.
3605 */
cf9af0d5
GU
3606int gpiod_set_array_value_cansleep(unsigned int array_size,
3607 struct gpio_desc **desc_array,
3608 struct gpio_array *array_info,
3609 unsigned long *value_bitmap)
5f424243
RI
3610{
3611 might_sleep_if(extra_checks);
3612 if (!desc_array)
cf9af0d5
GU
3613 return -EINVAL;
3614 return gpiod_set_array_value_complex(false, true, array_size,
3615 desc_array, array_info,
3616 value_bitmap);
5f424243 3617}
3fff99bc 3618EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
5f424243 3619
bae48da2 3620/**
ad824783
AC
3621 * gpiod_add_lookup_table() - register GPIO device consumers
3622 * @table: table of consumers to register
bae48da2 3623 */
ad824783 3624void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
bae48da2 3625{
49fdfe66 3626 gpiod_add_lookup_tables(&table, 1);
bae48da2 3627}
226b2242 3628EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
bae48da2 3629
be9015ab
SK
3630/**
3631 * gpiod_remove_lookup_table() - unregister GPIO device consumers
3632 * @table: table of consumers to unregister
3633 */
3634void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
3635{
d321ad12
AS
3636 /* Nothing to remove */
3637 if (!table)
3638 return;
3639
be9015ab
SK
3640 mutex_lock(&gpio_lookup_lock);
3641
3642 list_del(&table->list);
3643
3644 mutex_unlock(&gpio_lookup_lock);
3645}
226b2242 3646EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
be9015ab 3647
a411e81e
BG
3648/**
3649 * gpiod_add_hogs() - register a set of GPIO hogs from machine code
3650 * @hogs: table of gpio hog entries with a zeroed sentinel at the end
3651 */
3652void gpiod_add_hogs(struct gpiod_hog *hogs)
3653{
a0b66a73 3654 struct gpio_chip *gc;
a411e81e
BG
3655 struct gpiod_hog *hog;
3656
3657 mutex_lock(&gpio_machine_hogs_mutex);
3658
3659 for (hog = &hogs[0]; hog->chip_label; hog++) {
3660 list_add_tail(&hog->list, &gpio_machine_hogs);
3661
3662 /*
3663 * The chip may have been registered earlier, so check if it
3664 * exists and, if so, try to hog the line now.
3665 */
a0b66a73
LW
3666 gc = find_chip_by_name(hog->chip_label);
3667 if (gc)
3668 gpiochip_machine_hog(gc, hog);
a411e81e
BG
3669 }
3670
3671 mutex_unlock(&gpio_machine_hogs_mutex);
3672}
3673EXPORT_SYMBOL_GPL(gpiod_add_hogs);
3674
dd61b292
BG
3675void gpiod_remove_hogs(struct gpiod_hog *hogs)
3676{
3677 struct gpiod_hog *hog;
3678
3679 mutex_lock(&gpio_machine_hogs_mutex);
3680 for (hog = &hogs[0]; hog->chip_label; hog++)
3681 list_del(&hog->list);
3682 mutex_unlock(&gpio_machine_hogs_mutex);
3683}
3684EXPORT_SYMBOL_GPL(gpiod_remove_hogs);
3685
ad824783 3686static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
bae48da2
AC
3687{
3688 const char *dev_id = dev ? dev_name(dev) : NULL;
ad824783 3689 struct gpiod_lookup_table *table;
bae48da2
AC
3690
3691 mutex_lock(&gpio_lookup_lock);
3692
ad824783
AC
3693 list_for_each_entry(table, &gpio_lookup_list, list) {
3694 if (table->dev_id && dev_id) {
3695 /*
3696 * Valid strings on both ends, must be identical to have
3697 * a match
3698 */
3699 if (!strcmp(table->dev_id, dev_id))
3700 goto found;
3701 } else {
3702 /*
3703 * One of the pointers is NULL, so both must be to have
3704 * a match
3705 */
3706 if (dev_id == table->dev_id)
3707 goto found;
3708 }
3709 }
3710 table = NULL;
bae48da2 3711
ad824783
AC
3712found:
3713 mutex_unlock(&gpio_lookup_lock);
3714 return table;
3715}
bae48da2 3716
ad824783 3717static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
fed7026a 3718 unsigned int idx, unsigned long *flags)
ad824783 3719{
2a3cf6a3 3720 struct gpio_desc *desc = ERR_PTR(-ENOENT);
ad824783
AC
3721 struct gpiod_lookup_table *table;
3722 struct gpiod_lookup *p;
bae48da2 3723
ad824783
AC
3724 table = gpiod_find_lookup_table(dev);
3725 if (!table)
3726 return desc;
bae48da2 3727
4c033b54 3728 for (p = &table->table[0]; p->key; p++) {
a0b66a73 3729 struct gpio_chip *gc;
bae48da2 3730
ad824783 3731 /* idx must always match exactly */
bae48da2
AC
3732 if (p->idx != idx)
3733 continue;
3734
ad824783
AC
3735 /* If the lookup entry has a con_id, require exact match */
3736 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
3737 continue;
bae48da2 3738
4c033b54
GU
3739 if (p->chip_hwnum == U16_MAX) {
3740 desc = gpio_name_to_desc(p->key);
3741 if (desc) {
3742 *flags = p->flags;
3743 return desc;
3744 }
3745
3746 dev_warn(dev, "cannot find GPIO line %s, deferring\n",
3747 p->key);
3748 return ERR_PTR(-EPROBE_DEFER);
3749 }
3750
3751 gc = find_chip_by_name(p->key);
bae48da2 3752
a0b66a73 3753 if (!gc) {
8853daf3
JK
3754 /*
3755 * As the lookup table indicates a chip with
4c033b54 3756 * p->key should exist, assume it may
8853daf3
JK
3757 * still appear later and let the interested
3758 * consumer be probed again or let the Deferred
3759 * Probe infrastructure handle the error.
3760 */
3761 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
4c033b54 3762 p->key);
8853daf3 3763 return ERR_PTR(-EPROBE_DEFER);
ad824783 3764 }
bae48da2 3765
a0b66a73 3766 if (gc->ngpio <= p->chip_hwnum) {
2a3cf6a3 3767 dev_err(dev,
d935bd50 3768 "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n",
a0b66a73
LW
3769 idx, p->chip_hwnum, gc->ngpio - 1,
3770 gc->label);
2a3cf6a3 3771 return ERR_PTR(-EINVAL);
bae48da2 3772 }
bae48da2 3773
a0b66a73 3774 desc = gpiochip_get_desc(gc, p->chip_hwnum);
ad824783 3775 *flags = p->flags;
bae48da2 3776
2a3cf6a3 3777 return desc;
bae48da2
AC
3778 }
3779
bae48da2
AC
3780 return desc;
3781}
3782
66858527
RI
3783static int platform_gpio_count(struct device *dev, const char *con_id)
3784{
3785 struct gpiod_lookup_table *table;
3786 struct gpiod_lookup *p;
3787 unsigned int count = 0;
3788
3789 table = gpiod_find_lookup_table(dev);
3790 if (!table)
3791 return -ENOENT;
3792
4c033b54 3793 for (p = &table->table[0]; p->key; p++) {
66858527
RI
3794 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
3795 (!con_id && !p->con_id))
3796 count++;
3797 }
3798 if (!count)
3799 return -ENOENT;
3800
3801 return count;
3802}
3803
13949fa9
DT
3804/**
3805 * fwnode_gpiod_get_index - obtain a GPIO from firmware node
3806 * @fwnode: handle of the firmware node
3807 * @con_id: function within the GPIO consumer
3808 * @index: index of the GPIO to obtain for the consumer
3809 * @flags: GPIO initialization flags
3810 * @label: label to attach to the requested GPIO
3811 *
3812 * This function can be used for drivers that get their configuration
3813 * from opaque firmware.
3814 *
3815 * The function properly finds the corresponding GPIO using whatever is the
3816 * underlying firmware interface and then makes sure that the GPIO
3817 * descriptor is requested before it is returned to the caller.
3818 *
3819 * Returns:
3820 * On successful request the GPIO pin is configured in accordance with
3821 * provided @flags.
3822 *
3823 * In case of error an ERR_PTR() is returned.
3824 */
3825struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
3826 const char *con_id, int index,
3827 enum gpiod_flags flags,
3828 const char *label)
3829{
3830 struct gpio_desc *desc;
3831 char prop_name[32]; /* 32 is max size of property name */
3832 unsigned int i;
3833
3834 for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) {
3835 if (con_id)
3836 snprintf(prop_name, sizeof(prop_name), "%s-%s",
3837 con_id, gpio_suffixes[i]);
3838 else
3839 snprintf(prop_name, sizeof(prop_name), "%s",
3840 gpio_suffixes[i]);
3841
3842 desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags,
3843 label);
7b58696d 3844 if (!gpiod_not_found(desc))
13949fa9
DT
3845 break;
3846 }
3847
3848 return desc;
3849}
3850EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
3851
66858527
RI
3852/**
3853 * gpiod_count - return the number of GPIOs associated with a device / function
3854 * or -ENOENT if no GPIO has been assigned to the requested function
3855 * @dev: GPIO consumer, can be NULL for system-global GPIOs
3856 * @con_id: function within the GPIO consumer
3857 */
3858int gpiod_count(struct device *dev, const char *con_id)
3859{
944f4b0a 3860 const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
66858527
RI
3861 int count = -ENOENT;
3862
944f4b0a 3863 if (is_of_node(fwnode))
f626d6df 3864 count = of_gpio_get_count(dev, con_id);
944f4b0a 3865 else if (is_acpi_node(fwnode))
66858527
RI
3866 count = acpi_gpio_count(dev, con_id);
3867
3868 if (count < 0)
3869 count = platform_gpio_count(dev, con_id);
3870
3871 return count;
3872}
3873EXPORT_SYMBOL_GPL(gpiod_count);
3874
bae48da2 3875/**
0879162f 3876 * gpiod_get - obtain a GPIO for a given GPIO function
ad824783 3877 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2 3878 * @con_id: function within the GPIO consumer
39b2bbe3 3879 * @flags: optional GPIO initialization flags
bae48da2
AC
3880 *
3881 * Return the GPIO descriptor corresponding to the function con_id of device
2a3cf6a3 3882 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
20a8a968 3883 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
bae48da2 3884 */
b17d1bf1 3885struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
39b2bbe3 3886 enum gpiod_flags flags)
bae48da2 3887{
39b2bbe3 3888 return gpiod_get_index(dev, con_id, 0, flags);
bae48da2 3889}
b17d1bf1 3890EXPORT_SYMBOL_GPL(gpiod_get);
bae48da2 3891
29a1f233
TR
3892/**
3893 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
3894 * @dev: GPIO consumer, can be NULL for system-global GPIOs
3895 * @con_id: function within the GPIO consumer
39b2bbe3 3896 * @flags: optional GPIO initialization flags
29a1f233
TR
3897 *
3898 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
3899 * the requested function it will return NULL. This is convenient for drivers
3900 * that need to handle optional GPIOs.
3901 */
b17d1bf1 3902struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
39b2bbe3
AC
3903 const char *con_id,
3904 enum gpiod_flags flags)
29a1f233 3905{
39b2bbe3 3906 return gpiod_get_index_optional(dev, con_id, 0, flags);
29a1f233 3907}
b17d1bf1 3908EXPORT_SYMBOL_GPL(gpiod_get_optional);
29a1f233 3909
f625d460
BP
3910
3911/**
3912 * gpiod_configure_flags - helper function to configure a given GPIO
3913 * @desc: gpio whose value will be assigned
3914 * @con_id: function within the GPIO consumer
fed7026a
AS
3915 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
3916 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
3917 * @dflags: gpiod_flags - optional GPIO initialization flags
3918 *
3919 * Return 0 on success, -ENOENT if no GPIO has been assigned to the
3920 * requested function and/or index, or another IS_ERR() code if an error
3921 * occurred while trying to acquire the GPIO.
3922 */
c29fd9eb 3923int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
85b03b30 3924 unsigned long lflags, enum gpiod_flags dflags)
f625d460 3925{
d377f56f 3926 int ret;
f625d460 3927
85b03b30
JH
3928 if (lflags & GPIO_ACTIVE_LOW)
3929 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
f926dfc1 3930
85b03b30
JH
3931 if (lflags & GPIO_OPEN_DRAIN)
3932 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
f926dfc1
LW
3933 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
3934 /*
3935 * This enforces open drain mode from the consumer side.
3936 * This is necessary for some busses like I2C, but the lookup
3937 * should *REALLY* have specified them as open drain in the
3938 * first place, so print a little warning here.
3939 */
3940 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
3941 gpiod_warn(desc,
3942 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
3943 }
3944
85b03b30
JH
3945 if (lflags & GPIO_OPEN_SOURCE)
3946 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
e10f72bf 3947
d449991c
TP
3948 if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) {
3949 gpiod_err(desc,
3950 "both pull-up and pull-down enabled, invalid configuration\n");
3951 return -EINVAL;
3952 }
3953
3954 if (lflags & GPIO_PULL_UP)
3955 set_bit(FLAG_PULL_UP, &desc->flags);
3956 else if (lflags & GPIO_PULL_DOWN)
3957 set_bit(FLAG_PULL_DOWN, &desc->flags);
3958
d377f56f
LW
3959 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
3960 if (ret < 0)
3961 return ret;
85b03b30 3962
f625d460
BP
3963 /* No particular flag request, return here... */
3964 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
262b9011 3965 gpiod_dbg(desc, "no flags found for %s\n", con_id);
f625d460
BP
3966 return 0;
3967 }
3968
3969 /* Process flags */
3970 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
d377f56f 3971 ret = gpiod_direction_output(desc,
ad17731d 3972 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
f625d460 3973 else
d377f56f 3974 ret = gpiod_direction_input(desc);
f625d460 3975
d377f56f 3976 return ret;
f625d460
BP
3977}
3978
bae48da2
AC
3979/**
3980 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
fdd6a5fe 3981 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2
AC
3982 * @con_id: function within the GPIO consumer
3983 * @idx: index of the GPIO to obtain in the consumer
39b2bbe3 3984 * @flags: optional GPIO initialization flags
bae48da2
AC
3985 *
3986 * This variant of gpiod_get() allows to access GPIOs other than the first
3987 * defined one for functions that define several GPIOs.
3988 *
2a3cf6a3
AC
3989 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
3990 * requested function and/or index, or another IS_ERR() code if an error
20a8a968 3991 * occurred while trying to acquire the GPIO.
bae48da2 3992 */
b17d1bf1 3993struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
bae48da2 3994 const char *con_id,
39b2bbe3
AC
3995 unsigned int idx,
3996 enum gpiod_flags flags)
bae48da2 3997{
2d6c06f5 3998 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
35c5d7fd 3999 struct gpio_desc *desc = NULL;
d377f56f 4000 int ret;
7d18f0a1
LW
4001 /* Maybe we have a device name, maybe not */
4002 const char *devname = dev ? dev_name(dev) : "?";
944f4b0a 4003 const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
bae48da2
AC
4004
4005 dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id);
4006
944f4b0a
AS
4007 /* Using device tree? */
4008 if (is_of_node(fwnode)) {
4009 dev_dbg(dev, "using device tree for GPIO lookup\n");
4010 desc = of_find_gpio(dev, con_id, idx, &lookupflags);
4011 } else if (is_acpi_node(fwnode)) {
4012 dev_dbg(dev, "using ACPI for GPIO lookup\n");
4013 desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags);
35c5d7fd
AC
4014 }
4015
4016 /*
4017 * Either we are not using DT or ACPI, or their lookup did not return
4018 * a result. In that case, use platform lookup as a fallback.
4019 */
7b58696d 4020 if (!desc || gpiod_not_found(desc)) {
43a8785a 4021 dev_dbg(dev, "using lookup tables for GPIO lookup\n");
39b2bbe3 4022 desc = gpiod_find(dev, con_id, idx, &lookupflags);
bae48da2
AC
4023 }
4024
4025 if (IS_ERR(desc)) {
9d5a1f2c 4026 dev_dbg(dev, "No GPIO consumer %s found\n", con_id);
bae48da2
AC
4027 return desc;
4028 }
4029
7d18f0a1
LW
4030 /*
4031 * If a connection label was passed use that, else attempt to use
4032 * the device name as label
4033 */
322b86e7 4034 ret = gpiod_request(desc, con_id ?: devname);
8bbff39c 4035 if (ret) {
6105b2e3 4036 if (!(ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE))
d377f56f 4037 return ERR_PTR(ret);
6105b2e3
AS
4038
4039 /*
4040 * This happens when there are several consumers for
4041 * the same GPIO line: we just return here without
4042 * further initialization. It is a bit of a hack.
4043 * This is necessary to support fixed regulators.
4044 *
4045 * FIXME: Make this more sane and safe.
4046 */
4047 dev_info(dev, "nonexclusive access to GPIO for %s\n", con_id ?: devname);
4048 return desc;
b0ce7b29 4049 }
bae48da2 4050
d377f56f 4051 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
6392cca4 4052 if (ret < 0) {
39b2bbe3 4053 dev_dbg(dev, "setup of GPIO %s failed\n", con_id);
6392cca4
LW
4054 gpiod_put(desc);
4055 return ERR_PTR(ret);
4056 }
4057
6accc376
KG
4058 blocking_notifier_call_chain(&desc->gdev->notifier,
4059 GPIOLINE_CHANGED_REQUESTED, desc);
9fefca77 4060
6392cca4
LW
4061 return desc;
4062}
b17d1bf1 4063EXPORT_SYMBOL_GPL(gpiod_get_index);
6392cca4 4064
40b73183
MW
4065/**
4066 * fwnode_get_named_gpiod - obtain a GPIO from firmware node
4067 * @fwnode: handle of the firmware node
4068 * @propname: name of the firmware property representing the GPIO
6392cca4 4069 * @index: index of the GPIO to obtain for the consumer
a264d10f 4070 * @dflags: GPIO initialization flags
950d55f5 4071 * @label: label to attach to the requested GPIO
40b73183
MW
4072 *
4073 * This function can be used for drivers that get their configuration
6392cca4 4074 * from opaque firmware.
40b73183 4075 *
6392cca4 4076 * The function properly finds the corresponding GPIO using whatever is the
40b73183
MW
4077 * underlying firmware interface and then makes sure that the GPIO
4078 * descriptor is requested before it is returned to the caller.
4079 *
950d55f5 4080 * Returns:
ff21378a 4081 * On successful request the GPIO pin is configured in accordance with
a264d10f
AS
4082 * provided @dflags.
4083 *
40b73183
MW
4084 * In case of error an ERR_PTR() is returned.
4085 */
4086struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
537b94da 4087 const char *propname, int index,
b2987d74
AS
4088 enum gpiod_flags dflags,
4089 const char *label)
40b73183 4090{
2d6c06f5 4091 unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT;
40b73183 4092 struct gpio_desc *desc = ERR_PTR(-ENODEV);
40b73183
MW
4093 int ret;
4094
40b73183 4095 if (is_of_node(fwnode)) {
6392cca4
LW
4096 desc = gpiod_get_from_of_node(to_of_node(fwnode),
4097 propname, index,
4098 dflags,
4099 label);
4100 return desc;
40b73183
MW
4101 } else if (is_acpi_node(fwnode)) {
4102 struct acpi_gpio_info info;
4103
537b94da 4104 desc = acpi_node_get_gpiod(fwnode, propname, index, &info);
6392cca4
LW
4105 if (IS_ERR(desc))
4106 return desc;
40b73183 4107
6392cca4 4108 acpi_gpio_update_gpiod_flags(&dflags, &info);
606be344 4109 acpi_gpio_update_gpiod_lookup_flags(&lflags, &info);
944f4b0a
AS
4110 } else
4111 return ERR_PTR(-EINVAL);
40b73183 4112
6392cca4 4113 /* Currently only ACPI takes this path */
b2987d74 4114 ret = gpiod_request(desc, label);
85b03b30
JH
4115 if (ret)
4116 return ERR_PTR(ret);
4117
a264d10f
AS
4118 ret = gpiod_configure_flags(desc, propname, lflags, dflags);
4119 if (ret < 0) {
4120 gpiod_put(desc);
4121 return ERR_PTR(ret);
90b665f6
LP
4122 }
4123
6accc376
KG
4124 blocking_notifier_call_chain(&desc->gdev->notifier,
4125 GPIOLINE_CHANGED_REQUESTED, desc);
9fefca77 4126
40b73183
MW
4127 return desc;
4128}
4129EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod);
4130
29a1f233
TR
4131/**
4132 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
4133 * function
4134 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4135 * @con_id: function within the GPIO consumer
4136 * @index: index of the GPIO to obtain in the consumer
39b2bbe3 4137 * @flags: optional GPIO initialization flags
29a1f233
TR
4138 *
4139 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
4140 * specified index was assigned to the requested function it will return NULL.
4141 * This is convenient for drivers that need to handle optional GPIOs.
4142 */
b17d1bf1 4143struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
29a1f233 4144 const char *con_id,
39b2bbe3
AC
4145 unsigned int index,
4146 enum gpiod_flags flags)
29a1f233
TR
4147{
4148 struct gpio_desc *desc;
4149
39b2bbe3 4150 desc = gpiod_get_index(dev, con_id, index, flags);
7b58696d
AS
4151 if (gpiod_not_found(desc))
4152 return NULL;
29a1f233
TR
4153
4154 return desc;
4155}
b17d1bf1 4156EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
29a1f233 4157
f625d460
BP
4158/**
4159 * gpiod_hog - Hog the specified GPIO desc given the provided flags
4160 * @desc: gpio whose value will be assigned
4161 * @name: gpio line name
fed7026a
AS
4162 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4163 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4164 * @dflags: gpiod_flags - optional GPIO initialization flags
4165 */
4166int gpiod_hog(struct gpio_desc *desc, const char *name,
4167 unsigned long lflags, enum gpiod_flags dflags)
4168{
a0b66a73 4169 struct gpio_chip *gc;
f625d460
BP
4170 struct gpio_desc *local_desc;
4171 int hwnum;
d377f56f 4172 int ret;
f625d460 4173
a0b66a73 4174 gc = gpiod_to_chip(desc);
f625d460
BP
4175 hwnum = gpio_chip_hwgpio(desc);
4176
a0b66a73 4177 local_desc = gpiochip_request_own_desc(gc, hwnum, name,
5923ea6c 4178 lflags, dflags);
f625d460 4179 if (IS_ERR(local_desc)) {
d377f56f 4180 ret = PTR_ERR(local_desc);
c31a571d 4181 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
a0b66a73 4182 name, gc->label, hwnum, ret);
d377f56f 4183 return ret;
f625d460
BP
4184 }
4185
f625d460
BP
4186 /* Mark GPIO as hogged so it can be identified and removed later */
4187 set_bit(FLAG_IS_HOGGED, &desc->flags);
4188
262b9011 4189 gpiod_info(desc, "hogged as %s%s\n",
b27f300f
BG
4190 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
4191 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
4192 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
f625d460
BP
4193
4194 return 0;
4195}
4196
4197/**
4198 * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
a0b66a73 4199 * @gc: gpio chip to act on
f625d460 4200 */
a0b66a73 4201static void gpiochip_free_hogs(struct gpio_chip *gc)
f625d460 4202{
80c78fbe 4203 struct gpio_desc *desc;
f625d460 4204
57017edd 4205 for_each_gpio_desc_with_flag(gc, desc, FLAG_IS_HOGGED)
80c78fbe 4206 gpiochip_free_own_desc(desc);
f625d460
BP
4207}
4208
66858527
RI
4209/**
4210 * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
4211 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4212 * @con_id: function within the GPIO consumer
4213 * @flags: optional GPIO initialization flags
4214 *
4215 * This function acquires all the GPIOs defined under a given function.
4216 *
4217 * Return a struct gpio_descs containing an array of descriptors, -ENOENT if
4218 * no GPIO has been assigned to the requested function, or another IS_ERR()
4219 * code if an error occurred while trying to acquire the GPIOs.
4220 */
4221struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
4222 const char *con_id,
4223 enum gpiod_flags flags)
4224{
4225 struct gpio_desc *desc;
4226 struct gpio_descs *descs;
bf9346f5 4227 struct gpio_array *array_info = NULL;
a0b66a73 4228 struct gpio_chip *gc;
bf9346f5 4229 int count, bitmap_size;
66858527
RI
4230
4231 count = gpiod_count(dev, con_id);
4232 if (count < 0)
4233 return ERR_PTR(count);
4234
acafe7e3 4235 descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL);
66858527
RI
4236 if (!descs)
4237 return ERR_PTR(-ENOMEM);
4238
4239 for (descs->ndescs = 0; descs->ndescs < count; ) {
4240 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
4241 if (IS_ERR(desc)) {
4242 gpiod_put_array(descs);
4243 return ERR_CAST(desc);
4244 }
bf9346f5 4245
66858527 4246 descs->desc[descs->ndescs] = desc;
bf9346f5 4247
a0b66a73 4248 gc = gpiod_to_chip(desc);
bf9346f5 4249 /*
c4c958aa
JK
4250 * If pin hardware number of array member 0 is also 0, select
4251 * its chip as a candidate for fast bitmap processing path.
bf9346f5 4252 */
c4c958aa 4253 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
bf9346f5
JK
4254 struct gpio_descs *array;
4255
a0b66a73
LW
4256 bitmap_size = BITS_TO_LONGS(gc->ngpio > count ?
4257 gc->ngpio : count);
bf9346f5
JK
4258
4259 array = kzalloc(struct_size(descs, desc, count) +
4260 struct_size(array_info, invert_mask,
4261 3 * bitmap_size), GFP_KERNEL);
4262 if (!array) {
4263 gpiod_put_array(descs);
4264 return ERR_PTR(-ENOMEM);
4265 }
4266
4267 memcpy(array, descs,
4268 struct_size(descs, desc, descs->ndescs + 1));
4269 kfree(descs);
4270
4271 descs = array;
4272 array_info = (void *)(descs->desc + count);
4273 array_info->get_mask = array_info->invert_mask +
4274 bitmap_size;
4275 array_info->set_mask = array_info->get_mask +
4276 bitmap_size;
4277
4278 array_info->desc = descs->desc;
4279 array_info->size = count;
a0b66a73 4280 array_info->chip = gc;
bf9346f5
JK
4281 bitmap_set(array_info->get_mask, descs->ndescs,
4282 count - descs->ndescs);
4283 bitmap_set(array_info->set_mask, descs->ndescs,
4284 count - descs->ndescs);
4285 descs->info = array_info;
4286 }
c4c958aa 4287 /* Unmark array members which don't belong to the 'fast' chip */
a0b66a73 4288 if (array_info && array_info->chip != gc) {
bf9346f5
JK
4289 __clear_bit(descs->ndescs, array_info->get_mask);
4290 __clear_bit(descs->ndescs, array_info->set_mask);
c4c958aa
JK
4291 }
4292 /*
4293 * Detect array members which belong to the 'fast' chip
4294 * but their pins are not in hardware order.
4295 */
4296 else if (array_info &&
4297 gpio_chip_hwgpio(desc) != descs->ndescs) {
4298 /*
4299 * Don't use fast path if all array members processed so
4300 * far belong to the same chip as this one but its pin
4301 * hardware number is different from its array index.
4302 */
4303 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
4304 array_info = NULL;
4305 } else {
4306 __clear_bit(descs->ndescs,
4307 array_info->get_mask);
4308 __clear_bit(descs->ndescs,
4309 array_info->set_mask);
4310 }
bf9346f5
JK
4311 } else if (array_info) {
4312 /* Exclude open drain or open source from fast output */
a0b66a73
LW
4313 if (gpiochip_line_is_open_drain(gc, descs->ndescs) ||
4314 gpiochip_line_is_open_source(gc, descs->ndescs))
bf9346f5
JK
4315 __clear_bit(descs->ndescs,
4316 array_info->set_mask);
4317 /* Identify 'fast' pins which require invertion */
4318 if (gpiod_is_active_low(desc))
4319 __set_bit(descs->ndescs,
4320 array_info->invert_mask);
4321 }
4322
66858527
RI
4323 descs->ndescs++;
4324 }
bf9346f5
JK
4325 if (array_info)
4326 dev_dbg(dev,
4327 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
4328 array_info->chip->label, array_info->size,
4329 *array_info->get_mask, *array_info->set_mask,
4330 *array_info->invert_mask);
66858527
RI
4331 return descs;
4332}
4333EXPORT_SYMBOL_GPL(gpiod_get_array);
4334
4335/**
4336 * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
4337 * function
4338 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4339 * @con_id: function within the GPIO consumer
4340 * @flags: optional GPIO initialization flags
4341 *
4342 * This is equivalent to gpiod_get_array(), except that when no GPIO was
4343 * assigned to the requested function it will return NULL.
4344 */
4345struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
4346 const char *con_id,
4347 enum gpiod_flags flags)
4348{
4349 struct gpio_descs *descs;
4350
4351 descs = gpiod_get_array(dev, con_id, flags);
7b58696d 4352 if (gpiod_not_found(descs))
66858527
RI
4353 return NULL;
4354
4355 return descs;
4356}
4357EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
4358
bae48da2
AC
4359/**
4360 * gpiod_put - dispose of a GPIO descriptor
4361 * @desc: GPIO descriptor to dispose of
4362 *
4363 * No descriptor can be used after gpiod_put() has been called on it.
4364 */
4365void gpiod_put(struct gpio_desc *desc)
4366{
1d7765ba
AS
4367 if (desc)
4368 gpiod_free(desc);
372e722e 4369}
bae48da2 4370EXPORT_SYMBOL_GPL(gpiod_put);
d2876d08 4371
66858527
RI
4372/**
4373 * gpiod_put_array - dispose of multiple GPIO descriptors
4374 * @descs: struct gpio_descs containing an array of descriptors
4375 */
4376void gpiod_put_array(struct gpio_descs *descs)
4377{
4378 unsigned int i;
4379
4380 for (i = 0; i < descs->ndescs; i++)
4381 gpiod_put(descs->desc[i]);
4382
4383 kfree(descs);
4384}
4385EXPORT_SYMBOL_GPL(gpiod_put_array);
4386
ced2af41
SK
4387
4388static int gpio_bus_match(struct device *dev, struct device_driver *drv)
4389{
1df62542
AS
4390 struct fwnode_handle *fwnode = dev_fwnode(dev);
4391
ced2af41
SK
4392 /*
4393 * Only match if the fwnode doesn't already have a proper struct device
4394 * created for it.
4395 */
1df62542 4396 if (fwnode && fwnode->dev != dev)
ced2af41
SK
4397 return 0;
4398 return 1;
4399}
4400
4731210c
SK
4401static int gpio_stub_drv_probe(struct device *dev)
4402{
4403 /*
4404 * The DT node of some GPIO chips have a "compatible" property, but
4405 * never have a struct device added and probed by a driver to register
4406 * the GPIO chip with gpiolib. In such cases, fw_devlink=on will cause
4407 * the consumers of the GPIO chip to get probe deferred forever because
4408 * they will be waiting for a device associated with the GPIO chip
4409 * firmware node to get added and bound to a driver.
4410 *
4411 * To allow these consumers to probe, we associate the struct
4412 * gpio_device of the GPIO chip with the firmware node and then simply
4413 * bind it to this stub driver.
4414 */
4415 return 0;
4416}
4417
4418static struct device_driver gpio_stub_drv = {
4419 .name = "gpio_stub_drv",
4420 .bus = &gpio_bus_type,
4421 .probe = gpio_stub_drv_probe,
4422};
4423
3c702e99
LW
4424static int __init gpiolib_dev_init(void)
4425{
4426 int ret;
4427
4428 /* Register GPIO sysfs bus */
b1911710 4429 ret = bus_register(&gpio_bus_type);
3c702e99
LW
4430 if (ret < 0) {
4431 pr_err("gpiolib: could not register GPIO bus type\n");
4432 return ret;
4433 }
4434
3875721e
WY
4435 ret = driver_register(&gpio_stub_drv);
4436 if (ret < 0) {
4731210c
SK
4437 pr_err("gpiolib: could not register GPIO stub driver\n");
4438 bus_unregister(&gpio_bus_type);
4439 return ret;
4440 }
4441
ddd8891e 4442 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME);
3c702e99
LW
4443 if (ret < 0) {
4444 pr_err("gpiolib: failed to allocate char dev region\n");
4731210c 4445 driver_unregister(&gpio_stub_drv);
3c702e99 4446 bus_unregister(&gpio_bus_type);
63636d95 4447 return ret;
3c702e99 4448 }
63636d95
GU
4449
4450 gpiolib_initialized = true;
4451 gpiochip_setup_devs();
4452
8650b609
DG
4453#if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO)
4454 WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier));
4455#endif /* CONFIG_OF_DYNAMIC && CONFIG_OF_GPIO */
63636d95 4456
3c702e99
LW
4457 return ret;
4458}
4459core_initcall(gpiolib_dev_init);
4460
d2876d08
DB
4461#ifdef CONFIG_DEBUG_FS
4462
fdeb8e15 4463static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
d2876d08 4464{
a0b66a73 4465 struct gpio_chip *gc = gdev->chip;
3de69ae1 4466 struct gpio_desc *desc;
fdeb8e15 4467 unsigned gpio = gdev->base;
3de69ae1 4468 int value;
90fd2270
LW
4469 bool is_out;
4470 bool is_irq;
4471 bool active_low;
d2876d08 4472
3de69ae1
AS
4473 for_each_gpio_desc(gc, desc) {
4474 if (test_bit(FLAG_REQUESTED, &desc->flags)) {
4475 gpiod_get_direction(desc);
4476 is_out = test_bit(FLAG_IS_OUT, &desc->flags);
234c5209 4477 value = gpio_chip_get_value(gc, desc);
3de69ae1
AS
4478 is_irq = test_bit(FLAG_USED_AS_IRQ, &desc->flags);
4479 active_low = test_bit(FLAG_ACTIVE_LOW, &desc->flags);
4480 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s\n",
4481 gpio, desc->name ?: "", desc->label,
4482 is_out ? "out" : "in ",
4483 value >= 0 ? (value ? "hi" : "lo") : "? ",
4484 is_irq ? "IRQ " : "",
4485 active_low ? "ACTIVE LOW" : "");
4486 } else if (desc->name) {
4487 seq_printf(s, " gpio-%-3d (%-20.20s)\n", gpio, desc->name);
ced433e2 4488 }
d2876d08 4489
3de69ae1 4490 gpio++;
d2876d08
DB
4491 }
4492}
4493
f9c4a31f 4494static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
d2876d08 4495{
362432ae 4496 unsigned long flags;
ff2b1359 4497 struct gpio_device *gdev = NULL;
cb1650d4 4498 loff_t index = *pos;
d2876d08 4499
f9c4a31f 4500 s->private = "";
d2876d08 4501
362432ae 4502 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4503 list_for_each_entry(gdev, &gpio_devices, list)
362432ae
GL
4504 if (index-- == 0) {
4505 spin_unlock_irqrestore(&gpio_lock, flags);
ff2b1359 4506 return gdev;
f9c4a31f 4507 }
362432ae 4508 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f 4509
cb1650d4 4510 return NULL;
f9c4a31f
TR
4511}
4512
4513static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
4514{
362432ae 4515 unsigned long flags;
ff2b1359 4516 struct gpio_device *gdev = v;
f9c4a31f
TR
4517 void *ret = NULL;
4518
362432ae 4519 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4520 if (list_is_last(&gdev->list, &gpio_devices))
cb1650d4
AC
4521 ret = NULL;
4522 else
243cfa6a 4523 ret = list_first_entry(&gdev->list, struct gpio_device, list);
362432ae 4524 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f
TR
4525
4526 s->private = "\n";
4527 ++*pos;
4528
4529 return ret;
4530}
4531
4532static void gpiolib_seq_stop(struct seq_file *s, void *v)
4533{
4534}
4535
4536static int gpiolib_seq_show(struct seq_file *s, void *v)
4537{
ff2b1359 4538 struct gpio_device *gdev = v;
a0b66a73 4539 struct gpio_chip *gc = gdev->chip;
ff2b1359
LW
4540 struct device *parent;
4541
a0b66a73 4542 if (!gc) {
ff2b1359
LW
4543 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
4544 dev_name(&gdev->dev));
4545 return 0;
4546 }
f9c4a31f 4547
ff2b1359
LW
4548 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
4549 dev_name(&gdev->dev),
fdeb8e15 4550 gdev->base, gdev->base + gdev->ngpio - 1);
a0b66a73 4551 parent = gc->parent;
ff2b1359
LW
4552 if (parent)
4553 seq_printf(s, ", parent: %s/%s",
4554 parent->bus ? parent->bus->name : "no-bus",
4555 dev_name(parent));
a0b66a73
LW
4556 if (gc->label)
4557 seq_printf(s, ", %s", gc->label);
4558 if (gc->can_sleep)
f9c4a31f
TR
4559 seq_printf(s, ", can sleep");
4560 seq_printf(s, ":\n");
4561
a0b66a73
LW
4562 if (gc->dbg_show)
4563 gc->dbg_show(s, gc);
f9c4a31f 4564 else
fdeb8e15 4565 gpiolib_dbg_show(s, gdev);
f9c4a31f 4566
d2876d08
DB
4567 return 0;
4568}
4569
425c5b3e 4570static const struct seq_operations gpiolib_sops = {
f9c4a31f
TR
4571 .start = gpiolib_seq_start,
4572 .next = gpiolib_seq_next,
4573 .stop = gpiolib_seq_stop,
4574 .show = gpiolib_seq_show,
4575};
425c5b3e 4576DEFINE_SEQ_ATTRIBUTE(gpiolib);
d2876d08
DB
4577
4578static int __init gpiolib_debugfs_init(void)
4579{
4580 /* /sys/kernel/debug/gpio */
425c5b3e 4581 debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops);
d2876d08
DB
4582 return 0;
4583}
4584subsys_initcall(gpiolib_debugfs_init);
4585
4586#endif /* DEBUG_FS */