gpiolib: Kill unused GPIOF_OPEN_*
[linux-block.git] / drivers / gpio / gpiolib.c
CommitLineData
dae5f0af 1// SPDX-License-Identifier: GPL-2.0
c47d9e1b 2
79aabb1e 3#include <linux/acpi.h>
923a654c 4#include <linux/bitmap.h>
79aabb1e
AS
5#include <linux/compat.h>
6#include <linux/debugfs.h>
d8f388d8
DB
7#include <linux/device.h>
8#include <linux/err.h>
380c7ba3 9#include <linux/errno.h>
79aabb1e
AS
10#include <linux/file.h>
11#include <linux/fs.h>
79aabb1e
AS
12#include <linux/idr.h>
13#include <linux/interrupt.h>
14#include <linux/irq.h>
15#include <linux/kernel.h>
16#include <linux/list.h>
17#include <linux/module.h>
380c7ba3 18#include <linux/of.h>
c771c2f4 19#include <linux/pinctrl/consumer.h>
79aabb1e
AS
20#include <linux/seq_file.h>
21#include <linux/slab.h>
22#include <linux/spinlock.h>
23
380c7ba3
AS
24#include <linux/gpio.h>
25#include <linux/gpio/driver.h>
26#include <linux/gpio/machine.h>
27
3c702e99 28#include <uapi/linux/gpio.h>
d2876d08 29
77cb907a 30#include "gpiolib-acpi.h"
925ca369 31#include "gpiolib-cdev.h"
79aabb1e
AS
32#include "gpiolib-of.h"
33#include "gpiolib-swnode.h"
ef087d8e 34#include "gpiolib-sysfs.h"
79aabb1e 35#include "gpiolib.h"
664e3e5a 36
3f397c21
UKK
37#define CREATE_TRACE_POINTS
38#include <trace/events/gpio.h>
d2876d08 39
79a9becd 40/* Implementation infrastructure for GPIO interfaces.
d2876d08 41 *
79a9becd
AC
42 * The GPIO programming interface allows for inlining speed-critical
43 * get/set operations for common cases, so that access to SOC-integrated
44 * GPIOs can sometimes cost only an instruction or two per bit.
d2876d08
DB
45 */
46
47
48/* When debugging, extend minimal trust to callers and platform code.
49 * Also emit diagnostic messages that may help initial bringup, when
50 * board setup or driver bugs are most common.
51 *
52 * Otherwise, minimize overhead in what may be bitbanging codepaths.
53 */
54#ifdef DEBUG
55#define extra_checks 1
56#else
57#define extra_checks 0
58#endif
59
ff2b1359
LW
60/* Device and char device-related information */
61static DEFINE_IDA(gpio_ida);
3c702e99
LW
62static dev_t gpio_devt;
63#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
c135f401
AS
64
65static int gpio_bus_match(struct device *dev, struct device_driver *drv)
66{
67 struct fwnode_handle *fwnode = dev_fwnode(dev);
68
69 /*
70 * Only match if the fwnode doesn't already have a proper struct device
71 * created for it.
72 */
73 if (fwnode && fwnode->dev != dev)
74 return 0;
75 return 1;
76}
77
3c702e99
LW
78static struct bus_type gpio_bus_type = {
79 .name = "gpio",
ced2af41 80 .match = gpio_bus_match,
3c702e99 81};
ff2b1359 82
3027743f
LA
83/*
84 * Number of GPIOs to use for the fast path in set array
85 */
86#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
87
d2876d08
DB
88/* gpio_lock prevents conflicts during gpio_desc[] table updates.
89 * While any GPIO is requested, its gpio_chip is not removable;
90 * each GPIO's "requested" flag serves as a lock and refcount.
91 */
0eb4c6c2 92DEFINE_SPINLOCK(gpio_lock);
d2876d08 93
bae48da2
AC
94static DEFINE_MUTEX(gpio_lookup_lock);
95static LIST_HEAD(gpio_lookup_list);
ff2b1359 96LIST_HEAD(gpio_devices);
6d86750c 97
a411e81e
BG
98static DEFINE_MUTEX(gpio_machine_hogs_mutex);
99static LIST_HEAD(gpio_machine_hogs);
100
a0b66a73
LW
101static void gpiochip_free_hogs(struct gpio_chip *gc);
102static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
103 struct lock_class_key *lock_key,
104 struct lock_class_key *request_key);
a0b66a73
LW
105static void gpiochip_irqchip_remove(struct gpio_chip *gc);
106static int gpiochip_irqchip_init_hw(struct gpio_chip *gc);
107static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc);
108static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc);
6d86750c 109
159f3cd9 110static bool gpiolib_initialized;
6d86750c 111
d2876d08
DB
112static inline void desc_set_label(struct gpio_desc *d, const char *label)
113{
d2876d08 114 d->label = label;
d2876d08
DB
115}
116
372e722e 117/**
950d55f5
TR
118 * gpio_to_desc - Convert a GPIO number to its descriptor
119 * @gpio: global GPIO number
120 *
121 * Returns:
122 * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
123 * with the given number exists in the system.
372e722e 124 */
79a9becd 125struct gpio_desc *gpio_to_desc(unsigned gpio)
372e722e 126{
ff2b1359 127 struct gpio_device *gdev;
14e85c0e
AC
128 unsigned long flags;
129
130 spin_lock_irqsave(&gpio_lock, flags);
131
ff2b1359 132 list_for_each_entry(gdev, &gpio_devices, list) {
fdeb8e15
LW
133 if (gdev->base <= gpio &&
134 gdev->base + gdev->ngpio > gpio) {
14e85c0e 135 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 136 return &gdev->descs[gpio - gdev->base];
14e85c0e
AC
137 }
138 }
139
140 spin_unlock_irqrestore(&gpio_lock, flags);
141
0e9a5edf 142 if (!gpio_is_valid(gpio))
c47d9e1b 143 pr_warn("invalid GPIO %d\n", gpio);
0e9a5edf 144
14e85c0e 145 return NULL;
372e722e 146}
79a9becd 147EXPORT_SYMBOL_GPL(gpio_to_desc);
372e722e 148
d468bf9e 149/**
950d55f5
TR
150 * gpiochip_get_desc - get the GPIO descriptor corresponding to the given
151 * hardware number for this chip
a0b66a73 152 * @gc: GPIO chip
950d55f5
TR
153 * @hwnum: hardware number of the GPIO for this chip
154 *
155 * Returns:
35c6cfb4 156 * A pointer to the GPIO descriptor or ``ERR_PTR(-EINVAL)`` if no GPIO exists
950d55f5 157 * in the given chip for the specified hardware number.
d468bf9e 158 */
a0b66a73 159struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc,
06863620 160 unsigned int hwnum)
d468bf9e 161{
a0b66a73 162 struct gpio_device *gdev = gc->gpiodev;
fdeb8e15
LW
163
164 if (hwnum >= gdev->ngpio)
b7d0a28a 165 return ERR_PTR(-EINVAL);
d468bf9e 166
fdeb8e15 167 return &gdev->descs[hwnum];
d468bf9e 168}
97795420 169EXPORT_SYMBOL_GPL(gpiochip_get_desc);
372e722e
AC
170
171/**
950d55f5
TR
172 * desc_to_gpio - convert a GPIO descriptor to the integer namespace
173 * @desc: GPIO descriptor
174 *
372e722e 175 * This should disappear in the future but is needed since we still
950d55f5
TR
176 * use GPIO numbers for error messages and sysfs nodes.
177 *
178 * Returns:
179 * The global GPIO number for the GPIO specified by its descriptor.
372e722e 180 */
79a9becd 181int desc_to_gpio(const struct gpio_desc *desc)
372e722e 182{
fdeb8e15 183 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
372e722e 184}
79a9becd 185EXPORT_SYMBOL_GPL(desc_to_gpio);
372e722e
AC
186
187
79a9becd
AC
188/**
189 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
190 * @desc: descriptor to return the chip of
191 */
192struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
372e722e 193{
dd3b9a44 194 if (!desc || !desc->gdev)
fdeb8e15
LW
195 return NULL;
196 return desc->gdev->chip;
372e722e 197}
79a9becd 198EXPORT_SYMBOL_GPL(gpiod_to_chip);
d2876d08 199
8d0aab2f
AV
200/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
201static int gpiochip_find_base(int ngpio)
202{
ff2b1359 203 struct gpio_device *gdev;
7b61212f 204 int base = GPIO_DYNAMIC_BASE;
8d0aab2f 205
7b61212f 206 list_for_each_entry(gdev, &gpio_devices, list) {
83cabe33 207 /* found a free space? */
7b61212f 208 if (gdev->base >= base + ngpio)
83cabe33 209 break;
7b61212f
CL
210 /* nope, check the space right after the chip */
211 base = gdev->base + gdev->ngpio;
8d0aab2f
AV
212 }
213
83cabe33 214 if (gpio_is_valid(base)) {
8d0aab2f 215 pr_debug("%s: found new base at %d\n", __func__, base);
83cabe33
AC
216 return base;
217 } else {
218 pr_err("%s: cannot find free range\n", __func__);
219 return -ENOSPC;
169b6a7a 220 }
169b6a7a
AV
221}
222
79a9becd
AC
223/**
224 * gpiod_get_direction - return the current direction of a GPIO
225 * @desc: GPIO to get the direction of
226 *
94fc7309 227 * Returns 0 for output, 1 for input, or an error code in case of error.
79a9becd
AC
228 *
229 * This function may sleep if gpiod_cansleep() is true.
230 */
8e53b0f1 231int gpiod_get_direction(struct gpio_desc *desc)
80b0a602 232{
a0b66a73 233 struct gpio_chip *gc;
13daf489 234 unsigned int offset;
d377f56f 235 int ret;
80b0a602 236
a0b66a73 237 gc = gpiod_to_chip(desc);
372e722e 238 offset = gpio_chip_hwgpio(desc);
80b0a602 239
256efaea
RK
240 /*
241 * Open drain emulation using input mode may incorrectly report
242 * input here, fix that up.
243 */
244 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) &&
245 test_bit(FLAG_IS_OUT, &desc->flags))
246 return 0;
247
a0b66a73 248 if (!gc->get_direction)
d0121b85 249 return -ENOTSUPP;
80b0a602 250
a0b66a73 251 ret = gc->get_direction(gc, offset);
4fc5bfeb
AS
252 if (ret < 0)
253 return ret;
254
255 /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */
256 if (ret > 0)
d377f56f 257 ret = 1;
4fc5bfeb
AS
258
259 assign_bit(FLAG_IS_OUT, &desc->flags, !ret);
260
d377f56f 261 return ret;
80b0a602 262}
79a9becd 263EXPORT_SYMBOL_GPL(gpiod_get_direction);
80b0a602 264
1a989d0f
AC
265/*
266 * Add a new chip to the global chips list, keeping the list of chips sorted
ef7c7553 267 * by range(means [base, base + ngpio - 1]) order.
1a989d0f
AC
268 *
269 * Return -EBUSY if the new chip overlaps with some other chip's integer
270 * space.
271 */
ff2b1359 272static int gpiodev_add_to_list(struct gpio_device *gdev)
1a989d0f 273{
a961f9b4 274 struct gpio_device *prev, *next;
1a989d0f 275
ff2b1359 276 if (list_empty(&gpio_devices)) {
a961f9b4 277 /* initial entry in list */
ff2b1359 278 list_add_tail(&gdev->list, &gpio_devices);
e28ecca6 279 return 0;
1a989d0f
AC
280 }
281
243cfa6a 282 next = list_first_entry(&gpio_devices, struct gpio_device, list);
a961f9b4
BJZ
283 if (gdev->base + gdev->ngpio <= next->base) {
284 /* add before first entry */
285 list_add(&gdev->list, &gpio_devices);
286 return 0;
1a989d0f
AC
287 }
288
243cfa6a 289 prev = list_last_entry(&gpio_devices, struct gpio_device, list);
a961f9b4
BJZ
290 if (prev->base + prev->ngpio <= gdev->base) {
291 /* add behind last entry */
292 list_add_tail(&gdev->list, &gpio_devices);
96098df1 293 return 0;
1a989d0f
AC
294 }
295
a961f9b4
BJZ
296 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
297 /* at the end of the list */
298 if (&next->list == &gpio_devices)
299 break;
1a989d0f 300
a961f9b4
BJZ
301 /* add between prev and next */
302 if (prev->base + prev->ngpio <= gdev->base
303 && gdev->base + gdev->ngpio <= next->base) {
304 list_add(&gdev->list, &prev->list);
305 return 0;
306 }
307 }
308
a961f9b4 309 return -EBUSY;
1a989d0f
AC
310}
311
950d55f5 312/*
f881bab0 313 * Convert a GPIO name to its descriptor
582838ea
GU
314 * Note that there is no guarantee that GPIO names are globally unique!
315 * Hence this function will return, if it exists, a reference to the first GPIO
316 * line found that matches the given name.
f881bab0
LW
317 */
318static struct gpio_desc *gpio_name_to_desc(const char * const name)
319{
ff2b1359 320 struct gpio_device *gdev;
f881bab0
LW
321 unsigned long flags;
322
ee203bbd
MM
323 if (!name)
324 return NULL;
325
f881bab0
LW
326 spin_lock_irqsave(&gpio_lock, flags);
327
ff2b1359 328 list_for_each_entry(gdev, &gpio_devices, list) {
66f46e37 329 struct gpio_desc *desc;
f881bab0 330
66f46e37
AS
331 for_each_gpio_desc(gdev->chip, desc) {
332 if (desc->name && !strcmp(desc->name, name)) {
f881bab0 333 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 334 return desc;
f881bab0
LW
335 }
336 }
337 }
338
339 spin_unlock_irqrestore(&gpio_lock, flags);
340
341 return NULL;
342}
343
5f3ca732 344/*
582838ea
GU
345 * Take the names from gc->names and assign them to their GPIO descriptors.
346 * Warn if a name is already used for a GPIO line on a different GPIO chip.
5f3ca732 347 *
582838ea
GU
348 * Note that:
349 * 1. Non-unique names are still accepted,
350 * 2. Name collisions within the same GPIO chip are not reported.
5f3ca732
MP
351 */
352static int gpiochip_set_desc_names(struct gpio_chip *gc)
353{
fdeb8e15 354 struct gpio_device *gdev = gc->gpiodev;
5f3ca732
MP
355 int i;
356
5f3ca732
MP
357 /* First check all names if they are unique */
358 for (i = 0; i != gc->ngpio; ++i) {
359 struct gpio_desc *gpio;
360
361 gpio = gpio_name_to_desc(gc->names[i]);
f881bab0 362 if (gpio)
fdeb8e15 363 dev_warn(&gdev->dev,
34ffd85d 364 "Detected name collision for GPIO name '%s'\n",
f881bab0 365 gc->names[i]);
5f3ca732
MP
366 }
367
368 /* Then add all names to the GPIO descriptors */
369 for (i = 0; i != gc->ngpio; ++i)
fdeb8e15 370 gdev->descs[i].name = gc->names[i];
5f3ca732
MP
371
372 return 0;
373}
374
32fc5aa2 375/*
0c5ebb4c 376 * gpiochip_set_names - Set GPIO line names using device properties
32fc5aa2
BG
377 * @chip: GPIO chip whose lines should be named, if possible
378 *
379 * Looks for device property "gpio-line-names" and if it exists assigns
380 * GPIO line names for the chip. The memory allocated for the assigned
b41ba2ec 381 * names belong to the underlying firmware node and should not be released
32fc5aa2
BG
382 * by the caller.
383 */
0c5ebb4c 384static int gpiochip_set_names(struct gpio_chip *chip)
32fc5aa2
BG
385{
386 struct gpio_device *gdev = chip->gpiodev;
4ef339bc 387 struct device *dev = &gdev->dev;
32fc5aa2
BG
388 const char **names;
389 int ret, i;
390 int count;
391
4ef339bc 392 count = device_property_string_array_count(dev, "gpio-line-names");
32fc5aa2
BG
393 if (count < 0)
394 return 0;
395
4e804c39
SP
396 /*
397 * When offset is set in the driver side we assume the driver internally
398 * is using more than one gpiochip per the same device. We have to stop
399 * setting friendly names if the specified ones with 'gpio-line-names'
400 * are less than the offset in the device itself. This means all the
401 * lines are not present for every single pin within all the internal
402 * gpiochips.
403 */
404 if (count <= chip->offset) {
4ef339bc 405 dev_warn(dev, "gpio-line-names too short (length %d), cannot map names for the gpiochip at offset %u\n",
4e804c39
SP
406 count, chip->offset);
407 return 0;
32fc5aa2
BG
408 }
409
410 names = kcalloc(count, sizeof(*names), GFP_KERNEL);
411 if (!names)
412 return -ENOMEM;
413
4ef339bc 414 ret = device_property_read_string_array(dev, "gpio-line-names",
32fc5aa2
BG
415 names, count);
416 if (ret < 0) {
4ef339bc 417 dev_warn(dev, "failed to read GPIO line names\n");
32fc5aa2
BG
418 kfree(names);
419 return ret;
420 }
421
4e804c39
SP
422 /*
423 * When more that one gpiochip per device is used, 'count' can
424 * contain at most number gpiochips x chip->ngpio. We have to
425 * correctly distribute all defined lines taking into account
426 * chip->offset as starting point from where we will assign
427 * the names to pins from the 'names' array. Since property
428 * 'gpio-line-names' cannot contains gaps, we have to be sure
429 * we only assign those pins that really exists since chip->ngpio
430 * can be different of the chip->offset.
431 */
432 count = (count > chip->offset) ? count - chip->offset : count;
433 if (count > chip->ngpio)
434 count = chip->ngpio;
435
c73960bb
PR
436 for (i = 0; i < count; i++) {
437 /*
438 * Allow overriding "fixed" names provided by the GPIO
439 * provider. The "fixed" names are more often than not
440 * generic and less informative than the names given in
441 * device properties.
442 */
443 if (names[chip->offset + i] && names[chip->offset + i][0])
444 gdev->descs[i].name = names[chip->offset + i];
445 }
32fc5aa2
BG
446
447 kfree(names);
448
449 return 0;
450}
451
a0b66a73 452static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc)
e4371f6e
SB
453{
454 unsigned long *p;
455
a0b66a73 456 p = bitmap_alloc(gc->ngpio, GFP_KERNEL);
e4371f6e
SB
457 if (!p)
458 return NULL;
459
460 /* Assume by default all GPIOs are valid */
a0b66a73 461 bitmap_fill(p, gc->ngpio);
e4371f6e
SB
462
463 return p;
464}
465
27043a7d
AS
466static unsigned int gpiochip_count_reserved_ranges(struct gpio_chip *gc)
467{
4ef339bc 468 struct device *dev = &gc->gpiodev->dev;
27043a7d
AS
469 int size;
470
471 /* Format is "start, count, ..." */
4ef339bc 472 size = device_property_count_u32(dev, "gpio-reserved-ranges");
27043a7d
AS
473 if (size > 0 && size % 2 == 0)
474 return size;
475
476 return 0;
477}
478
f626d6df 479static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
726cb3ba 480{
27043a7d 481 if (!(gpiochip_count_reserved_ranges(gc) || gc->init_valid_mask))
726cb3ba
SB
482 return 0;
483
f626d6df
LW
484 gc->valid_mask = gpiochip_allocate_mask(gc);
485 if (!gc->valid_mask)
726cb3ba
SB
486 return -ENOMEM;
487
488 return 0;
489}
490
27043a7d
AS
491static int gpiochip_apply_reserved_ranges(struct gpio_chip *gc)
492{
4ef339bc 493 struct device *dev = &gc->gpiodev->dev;
27043a7d
AS
494 unsigned int size;
495 u32 *ranges;
496 int ret;
497
498 size = gpiochip_count_reserved_ranges(gc);
499 if (size == 0)
500 return 0;
501
502 ranges = kmalloc_array(size, sizeof(*ranges), GFP_KERNEL);
503 if (!ranges)
504 return -ENOMEM;
505
4ef339bc
AS
506 ret = device_property_read_u32_array(dev, "gpio-reserved-ranges",
507 ranges, size);
27043a7d
AS
508 if (ret) {
509 kfree(ranges);
510 return ret;
511 }
512
513 while (size) {
514 u32 count = ranges[--size];
515 u32 start = ranges[--size];
516
517 if (start >= gc->ngpio || start + count > gc->ngpio)
518 continue;
519
520 bitmap_clear(gc->valid_mask, start, count);
521 }
522
523 kfree(ranges);
524 return 0;
525}
526
c9fc5aff 527static int gpiochip_init_valid_mask(struct gpio_chip *gc)
f8ec92a9 528{
27043a7d
AS
529 int ret;
530
531 ret = gpiochip_apply_reserved_ranges(gc);
532 if (ret)
533 return ret;
534
c9fc5aff
LW
535 if (gc->init_valid_mask)
536 return gc->init_valid_mask(gc,
537 gc->valid_mask,
538 gc->ngpio);
f8ec92a9
RRD
539
540 return 0;
541}
542
a0b66a73 543static void gpiochip_free_valid_mask(struct gpio_chip *gc)
726cb3ba 544{
a0b66a73
LW
545 bitmap_free(gc->valid_mask);
546 gc->valid_mask = NULL;
726cb3ba
SB
547}
548
b056ca1c
AS
549static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
550{
c40aa80d
AS
551 /*
552 * Device Tree platforms are supposed to use "gpio-ranges"
553 * property. This check ensures that the ->add_pin_ranges()
554 * won't be called for them.
555 */
556 if (device_property_present(&gc->gpiodev->dev, "gpio-ranges"))
557 return 0;
558
b056ca1c
AS
559 if (gc->add_pin_ranges)
560 return gc->add_pin_ranges(gc);
561
562 return 0;
563}
564
a0b66a73 565bool gpiochip_line_is_valid(const struct gpio_chip *gc,
726cb3ba
SB
566 unsigned int offset)
567{
568 /* No mask means all valid */
a0b66a73 569 if (likely(!gc->valid_mask))
726cb3ba 570 return true;
a0b66a73 571 return test_bit(offset, gc->valid_mask);
726cb3ba
SB
572}
573EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
574
7aa90f90 575static void gpiodev_release(struct device *dev)
ff2b1359 576{
3b7c7478 577 struct gpio_device *gdev = to_gpio_device(dev);
cf25ef6b 578 unsigned long flags;
ff2b1359 579
cf25ef6b 580 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 581 list_del(&gdev->list);
cf25ef6b
JH
582 spin_unlock_irqrestore(&gpio_lock, flags);
583
8d4a85b6 584 ida_free(&gpio_ida, gdev->id);
fcf273e5 585 kfree_const(gdev->label);
476e2fc5 586 kfree(gdev->descs);
9efd9e69 587 kfree(gdev);
ff2b1359
LW
588}
589
1f5eb8b1
KG
590#ifdef CONFIG_GPIO_CDEV
591#define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt))
592#define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev))
593#else
594/*
595 * gpiolib_cdev_register() indirectly calls device_add(), which is still
596 * required even when cdev is not selected.
597 */
598#define gcdev_register(gdev, devt) device_add(&(gdev)->dev)
599#define gcdev_unregister(gdev) device_del(&(gdev)->dev)
600#endif
601
159f3cd9
GR
602static int gpiochip_setup_dev(struct gpio_device *gdev)
603{
67f64d15 604 struct fwnode_handle *fwnode = dev_fwnode(&gdev->dev);
d377f56f 605 int ret;
159f3cd9 606
38dfa56b
SK
607 /*
608 * If fwnode doesn't belong to another device, it's safe to clear its
609 * initialized flag.
610 */
67f64d15
AS
611 if (fwnode && !fwnode->dev)
612 fwnode_dev_initialized(fwnode, false);
38dfa56b 613
1f5eb8b1 614 ret = gcdev_register(gdev, gpio_devt);
d377f56f
LW
615 if (ret)
616 return ret;
111379dc 617
ec851b23 618 /* From this point, the .release() function cleans up gpio_device */
7aa90f90 619 gdev->dev.release = gpiodev_release;
ec851b23 620
d377f56f
LW
621 ret = gpiochip_sysfs_register(gdev);
622 if (ret)
159f3cd9
GR
623 goto err_remove_device;
624
262b9011
GU
625 dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base,
626 gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic");
159f3cd9
GR
627
628 return 0;
629
630err_remove_device:
1f5eb8b1 631 gcdev_unregister(gdev);
d377f56f 632 return ret;
159f3cd9
GR
633}
634
a0b66a73 635static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog)
a411e81e
BG
636{
637 struct gpio_desc *desc;
638 int rv;
639
a0b66a73 640 desc = gpiochip_get_desc(gc, hog->chip_hwnum);
a411e81e 641 if (IS_ERR(desc)) {
262b9011
GU
642 chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__,
643 PTR_ERR(desc));
a411e81e
BG
644 return;
645 }
646
ba3efdff 647 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
a411e81e
BG
648 return;
649
650 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
651 if (rv)
262b9011
GU
652 gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n",
653 __func__, gc->label, hog->chip_hwnum, rv);
a411e81e
BG
654}
655
a0b66a73 656static void machine_gpiochip_add(struct gpio_chip *gc)
a411e81e
BG
657{
658 struct gpiod_hog *hog;
659
660 mutex_lock(&gpio_machine_hogs_mutex);
661
662 list_for_each_entry(hog, &gpio_machine_hogs, list) {
a0b66a73
LW
663 if (!strcmp(gc->label, hog->chip_label))
664 gpiochip_machine_hog(gc, hog);
a411e81e
BG
665 }
666
667 mutex_unlock(&gpio_machine_hogs_mutex);
668}
669
159f3cd9
GR
670static void gpiochip_setup_devs(void)
671{
672 struct gpio_device *gdev;
d377f56f 673 int ret;
159f3cd9
GR
674
675 list_for_each_entry(gdev, &gpio_devices, list) {
d377f56f
LW
676 ret = gpiochip_setup_dev(gdev);
677 if (ret)
262b9011
GU
678 dev_err(&gdev->dev,
679 "Failed to initialize gpio device (%d)\n", ret);
159f3cd9
GR
680 }
681}
682
7b59bdbc
AS
683static void gpiochip_set_data(struct gpio_chip *gc, void *data)
684{
685 gc->gpiodev->data = data;
686}
687
8deb779d
AS
688/**
689 * gpiochip_get_data() - get per-subdriver data for the chip
690 * @gc: GPIO chip
691 *
692 * Returns:
693 * The per-subdriver data for the chip.
694 */
695void *gpiochip_get_data(struct gpio_chip *gc)
696{
697 return gc->gpiodev->data;
698}
699EXPORT_SYMBOL_GPL(gpiochip_get_data);
700
a0b66a73 701int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
39c3fd58
AL
702 struct lock_class_key *lock_key,
703 struct lock_class_key *request_key)
d2876d08 704{
ff2b1359 705 struct gpio_device *gdev;
e5ab49cd 706 unsigned long flags;
e5ab49cd 707 unsigned int i;
ec851b23
ZH
708 u32 ngpios = 0;
709 int base = 0;
e5ab49cd 710 int ret = 0;
d2876d08 711
8a4adcf6
LW
712 /*
713 * If the calling driver did not initialize firmware node, do it here
714 * using the parent device, if any.
715 */
716 if (!gc->fwnode && gc->parent)
717 gc->fwnode = dev_fwnode(gc->parent);
990f6756 718
ff2b1359
LW
719 /*
720 * First: allocate and populate the internal stat container, and
721 * set up the struct device.
722 */
969f07b4 723 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
ff2b1359 724 if (!gdev)
14e85c0e 725 return -ENOMEM;
3c702e99 726 gdev->dev.bus = &gpio_bus_type;
1df62542 727 gdev->dev.parent = gc->parent;
a0b66a73 728 gdev->chip = gc;
7b59bdbc 729
a0b66a73 730 gc->gpiodev = gdev;
7b59bdbc 731 gpiochip_set_data(gc, data);
acc6e331 732
70d0fc42 733 device_set_node(&gdev->dev, gc->fwnode);
6cb59afe 734
8d4a85b6 735 gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL);
ff2b1359 736 if (gdev->id < 0) {
d377f56f 737 ret = gdev->id;
ff2b1359
LW
738 goto err_free_gdev;
739 }
c351bb64
QW
740
741 ret = dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id);
742 if (ret)
743 goto err_free_ida;
744
ff2b1359 745 device_initialize(&gdev->dev);
a0b66a73
LW
746 if (gc->parent && gc->parent->driver)
747 gdev->owner = gc->parent->driver->owner;
748 else if (gc->owner)
ff2b1359 749 /* TODO: remove chip->owner */
a0b66a73 750 gdev->owner = gc->owner;
ff2b1359
LW
751 else
752 gdev->owner = THIS_MODULE;
d2876d08 753
9dbd1ab2
BG
754 /*
755 * Try the device properties if the driver didn't supply the number
756 * of GPIO lines.
757 */
ec851b23
ZH
758 ngpios = gc->ngpio;
759 if (ngpios == 0) {
9dbd1ab2
BG
760 ret = device_property_read_u32(&gdev->dev, "ngpios", &ngpios);
761 if (ret == -ENODATA)
762 /*
763 * -ENODATA means that there is no property found and
764 * we want to issue the error message to the user.
765 * Besides that, we want to return different error code
766 * to state that supplied value is not valid.
767 */
768 ngpios = 0;
769 else if (ret)
ec851b23 770 goto err_free_dev_name;
9dbd1ab2
BG
771
772 gc->ngpio = ngpios;
773 }
774
a0b66a73
LW
775 if (gc->ngpio == 0) {
776 chip_err(gc, "tried to insert a GPIO chip with zero lines\n");
d377f56f 777 ret = -EINVAL;
ec851b23 778 goto err_free_dev_name;
5ed41cc4 779 }
df4878e9 780
a0b66a73
LW
781 if (gc->ngpio > FASTPATH_NGPIO)
782 chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n",
783 gc->ngpio, FASTPATH_NGPIO);
3027743f 784
ec851b23
ZH
785 gdev->descs = kcalloc(gc->ngpio, sizeof(*gdev->descs), GFP_KERNEL);
786 if (!gdev->descs) {
787 ret = -ENOMEM;
788 goto err_free_dev_name;
789 }
790
a0b66a73 791 gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL);
df4878e9 792 if (!gdev->label) {
d377f56f 793 ret = -ENOMEM;
476e2fc5 794 goto err_free_descs;
df4878e9
LW
795 }
796
a0b66a73 797 gdev->ngpio = gc->ngpio;
5ed41cc4 798
d2876d08
DB
799 spin_lock_irqsave(&gpio_lock, flags);
800
fdeb8e15
LW
801 /*
802 * TODO: this allocates a Linux GPIO number base in the global
803 * GPIO numberspace for this chip. In the long run we want to
804 * get *rid* of this numberspace and use only descriptors, but
805 * it may be a pipe dream. It will not happen before we get rid
806 * of the sysfs interface anyways.
807 */
ec851b23 808 base = gc->base;
8d0aab2f 809 if (base < 0) {
a0b66a73 810 base = gpiochip_find_base(gc->ngpio);
8d0aab2f 811 if (base < 0) {
225fce83 812 spin_unlock_irqrestore(&gpio_lock, flags);
ec851b23
ZH
813 ret = base;
814 base = 0;
476e2fc5 815 goto err_free_label;
8d0aab2f 816 }
fdeb8e15
LW
817 /*
818 * TODO: it should not be necessary to reflect the assigned
819 * base outside of the GPIO subsystem. Go over drivers and
820 * see if anyone makes use of this, else drop this and assign
821 * a poison instead.
822 */
a0b66a73 823 gc->base = base;
502df79b
CL
824 } else {
825 dev_warn(&gdev->dev,
826 "Static allocation of GPIO base is deprecated, use dynamic allocation.\n");
8d0aab2f 827 }
fdeb8e15 828 gdev->base = base;
8d0aab2f 829
d377f56f
LW
830 ret = gpiodev_add_to_list(gdev);
831 if (ret) {
05aa5203 832 spin_unlock_irqrestore(&gpio_lock, flags);
24a9dbb1 833 chip_err(gc, "GPIO integer space overlap, cannot add chip\n");
476e2fc5 834 goto err_free_label;
05aa5203 835 }
1a989d0f 836
a0b66a73 837 for (i = 0; i < gc->ngpio; i++)
767cd17a 838 gdev->descs[i].gdev = gdev;
14e85c0e 839
207270dd
DC
840 spin_unlock_irqrestore(&gpio_lock, flags);
841
6accc376 842 BLOCKING_INIT_NOTIFIER_HEAD(&gdev->notifier);
bdbbae24 843 init_rwsem(&gdev->sem);
51c1064e 844
f23f1516 845#ifdef CONFIG_PINCTRL
20ec3e39 846 INIT_LIST_HEAD(&gdev->pin_ranges);
f23f1516
SH
847#endif
848
c73960bb 849 if (gc->names) {
7cba1a4d 850 ret = gpiochip_set_desc_names(gc);
c73960bb
PR
851 if (ret)
852 goto err_remove_from_list;
853 }
0c5ebb4c 854 ret = gpiochip_set_names(gc);
d377f56f 855 if (ret)
5f3ca732
MP
856 goto err_remove_from_list;
857
a0b66a73 858 ret = gpiochip_alloc_valid_mask(gc);
d377f56f 859 if (ret)
48057ed1 860 goto err_remove_from_list;
e0d89728 861
a0b66a73 862 ret = of_gpiochip_add(gc);
d377f56f 863 if (ret)
48057ed1 864 goto err_free_gpiochip_mask;
28355f81 865
a0b66a73 866 ret = gpiochip_init_valid_mask(gc);
d377f56f 867 if (ret)
35779890 868 goto err_remove_of_chip;
f8ec92a9 869
a0b66a73 870 for (i = 0; i < gc->ngpio; i++) {
3edfb7bd
RRD
871 struct gpio_desc *desc = &gdev->descs[i];
872
a0b66a73 873 if (gc->get_direction && gpiochip_line_is_valid(gc, i)) {
4fc5bfeb 874 assign_bit(FLAG_IS_OUT,
a0b66a73 875 &desc->flags, !gc->get_direction(gc, i));
d95da993 876 } else {
4fc5bfeb 877 assign_bit(FLAG_IS_OUT,
a0b66a73 878 &desc->flags, !gc->direction_input);
d95da993 879 }
3edfb7bd
RRD
880 }
881
a0b66a73 882 ret = gpiochip_add_pin_ranges(gc);
b056ca1c
AS
883 if (ret)
884 goto err_remove_of_chip;
885
a0b66a73 886 acpi_gpiochip_add(gc);
391c970c 887
a0b66a73 888 machine_gpiochip_add(gc);
a411e81e 889
a0b66a73 890 ret = gpiochip_irqchip_init_valid_mask(gc);
9411e3aa
AS
891 if (ret)
892 goto err_remove_acpi_chip;
893
a0b66a73 894 ret = gpiochip_irqchip_init_hw(gc);
fbdf8d4b 895 if (ret)
48057ed1
LW
896 goto err_remove_acpi_chip;
897
a0b66a73 898 ret = gpiochip_add_irqchip(gc, lock_key, request_key);
fbdf8d4b 899 if (ret)
48057ed1
LW
900 goto err_remove_irqchip_mask;
901
3c702e99
LW
902 /*
903 * By first adding the chardev, and then adding the device,
904 * we get a device node entry in sysfs under
905 * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
906 * coldplug of device nodes and other udev business.
159f3cd9
GR
907 * We can do this only if gpiolib has been initialized.
908 * Otherwise, defer until later.
3c702e99 909 */
159f3cd9 910 if (gpiolib_initialized) {
d377f56f
LW
911 ret = gpiochip_setup_dev(gdev);
912 if (ret)
48057ed1 913 goto err_remove_irqchip;
159f3cd9 914 }
cedb1881 915 return 0;
3bae4811 916
48057ed1 917err_remove_irqchip:
a0b66a73 918 gpiochip_irqchip_remove(gc);
48057ed1 919err_remove_irqchip_mask:
a0b66a73 920 gpiochip_irqchip_free_valid_mask(gc);
35779890 921err_remove_acpi_chip:
a0b66a73 922 acpi_gpiochip_remove(gc);
35779890 923err_remove_of_chip:
a0b66a73
LW
924 gpiochip_free_hogs(gc);
925 of_gpiochip_remove(gc);
35779890 926err_free_gpiochip_mask:
a0b66a73
LW
927 gpiochip_remove_pin_ranges(gc);
928 gpiochip_free_valid_mask(gc);
ec851b23
ZH
929 if (gdev->dev.release) {
930 /* release() has been registered by gpiochip_setup_dev() */
dc0989e3 931 gpio_device_put(gdev);
ec851b23
ZH
932 goto err_print_message;
933 }
5f3ca732 934err_remove_from_list:
225fce83 935 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 936 list_del(&gdev->list);
3bae4811 937 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 938err_free_label:
fcf273e5 939 kfree_const(gdev->label);
476e2fc5
GR
940err_free_descs:
941 kfree(gdev->descs);
c351bb64
QW
942err_free_dev_name:
943 kfree(dev_name(&gdev->dev));
a05a1404 944err_free_ida:
8d4a85b6 945 ida_free(&gpio_ida, gdev->id);
a05a1404 946err_free_gdev:
ec851b23
ZH
947 kfree(gdev);
948err_print_message:
d2876d08 949 /* failures here can mean systems won't boot... */
3cc1fb73
GS
950 if (ret != -EPROBE_DEFER) {
951 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
ec851b23 952 base, base + (int)ngpios - 1,
3cc1fb73
GS
953 gc->label ? : "generic", ret);
954 }
d377f56f 955 return ret;
d2876d08 956}
959bc7b2 957EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
d2876d08
DB
958
959/**
960 * gpiochip_remove() - unregister a gpio_chip
a0b66a73 961 * @gc: the chip to unregister
d2876d08
DB
962 *
963 * A gpio_chip with any GPIOs still requested may not be removed.
964 */
a0b66a73 965void gpiochip_remove(struct gpio_chip *gc)
d2876d08 966{
a0b66a73 967 struct gpio_device *gdev = gc->gpiodev;
d2876d08 968 unsigned long flags;
869233f8 969 unsigned int i;
d2876d08 970
bdbbae24
BG
971 down_write(&gdev->sem);
972
ff2b1359 973 /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
afbc4f31 974 gpiochip_sysfs_unregister(gdev);
a0b66a73 975 gpiochip_free_hogs(gc);
bd203bd5
BJZ
976 /* Numb the device, cancelling all outstanding operations */
977 gdev->chip = NULL;
a0b66a73
LW
978 gpiochip_irqchip_remove(gc);
979 acpi_gpiochip_remove(gc);
980 of_gpiochip_remove(gc);
981 gpiochip_remove_pin_ranges(gc);
982 gpiochip_free_valid_mask(gc);
43c54eca
LW
983 /*
984 * We accept no more calls into the driver from this point, so
7b59bdbc 985 * NULL the driver data pointer.
43c54eca 986 */
7b59bdbc 987 gpiochip_set_data(gc, NULL);
391c970c 988
6798acaa 989 spin_lock_irqsave(&gpio_lock, flags);
fdeb8e15 990 for (i = 0; i < gdev->ngpio; i++) {
a0b66a73 991 if (gpiochip_is_requested(gc, i))
869233f8 992 break;
d2876d08 993 }
d2876d08 994 spin_unlock_irqrestore(&gpio_lock, flags);
14e85c0e 995
ca18a852 996 if (i != gdev->ngpio)
fdeb8e15 997 dev_crit(&gdev->dev,
58383c78 998 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
fab28b89 999
ff2b1359
LW
1000 /*
1001 * The gpiochip side puts its use of the device to rest here:
1002 * if there are no userspace clients, the chardev and device will
1003 * be removed, else it will be dangling until the last user is
1004 * gone.
1005 */
1f5eb8b1 1006 gcdev_unregister(gdev);
bdbbae24 1007 up_write(&gdev->sem);
dc0989e3 1008 gpio_device_put(gdev);
d2876d08
DB
1009}
1010EXPORT_SYMBOL_GPL(gpiochip_remove);
1011
594fa265
GL
1012/**
1013 * gpiochip_find() - iterator for locating a specific gpio_chip
1014 * @data: data to pass to match function
950d55f5 1015 * @match: Callback function to check gpio_chip
594fa265
GL
1016 *
1017 * Similar to bus_find_device. It returns a reference to a gpio_chip as
1018 * determined by a user supplied @match callback. The callback should return
1019 * 0 if the device doesn't match and non-zero if it does. If the callback is
1020 * non-zero, this function will return to the caller and not iterate over any
1021 * more gpio_chips.
1022 */
07ce8ec7 1023struct gpio_chip *gpiochip_find(void *data,
a0b66a73 1024 int (*match)(struct gpio_chip *gc,
3d0f7cf0 1025 void *data))
594fa265 1026{
ff2b1359 1027 struct gpio_device *gdev;
a0b66a73 1028 struct gpio_chip *gc = NULL;
594fa265 1029 unsigned long flags;
594fa265
GL
1030
1031 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1032 list_for_each_entry(gdev, &gpio_devices, list)
acf06ff7 1033 if (gdev->chip && match(gdev->chip, data)) {
a0b66a73 1034 gc = gdev->chip;
594fa265 1035 break;
acf06ff7 1036 }
ff2b1359 1037
594fa265
GL
1038 spin_unlock_irqrestore(&gpio_lock, flags);
1039
a0b66a73 1040 return gc;
594fa265 1041}
8fa0c9bf 1042EXPORT_SYMBOL_GPL(gpiochip_find);
d2876d08 1043
a0b66a73 1044static int gpiochip_match_name(struct gpio_chip *gc, void *data)
79697ef9
AC
1045{
1046 const char *name = data;
1047
a0b66a73 1048 return !strcmp(gc->label, name);
79697ef9
AC
1049}
1050
1051static struct gpio_chip *find_chip_by_name(const char *name)
1052{
1053 return gpiochip_find((void *)name, gpiochip_match_name);
1054}
1055
14250520
LW
1056#ifdef CONFIG_GPIOLIB_IRQCHIP
1057
1058/*
1059 * The following is irqchip helper code for gpiochips.
1060 */
1061
9411e3aa
AS
1062static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
1063{
1064 struct gpio_irq_chip *girq = &gc->irq;
1065
1066 if (!girq->init_hw)
1067 return 0;
1068
1069 return girq->init_hw(gc);
1070}
1071
5fbe5b58 1072static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb 1073{
5fbe5b58
LW
1074 struct gpio_irq_chip *girq = &gc->irq;
1075
1076 if (!girq->init_valid_mask)
79b804cb
MW
1077 return 0;
1078
5fbe5b58
LW
1079 girq->valid_mask = gpiochip_allocate_mask(gc);
1080 if (!girq->valid_mask)
79b804cb
MW
1081 return -ENOMEM;
1082
5fbe5b58
LW
1083 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
1084
79b804cb
MW
1085 return 0;
1086}
1087
a0b66a73 1088static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 1089{
a0b66a73
LW
1090 bitmap_free(gc->irq.valid_mask);
1091 gc->irq.valid_mask = NULL;
79b804cb
MW
1092}
1093
a0b66a73 1094bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc,
64ff2c8e 1095 unsigned int offset)
79b804cb 1096{
a0b66a73 1097 if (!gpiochip_line_is_valid(gc, offset))
726cb3ba 1098 return false;
79b804cb 1099 /* No mask means all valid */
a0b66a73 1100 if (likely(!gc->irq.valid_mask))
79b804cb 1101 return true;
a0b66a73 1102 return test_bit(offset, gc->irq.valid_mask);
79b804cb 1103}
64ff2c8e 1104EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
79b804cb 1105
fdd61a01
LW
1106#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1107
1108/**
1109 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
1110 * to a gpiochip
1111 * @gc: the gpiochip to set the irqchip hierarchical handler to
1112 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
1113 * will then percolate up to the parent
1114 */
1115static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
1116 struct irq_chip *irqchip)
1117{
1118 /* DT will deal with mapping each IRQ as we go along */
1119 if (is_of_node(gc->irq.fwnode))
1120 return;
1121
1122 /*
1123 * This is for legacy and boardfile "irqchip" fwnodes: allocate
1124 * irqs upfront instead of dynamically since we don't have the
1125 * dynamic type of allocation that hardware description languages
1126 * provide. Once all GPIO drivers using board files are gone from
1127 * the kernel we can delete this code, but for a transitional period
1128 * it is necessary to keep this around.
1129 */
1130 if (is_fwnode_irqchip(gc->irq.fwnode)) {
1131 int i;
1132 int ret;
1133
1134 for (i = 0; i < gc->ngpio; i++) {
1135 struct irq_fwspec fwspec;
1136 unsigned int parent_hwirq;
1137 unsigned int parent_type;
1138 struct gpio_irq_chip *girq = &gc->irq;
1139
1140 /*
1141 * We call the child to parent translation function
1142 * only to check if the child IRQ is valid or not.
1143 * Just pick the rising edge type here as that is what
1144 * we likely need to support.
1145 */
1146 ret = girq->child_to_parent_hwirq(gc, i,
1147 IRQ_TYPE_EDGE_RISING,
1148 &parent_hwirq,
1149 &parent_type);
1150 if (ret) {
1151 chip_err(gc, "skip set-up on hwirq %d\n",
1152 i);
1153 continue;
1154 }
1155
1156 fwspec.fwnode = gc->irq.fwnode;
1157 /* This is the hwirq for the GPIO line side of things */
1158 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
1159 /* Just pick something */
1160 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
1161 fwspec.param_count = 2;
908334ab
JH
1162 ret = irq_domain_alloc_irqs(gc->irq.domain, 1,
1163 NUMA_NO_NODE, &fwspec);
fdd61a01
LW
1164 if (ret < 0) {
1165 chip_err(gc,
1166 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1167 i, parent_hwirq,
1168 ret);
1169 }
1170 }
1171 }
1172
1173 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1174
1175 return;
1176}
1177
1178static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1179 struct irq_fwspec *fwspec,
1180 unsigned long *hwirq,
1181 unsigned int *type)
1182{
1183 /* We support standard DT translation */
1184 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1185 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1186 }
1187
1188 /* This is for board files and others not using DT */
1189 if (is_fwnode_irqchip(fwspec->fwnode)) {
1190 int ret;
1191
1192 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1193 if (ret)
1194 return ret;
1195 WARN_ON(*type == IRQ_TYPE_NONE);
1196 return 0;
1197 }
1198 return -EINVAL;
1199}
1200
1201static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1202 unsigned int irq,
1203 unsigned int nr_irqs,
1204 void *data)
1205{
1206 struct gpio_chip *gc = d->host_data;
1207 irq_hw_number_t hwirq;
1208 unsigned int type = IRQ_TYPE_NONE;
1209 struct irq_fwspec *fwspec = data;
91a29af4 1210 union gpio_irq_fwspec gpio_parent_fwspec = {};
fdd61a01
LW
1211 unsigned int parent_hwirq;
1212 unsigned int parent_type;
1213 struct gpio_irq_chip *girq = &gc->irq;
1214 int ret;
1215
1216 /*
1217 * The nr_irqs parameter is always one except for PCI multi-MSI
1218 * so this should not happen.
1219 */
1220 WARN_ON(nr_irqs != 1);
1221
1222 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
1223 if (ret)
1224 return ret;
1225
db4064cc 1226 chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
fdd61a01
LW
1227
1228 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
1229 &parent_hwirq, &parent_type);
1230 if (ret) {
1231 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
1232 return ret;
1233 }
366950ee 1234 chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq);
fdd61a01
LW
1235
1236 /*
1237 * We set handle_bad_irq because the .set_type() should
1238 * always be invoked and set the right type of handler.
1239 */
1240 irq_domain_set_info(d,
1241 irq,
1242 hwirq,
1243 gc->irq.chip,
1244 gc,
1245 girq->handler,
1246 NULL, NULL);
1247 irq_set_probe(irq);
1248
fdd61a01 1249 /* This parent only handles asserted level IRQs */
91a29af4
MZ
1250 ret = girq->populate_parent_alloc_arg(gc, &gpio_parent_fwspec,
1251 parent_hwirq, parent_type);
1252 if (ret)
1253 return ret;
24258761 1254
366950ee 1255 chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
fdd61a01 1256 irq, parent_hwirq);
c34f6dc8 1257 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
91a29af4 1258 ret = irq_domain_alloc_irqs_parent(d, irq, 1, &gpio_parent_fwspec);
880b7cf2
KH
1259 /*
1260 * If the parent irqdomain is msi, the interrupts have already
1261 * been allocated, so the EEXIST is good.
1262 */
1263 if (irq_domain_is_msi(d->parent) && (ret == -EEXIST))
1264 ret = 0;
fdd61a01
LW
1265 if (ret)
1266 chip_err(gc,
1267 "failed to allocate parent hwirq %d for hwirq %lu\n",
1268 parent_hwirq, hwirq);
1269
1270 return ret;
1271}
1272
a0b66a73 1273static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc,
fdd61a01
LW
1274 unsigned int offset)
1275{
1276 return offset;
1277}
1278
1279static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
1280{
1281 ops->activate = gpiochip_irq_domain_activate;
1282 ops->deactivate = gpiochip_irq_domain_deactivate;
1283 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
fdd61a01
LW
1284
1285 /*
08f12b45 1286 * We only allow overriding the translate() and free() functions for
fdd61a01 1287 * hierarchical chips, and this should only be done if the user
08f12b45
LP
1288 * really need something other than 1:1 translation for translate()
1289 * callback and free if user wants to free up any resources which
1290 * were allocated during callbacks, for example populate_parent_alloc_arg.
fdd61a01
LW
1291 */
1292 if (!ops->translate)
1293 ops->translate = gpiochip_hierarchy_irq_domain_translate;
08f12b45
LP
1294 if (!ops->free)
1295 ops->free = irq_domain_free_irqs_common;
fdd61a01
LW
1296}
1297
1298static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1299{
1300 if (!gc->irq.child_to_parent_hwirq ||
1301 !gc->irq.fwnode) {
1302 chip_err(gc, "missing irqdomain vital data\n");
1303 return -EINVAL;
1304 }
1305
1306 if (!gc->irq.child_offset_to_irq)
1307 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
1308
24258761
KH
1309 if (!gc->irq.populate_parent_alloc_arg)
1310 gc->irq.populate_parent_alloc_arg =
fdd61a01
LW
1311 gpiochip_populate_parent_fwspec_twocell;
1312
1313 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
1314
1315 gc->irq.domain = irq_domain_create_hierarchy(
1316 gc->irq.parent_domain,
1317 0,
1318 gc->ngpio,
1319 gc->irq.fwnode,
1320 &gc->irq.child_irq_domain_ops,
1321 gc);
1322
1323 if (!gc->irq.domain)
1324 return -ENOMEM;
1325
1326 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
1327
1328 return 0;
1329}
1330
1331static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1332{
1333 return !!gc->irq.parent_domain;
1334}
1335
91a29af4
MZ
1336int gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc,
1337 union gpio_irq_fwspec *gfwspec,
1338 unsigned int parent_hwirq,
1339 unsigned int parent_type)
fdd61a01 1340{
91a29af4 1341 struct irq_fwspec *fwspec = &gfwspec->fwspec;
24258761 1342
a0b66a73 1343 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1344 fwspec->param_count = 2;
1345 fwspec->param[0] = parent_hwirq;
1346 fwspec->param[1] = parent_type;
24258761 1347
91a29af4 1348 return 0;
fdd61a01
LW
1349}
1350EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
1351
91a29af4
MZ
1352int gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc,
1353 union gpio_irq_fwspec *gfwspec,
1354 unsigned int parent_hwirq,
1355 unsigned int parent_type)
fdd61a01 1356{
91a29af4 1357 struct irq_fwspec *fwspec = &gfwspec->fwspec;
24258761 1358
a0b66a73 1359 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1360 fwspec->param_count = 4;
1361 fwspec->param[0] = 0;
1362 fwspec->param[1] = parent_hwirq;
1363 fwspec->param[2] = 0;
1364 fwspec->param[3] = parent_type;
24258761 1365
91a29af4 1366 return 0;
fdd61a01
LW
1367}
1368EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
1369
1370#else
1371
1372static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1373{
1374 return -EINVAL;
1375}
1376
1377static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1378{
1379 return false;
1380}
1381
1382#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
1383
14250520
LW
1384/**
1385 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
1386 * @d: the irqdomain used by this irqchip
1387 * @irq: the global irq number used by this GPIO irqchip irq
1388 * @hwirq: the local IRQ/GPIO line offset on this gpiochip
1389 *
1390 * This function will set up the mapping for a certain IRQ line on a
1391 * gpiochip by assigning the gpiochip as chip data, and using the irqchip
1392 * stored inside the gpiochip.
1393 */
db4064cc 1394int gpiochip_irq_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hwirq)
14250520 1395{
a0b66a73 1396 struct gpio_chip *gc = d->host_data;
d377f56f 1397 int ret = 0;
14250520 1398
a0b66a73 1399 if (!gpiochip_irqchip_irq_valid(gc, hwirq))
dc749a09
GS
1400 return -ENXIO;
1401
a0b66a73 1402 irq_set_chip_data(irq, gc);
a0a8bcf4
GS
1403 /*
1404 * This lock class tells lockdep that GPIO irqs are in a different
1405 * category than their parents, so it won't report false recursion.
1406 */
a0b66a73
LW
1407 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
1408 irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler);
d245b3f9 1409 /* Chips that use nested thread handlers have them marked */
a0b66a73 1410 if (gc->irq.threaded)
1c8732bb 1411 irq_set_nested_thread(irq, 1);
14250520 1412 irq_set_noprobe(irq);
23393d49 1413
a0b66a73
LW
1414 if (gc->irq.num_parents == 1)
1415 ret = irq_set_parent(irq, gc->irq.parents[0]);
1416 else if (gc->irq.map)
1417 ret = irq_set_parent(irq, gc->irq.map[hwirq]);
e0d89728 1418
d377f56f
LW
1419 if (ret < 0)
1420 return ret;
e0d89728 1421
1333b90f
LW
1422 /*
1423 * No set-up of the hardware will happen if IRQ_TYPE_NONE
1424 * is passed as default type.
1425 */
a0b66a73
LW
1426 if (gc->irq.default_type != IRQ_TYPE_NONE)
1427 irq_set_irq_type(irq, gc->irq.default_type);
14250520
LW
1428
1429 return 0;
1430}
1b95b4eb 1431EXPORT_SYMBOL_GPL(gpiochip_irq_map);
14250520 1432
1b95b4eb 1433void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
c3626fde 1434{
a0b66a73 1435 struct gpio_chip *gc = d->host_data;
1c8732bb 1436
a0b66a73 1437 if (gc->irq.threaded)
1c8732bb 1438 irq_set_nested_thread(irq, 0);
c3626fde
LW
1439 irq_set_chip_and_handler(irq, NULL, NULL);
1440 irq_set_chip_data(irq, NULL);
1441}
1b95b4eb 1442EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
c3626fde 1443
14250520
LW
1444static const struct irq_domain_ops gpiochip_domain_ops = {
1445 .map = gpiochip_irq_map,
c3626fde 1446 .unmap = gpiochip_irq_unmap,
14250520
LW
1447 /* Virtually all GPIO irqchips are twocell:ed */
1448 .xlate = irq_domain_xlate_twocell,
1449};
1450
fdd61a01
LW
1451/*
1452 * TODO: move these activate/deactivate in under the hierarchicial
1453 * irqchip implementation as static once SPMI and SSBI (all external
1454 * users) are phased over.
1455 */
ef74f70e
BM
1456/**
1457 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
1458 * @domain: The IRQ domain used by this IRQ chip
1459 * @data: Outermost irq_data associated with the IRQ
1460 * @reserve: If set, only reserve an interrupt vector instead of assigning one
1461 *
1462 * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
1463 * used as the activate function for the &struct irq_domain_ops. The host_data
1464 * for the IRQ domain must be the &struct gpio_chip.
1465 */
1466int gpiochip_irq_domain_activate(struct irq_domain *domain,
1467 struct irq_data *data, bool reserve)
1468{
a0b66a73 1469 struct gpio_chip *gc = domain->host_data;
db4064cc 1470 unsigned int hwirq = irqd_to_hwirq(data);
ef74f70e 1471
db4064cc 1472 return gpiochip_lock_as_irq(gc, hwirq);
ef74f70e
BM
1473}
1474EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
1475
1476/**
1477 * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
1478 * @domain: The IRQ domain used by this IRQ chip
1479 * @data: Outermost irq_data associated with the IRQ
1480 *
1481 * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
1482 * be used as the deactivate function for the &struct irq_domain_ops. The
1483 * host_data for the IRQ domain must be the &struct gpio_chip.
1484 */
1485void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
1486 struct irq_data *data)
1487{
a0b66a73 1488 struct gpio_chip *gc = domain->host_data;
db4064cc 1489 unsigned int hwirq = irqd_to_hwirq(data);
ef74f70e 1490
db4064cc 1491 return gpiochip_unlock_as_irq(gc, hwirq);
ef74f70e
BM
1492}
1493EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
1494
13daf489 1495static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset)
14250520 1496{
a0b66a73 1497 struct irq_domain *domain = gc->irq.domain;
fdd61a01 1498
5467801f
SP
1499#ifdef CONFIG_GPIOLIB_IRQCHIP
1500 /*
1501 * Avoid race condition with other code, which tries to lookup
1502 * an IRQ before the irqchip has been properly registered,
1503 * i.e. while gpiochip is still being brought up.
1504 */
1505 if (!gc->irq.initialized)
1506 return -EPROBE_DEFER;
1507#endif
1508
a0b66a73 1509 if (!gpiochip_irqchip_irq_valid(gc, offset))
4e6b8238 1510 return -ENXIO;
5b76e79c 1511
fdd61a01
LW
1512#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1513 if (irq_domain_is_hierarchy(domain)) {
1514 struct irq_fwspec spec;
1515
1516 spec.fwnode = domain->fwnode;
1517 spec.param_count = 2;
a0b66a73 1518 spec.param[0] = gc->irq.child_offset_to_irq(gc, offset);
fdd61a01
LW
1519 spec.param[1] = IRQ_TYPE_NONE;
1520
1521 return irq_create_fwspec_mapping(&spec);
1522 }
1523#endif
1524
1525 return irq_create_mapping(domain, offset);
14250520
LW
1526}
1527
704f0875 1528int gpiochip_irq_reqres(struct irq_data *d)
14250520 1529{
a0b66a73 1530 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1531 unsigned int hwirq = irqd_to_hwirq(d);
5b76e79c 1532
db4064cc 1533 return gpiochip_reqres_irq(gc, hwirq);
14250520 1534}
704f0875 1535EXPORT_SYMBOL(gpiochip_irq_reqres);
14250520 1536
704f0875 1537void gpiochip_irq_relres(struct irq_data *d)
14250520 1538{
a0b66a73 1539 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1540 unsigned int hwirq = irqd_to_hwirq(d);
14250520 1541
db4064cc 1542 gpiochip_relres_irq(gc, hwirq);
14250520 1543}
704f0875 1544EXPORT_SYMBOL(gpiochip_irq_relres);
14250520 1545
a8173820
MS
1546static void gpiochip_irq_mask(struct irq_data *d)
1547{
1548 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1549 unsigned int hwirq = irqd_to_hwirq(d);
a8173820
MS
1550
1551 if (gc->irq.irq_mask)
1552 gc->irq.irq_mask(d);
db4064cc 1553 gpiochip_disable_irq(gc, hwirq);
a8173820
MS
1554}
1555
1556static void gpiochip_irq_unmask(struct irq_data *d)
1557{
1558 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1559 unsigned int hwirq = irqd_to_hwirq(d);
a8173820 1560
db4064cc 1561 gpiochip_enable_irq(gc, hwirq);
a8173820
MS
1562 if (gc->irq.irq_unmask)
1563 gc->irq.irq_unmask(d);
1564}
1565
461c1a7d 1566static void gpiochip_irq_enable(struct irq_data *d)
14250520 1567{
a0b66a73 1568 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1569 unsigned int hwirq = irqd_to_hwirq(d);
e0d89728 1570
db4064cc 1571 gpiochip_enable_irq(gc, hwirq);
a8173820 1572 gc->irq.irq_enable(d);
461c1a7d
HV
1573}
1574
1575static void gpiochip_irq_disable(struct irq_data *d)
1576{
a0b66a73 1577 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1578 unsigned int hwirq = irqd_to_hwirq(d);
461c1a7d 1579
a8173820 1580 gc->irq.irq_disable(d);
db4064cc 1581 gpiochip_disable_irq(gc, hwirq);
461c1a7d
HV
1582}
1583
a0b66a73 1584static void gpiochip_set_irq_hooks(struct gpio_chip *gc)
ca620f2d 1585{
a0b66a73 1586 struct irq_chip *irqchip = gc->irq.chip;
ca620f2d 1587
6c846d02
MZ
1588 if (irqchip->flags & IRQCHIP_IMMUTABLE)
1589 return;
1590
1591 chip_warn(gc, "not an immutable chip, please consider fixing it!\n");
1592
ca620f2d
HV
1593 if (!irqchip->irq_request_resources &&
1594 !irqchip->irq_release_resources) {
1595 irqchip->irq_request_resources = gpiochip_irq_reqres;
1596 irqchip->irq_release_resources = gpiochip_irq_relres;
1597 }
a0b66a73 1598 if (WARN_ON(gc->irq.irq_enable))
461c1a7d 1599 return;
171948ea 1600 /* Check if the irqchip already has this hook... */
9d552219
NS
1601 if (irqchip->irq_enable == gpiochip_irq_enable ||
1602 irqchip->irq_mask == gpiochip_irq_mask) {
171948ea
HV
1603 /*
1604 * ...and if so, give a gentle warning that this is bad
1605 * practice.
1606 */
a0b66a73 1607 chip_info(gc,
171948ea
HV
1608 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
1609 return;
1610 }
a8173820
MS
1611
1612 if (irqchip->irq_disable) {
1613 gc->irq.irq_disable = irqchip->irq_disable;
1614 irqchip->irq_disable = gpiochip_irq_disable;
1615 } else {
1616 gc->irq.irq_mask = irqchip->irq_mask;
1617 irqchip->irq_mask = gpiochip_irq_mask;
1618 }
1619
1620 if (irqchip->irq_enable) {
1621 gc->irq.irq_enable = irqchip->irq_enable;
1622 irqchip->irq_enable = gpiochip_irq_enable;
1623 } else {
1624 gc->irq.irq_unmask = irqchip->irq_unmask;
1625 irqchip->irq_unmask = gpiochip_irq_unmask;
1626 }
14250520
LW
1627}
1628
e0d89728
TR
1629/**
1630 * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
a0b66a73 1631 * @gc: the GPIO chip to add the IRQ chip to
39c3fd58
AL
1632 * @lock_key: lockdep class for IRQ lock
1633 * @request_key: lockdep class for IRQ request
e0d89728 1634 */
a0b66a73 1635static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1636 struct lock_class_key *lock_key,
1637 struct lock_class_key *request_key)
e0d89728 1638{
5c63a9db 1639 struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev);
a0b66a73 1640 struct irq_chip *irqchip = gc->irq.chip;
e0d89728
TR
1641 unsigned int type;
1642 unsigned int i;
1643
1644 if (!irqchip)
1645 return 0;
1646
a0b66a73
LW
1647 if (gc->irq.parent_handler && gc->can_sleep) {
1648 chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n");
e0d89728
TR
1649 return -EINVAL;
1650 }
1651
a0b66a73 1652 type = gc->irq.default_type;
e0d89728
TR
1653
1654 /*
1655 * Specifying a default trigger is a terrible idea if DT or ACPI is
1656 * used to configure the interrupts, as you may end up with
1657 * conflicting triggers. Tell the user, and reset to NONE.
1658 */
5c63a9db
AS
1659 if (WARN(fwnode && type != IRQ_TYPE_NONE,
1660 "%pfw: Ignoring %u default trigger\n", fwnode, type))
e0d89728
TR
1661 type = IRQ_TYPE_NONE;
1662
ef382374
NS
1663 if (gc->to_irq)
1664 chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__);
1665
a0b66a73
LW
1666 gc->to_irq = gpiochip_to_irq;
1667 gc->irq.default_type = type;
1668 gc->irq.lock_key = lock_key;
1669 gc->irq.request_key = request_key;
e0d89728 1670
fdd61a01 1671 /* If a parent irqdomain is provided, let's build a hierarchy */
a0b66a73
LW
1672 if (gpiochip_hierarchy_is_hierarchical(gc)) {
1673 int ret = gpiochip_hierarchy_add_domain(gc);
fdd61a01
LW
1674 if (ret)
1675 return ret;
1676 } else {
1677 /* Some drivers provide custom irqdomain ops */
5c63a9db 1678 gc->irq.domain = irq_domain_create_simple(fwnode,
a0b66a73
LW
1679 gc->ngpio,
1680 gc->irq.first,
266315fb
AS
1681 gc->irq.domain_ops ?: &gpiochip_domain_ops,
1682 gc);
a0b66a73 1683 if (!gc->irq.domain)
fdd61a01
LW
1684 return -EINVAL;
1685 }
e0d89728 1686
a0b66a73 1687 if (gc->irq.parent_handler) {
a0b66a73 1688 for (i = 0; i < gc->irq.num_parents; i++) {
cfe6807d
MZ
1689 void *data;
1690
1691 if (gc->irq.per_parent_data)
1692 data = gc->irq.parent_handler_data_array[i];
1693 else
1694 data = gc->irq.parent_handler_data ?: gc;
1695
e0d89728
TR
1696 /*
1697 * The parent IRQ chip is already using the chip_data
1698 * for this IRQ chip, so our callbacks simply use the
1699 * handler_data.
1700 */
a0b66a73
LW
1701 irq_set_chained_handler_and_data(gc->irq.parents[i],
1702 gc->irq.parent_handler,
e0d89728
TR
1703 data);
1704 }
e0d89728
TR
1705 }
1706
a0b66a73 1707 gpiochip_set_irq_hooks(gc);
ca620f2d 1708
5467801f
SP
1709 /*
1710 * Using barrier() here to prevent compiler from reordering
1711 * gc->irq.initialized before initialization of above
1712 * GPIO chip irq members.
1713 */
1714 barrier();
1715
1716 gc->irq.initialized = true;
1717
06fb4ecf
ML
1718 acpi_gpiochip_request_interrupts(gc);
1719
e0d89728
TR
1720 return 0;
1721}
1722
14250520
LW
1723/**
1724 * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
a0b66a73 1725 * @gc: the gpiochip to remove the irqchip from
14250520
LW
1726 *
1727 * This is called only from gpiochip_remove()
1728 */
a0b66a73 1729static void gpiochip_irqchip_remove(struct gpio_chip *gc)
14250520 1730{
a0b66a73 1731 struct irq_chip *irqchip = gc->irq.chip;
39e5f096 1732 unsigned int offset;
c3626fde 1733
a0b66a73 1734 acpi_gpiochip_free_interrupts(gc);
afa82fab 1735
a0b66a73
LW
1736 if (irqchip && gc->irq.parent_handler) {
1737 struct gpio_irq_chip *irq = &gc->irq;
39e5f096
TR
1738 unsigned int i;
1739
1740 for (i = 0; i < irq->num_parents; i++)
1741 irq_set_chained_handler_and_data(irq->parents[i],
1742 NULL, NULL);
25e4fe92
DES
1743 }
1744
c3626fde 1745 /* Remove all IRQ mappings and delete the domain */
a0b66a73 1746 if (gc->irq.domain) {
39e5f096
TR
1747 unsigned int irq;
1748
a0b66a73
LW
1749 for (offset = 0; offset < gc->ngpio; offset++) {
1750 if (!gpiochip_irqchip_irq_valid(gc, offset))
79b804cb 1751 continue;
f0fbe7bc 1752
a0b66a73 1753 irq = irq_find_mapping(gc->irq.domain, offset);
f0fbe7bc 1754 irq_dispose_mapping(irq);
79b804cb 1755 }
f0fbe7bc 1756
a0b66a73 1757 irq_domain_remove(gc->irq.domain);
c3626fde 1758 }
14250520 1759
6c846d02 1760 if (irqchip && !(irqchip->flags & IRQCHIP_IMMUTABLE)) {
461c1a7d
HV
1761 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
1762 irqchip->irq_request_resources = NULL;
1763 irqchip->irq_release_resources = NULL;
1764 }
1765 if (irqchip->irq_enable == gpiochip_irq_enable) {
a0b66a73
LW
1766 irqchip->irq_enable = gc->irq.irq_enable;
1767 irqchip->irq_disable = gc->irq.irq_disable;
461c1a7d 1768 }
14250520 1769 }
a0b66a73
LW
1770 gc->irq.irq_enable = NULL;
1771 gc->irq.irq_disable = NULL;
1772 gc->irq.chip = NULL;
79b804cb 1773
a0b66a73 1774 gpiochip_irqchip_free_valid_mask(gc);
14250520
LW
1775}
1776
6a45b0e2
MW
1777/**
1778 * gpiochip_irqchip_add_domain() - adds an irqdomain to a gpiochip
1779 * @gc: the gpiochip to add the irqchip to
1780 * @domain: the irqdomain to add to the gpiochip
1781 *
1782 * This function adds an IRQ domain to the gpiochip.
1783 */
1784int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
1785 struct irq_domain *domain)
1786{
1787 if (!domain)
1788 return -EINVAL;
1789
1790 gc->to_irq = gpiochip_to_irq;
1791 gc->irq.domain = domain;
1792
1793 return 0;
1794}
1795EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain);
1796
14250520
LW
1797#else /* CONFIG_GPIOLIB_IRQCHIP */
1798
a0b66a73 1799static inline int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1800 struct lock_class_key *lock_key,
1801 struct lock_class_key *request_key)
e0d89728
TR
1802{
1803 return 0;
1804}
a0b66a73 1805static void gpiochip_irqchip_remove(struct gpio_chip *gc) {}
9411e3aa 1806
a0b66a73 1807static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
9411e3aa
AS
1808{
1809 return 0;
1810}
1811
a0b66a73 1812static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb
MW
1813{
1814 return 0;
1815}
a0b66a73 1816static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 1817{ }
14250520
LW
1818
1819#endif /* CONFIG_GPIOLIB_IRQCHIP */
1820
c771c2f4
JG
1821/**
1822 * gpiochip_generic_request() - request the gpio function for a pin
a0b66a73 1823 * @gc: the gpiochip owning the GPIO
c771c2f4
JG
1824 * @offset: the offset of the GPIO to request for GPIO function
1825 */
13daf489 1826int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset)
c771c2f4 1827{
56e337f2
BG
1828#ifdef CONFIG_PINCTRL
1829 if (list_empty(&gc->gpiodev->pin_ranges))
1830 return 0;
1831#endif
1832
a0b66a73 1833 return pinctrl_gpio_request(gc->gpiodev->base + offset);
c771c2f4
JG
1834}
1835EXPORT_SYMBOL_GPL(gpiochip_generic_request);
1836
1837/**
1838 * gpiochip_generic_free() - free the gpio function from a pin
a0b66a73 1839 * @gc: the gpiochip to request the gpio function for
c771c2f4
JG
1840 * @offset: the offset of the GPIO to free from GPIO function
1841 */
13daf489 1842void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset)
c771c2f4 1843{
56e337f2
BG
1844#ifdef CONFIG_PINCTRL
1845 if (list_empty(&gc->gpiodev->pin_ranges))
1846 return;
1847#endif
1848
a0b66a73 1849 pinctrl_gpio_free(gc->gpiodev->base + offset);
c771c2f4
JG
1850}
1851EXPORT_SYMBOL_GPL(gpiochip_generic_free);
1852
2956b5d9
MW
1853/**
1854 * gpiochip_generic_config() - apply configuration for a pin
a0b66a73 1855 * @gc: the gpiochip owning the GPIO
2956b5d9
MW
1856 * @offset: the offset of the GPIO to apply the configuration
1857 * @config: the configuration to be applied
1858 */
13daf489 1859int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset,
2956b5d9
MW
1860 unsigned long config)
1861{
a0b66a73 1862 return pinctrl_gpio_set_config(gc->gpiodev->base + offset, config);
2956b5d9
MW
1863}
1864EXPORT_SYMBOL_GPL(gpiochip_generic_config);
1865
f23f1516 1866#ifdef CONFIG_PINCTRL
165adc9c 1867
586a87e6
CR
1868/**
1869 * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
a0b66a73 1870 * @gc: the gpiochip to add the range for
d32651f6 1871 * @pctldev: the pin controller to map to
586a87e6
CR
1872 * @gpio_offset: the start offset in the current gpio_chip number space
1873 * @pin_group: name of the pin group inside the pin controller
973c1714
CL
1874 *
1875 * Calling this function directly from a DeviceTree-supported
1876 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
1877 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
1878 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
586a87e6 1879 */
a0b66a73 1880int gpiochip_add_pingroup_range(struct gpio_chip *gc,
586a87e6
CR
1881 struct pinctrl_dev *pctldev,
1882 unsigned int gpio_offset, const char *pin_group)
1883{
1884 struct gpio_pin_range *pin_range;
a0b66a73 1885 struct gpio_device *gdev = gc->gpiodev;
586a87e6
CR
1886 int ret;
1887
1888 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
1889 if (!pin_range) {
a0b66a73 1890 chip_err(gc, "failed to allocate pin ranges\n");
586a87e6
CR
1891 return -ENOMEM;
1892 }
1893
1894 /* Use local offset as range ID */
1895 pin_range->range.id = gpio_offset;
a0b66a73
LW
1896 pin_range->range.gc = gc;
1897 pin_range->range.name = gc->label;
fdeb8e15 1898 pin_range->range.base = gdev->base + gpio_offset;
586a87e6
CR
1899 pin_range->pctldev = pctldev;
1900
1901 ret = pinctrl_get_group_pins(pctldev, pin_group,
1902 &pin_range->range.pins,
1903 &pin_range->range.npins);
61c6375d
MN
1904 if (ret < 0) {
1905 kfree(pin_range);
586a87e6 1906 return ret;
61c6375d 1907 }
586a87e6
CR
1908
1909 pinctrl_add_gpio_range(pctldev, &pin_range->range);
1910
a0b66a73 1911 chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n",
1a2a99c6 1912 gpio_offset, gpio_offset + pin_range->range.npins - 1,
586a87e6
CR
1913 pinctrl_dev_get_devname(pctldev), pin_group);
1914
20ec3e39 1915 list_add_tail(&pin_range->node, &gdev->pin_ranges);
586a87e6
CR
1916
1917 return 0;
1918}
1919EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
1920
3f0f8670
LW
1921/**
1922 * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
a0b66a73 1923 * @gc: the gpiochip to add the range for
950d55f5 1924 * @pinctl_name: the dev_name() of the pin controller to map to
316511c0
LW
1925 * @gpio_offset: the start offset in the current gpio_chip number space
1926 * @pin_offset: the start offset in the pin controller number space
3f0f8670
LW
1927 * @npins: the number of pins from the offset of each pin space (GPIO and
1928 * pin controller) to accumulate in this range
950d55f5
TR
1929 *
1930 * Returns:
1931 * 0 on success, or a negative error-code on failure.
973c1714
CL
1932 *
1933 * Calling this function directly from a DeviceTree-supported
1934 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
1935 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
1936 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
3f0f8670 1937 */
a0b66a73 1938int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
316511c0 1939 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 1940 unsigned int npins)
f23f1516
SH
1941{
1942 struct gpio_pin_range *pin_range;
a0b66a73 1943 struct gpio_device *gdev = gc->gpiodev;
b4d4b1f0 1944 int ret;
f23f1516 1945
3f0f8670 1946 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
f23f1516 1947 if (!pin_range) {
a0b66a73 1948 chip_err(gc, "failed to allocate pin ranges\n");
1e63d7b9 1949 return -ENOMEM;
f23f1516
SH
1950 }
1951
3f0f8670 1952 /* Use local offset as range ID */
316511c0 1953 pin_range->range.id = gpio_offset;
a0b66a73
LW
1954 pin_range->range.gc = gc;
1955 pin_range->range.name = gc->label;
fdeb8e15 1956 pin_range->range.base = gdev->base + gpio_offset;
316511c0 1957 pin_range->range.pin_base = pin_offset;
f23f1516 1958 pin_range->range.npins = npins;
192c369c 1959 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
f23f1516 1960 &pin_range->range);
8f23ca1a 1961 if (IS_ERR(pin_range->pctldev)) {
b4d4b1f0 1962 ret = PTR_ERR(pin_range->pctldev);
a0b66a73 1963 chip_err(gc, "could not create pin range\n");
3f0f8670 1964 kfree(pin_range);
b4d4b1f0 1965 return ret;
3f0f8670 1966 }
a0b66a73 1967 chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
1a2a99c6 1968 gpio_offset, gpio_offset + npins - 1,
316511c0
LW
1969 pinctl_name,
1970 pin_offset, pin_offset + npins - 1);
f23f1516 1971
20ec3e39 1972 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1e63d7b9
LW
1973
1974 return 0;
f23f1516 1975}
165adc9c 1976EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
f23f1516 1977
3f0f8670
LW
1978/**
1979 * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
a0b66a73 1980 * @gc: the chip to remove all the mappings for
3f0f8670 1981 */
a0b66a73 1982void gpiochip_remove_pin_ranges(struct gpio_chip *gc)
f23f1516
SH
1983{
1984 struct gpio_pin_range *pin_range, *tmp;
a0b66a73 1985 struct gpio_device *gdev = gc->gpiodev;
f23f1516 1986
20ec3e39 1987 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
f23f1516
SH
1988 list_del(&pin_range->node);
1989 pinctrl_remove_gpio_range(pin_range->pctldev,
1990 &pin_range->range);
3f0f8670 1991 kfree(pin_range);
f23f1516
SH
1992 }
1993}
165adc9c
LW
1994EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
1995
1996#endif /* CONFIG_PINCTRL */
f23f1516 1997
d2876d08
DB
1998/* These "optional" allocation calls help prevent drivers from stomping
1999 * on each other, and help provide better diagnostics in debugfs.
2000 * They're called even less than the "set direction" calls.
2001 */
fac9d885 2002static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
d2876d08 2003{
a0b66a73 2004 struct gpio_chip *gc = desc->gdev->chip;
d377f56f 2005 int ret;
d2876d08 2006 unsigned long flags;
3789f5ac 2007 unsigned offset;
d2876d08 2008
18534df4
MS
2009 if (label) {
2010 label = kstrdup_const(label, GFP_KERNEL);
2011 if (!label)
2012 return -ENOMEM;
2013 }
2014
bcabdef1
AC
2015 spin_lock_irqsave(&gpio_lock, flags);
2016
d2876d08 2017 /* NOTE: gpio_request() can be called in early boot,
35e8bb51 2018 * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
d2876d08
DB
2019 */
2020
2021 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
2022 desc_set_label(desc, label ? : "?");
438d8908 2023 } else {
d377f56f 2024 ret = -EBUSY;
95d9f84f 2025 goto out_free_unlock;
35e8bb51
DB
2026 }
2027
a0b66a73
LW
2028 if (gc->request) {
2029 /* gc->request may sleep */
35e8bb51 2030 spin_unlock_irqrestore(&gpio_lock, flags);
3789f5ac 2031 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
2032 if (gpiochip_line_is_valid(gc, offset))
2033 ret = gc->request(gc, offset);
3789f5ac 2034 else
d377f56f 2035 ret = -EINVAL;
35e8bb51
DB
2036 spin_lock_irqsave(&gpio_lock, flags);
2037
8bbff39c 2038 if (ret) {
35e8bb51 2039 desc_set_label(desc, NULL);
35e8bb51 2040 clear_bit(FLAG_REQUESTED, &desc->flags);
95d9f84f 2041 goto out_free_unlock;
35e8bb51 2042 }
438d8908 2043 }
a0b66a73
LW
2044 if (gc->get_direction) {
2045 /* gc->get_direction may sleep */
80b0a602 2046 spin_unlock_irqrestore(&gpio_lock, flags);
372e722e 2047 gpiod_get_direction(desc);
80b0a602
MN
2048 spin_lock_irqsave(&gpio_lock, flags);
2049 }
77c2d792 2050 spin_unlock_irqrestore(&gpio_lock, flags);
95d9f84f
AS
2051 return 0;
2052
2053out_free_unlock:
2054 spin_unlock_irqrestore(&gpio_lock, flags);
2055 kfree_const(label);
d377f56f 2056 return ret;
77c2d792
MW
2057}
2058
fdeb8e15
LW
2059/*
2060 * This descriptor validation needs to be inserted verbatim into each
2061 * function taking a descriptor, so we need to use a preprocessor
54d77198
LW
2062 * macro to avoid endless duplication. If the desc is NULL it is an
2063 * optional GPIO and calls should just bail out.
fdeb8e15 2064 */
a746a232
RV
2065static int validate_desc(const struct gpio_desc *desc, const char *func)
2066{
2067 if (!desc)
2068 return 0;
2069 if (IS_ERR(desc)) {
2070 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
2071 return PTR_ERR(desc);
2072 }
2073 if (!desc->gdev) {
2074 pr_warn("%s: invalid GPIO (no device)\n", func);
2075 return -EINVAL;
2076 }
2077 if (!desc->gdev->chip) {
2078 dev_warn(&desc->gdev->dev,
2079 "%s: backing chip is gone\n", func);
2080 return 0;
2081 }
2082 return 1;
2083}
2084
fdeb8e15 2085#define VALIDATE_DESC(desc) do { \
a746a232
RV
2086 int __valid = validate_desc(desc, __func__); \
2087 if (__valid <= 0) \
2088 return __valid; \
2089 } while (0)
fdeb8e15
LW
2090
2091#define VALIDATE_DESC_VOID(desc) do { \
a746a232
RV
2092 int __valid = validate_desc(desc, __func__); \
2093 if (__valid <= 0) \
fdeb8e15 2094 return; \
a746a232 2095 } while (0)
fdeb8e15 2096
0eb4c6c2 2097int gpiod_request(struct gpio_desc *desc, const char *label)
77c2d792 2098{
d377f56f 2099 int ret = -EPROBE_DEFER;
77c2d792 2100
fdeb8e15 2101 VALIDATE_DESC(desc);
77c2d792 2102
dc0989e3 2103 if (try_module_get(desc->gdev->owner)) {
d377f56f 2104 ret = gpiod_request_commit(desc, label);
8bbff39c 2105 if (ret)
dc0989e3 2106 module_put(desc->gdev->owner);
33a68e86 2107 else
dc0989e3 2108 gpio_device_get(desc->gdev);
77c2d792
MW
2109 }
2110
d377f56f
LW
2111 if (ret)
2112 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
77c2d792 2113
d377f56f 2114 return ret;
d2876d08 2115}
372e722e 2116
fac9d885 2117static bool gpiod_free_commit(struct gpio_desc *desc)
d2876d08 2118{
77c2d792 2119 bool ret = false;
d2876d08 2120 unsigned long flags;
a0b66a73 2121 struct gpio_chip *gc;
d2876d08 2122
3d599d1c
UKK
2123 might_sleep();
2124
372e722e 2125 gpiod_unexport(desc);
d8f388d8 2126
d2876d08
DB
2127 spin_lock_irqsave(&gpio_lock, flags);
2128
a0b66a73
LW
2129 gc = desc->gdev->chip;
2130 if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) {
2131 if (gc->free) {
35e8bb51 2132 spin_unlock_irqrestore(&gpio_lock, flags);
a0b66a73
LW
2133 might_sleep_if(gc->can_sleep);
2134 gc->free(gc, gpio_chip_hwgpio(desc));
35e8bb51
DB
2135 spin_lock_irqsave(&gpio_lock, flags);
2136 }
18534df4 2137 kfree_const(desc->label);
d2876d08 2138 desc_set_label(desc, NULL);
07697461 2139 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
35e8bb51 2140 clear_bit(FLAG_REQUESTED, &desc->flags);
aca5ce14 2141 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
25553ff0 2142 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
9225d516
DF
2143 clear_bit(FLAG_PULL_UP, &desc->flags);
2144 clear_bit(FLAG_PULL_DOWN, &desc->flags);
2148ad77 2145 clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
73e03419
KG
2146 clear_bit(FLAG_EDGE_RISING, &desc->flags);
2147 clear_bit(FLAG_EDGE_FALLING, &desc->flags);
f625d460 2148 clear_bit(FLAG_IS_HOGGED, &desc->flags);
63636d95
GU
2149#ifdef CONFIG_OF_DYNAMIC
2150 desc->hog = NULL;
65cff704
KG
2151#endif
2152#ifdef CONFIG_GPIO_CDEV
2153 WRITE_ONCE(desc->debounce_period_us, 0);
63636d95 2154#endif
77c2d792
MW
2155 ret = true;
2156 }
d2876d08
DB
2157
2158 spin_unlock_irqrestore(&gpio_lock, flags);
6accc376
KG
2159 blocking_notifier_call_chain(&desc->gdev->notifier,
2160 GPIOLINE_CHANGED_RELEASED, desc);
51c1064e 2161
77c2d792
MW
2162 return ret;
2163}
2164
0eb4c6c2 2165void gpiod_free(struct gpio_desc *desc)
77c2d792 2166{
fac9d885 2167 if (desc && desc->gdev && gpiod_free_commit(desc)) {
fdeb8e15 2168 module_put(desc->gdev->owner);
dc0989e3 2169 gpio_device_put(desc->gdev);
33a68e86 2170 } else {
77c2d792 2171 WARN_ON(extra_checks);
33a68e86 2172 }
d2876d08 2173}
372e722e 2174
d2876d08
DB
2175/**
2176 * gpiochip_is_requested - return string iff signal was requested
a0b66a73 2177 * @gc: controller managing the signal
d2876d08
DB
2178 * @offset: of signal within controller's 0..(ngpio - 1) range
2179 *
2180 * Returns NULL if the GPIO is not currently requested, else a string.
9c8318ff
AC
2181 * The string returned is the label passed to gpio_request(); if none has been
2182 * passed it is a meaningless, non-NULL constant.
d2876d08
DB
2183 *
2184 * This function is for use by GPIO controller drivers. The label can
2185 * help with diagnostics, and knowing that the signal is used as a GPIO
2186 * can help avoid accidentally multiplexing it to another controller.
2187 */
13daf489 2188const char *gpiochip_is_requested(struct gpio_chip *gc, unsigned int offset)
d2876d08 2189{
6c0b4e6c 2190 struct gpio_desc *desc;
6c0b4e6c 2191
a0b66a73 2192 desc = gpiochip_get_desc(gc, offset);
1739a2d8
BG
2193 if (IS_ERR(desc))
2194 return NULL;
6c0b4e6c 2195
372e722e 2196 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
d2876d08 2197 return NULL;
372e722e 2198 return desc->label;
d2876d08
DB
2199}
2200EXPORT_SYMBOL_GPL(gpiochip_is_requested);
2201
77c2d792
MW
2202/**
2203 * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
a0b66a73 2204 * @gc: GPIO chip
950d55f5 2205 * @hwnum: hardware number of the GPIO for which to request the descriptor
77c2d792 2206 * @label: label for the GPIO
5923ea6c
LW
2207 * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
2208 * specify things like line inversion semantics with the machine flags
2209 * such as GPIO_OUT_LOW
2210 * @dflags: descriptor request flags for this GPIO or 0 if default, this
2211 * can be used to specify consumer semantics such as open drain
77c2d792
MW
2212 *
2213 * Function allows GPIO chip drivers to request and use their own GPIO
2214 * descriptors via gpiolib API. Difference to gpiod_request() is that this
2215 * function will not increase reference count of the GPIO chip module. This
2216 * allows the GPIO chip module to be unloaded as needed (we assume that the
2217 * GPIO chip driver handles freeing the GPIOs it has requested).
950d55f5
TR
2218 *
2219 * Returns:
2220 * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
2221 * code on failure.
77c2d792 2222 */
a0b66a73 2223struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc,
06863620 2224 unsigned int hwnum,
21abf103 2225 const char *label,
5923ea6c
LW
2226 enum gpio_lookup_flags lflags,
2227 enum gpiod_flags dflags)
77c2d792 2228{
a0b66a73 2229 struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum);
d377f56f 2230 int ret;
77c2d792 2231
abdc08a3 2232 if (IS_ERR(desc)) {
a0b66a73 2233 chip_err(gc, "failed to get GPIO descriptor\n");
abdc08a3
AC
2234 return desc;
2235 }
2236
d377f56f
LW
2237 ret = gpiod_request_commit(desc, label);
2238 if (ret < 0)
2239 return ERR_PTR(ret);
77c2d792 2240
d377f56f
LW
2241 ret = gpiod_configure_flags(desc, label, lflags, dflags);
2242 if (ret) {
a0b66a73 2243 chip_err(gc, "setup of own GPIO %s failed\n", label);
21abf103 2244 gpiod_free_commit(desc);
d377f56f 2245 return ERR_PTR(ret);
21abf103
LW
2246 }
2247
abdc08a3 2248 return desc;
77c2d792 2249}
f7d4ad98 2250EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
77c2d792
MW
2251
2252/**
2253 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
2254 * @desc: GPIO descriptor to free
2255 *
2256 * Function frees the given GPIO requested previously with
2257 * gpiochip_request_own_desc().
2258 */
2259void gpiochip_free_own_desc(struct gpio_desc *desc)
2260{
2261 if (desc)
fac9d885 2262 gpiod_free_commit(desc);
77c2d792 2263}
f7d4ad98 2264EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
d2876d08 2265
fdeb8e15
LW
2266/*
2267 * Drivers MUST set GPIO direction before making get/set calls. In
d2876d08
DB
2268 * some cases this is done in early boot, before IRQs are enabled.
2269 *
2270 * As a rule these aren't called more than once (except for drivers
2271 * using the open-drain emulation idiom) so these are natural places
2272 * to accumulate extra debugging checks. Note that we can't (yet)
2273 * rely on gpio_request() having been called beforehand.
2274 */
2275
d99f8876 2276static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset,
62adc6f3 2277 unsigned long config)
71479789 2278{
d90f3685
BG
2279 if (!gc->set_config)
2280 return -ENOTSUPP;
542f3615 2281
62adc6f3 2282 return gc->set_config(gc, offset, config);
71479789
TP
2283}
2284
0c4d8666
AS
2285static int gpio_set_config_with_argument(struct gpio_desc *desc,
2286 enum pin_config_param mode,
2287 u32 argument)
d99f8876 2288{
a0b66a73 2289 struct gpio_chip *gc = desc->gdev->chip;
91b4ea5f 2290 unsigned long config;
0c4d8666
AS
2291
2292 config = pinconf_to_config_packed(mode, argument);
2293 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
2294}
2295
baca3b15
AS
2296static int gpio_set_config_with_argument_optional(struct gpio_desc *desc,
2297 enum pin_config_param mode,
2298 u32 argument)
2299{
2300 struct device *dev = &desc->gdev->dev;
2301 int gpio = gpio_chip_hwgpio(desc);
2302 int ret;
2303
2304 ret = gpio_set_config_with_argument(desc, mode, argument);
2305 if (ret != -ENOTSUPP)
2306 return ret;
d99f8876
BG
2307
2308 switch (mode) {
baca3b15
AS
2309 case PIN_CONFIG_PERSIST_STATE:
2310 dev_dbg(dev, "Persistence not supported for GPIO %d\n", gpio);
d99f8876 2311 break;
d99f8876 2312 default:
baca3b15 2313 break;
d99f8876
BG
2314 }
2315
baca3b15
AS
2316 return 0;
2317}
2318
0c4d8666
AS
2319static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode)
2320{
6aa32ad7 2321 return gpio_set_config_with_argument(desc, mode, 0);
d99f8876
BG
2322}
2323
5f4bf171 2324static int gpio_set_bias(struct gpio_desc *desc)
2148ad77 2325{
9ef6293c 2326 enum pin_config_param bias;
6aa32ad7 2327 unsigned int arg;
2148ad77
KG
2328
2329 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
2330 bias = PIN_CONFIG_BIAS_DISABLE;
2331 else if (test_bit(FLAG_PULL_UP, &desc->flags))
2332 bias = PIN_CONFIG_BIAS_PULL_UP;
2333 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
2334 bias = PIN_CONFIG_BIAS_PULL_DOWN;
9ef6293c
AS
2335 else
2336 return 0;
2148ad77 2337
6aa32ad7
AS
2338 switch (bias) {
2339 case PIN_CONFIG_BIAS_PULL_DOWN:
2340 case PIN_CONFIG_BIAS_PULL_UP:
2341 arg = 1;
2342 break;
2343
2344 default:
2345 arg = 0;
2346 break;
2148ad77 2347 }
6aa32ad7 2348
baca3b15 2349 return gpio_set_config_with_argument_optional(desc, bias, arg);
2148ad77
KG
2350}
2351
660c619b
AS
2352/**
2353 * gpio_set_debounce_timeout() - Set debounce timeout
2354 * @desc: GPIO descriptor to set the debounce timeout
2355 * @debounce: Debounce timeout in microseconds
2356 *
2357 * The function calls the certain GPIO driver to set debounce timeout
2358 * in the hardware.
2359 *
2360 * Returns 0 on success, or negative error code otherwise.
2361 */
f725edd8
AS
2362int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce)
2363{
2364 return gpio_set_config_with_argument_optional(desc,
2365 PIN_CONFIG_INPUT_DEBOUNCE,
2366 debounce);
2148ad77
KG
2367}
2368
79a9becd
AC
2369/**
2370 * gpiod_direction_input - set the GPIO direction to input
2371 * @desc: GPIO to set to input
2372 *
2373 * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
2374 * be called safely on it.
2375 *
2376 * Return 0 in case of success, else an error code.
2377 */
2378int gpiod_direction_input(struct gpio_desc *desc)
d2876d08 2379{
a0b66a73 2380 struct gpio_chip *gc;
d377f56f 2381 int ret = 0;
d2876d08 2382
fdeb8e15 2383 VALIDATE_DESC(desc);
a0b66a73 2384 gc = desc->gdev->chip;
bcabdef1 2385
e48d194d
LW
2386 /*
2387 * It is legal to have no .get() and .direction_input() specified if
2388 * the chip is output-only, but you can't specify .direction_input()
2389 * and not support the .get() operation, that doesn't make sense.
2390 */
a0b66a73 2391 if (!gc->get && gc->direction_input) {
6424de5a 2392 gpiod_warn(desc,
e48d194d
LW
2393 "%s: missing get() but have direction_input()\n",
2394 __func__);
be1a4b13
LW
2395 return -EIO;
2396 }
2397
e48d194d
LW
2398 /*
2399 * If we have a .direction_input() callback, things are simple,
2400 * just call it. Else we are some input-only chip so try to check the
2401 * direction (if .get_direction() is supported) else we silently
2402 * assume we are in input mode after this.
2403 */
a0b66a73
LW
2404 if (gc->direction_input) {
2405 ret = gc->direction_input(gc, gpio_chip_hwgpio(desc));
2406 } else if (gc->get_direction &&
2407 (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) {
ae9847f4 2408 gpiod_warn(desc,
e48d194d
LW
2409 "%s: missing direction_input() operation and line is output\n",
2410 __func__);
ae9847f4
RRD
2411 return -EIO;
2412 }
2148ad77 2413 if (ret == 0) {
d2876d08 2414 clear_bit(FLAG_IS_OUT, &desc->flags);
5f4bf171 2415 ret = gpio_set_bias(desc);
2148ad77 2416 }
d449991c 2417
d377f56f 2418 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
d82da797 2419
d377f56f 2420 return ret;
d2876d08 2421}
79a9becd 2422EXPORT_SYMBOL_GPL(gpiod_direction_input);
372e722e 2423
fac9d885 2424static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
d2876d08 2425{
c663e5f5 2426 struct gpio_chip *gc = desc->gdev->chip;
ad17731d 2427 int val = !!value;
ae9847f4 2428 int ret = 0;
d2876d08 2429
e48d194d
LW
2430 /*
2431 * It's OK not to specify .direction_output() if the gpiochip is
2432 * output-only, but if there is then not even a .set() operation it
2433 * is pretty tricky to drive the output line.
2434 */
ae9847f4 2435 if (!gc->set && !gc->direction_output) {
6424de5a 2436 gpiod_warn(desc,
e48d194d
LW
2437 "%s: missing set() and direction_output() operations\n",
2438 __func__);
be1a4b13
LW
2439 return -EIO;
2440 }
2441
ae9847f4
RRD
2442 if (gc->direction_output) {
2443 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
2444 } else {
e48d194d 2445 /* Check that we are in output mode if we can */
ae9847f4
RRD
2446 if (gc->get_direction &&
2447 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
2448 gpiod_warn(desc,
2449 "%s: missing direction_output() operation\n",
2450 __func__);
2451 return -EIO;
2452 }
e48d194d
LW
2453 /*
2454 * If we can't actively set the direction, we are some
2455 * output-only chip, so just drive the output as desired.
2456 */
ae9847f4
RRD
2457 gc->set(gc, gpio_chip_hwgpio(desc), val);
2458 }
2459
c663e5f5 2460 if (!ret)
d2876d08 2461 set_bit(FLAG_IS_OUT, &desc->flags);
ad17731d 2462 trace_gpio_value(desc_to_gpio(desc), 0, val);
c663e5f5
LW
2463 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
2464 return ret;
d2876d08 2465}
ef70bbe1
PZ
2466
2467/**
2468 * gpiod_direction_output_raw - set the GPIO direction to output
2469 * @desc: GPIO to set to output
2470 * @value: initial output value of the GPIO
2471 *
2472 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2473 * be called safely on it. The initial value of the output must be specified
2474 * as raw value on the physical line without regard for the ACTIVE_LOW status.
2475 *
2476 * Return 0 in case of success, else an error code.
2477 */
2478int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
2479{
fdeb8e15 2480 VALIDATE_DESC(desc);
fac9d885 2481 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1
PZ
2482}
2483EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
2484
2485/**
90df4fe0 2486 * gpiod_direction_output - set the GPIO direction to output
ef70bbe1
PZ
2487 * @desc: GPIO to set to output
2488 * @value: initial output value of the GPIO
2489 *
2490 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2491 * be called safely on it. The initial value of the output must be specified
2492 * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
2493 * account.
2494 *
2495 * Return 0 in case of success, else an error code.
2496 */
2497int gpiod_direction_output(struct gpio_desc *desc, int value)
2498{
02e47980
LW
2499 int ret;
2500
fdeb8e15 2501 VALIDATE_DESC(desc);
ef70bbe1
PZ
2502 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2503 value = !value;
ad17731d
LW
2504 else
2505 value = !!value;
02e47980 2506
4e9439dd
HV
2507 /* GPIOs used for enabled IRQs shall not be set as output */
2508 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
2509 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
02e47980
LW
2510 gpiod_err(desc,
2511 "%s: tried to set a GPIO tied to an IRQ as output\n",
2512 __func__);
2513 return -EIO;
2514 }
2515
2516 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
2517 /* First see if we can enable open drain in hardware */
83522358 2518 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN);
02e47980
LW
2519 if (!ret)
2520 goto set_output_value;
2521 /* Emulate open drain by not actively driving the line high */
e735244e
BG
2522 if (value) {
2523 ret = gpiod_direction_input(desc);
2524 goto set_output_flag;
2525 }
1cef8b50 2526 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
83522358 2527 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE);
02e47980
LW
2528 if (!ret)
2529 goto set_output_value;
2530 /* Emulate open source by not actively driving the line low */
e735244e
BG
2531 if (!value) {
2532 ret = gpiod_direction_input(desc);
2533 goto set_output_flag;
2534 }
02e47980 2535 } else {
83522358 2536 gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL);
02e47980
LW
2537 }
2538
2539set_output_value:
5f4bf171 2540 ret = gpio_set_bias(desc);
2821ae5f
KG
2541 if (ret)
2542 return ret;
fac9d885 2543 return gpiod_direction_output_raw_commit(desc, value);
e735244e
BG
2544
2545set_output_flag:
2546 /*
2547 * When emulating open-source or open-drain functionalities by not
2548 * actively driving the line (setting mode to input) we still need to
2549 * set the IS_OUT flag or otherwise we won't be able to set the line
2550 * value anymore.
2551 */
2552 if (ret == 0)
2553 set_bit(FLAG_IS_OUT, &desc->flags);
2554 return ret;
ef70bbe1 2555}
79a9becd 2556EXPORT_SYMBOL_GPL(gpiod_direction_output);
d2876d08 2557
42112dd7
DP
2558/**
2559 * gpiod_enable_hw_timestamp_ns - Enable hardware timestamp in nanoseconds.
2560 *
2561 * @desc: GPIO to enable.
2562 * @flags: Flags related to GPIO edge.
2563 *
2564 * Return 0 in case of success, else negative error code.
2565 */
2566int gpiod_enable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags)
2567{
2568 int ret = 0;
2569 struct gpio_chip *gc;
2570
2571 VALIDATE_DESC(desc);
2572
2573 gc = desc->gdev->chip;
2574 if (!gc->en_hw_timestamp) {
2575 gpiod_warn(desc, "%s: hw ts not supported\n", __func__);
2576 return -ENOTSUPP;
2577 }
2578
2579 ret = gc->en_hw_timestamp(gc, gpio_chip_hwgpio(desc), flags);
2580 if (ret)
2581 gpiod_warn(desc, "%s: hw ts request failed\n", __func__);
2582
2583 return ret;
2584}
2585EXPORT_SYMBOL_GPL(gpiod_enable_hw_timestamp_ns);
2586
2587/**
2588 * gpiod_disable_hw_timestamp_ns - Disable hardware timestamp.
2589 *
2590 * @desc: GPIO to disable.
2591 * @flags: Flags related to GPIO edge, same value as used during enable call.
2592 *
2593 * Return 0 in case of success, else negative error code.
2594 */
2595int gpiod_disable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags)
2596{
2597 int ret = 0;
2598 struct gpio_chip *gc;
2599
2600 VALIDATE_DESC(desc);
2601
2602 gc = desc->gdev->chip;
2603 if (!gc->dis_hw_timestamp) {
2604 gpiod_warn(desc, "%s: hw ts not supported\n", __func__);
2605 return -ENOTSUPP;
2606 }
2607
2608 ret = gc->dis_hw_timestamp(gc, gpio_chip_hwgpio(desc), flags);
2609 if (ret)
2610 gpiod_warn(desc, "%s: hw ts release failed\n", __func__);
2611
2612 return ret;
2613}
2614EXPORT_SYMBOL_GPL(gpiod_disable_hw_timestamp_ns);
2615
8ced32ff
GU
2616/**
2617 * gpiod_set_config - sets @config for a GPIO
2618 * @desc: descriptor of the GPIO for which to set the configuration
2619 * @config: Same packed config format as generic pinconf
2620 *
2621 * Returns:
2622 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2623 * configuration.
2624 */
2625int gpiod_set_config(struct gpio_desc *desc, unsigned long config)
2626{
a0b66a73 2627 struct gpio_chip *gc;
8ced32ff
GU
2628
2629 VALIDATE_DESC(desc);
a0b66a73 2630 gc = desc->gdev->chip;
8ced32ff 2631
a0b66a73 2632 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
8ced32ff
GU
2633}
2634EXPORT_SYMBOL_GPL(gpiod_set_config);
2635
c4b5be98 2636/**
950d55f5
TR
2637 * gpiod_set_debounce - sets @debounce time for a GPIO
2638 * @desc: descriptor of the GPIO for which to set debounce time
2639 * @debounce: debounce time in microseconds
65d87656 2640 *
950d55f5
TR
2641 * Returns:
2642 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2643 * debounce time.
c4b5be98 2644 */
13daf489 2645int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce)
c4b5be98 2646{
8ced32ff 2647 unsigned long config;
be1a4b13 2648
2956b5d9 2649 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
8ced32ff 2650 return gpiod_set_config(desc, config);
c4b5be98 2651}
79a9becd 2652EXPORT_SYMBOL_GPL(gpiod_set_debounce);
372e722e 2653
e10f72bf
AJ
2654/**
2655 * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
2656 * @desc: descriptor of the GPIO for which to configure persistence
2657 * @transitory: True to lose state on suspend or reset, false for persistence
2658 *
2659 * Returns:
2660 * 0 on success, otherwise a negative error code.
2661 */
2662int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
2663{
156dd392 2664 VALIDATE_DESC(desc);
e10f72bf
AJ
2665 /*
2666 * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
2667 * persistence state.
2668 */
4fc5bfeb 2669 assign_bit(FLAG_TRANSITORY, &desc->flags, transitory);
e10f72bf
AJ
2670
2671 /* If the driver supports it, set the persistence state now */
baca3b15
AS
2672 return gpio_set_config_with_argument_optional(desc,
2673 PIN_CONFIG_PERSIST_STATE,
2674 !transitory);
e10f72bf
AJ
2675}
2676EXPORT_SYMBOL_GPL(gpiod_set_transitory);
2677
79a9becd
AC
2678/**
2679 * gpiod_is_active_low - test whether a GPIO is active-low or not
2680 * @desc: the gpio descriptor to test
2681 *
2682 * Returns 1 if the GPIO is active-low, 0 otherwise.
2683 */
2684int gpiod_is_active_low(const struct gpio_desc *desc)
372e722e 2685{
fdeb8e15 2686 VALIDATE_DESC(desc);
79a9becd 2687 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
372e722e 2688}
79a9becd 2689EXPORT_SYMBOL_GPL(gpiod_is_active_low);
d2876d08 2690
d3a5bcb4
MM
2691/**
2692 * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not
2693 * @desc: the gpio descriptor to change
2694 */
2695void gpiod_toggle_active_low(struct gpio_desc *desc)
2696{
2697 VALIDATE_DESC_VOID(desc);
2698 change_bit(FLAG_ACTIVE_LOW, &desc->flags);
2699}
2700EXPORT_SYMBOL_GPL(gpiod_toggle_active_low);
2701
234c5209
AS
2702static int gpio_chip_get_value(struct gpio_chip *gc, const struct gpio_desc *desc)
2703{
2704 return gc->get ? gc->get(gc, gpio_chip_hwgpio(desc)) : -EIO;
2705}
2706
d2876d08
DB
2707/* I/O calls are only valid after configuration completed; the relevant
2708 * "is this a valid GPIO" error checks should already have been done.
2709 *
2710 * "Get" operations are often inlinable as reading a pin value register,
2711 * and masking the relevant bit in that register.
2712 *
2713 * When "set" operations are inlinable, they involve writing that mask to
2714 * one register to set a low value, or a different register to set it high.
2715 * Otherwise locking is needed, so there may be little value to inlining.
2716 *
2717 *------------------------------------------------------------------------
2718 *
2719 * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
2720 * have requested the GPIO. That can include implicit requesting by
2721 * a direction setting call. Marking a gpio as requested locks its chip
2722 * in memory, guaranteeing that these table lookups need no more locking
2723 * and that gpiochip_remove() will fail.
2724 *
2725 * REVISIT when debugging, consider adding some instrumentation to ensure
2726 * that the GPIO was actually requested.
2727 */
2728
fac9d885 2729static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
d2876d08 2730{
a0b66a73 2731 struct gpio_chip *gc;
e20538b8 2732 int value;
d2876d08 2733
a0b66a73 2734 gc = desc->gdev->chip;
234c5209 2735 value = gpio_chip_get_value(gc, desc);
723a6303 2736 value = value < 0 ? value : !!value;
372e722e 2737 trace_gpio_value(desc_to_gpio(desc), 1, value);
3f397c21 2738 return value;
d2876d08 2739}
372e722e 2740
a0b66a73 2741static int gpio_chip_get_multiple(struct gpio_chip *gc,
eec1d566
LW
2742 unsigned long *mask, unsigned long *bits)
2743{
1cef8b50 2744 if (gc->get_multiple)
a0b66a73 2745 return gc->get_multiple(gc, mask, bits);
1cef8b50 2746 if (gc->get) {
eec1d566
LW
2747 int i, value;
2748
a0b66a73
LW
2749 for_each_set_bit(i, mask, gc->ngpio) {
2750 value = gc->get(gc, i);
eec1d566
LW
2751 if (value < 0)
2752 return value;
2753 __assign_bit(i, bits, value);
2754 }
2755 return 0;
2756 }
2757 return -EIO;
2758}
2759
2760int gpiod_get_array_value_complex(bool raw, bool can_sleep,
2761 unsigned int array_size,
2762 struct gpio_desc **desc_array,
77588c14 2763 struct gpio_array *array_info,
b9762beb 2764 unsigned long *value_bitmap)
eec1d566 2765{
d377f56f 2766 int ret, i = 0;
b17566a6
JK
2767
2768 /*
2769 * Validate array_info against desc_array and its size.
2770 * It should immediately follow desc_array if both
2771 * have been obtained from the same gpiod_get_array() call.
2772 */
2773 if (array_info && array_info->desc == desc_array &&
2774 array_size <= array_info->size &&
2775 (void *)array_info == desc_array + array_info->size) {
2776 if (!can_sleep)
2777 WARN_ON(array_info->chip->can_sleep);
2778
d377f56f 2779 ret = gpio_chip_get_multiple(array_info->chip,
b17566a6
JK
2780 array_info->get_mask,
2781 value_bitmap);
d377f56f
LW
2782 if (ret)
2783 return ret;
b17566a6
JK
2784
2785 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2786 bitmap_xor(value_bitmap, value_bitmap,
2787 array_info->invert_mask, array_size);
2788
b17566a6 2789 i = find_first_zero_bit(array_info->get_mask, array_size);
ae66eca0
AS
2790 if (i == array_size)
2791 return 0;
b17566a6
JK
2792 } else {
2793 array_info = NULL;
2794 }
eec1d566
LW
2795
2796 while (i < array_size) {
a0b66a73 2797 struct gpio_chip *gc = desc_array[i]->gdev->chip;
c80c4435
AS
2798 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
2799 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
3027743f 2800 unsigned long *mask, *bits;
c07ea8d0 2801 int first, j;
eec1d566 2802
a0b66a73 2803 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
c80c4435
AS
2804 mask = fastpath_mask;
2805 bits = fastpath_bits;
3027743f 2806 } else {
c354c295
AS
2807 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
2808
2809 mask = bitmap_alloc(gc->ngpio, flags);
3027743f
LA
2810 if (!mask)
2811 return -ENOMEM;
c80c4435 2812
c354c295
AS
2813 bits = bitmap_alloc(gc->ngpio, flags);
2814 if (!bits) {
2815 bitmap_free(mask);
2816 return -ENOMEM;
2817 }
3027743f
LA
2818 }
2819
a0b66a73 2820 bitmap_zero(mask, gc->ngpio);
3027743f 2821
eec1d566 2822 if (!can_sleep)
a0b66a73 2823 WARN_ON(gc->can_sleep);
eec1d566
LW
2824
2825 /* collect all inputs belonging to the same chip */
2826 first = i;
eec1d566
LW
2827 do {
2828 const struct gpio_desc *desc = desc_array[i];
2829 int hwgpio = gpio_chip_hwgpio(desc);
2830
2831 __set_bit(hwgpio, mask);
2832 i++;
b17566a6
JK
2833
2834 if (array_info)
35ae7f96
JK
2835 i = find_next_zero_bit(array_info->get_mask,
2836 array_size, i);
eec1d566 2837 } while ((i < array_size) &&
a0b66a73 2838 (desc_array[i]->gdev->chip == gc));
eec1d566 2839
a0b66a73 2840 ret = gpio_chip_get_multiple(gc, mask, bits);
3027743f 2841 if (ret) {
c80c4435 2842 if (mask != fastpath_mask)
c354c295
AS
2843 bitmap_free(mask);
2844 if (bits != fastpath_bits)
2845 bitmap_free(bits);
eec1d566 2846 return ret;
3027743f 2847 }
eec1d566 2848
b17566a6 2849 for (j = first; j < i; ) {
eec1d566
LW
2850 const struct gpio_desc *desc = desc_array[j];
2851 int hwgpio = gpio_chip_hwgpio(desc);
2852 int value = test_bit(hwgpio, bits);
2853
2854 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2855 value = !value;
b9762beb 2856 __assign_bit(j, value_bitmap, value);
eec1d566 2857 trace_gpio_value(desc_to_gpio(desc), 1, value);
799d5eb4 2858 j++;
b17566a6
JK
2859
2860 if (array_info)
35ae7f96
JK
2861 j = find_next_zero_bit(array_info->get_mask, i,
2862 j);
eec1d566 2863 }
3027743f 2864
c80c4435 2865 if (mask != fastpath_mask)
c354c295
AS
2866 bitmap_free(mask);
2867 if (bits != fastpath_bits)
2868 bitmap_free(bits);
eec1d566
LW
2869 }
2870 return 0;
2871}
2872
d2876d08 2873/**
79a9becd
AC
2874 * gpiod_get_raw_value() - return a gpio's raw value
2875 * @desc: gpio whose value will be returned
d2876d08 2876 *
79a9becd 2877 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 2878 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd 2879 *
827a9b8b 2880 * This function can be called from contexts where we cannot sleep, and will
79a9becd 2881 * complain if the GPIO chip functions potentially sleep.
d2876d08 2882 */
79a9becd 2883int gpiod_get_raw_value(const struct gpio_desc *desc)
d2876d08 2884{
fdeb8e15 2885 VALIDATE_DESC(desc);
3285170f 2886 /* Should be using gpiod_get_raw_value_cansleep() */
fdeb8e15 2887 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 2888 return gpiod_get_raw_value_commit(desc);
d2876d08 2889}
79a9becd 2890EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
372e722e 2891
79a9becd
AC
2892/**
2893 * gpiod_get_value() - return a gpio's value
2894 * @desc: gpio whose value will be returned
2895 *
2896 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 2897 * account, or negative errno on failure.
79a9becd 2898 *
827a9b8b 2899 * This function can be called from contexts where we cannot sleep, and will
79a9becd
AC
2900 * complain if the GPIO chip functions potentially sleep.
2901 */
2902int gpiod_get_value(const struct gpio_desc *desc)
372e722e 2903{
79a9becd 2904 int value;
fdeb8e15
LW
2905
2906 VALIDATE_DESC(desc);
3285170f 2907 /* Should be using gpiod_get_value_cansleep() */
fdeb8e15 2908 WARN_ON(desc->gdev->chip->can_sleep);
79a9becd 2909
fac9d885 2910 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
2911 if (value < 0)
2912 return value;
2913
79a9becd
AC
2914 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2915 value = !value;
2916
2917 return value;
372e722e 2918}
79a9becd 2919EXPORT_SYMBOL_GPL(gpiod_get_value);
d2876d08 2920
eec1d566
LW
2921/**
2922 * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
b9762beb 2923 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 2924 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 2925 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2926 * @value_bitmap: bitmap to store the read values
eec1d566
LW
2927 *
2928 * Read the raw values of the GPIOs, i.e. the values of the physical lines
2929 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
2930 * else an error code.
2931 *
827a9b8b 2932 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
2933 * and it will complain if the GPIO chip functions potentially sleep.
2934 */
2935int gpiod_get_raw_array_value(unsigned int array_size,
b9762beb 2936 struct gpio_desc **desc_array,
77588c14 2937 struct gpio_array *array_info,
b9762beb 2938 unsigned long *value_bitmap)
eec1d566
LW
2939{
2940 if (!desc_array)
2941 return -EINVAL;
2942 return gpiod_get_array_value_complex(true, false, array_size,
77588c14
JK
2943 desc_array, array_info,
2944 value_bitmap);
eec1d566
LW
2945}
2946EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
2947
2948/**
2949 * gpiod_get_array_value() - read values from an array of GPIOs
b9762beb 2950 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 2951 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 2952 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2953 * @value_bitmap: bitmap to store the read values
eec1d566
LW
2954 *
2955 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
2956 * into account. Return 0 in case of success, else an error code.
2957 *
827a9b8b 2958 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
2959 * and it will complain if the GPIO chip functions potentially sleep.
2960 */
2961int gpiod_get_array_value(unsigned int array_size,
b9762beb 2962 struct gpio_desc **desc_array,
77588c14 2963 struct gpio_array *array_info,
b9762beb 2964 unsigned long *value_bitmap)
eec1d566
LW
2965{
2966 if (!desc_array)
2967 return -EINVAL;
2968 return gpiod_get_array_value_complex(false, false, array_size,
77588c14
JK
2969 desc_array, array_info,
2970 value_bitmap);
eec1d566
LW
2971}
2972EXPORT_SYMBOL_GPL(gpiod_get_array_value);
2973
aca5ce14 2974/*
fac9d885 2975 * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
79a9becd 2976 * @desc: gpio descriptor whose state need to be set.
20a8a968 2977 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
aca5ce14 2978 */
fac9d885 2979static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
aca5ce14 2980{
d377f56f 2981 int ret = 0;
a0b66a73 2982 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
2983 int offset = gpio_chip_hwgpio(desc);
2984
aca5ce14 2985 if (value) {
a0b66a73 2986 ret = gc->direction_input(gc, offset);
aca5ce14 2987 } else {
a0b66a73 2988 ret = gc->direction_output(gc, offset, 0);
d377f56f 2989 if (!ret)
372e722e 2990 set_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 2991 }
d377f56f
LW
2992 trace_gpio_direction(desc_to_gpio(desc), value, ret);
2993 if (ret < 0)
6424de5a
MB
2994 gpiod_err(desc,
2995 "%s: Error in set_value for open drain err %d\n",
d377f56f 2996 __func__, ret);
aca5ce14
LD
2997}
2998
25553ff0 2999/*
79a9becd
AC
3000 * _gpio_set_open_source_value() - Set the open source gpio's value.
3001 * @desc: gpio descriptor whose state need to be set.
20a8a968 3002 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
25553ff0 3003 */
fac9d885 3004static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
25553ff0 3005{
d377f56f 3006 int ret = 0;
a0b66a73 3007 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
3008 int offset = gpio_chip_hwgpio(desc);
3009
25553ff0 3010 if (value) {
a0b66a73 3011 ret = gc->direction_output(gc, offset, 1);
d377f56f 3012 if (!ret)
372e722e 3013 set_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 3014 } else {
a0b66a73 3015 ret = gc->direction_input(gc, offset);
25553ff0 3016 }
d377f56f
LW
3017 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
3018 if (ret < 0)
6424de5a
MB
3019 gpiod_err(desc,
3020 "%s: Error in set_value for open source err %d\n",
d377f56f 3021 __func__, ret);
25553ff0
LD
3022}
3023
fac9d885 3024static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
d2876d08 3025{
a0b66a73 3026 struct gpio_chip *gc;
d2876d08 3027
a0b66a73 3028 gc = desc->gdev->chip;
372e722e 3029 trace_gpio_value(desc_to_gpio(desc), 0, value);
a0b66a73 3030 gc->set(gc, gpio_chip_hwgpio(desc), value);
372e722e
AC
3031}
3032
5f424243
RI
3033/*
3034 * set multiple outputs on the same chip;
3035 * use the chip's set_multiple function if available;
3036 * otherwise set the outputs sequentially;
a0b66a73 3037 * @chip: the GPIO chip we operate on
5f424243
RI
3038 * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
3039 * defines which outputs are to be changed
3040 * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
3041 * defines the values the outputs specified by mask are to be set to
3042 */
a0b66a73 3043static void gpio_chip_set_multiple(struct gpio_chip *gc,
5f424243
RI
3044 unsigned long *mask, unsigned long *bits)
3045{
a0b66a73
LW
3046 if (gc->set_multiple) {
3047 gc->set_multiple(gc, mask, bits);
5f424243 3048 } else {
5e4e6fb3
AS
3049 unsigned int i;
3050
3051 /* set outputs if the corresponding mask bit is set */
a0b66a73
LW
3052 for_each_set_bit(i, mask, gc->ngpio)
3053 gc->set(gc, i, test_bit(i, bits));
5f424243
RI
3054 }
3055}
3056
3027743f 3057int gpiod_set_array_value_complex(bool raw, bool can_sleep,
3c940660
GU
3058 unsigned int array_size,
3059 struct gpio_desc **desc_array,
3060 struct gpio_array *array_info,
3061 unsigned long *value_bitmap)
5f424243
RI
3062{
3063 int i = 0;
3064
b17566a6
JK
3065 /*
3066 * Validate array_info against desc_array and its size.
3067 * It should immediately follow desc_array if both
3068 * have been obtained from the same gpiod_get_array() call.
3069 */
3070 if (array_info && array_info->desc == desc_array &&
3071 array_size <= array_info->size &&
3072 (void *)array_info == desc_array + array_info->size) {
3073 if (!can_sleep)
3074 WARN_ON(array_info->chip->can_sleep);
3075
3076 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3077 bitmap_xor(value_bitmap, value_bitmap,
3078 array_info->invert_mask, array_size);
3079
3080 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
3081 value_bitmap);
3082
b17566a6 3083 i = find_first_zero_bit(array_info->set_mask, array_size);
ae66eca0
AS
3084 if (i == array_size)
3085 return 0;
b17566a6
JK
3086 } else {
3087 array_info = NULL;
3088 }
3089
5f424243 3090 while (i < array_size) {
a0b66a73 3091 struct gpio_chip *gc = desc_array[i]->gdev->chip;
c80c4435
AS
3092 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
3093 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
3027743f 3094 unsigned long *mask, *bits;
5f424243
RI
3095 int count = 0;
3096
a0b66a73 3097 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
c80c4435
AS
3098 mask = fastpath_mask;
3099 bits = fastpath_bits;
3027743f 3100 } else {
c354c295
AS
3101 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
3102
3103 mask = bitmap_alloc(gc->ngpio, flags);
3027743f
LA
3104 if (!mask)
3105 return -ENOMEM;
c80c4435 3106
c354c295
AS
3107 bits = bitmap_alloc(gc->ngpio, flags);
3108 if (!bits) {
3109 bitmap_free(mask);
3110 return -ENOMEM;
3111 }
3027743f
LA
3112 }
3113
a0b66a73 3114 bitmap_zero(mask, gc->ngpio);
3027743f 3115
38e003f4 3116 if (!can_sleep)
a0b66a73 3117 WARN_ON(gc->can_sleep);
38e003f4 3118
5f424243
RI
3119 do {
3120 struct gpio_desc *desc = desc_array[i];
3121 int hwgpio = gpio_chip_hwgpio(desc);
b9762beb 3122 int value = test_bit(i, value_bitmap);
5f424243 3123
b17566a6
JK
3124 /*
3125 * Pins applicable for fast input but not for
3126 * fast output processing may have been already
3127 * inverted inside the fast path, skip them.
3128 */
3129 if (!raw && !(array_info &&
3130 test_bit(i, array_info->invert_mask)) &&
3131 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
5f424243
RI
3132 value = !value;
3133 trace_gpio_value(desc_to_gpio(desc), 0, value);
3134 /*
3135 * collect all normal outputs belonging to the same chip
3136 * open drain and open source outputs are set individually
3137 */
02e47980 3138 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
fac9d885 3139 gpio_set_open_drain_value_commit(desc, value);
02e47980 3140 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
fac9d885 3141 gpio_set_open_source_value_commit(desc, value);
5f424243
RI
3142 } else {
3143 __set_bit(hwgpio, mask);
4fc5bfeb 3144 __assign_bit(hwgpio, bits, value);
5f424243
RI
3145 count++;
3146 }
3147 i++;
b17566a6
JK
3148
3149 if (array_info)
35ae7f96
JK
3150 i = find_next_zero_bit(array_info->set_mask,
3151 array_size, i);
fdeb8e15 3152 } while ((i < array_size) &&
a0b66a73 3153 (desc_array[i]->gdev->chip == gc));
5f424243 3154 /* push collected bits to outputs */
38e003f4 3155 if (count != 0)
a0b66a73 3156 gpio_chip_set_multiple(gc, mask, bits);
3027743f 3157
c80c4435 3158 if (mask != fastpath_mask)
c354c295
AS
3159 bitmap_free(mask);
3160 if (bits != fastpath_bits)
3161 bitmap_free(bits);
5f424243 3162 }
3027743f 3163 return 0;
5f424243
RI
3164}
3165
d2876d08 3166/**
79a9becd
AC
3167 * gpiod_set_raw_value() - assign a gpio's raw value
3168 * @desc: gpio whose value will be assigned
d2876d08 3169 * @value: value to assign
d2876d08 3170 *
79a9becd
AC
3171 * Set the raw value of the GPIO, i.e. the value of its physical line without
3172 * regard for its ACTIVE_LOW status.
3173 *
827a9b8b 3174 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3175 * complain if the GPIO chip functions potentially sleep.
d2876d08 3176 */
79a9becd 3177void gpiod_set_raw_value(struct gpio_desc *desc, int value)
372e722e 3178{
fdeb8e15 3179 VALIDATE_DESC_VOID(desc);
3285170f 3180 /* Should be using gpiod_set_raw_value_cansleep() */
fdeb8e15 3181 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3182 gpiod_set_raw_value_commit(desc, value);
d2876d08 3183}
79a9becd 3184EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
d2876d08 3185
1e77fc82
GU
3186/**
3187 * gpiod_set_value_nocheck() - set a GPIO line value without checking
3188 * @desc: the descriptor to set the value on
3189 * @value: value to set
3190 *
3191 * This sets the value of a GPIO line backing a descriptor, applying
3192 * different semantic quirks like active low and open drain/source
3193 * handling.
3194 */
3195static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
3196{
3197 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3198 value = !value;
3199 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
3200 gpio_set_open_drain_value_commit(desc, value);
3201 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
3202 gpio_set_open_source_value_commit(desc, value);
3203 else
3204 gpiod_set_raw_value_commit(desc, value);
3205}
3206
d2876d08 3207/**
79a9becd
AC
3208 * gpiod_set_value() - assign a gpio's value
3209 * @desc: gpio whose value will be assigned
3210 * @value: value to assign
3211 *
02e47980
LW
3212 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
3213 * OPEN_DRAIN and OPEN_SOURCE flags into account.
d2876d08 3214 *
827a9b8b 3215 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3216 * complain if the GPIO chip functions potentially sleep.
d2876d08 3217 */
79a9becd 3218void gpiod_set_value(struct gpio_desc *desc, int value)
d2876d08 3219{
fdeb8e15 3220 VALIDATE_DESC_VOID(desc);
3285170f 3221 /* Should be using gpiod_set_value_cansleep() */
fdeb8e15 3222 WARN_ON(desc->gdev->chip->can_sleep);
1e77fc82 3223 gpiod_set_value_nocheck(desc, value);
372e722e 3224}
79a9becd 3225EXPORT_SYMBOL_GPL(gpiod_set_value);
d2876d08 3226
5f424243 3227/**
3fff99bc 3228 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
b9762beb 3229 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3230 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3231 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3232 * @value_bitmap: bitmap of values to assign
5f424243
RI
3233 *
3234 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3235 * without regard for their ACTIVE_LOW status.
3236 *
827a9b8b 3237 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3238 * complain if the GPIO chip functions potentially sleep.
3239 */
3027743f 3240int gpiod_set_raw_array_value(unsigned int array_size,
3c940660
GU
3241 struct gpio_desc **desc_array,
3242 struct gpio_array *array_info,
3243 unsigned long *value_bitmap)
5f424243
RI
3244{
3245 if (!desc_array)
3027743f
LA
3246 return -EINVAL;
3247 return gpiod_set_array_value_complex(true, false, array_size,
77588c14 3248 desc_array, array_info, value_bitmap);
5f424243 3249}
3fff99bc 3250EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
5f424243
RI
3251
3252/**
3fff99bc 3253 * gpiod_set_array_value() - assign values to an array of GPIOs
b9762beb 3254 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3255 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3256 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3257 * @value_bitmap: bitmap of values to assign
5f424243
RI
3258 *
3259 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3260 * into account.
3261 *
827a9b8b 3262 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3263 * complain if the GPIO chip functions potentially sleep.
3264 */
cf9af0d5
GU
3265int gpiod_set_array_value(unsigned int array_size,
3266 struct gpio_desc **desc_array,
3267 struct gpio_array *array_info,
3268 unsigned long *value_bitmap)
5f424243
RI
3269{
3270 if (!desc_array)
cf9af0d5
GU
3271 return -EINVAL;
3272 return gpiod_set_array_value_complex(false, false, array_size,
3273 desc_array, array_info,
3274 value_bitmap);
5f424243 3275}
3fff99bc 3276EXPORT_SYMBOL_GPL(gpiod_set_array_value);
5f424243 3277
d2876d08 3278/**
79a9becd
AC
3279 * gpiod_cansleep() - report whether gpio value access may sleep
3280 * @desc: gpio to check
d2876d08 3281 *
d2876d08 3282 */
79a9becd 3283int gpiod_cansleep(const struct gpio_desc *desc)
372e722e 3284{
fdeb8e15
LW
3285 VALIDATE_DESC(desc);
3286 return desc->gdev->chip->can_sleep;
d2876d08 3287}
79a9becd 3288EXPORT_SYMBOL_GPL(gpiod_cansleep);
d2876d08 3289
90b39402
LW
3290/**
3291 * gpiod_set_consumer_name() - set the consumer name for the descriptor
3292 * @desc: gpio to set the consumer name on
3293 * @name: the new consumer name
3294 */
18534df4 3295int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
90b39402 3296{
18534df4
MS
3297 VALIDATE_DESC(desc);
3298 if (name) {
3299 name = kstrdup_const(name, GFP_KERNEL);
3300 if (!name)
3301 return -ENOMEM;
3302 }
3303
3304 kfree_const(desc->label);
3305 desc_set_label(desc, name);
3306
3307 return 0;
90b39402
LW
3308}
3309EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
3310
0f6d504e 3311/**
79a9becd
AC
3312 * gpiod_to_irq() - return the IRQ corresponding to a GPIO
3313 * @desc: gpio whose IRQ will be returned (already requested)
0f6d504e 3314 *
79a9becd
AC
3315 * Return the IRQ corresponding to the passed GPIO, or an error code in case of
3316 * error.
0f6d504e 3317 */
79a9becd 3318int gpiod_to_irq(const struct gpio_desc *desc)
0f6d504e 3319{
a0b66a73 3320 struct gpio_chip *gc;
4c37ce86 3321 int offset;
0f6d504e 3322
79bb71bd
LW
3323 /*
3324 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
3325 * requires this function to not return zero on an invalid descriptor
3326 * but rather a negative error number.
3327 */
bfbbe44d 3328 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
79bb71bd
LW
3329 return -EINVAL;
3330
a0b66a73 3331 gc = desc->gdev->chip;
372e722e 3332 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
3333 if (gc->to_irq) {
3334 int retirq = gc->to_irq(gc, offset);
4c37ce86
LW
3335
3336 /* Zero means NO_IRQ */
3337 if (!retirq)
3338 return -ENXIO;
3339
3340 return retirq;
3341 }
ae42f928
SP
3342#ifdef CONFIG_GPIOLIB_IRQCHIP
3343 if (gc->irq.chip) {
3344 /*
3345 * Avoid race condition with other code, which tries to lookup
3346 * an IRQ before the irqchip has been properly registered,
3347 * i.e. while gpiochip is still being brought up.
3348 */
3349 return -EPROBE_DEFER;
3350 }
3351#endif
4c37ce86 3352 return -ENXIO;
0f6d504e 3353}
79a9becd 3354EXPORT_SYMBOL_GPL(gpiod_to_irq);
0f6d504e 3355
d468bf9e 3356/**
e3a2e878 3357 * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
a0b66a73 3358 * @gc: the chip the GPIO to lock belongs to
d74be6df 3359 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3360 *
3361 * This is used directly by GPIO drivers that want to lock down
f438acdf 3362 * a certain GPIO line to be used for IRQs.
d468bf9e 3363 */
a0b66a73 3364int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset)
372e722e 3365{
9c10280d
LW
3366 struct gpio_desc *desc;
3367
a0b66a73 3368 desc = gpiochip_get_desc(gc, offset);
9c10280d
LW
3369 if (IS_ERR(desc))
3370 return PTR_ERR(desc);
3371
60f8339e
LW
3372 /*
3373 * If it's fast: flush the direction setting if something changed
3374 * behind our back
3375 */
a0b66a73 3376 if (!gc->can_sleep && gc->get_direction) {
80956790 3377 int dir = gpiod_get_direction(desc);
9c10280d 3378
36b31279 3379 if (dir < 0) {
a0b66a73 3380 chip_err(gc, "%s: cannot get GPIO direction\n",
36b31279
AS
3381 __func__);
3382 return dir;
3383 }
9c10280d 3384 }
d468bf9e 3385
e9bdf7e6
LW
3386 /* To be valid for IRQ the line needs to be input or open drain */
3387 if (test_bit(FLAG_IS_OUT, &desc->flags) &&
3388 !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
a0b66a73 3389 chip_err(gc,
b1911710
AS
3390 "%s: tried to flag a GPIO set as output for IRQ\n",
3391 __func__);
d468bf9e
LW
3392 return -EIO;
3393 }
3394
9c10280d 3395 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3396 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3397
3398 /*
3399 * If the consumer has not set up a label (such as when the
3400 * IRQ is referenced from .to_irq()) we set up a label here
3401 * so it is clear this is used as an interrupt.
3402 */
3403 if (!desc->label)
3404 desc_set_label(desc, "interrupt");
3405
d468bf9e 3406 return 0;
372e722e 3407}
e3a2e878 3408EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
d2876d08 3409
d468bf9e 3410/**
e3a2e878 3411 * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
a0b66a73 3412 * @gc: the chip the GPIO to lock belongs to
d74be6df 3413 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3414 *
3415 * This is used directly by GPIO drivers that want to indicate
3416 * that a certain GPIO is no longer used exclusively for IRQ.
d2876d08 3417 */
a0b66a73 3418void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset)
d468bf9e 3419{
3940c34a
LW
3420 struct gpio_desc *desc;
3421
a0b66a73 3422 desc = gpiochip_get_desc(gc, offset);
3940c34a 3423 if (IS_ERR(desc))
d468bf9e 3424 return;
d2876d08 3425
3940c34a 3426 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3427 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3428
3429 /* If we only had this marking, erase it */
3430 if (desc->label && !strcmp(desc->label, "interrupt"))
3431 desc_set_label(desc, NULL);
d468bf9e 3432}
e3a2e878 3433EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
d468bf9e 3434
a0b66a73 3435void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3436{
a0b66a73 3437 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3438
3439 if (!IS_ERR(desc) &&
3440 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
3441 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3442}
3443EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
3444
a0b66a73 3445void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3446{
a0b66a73 3447 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3448
3449 if (!IS_ERR(desc) &&
3450 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
e9bdf7e6
LW
3451 /*
3452 * We must not be output when using IRQ UNLESS we are
3453 * open drain.
3454 */
3455 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) &&
3456 !test_bit(FLAG_OPEN_DRAIN, &desc->flags));
4e9439dd
HV
3457 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3458 }
3459}
3460EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
3461
a0b66a73 3462bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset)
6cee3821 3463{
a0b66a73 3464 if (offset >= gc->ngpio)
6cee3821
LW
3465 return false;
3466
a0b66a73 3467 return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags);
6cee3821
LW
3468}
3469EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
3470
a0b66a73 3471int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238
HV
3472{
3473 int ret;
3474
a0b66a73 3475 if (!try_module_get(gc->gpiodev->owner))
4e6b8238
HV
3476 return -ENODEV;
3477
a0b66a73 3478 ret = gpiochip_lock_as_irq(gc, offset);
4e6b8238 3479 if (ret) {
a0b66a73
LW
3480 chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset);
3481 module_put(gc->gpiodev->owner);
4e6b8238
HV
3482 return ret;
3483 }
3484 return 0;
3485}
3486EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
3487
a0b66a73 3488void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238 3489{
a0b66a73
LW
3490 gpiochip_unlock_as_irq(gc, offset);
3491 module_put(gc->gpiodev->owner);
4e6b8238
HV
3492}
3493EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
3494
a0b66a73 3495bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset)
143b65d6 3496{
a0b66a73 3497 if (offset >= gc->ngpio)
143b65d6
LW
3498 return false;
3499
a0b66a73 3500 return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3501}
3502EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
3503
a0b66a73 3504bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset)
143b65d6 3505{
a0b66a73 3506 if (offset >= gc->ngpio)
143b65d6
LW
3507 return false;
3508
a0b66a73 3509 return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3510}
3511EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
3512
a0b66a73 3513bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset)
05f479bf 3514{
a0b66a73 3515 if (offset >= gc->ngpio)
05f479bf
CK
3516 return false;
3517
a0b66a73 3518 return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags);
05f479bf
CK
3519}
3520EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
3521
79a9becd
AC
3522/**
3523 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
3524 * @desc: gpio whose value will be returned
3525 *
3526 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3527 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd
AC
3528 *
3529 * This function is to be called from contexts that can sleep.
d2876d08 3530 */
79a9becd 3531int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
d2876d08 3532{
d2876d08 3533 might_sleep_if(extra_checks);
fdeb8e15 3534 VALIDATE_DESC(desc);
fac9d885 3535 return gpiod_get_raw_value_commit(desc);
d2876d08 3536}
79a9becd 3537EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
372e722e 3538
79a9becd
AC
3539/**
3540 * gpiod_get_value_cansleep() - return a gpio's value
3541 * @desc: gpio whose value will be returned
3542 *
3543 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3544 * account, or negative errno on failure.
79a9becd
AC
3545 *
3546 * This function is to be called from contexts that can sleep.
3547 */
3548int gpiod_get_value_cansleep(const struct gpio_desc *desc)
d2876d08 3549{
3f397c21 3550 int value;
d2876d08
DB
3551
3552 might_sleep_if(extra_checks);
fdeb8e15 3553 VALIDATE_DESC(desc);
fac9d885 3554 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3555 if (value < 0)
3556 return value;
3557
79a9becd
AC
3558 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3559 value = !value;
3560
3f397c21 3561 return value;
d2876d08 3562}
79a9becd 3563EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
372e722e 3564
eec1d566
LW
3565/**
3566 * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
b9762beb 3567 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3568 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3569 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3570 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3571 *
3572 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3573 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3574 * else an error code.
3575 *
3576 * This function is to be called from contexts that can sleep.
3577 */
3578int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
3579 struct gpio_desc **desc_array,
77588c14 3580 struct gpio_array *array_info,
b9762beb 3581 unsigned long *value_bitmap)
eec1d566
LW
3582{
3583 might_sleep_if(extra_checks);
3584 if (!desc_array)
3585 return -EINVAL;
3586 return gpiod_get_array_value_complex(true, true, array_size,
77588c14
JK
3587 desc_array, array_info,
3588 value_bitmap);
eec1d566
LW
3589}
3590EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
3591
3592/**
3593 * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
b9762beb 3594 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3595 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3596 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3597 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3598 *
3599 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3600 * into account. Return 0 in case of success, else an error code.
3601 *
3602 * This function is to be called from contexts that can sleep.
3603 */
3604int gpiod_get_array_value_cansleep(unsigned int array_size,
3605 struct gpio_desc **desc_array,
77588c14 3606 struct gpio_array *array_info,
b9762beb 3607 unsigned long *value_bitmap)
eec1d566
LW
3608{
3609 might_sleep_if(extra_checks);
3610 if (!desc_array)
3611 return -EINVAL;
3612 return gpiod_get_array_value_complex(false, true, array_size,
77588c14
JK
3613 desc_array, array_info,
3614 value_bitmap);
eec1d566
LW
3615}
3616EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
3617
79a9becd
AC
3618/**
3619 * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
3620 * @desc: gpio whose value will be assigned
3621 * @value: value to assign
3622 *
3623 * Set the raw value of the GPIO, i.e. the value of its physical line without
3624 * regard for its ACTIVE_LOW status.
3625 *
3626 * This function is to be called from contexts that can sleep.
3627 */
3628void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
372e722e 3629{
d2876d08 3630 might_sleep_if(extra_checks);
fdeb8e15 3631 VALIDATE_DESC_VOID(desc);
fac9d885 3632 gpiod_set_raw_value_commit(desc, value);
372e722e 3633}
79a9becd 3634EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
d2876d08 3635
79a9becd
AC
3636/**
3637 * gpiod_set_value_cansleep() - assign a gpio's value
3638 * @desc: gpio whose value will be assigned
3639 * @value: value to assign
3640 *
3641 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
3642 * account
3643 *
3644 * This function is to be called from contexts that can sleep.
3645 */
3646void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
d2876d08 3647{
d2876d08 3648 might_sleep_if(extra_checks);
fdeb8e15 3649 VALIDATE_DESC_VOID(desc);
1e77fc82 3650 gpiod_set_value_nocheck(desc, value);
372e722e 3651}
79a9becd 3652EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
d2876d08 3653
5f424243 3654/**
3fff99bc 3655 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3656 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3657 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3658 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3659 * @value_bitmap: bitmap of values to assign
5f424243
RI
3660 *
3661 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3662 * without regard for their ACTIVE_LOW status.
3663 *
3664 * This function is to be called from contexts that can sleep.
3665 */
3027743f 3666int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3c940660
GU
3667 struct gpio_desc **desc_array,
3668 struct gpio_array *array_info,
3669 unsigned long *value_bitmap)
5f424243
RI
3670{
3671 might_sleep_if(extra_checks);
3672 if (!desc_array)
3027743f
LA
3673 return -EINVAL;
3674 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
77588c14 3675 array_info, value_bitmap);
5f424243 3676}
3fff99bc 3677EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
5f424243 3678
3946d187
DT
3679/**
3680 * gpiod_add_lookup_tables() - register GPIO device consumers
3681 * @tables: list of tables of consumers to register
3682 * @n: number of tables in the list
3683 */
3684void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
3685{
3686 unsigned int i;
3687
3688 mutex_lock(&gpio_lookup_lock);
3689
3690 for (i = 0; i < n; i++)
3691 list_add_tail(&tables[i]->list, &gpio_lookup_list);
3692
3693 mutex_unlock(&gpio_lookup_lock);
3694}
3695
5f424243 3696/**
3fff99bc 3697 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3698 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3699 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3700 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3701 * @value_bitmap: bitmap of values to assign
5f424243
RI
3702 *
3703 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3704 * into account.
3705 *
3706 * This function is to be called from contexts that can sleep.
3707 */
cf9af0d5
GU
3708int gpiod_set_array_value_cansleep(unsigned int array_size,
3709 struct gpio_desc **desc_array,
3710 struct gpio_array *array_info,
3711 unsigned long *value_bitmap)
5f424243
RI
3712{
3713 might_sleep_if(extra_checks);
3714 if (!desc_array)
cf9af0d5
GU
3715 return -EINVAL;
3716 return gpiod_set_array_value_complex(false, true, array_size,
3717 desc_array, array_info,
3718 value_bitmap);
5f424243 3719}
3fff99bc 3720EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
5f424243 3721
bae48da2 3722/**
ad824783
AC
3723 * gpiod_add_lookup_table() - register GPIO device consumers
3724 * @table: table of consumers to register
bae48da2 3725 */
ad824783 3726void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
bae48da2 3727{
49fdfe66 3728 gpiod_add_lookup_tables(&table, 1);
bae48da2 3729}
226b2242 3730EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
bae48da2 3731
be9015ab
SK
3732/**
3733 * gpiod_remove_lookup_table() - unregister GPIO device consumers
3734 * @table: table of consumers to unregister
3735 */
3736void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
3737{
d321ad12
AS
3738 /* Nothing to remove */
3739 if (!table)
3740 return;
3741
be9015ab
SK
3742 mutex_lock(&gpio_lookup_lock);
3743
3744 list_del(&table->list);
3745
3746 mutex_unlock(&gpio_lookup_lock);
3747}
226b2242 3748EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
be9015ab 3749
a411e81e
BG
3750/**
3751 * gpiod_add_hogs() - register a set of GPIO hogs from machine code
3752 * @hogs: table of gpio hog entries with a zeroed sentinel at the end
3753 */
3754void gpiod_add_hogs(struct gpiod_hog *hogs)
3755{
a0b66a73 3756 struct gpio_chip *gc;
a411e81e
BG
3757 struct gpiod_hog *hog;
3758
3759 mutex_lock(&gpio_machine_hogs_mutex);
3760
3761 for (hog = &hogs[0]; hog->chip_label; hog++) {
3762 list_add_tail(&hog->list, &gpio_machine_hogs);
3763
3764 /*
3765 * The chip may have been registered earlier, so check if it
3766 * exists and, if so, try to hog the line now.
3767 */
a0b66a73
LW
3768 gc = find_chip_by_name(hog->chip_label);
3769 if (gc)
3770 gpiochip_machine_hog(gc, hog);
a411e81e
BG
3771 }
3772
3773 mutex_unlock(&gpio_machine_hogs_mutex);
3774}
3775EXPORT_SYMBOL_GPL(gpiod_add_hogs);
3776
dd61b292
BG
3777void gpiod_remove_hogs(struct gpiod_hog *hogs)
3778{
3779 struct gpiod_hog *hog;
3780
3781 mutex_lock(&gpio_machine_hogs_mutex);
3782 for (hog = &hogs[0]; hog->chip_label; hog++)
3783 list_del(&hog->list);
3784 mutex_unlock(&gpio_machine_hogs_mutex);
3785}
3786EXPORT_SYMBOL_GPL(gpiod_remove_hogs);
3787
ad824783 3788static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
bae48da2
AC
3789{
3790 const char *dev_id = dev ? dev_name(dev) : NULL;
ad824783 3791 struct gpiod_lookup_table *table;
bae48da2
AC
3792
3793 mutex_lock(&gpio_lookup_lock);
3794
ad824783
AC
3795 list_for_each_entry(table, &gpio_lookup_list, list) {
3796 if (table->dev_id && dev_id) {
3797 /*
3798 * Valid strings on both ends, must be identical to have
3799 * a match
3800 */
3801 if (!strcmp(table->dev_id, dev_id))
3802 goto found;
3803 } else {
3804 /*
3805 * One of the pointers is NULL, so both must be to have
3806 * a match
3807 */
3808 if (dev_id == table->dev_id)
3809 goto found;
3810 }
3811 }
3812 table = NULL;
bae48da2 3813
ad824783
AC
3814found:
3815 mutex_unlock(&gpio_lookup_lock);
3816 return table;
3817}
bae48da2 3818
ad824783 3819static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
fed7026a 3820 unsigned int idx, unsigned long *flags)
ad824783 3821{
2a3cf6a3 3822 struct gpio_desc *desc = ERR_PTR(-ENOENT);
ad824783
AC
3823 struct gpiod_lookup_table *table;
3824 struct gpiod_lookup *p;
bae48da2 3825
ad824783
AC
3826 table = gpiod_find_lookup_table(dev);
3827 if (!table)
3828 return desc;
bae48da2 3829
4c033b54 3830 for (p = &table->table[0]; p->key; p++) {
a0b66a73 3831 struct gpio_chip *gc;
bae48da2 3832
ad824783 3833 /* idx must always match exactly */
bae48da2
AC
3834 if (p->idx != idx)
3835 continue;
3836
ad824783
AC
3837 /* If the lookup entry has a con_id, require exact match */
3838 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
3839 continue;
bae48da2 3840
4c033b54
GU
3841 if (p->chip_hwnum == U16_MAX) {
3842 desc = gpio_name_to_desc(p->key);
3843 if (desc) {
3844 *flags = p->flags;
3845 return desc;
3846 }
3847
3848 dev_warn(dev, "cannot find GPIO line %s, deferring\n",
3849 p->key);
3850 return ERR_PTR(-EPROBE_DEFER);
3851 }
3852
3853 gc = find_chip_by_name(p->key);
bae48da2 3854
a0b66a73 3855 if (!gc) {
8853daf3
JK
3856 /*
3857 * As the lookup table indicates a chip with
4c033b54 3858 * p->key should exist, assume it may
8853daf3
JK
3859 * still appear later and let the interested
3860 * consumer be probed again or let the Deferred
3861 * Probe infrastructure handle the error.
3862 */
3863 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
4c033b54 3864 p->key);
8853daf3 3865 return ERR_PTR(-EPROBE_DEFER);
ad824783 3866 }
bae48da2 3867
a0b66a73 3868 if (gc->ngpio <= p->chip_hwnum) {
2a3cf6a3 3869 dev_err(dev,
d935bd50 3870 "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n",
a0b66a73
LW
3871 idx, p->chip_hwnum, gc->ngpio - 1,
3872 gc->label);
2a3cf6a3 3873 return ERR_PTR(-EINVAL);
bae48da2 3874 }
bae48da2 3875
a0b66a73 3876 desc = gpiochip_get_desc(gc, p->chip_hwnum);
ad824783 3877 *flags = p->flags;
bae48da2 3878
2a3cf6a3 3879 return desc;
bae48da2
AC
3880 }
3881
bae48da2
AC
3882 return desc;
3883}
3884
66858527
RI
3885static int platform_gpio_count(struct device *dev, const char *con_id)
3886{
3887 struct gpiod_lookup_table *table;
3888 struct gpiod_lookup *p;
3889 unsigned int count = 0;
3890
3891 table = gpiod_find_lookup_table(dev);
3892 if (!table)
3893 return -ENOENT;
3894
4c033b54 3895 for (p = &table->table[0]; p->key; p++) {
66858527
RI
3896 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
3897 (!con_id && !p->con_id))
3898 count++;
3899 }
3900 if (!count)
3901 return -ENOENT;
3902
3903 return count;
3904}
3905
8eb1f71e
DT
3906static struct gpio_desc *gpiod_find_by_fwnode(struct fwnode_handle *fwnode,
3907 struct device *consumer,
3908 const char *con_id,
3909 unsigned int idx,
3910 enum gpiod_flags *flags,
3911 unsigned long *lookupflags)
0eadd36d 3912{
8eb1f71e 3913 struct gpio_desc *desc = ERR_PTR(-ENOENT);
0eadd36d
DT
3914
3915 if (is_of_node(fwnode)) {
8eb1f71e
DT
3916 dev_dbg(consumer, "using DT '%pfw' for '%s' GPIO lookup\n",
3917 fwnode, con_id);
3918 desc = of_find_gpio(to_of_node(fwnode), con_id, idx, lookupflags);
0eadd36d 3919 } else if (is_acpi_node(fwnode)) {
8eb1f71e
DT
3920 dev_dbg(consumer, "using ACPI '%pfw' for '%s' GPIO lookup\n",
3921 fwnode, con_id);
3922 desc = acpi_find_gpio(fwnode, con_id, idx, flags, lookupflags);
e7f9ff5d
DT
3923 } else if (is_software_node(fwnode)) {
3924 dev_dbg(consumer, "using swnode '%pfw' for '%s' GPIO lookup\n",
3925 fwnode, con_id);
3926 desc = swnode_find_gpio(fwnode, con_id, idx, lookupflags);
0eadd36d 3927 }
0eadd36d 3928
8eb1f71e
DT
3929 return desc;
3930}
0eadd36d 3931
8eb1f71e
DT
3932static struct gpio_desc *gpiod_find_and_request(struct device *consumer,
3933 struct fwnode_handle *fwnode,
3934 const char *con_id,
3935 unsigned int idx,
3936 enum gpiod_flags flags,
3937 const char *label,
3938 bool platform_lookup_allowed)
3939{
ba2dc1cb 3940 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
c122f461 3941 struct gpio_desc *desc;
8eb1f71e
DT
3942 int ret;
3943
c122f461 3944 desc = gpiod_find_by_fwnode(fwnode, consumer, con_id, idx, &flags, &lookupflags);
8eb1f71e
DT
3945 if (gpiod_not_found(desc) && platform_lookup_allowed) {
3946 /*
3947 * Either we are not using DT or ACPI, or their lookup did not
3948 * return a result. In that case, use platform lookup as a
3949 * fallback.
3950 */
3951 dev_dbg(consumer, "using lookup tables for GPIO lookup\n");
3952 desc = gpiod_find(consumer, con_id, idx, &lookupflags);
0eadd36d
DT
3953 }
3954
8eb1f71e
DT
3955 if (IS_ERR(desc)) {
3956 dev_dbg(consumer, "No GPIO consumer %s found\n", con_id);
3957 return desc;
3958 }
3959
3960 /*
3961 * If a connection label was passed use that, else attempt to use
3962 * the device name as label
3963 */
0eadd36d 3964 ret = gpiod_request(desc, label);
8eb1f71e
DT
3965 if (ret) {
3966 if (!(ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE))
3967 return ERR_PTR(ret);
0eadd36d 3968
8eb1f71e
DT
3969 /*
3970 * This happens when there are several consumers for
3971 * the same GPIO line: we just return here without
3972 * further initialization. It is a bit of a hack.
3973 * This is necessary to support fixed regulators.
3974 *
3975 * FIXME: Make this more sane and safe.
3976 */
3977 dev_info(consumer,
3978 "nonexclusive access to GPIO for %s\n", con_id);
3979 return desc;
3980 }
0eadd36d 3981
8eb1f71e 3982 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
0eadd36d 3983 if (ret < 0) {
8eb1f71e 3984 dev_dbg(consumer, "setup of GPIO %s failed\n", con_id);
0eadd36d
DT
3985 gpiod_put(desc);
3986 return ERR_PTR(ret);
3987 }
3988
3989 blocking_notifier_call_chain(&desc->gdev->notifier,
3990 GPIOLINE_CHANGED_REQUESTED, desc);
3991
3992 return desc;
3993}
3994
13949fa9
DT
3995/**
3996 * fwnode_gpiod_get_index - obtain a GPIO from firmware node
3997 * @fwnode: handle of the firmware node
3998 * @con_id: function within the GPIO consumer
3999 * @index: index of the GPIO to obtain for the consumer
4000 * @flags: GPIO initialization flags
4001 * @label: label to attach to the requested GPIO
4002 *
4003 * This function can be used for drivers that get their configuration
4004 * from opaque firmware.
4005 *
4006 * The function properly finds the corresponding GPIO using whatever is the
4007 * underlying firmware interface and then makes sure that the GPIO
4008 * descriptor is requested before it is returned to the caller.
4009 *
4010 * Returns:
4011 * On successful request the GPIO pin is configured in accordance with
4012 * provided @flags.
4013 *
4014 * In case of error an ERR_PTR() is returned.
4015 */
4016struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
8eb1f71e
DT
4017 const char *con_id,
4018 int index,
13949fa9
DT
4019 enum gpiod_flags flags,
4020 const char *label)
4021{
8eb1f71e 4022 return gpiod_find_and_request(NULL, fwnode, con_id, index, flags, label, false);
13949fa9
DT
4023}
4024EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
4025
66858527
RI
4026/**
4027 * gpiod_count - return the number of GPIOs associated with a device / function
4028 * or -ENOENT if no GPIO has been assigned to the requested function
4029 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4030 * @con_id: function within the GPIO consumer
4031 */
4032int gpiod_count(struct device *dev, const char *con_id)
4033{
944f4b0a 4034 const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
66858527
RI
4035 int count = -ENOENT;
4036
944f4b0a 4037 if (is_of_node(fwnode))
f626d6df 4038 count = of_gpio_get_count(dev, con_id);
944f4b0a 4039 else if (is_acpi_node(fwnode))
66858527 4040 count = acpi_gpio_count(dev, con_id);
e7f9ff5d
DT
4041 else if (is_software_node(fwnode))
4042 count = swnode_gpio_count(fwnode, con_id);
66858527
RI
4043
4044 if (count < 0)
4045 count = platform_gpio_count(dev, con_id);
4046
4047 return count;
4048}
4049EXPORT_SYMBOL_GPL(gpiod_count);
4050
bae48da2 4051/**
0879162f 4052 * gpiod_get - obtain a GPIO for a given GPIO function
ad824783 4053 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2 4054 * @con_id: function within the GPIO consumer
39b2bbe3 4055 * @flags: optional GPIO initialization flags
bae48da2
AC
4056 *
4057 * Return the GPIO descriptor corresponding to the function con_id of device
2a3cf6a3 4058 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
20a8a968 4059 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
bae48da2 4060 */
b17d1bf1 4061struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
39b2bbe3 4062 enum gpiod_flags flags)
bae48da2 4063{
39b2bbe3 4064 return gpiod_get_index(dev, con_id, 0, flags);
bae48da2 4065}
b17d1bf1 4066EXPORT_SYMBOL_GPL(gpiod_get);
bae48da2 4067
29a1f233
TR
4068/**
4069 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
4070 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4071 * @con_id: function within the GPIO consumer
39b2bbe3 4072 * @flags: optional GPIO initialization flags
29a1f233
TR
4073 *
4074 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
4075 * the requested function it will return NULL. This is convenient for drivers
4076 * that need to handle optional GPIOs.
4077 */
b17d1bf1 4078struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
39b2bbe3
AC
4079 const char *con_id,
4080 enum gpiod_flags flags)
29a1f233 4081{
39b2bbe3 4082 return gpiod_get_index_optional(dev, con_id, 0, flags);
29a1f233 4083}
b17d1bf1 4084EXPORT_SYMBOL_GPL(gpiod_get_optional);
29a1f233 4085
f625d460
BP
4086
4087/**
4088 * gpiod_configure_flags - helper function to configure a given GPIO
4089 * @desc: gpio whose value will be assigned
4090 * @con_id: function within the GPIO consumer
fed7026a
AS
4091 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4092 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4093 * @dflags: gpiod_flags - optional GPIO initialization flags
4094 *
4095 * Return 0 on success, -ENOENT if no GPIO has been assigned to the
4096 * requested function and/or index, or another IS_ERR() code if an error
4097 * occurred while trying to acquire the GPIO.
4098 */
c29fd9eb 4099int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
85b03b30 4100 unsigned long lflags, enum gpiod_flags dflags)
f625d460 4101{
d377f56f 4102 int ret;
f625d460 4103
85b03b30
JH
4104 if (lflags & GPIO_ACTIVE_LOW)
4105 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
f926dfc1 4106
85b03b30
JH
4107 if (lflags & GPIO_OPEN_DRAIN)
4108 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
f926dfc1
LW
4109 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
4110 /*
4111 * This enforces open drain mode from the consumer side.
4112 * This is necessary for some busses like I2C, but the lookup
4113 * should *REALLY* have specified them as open drain in the
4114 * first place, so print a little warning here.
4115 */
4116 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
4117 gpiod_warn(desc,
4118 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
4119 }
4120
85b03b30
JH
4121 if (lflags & GPIO_OPEN_SOURCE)
4122 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
e10f72bf 4123
c269df8c
NS
4124 if (((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) ||
4125 ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DISABLE)) ||
4126 ((lflags & GPIO_PULL_DOWN) && (lflags & GPIO_PULL_DISABLE))) {
d449991c 4127 gpiod_err(desc,
c269df8c 4128 "multiple pull-up, pull-down or pull-disable enabled, invalid configuration\n");
d449991c
TP
4129 return -EINVAL;
4130 }
4131
4132 if (lflags & GPIO_PULL_UP)
4133 set_bit(FLAG_PULL_UP, &desc->flags);
4134 else if (lflags & GPIO_PULL_DOWN)
4135 set_bit(FLAG_PULL_DOWN, &desc->flags);
c269df8c
NS
4136 else if (lflags & GPIO_PULL_DISABLE)
4137 set_bit(FLAG_BIAS_DISABLE, &desc->flags);
d449991c 4138
d377f56f
LW
4139 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
4140 if (ret < 0)
4141 return ret;
85b03b30 4142
f625d460
BP
4143 /* No particular flag request, return here... */
4144 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
262b9011 4145 gpiod_dbg(desc, "no flags found for %s\n", con_id);
f625d460
BP
4146 return 0;
4147 }
4148
4149 /* Process flags */
4150 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
d377f56f 4151 ret = gpiod_direction_output(desc,
ad17731d 4152 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
f625d460 4153 else
d377f56f 4154 ret = gpiod_direction_input(desc);
f625d460 4155
d377f56f 4156 return ret;
f625d460
BP
4157}
4158
bae48da2
AC
4159/**
4160 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
fdd6a5fe 4161 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2
AC
4162 * @con_id: function within the GPIO consumer
4163 * @idx: index of the GPIO to obtain in the consumer
39b2bbe3 4164 * @flags: optional GPIO initialization flags
bae48da2
AC
4165 *
4166 * This variant of gpiod_get() allows to access GPIOs other than the first
4167 * defined one for functions that define several GPIOs.
4168 *
2a3cf6a3
AC
4169 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
4170 * requested function and/or index, or another IS_ERR() code if an error
20a8a968 4171 * occurred while trying to acquire the GPIO.
bae48da2 4172 */
b17d1bf1 4173struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
bae48da2 4174 const char *con_id,
39b2bbe3
AC
4175 unsigned int idx,
4176 enum gpiod_flags flags)
bae48da2 4177{
07445ae1 4178 struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
7d18f0a1 4179 const char *devname = dev ? dev_name(dev) : "?";
8eb1f71e 4180 const char *label = con_id ?: devname;
bae48da2 4181
8eb1f71e 4182 return gpiod_find_and_request(dev, fwnode, con_id, idx, flags, label, true);
6392cca4 4183}
b17d1bf1 4184EXPORT_SYMBOL_GPL(gpiod_get_index);
6392cca4 4185
29a1f233
TR
4186/**
4187 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
4188 * function
4189 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4190 * @con_id: function within the GPIO consumer
4191 * @index: index of the GPIO to obtain in the consumer
39b2bbe3 4192 * @flags: optional GPIO initialization flags
29a1f233
TR
4193 *
4194 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
4195 * specified index was assigned to the requested function it will return NULL.
4196 * This is convenient for drivers that need to handle optional GPIOs.
4197 */
b17d1bf1 4198struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
29a1f233 4199 const char *con_id,
39b2bbe3
AC
4200 unsigned int index,
4201 enum gpiod_flags flags)
29a1f233
TR
4202{
4203 struct gpio_desc *desc;
4204
39b2bbe3 4205 desc = gpiod_get_index(dev, con_id, index, flags);
7b58696d
AS
4206 if (gpiod_not_found(desc))
4207 return NULL;
29a1f233
TR
4208
4209 return desc;
4210}
b17d1bf1 4211EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
29a1f233 4212
f625d460
BP
4213/**
4214 * gpiod_hog - Hog the specified GPIO desc given the provided flags
4215 * @desc: gpio whose value will be assigned
4216 * @name: gpio line name
fed7026a
AS
4217 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4218 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4219 * @dflags: gpiod_flags - optional GPIO initialization flags
4220 */
4221int gpiod_hog(struct gpio_desc *desc, const char *name,
4222 unsigned long lflags, enum gpiod_flags dflags)
4223{
a0b66a73 4224 struct gpio_chip *gc;
f625d460
BP
4225 struct gpio_desc *local_desc;
4226 int hwnum;
d377f56f 4227 int ret;
f625d460 4228
a0b66a73 4229 gc = gpiod_to_chip(desc);
f625d460
BP
4230 hwnum = gpio_chip_hwgpio(desc);
4231
a0b66a73 4232 local_desc = gpiochip_request_own_desc(gc, hwnum, name,
5923ea6c 4233 lflags, dflags);
f625d460 4234 if (IS_ERR(local_desc)) {
d377f56f 4235 ret = PTR_ERR(local_desc);
c31a571d 4236 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
a0b66a73 4237 name, gc->label, hwnum, ret);
d377f56f 4238 return ret;
f625d460
BP
4239 }
4240
f625d460
BP
4241 /* Mark GPIO as hogged so it can be identified and removed later */
4242 set_bit(FLAG_IS_HOGGED, &desc->flags);
4243
262b9011 4244 gpiod_info(desc, "hogged as %s%s\n",
b27f300f
BG
4245 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
4246 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
4247 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
f625d460
BP
4248
4249 return 0;
4250}
4251
4252/**
4253 * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
a0b66a73 4254 * @gc: gpio chip to act on
f625d460 4255 */
a0b66a73 4256static void gpiochip_free_hogs(struct gpio_chip *gc)
f625d460 4257{
80c78fbe 4258 struct gpio_desc *desc;
f625d460 4259
57017edd 4260 for_each_gpio_desc_with_flag(gc, desc, FLAG_IS_HOGGED)
80c78fbe 4261 gpiochip_free_own_desc(desc);
f625d460
BP
4262}
4263
66858527
RI
4264/**
4265 * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
4266 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4267 * @con_id: function within the GPIO consumer
4268 * @flags: optional GPIO initialization flags
4269 *
4270 * This function acquires all the GPIOs defined under a given function.
4271 *
4272 * Return a struct gpio_descs containing an array of descriptors, -ENOENT if
4273 * no GPIO has been assigned to the requested function, or another IS_ERR()
4274 * code if an error occurred while trying to acquire the GPIOs.
4275 */
4276struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
4277 const char *con_id,
4278 enum gpiod_flags flags)
4279{
4280 struct gpio_desc *desc;
4281 struct gpio_descs *descs;
bf9346f5 4282 struct gpio_array *array_info = NULL;
a0b66a73 4283 struct gpio_chip *gc;
bf9346f5 4284 int count, bitmap_size;
79736429 4285 size_t descs_size;
66858527
RI
4286
4287 count = gpiod_count(dev, con_id);
4288 if (count < 0)
4289 return ERR_PTR(count);
4290
79736429
AS
4291 descs_size = struct_size(descs, desc, count);
4292 descs = kzalloc(descs_size, GFP_KERNEL);
66858527
RI
4293 if (!descs)
4294 return ERR_PTR(-ENOMEM);
4295
4ea0c977 4296 for (descs->ndescs = 0; descs->ndescs < count; descs->ndescs++) {
66858527
RI
4297 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
4298 if (IS_ERR(desc)) {
4299 gpiod_put_array(descs);
4300 return ERR_CAST(desc);
4301 }
bf9346f5 4302
66858527 4303 descs->desc[descs->ndescs] = desc;
bf9346f5 4304
a0b66a73 4305 gc = gpiod_to_chip(desc);
bf9346f5 4306 /*
c4c958aa
JK
4307 * If pin hardware number of array member 0 is also 0, select
4308 * its chip as a candidate for fast bitmap processing path.
bf9346f5 4309 */
c4c958aa 4310 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
bf9346f5
JK
4311 struct gpio_descs *array;
4312
a0b66a73
LW
4313 bitmap_size = BITS_TO_LONGS(gc->ngpio > count ?
4314 gc->ngpio : count);
bf9346f5 4315
79736429
AS
4316 array = krealloc(descs, descs_size +
4317 struct_size(array_info, invert_mask, 3 * bitmap_size),
4318 GFP_KERNEL | __GFP_ZERO);
bf9346f5
JK
4319 if (!array) {
4320 gpiod_put_array(descs);
4321 return ERR_PTR(-ENOMEM);
4322 }
4323
bf9346f5 4324 descs = array;
79736429
AS
4325
4326 array_info = (void *)descs + descs_size;
bf9346f5
JK
4327 array_info->get_mask = array_info->invert_mask +
4328 bitmap_size;
4329 array_info->set_mask = array_info->get_mask +
4330 bitmap_size;
4331
4332 array_info->desc = descs->desc;
4333 array_info->size = count;
a0b66a73 4334 array_info->chip = gc;
bf9346f5
JK
4335 bitmap_set(array_info->get_mask, descs->ndescs,
4336 count - descs->ndescs);
4337 bitmap_set(array_info->set_mask, descs->ndescs,
4338 count - descs->ndescs);
4339 descs->info = array_info;
4340 }
4ea0c977
AS
4341
4342 /* If there is no cache for fast bitmap processing path, continue */
4343 if (!array_info)
4344 continue;
4345
c4c958aa 4346 /* Unmark array members which don't belong to the 'fast' chip */
4ea0c977 4347 if (array_info->chip != gc) {
bf9346f5
JK
4348 __clear_bit(descs->ndescs, array_info->get_mask);
4349 __clear_bit(descs->ndescs, array_info->set_mask);
c4c958aa
JK
4350 }
4351 /*
4352 * Detect array members which belong to the 'fast' chip
4353 * but their pins are not in hardware order.
4354 */
4ea0c977 4355 else if (gpio_chip_hwgpio(desc) != descs->ndescs) {
c4c958aa
JK
4356 /*
4357 * Don't use fast path if all array members processed so
4358 * far belong to the same chip as this one but its pin
4359 * hardware number is different from its array index.
4360 */
4361 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
4362 array_info = NULL;
4363 } else {
4364 __clear_bit(descs->ndescs,
4365 array_info->get_mask);
4366 __clear_bit(descs->ndescs,
4367 array_info->set_mask);
4368 }
4ea0c977 4369 } else {
bf9346f5 4370 /* Exclude open drain or open source from fast output */
a0b66a73
LW
4371 if (gpiochip_line_is_open_drain(gc, descs->ndescs) ||
4372 gpiochip_line_is_open_source(gc, descs->ndescs))
bf9346f5
JK
4373 __clear_bit(descs->ndescs,
4374 array_info->set_mask);
4375 /* Identify 'fast' pins which require invertion */
4376 if (gpiod_is_active_low(desc))
4377 __set_bit(descs->ndescs,
4378 array_info->invert_mask);
4379 }
66858527 4380 }
bf9346f5
JK
4381 if (array_info)
4382 dev_dbg(dev,
4383 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
4384 array_info->chip->label, array_info->size,
4385 *array_info->get_mask, *array_info->set_mask,
4386 *array_info->invert_mask);
66858527
RI
4387 return descs;
4388}
4389EXPORT_SYMBOL_GPL(gpiod_get_array);
4390
4391/**
4392 * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
4393 * function
4394 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4395 * @con_id: function within the GPIO consumer
4396 * @flags: optional GPIO initialization flags
4397 *
4398 * This is equivalent to gpiod_get_array(), except that when no GPIO was
4399 * assigned to the requested function it will return NULL.
4400 */
4401struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
4402 const char *con_id,
4403 enum gpiod_flags flags)
4404{
4405 struct gpio_descs *descs;
4406
4407 descs = gpiod_get_array(dev, con_id, flags);
7b58696d 4408 if (gpiod_not_found(descs))
66858527
RI
4409 return NULL;
4410
4411 return descs;
4412}
4413EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
4414
bae48da2
AC
4415/**
4416 * gpiod_put - dispose of a GPIO descriptor
4417 * @desc: GPIO descriptor to dispose of
4418 *
4419 * No descriptor can be used after gpiod_put() has been called on it.
4420 */
4421void gpiod_put(struct gpio_desc *desc)
4422{
1d7765ba
AS
4423 if (desc)
4424 gpiod_free(desc);
372e722e 4425}
bae48da2 4426EXPORT_SYMBOL_GPL(gpiod_put);
d2876d08 4427
66858527
RI
4428/**
4429 * gpiod_put_array - dispose of multiple GPIO descriptors
4430 * @descs: struct gpio_descs containing an array of descriptors
4431 */
4432void gpiod_put_array(struct gpio_descs *descs)
4433{
4434 unsigned int i;
4435
4436 for (i = 0; i < descs->ndescs; i++)
4437 gpiod_put(descs->desc[i]);
4438
4439 kfree(descs);
4440}
4441EXPORT_SYMBOL_GPL(gpiod_put_array);
4442
4731210c
SK
4443static int gpio_stub_drv_probe(struct device *dev)
4444{
4445 /*
4446 * The DT node of some GPIO chips have a "compatible" property, but
4447 * never have a struct device added and probed by a driver to register
4448 * the GPIO chip with gpiolib. In such cases, fw_devlink=on will cause
4449 * the consumers of the GPIO chip to get probe deferred forever because
4450 * they will be waiting for a device associated with the GPIO chip
4451 * firmware node to get added and bound to a driver.
4452 *
4453 * To allow these consumers to probe, we associate the struct
4454 * gpio_device of the GPIO chip with the firmware node and then simply
4455 * bind it to this stub driver.
4456 */
4457 return 0;
4458}
4459
4460static struct device_driver gpio_stub_drv = {
4461 .name = "gpio_stub_drv",
4462 .bus = &gpio_bus_type,
4463 .probe = gpio_stub_drv_probe,
4464};
4465
3c702e99
LW
4466static int __init gpiolib_dev_init(void)
4467{
4468 int ret;
4469
4470 /* Register GPIO sysfs bus */
b1911710 4471 ret = bus_register(&gpio_bus_type);
3c702e99
LW
4472 if (ret < 0) {
4473 pr_err("gpiolib: could not register GPIO bus type\n");
4474 return ret;
4475 }
4476
3875721e
WY
4477 ret = driver_register(&gpio_stub_drv);
4478 if (ret < 0) {
4731210c
SK
4479 pr_err("gpiolib: could not register GPIO stub driver\n");
4480 bus_unregister(&gpio_bus_type);
4481 return ret;
4482 }
4483
ddd8891e 4484 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME);
3c702e99
LW
4485 if (ret < 0) {
4486 pr_err("gpiolib: failed to allocate char dev region\n");
4731210c 4487 driver_unregister(&gpio_stub_drv);
3c702e99 4488 bus_unregister(&gpio_bus_type);
63636d95 4489 return ret;
3c702e99 4490 }
63636d95
GU
4491
4492 gpiolib_initialized = true;
4493 gpiochip_setup_devs();
4494
8650b609
DG
4495#if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO)
4496 WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier));
4497#endif /* CONFIG_OF_DYNAMIC && CONFIG_OF_GPIO */
63636d95 4498
3c702e99
LW
4499 return ret;
4500}
4501core_initcall(gpiolib_dev_init);
4502
d2876d08
DB
4503#ifdef CONFIG_DEBUG_FS
4504
fdeb8e15 4505static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
d2876d08 4506{
a0b66a73 4507 struct gpio_chip *gc = gdev->chip;
3de69ae1 4508 struct gpio_desc *desc;
fdeb8e15 4509 unsigned gpio = gdev->base;
3de69ae1 4510 int value;
90fd2270
LW
4511 bool is_out;
4512 bool is_irq;
4513 bool active_low;
d2876d08 4514
3de69ae1
AS
4515 for_each_gpio_desc(gc, desc) {
4516 if (test_bit(FLAG_REQUESTED, &desc->flags)) {
4517 gpiod_get_direction(desc);
4518 is_out = test_bit(FLAG_IS_OUT, &desc->flags);
234c5209 4519 value = gpio_chip_get_value(gc, desc);
3de69ae1
AS
4520 is_irq = test_bit(FLAG_USED_AS_IRQ, &desc->flags);
4521 active_low = test_bit(FLAG_ACTIVE_LOW, &desc->flags);
4522 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s\n",
4523 gpio, desc->name ?: "", desc->label,
4524 is_out ? "out" : "in ",
4525 value >= 0 ? (value ? "hi" : "lo") : "? ",
4526 is_irq ? "IRQ " : "",
4527 active_low ? "ACTIVE LOW" : "");
4528 } else if (desc->name) {
4529 seq_printf(s, " gpio-%-3d (%-20.20s)\n", gpio, desc->name);
ced433e2 4530 }
d2876d08 4531
3de69ae1 4532 gpio++;
d2876d08
DB
4533 }
4534}
4535
f9c4a31f 4536static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
d2876d08 4537{
362432ae 4538 unsigned long flags;
ff2b1359 4539 struct gpio_device *gdev = NULL;
cb1650d4 4540 loff_t index = *pos;
d2876d08 4541
f9c4a31f 4542 s->private = "";
d2876d08 4543
362432ae 4544 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4545 list_for_each_entry(gdev, &gpio_devices, list)
362432ae
GL
4546 if (index-- == 0) {
4547 spin_unlock_irqrestore(&gpio_lock, flags);
ff2b1359 4548 return gdev;
f9c4a31f 4549 }
362432ae 4550 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f 4551
cb1650d4 4552 return NULL;
f9c4a31f
TR
4553}
4554
4555static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
4556{
362432ae 4557 unsigned long flags;
ff2b1359 4558 struct gpio_device *gdev = v;
f9c4a31f
TR
4559 void *ret = NULL;
4560
362432ae 4561 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4562 if (list_is_last(&gdev->list, &gpio_devices))
cb1650d4
AC
4563 ret = NULL;
4564 else
243cfa6a 4565 ret = list_first_entry(&gdev->list, struct gpio_device, list);
362432ae 4566 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f
TR
4567
4568 s->private = "\n";
4569 ++*pos;
4570
4571 return ret;
4572}
4573
4574static void gpiolib_seq_stop(struct seq_file *s, void *v)
4575{
4576}
4577
4578static int gpiolib_seq_show(struct seq_file *s, void *v)
4579{
ff2b1359 4580 struct gpio_device *gdev = v;
a0b66a73 4581 struct gpio_chip *gc = gdev->chip;
ff2b1359
LW
4582 struct device *parent;
4583
a0b66a73 4584 if (!gc) {
ff2b1359
LW
4585 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
4586 dev_name(&gdev->dev));
4587 return 0;
4588 }
f9c4a31f 4589
ff2b1359
LW
4590 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
4591 dev_name(&gdev->dev),
fdeb8e15 4592 gdev->base, gdev->base + gdev->ngpio - 1);
a0b66a73 4593 parent = gc->parent;
ff2b1359
LW
4594 if (parent)
4595 seq_printf(s, ", parent: %s/%s",
4596 parent->bus ? parent->bus->name : "no-bus",
4597 dev_name(parent));
a0b66a73
LW
4598 if (gc->label)
4599 seq_printf(s, ", %s", gc->label);
4600 if (gc->can_sleep)
f9c4a31f
TR
4601 seq_printf(s, ", can sleep");
4602 seq_printf(s, ":\n");
4603
a0b66a73
LW
4604 if (gc->dbg_show)
4605 gc->dbg_show(s, gc);
f9c4a31f 4606 else
fdeb8e15 4607 gpiolib_dbg_show(s, gdev);
f9c4a31f 4608
d2876d08
DB
4609 return 0;
4610}
4611
425c5b3e 4612static const struct seq_operations gpiolib_sops = {
f9c4a31f
TR
4613 .start = gpiolib_seq_start,
4614 .next = gpiolib_seq_next,
4615 .stop = gpiolib_seq_stop,
4616 .show = gpiolib_seq_show,
4617};
425c5b3e 4618DEFINE_SEQ_ATTRIBUTE(gpiolib);
d2876d08
DB
4619
4620static int __init gpiolib_debugfs_init(void)
4621{
4622 /* /sys/kernel/debug/gpio */
425c5b3e 4623 debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops);
d2876d08
DB
4624 return 0;
4625}
4626subsys_initcall(gpiolib_debugfs_init);
4627
4628#endif /* DEBUG_FS */