Commit | Line | Data |
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dae5f0af | 1 | // SPDX-License-Identifier: GPL-2.0 |
c47d9e1b | 2 | |
79aabb1e | 3 | #include <linux/acpi.h> |
923a654c | 4 | #include <linux/bitmap.h> |
79aabb1e AS |
5 | #include <linux/compat.h> |
6 | #include <linux/debugfs.h> | |
d8f388d8 DB |
7 | #include <linux/device.h> |
8 | #include <linux/err.h> | |
380c7ba3 | 9 | #include <linux/errno.h> |
79aabb1e AS |
10 | #include <linux/file.h> |
11 | #include <linux/fs.h> | |
79aabb1e AS |
12 | #include <linux/idr.h> |
13 | #include <linux/interrupt.h> | |
14 | #include <linux/irq.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/list.h> | |
17 | #include <linux/module.h> | |
380c7ba3 | 18 | #include <linux/of.h> |
c771c2f4 | 19 | #include <linux/pinctrl/consumer.h> |
79aabb1e AS |
20 | #include <linux/seq_file.h> |
21 | #include <linux/slab.h> | |
22 | #include <linux/spinlock.h> | |
d62fcd9f | 23 | #include <linux/string.h> |
79aabb1e | 24 | |
380c7ba3 AS |
25 | #include <linux/gpio.h> |
26 | #include <linux/gpio/driver.h> | |
27 | #include <linux/gpio/machine.h> | |
28 | ||
3c702e99 | 29 | #include <uapi/linux/gpio.h> |
d2876d08 | 30 | |
77cb907a | 31 | #include "gpiolib-acpi.h" |
925ca369 | 32 | #include "gpiolib-cdev.h" |
79aabb1e AS |
33 | #include "gpiolib-of.h" |
34 | #include "gpiolib-swnode.h" | |
ef087d8e | 35 | #include "gpiolib-sysfs.h" |
79aabb1e | 36 | #include "gpiolib.h" |
664e3e5a | 37 | |
3f397c21 UKK |
38 | #define CREATE_TRACE_POINTS |
39 | #include <trace/events/gpio.h> | |
d2876d08 | 40 | |
79a9becd | 41 | /* Implementation infrastructure for GPIO interfaces. |
d2876d08 | 42 | * |
79a9becd AC |
43 | * The GPIO programming interface allows for inlining speed-critical |
44 | * get/set operations for common cases, so that access to SOC-integrated | |
45 | * GPIOs can sometimes cost only an instruction or two per bit. | |
d2876d08 DB |
46 | */ |
47 | ||
48 | ||
49 | /* When debugging, extend minimal trust to callers and platform code. | |
50 | * Also emit diagnostic messages that may help initial bringup, when | |
51 | * board setup or driver bugs are most common. | |
52 | * | |
53 | * Otherwise, minimize overhead in what may be bitbanging codepaths. | |
54 | */ | |
55 | #ifdef DEBUG | |
56 | #define extra_checks 1 | |
57 | #else | |
58 | #define extra_checks 0 | |
59 | #endif | |
60 | ||
ff2b1359 LW |
61 | /* Device and char device-related information */ |
62 | static DEFINE_IDA(gpio_ida); | |
3c702e99 LW |
63 | static dev_t gpio_devt; |
64 | #define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */ | |
c135f401 AS |
65 | |
66 | static int gpio_bus_match(struct device *dev, struct device_driver *drv) | |
67 | { | |
68 | struct fwnode_handle *fwnode = dev_fwnode(dev); | |
69 | ||
70 | /* | |
71 | * Only match if the fwnode doesn't already have a proper struct device | |
72 | * created for it. | |
73 | */ | |
74 | if (fwnode && fwnode->dev != dev) | |
75 | return 0; | |
76 | return 1; | |
77 | } | |
78 | ||
3c702e99 LW |
79 | static struct bus_type gpio_bus_type = { |
80 | .name = "gpio", | |
ced2af41 | 81 | .match = gpio_bus_match, |
3c702e99 | 82 | }; |
ff2b1359 | 83 | |
3027743f LA |
84 | /* |
85 | * Number of GPIOs to use for the fast path in set array | |
86 | */ | |
87 | #define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT | |
88 | ||
d2876d08 DB |
89 | /* gpio_lock prevents conflicts during gpio_desc[] table updates. |
90 | * While any GPIO is requested, its gpio_chip is not removable; | |
91 | * each GPIO's "requested" flag serves as a lock and refcount. | |
92 | */ | |
0eb4c6c2 | 93 | DEFINE_SPINLOCK(gpio_lock); |
d2876d08 | 94 | |
bae48da2 AC |
95 | static DEFINE_MUTEX(gpio_lookup_lock); |
96 | static LIST_HEAD(gpio_lookup_list); | |
ff2b1359 | 97 | LIST_HEAD(gpio_devices); |
6d86750c | 98 | |
a411e81e BG |
99 | static DEFINE_MUTEX(gpio_machine_hogs_mutex); |
100 | static LIST_HEAD(gpio_machine_hogs); | |
101 | ||
a0b66a73 LW |
102 | static void gpiochip_free_hogs(struct gpio_chip *gc); |
103 | static int gpiochip_add_irqchip(struct gpio_chip *gc, | |
39c3fd58 AL |
104 | struct lock_class_key *lock_key, |
105 | struct lock_class_key *request_key); | |
a0b66a73 LW |
106 | static void gpiochip_irqchip_remove(struct gpio_chip *gc); |
107 | static int gpiochip_irqchip_init_hw(struct gpio_chip *gc); | |
108 | static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc); | |
109 | static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc); | |
6d86750c | 110 | |
159f3cd9 | 111 | static bool gpiolib_initialized; |
6d86750c | 112 | |
d2876d08 DB |
113 | static inline void desc_set_label(struct gpio_desc *d, const char *label) |
114 | { | |
d2876d08 | 115 | d->label = label; |
d2876d08 DB |
116 | } |
117 | ||
372e722e | 118 | /** |
950d55f5 TR |
119 | * gpio_to_desc - Convert a GPIO number to its descriptor |
120 | * @gpio: global GPIO number | |
121 | * | |
122 | * Returns: | |
123 | * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO | |
124 | * with the given number exists in the system. | |
372e722e | 125 | */ |
79a9becd | 126 | struct gpio_desc *gpio_to_desc(unsigned gpio) |
372e722e | 127 | { |
ff2b1359 | 128 | struct gpio_device *gdev; |
14e85c0e AC |
129 | unsigned long flags; |
130 | ||
131 | spin_lock_irqsave(&gpio_lock, flags); | |
132 | ||
ff2b1359 | 133 | list_for_each_entry(gdev, &gpio_devices, list) { |
fdeb8e15 LW |
134 | if (gdev->base <= gpio && |
135 | gdev->base + gdev->ngpio > gpio) { | |
14e85c0e | 136 | spin_unlock_irqrestore(&gpio_lock, flags); |
fdeb8e15 | 137 | return &gdev->descs[gpio - gdev->base]; |
14e85c0e AC |
138 | } |
139 | } | |
140 | ||
141 | spin_unlock_irqrestore(&gpio_lock, flags); | |
142 | ||
0e9a5edf | 143 | if (!gpio_is_valid(gpio)) |
c47d9e1b | 144 | pr_warn("invalid GPIO %d\n", gpio); |
0e9a5edf | 145 | |
14e85c0e | 146 | return NULL; |
372e722e | 147 | } |
79a9becd | 148 | EXPORT_SYMBOL_GPL(gpio_to_desc); |
372e722e | 149 | |
93548f8b BG |
150 | /* This function is deprecated and will be removed soon, don't use. */ |
151 | struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc, | |
152 | unsigned int hwnum) | |
153 | { | |
154 | return gpio_device_get_desc(gc->gpiodev, hwnum); | |
155 | } | |
156 | EXPORT_SYMBOL_GPL(gpiochip_get_desc); | |
157 | ||
d468bf9e | 158 | /** |
93548f8b BG |
159 | * gpio_device_get_desc() - get the GPIO descriptor corresponding to the given |
160 | * hardware number for this GPIO device | |
161 | * @gdev: GPIO device to get the descriptor from | |
950d55f5 TR |
162 | * @hwnum: hardware number of the GPIO for this chip |
163 | * | |
164 | * Returns: | |
93548f8b BG |
165 | * A pointer to the GPIO descriptor or %EINVAL if no GPIO exists in the given |
166 | * chip for the specified hardware number or %ENODEV if the underlying chip | |
167 | * already vanished. | |
168 | * | |
169 | * The reference count of struct gpio_device is *NOT* increased like when the | |
170 | * GPIO is being requested for exclusive usage. It's up to the caller to make | |
171 | * sure the GPIO device will stay alive together with the descriptor returned | |
172 | * by this function. | |
d468bf9e | 173 | */ |
93548f8b BG |
174 | struct gpio_desc * |
175 | gpio_device_get_desc(struct gpio_device *gdev, unsigned int hwnum) | |
d468bf9e | 176 | { |
93548f8b BG |
177 | struct gpio_chip *gc; |
178 | ||
179 | /* | |
180 | * FIXME: This will be locked once we protect gdev->chip everywhere | |
181 | * with SRCU. | |
182 | */ | |
183 | gc = gdev->chip; | |
184 | if (!gc) | |
185 | return ERR_PTR(-ENODEV); | |
fdeb8e15 LW |
186 | |
187 | if (hwnum >= gdev->ngpio) | |
b7d0a28a | 188 | return ERR_PTR(-EINVAL); |
d468bf9e | 189 | |
fdeb8e15 | 190 | return &gdev->descs[hwnum]; |
d468bf9e | 191 | } |
93548f8b | 192 | EXPORT_SYMBOL_GPL(gpio_device_get_desc); |
372e722e AC |
193 | |
194 | /** | |
950d55f5 TR |
195 | * desc_to_gpio - convert a GPIO descriptor to the integer namespace |
196 | * @desc: GPIO descriptor | |
197 | * | |
372e722e | 198 | * This should disappear in the future but is needed since we still |
950d55f5 TR |
199 | * use GPIO numbers for error messages and sysfs nodes. |
200 | * | |
201 | * Returns: | |
202 | * The global GPIO number for the GPIO specified by its descriptor. | |
372e722e | 203 | */ |
79a9becd | 204 | int desc_to_gpio(const struct gpio_desc *desc) |
372e722e | 205 | { |
fdeb8e15 | 206 | return desc->gdev->base + (desc - &desc->gdev->descs[0]); |
372e722e | 207 | } |
79a9becd | 208 | EXPORT_SYMBOL_GPL(desc_to_gpio); |
372e722e AC |
209 | |
210 | ||
79a9becd AC |
211 | /** |
212 | * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs | |
213 | * @desc: descriptor to return the chip of | |
214 | */ | |
215 | struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc) | |
372e722e | 216 | { |
dd3b9a44 | 217 | if (!desc || !desc->gdev) |
fdeb8e15 LW |
218 | return NULL; |
219 | return desc->gdev->chip; | |
372e722e | 220 | } |
79a9becd | 221 | EXPORT_SYMBOL_GPL(gpiod_to_chip); |
d2876d08 | 222 | |
8d0aab2f AV |
223 | /* dynamic allocation of GPIOs, e.g. on a hotplugged device */ |
224 | static int gpiochip_find_base(int ngpio) | |
225 | { | |
ff2b1359 | 226 | struct gpio_device *gdev; |
7b61212f | 227 | int base = GPIO_DYNAMIC_BASE; |
8d0aab2f | 228 | |
7b61212f | 229 | list_for_each_entry(gdev, &gpio_devices, list) { |
83cabe33 | 230 | /* found a free space? */ |
7b61212f | 231 | if (gdev->base >= base + ngpio) |
83cabe33 | 232 | break; |
7b61212f CL |
233 | /* nope, check the space right after the chip */ |
234 | base = gdev->base + gdev->ngpio; | |
7dd3d9bd AK |
235 | if (base < GPIO_DYNAMIC_BASE) |
236 | base = GPIO_DYNAMIC_BASE; | |
8d0aab2f AV |
237 | } |
238 | ||
83cabe33 | 239 | if (gpio_is_valid(base)) { |
8d0aab2f | 240 | pr_debug("%s: found new base at %d\n", __func__, base); |
83cabe33 AC |
241 | return base; |
242 | } else { | |
243 | pr_err("%s: cannot find free range\n", __func__); | |
244 | return -ENOSPC; | |
169b6a7a | 245 | } |
169b6a7a AV |
246 | } |
247 | ||
79a9becd AC |
248 | /** |
249 | * gpiod_get_direction - return the current direction of a GPIO | |
250 | * @desc: GPIO to get the direction of | |
251 | * | |
94fc7309 | 252 | * Returns 0 for output, 1 for input, or an error code in case of error. |
79a9becd AC |
253 | * |
254 | * This function may sleep if gpiod_cansleep() is true. | |
255 | */ | |
8e53b0f1 | 256 | int gpiod_get_direction(struct gpio_desc *desc) |
80b0a602 | 257 | { |
a0b66a73 | 258 | struct gpio_chip *gc; |
13daf489 | 259 | unsigned int offset; |
d377f56f | 260 | int ret; |
80b0a602 | 261 | |
a0b66a73 | 262 | gc = gpiod_to_chip(desc); |
372e722e | 263 | offset = gpio_chip_hwgpio(desc); |
80b0a602 | 264 | |
256efaea RK |
265 | /* |
266 | * Open drain emulation using input mode may incorrectly report | |
267 | * input here, fix that up. | |
268 | */ | |
269 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && | |
270 | test_bit(FLAG_IS_OUT, &desc->flags)) | |
271 | return 0; | |
272 | ||
a0b66a73 | 273 | if (!gc->get_direction) |
d0121b85 | 274 | return -ENOTSUPP; |
80b0a602 | 275 | |
a0b66a73 | 276 | ret = gc->get_direction(gc, offset); |
4fc5bfeb AS |
277 | if (ret < 0) |
278 | return ret; | |
279 | ||
280 | /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */ | |
281 | if (ret > 0) | |
d377f56f | 282 | ret = 1; |
4fc5bfeb AS |
283 | |
284 | assign_bit(FLAG_IS_OUT, &desc->flags, !ret); | |
285 | ||
d377f56f | 286 | return ret; |
80b0a602 | 287 | } |
79a9becd | 288 | EXPORT_SYMBOL_GPL(gpiod_get_direction); |
80b0a602 | 289 | |
1a989d0f AC |
290 | /* |
291 | * Add a new chip to the global chips list, keeping the list of chips sorted | |
ef7c7553 | 292 | * by range(means [base, base + ngpio - 1]) order. |
1a989d0f AC |
293 | * |
294 | * Return -EBUSY if the new chip overlaps with some other chip's integer | |
295 | * space. | |
296 | */ | |
ff2b1359 | 297 | static int gpiodev_add_to_list(struct gpio_device *gdev) |
1a989d0f | 298 | { |
a961f9b4 | 299 | struct gpio_device *prev, *next; |
1a989d0f | 300 | |
ff2b1359 | 301 | if (list_empty(&gpio_devices)) { |
a961f9b4 | 302 | /* initial entry in list */ |
ff2b1359 | 303 | list_add_tail(&gdev->list, &gpio_devices); |
e28ecca6 | 304 | return 0; |
1a989d0f AC |
305 | } |
306 | ||
243cfa6a | 307 | next = list_first_entry(&gpio_devices, struct gpio_device, list); |
a961f9b4 BJZ |
308 | if (gdev->base + gdev->ngpio <= next->base) { |
309 | /* add before first entry */ | |
310 | list_add(&gdev->list, &gpio_devices); | |
311 | return 0; | |
1a989d0f AC |
312 | } |
313 | ||
243cfa6a | 314 | prev = list_last_entry(&gpio_devices, struct gpio_device, list); |
a961f9b4 BJZ |
315 | if (prev->base + prev->ngpio <= gdev->base) { |
316 | /* add behind last entry */ | |
317 | list_add_tail(&gdev->list, &gpio_devices); | |
96098df1 | 318 | return 0; |
1a989d0f AC |
319 | } |
320 | ||
a961f9b4 BJZ |
321 | list_for_each_entry_safe(prev, next, &gpio_devices, list) { |
322 | /* at the end of the list */ | |
323 | if (&next->list == &gpio_devices) | |
324 | break; | |
1a989d0f | 325 | |
a961f9b4 BJZ |
326 | /* add between prev and next */ |
327 | if (prev->base + prev->ngpio <= gdev->base | |
328 | && gdev->base + gdev->ngpio <= next->base) { | |
329 | list_add(&gdev->list, &prev->list); | |
330 | return 0; | |
331 | } | |
332 | } | |
333 | ||
a961f9b4 | 334 | return -EBUSY; |
1a989d0f AC |
335 | } |
336 | ||
950d55f5 | 337 | /* |
f881bab0 | 338 | * Convert a GPIO name to its descriptor |
582838ea GU |
339 | * Note that there is no guarantee that GPIO names are globally unique! |
340 | * Hence this function will return, if it exists, a reference to the first GPIO | |
341 | * line found that matches the given name. | |
f881bab0 LW |
342 | */ |
343 | static struct gpio_desc *gpio_name_to_desc(const char * const name) | |
344 | { | |
ff2b1359 | 345 | struct gpio_device *gdev; |
f881bab0 LW |
346 | unsigned long flags; |
347 | ||
ee203bbd MM |
348 | if (!name) |
349 | return NULL; | |
350 | ||
f881bab0 LW |
351 | spin_lock_irqsave(&gpio_lock, flags); |
352 | ||
ff2b1359 | 353 | list_for_each_entry(gdev, &gpio_devices, list) { |
66f46e37 | 354 | struct gpio_desc *desc; |
f881bab0 | 355 | |
66f46e37 AS |
356 | for_each_gpio_desc(gdev->chip, desc) { |
357 | if (desc->name && !strcmp(desc->name, name)) { | |
f881bab0 | 358 | spin_unlock_irqrestore(&gpio_lock, flags); |
fdeb8e15 | 359 | return desc; |
f881bab0 LW |
360 | } |
361 | } | |
362 | } | |
363 | ||
364 | spin_unlock_irqrestore(&gpio_lock, flags); | |
365 | ||
366 | return NULL; | |
367 | } | |
368 | ||
5f3ca732 | 369 | /* |
582838ea GU |
370 | * Take the names from gc->names and assign them to their GPIO descriptors. |
371 | * Warn if a name is already used for a GPIO line on a different GPIO chip. | |
5f3ca732 | 372 | * |
582838ea GU |
373 | * Note that: |
374 | * 1. Non-unique names are still accepted, | |
375 | * 2. Name collisions within the same GPIO chip are not reported. | |
5f3ca732 MP |
376 | */ |
377 | static int gpiochip_set_desc_names(struct gpio_chip *gc) | |
378 | { | |
fdeb8e15 | 379 | struct gpio_device *gdev = gc->gpiodev; |
5f3ca732 MP |
380 | int i; |
381 | ||
5f3ca732 MP |
382 | /* First check all names if they are unique */ |
383 | for (i = 0; i != gc->ngpio; ++i) { | |
384 | struct gpio_desc *gpio; | |
385 | ||
386 | gpio = gpio_name_to_desc(gc->names[i]); | |
f881bab0 | 387 | if (gpio) |
fdeb8e15 | 388 | dev_warn(&gdev->dev, |
34ffd85d | 389 | "Detected name collision for GPIO name '%s'\n", |
f881bab0 | 390 | gc->names[i]); |
5f3ca732 MP |
391 | } |
392 | ||
393 | /* Then add all names to the GPIO descriptors */ | |
394 | for (i = 0; i != gc->ngpio; ++i) | |
fdeb8e15 | 395 | gdev->descs[i].name = gc->names[i]; |
5f3ca732 MP |
396 | |
397 | return 0; | |
398 | } | |
399 | ||
32fc5aa2 | 400 | /* |
0c5ebb4c | 401 | * gpiochip_set_names - Set GPIO line names using device properties |
32fc5aa2 BG |
402 | * @chip: GPIO chip whose lines should be named, if possible |
403 | * | |
404 | * Looks for device property "gpio-line-names" and if it exists assigns | |
405 | * GPIO line names for the chip. The memory allocated for the assigned | |
b41ba2ec | 406 | * names belong to the underlying firmware node and should not be released |
32fc5aa2 BG |
407 | * by the caller. |
408 | */ | |
0c5ebb4c | 409 | static int gpiochip_set_names(struct gpio_chip *chip) |
32fc5aa2 BG |
410 | { |
411 | struct gpio_device *gdev = chip->gpiodev; | |
4ef339bc | 412 | struct device *dev = &gdev->dev; |
32fc5aa2 BG |
413 | const char **names; |
414 | int ret, i; | |
415 | int count; | |
416 | ||
4ef339bc | 417 | count = device_property_string_array_count(dev, "gpio-line-names"); |
32fc5aa2 BG |
418 | if (count < 0) |
419 | return 0; | |
420 | ||
4e804c39 SP |
421 | /* |
422 | * When offset is set in the driver side we assume the driver internally | |
423 | * is using more than one gpiochip per the same device. We have to stop | |
424 | * setting friendly names if the specified ones with 'gpio-line-names' | |
425 | * are less than the offset in the device itself. This means all the | |
426 | * lines are not present for every single pin within all the internal | |
427 | * gpiochips. | |
428 | */ | |
429 | if (count <= chip->offset) { | |
4ef339bc | 430 | dev_warn(dev, "gpio-line-names too short (length %d), cannot map names for the gpiochip at offset %u\n", |
4e804c39 SP |
431 | count, chip->offset); |
432 | return 0; | |
32fc5aa2 BG |
433 | } |
434 | ||
435 | names = kcalloc(count, sizeof(*names), GFP_KERNEL); | |
436 | if (!names) | |
437 | return -ENOMEM; | |
438 | ||
4ef339bc | 439 | ret = device_property_read_string_array(dev, "gpio-line-names", |
32fc5aa2 BG |
440 | names, count); |
441 | if (ret < 0) { | |
4ef339bc | 442 | dev_warn(dev, "failed to read GPIO line names\n"); |
32fc5aa2 BG |
443 | kfree(names); |
444 | return ret; | |
445 | } | |
446 | ||
4e804c39 SP |
447 | /* |
448 | * When more that one gpiochip per device is used, 'count' can | |
449 | * contain at most number gpiochips x chip->ngpio. We have to | |
450 | * correctly distribute all defined lines taking into account | |
451 | * chip->offset as starting point from where we will assign | |
452 | * the names to pins from the 'names' array. Since property | |
453 | * 'gpio-line-names' cannot contains gaps, we have to be sure | |
454 | * we only assign those pins that really exists since chip->ngpio | |
455 | * can be different of the chip->offset. | |
456 | */ | |
457 | count = (count > chip->offset) ? count - chip->offset : count; | |
458 | if (count > chip->ngpio) | |
459 | count = chip->ngpio; | |
460 | ||
c73960bb PR |
461 | for (i = 0; i < count; i++) { |
462 | /* | |
463 | * Allow overriding "fixed" names provided by the GPIO | |
464 | * provider. The "fixed" names are more often than not | |
465 | * generic and less informative than the names given in | |
466 | * device properties. | |
467 | */ | |
468 | if (names[chip->offset + i] && names[chip->offset + i][0]) | |
469 | gdev->descs[i].name = names[chip->offset + i]; | |
470 | } | |
32fc5aa2 BG |
471 | |
472 | kfree(names); | |
473 | ||
474 | return 0; | |
475 | } | |
476 | ||
a0b66a73 | 477 | static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc) |
e4371f6e SB |
478 | { |
479 | unsigned long *p; | |
480 | ||
a0b66a73 | 481 | p = bitmap_alloc(gc->ngpio, GFP_KERNEL); |
e4371f6e SB |
482 | if (!p) |
483 | return NULL; | |
484 | ||
485 | /* Assume by default all GPIOs are valid */ | |
a0b66a73 | 486 | bitmap_fill(p, gc->ngpio); |
e4371f6e SB |
487 | |
488 | return p; | |
489 | } | |
490 | ||
05a854c5 AS |
491 | static void gpiochip_free_mask(unsigned long **p) |
492 | { | |
493 | bitmap_free(*p); | |
494 | *p = NULL; | |
495 | } | |
496 | ||
27043a7d AS |
497 | static unsigned int gpiochip_count_reserved_ranges(struct gpio_chip *gc) |
498 | { | |
4ef339bc | 499 | struct device *dev = &gc->gpiodev->dev; |
27043a7d AS |
500 | int size; |
501 | ||
502 | /* Format is "start, count, ..." */ | |
4ef339bc | 503 | size = device_property_count_u32(dev, "gpio-reserved-ranges"); |
27043a7d AS |
504 | if (size > 0 && size % 2 == 0) |
505 | return size; | |
506 | ||
507 | return 0; | |
508 | } | |
509 | ||
27043a7d AS |
510 | static int gpiochip_apply_reserved_ranges(struct gpio_chip *gc) |
511 | { | |
4ef339bc | 512 | struct device *dev = &gc->gpiodev->dev; |
27043a7d AS |
513 | unsigned int size; |
514 | u32 *ranges; | |
515 | int ret; | |
516 | ||
517 | size = gpiochip_count_reserved_ranges(gc); | |
518 | if (size == 0) | |
519 | return 0; | |
520 | ||
521 | ranges = kmalloc_array(size, sizeof(*ranges), GFP_KERNEL); | |
522 | if (!ranges) | |
523 | return -ENOMEM; | |
524 | ||
4ef339bc AS |
525 | ret = device_property_read_u32_array(dev, "gpio-reserved-ranges", |
526 | ranges, size); | |
27043a7d AS |
527 | if (ret) { |
528 | kfree(ranges); | |
529 | return ret; | |
530 | } | |
531 | ||
532 | while (size) { | |
533 | u32 count = ranges[--size]; | |
534 | u32 start = ranges[--size]; | |
535 | ||
536 | if (start >= gc->ngpio || start + count > gc->ngpio) | |
537 | continue; | |
538 | ||
539 | bitmap_clear(gc->valid_mask, start, count); | |
540 | } | |
541 | ||
542 | kfree(ranges); | |
543 | return 0; | |
544 | } | |
545 | ||
c9fc5aff | 546 | static int gpiochip_init_valid_mask(struct gpio_chip *gc) |
f8ec92a9 | 547 | { |
27043a7d AS |
548 | int ret; |
549 | ||
1a55fc40 AS |
550 | if (!(gpiochip_count_reserved_ranges(gc) || gc->init_valid_mask)) |
551 | return 0; | |
552 | ||
553 | gc->valid_mask = gpiochip_allocate_mask(gc); | |
554 | if (!gc->valid_mask) | |
555 | return -ENOMEM; | |
556 | ||
27043a7d AS |
557 | ret = gpiochip_apply_reserved_ranges(gc); |
558 | if (ret) | |
559 | return ret; | |
560 | ||
c9fc5aff LW |
561 | if (gc->init_valid_mask) |
562 | return gc->init_valid_mask(gc, | |
563 | gc->valid_mask, | |
564 | gc->ngpio); | |
f8ec92a9 RRD |
565 | |
566 | return 0; | |
567 | } | |
568 | ||
a0b66a73 | 569 | static void gpiochip_free_valid_mask(struct gpio_chip *gc) |
726cb3ba | 570 | { |
05a854c5 | 571 | gpiochip_free_mask(&gc->valid_mask); |
726cb3ba SB |
572 | } |
573 | ||
b056ca1c AS |
574 | static int gpiochip_add_pin_ranges(struct gpio_chip *gc) |
575 | { | |
c40aa80d AS |
576 | /* |
577 | * Device Tree platforms are supposed to use "gpio-ranges" | |
578 | * property. This check ensures that the ->add_pin_ranges() | |
579 | * won't be called for them. | |
580 | */ | |
581 | if (device_property_present(&gc->gpiodev->dev, "gpio-ranges")) | |
582 | return 0; | |
583 | ||
b056ca1c AS |
584 | if (gc->add_pin_ranges) |
585 | return gc->add_pin_ranges(gc); | |
586 | ||
587 | return 0; | |
588 | } | |
589 | ||
a0b66a73 | 590 | bool gpiochip_line_is_valid(const struct gpio_chip *gc, |
726cb3ba SB |
591 | unsigned int offset) |
592 | { | |
593 | /* No mask means all valid */ | |
a0b66a73 | 594 | if (likely(!gc->valid_mask)) |
726cb3ba | 595 | return true; |
a0b66a73 | 596 | return test_bit(offset, gc->valid_mask); |
726cb3ba SB |
597 | } |
598 | EXPORT_SYMBOL_GPL(gpiochip_line_is_valid); | |
599 | ||
7aa90f90 | 600 | static void gpiodev_release(struct device *dev) |
ff2b1359 | 601 | { |
3b7c7478 | 602 | struct gpio_device *gdev = to_gpio_device(dev); |
cf25ef6b | 603 | unsigned long flags; |
ff2b1359 | 604 | |
cf25ef6b | 605 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 606 | list_del(&gdev->list); |
cf25ef6b JH |
607 | spin_unlock_irqrestore(&gpio_lock, flags); |
608 | ||
8d4a85b6 | 609 | ida_free(&gpio_ida, gdev->id); |
fcf273e5 | 610 | kfree_const(gdev->label); |
476e2fc5 | 611 | kfree(gdev->descs); |
9efd9e69 | 612 | kfree(gdev); |
ff2b1359 LW |
613 | } |
614 | ||
1f5eb8b1 KG |
615 | #ifdef CONFIG_GPIO_CDEV |
616 | #define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt)) | |
617 | #define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev)) | |
618 | #else | |
619 | /* | |
620 | * gpiolib_cdev_register() indirectly calls device_add(), which is still | |
621 | * required even when cdev is not selected. | |
622 | */ | |
623 | #define gcdev_register(gdev, devt) device_add(&(gdev)->dev) | |
624 | #define gcdev_unregister(gdev) device_del(&(gdev)->dev) | |
625 | #endif | |
626 | ||
159f3cd9 GR |
627 | static int gpiochip_setup_dev(struct gpio_device *gdev) |
628 | { | |
67f64d15 | 629 | struct fwnode_handle *fwnode = dev_fwnode(&gdev->dev); |
d377f56f | 630 | int ret; |
159f3cd9 | 631 | |
38dfa56b SK |
632 | /* |
633 | * If fwnode doesn't belong to another device, it's safe to clear its | |
634 | * initialized flag. | |
635 | */ | |
67f64d15 AS |
636 | if (fwnode && !fwnode->dev) |
637 | fwnode_dev_initialized(fwnode, false); | |
38dfa56b | 638 | |
1f5eb8b1 | 639 | ret = gcdev_register(gdev, gpio_devt); |
d377f56f LW |
640 | if (ret) |
641 | return ret; | |
111379dc | 642 | |
ec851b23 | 643 | /* From this point, the .release() function cleans up gpio_device */ |
7aa90f90 | 644 | gdev->dev.release = gpiodev_release; |
ec851b23 | 645 | |
d377f56f LW |
646 | ret = gpiochip_sysfs_register(gdev); |
647 | if (ret) | |
159f3cd9 GR |
648 | goto err_remove_device; |
649 | ||
262b9011 GU |
650 | dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base, |
651 | gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic"); | |
159f3cd9 GR |
652 | |
653 | return 0; | |
654 | ||
655 | err_remove_device: | |
1f5eb8b1 | 656 | gcdev_unregister(gdev); |
d377f56f | 657 | return ret; |
159f3cd9 GR |
658 | } |
659 | ||
a0b66a73 | 660 | static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog) |
a411e81e BG |
661 | { |
662 | struct gpio_desc *desc; | |
663 | int rv; | |
664 | ||
a0b66a73 | 665 | desc = gpiochip_get_desc(gc, hog->chip_hwnum); |
a411e81e | 666 | if (IS_ERR(desc)) { |
262b9011 GU |
667 | chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__, |
668 | PTR_ERR(desc)); | |
a411e81e BG |
669 | return; |
670 | } | |
671 | ||
ba3efdff | 672 | if (test_bit(FLAG_IS_HOGGED, &desc->flags)) |
a411e81e BG |
673 | return; |
674 | ||
675 | rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags); | |
676 | if (rv) | |
262b9011 GU |
677 | gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n", |
678 | __func__, gc->label, hog->chip_hwnum, rv); | |
a411e81e BG |
679 | } |
680 | ||
a0b66a73 | 681 | static void machine_gpiochip_add(struct gpio_chip *gc) |
a411e81e BG |
682 | { |
683 | struct gpiod_hog *hog; | |
684 | ||
685 | mutex_lock(&gpio_machine_hogs_mutex); | |
686 | ||
687 | list_for_each_entry(hog, &gpio_machine_hogs, list) { | |
a0b66a73 LW |
688 | if (!strcmp(gc->label, hog->chip_label)) |
689 | gpiochip_machine_hog(gc, hog); | |
a411e81e BG |
690 | } |
691 | ||
692 | mutex_unlock(&gpio_machine_hogs_mutex); | |
693 | } | |
694 | ||
159f3cd9 GR |
695 | static void gpiochip_setup_devs(void) |
696 | { | |
697 | struct gpio_device *gdev; | |
d377f56f | 698 | int ret; |
159f3cd9 GR |
699 | |
700 | list_for_each_entry(gdev, &gpio_devices, list) { | |
d377f56f LW |
701 | ret = gpiochip_setup_dev(gdev); |
702 | if (ret) | |
262b9011 GU |
703 | dev_err(&gdev->dev, |
704 | "Failed to initialize gpio device (%d)\n", ret); | |
159f3cd9 GR |
705 | } |
706 | } | |
707 | ||
7b59bdbc AS |
708 | static void gpiochip_set_data(struct gpio_chip *gc, void *data) |
709 | { | |
710 | gc->gpiodev->data = data; | |
711 | } | |
712 | ||
8deb779d AS |
713 | /** |
714 | * gpiochip_get_data() - get per-subdriver data for the chip | |
715 | * @gc: GPIO chip | |
716 | * | |
717 | * Returns: | |
718 | * The per-subdriver data for the chip. | |
719 | */ | |
720 | void *gpiochip_get_data(struct gpio_chip *gc) | |
721 | { | |
722 | return gc->gpiodev->data; | |
723 | } | |
724 | EXPORT_SYMBOL_GPL(gpiochip_get_data); | |
725 | ||
55b2395e AM |
726 | int gpiochip_get_ngpios(struct gpio_chip *gc, struct device *dev) |
727 | { | |
728 | u32 ngpios = gc->ngpio; | |
729 | int ret; | |
730 | ||
731 | if (ngpios == 0) { | |
732 | ret = device_property_read_u32(dev, "ngpios", &ngpios); | |
733 | if (ret == -ENODATA) | |
734 | /* | |
735 | * -ENODATA means that there is no property found and | |
736 | * we want to issue the error message to the user. | |
737 | * Besides that, we want to return different error code | |
738 | * to state that supplied value is not valid. | |
739 | */ | |
740 | ngpios = 0; | |
741 | else if (ret) | |
742 | return ret; | |
743 | ||
744 | gc->ngpio = ngpios; | |
745 | } | |
746 | ||
747 | if (gc->ngpio == 0) { | |
748 | chip_err(gc, "tried to insert a GPIO chip with zero lines\n"); | |
749 | return -EINVAL; | |
750 | } | |
751 | ||
752 | if (gc->ngpio > FASTPATH_NGPIO) | |
753 | chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n", | |
754 | gc->ngpio, FASTPATH_NGPIO); | |
755 | ||
756 | return 0; | |
757 | } | |
758 | EXPORT_SYMBOL_GPL(gpiochip_get_ngpios); | |
759 | ||
a0b66a73 | 760 | int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data, |
39c3fd58 AL |
761 | struct lock_class_key *lock_key, |
762 | struct lock_class_key *request_key) | |
d2876d08 | 763 | { |
ff2b1359 | 764 | struct gpio_device *gdev; |
e5ab49cd | 765 | unsigned long flags; |
e5ab49cd | 766 | unsigned int i; |
ec851b23 | 767 | int base = 0; |
e5ab49cd | 768 | int ret = 0; |
d2876d08 | 769 | |
ff2b1359 LW |
770 | /* |
771 | * First: allocate and populate the internal stat container, and | |
772 | * set up the struct device. | |
773 | */ | |
969f07b4 | 774 | gdev = kzalloc(sizeof(*gdev), GFP_KERNEL); |
ff2b1359 | 775 | if (!gdev) |
14e85c0e | 776 | return -ENOMEM; |
3c702e99 | 777 | gdev->dev.bus = &gpio_bus_type; |
1df62542 | 778 | gdev->dev.parent = gc->parent; |
a0b66a73 | 779 | gdev->chip = gc; |
7b59bdbc | 780 | |
a0b66a73 | 781 | gc->gpiodev = gdev; |
7b59bdbc | 782 | gpiochip_set_data(gc, data); |
acc6e331 | 783 | |
daecca4b AS |
784 | /* |
785 | * If the calling driver did not initialize firmware node, | |
786 | * do it here using the parent device, if any. | |
787 | */ | |
788 | if (gc->fwnode) | |
789 | device_set_node(&gdev->dev, gc->fwnode); | |
790 | else if (gc->parent) | |
791 | device_set_node(&gdev->dev, dev_fwnode(gc->parent)); | |
6cb59afe | 792 | |
8d4a85b6 | 793 | gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL); |
ff2b1359 | 794 | if (gdev->id < 0) { |
d377f56f | 795 | ret = gdev->id; |
ff2b1359 LW |
796 | goto err_free_gdev; |
797 | } | |
c351bb64 QW |
798 | |
799 | ret = dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id); | |
800 | if (ret) | |
801 | goto err_free_ida; | |
802 | ||
ff2b1359 | 803 | device_initialize(&gdev->dev); |
a0b66a73 LW |
804 | if (gc->parent && gc->parent->driver) |
805 | gdev->owner = gc->parent->driver->owner; | |
806 | else if (gc->owner) | |
ff2b1359 | 807 | /* TODO: remove chip->owner */ |
a0b66a73 | 808 | gdev->owner = gc->owner; |
ff2b1359 LW |
809 | else |
810 | gdev->owner = THIS_MODULE; | |
d2876d08 | 811 | |
55b2395e AM |
812 | ret = gpiochip_get_ngpios(gc, &gdev->dev); |
813 | if (ret) | |
ec851b23 | 814 | goto err_free_dev_name; |
3027743f | 815 | |
ec851b23 ZH |
816 | gdev->descs = kcalloc(gc->ngpio, sizeof(*gdev->descs), GFP_KERNEL); |
817 | if (!gdev->descs) { | |
818 | ret = -ENOMEM; | |
819 | goto err_free_dev_name; | |
820 | } | |
821 | ||
a0b66a73 | 822 | gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL); |
df4878e9 | 823 | if (!gdev->label) { |
d377f56f | 824 | ret = -ENOMEM; |
476e2fc5 | 825 | goto err_free_descs; |
df4878e9 LW |
826 | } |
827 | ||
a0b66a73 | 828 | gdev->ngpio = gc->ngpio; |
5ed41cc4 | 829 | |
d2876d08 DB |
830 | spin_lock_irqsave(&gpio_lock, flags); |
831 | ||
fdeb8e15 LW |
832 | /* |
833 | * TODO: this allocates a Linux GPIO number base in the global | |
834 | * GPIO numberspace for this chip. In the long run we want to | |
835 | * get *rid* of this numberspace and use only descriptors, but | |
836 | * it may be a pipe dream. It will not happen before we get rid | |
837 | * of the sysfs interface anyways. | |
838 | */ | |
ec851b23 | 839 | base = gc->base; |
8d0aab2f | 840 | if (base < 0) { |
a0b66a73 | 841 | base = gpiochip_find_base(gc->ngpio); |
8d0aab2f | 842 | if (base < 0) { |
225fce83 | 843 | spin_unlock_irqrestore(&gpio_lock, flags); |
ec851b23 ZH |
844 | ret = base; |
845 | base = 0; | |
476e2fc5 | 846 | goto err_free_label; |
8d0aab2f | 847 | } |
fdeb8e15 LW |
848 | /* |
849 | * TODO: it should not be necessary to reflect the assigned | |
850 | * base outside of the GPIO subsystem. Go over drivers and | |
851 | * see if anyone makes use of this, else drop this and assign | |
852 | * a poison instead. | |
853 | */ | |
a0b66a73 | 854 | gc->base = base; |
502df79b CL |
855 | } else { |
856 | dev_warn(&gdev->dev, | |
857 | "Static allocation of GPIO base is deprecated, use dynamic allocation.\n"); | |
8d0aab2f | 858 | } |
fdeb8e15 | 859 | gdev->base = base; |
8d0aab2f | 860 | |
d377f56f LW |
861 | ret = gpiodev_add_to_list(gdev); |
862 | if (ret) { | |
05aa5203 | 863 | spin_unlock_irqrestore(&gpio_lock, flags); |
24a9dbb1 | 864 | chip_err(gc, "GPIO integer space overlap, cannot add chip\n"); |
476e2fc5 | 865 | goto err_free_label; |
05aa5203 | 866 | } |
1a989d0f | 867 | |
a0b66a73 | 868 | for (i = 0; i < gc->ngpio; i++) |
767cd17a | 869 | gdev->descs[i].gdev = gdev; |
14e85c0e | 870 | |
207270dd DC |
871 | spin_unlock_irqrestore(&gpio_lock, flags); |
872 | ||
17a7ca35 | 873 | BLOCKING_INIT_NOTIFIER_HEAD(&gdev->line_state_notifier); |
a067419b | 874 | BLOCKING_INIT_NOTIFIER_HEAD(&gdev->device_notifier); |
bdbbae24 | 875 | init_rwsem(&gdev->sem); |
51c1064e | 876 | |
f23f1516 | 877 | #ifdef CONFIG_PINCTRL |
20ec3e39 | 878 | INIT_LIST_HEAD(&gdev->pin_ranges); |
f23f1516 SH |
879 | #endif |
880 | ||
c73960bb | 881 | if (gc->names) { |
7cba1a4d | 882 | ret = gpiochip_set_desc_names(gc); |
c73960bb PR |
883 | if (ret) |
884 | goto err_remove_from_list; | |
885 | } | |
0c5ebb4c | 886 | ret = gpiochip_set_names(gc); |
d377f56f | 887 | if (ret) |
5f3ca732 MP |
888 | goto err_remove_from_list; |
889 | ||
1a55fc40 | 890 | ret = gpiochip_init_valid_mask(gc); |
d377f56f | 891 | if (ret) |
48057ed1 | 892 | goto err_remove_from_list; |
e0d89728 | 893 | |
a0b66a73 | 894 | ret = of_gpiochip_add(gc); |
d377f56f | 895 | if (ret) |
48057ed1 | 896 | goto err_free_gpiochip_mask; |
28355f81 | 897 | |
a0b66a73 | 898 | for (i = 0; i < gc->ngpio; i++) { |
3edfb7bd RRD |
899 | struct gpio_desc *desc = &gdev->descs[i]; |
900 | ||
a0b66a73 | 901 | if (gc->get_direction && gpiochip_line_is_valid(gc, i)) { |
4fc5bfeb | 902 | assign_bit(FLAG_IS_OUT, |
a0b66a73 | 903 | &desc->flags, !gc->get_direction(gc, i)); |
d95da993 | 904 | } else { |
4fc5bfeb | 905 | assign_bit(FLAG_IS_OUT, |
a0b66a73 | 906 | &desc->flags, !gc->direction_input); |
d95da993 | 907 | } |
3edfb7bd RRD |
908 | } |
909 | ||
a0b66a73 | 910 | ret = gpiochip_add_pin_ranges(gc); |
b056ca1c AS |
911 | if (ret) |
912 | goto err_remove_of_chip; | |
913 | ||
a0b66a73 | 914 | acpi_gpiochip_add(gc); |
391c970c | 915 | |
a0b66a73 | 916 | machine_gpiochip_add(gc); |
a411e81e | 917 | |
a0b66a73 | 918 | ret = gpiochip_irqchip_init_valid_mask(gc); |
9411e3aa AS |
919 | if (ret) |
920 | goto err_remove_acpi_chip; | |
921 | ||
a0b66a73 | 922 | ret = gpiochip_irqchip_init_hw(gc); |
fbdf8d4b | 923 | if (ret) |
48057ed1 LW |
924 | goto err_remove_acpi_chip; |
925 | ||
a0b66a73 | 926 | ret = gpiochip_add_irqchip(gc, lock_key, request_key); |
fbdf8d4b | 927 | if (ret) |
48057ed1 LW |
928 | goto err_remove_irqchip_mask; |
929 | ||
3c702e99 LW |
930 | /* |
931 | * By first adding the chardev, and then adding the device, | |
932 | * we get a device node entry in sysfs under | |
933 | * /sys/bus/gpio/devices/gpiochipN/dev that can be used for | |
934 | * coldplug of device nodes and other udev business. | |
159f3cd9 GR |
935 | * We can do this only if gpiolib has been initialized. |
936 | * Otherwise, defer until later. | |
3c702e99 | 937 | */ |
159f3cd9 | 938 | if (gpiolib_initialized) { |
d377f56f LW |
939 | ret = gpiochip_setup_dev(gdev); |
940 | if (ret) | |
48057ed1 | 941 | goto err_remove_irqchip; |
159f3cd9 | 942 | } |
cedb1881 | 943 | return 0; |
3bae4811 | 944 | |
48057ed1 | 945 | err_remove_irqchip: |
a0b66a73 | 946 | gpiochip_irqchip_remove(gc); |
48057ed1 | 947 | err_remove_irqchip_mask: |
a0b66a73 | 948 | gpiochip_irqchip_free_valid_mask(gc); |
35779890 | 949 | err_remove_acpi_chip: |
a0b66a73 | 950 | acpi_gpiochip_remove(gc); |
35779890 | 951 | err_remove_of_chip: |
a0b66a73 LW |
952 | gpiochip_free_hogs(gc); |
953 | of_gpiochip_remove(gc); | |
35779890 | 954 | err_free_gpiochip_mask: |
a0b66a73 LW |
955 | gpiochip_remove_pin_ranges(gc); |
956 | gpiochip_free_valid_mask(gc); | |
ec851b23 ZH |
957 | if (gdev->dev.release) { |
958 | /* release() has been registered by gpiochip_setup_dev() */ | |
dc0989e3 | 959 | gpio_device_put(gdev); |
ec851b23 ZH |
960 | goto err_print_message; |
961 | } | |
5f3ca732 | 962 | err_remove_from_list: |
225fce83 | 963 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 964 | list_del(&gdev->list); |
3bae4811 | 965 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 966 | err_free_label: |
fcf273e5 | 967 | kfree_const(gdev->label); |
476e2fc5 GR |
968 | err_free_descs: |
969 | kfree(gdev->descs); | |
c351bb64 QW |
970 | err_free_dev_name: |
971 | kfree(dev_name(&gdev->dev)); | |
a05a1404 | 972 | err_free_ida: |
8d4a85b6 | 973 | ida_free(&gpio_ida, gdev->id); |
a05a1404 | 974 | err_free_gdev: |
ec851b23 ZH |
975 | kfree(gdev); |
976 | err_print_message: | |
d2876d08 | 977 | /* failures here can mean systems won't boot... */ |
3cc1fb73 GS |
978 | if (ret != -EPROBE_DEFER) { |
979 | pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__, | |
55b2395e | 980 | base, base + (int)gc->ngpio - 1, |
3cc1fb73 GS |
981 | gc->label ? : "generic", ret); |
982 | } | |
d377f56f | 983 | return ret; |
d2876d08 | 984 | } |
959bc7b2 | 985 | EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key); |
d2876d08 DB |
986 | |
987 | /** | |
988 | * gpiochip_remove() - unregister a gpio_chip | |
a0b66a73 | 989 | * @gc: the chip to unregister |
d2876d08 DB |
990 | * |
991 | * A gpio_chip with any GPIOs still requested may not be removed. | |
992 | */ | |
a0b66a73 | 993 | void gpiochip_remove(struct gpio_chip *gc) |
d2876d08 | 994 | { |
a0b66a73 | 995 | struct gpio_device *gdev = gc->gpiodev; |
d2876d08 | 996 | unsigned long flags; |
869233f8 | 997 | unsigned int i; |
d2876d08 | 998 | |
bdbbae24 BG |
999 | down_write(&gdev->sem); |
1000 | ||
ff2b1359 | 1001 | /* FIXME: should the legacy sysfs handling be moved to gpio_device? */ |
afbc4f31 | 1002 | gpiochip_sysfs_unregister(gdev); |
a0b66a73 | 1003 | gpiochip_free_hogs(gc); |
bd203bd5 BJZ |
1004 | /* Numb the device, cancelling all outstanding operations */ |
1005 | gdev->chip = NULL; | |
a0b66a73 LW |
1006 | gpiochip_irqchip_remove(gc); |
1007 | acpi_gpiochip_remove(gc); | |
1008 | of_gpiochip_remove(gc); | |
1009 | gpiochip_remove_pin_ranges(gc); | |
1010 | gpiochip_free_valid_mask(gc); | |
43c54eca LW |
1011 | /* |
1012 | * We accept no more calls into the driver from this point, so | |
7b59bdbc | 1013 | * NULL the driver data pointer. |
43c54eca | 1014 | */ |
7b59bdbc | 1015 | gpiochip_set_data(gc, NULL); |
391c970c | 1016 | |
6798acaa | 1017 | spin_lock_irqsave(&gpio_lock, flags); |
fdeb8e15 | 1018 | for (i = 0; i < gdev->ngpio; i++) { |
a0b66a73 | 1019 | if (gpiochip_is_requested(gc, i)) |
869233f8 | 1020 | break; |
d2876d08 | 1021 | } |
d2876d08 | 1022 | spin_unlock_irqrestore(&gpio_lock, flags); |
14e85c0e | 1023 | |
ca18a852 | 1024 | if (i != gdev->ngpio) |
fdeb8e15 | 1025 | dev_crit(&gdev->dev, |
58383c78 | 1026 | "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n"); |
fab28b89 | 1027 | |
ff2b1359 LW |
1028 | /* |
1029 | * The gpiochip side puts its use of the device to rest here: | |
1030 | * if there are no userspace clients, the chardev and device will | |
1031 | * be removed, else it will be dangling until the last user is | |
1032 | * gone. | |
1033 | */ | |
1f5eb8b1 | 1034 | gcdev_unregister(gdev); |
bdbbae24 | 1035 | up_write(&gdev->sem); |
dc0989e3 | 1036 | gpio_device_put(gdev); |
d2876d08 DB |
1037 | } |
1038 | EXPORT_SYMBOL_GPL(gpiochip_remove); | |
1039 | ||
cfe102f6 BG |
1040 | /* |
1041 | * FIXME: This will be removed soon. | |
594fa265 | 1042 | * |
cfe102f6 | 1043 | * This function is depracated, don't use. |
594fa265 | 1044 | */ |
07ce8ec7 | 1045 | struct gpio_chip *gpiochip_find(void *data, |
a0b66a73 | 1046 | int (*match)(struct gpio_chip *gc, |
3d0f7cf0 | 1047 | void *data)) |
594fa265 | 1048 | { |
ff2b1359 | 1049 | struct gpio_device *gdev; |
a0b66a73 | 1050 | struct gpio_chip *gc = NULL; |
ff2b1359 | 1051 | |
cfe102f6 BG |
1052 | gdev = gpio_device_find(data, match); |
1053 | if (gdev) { | |
1054 | gc = gdev->chip; | |
1055 | gpio_device_put(gdev); | |
1056 | } | |
594fa265 | 1057 | |
a0b66a73 | 1058 | return gc; |
594fa265 | 1059 | } |
8fa0c9bf | 1060 | EXPORT_SYMBOL_GPL(gpiochip_find); |
d2876d08 | 1061 | |
cfe102f6 BG |
1062 | /** |
1063 | * gpio_device_find() - find a specific GPIO device | |
1064 | * @data: data to pass to match function | |
1065 | * @match: Callback function to check gpio_chip | |
1066 | * | |
1067 | * Returns: | |
1068 | * New reference to struct gpio_device. | |
1069 | * | |
1070 | * Similar to bus_find_device(). It returns a reference to a gpio_device as | |
1071 | * determined by a user supplied @match callback. The callback should return | |
1072 | * 0 if the device doesn't match and non-zero if it does. If the callback | |
1073 | * returns non-zero, this function will return to the caller and not iterate | |
1074 | * over any more gpio_devices. | |
1075 | * | |
1076 | * The callback takes the GPIO chip structure as argument. During the execution | |
1077 | * of the callback function the chip is protected from being freed. TODO: This | |
1078 | * actually has yet to be implemented. | |
1079 | * | |
1080 | * If the function returns non-NULL, the returned reference must be freed by | |
1081 | * the caller using gpio_device_put(). | |
1082 | */ | |
1083 | struct gpio_device *gpio_device_find(void *data, | |
1084 | int (*match)(struct gpio_chip *gc, | |
1085 | void *data)) | |
1086 | { | |
1087 | struct gpio_device *gdev; | |
1088 | ||
1089 | /* | |
1090 | * Not yet but in the future the spinlock below will become a mutex. | |
1091 | * Annotate this function before anyone tries to use it in interrupt | |
1092 | * context like it happened with gpiochip_find(). | |
1093 | */ | |
1094 | might_sleep(); | |
1095 | ||
1096 | guard(spinlock_irqsave)(&gpio_lock); | |
1097 | ||
1098 | list_for_each_entry(gdev, &gpio_devices, list) { | |
1099 | if (gdev->chip && match(gdev->chip, data)) | |
1100 | return gpio_device_get(gdev); | |
1101 | } | |
1102 | ||
1103 | return NULL; | |
1104 | } | |
1105 | EXPORT_SYMBOL_GPL(gpio_device_find); | |
1106 | ||
d62fcd9f BG |
1107 | static int gpio_chip_match_by_label(struct gpio_chip *gc, void *label) |
1108 | { | |
1109 | return gc->label && !strcmp(gc->label, label); | |
1110 | } | |
1111 | ||
1112 | /** | |
1113 | * gpio_device_find_by_label() - wrapper around gpio_device_find() finding the | |
1114 | * GPIO device by its backing chip's label | |
1115 | * @label: Label to lookup | |
1116 | * | |
1117 | * Returns: | |
1118 | * Reference to the GPIO device or NULL. Reference must be released with | |
1119 | * gpio_device_put(). | |
1120 | */ | |
1121 | struct gpio_device *gpio_device_find_by_label(const char *label) | |
1122 | { | |
1123 | return gpio_device_find((void *)label, gpio_chip_match_by_label); | |
1124 | } | |
1125 | EXPORT_SYMBOL_GPL(gpio_device_find_by_label); | |
1126 | ||
a0b66a73 | 1127 | static int gpiochip_match_name(struct gpio_chip *gc, void *data) |
79697ef9 AC |
1128 | { |
1129 | const char *name = data; | |
1130 | ||
a0b66a73 | 1131 | return !strcmp(gc->label, name); |
79697ef9 AC |
1132 | } |
1133 | ||
1134 | static struct gpio_chip *find_chip_by_name(const char *name) | |
1135 | { | |
1136 | return gpiochip_find((void *)name, gpiochip_match_name); | |
1137 | } | |
1138 | ||
36aa129f BG |
1139 | /** |
1140 | * gpio_device_get() - Increase the reference count of this GPIO device | |
1141 | * @gdev: GPIO device to increase the refcount for | |
1142 | * | |
1143 | * Returns: | |
1144 | * Pointer to @gdev. | |
1145 | */ | |
1146 | struct gpio_device *gpio_device_get(struct gpio_device *gdev) | |
1147 | { | |
1148 | return to_gpio_device(get_device(&gdev->dev)); | |
1149 | } | |
1150 | EXPORT_SYMBOL_GPL(gpio_device_get); | |
1151 | ||
1152 | /** | |
1153 | * gpio_device_put() - Decrease the reference count of this GPIO device and | |
1154 | * possibly free all resources associated with it. | |
1155 | * @gdev: GPIO device to decrease the reference count for | |
1156 | */ | |
1157 | void gpio_device_put(struct gpio_device *gdev) | |
1158 | { | |
1159 | put_device(&gdev->dev); | |
1160 | } | |
1161 | EXPORT_SYMBOL_GPL(gpio_device_put); | |
1162 | ||
14250520 LW |
1163 | #ifdef CONFIG_GPIOLIB_IRQCHIP |
1164 | ||
1165 | /* | |
1166 | * The following is irqchip helper code for gpiochips. | |
1167 | */ | |
1168 | ||
9411e3aa AS |
1169 | static int gpiochip_irqchip_init_hw(struct gpio_chip *gc) |
1170 | { | |
1171 | struct gpio_irq_chip *girq = &gc->irq; | |
1172 | ||
1173 | if (!girq->init_hw) | |
1174 | return 0; | |
1175 | ||
1176 | return girq->init_hw(gc); | |
1177 | } | |
1178 | ||
5fbe5b58 | 1179 | static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc) |
79b804cb | 1180 | { |
5fbe5b58 LW |
1181 | struct gpio_irq_chip *girq = &gc->irq; |
1182 | ||
1183 | if (!girq->init_valid_mask) | |
79b804cb MW |
1184 | return 0; |
1185 | ||
5fbe5b58 LW |
1186 | girq->valid_mask = gpiochip_allocate_mask(gc); |
1187 | if (!girq->valid_mask) | |
79b804cb MW |
1188 | return -ENOMEM; |
1189 | ||
5fbe5b58 LW |
1190 | girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio); |
1191 | ||
79b804cb MW |
1192 | return 0; |
1193 | } | |
1194 | ||
a0b66a73 | 1195 | static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc) |
79b804cb | 1196 | { |
05a854c5 | 1197 | gpiochip_free_mask(&gc->irq.valid_mask); |
79b804cb MW |
1198 | } |
1199 | ||
a0b66a73 | 1200 | bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc, |
64ff2c8e | 1201 | unsigned int offset) |
79b804cb | 1202 | { |
a0b66a73 | 1203 | if (!gpiochip_line_is_valid(gc, offset)) |
726cb3ba | 1204 | return false; |
79b804cb | 1205 | /* No mask means all valid */ |
a0b66a73 | 1206 | if (likely(!gc->irq.valid_mask)) |
79b804cb | 1207 | return true; |
a0b66a73 | 1208 | return test_bit(offset, gc->irq.valid_mask); |
79b804cb | 1209 | } |
64ff2c8e | 1210 | EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid); |
79b804cb | 1211 | |
fdd61a01 LW |
1212 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
1213 | ||
1214 | /** | |
1215 | * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip | |
1216 | * to a gpiochip | |
1217 | * @gc: the gpiochip to set the irqchip hierarchical handler to | |
1218 | * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt | |
1219 | * will then percolate up to the parent | |
1220 | */ | |
1221 | static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc, | |
1222 | struct irq_chip *irqchip) | |
1223 | { | |
1224 | /* DT will deal with mapping each IRQ as we go along */ | |
1225 | if (is_of_node(gc->irq.fwnode)) | |
1226 | return; | |
1227 | ||
1228 | /* | |
1229 | * This is for legacy and boardfile "irqchip" fwnodes: allocate | |
1230 | * irqs upfront instead of dynamically since we don't have the | |
1231 | * dynamic type of allocation that hardware description languages | |
1232 | * provide. Once all GPIO drivers using board files are gone from | |
1233 | * the kernel we can delete this code, but for a transitional period | |
1234 | * it is necessary to keep this around. | |
1235 | */ | |
1236 | if (is_fwnode_irqchip(gc->irq.fwnode)) { | |
1237 | int i; | |
1238 | int ret; | |
1239 | ||
1240 | for (i = 0; i < gc->ngpio; i++) { | |
1241 | struct irq_fwspec fwspec; | |
1242 | unsigned int parent_hwirq; | |
1243 | unsigned int parent_type; | |
1244 | struct gpio_irq_chip *girq = &gc->irq; | |
1245 | ||
1246 | /* | |
1247 | * We call the child to parent translation function | |
1248 | * only to check if the child IRQ is valid or not. | |
1249 | * Just pick the rising edge type here as that is what | |
1250 | * we likely need to support. | |
1251 | */ | |
1252 | ret = girq->child_to_parent_hwirq(gc, i, | |
1253 | IRQ_TYPE_EDGE_RISING, | |
1254 | &parent_hwirq, | |
1255 | &parent_type); | |
1256 | if (ret) { | |
1257 | chip_err(gc, "skip set-up on hwirq %d\n", | |
1258 | i); | |
1259 | continue; | |
1260 | } | |
1261 | ||
1262 | fwspec.fwnode = gc->irq.fwnode; | |
1263 | /* This is the hwirq for the GPIO line side of things */ | |
1264 | fwspec.param[0] = girq->child_offset_to_irq(gc, i); | |
1265 | /* Just pick something */ | |
1266 | fwspec.param[1] = IRQ_TYPE_EDGE_RISING; | |
1267 | fwspec.param_count = 2; | |
908334ab JH |
1268 | ret = irq_domain_alloc_irqs(gc->irq.domain, 1, |
1269 | NUMA_NO_NODE, &fwspec); | |
fdd61a01 LW |
1270 | if (ret < 0) { |
1271 | chip_err(gc, | |
1272 | "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n", | |
1273 | i, parent_hwirq, | |
1274 | ret); | |
1275 | } | |
1276 | } | |
1277 | } | |
1278 | ||
1279 | chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__); | |
1280 | ||
1281 | return; | |
1282 | } | |
1283 | ||
1284 | static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d, | |
1285 | struct irq_fwspec *fwspec, | |
1286 | unsigned long *hwirq, | |
1287 | unsigned int *type) | |
1288 | { | |
1289 | /* We support standard DT translation */ | |
1290 | if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) { | |
1291 | return irq_domain_translate_twocell(d, fwspec, hwirq, type); | |
1292 | } | |
1293 | ||
1294 | /* This is for board files and others not using DT */ | |
1295 | if (is_fwnode_irqchip(fwspec->fwnode)) { | |
1296 | int ret; | |
1297 | ||
1298 | ret = irq_domain_translate_twocell(d, fwspec, hwirq, type); | |
1299 | if (ret) | |
1300 | return ret; | |
1301 | WARN_ON(*type == IRQ_TYPE_NONE); | |
1302 | return 0; | |
1303 | } | |
1304 | return -EINVAL; | |
1305 | } | |
1306 | ||
1307 | static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d, | |
1308 | unsigned int irq, | |
1309 | unsigned int nr_irqs, | |
1310 | void *data) | |
1311 | { | |
1312 | struct gpio_chip *gc = d->host_data; | |
1313 | irq_hw_number_t hwirq; | |
1314 | unsigned int type = IRQ_TYPE_NONE; | |
1315 | struct irq_fwspec *fwspec = data; | |
91a29af4 | 1316 | union gpio_irq_fwspec gpio_parent_fwspec = {}; |
fdd61a01 LW |
1317 | unsigned int parent_hwirq; |
1318 | unsigned int parent_type; | |
1319 | struct gpio_irq_chip *girq = &gc->irq; | |
1320 | int ret; | |
1321 | ||
1322 | /* | |
1323 | * The nr_irqs parameter is always one except for PCI multi-MSI | |
1324 | * so this should not happen. | |
1325 | */ | |
1326 | WARN_ON(nr_irqs != 1); | |
1327 | ||
1328 | ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type); | |
1329 | if (ret) | |
1330 | return ret; | |
1331 | ||
db4064cc | 1332 | chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq); |
fdd61a01 LW |
1333 | |
1334 | ret = girq->child_to_parent_hwirq(gc, hwirq, type, | |
1335 | &parent_hwirq, &parent_type); | |
1336 | if (ret) { | |
1337 | chip_err(gc, "can't look up hwirq %lu\n", hwirq); | |
1338 | return ret; | |
1339 | } | |
366950ee | 1340 | chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq); |
fdd61a01 LW |
1341 | |
1342 | /* | |
1343 | * We set handle_bad_irq because the .set_type() should | |
1344 | * always be invoked and set the right type of handler. | |
1345 | */ | |
1346 | irq_domain_set_info(d, | |
1347 | irq, | |
1348 | hwirq, | |
1349 | gc->irq.chip, | |
1350 | gc, | |
1351 | girq->handler, | |
1352 | NULL, NULL); | |
1353 | irq_set_probe(irq); | |
1354 | ||
fdd61a01 | 1355 | /* This parent only handles asserted level IRQs */ |
91a29af4 MZ |
1356 | ret = girq->populate_parent_alloc_arg(gc, &gpio_parent_fwspec, |
1357 | parent_hwirq, parent_type); | |
1358 | if (ret) | |
1359 | return ret; | |
24258761 | 1360 | |
366950ee | 1361 | chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n", |
fdd61a01 | 1362 | irq, parent_hwirq); |
c34f6dc8 | 1363 | irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key); |
91a29af4 | 1364 | ret = irq_domain_alloc_irqs_parent(d, irq, 1, &gpio_parent_fwspec); |
880b7cf2 KH |
1365 | /* |
1366 | * If the parent irqdomain is msi, the interrupts have already | |
1367 | * been allocated, so the EEXIST is good. | |
1368 | */ | |
1369 | if (irq_domain_is_msi(d->parent) && (ret == -EEXIST)) | |
1370 | ret = 0; | |
fdd61a01 LW |
1371 | if (ret) |
1372 | chip_err(gc, | |
1373 | "failed to allocate parent hwirq %d for hwirq %lu\n", | |
1374 | parent_hwirq, hwirq); | |
1375 | ||
1376 | return ret; | |
1377 | } | |
1378 | ||
a0b66a73 | 1379 | static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc, |
fdd61a01 LW |
1380 | unsigned int offset) |
1381 | { | |
1382 | return offset; | |
1383 | } | |
1384 | ||
1385 | static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops) | |
1386 | { | |
1387 | ops->activate = gpiochip_irq_domain_activate; | |
1388 | ops->deactivate = gpiochip_irq_domain_deactivate; | |
1389 | ops->alloc = gpiochip_hierarchy_irq_domain_alloc; | |
fdd61a01 LW |
1390 | |
1391 | /* | |
08f12b45 | 1392 | * We only allow overriding the translate() and free() functions for |
fdd61a01 | 1393 | * hierarchical chips, and this should only be done if the user |
08f12b45 LP |
1394 | * really need something other than 1:1 translation for translate() |
1395 | * callback and free if user wants to free up any resources which | |
1396 | * were allocated during callbacks, for example populate_parent_alloc_arg. | |
fdd61a01 LW |
1397 | */ |
1398 | if (!ops->translate) | |
1399 | ops->translate = gpiochip_hierarchy_irq_domain_translate; | |
08f12b45 LP |
1400 | if (!ops->free) |
1401 | ops->free = irq_domain_free_irqs_common; | |
fdd61a01 LW |
1402 | } |
1403 | ||
b683b487 | 1404 | static struct irq_domain *gpiochip_hierarchy_create_domain(struct gpio_chip *gc) |
fdd61a01 | 1405 | { |
b683b487 AS |
1406 | struct irq_domain *domain; |
1407 | ||
fdd61a01 LW |
1408 | if (!gc->irq.child_to_parent_hwirq || |
1409 | !gc->irq.fwnode) { | |
1410 | chip_err(gc, "missing irqdomain vital data\n"); | |
b683b487 | 1411 | return ERR_PTR(-EINVAL); |
fdd61a01 LW |
1412 | } |
1413 | ||
1414 | if (!gc->irq.child_offset_to_irq) | |
1415 | gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop; | |
1416 | ||
24258761 KH |
1417 | if (!gc->irq.populate_parent_alloc_arg) |
1418 | gc->irq.populate_parent_alloc_arg = | |
fdd61a01 LW |
1419 | gpiochip_populate_parent_fwspec_twocell; |
1420 | ||
1421 | gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops); | |
1422 | ||
b683b487 | 1423 | domain = irq_domain_create_hierarchy( |
fdd61a01 LW |
1424 | gc->irq.parent_domain, |
1425 | 0, | |
1426 | gc->ngpio, | |
1427 | gc->irq.fwnode, | |
1428 | &gc->irq.child_irq_domain_ops, | |
1429 | gc); | |
1430 | ||
b683b487 AS |
1431 | if (!domain) |
1432 | return ERR_PTR(-ENOMEM); | |
fdd61a01 LW |
1433 | |
1434 | gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip); | |
1435 | ||
b683b487 | 1436 | return domain; |
fdd61a01 LW |
1437 | } |
1438 | ||
1439 | static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc) | |
1440 | { | |
1441 | return !!gc->irq.parent_domain; | |
1442 | } | |
1443 | ||
91a29af4 MZ |
1444 | int gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc, |
1445 | union gpio_irq_fwspec *gfwspec, | |
1446 | unsigned int parent_hwirq, | |
1447 | unsigned int parent_type) | |
fdd61a01 | 1448 | { |
91a29af4 | 1449 | struct irq_fwspec *fwspec = &gfwspec->fwspec; |
24258761 | 1450 | |
a0b66a73 | 1451 | fwspec->fwnode = gc->irq.parent_domain->fwnode; |
fdd61a01 LW |
1452 | fwspec->param_count = 2; |
1453 | fwspec->param[0] = parent_hwirq; | |
1454 | fwspec->param[1] = parent_type; | |
24258761 | 1455 | |
91a29af4 | 1456 | return 0; |
fdd61a01 LW |
1457 | } |
1458 | EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell); | |
1459 | ||
91a29af4 MZ |
1460 | int gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc, |
1461 | union gpio_irq_fwspec *gfwspec, | |
1462 | unsigned int parent_hwirq, | |
1463 | unsigned int parent_type) | |
fdd61a01 | 1464 | { |
91a29af4 | 1465 | struct irq_fwspec *fwspec = &gfwspec->fwspec; |
24258761 | 1466 | |
a0b66a73 | 1467 | fwspec->fwnode = gc->irq.parent_domain->fwnode; |
fdd61a01 LW |
1468 | fwspec->param_count = 4; |
1469 | fwspec->param[0] = 0; | |
1470 | fwspec->param[1] = parent_hwirq; | |
1471 | fwspec->param[2] = 0; | |
1472 | fwspec->param[3] = parent_type; | |
24258761 | 1473 | |
91a29af4 | 1474 | return 0; |
fdd61a01 LW |
1475 | } |
1476 | EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell); | |
1477 | ||
1478 | #else | |
1479 | ||
b683b487 | 1480 | static struct irq_domain *gpiochip_hierarchy_create_domain(struct gpio_chip *gc) |
fdd61a01 | 1481 | { |
b683b487 | 1482 | return ERR_PTR(-EINVAL); |
fdd61a01 LW |
1483 | } |
1484 | ||
1485 | static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc) | |
1486 | { | |
1487 | return false; | |
1488 | } | |
1489 | ||
1490 | #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ | |
1491 | ||
14250520 LW |
1492 | /** |
1493 | * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip | |
1494 | * @d: the irqdomain used by this irqchip | |
1495 | * @irq: the global irq number used by this GPIO irqchip irq | |
1496 | * @hwirq: the local IRQ/GPIO line offset on this gpiochip | |
1497 | * | |
1498 | * This function will set up the mapping for a certain IRQ line on a | |
1499 | * gpiochip by assigning the gpiochip as chip data, and using the irqchip | |
1500 | * stored inside the gpiochip. | |
1501 | */ | |
db4064cc | 1502 | int gpiochip_irq_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hwirq) |
14250520 | 1503 | { |
a0b66a73 | 1504 | struct gpio_chip *gc = d->host_data; |
d377f56f | 1505 | int ret = 0; |
14250520 | 1506 | |
a0b66a73 | 1507 | if (!gpiochip_irqchip_irq_valid(gc, hwirq)) |
dc749a09 GS |
1508 | return -ENXIO; |
1509 | ||
a0b66a73 | 1510 | irq_set_chip_data(irq, gc); |
a0a8bcf4 GS |
1511 | /* |
1512 | * This lock class tells lockdep that GPIO irqs are in a different | |
1513 | * category than their parents, so it won't report false recursion. | |
1514 | */ | |
a0b66a73 LW |
1515 | irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key); |
1516 | irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler); | |
d245b3f9 | 1517 | /* Chips that use nested thread handlers have them marked */ |
a0b66a73 | 1518 | if (gc->irq.threaded) |
1c8732bb | 1519 | irq_set_nested_thread(irq, 1); |
14250520 | 1520 | irq_set_noprobe(irq); |
23393d49 | 1521 | |
a0b66a73 LW |
1522 | if (gc->irq.num_parents == 1) |
1523 | ret = irq_set_parent(irq, gc->irq.parents[0]); | |
1524 | else if (gc->irq.map) | |
1525 | ret = irq_set_parent(irq, gc->irq.map[hwirq]); | |
e0d89728 | 1526 | |
d377f56f LW |
1527 | if (ret < 0) |
1528 | return ret; | |
e0d89728 | 1529 | |
1333b90f LW |
1530 | /* |
1531 | * No set-up of the hardware will happen if IRQ_TYPE_NONE | |
1532 | * is passed as default type. | |
1533 | */ | |
a0b66a73 LW |
1534 | if (gc->irq.default_type != IRQ_TYPE_NONE) |
1535 | irq_set_irq_type(irq, gc->irq.default_type); | |
14250520 LW |
1536 | |
1537 | return 0; | |
1538 | } | |
1b95b4eb | 1539 | EXPORT_SYMBOL_GPL(gpiochip_irq_map); |
14250520 | 1540 | |
1b95b4eb | 1541 | void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq) |
c3626fde | 1542 | { |
a0b66a73 | 1543 | struct gpio_chip *gc = d->host_data; |
1c8732bb | 1544 | |
a0b66a73 | 1545 | if (gc->irq.threaded) |
1c8732bb | 1546 | irq_set_nested_thread(irq, 0); |
c3626fde LW |
1547 | irq_set_chip_and_handler(irq, NULL, NULL); |
1548 | irq_set_chip_data(irq, NULL); | |
1549 | } | |
1b95b4eb | 1550 | EXPORT_SYMBOL_GPL(gpiochip_irq_unmap); |
c3626fde | 1551 | |
14250520 LW |
1552 | static const struct irq_domain_ops gpiochip_domain_ops = { |
1553 | .map = gpiochip_irq_map, | |
c3626fde | 1554 | .unmap = gpiochip_irq_unmap, |
14250520 LW |
1555 | /* Virtually all GPIO irqchips are twocell:ed */ |
1556 | .xlate = irq_domain_xlate_twocell, | |
1557 | }; | |
1558 | ||
1efc43de AS |
1559 | static struct irq_domain *gpiochip_simple_create_domain(struct gpio_chip *gc) |
1560 | { | |
1561 | struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev); | |
1562 | struct irq_domain *domain; | |
1563 | ||
1564 | domain = irq_domain_create_simple(fwnode, gc->ngpio, gc->irq.first, | |
1565 | &gpiochip_domain_ops, gc); | |
1566 | if (!domain) | |
1567 | return ERR_PTR(-EINVAL); | |
1568 | ||
1569 | return domain; | |
1570 | } | |
1571 | ||
fdd61a01 LW |
1572 | /* |
1573 | * TODO: move these activate/deactivate in under the hierarchicial | |
1574 | * irqchip implementation as static once SPMI and SSBI (all external | |
1575 | * users) are phased over. | |
1576 | */ | |
ef74f70e BM |
1577 | /** |
1578 | * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ | |
1579 | * @domain: The IRQ domain used by this IRQ chip | |
1580 | * @data: Outermost irq_data associated with the IRQ | |
1581 | * @reserve: If set, only reserve an interrupt vector instead of assigning one | |
1582 | * | |
1583 | * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be | |
1584 | * used as the activate function for the &struct irq_domain_ops. The host_data | |
1585 | * for the IRQ domain must be the &struct gpio_chip. | |
1586 | */ | |
1587 | int gpiochip_irq_domain_activate(struct irq_domain *domain, | |
1588 | struct irq_data *data, bool reserve) | |
1589 | { | |
a0b66a73 | 1590 | struct gpio_chip *gc = domain->host_data; |
db4064cc | 1591 | unsigned int hwirq = irqd_to_hwirq(data); |
ef74f70e | 1592 | |
db4064cc | 1593 | return gpiochip_lock_as_irq(gc, hwirq); |
ef74f70e BM |
1594 | } |
1595 | EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate); | |
1596 | ||
1597 | /** | |
1598 | * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ | |
1599 | * @domain: The IRQ domain used by this IRQ chip | |
1600 | * @data: Outermost irq_data associated with the IRQ | |
1601 | * | |
1602 | * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to | |
1603 | * be used as the deactivate function for the &struct irq_domain_ops. The | |
1604 | * host_data for the IRQ domain must be the &struct gpio_chip. | |
1605 | */ | |
1606 | void gpiochip_irq_domain_deactivate(struct irq_domain *domain, | |
1607 | struct irq_data *data) | |
1608 | { | |
a0b66a73 | 1609 | struct gpio_chip *gc = domain->host_data; |
db4064cc | 1610 | unsigned int hwirq = irqd_to_hwirq(data); |
ef74f70e | 1611 | |
db4064cc | 1612 | return gpiochip_unlock_as_irq(gc, hwirq); |
ef74f70e BM |
1613 | } |
1614 | EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate); | |
1615 | ||
13daf489 | 1616 | static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset) |
14250520 | 1617 | { |
a0b66a73 | 1618 | struct irq_domain *domain = gc->irq.domain; |
fdd61a01 | 1619 | |
5467801f SP |
1620 | #ifdef CONFIG_GPIOLIB_IRQCHIP |
1621 | /* | |
1622 | * Avoid race condition with other code, which tries to lookup | |
1623 | * an IRQ before the irqchip has been properly registered, | |
1624 | * i.e. while gpiochip is still being brought up. | |
1625 | */ | |
1626 | if (!gc->irq.initialized) | |
1627 | return -EPROBE_DEFER; | |
1628 | #endif | |
1629 | ||
a0b66a73 | 1630 | if (!gpiochip_irqchip_irq_valid(gc, offset)) |
4e6b8238 | 1631 | return -ENXIO; |
5b76e79c | 1632 | |
fdd61a01 LW |
1633 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
1634 | if (irq_domain_is_hierarchy(domain)) { | |
1635 | struct irq_fwspec spec; | |
1636 | ||
1637 | spec.fwnode = domain->fwnode; | |
1638 | spec.param_count = 2; | |
a0b66a73 | 1639 | spec.param[0] = gc->irq.child_offset_to_irq(gc, offset); |
fdd61a01 LW |
1640 | spec.param[1] = IRQ_TYPE_NONE; |
1641 | ||
1642 | return irq_create_fwspec_mapping(&spec); | |
1643 | } | |
1644 | #endif | |
1645 | ||
1646 | return irq_create_mapping(domain, offset); | |
14250520 LW |
1647 | } |
1648 | ||
704f0875 | 1649 | int gpiochip_irq_reqres(struct irq_data *d) |
14250520 | 1650 | { |
a0b66a73 | 1651 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
db4064cc | 1652 | unsigned int hwirq = irqd_to_hwirq(d); |
5b76e79c | 1653 | |
db4064cc | 1654 | return gpiochip_reqres_irq(gc, hwirq); |
14250520 | 1655 | } |
704f0875 | 1656 | EXPORT_SYMBOL(gpiochip_irq_reqres); |
14250520 | 1657 | |
704f0875 | 1658 | void gpiochip_irq_relres(struct irq_data *d) |
14250520 | 1659 | { |
a0b66a73 | 1660 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
db4064cc | 1661 | unsigned int hwirq = irqd_to_hwirq(d); |
14250520 | 1662 | |
db4064cc | 1663 | gpiochip_relres_irq(gc, hwirq); |
14250520 | 1664 | } |
704f0875 | 1665 | EXPORT_SYMBOL(gpiochip_irq_relres); |
14250520 | 1666 | |
a8173820 MS |
1667 | static void gpiochip_irq_mask(struct irq_data *d) |
1668 | { | |
1669 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | |
db4064cc | 1670 | unsigned int hwirq = irqd_to_hwirq(d); |
a8173820 MS |
1671 | |
1672 | if (gc->irq.irq_mask) | |
1673 | gc->irq.irq_mask(d); | |
db4064cc | 1674 | gpiochip_disable_irq(gc, hwirq); |
a8173820 MS |
1675 | } |
1676 | ||
1677 | static void gpiochip_irq_unmask(struct irq_data *d) | |
1678 | { | |
1679 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | |
db4064cc | 1680 | unsigned int hwirq = irqd_to_hwirq(d); |
a8173820 | 1681 | |
db4064cc | 1682 | gpiochip_enable_irq(gc, hwirq); |
a8173820 MS |
1683 | if (gc->irq.irq_unmask) |
1684 | gc->irq.irq_unmask(d); | |
1685 | } | |
1686 | ||
461c1a7d | 1687 | static void gpiochip_irq_enable(struct irq_data *d) |
14250520 | 1688 | { |
a0b66a73 | 1689 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
db4064cc | 1690 | unsigned int hwirq = irqd_to_hwirq(d); |
e0d89728 | 1691 | |
db4064cc | 1692 | gpiochip_enable_irq(gc, hwirq); |
a8173820 | 1693 | gc->irq.irq_enable(d); |
461c1a7d HV |
1694 | } |
1695 | ||
1696 | static void gpiochip_irq_disable(struct irq_data *d) | |
1697 | { | |
a0b66a73 | 1698 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
db4064cc | 1699 | unsigned int hwirq = irqd_to_hwirq(d); |
461c1a7d | 1700 | |
a8173820 | 1701 | gc->irq.irq_disable(d); |
db4064cc | 1702 | gpiochip_disable_irq(gc, hwirq); |
461c1a7d HV |
1703 | } |
1704 | ||
a0b66a73 | 1705 | static void gpiochip_set_irq_hooks(struct gpio_chip *gc) |
ca620f2d | 1706 | { |
a0b66a73 | 1707 | struct irq_chip *irqchip = gc->irq.chip; |
ca620f2d | 1708 | |
6c846d02 MZ |
1709 | if (irqchip->flags & IRQCHIP_IMMUTABLE) |
1710 | return; | |
1711 | ||
1712 | chip_warn(gc, "not an immutable chip, please consider fixing it!\n"); | |
1713 | ||
ca620f2d HV |
1714 | if (!irqchip->irq_request_resources && |
1715 | !irqchip->irq_release_resources) { | |
1716 | irqchip->irq_request_resources = gpiochip_irq_reqres; | |
1717 | irqchip->irq_release_resources = gpiochip_irq_relres; | |
1718 | } | |
a0b66a73 | 1719 | if (WARN_ON(gc->irq.irq_enable)) |
461c1a7d | 1720 | return; |
171948ea | 1721 | /* Check if the irqchip already has this hook... */ |
9d552219 NS |
1722 | if (irqchip->irq_enable == gpiochip_irq_enable || |
1723 | irqchip->irq_mask == gpiochip_irq_mask) { | |
171948ea HV |
1724 | /* |
1725 | * ...and if so, give a gentle warning that this is bad | |
1726 | * practice. | |
1727 | */ | |
a0b66a73 | 1728 | chip_info(gc, |
171948ea HV |
1729 | "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n"); |
1730 | return; | |
1731 | } | |
a8173820 MS |
1732 | |
1733 | if (irqchip->irq_disable) { | |
1734 | gc->irq.irq_disable = irqchip->irq_disable; | |
1735 | irqchip->irq_disable = gpiochip_irq_disable; | |
1736 | } else { | |
1737 | gc->irq.irq_mask = irqchip->irq_mask; | |
1738 | irqchip->irq_mask = gpiochip_irq_mask; | |
1739 | } | |
1740 | ||
1741 | if (irqchip->irq_enable) { | |
1742 | gc->irq.irq_enable = irqchip->irq_enable; | |
1743 | irqchip->irq_enable = gpiochip_irq_enable; | |
1744 | } else { | |
1745 | gc->irq.irq_unmask = irqchip->irq_unmask; | |
1746 | irqchip->irq_unmask = gpiochip_irq_unmask; | |
1747 | } | |
14250520 LW |
1748 | } |
1749 | ||
081bfdb3 AS |
1750 | static int gpiochip_irqchip_add_allocated_domain(struct gpio_chip *gc, |
1751 | struct irq_domain *domain, | |
1752 | bool allocated_externally) | |
1753 | { | |
1754 | if (!domain) | |
1755 | return -EINVAL; | |
1756 | ||
eec349db AS |
1757 | if (gc->to_irq) |
1758 | chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__); | |
1759 | ||
081bfdb3 AS |
1760 | gc->to_irq = gpiochip_to_irq; |
1761 | gc->irq.domain = domain; | |
1762 | gc->irq.domain_is_allocated_externally = allocated_externally; | |
1763 | ||
1764 | /* | |
1765 | * Using barrier() here to prevent compiler from reordering | |
1766 | * gc->irq.initialized before adding irqdomain. | |
1767 | */ | |
1768 | barrier(); | |
1769 | ||
1770 | gc->irq.initialized = true; | |
1771 | ||
1772 | return 0; | |
1773 | } | |
1774 | ||
e0d89728 TR |
1775 | /** |
1776 | * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip | |
a0b66a73 | 1777 | * @gc: the GPIO chip to add the IRQ chip to |
39c3fd58 AL |
1778 | * @lock_key: lockdep class for IRQ lock |
1779 | * @request_key: lockdep class for IRQ request | |
e0d89728 | 1780 | */ |
a0b66a73 | 1781 | static int gpiochip_add_irqchip(struct gpio_chip *gc, |
39c3fd58 AL |
1782 | struct lock_class_key *lock_key, |
1783 | struct lock_class_key *request_key) | |
e0d89728 | 1784 | { |
5c63a9db | 1785 | struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev); |
a0b66a73 | 1786 | struct irq_chip *irqchip = gc->irq.chip; |
39f3ad73 | 1787 | struct irq_domain *domain; |
e0d89728 TR |
1788 | unsigned int type; |
1789 | unsigned int i; | |
eec349db | 1790 | int ret; |
e0d89728 TR |
1791 | |
1792 | if (!irqchip) | |
1793 | return 0; | |
1794 | ||
a0b66a73 LW |
1795 | if (gc->irq.parent_handler && gc->can_sleep) { |
1796 | chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n"); | |
e0d89728 TR |
1797 | return -EINVAL; |
1798 | } | |
1799 | ||
a0b66a73 | 1800 | type = gc->irq.default_type; |
e0d89728 TR |
1801 | |
1802 | /* | |
1803 | * Specifying a default trigger is a terrible idea if DT or ACPI is | |
1804 | * used to configure the interrupts, as you may end up with | |
1805 | * conflicting triggers. Tell the user, and reset to NONE. | |
1806 | */ | |
5c63a9db AS |
1807 | if (WARN(fwnode && type != IRQ_TYPE_NONE, |
1808 | "%pfw: Ignoring %u default trigger\n", fwnode, type)) | |
e0d89728 TR |
1809 | type = IRQ_TYPE_NONE; |
1810 | ||
a0b66a73 LW |
1811 | gc->irq.default_type = type; |
1812 | gc->irq.lock_key = lock_key; | |
1813 | gc->irq.request_key = request_key; | |
e0d89728 | 1814 | |
fdd61a01 | 1815 | /* If a parent irqdomain is provided, let's build a hierarchy */ |
a0b66a73 | 1816 | if (gpiochip_hierarchy_is_hierarchical(gc)) { |
39f3ad73 | 1817 | domain = gpiochip_hierarchy_create_domain(gc); |
fdd61a01 | 1818 | } else { |
39f3ad73 | 1819 | domain = gpiochip_simple_create_domain(gc); |
fdd61a01 | 1820 | } |
39f3ad73 AS |
1821 | if (IS_ERR(domain)) |
1822 | return PTR_ERR(domain); | |
e0d89728 | 1823 | |
a0b66a73 | 1824 | if (gc->irq.parent_handler) { |
a0b66a73 | 1825 | for (i = 0; i < gc->irq.num_parents; i++) { |
cfe6807d MZ |
1826 | void *data; |
1827 | ||
1828 | if (gc->irq.per_parent_data) | |
1829 | data = gc->irq.parent_handler_data_array[i]; | |
1830 | else | |
1831 | data = gc->irq.parent_handler_data ?: gc; | |
1832 | ||
e0d89728 TR |
1833 | /* |
1834 | * The parent IRQ chip is already using the chip_data | |
1835 | * for this IRQ chip, so our callbacks simply use the | |
1836 | * handler_data. | |
1837 | */ | |
a0b66a73 LW |
1838 | irq_set_chained_handler_and_data(gc->irq.parents[i], |
1839 | gc->irq.parent_handler, | |
e0d89728 TR |
1840 | data); |
1841 | } | |
e0d89728 TR |
1842 | } |
1843 | ||
a0b66a73 | 1844 | gpiochip_set_irq_hooks(gc); |
ca620f2d | 1845 | |
eec349db AS |
1846 | ret = gpiochip_irqchip_add_allocated_domain(gc, domain, false); |
1847 | if (ret) | |
1848 | return ret; | |
5467801f | 1849 | |
06fb4ecf ML |
1850 | acpi_gpiochip_request_interrupts(gc); |
1851 | ||
e0d89728 TR |
1852 | return 0; |
1853 | } | |
1854 | ||
14250520 LW |
1855 | /** |
1856 | * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip | |
a0b66a73 | 1857 | * @gc: the gpiochip to remove the irqchip from |
14250520 LW |
1858 | * |
1859 | * This is called only from gpiochip_remove() | |
1860 | */ | |
a0b66a73 | 1861 | static void gpiochip_irqchip_remove(struct gpio_chip *gc) |
14250520 | 1862 | { |
a0b66a73 | 1863 | struct irq_chip *irqchip = gc->irq.chip; |
39e5f096 | 1864 | unsigned int offset; |
c3626fde | 1865 | |
a0b66a73 | 1866 | acpi_gpiochip_free_interrupts(gc); |
afa82fab | 1867 | |
a0b66a73 LW |
1868 | if (irqchip && gc->irq.parent_handler) { |
1869 | struct gpio_irq_chip *irq = &gc->irq; | |
39e5f096 TR |
1870 | unsigned int i; |
1871 | ||
1872 | for (i = 0; i < irq->num_parents; i++) | |
1873 | irq_set_chained_handler_and_data(irq->parents[i], | |
1874 | NULL, NULL); | |
25e4fe92 DES |
1875 | } |
1876 | ||
c3626fde | 1877 | /* Remove all IRQ mappings and delete the domain */ |
ff7a1790 | 1878 | if (!gc->irq.domain_is_allocated_externally && gc->irq.domain) { |
39e5f096 TR |
1879 | unsigned int irq; |
1880 | ||
a0b66a73 LW |
1881 | for (offset = 0; offset < gc->ngpio; offset++) { |
1882 | if (!gpiochip_irqchip_irq_valid(gc, offset)) | |
79b804cb | 1883 | continue; |
f0fbe7bc | 1884 | |
a0b66a73 | 1885 | irq = irq_find_mapping(gc->irq.domain, offset); |
f0fbe7bc | 1886 | irq_dispose_mapping(irq); |
79b804cb | 1887 | } |
f0fbe7bc | 1888 | |
a0b66a73 | 1889 | irq_domain_remove(gc->irq.domain); |
c3626fde | 1890 | } |
14250520 | 1891 | |
6c846d02 | 1892 | if (irqchip && !(irqchip->flags & IRQCHIP_IMMUTABLE)) { |
461c1a7d HV |
1893 | if (irqchip->irq_request_resources == gpiochip_irq_reqres) { |
1894 | irqchip->irq_request_resources = NULL; | |
1895 | irqchip->irq_release_resources = NULL; | |
1896 | } | |
1897 | if (irqchip->irq_enable == gpiochip_irq_enable) { | |
a0b66a73 LW |
1898 | irqchip->irq_enable = gc->irq.irq_enable; |
1899 | irqchip->irq_disable = gc->irq.irq_disable; | |
461c1a7d | 1900 | } |
14250520 | 1901 | } |
a0b66a73 LW |
1902 | gc->irq.irq_enable = NULL; |
1903 | gc->irq.irq_disable = NULL; | |
1904 | gc->irq.chip = NULL; | |
79b804cb | 1905 | |
a0b66a73 | 1906 | gpiochip_irqchip_free_valid_mask(gc); |
14250520 LW |
1907 | } |
1908 | ||
6a45b0e2 MW |
1909 | /** |
1910 | * gpiochip_irqchip_add_domain() - adds an irqdomain to a gpiochip | |
1911 | * @gc: the gpiochip to add the irqchip to | |
1912 | * @domain: the irqdomain to add to the gpiochip | |
1913 | * | |
1914 | * This function adds an IRQ domain to the gpiochip. | |
1915 | */ | |
1916 | int gpiochip_irqchip_add_domain(struct gpio_chip *gc, | |
1917 | struct irq_domain *domain) | |
1918 | { | |
081bfdb3 | 1919 | return gpiochip_irqchip_add_allocated_domain(gc, domain, true); |
6a45b0e2 MW |
1920 | } |
1921 | EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain); | |
1922 | ||
14250520 LW |
1923 | #else /* CONFIG_GPIOLIB_IRQCHIP */ |
1924 | ||
a0b66a73 | 1925 | static inline int gpiochip_add_irqchip(struct gpio_chip *gc, |
39c3fd58 AL |
1926 | struct lock_class_key *lock_key, |
1927 | struct lock_class_key *request_key) | |
e0d89728 TR |
1928 | { |
1929 | return 0; | |
1930 | } | |
a0b66a73 | 1931 | static void gpiochip_irqchip_remove(struct gpio_chip *gc) {} |
9411e3aa | 1932 | |
a0b66a73 | 1933 | static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc) |
9411e3aa AS |
1934 | { |
1935 | return 0; | |
1936 | } | |
1937 | ||
a0b66a73 | 1938 | static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc) |
79b804cb MW |
1939 | { |
1940 | return 0; | |
1941 | } | |
a0b66a73 | 1942 | static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc) |
79b804cb | 1943 | { } |
14250520 LW |
1944 | |
1945 | #endif /* CONFIG_GPIOLIB_IRQCHIP */ | |
1946 | ||
c771c2f4 JG |
1947 | /** |
1948 | * gpiochip_generic_request() - request the gpio function for a pin | |
a0b66a73 | 1949 | * @gc: the gpiochip owning the GPIO |
c771c2f4 JG |
1950 | * @offset: the offset of the GPIO to request for GPIO function |
1951 | */ | |
13daf489 | 1952 | int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset) |
c771c2f4 | 1953 | { |
56e337f2 BG |
1954 | #ifdef CONFIG_PINCTRL |
1955 | if (list_empty(&gc->gpiodev->pin_ranges)) | |
1956 | return 0; | |
1957 | #endif | |
1958 | ||
a0b66a73 | 1959 | return pinctrl_gpio_request(gc->gpiodev->base + offset); |
c771c2f4 JG |
1960 | } |
1961 | EXPORT_SYMBOL_GPL(gpiochip_generic_request); | |
1962 | ||
1963 | /** | |
1964 | * gpiochip_generic_free() - free the gpio function from a pin | |
a0b66a73 | 1965 | * @gc: the gpiochip to request the gpio function for |
c771c2f4 JG |
1966 | * @offset: the offset of the GPIO to free from GPIO function |
1967 | */ | |
13daf489 | 1968 | void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset) |
c771c2f4 | 1969 | { |
56e337f2 BG |
1970 | #ifdef CONFIG_PINCTRL |
1971 | if (list_empty(&gc->gpiodev->pin_ranges)) | |
1972 | return; | |
1973 | #endif | |
1974 | ||
a0b66a73 | 1975 | pinctrl_gpio_free(gc->gpiodev->base + offset); |
c771c2f4 JG |
1976 | } |
1977 | EXPORT_SYMBOL_GPL(gpiochip_generic_free); | |
1978 | ||
2956b5d9 MW |
1979 | /** |
1980 | * gpiochip_generic_config() - apply configuration for a pin | |
a0b66a73 | 1981 | * @gc: the gpiochip owning the GPIO |
2956b5d9 MW |
1982 | * @offset: the offset of the GPIO to apply the configuration |
1983 | * @config: the configuration to be applied | |
1984 | */ | |
13daf489 | 1985 | int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset, |
2956b5d9 MW |
1986 | unsigned long config) |
1987 | { | |
a0b66a73 | 1988 | return pinctrl_gpio_set_config(gc->gpiodev->base + offset, config); |
2956b5d9 MW |
1989 | } |
1990 | EXPORT_SYMBOL_GPL(gpiochip_generic_config); | |
1991 | ||
f23f1516 | 1992 | #ifdef CONFIG_PINCTRL |
165adc9c | 1993 | |
586a87e6 CR |
1994 | /** |
1995 | * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping | |
a0b66a73 | 1996 | * @gc: the gpiochip to add the range for |
d32651f6 | 1997 | * @pctldev: the pin controller to map to |
586a87e6 CR |
1998 | * @gpio_offset: the start offset in the current gpio_chip number space |
1999 | * @pin_group: name of the pin group inside the pin controller | |
973c1714 CL |
2000 | * |
2001 | * Calling this function directly from a DeviceTree-supported | |
2002 | * pinctrl driver is DEPRECATED. Please see Section 2.1 of | |
2003 | * Documentation/devicetree/bindings/gpio/gpio.txt on how to | |
2004 | * bind pinctrl and gpio drivers via the "gpio-ranges" property. | |
586a87e6 | 2005 | */ |
a0b66a73 | 2006 | int gpiochip_add_pingroup_range(struct gpio_chip *gc, |
586a87e6 CR |
2007 | struct pinctrl_dev *pctldev, |
2008 | unsigned int gpio_offset, const char *pin_group) | |
2009 | { | |
2010 | struct gpio_pin_range *pin_range; | |
a0b66a73 | 2011 | struct gpio_device *gdev = gc->gpiodev; |
586a87e6 CR |
2012 | int ret; |
2013 | ||
2014 | pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL); | |
2015 | if (!pin_range) { | |
a0b66a73 | 2016 | chip_err(gc, "failed to allocate pin ranges\n"); |
586a87e6 CR |
2017 | return -ENOMEM; |
2018 | } | |
2019 | ||
2020 | /* Use local offset as range ID */ | |
2021 | pin_range->range.id = gpio_offset; | |
a0b66a73 LW |
2022 | pin_range->range.gc = gc; |
2023 | pin_range->range.name = gc->label; | |
fdeb8e15 | 2024 | pin_range->range.base = gdev->base + gpio_offset; |
586a87e6 CR |
2025 | pin_range->pctldev = pctldev; |
2026 | ||
2027 | ret = pinctrl_get_group_pins(pctldev, pin_group, | |
2028 | &pin_range->range.pins, | |
2029 | &pin_range->range.npins); | |
61c6375d MN |
2030 | if (ret < 0) { |
2031 | kfree(pin_range); | |
586a87e6 | 2032 | return ret; |
61c6375d | 2033 | } |
586a87e6 CR |
2034 | |
2035 | pinctrl_add_gpio_range(pctldev, &pin_range->range); | |
2036 | ||
a0b66a73 | 2037 | chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n", |
1a2a99c6 | 2038 | gpio_offset, gpio_offset + pin_range->range.npins - 1, |
586a87e6 CR |
2039 | pinctrl_dev_get_devname(pctldev), pin_group); |
2040 | ||
20ec3e39 | 2041 | list_add_tail(&pin_range->node, &gdev->pin_ranges); |
586a87e6 CR |
2042 | |
2043 | return 0; | |
2044 | } | |
2045 | EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range); | |
2046 | ||
3f0f8670 LW |
2047 | /** |
2048 | * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping | |
a0b66a73 | 2049 | * @gc: the gpiochip to add the range for |
950d55f5 | 2050 | * @pinctl_name: the dev_name() of the pin controller to map to |
316511c0 LW |
2051 | * @gpio_offset: the start offset in the current gpio_chip number space |
2052 | * @pin_offset: the start offset in the pin controller number space | |
3f0f8670 LW |
2053 | * @npins: the number of pins from the offset of each pin space (GPIO and |
2054 | * pin controller) to accumulate in this range | |
950d55f5 TR |
2055 | * |
2056 | * Returns: | |
2057 | * 0 on success, or a negative error-code on failure. | |
973c1714 CL |
2058 | * |
2059 | * Calling this function directly from a DeviceTree-supported | |
2060 | * pinctrl driver is DEPRECATED. Please see Section 2.1 of | |
2061 | * Documentation/devicetree/bindings/gpio/gpio.txt on how to | |
2062 | * bind pinctrl and gpio drivers via the "gpio-ranges" property. | |
3f0f8670 | 2063 | */ |
a0b66a73 | 2064 | int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name, |
316511c0 | 2065 | unsigned int gpio_offset, unsigned int pin_offset, |
3f0f8670 | 2066 | unsigned int npins) |
f23f1516 SH |
2067 | { |
2068 | struct gpio_pin_range *pin_range; | |
a0b66a73 | 2069 | struct gpio_device *gdev = gc->gpiodev; |
b4d4b1f0 | 2070 | int ret; |
f23f1516 | 2071 | |
3f0f8670 | 2072 | pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL); |
f23f1516 | 2073 | if (!pin_range) { |
a0b66a73 | 2074 | chip_err(gc, "failed to allocate pin ranges\n"); |
1e63d7b9 | 2075 | return -ENOMEM; |
f23f1516 SH |
2076 | } |
2077 | ||
3f0f8670 | 2078 | /* Use local offset as range ID */ |
316511c0 | 2079 | pin_range->range.id = gpio_offset; |
a0b66a73 LW |
2080 | pin_range->range.gc = gc; |
2081 | pin_range->range.name = gc->label; | |
fdeb8e15 | 2082 | pin_range->range.base = gdev->base + gpio_offset; |
316511c0 | 2083 | pin_range->range.pin_base = pin_offset; |
f23f1516 | 2084 | pin_range->range.npins = npins; |
192c369c | 2085 | pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name, |
f23f1516 | 2086 | &pin_range->range); |
8f23ca1a | 2087 | if (IS_ERR(pin_range->pctldev)) { |
b4d4b1f0 | 2088 | ret = PTR_ERR(pin_range->pctldev); |
a0b66a73 | 2089 | chip_err(gc, "could not create pin range\n"); |
3f0f8670 | 2090 | kfree(pin_range); |
b4d4b1f0 | 2091 | return ret; |
3f0f8670 | 2092 | } |
a0b66a73 | 2093 | chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n", |
1a2a99c6 | 2094 | gpio_offset, gpio_offset + npins - 1, |
316511c0 LW |
2095 | pinctl_name, |
2096 | pin_offset, pin_offset + npins - 1); | |
f23f1516 | 2097 | |
20ec3e39 | 2098 | list_add_tail(&pin_range->node, &gdev->pin_ranges); |
1e63d7b9 LW |
2099 | |
2100 | return 0; | |
f23f1516 | 2101 | } |
165adc9c | 2102 | EXPORT_SYMBOL_GPL(gpiochip_add_pin_range); |
f23f1516 | 2103 | |
3f0f8670 LW |
2104 | /** |
2105 | * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings | |
a0b66a73 | 2106 | * @gc: the chip to remove all the mappings for |
3f0f8670 | 2107 | */ |
a0b66a73 | 2108 | void gpiochip_remove_pin_ranges(struct gpio_chip *gc) |
f23f1516 SH |
2109 | { |
2110 | struct gpio_pin_range *pin_range, *tmp; | |
a0b66a73 | 2111 | struct gpio_device *gdev = gc->gpiodev; |
f23f1516 | 2112 | |
20ec3e39 | 2113 | list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) { |
f23f1516 SH |
2114 | list_del(&pin_range->node); |
2115 | pinctrl_remove_gpio_range(pin_range->pctldev, | |
2116 | &pin_range->range); | |
3f0f8670 | 2117 | kfree(pin_range); |
f23f1516 SH |
2118 | } |
2119 | } | |
165adc9c LW |
2120 | EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges); |
2121 | ||
2122 | #endif /* CONFIG_PINCTRL */ | |
f23f1516 | 2123 | |
d2876d08 DB |
2124 | /* These "optional" allocation calls help prevent drivers from stomping |
2125 | * on each other, and help provide better diagnostics in debugfs. | |
2126 | * They're called even less than the "set direction" calls. | |
2127 | */ | |
fac9d885 | 2128 | static int gpiod_request_commit(struct gpio_desc *desc, const char *label) |
d2876d08 | 2129 | { |
a0b66a73 | 2130 | struct gpio_chip *gc = desc->gdev->chip; |
d377f56f | 2131 | int ret; |
d2876d08 | 2132 | unsigned long flags; |
3789f5ac | 2133 | unsigned offset; |
d2876d08 | 2134 | |
18534df4 MS |
2135 | if (label) { |
2136 | label = kstrdup_const(label, GFP_KERNEL); | |
2137 | if (!label) | |
2138 | return -ENOMEM; | |
2139 | } | |
2140 | ||
bcabdef1 AC |
2141 | spin_lock_irqsave(&gpio_lock, flags); |
2142 | ||
d2876d08 | 2143 | /* NOTE: gpio_request() can be called in early boot, |
35e8bb51 | 2144 | * before IRQs are enabled, for non-sleeping (SOC) GPIOs. |
d2876d08 DB |
2145 | */ |
2146 | ||
2147 | if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) { | |
2148 | desc_set_label(desc, label ? : "?"); | |
438d8908 | 2149 | } else { |
d377f56f | 2150 | ret = -EBUSY; |
95d9f84f | 2151 | goto out_free_unlock; |
35e8bb51 DB |
2152 | } |
2153 | ||
a0b66a73 LW |
2154 | if (gc->request) { |
2155 | /* gc->request may sleep */ | |
35e8bb51 | 2156 | spin_unlock_irqrestore(&gpio_lock, flags); |
3789f5ac | 2157 | offset = gpio_chip_hwgpio(desc); |
a0b66a73 LW |
2158 | if (gpiochip_line_is_valid(gc, offset)) |
2159 | ret = gc->request(gc, offset); | |
3789f5ac | 2160 | else |
d377f56f | 2161 | ret = -EINVAL; |
35e8bb51 DB |
2162 | spin_lock_irqsave(&gpio_lock, flags); |
2163 | ||
8bbff39c | 2164 | if (ret) { |
35e8bb51 | 2165 | desc_set_label(desc, NULL); |
35e8bb51 | 2166 | clear_bit(FLAG_REQUESTED, &desc->flags); |
95d9f84f | 2167 | goto out_free_unlock; |
35e8bb51 | 2168 | } |
438d8908 | 2169 | } |
a0b66a73 LW |
2170 | if (gc->get_direction) { |
2171 | /* gc->get_direction may sleep */ | |
80b0a602 | 2172 | spin_unlock_irqrestore(&gpio_lock, flags); |
372e722e | 2173 | gpiod_get_direction(desc); |
80b0a602 MN |
2174 | spin_lock_irqsave(&gpio_lock, flags); |
2175 | } | |
77c2d792 | 2176 | spin_unlock_irqrestore(&gpio_lock, flags); |
95d9f84f AS |
2177 | return 0; |
2178 | ||
2179 | out_free_unlock: | |
2180 | spin_unlock_irqrestore(&gpio_lock, flags); | |
2181 | kfree_const(label); | |
d377f56f | 2182 | return ret; |
77c2d792 MW |
2183 | } |
2184 | ||
fdeb8e15 LW |
2185 | /* |
2186 | * This descriptor validation needs to be inserted verbatim into each | |
2187 | * function taking a descriptor, so we need to use a preprocessor | |
54d77198 LW |
2188 | * macro to avoid endless duplication. If the desc is NULL it is an |
2189 | * optional GPIO and calls should just bail out. | |
fdeb8e15 | 2190 | */ |
a746a232 RV |
2191 | static int validate_desc(const struct gpio_desc *desc, const char *func) |
2192 | { | |
2193 | if (!desc) | |
2194 | return 0; | |
2195 | if (IS_ERR(desc)) { | |
2196 | pr_warn("%s: invalid GPIO (errorpointer)\n", func); | |
2197 | return PTR_ERR(desc); | |
2198 | } | |
2199 | if (!desc->gdev) { | |
2200 | pr_warn("%s: invalid GPIO (no device)\n", func); | |
2201 | return -EINVAL; | |
2202 | } | |
2203 | if (!desc->gdev->chip) { | |
2204 | dev_warn(&desc->gdev->dev, | |
2205 | "%s: backing chip is gone\n", func); | |
2206 | return 0; | |
2207 | } | |
2208 | return 1; | |
2209 | } | |
2210 | ||
fdeb8e15 | 2211 | #define VALIDATE_DESC(desc) do { \ |
a746a232 RV |
2212 | int __valid = validate_desc(desc, __func__); \ |
2213 | if (__valid <= 0) \ | |
2214 | return __valid; \ | |
2215 | } while (0) | |
fdeb8e15 LW |
2216 | |
2217 | #define VALIDATE_DESC_VOID(desc) do { \ | |
a746a232 RV |
2218 | int __valid = validate_desc(desc, __func__); \ |
2219 | if (__valid <= 0) \ | |
fdeb8e15 | 2220 | return; \ |
a746a232 | 2221 | } while (0) |
fdeb8e15 | 2222 | |
0eb4c6c2 | 2223 | int gpiod_request(struct gpio_desc *desc, const char *label) |
77c2d792 | 2224 | { |
d377f56f | 2225 | int ret = -EPROBE_DEFER; |
77c2d792 | 2226 | |
fdeb8e15 | 2227 | VALIDATE_DESC(desc); |
77c2d792 | 2228 | |
dc0989e3 | 2229 | if (try_module_get(desc->gdev->owner)) { |
d377f56f | 2230 | ret = gpiod_request_commit(desc, label); |
8bbff39c | 2231 | if (ret) |
dc0989e3 | 2232 | module_put(desc->gdev->owner); |
33a68e86 | 2233 | else |
dc0989e3 | 2234 | gpio_device_get(desc->gdev); |
77c2d792 MW |
2235 | } |
2236 | ||
d377f56f LW |
2237 | if (ret) |
2238 | gpiod_dbg(desc, "%s: status %d\n", __func__, ret); | |
77c2d792 | 2239 | |
d377f56f | 2240 | return ret; |
d2876d08 | 2241 | } |
372e722e | 2242 | |
fac9d885 | 2243 | static bool gpiod_free_commit(struct gpio_desc *desc) |
d2876d08 | 2244 | { |
77c2d792 | 2245 | bool ret = false; |
d2876d08 | 2246 | unsigned long flags; |
a0b66a73 | 2247 | struct gpio_chip *gc; |
d2876d08 | 2248 | |
3d599d1c UKK |
2249 | might_sleep(); |
2250 | ||
d2876d08 DB |
2251 | spin_lock_irqsave(&gpio_lock, flags); |
2252 | ||
a0b66a73 LW |
2253 | gc = desc->gdev->chip; |
2254 | if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) { | |
2255 | if (gc->free) { | |
35e8bb51 | 2256 | spin_unlock_irqrestore(&gpio_lock, flags); |
a0b66a73 LW |
2257 | might_sleep_if(gc->can_sleep); |
2258 | gc->free(gc, gpio_chip_hwgpio(desc)); | |
35e8bb51 DB |
2259 | spin_lock_irqsave(&gpio_lock, flags); |
2260 | } | |
18534df4 | 2261 | kfree_const(desc->label); |
d2876d08 | 2262 | desc_set_label(desc, NULL); |
07697461 | 2263 | clear_bit(FLAG_ACTIVE_LOW, &desc->flags); |
35e8bb51 | 2264 | clear_bit(FLAG_REQUESTED, &desc->flags); |
aca5ce14 | 2265 | clear_bit(FLAG_OPEN_DRAIN, &desc->flags); |
25553ff0 | 2266 | clear_bit(FLAG_OPEN_SOURCE, &desc->flags); |
9225d516 DF |
2267 | clear_bit(FLAG_PULL_UP, &desc->flags); |
2268 | clear_bit(FLAG_PULL_DOWN, &desc->flags); | |
2148ad77 | 2269 | clear_bit(FLAG_BIAS_DISABLE, &desc->flags); |
73e03419 KG |
2270 | clear_bit(FLAG_EDGE_RISING, &desc->flags); |
2271 | clear_bit(FLAG_EDGE_FALLING, &desc->flags); | |
f625d460 | 2272 | clear_bit(FLAG_IS_HOGGED, &desc->flags); |
63636d95 GU |
2273 | #ifdef CONFIG_OF_DYNAMIC |
2274 | desc->hog = NULL; | |
65cff704 KG |
2275 | #endif |
2276 | #ifdef CONFIG_GPIO_CDEV | |
2277 | WRITE_ONCE(desc->debounce_period_us, 0); | |
63636d95 | 2278 | #endif |
77c2d792 MW |
2279 | ret = true; |
2280 | } | |
d2876d08 DB |
2281 | |
2282 | spin_unlock_irqrestore(&gpio_lock, flags); | |
9ce4ed5b | 2283 | gpiod_line_state_notify(desc, GPIOLINE_CHANGED_RELEASED); |
51c1064e | 2284 | |
77c2d792 MW |
2285 | return ret; |
2286 | } | |
2287 | ||
0eb4c6c2 | 2288 | void gpiod_free(struct gpio_desc *desc) |
77c2d792 | 2289 | { |
3386fb86 BG |
2290 | /* |
2291 | * We must not use VALIDATE_DESC_VOID() as the underlying gdev->chip | |
2292 | * may already be NULL but we still want to put the references. | |
2293 | */ | |
2294 | if (!desc) | |
2295 | return; | |
2296 | ||
2297 | if (!gpiod_free_commit(desc)) | |
77c2d792 | 2298 | WARN_ON(extra_checks); |
3386fb86 BG |
2299 | |
2300 | module_put(desc->gdev->owner); | |
2301 | gpio_device_put(desc->gdev); | |
d2876d08 | 2302 | } |
372e722e | 2303 | |
d2876d08 DB |
2304 | /** |
2305 | * gpiochip_is_requested - return string iff signal was requested | |
a0b66a73 | 2306 | * @gc: controller managing the signal |
d2876d08 DB |
2307 | * @offset: of signal within controller's 0..(ngpio - 1) range |
2308 | * | |
2309 | * Returns NULL if the GPIO is not currently requested, else a string. | |
9c8318ff AC |
2310 | * The string returned is the label passed to gpio_request(); if none has been |
2311 | * passed it is a meaningless, non-NULL constant. | |
d2876d08 DB |
2312 | * |
2313 | * This function is for use by GPIO controller drivers. The label can | |
2314 | * help with diagnostics, and knowing that the signal is used as a GPIO | |
2315 | * can help avoid accidentally multiplexing it to another controller. | |
2316 | */ | |
13daf489 | 2317 | const char *gpiochip_is_requested(struct gpio_chip *gc, unsigned int offset) |
d2876d08 | 2318 | { |
6c0b4e6c | 2319 | struct gpio_desc *desc; |
6c0b4e6c | 2320 | |
a0b66a73 | 2321 | desc = gpiochip_get_desc(gc, offset); |
1739a2d8 BG |
2322 | if (IS_ERR(desc)) |
2323 | return NULL; | |
6c0b4e6c | 2324 | |
372e722e | 2325 | if (test_bit(FLAG_REQUESTED, &desc->flags) == 0) |
d2876d08 | 2326 | return NULL; |
372e722e | 2327 | return desc->label; |
d2876d08 DB |
2328 | } |
2329 | EXPORT_SYMBOL_GPL(gpiochip_is_requested); | |
2330 | ||
77c2d792 MW |
2331 | /** |
2332 | * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor | |
a0b66a73 | 2333 | * @gc: GPIO chip |
950d55f5 | 2334 | * @hwnum: hardware number of the GPIO for which to request the descriptor |
77c2d792 | 2335 | * @label: label for the GPIO |
5923ea6c LW |
2336 | * @lflags: lookup flags for this GPIO or 0 if default, this can be used to |
2337 | * specify things like line inversion semantics with the machine flags | |
2338 | * such as GPIO_OUT_LOW | |
2339 | * @dflags: descriptor request flags for this GPIO or 0 if default, this | |
2340 | * can be used to specify consumer semantics such as open drain | |
77c2d792 MW |
2341 | * |
2342 | * Function allows GPIO chip drivers to request and use their own GPIO | |
2343 | * descriptors via gpiolib API. Difference to gpiod_request() is that this | |
2344 | * function will not increase reference count of the GPIO chip module. This | |
2345 | * allows the GPIO chip module to be unloaded as needed (we assume that the | |
2346 | * GPIO chip driver handles freeing the GPIOs it has requested). | |
950d55f5 TR |
2347 | * |
2348 | * Returns: | |
2349 | * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error | |
2350 | * code on failure. | |
77c2d792 | 2351 | */ |
a0b66a73 | 2352 | struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc, |
06863620 | 2353 | unsigned int hwnum, |
21abf103 | 2354 | const char *label, |
5923ea6c LW |
2355 | enum gpio_lookup_flags lflags, |
2356 | enum gpiod_flags dflags) | |
77c2d792 | 2357 | { |
a0b66a73 | 2358 | struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum); |
d377f56f | 2359 | int ret; |
77c2d792 | 2360 | |
abdc08a3 | 2361 | if (IS_ERR(desc)) { |
a0b66a73 | 2362 | chip_err(gc, "failed to get GPIO descriptor\n"); |
abdc08a3 AC |
2363 | return desc; |
2364 | } | |
2365 | ||
d377f56f LW |
2366 | ret = gpiod_request_commit(desc, label); |
2367 | if (ret < 0) | |
2368 | return ERR_PTR(ret); | |
77c2d792 | 2369 | |
d377f56f LW |
2370 | ret = gpiod_configure_flags(desc, label, lflags, dflags); |
2371 | if (ret) { | |
a0b66a73 | 2372 | chip_err(gc, "setup of own GPIO %s failed\n", label); |
21abf103 | 2373 | gpiod_free_commit(desc); |
d377f56f | 2374 | return ERR_PTR(ret); |
21abf103 LW |
2375 | } |
2376 | ||
abdc08a3 | 2377 | return desc; |
77c2d792 | 2378 | } |
f7d4ad98 | 2379 | EXPORT_SYMBOL_GPL(gpiochip_request_own_desc); |
77c2d792 MW |
2380 | |
2381 | /** | |
2382 | * gpiochip_free_own_desc - Free GPIO requested by the chip driver | |
2383 | * @desc: GPIO descriptor to free | |
2384 | * | |
2385 | * Function frees the given GPIO requested previously with | |
2386 | * gpiochip_request_own_desc(). | |
2387 | */ | |
2388 | void gpiochip_free_own_desc(struct gpio_desc *desc) | |
2389 | { | |
2390 | if (desc) | |
fac9d885 | 2391 | gpiod_free_commit(desc); |
77c2d792 | 2392 | } |
f7d4ad98 | 2393 | EXPORT_SYMBOL_GPL(gpiochip_free_own_desc); |
d2876d08 | 2394 | |
fdeb8e15 LW |
2395 | /* |
2396 | * Drivers MUST set GPIO direction before making get/set calls. In | |
d2876d08 DB |
2397 | * some cases this is done in early boot, before IRQs are enabled. |
2398 | * | |
2399 | * As a rule these aren't called more than once (except for drivers | |
2400 | * using the open-drain emulation idiom) so these are natural places | |
2401 | * to accumulate extra debugging checks. Note that we can't (yet) | |
2402 | * rely on gpio_request() having been called beforehand. | |
2403 | */ | |
2404 | ||
d99f8876 | 2405 | static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset, |
62adc6f3 | 2406 | unsigned long config) |
71479789 | 2407 | { |
d90f3685 BG |
2408 | if (!gc->set_config) |
2409 | return -ENOTSUPP; | |
542f3615 | 2410 | |
62adc6f3 | 2411 | return gc->set_config(gc, offset, config); |
71479789 TP |
2412 | } |
2413 | ||
0c4d8666 AS |
2414 | static int gpio_set_config_with_argument(struct gpio_desc *desc, |
2415 | enum pin_config_param mode, | |
2416 | u32 argument) | |
d99f8876 | 2417 | { |
a0b66a73 | 2418 | struct gpio_chip *gc = desc->gdev->chip; |
91b4ea5f | 2419 | unsigned long config; |
0c4d8666 AS |
2420 | |
2421 | config = pinconf_to_config_packed(mode, argument); | |
2422 | return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config); | |
2423 | } | |
2424 | ||
baca3b15 AS |
2425 | static int gpio_set_config_with_argument_optional(struct gpio_desc *desc, |
2426 | enum pin_config_param mode, | |
2427 | u32 argument) | |
2428 | { | |
2429 | struct device *dev = &desc->gdev->dev; | |
2430 | int gpio = gpio_chip_hwgpio(desc); | |
2431 | int ret; | |
2432 | ||
2433 | ret = gpio_set_config_with_argument(desc, mode, argument); | |
2434 | if (ret != -ENOTSUPP) | |
2435 | return ret; | |
d99f8876 BG |
2436 | |
2437 | switch (mode) { | |
baca3b15 AS |
2438 | case PIN_CONFIG_PERSIST_STATE: |
2439 | dev_dbg(dev, "Persistence not supported for GPIO %d\n", gpio); | |
d99f8876 | 2440 | break; |
d99f8876 | 2441 | default: |
baca3b15 | 2442 | break; |
d99f8876 BG |
2443 | } |
2444 | ||
baca3b15 AS |
2445 | return 0; |
2446 | } | |
2447 | ||
0c4d8666 AS |
2448 | static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode) |
2449 | { | |
6aa32ad7 | 2450 | return gpio_set_config_with_argument(desc, mode, 0); |
d99f8876 BG |
2451 | } |
2452 | ||
5f4bf171 | 2453 | static int gpio_set_bias(struct gpio_desc *desc) |
2148ad77 | 2454 | { |
9ef6293c | 2455 | enum pin_config_param bias; |
6aa32ad7 | 2456 | unsigned int arg; |
2148ad77 KG |
2457 | |
2458 | if (test_bit(FLAG_BIAS_DISABLE, &desc->flags)) | |
2459 | bias = PIN_CONFIG_BIAS_DISABLE; | |
2460 | else if (test_bit(FLAG_PULL_UP, &desc->flags)) | |
2461 | bias = PIN_CONFIG_BIAS_PULL_UP; | |
2462 | else if (test_bit(FLAG_PULL_DOWN, &desc->flags)) | |
2463 | bias = PIN_CONFIG_BIAS_PULL_DOWN; | |
9ef6293c AS |
2464 | else |
2465 | return 0; | |
2148ad77 | 2466 | |
6aa32ad7 AS |
2467 | switch (bias) { |
2468 | case PIN_CONFIG_BIAS_PULL_DOWN: | |
2469 | case PIN_CONFIG_BIAS_PULL_UP: | |
2470 | arg = 1; | |
2471 | break; | |
2472 | ||
2473 | default: | |
2474 | arg = 0; | |
2475 | break; | |
2148ad77 | 2476 | } |
6aa32ad7 | 2477 | |
baca3b15 | 2478 | return gpio_set_config_with_argument_optional(desc, bias, arg); |
2148ad77 KG |
2479 | } |
2480 | ||
660c619b AS |
2481 | /** |
2482 | * gpio_set_debounce_timeout() - Set debounce timeout | |
2483 | * @desc: GPIO descriptor to set the debounce timeout | |
2484 | * @debounce: Debounce timeout in microseconds | |
2485 | * | |
2486 | * The function calls the certain GPIO driver to set debounce timeout | |
2487 | * in the hardware. | |
2488 | * | |
2489 | * Returns 0 on success, or negative error code otherwise. | |
2490 | */ | |
f725edd8 AS |
2491 | int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce) |
2492 | { | |
2493 | return gpio_set_config_with_argument_optional(desc, | |
2494 | PIN_CONFIG_INPUT_DEBOUNCE, | |
2495 | debounce); | |
2148ad77 KG |
2496 | } |
2497 | ||
79a9becd AC |
2498 | /** |
2499 | * gpiod_direction_input - set the GPIO direction to input | |
2500 | * @desc: GPIO to set to input | |
2501 | * | |
2502 | * Set the direction of the passed GPIO to input, such as gpiod_get_value() can | |
2503 | * be called safely on it. | |
2504 | * | |
2505 | * Return 0 in case of success, else an error code. | |
2506 | */ | |
2507 | int gpiod_direction_input(struct gpio_desc *desc) | |
d2876d08 | 2508 | { |
a0b66a73 | 2509 | struct gpio_chip *gc; |
d377f56f | 2510 | int ret = 0; |
d2876d08 | 2511 | |
fdeb8e15 | 2512 | VALIDATE_DESC(desc); |
a0b66a73 | 2513 | gc = desc->gdev->chip; |
bcabdef1 | 2514 | |
e48d194d LW |
2515 | /* |
2516 | * It is legal to have no .get() and .direction_input() specified if | |
2517 | * the chip is output-only, but you can't specify .direction_input() | |
2518 | * and not support the .get() operation, that doesn't make sense. | |
2519 | */ | |
a0b66a73 | 2520 | if (!gc->get && gc->direction_input) { |
6424de5a | 2521 | gpiod_warn(desc, |
e48d194d LW |
2522 | "%s: missing get() but have direction_input()\n", |
2523 | __func__); | |
be1a4b13 LW |
2524 | return -EIO; |
2525 | } | |
2526 | ||
e48d194d LW |
2527 | /* |
2528 | * If we have a .direction_input() callback, things are simple, | |
2529 | * just call it. Else we are some input-only chip so try to check the | |
2530 | * direction (if .get_direction() is supported) else we silently | |
2531 | * assume we are in input mode after this. | |
2532 | */ | |
a0b66a73 LW |
2533 | if (gc->direction_input) { |
2534 | ret = gc->direction_input(gc, gpio_chip_hwgpio(desc)); | |
2535 | } else if (gc->get_direction && | |
2536 | (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) { | |
ae9847f4 | 2537 | gpiod_warn(desc, |
e48d194d LW |
2538 | "%s: missing direction_input() operation and line is output\n", |
2539 | __func__); | |
ae9847f4 RRD |
2540 | return -EIO; |
2541 | } | |
2148ad77 | 2542 | if (ret == 0) { |
d2876d08 | 2543 | clear_bit(FLAG_IS_OUT, &desc->flags); |
5f4bf171 | 2544 | ret = gpio_set_bias(desc); |
2148ad77 | 2545 | } |
d449991c | 2546 | |
d377f56f | 2547 | trace_gpio_direction(desc_to_gpio(desc), 1, ret); |
d82da797 | 2548 | |
d377f56f | 2549 | return ret; |
d2876d08 | 2550 | } |
79a9becd | 2551 | EXPORT_SYMBOL_GPL(gpiod_direction_input); |
372e722e | 2552 | |
fac9d885 | 2553 | static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value) |
d2876d08 | 2554 | { |
c663e5f5 | 2555 | struct gpio_chip *gc = desc->gdev->chip; |
ad17731d | 2556 | int val = !!value; |
ae9847f4 | 2557 | int ret = 0; |
d2876d08 | 2558 | |
e48d194d LW |
2559 | /* |
2560 | * It's OK not to specify .direction_output() if the gpiochip is | |
2561 | * output-only, but if there is then not even a .set() operation it | |
2562 | * is pretty tricky to drive the output line. | |
2563 | */ | |
ae9847f4 | 2564 | if (!gc->set && !gc->direction_output) { |
6424de5a | 2565 | gpiod_warn(desc, |
e48d194d LW |
2566 | "%s: missing set() and direction_output() operations\n", |
2567 | __func__); | |
be1a4b13 LW |
2568 | return -EIO; |
2569 | } | |
2570 | ||
ae9847f4 RRD |
2571 | if (gc->direction_output) { |
2572 | ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val); | |
2573 | } else { | |
e48d194d | 2574 | /* Check that we are in output mode if we can */ |
ae9847f4 RRD |
2575 | if (gc->get_direction && |
2576 | gc->get_direction(gc, gpio_chip_hwgpio(desc))) { | |
2577 | gpiod_warn(desc, | |
2578 | "%s: missing direction_output() operation\n", | |
2579 | __func__); | |
2580 | return -EIO; | |
2581 | } | |
e48d194d LW |
2582 | /* |
2583 | * If we can't actively set the direction, we are some | |
2584 | * output-only chip, so just drive the output as desired. | |
2585 | */ | |
ae9847f4 RRD |
2586 | gc->set(gc, gpio_chip_hwgpio(desc), val); |
2587 | } | |
2588 | ||
c663e5f5 | 2589 | if (!ret) |
d2876d08 | 2590 | set_bit(FLAG_IS_OUT, &desc->flags); |
ad17731d | 2591 | trace_gpio_value(desc_to_gpio(desc), 0, val); |
c663e5f5 LW |
2592 | trace_gpio_direction(desc_to_gpio(desc), 0, ret); |
2593 | return ret; | |
d2876d08 | 2594 | } |
ef70bbe1 PZ |
2595 | |
2596 | /** | |
2597 | * gpiod_direction_output_raw - set the GPIO direction to output | |
2598 | * @desc: GPIO to set to output | |
2599 | * @value: initial output value of the GPIO | |
2600 | * | |
2601 | * Set the direction of the passed GPIO to output, such as gpiod_set_value() can | |
2602 | * be called safely on it. The initial value of the output must be specified | |
2603 | * as raw value on the physical line without regard for the ACTIVE_LOW status. | |
2604 | * | |
2605 | * Return 0 in case of success, else an error code. | |
2606 | */ | |
2607 | int gpiod_direction_output_raw(struct gpio_desc *desc, int value) | |
2608 | { | |
fdeb8e15 | 2609 | VALIDATE_DESC(desc); |
fac9d885 | 2610 | return gpiod_direction_output_raw_commit(desc, value); |
ef70bbe1 PZ |
2611 | } |
2612 | EXPORT_SYMBOL_GPL(gpiod_direction_output_raw); | |
2613 | ||
2614 | /** | |
90df4fe0 | 2615 | * gpiod_direction_output - set the GPIO direction to output |
ef70bbe1 PZ |
2616 | * @desc: GPIO to set to output |
2617 | * @value: initial output value of the GPIO | |
2618 | * | |
2619 | * Set the direction of the passed GPIO to output, such as gpiod_set_value() can | |
2620 | * be called safely on it. The initial value of the output must be specified | |
2621 | * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into | |
2622 | * account. | |
2623 | * | |
2624 | * Return 0 in case of success, else an error code. | |
2625 | */ | |
2626 | int gpiod_direction_output(struct gpio_desc *desc, int value) | |
2627 | { | |
02e47980 LW |
2628 | int ret; |
2629 | ||
fdeb8e15 | 2630 | VALIDATE_DESC(desc); |
ef70bbe1 PZ |
2631 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
2632 | value = !value; | |
ad17731d LW |
2633 | else |
2634 | value = !!value; | |
02e47980 | 2635 | |
4e9439dd HV |
2636 | /* GPIOs used for enabled IRQs shall not be set as output */ |
2637 | if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) && | |
2638 | test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) { | |
02e47980 LW |
2639 | gpiod_err(desc, |
2640 | "%s: tried to set a GPIO tied to an IRQ as output\n", | |
2641 | __func__); | |
2642 | return -EIO; | |
2643 | } | |
2644 | ||
2645 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) { | |
2646 | /* First see if we can enable open drain in hardware */ | |
83522358 | 2647 | ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN); |
02e47980 LW |
2648 | if (!ret) |
2649 | goto set_output_value; | |
2650 | /* Emulate open drain by not actively driving the line high */ | |
e735244e BG |
2651 | if (value) { |
2652 | ret = gpiod_direction_input(desc); | |
2653 | goto set_output_flag; | |
2654 | } | |
1cef8b50 | 2655 | } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) { |
83522358 | 2656 | ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE); |
02e47980 LW |
2657 | if (!ret) |
2658 | goto set_output_value; | |
2659 | /* Emulate open source by not actively driving the line low */ | |
e735244e BG |
2660 | if (!value) { |
2661 | ret = gpiod_direction_input(desc); | |
2662 | goto set_output_flag; | |
2663 | } | |
02e47980 | 2664 | } else { |
83522358 | 2665 | gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL); |
02e47980 LW |
2666 | } |
2667 | ||
2668 | set_output_value: | |
5f4bf171 | 2669 | ret = gpio_set_bias(desc); |
2821ae5f KG |
2670 | if (ret) |
2671 | return ret; | |
fac9d885 | 2672 | return gpiod_direction_output_raw_commit(desc, value); |
e735244e BG |
2673 | |
2674 | set_output_flag: | |
2675 | /* | |
2676 | * When emulating open-source or open-drain functionalities by not | |
2677 | * actively driving the line (setting mode to input) we still need to | |
2678 | * set the IS_OUT flag or otherwise we won't be able to set the line | |
2679 | * value anymore. | |
2680 | */ | |
2681 | if (ret == 0) | |
2682 | set_bit(FLAG_IS_OUT, &desc->flags); | |
2683 | return ret; | |
ef70bbe1 | 2684 | } |
79a9becd | 2685 | EXPORT_SYMBOL_GPL(gpiod_direction_output); |
d2876d08 | 2686 | |
42112dd7 DP |
2687 | /** |
2688 | * gpiod_enable_hw_timestamp_ns - Enable hardware timestamp in nanoseconds. | |
2689 | * | |
2690 | * @desc: GPIO to enable. | |
2691 | * @flags: Flags related to GPIO edge. | |
2692 | * | |
2693 | * Return 0 in case of success, else negative error code. | |
2694 | */ | |
2695 | int gpiod_enable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags) | |
2696 | { | |
2697 | int ret = 0; | |
2698 | struct gpio_chip *gc; | |
2699 | ||
2700 | VALIDATE_DESC(desc); | |
2701 | ||
2702 | gc = desc->gdev->chip; | |
2703 | if (!gc->en_hw_timestamp) { | |
2704 | gpiod_warn(desc, "%s: hw ts not supported\n", __func__); | |
2705 | return -ENOTSUPP; | |
2706 | } | |
2707 | ||
2708 | ret = gc->en_hw_timestamp(gc, gpio_chip_hwgpio(desc), flags); | |
2709 | if (ret) | |
2710 | gpiod_warn(desc, "%s: hw ts request failed\n", __func__); | |
2711 | ||
2712 | return ret; | |
2713 | } | |
2714 | EXPORT_SYMBOL_GPL(gpiod_enable_hw_timestamp_ns); | |
2715 | ||
2716 | /** | |
2717 | * gpiod_disable_hw_timestamp_ns - Disable hardware timestamp. | |
2718 | * | |
2719 | * @desc: GPIO to disable. | |
2720 | * @flags: Flags related to GPIO edge, same value as used during enable call. | |
2721 | * | |
2722 | * Return 0 in case of success, else negative error code. | |
2723 | */ | |
2724 | int gpiod_disable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags) | |
2725 | { | |
2726 | int ret = 0; | |
2727 | struct gpio_chip *gc; | |
2728 | ||
2729 | VALIDATE_DESC(desc); | |
2730 | ||
2731 | gc = desc->gdev->chip; | |
2732 | if (!gc->dis_hw_timestamp) { | |
2733 | gpiod_warn(desc, "%s: hw ts not supported\n", __func__); | |
2734 | return -ENOTSUPP; | |
2735 | } | |
2736 | ||
2737 | ret = gc->dis_hw_timestamp(gc, gpio_chip_hwgpio(desc), flags); | |
2738 | if (ret) | |
2739 | gpiod_warn(desc, "%s: hw ts release failed\n", __func__); | |
2740 | ||
2741 | return ret; | |
2742 | } | |
2743 | EXPORT_SYMBOL_GPL(gpiod_disable_hw_timestamp_ns); | |
2744 | ||
8ced32ff GU |
2745 | /** |
2746 | * gpiod_set_config - sets @config for a GPIO | |
2747 | * @desc: descriptor of the GPIO for which to set the configuration | |
2748 | * @config: Same packed config format as generic pinconf | |
2749 | * | |
2750 | * Returns: | |
2751 | * 0 on success, %-ENOTSUPP if the controller doesn't support setting the | |
2752 | * configuration. | |
2753 | */ | |
2754 | int gpiod_set_config(struct gpio_desc *desc, unsigned long config) | |
2755 | { | |
a0b66a73 | 2756 | struct gpio_chip *gc; |
8ced32ff GU |
2757 | |
2758 | VALIDATE_DESC(desc); | |
a0b66a73 | 2759 | gc = desc->gdev->chip; |
8ced32ff | 2760 | |
a0b66a73 | 2761 | return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config); |
8ced32ff GU |
2762 | } |
2763 | EXPORT_SYMBOL_GPL(gpiod_set_config); | |
2764 | ||
c4b5be98 | 2765 | /** |
950d55f5 TR |
2766 | * gpiod_set_debounce - sets @debounce time for a GPIO |
2767 | * @desc: descriptor of the GPIO for which to set debounce time | |
2768 | * @debounce: debounce time in microseconds | |
65d87656 | 2769 | * |
950d55f5 TR |
2770 | * Returns: |
2771 | * 0 on success, %-ENOTSUPP if the controller doesn't support setting the | |
2772 | * debounce time. | |
c4b5be98 | 2773 | */ |
13daf489 | 2774 | int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce) |
c4b5be98 | 2775 | { |
8ced32ff | 2776 | unsigned long config; |
be1a4b13 | 2777 | |
2956b5d9 | 2778 | config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce); |
8ced32ff | 2779 | return gpiod_set_config(desc, config); |
c4b5be98 | 2780 | } |
79a9becd | 2781 | EXPORT_SYMBOL_GPL(gpiod_set_debounce); |
372e722e | 2782 | |
e10f72bf AJ |
2783 | /** |
2784 | * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset | |
2785 | * @desc: descriptor of the GPIO for which to configure persistence | |
2786 | * @transitory: True to lose state on suspend or reset, false for persistence | |
2787 | * | |
2788 | * Returns: | |
2789 | * 0 on success, otherwise a negative error code. | |
2790 | */ | |
2791 | int gpiod_set_transitory(struct gpio_desc *desc, bool transitory) | |
2792 | { | |
156dd392 | 2793 | VALIDATE_DESC(desc); |
e10f72bf AJ |
2794 | /* |
2795 | * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for | |
2796 | * persistence state. | |
2797 | */ | |
4fc5bfeb | 2798 | assign_bit(FLAG_TRANSITORY, &desc->flags, transitory); |
e10f72bf AJ |
2799 | |
2800 | /* If the driver supports it, set the persistence state now */ | |
baca3b15 AS |
2801 | return gpio_set_config_with_argument_optional(desc, |
2802 | PIN_CONFIG_PERSIST_STATE, | |
2803 | !transitory); | |
e10f72bf | 2804 | } |
e10f72bf | 2805 | |
79a9becd AC |
2806 | /** |
2807 | * gpiod_is_active_low - test whether a GPIO is active-low or not | |
2808 | * @desc: the gpio descriptor to test | |
2809 | * | |
2810 | * Returns 1 if the GPIO is active-low, 0 otherwise. | |
2811 | */ | |
2812 | int gpiod_is_active_low(const struct gpio_desc *desc) | |
372e722e | 2813 | { |
fdeb8e15 | 2814 | VALIDATE_DESC(desc); |
79a9becd | 2815 | return test_bit(FLAG_ACTIVE_LOW, &desc->flags); |
372e722e | 2816 | } |
79a9becd | 2817 | EXPORT_SYMBOL_GPL(gpiod_is_active_low); |
d2876d08 | 2818 | |
d3a5bcb4 MM |
2819 | /** |
2820 | * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not | |
2821 | * @desc: the gpio descriptor to change | |
2822 | */ | |
2823 | void gpiod_toggle_active_low(struct gpio_desc *desc) | |
2824 | { | |
2825 | VALIDATE_DESC_VOID(desc); | |
2826 | change_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
2827 | } | |
2828 | EXPORT_SYMBOL_GPL(gpiod_toggle_active_low); | |
2829 | ||
234c5209 AS |
2830 | static int gpio_chip_get_value(struct gpio_chip *gc, const struct gpio_desc *desc) |
2831 | { | |
2832 | return gc->get ? gc->get(gc, gpio_chip_hwgpio(desc)) : -EIO; | |
2833 | } | |
2834 | ||
d2876d08 DB |
2835 | /* I/O calls are only valid after configuration completed; the relevant |
2836 | * "is this a valid GPIO" error checks should already have been done. | |
2837 | * | |
2838 | * "Get" operations are often inlinable as reading a pin value register, | |
2839 | * and masking the relevant bit in that register. | |
2840 | * | |
2841 | * When "set" operations are inlinable, they involve writing that mask to | |
2842 | * one register to set a low value, or a different register to set it high. | |
2843 | * Otherwise locking is needed, so there may be little value to inlining. | |
2844 | * | |
2845 | *------------------------------------------------------------------------ | |
2846 | * | |
2847 | * IMPORTANT!!! The hot paths -- get/set value -- assume that callers | |
2848 | * have requested the GPIO. That can include implicit requesting by | |
2849 | * a direction setting call. Marking a gpio as requested locks its chip | |
2850 | * in memory, guaranteeing that these table lookups need no more locking | |
2851 | * and that gpiochip_remove() will fail. | |
2852 | * | |
2853 | * REVISIT when debugging, consider adding some instrumentation to ensure | |
2854 | * that the GPIO was actually requested. | |
2855 | */ | |
2856 | ||
fac9d885 | 2857 | static int gpiod_get_raw_value_commit(const struct gpio_desc *desc) |
d2876d08 | 2858 | { |
a0b66a73 | 2859 | struct gpio_chip *gc; |
e20538b8 | 2860 | int value; |
d2876d08 | 2861 | |
a0b66a73 | 2862 | gc = desc->gdev->chip; |
234c5209 | 2863 | value = gpio_chip_get_value(gc, desc); |
723a6303 | 2864 | value = value < 0 ? value : !!value; |
372e722e | 2865 | trace_gpio_value(desc_to_gpio(desc), 1, value); |
3f397c21 | 2866 | return value; |
d2876d08 | 2867 | } |
372e722e | 2868 | |
a0b66a73 | 2869 | static int gpio_chip_get_multiple(struct gpio_chip *gc, |
eec1d566 LW |
2870 | unsigned long *mask, unsigned long *bits) |
2871 | { | |
1cef8b50 | 2872 | if (gc->get_multiple) |
a0b66a73 | 2873 | return gc->get_multiple(gc, mask, bits); |
1cef8b50 | 2874 | if (gc->get) { |
eec1d566 LW |
2875 | int i, value; |
2876 | ||
a0b66a73 LW |
2877 | for_each_set_bit(i, mask, gc->ngpio) { |
2878 | value = gc->get(gc, i); | |
eec1d566 LW |
2879 | if (value < 0) |
2880 | return value; | |
2881 | __assign_bit(i, bits, value); | |
2882 | } | |
2883 | return 0; | |
2884 | } | |
2885 | return -EIO; | |
2886 | } | |
2887 | ||
2888 | int gpiod_get_array_value_complex(bool raw, bool can_sleep, | |
2889 | unsigned int array_size, | |
2890 | struct gpio_desc **desc_array, | |
77588c14 | 2891 | struct gpio_array *array_info, |
b9762beb | 2892 | unsigned long *value_bitmap) |
eec1d566 | 2893 | { |
d377f56f | 2894 | int ret, i = 0; |
b17566a6 JK |
2895 | |
2896 | /* | |
2897 | * Validate array_info against desc_array and its size. | |
2898 | * It should immediately follow desc_array if both | |
2899 | * have been obtained from the same gpiod_get_array() call. | |
2900 | */ | |
2901 | if (array_info && array_info->desc == desc_array && | |
2902 | array_size <= array_info->size && | |
2903 | (void *)array_info == desc_array + array_info->size) { | |
2904 | if (!can_sleep) | |
2905 | WARN_ON(array_info->chip->can_sleep); | |
2906 | ||
d377f56f | 2907 | ret = gpio_chip_get_multiple(array_info->chip, |
b17566a6 JK |
2908 | array_info->get_mask, |
2909 | value_bitmap); | |
d377f56f LW |
2910 | if (ret) |
2911 | return ret; | |
b17566a6 JK |
2912 | |
2913 | if (!raw && !bitmap_empty(array_info->invert_mask, array_size)) | |
2914 | bitmap_xor(value_bitmap, value_bitmap, | |
2915 | array_info->invert_mask, array_size); | |
2916 | ||
b17566a6 | 2917 | i = find_first_zero_bit(array_info->get_mask, array_size); |
ae66eca0 AS |
2918 | if (i == array_size) |
2919 | return 0; | |
b17566a6 JK |
2920 | } else { |
2921 | array_info = NULL; | |
2922 | } | |
eec1d566 LW |
2923 | |
2924 | while (i < array_size) { | |
a0b66a73 | 2925 | struct gpio_chip *gc = desc_array[i]->gdev->chip; |
c80c4435 AS |
2926 | DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO); |
2927 | DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO); | |
3027743f | 2928 | unsigned long *mask, *bits; |
c07ea8d0 | 2929 | int first, j; |
eec1d566 | 2930 | |
a0b66a73 | 2931 | if (likely(gc->ngpio <= FASTPATH_NGPIO)) { |
c80c4435 AS |
2932 | mask = fastpath_mask; |
2933 | bits = fastpath_bits; | |
3027743f | 2934 | } else { |
c354c295 AS |
2935 | gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC; |
2936 | ||
2937 | mask = bitmap_alloc(gc->ngpio, flags); | |
3027743f LA |
2938 | if (!mask) |
2939 | return -ENOMEM; | |
c80c4435 | 2940 | |
c354c295 AS |
2941 | bits = bitmap_alloc(gc->ngpio, flags); |
2942 | if (!bits) { | |
2943 | bitmap_free(mask); | |
2944 | return -ENOMEM; | |
2945 | } | |
3027743f LA |
2946 | } |
2947 | ||
a0b66a73 | 2948 | bitmap_zero(mask, gc->ngpio); |
3027743f | 2949 | |
eec1d566 | 2950 | if (!can_sleep) |
a0b66a73 | 2951 | WARN_ON(gc->can_sleep); |
eec1d566 LW |
2952 | |
2953 | /* collect all inputs belonging to the same chip */ | |
2954 | first = i; | |
eec1d566 LW |
2955 | do { |
2956 | const struct gpio_desc *desc = desc_array[i]; | |
2957 | int hwgpio = gpio_chip_hwgpio(desc); | |
2958 | ||
2959 | __set_bit(hwgpio, mask); | |
2960 | i++; | |
b17566a6 JK |
2961 | |
2962 | if (array_info) | |
35ae7f96 JK |
2963 | i = find_next_zero_bit(array_info->get_mask, |
2964 | array_size, i); | |
eec1d566 | 2965 | } while ((i < array_size) && |
a0b66a73 | 2966 | (desc_array[i]->gdev->chip == gc)); |
eec1d566 | 2967 | |
a0b66a73 | 2968 | ret = gpio_chip_get_multiple(gc, mask, bits); |
3027743f | 2969 | if (ret) { |
c80c4435 | 2970 | if (mask != fastpath_mask) |
c354c295 AS |
2971 | bitmap_free(mask); |
2972 | if (bits != fastpath_bits) | |
2973 | bitmap_free(bits); | |
eec1d566 | 2974 | return ret; |
3027743f | 2975 | } |
eec1d566 | 2976 | |
b17566a6 | 2977 | for (j = first; j < i; ) { |
eec1d566 LW |
2978 | const struct gpio_desc *desc = desc_array[j]; |
2979 | int hwgpio = gpio_chip_hwgpio(desc); | |
2980 | int value = test_bit(hwgpio, bits); | |
2981 | ||
2982 | if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
2983 | value = !value; | |
b9762beb | 2984 | __assign_bit(j, value_bitmap, value); |
eec1d566 | 2985 | trace_gpio_value(desc_to_gpio(desc), 1, value); |
799d5eb4 | 2986 | j++; |
b17566a6 JK |
2987 | |
2988 | if (array_info) | |
35ae7f96 JK |
2989 | j = find_next_zero_bit(array_info->get_mask, i, |
2990 | j); | |
eec1d566 | 2991 | } |
3027743f | 2992 | |
c80c4435 | 2993 | if (mask != fastpath_mask) |
c354c295 AS |
2994 | bitmap_free(mask); |
2995 | if (bits != fastpath_bits) | |
2996 | bitmap_free(bits); | |
eec1d566 LW |
2997 | } |
2998 | return 0; | |
2999 | } | |
3000 | ||
d2876d08 | 3001 | /** |
79a9becd AC |
3002 | * gpiod_get_raw_value() - return a gpio's raw value |
3003 | * @desc: gpio whose value will be returned | |
d2876d08 | 3004 | * |
79a9becd | 3005 | * Return the GPIO's raw value, i.e. the value of the physical line disregarding |
e20538b8 | 3006 | * its ACTIVE_LOW status, or negative errno on failure. |
79a9becd | 3007 | * |
827a9b8b | 3008 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 3009 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 3010 | */ |
79a9becd | 3011 | int gpiod_get_raw_value(const struct gpio_desc *desc) |
d2876d08 | 3012 | { |
fdeb8e15 | 3013 | VALIDATE_DESC(desc); |
3285170f | 3014 | /* Should be using gpiod_get_raw_value_cansleep() */ |
fdeb8e15 | 3015 | WARN_ON(desc->gdev->chip->can_sleep); |
fac9d885 | 3016 | return gpiod_get_raw_value_commit(desc); |
d2876d08 | 3017 | } |
79a9becd | 3018 | EXPORT_SYMBOL_GPL(gpiod_get_raw_value); |
372e722e | 3019 | |
79a9becd AC |
3020 | /** |
3021 | * gpiod_get_value() - return a gpio's value | |
3022 | * @desc: gpio whose value will be returned | |
3023 | * | |
3024 | * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into | |
e20538b8 | 3025 | * account, or negative errno on failure. |
79a9becd | 3026 | * |
827a9b8b | 3027 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd AC |
3028 | * complain if the GPIO chip functions potentially sleep. |
3029 | */ | |
3030 | int gpiod_get_value(const struct gpio_desc *desc) | |
372e722e | 3031 | { |
79a9becd | 3032 | int value; |
fdeb8e15 LW |
3033 | |
3034 | VALIDATE_DESC(desc); | |
3285170f | 3035 | /* Should be using gpiod_get_value_cansleep() */ |
fdeb8e15 | 3036 | WARN_ON(desc->gdev->chip->can_sleep); |
79a9becd | 3037 | |
fac9d885 | 3038 | value = gpiod_get_raw_value_commit(desc); |
e20538b8 BA |
3039 | if (value < 0) |
3040 | return value; | |
3041 | ||
79a9becd AC |
3042 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
3043 | value = !value; | |
3044 | ||
3045 | return value; | |
372e722e | 3046 | } |
79a9becd | 3047 | EXPORT_SYMBOL_GPL(gpiod_get_value); |
d2876d08 | 3048 | |
eec1d566 LW |
3049 | /** |
3050 | * gpiod_get_raw_array_value() - read raw values from an array of GPIOs | |
b9762beb | 3051 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 3052 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 3053 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3054 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
3055 | * |
3056 | * Read the raw values of the GPIOs, i.e. the values of the physical lines | |
3057 | * without regard for their ACTIVE_LOW status. Return 0 in case of success, | |
3058 | * else an error code. | |
3059 | * | |
827a9b8b | 3060 | * This function can be called from contexts where we cannot sleep, |
eec1d566 LW |
3061 | * and it will complain if the GPIO chip functions potentially sleep. |
3062 | */ | |
3063 | int gpiod_get_raw_array_value(unsigned int array_size, | |
b9762beb | 3064 | struct gpio_desc **desc_array, |
77588c14 | 3065 | struct gpio_array *array_info, |
b9762beb | 3066 | unsigned long *value_bitmap) |
eec1d566 LW |
3067 | { |
3068 | if (!desc_array) | |
3069 | return -EINVAL; | |
3070 | return gpiod_get_array_value_complex(true, false, array_size, | |
77588c14 JK |
3071 | desc_array, array_info, |
3072 | value_bitmap); | |
eec1d566 LW |
3073 | } |
3074 | EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value); | |
3075 | ||
3076 | /** | |
3077 | * gpiod_get_array_value() - read values from an array of GPIOs | |
b9762beb | 3078 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 3079 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 3080 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3081 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
3082 | * |
3083 | * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
3084 | * into account. Return 0 in case of success, else an error code. | |
3085 | * | |
827a9b8b | 3086 | * This function can be called from contexts where we cannot sleep, |
eec1d566 LW |
3087 | * and it will complain if the GPIO chip functions potentially sleep. |
3088 | */ | |
3089 | int gpiod_get_array_value(unsigned int array_size, | |
b9762beb | 3090 | struct gpio_desc **desc_array, |
77588c14 | 3091 | struct gpio_array *array_info, |
b9762beb | 3092 | unsigned long *value_bitmap) |
eec1d566 LW |
3093 | { |
3094 | if (!desc_array) | |
3095 | return -EINVAL; | |
3096 | return gpiod_get_array_value_complex(false, false, array_size, | |
77588c14 JK |
3097 | desc_array, array_info, |
3098 | value_bitmap); | |
eec1d566 LW |
3099 | } |
3100 | EXPORT_SYMBOL_GPL(gpiod_get_array_value); | |
3101 | ||
aca5ce14 | 3102 | /* |
fac9d885 | 3103 | * gpio_set_open_drain_value_commit() - Set the open drain gpio's value. |
79a9becd | 3104 | * @desc: gpio descriptor whose state need to be set. |
20a8a968 | 3105 | * @value: Non-zero for setting it HIGH otherwise it will set to LOW. |
aca5ce14 | 3106 | */ |
fac9d885 | 3107 | static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value) |
aca5ce14 | 3108 | { |
d377f56f | 3109 | int ret = 0; |
a0b66a73 | 3110 | struct gpio_chip *gc = desc->gdev->chip; |
372e722e AC |
3111 | int offset = gpio_chip_hwgpio(desc); |
3112 | ||
aca5ce14 | 3113 | if (value) { |
a0b66a73 | 3114 | ret = gc->direction_input(gc, offset); |
aca5ce14 | 3115 | } else { |
a0b66a73 | 3116 | ret = gc->direction_output(gc, offset, 0); |
d377f56f | 3117 | if (!ret) |
372e722e | 3118 | set_bit(FLAG_IS_OUT, &desc->flags); |
aca5ce14 | 3119 | } |
d377f56f LW |
3120 | trace_gpio_direction(desc_to_gpio(desc), value, ret); |
3121 | if (ret < 0) | |
6424de5a MB |
3122 | gpiod_err(desc, |
3123 | "%s: Error in set_value for open drain err %d\n", | |
d377f56f | 3124 | __func__, ret); |
aca5ce14 LD |
3125 | } |
3126 | ||
25553ff0 | 3127 | /* |
79a9becd AC |
3128 | * _gpio_set_open_source_value() - Set the open source gpio's value. |
3129 | * @desc: gpio descriptor whose state need to be set. | |
20a8a968 | 3130 | * @value: Non-zero for setting it HIGH otherwise it will set to LOW. |
25553ff0 | 3131 | */ |
fac9d885 | 3132 | static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value) |
25553ff0 | 3133 | { |
d377f56f | 3134 | int ret = 0; |
a0b66a73 | 3135 | struct gpio_chip *gc = desc->gdev->chip; |
372e722e AC |
3136 | int offset = gpio_chip_hwgpio(desc); |
3137 | ||
25553ff0 | 3138 | if (value) { |
a0b66a73 | 3139 | ret = gc->direction_output(gc, offset, 1); |
d377f56f | 3140 | if (!ret) |
372e722e | 3141 | set_bit(FLAG_IS_OUT, &desc->flags); |
25553ff0 | 3142 | } else { |
a0b66a73 | 3143 | ret = gc->direction_input(gc, offset); |
25553ff0 | 3144 | } |
d377f56f LW |
3145 | trace_gpio_direction(desc_to_gpio(desc), !value, ret); |
3146 | if (ret < 0) | |
6424de5a MB |
3147 | gpiod_err(desc, |
3148 | "%s: Error in set_value for open source err %d\n", | |
d377f56f | 3149 | __func__, ret); |
25553ff0 LD |
3150 | } |
3151 | ||
fac9d885 | 3152 | static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value) |
d2876d08 | 3153 | { |
a0b66a73 | 3154 | struct gpio_chip *gc; |
d2876d08 | 3155 | |
a0b66a73 | 3156 | gc = desc->gdev->chip; |
372e722e | 3157 | trace_gpio_value(desc_to_gpio(desc), 0, value); |
a0b66a73 | 3158 | gc->set(gc, gpio_chip_hwgpio(desc), value); |
372e722e AC |
3159 | } |
3160 | ||
5f424243 RI |
3161 | /* |
3162 | * set multiple outputs on the same chip; | |
3163 | * use the chip's set_multiple function if available; | |
3164 | * otherwise set the outputs sequentially; | |
a0b66a73 | 3165 | * @chip: the GPIO chip we operate on |
5f424243 RI |
3166 | * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word |
3167 | * defines which outputs are to be changed | |
3168 | * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word | |
3169 | * defines the values the outputs specified by mask are to be set to | |
3170 | */ | |
a0b66a73 | 3171 | static void gpio_chip_set_multiple(struct gpio_chip *gc, |
5f424243 RI |
3172 | unsigned long *mask, unsigned long *bits) |
3173 | { | |
a0b66a73 LW |
3174 | if (gc->set_multiple) { |
3175 | gc->set_multiple(gc, mask, bits); | |
5f424243 | 3176 | } else { |
5e4e6fb3 AS |
3177 | unsigned int i; |
3178 | ||
3179 | /* set outputs if the corresponding mask bit is set */ | |
a0b66a73 LW |
3180 | for_each_set_bit(i, mask, gc->ngpio) |
3181 | gc->set(gc, i, test_bit(i, bits)); | |
5f424243 RI |
3182 | } |
3183 | } | |
3184 | ||
3027743f | 3185 | int gpiod_set_array_value_complex(bool raw, bool can_sleep, |
3c940660 GU |
3186 | unsigned int array_size, |
3187 | struct gpio_desc **desc_array, | |
3188 | struct gpio_array *array_info, | |
3189 | unsigned long *value_bitmap) | |
5f424243 RI |
3190 | { |
3191 | int i = 0; | |
3192 | ||
b17566a6 JK |
3193 | /* |
3194 | * Validate array_info against desc_array and its size. | |
3195 | * It should immediately follow desc_array if both | |
3196 | * have been obtained from the same gpiod_get_array() call. | |
3197 | */ | |
3198 | if (array_info && array_info->desc == desc_array && | |
3199 | array_size <= array_info->size && | |
3200 | (void *)array_info == desc_array + array_info->size) { | |
3201 | if (!can_sleep) | |
3202 | WARN_ON(array_info->chip->can_sleep); | |
3203 | ||
3204 | if (!raw && !bitmap_empty(array_info->invert_mask, array_size)) | |
3205 | bitmap_xor(value_bitmap, value_bitmap, | |
3206 | array_info->invert_mask, array_size); | |
3207 | ||
3208 | gpio_chip_set_multiple(array_info->chip, array_info->set_mask, | |
3209 | value_bitmap); | |
3210 | ||
b17566a6 | 3211 | i = find_first_zero_bit(array_info->set_mask, array_size); |
ae66eca0 AS |
3212 | if (i == array_size) |
3213 | return 0; | |
b17566a6 JK |
3214 | } else { |
3215 | array_info = NULL; | |
3216 | } | |
3217 | ||
5f424243 | 3218 | while (i < array_size) { |
a0b66a73 | 3219 | struct gpio_chip *gc = desc_array[i]->gdev->chip; |
c80c4435 AS |
3220 | DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO); |
3221 | DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO); | |
3027743f | 3222 | unsigned long *mask, *bits; |
5f424243 RI |
3223 | int count = 0; |
3224 | ||
a0b66a73 | 3225 | if (likely(gc->ngpio <= FASTPATH_NGPIO)) { |
c80c4435 AS |
3226 | mask = fastpath_mask; |
3227 | bits = fastpath_bits; | |
3027743f | 3228 | } else { |
c354c295 AS |
3229 | gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC; |
3230 | ||
3231 | mask = bitmap_alloc(gc->ngpio, flags); | |
3027743f LA |
3232 | if (!mask) |
3233 | return -ENOMEM; | |
c80c4435 | 3234 | |
c354c295 AS |
3235 | bits = bitmap_alloc(gc->ngpio, flags); |
3236 | if (!bits) { | |
3237 | bitmap_free(mask); | |
3238 | return -ENOMEM; | |
3239 | } | |
3027743f LA |
3240 | } |
3241 | ||
a0b66a73 | 3242 | bitmap_zero(mask, gc->ngpio); |
3027743f | 3243 | |
38e003f4 | 3244 | if (!can_sleep) |
a0b66a73 | 3245 | WARN_ON(gc->can_sleep); |
38e003f4 | 3246 | |
5f424243 RI |
3247 | do { |
3248 | struct gpio_desc *desc = desc_array[i]; | |
3249 | int hwgpio = gpio_chip_hwgpio(desc); | |
b9762beb | 3250 | int value = test_bit(i, value_bitmap); |
5f424243 | 3251 | |
b17566a6 JK |
3252 | /* |
3253 | * Pins applicable for fast input but not for | |
3254 | * fast output processing may have been already | |
3255 | * inverted inside the fast path, skip them. | |
3256 | */ | |
3257 | if (!raw && !(array_info && | |
3258 | test_bit(i, array_info->invert_mask)) && | |
3259 | test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
5f424243 RI |
3260 | value = !value; |
3261 | trace_gpio_value(desc_to_gpio(desc), 0, value); | |
3262 | /* | |
3263 | * collect all normal outputs belonging to the same chip | |
3264 | * open drain and open source outputs are set individually | |
3265 | */ | |
02e47980 | 3266 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) { |
fac9d885 | 3267 | gpio_set_open_drain_value_commit(desc, value); |
02e47980 | 3268 | } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) { |
fac9d885 | 3269 | gpio_set_open_source_value_commit(desc, value); |
5f424243 RI |
3270 | } else { |
3271 | __set_bit(hwgpio, mask); | |
4fc5bfeb | 3272 | __assign_bit(hwgpio, bits, value); |
5f424243 RI |
3273 | count++; |
3274 | } | |
3275 | i++; | |
b17566a6 JK |
3276 | |
3277 | if (array_info) | |
35ae7f96 JK |
3278 | i = find_next_zero_bit(array_info->set_mask, |
3279 | array_size, i); | |
fdeb8e15 | 3280 | } while ((i < array_size) && |
a0b66a73 | 3281 | (desc_array[i]->gdev->chip == gc)); |
5f424243 | 3282 | /* push collected bits to outputs */ |
38e003f4 | 3283 | if (count != 0) |
a0b66a73 | 3284 | gpio_chip_set_multiple(gc, mask, bits); |
3027743f | 3285 | |
c80c4435 | 3286 | if (mask != fastpath_mask) |
c354c295 AS |
3287 | bitmap_free(mask); |
3288 | if (bits != fastpath_bits) | |
3289 | bitmap_free(bits); | |
5f424243 | 3290 | } |
3027743f | 3291 | return 0; |
5f424243 RI |
3292 | } |
3293 | ||
d2876d08 | 3294 | /** |
79a9becd AC |
3295 | * gpiod_set_raw_value() - assign a gpio's raw value |
3296 | * @desc: gpio whose value will be assigned | |
d2876d08 | 3297 | * @value: value to assign |
d2876d08 | 3298 | * |
79a9becd AC |
3299 | * Set the raw value of the GPIO, i.e. the value of its physical line without |
3300 | * regard for its ACTIVE_LOW status. | |
3301 | * | |
827a9b8b | 3302 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 3303 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 3304 | */ |
79a9becd | 3305 | void gpiod_set_raw_value(struct gpio_desc *desc, int value) |
372e722e | 3306 | { |
fdeb8e15 | 3307 | VALIDATE_DESC_VOID(desc); |
3285170f | 3308 | /* Should be using gpiod_set_raw_value_cansleep() */ |
fdeb8e15 | 3309 | WARN_ON(desc->gdev->chip->can_sleep); |
fac9d885 | 3310 | gpiod_set_raw_value_commit(desc, value); |
d2876d08 | 3311 | } |
79a9becd | 3312 | EXPORT_SYMBOL_GPL(gpiod_set_raw_value); |
d2876d08 | 3313 | |
1e77fc82 GU |
3314 | /** |
3315 | * gpiod_set_value_nocheck() - set a GPIO line value without checking | |
3316 | * @desc: the descriptor to set the value on | |
3317 | * @value: value to set | |
3318 | * | |
3319 | * This sets the value of a GPIO line backing a descriptor, applying | |
3320 | * different semantic quirks like active low and open drain/source | |
3321 | * handling. | |
3322 | */ | |
3323 | static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value) | |
3324 | { | |
3325 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
3326 | value = !value; | |
3327 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) | |
3328 | gpio_set_open_drain_value_commit(desc, value); | |
3329 | else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) | |
3330 | gpio_set_open_source_value_commit(desc, value); | |
3331 | else | |
3332 | gpiod_set_raw_value_commit(desc, value); | |
3333 | } | |
3334 | ||
d2876d08 | 3335 | /** |
79a9becd AC |
3336 | * gpiod_set_value() - assign a gpio's value |
3337 | * @desc: gpio whose value will be assigned | |
3338 | * @value: value to assign | |
3339 | * | |
02e47980 LW |
3340 | * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW, |
3341 | * OPEN_DRAIN and OPEN_SOURCE flags into account. | |
d2876d08 | 3342 | * |
827a9b8b | 3343 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 3344 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 3345 | */ |
79a9becd | 3346 | void gpiod_set_value(struct gpio_desc *desc, int value) |
d2876d08 | 3347 | { |
fdeb8e15 | 3348 | VALIDATE_DESC_VOID(desc); |
3285170f | 3349 | /* Should be using gpiod_set_value_cansleep() */ |
fdeb8e15 | 3350 | WARN_ON(desc->gdev->chip->can_sleep); |
1e77fc82 | 3351 | gpiod_set_value_nocheck(desc, value); |
372e722e | 3352 | } |
79a9becd | 3353 | EXPORT_SYMBOL_GPL(gpiod_set_value); |
d2876d08 | 3354 | |
5f424243 | 3355 | /** |
3fff99bc | 3356 | * gpiod_set_raw_array_value() - assign values to an array of GPIOs |
b9762beb | 3357 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 3358 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 3359 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3360 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
3361 | * |
3362 | * Set the raw values of the GPIOs, i.e. the values of the physical lines | |
3363 | * without regard for their ACTIVE_LOW status. | |
3364 | * | |
827a9b8b | 3365 | * This function can be called from contexts where we cannot sleep, and will |
5f424243 RI |
3366 | * complain if the GPIO chip functions potentially sleep. |
3367 | */ | |
3027743f | 3368 | int gpiod_set_raw_array_value(unsigned int array_size, |
3c940660 GU |
3369 | struct gpio_desc **desc_array, |
3370 | struct gpio_array *array_info, | |
3371 | unsigned long *value_bitmap) | |
5f424243 RI |
3372 | { |
3373 | if (!desc_array) | |
3027743f LA |
3374 | return -EINVAL; |
3375 | return gpiod_set_array_value_complex(true, false, array_size, | |
77588c14 | 3376 | desc_array, array_info, value_bitmap); |
5f424243 | 3377 | } |
3fff99bc | 3378 | EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value); |
5f424243 RI |
3379 | |
3380 | /** | |
3fff99bc | 3381 | * gpiod_set_array_value() - assign values to an array of GPIOs |
b9762beb | 3382 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 3383 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 3384 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3385 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
3386 | * |
3387 | * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
3388 | * into account. | |
3389 | * | |
827a9b8b | 3390 | * This function can be called from contexts where we cannot sleep, and will |
5f424243 RI |
3391 | * complain if the GPIO chip functions potentially sleep. |
3392 | */ | |
cf9af0d5 GU |
3393 | int gpiod_set_array_value(unsigned int array_size, |
3394 | struct gpio_desc **desc_array, | |
3395 | struct gpio_array *array_info, | |
3396 | unsigned long *value_bitmap) | |
5f424243 RI |
3397 | { |
3398 | if (!desc_array) | |
cf9af0d5 GU |
3399 | return -EINVAL; |
3400 | return gpiod_set_array_value_complex(false, false, array_size, | |
3401 | desc_array, array_info, | |
3402 | value_bitmap); | |
5f424243 | 3403 | } |
3fff99bc | 3404 | EXPORT_SYMBOL_GPL(gpiod_set_array_value); |
5f424243 | 3405 | |
d2876d08 | 3406 | /** |
79a9becd AC |
3407 | * gpiod_cansleep() - report whether gpio value access may sleep |
3408 | * @desc: gpio to check | |
d2876d08 | 3409 | * |
d2876d08 | 3410 | */ |
79a9becd | 3411 | int gpiod_cansleep(const struct gpio_desc *desc) |
372e722e | 3412 | { |
fdeb8e15 LW |
3413 | VALIDATE_DESC(desc); |
3414 | return desc->gdev->chip->can_sleep; | |
d2876d08 | 3415 | } |
79a9becd | 3416 | EXPORT_SYMBOL_GPL(gpiod_cansleep); |
d2876d08 | 3417 | |
90b39402 LW |
3418 | /** |
3419 | * gpiod_set_consumer_name() - set the consumer name for the descriptor | |
3420 | * @desc: gpio to set the consumer name on | |
3421 | * @name: the new consumer name | |
3422 | */ | |
18534df4 | 3423 | int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name) |
90b39402 | 3424 | { |
18534df4 MS |
3425 | VALIDATE_DESC(desc); |
3426 | if (name) { | |
3427 | name = kstrdup_const(name, GFP_KERNEL); | |
3428 | if (!name) | |
3429 | return -ENOMEM; | |
3430 | } | |
3431 | ||
3432 | kfree_const(desc->label); | |
3433 | desc_set_label(desc, name); | |
3434 | ||
3435 | return 0; | |
90b39402 LW |
3436 | } |
3437 | EXPORT_SYMBOL_GPL(gpiod_set_consumer_name); | |
3438 | ||
0f6d504e | 3439 | /** |
79a9becd AC |
3440 | * gpiod_to_irq() - return the IRQ corresponding to a GPIO |
3441 | * @desc: gpio whose IRQ will be returned (already requested) | |
0f6d504e | 3442 | * |
79a9becd AC |
3443 | * Return the IRQ corresponding to the passed GPIO, or an error code in case of |
3444 | * error. | |
0f6d504e | 3445 | */ |
79a9becd | 3446 | int gpiod_to_irq(const struct gpio_desc *desc) |
0f6d504e | 3447 | { |
a0b66a73 | 3448 | struct gpio_chip *gc; |
4c37ce86 | 3449 | int offset; |
0f6d504e | 3450 | |
79bb71bd LW |
3451 | /* |
3452 | * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics | |
3453 | * requires this function to not return zero on an invalid descriptor | |
3454 | * but rather a negative error number. | |
3455 | */ | |
bfbbe44d | 3456 | if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip) |
79bb71bd LW |
3457 | return -EINVAL; |
3458 | ||
a0b66a73 | 3459 | gc = desc->gdev->chip; |
372e722e | 3460 | offset = gpio_chip_hwgpio(desc); |
a0b66a73 LW |
3461 | if (gc->to_irq) { |
3462 | int retirq = gc->to_irq(gc, offset); | |
4c37ce86 LW |
3463 | |
3464 | /* Zero means NO_IRQ */ | |
3465 | if (!retirq) | |
3466 | return -ENXIO; | |
3467 | ||
3468 | return retirq; | |
3469 | } | |
ae42f928 SP |
3470 | #ifdef CONFIG_GPIOLIB_IRQCHIP |
3471 | if (gc->irq.chip) { | |
3472 | /* | |
3473 | * Avoid race condition with other code, which tries to lookup | |
3474 | * an IRQ before the irqchip has been properly registered, | |
3475 | * i.e. while gpiochip is still being brought up. | |
3476 | */ | |
3477 | return -EPROBE_DEFER; | |
3478 | } | |
3479 | #endif | |
4c37ce86 | 3480 | return -ENXIO; |
0f6d504e | 3481 | } |
79a9becd | 3482 | EXPORT_SYMBOL_GPL(gpiod_to_irq); |
0f6d504e | 3483 | |
d468bf9e | 3484 | /** |
e3a2e878 | 3485 | * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ |
a0b66a73 | 3486 | * @gc: the chip the GPIO to lock belongs to |
d74be6df | 3487 | * @offset: the offset of the GPIO to lock as IRQ |
d468bf9e LW |
3488 | * |
3489 | * This is used directly by GPIO drivers that want to lock down | |
f438acdf | 3490 | * a certain GPIO line to be used for IRQs. |
d468bf9e | 3491 | */ |
a0b66a73 | 3492 | int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset) |
372e722e | 3493 | { |
9c10280d LW |
3494 | struct gpio_desc *desc; |
3495 | ||
a0b66a73 | 3496 | desc = gpiochip_get_desc(gc, offset); |
9c10280d LW |
3497 | if (IS_ERR(desc)) |
3498 | return PTR_ERR(desc); | |
3499 | ||
60f8339e LW |
3500 | /* |
3501 | * If it's fast: flush the direction setting if something changed | |
3502 | * behind our back | |
3503 | */ | |
a0b66a73 | 3504 | if (!gc->can_sleep && gc->get_direction) { |
80956790 | 3505 | int dir = gpiod_get_direction(desc); |
9c10280d | 3506 | |
36b31279 | 3507 | if (dir < 0) { |
a0b66a73 | 3508 | chip_err(gc, "%s: cannot get GPIO direction\n", |
36b31279 AS |
3509 | __func__); |
3510 | return dir; | |
3511 | } | |
9c10280d | 3512 | } |
d468bf9e | 3513 | |
e9bdf7e6 LW |
3514 | /* To be valid for IRQ the line needs to be input or open drain */ |
3515 | if (test_bit(FLAG_IS_OUT, &desc->flags) && | |
3516 | !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) { | |
a0b66a73 | 3517 | chip_err(gc, |
b1911710 AS |
3518 | "%s: tried to flag a GPIO set as output for IRQ\n", |
3519 | __func__); | |
d468bf9e LW |
3520 | return -EIO; |
3521 | } | |
3522 | ||
9c10280d | 3523 | set_bit(FLAG_USED_AS_IRQ, &desc->flags); |
4e9439dd | 3524 | set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3940c34a LW |
3525 | |
3526 | /* | |
3527 | * If the consumer has not set up a label (such as when the | |
3528 | * IRQ is referenced from .to_irq()) we set up a label here | |
3529 | * so it is clear this is used as an interrupt. | |
3530 | */ | |
3531 | if (!desc->label) | |
3532 | desc_set_label(desc, "interrupt"); | |
3533 | ||
d468bf9e | 3534 | return 0; |
372e722e | 3535 | } |
e3a2e878 | 3536 | EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq); |
d2876d08 | 3537 | |
d468bf9e | 3538 | /** |
e3a2e878 | 3539 | * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ |
a0b66a73 | 3540 | * @gc: the chip the GPIO to lock belongs to |
d74be6df | 3541 | * @offset: the offset of the GPIO to lock as IRQ |
d468bf9e LW |
3542 | * |
3543 | * This is used directly by GPIO drivers that want to indicate | |
3544 | * that a certain GPIO is no longer used exclusively for IRQ. | |
d2876d08 | 3545 | */ |
a0b66a73 | 3546 | void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset) |
d468bf9e | 3547 | { |
3940c34a LW |
3548 | struct gpio_desc *desc; |
3549 | ||
a0b66a73 | 3550 | desc = gpiochip_get_desc(gc, offset); |
3940c34a | 3551 | if (IS_ERR(desc)) |
d468bf9e | 3552 | return; |
d2876d08 | 3553 | |
3940c34a | 3554 | clear_bit(FLAG_USED_AS_IRQ, &desc->flags); |
4e9439dd | 3555 | clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3940c34a LW |
3556 | |
3557 | /* If we only had this marking, erase it */ | |
3558 | if (desc->label && !strcmp(desc->label, "interrupt")) | |
3559 | desc_set_label(desc, NULL); | |
d468bf9e | 3560 | } |
e3a2e878 | 3561 | EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq); |
d468bf9e | 3562 | |
a0b66a73 | 3563 | void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset) |
4e9439dd | 3564 | { |
a0b66a73 | 3565 | struct gpio_desc *desc = gpiochip_get_desc(gc, offset); |
4e9439dd HV |
3566 | |
3567 | if (!IS_ERR(desc) && | |
3568 | !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) | |
3569 | clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); | |
3570 | } | |
3571 | EXPORT_SYMBOL_GPL(gpiochip_disable_irq); | |
3572 | ||
a0b66a73 | 3573 | void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset) |
4e9439dd | 3574 | { |
a0b66a73 | 3575 | struct gpio_desc *desc = gpiochip_get_desc(gc, offset); |
4e9439dd HV |
3576 | |
3577 | if (!IS_ERR(desc) && | |
3578 | !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) { | |
e9bdf7e6 LW |
3579 | /* |
3580 | * We must not be output when using IRQ UNLESS we are | |
3581 | * open drain. | |
3582 | */ | |
3583 | WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) && | |
3584 | !test_bit(FLAG_OPEN_DRAIN, &desc->flags)); | |
4e9439dd HV |
3585 | set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3586 | } | |
3587 | } | |
3588 | EXPORT_SYMBOL_GPL(gpiochip_enable_irq); | |
3589 | ||
a0b66a73 | 3590 | bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset) |
6cee3821 | 3591 | { |
a0b66a73 | 3592 | if (offset >= gc->ngpio) |
6cee3821 LW |
3593 | return false; |
3594 | ||
a0b66a73 | 3595 | return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags); |
6cee3821 LW |
3596 | } |
3597 | EXPORT_SYMBOL_GPL(gpiochip_line_is_irq); | |
3598 | ||
a0b66a73 | 3599 | int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset) |
4e6b8238 HV |
3600 | { |
3601 | int ret; | |
3602 | ||
a0b66a73 | 3603 | if (!try_module_get(gc->gpiodev->owner)) |
4e6b8238 HV |
3604 | return -ENODEV; |
3605 | ||
a0b66a73 | 3606 | ret = gpiochip_lock_as_irq(gc, offset); |
4e6b8238 | 3607 | if (ret) { |
a0b66a73 LW |
3608 | chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset); |
3609 | module_put(gc->gpiodev->owner); | |
4e6b8238 HV |
3610 | return ret; |
3611 | } | |
3612 | return 0; | |
3613 | } | |
3614 | EXPORT_SYMBOL_GPL(gpiochip_reqres_irq); | |
3615 | ||
a0b66a73 | 3616 | void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset) |
4e6b8238 | 3617 | { |
a0b66a73 LW |
3618 | gpiochip_unlock_as_irq(gc, offset); |
3619 | module_put(gc->gpiodev->owner); | |
4e6b8238 HV |
3620 | } |
3621 | EXPORT_SYMBOL_GPL(gpiochip_relres_irq); | |
3622 | ||
a0b66a73 | 3623 | bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset) |
143b65d6 | 3624 | { |
a0b66a73 | 3625 | if (offset >= gc->ngpio) |
143b65d6 LW |
3626 | return false; |
3627 | ||
a0b66a73 | 3628 | return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags); |
143b65d6 LW |
3629 | } |
3630 | EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain); | |
3631 | ||
a0b66a73 | 3632 | bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset) |
143b65d6 | 3633 | { |
a0b66a73 | 3634 | if (offset >= gc->ngpio) |
143b65d6 LW |
3635 | return false; |
3636 | ||
a0b66a73 | 3637 | return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags); |
143b65d6 LW |
3638 | } |
3639 | EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source); | |
3640 | ||
a0b66a73 | 3641 | bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset) |
05f479bf | 3642 | { |
a0b66a73 | 3643 | if (offset >= gc->ngpio) |
05f479bf CK |
3644 | return false; |
3645 | ||
a0b66a73 | 3646 | return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags); |
05f479bf CK |
3647 | } |
3648 | EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent); | |
3649 | ||
79a9becd AC |
3650 | /** |
3651 | * gpiod_get_raw_value_cansleep() - return a gpio's raw value | |
3652 | * @desc: gpio whose value will be returned | |
3653 | * | |
3654 | * Return the GPIO's raw value, i.e. the value of the physical line disregarding | |
e20538b8 | 3655 | * its ACTIVE_LOW status, or negative errno on failure. |
79a9becd AC |
3656 | * |
3657 | * This function is to be called from contexts that can sleep. | |
d2876d08 | 3658 | */ |
79a9becd | 3659 | int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc) |
d2876d08 | 3660 | { |
d2876d08 | 3661 | might_sleep_if(extra_checks); |
fdeb8e15 | 3662 | VALIDATE_DESC(desc); |
fac9d885 | 3663 | return gpiod_get_raw_value_commit(desc); |
d2876d08 | 3664 | } |
79a9becd | 3665 | EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep); |
372e722e | 3666 | |
79a9becd AC |
3667 | /** |
3668 | * gpiod_get_value_cansleep() - return a gpio's value | |
3669 | * @desc: gpio whose value will be returned | |
3670 | * | |
3671 | * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into | |
e20538b8 | 3672 | * account, or negative errno on failure. |
79a9becd AC |
3673 | * |
3674 | * This function is to be called from contexts that can sleep. | |
3675 | */ | |
3676 | int gpiod_get_value_cansleep(const struct gpio_desc *desc) | |
d2876d08 | 3677 | { |
3f397c21 | 3678 | int value; |
d2876d08 DB |
3679 | |
3680 | might_sleep_if(extra_checks); | |
fdeb8e15 | 3681 | VALIDATE_DESC(desc); |
fac9d885 | 3682 | value = gpiod_get_raw_value_commit(desc); |
e20538b8 BA |
3683 | if (value < 0) |
3684 | return value; | |
3685 | ||
79a9becd AC |
3686 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
3687 | value = !value; | |
3688 | ||
3f397c21 | 3689 | return value; |
d2876d08 | 3690 | } |
79a9becd | 3691 | EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep); |
372e722e | 3692 | |
eec1d566 LW |
3693 | /** |
3694 | * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs | |
b9762beb | 3695 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 3696 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 3697 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3698 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
3699 | * |
3700 | * Read the raw values of the GPIOs, i.e. the values of the physical lines | |
3701 | * without regard for their ACTIVE_LOW status. Return 0 in case of success, | |
3702 | * else an error code. | |
3703 | * | |
3704 | * This function is to be called from contexts that can sleep. | |
3705 | */ | |
3706 | int gpiod_get_raw_array_value_cansleep(unsigned int array_size, | |
3707 | struct gpio_desc **desc_array, | |
77588c14 | 3708 | struct gpio_array *array_info, |
b9762beb | 3709 | unsigned long *value_bitmap) |
eec1d566 LW |
3710 | { |
3711 | might_sleep_if(extra_checks); | |
3712 | if (!desc_array) | |
3713 | return -EINVAL; | |
3714 | return gpiod_get_array_value_complex(true, true, array_size, | |
77588c14 JK |
3715 | desc_array, array_info, |
3716 | value_bitmap); | |
eec1d566 LW |
3717 | } |
3718 | EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep); | |
3719 | ||
3720 | /** | |
3721 | * gpiod_get_array_value_cansleep() - read values from an array of GPIOs | |
b9762beb | 3722 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 3723 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 3724 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3725 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
3726 | * |
3727 | * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
3728 | * into account. Return 0 in case of success, else an error code. | |
3729 | * | |
3730 | * This function is to be called from contexts that can sleep. | |
3731 | */ | |
3732 | int gpiod_get_array_value_cansleep(unsigned int array_size, | |
3733 | struct gpio_desc **desc_array, | |
77588c14 | 3734 | struct gpio_array *array_info, |
b9762beb | 3735 | unsigned long *value_bitmap) |
eec1d566 LW |
3736 | { |
3737 | might_sleep_if(extra_checks); | |
3738 | if (!desc_array) | |
3739 | return -EINVAL; | |
3740 | return gpiod_get_array_value_complex(false, true, array_size, | |
77588c14 JK |
3741 | desc_array, array_info, |
3742 | value_bitmap); | |
eec1d566 LW |
3743 | } |
3744 | EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep); | |
3745 | ||
79a9becd AC |
3746 | /** |
3747 | * gpiod_set_raw_value_cansleep() - assign a gpio's raw value | |
3748 | * @desc: gpio whose value will be assigned | |
3749 | * @value: value to assign | |
3750 | * | |
3751 | * Set the raw value of the GPIO, i.e. the value of its physical line without | |
3752 | * regard for its ACTIVE_LOW status. | |
3753 | * | |
3754 | * This function is to be called from contexts that can sleep. | |
3755 | */ | |
3756 | void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value) | |
372e722e | 3757 | { |
d2876d08 | 3758 | might_sleep_if(extra_checks); |
fdeb8e15 | 3759 | VALIDATE_DESC_VOID(desc); |
fac9d885 | 3760 | gpiod_set_raw_value_commit(desc, value); |
372e722e | 3761 | } |
79a9becd | 3762 | EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep); |
d2876d08 | 3763 | |
79a9becd AC |
3764 | /** |
3765 | * gpiod_set_value_cansleep() - assign a gpio's value | |
3766 | * @desc: gpio whose value will be assigned | |
3767 | * @value: value to assign | |
3768 | * | |
3769 | * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into | |
3770 | * account | |
3771 | * | |
3772 | * This function is to be called from contexts that can sleep. | |
3773 | */ | |
3774 | void gpiod_set_value_cansleep(struct gpio_desc *desc, int value) | |
d2876d08 | 3775 | { |
d2876d08 | 3776 | might_sleep_if(extra_checks); |
fdeb8e15 | 3777 | VALIDATE_DESC_VOID(desc); |
1e77fc82 | 3778 | gpiod_set_value_nocheck(desc, value); |
372e722e | 3779 | } |
79a9becd | 3780 | EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep); |
d2876d08 | 3781 | |
5f424243 | 3782 | /** |
3fff99bc | 3783 | * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs |
b9762beb | 3784 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 3785 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 3786 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3787 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
3788 | * |
3789 | * Set the raw values of the GPIOs, i.e. the values of the physical lines | |
3790 | * without regard for their ACTIVE_LOW status. | |
3791 | * | |
3792 | * This function is to be called from contexts that can sleep. | |
3793 | */ | |
3027743f | 3794 | int gpiod_set_raw_array_value_cansleep(unsigned int array_size, |
3c940660 GU |
3795 | struct gpio_desc **desc_array, |
3796 | struct gpio_array *array_info, | |
3797 | unsigned long *value_bitmap) | |
5f424243 RI |
3798 | { |
3799 | might_sleep_if(extra_checks); | |
3800 | if (!desc_array) | |
3027743f LA |
3801 | return -EINVAL; |
3802 | return gpiod_set_array_value_complex(true, true, array_size, desc_array, | |
77588c14 | 3803 | array_info, value_bitmap); |
5f424243 | 3804 | } |
3fff99bc | 3805 | EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep); |
5f424243 | 3806 | |
3946d187 DT |
3807 | /** |
3808 | * gpiod_add_lookup_tables() - register GPIO device consumers | |
3809 | * @tables: list of tables of consumers to register | |
3810 | * @n: number of tables in the list | |
3811 | */ | |
3812 | void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n) | |
3813 | { | |
3814 | unsigned int i; | |
3815 | ||
3816 | mutex_lock(&gpio_lookup_lock); | |
3817 | ||
3818 | for (i = 0; i < n; i++) | |
3819 | list_add_tail(&tables[i]->list, &gpio_lookup_list); | |
3820 | ||
3821 | mutex_unlock(&gpio_lookup_lock); | |
3822 | } | |
3823 | ||
5f424243 | 3824 | /** |
3fff99bc | 3825 | * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs |
b9762beb | 3826 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 3827 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 3828 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3829 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
3830 | * |
3831 | * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
3832 | * into account. | |
3833 | * | |
3834 | * This function is to be called from contexts that can sleep. | |
3835 | */ | |
cf9af0d5 GU |
3836 | int gpiod_set_array_value_cansleep(unsigned int array_size, |
3837 | struct gpio_desc **desc_array, | |
3838 | struct gpio_array *array_info, | |
3839 | unsigned long *value_bitmap) | |
5f424243 RI |
3840 | { |
3841 | might_sleep_if(extra_checks); | |
3842 | if (!desc_array) | |
cf9af0d5 GU |
3843 | return -EINVAL; |
3844 | return gpiod_set_array_value_complex(false, true, array_size, | |
3845 | desc_array, array_info, | |
3846 | value_bitmap); | |
5f424243 | 3847 | } |
3fff99bc | 3848 | EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep); |
5f424243 | 3849 | |
9ce4ed5b BG |
3850 | void gpiod_line_state_notify(struct gpio_desc *desc, unsigned long action) |
3851 | { | |
3852 | blocking_notifier_call_chain(&desc->gdev->line_state_notifier, | |
3853 | action, desc); | |
3854 | } | |
3855 | ||
bae48da2 | 3856 | /** |
ad824783 AC |
3857 | * gpiod_add_lookup_table() - register GPIO device consumers |
3858 | * @table: table of consumers to register | |
bae48da2 | 3859 | */ |
ad824783 | 3860 | void gpiod_add_lookup_table(struct gpiod_lookup_table *table) |
bae48da2 | 3861 | { |
49fdfe66 | 3862 | gpiod_add_lookup_tables(&table, 1); |
bae48da2 | 3863 | } |
226b2242 | 3864 | EXPORT_SYMBOL_GPL(gpiod_add_lookup_table); |
bae48da2 | 3865 | |
be9015ab SK |
3866 | /** |
3867 | * gpiod_remove_lookup_table() - unregister GPIO device consumers | |
3868 | * @table: table of consumers to unregister | |
3869 | */ | |
3870 | void gpiod_remove_lookup_table(struct gpiod_lookup_table *table) | |
3871 | { | |
d321ad12 AS |
3872 | /* Nothing to remove */ |
3873 | if (!table) | |
3874 | return; | |
3875 | ||
be9015ab SK |
3876 | mutex_lock(&gpio_lookup_lock); |
3877 | ||
3878 | list_del(&table->list); | |
3879 | ||
3880 | mutex_unlock(&gpio_lookup_lock); | |
3881 | } | |
226b2242 | 3882 | EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table); |
be9015ab | 3883 | |
a411e81e BG |
3884 | /** |
3885 | * gpiod_add_hogs() - register a set of GPIO hogs from machine code | |
3886 | * @hogs: table of gpio hog entries with a zeroed sentinel at the end | |
3887 | */ | |
3888 | void gpiod_add_hogs(struct gpiod_hog *hogs) | |
3889 | { | |
a0b66a73 | 3890 | struct gpio_chip *gc; |
a411e81e BG |
3891 | struct gpiod_hog *hog; |
3892 | ||
3893 | mutex_lock(&gpio_machine_hogs_mutex); | |
3894 | ||
3895 | for (hog = &hogs[0]; hog->chip_label; hog++) { | |
3896 | list_add_tail(&hog->list, &gpio_machine_hogs); | |
3897 | ||
3898 | /* | |
3899 | * The chip may have been registered earlier, so check if it | |
3900 | * exists and, if so, try to hog the line now. | |
3901 | */ | |
a0b66a73 LW |
3902 | gc = find_chip_by_name(hog->chip_label); |
3903 | if (gc) | |
3904 | gpiochip_machine_hog(gc, hog); | |
a411e81e BG |
3905 | } |
3906 | ||
3907 | mutex_unlock(&gpio_machine_hogs_mutex); | |
3908 | } | |
3909 | EXPORT_SYMBOL_GPL(gpiod_add_hogs); | |
3910 | ||
dd61b292 BG |
3911 | void gpiod_remove_hogs(struct gpiod_hog *hogs) |
3912 | { | |
3913 | struct gpiod_hog *hog; | |
3914 | ||
3915 | mutex_lock(&gpio_machine_hogs_mutex); | |
3916 | for (hog = &hogs[0]; hog->chip_label; hog++) | |
3917 | list_del(&hog->list); | |
3918 | mutex_unlock(&gpio_machine_hogs_mutex); | |
3919 | } | |
3920 | EXPORT_SYMBOL_GPL(gpiod_remove_hogs); | |
3921 | ||
ad824783 | 3922 | static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev) |
bae48da2 AC |
3923 | { |
3924 | const char *dev_id = dev ? dev_name(dev) : NULL; | |
ad824783 | 3925 | struct gpiod_lookup_table *table; |
bae48da2 | 3926 | |
ad824783 AC |
3927 | list_for_each_entry(table, &gpio_lookup_list, list) { |
3928 | if (table->dev_id && dev_id) { | |
3929 | /* | |
3930 | * Valid strings on both ends, must be identical to have | |
3931 | * a match | |
3932 | */ | |
3933 | if (!strcmp(table->dev_id, dev_id)) | |
c31071ea | 3934 | return table; |
ad824783 AC |
3935 | } else { |
3936 | /* | |
3937 | * One of the pointers is NULL, so both must be to have | |
3938 | * a match | |
3939 | */ | |
3940 | if (dev_id == table->dev_id) | |
c31071ea | 3941 | return table; |
ad824783 AC |
3942 | } |
3943 | } | |
bae48da2 | 3944 | |
c31071ea | 3945 | return NULL; |
ad824783 | 3946 | } |
bae48da2 | 3947 | |
ad824783 | 3948 | static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id, |
fed7026a | 3949 | unsigned int idx, unsigned long *flags) |
ad824783 | 3950 | { |
2a3cf6a3 | 3951 | struct gpio_desc *desc = ERR_PTR(-ENOENT); |
ad824783 AC |
3952 | struct gpiod_lookup_table *table; |
3953 | struct gpiod_lookup *p; | |
bae48da2 | 3954 | |
c31071ea BG |
3955 | guard(mutex)(&gpio_lookup_lock); |
3956 | ||
ad824783 AC |
3957 | table = gpiod_find_lookup_table(dev); |
3958 | if (!table) | |
3959 | return desc; | |
bae48da2 | 3960 | |
4c033b54 | 3961 | for (p = &table->table[0]; p->key; p++) { |
a0b66a73 | 3962 | struct gpio_chip *gc; |
bae48da2 | 3963 | |
ad824783 | 3964 | /* idx must always match exactly */ |
bae48da2 AC |
3965 | if (p->idx != idx) |
3966 | continue; | |
3967 | ||
ad824783 AC |
3968 | /* If the lookup entry has a con_id, require exact match */ |
3969 | if (p->con_id && (!con_id || strcmp(p->con_id, con_id))) | |
3970 | continue; | |
bae48da2 | 3971 | |
4c033b54 GU |
3972 | if (p->chip_hwnum == U16_MAX) { |
3973 | desc = gpio_name_to_desc(p->key); | |
3974 | if (desc) { | |
3975 | *flags = p->flags; | |
3976 | return desc; | |
3977 | } | |
3978 | ||
3979 | dev_warn(dev, "cannot find GPIO line %s, deferring\n", | |
3980 | p->key); | |
3981 | return ERR_PTR(-EPROBE_DEFER); | |
3982 | } | |
3983 | ||
3984 | gc = find_chip_by_name(p->key); | |
bae48da2 | 3985 | |
a0b66a73 | 3986 | if (!gc) { |
8853daf3 JK |
3987 | /* |
3988 | * As the lookup table indicates a chip with | |
4c033b54 | 3989 | * p->key should exist, assume it may |
8853daf3 JK |
3990 | * still appear later and let the interested |
3991 | * consumer be probed again or let the Deferred | |
3992 | * Probe infrastructure handle the error. | |
3993 | */ | |
3994 | dev_warn(dev, "cannot find GPIO chip %s, deferring\n", | |
4c033b54 | 3995 | p->key); |
8853daf3 | 3996 | return ERR_PTR(-EPROBE_DEFER); |
ad824783 | 3997 | } |
bae48da2 | 3998 | |
a0b66a73 | 3999 | if (gc->ngpio <= p->chip_hwnum) { |
2a3cf6a3 | 4000 | dev_err(dev, |
d935bd50 | 4001 | "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n", |
a0b66a73 LW |
4002 | idx, p->chip_hwnum, gc->ngpio - 1, |
4003 | gc->label); | |
2a3cf6a3 | 4004 | return ERR_PTR(-EINVAL); |
bae48da2 | 4005 | } |
bae48da2 | 4006 | |
a0b66a73 | 4007 | desc = gpiochip_get_desc(gc, p->chip_hwnum); |
ad824783 | 4008 | *flags = p->flags; |
bae48da2 | 4009 | |
2a3cf6a3 | 4010 | return desc; |
bae48da2 AC |
4011 | } |
4012 | ||
bae48da2 AC |
4013 | return desc; |
4014 | } | |
4015 | ||
66858527 RI |
4016 | static int platform_gpio_count(struct device *dev, const char *con_id) |
4017 | { | |
4018 | struct gpiod_lookup_table *table; | |
4019 | struct gpiod_lookup *p; | |
4020 | unsigned int count = 0; | |
4021 | ||
c31071ea BG |
4022 | scoped_guard(mutex, &gpio_lookup_lock) { |
4023 | table = gpiod_find_lookup_table(dev); | |
4024 | if (!table) | |
4025 | return -ENOENT; | |
66858527 | 4026 | |
c31071ea BG |
4027 | for (p = &table->table[0]; p->key; p++) { |
4028 | if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) || | |
4029 | (!con_id && !p->con_id)) | |
4030 | count++; | |
4031 | } | |
66858527 | 4032 | } |
c31071ea | 4033 | |
66858527 RI |
4034 | if (!count) |
4035 | return -ENOENT; | |
4036 | ||
4037 | return count; | |
4038 | } | |
4039 | ||
8eb1f71e DT |
4040 | static struct gpio_desc *gpiod_find_by_fwnode(struct fwnode_handle *fwnode, |
4041 | struct device *consumer, | |
4042 | const char *con_id, | |
4043 | unsigned int idx, | |
4044 | enum gpiod_flags *flags, | |
4045 | unsigned long *lookupflags) | |
0eadd36d | 4046 | { |
8eb1f71e | 4047 | struct gpio_desc *desc = ERR_PTR(-ENOENT); |
0eadd36d DT |
4048 | |
4049 | if (is_of_node(fwnode)) { | |
8eb1f71e DT |
4050 | dev_dbg(consumer, "using DT '%pfw' for '%s' GPIO lookup\n", |
4051 | fwnode, con_id); | |
4052 | desc = of_find_gpio(to_of_node(fwnode), con_id, idx, lookupflags); | |
0eadd36d | 4053 | } else if (is_acpi_node(fwnode)) { |
8eb1f71e DT |
4054 | dev_dbg(consumer, "using ACPI '%pfw' for '%s' GPIO lookup\n", |
4055 | fwnode, con_id); | |
4056 | desc = acpi_find_gpio(fwnode, con_id, idx, flags, lookupflags); | |
e7f9ff5d DT |
4057 | } else if (is_software_node(fwnode)) { |
4058 | dev_dbg(consumer, "using swnode '%pfw' for '%s' GPIO lookup\n", | |
4059 | fwnode, con_id); | |
4060 | desc = swnode_find_gpio(fwnode, con_id, idx, lookupflags); | |
0eadd36d | 4061 | } |
0eadd36d | 4062 | |
8eb1f71e DT |
4063 | return desc; |
4064 | } | |
0eadd36d | 4065 | |
8eb1f71e DT |
4066 | static struct gpio_desc *gpiod_find_and_request(struct device *consumer, |
4067 | struct fwnode_handle *fwnode, | |
4068 | const char *con_id, | |
4069 | unsigned int idx, | |
4070 | enum gpiod_flags flags, | |
4071 | const char *label, | |
4072 | bool platform_lookup_allowed) | |
4073 | { | |
ba2dc1cb | 4074 | unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT; |
c122f461 | 4075 | struct gpio_desc *desc; |
8eb1f71e DT |
4076 | int ret; |
4077 | ||
c122f461 | 4078 | desc = gpiod_find_by_fwnode(fwnode, consumer, con_id, idx, &flags, &lookupflags); |
8eb1f71e DT |
4079 | if (gpiod_not_found(desc) && platform_lookup_allowed) { |
4080 | /* | |
4081 | * Either we are not using DT or ACPI, or their lookup did not | |
4082 | * return a result. In that case, use platform lookup as a | |
4083 | * fallback. | |
4084 | */ | |
4085 | dev_dbg(consumer, "using lookup tables for GPIO lookup\n"); | |
4086 | desc = gpiod_find(consumer, con_id, idx, &lookupflags); | |
0eadd36d DT |
4087 | } |
4088 | ||
8eb1f71e DT |
4089 | if (IS_ERR(desc)) { |
4090 | dev_dbg(consumer, "No GPIO consumer %s found\n", con_id); | |
4091 | return desc; | |
4092 | } | |
4093 | ||
4094 | /* | |
4095 | * If a connection label was passed use that, else attempt to use | |
4096 | * the device name as label | |
4097 | */ | |
0eadd36d | 4098 | ret = gpiod_request(desc, label); |
8eb1f71e DT |
4099 | if (ret) { |
4100 | if (!(ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE)) | |
4101 | return ERR_PTR(ret); | |
0eadd36d | 4102 | |
8eb1f71e DT |
4103 | /* |
4104 | * This happens when there are several consumers for | |
4105 | * the same GPIO line: we just return here without | |
4106 | * further initialization. It is a bit of a hack. | |
4107 | * This is necessary to support fixed regulators. | |
4108 | * | |
4109 | * FIXME: Make this more sane and safe. | |
4110 | */ | |
4111 | dev_info(consumer, | |
4112 | "nonexclusive access to GPIO for %s\n", con_id); | |
4113 | return desc; | |
4114 | } | |
0eadd36d | 4115 | |
8eb1f71e | 4116 | ret = gpiod_configure_flags(desc, con_id, lookupflags, flags); |
0eadd36d | 4117 | if (ret < 0) { |
8eb1f71e | 4118 | dev_dbg(consumer, "setup of GPIO %s failed\n", con_id); |
0eadd36d DT |
4119 | gpiod_put(desc); |
4120 | return ERR_PTR(ret); | |
4121 | } | |
4122 | ||
9ce4ed5b | 4123 | gpiod_line_state_notify(desc, GPIOLINE_CHANGED_REQUESTED); |
0eadd36d DT |
4124 | |
4125 | return desc; | |
4126 | } | |
4127 | ||
13949fa9 DT |
4128 | /** |
4129 | * fwnode_gpiod_get_index - obtain a GPIO from firmware node | |
4130 | * @fwnode: handle of the firmware node | |
4131 | * @con_id: function within the GPIO consumer | |
4132 | * @index: index of the GPIO to obtain for the consumer | |
4133 | * @flags: GPIO initialization flags | |
4134 | * @label: label to attach to the requested GPIO | |
4135 | * | |
4136 | * This function can be used for drivers that get their configuration | |
4137 | * from opaque firmware. | |
4138 | * | |
4139 | * The function properly finds the corresponding GPIO using whatever is the | |
4140 | * underlying firmware interface and then makes sure that the GPIO | |
4141 | * descriptor is requested before it is returned to the caller. | |
4142 | * | |
4143 | * Returns: | |
4144 | * On successful request the GPIO pin is configured in accordance with | |
4145 | * provided @flags. | |
4146 | * | |
4147 | * In case of error an ERR_PTR() is returned. | |
4148 | */ | |
4149 | struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode, | |
8eb1f71e DT |
4150 | const char *con_id, |
4151 | int index, | |
13949fa9 DT |
4152 | enum gpiod_flags flags, |
4153 | const char *label) | |
4154 | { | |
8eb1f71e | 4155 | return gpiod_find_and_request(NULL, fwnode, con_id, index, flags, label, false); |
13949fa9 DT |
4156 | } |
4157 | EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index); | |
4158 | ||
66858527 RI |
4159 | /** |
4160 | * gpiod_count - return the number of GPIOs associated with a device / function | |
4161 | * or -ENOENT if no GPIO has been assigned to the requested function | |
4162 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4163 | * @con_id: function within the GPIO consumer | |
4164 | */ | |
4165 | int gpiod_count(struct device *dev, const char *con_id) | |
4166 | { | |
944f4b0a | 4167 | const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL; |
66858527 RI |
4168 | int count = -ENOENT; |
4169 | ||
944f4b0a | 4170 | if (is_of_node(fwnode)) |
f626d6df | 4171 | count = of_gpio_get_count(dev, con_id); |
944f4b0a | 4172 | else if (is_acpi_node(fwnode)) |
66858527 | 4173 | count = acpi_gpio_count(dev, con_id); |
e7f9ff5d DT |
4174 | else if (is_software_node(fwnode)) |
4175 | count = swnode_gpio_count(fwnode, con_id); | |
66858527 RI |
4176 | |
4177 | if (count < 0) | |
4178 | count = platform_gpio_count(dev, con_id); | |
4179 | ||
4180 | return count; | |
4181 | } | |
4182 | EXPORT_SYMBOL_GPL(gpiod_count); | |
4183 | ||
bae48da2 | 4184 | /** |
0879162f | 4185 | * gpiod_get - obtain a GPIO for a given GPIO function |
ad824783 | 4186 | * @dev: GPIO consumer, can be NULL for system-global GPIOs |
bae48da2 | 4187 | * @con_id: function within the GPIO consumer |
39b2bbe3 | 4188 | * @flags: optional GPIO initialization flags |
bae48da2 AC |
4189 | * |
4190 | * Return the GPIO descriptor corresponding to the function con_id of device | |
2a3cf6a3 | 4191 | * dev, -ENOENT if no GPIO has been assigned to the requested function, or |
20a8a968 | 4192 | * another IS_ERR() code if an error occurred while trying to acquire the GPIO. |
bae48da2 | 4193 | */ |
b17d1bf1 | 4194 | struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id, |
39b2bbe3 | 4195 | enum gpiod_flags flags) |
bae48da2 | 4196 | { |
39b2bbe3 | 4197 | return gpiod_get_index(dev, con_id, 0, flags); |
bae48da2 | 4198 | } |
b17d1bf1 | 4199 | EXPORT_SYMBOL_GPL(gpiod_get); |
bae48da2 | 4200 | |
29a1f233 TR |
4201 | /** |
4202 | * gpiod_get_optional - obtain an optional GPIO for a given GPIO function | |
4203 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4204 | * @con_id: function within the GPIO consumer | |
39b2bbe3 | 4205 | * @flags: optional GPIO initialization flags |
29a1f233 TR |
4206 | * |
4207 | * This is equivalent to gpiod_get(), except that when no GPIO was assigned to | |
4208 | * the requested function it will return NULL. This is convenient for drivers | |
4209 | * that need to handle optional GPIOs. | |
4210 | */ | |
b17d1bf1 | 4211 | struct gpio_desc *__must_check gpiod_get_optional(struct device *dev, |
39b2bbe3 AC |
4212 | const char *con_id, |
4213 | enum gpiod_flags flags) | |
29a1f233 | 4214 | { |
39b2bbe3 | 4215 | return gpiod_get_index_optional(dev, con_id, 0, flags); |
29a1f233 | 4216 | } |
b17d1bf1 | 4217 | EXPORT_SYMBOL_GPL(gpiod_get_optional); |
29a1f233 | 4218 | |
f625d460 BP |
4219 | |
4220 | /** | |
4221 | * gpiod_configure_flags - helper function to configure a given GPIO | |
4222 | * @desc: gpio whose value will be assigned | |
4223 | * @con_id: function within the GPIO consumer | |
fed7026a AS |
4224 | * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from |
4225 | * of_find_gpio() or of_get_gpio_hog() | |
f625d460 BP |
4226 | * @dflags: gpiod_flags - optional GPIO initialization flags |
4227 | * | |
4228 | * Return 0 on success, -ENOENT if no GPIO has been assigned to the | |
4229 | * requested function and/or index, or another IS_ERR() code if an error | |
4230 | * occurred while trying to acquire the GPIO. | |
4231 | */ | |
c29fd9eb | 4232 | int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id, |
85b03b30 | 4233 | unsigned long lflags, enum gpiod_flags dflags) |
f625d460 | 4234 | { |
d377f56f | 4235 | int ret; |
f625d460 | 4236 | |
85b03b30 JH |
4237 | if (lflags & GPIO_ACTIVE_LOW) |
4238 | set_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
f926dfc1 | 4239 | |
85b03b30 JH |
4240 | if (lflags & GPIO_OPEN_DRAIN) |
4241 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | |
f926dfc1 LW |
4242 | else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) { |
4243 | /* | |
4244 | * This enforces open drain mode from the consumer side. | |
4245 | * This is necessary for some busses like I2C, but the lookup | |
4246 | * should *REALLY* have specified them as open drain in the | |
4247 | * first place, so print a little warning here. | |
4248 | */ | |
4249 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | |
4250 | gpiod_warn(desc, | |
4251 | "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n"); | |
4252 | } | |
4253 | ||
85b03b30 JH |
4254 | if (lflags & GPIO_OPEN_SOURCE) |
4255 | set_bit(FLAG_OPEN_SOURCE, &desc->flags); | |
e10f72bf | 4256 | |
c269df8c NS |
4257 | if (((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) || |
4258 | ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DISABLE)) || | |
4259 | ((lflags & GPIO_PULL_DOWN) && (lflags & GPIO_PULL_DISABLE))) { | |
d449991c | 4260 | gpiod_err(desc, |
c269df8c | 4261 | "multiple pull-up, pull-down or pull-disable enabled, invalid configuration\n"); |
d449991c TP |
4262 | return -EINVAL; |
4263 | } | |
4264 | ||
4265 | if (lflags & GPIO_PULL_UP) | |
4266 | set_bit(FLAG_PULL_UP, &desc->flags); | |
4267 | else if (lflags & GPIO_PULL_DOWN) | |
4268 | set_bit(FLAG_PULL_DOWN, &desc->flags); | |
c269df8c NS |
4269 | else if (lflags & GPIO_PULL_DISABLE) |
4270 | set_bit(FLAG_BIAS_DISABLE, &desc->flags); | |
d449991c | 4271 | |
d377f56f LW |
4272 | ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY)); |
4273 | if (ret < 0) | |
4274 | return ret; | |
85b03b30 | 4275 | |
f625d460 BP |
4276 | /* No particular flag request, return here... */ |
4277 | if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) { | |
262b9011 | 4278 | gpiod_dbg(desc, "no flags found for %s\n", con_id); |
f625d460 BP |
4279 | return 0; |
4280 | } | |
4281 | ||
4282 | /* Process flags */ | |
4283 | if (dflags & GPIOD_FLAGS_BIT_DIR_OUT) | |
d377f56f | 4284 | ret = gpiod_direction_output(desc, |
ad17731d | 4285 | !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL)); |
f625d460 | 4286 | else |
d377f56f | 4287 | ret = gpiod_direction_input(desc); |
f625d460 | 4288 | |
d377f56f | 4289 | return ret; |
f625d460 BP |
4290 | } |
4291 | ||
bae48da2 AC |
4292 | /** |
4293 | * gpiod_get_index - obtain a GPIO from a multi-index GPIO function | |
fdd6a5fe | 4294 | * @dev: GPIO consumer, can be NULL for system-global GPIOs |
bae48da2 AC |
4295 | * @con_id: function within the GPIO consumer |
4296 | * @idx: index of the GPIO to obtain in the consumer | |
39b2bbe3 | 4297 | * @flags: optional GPIO initialization flags |
bae48da2 AC |
4298 | * |
4299 | * This variant of gpiod_get() allows to access GPIOs other than the first | |
4300 | * defined one for functions that define several GPIOs. | |
4301 | * | |
2a3cf6a3 AC |
4302 | * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the |
4303 | * requested function and/or index, or another IS_ERR() code if an error | |
20a8a968 | 4304 | * occurred while trying to acquire the GPIO. |
bae48da2 | 4305 | */ |
b17d1bf1 | 4306 | struct gpio_desc *__must_check gpiod_get_index(struct device *dev, |
bae48da2 | 4307 | const char *con_id, |
39b2bbe3 AC |
4308 | unsigned int idx, |
4309 | enum gpiod_flags flags) | |
bae48da2 | 4310 | { |
07445ae1 | 4311 | struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL; |
7d18f0a1 | 4312 | const char *devname = dev ? dev_name(dev) : "?"; |
8eb1f71e | 4313 | const char *label = con_id ?: devname; |
bae48da2 | 4314 | |
8eb1f71e | 4315 | return gpiod_find_and_request(dev, fwnode, con_id, idx, flags, label, true); |
6392cca4 | 4316 | } |
b17d1bf1 | 4317 | EXPORT_SYMBOL_GPL(gpiod_get_index); |
6392cca4 | 4318 | |
29a1f233 TR |
4319 | /** |
4320 | * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO | |
4321 | * function | |
4322 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4323 | * @con_id: function within the GPIO consumer | |
4324 | * @index: index of the GPIO to obtain in the consumer | |
39b2bbe3 | 4325 | * @flags: optional GPIO initialization flags |
29a1f233 TR |
4326 | * |
4327 | * This is equivalent to gpiod_get_index(), except that when no GPIO with the | |
4328 | * specified index was assigned to the requested function it will return NULL. | |
4329 | * This is convenient for drivers that need to handle optional GPIOs. | |
4330 | */ | |
b17d1bf1 | 4331 | struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev, |
29a1f233 | 4332 | const char *con_id, |
39b2bbe3 AC |
4333 | unsigned int index, |
4334 | enum gpiod_flags flags) | |
29a1f233 TR |
4335 | { |
4336 | struct gpio_desc *desc; | |
4337 | ||
39b2bbe3 | 4338 | desc = gpiod_get_index(dev, con_id, index, flags); |
7b58696d AS |
4339 | if (gpiod_not_found(desc)) |
4340 | return NULL; | |
29a1f233 TR |
4341 | |
4342 | return desc; | |
4343 | } | |
b17d1bf1 | 4344 | EXPORT_SYMBOL_GPL(gpiod_get_index_optional); |
29a1f233 | 4345 | |
f625d460 BP |
4346 | /** |
4347 | * gpiod_hog - Hog the specified GPIO desc given the provided flags | |
4348 | * @desc: gpio whose value will be assigned | |
4349 | * @name: gpio line name | |
fed7026a AS |
4350 | * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from |
4351 | * of_find_gpio() or of_get_gpio_hog() | |
f625d460 BP |
4352 | * @dflags: gpiod_flags - optional GPIO initialization flags |
4353 | */ | |
4354 | int gpiod_hog(struct gpio_desc *desc, const char *name, | |
4355 | unsigned long lflags, enum gpiod_flags dflags) | |
4356 | { | |
a0b66a73 | 4357 | struct gpio_chip *gc; |
f625d460 BP |
4358 | struct gpio_desc *local_desc; |
4359 | int hwnum; | |
d377f56f | 4360 | int ret; |
f625d460 | 4361 | |
a0b66a73 | 4362 | gc = gpiod_to_chip(desc); |
f625d460 BP |
4363 | hwnum = gpio_chip_hwgpio(desc); |
4364 | ||
a0b66a73 | 4365 | local_desc = gpiochip_request_own_desc(gc, hwnum, name, |
5923ea6c | 4366 | lflags, dflags); |
f625d460 | 4367 | if (IS_ERR(local_desc)) { |
d377f56f | 4368 | ret = PTR_ERR(local_desc); |
c31a571d | 4369 | pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n", |
a0b66a73 | 4370 | name, gc->label, hwnum, ret); |
d377f56f | 4371 | return ret; |
f625d460 BP |
4372 | } |
4373 | ||
f625d460 BP |
4374 | /* Mark GPIO as hogged so it can be identified and removed later */ |
4375 | set_bit(FLAG_IS_HOGGED, &desc->flags); | |
4376 | ||
be6736cc | 4377 | gpiod_dbg(desc, "hogged as %s%s\n", |
b27f300f BG |
4378 | (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input", |
4379 | (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? | |
4380 | (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : ""); | |
f625d460 BP |
4381 | |
4382 | return 0; | |
4383 | } | |
4384 | ||
4385 | /** | |
4386 | * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog | |
a0b66a73 | 4387 | * @gc: gpio chip to act on |
f625d460 | 4388 | */ |
a0b66a73 | 4389 | static void gpiochip_free_hogs(struct gpio_chip *gc) |
f625d460 | 4390 | { |
80c78fbe | 4391 | struct gpio_desc *desc; |
f625d460 | 4392 | |
57017edd | 4393 | for_each_gpio_desc_with_flag(gc, desc, FLAG_IS_HOGGED) |
80c78fbe | 4394 | gpiochip_free_own_desc(desc); |
f625d460 BP |
4395 | } |
4396 | ||
66858527 RI |
4397 | /** |
4398 | * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function | |
4399 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4400 | * @con_id: function within the GPIO consumer | |
4401 | * @flags: optional GPIO initialization flags | |
4402 | * | |
4403 | * This function acquires all the GPIOs defined under a given function. | |
4404 | * | |
4405 | * Return a struct gpio_descs containing an array of descriptors, -ENOENT if | |
4406 | * no GPIO has been assigned to the requested function, or another IS_ERR() | |
4407 | * code if an error occurred while trying to acquire the GPIOs. | |
4408 | */ | |
4409 | struct gpio_descs *__must_check gpiod_get_array(struct device *dev, | |
4410 | const char *con_id, | |
4411 | enum gpiod_flags flags) | |
4412 | { | |
4413 | struct gpio_desc *desc; | |
4414 | struct gpio_descs *descs; | |
bf9346f5 | 4415 | struct gpio_array *array_info = NULL; |
a0b66a73 | 4416 | struct gpio_chip *gc; |
bf9346f5 | 4417 | int count, bitmap_size; |
79736429 | 4418 | size_t descs_size; |
66858527 RI |
4419 | |
4420 | count = gpiod_count(dev, con_id); | |
4421 | if (count < 0) | |
4422 | return ERR_PTR(count); | |
4423 | ||
79736429 AS |
4424 | descs_size = struct_size(descs, desc, count); |
4425 | descs = kzalloc(descs_size, GFP_KERNEL); | |
66858527 RI |
4426 | if (!descs) |
4427 | return ERR_PTR(-ENOMEM); | |
4428 | ||
4ea0c977 | 4429 | for (descs->ndescs = 0; descs->ndescs < count; descs->ndescs++) { |
66858527 RI |
4430 | desc = gpiod_get_index(dev, con_id, descs->ndescs, flags); |
4431 | if (IS_ERR(desc)) { | |
4432 | gpiod_put_array(descs); | |
4433 | return ERR_CAST(desc); | |
4434 | } | |
bf9346f5 | 4435 | |
66858527 | 4436 | descs->desc[descs->ndescs] = desc; |
bf9346f5 | 4437 | |
a0b66a73 | 4438 | gc = gpiod_to_chip(desc); |
bf9346f5 | 4439 | /* |
c4c958aa JK |
4440 | * If pin hardware number of array member 0 is also 0, select |
4441 | * its chip as a candidate for fast bitmap processing path. | |
bf9346f5 | 4442 | */ |
c4c958aa | 4443 | if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) { |
bf9346f5 JK |
4444 | struct gpio_descs *array; |
4445 | ||
a0b66a73 LW |
4446 | bitmap_size = BITS_TO_LONGS(gc->ngpio > count ? |
4447 | gc->ngpio : count); | |
bf9346f5 | 4448 | |
79736429 AS |
4449 | array = krealloc(descs, descs_size + |
4450 | struct_size(array_info, invert_mask, 3 * bitmap_size), | |
4451 | GFP_KERNEL | __GFP_ZERO); | |
bf9346f5 JK |
4452 | if (!array) { |
4453 | gpiod_put_array(descs); | |
4454 | return ERR_PTR(-ENOMEM); | |
4455 | } | |
4456 | ||
bf9346f5 | 4457 | descs = array; |
79736429 AS |
4458 | |
4459 | array_info = (void *)descs + descs_size; | |
bf9346f5 JK |
4460 | array_info->get_mask = array_info->invert_mask + |
4461 | bitmap_size; | |
4462 | array_info->set_mask = array_info->get_mask + | |
4463 | bitmap_size; | |
4464 | ||
4465 | array_info->desc = descs->desc; | |
4466 | array_info->size = count; | |
a0b66a73 | 4467 | array_info->chip = gc; |
bf9346f5 JK |
4468 | bitmap_set(array_info->get_mask, descs->ndescs, |
4469 | count - descs->ndescs); | |
4470 | bitmap_set(array_info->set_mask, descs->ndescs, | |
4471 | count - descs->ndescs); | |
4472 | descs->info = array_info; | |
4473 | } | |
4ea0c977 AS |
4474 | |
4475 | /* If there is no cache for fast bitmap processing path, continue */ | |
4476 | if (!array_info) | |
4477 | continue; | |
4478 | ||
c4c958aa | 4479 | /* Unmark array members which don't belong to the 'fast' chip */ |
4ea0c977 | 4480 | if (array_info->chip != gc) { |
bf9346f5 JK |
4481 | __clear_bit(descs->ndescs, array_info->get_mask); |
4482 | __clear_bit(descs->ndescs, array_info->set_mask); | |
c4c958aa JK |
4483 | } |
4484 | /* | |
4485 | * Detect array members which belong to the 'fast' chip | |
4486 | * but their pins are not in hardware order. | |
4487 | */ | |
4ea0c977 | 4488 | else if (gpio_chip_hwgpio(desc) != descs->ndescs) { |
c4c958aa JK |
4489 | /* |
4490 | * Don't use fast path if all array members processed so | |
4491 | * far belong to the same chip as this one but its pin | |
4492 | * hardware number is different from its array index. | |
4493 | */ | |
4494 | if (bitmap_full(array_info->get_mask, descs->ndescs)) { | |
4495 | array_info = NULL; | |
4496 | } else { | |
4497 | __clear_bit(descs->ndescs, | |
4498 | array_info->get_mask); | |
4499 | __clear_bit(descs->ndescs, | |
4500 | array_info->set_mask); | |
4501 | } | |
4ea0c977 | 4502 | } else { |
bf9346f5 | 4503 | /* Exclude open drain or open source from fast output */ |
a0b66a73 LW |
4504 | if (gpiochip_line_is_open_drain(gc, descs->ndescs) || |
4505 | gpiochip_line_is_open_source(gc, descs->ndescs)) | |
bf9346f5 JK |
4506 | __clear_bit(descs->ndescs, |
4507 | array_info->set_mask); | |
4508 | /* Identify 'fast' pins which require invertion */ | |
4509 | if (gpiod_is_active_low(desc)) | |
4510 | __set_bit(descs->ndescs, | |
4511 | array_info->invert_mask); | |
4512 | } | |
66858527 | 4513 | } |
bf9346f5 JK |
4514 | if (array_info) |
4515 | dev_dbg(dev, | |
4516 | "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n", | |
4517 | array_info->chip->label, array_info->size, | |
4518 | *array_info->get_mask, *array_info->set_mask, | |
4519 | *array_info->invert_mask); | |
66858527 RI |
4520 | return descs; |
4521 | } | |
4522 | EXPORT_SYMBOL_GPL(gpiod_get_array); | |
4523 | ||
4524 | /** | |
4525 | * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO | |
4526 | * function | |
4527 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4528 | * @con_id: function within the GPIO consumer | |
4529 | * @flags: optional GPIO initialization flags | |
4530 | * | |
4531 | * This is equivalent to gpiod_get_array(), except that when no GPIO was | |
4532 | * assigned to the requested function it will return NULL. | |
4533 | */ | |
4534 | struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev, | |
4535 | const char *con_id, | |
4536 | enum gpiod_flags flags) | |
4537 | { | |
4538 | struct gpio_descs *descs; | |
4539 | ||
4540 | descs = gpiod_get_array(dev, con_id, flags); | |
7b58696d | 4541 | if (gpiod_not_found(descs)) |
66858527 RI |
4542 | return NULL; |
4543 | ||
4544 | return descs; | |
4545 | } | |
4546 | EXPORT_SYMBOL_GPL(gpiod_get_array_optional); | |
4547 | ||
bae48da2 AC |
4548 | /** |
4549 | * gpiod_put - dispose of a GPIO descriptor | |
4550 | * @desc: GPIO descriptor to dispose of | |
4551 | * | |
4552 | * No descriptor can be used after gpiod_put() has been called on it. | |
4553 | */ | |
4554 | void gpiod_put(struct gpio_desc *desc) | |
4555 | { | |
1d7765ba AS |
4556 | if (desc) |
4557 | gpiod_free(desc); | |
372e722e | 4558 | } |
bae48da2 | 4559 | EXPORT_SYMBOL_GPL(gpiod_put); |
d2876d08 | 4560 | |
66858527 RI |
4561 | /** |
4562 | * gpiod_put_array - dispose of multiple GPIO descriptors | |
4563 | * @descs: struct gpio_descs containing an array of descriptors | |
4564 | */ | |
4565 | void gpiod_put_array(struct gpio_descs *descs) | |
4566 | { | |
4567 | unsigned int i; | |
4568 | ||
4569 | for (i = 0; i < descs->ndescs; i++) | |
4570 | gpiod_put(descs->desc[i]); | |
4571 | ||
4572 | kfree(descs); | |
4573 | } | |
4574 | EXPORT_SYMBOL_GPL(gpiod_put_array); | |
4575 | ||
4731210c SK |
4576 | static int gpio_stub_drv_probe(struct device *dev) |
4577 | { | |
4578 | /* | |
4579 | * The DT node of some GPIO chips have a "compatible" property, but | |
4580 | * never have a struct device added and probed by a driver to register | |
4581 | * the GPIO chip with gpiolib. In such cases, fw_devlink=on will cause | |
4582 | * the consumers of the GPIO chip to get probe deferred forever because | |
4583 | * they will be waiting for a device associated with the GPIO chip | |
4584 | * firmware node to get added and bound to a driver. | |
4585 | * | |
4586 | * To allow these consumers to probe, we associate the struct | |
4587 | * gpio_device of the GPIO chip with the firmware node and then simply | |
4588 | * bind it to this stub driver. | |
4589 | */ | |
4590 | return 0; | |
4591 | } | |
4592 | ||
4593 | static struct device_driver gpio_stub_drv = { | |
4594 | .name = "gpio_stub_drv", | |
4595 | .bus = &gpio_bus_type, | |
4596 | .probe = gpio_stub_drv_probe, | |
4597 | }; | |
4598 | ||
3c702e99 LW |
4599 | static int __init gpiolib_dev_init(void) |
4600 | { | |
4601 | int ret; | |
4602 | ||
4603 | /* Register GPIO sysfs bus */ | |
b1911710 | 4604 | ret = bus_register(&gpio_bus_type); |
3c702e99 LW |
4605 | if (ret < 0) { |
4606 | pr_err("gpiolib: could not register GPIO bus type\n"); | |
4607 | return ret; | |
4608 | } | |
4609 | ||
3875721e WY |
4610 | ret = driver_register(&gpio_stub_drv); |
4611 | if (ret < 0) { | |
4731210c SK |
4612 | pr_err("gpiolib: could not register GPIO stub driver\n"); |
4613 | bus_unregister(&gpio_bus_type); | |
4614 | return ret; | |
4615 | } | |
4616 | ||
ddd8891e | 4617 | ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME); |
3c702e99 LW |
4618 | if (ret < 0) { |
4619 | pr_err("gpiolib: failed to allocate char dev region\n"); | |
4731210c | 4620 | driver_unregister(&gpio_stub_drv); |
3c702e99 | 4621 | bus_unregister(&gpio_bus_type); |
63636d95 | 4622 | return ret; |
3c702e99 | 4623 | } |
63636d95 GU |
4624 | |
4625 | gpiolib_initialized = true; | |
4626 | gpiochip_setup_devs(); | |
4627 | ||
8650b609 DG |
4628 | #if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO) |
4629 | WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier)); | |
4630 | #endif /* CONFIG_OF_DYNAMIC && CONFIG_OF_GPIO */ | |
63636d95 | 4631 | |
3c702e99 LW |
4632 | return ret; |
4633 | } | |
4634 | core_initcall(gpiolib_dev_init); | |
4635 | ||
d2876d08 DB |
4636 | #ifdef CONFIG_DEBUG_FS |
4637 | ||
fdeb8e15 | 4638 | static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev) |
d2876d08 | 4639 | { |
a0b66a73 | 4640 | struct gpio_chip *gc = gdev->chip; |
3de69ae1 | 4641 | struct gpio_desc *desc; |
fdeb8e15 | 4642 | unsigned gpio = gdev->base; |
3de69ae1 | 4643 | int value; |
90fd2270 LW |
4644 | bool is_out; |
4645 | bool is_irq; | |
4646 | bool active_low; | |
d2876d08 | 4647 | |
3de69ae1 AS |
4648 | for_each_gpio_desc(gc, desc) { |
4649 | if (test_bit(FLAG_REQUESTED, &desc->flags)) { | |
4650 | gpiod_get_direction(desc); | |
4651 | is_out = test_bit(FLAG_IS_OUT, &desc->flags); | |
234c5209 | 4652 | value = gpio_chip_get_value(gc, desc); |
3de69ae1 AS |
4653 | is_irq = test_bit(FLAG_USED_AS_IRQ, &desc->flags); |
4654 | active_low = test_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
4655 | seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s\n", | |
4656 | gpio, desc->name ?: "", desc->label, | |
4657 | is_out ? "out" : "in ", | |
4658 | value >= 0 ? (value ? "hi" : "lo") : "? ", | |
4659 | is_irq ? "IRQ " : "", | |
4660 | active_low ? "ACTIVE LOW" : ""); | |
4661 | } else if (desc->name) { | |
4662 | seq_printf(s, " gpio-%-3d (%-20.20s)\n", gpio, desc->name); | |
ced433e2 | 4663 | } |
d2876d08 | 4664 | |
3de69ae1 | 4665 | gpio++; |
d2876d08 DB |
4666 | } |
4667 | } | |
4668 | ||
f9c4a31f | 4669 | static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos) |
d2876d08 | 4670 | { |
362432ae | 4671 | unsigned long flags; |
ff2b1359 | 4672 | struct gpio_device *gdev = NULL; |
cb1650d4 | 4673 | loff_t index = *pos; |
d2876d08 | 4674 | |
f9c4a31f | 4675 | s->private = ""; |
d2876d08 | 4676 | |
362432ae | 4677 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 4678 | list_for_each_entry(gdev, &gpio_devices, list) |
362432ae GL |
4679 | if (index-- == 0) { |
4680 | spin_unlock_irqrestore(&gpio_lock, flags); | |
ff2b1359 | 4681 | return gdev; |
f9c4a31f | 4682 | } |
362432ae | 4683 | spin_unlock_irqrestore(&gpio_lock, flags); |
f9c4a31f | 4684 | |
cb1650d4 | 4685 | return NULL; |
f9c4a31f TR |
4686 | } |
4687 | ||
4688 | static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos) | |
4689 | { | |
362432ae | 4690 | unsigned long flags; |
ff2b1359 | 4691 | struct gpio_device *gdev = v; |
f9c4a31f TR |
4692 | void *ret = NULL; |
4693 | ||
362432ae | 4694 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 4695 | if (list_is_last(&gdev->list, &gpio_devices)) |
cb1650d4 AC |
4696 | ret = NULL; |
4697 | else | |
243cfa6a | 4698 | ret = list_first_entry(&gdev->list, struct gpio_device, list); |
362432ae | 4699 | spin_unlock_irqrestore(&gpio_lock, flags); |
f9c4a31f TR |
4700 | |
4701 | s->private = "\n"; | |
4702 | ++*pos; | |
4703 | ||
4704 | return ret; | |
4705 | } | |
4706 | ||
4707 | static void gpiolib_seq_stop(struct seq_file *s, void *v) | |
4708 | { | |
4709 | } | |
4710 | ||
4711 | static int gpiolib_seq_show(struct seq_file *s, void *v) | |
4712 | { | |
ff2b1359 | 4713 | struct gpio_device *gdev = v; |
a0b66a73 | 4714 | struct gpio_chip *gc = gdev->chip; |
ff2b1359 LW |
4715 | struct device *parent; |
4716 | ||
a0b66a73 | 4717 | if (!gc) { |
ff2b1359 LW |
4718 | seq_printf(s, "%s%s: (dangling chip)", (char *)s->private, |
4719 | dev_name(&gdev->dev)); | |
4720 | return 0; | |
4721 | } | |
f9c4a31f | 4722 | |
ff2b1359 LW |
4723 | seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private, |
4724 | dev_name(&gdev->dev), | |
fdeb8e15 | 4725 | gdev->base, gdev->base + gdev->ngpio - 1); |
a0b66a73 | 4726 | parent = gc->parent; |
ff2b1359 LW |
4727 | if (parent) |
4728 | seq_printf(s, ", parent: %s/%s", | |
4729 | parent->bus ? parent->bus->name : "no-bus", | |
4730 | dev_name(parent)); | |
a0b66a73 LW |
4731 | if (gc->label) |
4732 | seq_printf(s, ", %s", gc->label); | |
4733 | if (gc->can_sleep) | |
f9c4a31f TR |
4734 | seq_printf(s, ", can sleep"); |
4735 | seq_printf(s, ":\n"); | |
4736 | ||
a0b66a73 LW |
4737 | if (gc->dbg_show) |
4738 | gc->dbg_show(s, gc); | |
f9c4a31f | 4739 | else |
fdeb8e15 | 4740 | gpiolib_dbg_show(s, gdev); |
f9c4a31f | 4741 | |
d2876d08 DB |
4742 | return 0; |
4743 | } | |
4744 | ||
425c5b3e | 4745 | static const struct seq_operations gpiolib_sops = { |
f9c4a31f TR |
4746 | .start = gpiolib_seq_start, |
4747 | .next = gpiolib_seq_next, | |
4748 | .stop = gpiolib_seq_stop, | |
4749 | .show = gpiolib_seq_show, | |
4750 | }; | |
425c5b3e | 4751 | DEFINE_SEQ_ATTRIBUTE(gpiolib); |
d2876d08 DB |
4752 | |
4753 | static int __init gpiolib_debugfs_init(void) | |
4754 | { | |
4755 | /* /sys/kernel/debug/gpio */ | |
425c5b3e | 4756 | debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops); |
d2876d08 DB |
4757 | return 0; |
4758 | } | |
4759 | subsys_initcall(gpiolib_debugfs_init); | |
4760 | ||
4761 | #endif /* DEBUG_FS */ |