Commit | Line | Data |
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dae5f0af | 1 | // SPDX-License-Identifier: GPL-2.0 |
c47d9e1b | 2 | |
923a654c | 3 | #include <linux/bitmap.h> |
d2876d08 DB |
4 | #include <linux/kernel.h> |
5 | #include <linux/module.h> | |
ff77c352 | 6 | #include <linux/interrupt.h> |
d2876d08 DB |
7 | #include <linux/irq.h> |
8 | #include <linux/spinlock.h> | |
1a989d0f | 9 | #include <linux/list.h> |
d8f388d8 DB |
10 | #include <linux/device.h> |
11 | #include <linux/err.h> | |
12 | #include <linux/debugfs.h> | |
13 | #include <linux/seq_file.h> | |
14 | #include <linux/gpio.h> | |
ff77c352 | 15 | #include <linux/idr.h> |
5a0e3ad6 | 16 | #include <linux/slab.h> |
7b199811 | 17 | #include <linux/acpi.h> |
53e7cac3 | 18 | #include <linux/gpio/driver.h> |
0a6d3158 | 19 | #include <linux/gpio/machine.h> |
c771c2f4 | 20 | #include <linux/pinctrl/consumer.h> |
3c702e99 | 21 | #include <linux/fs.h> |
8b92e17e | 22 | #include <linux/compat.h> |
953b956a | 23 | #include <linux/file.h> |
3c702e99 | 24 | #include <uapi/linux/gpio.h> |
d2876d08 | 25 | |
664e3e5a | 26 | #include "gpiolib.h" |
f626d6df | 27 | #include "gpiolib-of.h" |
77cb907a | 28 | #include "gpiolib-acpi.h" |
925ca369 | 29 | #include "gpiolib-cdev.h" |
ef087d8e | 30 | #include "gpiolib-sysfs.h" |
664e3e5a | 31 | |
3f397c21 UKK |
32 | #define CREATE_TRACE_POINTS |
33 | #include <trace/events/gpio.h> | |
d2876d08 | 34 | |
79a9becd | 35 | /* Implementation infrastructure for GPIO interfaces. |
d2876d08 | 36 | * |
79a9becd AC |
37 | * The GPIO programming interface allows for inlining speed-critical |
38 | * get/set operations for common cases, so that access to SOC-integrated | |
39 | * GPIOs can sometimes cost only an instruction or two per bit. | |
d2876d08 DB |
40 | */ |
41 | ||
42 | ||
43 | /* When debugging, extend minimal trust to callers and platform code. | |
44 | * Also emit diagnostic messages that may help initial bringup, when | |
45 | * board setup or driver bugs are most common. | |
46 | * | |
47 | * Otherwise, minimize overhead in what may be bitbanging codepaths. | |
48 | */ | |
49 | #ifdef DEBUG | |
50 | #define extra_checks 1 | |
51 | #else | |
52 | #define extra_checks 0 | |
53 | #endif | |
54 | ||
ff2b1359 LW |
55 | /* Device and char device-related information */ |
56 | static DEFINE_IDA(gpio_ida); | |
3c702e99 LW |
57 | static dev_t gpio_devt; |
58 | #define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */ | |
ced2af41 | 59 | static int gpio_bus_match(struct device *dev, struct device_driver *drv); |
3c702e99 LW |
60 | static struct bus_type gpio_bus_type = { |
61 | .name = "gpio", | |
ced2af41 | 62 | .match = gpio_bus_match, |
3c702e99 | 63 | }; |
ff2b1359 | 64 | |
3027743f LA |
65 | /* |
66 | * Number of GPIOs to use for the fast path in set array | |
67 | */ | |
68 | #define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT | |
69 | ||
d2876d08 DB |
70 | /* gpio_lock prevents conflicts during gpio_desc[] table updates. |
71 | * While any GPIO is requested, its gpio_chip is not removable; | |
72 | * each GPIO's "requested" flag serves as a lock and refcount. | |
73 | */ | |
0eb4c6c2 | 74 | DEFINE_SPINLOCK(gpio_lock); |
d2876d08 | 75 | |
bae48da2 AC |
76 | static DEFINE_MUTEX(gpio_lookup_lock); |
77 | static LIST_HEAD(gpio_lookup_list); | |
ff2b1359 | 78 | LIST_HEAD(gpio_devices); |
6d86750c | 79 | |
a411e81e BG |
80 | static DEFINE_MUTEX(gpio_machine_hogs_mutex); |
81 | static LIST_HEAD(gpio_machine_hogs); | |
82 | ||
a0b66a73 LW |
83 | static void gpiochip_free_hogs(struct gpio_chip *gc); |
84 | static int gpiochip_add_irqchip(struct gpio_chip *gc, | |
39c3fd58 AL |
85 | struct lock_class_key *lock_key, |
86 | struct lock_class_key *request_key); | |
a0b66a73 LW |
87 | static void gpiochip_irqchip_remove(struct gpio_chip *gc); |
88 | static int gpiochip_irqchip_init_hw(struct gpio_chip *gc); | |
89 | static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc); | |
90 | static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc); | |
6d86750c | 91 | |
159f3cd9 | 92 | static bool gpiolib_initialized; |
6d86750c | 93 | |
d2876d08 DB |
94 | static inline void desc_set_label(struct gpio_desc *d, const char *label) |
95 | { | |
d2876d08 | 96 | d->label = label; |
d2876d08 DB |
97 | } |
98 | ||
372e722e | 99 | /** |
950d55f5 TR |
100 | * gpio_to_desc - Convert a GPIO number to its descriptor |
101 | * @gpio: global GPIO number | |
102 | * | |
103 | * Returns: | |
104 | * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO | |
105 | * with the given number exists in the system. | |
372e722e | 106 | */ |
79a9becd | 107 | struct gpio_desc *gpio_to_desc(unsigned gpio) |
372e722e | 108 | { |
ff2b1359 | 109 | struct gpio_device *gdev; |
14e85c0e AC |
110 | unsigned long flags; |
111 | ||
112 | spin_lock_irqsave(&gpio_lock, flags); | |
113 | ||
ff2b1359 | 114 | list_for_each_entry(gdev, &gpio_devices, list) { |
fdeb8e15 LW |
115 | if (gdev->base <= gpio && |
116 | gdev->base + gdev->ngpio > gpio) { | |
14e85c0e | 117 | spin_unlock_irqrestore(&gpio_lock, flags); |
fdeb8e15 | 118 | return &gdev->descs[gpio - gdev->base]; |
14e85c0e AC |
119 | } |
120 | } | |
121 | ||
122 | spin_unlock_irqrestore(&gpio_lock, flags); | |
123 | ||
0e9a5edf | 124 | if (!gpio_is_valid(gpio)) |
c47d9e1b | 125 | pr_warn("invalid GPIO %d\n", gpio); |
0e9a5edf | 126 | |
14e85c0e | 127 | return NULL; |
372e722e | 128 | } |
79a9becd | 129 | EXPORT_SYMBOL_GPL(gpio_to_desc); |
372e722e | 130 | |
d468bf9e | 131 | /** |
950d55f5 TR |
132 | * gpiochip_get_desc - get the GPIO descriptor corresponding to the given |
133 | * hardware number for this chip | |
a0b66a73 | 134 | * @gc: GPIO chip |
950d55f5 TR |
135 | * @hwnum: hardware number of the GPIO for this chip |
136 | * | |
137 | * Returns: | |
35c6cfb4 | 138 | * A pointer to the GPIO descriptor or ``ERR_PTR(-EINVAL)`` if no GPIO exists |
950d55f5 | 139 | * in the given chip for the specified hardware number. |
d468bf9e | 140 | */ |
a0b66a73 | 141 | struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc, |
06863620 | 142 | unsigned int hwnum) |
d468bf9e | 143 | { |
a0b66a73 | 144 | struct gpio_device *gdev = gc->gpiodev; |
fdeb8e15 LW |
145 | |
146 | if (hwnum >= gdev->ngpio) | |
b7d0a28a | 147 | return ERR_PTR(-EINVAL); |
d468bf9e | 148 | |
fdeb8e15 | 149 | return &gdev->descs[hwnum]; |
d468bf9e | 150 | } |
97795420 | 151 | EXPORT_SYMBOL_GPL(gpiochip_get_desc); |
372e722e AC |
152 | |
153 | /** | |
950d55f5 TR |
154 | * desc_to_gpio - convert a GPIO descriptor to the integer namespace |
155 | * @desc: GPIO descriptor | |
156 | * | |
372e722e | 157 | * This should disappear in the future but is needed since we still |
950d55f5 TR |
158 | * use GPIO numbers for error messages and sysfs nodes. |
159 | * | |
160 | * Returns: | |
161 | * The global GPIO number for the GPIO specified by its descriptor. | |
372e722e | 162 | */ |
79a9becd | 163 | int desc_to_gpio(const struct gpio_desc *desc) |
372e722e | 164 | { |
fdeb8e15 | 165 | return desc->gdev->base + (desc - &desc->gdev->descs[0]); |
372e722e | 166 | } |
79a9becd | 167 | EXPORT_SYMBOL_GPL(desc_to_gpio); |
372e722e AC |
168 | |
169 | ||
79a9becd AC |
170 | /** |
171 | * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs | |
172 | * @desc: descriptor to return the chip of | |
173 | */ | |
174 | struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc) | |
372e722e | 175 | { |
dd3b9a44 | 176 | if (!desc || !desc->gdev) |
fdeb8e15 LW |
177 | return NULL; |
178 | return desc->gdev->chip; | |
372e722e | 179 | } |
79a9becd | 180 | EXPORT_SYMBOL_GPL(gpiod_to_chip); |
d2876d08 | 181 | |
8d0aab2f AV |
182 | /* dynamic allocation of GPIOs, e.g. on a hotplugged device */ |
183 | static int gpiochip_find_base(int ngpio) | |
184 | { | |
ff2b1359 | 185 | struct gpio_device *gdev; |
7b61212f | 186 | int base = GPIO_DYNAMIC_BASE; |
8d0aab2f | 187 | |
7b61212f | 188 | list_for_each_entry(gdev, &gpio_devices, list) { |
83cabe33 | 189 | /* found a free space? */ |
7b61212f | 190 | if (gdev->base >= base + ngpio) |
83cabe33 | 191 | break; |
7b61212f CL |
192 | /* nope, check the space right after the chip */ |
193 | base = gdev->base + gdev->ngpio; | |
8d0aab2f AV |
194 | } |
195 | ||
83cabe33 | 196 | if (gpio_is_valid(base)) { |
8d0aab2f | 197 | pr_debug("%s: found new base at %d\n", __func__, base); |
83cabe33 AC |
198 | return base; |
199 | } else { | |
200 | pr_err("%s: cannot find free range\n", __func__); | |
201 | return -ENOSPC; | |
169b6a7a | 202 | } |
169b6a7a AV |
203 | } |
204 | ||
79a9becd AC |
205 | /** |
206 | * gpiod_get_direction - return the current direction of a GPIO | |
207 | * @desc: GPIO to get the direction of | |
208 | * | |
94fc7309 | 209 | * Returns 0 for output, 1 for input, or an error code in case of error. |
79a9becd AC |
210 | * |
211 | * This function may sleep if gpiod_cansleep() is true. | |
212 | */ | |
8e53b0f1 | 213 | int gpiod_get_direction(struct gpio_desc *desc) |
80b0a602 | 214 | { |
a0b66a73 | 215 | struct gpio_chip *gc; |
13daf489 | 216 | unsigned int offset; |
d377f56f | 217 | int ret; |
80b0a602 | 218 | |
a0b66a73 | 219 | gc = gpiod_to_chip(desc); |
372e722e | 220 | offset = gpio_chip_hwgpio(desc); |
80b0a602 | 221 | |
256efaea RK |
222 | /* |
223 | * Open drain emulation using input mode may incorrectly report | |
224 | * input here, fix that up. | |
225 | */ | |
226 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && | |
227 | test_bit(FLAG_IS_OUT, &desc->flags)) | |
228 | return 0; | |
229 | ||
a0b66a73 | 230 | if (!gc->get_direction) |
d0121b85 | 231 | return -ENOTSUPP; |
80b0a602 | 232 | |
a0b66a73 | 233 | ret = gc->get_direction(gc, offset); |
4fc5bfeb AS |
234 | if (ret < 0) |
235 | return ret; | |
236 | ||
237 | /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */ | |
238 | if (ret > 0) | |
d377f56f | 239 | ret = 1; |
4fc5bfeb AS |
240 | |
241 | assign_bit(FLAG_IS_OUT, &desc->flags, !ret); | |
242 | ||
d377f56f | 243 | return ret; |
80b0a602 | 244 | } |
79a9becd | 245 | EXPORT_SYMBOL_GPL(gpiod_get_direction); |
80b0a602 | 246 | |
1a989d0f AC |
247 | /* |
248 | * Add a new chip to the global chips list, keeping the list of chips sorted | |
ef7c7553 | 249 | * by range(means [base, base + ngpio - 1]) order. |
1a989d0f AC |
250 | * |
251 | * Return -EBUSY if the new chip overlaps with some other chip's integer | |
252 | * space. | |
253 | */ | |
ff2b1359 | 254 | static int gpiodev_add_to_list(struct gpio_device *gdev) |
1a989d0f | 255 | { |
a961f9b4 | 256 | struct gpio_device *prev, *next; |
1a989d0f | 257 | |
ff2b1359 | 258 | if (list_empty(&gpio_devices)) { |
a961f9b4 | 259 | /* initial entry in list */ |
ff2b1359 | 260 | list_add_tail(&gdev->list, &gpio_devices); |
e28ecca6 | 261 | return 0; |
1a989d0f AC |
262 | } |
263 | ||
243cfa6a | 264 | next = list_first_entry(&gpio_devices, struct gpio_device, list); |
a961f9b4 BJZ |
265 | if (gdev->base + gdev->ngpio <= next->base) { |
266 | /* add before first entry */ | |
267 | list_add(&gdev->list, &gpio_devices); | |
268 | return 0; | |
1a989d0f AC |
269 | } |
270 | ||
243cfa6a | 271 | prev = list_last_entry(&gpio_devices, struct gpio_device, list); |
a961f9b4 BJZ |
272 | if (prev->base + prev->ngpio <= gdev->base) { |
273 | /* add behind last entry */ | |
274 | list_add_tail(&gdev->list, &gpio_devices); | |
96098df1 | 275 | return 0; |
1a989d0f AC |
276 | } |
277 | ||
a961f9b4 BJZ |
278 | list_for_each_entry_safe(prev, next, &gpio_devices, list) { |
279 | /* at the end of the list */ | |
280 | if (&next->list == &gpio_devices) | |
281 | break; | |
1a989d0f | 282 | |
a961f9b4 BJZ |
283 | /* add between prev and next */ |
284 | if (prev->base + prev->ngpio <= gdev->base | |
285 | && gdev->base + gdev->ngpio <= next->base) { | |
286 | list_add(&gdev->list, &prev->list); | |
287 | return 0; | |
288 | } | |
289 | } | |
290 | ||
a961f9b4 | 291 | return -EBUSY; |
1a989d0f AC |
292 | } |
293 | ||
950d55f5 | 294 | /* |
f881bab0 | 295 | * Convert a GPIO name to its descriptor |
582838ea GU |
296 | * Note that there is no guarantee that GPIO names are globally unique! |
297 | * Hence this function will return, if it exists, a reference to the first GPIO | |
298 | * line found that matches the given name. | |
f881bab0 LW |
299 | */ |
300 | static struct gpio_desc *gpio_name_to_desc(const char * const name) | |
301 | { | |
ff2b1359 | 302 | struct gpio_device *gdev; |
f881bab0 LW |
303 | unsigned long flags; |
304 | ||
ee203bbd MM |
305 | if (!name) |
306 | return NULL; | |
307 | ||
f881bab0 LW |
308 | spin_lock_irqsave(&gpio_lock, flags); |
309 | ||
ff2b1359 | 310 | list_for_each_entry(gdev, &gpio_devices, list) { |
66f46e37 | 311 | struct gpio_desc *desc; |
f881bab0 | 312 | |
66f46e37 AS |
313 | for_each_gpio_desc(gdev->chip, desc) { |
314 | if (desc->name && !strcmp(desc->name, name)) { | |
f881bab0 | 315 | spin_unlock_irqrestore(&gpio_lock, flags); |
fdeb8e15 | 316 | return desc; |
f881bab0 LW |
317 | } |
318 | } | |
319 | } | |
320 | ||
321 | spin_unlock_irqrestore(&gpio_lock, flags); | |
322 | ||
323 | return NULL; | |
324 | } | |
325 | ||
5f3ca732 | 326 | /* |
582838ea GU |
327 | * Take the names from gc->names and assign them to their GPIO descriptors. |
328 | * Warn if a name is already used for a GPIO line on a different GPIO chip. | |
5f3ca732 | 329 | * |
582838ea GU |
330 | * Note that: |
331 | * 1. Non-unique names are still accepted, | |
332 | * 2. Name collisions within the same GPIO chip are not reported. | |
5f3ca732 MP |
333 | */ |
334 | static int gpiochip_set_desc_names(struct gpio_chip *gc) | |
335 | { | |
fdeb8e15 | 336 | struct gpio_device *gdev = gc->gpiodev; |
5f3ca732 MP |
337 | int i; |
338 | ||
5f3ca732 MP |
339 | /* First check all names if they are unique */ |
340 | for (i = 0; i != gc->ngpio; ++i) { | |
341 | struct gpio_desc *gpio; | |
342 | ||
343 | gpio = gpio_name_to_desc(gc->names[i]); | |
f881bab0 | 344 | if (gpio) |
fdeb8e15 | 345 | dev_warn(&gdev->dev, |
34ffd85d | 346 | "Detected name collision for GPIO name '%s'\n", |
f881bab0 | 347 | gc->names[i]); |
5f3ca732 MP |
348 | } |
349 | ||
350 | /* Then add all names to the GPIO descriptors */ | |
351 | for (i = 0; i != gc->ngpio; ++i) | |
fdeb8e15 | 352 | gdev->descs[i].name = gc->names[i]; |
5f3ca732 MP |
353 | |
354 | return 0; | |
355 | } | |
356 | ||
32fc5aa2 BG |
357 | /* |
358 | * devprop_gpiochip_set_names - Set GPIO line names using device properties | |
359 | * @chip: GPIO chip whose lines should be named, if possible | |
360 | * | |
361 | * Looks for device property "gpio-line-names" and if it exists assigns | |
362 | * GPIO line names for the chip. The memory allocated for the assigned | |
b41ba2ec | 363 | * names belong to the underlying firmware node and should not be released |
32fc5aa2 BG |
364 | * by the caller. |
365 | */ | |
366 | static int devprop_gpiochip_set_names(struct gpio_chip *chip) | |
367 | { | |
368 | struct gpio_device *gdev = chip->gpiodev; | |
b41ba2ec | 369 | struct fwnode_handle *fwnode = dev_fwnode(&gdev->dev); |
32fc5aa2 BG |
370 | const char **names; |
371 | int ret, i; | |
372 | int count; | |
373 | ||
b41ba2ec | 374 | count = fwnode_property_string_array_count(fwnode, "gpio-line-names"); |
32fc5aa2 BG |
375 | if (count < 0) |
376 | return 0; | |
377 | ||
4e804c39 SP |
378 | /* |
379 | * When offset is set in the driver side we assume the driver internally | |
380 | * is using more than one gpiochip per the same device. We have to stop | |
381 | * setting friendly names if the specified ones with 'gpio-line-names' | |
382 | * are less than the offset in the device itself. This means all the | |
383 | * lines are not present for every single pin within all the internal | |
384 | * gpiochips. | |
385 | */ | |
386 | if (count <= chip->offset) { | |
387 | dev_warn(&gdev->dev, "gpio-line-names too short (length %d), cannot map names for the gpiochip at offset %u\n", | |
388 | count, chip->offset); | |
389 | return 0; | |
32fc5aa2 BG |
390 | } |
391 | ||
392 | names = kcalloc(count, sizeof(*names), GFP_KERNEL); | |
393 | if (!names) | |
394 | return -ENOMEM; | |
395 | ||
b41ba2ec | 396 | ret = fwnode_property_read_string_array(fwnode, "gpio-line-names", |
32fc5aa2 BG |
397 | names, count); |
398 | if (ret < 0) { | |
399 | dev_warn(&gdev->dev, "failed to read GPIO line names\n"); | |
400 | kfree(names); | |
401 | return ret; | |
402 | } | |
403 | ||
4e804c39 SP |
404 | /* |
405 | * When more that one gpiochip per device is used, 'count' can | |
406 | * contain at most number gpiochips x chip->ngpio. We have to | |
407 | * correctly distribute all defined lines taking into account | |
408 | * chip->offset as starting point from where we will assign | |
409 | * the names to pins from the 'names' array. Since property | |
410 | * 'gpio-line-names' cannot contains gaps, we have to be sure | |
411 | * we only assign those pins that really exists since chip->ngpio | |
412 | * can be different of the chip->offset. | |
413 | */ | |
414 | count = (count > chip->offset) ? count - chip->offset : count; | |
415 | if (count > chip->ngpio) | |
416 | count = chip->ngpio; | |
417 | ||
c73960bb PR |
418 | for (i = 0; i < count; i++) { |
419 | /* | |
420 | * Allow overriding "fixed" names provided by the GPIO | |
421 | * provider. The "fixed" names are more often than not | |
422 | * generic and less informative than the names given in | |
423 | * device properties. | |
424 | */ | |
425 | if (names[chip->offset + i] && names[chip->offset + i][0]) | |
426 | gdev->descs[i].name = names[chip->offset + i]; | |
427 | } | |
32fc5aa2 BG |
428 | |
429 | kfree(names); | |
430 | ||
431 | return 0; | |
432 | } | |
433 | ||
a0b66a73 | 434 | static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc) |
e4371f6e SB |
435 | { |
436 | unsigned long *p; | |
437 | ||
a0b66a73 | 438 | p = bitmap_alloc(gc->ngpio, GFP_KERNEL); |
e4371f6e SB |
439 | if (!p) |
440 | return NULL; | |
441 | ||
442 | /* Assume by default all GPIOs are valid */ | |
a0b66a73 | 443 | bitmap_fill(p, gc->ngpio); |
e4371f6e SB |
444 | |
445 | return p; | |
446 | } | |
447 | ||
27043a7d AS |
448 | static unsigned int gpiochip_count_reserved_ranges(struct gpio_chip *gc) |
449 | { | |
450 | int size; | |
451 | ||
452 | /* Format is "start, count, ..." */ | |
453 | size = fwnode_property_count_u32(gc->fwnode, "gpio-reserved-ranges"); | |
454 | if (size > 0 && size % 2 == 0) | |
455 | return size; | |
456 | ||
457 | return 0; | |
458 | } | |
459 | ||
f626d6df | 460 | static int gpiochip_alloc_valid_mask(struct gpio_chip *gc) |
726cb3ba | 461 | { |
27043a7d | 462 | if (!(gpiochip_count_reserved_ranges(gc) || gc->init_valid_mask)) |
726cb3ba SB |
463 | return 0; |
464 | ||
f626d6df LW |
465 | gc->valid_mask = gpiochip_allocate_mask(gc); |
466 | if (!gc->valid_mask) | |
726cb3ba SB |
467 | return -ENOMEM; |
468 | ||
469 | return 0; | |
470 | } | |
471 | ||
27043a7d AS |
472 | static int gpiochip_apply_reserved_ranges(struct gpio_chip *gc) |
473 | { | |
474 | unsigned int size; | |
475 | u32 *ranges; | |
476 | int ret; | |
477 | ||
478 | size = gpiochip_count_reserved_ranges(gc); | |
479 | if (size == 0) | |
480 | return 0; | |
481 | ||
482 | ranges = kmalloc_array(size, sizeof(*ranges), GFP_KERNEL); | |
483 | if (!ranges) | |
484 | return -ENOMEM; | |
485 | ||
486 | ret = fwnode_property_read_u32_array(gc->fwnode, "gpio-reserved-ranges", ranges, size); | |
487 | if (ret) { | |
488 | kfree(ranges); | |
489 | return ret; | |
490 | } | |
491 | ||
492 | while (size) { | |
493 | u32 count = ranges[--size]; | |
494 | u32 start = ranges[--size]; | |
495 | ||
496 | if (start >= gc->ngpio || start + count > gc->ngpio) | |
497 | continue; | |
498 | ||
499 | bitmap_clear(gc->valid_mask, start, count); | |
500 | } | |
501 | ||
502 | kfree(ranges); | |
503 | return 0; | |
504 | } | |
505 | ||
c9fc5aff | 506 | static int gpiochip_init_valid_mask(struct gpio_chip *gc) |
f8ec92a9 | 507 | { |
27043a7d AS |
508 | int ret; |
509 | ||
510 | ret = gpiochip_apply_reserved_ranges(gc); | |
511 | if (ret) | |
512 | return ret; | |
513 | ||
c9fc5aff LW |
514 | if (gc->init_valid_mask) |
515 | return gc->init_valid_mask(gc, | |
516 | gc->valid_mask, | |
517 | gc->ngpio); | |
f8ec92a9 RRD |
518 | |
519 | return 0; | |
520 | } | |
521 | ||
a0b66a73 | 522 | static void gpiochip_free_valid_mask(struct gpio_chip *gc) |
726cb3ba | 523 | { |
a0b66a73 LW |
524 | bitmap_free(gc->valid_mask); |
525 | gc->valid_mask = NULL; | |
726cb3ba SB |
526 | } |
527 | ||
b056ca1c AS |
528 | static int gpiochip_add_pin_ranges(struct gpio_chip *gc) |
529 | { | |
530 | if (gc->add_pin_ranges) | |
531 | return gc->add_pin_ranges(gc); | |
532 | ||
533 | return 0; | |
534 | } | |
535 | ||
a0b66a73 | 536 | bool gpiochip_line_is_valid(const struct gpio_chip *gc, |
726cb3ba SB |
537 | unsigned int offset) |
538 | { | |
539 | /* No mask means all valid */ | |
a0b66a73 | 540 | if (likely(!gc->valid_mask)) |
726cb3ba | 541 | return true; |
a0b66a73 | 542 | return test_bit(offset, gc->valid_mask); |
726cb3ba SB |
543 | } |
544 | EXPORT_SYMBOL_GPL(gpiochip_line_is_valid); | |
545 | ||
ff2b1359 LW |
546 | static void gpiodevice_release(struct device *dev) |
547 | { | |
a6112998 | 548 | struct gpio_device *gdev = container_of(dev, struct gpio_device, dev); |
cf25ef6b | 549 | unsigned long flags; |
ff2b1359 | 550 | |
cf25ef6b | 551 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 552 | list_del(&gdev->list); |
cf25ef6b JH |
553 | spin_unlock_irqrestore(&gpio_lock, flags); |
554 | ||
8d4a85b6 | 555 | ida_free(&gpio_ida, gdev->id); |
fcf273e5 | 556 | kfree_const(gdev->label); |
476e2fc5 | 557 | kfree(gdev->descs); |
9efd9e69 | 558 | kfree(gdev); |
ff2b1359 LW |
559 | } |
560 | ||
1f5eb8b1 KG |
561 | #ifdef CONFIG_GPIO_CDEV |
562 | #define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt)) | |
563 | #define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev)) | |
564 | #else | |
565 | /* | |
566 | * gpiolib_cdev_register() indirectly calls device_add(), which is still | |
567 | * required even when cdev is not selected. | |
568 | */ | |
569 | #define gcdev_register(gdev, devt) device_add(&(gdev)->dev) | |
570 | #define gcdev_unregister(gdev) device_del(&(gdev)->dev) | |
571 | #endif | |
572 | ||
159f3cd9 GR |
573 | static int gpiochip_setup_dev(struct gpio_device *gdev) |
574 | { | |
d377f56f | 575 | int ret; |
159f3cd9 | 576 | |
1f5eb8b1 | 577 | ret = gcdev_register(gdev, gpio_devt); |
d377f56f LW |
578 | if (ret) |
579 | return ret; | |
111379dc | 580 | |
d377f56f LW |
581 | ret = gpiochip_sysfs_register(gdev); |
582 | if (ret) | |
159f3cd9 GR |
583 | goto err_remove_device; |
584 | ||
585 | /* From this point, the .release() function cleans up gpio_device */ | |
586 | gdev->dev.release = gpiodevice_release; | |
262b9011 GU |
587 | dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base, |
588 | gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic"); | |
159f3cd9 GR |
589 | |
590 | return 0; | |
591 | ||
592 | err_remove_device: | |
1f5eb8b1 | 593 | gcdev_unregister(gdev); |
d377f56f | 594 | return ret; |
159f3cd9 GR |
595 | } |
596 | ||
a0b66a73 | 597 | static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog) |
a411e81e BG |
598 | { |
599 | struct gpio_desc *desc; | |
600 | int rv; | |
601 | ||
a0b66a73 | 602 | desc = gpiochip_get_desc(gc, hog->chip_hwnum); |
a411e81e | 603 | if (IS_ERR(desc)) { |
262b9011 GU |
604 | chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__, |
605 | PTR_ERR(desc)); | |
a411e81e BG |
606 | return; |
607 | } | |
608 | ||
ba3efdff | 609 | if (test_bit(FLAG_IS_HOGGED, &desc->flags)) |
a411e81e BG |
610 | return; |
611 | ||
612 | rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags); | |
613 | if (rv) | |
262b9011 GU |
614 | gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n", |
615 | __func__, gc->label, hog->chip_hwnum, rv); | |
a411e81e BG |
616 | } |
617 | ||
a0b66a73 | 618 | static void machine_gpiochip_add(struct gpio_chip *gc) |
a411e81e BG |
619 | { |
620 | struct gpiod_hog *hog; | |
621 | ||
622 | mutex_lock(&gpio_machine_hogs_mutex); | |
623 | ||
624 | list_for_each_entry(hog, &gpio_machine_hogs, list) { | |
a0b66a73 LW |
625 | if (!strcmp(gc->label, hog->chip_label)) |
626 | gpiochip_machine_hog(gc, hog); | |
a411e81e BG |
627 | } |
628 | ||
629 | mutex_unlock(&gpio_machine_hogs_mutex); | |
630 | } | |
631 | ||
159f3cd9 GR |
632 | static void gpiochip_setup_devs(void) |
633 | { | |
634 | struct gpio_device *gdev; | |
d377f56f | 635 | int ret; |
159f3cd9 GR |
636 | |
637 | list_for_each_entry(gdev, &gpio_devices, list) { | |
d377f56f LW |
638 | ret = gpiochip_setup_dev(gdev); |
639 | if (ret) | |
262b9011 GU |
640 | dev_err(&gdev->dev, |
641 | "Failed to initialize gpio device (%d)\n", ret); | |
159f3cd9 GR |
642 | } |
643 | } | |
644 | ||
a0b66a73 | 645 | int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data, |
39c3fd58 AL |
646 | struct lock_class_key *lock_key, |
647 | struct lock_class_key *request_key) | |
d2876d08 | 648 | { |
990f6756 | 649 | struct fwnode_handle *fwnode = NULL; |
ff2b1359 | 650 | struct gpio_device *gdev; |
e5ab49cd BG |
651 | unsigned long flags; |
652 | int base = gc->base; | |
653 | unsigned int i; | |
654 | int ret = 0; | |
9dbd1ab2 | 655 | u32 ngpios; |
d2876d08 | 656 | |
990f6756 BG |
657 | if (gc->fwnode) |
658 | fwnode = gc->fwnode; | |
659 | else if (gc->parent) | |
660 | fwnode = dev_fwnode(gc->parent); | |
661 | ||
ff2b1359 LW |
662 | /* |
663 | * First: allocate and populate the internal stat container, and | |
664 | * set up the struct device. | |
665 | */ | |
969f07b4 | 666 | gdev = kzalloc(sizeof(*gdev), GFP_KERNEL); |
ff2b1359 | 667 | if (!gdev) |
14e85c0e | 668 | return -ENOMEM; |
3c702e99 | 669 | gdev->dev.bus = &gpio_bus_type; |
1df62542 | 670 | gdev->dev.parent = gc->parent; |
a0b66a73 LW |
671 | gdev->chip = gc; |
672 | gc->gpiodev = gdev; | |
acc6e331 | 673 | |
4731210c | 674 | of_gpio_dev_init(gc, gdev); |
515321ac | 675 | acpi_gpio_dev_init(gc, gdev); |
acc6e331 | 676 | |
6cb59afe AS |
677 | /* |
678 | * Assign fwnode depending on the result of the previous calls, | |
679 | * if none of them succeed, assign it to the parent's one. | |
680 | */ | |
681 | gdev->dev.fwnode = dev_fwnode(&gdev->dev) ?: fwnode; | |
682 | ||
8d4a85b6 | 683 | gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL); |
ff2b1359 | 684 | if (gdev->id < 0) { |
d377f56f | 685 | ret = gdev->id; |
ff2b1359 LW |
686 | goto err_free_gdev; |
687 | } | |
c351bb64 QW |
688 | |
689 | ret = dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id); | |
690 | if (ret) | |
691 | goto err_free_ida; | |
692 | ||
ff2b1359 | 693 | device_initialize(&gdev->dev); |
a0b66a73 LW |
694 | if (gc->parent && gc->parent->driver) |
695 | gdev->owner = gc->parent->driver->owner; | |
696 | else if (gc->owner) | |
ff2b1359 | 697 | /* TODO: remove chip->owner */ |
a0b66a73 | 698 | gdev->owner = gc->owner; |
ff2b1359 LW |
699 | else |
700 | gdev->owner = THIS_MODULE; | |
d2876d08 | 701 | |
a0b66a73 | 702 | gdev->descs = kcalloc(gc->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL); |
1c3cdb18 | 703 | if (!gdev->descs) { |
d377f56f | 704 | ret = -ENOMEM; |
c351bb64 | 705 | goto err_free_dev_name; |
ff2b1359 LW |
706 | } |
707 | ||
9dbd1ab2 BG |
708 | /* |
709 | * Try the device properties if the driver didn't supply the number | |
710 | * of GPIO lines. | |
711 | */ | |
712 | if (gc->ngpio == 0) { | |
713 | ret = device_property_read_u32(&gdev->dev, "ngpios", &ngpios); | |
714 | if (ret == -ENODATA) | |
715 | /* | |
716 | * -ENODATA means that there is no property found and | |
717 | * we want to issue the error message to the user. | |
718 | * Besides that, we want to return different error code | |
719 | * to state that supplied value is not valid. | |
720 | */ | |
721 | ngpios = 0; | |
722 | else if (ret) | |
723 | goto err_free_descs; | |
724 | ||
725 | gc->ngpio = ngpios; | |
726 | } | |
727 | ||
a0b66a73 LW |
728 | if (gc->ngpio == 0) { |
729 | chip_err(gc, "tried to insert a GPIO chip with zero lines\n"); | |
d377f56f | 730 | ret = -EINVAL; |
159f3cd9 | 731 | goto err_free_descs; |
5ed41cc4 | 732 | } |
df4878e9 | 733 | |
a0b66a73 LW |
734 | if (gc->ngpio > FASTPATH_NGPIO) |
735 | chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n", | |
736 | gc->ngpio, FASTPATH_NGPIO); | |
3027743f | 737 | |
a0b66a73 | 738 | gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL); |
df4878e9 | 739 | if (!gdev->label) { |
d377f56f | 740 | ret = -ENOMEM; |
476e2fc5 | 741 | goto err_free_descs; |
df4878e9 LW |
742 | } |
743 | ||
a0b66a73 | 744 | gdev->ngpio = gc->ngpio; |
43c54eca | 745 | gdev->data = data; |
5ed41cc4 | 746 | |
d2876d08 DB |
747 | spin_lock_irqsave(&gpio_lock, flags); |
748 | ||
fdeb8e15 LW |
749 | /* |
750 | * TODO: this allocates a Linux GPIO number base in the global | |
751 | * GPIO numberspace for this chip. In the long run we want to | |
752 | * get *rid* of this numberspace and use only descriptors, but | |
753 | * it may be a pipe dream. It will not happen before we get rid | |
754 | * of the sysfs interface anyways. | |
755 | */ | |
8d0aab2f | 756 | if (base < 0) { |
a0b66a73 | 757 | base = gpiochip_find_base(gc->ngpio); |
8d0aab2f | 758 | if (base < 0) { |
d377f56f | 759 | ret = base; |
225fce83 | 760 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 761 | goto err_free_label; |
8d0aab2f | 762 | } |
fdeb8e15 LW |
763 | /* |
764 | * TODO: it should not be necessary to reflect the assigned | |
765 | * base outside of the GPIO subsystem. Go over drivers and | |
766 | * see if anyone makes use of this, else drop this and assign | |
767 | * a poison instead. | |
768 | */ | |
a0b66a73 | 769 | gc->base = base; |
502df79b CL |
770 | } else { |
771 | dev_warn(&gdev->dev, | |
772 | "Static allocation of GPIO base is deprecated, use dynamic allocation.\n"); | |
8d0aab2f | 773 | } |
fdeb8e15 | 774 | gdev->base = base; |
8d0aab2f | 775 | |
d377f56f LW |
776 | ret = gpiodev_add_to_list(gdev); |
777 | if (ret) { | |
05aa5203 | 778 | spin_unlock_irqrestore(&gpio_lock, flags); |
24a9dbb1 | 779 | chip_err(gc, "GPIO integer space overlap, cannot add chip\n"); |
476e2fc5 | 780 | goto err_free_label; |
05aa5203 | 781 | } |
1a989d0f | 782 | |
a0b66a73 | 783 | for (i = 0; i < gc->ngpio; i++) |
767cd17a | 784 | gdev->descs[i].gdev = gdev; |
14e85c0e | 785 | |
207270dd DC |
786 | spin_unlock_irqrestore(&gpio_lock, flags); |
787 | ||
6accc376 | 788 | BLOCKING_INIT_NOTIFIER_HEAD(&gdev->notifier); |
51c1064e | 789 | |
f23f1516 | 790 | #ifdef CONFIG_PINCTRL |
20ec3e39 | 791 | INIT_LIST_HEAD(&gdev->pin_ranges); |
f23f1516 SH |
792 | #endif |
793 | ||
c73960bb | 794 | if (gc->names) { |
7cba1a4d | 795 | ret = gpiochip_set_desc_names(gc); |
c73960bb PR |
796 | if (ret) |
797 | goto err_remove_from_list; | |
798 | } | |
799 | ret = devprop_gpiochip_set_names(gc); | |
d377f56f | 800 | if (ret) |
5f3ca732 MP |
801 | goto err_remove_from_list; |
802 | ||
a0b66a73 | 803 | ret = gpiochip_alloc_valid_mask(gc); |
d377f56f | 804 | if (ret) |
48057ed1 | 805 | goto err_remove_from_list; |
e0d89728 | 806 | |
a0b66a73 | 807 | ret = of_gpiochip_add(gc); |
d377f56f | 808 | if (ret) |
48057ed1 | 809 | goto err_free_gpiochip_mask; |
28355f81 | 810 | |
a0b66a73 | 811 | ret = gpiochip_init_valid_mask(gc); |
d377f56f | 812 | if (ret) |
35779890 | 813 | goto err_remove_of_chip; |
f8ec92a9 | 814 | |
a0b66a73 | 815 | for (i = 0; i < gc->ngpio; i++) { |
3edfb7bd RRD |
816 | struct gpio_desc *desc = &gdev->descs[i]; |
817 | ||
a0b66a73 | 818 | if (gc->get_direction && gpiochip_line_is_valid(gc, i)) { |
4fc5bfeb | 819 | assign_bit(FLAG_IS_OUT, |
a0b66a73 | 820 | &desc->flags, !gc->get_direction(gc, i)); |
d95da993 | 821 | } else { |
4fc5bfeb | 822 | assign_bit(FLAG_IS_OUT, |
a0b66a73 | 823 | &desc->flags, !gc->direction_input); |
d95da993 | 824 | } |
3edfb7bd RRD |
825 | } |
826 | ||
a0b66a73 | 827 | ret = gpiochip_add_pin_ranges(gc); |
b056ca1c AS |
828 | if (ret) |
829 | goto err_remove_of_chip; | |
830 | ||
a0b66a73 | 831 | acpi_gpiochip_add(gc); |
391c970c | 832 | |
a0b66a73 | 833 | machine_gpiochip_add(gc); |
a411e81e | 834 | |
a0b66a73 | 835 | ret = gpiochip_irqchip_init_valid_mask(gc); |
9411e3aa AS |
836 | if (ret) |
837 | goto err_remove_acpi_chip; | |
838 | ||
a0b66a73 | 839 | ret = gpiochip_irqchip_init_hw(gc); |
fbdf8d4b | 840 | if (ret) |
48057ed1 LW |
841 | goto err_remove_acpi_chip; |
842 | ||
a0b66a73 | 843 | ret = gpiochip_add_irqchip(gc, lock_key, request_key); |
fbdf8d4b | 844 | if (ret) |
48057ed1 LW |
845 | goto err_remove_irqchip_mask; |
846 | ||
3c702e99 LW |
847 | /* |
848 | * By first adding the chardev, and then adding the device, | |
849 | * we get a device node entry in sysfs under | |
850 | * /sys/bus/gpio/devices/gpiochipN/dev that can be used for | |
851 | * coldplug of device nodes and other udev business. | |
159f3cd9 GR |
852 | * We can do this only if gpiolib has been initialized. |
853 | * Otherwise, defer until later. | |
3c702e99 | 854 | */ |
159f3cd9 | 855 | if (gpiolib_initialized) { |
d377f56f LW |
856 | ret = gpiochip_setup_dev(gdev); |
857 | if (ret) | |
48057ed1 | 858 | goto err_remove_irqchip; |
159f3cd9 | 859 | } |
cedb1881 | 860 | return 0; |
3bae4811 | 861 | |
48057ed1 | 862 | err_remove_irqchip: |
a0b66a73 | 863 | gpiochip_irqchip_remove(gc); |
48057ed1 | 864 | err_remove_irqchip_mask: |
a0b66a73 | 865 | gpiochip_irqchip_free_valid_mask(gc); |
35779890 | 866 | err_remove_acpi_chip: |
a0b66a73 | 867 | acpi_gpiochip_remove(gc); |
35779890 | 868 | err_remove_of_chip: |
a0b66a73 LW |
869 | gpiochip_free_hogs(gc); |
870 | of_gpiochip_remove(gc); | |
35779890 | 871 | err_free_gpiochip_mask: |
a0b66a73 LW |
872 | gpiochip_remove_pin_ranges(gc); |
873 | gpiochip_free_valid_mask(gc); | |
5f3ca732 | 874 | err_remove_from_list: |
225fce83 | 875 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 876 | list_del(&gdev->list); |
3bae4811 | 877 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 878 | err_free_label: |
fcf273e5 | 879 | kfree_const(gdev->label); |
476e2fc5 GR |
880 | err_free_descs: |
881 | kfree(gdev->descs); | |
c351bb64 QW |
882 | err_free_dev_name: |
883 | kfree(dev_name(&gdev->dev)); | |
a05a1404 | 884 | err_free_ida: |
8d4a85b6 | 885 | ida_free(&gpio_ida, gdev->id); |
a05a1404 | 886 | err_free_gdev: |
d2876d08 | 887 | /* failures here can mean systems won't boot... */ |
3cc1fb73 GS |
888 | if (ret != -EPROBE_DEFER) { |
889 | pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__, | |
890 | gdev->base, gdev->base + gdev->ngpio - 1, | |
891 | gc->label ? : "generic", ret); | |
892 | } | |
fdeb8e15 | 893 | kfree(gdev); |
d377f56f | 894 | return ret; |
d2876d08 | 895 | } |
959bc7b2 | 896 | EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key); |
d2876d08 | 897 | |
43c54eca LW |
898 | /** |
899 | * gpiochip_get_data() - get per-subdriver data for the chip | |
a0b66a73 | 900 | * @gc: GPIO chip |
950d55f5 TR |
901 | * |
902 | * Returns: | |
903 | * The per-subdriver data for the chip. | |
43c54eca | 904 | */ |
a0b66a73 | 905 | void *gpiochip_get_data(struct gpio_chip *gc) |
43c54eca | 906 | { |
a0b66a73 | 907 | return gc->gpiodev->data; |
43c54eca LW |
908 | } |
909 | EXPORT_SYMBOL_GPL(gpiochip_get_data); | |
910 | ||
d2876d08 DB |
911 | /** |
912 | * gpiochip_remove() - unregister a gpio_chip | |
a0b66a73 | 913 | * @gc: the chip to unregister |
d2876d08 DB |
914 | * |
915 | * A gpio_chip with any GPIOs still requested may not be removed. | |
916 | */ | |
a0b66a73 | 917 | void gpiochip_remove(struct gpio_chip *gc) |
d2876d08 | 918 | { |
a0b66a73 | 919 | struct gpio_device *gdev = gc->gpiodev; |
d2876d08 | 920 | unsigned long flags; |
869233f8 | 921 | unsigned int i; |
d2876d08 | 922 | |
ff2b1359 | 923 | /* FIXME: should the legacy sysfs handling be moved to gpio_device? */ |
afbc4f31 | 924 | gpiochip_sysfs_unregister(gdev); |
a0b66a73 | 925 | gpiochip_free_hogs(gc); |
bd203bd5 BJZ |
926 | /* Numb the device, cancelling all outstanding operations */ |
927 | gdev->chip = NULL; | |
a0b66a73 LW |
928 | gpiochip_irqchip_remove(gc); |
929 | acpi_gpiochip_remove(gc); | |
930 | of_gpiochip_remove(gc); | |
931 | gpiochip_remove_pin_ranges(gc); | |
932 | gpiochip_free_valid_mask(gc); | |
43c54eca LW |
933 | /* |
934 | * We accept no more calls into the driver from this point, so | |
935 | * NULL the driver data pointer | |
936 | */ | |
937 | gdev->data = NULL; | |
391c970c | 938 | |
6798acaa | 939 | spin_lock_irqsave(&gpio_lock, flags); |
fdeb8e15 | 940 | for (i = 0; i < gdev->ngpio; i++) { |
a0b66a73 | 941 | if (gpiochip_is_requested(gc, i)) |
869233f8 | 942 | break; |
d2876d08 | 943 | } |
d2876d08 | 944 | spin_unlock_irqrestore(&gpio_lock, flags); |
14e85c0e | 945 | |
ca18a852 | 946 | if (i != gdev->ngpio) |
fdeb8e15 | 947 | dev_crit(&gdev->dev, |
58383c78 | 948 | "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n"); |
fab28b89 | 949 | |
ff2b1359 LW |
950 | /* |
951 | * The gpiochip side puts its use of the device to rest here: | |
952 | * if there are no userspace clients, the chardev and device will | |
953 | * be removed, else it will be dangling until the last user is | |
954 | * gone. | |
955 | */ | |
1f5eb8b1 | 956 | gcdev_unregister(gdev); |
ff2b1359 | 957 | put_device(&gdev->dev); |
d2876d08 DB |
958 | } |
959 | EXPORT_SYMBOL_GPL(gpiochip_remove); | |
960 | ||
594fa265 GL |
961 | /** |
962 | * gpiochip_find() - iterator for locating a specific gpio_chip | |
963 | * @data: data to pass to match function | |
950d55f5 | 964 | * @match: Callback function to check gpio_chip |
594fa265 GL |
965 | * |
966 | * Similar to bus_find_device. It returns a reference to a gpio_chip as | |
967 | * determined by a user supplied @match callback. The callback should return | |
968 | * 0 if the device doesn't match and non-zero if it does. If the callback is | |
969 | * non-zero, this function will return to the caller and not iterate over any | |
970 | * more gpio_chips. | |
971 | */ | |
07ce8ec7 | 972 | struct gpio_chip *gpiochip_find(void *data, |
a0b66a73 | 973 | int (*match)(struct gpio_chip *gc, |
3d0f7cf0 | 974 | void *data)) |
594fa265 | 975 | { |
ff2b1359 | 976 | struct gpio_device *gdev; |
a0b66a73 | 977 | struct gpio_chip *gc = NULL; |
594fa265 | 978 | unsigned long flags; |
594fa265 GL |
979 | |
980 | spin_lock_irqsave(&gpio_lock, flags); | |
ff2b1359 | 981 | list_for_each_entry(gdev, &gpio_devices, list) |
acf06ff7 | 982 | if (gdev->chip && match(gdev->chip, data)) { |
a0b66a73 | 983 | gc = gdev->chip; |
594fa265 | 984 | break; |
acf06ff7 | 985 | } |
ff2b1359 | 986 | |
594fa265 GL |
987 | spin_unlock_irqrestore(&gpio_lock, flags); |
988 | ||
a0b66a73 | 989 | return gc; |
594fa265 | 990 | } |
8fa0c9bf | 991 | EXPORT_SYMBOL_GPL(gpiochip_find); |
d2876d08 | 992 | |
a0b66a73 | 993 | static int gpiochip_match_name(struct gpio_chip *gc, void *data) |
79697ef9 AC |
994 | { |
995 | const char *name = data; | |
996 | ||
a0b66a73 | 997 | return !strcmp(gc->label, name); |
79697ef9 AC |
998 | } |
999 | ||
1000 | static struct gpio_chip *find_chip_by_name(const char *name) | |
1001 | { | |
1002 | return gpiochip_find((void *)name, gpiochip_match_name); | |
1003 | } | |
1004 | ||
14250520 LW |
1005 | #ifdef CONFIG_GPIOLIB_IRQCHIP |
1006 | ||
1007 | /* | |
1008 | * The following is irqchip helper code for gpiochips. | |
1009 | */ | |
1010 | ||
9411e3aa AS |
1011 | static int gpiochip_irqchip_init_hw(struct gpio_chip *gc) |
1012 | { | |
1013 | struct gpio_irq_chip *girq = &gc->irq; | |
1014 | ||
1015 | if (!girq->init_hw) | |
1016 | return 0; | |
1017 | ||
1018 | return girq->init_hw(gc); | |
1019 | } | |
1020 | ||
5fbe5b58 | 1021 | static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc) |
79b804cb | 1022 | { |
5fbe5b58 LW |
1023 | struct gpio_irq_chip *girq = &gc->irq; |
1024 | ||
1025 | if (!girq->init_valid_mask) | |
79b804cb MW |
1026 | return 0; |
1027 | ||
5fbe5b58 LW |
1028 | girq->valid_mask = gpiochip_allocate_mask(gc); |
1029 | if (!girq->valid_mask) | |
79b804cb MW |
1030 | return -ENOMEM; |
1031 | ||
5fbe5b58 LW |
1032 | girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio); |
1033 | ||
79b804cb MW |
1034 | return 0; |
1035 | } | |
1036 | ||
a0b66a73 | 1037 | static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc) |
79b804cb | 1038 | { |
a0b66a73 LW |
1039 | bitmap_free(gc->irq.valid_mask); |
1040 | gc->irq.valid_mask = NULL; | |
79b804cb MW |
1041 | } |
1042 | ||
a0b66a73 | 1043 | bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc, |
64ff2c8e | 1044 | unsigned int offset) |
79b804cb | 1045 | { |
a0b66a73 | 1046 | if (!gpiochip_line_is_valid(gc, offset)) |
726cb3ba | 1047 | return false; |
79b804cb | 1048 | /* No mask means all valid */ |
a0b66a73 | 1049 | if (likely(!gc->irq.valid_mask)) |
79b804cb | 1050 | return true; |
a0b66a73 | 1051 | return test_bit(offset, gc->irq.valid_mask); |
79b804cb | 1052 | } |
64ff2c8e | 1053 | EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid); |
79b804cb | 1054 | |
fdd61a01 LW |
1055 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
1056 | ||
1057 | /** | |
1058 | * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip | |
1059 | * to a gpiochip | |
1060 | * @gc: the gpiochip to set the irqchip hierarchical handler to | |
1061 | * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt | |
1062 | * will then percolate up to the parent | |
1063 | */ | |
1064 | static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc, | |
1065 | struct irq_chip *irqchip) | |
1066 | { | |
1067 | /* DT will deal with mapping each IRQ as we go along */ | |
1068 | if (is_of_node(gc->irq.fwnode)) | |
1069 | return; | |
1070 | ||
1071 | /* | |
1072 | * This is for legacy and boardfile "irqchip" fwnodes: allocate | |
1073 | * irqs upfront instead of dynamically since we don't have the | |
1074 | * dynamic type of allocation that hardware description languages | |
1075 | * provide. Once all GPIO drivers using board files are gone from | |
1076 | * the kernel we can delete this code, but for a transitional period | |
1077 | * it is necessary to keep this around. | |
1078 | */ | |
1079 | if (is_fwnode_irqchip(gc->irq.fwnode)) { | |
1080 | int i; | |
1081 | int ret; | |
1082 | ||
1083 | for (i = 0; i < gc->ngpio; i++) { | |
1084 | struct irq_fwspec fwspec; | |
1085 | unsigned int parent_hwirq; | |
1086 | unsigned int parent_type; | |
1087 | struct gpio_irq_chip *girq = &gc->irq; | |
1088 | ||
1089 | /* | |
1090 | * We call the child to parent translation function | |
1091 | * only to check if the child IRQ is valid or not. | |
1092 | * Just pick the rising edge type here as that is what | |
1093 | * we likely need to support. | |
1094 | */ | |
1095 | ret = girq->child_to_parent_hwirq(gc, i, | |
1096 | IRQ_TYPE_EDGE_RISING, | |
1097 | &parent_hwirq, | |
1098 | &parent_type); | |
1099 | if (ret) { | |
1100 | chip_err(gc, "skip set-up on hwirq %d\n", | |
1101 | i); | |
1102 | continue; | |
1103 | } | |
1104 | ||
1105 | fwspec.fwnode = gc->irq.fwnode; | |
1106 | /* This is the hwirq for the GPIO line side of things */ | |
1107 | fwspec.param[0] = girq->child_offset_to_irq(gc, i); | |
1108 | /* Just pick something */ | |
1109 | fwspec.param[1] = IRQ_TYPE_EDGE_RISING; | |
1110 | fwspec.param_count = 2; | |
1111 | ret = __irq_domain_alloc_irqs(gc->irq.domain, | |
1112 | /* just pick something */ | |
1113 | -1, | |
1114 | 1, | |
1115 | NUMA_NO_NODE, | |
1116 | &fwspec, | |
1117 | false, | |
1118 | NULL); | |
1119 | if (ret < 0) { | |
1120 | chip_err(gc, | |
1121 | "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n", | |
1122 | i, parent_hwirq, | |
1123 | ret); | |
1124 | } | |
1125 | } | |
1126 | } | |
1127 | ||
1128 | chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__); | |
1129 | ||
1130 | return; | |
1131 | } | |
1132 | ||
1133 | static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d, | |
1134 | struct irq_fwspec *fwspec, | |
1135 | unsigned long *hwirq, | |
1136 | unsigned int *type) | |
1137 | { | |
1138 | /* We support standard DT translation */ | |
1139 | if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) { | |
1140 | return irq_domain_translate_twocell(d, fwspec, hwirq, type); | |
1141 | } | |
1142 | ||
1143 | /* This is for board files and others not using DT */ | |
1144 | if (is_fwnode_irqchip(fwspec->fwnode)) { | |
1145 | int ret; | |
1146 | ||
1147 | ret = irq_domain_translate_twocell(d, fwspec, hwirq, type); | |
1148 | if (ret) | |
1149 | return ret; | |
1150 | WARN_ON(*type == IRQ_TYPE_NONE); | |
1151 | return 0; | |
1152 | } | |
1153 | return -EINVAL; | |
1154 | } | |
1155 | ||
1156 | static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d, | |
1157 | unsigned int irq, | |
1158 | unsigned int nr_irqs, | |
1159 | void *data) | |
1160 | { | |
1161 | struct gpio_chip *gc = d->host_data; | |
1162 | irq_hw_number_t hwirq; | |
1163 | unsigned int type = IRQ_TYPE_NONE; | |
1164 | struct irq_fwspec *fwspec = data; | |
91a29af4 | 1165 | union gpio_irq_fwspec gpio_parent_fwspec = {}; |
fdd61a01 LW |
1166 | unsigned int parent_hwirq; |
1167 | unsigned int parent_type; | |
1168 | struct gpio_irq_chip *girq = &gc->irq; | |
1169 | int ret; | |
1170 | ||
1171 | /* | |
1172 | * The nr_irqs parameter is always one except for PCI multi-MSI | |
1173 | * so this should not happen. | |
1174 | */ | |
1175 | WARN_ON(nr_irqs != 1); | |
1176 | ||
1177 | ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type); | |
1178 | if (ret) | |
1179 | return ret; | |
1180 | ||
366950ee | 1181 | chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq); |
fdd61a01 LW |
1182 | |
1183 | ret = girq->child_to_parent_hwirq(gc, hwirq, type, | |
1184 | &parent_hwirq, &parent_type); | |
1185 | if (ret) { | |
1186 | chip_err(gc, "can't look up hwirq %lu\n", hwirq); | |
1187 | return ret; | |
1188 | } | |
366950ee | 1189 | chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq); |
fdd61a01 LW |
1190 | |
1191 | /* | |
1192 | * We set handle_bad_irq because the .set_type() should | |
1193 | * always be invoked and set the right type of handler. | |
1194 | */ | |
1195 | irq_domain_set_info(d, | |
1196 | irq, | |
1197 | hwirq, | |
1198 | gc->irq.chip, | |
1199 | gc, | |
1200 | girq->handler, | |
1201 | NULL, NULL); | |
1202 | irq_set_probe(irq); | |
1203 | ||
fdd61a01 | 1204 | /* This parent only handles asserted level IRQs */ |
91a29af4 MZ |
1205 | ret = girq->populate_parent_alloc_arg(gc, &gpio_parent_fwspec, |
1206 | parent_hwirq, parent_type); | |
1207 | if (ret) | |
1208 | return ret; | |
24258761 | 1209 | |
366950ee | 1210 | chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n", |
fdd61a01 | 1211 | irq, parent_hwirq); |
c34f6dc8 | 1212 | irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key); |
91a29af4 | 1213 | ret = irq_domain_alloc_irqs_parent(d, irq, 1, &gpio_parent_fwspec); |
880b7cf2 KH |
1214 | /* |
1215 | * If the parent irqdomain is msi, the interrupts have already | |
1216 | * been allocated, so the EEXIST is good. | |
1217 | */ | |
1218 | if (irq_domain_is_msi(d->parent) && (ret == -EEXIST)) | |
1219 | ret = 0; | |
fdd61a01 LW |
1220 | if (ret) |
1221 | chip_err(gc, | |
1222 | "failed to allocate parent hwirq %d for hwirq %lu\n", | |
1223 | parent_hwirq, hwirq); | |
1224 | ||
1225 | return ret; | |
1226 | } | |
1227 | ||
a0b66a73 | 1228 | static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc, |
fdd61a01 LW |
1229 | unsigned int offset) |
1230 | { | |
1231 | return offset; | |
1232 | } | |
1233 | ||
1234 | static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops) | |
1235 | { | |
1236 | ops->activate = gpiochip_irq_domain_activate; | |
1237 | ops->deactivate = gpiochip_irq_domain_deactivate; | |
1238 | ops->alloc = gpiochip_hierarchy_irq_domain_alloc; | |
fdd61a01 LW |
1239 | |
1240 | /* | |
08f12b45 | 1241 | * We only allow overriding the translate() and free() functions for |
fdd61a01 | 1242 | * hierarchical chips, and this should only be done if the user |
08f12b45 LP |
1243 | * really need something other than 1:1 translation for translate() |
1244 | * callback and free if user wants to free up any resources which | |
1245 | * were allocated during callbacks, for example populate_parent_alloc_arg. | |
fdd61a01 LW |
1246 | */ |
1247 | if (!ops->translate) | |
1248 | ops->translate = gpiochip_hierarchy_irq_domain_translate; | |
08f12b45 LP |
1249 | if (!ops->free) |
1250 | ops->free = irq_domain_free_irqs_common; | |
fdd61a01 LW |
1251 | } |
1252 | ||
1253 | static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc) | |
1254 | { | |
1255 | if (!gc->irq.child_to_parent_hwirq || | |
1256 | !gc->irq.fwnode) { | |
1257 | chip_err(gc, "missing irqdomain vital data\n"); | |
1258 | return -EINVAL; | |
1259 | } | |
1260 | ||
1261 | if (!gc->irq.child_offset_to_irq) | |
1262 | gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop; | |
1263 | ||
24258761 KH |
1264 | if (!gc->irq.populate_parent_alloc_arg) |
1265 | gc->irq.populate_parent_alloc_arg = | |
fdd61a01 LW |
1266 | gpiochip_populate_parent_fwspec_twocell; |
1267 | ||
1268 | gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops); | |
1269 | ||
1270 | gc->irq.domain = irq_domain_create_hierarchy( | |
1271 | gc->irq.parent_domain, | |
1272 | 0, | |
1273 | gc->ngpio, | |
1274 | gc->irq.fwnode, | |
1275 | &gc->irq.child_irq_domain_ops, | |
1276 | gc); | |
1277 | ||
1278 | if (!gc->irq.domain) | |
1279 | return -ENOMEM; | |
1280 | ||
1281 | gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip); | |
1282 | ||
1283 | return 0; | |
1284 | } | |
1285 | ||
1286 | static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc) | |
1287 | { | |
1288 | return !!gc->irq.parent_domain; | |
1289 | } | |
1290 | ||
91a29af4 MZ |
1291 | int gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc, |
1292 | union gpio_irq_fwspec *gfwspec, | |
1293 | unsigned int parent_hwirq, | |
1294 | unsigned int parent_type) | |
fdd61a01 | 1295 | { |
91a29af4 | 1296 | struct irq_fwspec *fwspec = &gfwspec->fwspec; |
24258761 | 1297 | |
a0b66a73 | 1298 | fwspec->fwnode = gc->irq.parent_domain->fwnode; |
fdd61a01 LW |
1299 | fwspec->param_count = 2; |
1300 | fwspec->param[0] = parent_hwirq; | |
1301 | fwspec->param[1] = parent_type; | |
24258761 | 1302 | |
91a29af4 | 1303 | return 0; |
fdd61a01 LW |
1304 | } |
1305 | EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell); | |
1306 | ||
91a29af4 MZ |
1307 | int gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc, |
1308 | union gpio_irq_fwspec *gfwspec, | |
1309 | unsigned int parent_hwirq, | |
1310 | unsigned int parent_type) | |
fdd61a01 | 1311 | { |
91a29af4 | 1312 | struct irq_fwspec *fwspec = &gfwspec->fwspec; |
24258761 | 1313 | |
a0b66a73 | 1314 | fwspec->fwnode = gc->irq.parent_domain->fwnode; |
fdd61a01 LW |
1315 | fwspec->param_count = 4; |
1316 | fwspec->param[0] = 0; | |
1317 | fwspec->param[1] = parent_hwirq; | |
1318 | fwspec->param[2] = 0; | |
1319 | fwspec->param[3] = parent_type; | |
24258761 | 1320 | |
91a29af4 | 1321 | return 0; |
fdd61a01 LW |
1322 | } |
1323 | EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell); | |
1324 | ||
1325 | #else | |
1326 | ||
1327 | static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc) | |
1328 | { | |
1329 | return -EINVAL; | |
1330 | } | |
1331 | ||
1332 | static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc) | |
1333 | { | |
1334 | return false; | |
1335 | } | |
1336 | ||
1337 | #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ | |
1338 | ||
14250520 LW |
1339 | /** |
1340 | * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip | |
1341 | * @d: the irqdomain used by this irqchip | |
1342 | * @irq: the global irq number used by this GPIO irqchip irq | |
1343 | * @hwirq: the local IRQ/GPIO line offset on this gpiochip | |
1344 | * | |
1345 | * This function will set up the mapping for a certain IRQ line on a | |
1346 | * gpiochip by assigning the gpiochip as chip data, and using the irqchip | |
1347 | * stored inside the gpiochip. | |
1348 | */ | |
1b95b4eb TR |
1349 | int gpiochip_irq_map(struct irq_domain *d, unsigned int irq, |
1350 | irq_hw_number_t hwirq) | |
14250520 | 1351 | { |
a0b66a73 | 1352 | struct gpio_chip *gc = d->host_data; |
d377f56f | 1353 | int ret = 0; |
14250520 | 1354 | |
a0b66a73 | 1355 | if (!gpiochip_irqchip_irq_valid(gc, hwirq)) |
dc749a09 GS |
1356 | return -ENXIO; |
1357 | ||
a0b66a73 | 1358 | irq_set_chip_data(irq, gc); |
a0a8bcf4 GS |
1359 | /* |
1360 | * This lock class tells lockdep that GPIO irqs are in a different | |
1361 | * category than their parents, so it won't report false recursion. | |
1362 | */ | |
a0b66a73 LW |
1363 | irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key); |
1364 | irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler); | |
d245b3f9 | 1365 | /* Chips that use nested thread handlers have them marked */ |
a0b66a73 | 1366 | if (gc->irq.threaded) |
1c8732bb | 1367 | irq_set_nested_thread(irq, 1); |
14250520 | 1368 | irq_set_noprobe(irq); |
23393d49 | 1369 | |
a0b66a73 LW |
1370 | if (gc->irq.num_parents == 1) |
1371 | ret = irq_set_parent(irq, gc->irq.parents[0]); | |
1372 | else if (gc->irq.map) | |
1373 | ret = irq_set_parent(irq, gc->irq.map[hwirq]); | |
e0d89728 | 1374 | |
d377f56f LW |
1375 | if (ret < 0) |
1376 | return ret; | |
e0d89728 | 1377 | |
1333b90f LW |
1378 | /* |
1379 | * No set-up of the hardware will happen if IRQ_TYPE_NONE | |
1380 | * is passed as default type. | |
1381 | */ | |
a0b66a73 LW |
1382 | if (gc->irq.default_type != IRQ_TYPE_NONE) |
1383 | irq_set_irq_type(irq, gc->irq.default_type); | |
14250520 LW |
1384 | |
1385 | return 0; | |
1386 | } | |
1b95b4eb | 1387 | EXPORT_SYMBOL_GPL(gpiochip_irq_map); |
14250520 | 1388 | |
1b95b4eb | 1389 | void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq) |
c3626fde | 1390 | { |
a0b66a73 | 1391 | struct gpio_chip *gc = d->host_data; |
1c8732bb | 1392 | |
a0b66a73 | 1393 | if (gc->irq.threaded) |
1c8732bb | 1394 | irq_set_nested_thread(irq, 0); |
c3626fde LW |
1395 | irq_set_chip_and_handler(irq, NULL, NULL); |
1396 | irq_set_chip_data(irq, NULL); | |
1397 | } | |
1b95b4eb | 1398 | EXPORT_SYMBOL_GPL(gpiochip_irq_unmap); |
c3626fde | 1399 | |
14250520 LW |
1400 | static const struct irq_domain_ops gpiochip_domain_ops = { |
1401 | .map = gpiochip_irq_map, | |
c3626fde | 1402 | .unmap = gpiochip_irq_unmap, |
14250520 LW |
1403 | /* Virtually all GPIO irqchips are twocell:ed */ |
1404 | .xlate = irq_domain_xlate_twocell, | |
1405 | }; | |
1406 | ||
fdd61a01 LW |
1407 | /* |
1408 | * TODO: move these activate/deactivate in under the hierarchicial | |
1409 | * irqchip implementation as static once SPMI and SSBI (all external | |
1410 | * users) are phased over. | |
1411 | */ | |
ef74f70e BM |
1412 | /** |
1413 | * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ | |
1414 | * @domain: The IRQ domain used by this IRQ chip | |
1415 | * @data: Outermost irq_data associated with the IRQ | |
1416 | * @reserve: If set, only reserve an interrupt vector instead of assigning one | |
1417 | * | |
1418 | * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be | |
1419 | * used as the activate function for the &struct irq_domain_ops. The host_data | |
1420 | * for the IRQ domain must be the &struct gpio_chip. | |
1421 | */ | |
1422 | int gpiochip_irq_domain_activate(struct irq_domain *domain, | |
1423 | struct irq_data *data, bool reserve) | |
1424 | { | |
a0b66a73 | 1425 | struct gpio_chip *gc = domain->host_data; |
ef74f70e | 1426 | |
a0b66a73 | 1427 | return gpiochip_lock_as_irq(gc, data->hwirq); |
ef74f70e BM |
1428 | } |
1429 | EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate); | |
1430 | ||
1431 | /** | |
1432 | * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ | |
1433 | * @domain: The IRQ domain used by this IRQ chip | |
1434 | * @data: Outermost irq_data associated with the IRQ | |
1435 | * | |
1436 | * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to | |
1437 | * be used as the deactivate function for the &struct irq_domain_ops. The | |
1438 | * host_data for the IRQ domain must be the &struct gpio_chip. | |
1439 | */ | |
1440 | void gpiochip_irq_domain_deactivate(struct irq_domain *domain, | |
1441 | struct irq_data *data) | |
1442 | { | |
a0b66a73 | 1443 | struct gpio_chip *gc = domain->host_data; |
ef74f70e | 1444 | |
a0b66a73 | 1445 | return gpiochip_unlock_as_irq(gc, data->hwirq); |
ef74f70e BM |
1446 | } |
1447 | EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate); | |
1448 | ||
13daf489 | 1449 | static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset) |
14250520 | 1450 | { |
a0b66a73 | 1451 | struct irq_domain *domain = gc->irq.domain; |
fdd61a01 | 1452 | |
5467801f SP |
1453 | #ifdef CONFIG_GPIOLIB_IRQCHIP |
1454 | /* | |
1455 | * Avoid race condition with other code, which tries to lookup | |
1456 | * an IRQ before the irqchip has been properly registered, | |
1457 | * i.e. while gpiochip is still being brought up. | |
1458 | */ | |
1459 | if (!gc->irq.initialized) | |
1460 | return -EPROBE_DEFER; | |
1461 | #endif | |
1462 | ||
a0b66a73 | 1463 | if (!gpiochip_irqchip_irq_valid(gc, offset)) |
4e6b8238 | 1464 | return -ENXIO; |
5b76e79c | 1465 | |
fdd61a01 LW |
1466 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
1467 | if (irq_domain_is_hierarchy(domain)) { | |
1468 | struct irq_fwspec spec; | |
1469 | ||
1470 | spec.fwnode = domain->fwnode; | |
1471 | spec.param_count = 2; | |
a0b66a73 | 1472 | spec.param[0] = gc->irq.child_offset_to_irq(gc, offset); |
fdd61a01 LW |
1473 | spec.param[1] = IRQ_TYPE_NONE; |
1474 | ||
1475 | return irq_create_fwspec_mapping(&spec); | |
1476 | } | |
1477 | #endif | |
1478 | ||
1479 | return irq_create_mapping(domain, offset); | |
14250520 LW |
1480 | } |
1481 | ||
704f0875 | 1482 | int gpiochip_irq_reqres(struct irq_data *d) |
14250520 | 1483 | { |
a0b66a73 | 1484 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
5b76e79c | 1485 | |
a0b66a73 | 1486 | return gpiochip_reqres_irq(gc, d->hwirq); |
14250520 | 1487 | } |
704f0875 | 1488 | EXPORT_SYMBOL(gpiochip_irq_reqres); |
14250520 | 1489 | |
704f0875 | 1490 | void gpiochip_irq_relres(struct irq_data *d) |
14250520 | 1491 | { |
a0b66a73 | 1492 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
14250520 | 1493 | |
a0b66a73 | 1494 | gpiochip_relres_irq(gc, d->hwirq); |
14250520 | 1495 | } |
704f0875 | 1496 | EXPORT_SYMBOL(gpiochip_irq_relres); |
14250520 | 1497 | |
a8173820 MS |
1498 | static void gpiochip_irq_mask(struct irq_data *d) |
1499 | { | |
1500 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | |
1501 | ||
1502 | if (gc->irq.irq_mask) | |
1503 | gc->irq.irq_mask(d); | |
1504 | gpiochip_disable_irq(gc, d->hwirq); | |
1505 | } | |
1506 | ||
1507 | static void gpiochip_irq_unmask(struct irq_data *d) | |
1508 | { | |
1509 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | |
1510 | ||
1511 | gpiochip_enable_irq(gc, d->hwirq); | |
1512 | if (gc->irq.irq_unmask) | |
1513 | gc->irq.irq_unmask(d); | |
1514 | } | |
1515 | ||
461c1a7d | 1516 | static void gpiochip_irq_enable(struct irq_data *d) |
14250520 | 1517 | { |
a0b66a73 | 1518 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
e0d89728 | 1519 | |
a0b66a73 | 1520 | gpiochip_enable_irq(gc, d->hwirq); |
a8173820 | 1521 | gc->irq.irq_enable(d); |
461c1a7d HV |
1522 | } |
1523 | ||
1524 | static void gpiochip_irq_disable(struct irq_data *d) | |
1525 | { | |
a0b66a73 | 1526 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
461c1a7d | 1527 | |
a8173820 | 1528 | gc->irq.irq_disable(d); |
a0b66a73 | 1529 | gpiochip_disable_irq(gc, d->hwirq); |
461c1a7d HV |
1530 | } |
1531 | ||
a0b66a73 | 1532 | static void gpiochip_set_irq_hooks(struct gpio_chip *gc) |
ca620f2d | 1533 | { |
a0b66a73 | 1534 | struct irq_chip *irqchip = gc->irq.chip; |
ca620f2d | 1535 | |
6c846d02 MZ |
1536 | if (irqchip->flags & IRQCHIP_IMMUTABLE) |
1537 | return; | |
1538 | ||
1539 | chip_warn(gc, "not an immutable chip, please consider fixing it!\n"); | |
1540 | ||
ca620f2d HV |
1541 | if (!irqchip->irq_request_resources && |
1542 | !irqchip->irq_release_resources) { | |
1543 | irqchip->irq_request_resources = gpiochip_irq_reqres; | |
1544 | irqchip->irq_release_resources = gpiochip_irq_relres; | |
1545 | } | |
a0b66a73 | 1546 | if (WARN_ON(gc->irq.irq_enable)) |
461c1a7d | 1547 | return; |
171948ea | 1548 | /* Check if the irqchip already has this hook... */ |
9d552219 NS |
1549 | if (irqchip->irq_enable == gpiochip_irq_enable || |
1550 | irqchip->irq_mask == gpiochip_irq_mask) { | |
171948ea HV |
1551 | /* |
1552 | * ...and if so, give a gentle warning that this is bad | |
1553 | * practice. | |
1554 | */ | |
a0b66a73 | 1555 | chip_info(gc, |
171948ea HV |
1556 | "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n"); |
1557 | return; | |
1558 | } | |
a8173820 MS |
1559 | |
1560 | if (irqchip->irq_disable) { | |
1561 | gc->irq.irq_disable = irqchip->irq_disable; | |
1562 | irqchip->irq_disable = gpiochip_irq_disable; | |
1563 | } else { | |
1564 | gc->irq.irq_mask = irqchip->irq_mask; | |
1565 | irqchip->irq_mask = gpiochip_irq_mask; | |
1566 | } | |
1567 | ||
1568 | if (irqchip->irq_enable) { | |
1569 | gc->irq.irq_enable = irqchip->irq_enable; | |
1570 | irqchip->irq_enable = gpiochip_irq_enable; | |
1571 | } else { | |
1572 | gc->irq.irq_unmask = irqchip->irq_unmask; | |
1573 | irqchip->irq_unmask = gpiochip_irq_unmask; | |
1574 | } | |
14250520 LW |
1575 | } |
1576 | ||
e0d89728 TR |
1577 | /** |
1578 | * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip | |
a0b66a73 | 1579 | * @gc: the GPIO chip to add the IRQ chip to |
39c3fd58 AL |
1580 | * @lock_key: lockdep class for IRQ lock |
1581 | * @request_key: lockdep class for IRQ request | |
e0d89728 | 1582 | */ |
a0b66a73 | 1583 | static int gpiochip_add_irqchip(struct gpio_chip *gc, |
39c3fd58 AL |
1584 | struct lock_class_key *lock_key, |
1585 | struct lock_class_key *request_key) | |
e0d89728 | 1586 | { |
5c63a9db | 1587 | struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev); |
a0b66a73 | 1588 | struct irq_chip *irqchip = gc->irq.chip; |
e0d89728 TR |
1589 | unsigned int type; |
1590 | unsigned int i; | |
1591 | ||
1592 | if (!irqchip) | |
1593 | return 0; | |
1594 | ||
a0b66a73 LW |
1595 | if (gc->irq.parent_handler && gc->can_sleep) { |
1596 | chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n"); | |
e0d89728 TR |
1597 | return -EINVAL; |
1598 | } | |
1599 | ||
a0b66a73 | 1600 | type = gc->irq.default_type; |
e0d89728 TR |
1601 | |
1602 | /* | |
1603 | * Specifying a default trigger is a terrible idea if DT or ACPI is | |
1604 | * used to configure the interrupts, as you may end up with | |
1605 | * conflicting triggers. Tell the user, and reset to NONE. | |
1606 | */ | |
5c63a9db AS |
1607 | if (WARN(fwnode && type != IRQ_TYPE_NONE, |
1608 | "%pfw: Ignoring %u default trigger\n", fwnode, type)) | |
e0d89728 TR |
1609 | type = IRQ_TYPE_NONE; |
1610 | ||
ef382374 NS |
1611 | if (gc->to_irq) |
1612 | chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__); | |
1613 | ||
a0b66a73 LW |
1614 | gc->to_irq = gpiochip_to_irq; |
1615 | gc->irq.default_type = type; | |
1616 | gc->irq.lock_key = lock_key; | |
1617 | gc->irq.request_key = request_key; | |
e0d89728 | 1618 | |
fdd61a01 | 1619 | /* If a parent irqdomain is provided, let's build a hierarchy */ |
a0b66a73 LW |
1620 | if (gpiochip_hierarchy_is_hierarchical(gc)) { |
1621 | int ret = gpiochip_hierarchy_add_domain(gc); | |
fdd61a01 LW |
1622 | if (ret) |
1623 | return ret; | |
1624 | } else { | |
1625 | /* Some drivers provide custom irqdomain ops */ | |
5c63a9db | 1626 | gc->irq.domain = irq_domain_create_simple(fwnode, |
a0b66a73 LW |
1627 | gc->ngpio, |
1628 | gc->irq.first, | |
266315fb AS |
1629 | gc->irq.domain_ops ?: &gpiochip_domain_ops, |
1630 | gc); | |
a0b66a73 | 1631 | if (!gc->irq.domain) |
fdd61a01 LW |
1632 | return -EINVAL; |
1633 | } | |
e0d89728 | 1634 | |
a0b66a73 | 1635 | if (gc->irq.parent_handler) { |
a0b66a73 | 1636 | for (i = 0; i < gc->irq.num_parents; i++) { |
cfe6807d MZ |
1637 | void *data; |
1638 | ||
1639 | if (gc->irq.per_parent_data) | |
1640 | data = gc->irq.parent_handler_data_array[i]; | |
1641 | else | |
1642 | data = gc->irq.parent_handler_data ?: gc; | |
1643 | ||
e0d89728 TR |
1644 | /* |
1645 | * The parent IRQ chip is already using the chip_data | |
1646 | * for this IRQ chip, so our callbacks simply use the | |
1647 | * handler_data. | |
1648 | */ | |
a0b66a73 LW |
1649 | irq_set_chained_handler_and_data(gc->irq.parents[i], |
1650 | gc->irq.parent_handler, | |
e0d89728 TR |
1651 | data); |
1652 | } | |
e0d89728 TR |
1653 | } |
1654 | ||
a0b66a73 | 1655 | gpiochip_set_irq_hooks(gc); |
ca620f2d | 1656 | |
5467801f SP |
1657 | /* |
1658 | * Using barrier() here to prevent compiler from reordering | |
1659 | * gc->irq.initialized before initialization of above | |
1660 | * GPIO chip irq members. | |
1661 | */ | |
1662 | barrier(); | |
1663 | ||
1664 | gc->irq.initialized = true; | |
1665 | ||
06fb4ecf ML |
1666 | acpi_gpiochip_request_interrupts(gc); |
1667 | ||
e0d89728 TR |
1668 | return 0; |
1669 | } | |
1670 | ||
14250520 LW |
1671 | /** |
1672 | * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip | |
a0b66a73 | 1673 | * @gc: the gpiochip to remove the irqchip from |
14250520 LW |
1674 | * |
1675 | * This is called only from gpiochip_remove() | |
1676 | */ | |
a0b66a73 | 1677 | static void gpiochip_irqchip_remove(struct gpio_chip *gc) |
14250520 | 1678 | { |
a0b66a73 | 1679 | struct irq_chip *irqchip = gc->irq.chip; |
39e5f096 | 1680 | unsigned int offset; |
c3626fde | 1681 | |
a0b66a73 | 1682 | acpi_gpiochip_free_interrupts(gc); |
afa82fab | 1683 | |
a0b66a73 LW |
1684 | if (irqchip && gc->irq.parent_handler) { |
1685 | struct gpio_irq_chip *irq = &gc->irq; | |
39e5f096 TR |
1686 | unsigned int i; |
1687 | ||
1688 | for (i = 0; i < irq->num_parents; i++) | |
1689 | irq_set_chained_handler_and_data(irq->parents[i], | |
1690 | NULL, NULL); | |
25e4fe92 DES |
1691 | } |
1692 | ||
c3626fde | 1693 | /* Remove all IRQ mappings and delete the domain */ |
a0b66a73 | 1694 | if (gc->irq.domain) { |
39e5f096 TR |
1695 | unsigned int irq; |
1696 | ||
a0b66a73 LW |
1697 | for (offset = 0; offset < gc->ngpio; offset++) { |
1698 | if (!gpiochip_irqchip_irq_valid(gc, offset)) | |
79b804cb | 1699 | continue; |
f0fbe7bc | 1700 | |
a0b66a73 | 1701 | irq = irq_find_mapping(gc->irq.domain, offset); |
f0fbe7bc | 1702 | irq_dispose_mapping(irq); |
79b804cb | 1703 | } |
f0fbe7bc | 1704 | |
a0b66a73 | 1705 | irq_domain_remove(gc->irq.domain); |
c3626fde | 1706 | } |
14250520 | 1707 | |
6c846d02 | 1708 | if (irqchip && !(irqchip->flags & IRQCHIP_IMMUTABLE)) { |
461c1a7d HV |
1709 | if (irqchip->irq_request_resources == gpiochip_irq_reqres) { |
1710 | irqchip->irq_request_resources = NULL; | |
1711 | irqchip->irq_release_resources = NULL; | |
1712 | } | |
1713 | if (irqchip->irq_enable == gpiochip_irq_enable) { | |
a0b66a73 LW |
1714 | irqchip->irq_enable = gc->irq.irq_enable; |
1715 | irqchip->irq_disable = gc->irq.irq_disable; | |
461c1a7d | 1716 | } |
14250520 | 1717 | } |
a0b66a73 LW |
1718 | gc->irq.irq_enable = NULL; |
1719 | gc->irq.irq_disable = NULL; | |
1720 | gc->irq.chip = NULL; | |
79b804cb | 1721 | |
a0b66a73 | 1722 | gpiochip_irqchip_free_valid_mask(gc); |
14250520 LW |
1723 | } |
1724 | ||
6a45b0e2 MW |
1725 | /** |
1726 | * gpiochip_irqchip_add_domain() - adds an irqdomain to a gpiochip | |
1727 | * @gc: the gpiochip to add the irqchip to | |
1728 | * @domain: the irqdomain to add to the gpiochip | |
1729 | * | |
1730 | * This function adds an IRQ domain to the gpiochip. | |
1731 | */ | |
1732 | int gpiochip_irqchip_add_domain(struct gpio_chip *gc, | |
1733 | struct irq_domain *domain) | |
1734 | { | |
1735 | if (!domain) | |
1736 | return -EINVAL; | |
1737 | ||
1738 | gc->to_irq = gpiochip_to_irq; | |
1739 | gc->irq.domain = domain; | |
1740 | ||
1741 | return 0; | |
1742 | } | |
1743 | EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain); | |
1744 | ||
14250520 LW |
1745 | #else /* CONFIG_GPIOLIB_IRQCHIP */ |
1746 | ||
a0b66a73 | 1747 | static inline int gpiochip_add_irqchip(struct gpio_chip *gc, |
39c3fd58 AL |
1748 | struct lock_class_key *lock_key, |
1749 | struct lock_class_key *request_key) | |
e0d89728 TR |
1750 | { |
1751 | return 0; | |
1752 | } | |
a0b66a73 | 1753 | static void gpiochip_irqchip_remove(struct gpio_chip *gc) {} |
9411e3aa | 1754 | |
a0b66a73 | 1755 | static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc) |
9411e3aa AS |
1756 | { |
1757 | return 0; | |
1758 | } | |
1759 | ||
a0b66a73 | 1760 | static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc) |
79b804cb MW |
1761 | { |
1762 | return 0; | |
1763 | } | |
a0b66a73 | 1764 | static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc) |
79b804cb | 1765 | { } |
14250520 LW |
1766 | |
1767 | #endif /* CONFIG_GPIOLIB_IRQCHIP */ | |
1768 | ||
c771c2f4 JG |
1769 | /** |
1770 | * gpiochip_generic_request() - request the gpio function for a pin | |
a0b66a73 | 1771 | * @gc: the gpiochip owning the GPIO |
c771c2f4 JG |
1772 | * @offset: the offset of the GPIO to request for GPIO function |
1773 | */ | |
13daf489 | 1774 | int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset) |
c771c2f4 | 1775 | { |
56e337f2 BG |
1776 | #ifdef CONFIG_PINCTRL |
1777 | if (list_empty(&gc->gpiodev->pin_ranges)) | |
1778 | return 0; | |
1779 | #endif | |
1780 | ||
a0b66a73 | 1781 | return pinctrl_gpio_request(gc->gpiodev->base + offset); |
c771c2f4 JG |
1782 | } |
1783 | EXPORT_SYMBOL_GPL(gpiochip_generic_request); | |
1784 | ||
1785 | /** | |
1786 | * gpiochip_generic_free() - free the gpio function from a pin | |
a0b66a73 | 1787 | * @gc: the gpiochip to request the gpio function for |
c771c2f4 JG |
1788 | * @offset: the offset of the GPIO to free from GPIO function |
1789 | */ | |
13daf489 | 1790 | void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset) |
c771c2f4 | 1791 | { |
56e337f2 BG |
1792 | #ifdef CONFIG_PINCTRL |
1793 | if (list_empty(&gc->gpiodev->pin_ranges)) | |
1794 | return; | |
1795 | #endif | |
1796 | ||
a0b66a73 | 1797 | pinctrl_gpio_free(gc->gpiodev->base + offset); |
c771c2f4 JG |
1798 | } |
1799 | EXPORT_SYMBOL_GPL(gpiochip_generic_free); | |
1800 | ||
2956b5d9 MW |
1801 | /** |
1802 | * gpiochip_generic_config() - apply configuration for a pin | |
a0b66a73 | 1803 | * @gc: the gpiochip owning the GPIO |
2956b5d9 MW |
1804 | * @offset: the offset of the GPIO to apply the configuration |
1805 | * @config: the configuration to be applied | |
1806 | */ | |
13daf489 | 1807 | int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset, |
2956b5d9 MW |
1808 | unsigned long config) |
1809 | { | |
a0b66a73 | 1810 | return pinctrl_gpio_set_config(gc->gpiodev->base + offset, config); |
2956b5d9 MW |
1811 | } |
1812 | EXPORT_SYMBOL_GPL(gpiochip_generic_config); | |
1813 | ||
f23f1516 | 1814 | #ifdef CONFIG_PINCTRL |
165adc9c | 1815 | |
586a87e6 CR |
1816 | /** |
1817 | * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping | |
a0b66a73 | 1818 | * @gc: the gpiochip to add the range for |
d32651f6 | 1819 | * @pctldev: the pin controller to map to |
586a87e6 CR |
1820 | * @gpio_offset: the start offset in the current gpio_chip number space |
1821 | * @pin_group: name of the pin group inside the pin controller | |
973c1714 CL |
1822 | * |
1823 | * Calling this function directly from a DeviceTree-supported | |
1824 | * pinctrl driver is DEPRECATED. Please see Section 2.1 of | |
1825 | * Documentation/devicetree/bindings/gpio/gpio.txt on how to | |
1826 | * bind pinctrl and gpio drivers via the "gpio-ranges" property. | |
586a87e6 | 1827 | */ |
a0b66a73 | 1828 | int gpiochip_add_pingroup_range(struct gpio_chip *gc, |
586a87e6 CR |
1829 | struct pinctrl_dev *pctldev, |
1830 | unsigned int gpio_offset, const char *pin_group) | |
1831 | { | |
1832 | struct gpio_pin_range *pin_range; | |
a0b66a73 | 1833 | struct gpio_device *gdev = gc->gpiodev; |
586a87e6 CR |
1834 | int ret; |
1835 | ||
1836 | pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL); | |
1837 | if (!pin_range) { | |
a0b66a73 | 1838 | chip_err(gc, "failed to allocate pin ranges\n"); |
586a87e6 CR |
1839 | return -ENOMEM; |
1840 | } | |
1841 | ||
1842 | /* Use local offset as range ID */ | |
1843 | pin_range->range.id = gpio_offset; | |
a0b66a73 LW |
1844 | pin_range->range.gc = gc; |
1845 | pin_range->range.name = gc->label; | |
fdeb8e15 | 1846 | pin_range->range.base = gdev->base + gpio_offset; |
586a87e6 CR |
1847 | pin_range->pctldev = pctldev; |
1848 | ||
1849 | ret = pinctrl_get_group_pins(pctldev, pin_group, | |
1850 | &pin_range->range.pins, | |
1851 | &pin_range->range.npins); | |
61c6375d MN |
1852 | if (ret < 0) { |
1853 | kfree(pin_range); | |
586a87e6 | 1854 | return ret; |
61c6375d | 1855 | } |
586a87e6 CR |
1856 | |
1857 | pinctrl_add_gpio_range(pctldev, &pin_range->range); | |
1858 | ||
a0b66a73 | 1859 | chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n", |
1a2a99c6 | 1860 | gpio_offset, gpio_offset + pin_range->range.npins - 1, |
586a87e6 CR |
1861 | pinctrl_dev_get_devname(pctldev), pin_group); |
1862 | ||
20ec3e39 | 1863 | list_add_tail(&pin_range->node, &gdev->pin_ranges); |
586a87e6 CR |
1864 | |
1865 | return 0; | |
1866 | } | |
1867 | EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range); | |
1868 | ||
3f0f8670 LW |
1869 | /** |
1870 | * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping | |
a0b66a73 | 1871 | * @gc: the gpiochip to add the range for |
950d55f5 | 1872 | * @pinctl_name: the dev_name() of the pin controller to map to |
316511c0 LW |
1873 | * @gpio_offset: the start offset in the current gpio_chip number space |
1874 | * @pin_offset: the start offset in the pin controller number space | |
3f0f8670 LW |
1875 | * @npins: the number of pins from the offset of each pin space (GPIO and |
1876 | * pin controller) to accumulate in this range | |
950d55f5 TR |
1877 | * |
1878 | * Returns: | |
1879 | * 0 on success, or a negative error-code on failure. | |
973c1714 CL |
1880 | * |
1881 | * Calling this function directly from a DeviceTree-supported | |
1882 | * pinctrl driver is DEPRECATED. Please see Section 2.1 of | |
1883 | * Documentation/devicetree/bindings/gpio/gpio.txt on how to | |
1884 | * bind pinctrl and gpio drivers via the "gpio-ranges" property. | |
3f0f8670 | 1885 | */ |
a0b66a73 | 1886 | int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name, |
316511c0 | 1887 | unsigned int gpio_offset, unsigned int pin_offset, |
3f0f8670 | 1888 | unsigned int npins) |
f23f1516 SH |
1889 | { |
1890 | struct gpio_pin_range *pin_range; | |
a0b66a73 | 1891 | struct gpio_device *gdev = gc->gpiodev; |
b4d4b1f0 | 1892 | int ret; |
f23f1516 | 1893 | |
3f0f8670 | 1894 | pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL); |
f23f1516 | 1895 | if (!pin_range) { |
a0b66a73 | 1896 | chip_err(gc, "failed to allocate pin ranges\n"); |
1e63d7b9 | 1897 | return -ENOMEM; |
f23f1516 SH |
1898 | } |
1899 | ||
3f0f8670 | 1900 | /* Use local offset as range ID */ |
316511c0 | 1901 | pin_range->range.id = gpio_offset; |
a0b66a73 LW |
1902 | pin_range->range.gc = gc; |
1903 | pin_range->range.name = gc->label; | |
fdeb8e15 | 1904 | pin_range->range.base = gdev->base + gpio_offset; |
316511c0 | 1905 | pin_range->range.pin_base = pin_offset; |
f23f1516 | 1906 | pin_range->range.npins = npins; |
192c369c | 1907 | pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name, |
f23f1516 | 1908 | &pin_range->range); |
8f23ca1a | 1909 | if (IS_ERR(pin_range->pctldev)) { |
b4d4b1f0 | 1910 | ret = PTR_ERR(pin_range->pctldev); |
a0b66a73 | 1911 | chip_err(gc, "could not create pin range\n"); |
3f0f8670 | 1912 | kfree(pin_range); |
b4d4b1f0 | 1913 | return ret; |
3f0f8670 | 1914 | } |
a0b66a73 | 1915 | chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n", |
1a2a99c6 | 1916 | gpio_offset, gpio_offset + npins - 1, |
316511c0 LW |
1917 | pinctl_name, |
1918 | pin_offset, pin_offset + npins - 1); | |
f23f1516 | 1919 | |
20ec3e39 | 1920 | list_add_tail(&pin_range->node, &gdev->pin_ranges); |
1e63d7b9 LW |
1921 | |
1922 | return 0; | |
f23f1516 | 1923 | } |
165adc9c | 1924 | EXPORT_SYMBOL_GPL(gpiochip_add_pin_range); |
f23f1516 | 1925 | |
3f0f8670 LW |
1926 | /** |
1927 | * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings | |
a0b66a73 | 1928 | * @gc: the chip to remove all the mappings for |
3f0f8670 | 1929 | */ |
a0b66a73 | 1930 | void gpiochip_remove_pin_ranges(struct gpio_chip *gc) |
f23f1516 SH |
1931 | { |
1932 | struct gpio_pin_range *pin_range, *tmp; | |
a0b66a73 | 1933 | struct gpio_device *gdev = gc->gpiodev; |
f23f1516 | 1934 | |
20ec3e39 | 1935 | list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) { |
f23f1516 SH |
1936 | list_del(&pin_range->node); |
1937 | pinctrl_remove_gpio_range(pin_range->pctldev, | |
1938 | &pin_range->range); | |
3f0f8670 | 1939 | kfree(pin_range); |
f23f1516 SH |
1940 | } |
1941 | } | |
165adc9c LW |
1942 | EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges); |
1943 | ||
1944 | #endif /* CONFIG_PINCTRL */ | |
f23f1516 | 1945 | |
d2876d08 DB |
1946 | /* These "optional" allocation calls help prevent drivers from stomping |
1947 | * on each other, and help provide better diagnostics in debugfs. | |
1948 | * They're called even less than the "set direction" calls. | |
1949 | */ | |
fac9d885 | 1950 | static int gpiod_request_commit(struct gpio_desc *desc, const char *label) |
d2876d08 | 1951 | { |
a0b66a73 | 1952 | struct gpio_chip *gc = desc->gdev->chip; |
d377f56f | 1953 | int ret; |
d2876d08 | 1954 | unsigned long flags; |
3789f5ac | 1955 | unsigned offset; |
d2876d08 | 1956 | |
18534df4 MS |
1957 | if (label) { |
1958 | label = kstrdup_const(label, GFP_KERNEL); | |
1959 | if (!label) | |
1960 | return -ENOMEM; | |
1961 | } | |
1962 | ||
bcabdef1 AC |
1963 | spin_lock_irqsave(&gpio_lock, flags); |
1964 | ||
d2876d08 | 1965 | /* NOTE: gpio_request() can be called in early boot, |
35e8bb51 | 1966 | * before IRQs are enabled, for non-sleeping (SOC) GPIOs. |
d2876d08 DB |
1967 | */ |
1968 | ||
1969 | if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) { | |
1970 | desc_set_label(desc, label ? : "?"); | |
438d8908 | 1971 | } else { |
d377f56f | 1972 | ret = -EBUSY; |
95d9f84f | 1973 | goto out_free_unlock; |
35e8bb51 DB |
1974 | } |
1975 | ||
a0b66a73 LW |
1976 | if (gc->request) { |
1977 | /* gc->request may sleep */ | |
35e8bb51 | 1978 | spin_unlock_irqrestore(&gpio_lock, flags); |
3789f5ac | 1979 | offset = gpio_chip_hwgpio(desc); |
a0b66a73 LW |
1980 | if (gpiochip_line_is_valid(gc, offset)) |
1981 | ret = gc->request(gc, offset); | |
3789f5ac | 1982 | else |
d377f56f | 1983 | ret = -EINVAL; |
35e8bb51 DB |
1984 | spin_lock_irqsave(&gpio_lock, flags); |
1985 | ||
8bbff39c | 1986 | if (ret) { |
35e8bb51 | 1987 | desc_set_label(desc, NULL); |
35e8bb51 | 1988 | clear_bit(FLAG_REQUESTED, &desc->flags); |
95d9f84f | 1989 | goto out_free_unlock; |
35e8bb51 | 1990 | } |
438d8908 | 1991 | } |
a0b66a73 LW |
1992 | if (gc->get_direction) { |
1993 | /* gc->get_direction may sleep */ | |
80b0a602 | 1994 | spin_unlock_irqrestore(&gpio_lock, flags); |
372e722e | 1995 | gpiod_get_direction(desc); |
80b0a602 MN |
1996 | spin_lock_irqsave(&gpio_lock, flags); |
1997 | } | |
77c2d792 | 1998 | spin_unlock_irqrestore(&gpio_lock, flags); |
95d9f84f AS |
1999 | return 0; |
2000 | ||
2001 | out_free_unlock: | |
2002 | spin_unlock_irqrestore(&gpio_lock, flags); | |
2003 | kfree_const(label); | |
d377f56f | 2004 | return ret; |
77c2d792 MW |
2005 | } |
2006 | ||
fdeb8e15 LW |
2007 | /* |
2008 | * This descriptor validation needs to be inserted verbatim into each | |
2009 | * function taking a descriptor, so we need to use a preprocessor | |
54d77198 LW |
2010 | * macro to avoid endless duplication. If the desc is NULL it is an |
2011 | * optional GPIO and calls should just bail out. | |
fdeb8e15 | 2012 | */ |
a746a232 RV |
2013 | static int validate_desc(const struct gpio_desc *desc, const char *func) |
2014 | { | |
2015 | if (!desc) | |
2016 | return 0; | |
2017 | if (IS_ERR(desc)) { | |
2018 | pr_warn("%s: invalid GPIO (errorpointer)\n", func); | |
2019 | return PTR_ERR(desc); | |
2020 | } | |
2021 | if (!desc->gdev) { | |
2022 | pr_warn("%s: invalid GPIO (no device)\n", func); | |
2023 | return -EINVAL; | |
2024 | } | |
2025 | if (!desc->gdev->chip) { | |
2026 | dev_warn(&desc->gdev->dev, | |
2027 | "%s: backing chip is gone\n", func); | |
2028 | return 0; | |
2029 | } | |
2030 | return 1; | |
2031 | } | |
2032 | ||
fdeb8e15 | 2033 | #define VALIDATE_DESC(desc) do { \ |
a746a232 RV |
2034 | int __valid = validate_desc(desc, __func__); \ |
2035 | if (__valid <= 0) \ | |
2036 | return __valid; \ | |
2037 | } while (0) | |
fdeb8e15 LW |
2038 | |
2039 | #define VALIDATE_DESC_VOID(desc) do { \ | |
a746a232 RV |
2040 | int __valid = validate_desc(desc, __func__); \ |
2041 | if (__valid <= 0) \ | |
fdeb8e15 | 2042 | return; \ |
a746a232 | 2043 | } while (0) |
fdeb8e15 | 2044 | |
0eb4c6c2 | 2045 | int gpiod_request(struct gpio_desc *desc, const char *label) |
77c2d792 | 2046 | { |
d377f56f | 2047 | int ret = -EPROBE_DEFER; |
fdeb8e15 | 2048 | struct gpio_device *gdev; |
77c2d792 | 2049 | |
fdeb8e15 LW |
2050 | VALIDATE_DESC(desc); |
2051 | gdev = desc->gdev; | |
77c2d792 | 2052 | |
fdeb8e15 | 2053 | if (try_module_get(gdev->owner)) { |
d377f56f | 2054 | ret = gpiod_request_commit(desc, label); |
8bbff39c | 2055 | if (ret) |
fdeb8e15 | 2056 | module_put(gdev->owner); |
33a68e86 LW |
2057 | else |
2058 | get_device(&gdev->dev); | |
77c2d792 MW |
2059 | } |
2060 | ||
d377f56f LW |
2061 | if (ret) |
2062 | gpiod_dbg(desc, "%s: status %d\n", __func__, ret); | |
77c2d792 | 2063 | |
d377f56f | 2064 | return ret; |
d2876d08 | 2065 | } |
372e722e | 2066 | |
fac9d885 | 2067 | static bool gpiod_free_commit(struct gpio_desc *desc) |
d2876d08 | 2068 | { |
77c2d792 | 2069 | bool ret = false; |
d2876d08 | 2070 | unsigned long flags; |
a0b66a73 | 2071 | struct gpio_chip *gc; |
d2876d08 | 2072 | |
3d599d1c UKK |
2073 | might_sleep(); |
2074 | ||
372e722e | 2075 | gpiod_unexport(desc); |
d8f388d8 | 2076 | |
d2876d08 DB |
2077 | spin_lock_irqsave(&gpio_lock, flags); |
2078 | ||
a0b66a73 LW |
2079 | gc = desc->gdev->chip; |
2080 | if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) { | |
2081 | if (gc->free) { | |
35e8bb51 | 2082 | spin_unlock_irqrestore(&gpio_lock, flags); |
a0b66a73 LW |
2083 | might_sleep_if(gc->can_sleep); |
2084 | gc->free(gc, gpio_chip_hwgpio(desc)); | |
35e8bb51 DB |
2085 | spin_lock_irqsave(&gpio_lock, flags); |
2086 | } | |
18534df4 | 2087 | kfree_const(desc->label); |
d2876d08 | 2088 | desc_set_label(desc, NULL); |
07697461 | 2089 | clear_bit(FLAG_ACTIVE_LOW, &desc->flags); |
35e8bb51 | 2090 | clear_bit(FLAG_REQUESTED, &desc->flags); |
aca5ce14 | 2091 | clear_bit(FLAG_OPEN_DRAIN, &desc->flags); |
25553ff0 | 2092 | clear_bit(FLAG_OPEN_SOURCE, &desc->flags); |
9225d516 DF |
2093 | clear_bit(FLAG_PULL_UP, &desc->flags); |
2094 | clear_bit(FLAG_PULL_DOWN, &desc->flags); | |
2148ad77 | 2095 | clear_bit(FLAG_BIAS_DISABLE, &desc->flags); |
73e03419 KG |
2096 | clear_bit(FLAG_EDGE_RISING, &desc->flags); |
2097 | clear_bit(FLAG_EDGE_FALLING, &desc->flags); | |
f625d460 | 2098 | clear_bit(FLAG_IS_HOGGED, &desc->flags); |
63636d95 GU |
2099 | #ifdef CONFIG_OF_DYNAMIC |
2100 | desc->hog = NULL; | |
65cff704 KG |
2101 | #endif |
2102 | #ifdef CONFIG_GPIO_CDEV | |
2103 | WRITE_ONCE(desc->debounce_period_us, 0); | |
63636d95 | 2104 | #endif |
77c2d792 MW |
2105 | ret = true; |
2106 | } | |
d2876d08 DB |
2107 | |
2108 | spin_unlock_irqrestore(&gpio_lock, flags); | |
6accc376 KG |
2109 | blocking_notifier_call_chain(&desc->gdev->notifier, |
2110 | GPIOLINE_CHANGED_RELEASED, desc); | |
51c1064e | 2111 | |
77c2d792 MW |
2112 | return ret; |
2113 | } | |
2114 | ||
0eb4c6c2 | 2115 | void gpiod_free(struct gpio_desc *desc) |
77c2d792 | 2116 | { |
fac9d885 | 2117 | if (desc && desc->gdev && gpiod_free_commit(desc)) { |
fdeb8e15 | 2118 | module_put(desc->gdev->owner); |
33a68e86 LW |
2119 | put_device(&desc->gdev->dev); |
2120 | } else { | |
77c2d792 | 2121 | WARN_ON(extra_checks); |
33a68e86 | 2122 | } |
d2876d08 | 2123 | } |
372e722e | 2124 | |
d2876d08 DB |
2125 | /** |
2126 | * gpiochip_is_requested - return string iff signal was requested | |
a0b66a73 | 2127 | * @gc: controller managing the signal |
d2876d08 DB |
2128 | * @offset: of signal within controller's 0..(ngpio - 1) range |
2129 | * | |
2130 | * Returns NULL if the GPIO is not currently requested, else a string. | |
9c8318ff AC |
2131 | * The string returned is the label passed to gpio_request(); if none has been |
2132 | * passed it is a meaningless, non-NULL constant. | |
d2876d08 DB |
2133 | * |
2134 | * This function is for use by GPIO controller drivers. The label can | |
2135 | * help with diagnostics, and knowing that the signal is used as a GPIO | |
2136 | * can help avoid accidentally multiplexing it to another controller. | |
2137 | */ | |
13daf489 | 2138 | const char *gpiochip_is_requested(struct gpio_chip *gc, unsigned int offset) |
d2876d08 | 2139 | { |
6c0b4e6c | 2140 | struct gpio_desc *desc; |
6c0b4e6c | 2141 | |
a0b66a73 | 2142 | desc = gpiochip_get_desc(gc, offset); |
1739a2d8 BG |
2143 | if (IS_ERR(desc)) |
2144 | return NULL; | |
6c0b4e6c | 2145 | |
372e722e | 2146 | if (test_bit(FLAG_REQUESTED, &desc->flags) == 0) |
d2876d08 | 2147 | return NULL; |
372e722e | 2148 | return desc->label; |
d2876d08 DB |
2149 | } |
2150 | EXPORT_SYMBOL_GPL(gpiochip_is_requested); | |
2151 | ||
77c2d792 MW |
2152 | /** |
2153 | * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor | |
a0b66a73 | 2154 | * @gc: GPIO chip |
950d55f5 | 2155 | * @hwnum: hardware number of the GPIO for which to request the descriptor |
77c2d792 | 2156 | * @label: label for the GPIO |
5923ea6c LW |
2157 | * @lflags: lookup flags for this GPIO or 0 if default, this can be used to |
2158 | * specify things like line inversion semantics with the machine flags | |
2159 | * such as GPIO_OUT_LOW | |
2160 | * @dflags: descriptor request flags for this GPIO or 0 if default, this | |
2161 | * can be used to specify consumer semantics such as open drain | |
77c2d792 MW |
2162 | * |
2163 | * Function allows GPIO chip drivers to request and use their own GPIO | |
2164 | * descriptors via gpiolib API. Difference to gpiod_request() is that this | |
2165 | * function will not increase reference count of the GPIO chip module. This | |
2166 | * allows the GPIO chip module to be unloaded as needed (we assume that the | |
2167 | * GPIO chip driver handles freeing the GPIOs it has requested). | |
950d55f5 TR |
2168 | * |
2169 | * Returns: | |
2170 | * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error | |
2171 | * code on failure. | |
77c2d792 | 2172 | */ |
a0b66a73 | 2173 | struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc, |
06863620 | 2174 | unsigned int hwnum, |
21abf103 | 2175 | const char *label, |
5923ea6c LW |
2176 | enum gpio_lookup_flags lflags, |
2177 | enum gpiod_flags dflags) | |
77c2d792 | 2178 | { |
a0b66a73 | 2179 | struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum); |
d377f56f | 2180 | int ret; |
77c2d792 | 2181 | |
abdc08a3 | 2182 | if (IS_ERR(desc)) { |
a0b66a73 | 2183 | chip_err(gc, "failed to get GPIO descriptor\n"); |
abdc08a3 AC |
2184 | return desc; |
2185 | } | |
2186 | ||
d377f56f LW |
2187 | ret = gpiod_request_commit(desc, label); |
2188 | if (ret < 0) | |
2189 | return ERR_PTR(ret); | |
77c2d792 | 2190 | |
d377f56f LW |
2191 | ret = gpiod_configure_flags(desc, label, lflags, dflags); |
2192 | if (ret) { | |
a0b66a73 | 2193 | chip_err(gc, "setup of own GPIO %s failed\n", label); |
21abf103 | 2194 | gpiod_free_commit(desc); |
d377f56f | 2195 | return ERR_PTR(ret); |
21abf103 LW |
2196 | } |
2197 | ||
abdc08a3 | 2198 | return desc; |
77c2d792 | 2199 | } |
f7d4ad98 | 2200 | EXPORT_SYMBOL_GPL(gpiochip_request_own_desc); |
77c2d792 MW |
2201 | |
2202 | /** | |
2203 | * gpiochip_free_own_desc - Free GPIO requested by the chip driver | |
2204 | * @desc: GPIO descriptor to free | |
2205 | * | |
2206 | * Function frees the given GPIO requested previously with | |
2207 | * gpiochip_request_own_desc(). | |
2208 | */ | |
2209 | void gpiochip_free_own_desc(struct gpio_desc *desc) | |
2210 | { | |
2211 | if (desc) | |
fac9d885 | 2212 | gpiod_free_commit(desc); |
77c2d792 | 2213 | } |
f7d4ad98 | 2214 | EXPORT_SYMBOL_GPL(gpiochip_free_own_desc); |
d2876d08 | 2215 | |
fdeb8e15 LW |
2216 | /* |
2217 | * Drivers MUST set GPIO direction before making get/set calls. In | |
d2876d08 DB |
2218 | * some cases this is done in early boot, before IRQs are enabled. |
2219 | * | |
2220 | * As a rule these aren't called more than once (except for drivers | |
2221 | * using the open-drain emulation idiom) so these are natural places | |
2222 | * to accumulate extra debugging checks. Note that we can't (yet) | |
2223 | * rely on gpio_request() having been called beforehand. | |
2224 | */ | |
2225 | ||
d99f8876 | 2226 | static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset, |
62adc6f3 | 2227 | unsigned long config) |
71479789 | 2228 | { |
d90f3685 BG |
2229 | if (!gc->set_config) |
2230 | return -ENOTSUPP; | |
542f3615 | 2231 | |
62adc6f3 | 2232 | return gc->set_config(gc, offset, config); |
71479789 TP |
2233 | } |
2234 | ||
0c4d8666 AS |
2235 | static int gpio_set_config_with_argument(struct gpio_desc *desc, |
2236 | enum pin_config_param mode, | |
2237 | u32 argument) | |
d99f8876 | 2238 | { |
a0b66a73 | 2239 | struct gpio_chip *gc = desc->gdev->chip; |
91b4ea5f | 2240 | unsigned long config; |
0c4d8666 AS |
2241 | |
2242 | config = pinconf_to_config_packed(mode, argument); | |
2243 | return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config); | |
2244 | } | |
2245 | ||
baca3b15 AS |
2246 | static int gpio_set_config_with_argument_optional(struct gpio_desc *desc, |
2247 | enum pin_config_param mode, | |
2248 | u32 argument) | |
2249 | { | |
2250 | struct device *dev = &desc->gdev->dev; | |
2251 | int gpio = gpio_chip_hwgpio(desc); | |
2252 | int ret; | |
2253 | ||
2254 | ret = gpio_set_config_with_argument(desc, mode, argument); | |
2255 | if (ret != -ENOTSUPP) | |
2256 | return ret; | |
d99f8876 BG |
2257 | |
2258 | switch (mode) { | |
baca3b15 AS |
2259 | case PIN_CONFIG_PERSIST_STATE: |
2260 | dev_dbg(dev, "Persistence not supported for GPIO %d\n", gpio); | |
d99f8876 | 2261 | break; |
d99f8876 | 2262 | default: |
baca3b15 | 2263 | break; |
d99f8876 BG |
2264 | } |
2265 | ||
baca3b15 AS |
2266 | return 0; |
2267 | } | |
2268 | ||
0c4d8666 AS |
2269 | static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode) |
2270 | { | |
6aa32ad7 | 2271 | return gpio_set_config_with_argument(desc, mode, 0); |
d99f8876 BG |
2272 | } |
2273 | ||
5f4bf171 | 2274 | static int gpio_set_bias(struct gpio_desc *desc) |
2148ad77 | 2275 | { |
9ef6293c | 2276 | enum pin_config_param bias; |
6aa32ad7 | 2277 | unsigned int arg; |
2148ad77 KG |
2278 | |
2279 | if (test_bit(FLAG_BIAS_DISABLE, &desc->flags)) | |
2280 | bias = PIN_CONFIG_BIAS_DISABLE; | |
2281 | else if (test_bit(FLAG_PULL_UP, &desc->flags)) | |
2282 | bias = PIN_CONFIG_BIAS_PULL_UP; | |
2283 | else if (test_bit(FLAG_PULL_DOWN, &desc->flags)) | |
2284 | bias = PIN_CONFIG_BIAS_PULL_DOWN; | |
9ef6293c AS |
2285 | else |
2286 | return 0; | |
2148ad77 | 2287 | |
6aa32ad7 AS |
2288 | switch (bias) { |
2289 | case PIN_CONFIG_BIAS_PULL_DOWN: | |
2290 | case PIN_CONFIG_BIAS_PULL_UP: | |
2291 | arg = 1; | |
2292 | break; | |
2293 | ||
2294 | default: | |
2295 | arg = 0; | |
2296 | break; | |
2148ad77 | 2297 | } |
6aa32ad7 | 2298 | |
baca3b15 | 2299 | return gpio_set_config_with_argument_optional(desc, bias, arg); |
2148ad77 KG |
2300 | } |
2301 | ||
660c619b AS |
2302 | /** |
2303 | * gpio_set_debounce_timeout() - Set debounce timeout | |
2304 | * @desc: GPIO descriptor to set the debounce timeout | |
2305 | * @debounce: Debounce timeout in microseconds | |
2306 | * | |
2307 | * The function calls the certain GPIO driver to set debounce timeout | |
2308 | * in the hardware. | |
2309 | * | |
2310 | * Returns 0 on success, or negative error code otherwise. | |
2311 | */ | |
f725edd8 AS |
2312 | int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce) |
2313 | { | |
2314 | return gpio_set_config_with_argument_optional(desc, | |
2315 | PIN_CONFIG_INPUT_DEBOUNCE, | |
2316 | debounce); | |
2148ad77 KG |
2317 | } |
2318 | ||
79a9becd AC |
2319 | /** |
2320 | * gpiod_direction_input - set the GPIO direction to input | |
2321 | * @desc: GPIO to set to input | |
2322 | * | |
2323 | * Set the direction of the passed GPIO to input, such as gpiod_get_value() can | |
2324 | * be called safely on it. | |
2325 | * | |
2326 | * Return 0 in case of success, else an error code. | |
2327 | */ | |
2328 | int gpiod_direction_input(struct gpio_desc *desc) | |
d2876d08 | 2329 | { |
a0b66a73 | 2330 | struct gpio_chip *gc; |
d377f56f | 2331 | int ret = 0; |
d2876d08 | 2332 | |
fdeb8e15 | 2333 | VALIDATE_DESC(desc); |
a0b66a73 | 2334 | gc = desc->gdev->chip; |
bcabdef1 | 2335 | |
e48d194d LW |
2336 | /* |
2337 | * It is legal to have no .get() and .direction_input() specified if | |
2338 | * the chip is output-only, but you can't specify .direction_input() | |
2339 | * and not support the .get() operation, that doesn't make sense. | |
2340 | */ | |
a0b66a73 | 2341 | if (!gc->get && gc->direction_input) { |
6424de5a | 2342 | gpiod_warn(desc, |
e48d194d LW |
2343 | "%s: missing get() but have direction_input()\n", |
2344 | __func__); | |
be1a4b13 LW |
2345 | return -EIO; |
2346 | } | |
2347 | ||
e48d194d LW |
2348 | /* |
2349 | * If we have a .direction_input() callback, things are simple, | |
2350 | * just call it. Else we are some input-only chip so try to check the | |
2351 | * direction (if .get_direction() is supported) else we silently | |
2352 | * assume we are in input mode after this. | |
2353 | */ | |
a0b66a73 LW |
2354 | if (gc->direction_input) { |
2355 | ret = gc->direction_input(gc, gpio_chip_hwgpio(desc)); | |
2356 | } else if (gc->get_direction && | |
2357 | (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) { | |
ae9847f4 | 2358 | gpiod_warn(desc, |
e48d194d LW |
2359 | "%s: missing direction_input() operation and line is output\n", |
2360 | __func__); | |
ae9847f4 RRD |
2361 | return -EIO; |
2362 | } | |
2148ad77 | 2363 | if (ret == 0) { |
d2876d08 | 2364 | clear_bit(FLAG_IS_OUT, &desc->flags); |
5f4bf171 | 2365 | ret = gpio_set_bias(desc); |
2148ad77 | 2366 | } |
d449991c | 2367 | |
d377f56f | 2368 | trace_gpio_direction(desc_to_gpio(desc), 1, ret); |
d82da797 | 2369 | |
d377f56f | 2370 | return ret; |
d2876d08 | 2371 | } |
79a9becd | 2372 | EXPORT_SYMBOL_GPL(gpiod_direction_input); |
372e722e | 2373 | |
fac9d885 | 2374 | static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value) |
d2876d08 | 2375 | { |
c663e5f5 | 2376 | struct gpio_chip *gc = desc->gdev->chip; |
ad17731d | 2377 | int val = !!value; |
ae9847f4 | 2378 | int ret = 0; |
d2876d08 | 2379 | |
e48d194d LW |
2380 | /* |
2381 | * It's OK not to specify .direction_output() if the gpiochip is | |
2382 | * output-only, but if there is then not even a .set() operation it | |
2383 | * is pretty tricky to drive the output line. | |
2384 | */ | |
ae9847f4 | 2385 | if (!gc->set && !gc->direction_output) { |
6424de5a | 2386 | gpiod_warn(desc, |
e48d194d LW |
2387 | "%s: missing set() and direction_output() operations\n", |
2388 | __func__); | |
be1a4b13 LW |
2389 | return -EIO; |
2390 | } | |
2391 | ||
ae9847f4 RRD |
2392 | if (gc->direction_output) { |
2393 | ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val); | |
2394 | } else { | |
e48d194d | 2395 | /* Check that we are in output mode if we can */ |
ae9847f4 RRD |
2396 | if (gc->get_direction && |
2397 | gc->get_direction(gc, gpio_chip_hwgpio(desc))) { | |
2398 | gpiod_warn(desc, | |
2399 | "%s: missing direction_output() operation\n", | |
2400 | __func__); | |
2401 | return -EIO; | |
2402 | } | |
e48d194d LW |
2403 | /* |
2404 | * If we can't actively set the direction, we are some | |
2405 | * output-only chip, so just drive the output as desired. | |
2406 | */ | |
ae9847f4 RRD |
2407 | gc->set(gc, gpio_chip_hwgpio(desc), val); |
2408 | } | |
2409 | ||
c663e5f5 | 2410 | if (!ret) |
d2876d08 | 2411 | set_bit(FLAG_IS_OUT, &desc->flags); |
ad17731d | 2412 | trace_gpio_value(desc_to_gpio(desc), 0, val); |
c663e5f5 LW |
2413 | trace_gpio_direction(desc_to_gpio(desc), 0, ret); |
2414 | return ret; | |
d2876d08 | 2415 | } |
ef70bbe1 PZ |
2416 | |
2417 | /** | |
2418 | * gpiod_direction_output_raw - set the GPIO direction to output | |
2419 | * @desc: GPIO to set to output | |
2420 | * @value: initial output value of the GPIO | |
2421 | * | |
2422 | * Set the direction of the passed GPIO to output, such as gpiod_set_value() can | |
2423 | * be called safely on it. The initial value of the output must be specified | |
2424 | * as raw value on the physical line without regard for the ACTIVE_LOW status. | |
2425 | * | |
2426 | * Return 0 in case of success, else an error code. | |
2427 | */ | |
2428 | int gpiod_direction_output_raw(struct gpio_desc *desc, int value) | |
2429 | { | |
fdeb8e15 | 2430 | VALIDATE_DESC(desc); |
fac9d885 | 2431 | return gpiod_direction_output_raw_commit(desc, value); |
ef70bbe1 PZ |
2432 | } |
2433 | EXPORT_SYMBOL_GPL(gpiod_direction_output_raw); | |
2434 | ||
2435 | /** | |
90df4fe0 | 2436 | * gpiod_direction_output - set the GPIO direction to output |
ef70bbe1 PZ |
2437 | * @desc: GPIO to set to output |
2438 | * @value: initial output value of the GPIO | |
2439 | * | |
2440 | * Set the direction of the passed GPIO to output, such as gpiod_set_value() can | |
2441 | * be called safely on it. The initial value of the output must be specified | |
2442 | * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into | |
2443 | * account. | |
2444 | * | |
2445 | * Return 0 in case of success, else an error code. | |
2446 | */ | |
2447 | int gpiod_direction_output(struct gpio_desc *desc, int value) | |
2448 | { | |
02e47980 LW |
2449 | int ret; |
2450 | ||
fdeb8e15 | 2451 | VALIDATE_DESC(desc); |
ef70bbe1 PZ |
2452 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
2453 | value = !value; | |
ad17731d LW |
2454 | else |
2455 | value = !!value; | |
02e47980 | 2456 | |
4e9439dd HV |
2457 | /* GPIOs used for enabled IRQs shall not be set as output */ |
2458 | if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) && | |
2459 | test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) { | |
02e47980 LW |
2460 | gpiod_err(desc, |
2461 | "%s: tried to set a GPIO tied to an IRQ as output\n", | |
2462 | __func__); | |
2463 | return -EIO; | |
2464 | } | |
2465 | ||
2466 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) { | |
2467 | /* First see if we can enable open drain in hardware */ | |
83522358 | 2468 | ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN); |
02e47980 LW |
2469 | if (!ret) |
2470 | goto set_output_value; | |
2471 | /* Emulate open drain by not actively driving the line high */ | |
e735244e BG |
2472 | if (value) { |
2473 | ret = gpiod_direction_input(desc); | |
2474 | goto set_output_flag; | |
2475 | } | |
1cef8b50 | 2476 | } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) { |
83522358 | 2477 | ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE); |
02e47980 LW |
2478 | if (!ret) |
2479 | goto set_output_value; | |
2480 | /* Emulate open source by not actively driving the line low */ | |
e735244e BG |
2481 | if (!value) { |
2482 | ret = gpiod_direction_input(desc); | |
2483 | goto set_output_flag; | |
2484 | } | |
02e47980 | 2485 | } else { |
83522358 | 2486 | gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL); |
02e47980 LW |
2487 | } |
2488 | ||
2489 | set_output_value: | |
5f4bf171 | 2490 | ret = gpio_set_bias(desc); |
2821ae5f KG |
2491 | if (ret) |
2492 | return ret; | |
fac9d885 | 2493 | return gpiod_direction_output_raw_commit(desc, value); |
e735244e BG |
2494 | |
2495 | set_output_flag: | |
2496 | /* | |
2497 | * When emulating open-source or open-drain functionalities by not | |
2498 | * actively driving the line (setting mode to input) we still need to | |
2499 | * set the IS_OUT flag or otherwise we won't be able to set the line | |
2500 | * value anymore. | |
2501 | */ | |
2502 | if (ret == 0) | |
2503 | set_bit(FLAG_IS_OUT, &desc->flags); | |
2504 | return ret; | |
ef70bbe1 | 2505 | } |
79a9becd | 2506 | EXPORT_SYMBOL_GPL(gpiod_direction_output); |
d2876d08 | 2507 | |
42112dd7 DP |
2508 | /** |
2509 | * gpiod_enable_hw_timestamp_ns - Enable hardware timestamp in nanoseconds. | |
2510 | * | |
2511 | * @desc: GPIO to enable. | |
2512 | * @flags: Flags related to GPIO edge. | |
2513 | * | |
2514 | * Return 0 in case of success, else negative error code. | |
2515 | */ | |
2516 | int gpiod_enable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags) | |
2517 | { | |
2518 | int ret = 0; | |
2519 | struct gpio_chip *gc; | |
2520 | ||
2521 | VALIDATE_DESC(desc); | |
2522 | ||
2523 | gc = desc->gdev->chip; | |
2524 | if (!gc->en_hw_timestamp) { | |
2525 | gpiod_warn(desc, "%s: hw ts not supported\n", __func__); | |
2526 | return -ENOTSUPP; | |
2527 | } | |
2528 | ||
2529 | ret = gc->en_hw_timestamp(gc, gpio_chip_hwgpio(desc), flags); | |
2530 | if (ret) | |
2531 | gpiod_warn(desc, "%s: hw ts request failed\n", __func__); | |
2532 | ||
2533 | return ret; | |
2534 | } | |
2535 | EXPORT_SYMBOL_GPL(gpiod_enable_hw_timestamp_ns); | |
2536 | ||
2537 | /** | |
2538 | * gpiod_disable_hw_timestamp_ns - Disable hardware timestamp. | |
2539 | * | |
2540 | * @desc: GPIO to disable. | |
2541 | * @flags: Flags related to GPIO edge, same value as used during enable call. | |
2542 | * | |
2543 | * Return 0 in case of success, else negative error code. | |
2544 | */ | |
2545 | int gpiod_disable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags) | |
2546 | { | |
2547 | int ret = 0; | |
2548 | struct gpio_chip *gc; | |
2549 | ||
2550 | VALIDATE_DESC(desc); | |
2551 | ||
2552 | gc = desc->gdev->chip; | |
2553 | if (!gc->dis_hw_timestamp) { | |
2554 | gpiod_warn(desc, "%s: hw ts not supported\n", __func__); | |
2555 | return -ENOTSUPP; | |
2556 | } | |
2557 | ||
2558 | ret = gc->dis_hw_timestamp(gc, gpio_chip_hwgpio(desc), flags); | |
2559 | if (ret) | |
2560 | gpiod_warn(desc, "%s: hw ts release failed\n", __func__); | |
2561 | ||
2562 | return ret; | |
2563 | } | |
2564 | EXPORT_SYMBOL_GPL(gpiod_disable_hw_timestamp_ns); | |
2565 | ||
8ced32ff GU |
2566 | /** |
2567 | * gpiod_set_config - sets @config for a GPIO | |
2568 | * @desc: descriptor of the GPIO for which to set the configuration | |
2569 | * @config: Same packed config format as generic pinconf | |
2570 | * | |
2571 | * Returns: | |
2572 | * 0 on success, %-ENOTSUPP if the controller doesn't support setting the | |
2573 | * configuration. | |
2574 | */ | |
2575 | int gpiod_set_config(struct gpio_desc *desc, unsigned long config) | |
2576 | { | |
a0b66a73 | 2577 | struct gpio_chip *gc; |
8ced32ff GU |
2578 | |
2579 | VALIDATE_DESC(desc); | |
a0b66a73 | 2580 | gc = desc->gdev->chip; |
8ced32ff | 2581 | |
a0b66a73 | 2582 | return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config); |
8ced32ff GU |
2583 | } |
2584 | EXPORT_SYMBOL_GPL(gpiod_set_config); | |
2585 | ||
c4b5be98 | 2586 | /** |
950d55f5 TR |
2587 | * gpiod_set_debounce - sets @debounce time for a GPIO |
2588 | * @desc: descriptor of the GPIO for which to set debounce time | |
2589 | * @debounce: debounce time in microseconds | |
65d87656 | 2590 | * |
950d55f5 TR |
2591 | * Returns: |
2592 | * 0 on success, %-ENOTSUPP if the controller doesn't support setting the | |
2593 | * debounce time. | |
c4b5be98 | 2594 | */ |
13daf489 | 2595 | int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce) |
c4b5be98 | 2596 | { |
8ced32ff | 2597 | unsigned long config; |
be1a4b13 | 2598 | |
2956b5d9 | 2599 | config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce); |
8ced32ff | 2600 | return gpiod_set_config(desc, config); |
c4b5be98 | 2601 | } |
79a9becd | 2602 | EXPORT_SYMBOL_GPL(gpiod_set_debounce); |
372e722e | 2603 | |
e10f72bf AJ |
2604 | /** |
2605 | * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset | |
2606 | * @desc: descriptor of the GPIO for which to configure persistence | |
2607 | * @transitory: True to lose state on suspend or reset, false for persistence | |
2608 | * | |
2609 | * Returns: | |
2610 | * 0 on success, otherwise a negative error code. | |
2611 | */ | |
2612 | int gpiod_set_transitory(struct gpio_desc *desc, bool transitory) | |
2613 | { | |
156dd392 | 2614 | VALIDATE_DESC(desc); |
e10f72bf AJ |
2615 | /* |
2616 | * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for | |
2617 | * persistence state. | |
2618 | */ | |
4fc5bfeb | 2619 | assign_bit(FLAG_TRANSITORY, &desc->flags, transitory); |
e10f72bf AJ |
2620 | |
2621 | /* If the driver supports it, set the persistence state now */ | |
baca3b15 AS |
2622 | return gpio_set_config_with_argument_optional(desc, |
2623 | PIN_CONFIG_PERSIST_STATE, | |
2624 | !transitory); | |
e10f72bf AJ |
2625 | } |
2626 | EXPORT_SYMBOL_GPL(gpiod_set_transitory); | |
2627 | ||
79a9becd AC |
2628 | /** |
2629 | * gpiod_is_active_low - test whether a GPIO is active-low or not | |
2630 | * @desc: the gpio descriptor to test | |
2631 | * | |
2632 | * Returns 1 if the GPIO is active-low, 0 otherwise. | |
2633 | */ | |
2634 | int gpiod_is_active_low(const struct gpio_desc *desc) | |
372e722e | 2635 | { |
fdeb8e15 | 2636 | VALIDATE_DESC(desc); |
79a9becd | 2637 | return test_bit(FLAG_ACTIVE_LOW, &desc->flags); |
372e722e | 2638 | } |
79a9becd | 2639 | EXPORT_SYMBOL_GPL(gpiod_is_active_low); |
d2876d08 | 2640 | |
d3a5bcb4 MM |
2641 | /** |
2642 | * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not | |
2643 | * @desc: the gpio descriptor to change | |
2644 | */ | |
2645 | void gpiod_toggle_active_low(struct gpio_desc *desc) | |
2646 | { | |
2647 | VALIDATE_DESC_VOID(desc); | |
2648 | change_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
2649 | } | |
2650 | EXPORT_SYMBOL_GPL(gpiod_toggle_active_low); | |
2651 | ||
234c5209 AS |
2652 | static int gpio_chip_get_value(struct gpio_chip *gc, const struct gpio_desc *desc) |
2653 | { | |
2654 | return gc->get ? gc->get(gc, gpio_chip_hwgpio(desc)) : -EIO; | |
2655 | } | |
2656 | ||
d2876d08 DB |
2657 | /* I/O calls are only valid after configuration completed; the relevant |
2658 | * "is this a valid GPIO" error checks should already have been done. | |
2659 | * | |
2660 | * "Get" operations are often inlinable as reading a pin value register, | |
2661 | * and masking the relevant bit in that register. | |
2662 | * | |
2663 | * When "set" operations are inlinable, they involve writing that mask to | |
2664 | * one register to set a low value, or a different register to set it high. | |
2665 | * Otherwise locking is needed, so there may be little value to inlining. | |
2666 | * | |
2667 | *------------------------------------------------------------------------ | |
2668 | * | |
2669 | * IMPORTANT!!! The hot paths -- get/set value -- assume that callers | |
2670 | * have requested the GPIO. That can include implicit requesting by | |
2671 | * a direction setting call. Marking a gpio as requested locks its chip | |
2672 | * in memory, guaranteeing that these table lookups need no more locking | |
2673 | * and that gpiochip_remove() will fail. | |
2674 | * | |
2675 | * REVISIT when debugging, consider adding some instrumentation to ensure | |
2676 | * that the GPIO was actually requested. | |
2677 | */ | |
2678 | ||
fac9d885 | 2679 | static int gpiod_get_raw_value_commit(const struct gpio_desc *desc) |
d2876d08 | 2680 | { |
a0b66a73 | 2681 | struct gpio_chip *gc; |
e20538b8 | 2682 | int value; |
d2876d08 | 2683 | |
a0b66a73 | 2684 | gc = desc->gdev->chip; |
234c5209 | 2685 | value = gpio_chip_get_value(gc, desc); |
723a6303 | 2686 | value = value < 0 ? value : !!value; |
372e722e | 2687 | trace_gpio_value(desc_to_gpio(desc), 1, value); |
3f397c21 | 2688 | return value; |
d2876d08 | 2689 | } |
372e722e | 2690 | |
a0b66a73 | 2691 | static int gpio_chip_get_multiple(struct gpio_chip *gc, |
eec1d566 LW |
2692 | unsigned long *mask, unsigned long *bits) |
2693 | { | |
1cef8b50 | 2694 | if (gc->get_multiple) |
a0b66a73 | 2695 | return gc->get_multiple(gc, mask, bits); |
1cef8b50 | 2696 | if (gc->get) { |
eec1d566 LW |
2697 | int i, value; |
2698 | ||
a0b66a73 LW |
2699 | for_each_set_bit(i, mask, gc->ngpio) { |
2700 | value = gc->get(gc, i); | |
eec1d566 LW |
2701 | if (value < 0) |
2702 | return value; | |
2703 | __assign_bit(i, bits, value); | |
2704 | } | |
2705 | return 0; | |
2706 | } | |
2707 | return -EIO; | |
2708 | } | |
2709 | ||
2710 | int gpiod_get_array_value_complex(bool raw, bool can_sleep, | |
2711 | unsigned int array_size, | |
2712 | struct gpio_desc **desc_array, | |
77588c14 | 2713 | struct gpio_array *array_info, |
b9762beb | 2714 | unsigned long *value_bitmap) |
eec1d566 | 2715 | { |
d377f56f | 2716 | int ret, i = 0; |
b17566a6 JK |
2717 | |
2718 | /* | |
2719 | * Validate array_info against desc_array and its size. | |
2720 | * It should immediately follow desc_array if both | |
2721 | * have been obtained from the same gpiod_get_array() call. | |
2722 | */ | |
2723 | if (array_info && array_info->desc == desc_array && | |
2724 | array_size <= array_info->size && | |
2725 | (void *)array_info == desc_array + array_info->size) { | |
2726 | if (!can_sleep) | |
2727 | WARN_ON(array_info->chip->can_sleep); | |
2728 | ||
d377f56f | 2729 | ret = gpio_chip_get_multiple(array_info->chip, |
b17566a6 JK |
2730 | array_info->get_mask, |
2731 | value_bitmap); | |
d377f56f LW |
2732 | if (ret) |
2733 | return ret; | |
b17566a6 JK |
2734 | |
2735 | if (!raw && !bitmap_empty(array_info->invert_mask, array_size)) | |
2736 | bitmap_xor(value_bitmap, value_bitmap, | |
2737 | array_info->invert_mask, array_size); | |
2738 | ||
b17566a6 | 2739 | i = find_first_zero_bit(array_info->get_mask, array_size); |
ae66eca0 AS |
2740 | if (i == array_size) |
2741 | return 0; | |
b17566a6 JK |
2742 | } else { |
2743 | array_info = NULL; | |
2744 | } | |
eec1d566 LW |
2745 | |
2746 | while (i < array_size) { | |
a0b66a73 | 2747 | struct gpio_chip *gc = desc_array[i]->gdev->chip; |
c80c4435 AS |
2748 | DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO); |
2749 | DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO); | |
3027743f | 2750 | unsigned long *mask, *bits; |
c07ea8d0 | 2751 | int first, j; |
eec1d566 | 2752 | |
a0b66a73 | 2753 | if (likely(gc->ngpio <= FASTPATH_NGPIO)) { |
c80c4435 AS |
2754 | mask = fastpath_mask; |
2755 | bits = fastpath_bits; | |
3027743f | 2756 | } else { |
c354c295 AS |
2757 | gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC; |
2758 | ||
2759 | mask = bitmap_alloc(gc->ngpio, flags); | |
3027743f LA |
2760 | if (!mask) |
2761 | return -ENOMEM; | |
c80c4435 | 2762 | |
c354c295 AS |
2763 | bits = bitmap_alloc(gc->ngpio, flags); |
2764 | if (!bits) { | |
2765 | bitmap_free(mask); | |
2766 | return -ENOMEM; | |
2767 | } | |
3027743f LA |
2768 | } |
2769 | ||
a0b66a73 | 2770 | bitmap_zero(mask, gc->ngpio); |
3027743f | 2771 | |
eec1d566 | 2772 | if (!can_sleep) |
a0b66a73 | 2773 | WARN_ON(gc->can_sleep); |
eec1d566 LW |
2774 | |
2775 | /* collect all inputs belonging to the same chip */ | |
2776 | first = i; | |
eec1d566 LW |
2777 | do { |
2778 | const struct gpio_desc *desc = desc_array[i]; | |
2779 | int hwgpio = gpio_chip_hwgpio(desc); | |
2780 | ||
2781 | __set_bit(hwgpio, mask); | |
2782 | i++; | |
b17566a6 JK |
2783 | |
2784 | if (array_info) | |
35ae7f96 JK |
2785 | i = find_next_zero_bit(array_info->get_mask, |
2786 | array_size, i); | |
eec1d566 | 2787 | } while ((i < array_size) && |
a0b66a73 | 2788 | (desc_array[i]->gdev->chip == gc)); |
eec1d566 | 2789 | |
a0b66a73 | 2790 | ret = gpio_chip_get_multiple(gc, mask, bits); |
3027743f | 2791 | if (ret) { |
c80c4435 | 2792 | if (mask != fastpath_mask) |
c354c295 AS |
2793 | bitmap_free(mask); |
2794 | if (bits != fastpath_bits) | |
2795 | bitmap_free(bits); | |
eec1d566 | 2796 | return ret; |
3027743f | 2797 | } |
eec1d566 | 2798 | |
b17566a6 | 2799 | for (j = first; j < i; ) { |
eec1d566 LW |
2800 | const struct gpio_desc *desc = desc_array[j]; |
2801 | int hwgpio = gpio_chip_hwgpio(desc); | |
2802 | int value = test_bit(hwgpio, bits); | |
2803 | ||
2804 | if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
2805 | value = !value; | |
b9762beb | 2806 | __assign_bit(j, value_bitmap, value); |
eec1d566 | 2807 | trace_gpio_value(desc_to_gpio(desc), 1, value); |
799d5eb4 | 2808 | j++; |
b17566a6 JK |
2809 | |
2810 | if (array_info) | |
35ae7f96 JK |
2811 | j = find_next_zero_bit(array_info->get_mask, i, |
2812 | j); | |
eec1d566 | 2813 | } |
3027743f | 2814 | |
c80c4435 | 2815 | if (mask != fastpath_mask) |
c354c295 AS |
2816 | bitmap_free(mask); |
2817 | if (bits != fastpath_bits) | |
2818 | bitmap_free(bits); | |
eec1d566 LW |
2819 | } |
2820 | return 0; | |
2821 | } | |
2822 | ||
d2876d08 | 2823 | /** |
79a9becd AC |
2824 | * gpiod_get_raw_value() - return a gpio's raw value |
2825 | * @desc: gpio whose value will be returned | |
d2876d08 | 2826 | * |
79a9becd | 2827 | * Return the GPIO's raw value, i.e. the value of the physical line disregarding |
e20538b8 | 2828 | * its ACTIVE_LOW status, or negative errno on failure. |
79a9becd | 2829 | * |
827a9b8b | 2830 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 2831 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 2832 | */ |
79a9becd | 2833 | int gpiod_get_raw_value(const struct gpio_desc *desc) |
d2876d08 | 2834 | { |
fdeb8e15 | 2835 | VALIDATE_DESC(desc); |
3285170f | 2836 | /* Should be using gpiod_get_raw_value_cansleep() */ |
fdeb8e15 | 2837 | WARN_ON(desc->gdev->chip->can_sleep); |
fac9d885 | 2838 | return gpiod_get_raw_value_commit(desc); |
d2876d08 | 2839 | } |
79a9becd | 2840 | EXPORT_SYMBOL_GPL(gpiod_get_raw_value); |
372e722e | 2841 | |
79a9becd AC |
2842 | /** |
2843 | * gpiod_get_value() - return a gpio's value | |
2844 | * @desc: gpio whose value will be returned | |
2845 | * | |
2846 | * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into | |
e20538b8 | 2847 | * account, or negative errno on failure. |
79a9becd | 2848 | * |
827a9b8b | 2849 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd AC |
2850 | * complain if the GPIO chip functions potentially sleep. |
2851 | */ | |
2852 | int gpiod_get_value(const struct gpio_desc *desc) | |
372e722e | 2853 | { |
79a9becd | 2854 | int value; |
fdeb8e15 LW |
2855 | |
2856 | VALIDATE_DESC(desc); | |
3285170f | 2857 | /* Should be using gpiod_get_value_cansleep() */ |
fdeb8e15 | 2858 | WARN_ON(desc->gdev->chip->can_sleep); |
79a9becd | 2859 | |
fac9d885 | 2860 | value = gpiod_get_raw_value_commit(desc); |
e20538b8 BA |
2861 | if (value < 0) |
2862 | return value; | |
2863 | ||
79a9becd AC |
2864 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
2865 | value = !value; | |
2866 | ||
2867 | return value; | |
372e722e | 2868 | } |
79a9becd | 2869 | EXPORT_SYMBOL_GPL(gpiod_get_value); |
d2876d08 | 2870 | |
eec1d566 LW |
2871 | /** |
2872 | * gpiod_get_raw_array_value() - read raw values from an array of GPIOs | |
b9762beb | 2873 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 2874 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 2875 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 2876 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
2877 | * |
2878 | * Read the raw values of the GPIOs, i.e. the values of the physical lines | |
2879 | * without regard for their ACTIVE_LOW status. Return 0 in case of success, | |
2880 | * else an error code. | |
2881 | * | |
827a9b8b | 2882 | * This function can be called from contexts where we cannot sleep, |
eec1d566 LW |
2883 | * and it will complain if the GPIO chip functions potentially sleep. |
2884 | */ | |
2885 | int gpiod_get_raw_array_value(unsigned int array_size, | |
b9762beb | 2886 | struct gpio_desc **desc_array, |
77588c14 | 2887 | struct gpio_array *array_info, |
b9762beb | 2888 | unsigned long *value_bitmap) |
eec1d566 LW |
2889 | { |
2890 | if (!desc_array) | |
2891 | return -EINVAL; | |
2892 | return gpiod_get_array_value_complex(true, false, array_size, | |
77588c14 JK |
2893 | desc_array, array_info, |
2894 | value_bitmap); | |
eec1d566 LW |
2895 | } |
2896 | EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value); | |
2897 | ||
2898 | /** | |
2899 | * gpiod_get_array_value() - read values from an array of GPIOs | |
b9762beb | 2900 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 2901 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 2902 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 2903 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
2904 | * |
2905 | * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
2906 | * into account. Return 0 in case of success, else an error code. | |
2907 | * | |
827a9b8b | 2908 | * This function can be called from contexts where we cannot sleep, |
eec1d566 LW |
2909 | * and it will complain if the GPIO chip functions potentially sleep. |
2910 | */ | |
2911 | int gpiod_get_array_value(unsigned int array_size, | |
b9762beb | 2912 | struct gpio_desc **desc_array, |
77588c14 | 2913 | struct gpio_array *array_info, |
b9762beb | 2914 | unsigned long *value_bitmap) |
eec1d566 LW |
2915 | { |
2916 | if (!desc_array) | |
2917 | return -EINVAL; | |
2918 | return gpiod_get_array_value_complex(false, false, array_size, | |
77588c14 JK |
2919 | desc_array, array_info, |
2920 | value_bitmap); | |
eec1d566 LW |
2921 | } |
2922 | EXPORT_SYMBOL_GPL(gpiod_get_array_value); | |
2923 | ||
aca5ce14 | 2924 | /* |
fac9d885 | 2925 | * gpio_set_open_drain_value_commit() - Set the open drain gpio's value. |
79a9becd | 2926 | * @desc: gpio descriptor whose state need to be set. |
20a8a968 | 2927 | * @value: Non-zero for setting it HIGH otherwise it will set to LOW. |
aca5ce14 | 2928 | */ |
fac9d885 | 2929 | static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value) |
aca5ce14 | 2930 | { |
d377f56f | 2931 | int ret = 0; |
a0b66a73 | 2932 | struct gpio_chip *gc = desc->gdev->chip; |
372e722e AC |
2933 | int offset = gpio_chip_hwgpio(desc); |
2934 | ||
aca5ce14 | 2935 | if (value) { |
a0b66a73 | 2936 | ret = gc->direction_input(gc, offset); |
aca5ce14 | 2937 | } else { |
a0b66a73 | 2938 | ret = gc->direction_output(gc, offset, 0); |
d377f56f | 2939 | if (!ret) |
372e722e | 2940 | set_bit(FLAG_IS_OUT, &desc->flags); |
aca5ce14 | 2941 | } |
d377f56f LW |
2942 | trace_gpio_direction(desc_to_gpio(desc), value, ret); |
2943 | if (ret < 0) | |
6424de5a MB |
2944 | gpiod_err(desc, |
2945 | "%s: Error in set_value for open drain err %d\n", | |
d377f56f | 2946 | __func__, ret); |
aca5ce14 LD |
2947 | } |
2948 | ||
25553ff0 | 2949 | /* |
79a9becd AC |
2950 | * _gpio_set_open_source_value() - Set the open source gpio's value. |
2951 | * @desc: gpio descriptor whose state need to be set. | |
20a8a968 | 2952 | * @value: Non-zero for setting it HIGH otherwise it will set to LOW. |
25553ff0 | 2953 | */ |
fac9d885 | 2954 | static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value) |
25553ff0 | 2955 | { |
d377f56f | 2956 | int ret = 0; |
a0b66a73 | 2957 | struct gpio_chip *gc = desc->gdev->chip; |
372e722e AC |
2958 | int offset = gpio_chip_hwgpio(desc); |
2959 | ||
25553ff0 | 2960 | if (value) { |
a0b66a73 | 2961 | ret = gc->direction_output(gc, offset, 1); |
d377f56f | 2962 | if (!ret) |
372e722e | 2963 | set_bit(FLAG_IS_OUT, &desc->flags); |
25553ff0 | 2964 | } else { |
a0b66a73 | 2965 | ret = gc->direction_input(gc, offset); |
25553ff0 | 2966 | } |
d377f56f LW |
2967 | trace_gpio_direction(desc_to_gpio(desc), !value, ret); |
2968 | if (ret < 0) | |
6424de5a MB |
2969 | gpiod_err(desc, |
2970 | "%s: Error in set_value for open source err %d\n", | |
d377f56f | 2971 | __func__, ret); |
25553ff0 LD |
2972 | } |
2973 | ||
fac9d885 | 2974 | static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value) |
d2876d08 | 2975 | { |
a0b66a73 | 2976 | struct gpio_chip *gc; |
d2876d08 | 2977 | |
a0b66a73 | 2978 | gc = desc->gdev->chip; |
372e722e | 2979 | trace_gpio_value(desc_to_gpio(desc), 0, value); |
a0b66a73 | 2980 | gc->set(gc, gpio_chip_hwgpio(desc), value); |
372e722e AC |
2981 | } |
2982 | ||
5f424243 RI |
2983 | /* |
2984 | * set multiple outputs on the same chip; | |
2985 | * use the chip's set_multiple function if available; | |
2986 | * otherwise set the outputs sequentially; | |
a0b66a73 | 2987 | * @chip: the GPIO chip we operate on |
5f424243 RI |
2988 | * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word |
2989 | * defines which outputs are to be changed | |
2990 | * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word | |
2991 | * defines the values the outputs specified by mask are to be set to | |
2992 | */ | |
a0b66a73 | 2993 | static void gpio_chip_set_multiple(struct gpio_chip *gc, |
5f424243 RI |
2994 | unsigned long *mask, unsigned long *bits) |
2995 | { | |
a0b66a73 LW |
2996 | if (gc->set_multiple) { |
2997 | gc->set_multiple(gc, mask, bits); | |
5f424243 | 2998 | } else { |
5e4e6fb3 AS |
2999 | unsigned int i; |
3000 | ||
3001 | /* set outputs if the corresponding mask bit is set */ | |
a0b66a73 LW |
3002 | for_each_set_bit(i, mask, gc->ngpio) |
3003 | gc->set(gc, i, test_bit(i, bits)); | |
5f424243 RI |
3004 | } |
3005 | } | |
3006 | ||
3027743f | 3007 | int gpiod_set_array_value_complex(bool raw, bool can_sleep, |
3c940660 GU |
3008 | unsigned int array_size, |
3009 | struct gpio_desc **desc_array, | |
3010 | struct gpio_array *array_info, | |
3011 | unsigned long *value_bitmap) | |
5f424243 RI |
3012 | { |
3013 | int i = 0; | |
3014 | ||
b17566a6 JK |
3015 | /* |
3016 | * Validate array_info against desc_array and its size. | |
3017 | * It should immediately follow desc_array if both | |
3018 | * have been obtained from the same gpiod_get_array() call. | |
3019 | */ | |
3020 | if (array_info && array_info->desc == desc_array && | |
3021 | array_size <= array_info->size && | |
3022 | (void *)array_info == desc_array + array_info->size) { | |
3023 | if (!can_sleep) | |
3024 | WARN_ON(array_info->chip->can_sleep); | |
3025 | ||
3026 | if (!raw && !bitmap_empty(array_info->invert_mask, array_size)) | |
3027 | bitmap_xor(value_bitmap, value_bitmap, | |
3028 | array_info->invert_mask, array_size); | |
3029 | ||
3030 | gpio_chip_set_multiple(array_info->chip, array_info->set_mask, | |
3031 | value_bitmap); | |
3032 | ||
b17566a6 | 3033 | i = find_first_zero_bit(array_info->set_mask, array_size); |
ae66eca0 AS |
3034 | if (i == array_size) |
3035 | return 0; | |
b17566a6 JK |
3036 | } else { |
3037 | array_info = NULL; | |
3038 | } | |
3039 | ||
5f424243 | 3040 | while (i < array_size) { |
a0b66a73 | 3041 | struct gpio_chip *gc = desc_array[i]->gdev->chip; |
c80c4435 AS |
3042 | DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO); |
3043 | DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO); | |
3027743f | 3044 | unsigned long *mask, *bits; |
5f424243 RI |
3045 | int count = 0; |
3046 | ||
a0b66a73 | 3047 | if (likely(gc->ngpio <= FASTPATH_NGPIO)) { |
c80c4435 AS |
3048 | mask = fastpath_mask; |
3049 | bits = fastpath_bits; | |
3027743f | 3050 | } else { |
c354c295 AS |
3051 | gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC; |
3052 | ||
3053 | mask = bitmap_alloc(gc->ngpio, flags); | |
3027743f LA |
3054 | if (!mask) |
3055 | return -ENOMEM; | |
c80c4435 | 3056 | |
c354c295 AS |
3057 | bits = bitmap_alloc(gc->ngpio, flags); |
3058 | if (!bits) { | |
3059 | bitmap_free(mask); | |
3060 | return -ENOMEM; | |
3061 | } | |
3027743f LA |
3062 | } |
3063 | ||
a0b66a73 | 3064 | bitmap_zero(mask, gc->ngpio); |
3027743f | 3065 | |
38e003f4 | 3066 | if (!can_sleep) |
a0b66a73 | 3067 | WARN_ON(gc->can_sleep); |
38e003f4 | 3068 | |
5f424243 RI |
3069 | do { |
3070 | struct gpio_desc *desc = desc_array[i]; | |
3071 | int hwgpio = gpio_chip_hwgpio(desc); | |
b9762beb | 3072 | int value = test_bit(i, value_bitmap); |
5f424243 | 3073 | |
b17566a6 JK |
3074 | /* |
3075 | * Pins applicable for fast input but not for | |
3076 | * fast output processing may have been already | |
3077 | * inverted inside the fast path, skip them. | |
3078 | */ | |
3079 | if (!raw && !(array_info && | |
3080 | test_bit(i, array_info->invert_mask)) && | |
3081 | test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
5f424243 RI |
3082 | value = !value; |
3083 | trace_gpio_value(desc_to_gpio(desc), 0, value); | |
3084 | /* | |
3085 | * collect all normal outputs belonging to the same chip | |
3086 | * open drain and open source outputs are set individually | |
3087 | */ | |
02e47980 | 3088 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) { |
fac9d885 | 3089 | gpio_set_open_drain_value_commit(desc, value); |
02e47980 | 3090 | } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) { |
fac9d885 | 3091 | gpio_set_open_source_value_commit(desc, value); |
5f424243 RI |
3092 | } else { |
3093 | __set_bit(hwgpio, mask); | |
4fc5bfeb | 3094 | __assign_bit(hwgpio, bits, value); |
5f424243 RI |
3095 | count++; |
3096 | } | |
3097 | i++; | |
b17566a6 JK |
3098 | |
3099 | if (array_info) | |
35ae7f96 JK |
3100 | i = find_next_zero_bit(array_info->set_mask, |
3101 | array_size, i); | |
fdeb8e15 | 3102 | } while ((i < array_size) && |
a0b66a73 | 3103 | (desc_array[i]->gdev->chip == gc)); |
5f424243 | 3104 | /* push collected bits to outputs */ |
38e003f4 | 3105 | if (count != 0) |
a0b66a73 | 3106 | gpio_chip_set_multiple(gc, mask, bits); |
3027743f | 3107 | |
c80c4435 | 3108 | if (mask != fastpath_mask) |
c354c295 AS |
3109 | bitmap_free(mask); |
3110 | if (bits != fastpath_bits) | |
3111 | bitmap_free(bits); | |
5f424243 | 3112 | } |
3027743f | 3113 | return 0; |
5f424243 RI |
3114 | } |
3115 | ||
d2876d08 | 3116 | /** |
79a9becd AC |
3117 | * gpiod_set_raw_value() - assign a gpio's raw value |
3118 | * @desc: gpio whose value will be assigned | |
d2876d08 | 3119 | * @value: value to assign |
d2876d08 | 3120 | * |
79a9becd AC |
3121 | * Set the raw value of the GPIO, i.e. the value of its physical line without |
3122 | * regard for its ACTIVE_LOW status. | |
3123 | * | |
827a9b8b | 3124 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 3125 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 3126 | */ |
79a9becd | 3127 | void gpiod_set_raw_value(struct gpio_desc *desc, int value) |
372e722e | 3128 | { |
fdeb8e15 | 3129 | VALIDATE_DESC_VOID(desc); |
3285170f | 3130 | /* Should be using gpiod_set_raw_value_cansleep() */ |
fdeb8e15 | 3131 | WARN_ON(desc->gdev->chip->can_sleep); |
fac9d885 | 3132 | gpiod_set_raw_value_commit(desc, value); |
d2876d08 | 3133 | } |
79a9becd | 3134 | EXPORT_SYMBOL_GPL(gpiod_set_raw_value); |
d2876d08 | 3135 | |
1e77fc82 GU |
3136 | /** |
3137 | * gpiod_set_value_nocheck() - set a GPIO line value without checking | |
3138 | * @desc: the descriptor to set the value on | |
3139 | * @value: value to set | |
3140 | * | |
3141 | * This sets the value of a GPIO line backing a descriptor, applying | |
3142 | * different semantic quirks like active low and open drain/source | |
3143 | * handling. | |
3144 | */ | |
3145 | static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value) | |
3146 | { | |
3147 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
3148 | value = !value; | |
3149 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) | |
3150 | gpio_set_open_drain_value_commit(desc, value); | |
3151 | else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) | |
3152 | gpio_set_open_source_value_commit(desc, value); | |
3153 | else | |
3154 | gpiod_set_raw_value_commit(desc, value); | |
3155 | } | |
3156 | ||
d2876d08 | 3157 | /** |
79a9becd AC |
3158 | * gpiod_set_value() - assign a gpio's value |
3159 | * @desc: gpio whose value will be assigned | |
3160 | * @value: value to assign | |
3161 | * | |
02e47980 LW |
3162 | * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW, |
3163 | * OPEN_DRAIN and OPEN_SOURCE flags into account. | |
d2876d08 | 3164 | * |
827a9b8b | 3165 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 3166 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 3167 | */ |
79a9becd | 3168 | void gpiod_set_value(struct gpio_desc *desc, int value) |
d2876d08 | 3169 | { |
fdeb8e15 | 3170 | VALIDATE_DESC_VOID(desc); |
3285170f | 3171 | /* Should be using gpiod_set_value_cansleep() */ |
fdeb8e15 | 3172 | WARN_ON(desc->gdev->chip->can_sleep); |
1e77fc82 | 3173 | gpiod_set_value_nocheck(desc, value); |
372e722e | 3174 | } |
79a9becd | 3175 | EXPORT_SYMBOL_GPL(gpiod_set_value); |
d2876d08 | 3176 | |
5f424243 | 3177 | /** |
3fff99bc | 3178 | * gpiod_set_raw_array_value() - assign values to an array of GPIOs |
b9762beb | 3179 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 3180 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 3181 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3182 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
3183 | * |
3184 | * Set the raw values of the GPIOs, i.e. the values of the physical lines | |
3185 | * without regard for their ACTIVE_LOW status. | |
3186 | * | |
827a9b8b | 3187 | * This function can be called from contexts where we cannot sleep, and will |
5f424243 RI |
3188 | * complain if the GPIO chip functions potentially sleep. |
3189 | */ | |
3027743f | 3190 | int gpiod_set_raw_array_value(unsigned int array_size, |
3c940660 GU |
3191 | struct gpio_desc **desc_array, |
3192 | struct gpio_array *array_info, | |
3193 | unsigned long *value_bitmap) | |
5f424243 RI |
3194 | { |
3195 | if (!desc_array) | |
3027743f LA |
3196 | return -EINVAL; |
3197 | return gpiod_set_array_value_complex(true, false, array_size, | |
77588c14 | 3198 | desc_array, array_info, value_bitmap); |
5f424243 | 3199 | } |
3fff99bc | 3200 | EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value); |
5f424243 RI |
3201 | |
3202 | /** | |
3fff99bc | 3203 | * gpiod_set_array_value() - assign values to an array of GPIOs |
b9762beb | 3204 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 3205 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 3206 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3207 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
3208 | * |
3209 | * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
3210 | * into account. | |
3211 | * | |
827a9b8b | 3212 | * This function can be called from contexts where we cannot sleep, and will |
5f424243 RI |
3213 | * complain if the GPIO chip functions potentially sleep. |
3214 | */ | |
cf9af0d5 GU |
3215 | int gpiod_set_array_value(unsigned int array_size, |
3216 | struct gpio_desc **desc_array, | |
3217 | struct gpio_array *array_info, | |
3218 | unsigned long *value_bitmap) | |
5f424243 RI |
3219 | { |
3220 | if (!desc_array) | |
cf9af0d5 GU |
3221 | return -EINVAL; |
3222 | return gpiod_set_array_value_complex(false, false, array_size, | |
3223 | desc_array, array_info, | |
3224 | value_bitmap); | |
5f424243 | 3225 | } |
3fff99bc | 3226 | EXPORT_SYMBOL_GPL(gpiod_set_array_value); |
5f424243 | 3227 | |
d2876d08 | 3228 | /** |
79a9becd AC |
3229 | * gpiod_cansleep() - report whether gpio value access may sleep |
3230 | * @desc: gpio to check | |
d2876d08 | 3231 | * |
d2876d08 | 3232 | */ |
79a9becd | 3233 | int gpiod_cansleep(const struct gpio_desc *desc) |
372e722e | 3234 | { |
fdeb8e15 LW |
3235 | VALIDATE_DESC(desc); |
3236 | return desc->gdev->chip->can_sleep; | |
d2876d08 | 3237 | } |
79a9becd | 3238 | EXPORT_SYMBOL_GPL(gpiod_cansleep); |
d2876d08 | 3239 | |
90b39402 LW |
3240 | /** |
3241 | * gpiod_set_consumer_name() - set the consumer name for the descriptor | |
3242 | * @desc: gpio to set the consumer name on | |
3243 | * @name: the new consumer name | |
3244 | */ | |
18534df4 | 3245 | int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name) |
90b39402 | 3246 | { |
18534df4 MS |
3247 | VALIDATE_DESC(desc); |
3248 | if (name) { | |
3249 | name = kstrdup_const(name, GFP_KERNEL); | |
3250 | if (!name) | |
3251 | return -ENOMEM; | |
3252 | } | |
3253 | ||
3254 | kfree_const(desc->label); | |
3255 | desc_set_label(desc, name); | |
3256 | ||
3257 | return 0; | |
90b39402 LW |
3258 | } |
3259 | EXPORT_SYMBOL_GPL(gpiod_set_consumer_name); | |
3260 | ||
0f6d504e | 3261 | /** |
79a9becd AC |
3262 | * gpiod_to_irq() - return the IRQ corresponding to a GPIO |
3263 | * @desc: gpio whose IRQ will be returned (already requested) | |
0f6d504e | 3264 | * |
79a9becd AC |
3265 | * Return the IRQ corresponding to the passed GPIO, or an error code in case of |
3266 | * error. | |
0f6d504e | 3267 | */ |
79a9becd | 3268 | int gpiod_to_irq(const struct gpio_desc *desc) |
0f6d504e | 3269 | { |
a0b66a73 | 3270 | struct gpio_chip *gc; |
4c37ce86 | 3271 | int offset; |
0f6d504e | 3272 | |
79bb71bd LW |
3273 | /* |
3274 | * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics | |
3275 | * requires this function to not return zero on an invalid descriptor | |
3276 | * but rather a negative error number. | |
3277 | */ | |
bfbbe44d | 3278 | if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip) |
79bb71bd LW |
3279 | return -EINVAL; |
3280 | ||
a0b66a73 | 3281 | gc = desc->gdev->chip; |
372e722e | 3282 | offset = gpio_chip_hwgpio(desc); |
a0b66a73 LW |
3283 | if (gc->to_irq) { |
3284 | int retirq = gc->to_irq(gc, offset); | |
4c37ce86 LW |
3285 | |
3286 | /* Zero means NO_IRQ */ | |
3287 | if (!retirq) | |
3288 | return -ENXIO; | |
3289 | ||
3290 | return retirq; | |
3291 | } | |
ae42f928 SP |
3292 | #ifdef CONFIG_GPIOLIB_IRQCHIP |
3293 | if (gc->irq.chip) { | |
3294 | /* | |
3295 | * Avoid race condition with other code, which tries to lookup | |
3296 | * an IRQ before the irqchip has been properly registered, | |
3297 | * i.e. while gpiochip is still being brought up. | |
3298 | */ | |
3299 | return -EPROBE_DEFER; | |
3300 | } | |
3301 | #endif | |
4c37ce86 | 3302 | return -ENXIO; |
0f6d504e | 3303 | } |
79a9becd | 3304 | EXPORT_SYMBOL_GPL(gpiod_to_irq); |
0f6d504e | 3305 | |
d468bf9e | 3306 | /** |
e3a2e878 | 3307 | * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ |
a0b66a73 | 3308 | * @gc: the chip the GPIO to lock belongs to |
d74be6df | 3309 | * @offset: the offset of the GPIO to lock as IRQ |
d468bf9e LW |
3310 | * |
3311 | * This is used directly by GPIO drivers that want to lock down | |
f438acdf | 3312 | * a certain GPIO line to be used for IRQs. |
d468bf9e | 3313 | */ |
a0b66a73 | 3314 | int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset) |
372e722e | 3315 | { |
9c10280d LW |
3316 | struct gpio_desc *desc; |
3317 | ||
a0b66a73 | 3318 | desc = gpiochip_get_desc(gc, offset); |
9c10280d LW |
3319 | if (IS_ERR(desc)) |
3320 | return PTR_ERR(desc); | |
3321 | ||
60f8339e LW |
3322 | /* |
3323 | * If it's fast: flush the direction setting if something changed | |
3324 | * behind our back | |
3325 | */ | |
a0b66a73 | 3326 | if (!gc->can_sleep && gc->get_direction) { |
80956790 | 3327 | int dir = gpiod_get_direction(desc); |
9c10280d | 3328 | |
36b31279 | 3329 | if (dir < 0) { |
a0b66a73 | 3330 | chip_err(gc, "%s: cannot get GPIO direction\n", |
36b31279 AS |
3331 | __func__); |
3332 | return dir; | |
3333 | } | |
9c10280d | 3334 | } |
d468bf9e | 3335 | |
e9bdf7e6 LW |
3336 | /* To be valid for IRQ the line needs to be input or open drain */ |
3337 | if (test_bit(FLAG_IS_OUT, &desc->flags) && | |
3338 | !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) { | |
a0b66a73 | 3339 | chip_err(gc, |
b1911710 AS |
3340 | "%s: tried to flag a GPIO set as output for IRQ\n", |
3341 | __func__); | |
d468bf9e LW |
3342 | return -EIO; |
3343 | } | |
3344 | ||
9c10280d | 3345 | set_bit(FLAG_USED_AS_IRQ, &desc->flags); |
4e9439dd | 3346 | set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3940c34a LW |
3347 | |
3348 | /* | |
3349 | * If the consumer has not set up a label (such as when the | |
3350 | * IRQ is referenced from .to_irq()) we set up a label here | |
3351 | * so it is clear this is used as an interrupt. | |
3352 | */ | |
3353 | if (!desc->label) | |
3354 | desc_set_label(desc, "interrupt"); | |
3355 | ||
d468bf9e | 3356 | return 0; |
372e722e | 3357 | } |
e3a2e878 | 3358 | EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq); |
d2876d08 | 3359 | |
d468bf9e | 3360 | /** |
e3a2e878 | 3361 | * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ |
a0b66a73 | 3362 | * @gc: the chip the GPIO to lock belongs to |
d74be6df | 3363 | * @offset: the offset of the GPIO to lock as IRQ |
d468bf9e LW |
3364 | * |
3365 | * This is used directly by GPIO drivers that want to indicate | |
3366 | * that a certain GPIO is no longer used exclusively for IRQ. | |
d2876d08 | 3367 | */ |
a0b66a73 | 3368 | void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset) |
d468bf9e | 3369 | { |
3940c34a LW |
3370 | struct gpio_desc *desc; |
3371 | ||
a0b66a73 | 3372 | desc = gpiochip_get_desc(gc, offset); |
3940c34a | 3373 | if (IS_ERR(desc)) |
d468bf9e | 3374 | return; |
d2876d08 | 3375 | |
3940c34a | 3376 | clear_bit(FLAG_USED_AS_IRQ, &desc->flags); |
4e9439dd | 3377 | clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3940c34a LW |
3378 | |
3379 | /* If we only had this marking, erase it */ | |
3380 | if (desc->label && !strcmp(desc->label, "interrupt")) | |
3381 | desc_set_label(desc, NULL); | |
d468bf9e | 3382 | } |
e3a2e878 | 3383 | EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq); |
d468bf9e | 3384 | |
a0b66a73 | 3385 | void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset) |
4e9439dd | 3386 | { |
a0b66a73 | 3387 | struct gpio_desc *desc = gpiochip_get_desc(gc, offset); |
4e9439dd HV |
3388 | |
3389 | if (!IS_ERR(desc) && | |
3390 | !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) | |
3391 | clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); | |
3392 | } | |
3393 | EXPORT_SYMBOL_GPL(gpiochip_disable_irq); | |
3394 | ||
a0b66a73 | 3395 | void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset) |
4e9439dd | 3396 | { |
a0b66a73 | 3397 | struct gpio_desc *desc = gpiochip_get_desc(gc, offset); |
4e9439dd HV |
3398 | |
3399 | if (!IS_ERR(desc) && | |
3400 | !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) { | |
e9bdf7e6 LW |
3401 | /* |
3402 | * We must not be output when using IRQ UNLESS we are | |
3403 | * open drain. | |
3404 | */ | |
3405 | WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) && | |
3406 | !test_bit(FLAG_OPEN_DRAIN, &desc->flags)); | |
4e9439dd HV |
3407 | set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3408 | } | |
3409 | } | |
3410 | EXPORT_SYMBOL_GPL(gpiochip_enable_irq); | |
3411 | ||
a0b66a73 | 3412 | bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset) |
6cee3821 | 3413 | { |
a0b66a73 | 3414 | if (offset >= gc->ngpio) |
6cee3821 LW |
3415 | return false; |
3416 | ||
a0b66a73 | 3417 | return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags); |
6cee3821 LW |
3418 | } |
3419 | EXPORT_SYMBOL_GPL(gpiochip_line_is_irq); | |
3420 | ||
a0b66a73 | 3421 | int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset) |
4e6b8238 HV |
3422 | { |
3423 | int ret; | |
3424 | ||
a0b66a73 | 3425 | if (!try_module_get(gc->gpiodev->owner)) |
4e6b8238 HV |
3426 | return -ENODEV; |
3427 | ||
a0b66a73 | 3428 | ret = gpiochip_lock_as_irq(gc, offset); |
4e6b8238 | 3429 | if (ret) { |
a0b66a73 LW |
3430 | chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset); |
3431 | module_put(gc->gpiodev->owner); | |
4e6b8238 HV |
3432 | return ret; |
3433 | } | |
3434 | return 0; | |
3435 | } | |
3436 | EXPORT_SYMBOL_GPL(gpiochip_reqres_irq); | |
3437 | ||
a0b66a73 | 3438 | void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset) |
4e6b8238 | 3439 | { |
a0b66a73 LW |
3440 | gpiochip_unlock_as_irq(gc, offset); |
3441 | module_put(gc->gpiodev->owner); | |
4e6b8238 HV |
3442 | } |
3443 | EXPORT_SYMBOL_GPL(gpiochip_relres_irq); | |
3444 | ||
a0b66a73 | 3445 | bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset) |
143b65d6 | 3446 | { |
a0b66a73 | 3447 | if (offset >= gc->ngpio) |
143b65d6 LW |
3448 | return false; |
3449 | ||
a0b66a73 | 3450 | return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags); |
143b65d6 LW |
3451 | } |
3452 | EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain); | |
3453 | ||
a0b66a73 | 3454 | bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset) |
143b65d6 | 3455 | { |
a0b66a73 | 3456 | if (offset >= gc->ngpio) |
143b65d6 LW |
3457 | return false; |
3458 | ||
a0b66a73 | 3459 | return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags); |
143b65d6 LW |
3460 | } |
3461 | EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source); | |
3462 | ||
a0b66a73 | 3463 | bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset) |
05f479bf | 3464 | { |
a0b66a73 | 3465 | if (offset >= gc->ngpio) |
05f479bf CK |
3466 | return false; |
3467 | ||
a0b66a73 | 3468 | return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags); |
05f479bf CK |
3469 | } |
3470 | EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent); | |
3471 | ||
79a9becd AC |
3472 | /** |
3473 | * gpiod_get_raw_value_cansleep() - return a gpio's raw value | |
3474 | * @desc: gpio whose value will be returned | |
3475 | * | |
3476 | * Return the GPIO's raw value, i.e. the value of the physical line disregarding | |
e20538b8 | 3477 | * its ACTIVE_LOW status, or negative errno on failure. |
79a9becd AC |
3478 | * |
3479 | * This function is to be called from contexts that can sleep. | |
d2876d08 | 3480 | */ |
79a9becd | 3481 | int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc) |
d2876d08 | 3482 | { |
d2876d08 | 3483 | might_sleep_if(extra_checks); |
fdeb8e15 | 3484 | VALIDATE_DESC(desc); |
fac9d885 | 3485 | return gpiod_get_raw_value_commit(desc); |
d2876d08 | 3486 | } |
79a9becd | 3487 | EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep); |
372e722e | 3488 | |
79a9becd AC |
3489 | /** |
3490 | * gpiod_get_value_cansleep() - return a gpio's value | |
3491 | * @desc: gpio whose value will be returned | |
3492 | * | |
3493 | * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into | |
e20538b8 | 3494 | * account, or negative errno on failure. |
79a9becd AC |
3495 | * |
3496 | * This function is to be called from contexts that can sleep. | |
3497 | */ | |
3498 | int gpiod_get_value_cansleep(const struct gpio_desc *desc) | |
d2876d08 | 3499 | { |
3f397c21 | 3500 | int value; |
d2876d08 DB |
3501 | |
3502 | might_sleep_if(extra_checks); | |
fdeb8e15 | 3503 | VALIDATE_DESC(desc); |
fac9d885 | 3504 | value = gpiod_get_raw_value_commit(desc); |
e20538b8 BA |
3505 | if (value < 0) |
3506 | return value; | |
3507 | ||
79a9becd AC |
3508 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
3509 | value = !value; | |
3510 | ||
3f397c21 | 3511 | return value; |
d2876d08 | 3512 | } |
79a9becd | 3513 | EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep); |
372e722e | 3514 | |
eec1d566 LW |
3515 | /** |
3516 | * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs | |
b9762beb | 3517 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 3518 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 3519 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3520 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
3521 | * |
3522 | * Read the raw values of the GPIOs, i.e. the values of the physical lines | |
3523 | * without regard for their ACTIVE_LOW status. Return 0 in case of success, | |
3524 | * else an error code. | |
3525 | * | |
3526 | * This function is to be called from contexts that can sleep. | |
3527 | */ | |
3528 | int gpiod_get_raw_array_value_cansleep(unsigned int array_size, | |
3529 | struct gpio_desc **desc_array, | |
77588c14 | 3530 | struct gpio_array *array_info, |
b9762beb | 3531 | unsigned long *value_bitmap) |
eec1d566 LW |
3532 | { |
3533 | might_sleep_if(extra_checks); | |
3534 | if (!desc_array) | |
3535 | return -EINVAL; | |
3536 | return gpiod_get_array_value_complex(true, true, array_size, | |
77588c14 JK |
3537 | desc_array, array_info, |
3538 | value_bitmap); | |
eec1d566 LW |
3539 | } |
3540 | EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep); | |
3541 | ||
3542 | /** | |
3543 | * gpiod_get_array_value_cansleep() - read values from an array of GPIOs | |
b9762beb | 3544 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 3545 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 3546 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3547 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
3548 | * |
3549 | * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
3550 | * into account. Return 0 in case of success, else an error code. | |
3551 | * | |
3552 | * This function is to be called from contexts that can sleep. | |
3553 | */ | |
3554 | int gpiod_get_array_value_cansleep(unsigned int array_size, | |
3555 | struct gpio_desc **desc_array, | |
77588c14 | 3556 | struct gpio_array *array_info, |
b9762beb | 3557 | unsigned long *value_bitmap) |
eec1d566 LW |
3558 | { |
3559 | might_sleep_if(extra_checks); | |
3560 | if (!desc_array) | |
3561 | return -EINVAL; | |
3562 | return gpiod_get_array_value_complex(false, true, array_size, | |
77588c14 JK |
3563 | desc_array, array_info, |
3564 | value_bitmap); | |
eec1d566 LW |
3565 | } |
3566 | EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep); | |
3567 | ||
79a9becd AC |
3568 | /** |
3569 | * gpiod_set_raw_value_cansleep() - assign a gpio's raw value | |
3570 | * @desc: gpio whose value will be assigned | |
3571 | * @value: value to assign | |
3572 | * | |
3573 | * Set the raw value of the GPIO, i.e. the value of its physical line without | |
3574 | * regard for its ACTIVE_LOW status. | |
3575 | * | |
3576 | * This function is to be called from contexts that can sleep. | |
3577 | */ | |
3578 | void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value) | |
372e722e | 3579 | { |
d2876d08 | 3580 | might_sleep_if(extra_checks); |
fdeb8e15 | 3581 | VALIDATE_DESC_VOID(desc); |
fac9d885 | 3582 | gpiod_set_raw_value_commit(desc, value); |
372e722e | 3583 | } |
79a9becd | 3584 | EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep); |
d2876d08 | 3585 | |
79a9becd AC |
3586 | /** |
3587 | * gpiod_set_value_cansleep() - assign a gpio's value | |
3588 | * @desc: gpio whose value will be assigned | |
3589 | * @value: value to assign | |
3590 | * | |
3591 | * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into | |
3592 | * account | |
3593 | * | |
3594 | * This function is to be called from contexts that can sleep. | |
3595 | */ | |
3596 | void gpiod_set_value_cansleep(struct gpio_desc *desc, int value) | |
d2876d08 | 3597 | { |
d2876d08 | 3598 | might_sleep_if(extra_checks); |
fdeb8e15 | 3599 | VALIDATE_DESC_VOID(desc); |
1e77fc82 | 3600 | gpiod_set_value_nocheck(desc, value); |
372e722e | 3601 | } |
79a9becd | 3602 | EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep); |
d2876d08 | 3603 | |
5f424243 | 3604 | /** |
3fff99bc | 3605 | * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs |
b9762beb | 3606 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 3607 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 3608 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3609 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
3610 | * |
3611 | * Set the raw values of the GPIOs, i.e. the values of the physical lines | |
3612 | * without regard for their ACTIVE_LOW status. | |
3613 | * | |
3614 | * This function is to be called from contexts that can sleep. | |
3615 | */ | |
3027743f | 3616 | int gpiod_set_raw_array_value_cansleep(unsigned int array_size, |
3c940660 GU |
3617 | struct gpio_desc **desc_array, |
3618 | struct gpio_array *array_info, | |
3619 | unsigned long *value_bitmap) | |
5f424243 RI |
3620 | { |
3621 | might_sleep_if(extra_checks); | |
3622 | if (!desc_array) | |
3027743f LA |
3623 | return -EINVAL; |
3624 | return gpiod_set_array_value_complex(true, true, array_size, desc_array, | |
77588c14 | 3625 | array_info, value_bitmap); |
5f424243 | 3626 | } |
3fff99bc | 3627 | EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep); |
5f424243 | 3628 | |
3946d187 DT |
3629 | /** |
3630 | * gpiod_add_lookup_tables() - register GPIO device consumers | |
3631 | * @tables: list of tables of consumers to register | |
3632 | * @n: number of tables in the list | |
3633 | */ | |
3634 | void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n) | |
3635 | { | |
3636 | unsigned int i; | |
3637 | ||
3638 | mutex_lock(&gpio_lookup_lock); | |
3639 | ||
3640 | for (i = 0; i < n; i++) | |
3641 | list_add_tail(&tables[i]->list, &gpio_lookup_list); | |
3642 | ||
3643 | mutex_unlock(&gpio_lookup_lock); | |
3644 | } | |
3645 | ||
5f424243 | 3646 | /** |
3fff99bc | 3647 | * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs |
b9762beb | 3648 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 3649 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 3650 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3651 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
3652 | * |
3653 | * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
3654 | * into account. | |
3655 | * | |
3656 | * This function is to be called from contexts that can sleep. | |
3657 | */ | |
cf9af0d5 GU |
3658 | int gpiod_set_array_value_cansleep(unsigned int array_size, |
3659 | struct gpio_desc **desc_array, | |
3660 | struct gpio_array *array_info, | |
3661 | unsigned long *value_bitmap) | |
5f424243 RI |
3662 | { |
3663 | might_sleep_if(extra_checks); | |
3664 | if (!desc_array) | |
cf9af0d5 GU |
3665 | return -EINVAL; |
3666 | return gpiod_set_array_value_complex(false, true, array_size, | |
3667 | desc_array, array_info, | |
3668 | value_bitmap); | |
5f424243 | 3669 | } |
3fff99bc | 3670 | EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep); |
5f424243 | 3671 | |
bae48da2 | 3672 | /** |
ad824783 AC |
3673 | * gpiod_add_lookup_table() - register GPIO device consumers |
3674 | * @table: table of consumers to register | |
bae48da2 | 3675 | */ |
ad824783 | 3676 | void gpiod_add_lookup_table(struct gpiod_lookup_table *table) |
bae48da2 | 3677 | { |
49fdfe66 | 3678 | gpiod_add_lookup_tables(&table, 1); |
bae48da2 | 3679 | } |
226b2242 | 3680 | EXPORT_SYMBOL_GPL(gpiod_add_lookup_table); |
bae48da2 | 3681 | |
be9015ab SK |
3682 | /** |
3683 | * gpiod_remove_lookup_table() - unregister GPIO device consumers | |
3684 | * @table: table of consumers to unregister | |
3685 | */ | |
3686 | void gpiod_remove_lookup_table(struct gpiod_lookup_table *table) | |
3687 | { | |
d321ad12 AS |
3688 | /* Nothing to remove */ |
3689 | if (!table) | |
3690 | return; | |
3691 | ||
be9015ab SK |
3692 | mutex_lock(&gpio_lookup_lock); |
3693 | ||
3694 | list_del(&table->list); | |
3695 | ||
3696 | mutex_unlock(&gpio_lookup_lock); | |
3697 | } | |
226b2242 | 3698 | EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table); |
be9015ab | 3699 | |
a411e81e BG |
3700 | /** |
3701 | * gpiod_add_hogs() - register a set of GPIO hogs from machine code | |
3702 | * @hogs: table of gpio hog entries with a zeroed sentinel at the end | |
3703 | */ | |
3704 | void gpiod_add_hogs(struct gpiod_hog *hogs) | |
3705 | { | |
a0b66a73 | 3706 | struct gpio_chip *gc; |
a411e81e BG |
3707 | struct gpiod_hog *hog; |
3708 | ||
3709 | mutex_lock(&gpio_machine_hogs_mutex); | |
3710 | ||
3711 | for (hog = &hogs[0]; hog->chip_label; hog++) { | |
3712 | list_add_tail(&hog->list, &gpio_machine_hogs); | |
3713 | ||
3714 | /* | |
3715 | * The chip may have been registered earlier, so check if it | |
3716 | * exists and, if so, try to hog the line now. | |
3717 | */ | |
a0b66a73 LW |
3718 | gc = find_chip_by_name(hog->chip_label); |
3719 | if (gc) | |
3720 | gpiochip_machine_hog(gc, hog); | |
a411e81e BG |
3721 | } |
3722 | ||
3723 | mutex_unlock(&gpio_machine_hogs_mutex); | |
3724 | } | |
3725 | EXPORT_SYMBOL_GPL(gpiod_add_hogs); | |
3726 | ||
dd61b292 BG |
3727 | void gpiod_remove_hogs(struct gpiod_hog *hogs) |
3728 | { | |
3729 | struct gpiod_hog *hog; | |
3730 | ||
3731 | mutex_lock(&gpio_machine_hogs_mutex); | |
3732 | for (hog = &hogs[0]; hog->chip_label; hog++) | |
3733 | list_del(&hog->list); | |
3734 | mutex_unlock(&gpio_machine_hogs_mutex); | |
3735 | } | |
3736 | EXPORT_SYMBOL_GPL(gpiod_remove_hogs); | |
3737 | ||
ad824783 | 3738 | static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev) |
bae48da2 AC |
3739 | { |
3740 | const char *dev_id = dev ? dev_name(dev) : NULL; | |
ad824783 | 3741 | struct gpiod_lookup_table *table; |
bae48da2 AC |
3742 | |
3743 | mutex_lock(&gpio_lookup_lock); | |
3744 | ||
ad824783 AC |
3745 | list_for_each_entry(table, &gpio_lookup_list, list) { |
3746 | if (table->dev_id && dev_id) { | |
3747 | /* | |
3748 | * Valid strings on both ends, must be identical to have | |
3749 | * a match | |
3750 | */ | |
3751 | if (!strcmp(table->dev_id, dev_id)) | |
3752 | goto found; | |
3753 | } else { | |
3754 | /* | |
3755 | * One of the pointers is NULL, so both must be to have | |
3756 | * a match | |
3757 | */ | |
3758 | if (dev_id == table->dev_id) | |
3759 | goto found; | |
3760 | } | |
3761 | } | |
3762 | table = NULL; | |
bae48da2 | 3763 | |
ad824783 AC |
3764 | found: |
3765 | mutex_unlock(&gpio_lookup_lock); | |
3766 | return table; | |
3767 | } | |
bae48da2 | 3768 | |
ad824783 | 3769 | static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id, |
fed7026a | 3770 | unsigned int idx, unsigned long *flags) |
ad824783 | 3771 | { |
2a3cf6a3 | 3772 | struct gpio_desc *desc = ERR_PTR(-ENOENT); |
ad824783 AC |
3773 | struct gpiod_lookup_table *table; |
3774 | struct gpiod_lookup *p; | |
bae48da2 | 3775 | |
ad824783 AC |
3776 | table = gpiod_find_lookup_table(dev); |
3777 | if (!table) | |
3778 | return desc; | |
bae48da2 | 3779 | |
4c033b54 | 3780 | for (p = &table->table[0]; p->key; p++) { |
a0b66a73 | 3781 | struct gpio_chip *gc; |
bae48da2 | 3782 | |
ad824783 | 3783 | /* idx must always match exactly */ |
bae48da2 AC |
3784 | if (p->idx != idx) |
3785 | continue; | |
3786 | ||
ad824783 AC |
3787 | /* If the lookup entry has a con_id, require exact match */ |
3788 | if (p->con_id && (!con_id || strcmp(p->con_id, con_id))) | |
3789 | continue; | |
bae48da2 | 3790 | |
4c033b54 GU |
3791 | if (p->chip_hwnum == U16_MAX) { |
3792 | desc = gpio_name_to_desc(p->key); | |
3793 | if (desc) { | |
3794 | *flags = p->flags; | |
3795 | return desc; | |
3796 | } | |
3797 | ||
3798 | dev_warn(dev, "cannot find GPIO line %s, deferring\n", | |
3799 | p->key); | |
3800 | return ERR_PTR(-EPROBE_DEFER); | |
3801 | } | |
3802 | ||
3803 | gc = find_chip_by_name(p->key); | |
bae48da2 | 3804 | |
a0b66a73 | 3805 | if (!gc) { |
8853daf3 JK |
3806 | /* |
3807 | * As the lookup table indicates a chip with | |
4c033b54 | 3808 | * p->key should exist, assume it may |
8853daf3 JK |
3809 | * still appear later and let the interested |
3810 | * consumer be probed again or let the Deferred | |
3811 | * Probe infrastructure handle the error. | |
3812 | */ | |
3813 | dev_warn(dev, "cannot find GPIO chip %s, deferring\n", | |
4c033b54 | 3814 | p->key); |
8853daf3 | 3815 | return ERR_PTR(-EPROBE_DEFER); |
ad824783 | 3816 | } |
bae48da2 | 3817 | |
a0b66a73 | 3818 | if (gc->ngpio <= p->chip_hwnum) { |
2a3cf6a3 | 3819 | dev_err(dev, |
d935bd50 | 3820 | "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n", |
a0b66a73 LW |
3821 | idx, p->chip_hwnum, gc->ngpio - 1, |
3822 | gc->label); | |
2a3cf6a3 | 3823 | return ERR_PTR(-EINVAL); |
bae48da2 | 3824 | } |
bae48da2 | 3825 | |
a0b66a73 | 3826 | desc = gpiochip_get_desc(gc, p->chip_hwnum); |
ad824783 | 3827 | *flags = p->flags; |
bae48da2 | 3828 | |
2a3cf6a3 | 3829 | return desc; |
bae48da2 AC |
3830 | } |
3831 | ||
bae48da2 AC |
3832 | return desc; |
3833 | } | |
3834 | ||
66858527 RI |
3835 | static int platform_gpio_count(struct device *dev, const char *con_id) |
3836 | { | |
3837 | struct gpiod_lookup_table *table; | |
3838 | struct gpiod_lookup *p; | |
3839 | unsigned int count = 0; | |
3840 | ||
3841 | table = gpiod_find_lookup_table(dev); | |
3842 | if (!table) | |
3843 | return -ENOENT; | |
3844 | ||
4c033b54 | 3845 | for (p = &table->table[0]; p->key; p++) { |
66858527 RI |
3846 | if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) || |
3847 | (!con_id && !p->con_id)) | |
3848 | count++; | |
3849 | } | |
3850 | if (!count) | |
3851 | return -ENOENT; | |
3852 | ||
3853 | return count; | |
3854 | } | |
3855 | ||
0eadd36d DT |
3856 | /** |
3857 | * fwnode_get_named_gpiod - obtain a GPIO from firmware node | |
3858 | * @fwnode: handle of the firmware node | |
3859 | * @propname: name of the firmware property representing the GPIO | |
3860 | * @index: index of the GPIO to obtain for the consumer | |
3861 | * @dflags: GPIO initialization flags | |
3862 | * @label: label to attach to the requested GPIO | |
3863 | * | |
3864 | * This function can be used for drivers that get their configuration | |
3865 | * from opaque firmware. | |
3866 | * | |
3867 | * The function properly finds the corresponding GPIO using whatever is the | |
3868 | * underlying firmware interface and then makes sure that the GPIO | |
3869 | * descriptor is requested before it is returned to the caller. | |
3870 | * | |
3871 | * Returns: | |
3872 | * On successful request the GPIO pin is configured in accordance with | |
3873 | * provided @dflags. | |
3874 | * | |
3875 | * In case of error an ERR_PTR() is returned. | |
3876 | */ | |
3877 | static struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode, | |
3878 | const char *propname, int index, | |
3879 | enum gpiod_flags dflags, | |
3880 | const char *label) | |
3881 | { | |
3882 | unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT; | |
3883 | struct gpio_desc *desc = ERR_PTR(-ENODEV); | |
3884 | int ret; | |
3885 | ||
3886 | if (is_of_node(fwnode)) { | |
3887 | desc = gpiod_get_from_of_node(to_of_node(fwnode), | |
3888 | propname, index, | |
3889 | dflags, | |
3890 | label); | |
3891 | return desc; | |
3892 | } else if (is_acpi_node(fwnode)) { | |
3893 | struct acpi_gpio_info info; | |
3894 | ||
3895 | desc = acpi_node_get_gpiod(fwnode, propname, index, &info); | |
3896 | if (IS_ERR(desc)) | |
3897 | return desc; | |
3898 | ||
3899 | acpi_gpio_update_gpiod_flags(&dflags, &info); | |
3900 | acpi_gpio_update_gpiod_lookup_flags(&lflags, &info); | |
3901 | } else { | |
3902 | return ERR_PTR(-EINVAL); | |
3903 | } | |
3904 | ||
3905 | /* Currently only ACPI takes this path */ | |
3906 | ret = gpiod_request(desc, label); | |
3907 | if (ret) | |
3908 | return ERR_PTR(ret); | |
3909 | ||
3910 | ret = gpiod_configure_flags(desc, propname, lflags, dflags); | |
3911 | if (ret < 0) { | |
3912 | gpiod_put(desc); | |
3913 | return ERR_PTR(ret); | |
3914 | } | |
3915 | ||
3916 | blocking_notifier_call_chain(&desc->gdev->notifier, | |
3917 | GPIOLINE_CHANGED_REQUESTED, desc); | |
3918 | ||
3919 | return desc; | |
3920 | } | |
3921 | ||
13949fa9 DT |
3922 | /** |
3923 | * fwnode_gpiod_get_index - obtain a GPIO from firmware node | |
3924 | * @fwnode: handle of the firmware node | |
3925 | * @con_id: function within the GPIO consumer | |
3926 | * @index: index of the GPIO to obtain for the consumer | |
3927 | * @flags: GPIO initialization flags | |
3928 | * @label: label to attach to the requested GPIO | |
3929 | * | |
3930 | * This function can be used for drivers that get their configuration | |
3931 | * from opaque firmware. | |
3932 | * | |
3933 | * The function properly finds the corresponding GPIO using whatever is the | |
3934 | * underlying firmware interface and then makes sure that the GPIO | |
3935 | * descriptor is requested before it is returned to the caller. | |
3936 | * | |
3937 | * Returns: | |
3938 | * On successful request the GPIO pin is configured in accordance with | |
3939 | * provided @flags. | |
3940 | * | |
3941 | * In case of error an ERR_PTR() is returned. | |
3942 | */ | |
3943 | struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode, | |
3944 | const char *con_id, int index, | |
3945 | enum gpiod_flags flags, | |
3946 | const char *label) | |
3947 | { | |
3948 | struct gpio_desc *desc; | |
3949 | char prop_name[32]; /* 32 is max size of property name */ | |
3950 | unsigned int i; | |
3951 | ||
3952 | for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) { | |
3953 | if (con_id) | |
3954 | snprintf(prop_name, sizeof(prop_name), "%s-%s", | |
3955 | con_id, gpio_suffixes[i]); | |
3956 | else | |
3957 | snprintf(prop_name, sizeof(prop_name), "%s", | |
3958 | gpio_suffixes[i]); | |
3959 | ||
3960 | desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags, | |
3961 | label); | |
7b58696d | 3962 | if (!gpiod_not_found(desc)) |
13949fa9 DT |
3963 | break; |
3964 | } | |
3965 | ||
3966 | return desc; | |
3967 | } | |
3968 | EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index); | |
3969 | ||
66858527 RI |
3970 | /** |
3971 | * gpiod_count - return the number of GPIOs associated with a device / function | |
3972 | * or -ENOENT if no GPIO has been assigned to the requested function | |
3973 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
3974 | * @con_id: function within the GPIO consumer | |
3975 | */ | |
3976 | int gpiod_count(struct device *dev, const char *con_id) | |
3977 | { | |
944f4b0a | 3978 | const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL; |
66858527 RI |
3979 | int count = -ENOENT; |
3980 | ||
944f4b0a | 3981 | if (is_of_node(fwnode)) |
f626d6df | 3982 | count = of_gpio_get_count(dev, con_id); |
944f4b0a | 3983 | else if (is_acpi_node(fwnode)) |
66858527 RI |
3984 | count = acpi_gpio_count(dev, con_id); |
3985 | ||
3986 | if (count < 0) | |
3987 | count = platform_gpio_count(dev, con_id); | |
3988 | ||
3989 | return count; | |
3990 | } | |
3991 | EXPORT_SYMBOL_GPL(gpiod_count); | |
3992 | ||
bae48da2 | 3993 | /** |
0879162f | 3994 | * gpiod_get - obtain a GPIO for a given GPIO function |
ad824783 | 3995 | * @dev: GPIO consumer, can be NULL for system-global GPIOs |
bae48da2 | 3996 | * @con_id: function within the GPIO consumer |
39b2bbe3 | 3997 | * @flags: optional GPIO initialization flags |
bae48da2 AC |
3998 | * |
3999 | * Return the GPIO descriptor corresponding to the function con_id of device | |
2a3cf6a3 | 4000 | * dev, -ENOENT if no GPIO has been assigned to the requested function, or |
20a8a968 | 4001 | * another IS_ERR() code if an error occurred while trying to acquire the GPIO. |
bae48da2 | 4002 | */ |
b17d1bf1 | 4003 | struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id, |
39b2bbe3 | 4004 | enum gpiod_flags flags) |
bae48da2 | 4005 | { |
39b2bbe3 | 4006 | return gpiod_get_index(dev, con_id, 0, flags); |
bae48da2 | 4007 | } |
b17d1bf1 | 4008 | EXPORT_SYMBOL_GPL(gpiod_get); |
bae48da2 | 4009 | |
29a1f233 TR |
4010 | /** |
4011 | * gpiod_get_optional - obtain an optional GPIO for a given GPIO function | |
4012 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4013 | * @con_id: function within the GPIO consumer | |
39b2bbe3 | 4014 | * @flags: optional GPIO initialization flags |
29a1f233 TR |
4015 | * |
4016 | * This is equivalent to gpiod_get(), except that when no GPIO was assigned to | |
4017 | * the requested function it will return NULL. This is convenient for drivers | |
4018 | * that need to handle optional GPIOs. | |
4019 | */ | |
b17d1bf1 | 4020 | struct gpio_desc *__must_check gpiod_get_optional(struct device *dev, |
39b2bbe3 AC |
4021 | const char *con_id, |
4022 | enum gpiod_flags flags) | |
29a1f233 | 4023 | { |
39b2bbe3 | 4024 | return gpiod_get_index_optional(dev, con_id, 0, flags); |
29a1f233 | 4025 | } |
b17d1bf1 | 4026 | EXPORT_SYMBOL_GPL(gpiod_get_optional); |
29a1f233 | 4027 | |
f625d460 BP |
4028 | |
4029 | /** | |
4030 | * gpiod_configure_flags - helper function to configure a given GPIO | |
4031 | * @desc: gpio whose value will be assigned | |
4032 | * @con_id: function within the GPIO consumer | |
fed7026a AS |
4033 | * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from |
4034 | * of_find_gpio() or of_get_gpio_hog() | |
f625d460 BP |
4035 | * @dflags: gpiod_flags - optional GPIO initialization flags |
4036 | * | |
4037 | * Return 0 on success, -ENOENT if no GPIO has been assigned to the | |
4038 | * requested function and/or index, or another IS_ERR() code if an error | |
4039 | * occurred while trying to acquire the GPIO. | |
4040 | */ | |
c29fd9eb | 4041 | int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id, |
85b03b30 | 4042 | unsigned long lflags, enum gpiod_flags dflags) |
f625d460 | 4043 | { |
d377f56f | 4044 | int ret; |
f625d460 | 4045 | |
85b03b30 JH |
4046 | if (lflags & GPIO_ACTIVE_LOW) |
4047 | set_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
f926dfc1 | 4048 | |
85b03b30 JH |
4049 | if (lflags & GPIO_OPEN_DRAIN) |
4050 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | |
f926dfc1 LW |
4051 | else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) { |
4052 | /* | |
4053 | * This enforces open drain mode from the consumer side. | |
4054 | * This is necessary for some busses like I2C, but the lookup | |
4055 | * should *REALLY* have specified them as open drain in the | |
4056 | * first place, so print a little warning here. | |
4057 | */ | |
4058 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | |
4059 | gpiod_warn(desc, | |
4060 | "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n"); | |
4061 | } | |
4062 | ||
85b03b30 JH |
4063 | if (lflags & GPIO_OPEN_SOURCE) |
4064 | set_bit(FLAG_OPEN_SOURCE, &desc->flags); | |
e10f72bf | 4065 | |
c269df8c NS |
4066 | if (((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) || |
4067 | ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DISABLE)) || | |
4068 | ((lflags & GPIO_PULL_DOWN) && (lflags & GPIO_PULL_DISABLE))) { | |
d449991c | 4069 | gpiod_err(desc, |
c269df8c | 4070 | "multiple pull-up, pull-down or pull-disable enabled, invalid configuration\n"); |
d449991c TP |
4071 | return -EINVAL; |
4072 | } | |
4073 | ||
4074 | if (lflags & GPIO_PULL_UP) | |
4075 | set_bit(FLAG_PULL_UP, &desc->flags); | |
4076 | else if (lflags & GPIO_PULL_DOWN) | |
4077 | set_bit(FLAG_PULL_DOWN, &desc->flags); | |
c269df8c NS |
4078 | else if (lflags & GPIO_PULL_DISABLE) |
4079 | set_bit(FLAG_BIAS_DISABLE, &desc->flags); | |
d449991c | 4080 | |
d377f56f LW |
4081 | ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY)); |
4082 | if (ret < 0) | |
4083 | return ret; | |
85b03b30 | 4084 | |
f625d460 BP |
4085 | /* No particular flag request, return here... */ |
4086 | if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) { | |
262b9011 | 4087 | gpiod_dbg(desc, "no flags found for %s\n", con_id); |
f625d460 BP |
4088 | return 0; |
4089 | } | |
4090 | ||
4091 | /* Process flags */ | |
4092 | if (dflags & GPIOD_FLAGS_BIT_DIR_OUT) | |
d377f56f | 4093 | ret = gpiod_direction_output(desc, |
ad17731d | 4094 | !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL)); |
f625d460 | 4095 | else |
d377f56f | 4096 | ret = gpiod_direction_input(desc); |
f625d460 | 4097 | |
d377f56f | 4098 | return ret; |
f625d460 BP |
4099 | } |
4100 | ||
bae48da2 AC |
4101 | /** |
4102 | * gpiod_get_index - obtain a GPIO from a multi-index GPIO function | |
fdd6a5fe | 4103 | * @dev: GPIO consumer, can be NULL for system-global GPIOs |
bae48da2 AC |
4104 | * @con_id: function within the GPIO consumer |
4105 | * @idx: index of the GPIO to obtain in the consumer | |
39b2bbe3 | 4106 | * @flags: optional GPIO initialization flags |
bae48da2 AC |
4107 | * |
4108 | * This variant of gpiod_get() allows to access GPIOs other than the first | |
4109 | * defined one for functions that define several GPIOs. | |
4110 | * | |
2a3cf6a3 AC |
4111 | * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the |
4112 | * requested function and/or index, or another IS_ERR() code if an error | |
20a8a968 | 4113 | * occurred while trying to acquire the GPIO. |
bae48da2 | 4114 | */ |
b17d1bf1 | 4115 | struct gpio_desc *__must_check gpiod_get_index(struct device *dev, |
bae48da2 | 4116 | const char *con_id, |
39b2bbe3 AC |
4117 | unsigned int idx, |
4118 | enum gpiod_flags flags) | |
bae48da2 | 4119 | { |
2d6c06f5 | 4120 | unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT; |
35c5d7fd | 4121 | struct gpio_desc *desc = NULL; |
d377f56f | 4122 | int ret; |
7d18f0a1 LW |
4123 | /* Maybe we have a device name, maybe not */ |
4124 | const char *devname = dev ? dev_name(dev) : "?"; | |
944f4b0a | 4125 | const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL; |
bae48da2 AC |
4126 | |
4127 | dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id); | |
4128 | ||
944f4b0a AS |
4129 | /* Using device tree? */ |
4130 | if (is_of_node(fwnode)) { | |
4131 | dev_dbg(dev, "using device tree for GPIO lookup\n"); | |
4132 | desc = of_find_gpio(dev, con_id, idx, &lookupflags); | |
4133 | } else if (is_acpi_node(fwnode)) { | |
4134 | dev_dbg(dev, "using ACPI for GPIO lookup\n"); | |
4135 | desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags); | |
35c5d7fd AC |
4136 | } |
4137 | ||
4138 | /* | |
4139 | * Either we are not using DT or ACPI, or their lookup did not return | |
4140 | * a result. In that case, use platform lookup as a fallback. | |
4141 | */ | |
7b58696d | 4142 | if (!desc || gpiod_not_found(desc)) { |
43a8785a | 4143 | dev_dbg(dev, "using lookup tables for GPIO lookup\n"); |
39b2bbe3 | 4144 | desc = gpiod_find(dev, con_id, idx, &lookupflags); |
bae48da2 AC |
4145 | } |
4146 | ||
4147 | if (IS_ERR(desc)) { | |
9d5a1f2c | 4148 | dev_dbg(dev, "No GPIO consumer %s found\n", con_id); |
bae48da2 AC |
4149 | return desc; |
4150 | } | |
4151 | ||
7d18f0a1 LW |
4152 | /* |
4153 | * If a connection label was passed use that, else attempt to use | |
4154 | * the device name as label | |
4155 | */ | |
322b86e7 | 4156 | ret = gpiod_request(desc, con_id ?: devname); |
8bbff39c | 4157 | if (ret) { |
6105b2e3 | 4158 | if (!(ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE)) |
d377f56f | 4159 | return ERR_PTR(ret); |
6105b2e3 AS |
4160 | |
4161 | /* | |
4162 | * This happens when there are several consumers for | |
4163 | * the same GPIO line: we just return here without | |
4164 | * further initialization. It is a bit of a hack. | |
4165 | * This is necessary to support fixed regulators. | |
4166 | * | |
4167 | * FIXME: Make this more sane and safe. | |
4168 | */ | |
4169 | dev_info(dev, "nonexclusive access to GPIO for %s\n", con_id ?: devname); | |
4170 | return desc; | |
b0ce7b29 | 4171 | } |
bae48da2 | 4172 | |
d377f56f | 4173 | ret = gpiod_configure_flags(desc, con_id, lookupflags, flags); |
6392cca4 | 4174 | if (ret < 0) { |
39b2bbe3 | 4175 | dev_dbg(dev, "setup of GPIO %s failed\n", con_id); |
6392cca4 LW |
4176 | gpiod_put(desc); |
4177 | return ERR_PTR(ret); | |
4178 | } | |
4179 | ||
6accc376 KG |
4180 | blocking_notifier_call_chain(&desc->gdev->notifier, |
4181 | GPIOLINE_CHANGED_REQUESTED, desc); | |
9fefca77 | 4182 | |
6392cca4 LW |
4183 | return desc; |
4184 | } | |
b17d1bf1 | 4185 | EXPORT_SYMBOL_GPL(gpiod_get_index); |
6392cca4 | 4186 | |
29a1f233 TR |
4187 | /** |
4188 | * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO | |
4189 | * function | |
4190 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4191 | * @con_id: function within the GPIO consumer | |
4192 | * @index: index of the GPIO to obtain in the consumer | |
39b2bbe3 | 4193 | * @flags: optional GPIO initialization flags |
29a1f233 TR |
4194 | * |
4195 | * This is equivalent to gpiod_get_index(), except that when no GPIO with the | |
4196 | * specified index was assigned to the requested function it will return NULL. | |
4197 | * This is convenient for drivers that need to handle optional GPIOs. | |
4198 | */ | |
b17d1bf1 | 4199 | struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev, |
29a1f233 | 4200 | const char *con_id, |
39b2bbe3 AC |
4201 | unsigned int index, |
4202 | enum gpiod_flags flags) | |
29a1f233 TR |
4203 | { |
4204 | struct gpio_desc *desc; | |
4205 | ||
39b2bbe3 | 4206 | desc = gpiod_get_index(dev, con_id, index, flags); |
7b58696d AS |
4207 | if (gpiod_not_found(desc)) |
4208 | return NULL; | |
29a1f233 TR |
4209 | |
4210 | return desc; | |
4211 | } | |
b17d1bf1 | 4212 | EXPORT_SYMBOL_GPL(gpiod_get_index_optional); |
29a1f233 | 4213 | |
f625d460 BP |
4214 | /** |
4215 | * gpiod_hog - Hog the specified GPIO desc given the provided flags | |
4216 | * @desc: gpio whose value will be assigned | |
4217 | * @name: gpio line name | |
fed7026a AS |
4218 | * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from |
4219 | * of_find_gpio() or of_get_gpio_hog() | |
f625d460 BP |
4220 | * @dflags: gpiod_flags - optional GPIO initialization flags |
4221 | */ | |
4222 | int gpiod_hog(struct gpio_desc *desc, const char *name, | |
4223 | unsigned long lflags, enum gpiod_flags dflags) | |
4224 | { | |
a0b66a73 | 4225 | struct gpio_chip *gc; |
f625d460 BP |
4226 | struct gpio_desc *local_desc; |
4227 | int hwnum; | |
d377f56f | 4228 | int ret; |
f625d460 | 4229 | |
a0b66a73 | 4230 | gc = gpiod_to_chip(desc); |
f625d460 BP |
4231 | hwnum = gpio_chip_hwgpio(desc); |
4232 | ||
a0b66a73 | 4233 | local_desc = gpiochip_request_own_desc(gc, hwnum, name, |
5923ea6c | 4234 | lflags, dflags); |
f625d460 | 4235 | if (IS_ERR(local_desc)) { |
d377f56f | 4236 | ret = PTR_ERR(local_desc); |
c31a571d | 4237 | pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n", |
a0b66a73 | 4238 | name, gc->label, hwnum, ret); |
d377f56f | 4239 | return ret; |
f625d460 BP |
4240 | } |
4241 | ||
f625d460 BP |
4242 | /* Mark GPIO as hogged so it can be identified and removed later */ |
4243 | set_bit(FLAG_IS_HOGGED, &desc->flags); | |
4244 | ||
262b9011 | 4245 | gpiod_info(desc, "hogged as %s%s\n", |
b27f300f BG |
4246 | (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input", |
4247 | (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? | |
4248 | (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : ""); | |
f625d460 BP |
4249 | |
4250 | return 0; | |
4251 | } | |
4252 | ||
4253 | /** | |
4254 | * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog | |
a0b66a73 | 4255 | * @gc: gpio chip to act on |
f625d460 | 4256 | */ |
a0b66a73 | 4257 | static void gpiochip_free_hogs(struct gpio_chip *gc) |
f625d460 | 4258 | { |
80c78fbe | 4259 | struct gpio_desc *desc; |
f625d460 | 4260 | |
57017edd | 4261 | for_each_gpio_desc_with_flag(gc, desc, FLAG_IS_HOGGED) |
80c78fbe | 4262 | gpiochip_free_own_desc(desc); |
f625d460 BP |
4263 | } |
4264 | ||
66858527 RI |
4265 | /** |
4266 | * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function | |
4267 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4268 | * @con_id: function within the GPIO consumer | |
4269 | * @flags: optional GPIO initialization flags | |
4270 | * | |
4271 | * This function acquires all the GPIOs defined under a given function. | |
4272 | * | |
4273 | * Return a struct gpio_descs containing an array of descriptors, -ENOENT if | |
4274 | * no GPIO has been assigned to the requested function, or another IS_ERR() | |
4275 | * code if an error occurred while trying to acquire the GPIOs. | |
4276 | */ | |
4277 | struct gpio_descs *__must_check gpiod_get_array(struct device *dev, | |
4278 | const char *con_id, | |
4279 | enum gpiod_flags flags) | |
4280 | { | |
4281 | struct gpio_desc *desc; | |
4282 | struct gpio_descs *descs; | |
bf9346f5 | 4283 | struct gpio_array *array_info = NULL; |
a0b66a73 | 4284 | struct gpio_chip *gc; |
bf9346f5 | 4285 | int count, bitmap_size; |
66858527 RI |
4286 | |
4287 | count = gpiod_count(dev, con_id); | |
4288 | if (count < 0) | |
4289 | return ERR_PTR(count); | |
4290 | ||
acafe7e3 | 4291 | descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL); |
66858527 RI |
4292 | if (!descs) |
4293 | return ERR_PTR(-ENOMEM); | |
4294 | ||
4295 | for (descs->ndescs = 0; descs->ndescs < count; ) { | |
4296 | desc = gpiod_get_index(dev, con_id, descs->ndescs, flags); | |
4297 | if (IS_ERR(desc)) { | |
4298 | gpiod_put_array(descs); | |
4299 | return ERR_CAST(desc); | |
4300 | } | |
bf9346f5 | 4301 | |
66858527 | 4302 | descs->desc[descs->ndescs] = desc; |
bf9346f5 | 4303 | |
a0b66a73 | 4304 | gc = gpiod_to_chip(desc); |
bf9346f5 | 4305 | /* |
c4c958aa JK |
4306 | * If pin hardware number of array member 0 is also 0, select |
4307 | * its chip as a candidate for fast bitmap processing path. | |
bf9346f5 | 4308 | */ |
c4c958aa | 4309 | if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) { |
bf9346f5 JK |
4310 | struct gpio_descs *array; |
4311 | ||
a0b66a73 LW |
4312 | bitmap_size = BITS_TO_LONGS(gc->ngpio > count ? |
4313 | gc->ngpio : count); | |
bf9346f5 JK |
4314 | |
4315 | array = kzalloc(struct_size(descs, desc, count) + | |
4316 | struct_size(array_info, invert_mask, | |
4317 | 3 * bitmap_size), GFP_KERNEL); | |
4318 | if (!array) { | |
4319 | gpiod_put_array(descs); | |
4320 | return ERR_PTR(-ENOMEM); | |
4321 | } | |
4322 | ||
4323 | memcpy(array, descs, | |
4324 | struct_size(descs, desc, descs->ndescs + 1)); | |
4325 | kfree(descs); | |
4326 | ||
4327 | descs = array; | |
4328 | array_info = (void *)(descs->desc + count); | |
4329 | array_info->get_mask = array_info->invert_mask + | |
4330 | bitmap_size; | |
4331 | array_info->set_mask = array_info->get_mask + | |
4332 | bitmap_size; | |
4333 | ||
4334 | array_info->desc = descs->desc; | |
4335 | array_info->size = count; | |
a0b66a73 | 4336 | array_info->chip = gc; |
bf9346f5 JK |
4337 | bitmap_set(array_info->get_mask, descs->ndescs, |
4338 | count - descs->ndescs); | |
4339 | bitmap_set(array_info->set_mask, descs->ndescs, | |
4340 | count - descs->ndescs); | |
4341 | descs->info = array_info; | |
4342 | } | |
c4c958aa | 4343 | /* Unmark array members which don't belong to the 'fast' chip */ |
a0b66a73 | 4344 | if (array_info && array_info->chip != gc) { |
bf9346f5 JK |
4345 | __clear_bit(descs->ndescs, array_info->get_mask); |
4346 | __clear_bit(descs->ndescs, array_info->set_mask); | |
c4c958aa JK |
4347 | } |
4348 | /* | |
4349 | * Detect array members which belong to the 'fast' chip | |
4350 | * but their pins are not in hardware order. | |
4351 | */ | |
4352 | else if (array_info && | |
4353 | gpio_chip_hwgpio(desc) != descs->ndescs) { | |
4354 | /* | |
4355 | * Don't use fast path if all array members processed so | |
4356 | * far belong to the same chip as this one but its pin | |
4357 | * hardware number is different from its array index. | |
4358 | */ | |
4359 | if (bitmap_full(array_info->get_mask, descs->ndescs)) { | |
4360 | array_info = NULL; | |
4361 | } else { | |
4362 | __clear_bit(descs->ndescs, | |
4363 | array_info->get_mask); | |
4364 | __clear_bit(descs->ndescs, | |
4365 | array_info->set_mask); | |
4366 | } | |
bf9346f5 JK |
4367 | } else if (array_info) { |
4368 | /* Exclude open drain or open source from fast output */ | |
a0b66a73 LW |
4369 | if (gpiochip_line_is_open_drain(gc, descs->ndescs) || |
4370 | gpiochip_line_is_open_source(gc, descs->ndescs)) | |
bf9346f5 JK |
4371 | __clear_bit(descs->ndescs, |
4372 | array_info->set_mask); | |
4373 | /* Identify 'fast' pins which require invertion */ | |
4374 | if (gpiod_is_active_low(desc)) | |
4375 | __set_bit(descs->ndescs, | |
4376 | array_info->invert_mask); | |
4377 | } | |
4378 | ||
66858527 RI |
4379 | descs->ndescs++; |
4380 | } | |
bf9346f5 JK |
4381 | if (array_info) |
4382 | dev_dbg(dev, | |
4383 | "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n", | |
4384 | array_info->chip->label, array_info->size, | |
4385 | *array_info->get_mask, *array_info->set_mask, | |
4386 | *array_info->invert_mask); | |
66858527 RI |
4387 | return descs; |
4388 | } | |
4389 | EXPORT_SYMBOL_GPL(gpiod_get_array); | |
4390 | ||
4391 | /** | |
4392 | * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO | |
4393 | * function | |
4394 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4395 | * @con_id: function within the GPIO consumer | |
4396 | * @flags: optional GPIO initialization flags | |
4397 | * | |
4398 | * This is equivalent to gpiod_get_array(), except that when no GPIO was | |
4399 | * assigned to the requested function it will return NULL. | |
4400 | */ | |
4401 | struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev, | |
4402 | const char *con_id, | |
4403 | enum gpiod_flags flags) | |
4404 | { | |
4405 | struct gpio_descs *descs; | |
4406 | ||
4407 | descs = gpiod_get_array(dev, con_id, flags); | |
7b58696d | 4408 | if (gpiod_not_found(descs)) |
66858527 RI |
4409 | return NULL; |
4410 | ||
4411 | return descs; | |
4412 | } | |
4413 | EXPORT_SYMBOL_GPL(gpiod_get_array_optional); | |
4414 | ||
bae48da2 AC |
4415 | /** |
4416 | * gpiod_put - dispose of a GPIO descriptor | |
4417 | * @desc: GPIO descriptor to dispose of | |
4418 | * | |
4419 | * No descriptor can be used after gpiod_put() has been called on it. | |
4420 | */ | |
4421 | void gpiod_put(struct gpio_desc *desc) | |
4422 | { | |
1d7765ba AS |
4423 | if (desc) |
4424 | gpiod_free(desc); | |
372e722e | 4425 | } |
bae48da2 | 4426 | EXPORT_SYMBOL_GPL(gpiod_put); |
d2876d08 | 4427 | |
66858527 RI |
4428 | /** |
4429 | * gpiod_put_array - dispose of multiple GPIO descriptors | |
4430 | * @descs: struct gpio_descs containing an array of descriptors | |
4431 | */ | |
4432 | void gpiod_put_array(struct gpio_descs *descs) | |
4433 | { | |
4434 | unsigned int i; | |
4435 | ||
4436 | for (i = 0; i < descs->ndescs; i++) | |
4437 | gpiod_put(descs->desc[i]); | |
4438 | ||
4439 | kfree(descs); | |
4440 | } | |
4441 | EXPORT_SYMBOL_GPL(gpiod_put_array); | |
4442 | ||
ced2af41 SK |
4443 | |
4444 | static int gpio_bus_match(struct device *dev, struct device_driver *drv) | |
4445 | { | |
1df62542 AS |
4446 | struct fwnode_handle *fwnode = dev_fwnode(dev); |
4447 | ||
ced2af41 SK |
4448 | /* |
4449 | * Only match if the fwnode doesn't already have a proper struct device | |
4450 | * created for it. | |
4451 | */ | |
1df62542 | 4452 | if (fwnode && fwnode->dev != dev) |
ced2af41 SK |
4453 | return 0; |
4454 | return 1; | |
4455 | } | |
4456 | ||
4731210c SK |
4457 | static int gpio_stub_drv_probe(struct device *dev) |
4458 | { | |
4459 | /* | |
4460 | * The DT node of some GPIO chips have a "compatible" property, but | |
4461 | * never have a struct device added and probed by a driver to register | |
4462 | * the GPIO chip with gpiolib. In such cases, fw_devlink=on will cause | |
4463 | * the consumers of the GPIO chip to get probe deferred forever because | |
4464 | * they will be waiting for a device associated with the GPIO chip | |
4465 | * firmware node to get added and bound to a driver. | |
4466 | * | |
4467 | * To allow these consumers to probe, we associate the struct | |
4468 | * gpio_device of the GPIO chip with the firmware node and then simply | |
4469 | * bind it to this stub driver. | |
4470 | */ | |
4471 | return 0; | |
4472 | } | |
4473 | ||
4474 | static struct device_driver gpio_stub_drv = { | |
4475 | .name = "gpio_stub_drv", | |
4476 | .bus = &gpio_bus_type, | |
4477 | .probe = gpio_stub_drv_probe, | |
4478 | }; | |
4479 | ||
3c702e99 LW |
4480 | static int __init gpiolib_dev_init(void) |
4481 | { | |
4482 | int ret; | |
4483 | ||
4484 | /* Register GPIO sysfs bus */ | |
b1911710 | 4485 | ret = bus_register(&gpio_bus_type); |
3c702e99 LW |
4486 | if (ret < 0) { |
4487 | pr_err("gpiolib: could not register GPIO bus type\n"); | |
4488 | return ret; | |
4489 | } | |
4490 | ||
3875721e WY |
4491 | ret = driver_register(&gpio_stub_drv); |
4492 | if (ret < 0) { | |
4731210c SK |
4493 | pr_err("gpiolib: could not register GPIO stub driver\n"); |
4494 | bus_unregister(&gpio_bus_type); | |
4495 | return ret; | |
4496 | } | |
4497 | ||
ddd8891e | 4498 | ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME); |
3c702e99 LW |
4499 | if (ret < 0) { |
4500 | pr_err("gpiolib: failed to allocate char dev region\n"); | |
4731210c | 4501 | driver_unregister(&gpio_stub_drv); |
3c702e99 | 4502 | bus_unregister(&gpio_bus_type); |
63636d95 | 4503 | return ret; |
3c702e99 | 4504 | } |
63636d95 GU |
4505 | |
4506 | gpiolib_initialized = true; | |
4507 | gpiochip_setup_devs(); | |
4508 | ||
8650b609 DG |
4509 | #if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO) |
4510 | WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier)); | |
4511 | #endif /* CONFIG_OF_DYNAMIC && CONFIG_OF_GPIO */ | |
63636d95 | 4512 | |
3c702e99 LW |
4513 | return ret; |
4514 | } | |
4515 | core_initcall(gpiolib_dev_init); | |
4516 | ||
d2876d08 DB |
4517 | #ifdef CONFIG_DEBUG_FS |
4518 | ||
fdeb8e15 | 4519 | static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev) |
d2876d08 | 4520 | { |
a0b66a73 | 4521 | struct gpio_chip *gc = gdev->chip; |
3de69ae1 | 4522 | struct gpio_desc *desc; |
fdeb8e15 | 4523 | unsigned gpio = gdev->base; |
3de69ae1 | 4524 | int value; |
90fd2270 LW |
4525 | bool is_out; |
4526 | bool is_irq; | |
4527 | bool active_low; | |
d2876d08 | 4528 | |
3de69ae1 AS |
4529 | for_each_gpio_desc(gc, desc) { |
4530 | if (test_bit(FLAG_REQUESTED, &desc->flags)) { | |
4531 | gpiod_get_direction(desc); | |
4532 | is_out = test_bit(FLAG_IS_OUT, &desc->flags); | |
234c5209 | 4533 | value = gpio_chip_get_value(gc, desc); |
3de69ae1 AS |
4534 | is_irq = test_bit(FLAG_USED_AS_IRQ, &desc->flags); |
4535 | active_low = test_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
4536 | seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s\n", | |
4537 | gpio, desc->name ?: "", desc->label, | |
4538 | is_out ? "out" : "in ", | |
4539 | value >= 0 ? (value ? "hi" : "lo") : "? ", | |
4540 | is_irq ? "IRQ " : "", | |
4541 | active_low ? "ACTIVE LOW" : ""); | |
4542 | } else if (desc->name) { | |
4543 | seq_printf(s, " gpio-%-3d (%-20.20s)\n", gpio, desc->name); | |
ced433e2 | 4544 | } |
d2876d08 | 4545 | |
3de69ae1 | 4546 | gpio++; |
d2876d08 DB |
4547 | } |
4548 | } | |
4549 | ||
f9c4a31f | 4550 | static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos) |
d2876d08 | 4551 | { |
362432ae | 4552 | unsigned long flags; |
ff2b1359 | 4553 | struct gpio_device *gdev = NULL; |
cb1650d4 | 4554 | loff_t index = *pos; |
d2876d08 | 4555 | |
f9c4a31f | 4556 | s->private = ""; |
d2876d08 | 4557 | |
362432ae | 4558 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 4559 | list_for_each_entry(gdev, &gpio_devices, list) |
362432ae GL |
4560 | if (index-- == 0) { |
4561 | spin_unlock_irqrestore(&gpio_lock, flags); | |
ff2b1359 | 4562 | return gdev; |
f9c4a31f | 4563 | } |
362432ae | 4564 | spin_unlock_irqrestore(&gpio_lock, flags); |
f9c4a31f | 4565 | |
cb1650d4 | 4566 | return NULL; |
f9c4a31f TR |
4567 | } |
4568 | ||
4569 | static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos) | |
4570 | { | |
362432ae | 4571 | unsigned long flags; |
ff2b1359 | 4572 | struct gpio_device *gdev = v; |
f9c4a31f TR |
4573 | void *ret = NULL; |
4574 | ||
362432ae | 4575 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 4576 | if (list_is_last(&gdev->list, &gpio_devices)) |
cb1650d4 AC |
4577 | ret = NULL; |
4578 | else | |
243cfa6a | 4579 | ret = list_first_entry(&gdev->list, struct gpio_device, list); |
362432ae | 4580 | spin_unlock_irqrestore(&gpio_lock, flags); |
f9c4a31f TR |
4581 | |
4582 | s->private = "\n"; | |
4583 | ++*pos; | |
4584 | ||
4585 | return ret; | |
4586 | } | |
4587 | ||
4588 | static void gpiolib_seq_stop(struct seq_file *s, void *v) | |
4589 | { | |
4590 | } | |
4591 | ||
4592 | static int gpiolib_seq_show(struct seq_file *s, void *v) | |
4593 | { | |
ff2b1359 | 4594 | struct gpio_device *gdev = v; |
a0b66a73 | 4595 | struct gpio_chip *gc = gdev->chip; |
ff2b1359 LW |
4596 | struct device *parent; |
4597 | ||
a0b66a73 | 4598 | if (!gc) { |
ff2b1359 LW |
4599 | seq_printf(s, "%s%s: (dangling chip)", (char *)s->private, |
4600 | dev_name(&gdev->dev)); | |
4601 | return 0; | |
4602 | } | |
f9c4a31f | 4603 | |
ff2b1359 LW |
4604 | seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private, |
4605 | dev_name(&gdev->dev), | |
fdeb8e15 | 4606 | gdev->base, gdev->base + gdev->ngpio - 1); |
a0b66a73 | 4607 | parent = gc->parent; |
ff2b1359 LW |
4608 | if (parent) |
4609 | seq_printf(s, ", parent: %s/%s", | |
4610 | parent->bus ? parent->bus->name : "no-bus", | |
4611 | dev_name(parent)); | |
a0b66a73 LW |
4612 | if (gc->label) |
4613 | seq_printf(s, ", %s", gc->label); | |
4614 | if (gc->can_sleep) | |
f9c4a31f TR |
4615 | seq_printf(s, ", can sleep"); |
4616 | seq_printf(s, ":\n"); | |
4617 | ||
a0b66a73 LW |
4618 | if (gc->dbg_show) |
4619 | gc->dbg_show(s, gc); | |
f9c4a31f | 4620 | else |
fdeb8e15 | 4621 | gpiolib_dbg_show(s, gdev); |
f9c4a31f | 4622 | |
d2876d08 DB |
4623 | return 0; |
4624 | } | |
4625 | ||
425c5b3e | 4626 | static const struct seq_operations gpiolib_sops = { |
f9c4a31f TR |
4627 | .start = gpiolib_seq_start, |
4628 | .next = gpiolib_seq_next, | |
4629 | .stop = gpiolib_seq_stop, | |
4630 | .show = gpiolib_seq_show, | |
4631 | }; | |
425c5b3e | 4632 | DEFINE_SEQ_ATTRIBUTE(gpiolib); |
d2876d08 DB |
4633 | |
4634 | static int __init gpiolib_debugfs_init(void) | |
4635 | { | |
4636 | /* /sys/kernel/debug/gpio */ | |
425c5b3e | 4637 | debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops); |
d2876d08 DB |
4638 | return 0; |
4639 | } | |
4640 | subsys_initcall(gpiolib_debugfs_init); | |
4641 | ||
4642 | #endif /* DEBUG_FS */ |