gpiolib: Introduce gpiod_set_config()
[linux-2.6-block.git] / drivers / gpio / gpiolib.c
CommitLineData
dae5f0af 1// SPDX-License-Identifier: GPL-2.0
923a654c 2#include <linux/bitmap.h>
d2876d08
DB
3#include <linux/kernel.h>
4#include <linux/module.h>
ff77c352 5#include <linux/interrupt.h>
d2876d08
DB
6#include <linux/irq.h>
7#include <linux/spinlock.h>
1a989d0f 8#include <linux/list.h>
d8f388d8
DB
9#include <linux/device.h>
10#include <linux/err.h>
11#include <linux/debugfs.h>
12#include <linux/seq_file.h>
13#include <linux/gpio.h>
ff77c352 14#include <linux/idr.h>
5a0e3ad6 15#include <linux/slab.h>
7b199811 16#include <linux/acpi.h>
53e7cac3 17#include <linux/gpio/driver.h>
0a6d3158 18#include <linux/gpio/machine.h>
c771c2f4 19#include <linux/pinctrl/consumer.h>
3c702e99
LW
20#include <linux/cdev.h>
21#include <linux/fs.h>
22#include <linux/uaccess.h>
8b92e17e 23#include <linux/compat.h>
d7c51b47 24#include <linux/anon_inodes.h>
953b956a 25#include <linux/file.h>
61f922db
LW
26#include <linux/kfifo.h>
27#include <linux/poll.h>
28#include <linux/timekeeping.h>
3c702e99 29#include <uapi/linux/gpio.h>
d2876d08 30
664e3e5a 31#include "gpiolib.h"
f626d6df 32#include "gpiolib-of.h"
77cb907a 33#include "gpiolib-acpi.h"
664e3e5a 34
3f397c21
UKK
35#define CREATE_TRACE_POINTS
36#include <trace/events/gpio.h>
d2876d08 37
79a9becd 38/* Implementation infrastructure for GPIO interfaces.
d2876d08 39 *
79a9becd
AC
40 * The GPIO programming interface allows for inlining speed-critical
41 * get/set operations for common cases, so that access to SOC-integrated
42 * GPIOs can sometimes cost only an instruction or two per bit.
d2876d08
DB
43 */
44
45
46/* When debugging, extend minimal trust to callers and platform code.
47 * Also emit diagnostic messages that may help initial bringup, when
48 * board setup or driver bugs are most common.
49 *
50 * Otherwise, minimize overhead in what may be bitbanging codepaths.
51 */
52#ifdef DEBUG
53#define extra_checks 1
54#else
55#define extra_checks 0
56#endif
57
ff2b1359
LW
58/* Device and char device-related information */
59static DEFINE_IDA(gpio_ida);
3c702e99
LW
60static dev_t gpio_devt;
61#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
62static struct bus_type gpio_bus_type = {
63 .name = "gpio",
64};
ff2b1359 65
3027743f
LA
66/*
67 * Number of GPIOs to use for the fast path in set array
68 */
69#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
70
d2876d08
DB
71/* gpio_lock prevents conflicts during gpio_desc[] table updates.
72 * While any GPIO is requested, its gpio_chip is not removable;
73 * each GPIO's "requested" flag serves as a lock and refcount.
74 */
0eb4c6c2 75DEFINE_SPINLOCK(gpio_lock);
d2876d08 76
bae48da2
AC
77static DEFINE_MUTEX(gpio_lookup_lock);
78static LIST_HEAD(gpio_lookup_list);
ff2b1359 79LIST_HEAD(gpio_devices);
6d86750c 80
a411e81e
BG
81static DEFINE_MUTEX(gpio_machine_hogs_mutex);
82static LIST_HEAD(gpio_machine_hogs);
83
6d86750c 84static void gpiochip_free_hogs(struct gpio_chip *chip);
959bc7b2 85static int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
86 struct lock_class_key *lock_key,
87 struct lock_class_key *request_key);
6d86750c 88static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip);
9411e3aa 89static int gpiochip_irqchip_init_hw(struct gpio_chip *gpiochip);
79b804cb
MW
90static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip);
91static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip);
6d86750c 92
159f3cd9 93static bool gpiolib_initialized;
6d86750c 94
d2876d08
DB
95static inline void desc_set_label(struct gpio_desc *d, const char *label)
96{
d2876d08 97 d->label = label;
d2876d08
DB
98}
99
372e722e 100/**
950d55f5
TR
101 * gpio_to_desc - Convert a GPIO number to its descriptor
102 * @gpio: global GPIO number
103 *
104 * Returns:
105 * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
106 * with the given number exists in the system.
372e722e 107 */
79a9becd 108struct gpio_desc *gpio_to_desc(unsigned gpio)
372e722e 109{
ff2b1359 110 struct gpio_device *gdev;
14e85c0e
AC
111 unsigned long flags;
112
113 spin_lock_irqsave(&gpio_lock, flags);
114
ff2b1359 115 list_for_each_entry(gdev, &gpio_devices, list) {
fdeb8e15
LW
116 if (gdev->base <= gpio &&
117 gdev->base + gdev->ngpio > gpio) {
14e85c0e 118 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 119 return &gdev->descs[gpio - gdev->base];
14e85c0e
AC
120 }
121 }
122
123 spin_unlock_irqrestore(&gpio_lock, flags);
124
0e9a5edf
AC
125 if (!gpio_is_valid(gpio))
126 WARN(1, "invalid GPIO %d\n", gpio);
127
14e85c0e 128 return NULL;
372e722e 129}
79a9becd 130EXPORT_SYMBOL_GPL(gpio_to_desc);
372e722e 131
d468bf9e 132/**
950d55f5
TR
133 * gpiochip_get_desc - get the GPIO descriptor corresponding to the given
134 * hardware number for this chip
135 * @chip: GPIO chip
136 * @hwnum: hardware number of the GPIO for this chip
137 *
138 * Returns:
35c6cfb4 139 * A pointer to the GPIO descriptor or ``ERR_PTR(-EINVAL)`` if no GPIO exists
950d55f5 140 * in the given chip for the specified hardware number.
d468bf9e 141 */
bb1e88cc 142struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip,
06863620 143 unsigned int hwnum)
d468bf9e 144{
fdeb8e15
LW
145 struct gpio_device *gdev = chip->gpiodev;
146
147 if (hwnum >= gdev->ngpio)
b7d0a28a 148 return ERR_PTR(-EINVAL);
d468bf9e 149
fdeb8e15 150 return &gdev->descs[hwnum];
d468bf9e 151}
372e722e
AC
152
153/**
950d55f5
TR
154 * desc_to_gpio - convert a GPIO descriptor to the integer namespace
155 * @desc: GPIO descriptor
156 *
372e722e 157 * This should disappear in the future but is needed since we still
950d55f5
TR
158 * use GPIO numbers for error messages and sysfs nodes.
159 *
160 * Returns:
161 * The global GPIO number for the GPIO specified by its descriptor.
372e722e 162 */
79a9becd 163int desc_to_gpio(const struct gpio_desc *desc)
372e722e 164{
fdeb8e15 165 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
372e722e 166}
79a9becd 167EXPORT_SYMBOL_GPL(desc_to_gpio);
372e722e
AC
168
169
79a9becd
AC
170/**
171 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
172 * @desc: descriptor to return the chip of
173 */
174struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
372e722e 175{
dd3b9a44 176 if (!desc || !desc->gdev)
fdeb8e15
LW
177 return NULL;
178 return desc->gdev->chip;
372e722e 179}
79a9becd 180EXPORT_SYMBOL_GPL(gpiod_to_chip);
d2876d08 181
8d0aab2f
AV
182/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
183static int gpiochip_find_base(int ngpio)
184{
ff2b1359 185 struct gpio_device *gdev;
83cabe33 186 int base = ARCH_NR_GPIOS - ngpio;
8d0aab2f 187
ff2b1359 188 list_for_each_entry_reverse(gdev, &gpio_devices, list) {
83cabe33 189 /* found a free space? */
fdeb8e15 190 if (gdev->base + gdev->ngpio <= base)
83cabe33
AC
191 break;
192 else
193 /* nope, check the space right before the chip */
fdeb8e15 194 base = gdev->base - ngpio;
8d0aab2f
AV
195 }
196
83cabe33 197 if (gpio_is_valid(base)) {
8d0aab2f 198 pr_debug("%s: found new base at %d\n", __func__, base);
83cabe33
AC
199 return base;
200 } else {
201 pr_err("%s: cannot find free range\n", __func__);
202 return -ENOSPC;
169b6a7a 203 }
169b6a7a
AV
204}
205
79a9becd
AC
206/**
207 * gpiod_get_direction - return the current direction of a GPIO
208 * @desc: GPIO to get the direction of
209 *
94fc7309 210 * Returns 0 for output, 1 for input, or an error code in case of error.
79a9becd
AC
211 *
212 * This function may sleep if gpiod_cansleep() is true.
213 */
8e53b0f1 214int gpiod_get_direction(struct gpio_desc *desc)
80b0a602 215{
d0121b85
WS
216 struct gpio_chip *chip;
217 unsigned offset;
d377f56f 218 int ret;
80b0a602 219
372e722e
AC
220 chip = gpiod_to_chip(desc);
221 offset = gpio_chip_hwgpio(desc);
80b0a602 222
256efaea
RK
223 /*
224 * Open drain emulation using input mode may incorrectly report
225 * input here, fix that up.
226 */
227 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) &&
228 test_bit(FLAG_IS_OUT, &desc->flags))
229 return 0;
230
80b0a602 231 if (!chip->get_direction)
d0121b85 232 return -ENOTSUPP;
80b0a602 233
d377f56f 234 ret = chip->get_direction(chip, offset);
4fc5bfeb
AS
235 if (ret < 0)
236 return ret;
237
238 /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */
239 if (ret > 0)
d377f56f 240 ret = 1;
4fc5bfeb
AS
241
242 assign_bit(FLAG_IS_OUT, &desc->flags, !ret);
243
d377f56f 244 return ret;
80b0a602 245}
79a9becd 246EXPORT_SYMBOL_GPL(gpiod_get_direction);
80b0a602 247
1a989d0f
AC
248/*
249 * Add a new chip to the global chips list, keeping the list of chips sorted
ef7c7553 250 * by range(means [base, base + ngpio - 1]) order.
1a989d0f
AC
251 *
252 * Return -EBUSY if the new chip overlaps with some other chip's integer
253 * space.
254 */
ff2b1359 255static int gpiodev_add_to_list(struct gpio_device *gdev)
1a989d0f 256{
a961f9b4 257 struct gpio_device *prev, *next;
1a989d0f 258
ff2b1359 259 if (list_empty(&gpio_devices)) {
a961f9b4 260 /* initial entry in list */
ff2b1359 261 list_add_tail(&gdev->list, &gpio_devices);
e28ecca6 262 return 0;
1a989d0f
AC
263 }
264
a961f9b4
BJZ
265 next = list_entry(gpio_devices.next, struct gpio_device, list);
266 if (gdev->base + gdev->ngpio <= next->base) {
267 /* add before first entry */
268 list_add(&gdev->list, &gpio_devices);
269 return 0;
1a989d0f
AC
270 }
271
a961f9b4
BJZ
272 prev = list_entry(gpio_devices.prev, struct gpio_device, list);
273 if (prev->base + prev->ngpio <= gdev->base) {
274 /* add behind last entry */
275 list_add_tail(&gdev->list, &gpio_devices);
96098df1 276 return 0;
1a989d0f
AC
277 }
278
a961f9b4
BJZ
279 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
280 /* at the end of the list */
281 if (&next->list == &gpio_devices)
282 break;
1a989d0f 283
a961f9b4
BJZ
284 /* add between prev and next */
285 if (prev->base + prev->ngpio <= gdev->base
286 && gdev->base + gdev->ngpio <= next->base) {
287 list_add(&gdev->list, &prev->list);
288 return 0;
289 }
290 }
291
292 dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n");
293 return -EBUSY;
1a989d0f
AC
294}
295
950d55f5 296/*
f881bab0
LW
297 * Convert a GPIO name to its descriptor
298 */
299static struct gpio_desc *gpio_name_to_desc(const char * const name)
300{
ff2b1359 301 struct gpio_device *gdev;
f881bab0
LW
302 unsigned long flags;
303
ee203bbd
MM
304 if (!name)
305 return NULL;
306
f881bab0
LW
307 spin_lock_irqsave(&gpio_lock, flags);
308
ff2b1359 309 list_for_each_entry(gdev, &gpio_devices, list) {
f881bab0
LW
310 int i;
311
fdeb8e15
LW
312 for (i = 0; i != gdev->ngpio; ++i) {
313 struct gpio_desc *desc = &gdev->descs[i];
f881bab0 314
ee203bbd 315 if (!desc->name)
f881bab0
LW
316 continue;
317
fdeb8e15 318 if (!strcmp(desc->name, name)) {
f881bab0 319 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 320 return desc;
f881bab0
LW
321 }
322 }
323 }
324
325 spin_unlock_irqrestore(&gpio_lock, flags);
326
327 return NULL;
328}
329
5f3ca732
MP
330/*
331 * Takes the names from gc->names and checks if they are all unique. If they
332 * are, they are assigned to their gpio descriptors.
333 *
ed37915c 334 * Warning if one of the names is already used for a different GPIO.
5f3ca732
MP
335 */
336static int gpiochip_set_desc_names(struct gpio_chip *gc)
337{
fdeb8e15 338 struct gpio_device *gdev = gc->gpiodev;
5f3ca732
MP
339 int i;
340
341 if (!gc->names)
342 return 0;
343
344 /* First check all names if they are unique */
345 for (i = 0; i != gc->ngpio; ++i) {
346 struct gpio_desc *gpio;
347
348 gpio = gpio_name_to_desc(gc->names[i]);
f881bab0 349 if (gpio)
fdeb8e15 350 dev_warn(&gdev->dev,
34ffd85d 351 "Detected name collision for GPIO name '%s'\n",
f881bab0 352 gc->names[i]);
5f3ca732
MP
353 }
354
355 /* Then add all names to the GPIO descriptors */
356 for (i = 0; i != gc->ngpio; ++i)
fdeb8e15 357 gdev->descs[i].name = gc->names[i];
5f3ca732
MP
358
359 return 0;
360}
361
e4371f6e
SB
362static unsigned long *gpiochip_allocate_mask(struct gpio_chip *chip)
363{
364 unsigned long *p;
365
7bdbd1ec 366 p = bitmap_alloc(chip->ngpio, GFP_KERNEL);
e4371f6e
SB
367 if (!p)
368 return NULL;
369
370 /* Assume by default all GPIOs are valid */
371 bitmap_fill(p, chip->ngpio);
372
373 return p;
374}
375
f626d6df 376static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
726cb3ba 377{
eb1e8bd6 378 if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask))
726cb3ba
SB
379 return 0;
380
f626d6df
LW
381 gc->valid_mask = gpiochip_allocate_mask(gc);
382 if (!gc->valid_mask)
726cb3ba
SB
383 return -ENOMEM;
384
385 return 0;
386}
387
c9fc5aff 388static int gpiochip_init_valid_mask(struct gpio_chip *gc)
f8ec92a9 389{
c9fc5aff
LW
390 if (gc->init_valid_mask)
391 return gc->init_valid_mask(gc,
392 gc->valid_mask,
393 gc->ngpio);
f8ec92a9
RRD
394
395 return 0;
396}
397
726cb3ba
SB
398static void gpiochip_free_valid_mask(struct gpio_chip *gpiochip)
399{
7bdbd1ec 400 bitmap_free(gpiochip->valid_mask);
726cb3ba
SB
401 gpiochip->valid_mask = NULL;
402}
403
b056ca1c
AS
404static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
405{
406 if (gc->add_pin_ranges)
407 return gc->add_pin_ranges(gc);
408
409 return 0;
410}
411
726cb3ba
SB
412bool gpiochip_line_is_valid(const struct gpio_chip *gpiochip,
413 unsigned int offset)
414{
415 /* No mask means all valid */
416 if (likely(!gpiochip->valid_mask))
417 return true;
418 return test_bit(offset, gpiochip->valid_mask);
419}
420EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
421
d7c51b47
LW
422/*
423 * GPIO line handle management
424 */
425
426/**
427 * struct linehandle_state - contains the state of a userspace handle
428 * @gdev: the GPIO device the handle pertains to
429 * @label: consumer label used to tag descriptors
430 * @descs: the GPIO descriptors held by this handle
431 * @numdescs: the number of descriptors held in the descs array
432 */
433struct linehandle_state {
434 struct gpio_device *gdev;
435 const char *label;
436 struct gpio_desc *descs[GPIOHANDLES_MAX];
437 u32 numdescs;
438};
439
e3e847c7
LPC
440#define GPIOHANDLE_REQUEST_VALID_FLAGS \
441 (GPIOHANDLE_REQUEST_INPUT | \
442 GPIOHANDLE_REQUEST_OUTPUT | \
443 GPIOHANDLE_REQUEST_ACTIVE_LOW | \
9225d516
DF
444 GPIOHANDLE_REQUEST_BIAS_PULL_UP | \
445 GPIOHANDLE_REQUEST_BIAS_PULL_DOWN | \
2148ad77 446 GPIOHANDLE_REQUEST_BIAS_DISABLE | \
e3e847c7
LPC
447 GPIOHANDLE_REQUEST_OPEN_DRAIN | \
448 GPIOHANDLE_REQUEST_OPEN_SOURCE)
449
b043ed7e
KG
450static int linehandle_validate_flags(u32 flags)
451{
452 /* Return an error if an unknown flag is set */
453 if (flags & ~GPIOHANDLE_REQUEST_VALID_FLAGS)
454 return -EINVAL;
455
456 /*
457 * Do not allow both INPUT & OUTPUT flags to be set as they are
458 * contradictory.
459 */
460 if ((flags & GPIOHANDLE_REQUEST_INPUT) &&
461 (flags & GPIOHANDLE_REQUEST_OUTPUT))
462 return -EINVAL;
463
464 /*
465 * Do not allow OPEN_SOURCE & OPEN_DRAIN flags in a single request. If
466 * the hardware actually supports enabling both at the same time the
467 * electrical result would be disastrous.
468 */
469 if ((flags & GPIOHANDLE_REQUEST_OPEN_DRAIN) &&
470 (flags & GPIOHANDLE_REQUEST_OPEN_SOURCE))
471 return -EINVAL;
472
473 /* OPEN_DRAIN and OPEN_SOURCE flags only make sense for output mode. */
474 if (!(flags & GPIOHANDLE_REQUEST_OUTPUT) &&
475 ((flags & GPIOHANDLE_REQUEST_OPEN_DRAIN) ||
476 (flags & GPIOHANDLE_REQUEST_OPEN_SOURCE)))
477 return -EINVAL;
478
479 /* Bias flags only allowed for input or output mode. */
480 if (!((flags & GPIOHANDLE_REQUEST_INPUT) ||
481 (flags & GPIOHANDLE_REQUEST_OUTPUT)) &&
482 ((flags & GPIOHANDLE_REQUEST_BIAS_DISABLE) ||
483 (flags & GPIOHANDLE_REQUEST_BIAS_PULL_UP) ||
484 (flags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)))
485 return -EINVAL;
486
487 /* Only one bias flag can be set. */
488 if (((flags & GPIOHANDLE_REQUEST_BIAS_DISABLE) &&
489 (flags & (GPIOHANDLE_REQUEST_BIAS_PULL_DOWN |
490 GPIOHANDLE_REQUEST_BIAS_PULL_UP))) ||
491 ((flags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) &&
492 (flags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)))
493 return -EINVAL;
494
495 return 0;
496}
497
e588bb1e
KG
498static long linehandle_set_config(struct linehandle_state *lh,
499 void __user *ip)
500{
501 struct gpiohandle_config gcnf;
502 struct gpio_desc *desc;
503 int i, ret;
504 u32 lflags;
505 unsigned long *flagsp;
506
507 if (copy_from_user(&gcnf, ip, sizeof(gcnf)))
508 return -EFAULT;
509
510 lflags = gcnf.flags;
511 ret = linehandle_validate_flags(lflags);
512 if (ret)
513 return ret;
514
515 for (i = 0; i < lh->numdescs; i++) {
516 desc = lh->descs[i];
517 flagsp = &desc->flags;
518
4fc5bfeb 519 assign_bit(FLAG_ACTIVE_LOW, flagsp,
e588bb1e
KG
520 lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW);
521
4fc5bfeb 522 assign_bit(FLAG_OPEN_DRAIN, flagsp,
e588bb1e
KG
523 lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN);
524
4fc5bfeb 525 assign_bit(FLAG_OPEN_SOURCE, flagsp,
e588bb1e
KG
526 lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE);
527
4fc5bfeb 528 assign_bit(FLAG_PULL_UP, flagsp,
e588bb1e
KG
529 lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP);
530
4fc5bfeb 531 assign_bit(FLAG_PULL_DOWN, flagsp,
e588bb1e
KG
532 lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN);
533
4fc5bfeb 534 assign_bit(FLAG_BIAS_DISABLE, flagsp,
e588bb1e
KG
535 lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE);
536
537 /*
538 * Lines have to be requested explicitly for input
539 * or output, else the line will be treated "as is".
540 */
541 if (lflags & GPIOHANDLE_REQUEST_OUTPUT) {
542 int val = !!gcnf.default_values[i];
543
544 ret = gpiod_direction_output(desc, val);
545 if (ret)
546 return ret;
547 } else if (lflags & GPIOHANDLE_REQUEST_INPUT) {
548 ret = gpiod_direction_input(desc);
549 if (ret)
550 return ret;
551 }
51c1064e
BG
552
553 atomic_notifier_call_chain(&desc->gdev->notifier,
554 GPIOLINE_CHANGED_CONFIG, desc);
e588bb1e
KG
555 }
556 return 0;
557}
558
d7c51b47
LW
559static long linehandle_ioctl(struct file *filep, unsigned int cmd,
560 unsigned long arg)
561{
562 struct linehandle_state *lh = filep->private_data;
563 void __user *ip = (void __user *)arg;
564 struct gpiohandle_data ghd;
b9762beb 565 DECLARE_BITMAP(vals, GPIOHANDLES_MAX);
d7c51b47
LW
566 int i;
567
568 if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) {
2b955b34 569 /* NOTE: It's ok to read values of output lines. */
eec1d566
LW
570 int ret = gpiod_get_array_value_complex(false,
571 true,
572 lh->numdescs,
573 lh->descs,
77588c14 574 NULL,
eec1d566
LW
575 vals);
576 if (ret)
577 return ret;
d7c51b47 578
3eded5d8 579 memset(&ghd, 0, sizeof(ghd));
eec1d566 580 for (i = 0; i < lh->numdescs; i++)
b9762beb 581 ghd.values[i] = test_bit(i, vals);
d7c51b47
LW
582
583 if (copy_to_user(ip, &ghd, sizeof(ghd)))
584 return -EFAULT;
585
586 return 0;
587 } else if (cmd == GPIOHANDLE_SET_LINE_VALUES_IOCTL) {
e5332d54
BG
588 /*
589 * All line descriptors were created at once with the same
590 * flags so just check if the first one is really output.
591 */
592 if (!test_bit(FLAG_IS_OUT, &lh->descs[0]->flags))
593 return -EPERM;
594
d7c51b47
LW
595 if (copy_from_user(&ghd, ip, sizeof(ghd)))
596 return -EFAULT;
597
598 /* Clamp all values to [0,1] */
599 for (i = 0; i < lh->numdescs; i++)
b9762beb 600 __assign_bit(i, vals, ghd.values[i]);
d7c51b47
LW
601
602 /* Reuse the array setting function */
3027743f 603 return gpiod_set_array_value_complex(false,
d7c51b47
LW
604 true,
605 lh->numdescs,
606 lh->descs,
77588c14 607 NULL,
d7c51b47 608 vals);
e588bb1e
KG
609 } else if (cmd == GPIOHANDLE_SET_CONFIG_IOCTL) {
610 return linehandle_set_config(lh, ip);
d7c51b47
LW
611 }
612 return -EINVAL;
613}
614
615#ifdef CONFIG_COMPAT
616static long linehandle_ioctl_compat(struct file *filep, unsigned int cmd,
617 unsigned long arg)
618{
619 return linehandle_ioctl(filep, cmd, (unsigned long)compat_ptr(arg));
620}
621#endif
622
623static int linehandle_release(struct inode *inode, struct file *filep)
624{
625 struct linehandle_state *lh = filep->private_data;
626 struct gpio_device *gdev = lh->gdev;
627 int i;
628
629 for (i = 0; i < lh->numdescs; i++)
630 gpiod_free(lh->descs[i]);
631 kfree(lh->label);
632 kfree(lh);
633 put_device(&gdev->dev);
634 return 0;
635}
636
637static const struct file_operations linehandle_fileops = {
638 .release = linehandle_release,
639 .owner = THIS_MODULE,
640 .llseek = noop_llseek,
641 .unlocked_ioctl = linehandle_ioctl,
642#ifdef CONFIG_COMPAT
643 .compat_ioctl = linehandle_ioctl_compat,
644#endif
645};
646
647static int linehandle_create(struct gpio_device *gdev, void __user *ip)
648{
649 struct gpiohandle_request handlereq;
650 struct linehandle_state *lh;
953b956a 651 struct file *file;
ab3dbcf7 652 int fd, i, count = 0, ret;
418ee8e9 653 u32 lflags;
d7c51b47
LW
654
655 if (copy_from_user(&handlereq, ip, sizeof(handlereq)))
656 return -EFAULT;
657 if ((handlereq.lines == 0) || (handlereq.lines > GPIOHANDLES_MAX))
658 return -EINVAL;
659
418ee8e9
BG
660 lflags = handlereq.flags;
661
b043ed7e
KG
662 ret = linehandle_validate_flags(lflags);
663 if (ret)
664 return ret;
2148ad77 665
d7c51b47
LW
666 lh = kzalloc(sizeof(*lh), GFP_KERNEL);
667 if (!lh)
668 return -ENOMEM;
669 lh->gdev = gdev;
670 get_device(&gdev->dev);
671
672 /* Make sure this is terminated */
673 handlereq.consumer_label[sizeof(handlereq.consumer_label)-1] = '\0';
674 if (strlen(handlereq.consumer_label)) {
675 lh->label = kstrdup(handlereq.consumer_label,
676 GFP_KERNEL);
677 if (!lh->label) {
678 ret = -ENOMEM;
679 goto out_free_lh;
680 }
681 }
682
683 /* Request each GPIO */
684 for (i = 0; i < handlereq.lines; i++) {
685 u32 offset = handlereq.lineoffsets[i];
0f41dabe 686 struct gpio_desc *desc = gpiochip_get_desc(gdev->chip, offset);
d7c51b47 687
0f41dabe
BG
688 if (IS_ERR(desc)) {
689 ret = PTR_ERR(desc);
e405f9fc
LPC
690 goto out_free_descs;
691 }
692
d7c51b47
LW
693 ret = gpiod_request(desc, lh->label);
694 if (ret)
695 goto out_free_descs;
696 lh->descs[i] = desc;
19a4fbff 697 count = i + 1;
d7c51b47
LW
698
699 if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW)
700 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
701 if (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN)
702 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
703 if (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE)
704 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
2148ad77
KG
705 if (lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE)
706 set_bit(FLAG_BIAS_DISABLE, &desc->flags);
9225d516
DF
707 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)
708 set_bit(FLAG_PULL_DOWN, &desc->flags);
709 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)
710 set_bit(FLAG_PULL_UP, &desc->flags);
d7c51b47 711
e10f72bf
AJ
712 ret = gpiod_set_transitory(desc, false);
713 if (ret < 0)
714 goto out_free_descs;
715
d7c51b47
LW
716 /*
717 * Lines have to be requested explicitly for input
718 * or output, else the line will be treated "as is".
719 */
720 if (lflags & GPIOHANDLE_REQUEST_OUTPUT) {
721 int val = !!handlereq.default_values[i];
722
723 ret = gpiod_direction_output(desc, val);
724 if (ret)
725 goto out_free_descs;
726 } else if (lflags & GPIOHANDLE_REQUEST_INPUT) {
727 ret = gpiod_direction_input(desc);
728 if (ret)
729 goto out_free_descs;
730 }
731 dev_dbg(&gdev->dev, "registered chardev handle for line %d\n",
732 offset);
733 }
e2f608be
LW
734 /* Let i point at the last handle */
735 i--;
d7c51b47
LW
736 lh->numdescs = handlereq.lines;
737
953b956a 738 fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);
d7c51b47
LW
739 if (fd < 0) {
740 ret = fd;
741 goto out_free_descs;
742 }
743
953b956a
LPC
744 file = anon_inode_getfile("gpio-linehandle",
745 &linehandle_fileops,
746 lh,
747 O_RDONLY | O_CLOEXEC);
748 if (IS_ERR(file)) {
749 ret = PTR_ERR(file);
750 goto out_put_unused_fd;
751 }
752
d7c51b47 753 handlereq.fd = fd;
d932cd49 754 if (copy_to_user(ip, &handlereq, sizeof(handlereq))) {
953b956a
LPC
755 /*
756 * fput() will trigger the release() callback, so do not go onto
757 * the regular error cleanup path here.
758 */
759 fput(file);
760 put_unused_fd(fd);
761 return -EFAULT;
d932cd49 762 }
d7c51b47 763
953b956a
LPC
764 fd_install(fd, file);
765
d7c51b47
LW
766 dev_dbg(&gdev->dev, "registered chardev handle for %d lines\n",
767 lh->numdescs);
768
769 return 0;
770
953b956a
LPC
771out_put_unused_fd:
772 put_unused_fd(fd);
d7c51b47 773out_free_descs:
ab3dbcf7 774 for (i = 0; i < count; i++)
d7c51b47
LW
775 gpiod_free(lh->descs[i]);
776 kfree(lh->label);
777out_free_lh:
778 kfree(lh);
779 put_device(&gdev->dev);
780 return ret;
781}
782
61f922db
LW
783/*
784 * GPIO line event management
785 */
786
787/**
788 * struct lineevent_state - contains the state of a userspace event
789 * @gdev: the GPIO device the event pertains to
790 * @label: consumer label used to tag descriptors
791 * @desc: the GPIO descriptor held by this event
792 * @eflags: the event flags this line was requested with
793 * @irq: the interrupt that trigger in response to events on this GPIO
794 * @wait: wait queue that handles blocking reads of events
795 * @events: KFIFO for the GPIO events
d58f2bf2
LW
796 * @timestamp: cache for the timestamp storing it between hardirq
797 * and IRQ thread, used to bring the timestamp close to the actual
798 * event
61f922db
LW
799 */
800struct lineevent_state {
801 struct gpio_device *gdev;
802 const char *label;
803 struct gpio_desc *desc;
804 u32 eflags;
805 int irq;
806 wait_queue_head_t wait;
807 DECLARE_KFIFO(events, struct gpioevent_data, 16);
d58f2bf2 808 u64 timestamp;
61f922db
LW
809};
810
ac7dbb99
LPC
811#define GPIOEVENT_REQUEST_VALID_FLAGS \
812 (GPIOEVENT_REQUEST_RISING_EDGE | \
813 GPIOEVENT_REQUEST_FALLING_EDGE)
814
afc9a42b 815static __poll_t lineevent_poll(struct file *filep,
61f922db
LW
816 struct poll_table_struct *wait)
817{
818 struct lineevent_state *le = filep->private_data;
afc9a42b 819 __poll_t events = 0;
61f922db
LW
820
821 poll_wait(filep, &le->wait, wait);
822
dea9c80e 823 if (!kfifo_is_empty_spinlocked_noirqsave(&le->events, &le->wait.lock))
a9a08845 824 events = EPOLLIN | EPOLLRDNORM;
61f922db
LW
825
826 return events;
827}
828
829
830static ssize_t lineevent_read(struct file *filep,
831 char __user *buf,
832 size_t count,
833 loff_t *f_ps)
834{
835 struct lineevent_state *le = filep->private_data;
df2cd589 836 struct gpioevent_data ge;
dea9c80e 837 ssize_t bytes_read = 0;
61f922db
LW
838 int ret;
839
df2cd589 840 if (count < sizeof(ge))
61f922db
LW
841 return -EINVAL;
842
843 do {
dea9c80e 844 spin_lock(&le->wait.lock);
61f922db 845 if (kfifo_is_empty(&le->events)) {
dea9c80e
BG
846 if (bytes_read) {
847 spin_unlock(&le->wait.lock);
848 return bytes_read;
849 }
850
851 if (filep->f_flags & O_NONBLOCK) {
852 spin_unlock(&le->wait.lock);
61f922db 853 return -EAGAIN;
dea9c80e 854 }
61f922db 855
dea9c80e 856 ret = wait_event_interruptible_locked(le->wait,
61f922db 857 !kfifo_is_empty(&le->events));
dea9c80e
BG
858 if (ret) {
859 spin_unlock(&le->wait.lock);
61f922db 860 return ret;
dea9c80e 861 }
61f922db
LW
862 }
863
df2cd589 864 ret = kfifo_out(&le->events, &ge, 1);
dea9c80e
BG
865 spin_unlock(&le->wait.lock);
866 if (ret != 1) {
867 /*
868 * This should never happen - we were holding the lock
869 * from the moment we learned the fifo is no longer
870 * empty until now.
871 */
872 ret = -EIO;
873 break;
874 }
61f922db 875
df2cd589 876 if (copy_to_user(buf + bytes_read, &ge, sizeof(ge)))
dea9c80e 877 return -EFAULT;
df2cd589
AS
878 bytes_read += sizeof(ge);
879 } while (count >= bytes_read + sizeof(ge));
61f922db 880
dea9c80e 881 return bytes_read;
61f922db
LW
882}
883
884static int lineevent_release(struct inode *inode, struct file *filep)
885{
886 struct lineevent_state *le = filep->private_data;
887 struct gpio_device *gdev = le->gdev;
888
889 free_irq(le->irq, le);
890 gpiod_free(le->desc);
891 kfree(le->label);
892 kfree(le);
893 put_device(&gdev->dev);
894 return 0;
895}
896
897static long lineevent_ioctl(struct file *filep, unsigned int cmd,
898 unsigned long arg)
899{
900 struct lineevent_state *le = filep->private_data;
901 void __user *ip = (void __user *)arg;
902 struct gpiohandle_data ghd;
903
904 /*
905 * We can get the value for an event line but not set it,
906 * because it is input by definition.
907 */
908 if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) {
909 int val;
910
d82aa4a8
LPC
911 memset(&ghd, 0, sizeof(ghd));
912
61f922db
LW
913 val = gpiod_get_value_cansleep(le->desc);
914 if (val < 0)
915 return val;
916 ghd.values[0] = val;
917
918 if (copy_to_user(ip, &ghd, sizeof(ghd)))
919 return -EFAULT;
920
921 return 0;
922 }
923 return -EINVAL;
924}
925
926#ifdef CONFIG_COMPAT
927static long lineevent_ioctl_compat(struct file *filep, unsigned int cmd,
928 unsigned long arg)
929{
930 return lineevent_ioctl(filep, cmd, (unsigned long)compat_ptr(arg));
931}
932#endif
933
934static const struct file_operations lineevent_fileops = {
935 .release = lineevent_release,
936 .read = lineevent_read,
937 .poll = lineevent_poll,
938 .owner = THIS_MODULE,
939 .llseek = noop_llseek,
940 .unlocked_ioctl = lineevent_ioctl,
941#ifdef CONFIG_COMPAT
942 .compat_ioctl = lineevent_ioctl_compat,
943#endif
944};
945
33265b17 946static irqreturn_t lineevent_irq_thread(int irq, void *p)
61f922db
LW
947{
948 struct lineevent_state *le = p;
949 struct gpioevent_data ge;
fa38869b 950 int ret;
61f922db 951
24bd3efc
LW
952 /* Do not leak kernel stack to userspace */
953 memset(&ge, 0, sizeof(ge));
954
1033be58
BG
955 /*
956 * We may be running from a nested threaded interrupt in which case
957 * we didn't get the timestamp from lineevent_irq_handler().
958 */
959 if (!le->timestamp)
f8850206 960 ge.timestamp = ktime_get_ns();
1033be58
BG
961 else
962 ge.timestamp = le->timestamp;
61f922db 963
ad537b82
BG
964 if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE
965 && le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) {
fa38869b 966 int level = gpiod_get_value_cansleep(le->desc);
61f922db
LW
967 if (level)
968 /* Emit low-to-high event */
969 ge.id = GPIOEVENT_EVENT_RISING_EDGE;
970 else
971 /* Emit high-to-low event */
972 ge.id = GPIOEVENT_EVENT_FALLING_EDGE;
fa38869b 973 } else if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE) {
61f922db
LW
974 /* Emit low-to-high event */
975 ge.id = GPIOEVENT_EVENT_RISING_EDGE;
fa38869b 976 } else if (le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) {
61f922db
LW
977 /* Emit high-to-low event */
978 ge.id = GPIOEVENT_EVENT_FALLING_EDGE;
bc0207a5
AB
979 } else {
980 return IRQ_NONE;
61f922db
LW
981 }
982
dea9c80e
BG
983 ret = kfifo_in_spinlocked_noirqsave(&le->events, &ge,
984 1, &le->wait.lock);
2efc6bfa 985 if (ret)
a9a08845 986 wake_up_poll(&le->wait, EPOLLIN);
248ae175
BG
987 else
988 pr_debug_ratelimited("event FIFO is full - event dropped\n");
61f922db
LW
989
990 return IRQ_HANDLED;
991}
992
d58f2bf2
LW
993static irqreturn_t lineevent_irq_handler(int irq, void *p)
994{
995 struct lineevent_state *le = p;
996
997 /*
998 * Just store the timestamp in hardirq context so we get it as
999 * close in time as possible to the actual event.
1000 */
f8850206 1001 le->timestamp = ktime_get_ns();
d58f2bf2
LW
1002
1003 return IRQ_WAKE_THREAD;
1004}
1005
61f922db
LW
1006static int lineevent_create(struct gpio_device *gdev, void __user *ip)
1007{
1008 struct gpioevent_request eventreq;
1009 struct lineevent_state *le;
1010 struct gpio_desc *desc;
953b956a 1011 struct file *file;
61f922db
LW
1012 u32 offset;
1013 u32 lflags;
1014 u32 eflags;
1015 int fd;
1016 int ret;
1017 int irqflags = 0;
1018
1019 if (copy_from_user(&eventreq, ip, sizeof(eventreq)))
1020 return -EFAULT;
1021
bcc6d99a
BG
1022 offset = eventreq.lineoffset;
1023 lflags = eventreq.handleflags;
1024 eflags = eventreq.eventflags;
1025
45e23604
BG
1026 desc = gpiochip_get_desc(gdev->chip, offset);
1027 if (IS_ERR(desc))
1028 return PTR_ERR(desc);
bcc6d99a
BG
1029
1030 /* Return an error if a unknown flag is set */
1031 if ((lflags & ~GPIOHANDLE_REQUEST_VALID_FLAGS) ||
1032 (eflags & ~GPIOEVENT_REQUEST_VALID_FLAGS))
1033 return -EINVAL;
1034
1035 /* This is just wrong: we don't look for events on output lines */
1036 if ((lflags & GPIOHANDLE_REQUEST_OUTPUT) ||
1037 (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN) ||
1038 (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE))
1039 return -EINVAL;
1040
2148ad77
KG
1041 /* Only one bias flag can be set. */
1042 if (((lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE) &&
1043 (lflags & (GPIOHANDLE_REQUEST_BIAS_PULL_DOWN |
1044 GPIOHANDLE_REQUEST_BIAS_PULL_UP))) ||
1045 ((lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) &&
1046 (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)))
1047 return -EINVAL;
1048
61f922db
LW
1049 le = kzalloc(sizeof(*le), GFP_KERNEL);
1050 if (!le)
1051 return -ENOMEM;
1052 le->gdev = gdev;
1053 get_device(&gdev->dev);
1054
1055 /* Make sure this is terminated */
1056 eventreq.consumer_label[sizeof(eventreq.consumer_label)-1] = '\0';
1057 if (strlen(eventreq.consumer_label)) {
1058 le->label = kstrdup(eventreq.consumer_label,
1059 GFP_KERNEL);
1060 if (!le->label) {
1061 ret = -ENOMEM;
1062 goto out_free_le;
1063 }
1064 }
1065
61f922db
LW
1066 ret = gpiod_request(desc, le->label);
1067 if (ret)
f001cc35 1068 goto out_free_label;
61f922db
LW
1069 le->desc = desc;
1070 le->eflags = eflags;
1071
1072 if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW)
1073 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
2148ad77
KG
1074 if (lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE)
1075 set_bit(FLAG_BIAS_DISABLE, &desc->flags);
7b479a84
KG
1076 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)
1077 set_bit(FLAG_PULL_DOWN, &desc->flags);
1078 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)
1079 set_bit(FLAG_PULL_UP, &desc->flags);
61f922db
LW
1080
1081 ret = gpiod_direction_input(desc);
1082 if (ret)
1083 goto out_free_desc;
1084
1085 le->irq = gpiod_to_irq(desc);
1086 if (le->irq <= 0) {
1087 ret = -ENODEV;
1088 goto out_free_desc;
1089 }
1090
1091 if (eflags & GPIOEVENT_REQUEST_RISING_EDGE)
223ecaf1
MW
1092 irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
1093 IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING;
61f922db 1094 if (eflags & GPIOEVENT_REQUEST_FALLING_EDGE)
223ecaf1
MW
1095 irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
1096 IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING;
61f922db 1097 irqflags |= IRQF_ONESHOT;
61f922db
LW
1098
1099 INIT_KFIFO(le->events);
1100 init_waitqueue_head(&le->wait);
61f922db
LW
1101
1102 /* Request a thread to read the events */
1103 ret = request_threaded_irq(le->irq,
d58f2bf2 1104 lineevent_irq_handler,
61f922db
LW
1105 lineevent_irq_thread,
1106 irqflags,
1107 le->label,
1108 le);
1109 if (ret)
1110 goto out_free_desc;
1111
953b956a 1112 fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);
61f922db
LW
1113 if (fd < 0) {
1114 ret = fd;
1115 goto out_free_irq;
1116 }
1117
953b956a
LPC
1118 file = anon_inode_getfile("gpio-event",
1119 &lineevent_fileops,
1120 le,
1121 O_RDONLY | O_CLOEXEC);
1122 if (IS_ERR(file)) {
1123 ret = PTR_ERR(file);
1124 goto out_put_unused_fd;
1125 }
1126
61f922db 1127 eventreq.fd = fd;
d932cd49 1128 if (copy_to_user(ip, &eventreq, sizeof(eventreq))) {
953b956a
LPC
1129 /*
1130 * fput() will trigger the release() callback, so do not go onto
1131 * the regular error cleanup path here.
1132 */
1133 fput(file);
1134 put_unused_fd(fd);
1135 return -EFAULT;
d932cd49 1136 }
61f922db 1137
953b956a
LPC
1138 fd_install(fd, file);
1139
61f922db
LW
1140 return 0;
1141
953b956a
LPC
1142out_put_unused_fd:
1143 put_unused_fd(fd);
61f922db
LW
1144out_free_irq:
1145 free_irq(le->irq, le);
1146out_free_desc:
1147 gpiod_free(le->desc);
1148out_free_label:
1149 kfree(le->label);
1150out_free_le:
1151 kfree(le);
1152 put_device(&gdev->dev);
1153 return ret;
1154}
1155
d2ac2579
BG
1156static void gpio_desc_to_lineinfo(struct gpio_desc *desc,
1157 struct gpioline_info *info)
1158{
1159 struct gpio_chip *chip = desc->gdev->chip;
1160 unsigned long flags;
1161
1162 spin_lock_irqsave(&gpio_lock, flags);
1163
1164 if (desc->name) {
1165 strncpy(info->name, desc->name, sizeof(info->name));
1166 info->name[sizeof(info->name) - 1] = '\0';
1167 } else {
1168 info->name[0] = '\0';
1169 }
1170
1171 if (desc->label) {
1172 strncpy(info->consumer, desc->label, sizeof(info->consumer));
1173 info->consumer[sizeof(info->consumer) - 1] = '\0';
1174 } else {
1175 info->consumer[0] = '\0';
1176 }
1177
1178 /*
1179 * Userspace only need to know that the kernel is using this GPIO so
1180 * it can't use it.
1181 */
1182 info->flags = 0;
1183 if (test_bit(FLAG_REQUESTED, &desc->flags) ||
1184 test_bit(FLAG_IS_HOGGED, &desc->flags) ||
1185 test_bit(FLAG_USED_AS_IRQ, &desc->flags) ||
1186 test_bit(FLAG_EXPORT, &desc->flags) ||
1187 test_bit(FLAG_SYSFS, &desc->flags) ||
1188 !pinctrl_gpio_can_use_line(chip->base + info->line_offset))
1189 info->flags |= GPIOLINE_FLAG_KERNEL;
1190 if (test_bit(FLAG_IS_OUT, &desc->flags))
1191 info->flags |= GPIOLINE_FLAG_IS_OUT;
1192 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
1193 info->flags |= GPIOLINE_FLAG_ACTIVE_LOW;
1194 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
1195 info->flags |= (GPIOLINE_FLAG_OPEN_DRAIN |
1196 GPIOLINE_FLAG_IS_OUT);
1197 if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
1198 info->flags |= (GPIOLINE_FLAG_OPEN_SOURCE |
1199 GPIOLINE_FLAG_IS_OUT);
1200 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
1201 info->flags |= GPIOLINE_FLAG_BIAS_DISABLE;
1202 if (test_bit(FLAG_PULL_DOWN, &desc->flags))
1203 info->flags |= GPIOLINE_FLAG_BIAS_PULL_DOWN;
1204 if (test_bit(FLAG_PULL_UP, &desc->flags))
1205 info->flags |= GPIOLINE_FLAG_BIAS_PULL_UP;
1206
1207 spin_unlock_irqrestore(&gpio_lock, flags);
1208}
1209
51c1064e
BG
1210struct gpio_chardev_data {
1211 struct gpio_device *gdev;
1212 wait_queue_head_t wait;
1213 DECLARE_KFIFO(events, struct gpioline_info_changed, 32);
1214 struct notifier_block lineinfo_changed_nb;
1215 unsigned long *watched_lines;
1216};
1217
950d55f5 1218/*
3c702e99
LW
1219 * gpio_ioctl() - ioctl handler for the GPIO chardev
1220 */
1221static long gpio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
1222{
51c1064e
BG
1223 struct gpio_chardev_data *priv = filp->private_data;
1224 struct gpio_device *gdev = priv->gdev;
3c702e99 1225 struct gpio_chip *chip = gdev->chip;
8b92e17e 1226 void __user *ip = (void __user *)arg;
51c1064e
BG
1227 struct gpio_desc *desc;
1228 __u32 offset;
3c702e99
LW
1229
1230 /* We fail any subsequent ioctl():s when the chip is gone */
1231 if (!chip)
1232 return -ENODEV;
1233
521a2ad6 1234 /* Fill in the struct and pass to userspace */
3c702e99 1235 if (cmd == GPIO_GET_CHIPINFO_IOCTL) {
521a2ad6
LW
1236 struct gpiochip_info chipinfo;
1237
0f4bbb23
LPC
1238 memset(&chipinfo, 0, sizeof(chipinfo));
1239
3c702e99
LW
1240 strncpy(chipinfo.name, dev_name(&gdev->dev),
1241 sizeof(chipinfo.name));
1242 chipinfo.name[sizeof(chipinfo.name)-1] = '\0';
df4878e9
LW
1243 strncpy(chipinfo.label, gdev->label,
1244 sizeof(chipinfo.label));
1245 chipinfo.label[sizeof(chipinfo.label)-1] = '\0';
fdeb8e15 1246 chipinfo.lines = gdev->ngpio;
3c702e99
LW
1247 if (copy_to_user(ip, &chipinfo, sizeof(chipinfo)))
1248 return -EFAULT;
1249 return 0;
51c1064e
BG
1250 } else if (cmd == GPIO_GET_LINEINFO_IOCTL ||
1251 cmd == GPIO_GET_LINEINFO_WATCH_IOCTL) {
521a2ad6 1252 struct gpioline_info lineinfo;
521a2ad6
LW
1253
1254 if (copy_from_user(&lineinfo, ip, sizeof(lineinfo)))
1255 return -EFAULT;
521a2ad6 1256
2a2cabd8
BG
1257 desc = gpiochip_get_desc(chip, lineinfo.line_offset);
1258 if (IS_ERR(desc))
1259 return PTR_ERR(desc);
1260
d2ac2579 1261 gpio_desc_to_lineinfo(desc, &lineinfo);
521a2ad6
LW
1262
1263 if (copy_to_user(ip, &lineinfo, sizeof(lineinfo)))
1264 return -EFAULT;
51c1064e
BG
1265
1266 if (cmd == GPIO_GET_LINEINFO_WATCH_IOCTL)
19314797 1267 set_bit(gpio_chip_hwgpio(desc), priv->watched_lines);
51c1064e 1268
521a2ad6 1269 return 0;
d7c51b47
LW
1270 } else if (cmd == GPIO_GET_LINEHANDLE_IOCTL) {
1271 return linehandle_create(gdev, ip);
61f922db
LW
1272 } else if (cmd == GPIO_GET_LINEEVENT_IOCTL) {
1273 return lineevent_create(gdev, ip);
51c1064e
BG
1274 } else if (cmd == GPIO_GET_LINEINFO_UNWATCH_IOCTL) {
1275 if (copy_from_user(&offset, ip, sizeof(offset)))
1276 return -EFAULT;
1277
1278 desc = gpiochip_get_desc(chip, offset);
1279 if (IS_ERR(desc))
1280 return PTR_ERR(desc);
1281
19314797 1282 clear_bit(gpio_chip_hwgpio(desc), priv->watched_lines);
51c1064e 1283 return 0;
3c702e99
LW
1284 }
1285 return -EINVAL;
1286}
1287
8b92e17e
LW
1288#ifdef CONFIG_COMPAT
1289static long gpio_ioctl_compat(struct file *filp, unsigned int cmd,
1290 unsigned long arg)
1291{
1292 return gpio_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
1293}
1294#endif
1295
51c1064e
BG
1296static struct gpio_chardev_data *
1297to_gpio_chardev_data(struct notifier_block *nb)
1298{
1299 return container_of(nb, struct gpio_chardev_data, lineinfo_changed_nb);
1300}
1301
1302static int lineinfo_changed_notify(struct notifier_block *nb,
1303 unsigned long action, void *data)
1304{
1305 struct gpio_chardev_data *priv = to_gpio_chardev_data(nb);
1306 struct gpioline_info_changed chg;
1307 struct gpio_desc *desc = data;
1308 int ret;
1309
19314797 1310 if (!test_bit(gpio_chip_hwgpio(desc), priv->watched_lines))
51c1064e
BG
1311 return NOTIFY_DONE;
1312
1313 memset(&chg, 0, sizeof(chg));
1314 chg.info.line_offset = gpio_chip_hwgpio(desc);
1315 chg.event_type = action;
1316 chg.timestamp = ktime_get_ns();
1317 gpio_desc_to_lineinfo(desc, &chg.info);
1318
1319 ret = kfifo_in_spinlocked(&priv->events, &chg, 1, &priv->wait.lock);
1320 if (ret)
1321 wake_up_poll(&priv->wait, EPOLLIN);
1322 else
1323 pr_debug_ratelimited("lineinfo event FIFO is full - event dropped\n");
1324
1325 return NOTIFY_OK;
1326}
1327
1328static __poll_t lineinfo_watch_poll(struct file *filep,
1329 struct poll_table_struct *pollt)
1330{
1331 struct gpio_chardev_data *priv = filep->private_data;
1332 __poll_t events = 0;
1333
1334 poll_wait(filep, &priv->wait, pollt);
1335
1336 if (!kfifo_is_empty_spinlocked_noirqsave(&priv->events,
1337 &priv->wait.lock))
1338 events = EPOLLIN | EPOLLRDNORM;
1339
1340 return events;
1341}
1342
1343static ssize_t lineinfo_watch_read(struct file *filep, char __user *buf,
1344 size_t count, loff_t *off)
1345{
1346 struct gpio_chardev_data *priv = filep->private_data;
1347 struct gpioline_info_changed event;
1348 ssize_t bytes_read = 0;
1349 int ret;
1350
1351 if (count < sizeof(event))
1352 return -EINVAL;
1353
1354 do {
1355 spin_lock(&priv->wait.lock);
1356 if (kfifo_is_empty(&priv->events)) {
1357 if (bytes_read) {
1358 spin_unlock(&priv->wait.lock);
1359 return bytes_read;
1360 }
1361
1362 if (filep->f_flags & O_NONBLOCK) {
1363 spin_unlock(&priv->wait.lock);
1364 return -EAGAIN;
1365 }
1366
1367 ret = wait_event_interruptible_locked(priv->wait,
1368 !kfifo_is_empty(&priv->events));
1369 if (ret) {
1370 spin_unlock(&priv->wait.lock);
1371 return ret;
1372 }
1373 }
1374
1375 ret = kfifo_out(&priv->events, &event, 1);
1376 spin_unlock(&priv->wait.lock);
1377 if (ret != 1) {
1378 ret = -EIO;
1379 break;
1380 /* We should never get here. See lineevent_read(). */
1381 }
1382
1383 if (copy_to_user(buf + bytes_read, &event, sizeof(event)))
1384 return -EFAULT;
1385 bytes_read += sizeof(event);
1386 } while (count >= bytes_read + sizeof(event));
1387
1388 return bytes_read;
1389}
1390
3c702e99
LW
1391/**
1392 * gpio_chrdev_open() - open the chardev for ioctl operations
1393 * @inode: inode for this chardev
1394 * @filp: file struct for storing private data
1395 * Returns 0 on success
1396 */
1397static int gpio_chrdev_open(struct inode *inode, struct file *filp)
1398{
1399 struct gpio_device *gdev = container_of(inode->i_cdev,
1400 struct gpio_device, chrdev);
51c1064e
BG
1401 struct gpio_chardev_data *priv;
1402 int ret = -ENOMEM;
3c702e99
LW
1403
1404 /* Fail on open if the backing gpiochip is gone */
fb505747 1405 if (!gdev->chip)
3c702e99 1406 return -ENODEV;
51c1064e
BG
1407
1408 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1409 if (!priv)
1410 return -ENOMEM;
1411
1412 priv->watched_lines = bitmap_zalloc(gdev->chip->ngpio, GFP_KERNEL);
1413 if (!priv->watched_lines)
1414 goto out_free_priv;
1415
1416 init_waitqueue_head(&priv->wait);
1417 INIT_KFIFO(priv->events);
1418 priv->gdev = gdev;
1419
1420 priv->lineinfo_changed_nb.notifier_call = lineinfo_changed_notify;
1421 ret = atomic_notifier_chain_register(&gdev->notifier,
1422 &priv->lineinfo_changed_nb);
1423 if (ret)
1424 goto out_free_bitmap;
1425
3c702e99 1426 get_device(&gdev->dev);
51c1064e 1427 filp->private_data = priv;
f4e81c52 1428
51c1064e
BG
1429 ret = nonseekable_open(inode, filp);
1430 if (ret)
1431 goto out_unregister_notifier;
1432
1433 return ret;
1434
1435out_unregister_notifier:
1436 atomic_notifier_chain_unregister(&gdev->notifier,
1437 &priv->lineinfo_changed_nb);
1438out_free_bitmap:
1439 bitmap_free(priv->watched_lines);
1440out_free_priv:
1441 kfree(priv);
1442 return ret;
3c702e99
LW
1443}
1444
1445/**
1446 * gpio_chrdev_release() - close chardev after ioctl operations
1447 * @inode: inode for this chardev
1448 * @filp: file struct for storing private data
1449 * Returns 0 on success
1450 */
1451static int gpio_chrdev_release(struct inode *inode, struct file *filp)
1452{
51c1064e
BG
1453 struct gpio_chardev_data *priv = filp->private_data;
1454 struct gpio_device *gdev = priv->gdev;
3c702e99 1455
51c1064e
BG
1456 bitmap_free(priv->watched_lines);
1457 atomic_notifier_chain_unregister(&gdev->notifier,
1458 &priv->lineinfo_changed_nb);
3c702e99 1459 put_device(&gdev->dev);
51c1064e
BG
1460 kfree(priv);
1461
3c702e99
LW
1462 return 0;
1463}
1464
3c702e99
LW
1465static const struct file_operations gpio_fileops = {
1466 .release = gpio_chrdev_release,
1467 .open = gpio_chrdev_open,
51c1064e
BG
1468 .poll = lineinfo_watch_poll,
1469 .read = lineinfo_watch_read,
3c702e99 1470 .owner = THIS_MODULE,
f4e81c52 1471 .llseek = no_llseek,
3c702e99 1472 .unlocked_ioctl = gpio_ioctl,
8b92e17e
LW
1473#ifdef CONFIG_COMPAT
1474 .compat_ioctl = gpio_ioctl_compat,
1475#endif
3c702e99
LW
1476};
1477
ff2b1359
LW
1478static void gpiodevice_release(struct device *dev)
1479{
1480 struct gpio_device *gdev = dev_get_drvdata(dev);
1481
1482 list_del(&gdev->list);
1483 ida_simple_remove(&gpio_ida, gdev->id);
fcf273e5 1484 kfree_const(gdev->label);
476e2fc5 1485 kfree(gdev->descs);
9efd9e69 1486 kfree(gdev);
ff2b1359
LW
1487}
1488
159f3cd9
GR
1489static int gpiochip_setup_dev(struct gpio_device *gdev)
1490{
d377f56f 1491 int ret;
159f3cd9
GR
1492
1493 cdev_init(&gdev->chrdev, &gpio_fileops);
1494 gdev->chrdev.owner = THIS_MODULE;
159f3cd9 1495 gdev->dev.devt = MKDEV(MAJOR(gpio_devt), gdev->id);
111379dc 1496
d377f56f
LW
1497 ret = cdev_device_add(&gdev->chrdev, &gdev->dev);
1498 if (ret)
1499 return ret;
111379dc
LG
1500
1501 chip_dbg(gdev->chip, "added GPIO chardev (%d:%d)\n",
1502 MAJOR(gpio_devt), gdev->id);
159f3cd9 1503
d377f56f
LW
1504 ret = gpiochip_sysfs_register(gdev);
1505 if (ret)
159f3cd9
GR
1506 goto err_remove_device;
1507
1508 /* From this point, the .release() function cleans up gpio_device */
1509 gdev->dev.release = gpiodevice_release;
159f3cd9
GR
1510 pr_debug("%s: registered GPIOs %d to %d on device: %s (%s)\n",
1511 __func__, gdev->base, gdev->base + gdev->ngpio - 1,
1512 dev_name(&gdev->dev), gdev->chip->label ? : "generic");
1513
1514 return 0;
1515
1516err_remove_device:
111379dc 1517 cdev_device_del(&gdev->chrdev, &gdev->dev);
d377f56f 1518 return ret;
159f3cd9
GR
1519}
1520
a411e81e
BG
1521static void gpiochip_machine_hog(struct gpio_chip *chip, struct gpiod_hog *hog)
1522{
1523 struct gpio_desc *desc;
1524 int rv;
1525
1526 desc = gpiochip_get_desc(chip, hog->chip_hwnum);
1527 if (IS_ERR(desc)) {
1528 pr_err("%s: unable to get GPIO desc: %ld\n",
1529 __func__, PTR_ERR(desc));
1530 return;
1531 }
1532
ba3efdff 1533 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
a411e81e
BG
1534 return;
1535
1536 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
1537 if (rv)
1538 pr_err("%s: unable to hog GPIO line (%s:%u): %d\n",
1539 __func__, chip->label, hog->chip_hwnum, rv);
1540}
1541
1542static void machine_gpiochip_add(struct gpio_chip *chip)
1543{
1544 struct gpiod_hog *hog;
1545
1546 mutex_lock(&gpio_machine_hogs_mutex);
1547
1548 list_for_each_entry(hog, &gpio_machine_hogs, list) {
1549 if (!strcmp(chip->label, hog->chip_label))
1550 gpiochip_machine_hog(chip, hog);
1551 }
1552
1553 mutex_unlock(&gpio_machine_hogs_mutex);
1554}
1555
159f3cd9
GR
1556static void gpiochip_setup_devs(void)
1557{
1558 struct gpio_device *gdev;
d377f56f 1559 int ret;
159f3cd9
GR
1560
1561 list_for_each_entry(gdev, &gpio_devices, list) {
d377f56f
LW
1562 ret = gpiochip_setup_dev(gdev);
1563 if (ret)
159f3cd9 1564 pr_err("%s: Failed to initialize gpio device (%d)\n",
d377f56f 1565 dev_name(&gdev->dev), ret);
159f3cd9
GR
1566 }
1567}
1568
959bc7b2 1569int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data,
39c3fd58
AL
1570 struct lock_class_key *lock_key,
1571 struct lock_class_key *request_key)
d2876d08
DB
1572{
1573 unsigned long flags;
d377f56f 1574 int ret = 0;
ff2b1359 1575 unsigned i;
8d0aab2f 1576 int base = chip->base;
ff2b1359 1577 struct gpio_device *gdev;
d2876d08 1578
ff2b1359
LW
1579 /*
1580 * First: allocate and populate the internal stat container, and
1581 * set up the struct device.
1582 */
969f07b4 1583 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
ff2b1359 1584 if (!gdev)
14e85c0e 1585 return -ENOMEM;
3c702e99 1586 gdev->dev.bus = &gpio_bus_type;
ff2b1359
LW
1587 gdev->chip = chip;
1588 chip->gpiodev = gdev;
1589 if (chip->parent) {
1590 gdev->dev.parent = chip->parent;
1591 gdev->dev.of_node = chip->parent->of_node;
acc6e331
TR
1592 }
1593
ff2b1359
LW
1594#ifdef CONFIG_OF_GPIO
1595 /* If the gpiochip has an assigned OF node this takes precedence */
acc6e331
TR
1596 if (chip->of_node)
1597 gdev->dev.of_node = chip->of_node;
6ff04974
BD
1598 else
1599 chip->of_node = gdev->dev.of_node;
ff2b1359 1600#endif
acc6e331 1601
ff2b1359
LW
1602 gdev->id = ida_simple_get(&gpio_ida, 0, 0, GFP_KERNEL);
1603 if (gdev->id < 0) {
d377f56f 1604 ret = gdev->id;
ff2b1359
LW
1605 goto err_free_gdev;
1606 }
ddd8891e 1607 dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id);
ff2b1359
LW
1608 device_initialize(&gdev->dev);
1609 dev_set_drvdata(&gdev->dev, gdev);
1610 if (chip->parent && chip->parent->driver)
1611 gdev->owner = chip->parent->driver->owner;
1612 else if (chip->owner)
1613 /* TODO: remove chip->owner */
1614 gdev->owner = chip->owner;
1615 else
1616 gdev->owner = THIS_MODULE;
d2876d08 1617
476e2fc5 1618 gdev->descs = kcalloc(chip->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL);
1c3cdb18 1619 if (!gdev->descs) {
d377f56f 1620 ret = -ENOMEM;
a05a1404 1621 goto err_free_ida;
ff2b1359
LW
1622 }
1623
5ed41cc4
BJZ
1624 if (chip->ngpio == 0) {
1625 chip_err(chip, "tried to insert a GPIO chip with zero lines\n");
d377f56f 1626 ret = -EINVAL;
159f3cd9 1627 goto err_free_descs;
5ed41cc4 1628 }
df4878e9 1629
3027743f
LA
1630 if (chip->ngpio > FASTPATH_NGPIO)
1631 chip_warn(chip, "line cnt %u is greater than fast path cnt %u\n",
2ddac5ae 1632 chip->ngpio, FASTPATH_NGPIO);
3027743f 1633
fcf273e5 1634 gdev->label = kstrdup_const(chip->label ?: "unknown", GFP_KERNEL);
df4878e9 1635 if (!gdev->label) {
d377f56f 1636 ret = -ENOMEM;
476e2fc5 1637 goto err_free_descs;
df4878e9
LW
1638 }
1639
fdeb8e15 1640 gdev->ngpio = chip->ngpio;
43c54eca 1641 gdev->data = data;
5ed41cc4 1642
d2876d08
DB
1643 spin_lock_irqsave(&gpio_lock, flags);
1644
fdeb8e15
LW
1645 /*
1646 * TODO: this allocates a Linux GPIO number base in the global
1647 * GPIO numberspace for this chip. In the long run we want to
1648 * get *rid* of this numberspace and use only descriptors, but
1649 * it may be a pipe dream. It will not happen before we get rid
1650 * of the sysfs interface anyways.
1651 */
8d0aab2f
AV
1652 if (base < 0) {
1653 base = gpiochip_find_base(chip->ngpio);
1654 if (base < 0) {
d377f56f 1655 ret = base;
225fce83 1656 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1657 goto err_free_label;
8d0aab2f 1658 }
fdeb8e15
LW
1659 /*
1660 * TODO: it should not be necessary to reflect the assigned
1661 * base outside of the GPIO subsystem. Go over drivers and
1662 * see if anyone makes use of this, else drop this and assign
1663 * a poison instead.
1664 */
8d0aab2f
AV
1665 chip->base = base;
1666 }
fdeb8e15 1667 gdev->base = base;
8d0aab2f 1668
d377f56f
LW
1669 ret = gpiodev_add_to_list(gdev);
1670 if (ret) {
05aa5203 1671 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1672 goto err_free_label;
05aa5203 1673 }
1a989d0f 1674
767cd17a
RRD
1675 for (i = 0; i < chip->ngpio; i++)
1676 gdev->descs[i].gdev = gdev;
14e85c0e 1677
207270dd
DC
1678 spin_unlock_irqrestore(&gpio_lock, flags);
1679
51c1064e
BG
1680 ATOMIC_INIT_NOTIFIER_HEAD(&gdev->notifier);
1681
f23f1516 1682#ifdef CONFIG_PINCTRL
20ec3e39 1683 INIT_LIST_HEAD(&gdev->pin_ranges);
f23f1516
SH
1684#endif
1685
d377f56f
LW
1686 ret = gpiochip_set_desc_names(chip);
1687 if (ret)
5f3ca732
MP
1688 goto err_remove_from_list;
1689
d377f56f
LW
1690 ret = gpiochip_alloc_valid_mask(chip);
1691 if (ret)
48057ed1 1692 goto err_remove_from_list;
e0d89728 1693
d377f56f
LW
1694 ret = of_gpiochip_add(chip);
1695 if (ret)
48057ed1 1696 goto err_free_gpiochip_mask;
28355f81 1697
d377f56f
LW
1698 ret = gpiochip_init_valid_mask(chip);
1699 if (ret)
35779890 1700 goto err_remove_of_chip;
f8ec92a9 1701
3edfb7bd
RRD
1702 for (i = 0; i < chip->ngpio; i++) {
1703 struct gpio_desc *desc = &gdev->descs[i];
1704
d95da993 1705 if (chip->get_direction && gpiochip_line_is_valid(chip, i)) {
4fc5bfeb
AS
1706 assign_bit(FLAG_IS_OUT,
1707 &desc->flags, !chip->get_direction(chip, i));
d95da993 1708 } else {
4fc5bfeb
AS
1709 assign_bit(FLAG_IS_OUT,
1710 &desc->flags, !chip->direction_input);
d95da993 1711 }
3edfb7bd
RRD
1712 }
1713
b056ca1c
AS
1714 ret = gpiochip_add_pin_ranges(chip);
1715 if (ret)
1716 goto err_remove_of_chip;
1717
664e3e5a 1718 acpi_gpiochip_add(chip);
391c970c 1719
a411e81e
BG
1720 machine_gpiochip_add(chip);
1721
504369cd 1722 ret = gpiochip_irqchip_init_valid_mask(chip);
9411e3aa
AS
1723 if (ret)
1724 goto err_remove_acpi_chip;
1725
504369cd 1726 ret = gpiochip_irqchip_init_hw(chip);
fbdf8d4b 1727 if (ret)
48057ed1
LW
1728 goto err_remove_acpi_chip;
1729
fbdf8d4b
LW
1730 ret = gpiochip_add_irqchip(chip, lock_key, request_key);
1731 if (ret)
48057ed1
LW
1732 goto err_remove_irqchip_mask;
1733
3c702e99
LW
1734 /*
1735 * By first adding the chardev, and then adding the device,
1736 * we get a device node entry in sysfs under
1737 * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
1738 * coldplug of device nodes and other udev business.
159f3cd9
GR
1739 * We can do this only if gpiolib has been initialized.
1740 * Otherwise, defer until later.
3c702e99 1741 */
159f3cd9 1742 if (gpiolib_initialized) {
d377f56f
LW
1743 ret = gpiochip_setup_dev(gdev);
1744 if (ret)
48057ed1 1745 goto err_remove_irqchip;
159f3cd9 1746 }
cedb1881 1747 return 0;
3bae4811 1748
48057ed1
LW
1749err_remove_irqchip:
1750 gpiochip_irqchip_remove(chip);
1751err_remove_irqchip_mask:
1752 gpiochip_irqchip_free_valid_mask(chip);
35779890 1753err_remove_acpi_chip:
225fce83 1754 acpi_gpiochip_remove(chip);
35779890 1755err_remove_of_chip:
6d86750c 1756 gpiochip_free_hogs(chip);
225fce83 1757 of_gpiochip_remove(chip);
35779890 1758err_free_gpiochip_mask:
2f4133bb 1759 gpiochip_remove_pin_ranges(chip);
726cb3ba 1760 gpiochip_free_valid_mask(chip);
5f3ca732 1761err_remove_from_list:
225fce83 1762 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1763 list_del(&gdev->list);
3bae4811 1764 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1765err_free_label:
fcf273e5 1766 kfree_const(gdev->label);
476e2fc5
GR
1767err_free_descs:
1768 kfree(gdev->descs);
a05a1404 1769err_free_ida:
ff2b1359 1770 ida_simple_remove(&gpio_ida, gdev->id);
a05a1404 1771err_free_gdev:
d2876d08 1772 /* failures here can mean systems won't boot... */
1777fc97 1773 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
fdeb8e15 1774 gdev->base, gdev->base + gdev->ngpio - 1,
d377f56f 1775 chip->label ? : "generic", ret);
fdeb8e15 1776 kfree(gdev);
d377f56f 1777 return ret;
d2876d08 1778}
959bc7b2 1779EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
d2876d08 1780
43c54eca
LW
1781/**
1782 * gpiochip_get_data() - get per-subdriver data for the chip
950d55f5
TR
1783 * @chip: GPIO chip
1784 *
1785 * Returns:
1786 * The per-subdriver data for the chip.
43c54eca
LW
1787 */
1788void *gpiochip_get_data(struct gpio_chip *chip)
1789{
1790 return chip->gpiodev->data;
1791}
1792EXPORT_SYMBOL_GPL(gpiochip_get_data);
1793
d2876d08
DB
1794/**
1795 * gpiochip_remove() - unregister a gpio_chip
1796 * @chip: the chip to unregister
1797 *
1798 * A gpio_chip with any GPIOs still requested may not be removed.
1799 */
e1db1706 1800void gpiochip_remove(struct gpio_chip *chip)
d2876d08 1801{
ff2b1359 1802 struct gpio_device *gdev = chip->gpiodev;
d2876d08 1803 unsigned long flags;
869233f8 1804 unsigned int i;
d2876d08 1805
ff2b1359 1806 /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
afbc4f31 1807 gpiochip_sysfs_unregister(gdev);
5018ada6 1808 gpiochip_free_hogs(chip);
bd203bd5
BJZ
1809 /* Numb the device, cancelling all outstanding operations */
1810 gdev->chip = NULL;
00acc3dc 1811 gpiochip_irqchip_remove(chip);
6072b9dc 1812 acpi_gpiochip_remove(chip);
391c970c 1813 of_gpiochip_remove(chip);
2f4133bb 1814 gpiochip_remove_pin_ranges(chip);
726cb3ba 1815 gpiochip_free_valid_mask(chip);
43c54eca
LW
1816 /*
1817 * We accept no more calls into the driver from this point, so
1818 * NULL the driver data pointer
1819 */
1820 gdev->data = NULL;
391c970c 1821
6798acaa 1822 spin_lock_irqsave(&gpio_lock, flags);
fdeb8e15 1823 for (i = 0; i < gdev->ngpio; i++) {
869233f8
AS
1824 if (gpiochip_is_requested(chip, i))
1825 break;
d2876d08 1826 }
d2876d08 1827 spin_unlock_irqrestore(&gpio_lock, flags);
14e85c0e 1828
ca18a852 1829 if (i != gdev->ngpio)
fdeb8e15 1830 dev_crit(&gdev->dev,
58383c78 1831 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
fab28b89 1832
ff2b1359
LW
1833 /*
1834 * The gpiochip side puts its use of the device to rest here:
1835 * if there are no userspace clients, the chardev and device will
1836 * be removed, else it will be dangling until the last user is
1837 * gone.
1838 */
111379dc 1839 cdev_device_del(&gdev->chrdev, &gdev->dev);
ff2b1359 1840 put_device(&gdev->dev);
d2876d08
DB
1841}
1842EXPORT_SYMBOL_GPL(gpiochip_remove);
1843
594fa265
GL
1844/**
1845 * gpiochip_find() - iterator for locating a specific gpio_chip
1846 * @data: data to pass to match function
950d55f5 1847 * @match: Callback function to check gpio_chip
594fa265
GL
1848 *
1849 * Similar to bus_find_device. It returns a reference to a gpio_chip as
1850 * determined by a user supplied @match callback. The callback should return
1851 * 0 if the device doesn't match and non-zero if it does. If the callback is
1852 * non-zero, this function will return to the caller and not iterate over any
1853 * more gpio_chips.
1854 */
07ce8ec7 1855struct gpio_chip *gpiochip_find(void *data,
6e2cf651 1856 int (*match)(struct gpio_chip *chip,
3d0f7cf0 1857 void *data))
594fa265 1858{
ff2b1359 1859 struct gpio_device *gdev;
acf06ff7 1860 struct gpio_chip *chip = NULL;
594fa265 1861 unsigned long flags;
594fa265
GL
1862
1863 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1864 list_for_each_entry(gdev, &gpio_devices, list)
acf06ff7
MY
1865 if (gdev->chip && match(gdev->chip, data)) {
1866 chip = gdev->chip;
594fa265 1867 break;
acf06ff7 1868 }
ff2b1359 1869
594fa265
GL
1870 spin_unlock_irqrestore(&gpio_lock, flags);
1871
1872 return chip;
1873}
8fa0c9bf 1874EXPORT_SYMBOL_GPL(gpiochip_find);
d2876d08 1875
79697ef9
AC
1876static int gpiochip_match_name(struct gpio_chip *chip, void *data)
1877{
1878 const char *name = data;
1879
1880 return !strcmp(chip->label, name);
1881}
1882
1883static struct gpio_chip *find_chip_by_name(const char *name)
1884{
1885 return gpiochip_find((void *)name, gpiochip_match_name);
1886}
1887
14250520
LW
1888#ifdef CONFIG_GPIOLIB_IRQCHIP
1889
1890/*
1891 * The following is irqchip helper code for gpiochips.
1892 */
1893
9411e3aa
AS
1894static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
1895{
1896 struct gpio_irq_chip *girq = &gc->irq;
1897
1898 if (!girq->init_hw)
1899 return 0;
1900
1901 return girq->init_hw(gc);
1902}
1903
5fbe5b58 1904static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb 1905{
5fbe5b58
LW
1906 struct gpio_irq_chip *girq = &gc->irq;
1907
1908 if (!girq->init_valid_mask)
79b804cb
MW
1909 return 0;
1910
5fbe5b58
LW
1911 girq->valid_mask = gpiochip_allocate_mask(gc);
1912 if (!girq->valid_mask)
79b804cb
MW
1913 return -ENOMEM;
1914
5fbe5b58
LW
1915 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
1916
79b804cb
MW
1917 return 0;
1918}
1919
1920static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip)
1921{
7bdbd1ec 1922 bitmap_free(gpiochip->irq.valid_mask);
dc7b0387 1923 gpiochip->irq.valid_mask = NULL;
79b804cb
MW
1924}
1925
64ff2c8e
SB
1926bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gpiochip,
1927 unsigned int offset)
79b804cb 1928{
726cb3ba
SB
1929 if (!gpiochip_line_is_valid(gpiochip, offset))
1930 return false;
79b804cb 1931 /* No mask means all valid */
dc7b0387 1932 if (likely(!gpiochip->irq.valid_mask))
79b804cb 1933 return true;
dc7b0387 1934 return test_bit(offset, gpiochip->irq.valid_mask);
79b804cb 1935}
64ff2c8e 1936EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
79b804cb 1937
14250520 1938/**
d245b3f9 1939 * gpiochip_set_cascaded_irqchip() - connects a cascaded irqchip to a gpiochip
4892d3a6 1940 * @gc: the gpiochip to set the irqchip chain to
14250520 1941 * @parent_irq: the irq number corresponding to the parent IRQ for this
72780ce5 1942 * cascaded irqchip
14250520 1943 * @parent_handler: the parent interrupt handler for the accumulated IRQ
3f97d5fc
LW
1944 * coming out of the gpiochip. If the interrupt is nested rather than
1945 * cascaded, pass NULL in this handler argument
14250520 1946 */
4892d3a6 1947static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gc,
6f79309a 1948 unsigned int parent_irq,
d245b3f9 1949 irq_flow_handler_t parent_handler)
14250520 1950{
4892d3a6
LW
1951 struct gpio_irq_chip *girq = &gc->irq;
1952 struct device *dev = &gc->gpiodev->dev;
1953
1954 if (!girq->domain) {
1955 chip_err(gc, "called %s before setting up irqchip\n",
83141a77 1956 __func__);
1c8732bb
LW
1957 return;
1958 }
1959
3f97d5fc 1960 if (parent_handler) {
4892d3a6
LW
1961 if (gc->can_sleep) {
1962 chip_err(gc,
b1911710 1963 "you cannot have chained interrupts on a chip that may sleep\n");
3f97d5fc
LW
1964 return;
1965 }
4892d3a6
LW
1966 girq->parents = devm_kcalloc(dev, 1,
1967 sizeof(*girq->parents),
1968 GFP_KERNEL);
1969 if (!girq->parents) {
1970 chip_err(gc, "out of memory allocating parent IRQ\n");
1971 return;
1972 }
1973 girq->parents[0] = parent_irq;
1974 girq->num_parents = 1;
3f97d5fc
LW
1975 /*
1976 * The parent irqchip is already using the chip_data for this
1977 * irqchip, so our callbacks simply use the handler_data.
1978 */
f7f87753 1979 irq_set_chained_handler_and_data(parent_irq, parent_handler,
4892d3a6 1980 gc);
3f97d5fc 1981 }
14250520 1982}
d245b3f9 1983
d245b3f9
LW
1984/**
1985 * gpiochip_set_nested_irqchip() - connects a nested irqchip to a gpiochip
1986 * @gpiochip: the gpiochip to set the irqchip nested handler to
1987 * @irqchip: the irqchip to nest to the gpiochip
1988 * @parent_irq: the irq number corresponding to the parent IRQ for this
1989 * nested irqchip
1990 */
1991void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip,
1992 struct irq_chip *irqchip,
6f79309a 1993 unsigned int parent_irq)
d245b3f9 1994{
3c1f6b2d 1995 gpiochip_set_cascaded_irqchip(gpiochip, parent_irq, NULL);
d245b3f9
LW
1996}
1997EXPORT_SYMBOL_GPL(gpiochip_set_nested_irqchip);
1998
fdd61a01
LW
1999#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2000
2001/**
2002 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
2003 * to a gpiochip
2004 * @gc: the gpiochip to set the irqchip hierarchical handler to
2005 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
2006 * will then percolate up to the parent
2007 */
2008static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
2009 struct irq_chip *irqchip)
2010{
2011 /* DT will deal with mapping each IRQ as we go along */
2012 if (is_of_node(gc->irq.fwnode))
2013 return;
2014
2015 /*
2016 * This is for legacy and boardfile "irqchip" fwnodes: allocate
2017 * irqs upfront instead of dynamically since we don't have the
2018 * dynamic type of allocation that hardware description languages
2019 * provide. Once all GPIO drivers using board files are gone from
2020 * the kernel we can delete this code, but for a transitional period
2021 * it is necessary to keep this around.
2022 */
2023 if (is_fwnode_irqchip(gc->irq.fwnode)) {
2024 int i;
2025 int ret;
2026
2027 for (i = 0; i < gc->ngpio; i++) {
2028 struct irq_fwspec fwspec;
2029 unsigned int parent_hwirq;
2030 unsigned int parent_type;
2031 struct gpio_irq_chip *girq = &gc->irq;
2032
2033 /*
2034 * We call the child to parent translation function
2035 * only to check if the child IRQ is valid or not.
2036 * Just pick the rising edge type here as that is what
2037 * we likely need to support.
2038 */
2039 ret = girq->child_to_parent_hwirq(gc, i,
2040 IRQ_TYPE_EDGE_RISING,
2041 &parent_hwirq,
2042 &parent_type);
2043 if (ret) {
2044 chip_err(gc, "skip set-up on hwirq %d\n",
2045 i);
2046 continue;
2047 }
2048
2049 fwspec.fwnode = gc->irq.fwnode;
2050 /* This is the hwirq for the GPIO line side of things */
2051 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
2052 /* Just pick something */
2053 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
2054 fwspec.param_count = 2;
2055 ret = __irq_domain_alloc_irqs(gc->irq.domain,
2056 /* just pick something */
2057 -1,
2058 1,
2059 NUMA_NO_NODE,
2060 &fwspec,
2061 false,
2062 NULL);
2063 if (ret < 0) {
2064 chip_err(gc,
2065 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
2066 i, parent_hwirq,
2067 ret);
2068 }
2069 }
2070 }
2071
2072 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
2073
2074 return;
2075}
2076
2077static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
2078 struct irq_fwspec *fwspec,
2079 unsigned long *hwirq,
2080 unsigned int *type)
2081{
2082 /* We support standard DT translation */
2083 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
2084 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
2085 }
2086
2087 /* This is for board files and others not using DT */
2088 if (is_fwnode_irqchip(fwspec->fwnode)) {
2089 int ret;
2090
2091 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
2092 if (ret)
2093 return ret;
2094 WARN_ON(*type == IRQ_TYPE_NONE);
2095 return 0;
2096 }
2097 return -EINVAL;
2098}
2099
2100static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
2101 unsigned int irq,
2102 unsigned int nr_irqs,
2103 void *data)
2104{
2105 struct gpio_chip *gc = d->host_data;
2106 irq_hw_number_t hwirq;
2107 unsigned int type = IRQ_TYPE_NONE;
2108 struct irq_fwspec *fwspec = data;
24258761 2109 void *parent_arg;
fdd61a01
LW
2110 unsigned int parent_hwirq;
2111 unsigned int parent_type;
2112 struct gpio_irq_chip *girq = &gc->irq;
2113 int ret;
2114
2115 /*
2116 * The nr_irqs parameter is always one except for PCI multi-MSI
2117 * so this should not happen.
2118 */
2119 WARN_ON(nr_irqs != 1);
2120
2121 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
2122 if (ret)
2123 return ret;
2124
366950ee 2125 chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
fdd61a01
LW
2126
2127 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
2128 &parent_hwirq, &parent_type);
2129 if (ret) {
2130 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
2131 return ret;
2132 }
366950ee 2133 chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq);
fdd61a01
LW
2134
2135 /*
2136 * We set handle_bad_irq because the .set_type() should
2137 * always be invoked and set the right type of handler.
2138 */
2139 irq_domain_set_info(d,
2140 irq,
2141 hwirq,
2142 gc->irq.chip,
2143 gc,
2144 girq->handler,
2145 NULL, NULL);
2146 irq_set_probe(irq);
2147
fdd61a01 2148 /* This parent only handles asserted level IRQs */
24258761
KH
2149 parent_arg = girq->populate_parent_alloc_arg(gc, parent_hwirq, parent_type);
2150 if (!parent_arg)
2151 return -ENOMEM;
2152
366950ee 2153 chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
fdd61a01 2154 irq, parent_hwirq);
c34f6dc8 2155 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
24258761 2156 ret = irq_domain_alloc_irqs_parent(d, irq, 1, parent_arg);
880b7cf2
KH
2157 /*
2158 * If the parent irqdomain is msi, the interrupts have already
2159 * been allocated, so the EEXIST is good.
2160 */
2161 if (irq_domain_is_msi(d->parent) && (ret == -EEXIST))
2162 ret = 0;
fdd61a01
LW
2163 if (ret)
2164 chip_err(gc,
2165 "failed to allocate parent hwirq %d for hwirq %lu\n",
2166 parent_hwirq, hwirq);
2167
24258761 2168 kfree(parent_arg);
fdd61a01
LW
2169 return ret;
2170}
2171
2172static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *chip,
2173 unsigned int offset)
2174{
2175 return offset;
2176}
2177
2178static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
2179{
2180 ops->activate = gpiochip_irq_domain_activate;
2181 ops->deactivate = gpiochip_irq_domain_deactivate;
2182 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
2183 ops->free = irq_domain_free_irqs_common;
2184
2185 /*
2186 * We only allow overriding the translate() function for
2187 * hierarchical chips, and this should only be done if the user
2188 * really need something other than 1:1 translation.
2189 */
2190 if (!ops->translate)
2191 ops->translate = gpiochip_hierarchy_irq_domain_translate;
2192}
2193
2194static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
2195{
2196 if (!gc->irq.child_to_parent_hwirq ||
2197 !gc->irq.fwnode) {
2198 chip_err(gc, "missing irqdomain vital data\n");
2199 return -EINVAL;
2200 }
2201
2202 if (!gc->irq.child_offset_to_irq)
2203 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
2204
24258761
KH
2205 if (!gc->irq.populate_parent_alloc_arg)
2206 gc->irq.populate_parent_alloc_arg =
fdd61a01
LW
2207 gpiochip_populate_parent_fwspec_twocell;
2208
2209 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
2210
2211 gc->irq.domain = irq_domain_create_hierarchy(
2212 gc->irq.parent_domain,
2213 0,
2214 gc->ngpio,
2215 gc->irq.fwnode,
2216 &gc->irq.child_irq_domain_ops,
2217 gc);
2218
2219 if (!gc->irq.domain)
2220 return -ENOMEM;
2221
2222 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
2223
2224 return 0;
2225}
2226
2227static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
2228{
2229 return !!gc->irq.parent_domain;
2230}
2231
24258761 2232void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *chip,
fdd61a01
LW
2233 unsigned int parent_hwirq,
2234 unsigned int parent_type)
2235{
24258761
KH
2236 struct irq_fwspec *fwspec;
2237
2238 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
2239 if (!fwspec)
2240 return NULL;
2241
2242 fwspec->fwnode = chip->irq.parent_domain->fwnode;
fdd61a01
LW
2243 fwspec->param_count = 2;
2244 fwspec->param[0] = parent_hwirq;
2245 fwspec->param[1] = parent_type;
24258761
KH
2246
2247 return fwspec;
fdd61a01
LW
2248}
2249EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
2250
24258761 2251void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *chip,
fdd61a01
LW
2252 unsigned int parent_hwirq,
2253 unsigned int parent_type)
2254{
24258761
KH
2255 struct irq_fwspec *fwspec;
2256
2257 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
2258 if (!fwspec)
2259 return NULL;
2260
2261 fwspec->fwnode = chip->irq.parent_domain->fwnode;
fdd61a01
LW
2262 fwspec->param_count = 4;
2263 fwspec->param[0] = 0;
2264 fwspec->param[1] = parent_hwirq;
2265 fwspec->param[2] = 0;
2266 fwspec->param[3] = parent_type;
24258761
KH
2267
2268 return fwspec;
fdd61a01
LW
2269}
2270EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
2271
2272#else
2273
2274static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
2275{
2276 return -EINVAL;
2277}
2278
2279static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
2280{
2281 return false;
2282}
2283
2284#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
2285
14250520
LW
2286/**
2287 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
2288 * @d: the irqdomain used by this irqchip
2289 * @irq: the global irq number used by this GPIO irqchip irq
2290 * @hwirq: the local IRQ/GPIO line offset on this gpiochip
2291 *
2292 * This function will set up the mapping for a certain IRQ line on a
2293 * gpiochip by assigning the gpiochip as chip data, and using the irqchip
2294 * stored inside the gpiochip.
2295 */
1b95b4eb
TR
2296int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
2297 irq_hw_number_t hwirq)
14250520
LW
2298{
2299 struct gpio_chip *chip = d->host_data;
d377f56f 2300 int ret = 0;
14250520 2301
dc749a09
GS
2302 if (!gpiochip_irqchip_irq_valid(chip, hwirq))
2303 return -ENXIO;
2304
14250520 2305 irq_set_chip_data(irq, chip);
a0a8bcf4
GS
2306 /*
2307 * This lock class tells lockdep that GPIO irqs are in a different
2308 * category than their parents, so it won't report false recursion.
2309 */
39c3fd58 2310 irq_set_lockdep_class(irq, chip->irq.lock_key, chip->irq.request_key);
c7a0aa59 2311 irq_set_chip_and_handler(irq, chip->irq.chip, chip->irq.handler);
d245b3f9 2312 /* Chips that use nested thread handlers have them marked */
60ed54ca 2313 if (chip->irq.threaded)
1c8732bb 2314 irq_set_nested_thread(irq, 1);
14250520 2315 irq_set_noprobe(irq);
23393d49 2316
e0d89728 2317 if (chip->irq.num_parents == 1)
d377f56f 2318 ret = irq_set_parent(irq, chip->irq.parents[0]);
e0d89728 2319 else if (chip->irq.map)
d377f56f 2320 ret = irq_set_parent(irq, chip->irq.map[hwirq]);
e0d89728 2321
d377f56f
LW
2322 if (ret < 0)
2323 return ret;
e0d89728 2324
1333b90f
LW
2325 /*
2326 * No set-up of the hardware will happen if IRQ_TYPE_NONE
2327 * is passed as default type.
2328 */
3634eeb0
TR
2329 if (chip->irq.default_type != IRQ_TYPE_NONE)
2330 irq_set_irq_type(irq, chip->irq.default_type);
14250520
LW
2331
2332 return 0;
2333}
1b95b4eb 2334EXPORT_SYMBOL_GPL(gpiochip_irq_map);
14250520 2335
1b95b4eb 2336void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
c3626fde 2337{
1c8732bb
LW
2338 struct gpio_chip *chip = d->host_data;
2339
60ed54ca 2340 if (chip->irq.threaded)
1c8732bb 2341 irq_set_nested_thread(irq, 0);
c3626fde
LW
2342 irq_set_chip_and_handler(irq, NULL, NULL);
2343 irq_set_chip_data(irq, NULL);
2344}
1b95b4eb 2345EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
c3626fde 2346
14250520
LW
2347static const struct irq_domain_ops gpiochip_domain_ops = {
2348 .map = gpiochip_irq_map,
c3626fde 2349 .unmap = gpiochip_irq_unmap,
14250520
LW
2350 /* Virtually all GPIO irqchips are twocell:ed */
2351 .xlate = irq_domain_xlate_twocell,
2352};
2353
fdd61a01
LW
2354/*
2355 * TODO: move these activate/deactivate in under the hierarchicial
2356 * irqchip implementation as static once SPMI and SSBI (all external
2357 * users) are phased over.
2358 */
ef74f70e
BM
2359/**
2360 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
2361 * @domain: The IRQ domain used by this IRQ chip
2362 * @data: Outermost irq_data associated with the IRQ
2363 * @reserve: If set, only reserve an interrupt vector instead of assigning one
2364 *
2365 * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
2366 * used as the activate function for the &struct irq_domain_ops. The host_data
2367 * for the IRQ domain must be the &struct gpio_chip.
2368 */
2369int gpiochip_irq_domain_activate(struct irq_domain *domain,
2370 struct irq_data *data, bool reserve)
2371{
2372 struct gpio_chip *chip = domain->host_data;
2373
2374 return gpiochip_lock_as_irq(chip, data->hwirq);
2375}
2376EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
2377
2378/**
2379 * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
2380 * @domain: The IRQ domain used by this IRQ chip
2381 * @data: Outermost irq_data associated with the IRQ
2382 *
2383 * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
2384 * be used as the deactivate function for the &struct irq_domain_ops. The
2385 * host_data for the IRQ domain must be the &struct gpio_chip.
2386 */
2387void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
2388 struct irq_data *data)
2389{
2390 struct gpio_chip *chip = domain->host_data;
2391
2392 return gpiochip_unlock_as_irq(chip, data->hwirq);
2393}
2394EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
2395
4e6b8238 2396static int gpiochip_to_irq(struct gpio_chip *chip, unsigned offset)
14250520 2397{
fdd61a01
LW
2398 struct irq_domain *domain = chip->irq.domain;
2399
4e6b8238
HV
2400 if (!gpiochip_irqchip_irq_valid(chip, offset))
2401 return -ENXIO;
5b76e79c 2402
fdd61a01
LW
2403#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2404 if (irq_domain_is_hierarchy(domain)) {
2405 struct irq_fwspec spec;
2406
2407 spec.fwnode = domain->fwnode;
2408 spec.param_count = 2;
2409 spec.param[0] = chip->irq.child_offset_to_irq(chip, offset);
2410 spec.param[1] = IRQ_TYPE_NONE;
2411
2412 return irq_create_fwspec_mapping(&spec);
2413 }
2414#endif
2415
2416 return irq_create_mapping(domain, offset);
14250520
LW
2417}
2418
14250520
LW
2419static int gpiochip_irq_reqres(struct irq_data *d)
2420{
2421 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
5b76e79c 2422
4e6b8238 2423 return gpiochip_reqres_irq(chip, d->hwirq);
14250520
LW
2424}
2425
2426static void gpiochip_irq_relres(struct irq_data *d)
2427{
2428 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
2429
4e6b8238 2430 gpiochip_relres_irq(chip, d->hwirq);
14250520
LW
2431}
2432
461c1a7d 2433static void gpiochip_irq_enable(struct irq_data *d)
14250520 2434{
461c1a7d 2435 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
e0d89728 2436
461c1a7d
HV
2437 gpiochip_enable_irq(chip, d->hwirq);
2438 if (chip->irq.irq_enable)
2439 chip->irq.irq_enable(d);
2440 else
2441 chip->irq.chip->irq_unmask(d);
2442}
2443
2444static void gpiochip_irq_disable(struct irq_data *d)
2445{
2446 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
2447
2448 if (chip->irq.irq_disable)
2449 chip->irq.irq_disable(d);
2450 else
2451 chip->irq.chip->irq_mask(d);
2452 gpiochip_disable_irq(chip, d->hwirq);
2453}
2454
ca620f2d
HV
2455static void gpiochip_set_irq_hooks(struct gpio_chip *gpiochip)
2456{
2457 struct irq_chip *irqchip = gpiochip->irq.chip;
2458
2459 if (!irqchip->irq_request_resources &&
2460 !irqchip->irq_release_resources) {
2461 irqchip->irq_request_resources = gpiochip_irq_reqres;
2462 irqchip->irq_release_resources = gpiochip_irq_relres;
2463 }
461c1a7d
HV
2464 if (WARN_ON(gpiochip->irq.irq_enable))
2465 return;
171948ea
HV
2466 /* Check if the irqchip already has this hook... */
2467 if (irqchip->irq_enable == gpiochip_irq_enable) {
2468 /*
2469 * ...and if so, give a gentle warning that this is bad
2470 * practice.
2471 */
2472 chip_info(gpiochip,
2473 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
2474 return;
2475 }
461c1a7d
HV
2476 gpiochip->irq.irq_enable = irqchip->irq_enable;
2477 gpiochip->irq.irq_disable = irqchip->irq_disable;
2478 irqchip->irq_enable = gpiochip_irq_enable;
2479 irqchip->irq_disable = gpiochip_irq_disable;
14250520
LW
2480}
2481
e0d89728
TR
2482/**
2483 * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
2484 * @gpiochip: the GPIO chip to add the IRQ chip to
39c3fd58
AL
2485 * @lock_key: lockdep class for IRQ lock
2486 * @request_key: lockdep class for IRQ request
e0d89728 2487 */
959bc7b2 2488static int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
2489 struct lock_class_key *lock_key,
2490 struct lock_class_key *request_key)
e0d89728
TR
2491{
2492 struct irq_chip *irqchip = gpiochip->irq.chip;
fdd61a01 2493 const struct irq_domain_ops *ops = NULL;
e0d89728
TR
2494 struct device_node *np;
2495 unsigned int type;
2496 unsigned int i;
2497
2498 if (!irqchip)
2499 return 0;
2500
2501 if (gpiochip->irq.parent_handler && gpiochip->can_sleep) {
b1911710 2502 chip_err(gpiochip, "you cannot have chained interrupts on a chip that may sleep\n");
e0d89728
TR
2503 return -EINVAL;
2504 }
2505
2506 np = gpiochip->gpiodev->dev.of_node;
2507 type = gpiochip->irq.default_type;
2508
2509 /*
2510 * Specifying a default trigger is a terrible idea if DT or ACPI is
2511 * used to configure the interrupts, as you may end up with
2512 * conflicting triggers. Tell the user, and reset to NONE.
2513 */
2514 if (WARN(np && type != IRQ_TYPE_NONE,
2515 "%s: Ignoring %u default trigger\n", np->full_name, type))
2516 type = IRQ_TYPE_NONE;
2517
2518 if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) {
2519 acpi_handle_warn(ACPI_HANDLE(gpiochip->parent),
2520 "Ignoring %u default trigger\n", type);
2521 type = IRQ_TYPE_NONE;
2522 }
2523
2524 gpiochip->to_irq = gpiochip_to_irq;
2525 gpiochip->irq.default_type = type;
959bc7b2 2526 gpiochip->irq.lock_key = lock_key;
39c3fd58 2527 gpiochip->irq.request_key = request_key;
e0d89728 2528
fdd61a01
LW
2529 /* If a parent irqdomain is provided, let's build a hierarchy */
2530 if (gpiochip_hierarchy_is_hierarchical(gpiochip)) {
2531 int ret = gpiochip_hierarchy_add_domain(gpiochip);
2532 if (ret)
2533 return ret;
2534 } else {
2535 /* Some drivers provide custom irqdomain ops */
2536 if (gpiochip->irq.domain_ops)
2537 ops = gpiochip->irq.domain_ops;
2538
2539 if (!ops)
2540 ops = &gpiochip_domain_ops;
2541 gpiochip->irq.domain = irq_domain_add_simple(np,
2542 gpiochip->ngpio,
2543 gpiochip->irq.first,
2544 ops, gpiochip);
2545 if (!gpiochip->irq.domain)
2546 return -EINVAL;
2547 }
e0d89728 2548
e0d89728
TR
2549 if (gpiochip->irq.parent_handler) {
2550 void *data = gpiochip->irq.parent_handler_data ?: gpiochip;
2551
2552 for (i = 0; i < gpiochip->irq.num_parents; i++) {
2553 /*
2554 * The parent IRQ chip is already using the chip_data
2555 * for this IRQ chip, so our callbacks simply use the
2556 * handler_data.
2557 */
2558 irq_set_chained_handler_and_data(gpiochip->irq.parents[i],
2559 gpiochip->irq.parent_handler,
2560 data);
2561 }
e0d89728
TR
2562 }
2563
ca620f2d
HV
2564 gpiochip_set_irq_hooks(gpiochip);
2565
e0d89728
TR
2566 acpi_gpiochip_request_interrupts(gpiochip);
2567
2568 return 0;
2569}
2570
14250520
LW
2571/**
2572 * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
2573 * @gpiochip: the gpiochip to remove the irqchip from
2574 *
2575 * This is called only from gpiochip_remove()
2576 */
2577static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)
2578{
ca620f2d 2579 struct irq_chip *irqchip = gpiochip->irq.chip;
39e5f096 2580 unsigned int offset;
c3626fde 2581
afa82fab
MW
2582 acpi_gpiochip_free_interrupts(gpiochip);
2583
ca620f2d 2584 if (irqchip && gpiochip->irq.parent_handler) {
39e5f096
TR
2585 struct gpio_irq_chip *irq = &gpiochip->irq;
2586 unsigned int i;
2587
2588 for (i = 0; i < irq->num_parents; i++)
2589 irq_set_chained_handler_and_data(irq->parents[i],
2590 NULL, NULL);
25e4fe92
DES
2591 }
2592
c3626fde 2593 /* Remove all IRQ mappings and delete the domain */
f0fbe7bc 2594 if (gpiochip->irq.domain) {
39e5f096
TR
2595 unsigned int irq;
2596
79b804cb
MW
2597 for (offset = 0; offset < gpiochip->ngpio; offset++) {
2598 if (!gpiochip_irqchip_irq_valid(gpiochip, offset))
2599 continue;
f0fbe7bc
TR
2600
2601 irq = irq_find_mapping(gpiochip->irq.domain, offset);
2602 irq_dispose_mapping(irq);
79b804cb 2603 }
f0fbe7bc
TR
2604
2605 irq_domain_remove(gpiochip->irq.domain);
c3626fde 2606 }
14250520 2607
461c1a7d
HV
2608 if (irqchip) {
2609 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
2610 irqchip->irq_request_resources = NULL;
2611 irqchip->irq_release_resources = NULL;
2612 }
2613 if (irqchip->irq_enable == gpiochip_irq_enable) {
2614 irqchip->irq_enable = gpiochip->irq.irq_enable;
2615 irqchip->irq_disable = gpiochip->irq.irq_disable;
2616 }
14250520 2617 }
461c1a7d
HV
2618 gpiochip->irq.irq_enable = NULL;
2619 gpiochip->irq.irq_disable = NULL;
ca620f2d 2620 gpiochip->irq.chip = NULL;
79b804cb
MW
2621
2622 gpiochip_irqchip_free_valid_mask(gpiochip);
14250520
LW
2623}
2624
2625/**
739e6f59 2626 * gpiochip_irqchip_add_key() - adds an irqchip to a gpiochip
14250520
LW
2627 * @gpiochip: the gpiochip to add the irqchip to
2628 * @irqchip: the irqchip to add to the gpiochip
2629 * @first_irq: if not dynamically assigned, the base (first) IRQ to
2630 * allocate gpiochip irqs from
2631 * @handler: the irq handler to use (often a predefined irq core function)
1333b90f
LW
2632 * @type: the default type for IRQs on this irqchip, pass IRQ_TYPE_NONE
2633 * to have the core avoid setting up any default type in the hardware.
60ed54ca 2634 * @threaded: whether this irqchip uses a nested thread handler
39c3fd58
AL
2635 * @lock_key: lockdep class for IRQ lock
2636 * @request_key: lockdep class for IRQ request
14250520
LW
2637 *
2638 * This function closely associates a certain irqchip with a certain
2639 * gpiochip, providing an irq domain to translate the local IRQs to
2640 * global irqs in the gpiolib core, and making sure that the gpiochip
2641 * is passed as chip data to all related functions. Driver callbacks
09dd5f9e 2642 * need to use gpiochip_get_data() to get their local state containers back
14250520
LW
2643 * from the gpiochip passed as chip data. An irqdomain will be stored
2644 * in the gpiochip that shall be used by the driver to handle IRQ number
2645 * translation. The gpiochip will need to be initialized and registered
2646 * before calling this function.
2647 *
c3626fde
LW
2648 * This function will handle two cell:ed simple IRQs and assumes all
2649 * the pins on the gpiochip can generate a unique IRQ. Everything else
14250520
LW
2650 * need to be open coded.
2651 */
739e6f59
LW
2652int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip,
2653 struct irq_chip *irqchip,
2654 unsigned int first_irq,
2655 irq_flow_handler_t handler,
2656 unsigned int type,
60ed54ca 2657 bool threaded,
39c3fd58
AL
2658 struct lock_class_key *lock_key,
2659 struct lock_class_key *request_key)
14250520
LW
2660{
2661 struct device_node *of_node;
14250520
LW
2662
2663 if (!gpiochip || !irqchip)
2664 return -EINVAL;
2665
58383c78 2666 if (!gpiochip->parent) {
14250520
LW
2667 pr_err("missing gpiochip .dev parent pointer\n");
2668 return -EINVAL;
2669 }
60ed54ca 2670 gpiochip->irq.threaded = threaded;
58383c78 2671 of_node = gpiochip->parent->of_node;
14250520
LW
2672#ifdef CONFIG_OF_GPIO
2673 /*
20a8a968 2674 * If the gpiochip has an assigned OF node this takes precedence
c88402c2
BJZ
2675 * FIXME: get rid of this and use gpiochip->parent->of_node
2676 * everywhere
14250520
LW
2677 */
2678 if (gpiochip->of_node)
2679 of_node = gpiochip->of_node;
2680#endif
332e99d5 2681 /*
0a1e0053 2682 * Specifying a default trigger is a terrible idea if DT or ACPI is
332e99d5
MZ
2683 * used to configure the interrupts, as you may end-up with
2684 * conflicting triggers. Tell the user, and reset to NONE.
2685 */
2686 if (WARN(of_node && type != IRQ_TYPE_NONE,
7eb6ce2f 2687 "%pOF: Ignoring %d default trigger\n", of_node, type))
332e99d5 2688 type = IRQ_TYPE_NONE;
0a1e0053
MW
2689 if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) {
2690 acpi_handle_warn(ACPI_HANDLE(gpiochip->parent),
2691 "Ignoring %d default trigger\n", type);
2692 type = IRQ_TYPE_NONE;
2693 }
332e99d5 2694
da80ff81 2695 gpiochip->irq.chip = irqchip;
c7a0aa59 2696 gpiochip->irq.handler = handler;
3634eeb0 2697 gpiochip->irq.default_type = type;
14250520 2698 gpiochip->to_irq = gpiochip_to_irq;
ca9df053 2699 gpiochip->irq.lock_key = lock_key;
39c3fd58 2700 gpiochip->irq.request_key = request_key;
f0fbe7bc 2701 gpiochip->irq.domain = irq_domain_add_simple(of_node,
14250520
LW
2702 gpiochip->ngpio, first_irq,
2703 &gpiochip_domain_ops, gpiochip);
f0fbe7bc 2704 if (!gpiochip->irq.domain) {
da80ff81 2705 gpiochip->irq.chip = NULL;
14250520
LW
2706 return -EINVAL;
2707 }
8b67a1f0 2708
ca620f2d 2709 gpiochip_set_irq_hooks(gpiochip);
14250520 2710
afa82fab
MW
2711 acpi_gpiochip_request_interrupts(gpiochip);
2712
14250520
LW
2713 return 0;
2714}
739e6f59 2715EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_key);
14250520
LW
2716
2717#else /* CONFIG_GPIOLIB_IRQCHIP */
2718
959bc7b2 2719static inline int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
2720 struct lock_class_key *lock_key,
2721 struct lock_class_key *request_key)
e0d89728
TR
2722{
2723 return 0;
2724}
14250520 2725static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip) {}
9411e3aa
AS
2726
2727static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gpiochip)
2728{
2729 return 0;
2730}
2731
79b804cb
MW
2732static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip)
2733{
2734 return 0;
2735}
2736static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip)
2737{ }
14250520
LW
2738
2739#endif /* CONFIG_GPIOLIB_IRQCHIP */
2740
c771c2f4
JG
2741/**
2742 * gpiochip_generic_request() - request the gpio function for a pin
2743 * @chip: the gpiochip owning the GPIO
2744 * @offset: the offset of the GPIO to request for GPIO function
2745 */
2746int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset)
2747{
2ab73c6d
TR
2748 if (!list_empty(&chip->gpiodev->pin_ranges))
2749 return pinctrl_gpio_request(chip->gpiodev->base + offset);
2750
2751 return 0;
c771c2f4
JG
2752}
2753EXPORT_SYMBOL_GPL(gpiochip_generic_request);
2754
2755/**
2756 * gpiochip_generic_free() - free the gpio function from a pin
2757 * @chip: the gpiochip to request the gpio function for
2758 * @offset: the offset of the GPIO to free from GPIO function
2759 */
2760void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset)
2761{
a9a1d2a7 2762 pinctrl_gpio_free(chip->gpiodev->base + offset);
c771c2f4
JG
2763}
2764EXPORT_SYMBOL_GPL(gpiochip_generic_free);
2765
2956b5d9
MW
2766/**
2767 * gpiochip_generic_config() - apply configuration for a pin
2768 * @chip: the gpiochip owning the GPIO
2769 * @offset: the offset of the GPIO to apply the configuration
2770 * @config: the configuration to be applied
2771 */
2772int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset,
2773 unsigned long config)
2774{
2775 return pinctrl_gpio_set_config(chip->gpiodev->base + offset, config);
2776}
2777EXPORT_SYMBOL_GPL(gpiochip_generic_config);
2778
f23f1516 2779#ifdef CONFIG_PINCTRL
165adc9c 2780
586a87e6
CR
2781/**
2782 * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
2783 * @chip: the gpiochip to add the range for
d32651f6 2784 * @pctldev: the pin controller to map to
586a87e6
CR
2785 * @gpio_offset: the start offset in the current gpio_chip number space
2786 * @pin_group: name of the pin group inside the pin controller
973c1714
CL
2787 *
2788 * Calling this function directly from a DeviceTree-supported
2789 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2790 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2791 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
586a87e6
CR
2792 */
2793int gpiochip_add_pingroup_range(struct gpio_chip *chip,
2794 struct pinctrl_dev *pctldev,
2795 unsigned int gpio_offset, const char *pin_group)
2796{
2797 struct gpio_pin_range *pin_range;
fdeb8e15 2798 struct gpio_device *gdev = chip->gpiodev;
586a87e6
CR
2799 int ret;
2800
2801 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
2802 if (!pin_range) {
1a2a99c6 2803 chip_err(chip, "failed to allocate pin ranges\n");
586a87e6
CR
2804 return -ENOMEM;
2805 }
2806
2807 /* Use local offset as range ID */
2808 pin_range->range.id = gpio_offset;
2809 pin_range->range.gc = chip;
2810 pin_range->range.name = chip->label;
fdeb8e15 2811 pin_range->range.base = gdev->base + gpio_offset;
586a87e6
CR
2812 pin_range->pctldev = pctldev;
2813
2814 ret = pinctrl_get_group_pins(pctldev, pin_group,
2815 &pin_range->range.pins,
2816 &pin_range->range.npins);
61c6375d
MN
2817 if (ret < 0) {
2818 kfree(pin_range);
586a87e6 2819 return ret;
61c6375d 2820 }
586a87e6
CR
2821
2822 pinctrl_add_gpio_range(pctldev, &pin_range->range);
2823
1a2a99c6
AS
2824 chip_dbg(chip, "created GPIO range %d->%d ==> %s PINGRP %s\n",
2825 gpio_offset, gpio_offset + pin_range->range.npins - 1,
586a87e6
CR
2826 pinctrl_dev_get_devname(pctldev), pin_group);
2827
20ec3e39 2828 list_add_tail(&pin_range->node, &gdev->pin_ranges);
586a87e6
CR
2829
2830 return 0;
2831}
2832EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
2833
3f0f8670
LW
2834/**
2835 * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
2836 * @chip: the gpiochip to add the range for
950d55f5 2837 * @pinctl_name: the dev_name() of the pin controller to map to
316511c0
LW
2838 * @gpio_offset: the start offset in the current gpio_chip number space
2839 * @pin_offset: the start offset in the pin controller number space
3f0f8670
LW
2840 * @npins: the number of pins from the offset of each pin space (GPIO and
2841 * pin controller) to accumulate in this range
950d55f5
TR
2842 *
2843 * Returns:
2844 * 0 on success, or a negative error-code on failure.
973c1714
CL
2845 *
2846 * Calling this function directly from a DeviceTree-supported
2847 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2848 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2849 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
3f0f8670 2850 */
1e63d7b9 2851int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
316511c0 2852 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 2853 unsigned int npins)
f23f1516
SH
2854{
2855 struct gpio_pin_range *pin_range;
fdeb8e15 2856 struct gpio_device *gdev = chip->gpiodev;
b4d4b1f0 2857 int ret;
f23f1516 2858
3f0f8670 2859 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
f23f1516 2860 if (!pin_range) {
1a2a99c6 2861 chip_err(chip, "failed to allocate pin ranges\n");
1e63d7b9 2862 return -ENOMEM;
f23f1516
SH
2863 }
2864
3f0f8670 2865 /* Use local offset as range ID */
316511c0 2866 pin_range->range.id = gpio_offset;
3f0f8670 2867 pin_range->range.gc = chip;
f23f1516 2868 pin_range->range.name = chip->label;
fdeb8e15 2869 pin_range->range.base = gdev->base + gpio_offset;
316511c0 2870 pin_range->range.pin_base = pin_offset;
f23f1516 2871 pin_range->range.npins = npins;
192c369c 2872 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
f23f1516 2873 &pin_range->range);
8f23ca1a 2874 if (IS_ERR(pin_range->pctldev)) {
b4d4b1f0 2875 ret = PTR_ERR(pin_range->pctldev);
1a2a99c6 2876 chip_err(chip, "could not create pin range\n");
3f0f8670 2877 kfree(pin_range);
b4d4b1f0 2878 return ret;
3f0f8670 2879 }
1a2a99c6
AS
2880 chip_dbg(chip, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
2881 gpio_offset, gpio_offset + npins - 1,
316511c0
LW
2882 pinctl_name,
2883 pin_offset, pin_offset + npins - 1);
f23f1516 2884
20ec3e39 2885 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1e63d7b9
LW
2886
2887 return 0;
f23f1516 2888}
165adc9c 2889EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
f23f1516 2890
3f0f8670
LW
2891/**
2892 * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
2893 * @chip: the chip to remove all the mappings for
2894 */
f23f1516
SH
2895void gpiochip_remove_pin_ranges(struct gpio_chip *chip)
2896{
2897 struct gpio_pin_range *pin_range, *tmp;
20ec3e39 2898 struct gpio_device *gdev = chip->gpiodev;
f23f1516 2899
20ec3e39 2900 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
f23f1516
SH
2901 list_del(&pin_range->node);
2902 pinctrl_remove_gpio_range(pin_range->pctldev,
2903 &pin_range->range);
3f0f8670 2904 kfree(pin_range);
f23f1516
SH
2905 }
2906}
165adc9c
LW
2907EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
2908
2909#endif /* CONFIG_PINCTRL */
f23f1516 2910
d2876d08
DB
2911/* These "optional" allocation calls help prevent drivers from stomping
2912 * on each other, and help provide better diagnostics in debugfs.
2913 * They're called even less than the "set direction" calls.
2914 */
fac9d885 2915static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
d2876d08 2916{
fdeb8e15 2917 struct gpio_chip *chip = desc->gdev->chip;
d377f56f 2918 int ret;
d2876d08 2919 unsigned long flags;
3789f5ac 2920 unsigned offset;
d2876d08 2921
18534df4
MS
2922 if (label) {
2923 label = kstrdup_const(label, GFP_KERNEL);
2924 if (!label)
2925 return -ENOMEM;
2926 }
2927
bcabdef1
AC
2928 spin_lock_irqsave(&gpio_lock, flags);
2929
d2876d08 2930 /* NOTE: gpio_request() can be called in early boot,
35e8bb51 2931 * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
d2876d08
DB
2932 */
2933
2934 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
2935 desc_set_label(desc, label ? : "?");
d377f56f 2936 ret = 0;
438d8908 2937 } else {
18534df4 2938 kfree_const(label);
d377f56f 2939 ret = -EBUSY;
7460db56 2940 goto done;
35e8bb51
DB
2941 }
2942
2943 if (chip->request) {
2944 /* chip->request may sleep */
2945 spin_unlock_irqrestore(&gpio_lock, flags);
3789f5ac
BD
2946 offset = gpio_chip_hwgpio(desc);
2947 if (gpiochip_line_is_valid(chip, offset))
d377f56f 2948 ret = chip->request(chip, offset);
3789f5ac 2949 else
d377f56f 2950 ret = -EINVAL;
35e8bb51
DB
2951 spin_lock_irqsave(&gpio_lock, flags);
2952
d377f56f 2953 if (ret < 0) {
35e8bb51 2954 desc_set_label(desc, NULL);
18534df4 2955 kfree_const(label);
35e8bb51 2956 clear_bit(FLAG_REQUESTED, &desc->flags);
80b0a602 2957 goto done;
35e8bb51 2958 }
438d8908 2959 }
80b0a602
MN
2960 if (chip->get_direction) {
2961 /* chip->get_direction may sleep */
2962 spin_unlock_irqrestore(&gpio_lock, flags);
372e722e 2963 gpiod_get_direction(desc);
80b0a602
MN
2964 spin_lock_irqsave(&gpio_lock, flags);
2965 }
77c2d792
MW
2966done:
2967 spin_unlock_irqrestore(&gpio_lock, flags);
51c1064e
BG
2968 atomic_notifier_call_chain(&desc->gdev->notifier,
2969 GPIOLINE_CHANGED_REQUESTED, desc);
d377f56f 2970 return ret;
77c2d792
MW
2971}
2972
fdeb8e15
LW
2973/*
2974 * This descriptor validation needs to be inserted verbatim into each
2975 * function taking a descriptor, so we need to use a preprocessor
54d77198
LW
2976 * macro to avoid endless duplication. If the desc is NULL it is an
2977 * optional GPIO and calls should just bail out.
fdeb8e15 2978 */
a746a232
RV
2979static int validate_desc(const struct gpio_desc *desc, const char *func)
2980{
2981 if (!desc)
2982 return 0;
2983 if (IS_ERR(desc)) {
2984 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
2985 return PTR_ERR(desc);
2986 }
2987 if (!desc->gdev) {
2988 pr_warn("%s: invalid GPIO (no device)\n", func);
2989 return -EINVAL;
2990 }
2991 if (!desc->gdev->chip) {
2992 dev_warn(&desc->gdev->dev,
2993 "%s: backing chip is gone\n", func);
2994 return 0;
2995 }
2996 return 1;
2997}
2998
fdeb8e15 2999#define VALIDATE_DESC(desc) do { \
a746a232
RV
3000 int __valid = validate_desc(desc, __func__); \
3001 if (__valid <= 0) \
3002 return __valid; \
3003 } while (0)
fdeb8e15
LW
3004
3005#define VALIDATE_DESC_VOID(desc) do { \
a746a232
RV
3006 int __valid = validate_desc(desc, __func__); \
3007 if (__valid <= 0) \
fdeb8e15 3008 return; \
a746a232 3009 } while (0)
fdeb8e15 3010
0eb4c6c2 3011int gpiod_request(struct gpio_desc *desc, const char *label)
77c2d792 3012{
d377f56f 3013 int ret = -EPROBE_DEFER;
fdeb8e15 3014 struct gpio_device *gdev;
77c2d792 3015
fdeb8e15
LW
3016 VALIDATE_DESC(desc);
3017 gdev = desc->gdev;
77c2d792 3018
fdeb8e15 3019 if (try_module_get(gdev->owner)) {
d377f56f
LW
3020 ret = gpiod_request_commit(desc, label);
3021 if (ret < 0)
fdeb8e15 3022 module_put(gdev->owner);
33a68e86
LW
3023 else
3024 get_device(&gdev->dev);
77c2d792
MW
3025 }
3026
d377f56f
LW
3027 if (ret)
3028 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
77c2d792 3029
d377f56f 3030 return ret;
d2876d08 3031}
372e722e 3032
fac9d885 3033static bool gpiod_free_commit(struct gpio_desc *desc)
d2876d08 3034{
77c2d792 3035 bool ret = false;
d2876d08 3036 unsigned long flags;
35e8bb51 3037 struct gpio_chip *chip;
d2876d08 3038
3d599d1c
UKK
3039 might_sleep();
3040
372e722e 3041 gpiod_unexport(desc);
d8f388d8 3042
d2876d08
DB
3043 spin_lock_irqsave(&gpio_lock, flags);
3044
fdeb8e15 3045 chip = desc->gdev->chip;
35e8bb51
DB
3046 if (chip && test_bit(FLAG_REQUESTED, &desc->flags)) {
3047 if (chip->free) {
3048 spin_unlock_irqrestore(&gpio_lock, flags);
9c4ba946 3049 might_sleep_if(chip->can_sleep);
372e722e 3050 chip->free(chip, gpio_chip_hwgpio(desc));
35e8bb51
DB
3051 spin_lock_irqsave(&gpio_lock, flags);
3052 }
18534df4 3053 kfree_const(desc->label);
d2876d08 3054 desc_set_label(desc, NULL);
07697461 3055 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
35e8bb51 3056 clear_bit(FLAG_REQUESTED, &desc->flags);
aca5ce14 3057 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
25553ff0 3058 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
9225d516
DF
3059 clear_bit(FLAG_PULL_UP, &desc->flags);
3060 clear_bit(FLAG_PULL_DOWN, &desc->flags);
2148ad77 3061 clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
f625d460 3062 clear_bit(FLAG_IS_HOGGED, &desc->flags);
63636d95
GU
3063#ifdef CONFIG_OF_DYNAMIC
3064 desc->hog = NULL;
3065#endif
77c2d792
MW
3066 ret = true;
3067 }
d2876d08
DB
3068
3069 spin_unlock_irqrestore(&gpio_lock, flags);
51c1064e
BG
3070 atomic_notifier_call_chain(&desc->gdev->notifier,
3071 GPIOLINE_CHANGED_RELEASED, desc);
3072
77c2d792
MW
3073 return ret;
3074}
3075
0eb4c6c2 3076void gpiod_free(struct gpio_desc *desc)
77c2d792 3077{
fac9d885 3078 if (desc && desc->gdev && gpiod_free_commit(desc)) {
fdeb8e15 3079 module_put(desc->gdev->owner);
33a68e86
LW
3080 put_device(&desc->gdev->dev);
3081 } else {
77c2d792 3082 WARN_ON(extra_checks);
33a68e86 3083 }
d2876d08 3084}
372e722e 3085
d2876d08
DB
3086/**
3087 * gpiochip_is_requested - return string iff signal was requested
3088 * @chip: controller managing the signal
3089 * @offset: of signal within controller's 0..(ngpio - 1) range
3090 *
3091 * Returns NULL if the GPIO is not currently requested, else a string.
9c8318ff
AC
3092 * The string returned is the label passed to gpio_request(); if none has been
3093 * passed it is a meaningless, non-NULL constant.
d2876d08
DB
3094 *
3095 * This function is for use by GPIO controller drivers. The label can
3096 * help with diagnostics, and knowing that the signal is used as a GPIO
3097 * can help avoid accidentally multiplexing it to another controller.
3098 */
3099const char *gpiochip_is_requested(struct gpio_chip *chip, unsigned offset)
3100{
6c0b4e6c 3101 struct gpio_desc *desc;
d2876d08 3102
48b5953e 3103 if (offset >= chip->ngpio)
d2876d08 3104 return NULL;
6c0b4e6c 3105
1739a2d8
BG
3106 desc = gpiochip_get_desc(chip, offset);
3107 if (IS_ERR(desc))
3108 return NULL;
6c0b4e6c 3109
372e722e 3110 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
d2876d08 3111 return NULL;
372e722e 3112 return desc->label;
d2876d08
DB
3113}
3114EXPORT_SYMBOL_GPL(gpiochip_is_requested);
3115
77c2d792
MW
3116/**
3117 * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
950d55f5
TR
3118 * @chip: GPIO chip
3119 * @hwnum: hardware number of the GPIO for which to request the descriptor
77c2d792 3120 * @label: label for the GPIO
5923ea6c
LW
3121 * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
3122 * specify things like line inversion semantics with the machine flags
3123 * such as GPIO_OUT_LOW
3124 * @dflags: descriptor request flags for this GPIO or 0 if default, this
3125 * can be used to specify consumer semantics such as open drain
77c2d792
MW
3126 *
3127 * Function allows GPIO chip drivers to request and use their own GPIO
3128 * descriptors via gpiolib API. Difference to gpiod_request() is that this
3129 * function will not increase reference count of the GPIO chip module. This
3130 * allows the GPIO chip module to be unloaded as needed (we assume that the
3131 * GPIO chip driver handles freeing the GPIOs it has requested).
950d55f5
TR
3132 *
3133 * Returns:
3134 * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
3135 * code on failure.
77c2d792 3136 */
06863620
BG
3137struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip,
3138 unsigned int hwnum,
21abf103 3139 const char *label,
5923ea6c
LW
3140 enum gpio_lookup_flags lflags,
3141 enum gpiod_flags dflags)
77c2d792 3142{
abdc08a3 3143 struct gpio_desc *desc = gpiochip_get_desc(chip, hwnum);
d377f56f 3144 int ret;
77c2d792 3145
abdc08a3
AC
3146 if (IS_ERR(desc)) {
3147 chip_err(chip, "failed to get GPIO descriptor\n");
3148 return desc;
3149 }
3150
d377f56f
LW
3151 ret = gpiod_request_commit(desc, label);
3152 if (ret < 0)
3153 return ERR_PTR(ret);
77c2d792 3154
d377f56f
LW
3155 ret = gpiod_configure_flags(desc, label, lflags, dflags);
3156 if (ret) {
21abf103
LW
3157 chip_err(chip, "setup of own GPIO %s failed\n", label);
3158 gpiod_free_commit(desc);
d377f56f 3159 return ERR_PTR(ret);
21abf103
LW
3160 }
3161
abdc08a3 3162 return desc;
77c2d792 3163}
f7d4ad98 3164EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
77c2d792
MW
3165
3166/**
3167 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
3168 * @desc: GPIO descriptor to free
3169 *
3170 * Function frees the given GPIO requested previously with
3171 * gpiochip_request_own_desc().
3172 */
3173void gpiochip_free_own_desc(struct gpio_desc *desc)
3174{
3175 if (desc)
fac9d885 3176 gpiod_free_commit(desc);
77c2d792 3177}
f7d4ad98 3178EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
d2876d08 3179
fdeb8e15
LW
3180/*
3181 * Drivers MUST set GPIO direction before making get/set calls. In
d2876d08
DB
3182 * some cases this is done in early boot, before IRQs are enabled.
3183 *
3184 * As a rule these aren't called more than once (except for drivers
3185 * using the open-drain emulation idiom) so these are natural places
3186 * to accumulate extra debugging checks. Note that we can't (yet)
3187 * rely on gpio_request() having been called beforehand.
3188 */
3189
d99f8876 3190static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset,
62adc6f3 3191 unsigned long config)
71479789 3192{
d90f3685
BG
3193 if (!gc->set_config)
3194 return -ENOTSUPP;
542f3615 3195
62adc6f3 3196 return gc->set_config(gc, offset, config);
71479789
TP
3197}
3198
d99f8876
BG
3199static int gpio_set_config(struct gpio_chip *gc, unsigned int offset,
3200 enum pin_config_param mode)
3201{
91b4ea5f 3202 unsigned long config;
d99f8876
BG
3203 unsigned arg;
3204
3205 switch (mode) {
d99f8876
BG
3206 case PIN_CONFIG_BIAS_PULL_DOWN:
3207 case PIN_CONFIG_BIAS_PULL_UP:
3208 arg = 1;
3209 break;
3210
3211 default:
3212 arg = 0;
3213 }
3214
91b4ea5f 3215 config = PIN_CONF_PACKED(mode, arg);
62adc6f3 3216 return gpio_do_set_config(gc, offset, config);
71479789
TP
3217}
3218
2148ad77
KG
3219static int gpio_set_bias(struct gpio_chip *chip, struct gpio_desc *desc)
3220{
3221 int bias = 0;
3222 int ret = 0;
3223
3224 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
3225 bias = PIN_CONFIG_BIAS_DISABLE;
3226 else if (test_bit(FLAG_PULL_UP, &desc->flags))
3227 bias = PIN_CONFIG_BIAS_PULL_UP;
3228 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
3229 bias = PIN_CONFIG_BIAS_PULL_DOWN;
3230
3231 if (bias) {
3232 ret = gpio_set_config(chip, gpio_chip_hwgpio(desc), bias);
3233 if (ret != -ENOTSUPP)
3234 return ret;
3235 }
3236 return 0;
3237}
3238
79a9becd
AC
3239/**
3240 * gpiod_direction_input - set the GPIO direction to input
3241 * @desc: GPIO to set to input
3242 *
3243 * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
3244 * be called safely on it.
3245 *
3246 * Return 0 in case of success, else an error code.
3247 */
3248int gpiod_direction_input(struct gpio_desc *desc)
d2876d08 3249{
d2876d08 3250 struct gpio_chip *chip;
d377f56f 3251 int ret = 0;
d2876d08 3252
fdeb8e15
LW
3253 VALIDATE_DESC(desc);
3254 chip = desc->gdev->chip;
bcabdef1 3255
e48d194d
LW
3256 /*
3257 * It is legal to have no .get() and .direction_input() specified if
3258 * the chip is output-only, but you can't specify .direction_input()
3259 * and not support the .get() operation, that doesn't make sense.
3260 */
ae9847f4 3261 if (!chip->get && chip->direction_input) {
6424de5a 3262 gpiod_warn(desc,
e48d194d
LW
3263 "%s: missing get() but have direction_input()\n",
3264 __func__);
be1a4b13
LW
3265 return -EIO;
3266 }
3267
e48d194d
LW
3268 /*
3269 * If we have a .direction_input() callback, things are simple,
3270 * just call it. Else we are some input-only chip so try to check the
3271 * direction (if .get_direction() is supported) else we silently
3272 * assume we are in input mode after this.
3273 */
ae9847f4 3274 if (chip->direction_input) {
d377f56f 3275 ret = chip->direction_input(chip, gpio_chip_hwgpio(desc));
ae9847f4
RRD
3276 } else if (chip->get_direction &&
3277 (chip->get_direction(chip, gpio_chip_hwgpio(desc)) != 1)) {
3278 gpiod_warn(desc,
e48d194d
LW
3279 "%s: missing direction_input() operation and line is output\n",
3280 __func__);
ae9847f4
RRD
3281 return -EIO;
3282 }
2148ad77 3283 if (ret == 0) {
d2876d08 3284 clear_bit(FLAG_IS_OUT, &desc->flags);
2148ad77
KG
3285 ret = gpio_set_bias(chip, desc);
3286 }
d449991c 3287
d377f56f 3288 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
d82da797 3289
d377f56f 3290 return ret;
d2876d08 3291}
79a9becd 3292EXPORT_SYMBOL_GPL(gpiod_direction_input);
372e722e 3293
fac9d885 3294static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
d2876d08 3295{
c663e5f5 3296 struct gpio_chip *gc = desc->gdev->chip;
ad17731d 3297 int val = !!value;
ae9847f4 3298 int ret = 0;
d2876d08 3299
e48d194d
LW
3300 /*
3301 * It's OK not to specify .direction_output() if the gpiochip is
3302 * output-only, but if there is then not even a .set() operation it
3303 * is pretty tricky to drive the output line.
3304 */
ae9847f4 3305 if (!gc->set && !gc->direction_output) {
6424de5a 3306 gpiod_warn(desc,
e48d194d
LW
3307 "%s: missing set() and direction_output() operations\n",
3308 __func__);
be1a4b13
LW
3309 return -EIO;
3310 }
3311
ae9847f4
RRD
3312 if (gc->direction_output) {
3313 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
3314 } else {
e48d194d 3315 /* Check that we are in output mode if we can */
ae9847f4
RRD
3316 if (gc->get_direction &&
3317 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
3318 gpiod_warn(desc,
3319 "%s: missing direction_output() operation\n",
3320 __func__);
3321 return -EIO;
3322 }
e48d194d
LW
3323 /*
3324 * If we can't actively set the direction, we are some
3325 * output-only chip, so just drive the output as desired.
3326 */
ae9847f4
RRD
3327 gc->set(gc, gpio_chip_hwgpio(desc), val);
3328 }
3329
c663e5f5 3330 if (!ret)
d2876d08 3331 set_bit(FLAG_IS_OUT, &desc->flags);
ad17731d 3332 trace_gpio_value(desc_to_gpio(desc), 0, val);
c663e5f5
LW
3333 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
3334 return ret;
d2876d08 3335}
ef70bbe1
PZ
3336
3337/**
3338 * gpiod_direction_output_raw - set the GPIO direction to output
3339 * @desc: GPIO to set to output
3340 * @value: initial output value of the GPIO
3341 *
3342 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
3343 * be called safely on it. The initial value of the output must be specified
3344 * as raw value on the physical line without regard for the ACTIVE_LOW status.
3345 *
3346 * Return 0 in case of success, else an error code.
3347 */
3348int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
3349{
fdeb8e15 3350 VALIDATE_DESC(desc);
fac9d885 3351 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1
PZ
3352}
3353EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
3354
3355/**
90df4fe0 3356 * gpiod_direction_output - set the GPIO direction to output
ef70bbe1
PZ
3357 * @desc: GPIO to set to output
3358 * @value: initial output value of the GPIO
3359 *
3360 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
3361 * be called safely on it. The initial value of the output must be specified
3362 * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
3363 * account.
3364 *
3365 * Return 0 in case of success, else an error code.
3366 */
3367int gpiod_direction_output(struct gpio_desc *desc, int value)
3368{
30322bcf 3369 struct gpio_chip *gc;
02e47980
LW
3370 int ret;
3371
fdeb8e15 3372 VALIDATE_DESC(desc);
ef70bbe1
PZ
3373 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3374 value = !value;
ad17731d
LW
3375 else
3376 value = !!value;
02e47980 3377
4e9439dd
HV
3378 /* GPIOs used for enabled IRQs shall not be set as output */
3379 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
3380 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
02e47980
LW
3381 gpiod_err(desc,
3382 "%s: tried to set a GPIO tied to an IRQ as output\n",
3383 __func__);
3384 return -EIO;
3385 }
3386
30322bcf 3387 gc = desc->gdev->chip;
02e47980
LW
3388 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
3389 /* First see if we can enable open drain in hardware */
71479789
TP
3390 ret = gpio_set_config(gc, gpio_chip_hwgpio(desc),
3391 PIN_CONFIG_DRIVE_OPEN_DRAIN);
02e47980
LW
3392 if (!ret)
3393 goto set_output_value;
3394 /* Emulate open drain by not actively driving the line high */
e735244e
BG
3395 if (value) {
3396 ret = gpiod_direction_input(desc);
3397 goto set_output_flag;
3398 }
02e47980
LW
3399 }
3400 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
71479789
TP
3401 ret = gpio_set_config(gc, gpio_chip_hwgpio(desc),
3402 PIN_CONFIG_DRIVE_OPEN_SOURCE);
02e47980
LW
3403 if (!ret)
3404 goto set_output_value;
3405 /* Emulate open source by not actively driving the line low */
e735244e
BG
3406 if (!value) {
3407 ret = gpiod_direction_input(desc);
3408 goto set_output_flag;
3409 }
02e47980 3410 } else {
71479789
TP
3411 gpio_set_config(gc, gpio_chip_hwgpio(desc),
3412 PIN_CONFIG_DRIVE_PUSH_PULL);
02e47980
LW
3413 }
3414
3415set_output_value:
2821ae5f
KG
3416 ret = gpio_set_bias(gc, desc);
3417 if (ret)
3418 return ret;
fac9d885 3419 return gpiod_direction_output_raw_commit(desc, value);
e735244e
BG
3420
3421set_output_flag:
3422 /*
3423 * When emulating open-source or open-drain functionalities by not
3424 * actively driving the line (setting mode to input) we still need to
3425 * set the IS_OUT flag or otherwise we won't be able to set the line
3426 * value anymore.
3427 */
3428 if (ret == 0)
3429 set_bit(FLAG_IS_OUT, &desc->flags);
3430 return ret;
ef70bbe1 3431}
79a9becd 3432EXPORT_SYMBOL_GPL(gpiod_direction_output);
d2876d08 3433
8ced32ff
GU
3434/**
3435 * gpiod_set_config - sets @config for a GPIO
3436 * @desc: descriptor of the GPIO for which to set the configuration
3437 * @config: Same packed config format as generic pinconf
3438 *
3439 * Returns:
3440 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
3441 * configuration.
3442 */
3443int gpiod_set_config(struct gpio_desc *desc, unsigned long config)
3444{
3445 struct gpio_chip *chip;
3446
3447 VALIDATE_DESC(desc);
3448 chip = desc->gdev->chip;
3449
3450 return gpio_do_set_config(chip, gpio_chip_hwgpio(desc), config);
3451}
3452EXPORT_SYMBOL_GPL(gpiod_set_config);
3453
c4b5be98 3454/**
950d55f5
TR
3455 * gpiod_set_debounce - sets @debounce time for a GPIO
3456 * @desc: descriptor of the GPIO for which to set debounce time
3457 * @debounce: debounce time in microseconds
65d87656 3458 *
950d55f5
TR
3459 * Returns:
3460 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
3461 * debounce time.
c4b5be98 3462 */
79a9becd 3463int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce)
c4b5be98 3464{
8ced32ff 3465 unsigned long config;
be1a4b13 3466
2956b5d9 3467 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
8ced32ff 3468 return gpiod_set_config(desc, config);
c4b5be98 3469}
79a9becd 3470EXPORT_SYMBOL_GPL(gpiod_set_debounce);
372e722e 3471
e10f72bf
AJ
3472/**
3473 * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
3474 * @desc: descriptor of the GPIO for which to configure persistence
3475 * @transitory: True to lose state on suspend or reset, false for persistence
3476 *
3477 * Returns:
3478 * 0 on success, otherwise a negative error code.
3479 */
3480int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
3481{
3482 struct gpio_chip *chip;
3483 unsigned long packed;
3484 int gpio;
3485 int rc;
3486
156dd392 3487 VALIDATE_DESC(desc);
e10f72bf
AJ
3488 /*
3489 * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
3490 * persistence state.
3491 */
4fc5bfeb 3492 assign_bit(FLAG_TRANSITORY, &desc->flags, transitory);
e10f72bf
AJ
3493
3494 /* If the driver supports it, set the persistence state now */
3495 chip = desc->gdev->chip;
3496 if (!chip->set_config)
3497 return 0;
3498
3499 packed = pinconf_to_config_packed(PIN_CONFIG_PERSIST_STATE,
3500 !transitory);
3501 gpio = gpio_chip_hwgpio(desc);
d99f8876 3502 rc = gpio_do_set_config(chip, gpio, packed);
e10f72bf
AJ
3503 if (rc == -ENOTSUPP) {
3504 dev_dbg(&desc->gdev->dev, "Persistence not supported for GPIO %d\n",
3505 gpio);
3506 return 0;
3507 }
3508
3509 return rc;
3510}
3511EXPORT_SYMBOL_GPL(gpiod_set_transitory);
3512
79a9becd
AC
3513/**
3514 * gpiod_is_active_low - test whether a GPIO is active-low or not
3515 * @desc: the gpio descriptor to test
3516 *
3517 * Returns 1 if the GPIO is active-low, 0 otherwise.
3518 */
3519int gpiod_is_active_low(const struct gpio_desc *desc)
372e722e 3520{
fdeb8e15 3521 VALIDATE_DESC(desc);
79a9becd 3522 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
372e722e 3523}
79a9becd 3524EXPORT_SYMBOL_GPL(gpiod_is_active_low);
d2876d08 3525
d3a5bcb4
MM
3526/**
3527 * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not
3528 * @desc: the gpio descriptor to change
3529 */
3530void gpiod_toggle_active_low(struct gpio_desc *desc)
3531{
3532 VALIDATE_DESC_VOID(desc);
3533 change_bit(FLAG_ACTIVE_LOW, &desc->flags);
3534}
3535EXPORT_SYMBOL_GPL(gpiod_toggle_active_low);
3536
d2876d08
DB
3537/* I/O calls are only valid after configuration completed; the relevant
3538 * "is this a valid GPIO" error checks should already have been done.
3539 *
3540 * "Get" operations are often inlinable as reading a pin value register,
3541 * and masking the relevant bit in that register.
3542 *
3543 * When "set" operations are inlinable, they involve writing that mask to
3544 * one register to set a low value, or a different register to set it high.
3545 * Otherwise locking is needed, so there may be little value to inlining.
3546 *
3547 *------------------------------------------------------------------------
3548 *
3549 * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
3550 * have requested the GPIO. That can include implicit requesting by
3551 * a direction setting call. Marking a gpio as requested locks its chip
3552 * in memory, guaranteeing that these table lookups need no more locking
3553 * and that gpiochip_remove() will fail.
3554 *
3555 * REVISIT when debugging, consider adding some instrumentation to ensure
3556 * that the GPIO was actually requested.
3557 */
3558
fac9d885 3559static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
d2876d08
DB
3560{
3561 struct gpio_chip *chip;
372e722e 3562 int offset;
e20538b8 3563 int value;
d2876d08 3564
fdeb8e15 3565 chip = desc->gdev->chip;
372e722e 3566 offset = gpio_chip_hwgpio(desc);
e20538b8 3567 value = chip->get ? chip->get(chip, offset) : -EIO;
723a6303 3568 value = value < 0 ? value : !!value;
372e722e 3569 trace_gpio_value(desc_to_gpio(desc), 1, value);
3f397c21 3570 return value;
d2876d08 3571}
372e722e 3572
eec1d566
LW
3573static int gpio_chip_get_multiple(struct gpio_chip *chip,
3574 unsigned long *mask, unsigned long *bits)
3575{
3576 if (chip->get_multiple) {
3577 return chip->get_multiple(chip, mask, bits);
3578 } else if (chip->get) {
3579 int i, value;
3580
3581 for_each_set_bit(i, mask, chip->ngpio) {
3582 value = chip->get(chip, i);
3583 if (value < 0)
3584 return value;
3585 __assign_bit(i, bits, value);
3586 }
3587 return 0;
3588 }
3589 return -EIO;
3590}
3591
3592int gpiod_get_array_value_complex(bool raw, bool can_sleep,
3593 unsigned int array_size,
3594 struct gpio_desc **desc_array,
77588c14 3595 struct gpio_array *array_info,
b9762beb 3596 unsigned long *value_bitmap)
eec1d566 3597{
d377f56f 3598 int ret, i = 0;
b17566a6
JK
3599
3600 /*
3601 * Validate array_info against desc_array and its size.
3602 * It should immediately follow desc_array if both
3603 * have been obtained from the same gpiod_get_array() call.
3604 */
3605 if (array_info && array_info->desc == desc_array &&
3606 array_size <= array_info->size &&
3607 (void *)array_info == desc_array + array_info->size) {
3608 if (!can_sleep)
3609 WARN_ON(array_info->chip->can_sleep);
3610
d377f56f 3611 ret = gpio_chip_get_multiple(array_info->chip,
b17566a6
JK
3612 array_info->get_mask,
3613 value_bitmap);
d377f56f
LW
3614 if (ret)
3615 return ret;
b17566a6
JK
3616
3617 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3618 bitmap_xor(value_bitmap, value_bitmap,
3619 array_info->invert_mask, array_size);
3620
3621 if (bitmap_full(array_info->get_mask, array_size))
3622 return 0;
3623
3624 i = find_first_zero_bit(array_info->get_mask, array_size);
3625 } else {
3626 array_info = NULL;
3627 }
eec1d566
LW
3628
3629 while (i < array_size) {
3630 struct gpio_chip *chip = desc_array[i]->gdev->chip;
3027743f
LA
3631 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
3632 unsigned long *mask, *bits;
eec1d566
LW
3633 int first, j, ret;
3634
3027743f
LA
3635 if (likely(chip->ngpio <= FASTPATH_NGPIO)) {
3636 mask = fastpath;
3637 } else {
3638 mask = kmalloc_array(2 * BITS_TO_LONGS(chip->ngpio),
3639 sizeof(*mask),
3640 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
3641 if (!mask)
3642 return -ENOMEM;
3643 }
3644
3645 bits = mask + BITS_TO_LONGS(chip->ngpio);
3646 bitmap_zero(mask, chip->ngpio);
3647
eec1d566
LW
3648 if (!can_sleep)
3649 WARN_ON(chip->can_sleep);
3650
3651 /* collect all inputs belonging to the same chip */
3652 first = i;
eec1d566
LW
3653 do {
3654 const struct gpio_desc *desc = desc_array[i];
3655 int hwgpio = gpio_chip_hwgpio(desc);
3656
3657 __set_bit(hwgpio, mask);
3658 i++;
b17566a6
JK
3659
3660 if (array_info)
35ae7f96
JK
3661 i = find_next_zero_bit(array_info->get_mask,
3662 array_size, i);
eec1d566
LW
3663 } while ((i < array_size) &&
3664 (desc_array[i]->gdev->chip == chip));
3665
3666 ret = gpio_chip_get_multiple(chip, mask, bits);
3027743f
LA
3667 if (ret) {
3668 if (mask != fastpath)
3669 kfree(mask);
eec1d566 3670 return ret;
3027743f 3671 }
eec1d566 3672
b17566a6 3673 for (j = first; j < i; ) {
eec1d566
LW
3674 const struct gpio_desc *desc = desc_array[j];
3675 int hwgpio = gpio_chip_hwgpio(desc);
3676 int value = test_bit(hwgpio, bits);
3677
3678 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3679 value = !value;
b9762beb 3680 __assign_bit(j, value_bitmap, value);
eec1d566 3681 trace_gpio_value(desc_to_gpio(desc), 1, value);
799d5eb4 3682 j++;
b17566a6
JK
3683
3684 if (array_info)
35ae7f96
JK
3685 j = find_next_zero_bit(array_info->get_mask, i,
3686 j);
eec1d566 3687 }
3027743f
LA
3688
3689 if (mask != fastpath)
3690 kfree(mask);
eec1d566
LW
3691 }
3692 return 0;
3693}
3694
d2876d08 3695/**
79a9becd
AC
3696 * gpiod_get_raw_value() - return a gpio's raw value
3697 * @desc: gpio whose value will be returned
d2876d08 3698 *
79a9becd 3699 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3700 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd 3701 *
827a9b8b 3702 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3703 * complain if the GPIO chip functions potentially sleep.
d2876d08 3704 */
79a9becd 3705int gpiod_get_raw_value(const struct gpio_desc *desc)
d2876d08 3706{
fdeb8e15 3707 VALIDATE_DESC(desc);
3285170f 3708 /* Should be using gpiod_get_raw_value_cansleep() */
fdeb8e15 3709 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3710 return gpiod_get_raw_value_commit(desc);
d2876d08 3711}
79a9becd 3712EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
372e722e 3713
79a9becd
AC
3714/**
3715 * gpiod_get_value() - return a gpio's value
3716 * @desc: gpio whose value will be returned
3717 *
3718 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3719 * account, or negative errno on failure.
79a9becd 3720 *
827a9b8b 3721 * This function can be called from contexts where we cannot sleep, and will
79a9becd
AC
3722 * complain if the GPIO chip functions potentially sleep.
3723 */
3724int gpiod_get_value(const struct gpio_desc *desc)
372e722e 3725{
79a9becd 3726 int value;
fdeb8e15
LW
3727
3728 VALIDATE_DESC(desc);
3285170f 3729 /* Should be using gpiod_get_value_cansleep() */
fdeb8e15 3730 WARN_ON(desc->gdev->chip->can_sleep);
79a9becd 3731
fac9d885 3732 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3733 if (value < 0)
3734 return value;
3735
79a9becd
AC
3736 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3737 value = !value;
3738
3739 return value;
372e722e 3740}
79a9becd 3741EXPORT_SYMBOL_GPL(gpiod_get_value);
d2876d08 3742
eec1d566
LW
3743/**
3744 * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
b9762beb 3745 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3746 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3747 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3748 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3749 *
3750 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3751 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3752 * else an error code.
3753 *
827a9b8b 3754 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
3755 * and it will complain if the GPIO chip functions potentially sleep.
3756 */
3757int gpiod_get_raw_array_value(unsigned int array_size,
b9762beb 3758 struct gpio_desc **desc_array,
77588c14 3759 struct gpio_array *array_info,
b9762beb 3760 unsigned long *value_bitmap)
eec1d566
LW
3761{
3762 if (!desc_array)
3763 return -EINVAL;
3764 return gpiod_get_array_value_complex(true, false, array_size,
77588c14
JK
3765 desc_array, array_info,
3766 value_bitmap);
eec1d566
LW
3767}
3768EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
3769
3770/**
3771 * gpiod_get_array_value() - read values from an array of GPIOs
b9762beb 3772 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3773 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3774 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3775 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3776 *
3777 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3778 * into account. Return 0 in case of success, else an error code.
3779 *
827a9b8b 3780 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
3781 * and it will complain if the GPIO chip functions potentially sleep.
3782 */
3783int gpiod_get_array_value(unsigned int array_size,
b9762beb 3784 struct gpio_desc **desc_array,
77588c14 3785 struct gpio_array *array_info,
b9762beb 3786 unsigned long *value_bitmap)
eec1d566
LW
3787{
3788 if (!desc_array)
3789 return -EINVAL;
3790 return gpiod_get_array_value_complex(false, false, array_size,
77588c14
JK
3791 desc_array, array_info,
3792 value_bitmap);
eec1d566
LW
3793}
3794EXPORT_SYMBOL_GPL(gpiod_get_array_value);
3795
aca5ce14 3796/*
fac9d885 3797 * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
79a9becd 3798 * @desc: gpio descriptor whose state need to be set.
20a8a968 3799 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
aca5ce14 3800 */
fac9d885 3801static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
aca5ce14 3802{
d377f56f 3803 int ret = 0;
fdeb8e15 3804 struct gpio_chip *chip = desc->gdev->chip;
372e722e
AC
3805 int offset = gpio_chip_hwgpio(desc);
3806
aca5ce14 3807 if (value) {
d377f56f 3808 ret = chip->direction_input(chip, offset);
aca5ce14 3809 } else {
d377f56f
LW
3810 ret = chip->direction_output(chip, offset, 0);
3811 if (!ret)
372e722e 3812 set_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 3813 }
d377f56f
LW
3814 trace_gpio_direction(desc_to_gpio(desc), value, ret);
3815 if (ret < 0)
6424de5a
MB
3816 gpiod_err(desc,
3817 "%s: Error in set_value for open drain err %d\n",
d377f56f 3818 __func__, ret);
aca5ce14
LD
3819}
3820
25553ff0 3821/*
79a9becd
AC
3822 * _gpio_set_open_source_value() - Set the open source gpio's value.
3823 * @desc: gpio descriptor whose state need to be set.
20a8a968 3824 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
25553ff0 3825 */
fac9d885 3826static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
25553ff0 3827{
d377f56f 3828 int ret = 0;
fdeb8e15 3829 struct gpio_chip *chip = desc->gdev->chip;
372e722e
AC
3830 int offset = gpio_chip_hwgpio(desc);
3831
25553ff0 3832 if (value) {
d377f56f
LW
3833 ret = chip->direction_output(chip, offset, 1);
3834 if (!ret)
372e722e 3835 set_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 3836 } else {
d377f56f 3837 ret = chip->direction_input(chip, offset);
25553ff0 3838 }
d377f56f
LW
3839 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
3840 if (ret < 0)
6424de5a
MB
3841 gpiod_err(desc,
3842 "%s: Error in set_value for open source err %d\n",
d377f56f 3843 __func__, ret);
25553ff0
LD
3844}
3845
fac9d885 3846static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
d2876d08
DB
3847{
3848 struct gpio_chip *chip;
3849
fdeb8e15 3850 chip = desc->gdev->chip;
372e722e 3851 trace_gpio_value(desc_to_gpio(desc), 0, value);
02e47980 3852 chip->set(chip, gpio_chip_hwgpio(desc), value);
372e722e
AC
3853}
3854
5f424243
RI
3855/*
3856 * set multiple outputs on the same chip;
3857 * use the chip's set_multiple function if available;
3858 * otherwise set the outputs sequentially;
3859 * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
3860 * defines which outputs are to be changed
3861 * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
3862 * defines the values the outputs specified by mask are to be set to
3863 */
3864static void gpio_chip_set_multiple(struct gpio_chip *chip,
3865 unsigned long *mask, unsigned long *bits)
3866{
3867 if (chip->set_multiple) {
3868 chip->set_multiple(chip, mask, bits);
3869 } else {
5e4e6fb3
AS
3870 unsigned int i;
3871
3872 /* set outputs if the corresponding mask bit is set */
3873 for_each_set_bit(i, mask, chip->ngpio)
3874 chip->set(chip, i, test_bit(i, bits));
5f424243
RI
3875 }
3876}
3877
3027743f 3878int gpiod_set_array_value_complex(bool raw, bool can_sleep,
3c940660
GU
3879 unsigned int array_size,
3880 struct gpio_desc **desc_array,
3881 struct gpio_array *array_info,
3882 unsigned long *value_bitmap)
5f424243
RI
3883{
3884 int i = 0;
3885
b17566a6
JK
3886 /*
3887 * Validate array_info against desc_array and its size.
3888 * It should immediately follow desc_array if both
3889 * have been obtained from the same gpiod_get_array() call.
3890 */
3891 if (array_info && array_info->desc == desc_array &&
3892 array_size <= array_info->size &&
3893 (void *)array_info == desc_array + array_info->size) {
3894 if (!can_sleep)
3895 WARN_ON(array_info->chip->can_sleep);
3896
3897 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3898 bitmap_xor(value_bitmap, value_bitmap,
3899 array_info->invert_mask, array_size);
3900
3901 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
3902 value_bitmap);
3903
3904 if (bitmap_full(array_info->set_mask, array_size))
3905 return 0;
3906
3907 i = find_first_zero_bit(array_info->set_mask, array_size);
3908 } else {
3909 array_info = NULL;
3910 }
3911
5f424243 3912 while (i < array_size) {
fdeb8e15 3913 struct gpio_chip *chip = desc_array[i]->gdev->chip;
3027743f
LA
3914 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
3915 unsigned long *mask, *bits;
5f424243
RI
3916 int count = 0;
3917
3027743f
LA
3918 if (likely(chip->ngpio <= FASTPATH_NGPIO)) {
3919 mask = fastpath;
3920 } else {
3921 mask = kmalloc_array(2 * BITS_TO_LONGS(chip->ngpio),
3922 sizeof(*mask),
3923 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
3924 if (!mask)
3925 return -ENOMEM;
3926 }
3927
3928 bits = mask + BITS_TO_LONGS(chip->ngpio);
3929 bitmap_zero(mask, chip->ngpio);
3930
38e003f4 3931 if (!can_sleep)
5f424243 3932 WARN_ON(chip->can_sleep);
38e003f4 3933
5f424243
RI
3934 do {
3935 struct gpio_desc *desc = desc_array[i];
3936 int hwgpio = gpio_chip_hwgpio(desc);
b9762beb 3937 int value = test_bit(i, value_bitmap);
5f424243 3938
b17566a6
JK
3939 /*
3940 * Pins applicable for fast input but not for
3941 * fast output processing may have been already
3942 * inverted inside the fast path, skip them.
3943 */
3944 if (!raw && !(array_info &&
3945 test_bit(i, array_info->invert_mask)) &&
3946 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
5f424243
RI
3947 value = !value;
3948 trace_gpio_value(desc_to_gpio(desc), 0, value);
3949 /*
3950 * collect all normal outputs belonging to the same chip
3951 * open drain and open source outputs are set individually
3952 */
02e47980 3953 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
fac9d885 3954 gpio_set_open_drain_value_commit(desc, value);
02e47980 3955 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
fac9d885 3956 gpio_set_open_source_value_commit(desc, value);
5f424243
RI
3957 } else {
3958 __set_bit(hwgpio, mask);
4fc5bfeb 3959 __assign_bit(hwgpio, bits, value);
5f424243
RI
3960 count++;
3961 }
3962 i++;
b17566a6
JK
3963
3964 if (array_info)
35ae7f96
JK
3965 i = find_next_zero_bit(array_info->set_mask,
3966 array_size, i);
fdeb8e15
LW
3967 } while ((i < array_size) &&
3968 (desc_array[i]->gdev->chip == chip));
5f424243 3969 /* push collected bits to outputs */
38e003f4 3970 if (count != 0)
5f424243 3971 gpio_chip_set_multiple(chip, mask, bits);
3027743f
LA
3972
3973 if (mask != fastpath)
3974 kfree(mask);
5f424243 3975 }
3027743f 3976 return 0;
5f424243
RI
3977}
3978
d2876d08 3979/**
79a9becd
AC
3980 * gpiod_set_raw_value() - assign a gpio's raw value
3981 * @desc: gpio whose value will be assigned
d2876d08 3982 * @value: value to assign
d2876d08 3983 *
79a9becd
AC
3984 * Set the raw value of the GPIO, i.e. the value of its physical line without
3985 * regard for its ACTIVE_LOW status.
3986 *
827a9b8b 3987 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3988 * complain if the GPIO chip functions potentially sleep.
d2876d08 3989 */
79a9becd 3990void gpiod_set_raw_value(struct gpio_desc *desc, int value)
372e722e 3991{
fdeb8e15 3992 VALIDATE_DESC_VOID(desc);
3285170f 3993 /* Should be using gpiod_set_raw_value_cansleep() */
fdeb8e15 3994 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3995 gpiod_set_raw_value_commit(desc, value);
d2876d08 3996}
79a9becd 3997EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
d2876d08 3998
1e77fc82
GU
3999/**
4000 * gpiod_set_value_nocheck() - set a GPIO line value without checking
4001 * @desc: the descriptor to set the value on
4002 * @value: value to set
4003 *
4004 * This sets the value of a GPIO line backing a descriptor, applying
4005 * different semantic quirks like active low and open drain/source
4006 * handling.
4007 */
4008static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
4009{
4010 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
4011 value = !value;
4012 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
4013 gpio_set_open_drain_value_commit(desc, value);
4014 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
4015 gpio_set_open_source_value_commit(desc, value);
4016 else
4017 gpiod_set_raw_value_commit(desc, value);
4018}
4019
d2876d08 4020/**
79a9becd
AC
4021 * gpiod_set_value() - assign a gpio's value
4022 * @desc: gpio whose value will be assigned
4023 * @value: value to assign
4024 *
02e47980
LW
4025 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
4026 * OPEN_DRAIN and OPEN_SOURCE flags into account.
d2876d08 4027 *
827a9b8b 4028 * This function can be called from contexts where we cannot sleep, and will
79a9becd 4029 * complain if the GPIO chip functions potentially sleep.
d2876d08 4030 */
79a9becd 4031void gpiod_set_value(struct gpio_desc *desc, int value)
d2876d08 4032{
fdeb8e15 4033 VALIDATE_DESC_VOID(desc);
3285170f 4034 /* Should be using gpiod_set_value_cansleep() */
fdeb8e15 4035 WARN_ON(desc->gdev->chip->can_sleep);
1e77fc82 4036 gpiod_set_value_nocheck(desc, value);
372e722e 4037}
79a9becd 4038EXPORT_SYMBOL_GPL(gpiod_set_value);
d2876d08 4039
5f424243 4040/**
3fff99bc 4041 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
b9762beb 4042 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4043 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4044 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4045 * @value_bitmap: bitmap of values to assign
5f424243
RI
4046 *
4047 * Set the raw values of the GPIOs, i.e. the values of the physical lines
4048 * without regard for their ACTIVE_LOW status.
4049 *
827a9b8b 4050 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
4051 * complain if the GPIO chip functions potentially sleep.
4052 */
3027743f 4053int gpiod_set_raw_array_value(unsigned int array_size,
3c940660
GU
4054 struct gpio_desc **desc_array,
4055 struct gpio_array *array_info,
4056 unsigned long *value_bitmap)
5f424243
RI
4057{
4058 if (!desc_array)
3027743f
LA
4059 return -EINVAL;
4060 return gpiod_set_array_value_complex(true, false, array_size,
77588c14 4061 desc_array, array_info, value_bitmap);
5f424243 4062}
3fff99bc 4063EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
5f424243
RI
4064
4065/**
3fff99bc 4066 * gpiod_set_array_value() - assign values to an array of GPIOs
b9762beb 4067 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4068 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4069 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4070 * @value_bitmap: bitmap of values to assign
5f424243
RI
4071 *
4072 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
4073 * into account.
4074 *
827a9b8b 4075 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
4076 * complain if the GPIO chip functions potentially sleep.
4077 */
cf9af0d5
GU
4078int gpiod_set_array_value(unsigned int array_size,
4079 struct gpio_desc **desc_array,
4080 struct gpio_array *array_info,
4081 unsigned long *value_bitmap)
5f424243
RI
4082{
4083 if (!desc_array)
cf9af0d5
GU
4084 return -EINVAL;
4085 return gpiod_set_array_value_complex(false, false, array_size,
4086 desc_array, array_info,
4087 value_bitmap);
5f424243 4088}
3fff99bc 4089EXPORT_SYMBOL_GPL(gpiod_set_array_value);
5f424243 4090
d2876d08 4091/**
79a9becd
AC
4092 * gpiod_cansleep() - report whether gpio value access may sleep
4093 * @desc: gpio to check
d2876d08 4094 *
d2876d08 4095 */
79a9becd 4096int gpiod_cansleep(const struct gpio_desc *desc)
372e722e 4097{
fdeb8e15
LW
4098 VALIDATE_DESC(desc);
4099 return desc->gdev->chip->can_sleep;
d2876d08 4100}
79a9becd 4101EXPORT_SYMBOL_GPL(gpiod_cansleep);
d2876d08 4102
90b39402
LW
4103/**
4104 * gpiod_set_consumer_name() - set the consumer name for the descriptor
4105 * @desc: gpio to set the consumer name on
4106 * @name: the new consumer name
4107 */
18534df4 4108int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
90b39402 4109{
18534df4
MS
4110 VALIDATE_DESC(desc);
4111 if (name) {
4112 name = kstrdup_const(name, GFP_KERNEL);
4113 if (!name)
4114 return -ENOMEM;
4115 }
4116
4117 kfree_const(desc->label);
4118 desc_set_label(desc, name);
4119
4120 return 0;
90b39402
LW
4121}
4122EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
4123
0f6d504e 4124/**
79a9becd
AC
4125 * gpiod_to_irq() - return the IRQ corresponding to a GPIO
4126 * @desc: gpio whose IRQ will be returned (already requested)
0f6d504e 4127 *
79a9becd
AC
4128 * Return the IRQ corresponding to the passed GPIO, or an error code in case of
4129 * error.
0f6d504e 4130 */
79a9becd 4131int gpiod_to_irq(const struct gpio_desc *desc)
0f6d504e 4132{
4c37ce86
LW
4133 struct gpio_chip *chip;
4134 int offset;
0f6d504e 4135
79bb71bd
LW
4136 /*
4137 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
4138 * requires this function to not return zero on an invalid descriptor
4139 * but rather a negative error number.
4140 */
bfbbe44d 4141 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
79bb71bd
LW
4142 return -EINVAL;
4143
fdeb8e15 4144 chip = desc->gdev->chip;
372e722e 4145 offset = gpio_chip_hwgpio(desc);
4c37ce86
LW
4146 if (chip->to_irq) {
4147 int retirq = chip->to_irq(chip, offset);
4148
4149 /* Zero means NO_IRQ */
4150 if (!retirq)
4151 return -ENXIO;
4152
4153 return retirq;
4154 }
4155 return -ENXIO;
0f6d504e 4156}
79a9becd 4157EXPORT_SYMBOL_GPL(gpiod_to_irq);
0f6d504e 4158
d468bf9e 4159/**
e3a2e878 4160 * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
d74be6df
AC
4161 * @chip: the chip the GPIO to lock belongs to
4162 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
4163 *
4164 * This is used directly by GPIO drivers that want to lock down
f438acdf 4165 * a certain GPIO line to be used for IRQs.
d468bf9e 4166 */
e3a2e878 4167int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset)
372e722e 4168{
9c10280d
LW
4169 struct gpio_desc *desc;
4170
4171 desc = gpiochip_get_desc(chip, offset);
4172 if (IS_ERR(desc))
4173 return PTR_ERR(desc);
4174
60f8339e
LW
4175 /*
4176 * If it's fast: flush the direction setting if something changed
4177 * behind our back
4178 */
4179 if (!chip->can_sleep && chip->get_direction) {
80956790 4180 int dir = gpiod_get_direction(desc);
9c10280d 4181
36b31279
AS
4182 if (dir < 0) {
4183 chip_err(chip, "%s: cannot get GPIO direction\n",
4184 __func__);
4185 return dir;
4186 }
9c10280d 4187 }
d468bf9e 4188
9c10280d 4189 if (test_bit(FLAG_IS_OUT, &desc->flags)) {
d74be6df 4190 chip_err(chip,
b1911710
AS
4191 "%s: tried to flag a GPIO set as output for IRQ\n",
4192 __func__);
d468bf9e
LW
4193 return -EIO;
4194 }
4195
9c10280d 4196 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 4197 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
4198
4199 /*
4200 * If the consumer has not set up a label (such as when the
4201 * IRQ is referenced from .to_irq()) we set up a label here
4202 * so it is clear this is used as an interrupt.
4203 */
4204 if (!desc->label)
4205 desc_set_label(desc, "interrupt");
4206
d468bf9e 4207 return 0;
372e722e 4208}
e3a2e878 4209EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
d2876d08 4210
d468bf9e 4211/**
e3a2e878 4212 * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
d74be6df
AC
4213 * @chip: the chip the GPIO to lock belongs to
4214 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
4215 *
4216 * This is used directly by GPIO drivers that want to indicate
4217 * that a certain GPIO is no longer used exclusively for IRQ.
d2876d08 4218 */
e3a2e878 4219void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset)
d468bf9e 4220{
3940c34a
LW
4221 struct gpio_desc *desc;
4222
4223 desc = gpiochip_get_desc(chip, offset);
4224 if (IS_ERR(desc))
d468bf9e 4225 return;
d2876d08 4226
3940c34a 4227 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 4228 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
4229
4230 /* If we only had this marking, erase it */
4231 if (desc->label && !strcmp(desc->label, "interrupt"))
4232 desc_set_label(desc, NULL);
d468bf9e 4233}
e3a2e878 4234EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
d468bf9e 4235
4e9439dd
HV
4236void gpiochip_disable_irq(struct gpio_chip *chip, unsigned int offset)
4237{
4238 struct gpio_desc *desc = gpiochip_get_desc(chip, offset);
4239
4240 if (!IS_ERR(desc) &&
4241 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
4242 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
4243}
4244EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
4245
4246void gpiochip_enable_irq(struct gpio_chip *chip, unsigned int offset)
4247{
4248 struct gpio_desc *desc = gpiochip_get_desc(chip, offset);
4249
4250 if (!IS_ERR(desc) &&
4251 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
4252 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags));
4253 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
4254 }
4255}
4256EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
4257
6cee3821
LW
4258bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset)
4259{
4260 if (offset >= chip->ngpio)
4261 return false;
4262
4263 return test_bit(FLAG_USED_AS_IRQ, &chip->gpiodev->descs[offset].flags);
4264}
4265EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
4266
4e6b8238
HV
4267int gpiochip_reqres_irq(struct gpio_chip *chip, unsigned int offset)
4268{
4269 int ret;
4270
4271 if (!try_module_get(chip->gpiodev->owner))
4272 return -ENODEV;
4273
4274 ret = gpiochip_lock_as_irq(chip, offset);
4275 if (ret) {
4276 chip_err(chip, "unable to lock HW IRQ %u for IRQ\n", offset);
4277 module_put(chip->gpiodev->owner);
4278 return ret;
4279 }
4280 return 0;
4281}
4282EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
4283
4284void gpiochip_relres_irq(struct gpio_chip *chip, unsigned int offset)
4285{
4286 gpiochip_unlock_as_irq(chip, offset);
4287 module_put(chip->gpiodev->owner);
4288}
4289EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
4290
143b65d6
LW
4291bool gpiochip_line_is_open_drain(struct gpio_chip *chip, unsigned int offset)
4292{
4293 if (offset >= chip->ngpio)
4294 return false;
4295
4296 return test_bit(FLAG_OPEN_DRAIN, &chip->gpiodev->descs[offset].flags);
4297}
4298EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
4299
4300bool gpiochip_line_is_open_source(struct gpio_chip *chip, unsigned int offset)
4301{
4302 if (offset >= chip->ngpio)
4303 return false;
4304
4305 return test_bit(FLAG_OPEN_SOURCE, &chip->gpiodev->descs[offset].flags);
4306}
4307EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
4308
05f479bf
CK
4309bool gpiochip_line_is_persistent(struct gpio_chip *chip, unsigned int offset)
4310{
4311 if (offset >= chip->ngpio)
4312 return false;
4313
e10f72bf 4314 return !test_bit(FLAG_TRANSITORY, &chip->gpiodev->descs[offset].flags);
05f479bf
CK
4315}
4316EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
4317
79a9becd
AC
4318/**
4319 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
4320 * @desc: gpio whose value will be returned
4321 *
4322 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 4323 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd
AC
4324 *
4325 * This function is to be called from contexts that can sleep.
d2876d08 4326 */
79a9becd 4327int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
d2876d08 4328{
d2876d08 4329 might_sleep_if(extra_checks);
fdeb8e15 4330 VALIDATE_DESC(desc);
fac9d885 4331 return gpiod_get_raw_value_commit(desc);
d2876d08 4332}
79a9becd 4333EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
372e722e 4334
79a9becd
AC
4335/**
4336 * gpiod_get_value_cansleep() - return a gpio's value
4337 * @desc: gpio whose value will be returned
4338 *
4339 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 4340 * account, or negative errno on failure.
79a9becd
AC
4341 *
4342 * This function is to be called from contexts that can sleep.
4343 */
4344int gpiod_get_value_cansleep(const struct gpio_desc *desc)
d2876d08 4345{
3f397c21 4346 int value;
d2876d08
DB
4347
4348 might_sleep_if(extra_checks);
fdeb8e15 4349 VALIDATE_DESC(desc);
fac9d885 4350 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
4351 if (value < 0)
4352 return value;
4353
79a9becd
AC
4354 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
4355 value = !value;
4356
3f397c21 4357 return value;
d2876d08 4358}
79a9becd 4359EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
372e722e 4360
eec1d566
LW
4361/**
4362 * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
b9762beb 4363 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 4364 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 4365 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4366 * @value_bitmap: bitmap to store the read values
eec1d566
LW
4367 *
4368 * Read the raw values of the GPIOs, i.e. the values of the physical lines
4369 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
4370 * else an error code.
4371 *
4372 * This function is to be called from contexts that can sleep.
4373 */
4374int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
4375 struct gpio_desc **desc_array,
77588c14 4376 struct gpio_array *array_info,
b9762beb 4377 unsigned long *value_bitmap)
eec1d566
LW
4378{
4379 might_sleep_if(extra_checks);
4380 if (!desc_array)
4381 return -EINVAL;
4382 return gpiod_get_array_value_complex(true, true, array_size,
77588c14
JK
4383 desc_array, array_info,
4384 value_bitmap);
eec1d566
LW
4385}
4386EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
4387
4388/**
4389 * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
b9762beb 4390 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 4391 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 4392 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4393 * @value_bitmap: bitmap to store the read values
eec1d566
LW
4394 *
4395 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
4396 * into account. Return 0 in case of success, else an error code.
4397 *
4398 * This function is to be called from contexts that can sleep.
4399 */
4400int gpiod_get_array_value_cansleep(unsigned int array_size,
4401 struct gpio_desc **desc_array,
77588c14 4402 struct gpio_array *array_info,
b9762beb 4403 unsigned long *value_bitmap)
eec1d566
LW
4404{
4405 might_sleep_if(extra_checks);
4406 if (!desc_array)
4407 return -EINVAL;
4408 return gpiod_get_array_value_complex(false, true, array_size,
77588c14
JK
4409 desc_array, array_info,
4410 value_bitmap);
eec1d566
LW
4411}
4412EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
4413
79a9becd
AC
4414/**
4415 * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
4416 * @desc: gpio whose value will be assigned
4417 * @value: value to assign
4418 *
4419 * Set the raw value of the GPIO, i.e. the value of its physical line without
4420 * regard for its ACTIVE_LOW status.
4421 *
4422 * This function is to be called from contexts that can sleep.
4423 */
4424void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
372e722e 4425{
d2876d08 4426 might_sleep_if(extra_checks);
fdeb8e15 4427 VALIDATE_DESC_VOID(desc);
fac9d885 4428 gpiod_set_raw_value_commit(desc, value);
372e722e 4429}
79a9becd 4430EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
d2876d08 4431
79a9becd
AC
4432/**
4433 * gpiod_set_value_cansleep() - assign a gpio's value
4434 * @desc: gpio whose value will be assigned
4435 * @value: value to assign
4436 *
4437 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
4438 * account
4439 *
4440 * This function is to be called from contexts that can sleep.
4441 */
4442void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
d2876d08 4443{
d2876d08 4444 might_sleep_if(extra_checks);
fdeb8e15 4445 VALIDATE_DESC_VOID(desc);
1e77fc82 4446 gpiod_set_value_nocheck(desc, value);
372e722e 4447}
79a9becd 4448EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
d2876d08 4449
5f424243 4450/**
3fff99bc 4451 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 4452 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4453 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4454 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4455 * @value_bitmap: bitmap of values to assign
5f424243
RI
4456 *
4457 * Set the raw values of the GPIOs, i.e. the values of the physical lines
4458 * without regard for their ACTIVE_LOW status.
4459 *
4460 * This function is to be called from contexts that can sleep.
4461 */
3027743f 4462int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3c940660
GU
4463 struct gpio_desc **desc_array,
4464 struct gpio_array *array_info,
4465 unsigned long *value_bitmap)
5f424243
RI
4466{
4467 might_sleep_if(extra_checks);
4468 if (!desc_array)
3027743f
LA
4469 return -EINVAL;
4470 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
77588c14 4471 array_info, value_bitmap);
5f424243 4472}
3fff99bc 4473EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
5f424243 4474
3946d187
DT
4475/**
4476 * gpiod_add_lookup_tables() - register GPIO device consumers
4477 * @tables: list of tables of consumers to register
4478 * @n: number of tables in the list
4479 */
4480void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
4481{
4482 unsigned int i;
4483
4484 mutex_lock(&gpio_lookup_lock);
4485
4486 for (i = 0; i < n; i++)
4487 list_add_tail(&tables[i]->list, &gpio_lookup_list);
4488
4489 mutex_unlock(&gpio_lookup_lock);
4490}
4491
5f424243 4492/**
3fff99bc 4493 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 4494 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4495 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4496 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4497 * @value_bitmap: bitmap of values to assign
5f424243
RI
4498 *
4499 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
4500 * into account.
4501 *
4502 * This function is to be called from contexts that can sleep.
4503 */
cf9af0d5
GU
4504int gpiod_set_array_value_cansleep(unsigned int array_size,
4505 struct gpio_desc **desc_array,
4506 struct gpio_array *array_info,
4507 unsigned long *value_bitmap)
5f424243
RI
4508{
4509 might_sleep_if(extra_checks);
4510 if (!desc_array)
cf9af0d5
GU
4511 return -EINVAL;
4512 return gpiod_set_array_value_complex(false, true, array_size,
4513 desc_array, array_info,
4514 value_bitmap);
5f424243 4515}
3fff99bc 4516EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
5f424243 4517
bae48da2 4518/**
ad824783
AC
4519 * gpiod_add_lookup_table() - register GPIO device consumers
4520 * @table: table of consumers to register
bae48da2 4521 */
ad824783 4522void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
bae48da2
AC
4523{
4524 mutex_lock(&gpio_lookup_lock);
4525
ad824783 4526 list_add_tail(&table->list, &gpio_lookup_list);
bae48da2
AC
4527
4528 mutex_unlock(&gpio_lookup_lock);
4529}
226b2242 4530EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
bae48da2 4531
be9015ab
SK
4532/**
4533 * gpiod_remove_lookup_table() - unregister GPIO device consumers
4534 * @table: table of consumers to unregister
4535 */
4536void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
4537{
4538 mutex_lock(&gpio_lookup_lock);
4539
4540 list_del(&table->list);
4541
4542 mutex_unlock(&gpio_lookup_lock);
4543}
226b2242 4544EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
be9015ab 4545
a411e81e
BG
4546/**
4547 * gpiod_add_hogs() - register a set of GPIO hogs from machine code
4548 * @hogs: table of gpio hog entries with a zeroed sentinel at the end
4549 */
4550void gpiod_add_hogs(struct gpiod_hog *hogs)
4551{
4552 struct gpio_chip *chip;
4553 struct gpiod_hog *hog;
4554
4555 mutex_lock(&gpio_machine_hogs_mutex);
4556
4557 for (hog = &hogs[0]; hog->chip_label; hog++) {
4558 list_add_tail(&hog->list, &gpio_machine_hogs);
4559
4560 /*
4561 * The chip may have been registered earlier, so check if it
4562 * exists and, if so, try to hog the line now.
4563 */
4564 chip = find_chip_by_name(hog->chip_label);
4565 if (chip)
4566 gpiochip_machine_hog(chip, hog);
4567 }
4568
4569 mutex_unlock(&gpio_machine_hogs_mutex);
4570}
4571EXPORT_SYMBOL_GPL(gpiod_add_hogs);
4572
ad824783 4573static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
bae48da2
AC
4574{
4575 const char *dev_id = dev ? dev_name(dev) : NULL;
ad824783 4576 struct gpiod_lookup_table *table;
bae48da2
AC
4577
4578 mutex_lock(&gpio_lookup_lock);
4579
ad824783
AC
4580 list_for_each_entry(table, &gpio_lookup_list, list) {
4581 if (table->dev_id && dev_id) {
4582 /*
4583 * Valid strings on both ends, must be identical to have
4584 * a match
4585 */
4586 if (!strcmp(table->dev_id, dev_id))
4587 goto found;
4588 } else {
4589 /*
4590 * One of the pointers is NULL, so both must be to have
4591 * a match
4592 */
4593 if (dev_id == table->dev_id)
4594 goto found;
4595 }
4596 }
4597 table = NULL;
bae48da2 4598
ad824783
AC
4599found:
4600 mutex_unlock(&gpio_lookup_lock);
4601 return table;
4602}
bae48da2 4603
ad824783 4604static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
fed7026a 4605 unsigned int idx, unsigned long *flags)
ad824783 4606{
2a3cf6a3 4607 struct gpio_desc *desc = ERR_PTR(-ENOENT);
ad824783
AC
4608 struct gpiod_lookup_table *table;
4609 struct gpiod_lookup *p;
bae48da2 4610
ad824783
AC
4611 table = gpiod_find_lookup_table(dev);
4612 if (!table)
4613 return desc;
bae48da2 4614
ad824783
AC
4615 for (p = &table->table[0]; p->chip_label; p++) {
4616 struct gpio_chip *chip;
bae48da2 4617
ad824783 4618 /* idx must always match exactly */
bae48da2
AC
4619 if (p->idx != idx)
4620 continue;
4621
ad824783
AC
4622 /* If the lookup entry has a con_id, require exact match */
4623 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
4624 continue;
bae48da2 4625
ad824783 4626 chip = find_chip_by_name(p->chip_label);
bae48da2 4627
ad824783 4628 if (!chip) {
8853daf3
JK
4629 /*
4630 * As the lookup table indicates a chip with
4631 * p->chip_label should exist, assume it may
4632 * still appear later and let the interested
4633 * consumer be probed again or let the Deferred
4634 * Probe infrastructure handle the error.
4635 */
4636 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
4637 p->chip_label);
4638 return ERR_PTR(-EPROBE_DEFER);
ad824783 4639 }
bae48da2 4640
ad824783 4641 if (chip->ngpio <= p->chip_hwnum) {
2a3cf6a3 4642 dev_err(dev,
d935bd50
GU
4643 "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n",
4644 idx, p->chip_hwnum, chip->ngpio - 1,
4645 chip->label);
2a3cf6a3 4646 return ERR_PTR(-EINVAL);
bae48da2 4647 }
bae48da2 4648
bb1e88cc 4649 desc = gpiochip_get_desc(chip, p->chip_hwnum);
ad824783 4650 *flags = p->flags;
bae48da2 4651
2a3cf6a3 4652 return desc;
bae48da2
AC
4653 }
4654
bae48da2
AC
4655 return desc;
4656}
4657
66858527
RI
4658static int platform_gpio_count(struct device *dev, const char *con_id)
4659{
4660 struct gpiod_lookup_table *table;
4661 struct gpiod_lookup *p;
4662 unsigned int count = 0;
4663
4664 table = gpiod_find_lookup_table(dev);
4665 if (!table)
4666 return -ENOENT;
4667
4668 for (p = &table->table[0]; p->chip_label; p++) {
4669 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
4670 (!con_id && !p->con_id))
4671 count++;
4672 }
4673 if (!count)
4674 return -ENOENT;
4675
4676 return count;
4677}
4678
13949fa9
DT
4679/**
4680 * fwnode_gpiod_get_index - obtain a GPIO from firmware node
4681 * @fwnode: handle of the firmware node
4682 * @con_id: function within the GPIO consumer
4683 * @index: index of the GPIO to obtain for the consumer
4684 * @flags: GPIO initialization flags
4685 * @label: label to attach to the requested GPIO
4686 *
4687 * This function can be used for drivers that get their configuration
4688 * from opaque firmware.
4689 *
4690 * The function properly finds the corresponding GPIO using whatever is the
4691 * underlying firmware interface and then makes sure that the GPIO
4692 * descriptor is requested before it is returned to the caller.
4693 *
4694 * Returns:
4695 * On successful request the GPIO pin is configured in accordance with
4696 * provided @flags.
4697 *
4698 * In case of error an ERR_PTR() is returned.
4699 */
4700struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
4701 const char *con_id, int index,
4702 enum gpiod_flags flags,
4703 const char *label)
4704{
4705 struct gpio_desc *desc;
4706 char prop_name[32]; /* 32 is max size of property name */
4707 unsigned int i;
4708
4709 for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) {
4710 if (con_id)
4711 snprintf(prop_name, sizeof(prop_name), "%s-%s",
4712 con_id, gpio_suffixes[i]);
4713 else
4714 snprintf(prop_name, sizeof(prop_name), "%s",
4715 gpio_suffixes[i]);
4716
4717 desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags,
4718 label);
4719 if (!IS_ERR(desc) || (PTR_ERR(desc) != -ENOENT))
4720 break;
4721 }
4722
4723 return desc;
4724}
4725EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
4726
66858527
RI
4727/**
4728 * gpiod_count - return the number of GPIOs associated with a device / function
4729 * or -ENOENT if no GPIO has been assigned to the requested function
4730 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4731 * @con_id: function within the GPIO consumer
4732 */
4733int gpiod_count(struct device *dev, const char *con_id)
4734{
4735 int count = -ENOENT;
4736
4737 if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node)
f626d6df 4738 count = of_gpio_get_count(dev, con_id);
66858527
RI
4739 else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev))
4740 count = acpi_gpio_count(dev, con_id);
4741
4742 if (count < 0)
4743 count = platform_gpio_count(dev, con_id);
4744
4745 return count;
4746}
4747EXPORT_SYMBOL_GPL(gpiod_count);
4748
bae48da2 4749/**
0879162f 4750 * gpiod_get - obtain a GPIO for a given GPIO function
ad824783 4751 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2 4752 * @con_id: function within the GPIO consumer
39b2bbe3 4753 * @flags: optional GPIO initialization flags
bae48da2
AC
4754 *
4755 * Return the GPIO descriptor corresponding to the function con_id of device
2a3cf6a3 4756 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
20a8a968 4757 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
bae48da2 4758 */
b17d1bf1 4759struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
39b2bbe3 4760 enum gpiod_flags flags)
bae48da2 4761{
39b2bbe3 4762 return gpiod_get_index(dev, con_id, 0, flags);
bae48da2 4763}
b17d1bf1 4764EXPORT_SYMBOL_GPL(gpiod_get);
bae48da2 4765
29a1f233
TR
4766/**
4767 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
4768 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4769 * @con_id: function within the GPIO consumer
39b2bbe3 4770 * @flags: optional GPIO initialization flags
29a1f233
TR
4771 *
4772 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
4773 * the requested function it will return NULL. This is convenient for drivers
4774 * that need to handle optional GPIOs.
4775 */
b17d1bf1 4776struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
39b2bbe3
AC
4777 const char *con_id,
4778 enum gpiod_flags flags)
29a1f233 4779{
39b2bbe3 4780 return gpiod_get_index_optional(dev, con_id, 0, flags);
29a1f233 4781}
b17d1bf1 4782EXPORT_SYMBOL_GPL(gpiod_get_optional);
29a1f233 4783
f625d460
BP
4784
4785/**
4786 * gpiod_configure_flags - helper function to configure a given GPIO
4787 * @desc: gpio whose value will be assigned
4788 * @con_id: function within the GPIO consumer
fed7026a
AS
4789 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4790 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4791 * @dflags: gpiod_flags - optional GPIO initialization flags
4792 *
4793 * Return 0 on success, -ENOENT if no GPIO has been assigned to the
4794 * requested function and/or index, or another IS_ERR() code if an error
4795 * occurred while trying to acquire the GPIO.
4796 */
c29fd9eb 4797int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
85b03b30 4798 unsigned long lflags, enum gpiod_flags dflags)
f625d460 4799{
d377f56f 4800 int ret;
f625d460 4801
85b03b30
JH
4802 if (lflags & GPIO_ACTIVE_LOW)
4803 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
f926dfc1 4804
85b03b30
JH
4805 if (lflags & GPIO_OPEN_DRAIN)
4806 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
f926dfc1
LW
4807 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
4808 /*
4809 * This enforces open drain mode from the consumer side.
4810 * This is necessary for some busses like I2C, but the lookup
4811 * should *REALLY* have specified them as open drain in the
4812 * first place, so print a little warning here.
4813 */
4814 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
4815 gpiod_warn(desc,
4816 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
4817 }
4818
85b03b30
JH
4819 if (lflags & GPIO_OPEN_SOURCE)
4820 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
e10f72bf 4821
d449991c
TP
4822 if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) {
4823 gpiod_err(desc,
4824 "both pull-up and pull-down enabled, invalid configuration\n");
4825 return -EINVAL;
4826 }
4827
4828 if (lflags & GPIO_PULL_UP)
4829 set_bit(FLAG_PULL_UP, &desc->flags);
4830 else if (lflags & GPIO_PULL_DOWN)
4831 set_bit(FLAG_PULL_DOWN, &desc->flags);
4832
d377f56f
LW
4833 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
4834 if (ret < 0)
4835 return ret;
85b03b30 4836
f625d460
BP
4837 /* No particular flag request, return here... */
4838 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
4839 pr_debug("no flags found for %s\n", con_id);
4840 return 0;
4841 }
4842
4843 /* Process flags */
4844 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
d377f56f 4845 ret = gpiod_direction_output(desc,
ad17731d 4846 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
f625d460 4847 else
d377f56f 4848 ret = gpiod_direction_input(desc);
f625d460 4849
d377f56f 4850 return ret;
f625d460
BP
4851}
4852
bae48da2
AC
4853/**
4854 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
fdd6a5fe 4855 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2
AC
4856 * @con_id: function within the GPIO consumer
4857 * @idx: index of the GPIO to obtain in the consumer
39b2bbe3 4858 * @flags: optional GPIO initialization flags
bae48da2
AC
4859 *
4860 * This variant of gpiod_get() allows to access GPIOs other than the first
4861 * defined one for functions that define several GPIOs.
4862 *
2a3cf6a3
AC
4863 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
4864 * requested function and/or index, or another IS_ERR() code if an error
20a8a968 4865 * occurred while trying to acquire the GPIO.
bae48da2 4866 */
b17d1bf1 4867struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
bae48da2 4868 const char *con_id,
39b2bbe3
AC
4869 unsigned int idx,
4870 enum gpiod_flags flags)
bae48da2 4871{
2d6c06f5 4872 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
35c5d7fd 4873 struct gpio_desc *desc = NULL;
d377f56f 4874 int ret;
7d18f0a1
LW
4875 /* Maybe we have a device name, maybe not */
4876 const char *devname = dev ? dev_name(dev) : "?";
bae48da2
AC
4877
4878 dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id);
4879
4d8440b9
RW
4880 if (dev) {
4881 /* Using device tree? */
4882 if (IS_ENABLED(CONFIG_OF) && dev->of_node) {
4883 dev_dbg(dev, "using device tree for GPIO lookup\n");
4884 desc = of_find_gpio(dev, con_id, idx, &lookupflags);
4885 } else if (ACPI_COMPANION(dev)) {
4886 dev_dbg(dev, "using ACPI for GPIO lookup\n");
a31f5c3a 4887 desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags);
4d8440b9 4888 }
35c5d7fd
AC
4889 }
4890
4891 /*
4892 * Either we are not using DT or ACPI, or their lookup did not return
4893 * a result. In that case, use platform lookup as a fallback.
4894 */
2a3cf6a3 4895 if (!desc || desc == ERR_PTR(-ENOENT)) {
43a8785a 4896 dev_dbg(dev, "using lookup tables for GPIO lookup\n");
39b2bbe3 4897 desc = gpiod_find(dev, con_id, idx, &lookupflags);
bae48da2
AC
4898 }
4899
4900 if (IS_ERR(desc)) {
9d5a1f2c 4901 dev_dbg(dev, "No GPIO consumer %s found\n", con_id);
bae48da2
AC
4902 return desc;
4903 }
4904
7d18f0a1
LW
4905 /*
4906 * If a connection label was passed use that, else attempt to use
4907 * the device name as label
4908 */
d377f56f
LW
4909 ret = gpiod_request(desc, con_id ? con_id : devname);
4910 if (ret < 0) {
4911 if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) {
b0ce7b29
LW
4912 /*
4913 * This happens when there are several consumers for
4914 * the same GPIO line: we just return here without
4915 * further initialization. It is a bit if a hack.
4916 * This is necessary to support fixed regulators.
4917 *
4918 * FIXME: Make this more sane and safe.
4919 */
4920 dev_info(dev, "nonexclusive access to GPIO for %s\n",
4921 con_id ? con_id : devname);
4922 return desc;
4923 } else {
d377f56f 4924 return ERR_PTR(ret);
b0ce7b29
LW
4925 }
4926 }
bae48da2 4927
d377f56f 4928 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
6392cca4 4929 if (ret < 0) {
39b2bbe3 4930 dev_dbg(dev, "setup of GPIO %s failed\n", con_id);
6392cca4
LW
4931 gpiod_put(desc);
4932 return ERR_PTR(ret);
4933 }
4934
4935 return desc;
4936}
b17d1bf1 4937EXPORT_SYMBOL_GPL(gpiod_get_index);
6392cca4 4938
40b73183
MW
4939/**
4940 * fwnode_get_named_gpiod - obtain a GPIO from firmware node
4941 * @fwnode: handle of the firmware node
4942 * @propname: name of the firmware property representing the GPIO
6392cca4 4943 * @index: index of the GPIO to obtain for the consumer
a264d10f 4944 * @dflags: GPIO initialization flags
950d55f5 4945 * @label: label to attach to the requested GPIO
40b73183
MW
4946 *
4947 * This function can be used for drivers that get their configuration
6392cca4 4948 * from opaque firmware.
40b73183 4949 *
6392cca4 4950 * The function properly finds the corresponding GPIO using whatever is the
40b73183
MW
4951 * underlying firmware interface and then makes sure that the GPIO
4952 * descriptor is requested before it is returned to the caller.
4953 *
950d55f5 4954 * Returns:
ff21378a 4955 * On successful request the GPIO pin is configured in accordance with
a264d10f
AS
4956 * provided @dflags.
4957 *
40b73183
MW
4958 * In case of error an ERR_PTR() is returned.
4959 */
4960struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
537b94da 4961 const char *propname, int index,
b2987d74
AS
4962 enum gpiod_flags dflags,
4963 const char *label)
40b73183 4964{
2d6c06f5 4965 unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT;
40b73183 4966 struct gpio_desc *desc = ERR_PTR(-ENODEV);
40b73183
MW
4967 int ret;
4968
4969 if (!fwnode)
4970 return ERR_PTR(-EINVAL);
4971
4972 if (is_of_node(fwnode)) {
6392cca4
LW
4973 desc = gpiod_get_from_of_node(to_of_node(fwnode),
4974 propname, index,
4975 dflags,
4976 label);
4977 return desc;
40b73183
MW
4978 } else if (is_acpi_node(fwnode)) {
4979 struct acpi_gpio_info info;
4980
537b94da 4981 desc = acpi_node_get_gpiod(fwnode, propname, index, &info);
6392cca4
LW
4982 if (IS_ERR(desc))
4983 return desc;
40b73183 4984
6392cca4 4985 acpi_gpio_update_gpiod_flags(&dflags, &info);
606be344 4986 acpi_gpio_update_gpiod_lookup_flags(&lflags, &info);
6392cca4 4987 }
40b73183 4988
6392cca4 4989 /* Currently only ACPI takes this path */
b2987d74 4990 ret = gpiod_request(desc, label);
85b03b30
JH
4991 if (ret)
4992 return ERR_PTR(ret);
4993
a264d10f
AS
4994 ret = gpiod_configure_flags(desc, propname, lflags, dflags);
4995 if (ret < 0) {
4996 gpiod_put(desc);
4997 return ERR_PTR(ret);
90b665f6
LP
4998 }
4999
40b73183
MW
5000 return desc;
5001}
5002EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod);
5003
29a1f233
TR
5004/**
5005 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
5006 * function
5007 * @dev: GPIO consumer, can be NULL for system-global GPIOs
5008 * @con_id: function within the GPIO consumer
5009 * @index: index of the GPIO to obtain in the consumer
39b2bbe3 5010 * @flags: optional GPIO initialization flags
29a1f233
TR
5011 *
5012 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
5013 * specified index was assigned to the requested function it will return NULL.
5014 * This is convenient for drivers that need to handle optional GPIOs.
5015 */
b17d1bf1 5016struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
29a1f233 5017 const char *con_id,
39b2bbe3
AC
5018 unsigned int index,
5019 enum gpiod_flags flags)
29a1f233
TR
5020{
5021 struct gpio_desc *desc;
5022
39b2bbe3 5023 desc = gpiod_get_index(dev, con_id, index, flags);
29a1f233
TR
5024 if (IS_ERR(desc)) {
5025 if (PTR_ERR(desc) == -ENOENT)
5026 return NULL;
5027 }
5028
5029 return desc;
5030}
b17d1bf1 5031EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
29a1f233 5032
f625d460
BP
5033/**
5034 * gpiod_hog - Hog the specified GPIO desc given the provided flags
5035 * @desc: gpio whose value will be assigned
5036 * @name: gpio line name
fed7026a
AS
5037 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
5038 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
5039 * @dflags: gpiod_flags - optional GPIO initialization flags
5040 */
5041int gpiod_hog(struct gpio_desc *desc, const char *name,
5042 unsigned long lflags, enum gpiod_flags dflags)
5043{
5044 struct gpio_chip *chip;
5045 struct gpio_desc *local_desc;
5046 int hwnum;
d377f56f 5047 int ret;
f625d460
BP
5048
5049 chip = gpiod_to_chip(desc);
5050 hwnum = gpio_chip_hwgpio(desc);
5051
5923ea6c
LW
5052 local_desc = gpiochip_request_own_desc(chip, hwnum, name,
5053 lflags, dflags);
f625d460 5054 if (IS_ERR(local_desc)) {
d377f56f 5055 ret = PTR_ERR(local_desc);
c31a571d 5056 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
d377f56f
LW
5057 name, chip->label, hwnum, ret);
5058 return ret;
f625d460
BP
5059 }
5060
f625d460
BP
5061 /* Mark GPIO as hogged so it can be identified and removed later */
5062 set_bit(FLAG_IS_HOGGED, &desc->flags);
5063
5064 pr_info("GPIO line %d (%s) hogged as %s%s\n",
5065 desc_to_gpio(desc), name,
b27f300f
BG
5066 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
5067 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
5068 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
f625d460
BP
5069
5070 return 0;
5071}
5072
5073/**
5074 * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
5075 * @chip: gpio chip to act on
f625d460
BP
5076 */
5077static void gpiochip_free_hogs(struct gpio_chip *chip)
5078{
5079 int id;
5080
5081 for (id = 0; id < chip->ngpio; id++) {
1c3cdb18
LW
5082 if (test_bit(FLAG_IS_HOGGED, &chip->gpiodev->descs[id].flags))
5083 gpiochip_free_own_desc(&chip->gpiodev->descs[id]);
f625d460
BP
5084 }
5085}
5086
66858527
RI
5087/**
5088 * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
5089 * @dev: GPIO consumer, can be NULL for system-global GPIOs
5090 * @con_id: function within the GPIO consumer
5091 * @flags: optional GPIO initialization flags
5092 *
5093 * This function acquires all the GPIOs defined under a given function.
5094 *
5095 * Return a struct gpio_descs containing an array of descriptors, -ENOENT if
5096 * no GPIO has been assigned to the requested function, or another IS_ERR()
5097 * code if an error occurred while trying to acquire the GPIOs.
5098 */
5099struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
5100 const char *con_id,
5101 enum gpiod_flags flags)
5102{
5103 struct gpio_desc *desc;
5104 struct gpio_descs *descs;
bf9346f5
JK
5105 struct gpio_array *array_info = NULL;
5106 struct gpio_chip *chip;
5107 int count, bitmap_size;
66858527
RI
5108
5109 count = gpiod_count(dev, con_id);
5110 if (count < 0)
5111 return ERR_PTR(count);
5112
acafe7e3 5113 descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL);
66858527
RI
5114 if (!descs)
5115 return ERR_PTR(-ENOMEM);
5116
5117 for (descs->ndescs = 0; descs->ndescs < count; ) {
5118 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
5119 if (IS_ERR(desc)) {
5120 gpiod_put_array(descs);
5121 return ERR_CAST(desc);
5122 }
bf9346f5 5123
66858527 5124 descs->desc[descs->ndescs] = desc;
bf9346f5
JK
5125
5126 chip = gpiod_to_chip(desc);
5127 /*
c4c958aa
JK
5128 * If pin hardware number of array member 0 is also 0, select
5129 * its chip as a candidate for fast bitmap processing path.
bf9346f5 5130 */
c4c958aa 5131 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
bf9346f5
JK
5132 struct gpio_descs *array;
5133
5134 bitmap_size = BITS_TO_LONGS(chip->ngpio > count ?
5135 chip->ngpio : count);
5136
5137 array = kzalloc(struct_size(descs, desc, count) +
5138 struct_size(array_info, invert_mask,
5139 3 * bitmap_size), GFP_KERNEL);
5140 if (!array) {
5141 gpiod_put_array(descs);
5142 return ERR_PTR(-ENOMEM);
5143 }
5144
5145 memcpy(array, descs,
5146 struct_size(descs, desc, descs->ndescs + 1));
5147 kfree(descs);
5148
5149 descs = array;
5150 array_info = (void *)(descs->desc + count);
5151 array_info->get_mask = array_info->invert_mask +
5152 bitmap_size;
5153 array_info->set_mask = array_info->get_mask +
5154 bitmap_size;
5155
5156 array_info->desc = descs->desc;
5157 array_info->size = count;
5158 array_info->chip = chip;
5159 bitmap_set(array_info->get_mask, descs->ndescs,
5160 count - descs->ndescs);
5161 bitmap_set(array_info->set_mask, descs->ndescs,
5162 count - descs->ndescs);
5163 descs->info = array_info;
5164 }
c4c958aa
JK
5165 /* Unmark array members which don't belong to the 'fast' chip */
5166 if (array_info && array_info->chip != chip) {
bf9346f5
JK
5167 __clear_bit(descs->ndescs, array_info->get_mask);
5168 __clear_bit(descs->ndescs, array_info->set_mask);
c4c958aa
JK
5169 }
5170 /*
5171 * Detect array members which belong to the 'fast' chip
5172 * but their pins are not in hardware order.
5173 */
5174 else if (array_info &&
5175 gpio_chip_hwgpio(desc) != descs->ndescs) {
5176 /*
5177 * Don't use fast path if all array members processed so
5178 * far belong to the same chip as this one but its pin
5179 * hardware number is different from its array index.
5180 */
5181 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
5182 array_info = NULL;
5183 } else {
5184 __clear_bit(descs->ndescs,
5185 array_info->get_mask);
5186 __clear_bit(descs->ndescs,
5187 array_info->set_mask);
5188 }
bf9346f5
JK
5189 } else if (array_info) {
5190 /* Exclude open drain or open source from fast output */
5191 if (gpiochip_line_is_open_drain(chip, descs->ndescs) ||
5192 gpiochip_line_is_open_source(chip, descs->ndescs))
5193 __clear_bit(descs->ndescs,
5194 array_info->set_mask);
5195 /* Identify 'fast' pins which require invertion */
5196 if (gpiod_is_active_low(desc))
5197 __set_bit(descs->ndescs,
5198 array_info->invert_mask);
5199 }
5200
66858527
RI
5201 descs->ndescs++;
5202 }
bf9346f5
JK
5203 if (array_info)
5204 dev_dbg(dev,
5205 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
5206 array_info->chip->label, array_info->size,
5207 *array_info->get_mask, *array_info->set_mask,
5208 *array_info->invert_mask);
66858527
RI
5209 return descs;
5210}
5211EXPORT_SYMBOL_GPL(gpiod_get_array);
5212
5213/**
5214 * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
5215 * function
5216 * @dev: GPIO consumer, can be NULL for system-global GPIOs
5217 * @con_id: function within the GPIO consumer
5218 * @flags: optional GPIO initialization flags
5219 *
5220 * This is equivalent to gpiod_get_array(), except that when no GPIO was
5221 * assigned to the requested function it will return NULL.
5222 */
5223struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
5224 const char *con_id,
5225 enum gpiod_flags flags)
5226{
5227 struct gpio_descs *descs;
5228
5229 descs = gpiod_get_array(dev, con_id, flags);
45586c70 5230 if (PTR_ERR(descs) == -ENOENT)
66858527
RI
5231 return NULL;
5232
5233 return descs;
5234}
5235EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
5236
bae48da2
AC
5237/**
5238 * gpiod_put - dispose of a GPIO descriptor
5239 * @desc: GPIO descriptor to dispose of
5240 *
5241 * No descriptor can be used after gpiod_put() has been called on it.
5242 */
5243void gpiod_put(struct gpio_desc *desc)
5244{
1d7765ba
AS
5245 if (desc)
5246 gpiod_free(desc);
372e722e 5247}
bae48da2 5248EXPORT_SYMBOL_GPL(gpiod_put);
d2876d08 5249
66858527
RI
5250/**
5251 * gpiod_put_array - dispose of multiple GPIO descriptors
5252 * @descs: struct gpio_descs containing an array of descriptors
5253 */
5254void gpiod_put_array(struct gpio_descs *descs)
5255{
5256 unsigned int i;
5257
5258 for (i = 0; i < descs->ndescs; i++)
5259 gpiod_put(descs->desc[i]);
5260
5261 kfree(descs);
5262}
5263EXPORT_SYMBOL_GPL(gpiod_put_array);
5264
3c702e99
LW
5265static int __init gpiolib_dev_init(void)
5266{
5267 int ret;
5268
5269 /* Register GPIO sysfs bus */
b1911710 5270 ret = bus_register(&gpio_bus_type);
3c702e99
LW
5271 if (ret < 0) {
5272 pr_err("gpiolib: could not register GPIO bus type\n");
5273 return ret;
5274 }
5275
ddd8891e 5276 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME);
3c702e99
LW
5277 if (ret < 0) {
5278 pr_err("gpiolib: failed to allocate char dev region\n");
5279 bus_unregister(&gpio_bus_type);
63636d95 5280 return ret;
3c702e99 5281 }
63636d95
GU
5282
5283 gpiolib_initialized = true;
5284 gpiochip_setup_devs();
5285
5286 if (IS_ENABLED(CONFIG_OF_DYNAMIC))
5287 WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier));
5288
3c702e99
LW
5289 return ret;
5290}
5291core_initcall(gpiolib_dev_init);
5292
d2876d08
DB
5293#ifdef CONFIG_DEBUG_FS
5294
fdeb8e15 5295static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
d2876d08
DB
5296{
5297 unsigned i;
fdeb8e15
LW
5298 struct gpio_chip *chip = gdev->chip;
5299 unsigned gpio = gdev->base;
5300 struct gpio_desc *gdesc = &gdev->descs[0];
90fd2270
LW
5301 bool is_out;
5302 bool is_irq;
5303 bool active_low;
d2876d08 5304
fdeb8e15 5305 for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) {
ced433e2
MP
5306 if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) {
5307 if (gdesc->name) {
5308 seq_printf(s, " gpio-%-3d (%-20.20s)\n",
5309 gpio, gdesc->name);
5310 }
d2876d08 5311 continue;
ced433e2 5312 }
d2876d08 5313
372e722e 5314 gpiod_get_direction(gdesc);
d2876d08 5315 is_out = test_bit(FLAG_IS_OUT, &gdesc->flags);
d468bf9e 5316 is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags);
90fd2270
LW
5317 active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags);
5318 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s",
ced433e2 5319 gpio, gdesc->name ? gdesc->name : "", gdesc->label,
d2876d08 5320 is_out ? "out" : "in ",
1c22a252 5321 chip->get ? (chip->get(chip, i) ? "hi" : "lo") : "? ",
90fd2270
LW
5322 is_irq ? "IRQ " : "",
5323 active_low ? "ACTIVE LOW" : "");
d2876d08
DB
5324 seq_printf(s, "\n");
5325 }
5326}
5327
f9c4a31f 5328static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
d2876d08 5329{
362432ae 5330 unsigned long flags;
ff2b1359 5331 struct gpio_device *gdev = NULL;
cb1650d4 5332 loff_t index = *pos;
d2876d08 5333
f9c4a31f 5334 s->private = "";
d2876d08 5335
362432ae 5336 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 5337 list_for_each_entry(gdev, &gpio_devices, list)
362432ae
GL
5338 if (index-- == 0) {
5339 spin_unlock_irqrestore(&gpio_lock, flags);
ff2b1359 5340 return gdev;
f9c4a31f 5341 }
362432ae 5342 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f 5343
cb1650d4 5344 return NULL;
f9c4a31f
TR
5345}
5346
5347static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
5348{
362432ae 5349 unsigned long flags;
ff2b1359 5350 struct gpio_device *gdev = v;
f9c4a31f
TR
5351 void *ret = NULL;
5352
362432ae 5353 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 5354 if (list_is_last(&gdev->list, &gpio_devices))
cb1650d4
AC
5355 ret = NULL;
5356 else
ff2b1359 5357 ret = list_entry(gdev->list.next, struct gpio_device, list);
362432ae 5358 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f
TR
5359
5360 s->private = "\n";
5361 ++*pos;
5362
5363 return ret;
5364}
5365
5366static void gpiolib_seq_stop(struct seq_file *s, void *v)
5367{
5368}
5369
5370static int gpiolib_seq_show(struct seq_file *s, void *v)
5371{
ff2b1359
LW
5372 struct gpio_device *gdev = v;
5373 struct gpio_chip *chip = gdev->chip;
5374 struct device *parent;
5375
5376 if (!chip) {
5377 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
5378 dev_name(&gdev->dev));
5379 return 0;
5380 }
f9c4a31f 5381
ff2b1359
LW
5382 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
5383 dev_name(&gdev->dev),
fdeb8e15 5384 gdev->base, gdev->base + gdev->ngpio - 1);
ff2b1359
LW
5385 parent = chip->parent;
5386 if (parent)
5387 seq_printf(s, ", parent: %s/%s",
5388 parent->bus ? parent->bus->name : "no-bus",
5389 dev_name(parent));
f9c4a31f
TR
5390 if (chip->label)
5391 seq_printf(s, ", %s", chip->label);
5392 if (chip->can_sleep)
5393 seq_printf(s, ", can sleep");
5394 seq_printf(s, ":\n");
5395
5396 if (chip->dbg_show)
5397 chip->dbg_show(s, chip);
5398 else
fdeb8e15 5399 gpiolib_dbg_show(s, gdev);
f9c4a31f 5400
d2876d08
DB
5401 return 0;
5402}
5403
f9c4a31f
TR
5404static const struct seq_operations gpiolib_seq_ops = {
5405 .start = gpiolib_seq_start,
5406 .next = gpiolib_seq_next,
5407 .stop = gpiolib_seq_stop,
5408 .show = gpiolib_seq_show,
5409};
5410
d2876d08
DB
5411static int gpiolib_open(struct inode *inode, struct file *file)
5412{
f9c4a31f 5413 return seq_open(file, &gpiolib_seq_ops);
d2876d08
DB
5414}
5415
828c0950 5416static const struct file_operations gpiolib_operations = {
f9c4a31f 5417 .owner = THIS_MODULE,
d2876d08
DB
5418 .open = gpiolib_open,
5419 .read = seq_read,
5420 .llseek = seq_lseek,
f9c4a31f 5421 .release = seq_release,
d2876d08
DB
5422};
5423
5424static int __init gpiolib_debugfs_init(void)
5425{
5426 /* /sys/kernel/debug/gpio */
acc68b0e
GKH
5427 debugfs_create_file("gpio", S_IFREG | S_IRUGO, NULL, NULL,
5428 &gpiolib_operations);
d2876d08
DB
5429 return 0;
5430}
5431subsys_initcall(gpiolib_debugfs_init);
5432
5433#endif /* DEBUG_FS */