Merge tag 'spi-fix-v6.8-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
[linux-block.git] / drivers / gpio / gpiolib.c
CommitLineData
dae5f0af 1// SPDX-License-Identifier: GPL-2.0
c47d9e1b 2
79aabb1e 3#include <linux/acpi.h>
923a654c 4#include <linux/bitmap.h>
79aabb1e
AS
5#include <linux/compat.h>
6#include <linux/debugfs.h>
d8f388d8
DB
7#include <linux/device.h>
8#include <linux/err.h>
380c7ba3 9#include <linux/errno.h>
79aabb1e
AS
10#include <linux/file.h>
11#include <linux/fs.h>
79aabb1e
AS
12#include <linux/idr.h>
13#include <linux/interrupt.h>
14#include <linux/irq.h>
15#include <linux/kernel.h>
16#include <linux/list.h>
17#include <linux/module.h>
380c7ba3 18#include <linux/of.h>
c771c2f4 19#include <linux/pinctrl/consumer.h>
79aabb1e
AS
20#include <linux/seq_file.h>
21#include <linux/slab.h>
22#include <linux/spinlock.h>
d62fcd9f 23#include <linux/string.h>
79aabb1e 24
380c7ba3
AS
25#include <linux/gpio.h>
26#include <linux/gpio/driver.h>
27#include <linux/gpio/machine.h>
28
3c702e99 29#include <uapi/linux/gpio.h>
d2876d08 30
77cb907a 31#include "gpiolib-acpi.h"
925ca369 32#include "gpiolib-cdev.h"
79aabb1e
AS
33#include "gpiolib-of.h"
34#include "gpiolib-swnode.h"
ef087d8e 35#include "gpiolib-sysfs.h"
79aabb1e 36#include "gpiolib.h"
664e3e5a 37
3f397c21
UKK
38#define CREATE_TRACE_POINTS
39#include <trace/events/gpio.h>
d2876d08 40
79a9becd 41/* Implementation infrastructure for GPIO interfaces.
d2876d08 42 *
79a9becd
AC
43 * The GPIO programming interface allows for inlining speed-critical
44 * get/set operations for common cases, so that access to SOC-integrated
45 * GPIOs can sometimes cost only an instruction or two per bit.
d2876d08
DB
46 */
47
ff2b1359
LW
48/* Device and char device-related information */
49static DEFINE_IDA(gpio_ida);
3c702e99
LW
50static dev_t gpio_devt;
51#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
c135f401
AS
52
53static int gpio_bus_match(struct device *dev, struct device_driver *drv)
54{
55 struct fwnode_handle *fwnode = dev_fwnode(dev);
56
57 /*
58 * Only match if the fwnode doesn't already have a proper struct device
59 * created for it.
60 */
61 if (fwnode && fwnode->dev != dev)
62 return 0;
63 return 1;
64}
65
3c702e99
LW
66static struct bus_type gpio_bus_type = {
67 .name = "gpio",
ced2af41 68 .match = gpio_bus_match,
3c702e99 69};
ff2b1359 70
3027743f
LA
71/*
72 * Number of GPIOs to use for the fast path in set array
73 */
74#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
75
d2876d08
DB
76/* gpio_lock prevents conflicts during gpio_desc[] table updates.
77 * While any GPIO is requested, its gpio_chip is not removable;
78 * each GPIO's "requested" flag serves as a lock and refcount.
79 */
0eb4c6c2 80DEFINE_SPINLOCK(gpio_lock);
d2876d08 81
bae48da2
AC
82static DEFINE_MUTEX(gpio_lookup_lock);
83static LIST_HEAD(gpio_lookup_list);
ff2b1359 84LIST_HEAD(gpio_devices);
6d86750c 85
a411e81e
BG
86static DEFINE_MUTEX(gpio_machine_hogs_mutex);
87static LIST_HEAD(gpio_machine_hogs);
88
a0b66a73
LW
89static void gpiochip_free_hogs(struct gpio_chip *gc);
90static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
91 struct lock_class_key *lock_key,
92 struct lock_class_key *request_key);
a0b66a73
LW
93static void gpiochip_irqchip_remove(struct gpio_chip *gc);
94static int gpiochip_irqchip_init_hw(struct gpio_chip *gc);
95static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc);
96static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc);
6d86750c 97
159f3cd9 98static bool gpiolib_initialized;
6d86750c 99
d2876d08
DB
100static inline void desc_set_label(struct gpio_desc *d, const char *label)
101{
d2876d08 102 d->label = label;
d2876d08
DB
103}
104
372e722e 105/**
950d55f5
TR
106 * gpio_to_desc - Convert a GPIO number to its descriptor
107 * @gpio: global GPIO number
108 *
109 * Returns:
110 * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
111 * with the given number exists in the system.
372e722e 112 */
79a9becd 113struct gpio_desc *gpio_to_desc(unsigned gpio)
372e722e 114{
ff2b1359 115 struct gpio_device *gdev;
efb8235b
BG
116 unsigned long flags;
117
118 spin_lock_irqsave(&gpio_lock, flags);
14e85c0e 119
efb8235b
BG
120 list_for_each_entry(gdev, &gpio_devices, list) {
121 if (gdev->base <= gpio &&
122 gdev->base + gdev->ngpio > gpio) {
123 spin_unlock_irqrestore(&gpio_lock, flags);
124 return &gdev->descs[gpio - gdev->base];
14e85c0e
AC
125 }
126 }
127
efb8235b
BG
128 spin_unlock_irqrestore(&gpio_lock, flags);
129
0e9a5edf 130 if (!gpio_is_valid(gpio))
c47d9e1b 131 pr_warn("invalid GPIO %d\n", gpio);
0e9a5edf 132
14e85c0e 133 return NULL;
372e722e 134}
79a9becd 135EXPORT_SYMBOL_GPL(gpio_to_desc);
372e722e 136
93548f8b
BG
137/* This function is deprecated and will be removed soon, don't use. */
138struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc,
139 unsigned int hwnum)
140{
141 return gpio_device_get_desc(gc->gpiodev, hwnum);
142}
143EXPORT_SYMBOL_GPL(gpiochip_get_desc);
144
d468bf9e 145/**
93548f8b
BG
146 * gpio_device_get_desc() - get the GPIO descriptor corresponding to the given
147 * hardware number for this GPIO device
148 * @gdev: GPIO device to get the descriptor from
950d55f5
TR
149 * @hwnum: hardware number of the GPIO for this chip
150 *
151 * Returns:
93548f8b
BG
152 * A pointer to the GPIO descriptor or %EINVAL if no GPIO exists in the given
153 * chip for the specified hardware number or %ENODEV if the underlying chip
154 * already vanished.
155 *
156 * The reference count of struct gpio_device is *NOT* increased like when the
157 * GPIO is being requested for exclusive usage. It's up to the caller to make
158 * sure the GPIO device will stay alive together with the descriptor returned
159 * by this function.
d468bf9e 160 */
93548f8b
BG
161struct gpio_desc *
162gpio_device_get_desc(struct gpio_device *gdev, unsigned int hwnum)
d468bf9e 163{
93548f8b
BG
164 struct gpio_chip *gc;
165
166 /*
167 * FIXME: This will be locked once we protect gdev->chip everywhere
168 * with SRCU.
169 */
170 gc = gdev->chip;
171 if (!gc)
172 return ERR_PTR(-ENODEV);
fdeb8e15
LW
173
174 if (hwnum >= gdev->ngpio)
b7d0a28a 175 return ERR_PTR(-EINVAL);
d468bf9e 176
fdeb8e15 177 return &gdev->descs[hwnum];
d468bf9e 178}
93548f8b 179EXPORT_SYMBOL_GPL(gpio_device_get_desc);
372e722e
AC
180
181/**
950d55f5
TR
182 * desc_to_gpio - convert a GPIO descriptor to the integer namespace
183 * @desc: GPIO descriptor
184 *
372e722e 185 * This should disappear in the future but is needed since we still
950d55f5
TR
186 * use GPIO numbers for error messages and sysfs nodes.
187 *
188 * Returns:
189 * The global GPIO number for the GPIO specified by its descriptor.
372e722e 190 */
79a9becd 191int desc_to_gpio(const struct gpio_desc *desc)
372e722e 192{
fdeb8e15 193 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
372e722e 194}
79a9becd 195EXPORT_SYMBOL_GPL(desc_to_gpio);
372e722e
AC
196
197
79a9becd
AC
198/**
199 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
200 * @desc: descriptor to return the chip of
201 */
202struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
372e722e 203{
dd3b9a44 204 if (!desc || !desc->gdev)
fdeb8e15
LW
205 return NULL;
206 return desc->gdev->chip;
372e722e 207}
79a9becd 208EXPORT_SYMBOL_GPL(gpiod_to_chip);
d2876d08 209
370232d0
BG
210/**
211 * gpiod_to_gpio_device() - Return the GPIO device to which this descriptor
212 * belongs.
213 * @desc: Descriptor for which to return the GPIO device.
214 *
215 * This *DOES NOT* increase the reference count of the GPIO device as it's
216 * expected that the descriptor is requested and the users already holds a
217 * reference to the device.
218 *
219 * Returns:
220 * Address of the GPIO device owning this descriptor.
221 */
222struct gpio_device *gpiod_to_gpio_device(struct gpio_desc *desc)
223{
224 if (!desc)
225 return NULL;
226
227 return desc->gdev;
228}
229EXPORT_SYMBOL_GPL(gpiod_to_gpio_device);
230
8c85a102
BG
231/**
232 * gpio_device_get_base() - Get the base GPIO number allocated by this device
233 * @gdev: GPIO device
234 *
235 * Returns:
236 * First GPIO number in the global GPIO numberspace for this device.
237 */
238int gpio_device_get_base(struct gpio_device *gdev)
239{
240 return gdev->base;
241}
242EXPORT_SYMBOL_GPL(gpio_device_get_base);
243
d1f77282
BG
244/**
245 * gpio_device_get_label() - Get the label of this GPIO device
246 * @gdev: GPIO device
247 *
248 * Returns:
249 * Pointer to the string containing the GPIO device label. The string's
250 * lifetime is tied to that of the underlying GPIO device.
251 */
252const char *gpio_device_get_label(struct gpio_device *gdev)
253{
254 return gdev->label;
255}
256EXPORT_SYMBOL(gpio_device_get_label);
257
9b418780
BG
258/**
259 * gpio_device_get_chip() - Get the gpio_chip implementation of this GPIO device
260 * @gdev: GPIO device
261 *
262 * Returns:
263 * Address of the GPIO chip backing this device.
264 *
265 * Until we can get rid of all non-driver users of struct gpio_chip, we must
266 * provide a way of retrieving the pointer to it from struct gpio_device. This
267 * is *NOT* safe as the GPIO API is considered to be hot-unpluggable and the
268 * chip can dissapear at any moment (unlike reference-counted struct
269 * gpio_device).
270 *
271 * Use at your own risk.
272 */
273struct gpio_chip *gpio_device_get_chip(struct gpio_device *gdev)
274{
275 return gdev->chip;
276}
277EXPORT_SYMBOL_GPL(gpio_device_get_chip);
278
8d0aab2f 279/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
f95fd4ac 280static int gpiochip_find_base_unlocked(int ngpio)
8d0aab2f 281{
ff2b1359 282 struct gpio_device *gdev;
7b61212f 283 int base = GPIO_DYNAMIC_BASE;
8d0aab2f 284
7b61212f 285 list_for_each_entry(gdev, &gpio_devices, list) {
83cabe33 286 /* found a free space? */
7b61212f 287 if (gdev->base >= base + ngpio)
83cabe33 288 break;
7b61212f
CL
289 /* nope, check the space right after the chip */
290 base = gdev->base + gdev->ngpio;
7dd3d9bd
AK
291 if (base < GPIO_DYNAMIC_BASE)
292 base = GPIO_DYNAMIC_BASE;
8d0aab2f
AV
293 }
294
83cabe33 295 if (gpio_is_valid(base)) {
8d0aab2f 296 pr_debug("%s: found new base at %d\n", __func__, base);
83cabe33
AC
297 return base;
298 } else {
299 pr_err("%s: cannot find free range\n", __func__);
300 return -ENOSPC;
169b6a7a 301 }
169b6a7a
AV
302}
303
79a9becd
AC
304/**
305 * gpiod_get_direction - return the current direction of a GPIO
306 * @desc: GPIO to get the direction of
307 *
94fc7309 308 * Returns 0 for output, 1 for input, or an error code in case of error.
79a9becd
AC
309 *
310 * This function may sleep if gpiod_cansleep() is true.
311 */
8e53b0f1 312int gpiod_get_direction(struct gpio_desc *desc)
80b0a602 313{
a0b66a73 314 struct gpio_chip *gc;
13daf489 315 unsigned int offset;
d377f56f 316 int ret;
80b0a602 317
a0b66a73 318 gc = gpiod_to_chip(desc);
372e722e 319 offset = gpio_chip_hwgpio(desc);
80b0a602 320
256efaea
RK
321 /*
322 * Open drain emulation using input mode may incorrectly report
323 * input here, fix that up.
324 */
325 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) &&
326 test_bit(FLAG_IS_OUT, &desc->flags))
327 return 0;
328
a0b66a73 329 if (!gc->get_direction)
d0121b85 330 return -ENOTSUPP;
80b0a602 331
a0b66a73 332 ret = gc->get_direction(gc, offset);
4fc5bfeb
AS
333 if (ret < 0)
334 return ret;
335
336 /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */
337 if (ret > 0)
d377f56f 338 ret = 1;
4fc5bfeb
AS
339
340 assign_bit(FLAG_IS_OUT, &desc->flags, !ret);
341
d377f56f 342 return ret;
80b0a602 343}
79a9becd 344EXPORT_SYMBOL_GPL(gpiod_get_direction);
80b0a602 345
1a989d0f
AC
346/*
347 * Add a new chip to the global chips list, keeping the list of chips sorted
ef7c7553 348 * by range(means [base, base + ngpio - 1]) order.
1a989d0f
AC
349 *
350 * Return -EBUSY if the new chip overlaps with some other chip's integer
351 * space.
352 */
f95fd4ac 353static int gpiodev_add_to_list_unlocked(struct gpio_device *gdev)
1a989d0f 354{
a961f9b4 355 struct gpio_device *prev, *next;
1a989d0f 356
ff2b1359 357 if (list_empty(&gpio_devices)) {
a961f9b4 358 /* initial entry in list */
ff2b1359 359 list_add_tail(&gdev->list, &gpio_devices);
e28ecca6 360 return 0;
1a989d0f
AC
361 }
362
243cfa6a 363 next = list_first_entry(&gpio_devices, struct gpio_device, list);
a961f9b4
BJZ
364 if (gdev->base + gdev->ngpio <= next->base) {
365 /* add before first entry */
366 list_add(&gdev->list, &gpio_devices);
367 return 0;
1a989d0f
AC
368 }
369
243cfa6a 370 prev = list_last_entry(&gpio_devices, struct gpio_device, list);
a961f9b4
BJZ
371 if (prev->base + prev->ngpio <= gdev->base) {
372 /* add behind last entry */
373 list_add_tail(&gdev->list, &gpio_devices);
96098df1 374 return 0;
1a989d0f
AC
375 }
376
a961f9b4
BJZ
377 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
378 /* at the end of the list */
379 if (&next->list == &gpio_devices)
380 break;
1a989d0f 381
a961f9b4
BJZ
382 /* add between prev and next */
383 if (prev->base + prev->ngpio <= gdev->base
384 && gdev->base + gdev->ngpio <= next->base) {
385 list_add(&gdev->list, &prev->list);
386 return 0;
387 }
388 }
389
a961f9b4 390 return -EBUSY;
1a989d0f
AC
391}
392
950d55f5 393/*
f881bab0 394 * Convert a GPIO name to its descriptor
582838ea
GU
395 * Note that there is no guarantee that GPIO names are globally unique!
396 * Hence this function will return, if it exists, a reference to the first GPIO
397 * line found that matches the given name.
f881bab0
LW
398 */
399static struct gpio_desc *gpio_name_to_desc(const char * const name)
400{
ff2b1359 401 struct gpio_device *gdev;
efb8235b 402 unsigned long flags;
f881bab0 403
ee203bbd
MM
404 if (!name)
405 return NULL;
406
efb8235b 407 spin_lock_irqsave(&gpio_lock, flags);
f881bab0 408
ff2b1359 409 list_for_each_entry(gdev, &gpio_devices, list) {
66f46e37 410 struct gpio_desc *desc;
f881bab0 411
66f46e37 412 for_each_gpio_desc(gdev->chip, desc) {
efb8235b
BG
413 if (desc->name && !strcmp(desc->name, name)) {
414 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 415 return desc;
efb8235b 416 }
f881bab0
LW
417 }
418 }
419
efb8235b
BG
420 spin_unlock_irqrestore(&gpio_lock, flags);
421
f881bab0
LW
422 return NULL;
423}
424
5f3ca732 425/*
582838ea
GU
426 * Take the names from gc->names and assign them to their GPIO descriptors.
427 * Warn if a name is already used for a GPIO line on a different GPIO chip.
5f3ca732 428 *
582838ea
GU
429 * Note that:
430 * 1. Non-unique names are still accepted,
431 * 2. Name collisions within the same GPIO chip are not reported.
5f3ca732
MP
432 */
433static int gpiochip_set_desc_names(struct gpio_chip *gc)
434{
fdeb8e15 435 struct gpio_device *gdev = gc->gpiodev;
5f3ca732
MP
436 int i;
437
5f3ca732
MP
438 /* First check all names if they are unique */
439 for (i = 0; i != gc->ngpio; ++i) {
440 struct gpio_desc *gpio;
441
442 gpio = gpio_name_to_desc(gc->names[i]);
f881bab0 443 if (gpio)
fdeb8e15 444 dev_warn(&gdev->dev,
34ffd85d 445 "Detected name collision for GPIO name '%s'\n",
f881bab0 446 gc->names[i]);
5f3ca732
MP
447 }
448
449 /* Then add all names to the GPIO descriptors */
450 for (i = 0; i != gc->ngpio; ++i)
fdeb8e15 451 gdev->descs[i].name = gc->names[i];
5f3ca732
MP
452
453 return 0;
454}
455
32fc5aa2 456/*
0c5ebb4c 457 * gpiochip_set_names - Set GPIO line names using device properties
32fc5aa2
BG
458 * @chip: GPIO chip whose lines should be named, if possible
459 *
460 * Looks for device property "gpio-line-names" and if it exists assigns
461 * GPIO line names for the chip. The memory allocated for the assigned
b41ba2ec 462 * names belong to the underlying firmware node and should not be released
32fc5aa2
BG
463 * by the caller.
464 */
0c5ebb4c 465static int gpiochip_set_names(struct gpio_chip *chip)
32fc5aa2
BG
466{
467 struct gpio_device *gdev = chip->gpiodev;
4ef339bc 468 struct device *dev = &gdev->dev;
32fc5aa2
BG
469 const char **names;
470 int ret, i;
471 int count;
472
4ef339bc 473 count = device_property_string_array_count(dev, "gpio-line-names");
32fc5aa2
BG
474 if (count < 0)
475 return 0;
476
4e804c39
SP
477 /*
478 * When offset is set in the driver side we assume the driver internally
479 * is using more than one gpiochip per the same device. We have to stop
480 * setting friendly names if the specified ones with 'gpio-line-names'
481 * are less than the offset in the device itself. This means all the
482 * lines are not present for every single pin within all the internal
483 * gpiochips.
484 */
485 if (count <= chip->offset) {
4ef339bc 486 dev_warn(dev, "gpio-line-names too short (length %d), cannot map names for the gpiochip at offset %u\n",
4e804c39
SP
487 count, chip->offset);
488 return 0;
32fc5aa2
BG
489 }
490
491 names = kcalloc(count, sizeof(*names), GFP_KERNEL);
492 if (!names)
493 return -ENOMEM;
494
4ef339bc 495 ret = device_property_read_string_array(dev, "gpio-line-names",
32fc5aa2
BG
496 names, count);
497 if (ret < 0) {
4ef339bc 498 dev_warn(dev, "failed to read GPIO line names\n");
32fc5aa2
BG
499 kfree(names);
500 return ret;
501 }
502
4e804c39
SP
503 /*
504 * When more that one gpiochip per device is used, 'count' can
505 * contain at most number gpiochips x chip->ngpio. We have to
506 * correctly distribute all defined lines taking into account
507 * chip->offset as starting point from where we will assign
508 * the names to pins from the 'names' array. Since property
509 * 'gpio-line-names' cannot contains gaps, we have to be sure
510 * we only assign those pins that really exists since chip->ngpio
511 * can be different of the chip->offset.
512 */
513 count = (count > chip->offset) ? count - chip->offset : count;
514 if (count > chip->ngpio)
515 count = chip->ngpio;
516
c73960bb
PR
517 for (i = 0; i < count; i++) {
518 /*
519 * Allow overriding "fixed" names provided by the GPIO
520 * provider. The "fixed" names are more often than not
521 * generic and less informative than the names given in
522 * device properties.
523 */
524 if (names[chip->offset + i] && names[chip->offset + i][0])
525 gdev->descs[i].name = names[chip->offset + i];
526 }
32fc5aa2
BG
527
528 kfree(names);
529
530 return 0;
531}
532
a0b66a73 533static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc)
e4371f6e
SB
534{
535 unsigned long *p;
536
a0b66a73 537 p = bitmap_alloc(gc->ngpio, GFP_KERNEL);
e4371f6e
SB
538 if (!p)
539 return NULL;
540
541 /* Assume by default all GPIOs are valid */
a0b66a73 542 bitmap_fill(p, gc->ngpio);
e4371f6e
SB
543
544 return p;
545}
546
05a854c5
AS
547static void gpiochip_free_mask(unsigned long **p)
548{
549 bitmap_free(*p);
550 *p = NULL;
551}
552
27043a7d
AS
553static unsigned int gpiochip_count_reserved_ranges(struct gpio_chip *gc)
554{
4ef339bc 555 struct device *dev = &gc->gpiodev->dev;
27043a7d
AS
556 int size;
557
558 /* Format is "start, count, ..." */
4ef339bc 559 size = device_property_count_u32(dev, "gpio-reserved-ranges");
27043a7d
AS
560 if (size > 0 && size % 2 == 0)
561 return size;
562
563 return 0;
564}
565
27043a7d
AS
566static int gpiochip_apply_reserved_ranges(struct gpio_chip *gc)
567{
4ef339bc 568 struct device *dev = &gc->gpiodev->dev;
27043a7d
AS
569 unsigned int size;
570 u32 *ranges;
571 int ret;
572
573 size = gpiochip_count_reserved_ranges(gc);
574 if (size == 0)
575 return 0;
576
577 ranges = kmalloc_array(size, sizeof(*ranges), GFP_KERNEL);
578 if (!ranges)
579 return -ENOMEM;
580
4ef339bc
AS
581 ret = device_property_read_u32_array(dev, "gpio-reserved-ranges",
582 ranges, size);
27043a7d
AS
583 if (ret) {
584 kfree(ranges);
585 return ret;
586 }
587
588 while (size) {
589 u32 count = ranges[--size];
590 u32 start = ranges[--size];
591
592 if (start >= gc->ngpio || start + count > gc->ngpio)
593 continue;
594
595 bitmap_clear(gc->valid_mask, start, count);
596 }
597
598 kfree(ranges);
599 return 0;
600}
601
c9fc5aff 602static int gpiochip_init_valid_mask(struct gpio_chip *gc)
f8ec92a9 603{
27043a7d
AS
604 int ret;
605
1a55fc40
AS
606 if (!(gpiochip_count_reserved_ranges(gc) || gc->init_valid_mask))
607 return 0;
608
609 gc->valid_mask = gpiochip_allocate_mask(gc);
610 if (!gc->valid_mask)
611 return -ENOMEM;
612
27043a7d
AS
613 ret = gpiochip_apply_reserved_ranges(gc);
614 if (ret)
615 return ret;
616
c9fc5aff
LW
617 if (gc->init_valid_mask)
618 return gc->init_valid_mask(gc,
619 gc->valid_mask,
620 gc->ngpio);
f8ec92a9
RRD
621
622 return 0;
623}
624
a0b66a73 625static void gpiochip_free_valid_mask(struct gpio_chip *gc)
726cb3ba 626{
05a854c5 627 gpiochip_free_mask(&gc->valid_mask);
726cb3ba
SB
628}
629
b056ca1c
AS
630static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
631{
c40aa80d
AS
632 /*
633 * Device Tree platforms are supposed to use "gpio-ranges"
634 * property. This check ensures that the ->add_pin_ranges()
635 * won't be called for them.
636 */
637 if (device_property_present(&gc->gpiodev->dev, "gpio-ranges"))
638 return 0;
639
b056ca1c
AS
640 if (gc->add_pin_ranges)
641 return gc->add_pin_ranges(gc);
642
643 return 0;
644}
645
a0b66a73 646bool gpiochip_line_is_valid(const struct gpio_chip *gc,
726cb3ba
SB
647 unsigned int offset)
648{
649 /* No mask means all valid */
a0b66a73 650 if (likely(!gc->valid_mask))
726cb3ba 651 return true;
a0b66a73 652 return test_bit(offset, gc->valid_mask);
726cb3ba
SB
653}
654EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
655
7aa90f90 656static void gpiodev_release(struct device *dev)
ff2b1359 657{
3b7c7478 658 struct gpio_device *gdev = to_gpio_device(dev);
ff2b1359 659
8d4a85b6 660 ida_free(&gpio_ida, gdev->id);
fcf273e5 661 kfree_const(gdev->label);
476e2fc5 662 kfree(gdev->descs);
9efd9e69 663 kfree(gdev);
ff2b1359
LW
664}
665
1f5eb8b1
KG
666#ifdef CONFIG_GPIO_CDEV
667#define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt))
668#define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev))
669#else
670/*
671 * gpiolib_cdev_register() indirectly calls device_add(), which is still
672 * required even when cdev is not selected.
673 */
674#define gcdev_register(gdev, devt) device_add(&(gdev)->dev)
675#define gcdev_unregister(gdev) device_del(&(gdev)->dev)
676#endif
677
159f3cd9
GR
678static int gpiochip_setup_dev(struct gpio_device *gdev)
679{
67f64d15 680 struct fwnode_handle *fwnode = dev_fwnode(&gdev->dev);
d377f56f 681 int ret;
159f3cd9 682
38dfa56b
SK
683 /*
684 * If fwnode doesn't belong to another device, it's safe to clear its
685 * initialized flag.
686 */
67f64d15
AS
687 if (fwnode && !fwnode->dev)
688 fwnode_dev_initialized(fwnode, false);
38dfa56b 689
1f5eb8b1 690 ret = gcdev_register(gdev, gpio_devt);
d377f56f
LW
691 if (ret)
692 return ret;
111379dc 693
ec851b23 694 /* From this point, the .release() function cleans up gpio_device */
7aa90f90 695 gdev->dev.release = gpiodev_release;
ec851b23 696
d377f56f
LW
697 ret = gpiochip_sysfs_register(gdev);
698 if (ret)
159f3cd9
GR
699 goto err_remove_device;
700
262b9011
GU
701 dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base,
702 gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic");
159f3cd9
GR
703
704 return 0;
705
706err_remove_device:
1f5eb8b1 707 gcdev_unregister(gdev);
d377f56f 708 return ret;
159f3cd9
GR
709}
710
a0b66a73 711static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog)
a411e81e
BG
712{
713 struct gpio_desc *desc;
714 int rv;
715
a0b66a73 716 desc = gpiochip_get_desc(gc, hog->chip_hwnum);
a411e81e 717 if (IS_ERR(desc)) {
262b9011
GU
718 chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__,
719 PTR_ERR(desc));
a411e81e
BG
720 return;
721 }
722
ba3efdff 723 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
a411e81e
BG
724 return;
725
726 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
727 if (rv)
262b9011
GU
728 gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n",
729 __func__, gc->label, hog->chip_hwnum, rv);
a411e81e
BG
730}
731
a0b66a73 732static void machine_gpiochip_add(struct gpio_chip *gc)
a411e81e
BG
733{
734 struct gpiod_hog *hog;
735
736 mutex_lock(&gpio_machine_hogs_mutex);
737
738 list_for_each_entry(hog, &gpio_machine_hogs, list) {
a0b66a73
LW
739 if (!strcmp(gc->label, hog->chip_label))
740 gpiochip_machine_hog(gc, hog);
a411e81e
BG
741 }
742
743 mutex_unlock(&gpio_machine_hogs_mutex);
744}
745
159f3cd9
GR
746static void gpiochip_setup_devs(void)
747{
748 struct gpio_device *gdev;
d377f56f 749 int ret;
159f3cd9
GR
750
751 list_for_each_entry(gdev, &gpio_devices, list) {
d377f56f
LW
752 ret = gpiochip_setup_dev(gdev);
753 if (ret)
262b9011
GU
754 dev_err(&gdev->dev,
755 "Failed to initialize gpio device (%d)\n", ret);
159f3cd9
GR
756 }
757}
758
7b59bdbc
AS
759static void gpiochip_set_data(struct gpio_chip *gc, void *data)
760{
761 gc->gpiodev->data = data;
762}
763
8deb779d
AS
764/**
765 * gpiochip_get_data() - get per-subdriver data for the chip
766 * @gc: GPIO chip
767 *
768 * Returns:
769 * The per-subdriver data for the chip.
770 */
771void *gpiochip_get_data(struct gpio_chip *gc)
772{
773 return gc->gpiodev->data;
774}
775EXPORT_SYMBOL_GPL(gpiochip_get_data);
776
55b2395e
AM
777int gpiochip_get_ngpios(struct gpio_chip *gc, struct device *dev)
778{
779 u32 ngpios = gc->ngpio;
780 int ret;
781
782 if (ngpios == 0) {
783 ret = device_property_read_u32(dev, "ngpios", &ngpios);
784 if (ret == -ENODATA)
785 /*
786 * -ENODATA means that there is no property found and
787 * we want to issue the error message to the user.
788 * Besides that, we want to return different error code
789 * to state that supplied value is not valid.
790 */
791 ngpios = 0;
792 else if (ret)
793 return ret;
794
795 gc->ngpio = ngpios;
796 }
797
798 if (gc->ngpio == 0) {
799 chip_err(gc, "tried to insert a GPIO chip with zero lines\n");
800 return -EINVAL;
801 }
802
803 if (gc->ngpio > FASTPATH_NGPIO)
804 chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n",
805 gc->ngpio, FASTPATH_NGPIO);
806
807 return 0;
808}
809EXPORT_SYMBOL_GPL(gpiochip_get_ngpios);
810
a0b66a73 811int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
39c3fd58
AL
812 struct lock_class_key *lock_key,
813 struct lock_class_key *request_key)
d2876d08 814{
ff2b1359 815 struct gpio_device *gdev;
efb8235b 816 unsigned long flags;
e5ab49cd 817 unsigned int i;
ec851b23 818 int base = 0;
e5ab49cd 819 int ret = 0;
d2876d08 820
ff2b1359
LW
821 /*
822 * First: allocate and populate the internal stat container, and
823 * set up the struct device.
824 */
969f07b4 825 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
ff2b1359 826 if (!gdev)
14e85c0e 827 return -ENOMEM;
3c702e99 828 gdev->dev.bus = &gpio_bus_type;
1df62542 829 gdev->dev.parent = gc->parent;
a0b66a73 830 gdev->chip = gc;
7b59bdbc 831
a0b66a73 832 gc->gpiodev = gdev;
7b59bdbc 833 gpiochip_set_data(gc, data);
acc6e331 834
daecca4b
AS
835 /*
836 * If the calling driver did not initialize firmware node,
837 * do it here using the parent device, if any.
838 */
839 if (gc->fwnode)
840 device_set_node(&gdev->dev, gc->fwnode);
841 else if (gc->parent)
842 device_set_node(&gdev->dev, dev_fwnode(gc->parent));
6cb59afe 843
8d4a85b6 844 gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL);
ff2b1359 845 if (gdev->id < 0) {
d377f56f 846 ret = gdev->id;
ff2b1359
LW
847 goto err_free_gdev;
848 }
c351bb64
QW
849
850 ret = dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id);
851 if (ret)
852 goto err_free_ida;
853
ff2b1359 854 device_initialize(&gdev->dev);
a0b66a73
LW
855 if (gc->parent && gc->parent->driver)
856 gdev->owner = gc->parent->driver->owner;
857 else if (gc->owner)
ff2b1359 858 /* TODO: remove chip->owner */
a0b66a73 859 gdev->owner = gc->owner;
ff2b1359
LW
860 else
861 gdev->owner = THIS_MODULE;
d2876d08 862
55b2395e
AM
863 ret = gpiochip_get_ngpios(gc, &gdev->dev);
864 if (ret)
ec851b23 865 goto err_free_dev_name;
3027743f 866
ec851b23
ZH
867 gdev->descs = kcalloc(gc->ngpio, sizeof(*gdev->descs), GFP_KERNEL);
868 if (!gdev->descs) {
869 ret = -ENOMEM;
870 goto err_free_dev_name;
871 }
872
a0b66a73 873 gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL);
df4878e9 874 if (!gdev->label) {
d377f56f 875 ret = -ENOMEM;
476e2fc5 876 goto err_free_descs;
df4878e9
LW
877 }
878
a0b66a73 879 gdev->ngpio = gc->ngpio;
5ed41cc4 880
efb8235b 881 spin_lock_irqsave(&gpio_lock, flags);
d2876d08 882
efb8235b
BG
883 /*
884 * TODO: this allocates a Linux GPIO number base in the global
885 * GPIO numberspace for this chip. In the long run we want to
886 * get *rid* of this numberspace and use only descriptors, but
887 * it may be a pipe dream. It will not happen before we get rid
888 * of the sysfs interface anyways.
889 */
890 base = gc->base;
891 if (base < 0) {
892 base = gpiochip_find_base_unlocked(gc->ngpio);
8d0aab2f 893 if (base < 0) {
efb8235b
BG
894 spin_unlock_irqrestore(&gpio_lock, flags);
895 ret = base;
896 base = 0;
476e2fc5 897 goto err_free_label;
8d0aab2f 898 }
efb8235b
BG
899 /*
900 * TODO: it should not be necessary to reflect the assigned
901 * base outside of the GPIO subsystem. Go over drivers and
902 * see if anyone makes use of this, else drop this and assign
903 * a poison instead.
904 */
905 gc->base = base;
906 } else {
907 dev_warn(&gdev->dev,
908 "Static allocation of GPIO base is deprecated, use dynamic allocation.\n");
909 }
910 gdev->base = base;
8d0aab2f 911
efb8235b
BG
912 ret = gpiodev_add_to_list_unlocked(gdev);
913 if (ret) {
914 spin_unlock_irqrestore(&gpio_lock, flags);
915 chip_err(gc, "GPIO integer space overlap, cannot add chip\n");
916 goto err_free_label;
05aa5203 917 }
1a989d0f 918
efb8235b
BG
919 for (i = 0; i < gc->ngpio; i++)
920 gdev->descs[i].gdev = gdev;
921
922 spin_unlock_irqrestore(&gpio_lock, flags);
923
17a7ca35 924 BLOCKING_INIT_NOTIFIER_HEAD(&gdev->line_state_notifier);
a067419b 925 BLOCKING_INIT_NOTIFIER_HEAD(&gdev->device_notifier);
bdbbae24 926 init_rwsem(&gdev->sem);
51c1064e 927
f23f1516 928#ifdef CONFIG_PINCTRL
20ec3e39 929 INIT_LIST_HEAD(&gdev->pin_ranges);
f23f1516
SH
930#endif
931
c73960bb 932 if (gc->names) {
7cba1a4d 933 ret = gpiochip_set_desc_names(gc);
c73960bb
PR
934 if (ret)
935 goto err_remove_from_list;
936 }
0c5ebb4c 937 ret = gpiochip_set_names(gc);
d377f56f 938 if (ret)
5f3ca732
MP
939 goto err_remove_from_list;
940
1a55fc40 941 ret = gpiochip_init_valid_mask(gc);
d377f56f 942 if (ret)
48057ed1 943 goto err_remove_from_list;
e0d89728 944
a0b66a73 945 ret = of_gpiochip_add(gc);
d377f56f 946 if (ret)
48057ed1 947 goto err_free_gpiochip_mask;
28355f81 948
a0b66a73 949 for (i = 0; i < gc->ngpio; i++) {
3edfb7bd
RRD
950 struct gpio_desc *desc = &gdev->descs[i];
951
a0b66a73 952 if (gc->get_direction && gpiochip_line_is_valid(gc, i)) {
4fc5bfeb 953 assign_bit(FLAG_IS_OUT,
a0b66a73 954 &desc->flags, !gc->get_direction(gc, i));
d95da993 955 } else {
4fc5bfeb 956 assign_bit(FLAG_IS_OUT,
a0b66a73 957 &desc->flags, !gc->direction_input);
d95da993 958 }
3edfb7bd
RRD
959 }
960
a0b66a73 961 ret = gpiochip_add_pin_ranges(gc);
b056ca1c
AS
962 if (ret)
963 goto err_remove_of_chip;
964
a0b66a73 965 acpi_gpiochip_add(gc);
391c970c 966
a0b66a73 967 machine_gpiochip_add(gc);
a411e81e 968
a0b66a73 969 ret = gpiochip_irqchip_init_valid_mask(gc);
9411e3aa
AS
970 if (ret)
971 goto err_remove_acpi_chip;
972
a0b66a73 973 ret = gpiochip_irqchip_init_hw(gc);
fbdf8d4b 974 if (ret)
48057ed1
LW
975 goto err_remove_acpi_chip;
976
a0b66a73 977 ret = gpiochip_add_irqchip(gc, lock_key, request_key);
fbdf8d4b 978 if (ret)
48057ed1
LW
979 goto err_remove_irqchip_mask;
980
3c702e99
LW
981 /*
982 * By first adding the chardev, and then adding the device,
983 * we get a device node entry in sysfs under
984 * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
985 * coldplug of device nodes and other udev business.
159f3cd9
GR
986 * We can do this only if gpiolib has been initialized.
987 * Otherwise, defer until later.
3c702e99 988 */
159f3cd9 989 if (gpiolib_initialized) {
d377f56f
LW
990 ret = gpiochip_setup_dev(gdev);
991 if (ret)
48057ed1 992 goto err_remove_irqchip;
159f3cd9 993 }
cedb1881 994 return 0;
3bae4811 995
48057ed1 996err_remove_irqchip:
a0b66a73 997 gpiochip_irqchip_remove(gc);
48057ed1 998err_remove_irqchip_mask:
a0b66a73 999 gpiochip_irqchip_free_valid_mask(gc);
35779890 1000err_remove_acpi_chip:
a0b66a73 1001 acpi_gpiochip_remove(gc);
35779890 1002err_remove_of_chip:
a0b66a73
LW
1003 gpiochip_free_hogs(gc);
1004 of_gpiochip_remove(gc);
35779890 1005err_free_gpiochip_mask:
a0b66a73
LW
1006 gpiochip_remove_pin_ranges(gc);
1007 gpiochip_free_valid_mask(gc);
2526dffc
BG
1008err_remove_from_list:
1009 spin_lock_irqsave(&gpio_lock, flags);
1010 list_del(&gdev->list);
1011 spin_unlock_irqrestore(&gpio_lock, flags);
ec851b23
ZH
1012 if (gdev->dev.release) {
1013 /* release() has been registered by gpiochip_setup_dev() */
dc0989e3 1014 gpio_device_put(gdev);
ec851b23
ZH
1015 goto err_print_message;
1016 }
476e2fc5 1017err_free_label:
fcf273e5 1018 kfree_const(gdev->label);
476e2fc5
GR
1019err_free_descs:
1020 kfree(gdev->descs);
c351bb64
QW
1021err_free_dev_name:
1022 kfree(dev_name(&gdev->dev));
a05a1404 1023err_free_ida:
8d4a85b6 1024 ida_free(&gpio_ida, gdev->id);
a05a1404 1025err_free_gdev:
ec851b23
ZH
1026 kfree(gdev);
1027err_print_message:
d2876d08 1028 /* failures here can mean systems won't boot... */
3cc1fb73
GS
1029 if (ret != -EPROBE_DEFER) {
1030 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
55b2395e 1031 base, base + (int)gc->ngpio - 1,
3cc1fb73
GS
1032 gc->label ? : "generic", ret);
1033 }
d377f56f 1034 return ret;
d2876d08 1035}
959bc7b2 1036EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
d2876d08
DB
1037
1038/**
1039 * gpiochip_remove() - unregister a gpio_chip
a0b66a73 1040 * @gc: the chip to unregister
d2876d08
DB
1041 *
1042 * A gpio_chip with any GPIOs still requested may not be removed.
1043 */
a0b66a73 1044void gpiochip_remove(struct gpio_chip *gc)
d2876d08 1045{
a0b66a73 1046 struct gpio_device *gdev = gc->gpiodev;
0338f6a6
BG
1047 unsigned long flags;
1048 unsigned int i;
d2876d08 1049
bdbbae24
BG
1050 down_write(&gdev->sem);
1051
ff2b1359 1052 /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
afbc4f31 1053 gpiochip_sysfs_unregister(gdev);
a0b66a73 1054 gpiochip_free_hogs(gc);
bd203bd5
BJZ
1055 /* Numb the device, cancelling all outstanding operations */
1056 gdev->chip = NULL;
a0b66a73
LW
1057 gpiochip_irqchip_remove(gc);
1058 acpi_gpiochip_remove(gc);
1059 of_gpiochip_remove(gc);
1060 gpiochip_remove_pin_ranges(gc);
1061 gpiochip_free_valid_mask(gc);
43c54eca
LW
1062 /*
1063 * We accept no more calls into the driver from this point, so
7b59bdbc 1064 * NULL the driver data pointer.
43c54eca 1065 */
7b59bdbc 1066 gpiochip_set_data(gc, NULL);
391c970c 1067
6798acaa 1068 spin_lock_irqsave(&gpio_lock, flags);
fdeb8e15 1069 for (i = 0; i < gdev->ngpio; i++) {
f8d05e27 1070 if (test_bit(FLAG_REQUESTED, &gdev->descs[i].flags))
869233f8 1071 break;
d2876d08 1072 }
d2876d08 1073 spin_unlock_irqrestore(&gpio_lock, flags);
14e85c0e 1074
ca18a852 1075 if (i != gdev->ngpio)
fdeb8e15 1076 dev_crit(&gdev->dev,
58383c78 1077 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
fab28b89 1078
efb8235b 1079 scoped_guard(spinlock_irqsave, &gpio_lock)
48e1b4d3
BG
1080 list_del(&gdev->list);
1081
ff2b1359
LW
1082 /*
1083 * The gpiochip side puts its use of the device to rest here:
1084 * if there are no userspace clients, the chardev and device will
1085 * be removed, else it will be dangling until the last user is
1086 * gone.
1087 */
1f5eb8b1 1088 gcdev_unregister(gdev);
bdbbae24 1089 up_write(&gdev->sem);
dc0989e3 1090 gpio_device_put(gdev);
d2876d08
DB
1091}
1092EXPORT_SYMBOL_GPL(gpiochip_remove);
1093
cfe102f6
BG
1094/**
1095 * gpio_device_find() - find a specific GPIO device
1096 * @data: data to pass to match function
1097 * @match: Callback function to check gpio_chip
1098 *
1099 * Returns:
1100 * New reference to struct gpio_device.
1101 *
1102 * Similar to bus_find_device(). It returns a reference to a gpio_device as
1103 * determined by a user supplied @match callback. The callback should return
1104 * 0 if the device doesn't match and non-zero if it does. If the callback
1105 * returns non-zero, this function will return to the caller and not iterate
1106 * over any more gpio_devices.
1107 *
1108 * The callback takes the GPIO chip structure as argument. During the execution
1109 * of the callback function the chip is protected from being freed. TODO: This
1110 * actually has yet to be implemented.
1111 *
1112 * If the function returns non-NULL, the returned reference must be freed by
1113 * the caller using gpio_device_put().
1114 */
1115struct gpio_device *gpio_device_find(void *data,
1116 int (*match)(struct gpio_chip *gc,
1117 void *data))
1118{
1119 struct gpio_device *gdev;
1120
1121 /*
1122 * Not yet but in the future the spinlock below will become a mutex.
1123 * Annotate this function before anyone tries to use it in interrupt
1124 * context like it happened with gpiochip_find().
1125 */
1126 might_sleep();
1127
efb8235b 1128 guard(spinlock_irqsave)(&gpio_lock);
cfe102f6
BG
1129
1130 list_for_each_entry(gdev, &gpio_devices, list) {
1131 if (gdev->chip && match(gdev->chip, data))
1132 return gpio_device_get(gdev);
1133 }
1134
1135 return NULL;
1136}
1137EXPORT_SYMBOL_GPL(gpio_device_find);
1138
d62fcd9f
BG
1139static int gpio_chip_match_by_label(struct gpio_chip *gc, void *label)
1140{
1141 return gc->label && !strcmp(gc->label, label);
1142}
1143
1144/**
1145 * gpio_device_find_by_label() - wrapper around gpio_device_find() finding the
1146 * GPIO device by its backing chip's label
1147 * @label: Label to lookup
1148 *
1149 * Returns:
1150 * Reference to the GPIO device or NULL. Reference must be released with
1151 * gpio_device_put().
1152 */
1153struct gpio_device *gpio_device_find_by_label(const char *label)
1154{
1155 return gpio_device_find((void *)label, gpio_chip_match_by_label);
1156}
1157EXPORT_SYMBOL_GPL(gpio_device_find_by_label);
1158
668706b1
AS
1159static int gpio_chip_match_by_fwnode(struct gpio_chip *gc, void *fwnode)
1160{
1161 return device_match_fwnode(&gc->gpiodev->dev, fwnode);
1162}
1163
1164/**
1165 * gpio_device_find_by_fwnode() - wrapper around gpio_device_find() finding
1166 * the GPIO device by its fwnode
1167 * @fwnode: Firmware node to lookup
1168 *
1169 * Returns:
1170 * Reference to the GPIO device or NULL. Reference must be released with
1171 * gpio_device_put().
1172 */
1173struct gpio_device *gpio_device_find_by_fwnode(const struct fwnode_handle *fwnode)
1174{
1175 return gpio_device_find((void *)fwnode, gpio_chip_match_by_fwnode);
1176}
1177EXPORT_SYMBOL_GPL(gpio_device_find_by_fwnode);
1178
36aa129f
BG
1179/**
1180 * gpio_device_get() - Increase the reference count of this GPIO device
1181 * @gdev: GPIO device to increase the refcount for
1182 *
1183 * Returns:
1184 * Pointer to @gdev.
1185 */
1186struct gpio_device *gpio_device_get(struct gpio_device *gdev)
1187{
1188 return to_gpio_device(get_device(&gdev->dev));
1189}
1190EXPORT_SYMBOL_GPL(gpio_device_get);
1191
1192/**
1193 * gpio_device_put() - Decrease the reference count of this GPIO device and
1194 * possibly free all resources associated with it.
1195 * @gdev: GPIO device to decrease the reference count for
1196 */
1197void gpio_device_put(struct gpio_device *gdev)
1198{
1199 put_device(&gdev->dev);
1200}
1201EXPORT_SYMBOL_GPL(gpio_device_put);
1202
1559d149
BG
1203/**
1204 * gpio_device_to_device() - Retrieve the address of the underlying struct
1205 * device.
1206 * @gdev: GPIO device for which to return the address.
1207 *
1208 * This does not increase the reference count of the GPIO device nor the
1209 * underlying struct device.
1210 *
1211 * Returns:
1212 * Address of struct device backing this GPIO device.
1213 */
1214struct device *gpio_device_to_device(struct gpio_device *gdev)
1215{
1216 return &gdev->dev;
1217}
1218EXPORT_SYMBOL_GPL(gpio_device_to_device);
1219
14250520
LW
1220#ifdef CONFIG_GPIOLIB_IRQCHIP
1221
1222/*
1223 * The following is irqchip helper code for gpiochips.
1224 */
1225
9411e3aa
AS
1226static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
1227{
1228 struct gpio_irq_chip *girq = &gc->irq;
1229
1230 if (!girq->init_hw)
1231 return 0;
1232
1233 return girq->init_hw(gc);
1234}
1235
5fbe5b58 1236static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb 1237{
5fbe5b58
LW
1238 struct gpio_irq_chip *girq = &gc->irq;
1239
1240 if (!girq->init_valid_mask)
79b804cb
MW
1241 return 0;
1242
5fbe5b58
LW
1243 girq->valid_mask = gpiochip_allocate_mask(gc);
1244 if (!girq->valid_mask)
79b804cb
MW
1245 return -ENOMEM;
1246
5fbe5b58
LW
1247 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
1248
79b804cb
MW
1249 return 0;
1250}
1251
a0b66a73 1252static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 1253{
05a854c5 1254 gpiochip_free_mask(&gc->irq.valid_mask);
79b804cb
MW
1255}
1256
a0b66a73 1257bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc,
64ff2c8e 1258 unsigned int offset)
79b804cb 1259{
a0b66a73 1260 if (!gpiochip_line_is_valid(gc, offset))
726cb3ba 1261 return false;
79b804cb 1262 /* No mask means all valid */
a0b66a73 1263 if (likely(!gc->irq.valid_mask))
79b804cb 1264 return true;
a0b66a73 1265 return test_bit(offset, gc->irq.valid_mask);
79b804cb 1266}
64ff2c8e 1267EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
79b804cb 1268
fdd61a01
LW
1269#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1270
1271/**
1272 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
1273 * to a gpiochip
1274 * @gc: the gpiochip to set the irqchip hierarchical handler to
1275 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
1276 * will then percolate up to the parent
1277 */
1278static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
1279 struct irq_chip *irqchip)
1280{
1281 /* DT will deal with mapping each IRQ as we go along */
1282 if (is_of_node(gc->irq.fwnode))
1283 return;
1284
1285 /*
1286 * This is for legacy and boardfile "irqchip" fwnodes: allocate
1287 * irqs upfront instead of dynamically since we don't have the
1288 * dynamic type of allocation that hardware description languages
1289 * provide. Once all GPIO drivers using board files are gone from
1290 * the kernel we can delete this code, but for a transitional period
1291 * it is necessary to keep this around.
1292 */
1293 if (is_fwnode_irqchip(gc->irq.fwnode)) {
1294 int i;
1295 int ret;
1296
1297 for (i = 0; i < gc->ngpio; i++) {
1298 struct irq_fwspec fwspec;
1299 unsigned int parent_hwirq;
1300 unsigned int parent_type;
1301 struct gpio_irq_chip *girq = &gc->irq;
1302
1303 /*
1304 * We call the child to parent translation function
1305 * only to check if the child IRQ is valid or not.
1306 * Just pick the rising edge type here as that is what
1307 * we likely need to support.
1308 */
1309 ret = girq->child_to_parent_hwirq(gc, i,
1310 IRQ_TYPE_EDGE_RISING,
1311 &parent_hwirq,
1312 &parent_type);
1313 if (ret) {
1314 chip_err(gc, "skip set-up on hwirq %d\n",
1315 i);
1316 continue;
1317 }
1318
1319 fwspec.fwnode = gc->irq.fwnode;
1320 /* This is the hwirq for the GPIO line side of things */
1321 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
1322 /* Just pick something */
1323 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
1324 fwspec.param_count = 2;
908334ab
JH
1325 ret = irq_domain_alloc_irqs(gc->irq.domain, 1,
1326 NUMA_NO_NODE, &fwspec);
fdd61a01
LW
1327 if (ret < 0) {
1328 chip_err(gc,
1329 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1330 i, parent_hwirq,
1331 ret);
1332 }
1333 }
1334 }
1335
1336 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1337
1338 return;
1339}
1340
1341static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1342 struct irq_fwspec *fwspec,
1343 unsigned long *hwirq,
1344 unsigned int *type)
1345{
1346 /* We support standard DT translation */
1347 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1348 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1349 }
1350
1351 /* This is for board files and others not using DT */
1352 if (is_fwnode_irqchip(fwspec->fwnode)) {
1353 int ret;
1354
1355 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1356 if (ret)
1357 return ret;
1358 WARN_ON(*type == IRQ_TYPE_NONE);
1359 return 0;
1360 }
1361 return -EINVAL;
1362}
1363
1364static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1365 unsigned int irq,
1366 unsigned int nr_irqs,
1367 void *data)
1368{
1369 struct gpio_chip *gc = d->host_data;
1370 irq_hw_number_t hwirq;
1371 unsigned int type = IRQ_TYPE_NONE;
1372 struct irq_fwspec *fwspec = data;
91a29af4 1373 union gpio_irq_fwspec gpio_parent_fwspec = {};
fdd61a01
LW
1374 unsigned int parent_hwirq;
1375 unsigned int parent_type;
1376 struct gpio_irq_chip *girq = &gc->irq;
1377 int ret;
1378
1379 /*
1380 * The nr_irqs parameter is always one except for PCI multi-MSI
1381 * so this should not happen.
1382 */
1383 WARN_ON(nr_irqs != 1);
1384
1385 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
1386 if (ret)
1387 return ret;
1388
db4064cc 1389 chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
fdd61a01
LW
1390
1391 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
1392 &parent_hwirq, &parent_type);
1393 if (ret) {
1394 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
1395 return ret;
1396 }
366950ee 1397 chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq);
fdd61a01
LW
1398
1399 /*
1400 * We set handle_bad_irq because the .set_type() should
1401 * always be invoked and set the right type of handler.
1402 */
1403 irq_domain_set_info(d,
1404 irq,
1405 hwirq,
1406 gc->irq.chip,
1407 gc,
1408 girq->handler,
1409 NULL, NULL);
1410 irq_set_probe(irq);
1411
fdd61a01 1412 /* This parent only handles asserted level IRQs */
91a29af4
MZ
1413 ret = girq->populate_parent_alloc_arg(gc, &gpio_parent_fwspec,
1414 parent_hwirq, parent_type);
1415 if (ret)
1416 return ret;
24258761 1417
366950ee 1418 chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
fdd61a01 1419 irq, parent_hwirq);
c34f6dc8 1420 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
91a29af4 1421 ret = irq_domain_alloc_irqs_parent(d, irq, 1, &gpio_parent_fwspec);
880b7cf2
KH
1422 /*
1423 * If the parent irqdomain is msi, the interrupts have already
1424 * been allocated, so the EEXIST is good.
1425 */
1426 if (irq_domain_is_msi(d->parent) && (ret == -EEXIST))
1427 ret = 0;
fdd61a01
LW
1428 if (ret)
1429 chip_err(gc,
1430 "failed to allocate parent hwirq %d for hwirq %lu\n",
1431 parent_hwirq, hwirq);
1432
1433 return ret;
1434}
1435
a0b66a73 1436static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc,
fdd61a01
LW
1437 unsigned int offset)
1438{
1439 return offset;
1440}
1441
1442static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
1443{
1444 ops->activate = gpiochip_irq_domain_activate;
1445 ops->deactivate = gpiochip_irq_domain_deactivate;
1446 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
fdd61a01
LW
1447
1448 /*
08f12b45 1449 * We only allow overriding the translate() and free() functions for
fdd61a01 1450 * hierarchical chips, and this should only be done if the user
08f12b45
LP
1451 * really need something other than 1:1 translation for translate()
1452 * callback and free if user wants to free up any resources which
1453 * were allocated during callbacks, for example populate_parent_alloc_arg.
fdd61a01
LW
1454 */
1455 if (!ops->translate)
1456 ops->translate = gpiochip_hierarchy_irq_domain_translate;
08f12b45
LP
1457 if (!ops->free)
1458 ops->free = irq_domain_free_irqs_common;
fdd61a01
LW
1459}
1460
b683b487 1461static struct irq_domain *gpiochip_hierarchy_create_domain(struct gpio_chip *gc)
fdd61a01 1462{
b683b487
AS
1463 struct irq_domain *domain;
1464
fdd61a01
LW
1465 if (!gc->irq.child_to_parent_hwirq ||
1466 !gc->irq.fwnode) {
1467 chip_err(gc, "missing irqdomain vital data\n");
b683b487 1468 return ERR_PTR(-EINVAL);
fdd61a01
LW
1469 }
1470
1471 if (!gc->irq.child_offset_to_irq)
1472 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
1473
24258761
KH
1474 if (!gc->irq.populate_parent_alloc_arg)
1475 gc->irq.populate_parent_alloc_arg =
fdd61a01
LW
1476 gpiochip_populate_parent_fwspec_twocell;
1477
1478 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
1479
b683b487 1480 domain = irq_domain_create_hierarchy(
fdd61a01
LW
1481 gc->irq.parent_domain,
1482 0,
1483 gc->ngpio,
1484 gc->irq.fwnode,
1485 &gc->irq.child_irq_domain_ops,
1486 gc);
1487
b683b487
AS
1488 if (!domain)
1489 return ERR_PTR(-ENOMEM);
fdd61a01
LW
1490
1491 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
1492
b683b487 1493 return domain;
fdd61a01
LW
1494}
1495
1496static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1497{
1498 return !!gc->irq.parent_domain;
1499}
1500
91a29af4
MZ
1501int gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc,
1502 union gpio_irq_fwspec *gfwspec,
1503 unsigned int parent_hwirq,
1504 unsigned int parent_type)
fdd61a01 1505{
91a29af4 1506 struct irq_fwspec *fwspec = &gfwspec->fwspec;
24258761 1507
a0b66a73 1508 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1509 fwspec->param_count = 2;
1510 fwspec->param[0] = parent_hwirq;
1511 fwspec->param[1] = parent_type;
24258761 1512
91a29af4 1513 return 0;
fdd61a01
LW
1514}
1515EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
1516
91a29af4
MZ
1517int gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc,
1518 union gpio_irq_fwspec *gfwspec,
1519 unsigned int parent_hwirq,
1520 unsigned int parent_type)
fdd61a01 1521{
91a29af4 1522 struct irq_fwspec *fwspec = &gfwspec->fwspec;
24258761 1523
a0b66a73 1524 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1525 fwspec->param_count = 4;
1526 fwspec->param[0] = 0;
1527 fwspec->param[1] = parent_hwirq;
1528 fwspec->param[2] = 0;
1529 fwspec->param[3] = parent_type;
24258761 1530
91a29af4 1531 return 0;
fdd61a01
LW
1532}
1533EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
1534
1535#else
1536
b683b487 1537static struct irq_domain *gpiochip_hierarchy_create_domain(struct gpio_chip *gc)
fdd61a01 1538{
b683b487 1539 return ERR_PTR(-EINVAL);
fdd61a01
LW
1540}
1541
1542static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1543{
1544 return false;
1545}
1546
1547#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
1548
14250520
LW
1549/**
1550 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
1551 * @d: the irqdomain used by this irqchip
1552 * @irq: the global irq number used by this GPIO irqchip irq
1553 * @hwirq: the local IRQ/GPIO line offset on this gpiochip
1554 *
1555 * This function will set up the mapping for a certain IRQ line on a
1556 * gpiochip by assigning the gpiochip as chip data, and using the irqchip
1557 * stored inside the gpiochip.
1558 */
db4064cc 1559int gpiochip_irq_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hwirq)
14250520 1560{
a0b66a73 1561 struct gpio_chip *gc = d->host_data;
d377f56f 1562 int ret = 0;
14250520 1563
a0b66a73 1564 if (!gpiochip_irqchip_irq_valid(gc, hwirq))
dc749a09
GS
1565 return -ENXIO;
1566
a0b66a73 1567 irq_set_chip_data(irq, gc);
a0a8bcf4
GS
1568 /*
1569 * This lock class tells lockdep that GPIO irqs are in a different
1570 * category than their parents, so it won't report false recursion.
1571 */
a0b66a73
LW
1572 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
1573 irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler);
d245b3f9 1574 /* Chips that use nested thread handlers have them marked */
a0b66a73 1575 if (gc->irq.threaded)
1c8732bb 1576 irq_set_nested_thread(irq, 1);
14250520 1577 irq_set_noprobe(irq);
23393d49 1578
a0b66a73
LW
1579 if (gc->irq.num_parents == 1)
1580 ret = irq_set_parent(irq, gc->irq.parents[0]);
1581 else if (gc->irq.map)
1582 ret = irq_set_parent(irq, gc->irq.map[hwirq]);
e0d89728 1583
d377f56f
LW
1584 if (ret < 0)
1585 return ret;
e0d89728 1586
1333b90f
LW
1587 /*
1588 * No set-up of the hardware will happen if IRQ_TYPE_NONE
1589 * is passed as default type.
1590 */
a0b66a73
LW
1591 if (gc->irq.default_type != IRQ_TYPE_NONE)
1592 irq_set_irq_type(irq, gc->irq.default_type);
14250520
LW
1593
1594 return 0;
1595}
1b95b4eb 1596EXPORT_SYMBOL_GPL(gpiochip_irq_map);
14250520 1597
1b95b4eb 1598void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
c3626fde 1599{
a0b66a73 1600 struct gpio_chip *gc = d->host_data;
1c8732bb 1601
a0b66a73 1602 if (gc->irq.threaded)
1c8732bb 1603 irq_set_nested_thread(irq, 0);
c3626fde
LW
1604 irq_set_chip_and_handler(irq, NULL, NULL);
1605 irq_set_chip_data(irq, NULL);
1606}
1b95b4eb 1607EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
c3626fde 1608
14250520
LW
1609static const struct irq_domain_ops gpiochip_domain_ops = {
1610 .map = gpiochip_irq_map,
c3626fde 1611 .unmap = gpiochip_irq_unmap,
14250520
LW
1612 /* Virtually all GPIO irqchips are twocell:ed */
1613 .xlate = irq_domain_xlate_twocell,
1614};
1615
1efc43de
AS
1616static struct irq_domain *gpiochip_simple_create_domain(struct gpio_chip *gc)
1617{
1618 struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev);
1619 struct irq_domain *domain;
1620
1621 domain = irq_domain_create_simple(fwnode, gc->ngpio, gc->irq.first,
1622 &gpiochip_domain_ops, gc);
1623 if (!domain)
1624 return ERR_PTR(-EINVAL);
1625
1626 return domain;
1627}
1628
fdd61a01
LW
1629/*
1630 * TODO: move these activate/deactivate in under the hierarchicial
1631 * irqchip implementation as static once SPMI and SSBI (all external
1632 * users) are phased over.
1633 */
ef74f70e
BM
1634/**
1635 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
1636 * @domain: The IRQ domain used by this IRQ chip
1637 * @data: Outermost irq_data associated with the IRQ
1638 * @reserve: If set, only reserve an interrupt vector instead of assigning one
1639 *
1640 * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
1641 * used as the activate function for the &struct irq_domain_ops. The host_data
1642 * for the IRQ domain must be the &struct gpio_chip.
1643 */
1644int gpiochip_irq_domain_activate(struct irq_domain *domain,
1645 struct irq_data *data, bool reserve)
1646{
a0b66a73 1647 struct gpio_chip *gc = domain->host_data;
db4064cc 1648 unsigned int hwirq = irqd_to_hwirq(data);
ef74f70e 1649
db4064cc 1650 return gpiochip_lock_as_irq(gc, hwirq);
ef74f70e
BM
1651}
1652EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
1653
1654/**
1655 * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
1656 * @domain: The IRQ domain used by this IRQ chip
1657 * @data: Outermost irq_data associated with the IRQ
1658 *
1659 * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
1660 * be used as the deactivate function for the &struct irq_domain_ops. The
1661 * host_data for the IRQ domain must be the &struct gpio_chip.
1662 */
1663void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
1664 struct irq_data *data)
1665{
a0b66a73 1666 struct gpio_chip *gc = domain->host_data;
db4064cc 1667 unsigned int hwirq = irqd_to_hwirq(data);
ef74f70e 1668
db4064cc 1669 return gpiochip_unlock_as_irq(gc, hwirq);
ef74f70e
BM
1670}
1671EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
1672
13daf489 1673static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset)
14250520 1674{
a0b66a73 1675 struct irq_domain *domain = gc->irq.domain;
fdd61a01 1676
5467801f
SP
1677#ifdef CONFIG_GPIOLIB_IRQCHIP
1678 /*
1679 * Avoid race condition with other code, which tries to lookup
1680 * an IRQ before the irqchip has been properly registered,
1681 * i.e. while gpiochip is still being brought up.
1682 */
1683 if (!gc->irq.initialized)
1684 return -EPROBE_DEFER;
1685#endif
1686
a0b66a73 1687 if (!gpiochip_irqchip_irq_valid(gc, offset))
4e6b8238 1688 return -ENXIO;
5b76e79c 1689
fdd61a01
LW
1690#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1691 if (irq_domain_is_hierarchy(domain)) {
1692 struct irq_fwspec spec;
1693
1694 spec.fwnode = domain->fwnode;
1695 spec.param_count = 2;
a0b66a73 1696 spec.param[0] = gc->irq.child_offset_to_irq(gc, offset);
fdd61a01
LW
1697 spec.param[1] = IRQ_TYPE_NONE;
1698
1699 return irq_create_fwspec_mapping(&spec);
1700 }
1701#endif
1702
1703 return irq_create_mapping(domain, offset);
14250520
LW
1704}
1705
704f0875 1706int gpiochip_irq_reqres(struct irq_data *d)
14250520 1707{
a0b66a73 1708 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1709 unsigned int hwirq = irqd_to_hwirq(d);
5b76e79c 1710
db4064cc 1711 return gpiochip_reqres_irq(gc, hwirq);
14250520 1712}
704f0875 1713EXPORT_SYMBOL(gpiochip_irq_reqres);
14250520 1714
704f0875 1715void gpiochip_irq_relres(struct irq_data *d)
14250520 1716{
a0b66a73 1717 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1718 unsigned int hwirq = irqd_to_hwirq(d);
14250520 1719
db4064cc 1720 gpiochip_relres_irq(gc, hwirq);
14250520 1721}
704f0875 1722EXPORT_SYMBOL(gpiochip_irq_relres);
14250520 1723
a8173820
MS
1724static void gpiochip_irq_mask(struct irq_data *d)
1725{
1726 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1727 unsigned int hwirq = irqd_to_hwirq(d);
a8173820
MS
1728
1729 if (gc->irq.irq_mask)
1730 gc->irq.irq_mask(d);
db4064cc 1731 gpiochip_disable_irq(gc, hwirq);
a8173820
MS
1732}
1733
1734static void gpiochip_irq_unmask(struct irq_data *d)
1735{
1736 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1737 unsigned int hwirq = irqd_to_hwirq(d);
a8173820 1738
db4064cc 1739 gpiochip_enable_irq(gc, hwirq);
a8173820
MS
1740 if (gc->irq.irq_unmask)
1741 gc->irq.irq_unmask(d);
1742}
1743
461c1a7d 1744static void gpiochip_irq_enable(struct irq_data *d)
14250520 1745{
a0b66a73 1746 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1747 unsigned int hwirq = irqd_to_hwirq(d);
e0d89728 1748
db4064cc 1749 gpiochip_enable_irq(gc, hwirq);
a8173820 1750 gc->irq.irq_enable(d);
461c1a7d
HV
1751}
1752
1753static void gpiochip_irq_disable(struct irq_data *d)
1754{
a0b66a73 1755 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1756 unsigned int hwirq = irqd_to_hwirq(d);
461c1a7d 1757
a8173820 1758 gc->irq.irq_disable(d);
db4064cc 1759 gpiochip_disable_irq(gc, hwirq);
461c1a7d
HV
1760}
1761
a0b66a73 1762static void gpiochip_set_irq_hooks(struct gpio_chip *gc)
ca620f2d 1763{
a0b66a73 1764 struct irq_chip *irqchip = gc->irq.chip;
ca620f2d 1765
6c846d02
MZ
1766 if (irqchip->flags & IRQCHIP_IMMUTABLE)
1767 return;
1768
1769 chip_warn(gc, "not an immutable chip, please consider fixing it!\n");
1770
ca620f2d
HV
1771 if (!irqchip->irq_request_resources &&
1772 !irqchip->irq_release_resources) {
1773 irqchip->irq_request_resources = gpiochip_irq_reqres;
1774 irqchip->irq_release_resources = gpiochip_irq_relres;
1775 }
a0b66a73 1776 if (WARN_ON(gc->irq.irq_enable))
461c1a7d 1777 return;
171948ea 1778 /* Check if the irqchip already has this hook... */
9d552219
NS
1779 if (irqchip->irq_enable == gpiochip_irq_enable ||
1780 irqchip->irq_mask == gpiochip_irq_mask) {
171948ea
HV
1781 /*
1782 * ...and if so, give a gentle warning that this is bad
1783 * practice.
1784 */
a0b66a73 1785 chip_info(gc,
171948ea
HV
1786 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
1787 return;
1788 }
a8173820
MS
1789
1790 if (irqchip->irq_disable) {
1791 gc->irq.irq_disable = irqchip->irq_disable;
1792 irqchip->irq_disable = gpiochip_irq_disable;
1793 } else {
1794 gc->irq.irq_mask = irqchip->irq_mask;
1795 irqchip->irq_mask = gpiochip_irq_mask;
1796 }
1797
1798 if (irqchip->irq_enable) {
1799 gc->irq.irq_enable = irqchip->irq_enable;
1800 irqchip->irq_enable = gpiochip_irq_enable;
1801 } else {
1802 gc->irq.irq_unmask = irqchip->irq_unmask;
1803 irqchip->irq_unmask = gpiochip_irq_unmask;
1804 }
14250520
LW
1805}
1806
081bfdb3
AS
1807static int gpiochip_irqchip_add_allocated_domain(struct gpio_chip *gc,
1808 struct irq_domain *domain,
1809 bool allocated_externally)
1810{
1811 if (!domain)
1812 return -EINVAL;
1813
eec349db
AS
1814 if (gc->to_irq)
1815 chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__);
1816
081bfdb3
AS
1817 gc->to_irq = gpiochip_to_irq;
1818 gc->irq.domain = domain;
1819 gc->irq.domain_is_allocated_externally = allocated_externally;
1820
1821 /*
1822 * Using barrier() here to prevent compiler from reordering
1823 * gc->irq.initialized before adding irqdomain.
1824 */
1825 barrier();
1826
1827 gc->irq.initialized = true;
1828
1829 return 0;
1830}
1831
e0d89728
TR
1832/**
1833 * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
a0b66a73 1834 * @gc: the GPIO chip to add the IRQ chip to
39c3fd58
AL
1835 * @lock_key: lockdep class for IRQ lock
1836 * @request_key: lockdep class for IRQ request
e0d89728 1837 */
a0b66a73 1838static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1839 struct lock_class_key *lock_key,
1840 struct lock_class_key *request_key)
e0d89728 1841{
5c63a9db 1842 struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev);
a0b66a73 1843 struct irq_chip *irqchip = gc->irq.chip;
39f3ad73 1844 struct irq_domain *domain;
e0d89728
TR
1845 unsigned int type;
1846 unsigned int i;
eec349db 1847 int ret;
e0d89728
TR
1848
1849 if (!irqchip)
1850 return 0;
1851
a0b66a73
LW
1852 if (gc->irq.parent_handler && gc->can_sleep) {
1853 chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n");
e0d89728
TR
1854 return -EINVAL;
1855 }
1856
a0b66a73 1857 type = gc->irq.default_type;
e0d89728
TR
1858
1859 /*
1860 * Specifying a default trigger is a terrible idea if DT or ACPI is
1861 * used to configure the interrupts, as you may end up with
1862 * conflicting triggers. Tell the user, and reset to NONE.
1863 */
5c63a9db
AS
1864 if (WARN(fwnode && type != IRQ_TYPE_NONE,
1865 "%pfw: Ignoring %u default trigger\n", fwnode, type))
e0d89728
TR
1866 type = IRQ_TYPE_NONE;
1867
a0b66a73
LW
1868 gc->irq.default_type = type;
1869 gc->irq.lock_key = lock_key;
1870 gc->irq.request_key = request_key;
e0d89728 1871
fdd61a01 1872 /* If a parent irqdomain is provided, let's build a hierarchy */
a0b66a73 1873 if (gpiochip_hierarchy_is_hierarchical(gc)) {
39f3ad73 1874 domain = gpiochip_hierarchy_create_domain(gc);
fdd61a01 1875 } else {
39f3ad73 1876 domain = gpiochip_simple_create_domain(gc);
fdd61a01 1877 }
39f3ad73
AS
1878 if (IS_ERR(domain))
1879 return PTR_ERR(domain);
e0d89728 1880
a0b66a73 1881 if (gc->irq.parent_handler) {
a0b66a73 1882 for (i = 0; i < gc->irq.num_parents; i++) {
cfe6807d
MZ
1883 void *data;
1884
1885 if (gc->irq.per_parent_data)
1886 data = gc->irq.parent_handler_data_array[i];
1887 else
1888 data = gc->irq.parent_handler_data ?: gc;
1889
e0d89728
TR
1890 /*
1891 * The parent IRQ chip is already using the chip_data
1892 * for this IRQ chip, so our callbacks simply use the
1893 * handler_data.
1894 */
a0b66a73
LW
1895 irq_set_chained_handler_and_data(gc->irq.parents[i],
1896 gc->irq.parent_handler,
e0d89728
TR
1897 data);
1898 }
e0d89728
TR
1899 }
1900
a0b66a73 1901 gpiochip_set_irq_hooks(gc);
ca620f2d 1902
eec349db
AS
1903 ret = gpiochip_irqchip_add_allocated_domain(gc, domain, false);
1904 if (ret)
1905 return ret;
5467801f 1906
06fb4ecf
ML
1907 acpi_gpiochip_request_interrupts(gc);
1908
e0d89728
TR
1909 return 0;
1910}
1911
14250520
LW
1912/**
1913 * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
a0b66a73 1914 * @gc: the gpiochip to remove the irqchip from
14250520
LW
1915 *
1916 * This is called only from gpiochip_remove()
1917 */
a0b66a73 1918static void gpiochip_irqchip_remove(struct gpio_chip *gc)
14250520 1919{
a0b66a73 1920 struct irq_chip *irqchip = gc->irq.chip;
39e5f096 1921 unsigned int offset;
c3626fde 1922
a0b66a73 1923 acpi_gpiochip_free_interrupts(gc);
afa82fab 1924
a0b66a73
LW
1925 if (irqchip && gc->irq.parent_handler) {
1926 struct gpio_irq_chip *irq = &gc->irq;
39e5f096
TR
1927 unsigned int i;
1928
1929 for (i = 0; i < irq->num_parents; i++)
1930 irq_set_chained_handler_and_data(irq->parents[i],
1931 NULL, NULL);
25e4fe92
DES
1932 }
1933
c3626fde 1934 /* Remove all IRQ mappings and delete the domain */
ff7a1790 1935 if (!gc->irq.domain_is_allocated_externally && gc->irq.domain) {
39e5f096
TR
1936 unsigned int irq;
1937
a0b66a73
LW
1938 for (offset = 0; offset < gc->ngpio; offset++) {
1939 if (!gpiochip_irqchip_irq_valid(gc, offset))
79b804cb 1940 continue;
f0fbe7bc 1941
a0b66a73 1942 irq = irq_find_mapping(gc->irq.domain, offset);
f0fbe7bc 1943 irq_dispose_mapping(irq);
79b804cb 1944 }
f0fbe7bc 1945
a0b66a73 1946 irq_domain_remove(gc->irq.domain);
c3626fde 1947 }
14250520 1948
6c846d02 1949 if (irqchip && !(irqchip->flags & IRQCHIP_IMMUTABLE)) {
461c1a7d
HV
1950 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
1951 irqchip->irq_request_resources = NULL;
1952 irqchip->irq_release_resources = NULL;
1953 }
1954 if (irqchip->irq_enable == gpiochip_irq_enable) {
a0b66a73
LW
1955 irqchip->irq_enable = gc->irq.irq_enable;
1956 irqchip->irq_disable = gc->irq.irq_disable;
461c1a7d 1957 }
14250520 1958 }
a0b66a73
LW
1959 gc->irq.irq_enable = NULL;
1960 gc->irq.irq_disable = NULL;
1961 gc->irq.chip = NULL;
79b804cb 1962
a0b66a73 1963 gpiochip_irqchip_free_valid_mask(gc);
14250520
LW
1964}
1965
6a45b0e2
MW
1966/**
1967 * gpiochip_irqchip_add_domain() - adds an irqdomain to a gpiochip
1968 * @gc: the gpiochip to add the irqchip to
1969 * @domain: the irqdomain to add to the gpiochip
1970 *
1971 * This function adds an IRQ domain to the gpiochip.
1972 */
1973int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
1974 struct irq_domain *domain)
1975{
081bfdb3 1976 return gpiochip_irqchip_add_allocated_domain(gc, domain, true);
6a45b0e2
MW
1977}
1978EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain);
1979
14250520
LW
1980#else /* CONFIG_GPIOLIB_IRQCHIP */
1981
a0b66a73 1982static inline int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1983 struct lock_class_key *lock_key,
1984 struct lock_class_key *request_key)
e0d89728
TR
1985{
1986 return 0;
1987}
a0b66a73 1988static void gpiochip_irqchip_remove(struct gpio_chip *gc) {}
9411e3aa 1989
a0b66a73 1990static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
9411e3aa
AS
1991{
1992 return 0;
1993}
1994
a0b66a73 1995static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb
MW
1996{
1997 return 0;
1998}
a0b66a73 1999static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 2000{ }
14250520
LW
2001
2002#endif /* CONFIG_GPIOLIB_IRQCHIP */
2003
c771c2f4
JG
2004/**
2005 * gpiochip_generic_request() - request the gpio function for a pin
a0b66a73 2006 * @gc: the gpiochip owning the GPIO
c771c2f4
JG
2007 * @offset: the offset of the GPIO to request for GPIO function
2008 */
13daf489 2009int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset)
c771c2f4 2010{
56e337f2
BG
2011#ifdef CONFIG_PINCTRL
2012 if (list_empty(&gc->gpiodev->pin_ranges))
2013 return 0;
2014#endif
2015
acb38be6 2016 return pinctrl_gpio_request(gc, offset);
c771c2f4
JG
2017}
2018EXPORT_SYMBOL_GPL(gpiochip_generic_request);
2019
2020/**
2021 * gpiochip_generic_free() - free the gpio function from a pin
a0b66a73 2022 * @gc: the gpiochip to request the gpio function for
c771c2f4
JG
2023 * @offset: the offset of the GPIO to free from GPIO function
2024 */
13daf489 2025void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset)
c771c2f4 2026{
56e337f2
BG
2027#ifdef CONFIG_PINCTRL
2028 if (list_empty(&gc->gpiodev->pin_ranges))
2029 return;
2030#endif
2031
4fccb263 2032 pinctrl_gpio_free(gc, offset);
c771c2f4
JG
2033}
2034EXPORT_SYMBOL_GPL(gpiochip_generic_free);
2035
2956b5d9
MW
2036/**
2037 * gpiochip_generic_config() - apply configuration for a pin
a0b66a73 2038 * @gc: the gpiochip owning the GPIO
2956b5d9
MW
2039 * @offset: the offset of the GPIO to apply the configuration
2040 * @config: the configuration to be applied
2041 */
13daf489 2042int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset,
2956b5d9
MW
2043 unsigned long config)
2044{
ae366ba8
ERB
2045#ifdef CONFIG_PINCTRL
2046 if (list_empty(&gc->gpiodev->pin_ranges))
2047 return -ENOTSUPP;
2048#endif
2049
acf2981b 2050 return pinctrl_gpio_set_config(gc, offset, config);
2956b5d9
MW
2051}
2052EXPORT_SYMBOL_GPL(gpiochip_generic_config);
2053
f23f1516 2054#ifdef CONFIG_PINCTRL
165adc9c 2055
586a87e6
CR
2056/**
2057 * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
a0b66a73 2058 * @gc: the gpiochip to add the range for
d32651f6 2059 * @pctldev: the pin controller to map to
586a87e6
CR
2060 * @gpio_offset: the start offset in the current gpio_chip number space
2061 * @pin_group: name of the pin group inside the pin controller
973c1714
CL
2062 *
2063 * Calling this function directly from a DeviceTree-supported
2064 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2065 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2066 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
586a87e6 2067 */
a0b66a73 2068int gpiochip_add_pingroup_range(struct gpio_chip *gc,
586a87e6
CR
2069 struct pinctrl_dev *pctldev,
2070 unsigned int gpio_offset, const char *pin_group)
2071{
2072 struct gpio_pin_range *pin_range;
a0b66a73 2073 struct gpio_device *gdev = gc->gpiodev;
586a87e6
CR
2074 int ret;
2075
2076 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
2077 if (!pin_range) {
a0b66a73 2078 chip_err(gc, "failed to allocate pin ranges\n");
586a87e6
CR
2079 return -ENOMEM;
2080 }
2081
2082 /* Use local offset as range ID */
2083 pin_range->range.id = gpio_offset;
a0b66a73
LW
2084 pin_range->range.gc = gc;
2085 pin_range->range.name = gc->label;
fdeb8e15 2086 pin_range->range.base = gdev->base + gpio_offset;
586a87e6
CR
2087 pin_range->pctldev = pctldev;
2088
2089 ret = pinctrl_get_group_pins(pctldev, pin_group,
2090 &pin_range->range.pins,
2091 &pin_range->range.npins);
61c6375d
MN
2092 if (ret < 0) {
2093 kfree(pin_range);
586a87e6 2094 return ret;
61c6375d 2095 }
586a87e6
CR
2096
2097 pinctrl_add_gpio_range(pctldev, &pin_range->range);
2098
a0b66a73 2099 chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n",
1a2a99c6 2100 gpio_offset, gpio_offset + pin_range->range.npins - 1,
586a87e6
CR
2101 pinctrl_dev_get_devname(pctldev), pin_group);
2102
20ec3e39 2103 list_add_tail(&pin_range->node, &gdev->pin_ranges);
586a87e6
CR
2104
2105 return 0;
2106}
2107EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
2108
3f0f8670
LW
2109/**
2110 * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
a0b66a73 2111 * @gc: the gpiochip to add the range for
950d55f5 2112 * @pinctl_name: the dev_name() of the pin controller to map to
316511c0
LW
2113 * @gpio_offset: the start offset in the current gpio_chip number space
2114 * @pin_offset: the start offset in the pin controller number space
3f0f8670
LW
2115 * @npins: the number of pins from the offset of each pin space (GPIO and
2116 * pin controller) to accumulate in this range
950d55f5
TR
2117 *
2118 * Returns:
2119 * 0 on success, or a negative error-code on failure.
973c1714
CL
2120 *
2121 * Calling this function directly from a DeviceTree-supported
2122 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2123 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2124 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
3f0f8670 2125 */
a0b66a73 2126int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
316511c0 2127 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 2128 unsigned int npins)
f23f1516
SH
2129{
2130 struct gpio_pin_range *pin_range;
a0b66a73 2131 struct gpio_device *gdev = gc->gpiodev;
b4d4b1f0 2132 int ret;
f23f1516 2133
3f0f8670 2134 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
f23f1516 2135 if (!pin_range) {
a0b66a73 2136 chip_err(gc, "failed to allocate pin ranges\n");
1e63d7b9 2137 return -ENOMEM;
f23f1516
SH
2138 }
2139
3f0f8670 2140 /* Use local offset as range ID */
316511c0 2141 pin_range->range.id = gpio_offset;
a0b66a73
LW
2142 pin_range->range.gc = gc;
2143 pin_range->range.name = gc->label;
fdeb8e15 2144 pin_range->range.base = gdev->base + gpio_offset;
316511c0 2145 pin_range->range.pin_base = pin_offset;
f23f1516 2146 pin_range->range.npins = npins;
192c369c 2147 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
f23f1516 2148 &pin_range->range);
8f23ca1a 2149 if (IS_ERR(pin_range->pctldev)) {
b4d4b1f0 2150 ret = PTR_ERR(pin_range->pctldev);
a0b66a73 2151 chip_err(gc, "could not create pin range\n");
3f0f8670 2152 kfree(pin_range);
b4d4b1f0 2153 return ret;
3f0f8670 2154 }
a0b66a73 2155 chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
1a2a99c6 2156 gpio_offset, gpio_offset + npins - 1,
316511c0
LW
2157 pinctl_name,
2158 pin_offset, pin_offset + npins - 1);
f23f1516 2159
20ec3e39 2160 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1e63d7b9
LW
2161
2162 return 0;
f23f1516 2163}
165adc9c 2164EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
f23f1516 2165
3f0f8670
LW
2166/**
2167 * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
a0b66a73 2168 * @gc: the chip to remove all the mappings for
3f0f8670 2169 */
a0b66a73 2170void gpiochip_remove_pin_ranges(struct gpio_chip *gc)
f23f1516
SH
2171{
2172 struct gpio_pin_range *pin_range, *tmp;
a0b66a73 2173 struct gpio_device *gdev = gc->gpiodev;
f23f1516 2174
20ec3e39 2175 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
f23f1516
SH
2176 list_del(&pin_range->node);
2177 pinctrl_remove_gpio_range(pin_range->pctldev,
2178 &pin_range->range);
3f0f8670 2179 kfree(pin_range);
f23f1516
SH
2180 }
2181}
165adc9c
LW
2182EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
2183
2184#endif /* CONFIG_PINCTRL */
f23f1516 2185
d2876d08
DB
2186/* These "optional" allocation calls help prevent drivers from stomping
2187 * on each other, and help provide better diagnostics in debugfs.
2188 * They're called even less than the "set direction" calls.
2189 */
fac9d885 2190static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
d2876d08 2191{
0338f6a6
BG
2192 struct gpio_chip *gc = desc->gdev->chip;
2193 unsigned long flags;
2194 unsigned int offset;
2195 int ret;
d2876d08 2196
18534df4
MS
2197 if (label) {
2198 label = kstrdup_const(label, GFP_KERNEL);
2199 if (!label)
2200 return -ENOMEM;
2201 }
2202
bcabdef1
AC
2203 spin_lock_irqsave(&gpio_lock, flags);
2204
d2876d08 2205 /* NOTE: gpio_request() can be called in early boot,
35e8bb51 2206 * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
d2876d08
DB
2207 */
2208
2209 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
2210 desc_set_label(desc, label ? : "?");
438d8908 2211 } else {
d377f56f 2212 ret = -EBUSY;
95d9f84f 2213 goto out_free_unlock;
35e8bb51
DB
2214 }
2215
a0b66a73
LW
2216 if (gc->request) {
2217 /* gc->request may sleep */
35e8bb51 2218 spin_unlock_irqrestore(&gpio_lock, flags);
3789f5ac 2219 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
2220 if (gpiochip_line_is_valid(gc, offset))
2221 ret = gc->request(gc, offset);
3789f5ac 2222 else
d377f56f 2223 ret = -EINVAL;
35e8bb51
DB
2224 spin_lock_irqsave(&gpio_lock, flags);
2225
8bbff39c 2226 if (ret) {
35e8bb51 2227 desc_set_label(desc, NULL);
35e8bb51 2228 clear_bit(FLAG_REQUESTED, &desc->flags);
95d9f84f 2229 goto out_free_unlock;
35e8bb51 2230 }
438d8908 2231 }
a0b66a73
LW
2232 if (gc->get_direction) {
2233 /* gc->get_direction may sleep */
80b0a602 2234 spin_unlock_irqrestore(&gpio_lock, flags);
372e722e 2235 gpiod_get_direction(desc);
80b0a602
MN
2236 spin_lock_irqsave(&gpio_lock, flags);
2237 }
77c2d792 2238 spin_unlock_irqrestore(&gpio_lock, flags);
95d9f84f
AS
2239 return 0;
2240
2241out_free_unlock:
2242 spin_unlock_irqrestore(&gpio_lock, flags);
2243 kfree_const(label);
d377f56f 2244 return ret;
77c2d792
MW
2245}
2246
fdeb8e15
LW
2247/*
2248 * This descriptor validation needs to be inserted verbatim into each
2249 * function taking a descriptor, so we need to use a preprocessor
54d77198
LW
2250 * macro to avoid endless duplication. If the desc is NULL it is an
2251 * optional GPIO and calls should just bail out.
fdeb8e15 2252 */
a746a232
RV
2253static int validate_desc(const struct gpio_desc *desc, const char *func)
2254{
2255 if (!desc)
2256 return 0;
2257 if (IS_ERR(desc)) {
2258 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
2259 return PTR_ERR(desc);
2260 }
2261 if (!desc->gdev) {
2262 pr_warn("%s: invalid GPIO (no device)\n", func);
2263 return -EINVAL;
2264 }
2265 if (!desc->gdev->chip) {
2266 dev_warn(&desc->gdev->dev,
2267 "%s: backing chip is gone\n", func);
2268 return 0;
2269 }
2270 return 1;
2271}
2272
fdeb8e15 2273#define VALIDATE_DESC(desc) do { \
a746a232
RV
2274 int __valid = validate_desc(desc, __func__); \
2275 if (__valid <= 0) \
2276 return __valid; \
2277 } while (0)
fdeb8e15
LW
2278
2279#define VALIDATE_DESC_VOID(desc) do { \
a746a232
RV
2280 int __valid = validate_desc(desc, __func__); \
2281 if (__valid <= 0) \
fdeb8e15 2282 return; \
a746a232 2283 } while (0)
fdeb8e15 2284
0eb4c6c2 2285int gpiod_request(struct gpio_desc *desc, const char *label)
77c2d792 2286{
d377f56f 2287 int ret = -EPROBE_DEFER;
77c2d792 2288
fdeb8e15 2289 VALIDATE_DESC(desc);
77c2d792 2290
dc0989e3 2291 if (try_module_get(desc->gdev->owner)) {
d377f56f 2292 ret = gpiod_request_commit(desc, label);
8bbff39c 2293 if (ret)
dc0989e3 2294 module_put(desc->gdev->owner);
33a68e86 2295 else
dc0989e3 2296 gpio_device_get(desc->gdev);
77c2d792
MW
2297 }
2298
d377f56f
LW
2299 if (ret)
2300 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
77c2d792 2301
d377f56f 2302 return ret;
d2876d08 2303}
372e722e 2304
fac9d885 2305static bool gpiod_free_commit(struct gpio_desc *desc)
d2876d08 2306{
0338f6a6
BG
2307 struct gpio_chip *gc;
2308 unsigned long flags;
2309 bool ret = false;
d2876d08 2310
3d599d1c
UKK
2311 might_sleep();
2312
d2876d08
DB
2313 spin_lock_irqsave(&gpio_lock, flags);
2314
a0b66a73
LW
2315 gc = desc->gdev->chip;
2316 if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) {
2317 if (gc->free) {
35e8bb51 2318 spin_unlock_irqrestore(&gpio_lock, flags);
a0b66a73
LW
2319 might_sleep_if(gc->can_sleep);
2320 gc->free(gc, gpio_chip_hwgpio(desc));
35e8bb51
DB
2321 spin_lock_irqsave(&gpio_lock, flags);
2322 }
18534df4 2323 kfree_const(desc->label);
d2876d08 2324 desc_set_label(desc, NULL);
07697461 2325 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
35e8bb51 2326 clear_bit(FLAG_REQUESTED, &desc->flags);
aca5ce14 2327 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
25553ff0 2328 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
9225d516
DF
2329 clear_bit(FLAG_PULL_UP, &desc->flags);
2330 clear_bit(FLAG_PULL_DOWN, &desc->flags);
2148ad77 2331 clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
73e03419
KG
2332 clear_bit(FLAG_EDGE_RISING, &desc->flags);
2333 clear_bit(FLAG_EDGE_FALLING, &desc->flags);
f625d460 2334 clear_bit(FLAG_IS_HOGGED, &desc->flags);
63636d95
GU
2335#ifdef CONFIG_OF_DYNAMIC
2336 desc->hog = NULL;
2337#endif
77c2d792
MW
2338 ret = true;
2339 }
d2876d08
DB
2340
2341 spin_unlock_irqrestore(&gpio_lock, flags);
9ce4ed5b 2342 gpiod_line_state_notify(desc, GPIOLINE_CHANGED_RELEASED);
51c1064e 2343
77c2d792
MW
2344 return ret;
2345}
2346
0eb4c6c2 2347void gpiod_free(struct gpio_desc *desc)
77c2d792 2348{
3386fb86
BG
2349 /*
2350 * We must not use VALIDATE_DESC_VOID() as the underlying gdev->chip
2351 * may already be NULL but we still want to put the references.
2352 */
2353 if (!desc)
2354 return;
2355
2356 if (!gpiod_free_commit(desc))
5d5dfc50 2357 WARN_ON(1);
3386fb86
BG
2358
2359 module_put(desc->gdev->owner);
2360 gpio_device_put(desc->gdev);
d2876d08 2361}
372e722e 2362
d2876d08 2363/**
ee25fba7
BG
2364 * gpiochip_dup_line_label - Get a copy of the consumer label.
2365 * @gc: GPIO chip controlling this line.
2366 * @offset: Hardware offset of the line.
d2876d08 2367 *
ee25fba7
BG
2368 * Returns:
2369 * Pointer to a copy of the consumer label if the line is requested or NULL
2370 * if it's not. If a valid pointer was returned, it must be freed using
2371 * kfree(). In case of a memory allocation error, the function returns %ENOMEM.
d2876d08 2372 *
ee25fba7 2373 * Must not be called from atomic context.
d2876d08 2374 */
ee25fba7 2375char *gpiochip_dup_line_label(struct gpio_chip *gc, unsigned int offset)
d2876d08 2376{
6c0b4e6c 2377 struct gpio_desc *desc;
f8d05e27 2378 char *label;
6c0b4e6c 2379
a0b66a73 2380 desc = gpiochip_get_desc(gc, offset);
1739a2d8
BG
2381 if (IS_ERR(desc))
2382 return NULL;
6c0b4e6c 2383
f8d05e27
BG
2384 guard(spinlock_irqsave)(&gpio_lock);
2385
2386 if (!test_bit(FLAG_REQUESTED, &desc->flags))
d2876d08 2387 return NULL;
f8d05e27 2388
0a10d107
BG
2389 /*
2390 * FIXME: Once we mark gpiod_direction_input/output() and
2391 * gpiod_get_direction() with might_sleep(), we'll be able to protect
2392 * the GPIO descriptors with mutex (while value setting operations will
2393 * become lockless).
2394 *
2395 * Until this happens, this allocation needs to be atomic.
2396 */
2397 label = kstrdup(desc->label, GFP_ATOMIC);
f8d05e27 2398 if (!label)
ee25fba7
BG
2399 return ERR_PTR(-ENOMEM);
2400
f8d05e27 2401 return label;
d2876d08 2402}
ee25fba7 2403EXPORT_SYMBOL_GPL(gpiochip_dup_line_label);
d2876d08 2404
77c2d792
MW
2405/**
2406 * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
a0b66a73 2407 * @gc: GPIO chip
950d55f5 2408 * @hwnum: hardware number of the GPIO for which to request the descriptor
77c2d792 2409 * @label: label for the GPIO
5923ea6c
LW
2410 * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
2411 * specify things like line inversion semantics with the machine flags
2412 * such as GPIO_OUT_LOW
2413 * @dflags: descriptor request flags for this GPIO or 0 if default, this
2414 * can be used to specify consumer semantics such as open drain
77c2d792
MW
2415 *
2416 * Function allows GPIO chip drivers to request and use their own GPIO
2417 * descriptors via gpiolib API. Difference to gpiod_request() is that this
2418 * function will not increase reference count of the GPIO chip module. This
2419 * allows the GPIO chip module to be unloaded as needed (we assume that the
2420 * GPIO chip driver handles freeing the GPIOs it has requested).
950d55f5
TR
2421 *
2422 * Returns:
2423 * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
2424 * code on failure.
77c2d792 2425 */
a0b66a73 2426struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc,
06863620 2427 unsigned int hwnum,
21abf103 2428 const char *label,
5923ea6c
LW
2429 enum gpio_lookup_flags lflags,
2430 enum gpiod_flags dflags)
77c2d792 2431{
a0b66a73 2432 struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum);
d377f56f 2433 int ret;
77c2d792 2434
abdc08a3 2435 if (IS_ERR(desc)) {
a0b66a73 2436 chip_err(gc, "failed to get GPIO descriptor\n");
abdc08a3
AC
2437 return desc;
2438 }
2439
d377f56f
LW
2440 ret = gpiod_request_commit(desc, label);
2441 if (ret < 0)
2442 return ERR_PTR(ret);
77c2d792 2443
d377f56f
LW
2444 ret = gpiod_configure_flags(desc, label, lflags, dflags);
2445 if (ret) {
a0b66a73 2446 chip_err(gc, "setup of own GPIO %s failed\n", label);
21abf103 2447 gpiod_free_commit(desc);
d377f56f 2448 return ERR_PTR(ret);
21abf103
LW
2449 }
2450
abdc08a3 2451 return desc;
77c2d792 2452}
f7d4ad98 2453EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
77c2d792
MW
2454
2455/**
2456 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
2457 * @desc: GPIO descriptor to free
2458 *
2459 * Function frees the given GPIO requested previously with
2460 * gpiochip_request_own_desc().
2461 */
2462void gpiochip_free_own_desc(struct gpio_desc *desc)
2463{
2464 if (desc)
fac9d885 2465 gpiod_free_commit(desc);
77c2d792 2466}
f7d4ad98 2467EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
d2876d08 2468
fdeb8e15
LW
2469/*
2470 * Drivers MUST set GPIO direction before making get/set calls. In
d2876d08
DB
2471 * some cases this is done in early boot, before IRQs are enabled.
2472 *
2473 * As a rule these aren't called more than once (except for drivers
2474 * using the open-drain emulation idiom) so these are natural places
2475 * to accumulate extra debugging checks. Note that we can't (yet)
2476 * rely on gpio_request() having been called beforehand.
2477 */
2478
d99f8876 2479static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset,
62adc6f3 2480 unsigned long config)
71479789 2481{
d90f3685
BG
2482 if (!gc->set_config)
2483 return -ENOTSUPP;
542f3615 2484
62adc6f3 2485 return gc->set_config(gc, offset, config);
71479789
TP
2486}
2487
0c4d8666
AS
2488static int gpio_set_config_with_argument(struct gpio_desc *desc,
2489 enum pin_config_param mode,
2490 u32 argument)
d99f8876 2491{
a0b66a73 2492 struct gpio_chip *gc = desc->gdev->chip;
91b4ea5f 2493 unsigned long config;
0c4d8666
AS
2494
2495 config = pinconf_to_config_packed(mode, argument);
2496 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
2497}
2498
baca3b15
AS
2499static int gpio_set_config_with_argument_optional(struct gpio_desc *desc,
2500 enum pin_config_param mode,
2501 u32 argument)
2502{
2503 struct device *dev = &desc->gdev->dev;
2504 int gpio = gpio_chip_hwgpio(desc);
2505 int ret;
2506
2507 ret = gpio_set_config_with_argument(desc, mode, argument);
2508 if (ret != -ENOTSUPP)
2509 return ret;
d99f8876
BG
2510
2511 switch (mode) {
baca3b15
AS
2512 case PIN_CONFIG_PERSIST_STATE:
2513 dev_dbg(dev, "Persistence not supported for GPIO %d\n", gpio);
d99f8876 2514 break;
d99f8876 2515 default:
baca3b15 2516 break;
d99f8876
BG
2517 }
2518
baca3b15
AS
2519 return 0;
2520}
2521
0c4d8666
AS
2522static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode)
2523{
6aa32ad7 2524 return gpio_set_config_with_argument(desc, mode, 0);
d99f8876
BG
2525}
2526
5f4bf171 2527static int gpio_set_bias(struct gpio_desc *desc)
2148ad77 2528{
9ef6293c 2529 enum pin_config_param bias;
6aa32ad7 2530 unsigned int arg;
2148ad77
KG
2531
2532 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
2533 bias = PIN_CONFIG_BIAS_DISABLE;
2534 else if (test_bit(FLAG_PULL_UP, &desc->flags))
2535 bias = PIN_CONFIG_BIAS_PULL_UP;
2536 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
2537 bias = PIN_CONFIG_BIAS_PULL_DOWN;
9ef6293c
AS
2538 else
2539 return 0;
2148ad77 2540
6aa32ad7
AS
2541 switch (bias) {
2542 case PIN_CONFIG_BIAS_PULL_DOWN:
2543 case PIN_CONFIG_BIAS_PULL_UP:
2544 arg = 1;
2545 break;
2546
2547 default:
2548 arg = 0;
2549 break;
2148ad77 2550 }
6aa32ad7 2551
baca3b15 2552 return gpio_set_config_with_argument_optional(desc, bias, arg);
2148ad77
KG
2553}
2554
660c619b
AS
2555/**
2556 * gpio_set_debounce_timeout() - Set debounce timeout
2557 * @desc: GPIO descriptor to set the debounce timeout
2558 * @debounce: Debounce timeout in microseconds
2559 *
2560 * The function calls the certain GPIO driver to set debounce timeout
2561 * in the hardware.
2562 *
2563 * Returns 0 on success, or negative error code otherwise.
2564 */
f725edd8
AS
2565int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce)
2566{
2567 return gpio_set_config_with_argument_optional(desc,
2568 PIN_CONFIG_INPUT_DEBOUNCE,
2569 debounce);
2148ad77
KG
2570}
2571
79a9becd
AC
2572/**
2573 * gpiod_direction_input - set the GPIO direction to input
2574 * @desc: GPIO to set to input
2575 *
2576 * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
2577 * be called safely on it.
2578 *
2579 * Return 0 in case of success, else an error code.
2580 */
2581int gpiod_direction_input(struct gpio_desc *desc)
d2876d08 2582{
0338f6a6
BG
2583 struct gpio_chip *gc;
2584 int ret = 0;
d2876d08 2585
fdeb8e15 2586 VALIDATE_DESC(desc);
a0b66a73 2587 gc = desc->gdev->chip;
bcabdef1 2588
e48d194d
LW
2589 /*
2590 * It is legal to have no .get() and .direction_input() specified if
2591 * the chip is output-only, but you can't specify .direction_input()
2592 * and not support the .get() operation, that doesn't make sense.
2593 */
a0b66a73 2594 if (!gc->get && gc->direction_input) {
6424de5a 2595 gpiod_warn(desc,
e48d194d
LW
2596 "%s: missing get() but have direction_input()\n",
2597 __func__);
be1a4b13
LW
2598 return -EIO;
2599 }
2600
e48d194d
LW
2601 /*
2602 * If we have a .direction_input() callback, things are simple,
2603 * just call it. Else we are some input-only chip so try to check the
2604 * direction (if .get_direction() is supported) else we silently
2605 * assume we are in input mode after this.
2606 */
a0b66a73
LW
2607 if (gc->direction_input) {
2608 ret = gc->direction_input(gc, gpio_chip_hwgpio(desc));
2609 } else if (gc->get_direction &&
2610 (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) {
ae9847f4 2611 gpiod_warn(desc,
e48d194d
LW
2612 "%s: missing direction_input() operation and line is output\n",
2613 __func__);
ae9847f4
RRD
2614 return -EIO;
2615 }
2148ad77 2616 if (ret == 0) {
d2876d08 2617 clear_bit(FLAG_IS_OUT, &desc->flags);
5f4bf171 2618 ret = gpio_set_bias(desc);
2148ad77 2619 }
d449991c 2620
d377f56f 2621 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
d82da797 2622
d377f56f 2623 return ret;
d2876d08 2624}
79a9becd 2625EXPORT_SYMBOL_GPL(gpiod_direction_input);
372e722e 2626
fac9d885 2627static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
d2876d08 2628{
c663e5f5 2629 struct gpio_chip *gc = desc->gdev->chip;
ad17731d 2630 int val = !!value;
ae9847f4 2631 int ret = 0;
d2876d08 2632
e48d194d
LW
2633 /*
2634 * It's OK not to specify .direction_output() if the gpiochip is
2635 * output-only, but if there is then not even a .set() operation it
2636 * is pretty tricky to drive the output line.
2637 */
ae9847f4 2638 if (!gc->set && !gc->direction_output) {
6424de5a 2639 gpiod_warn(desc,
e48d194d
LW
2640 "%s: missing set() and direction_output() operations\n",
2641 __func__);
be1a4b13
LW
2642 return -EIO;
2643 }
2644
ae9847f4
RRD
2645 if (gc->direction_output) {
2646 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
2647 } else {
e48d194d 2648 /* Check that we are in output mode if we can */
ae9847f4
RRD
2649 if (gc->get_direction &&
2650 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
2651 gpiod_warn(desc,
2652 "%s: missing direction_output() operation\n",
2653 __func__);
2654 return -EIO;
2655 }
e48d194d
LW
2656 /*
2657 * If we can't actively set the direction, we are some
2658 * output-only chip, so just drive the output as desired.
2659 */
ae9847f4
RRD
2660 gc->set(gc, gpio_chip_hwgpio(desc), val);
2661 }
2662
c663e5f5 2663 if (!ret)
d2876d08 2664 set_bit(FLAG_IS_OUT, &desc->flags);
ad17731d 2665 trace_gpio_value(desc_to_gpio(desc), 0, val);
c663e5f5
LW
2666 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
2667 return ret;
d2876d08 2668}
ef70bbe1
PZ
2669
2670/**
2671 * gpiod_direction_output_raw - set the GPIO direction to output
2672 * @desc: GPIO to set to output
2673 * @value: initial output value of the GPIO
2674 *
2675 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2676 * be called safely on it. The initial value of the output must be specified
2677 * as raw value on the physical line without regard for the ACTIVE_LOW status.
2678 *
2679 * Return 0 in case of success, else an error code.
2680 */
2681int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
2682{
fdeb8e15 2683 VALIDATE_DESC(desc);
fac9d885 2684 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1
PZ
2685}
2686EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
2687
2688/**
90df4fe0 2689 * gpiod_direction_output - set the GPIO direction to output
ef70bbe1
PZ
2690 * @desc: GPIO to set to output
2691 * @value: initial output value of the GPIO
2692 *
2693 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2694 * be called safely on it. The initial value of the output must be specified
2695 * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
2696 * account.
2697 *
2698 * Return 0 in case of success, else an error code.
2699 */
2700int gpiod_direction_output(struct gpio_desc *desc, int value)
2701{
02e47980
LW
2702 int ret;
2703
fdeb8e15 2704 VALIDATE_DESC(desc);
ef70bbe1
PZ
2705 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2706 value = !value;
ad17731d
LW
2707 else
2708 value = !!value;
02e47980 2709
4e9439dd
HV
2710 /* GPIOs used for enabled IRQs shall not be set as output */
2711 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
2712 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
02e47980
LW
2713 gpiod_err(desc,
2714 "%s: tried to set a GPIO tied to an IRQ as output\n",
2715 __func__);
2716 return -EIO;
2717 }
2718
2719 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
2720 /* First see if we can enable open drain in hardware */
83522358 2721 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN);
02e47980
LW
2722 if (!ret)
2723 goto set_output_value;
2724 /* Emulate open drain by not actively driving the line high */
e735244e
BG
2725 if (value) {
2726 ret = gpiod_direction_input(desc);
2727 goto set_output_flag;
2728 }
1cef8b50 2729 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
83522358 2730 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE);
02e47980
LW
2731 if (!ret)
2732 goto set_output_value;
2733 /* Emulate open source by not actively driving the line low */
e735244e
BG
2734 if (!value) {
2735 ret = gpiod_direction_input(desc);
2736 goto set_output_flag;
2737 }
02e47980 2738 } else {
83522358 2739 gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL);
02e47980
LW
2740 }
2741
2742set_output_value:
5f4bf171 2743 ret = gpio_set_bias(desc);
2821ae5f
KG
2744 if (ret)
2745 return ret;
fac9d885 2746 return gpiod_direction_output_raw_commit(desc, value);
e735244e
BG
2747
2748set_output_flag:
2749 /*
2750 * When emulating open-source or open-drain functionalities by not
2751 * actively driving the line (setting mode to input) we still need to
2752 * set the IS_OUT flag or otherwise we won't be able to set the line
2753 * value anymore.
2754 */
2755 if (ret == 0)
2756 set_bit(FLAG_IS_OUT, &desc->flags);
2757 return ret;
ef70bbe1 2758}
79a9becd 2759EXPORT_SYMBOL_GPL(gpiod_direction_output);
d2876d08 2760
42112dd7
DP
2761/**
2762 * gpiod_enable_hw_timestamp_ns - Enable hardware timestamp in nanoseconds.
2763 *
2764 * @desc: GPIO to enable.
2765 * @flags: Flags related to GPIO edge.
2766 *
2767 * Return 0 in case of success, else negative error code.
2768 */
2769int gpiod_enable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags)
2770{
2771 int ret = 0;
2772 struct gpio_chip *gc;
2773
2774 VALIDATE_DESC(desc);
2775
2776 gc = desc->gdev->chip;
2777 if (!gc->en_hw_timestamp) {
2778 gpiod_warn(desc, "%s: hw ts not supported\n", __func__);
2779 return -ENOTSUPP;
2780 }
2781
2782 ret = gc->en_hw_timestamp(gc, gpio_chip_hwgpio(desc), flags);
2783 if (ret)
2784 gpiod_warn(desc, "%s: hw ts request failed\n", __func__);
2785
2786 return ret;
2787}
2788EXPORT_SYMBOL_GPL(gpiod_enable_hw_timestamp_ns);
2789
2790/**
2791 * gpiod_disable_hw_timestamp_ns - Disable hardware timestamp.
2792 *
2793 * @desc: GPIO to disable.
2794 * @flags: Flags related to GPIO edge, same value as used during enable call.
2795 *
2796 * Return 0 in case of success, else negative error code.
2797 */
2798int gpiod_disable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags)
2799{
2800 int ret = 0;
2801 struct gpio_chip *gc;
2802
2803 VALIDATE_DESC(desc);
2804
2805 gc = desc->gdev->chip;
2806 if (!gc->dis_hw_timestamp) {
2807 gpiod_warn(desc, "%s: hw ts not supported\n", __func__);
2808 return -ENOTSUPP;
2809 }
2810
2811 ret = gc->dis_hw_timestamp(gc, gpio_chip_hwgpio(desc), flags);
2812 if (ret)
2813 gpiod_warn(desc, "%s: hw ts release failed\n", __func__);
2814
2815 return ret;
2816}
2817EXPORT_SYMBOL_GPL(gpiod_disable_hw_timestamp_ns);
2818
8ced32ff
GU
2819/**
2820 * gpiod_set_config - sets @config for a GPIO
2821 * @desc: descriptor of the GPIO for which to set the configuration
2822 * @config: Same packed config format as generic pinconf
2823 *
2824 * Returns:
2825 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2826 * configuration.
2827 */
2828int gpiod_set_config(struct gpio_desc *desc, unsigned long config)
2829{
a0b66a73 2830 struct gpio_chip *gc;
8ced32ff
GU
2831
2832 VALIDATE_DESC(desc);
a0b66a73 2833 gc = desc->gdev->chip;
8ced32ff 2834
a0b66a73 2835 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
8ced32ff
GU
2836}
2837EXPORT_SYMBOL_GPL(gpiod_set_config);
2838
c4b5be98 2839/**
950d55f5
TR
2840 * gpiod_set_debounce - sets @debounce time for a GPIO
2841 * @desc: descriptor of the GPIO for which to set debounce time
2842 * @debounce: debounce time in microseconds
65d87656 2843 *
950d55f5
TR
2844 * Returns:
2845 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2846 * debounce time.
c4b5be98 2847 */
13daf489 2848int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce)
c4b5be98 2849{
8ced32ff 2850 unsigned long config;
be1a4b13 2851
2956b5d9 2852 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
8ced32ff 2853 return gpiod_set_config(desc, config);
c4b5be98 2854}
79a9becd 2855EXPORT_SYMBOL_GPL(gpiod_set_debounce);
372e722e 2856
e10f72bf
AJ
2857/**
2858 * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
2859 * @desc: descriptor of the GPIO for which to configure persistence
2860 * @transitory: True to lose state on suspend or reset, false for persistence
2861 *
2862 * Returns:
2863 * 0 on success, otherwise a negative error code.
2864 */
2865int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
2866{
156dd392 2867 VALIDATE_DESC(desc);
e10f72bf
AJ
2868 /*
2869 * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
2870 * persistence state.
2871 */
4fc5bfeb 2872 assign_bit(FLAG_TRANSITORY, &desc->flags, transitory);
e10f72bf
AJ
2873
2874 /* If the driver supports it, set the persistence state now */
baca3b15
AS
2875 return gpio_set_config_with_argument_optional(desc,
2876 PIN_CONFIG_PERSIST_STATE,
2877 !transitory);
e10f72bf 2878}
e10f72bf 2879
79a9becd
AC
2880/**
2881 * gpiod_is_active_low - test whether a GPIO is active-low or not
2882 * @desc: the gpio descriptor to test
2883 *
2884 * Returns 1 if the GPIO is active-low, 0 otherwise.
2885 */
2886int gpiod_is_active_low(const struct gpio_desc *desc)
372e722e 2887{
fdeb8e15 2888 VALIDATE_DESC(desc);
79a9becd 2889 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
372e722e 2890}
79a9becd 2891EXPORT_SYMBOL_GPL(gpiod_is_active_low);
d2876d08 2892
d3a5bcb4
MM
2893/**
2894 * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not
2895 * @desc: the gpio descriptor to change
2896 */
2897void gpiod_toggle_active_low(struct gpio_desc *desc)
2898{
2899 VALIDATE_DESC_VOID(desc);
2900 change_bit(FLAG_ACTIVE_LOW, &desc->flags);
2901}
2902EXPORT_SYMBOL_GPL(gpiod_toggle_active_low);
2903
234c5209
AS
2904static int gpio_chip_get_value(struct gpio_chip *gc, const struct gpio_desc *desc)
2905{
2906 return gc->get ? gc->get(gc, gpio_chip_hwgpio(desc)) : -EIO;
2907}
2908
d2876d08
DB
2909/* I/O calls are only valid after configuration completed; the relevant
2910 * "is this a valid GPIO" error checks should already have been done.
2911 *
2912 * "Get" operations are often inlinable as reading a pin value register,
2913 * and masking the relevant bit in that register.
2914 *
2915 * When "set" operations are inlinable, they involve writing that mask to
2916 * one register to set a low value, or a different register to set it high.
2917 * Otherwise locking is needed, so there may be little value to inlining.
2918 *
2919 *------------------------------------------------------------------------
2920 *
2921 * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
2922 * have requested the GPIO. That can include implicit requesting by
2923 * a direction setting call. Marking a gpio as requested locks its chip
2924 * in memory, guaranteeing that these table lookups need no more locking
2925 * and that gpiochip_remove() will fail.
2926 *
2927 * REVISIT when debugging, consider adding some instrumentation to ensure
2928 * that the GPIO was actually requested.
2929 */
2930
fac9d885 2931static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
d2876d08 2932{
0338f6a6 2933 struct gpio_chip *gc;
e20538b8 2934 int value;
d2876d08 2935
a0b66a73 2936 gc = desc->gdev->chip;
234c5209 2937 value = gpio_chip_get_value(gc, desc);
723a6303 2938 value = value < 0 ? value : !!value;
372e722e 2939 trace_gpio_value(desc_to_gpio(desc), 1, value);
3f397c21 2940 return value;
d2876d08 2941}
372e722e 2942
a0b66a73 2943static int gpio_chip_get_multiple(struct gpio_chip *gc,
eec1d566
LW
2944 unsigned long *mask, unsigned long *bits)
2945{
1cef8b50 2946 if (gc->get_multiple)
a0b66a73 2947 return gc->get_multiple(gc, mask, bits);
1cef8b50 2948 if (gc->get) {
eec1d566
LW
2949 int i, value;
2950
a0b66a73
LW
2951 for_each_set_bit(i, mask, gc->ngpio) {
2952 value = gc->get(gc, i);
eec1d566
LW
2953 if (value < 0)
2954 return value;
2955 __assign_bit(i, bits, value);
2956 }
2957 return 0;
2958 }
2959 return -EIO;
2960}
2961
2962int gpiod_get_array_value_complex(bool raw, bool can_sleep,
2963 unsigned int array_size,
2964 struct gpio_desc **desc_array,
77588c14 2965 struct gpio_array *array_info,
b9762beb 2966 unsigned long *value_bitmap)
eec1d566 2967{
d377f56f 2968 int ret, i = 0;
b17566a6
JK
2969
2970 /*
2971 * Validate array_info against desc_array and its size.
2972 * It should immediately follow desc_array if both
2973 * have been obtained from the same gpiod_get_array() call.
2974 */
2975 if (array_info && array_info->desc == desc_array &&
2976 array_size <= array_info->size &&
2977 (void *)array_info == desc_array + array_info->size) {
2978 if (!can_sleep)
2979 WARN_ON(array_info->chip->can_sleep);
2980
d377f56f 2981 ret = gpio_chip_get_multiple(array_info->chip,
b17566a6
JK
2982 array_info->get_mask,
2983 value_bitmap);
d377f56f
LW
2984 if (ret)
2985 return ret;
b17566a6
JK
2986
2987 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2988 bitmap_xor(value_bitmap, value_bitmap,
2989 array_info->invert_mask, array_size);
2990
b17566a6 2991 i = find_first_zero_bit(array_info->get_mask, array_size);
ae66eca0
AS
2992 if (i == array_size)
2993 return 0;
b17566a6
JK
2994 } else {
2995 array_info = NULL;
2996 }
eec1d566
LW
2997
2998 while (i < array_size) {
a0b66a73 2999 struct gpio_chip *gc = desc_array[i]->gdev->chip;
c80c4435
AS
3000 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
3001 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
3027743f 3002 unsigned long *mask, *bits;
c07ea8d0 3003 int first, j;
eec1d566 3004
a0b66a73 3005 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
c80c4435
AS
3006 mask = fastpath_mask;
3007 bits = fastpath_bits;
3027743f 3008 } else {
c354c295
AS
3009 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
3010
3011 mask = bitmap_alloc(gc->ngpio, flags);
3027743f
LA
3012 if (!mask)
3013 return -ENOMEM;
c80c4435 3014
c354c295
AS
3015 bits = bitmap_alloc(gc->ngpio, flags);
3016 if (!bits) {
3017 bitmap_free(mask);
3018 return -ENOMEM;
3019 }
3027743f
LA
3020 }
3021
a0b66a73 3022 bitmap_zero(mask, gc->ngpio);
3027743f 3023
eec1d566 3024 if (!can_sleep)
a0b66a73 3025 WARN_ON(gc->can_sleep);
eec1d566
LW
3026
3027 /* collect all inputs belonging to the same chip */
3028 first = i;
eec1d566
LW
3029 do {
3030 const struct gpio_desc *desc = desc_array[i];
3031 int hwgpio = gpio_chip_hwgpio(desc);
3032
3033 __set_bit(hwgpio, mask);
3034 i++;
b17566a6
JK
3035
3036 if (array_info)
35ae7f96
JK
3037 i = find_next_zero_bit(array_info->get_mask,
3038 array_size, i);
eec1d566 3039 } while ((i < array_size) &&
a0b66a73 3040 (desc_array[i]->gdev->chip == gc));
eec1d566 3041
a0b66a73 3042 ret = gpio_chip_get_multiple(gc, mask, bits);
3027743f 3043 if (ret) {
c80c4435 3044 if (mask != fastpath_mask)
c354c295
AS
3045 bitmap_free(mask);
3046 if (bits != fastpath_bits)
3047 bitmap_free(bits);
eec1d566 3048 return ret;
3027743f 3049 }
eec1d566 3050
b17566a6 3051 for (j = first; j < i; ) {
eec1d566
LW
3052 const struct gpio_desc *desc = desc_array[j];
3053 int hwgpio = gpio_chip_hwgpio(desc);
3054 int value = test_bit(hwgpio, bits);
3055
3056 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3057 value = !value;
b9762beb 3058 __assign_bit(j, value_bitmap, value);
eec1d566 3059 trace_gpio_value(desc_to_gpio(desc), 1, value);
799d5eb4 3060 j++;
b17566a6
JK
3061
3062 if (array_info)
35ae7f96
JK
3063 j = find_next_zero_bit(array_info->get_mask, i,
3064 j);
eec1d566 3065 }
3027743f 3066
c80c4435 3067 if (mask != fastpath_mask)
c354c295
AS
3068 bitmap_free(mask);
3069 if (bits != fastpath_bits)
3070 bitmap_free(bits);
eec1d566
LW
3071 }
3072 return 0;
3073}
3074
d2876d08 3075/**
79a9becd
AC
3076 * gpiod_get_raw_value() - return a gpio's raw value
3077 * @desc: gpio whose value will be returned
d2876d08 3078 *
79a9becd 3079 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3080 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd 3081 *
827a9b8b 3082 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3083 * complain if the GPIO chip functions potentially sleep.
d2876d08 3084 */
79a9becd 3085int gpiod_get_raw_value(const struct gpio_desc *desc)
d2876d08 3086{
fdeb8e15 3087 VALIDATE_DESC(desc);
3285170f 3088 /* Should be using gpiod_get_raw_value_cansleep() */
fdeb8e15 3089 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3090 return gpiod_get_raw_value_commit(desc);
d2876d08 3091}
79a9becd 3092EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
372e722e 3093
79a9becd
AC
3094/**
3095 * gpiod_get_value() - return a gpio's value
3096 * @desc: gpio whose value will be returned
3097 *
3098 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3099 * account, or negative errno on failure.
79a9becd 3100 *
827a9b8b 3101 * This function can be called from contexts where we cannot sleep, and will
79a9becd
AC
3102 * complain if the GPIO chip functions potentially sleep.
3103 */
3104int gpiod_get_value(const struct gpio_desc *desc)
372e722e 3105{
79a9becd 3106 int value;
fdeb8e15
LW
3107
3108 VALIDATE_DESC(desc);
3285170f 3109 /* Should be using gpiod_get_value_cansleep() */
fdeb8e15 3110 WARN_ON(desc->gdev->chip->can_sleep);
79a9becd 3111
fac9d885 3112 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3113 if (value < 0)
3114 return value;
3115
79a9becd
AC
3116 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3117 value = !value;
3118
3119 return value;
372e722e 3120}
79a9becd 3121EXPORT_SYMBOL_GPL(gpiod_get_value);
d2876d08 3122
eec1d566
LW
3123/**
3124 * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
b9762beb 3125 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3126 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3127 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3128 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3129 *
3130 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3131 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3132 * else an error code.
3133 *
827a9b8b 3134 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
3135 * and it will complain if the GPIO chip functions potentially sleep.
3136 */
3137int gpiod_get_raw_array_value(unsigned int array_size,
b9762beb 3138 struct gpio_desc **desc_array,
77588c14 3139 struct gpio_array *array_info,
b9762beb 3140 unsigned long *value_bitmap)
eec1d566
LW
3141{
3142 if (!desc_array)
3143 return -EINVAL;
3144 return gpiod_get_array_value_complex(true, false, array_size,
77588c14
JK
3145 desc_array, array_info,
3146 value_bitmap);
eec1d566
LW
3147}
3148EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
3149
3150/**
3151 * gpiod_get_array_value() - read values from an array of GPIOs
b9762beb 3152 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3153 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3154 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3155 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3156 *
3157 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3158 * into account. Return 0 in case of success, else an error code.
3159 *
827a9b8b 3160 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
3161 * and it will complain if the GPIO chip functions potentially sleep.
3162 */
3163int gpiod_get_array_value(unsigned int array_size,
b9762beb 3164 struct gpio_desc **desc_array,
77588c14 3165 struct gpio_array *array_info,
b9762beb 3166 unsigned long *value_bitmap)
eec1d566
LW
3167{
3168 if (!desc_array)
3169 return -EINVAL;
3170 return gpiod_get_array_value_complex(false, false, array_size,
77588c14
JK
3171 desc_array, array_info,
3172 value_bitmap);
eec1d566
LW
3173}
3174EXPORT_SYMBOL_GPL(gpiod_get_array_value);
3175
aca5ce14 3176/*
fac9d885 3177 * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
79a9becd 3178 * @desc: gpio descriptor whose state need to be set.
20a8a968 3179 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
aca5ce14 3180 */
fac9d885 3181static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
aca5ce14 3182{
d377f56f 3183 int ret = 0;
a0b66a73 3184 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
3185 int offset = gpio_chip_hwgpio(desc);
3186
aca5ce14 3187 if (value) {
a0b66a73 3188 ret = gc->direction_input(gc, offset);
aca5ce14 3189 } else {
a0b66a73 3190 ret = gc->direction_output(gc, offset, 0);
d377f56f 3191 if (!ret)
372e722e 3192 set_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 3193 }
d377f56f
LW
3194 trace_gpio_direction(desc_to_gpio(desc), value, ret);
3195 if (ret < 0)
6424de5a
MB
3196 gpiod_err(desc,
3197 "%s: Error in set_value for open drain err %d\n",
d377f56f 3198 __func__, ret);
aca5ce14
LD
3199}
3200
25553ff0 3201/*
79a9becd
AC
3202 * _gpio_set_open_source_value() - Set the open source gpio's value.
3203 * @desc: gpio descriptor whose state need to be set.
20a8a968 3204 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
25553ff0 3205 */
fac9d885 3206static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
25553ff0 3207{
d377f56f 3208 int ret = 0;
a0b66a73 3209 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
3210 int offset = gpio_chip_hwgpio(desc);
3211
25553ff0 3212 if (value) {
a0b66a73 3213 ret = gc->direction_output(gc, offset, 1);
d377f56f 3214 if (!ret)
372e722e 3215 set_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 3216 } else {
a0b66a73 3217 ret = gc->direction_input(gc, offset);
25553ff0 3218 }
d377f56f
LW
3219 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
3220 if (ret < 0)
6424de5a
MB
3221 gpiod_err(desc,
3222 "%s: Error in set_value for open source err %d\n",
d377f56f 3223 __func__, ret);
25553ff0
LD
3224}
3225
fac9d885 3226static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
d2876d08 3227{
0338f6a6 3228 struct gpio_chip *gc;
d2876d08 3229
a0b66a73 3230 gc = desc->gdev->chip;
372e722e 3231 trace_gpio_value(desc_to_gpio(desc), 0, value);
a0b66a73 3232 gc->set(gc, gpio_chip_hwgpio(desc), value);
372e722e
AC
3233}
3234
5f424243
RI
3235/*
3236 * set multiple outputs on the same chip;
3237 * use the chip's set_multiple function if available;
3238 * otherwise set the outputs sequentially;
a0b66a73 3239 * @chip: the GPIO chip we operate on
5f424243
RI
3240 * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
3241 * defines which outputs are to be changed
3242 * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
3243 * defines the values the outputs specified by mask are to be set to
3244 */
a0b66a73 3245static void gpio_chip_set_multiple(struct gpio_chip *gc,
5f424243
RI
3246 unsigned long *mask, unsigned long *bits)
3247{
a0b66a73
LW
3248 if (gc->set_multiple) {
3249 gc->set_multiple(gc, mask, bits);
5f424243 3250 } else {
5e4e6fb3
AS
3251 unsigned int i;
3252
3253 /* set outputs if the corresponding mask bit is set */
a0b66a73
LW
3254 for_each_set_bit(i, mask, gc->ngpio)
3255 gc->set(gc, i, test_bit(i, bits));
5f424243
RI
3256 }
3257}
3258
3027743f 3259int gpiod_set_array_value_complex(bool raw, bool can_sleep,
3c940660
GU
3260 unsigned int array_size,
3261 struct gpio_desc **desc_array,
3262 struct gpio_array *array_info,
3263 unsigned long *value_bitmap)
5f424243
RI
3264{
3265 int i = 0;
3266
b17566a6
JK
3267 /*
3268 * Validate array_info against desc_array and its size.
3269 * It should immediately follow desc_array if both
3270 * have been obtained from the same gpiod_get_array() call.
3271 */
3272 if (array_info && array_info->desc == desc_array &&
3273 array_size <= array_info->size &&
3274 (void *)array_info == desc_array + array_info->size) {
3275 if (!can_sleep)
3276 WARN_ON(array_info->chip->can_sleep);
3277
3278 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3279 bitmap_xor(value_bitmap, value_bitmap,
3280 array_info->invert_mask, array_size);
3281
3282 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
3283 value_bitmap);
3284
b17566a6 3285 i = find_first_zero_bit(array_info->set_mask, array_size);
ae66eca0
AS
3286 if (i == array_size)
3287 return 0;
b17566a6
JK
3288 } else {
3289 array_info = NULL;
3290 }
3291
5f424243 3292 while (i < array_size) {
a0b66a73 3293 struct gpio_chip *gc = desc_array[i]->gdev->chip;
c80c4435
AS
3294 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
3295 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
3027743f 3296 unsigned long *mask, *bits;
5f424243
RI
3297 int count = 0;
3298
a0b66a73 3299 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
c80c4435
AS
3300 mask = fastpath_mask;
3301 bits = fastpath_bits;
3027743f 3302 } else {
c354c295
AS
3303 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
3304
3305 mask = bitmap_alloc(gc->ngpio, flags);
3027743f
LA
3306 if (!mask)
3307 return -ENOMEM;
c80c4435 3308
c354c295
AS
3309 bits = bitmap_alloc(gc->ngpio, flags);
3310 if (!bits) {
3311 bitmap_free(mask);
3312 return -ENOMEM;
3313 }
3027743f
LA
3314 }
3315
a0b66a73 3316 bitmap_zero(mask, gc->ngpio);
3027743f 3317
38e003f4 3318 if (!can_sleep)
a0b66a73 3319 WARN_ON(gc->can_sleep);
38e003f4 3320
5f424243
RI
3321 do {
3322 struct gpio_desc *desc = desc_array[i];
3323 int hwgpio = gpio_chip_hwgpio(desc);
b9762beb 3324 int value = test_bit(i, value_bitmap);
5f424243 3325
b17566a6
JK
3326 /*
3327 * Pins applicable for fast input but not for
3328 * fast output processing may have been already
3329 * inverted inside the fast path, skip them.
3330 */
3331 if (!raw && !(array_info &&
3332 test_bit(i, array_info->invert_mask)) &&
3333 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
5f424243
RI
3334 value = !value;
3335 trace_gpio_value(desc_to_gpio(desc), 0, value);
3336 /*
3337 * collect all normal outputs belonging to the same chip
3338 * open drain and open source outputs are set individually
3339 */
02e47980 3340 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
fac9d885 3341 gpio_set_open_drain_value_commit(desc, value);
02e47980 3342 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
fac9d885 3343 gpio_set_open_source_value_commit(desc, value);
5f424243
RI
3344 } else {
3345 __set_bit(hwgpio, mask);
4fc5bfeb 3346 __assign_bit(hwgpio, bits, value);
5f424243
RI
3347 count++;
3348 }
3349 i++;
b17566a6
JK
3350
3351 if (array_info)
35ae7f96
JK
3352 i = find_next_zero_bit(array_info->set_mask,
3353 array_size, i);
fdeb8e15 3354 } while ((i < array_size) &&
a0b66a73 3355 (desc_array[i]->gdev->chip == gc));
5f424243 3356 /* push collected bits to outputs */
38e003f4 3357 if (count != 0)
a0b66a73 3358 gpio_chip_set_multiple(gc, mask, bits);
3027743f 3359
c80c4435 3360 if (mask != fastpath_mask)
c354c295
AS
3361 bitmap_free(mask);
3362 if (bits != fastpath_bits)
3363 bitmap_free(bits);
5f424243 3364 }
3027743f 3365 return 0;
5f424243
RI
3366}
3367
d2876d08 3368/**
79a9becd
AC
3369 * gpiod_set_raw_value() - assign a gpio's raw value
3370 * @desc: gpio whose value will be assigned
d2876d08 3371 * @value: value to assign
d2876d08 3372 *
79a9becd
AC
3373 * Set the raw value of the GPIO, i.e. the value of its physical line without
3374 * regard for its ACTIVE_LOW status.
3375 *
827a9b8b 3376 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3377 * complain if the GPIO chip functions potentially sleep.
d2876d08 3378 */
79a9becd 3379void gpiod_set_raw_value(struct gpio_desc *desc, int value)
372e722e 3380{
fdeb8e15 3381 VALIDATE_DESC_VOID(desc);
3285170f 3382 /* Should be using gpiod_set_raw_value_cansleep() */
fdeb8e15 3383 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3384 gpiod_set_raw_value_commit(desc, value);
d2876d08 3385}
79a9becd 3386EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
d2876d08 3387
1e77fc82
GU
3388/**
3389 * gpiod_set_value_nocheck() - set a GPIO line value without checking
3390 * @desc: the descriptor to set the value on
3391 * @value: value to set
3392 *
3393 * This sets the value of a GPIO line backing a descriptor, applying
3394 * different semantic quirks like active low and open drain/source
3395 * handling.
3396 */
3397static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
3398{
3399 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3400 value = !value;
3401 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
3402 gpio_set_open_drain_value_commit(desc, value);
3403 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
3404 gpio_set_open_source_value_commit(desc, value);
3405 else
3406 gpiod_set_raw_value_commit(desc, value);
3407}
3408
d2876d08 3409/**
79a9becd
AC
3410 * gpiod_set_value() - assign a gpio's value
3411 * @desc: gpio whose value will be assigned
3412 * @value: value to assign
3413 *
02e47980
LW
3414 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
3415 * OPEN_DRAIN and OPEN_SOURCE flags into account.
d2876d08 3416 *
827a9b8b 3417 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3418 * complain if the GPIO chip functions potentially sleep.
d2876d08 3419 */
79a9becd 3420void gpiod_set_value(struct gpio_desc *desc, int value)
d2876d08 3421{
fdeb8e15 3422 VALIDATE_DESC_VOID(desc);
3285170f 3423 /* Should be using gpiod_set_value_cansleep() */
fdeb8e15 3424 WARN_ON(desc->gdev->chip->can_sleep);
1e77fc82 3425 gpiod_set_value_nocheck(desc, value);
372e722e 3426}
79a9becd 3427EXPORT_SYMBOL_GPL(gpiod_set_value);
d2876d08 3428
5f424243 3429/**
3fff99bc 3430 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
b9762beb 3431 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3432 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3433 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3434 * @value_bitmap: bitmap of values to assign
5f424243
RI
3435 *
3436 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3437 * without regard for their ACTIVE_LOW status.
3438 *
827a9b8b 3439 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3440 * complain if the GPIO chip functions potentially sleep.
3441 */
3027743f 3442int gpiod_set_raw_array_value(unsigned int array_size,
3c940660
GU
3443 struct gpio_desc **desc_array,
3444 struct gpio_array *array_info,
3445 unsigned long *value_bitmap)
5f424243
RI
3446{
3447 if (!desc_array)
3027743f
LA
3448 return -EINVAL;
3449 return gpiod_set_array_value_complex(true, false, array_size,
77588c14 3450 desc_array, array_info, value_bitmap);
5f424243 3451}
3fff99bc 3452EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
5f424243
RI
3453
3454/**
3fff99bc 3455 * gpiod_set_array_value() - assign values to an array of GPIOs
b9762beb 3456 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3457 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3458 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3459 * @value_bitmap: bitmap of values to assign
5f424243
RI
3460 *
3461 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3462 * into account.
3463 *
827a9b8b 3464 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3465 * complain if the GPIO chip functions potentially sleep.
3466 */
cf9af0d5
GU
3467int gpiod_set_array_value(unsigned int array_size,
3468 struct gpio_desc **desc_array,
3469 struct gpio_array *array_info,
3470 unsigned long *value_bitmap)
5f424243
RI
3471{
3472 if (!desc_array)
cf9af0d5
GU
3473 return -EINVAL;
3474 return gpiod_set_array_value_complex(false, false, array_size,
3475 desc_array, array_info,
3476 value_bitmap);
5f424243 3477}
3fff99bc 3478EXPORT_SYMBOL_GPL(gpiod_set_array_value);
5f424243 3479
d2876d08 3480/**
79a9becd
AC
3481 * gpiod_cansleep() - report whether gpio value access may sleep
3482 * @desc: gpio to check
d2876d08 3483 *
d2876d08 3484 */
79a9becd 3485int gpiod_cansleep(const struct gpio_desc *desc)
372e722e 3486{
fdeb8e15
LW
3487 VALIDATE_DESC(desc);
3488 return desc->gdev->chip->can_sleep;
d2876d08 3489}
79a9becd 3490EXPORT_SYMBOL_GPL(gpiod_cansleep);
d2876d08 3491
90b39402
LW
3492/**
3493 * gpiod_set_consumer_name() - set the consumer name for the descriptor
3494 * @desc: gpio to set the consumer name on
3495 * @name: the new consumer name
3496 */
18534df4 3497int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
90b39402 3498{
18534df4
MS
3499 VALIDATE_DESC(desc);
3500 if (name) {
3501 name = kstrdup_const(name, GFP_KERNEL);
3502 if (!name)
3503 return -ENOMEM;
3504 }
3505
3506 kfree_const(desc->label);
3507 desc_set_label(desc, name);
3508
3509 return 0;
90b39402
LW
3510}
3511EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
3512
0f6d504e 3513/**
79a9becd
AC
3514 * gpiod_to_irq() - return the IRQ corresponding to a GPIO
3515 * @desc: gpio whose IRQ will be returned (already requested)
0f6d504e 3516 *
79a9becd
AC
3517 * Return the IRQ corresponding to the passed GPIO, or an error code in case of
3518 * error.
0f6d504e 3519 */
79a9becd 3520int gpiod_to_irq(const struct gpio_desc *desc)
0f6d504e 3521{
a0b66a73 3522 struct gpio_chip *gc;
4c37ce86 3523 int offset;
0f6d504e 3524
79bb71bd
LW
3525 /*
3526 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
3527 * requires this function to not return zero on an invalid descriptor
3528 * but rather a negative error number.
3529 */
bfbbe44d 3530 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
79bb71bd
LW
3531 return -EINVAL;
3532
a0b66a73 3533 gc = desc->gdev->chip;
372e722e 3534 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
3535 if (gc->to_irq) {
3536 int retirq = gc->to_irq(gc, offset);
4c37ce86
LW
3537
3538 /* Zero means NO_IRQ */
3539 if (!retirq)
3540 return -ENXIO;
3541
3542 return retirq;
3543 }
ae42f928
SP
3544#ifdef CONFIG_GPIOLIB_IRQCHIP
3545 if (gc->irq.chip) {
3546 /*
3547 * Avoid race condition with other code, which tries to lookup
3548 * an IRQ before the irqchip has been properly registered,
3549 * i.e. while gpiochip is still being brought up.
3550 */
3551 return -EPROBE_DEFER;
3552 }
3553#endif
4c37ce86 3554 return -ENXIO;
0f6d504e 3555}
79a9becd 3556EXPORT_SYMBOL_GPL(gpiod_to_irq);
0f6d504e 3557
d468bf9e 3558/**
e3a2e878 3559 * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
a0b66a73 3560 * @gc: the chip the GPIO to lock belongs to
d74be6df 3561 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3562 *
3563 * This is used directly by GPIO drivers that want to lock down
f438acdf 3564 * a certain GPIO line to be used for IRQs.
d468bf9e 3565 */
a0b66a73 3566int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset)
372e722e 3567{
9c10280d
LW
3568 struct gpio_desc *desc;
3569
a0b66a73 3570 desc = gpiochip_get_desc(gc, offset);
9c10280d
LW
3571 if (IS_ERR(desc))
3572 return PTR_ERR(desc);
3573
60f8339e
LW
3574 /*
3575 * If it's fast: flush the direction setting if something changed
3576 * behind our back
3577 */
a0b66a73 3578 if (!gc->can_sleep && gc->get_direction) {
80956790 3579 int dir = gpiod_get_direction(desc);
9c10280d 3580
36b31279 3581 if (dir < 0) {
a0b66a73 3582 chip_err(gc, "%s: cannot get GPIO direction\n",
36b31279
AS
3583 __func__);
3584 return dir;
3585 }
9c10280d 3586 }
d468bf9e 3587
e9bdf7e6
LW
3588 /* To be valid for IRQ the line needs to be input or open drain */
3589 if (test_bit(FLAG_IS_OUT, &desc->flags) &&
3590 !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
a0b66a73 3591 chip_err(gc,
b1911710
AS
3592 "%s: tried to flag a GPIO set as output for IRQ\n",
3593 __func__);
d468bf9e
LW
3594 return -EIO;
3595 }
3596
9c10280d 3597 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3598 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3599
3600 /*
3601 * If the consumer has not set up a label (such as when the
3602 * IRQ is referenced from .to_irq()) we set up a label here
3603 * so it is clear this is used as an interrupt.
3604 */
3605 if (!desc->label)
3606 desc_set_label(desc, "interrupt");
3607
d468bf9e 3608 return 0;
372e722e 3609}
e3a2e878 3610EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
d2876d08 3611
d468bf9e 3612/**
e3a2e878 3613 * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
a0b66a73 3614 * @gc: the chip the GPIO to lock belongs to
d74be6df 3615 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3616 *
3617 * This is used directly by GPIO drivers that want to indicate
3618 * that a certain GPIO is no longer used exclusively for IRQ.
d2876d08 3619 */
a0b66a73 3620void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset)
d468bf9e 3621{
3940c34a
LW
3622 struct gpio_desc *desc;
3623
a0b66a73 3624 desc = gpiochip_get_desc(gc, offset);
3940c34a 3625 if (IS_ERR(desc))
d468bf9e 3626 return;
d2876d08 3627
3940c34a 3628 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3629 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3630
3631 /* If we only had this marking, erase it */
3632 if (desc->label && !strcmp(desc->label, "interrupt"))
3633 desc_set_label(desc, NULL);
d468bf9e 3634}
e3a2e878 3635EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
d468bf9e 3636
a0b66a73 3637void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3638{
a0b66a73 3639 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3640
3641 if (!IS_ERR(desc) &&
3642 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
3643 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3644}
3645EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
3646
a0b66a73 3647void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3648{
a0b66a73 3649 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3650
3651 if (!IS_ERR(desc) &&
3652 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
e9bdf7e6
LW
3653 /*
3654 * We must not be output when using IRQ UNLESS we are
3655 * open drain.
3656 */
3657 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) &&
3658 !test_bit(FLAG_OPEN_DRAIN, &desc->flags));
4e9439dd
HV
3659 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3660 }
3661}
3662EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
3663
a0b66a73 3664bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset)
6cee3821 3665{
a0b66a73 3666 if (offset >= gc->ngpio)
6cee3821
LW
3667 return false;
3668
a0b66a73 3669 return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags);
6cee3821
LW
3670}
3671EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
3672
a0b66a73 3673int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238
HV
3674{
3675 int ret;
3676
a0b66a73 3677 if (!try_module_get(gc->gpiodev->owner))
4e6b8238
HV
3678 return -ENODEV;
3679
a0b66a73 3680 ret = gpiochip_lock_as_irq(gc, offset);
4e6b8238 3681 if (ret) {
a0b66a73
LW
3682 chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset);
3683 module_put(gc->gpiodev->owner);
4e6b8238
HV
3684 return ret;
3685 }
3686 return 0;
3687}
3688EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
3689
a0b66a73 3690void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238 3691{
a0b66a73
LW
3692 gpiochip_unlock_as_irq(gc, offset);
3693 module_put(gc->gpiodev->owner);
4e6b8238
HV
3694}
3695EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
3696
a0b66a73 3697bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset)
143b65d6 3698{
a0b66a73 3699 if (offset >= gc->ngpio)
143b65d6
LW
3700 return false;
3701
a0b66a73 3702 return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3703}
3704EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
3705
a0b66a73 3706bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset)
143b65d6 3707{
a0b66a73 3708 if (offset >= gc->ngpio)
143b65d6
LW
3709 return false;
3710
a0b66a73 3711 return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3712}
3713EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
3714
a0b66a73 3715bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset)
05f479bf 3716{
a0b66a73 3717 if (offset >= gc->ngpio)
05f479bf
CK
3718 return false;
3719
a0b66a73 3720 return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags);
05f479bf
CK
3721}
3722EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
3723
79a9becd
AC
3724/**
3725 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
3726 * @desc: gpio whose value will be returned
3727 *
3728 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3729 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd
AC
3730 *
3731 * This function is to be called from contexts that can sleep.
d2876d08 3732 */
79a9becd 3733int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
d2876d08 3734{
5d5dfc50 3735 might_sleep();
fdeb8e15 3736 VALIDATE_DESC(desc);
fac9d885 3737 return gpiod_get_raw_value_commit(desc);
d2876d08 3738}
79a9becd 3739EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
372e722e 3740
79a9becd
AC
3741/**
3742 * gpiod_get_value_cansleep() - return a gpio's value
3743 * @desc: gpio whose value will be returned
3744 *
3745 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3746 * account, or negative errno on failure.
79a9becd
AC
3747 *
3748 * This function is to be called from contexts that can sleep.
3749 */
3750int gpiod_get_value_cansleep(const struct gpio_desc *desc)
d2876d08 3751{
3f397c21 3752 int value;
d2876d08 3753
5d5dfc50 3754 might_sleep();
fdeb8e15 3755 VALIDATE_DESC(desc);
fac9d885 3756 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3757 if (value < 0)
3758 return value;
3759
79a9becd
AC
3760 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3761 value = !value;
3762
3f397c21 3763 return value;
d2876d08 3764}
79a9becd 3765EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
372e722e 3766
eec1d566
LW
3767/**
3768 * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
b9762beb 3769 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3770 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3771 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3772 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3773 *
3774 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3775 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3776 * else an error code.
3777 *
3778 * This function is to be called from contexts that can sleep.
3779 */
3780int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
3781 struct gpio_desc **desc_array,
77588c14 3782 struct gpio_array *array_info,
b9762beb 3783 unsigned long *value_bitmap)
eec1d566 3784{
5d5dfc50 3785 might_sleep();
eec1d566
LW
3786 if (!desc_array)
3787 return -EINVAL;
3788 return gpiod_get_array_value_complex(true, true, array_size,
77588c14
JK
3789 desc_array, array_info,
3790 value_bitmap);
eec1d566
LW
3791}
3792EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
3793
3794/**
3795 * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
b9762beb 3796 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3797 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3798 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3799 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3800 *
3801 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3802 * into account. Return 0 in case of success, else an error code.
3803 *
3804 * This function is to be called from contexts that can sleep.
3805 */
3806int gpiod_get_array_value_cansleep(unsigned int array_size,
3807 struct gpio_desc **desc_array,
77588c14 3808 struct gpio_array *array_info,
b9762beb 3809 unsigned long *value_bitmap)
eec1d566 3810{
5d5dfc50 3811 might_sleep();
eec1d566
LW
3812 if (!desc_array)
3813 return -EINVAL;
3814 return gpiod_get_array_value_complex(false, true, array_size,
77588c14
JK
3815 desc_array, array_info,
3816 value_bitmap);
eec1d566
LW
3817}
3818EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
3819
79a9becd
AC
3820/**
3821 * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
3822 * @desc: gpio whose value will be assigned
3823 * @value: value to assign
3824 *
3825 * Set the raw value of the GPIO, i.e. the value of its physical line without
3826 * regard for its ACTIVE_LOW status.
3827 *
3828 * This function is to be called from contexts that can sleep.
3829 */
3830void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
372e722e 3831{
5d5dfc50 3832 might_sleep();
fdeb8e15 3833 VALIDATE_DESC_VOID(desc);
fac9d885 3834 gpiod_set_raw_value_commit(desc, value);
372e722e 3835}
79a9becd 3836EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
d2876d08 3837
79a9becd
AC
3838/**
3839 * gpiod_set_value_cansleep() - assign a gpio's value
3840 * @desc: gpio whose value will be assigned
3841 * @value: value to assign
3842 *
3843 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
3844 * account
3845 *
3846 * This function is to be called from contexts that can sleep.
3847 */
3848void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
d2876d08 3849{
5d5dfc50 3850 might_sleep();
fdeb8e15 3851 VALIDATE_DESC_VOID(desc);
1e77fc82 3852 gpiod_set_value_nocheck(desc, value);
372e722e 3853}
79a9becd 3854EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
d2876d08 3855
5f424243 3856/**
3fff99bc 3857 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3858 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3859 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3860 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3861 * @value_bitmap: bitmap of values to assign
5f424243
RI
3862 *
3863 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3864 * without regard for their ACTIVE_LOW status.
3865 *
3866 * This function is to be called from contexts that can sleep.
3867 */
3027743f 3868int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3c940660
GU
3869 struct gpio_desc **desc_array,
3870 struct gpio_array *array_info,
3871 unsigned long *value_bitmap)
5f424243 3872{
5d5dfc50 3873 might_sleep();
5f424243 3874 if (!desc_array)
3027743f
LA
3875 return -EINVAL;
3876 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
77588c14 3877 array_info, value_bitmap);
5f424243 3878}
3fff99bc 3879EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
5f424243 3880
3946d187
DT
3881/**
3882 * gpiod_add_lookup_tables() - register GPIO device consumers
3883 * @tables: list of tables of consumers to register
3884 * @n: number of tables in the list
3885 */
3886void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
3887{
3888 unsigned int i;
3889
3890 mutex_lock(&gpio_lookup_lock);
3891
3892 for (i = 0; i < n; i++)
3893 list_add_tail(&tables[i]->list, &gpio_lookup_list);
3894
3895 mutex_unlock(&gpio_lookup_lock);
3896}
3897
5f424243 3898/**
3fff99bc 3899 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3900 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3901 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3902 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3903 * @value_bitmap: bitmap of values to assign
5f424243
RI
3904 *
3905 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3906 * into account.
3907 *
3908 * This function is to be called from contexts that can sleep.
3909 */
cf9af0d5
GU
3910int gpiod_set_array_value_cansleep(unsigned int array_size,
3911 struct gpio_desc **desc_array,
3912 struct gpio_array *array_info,
3913 unsigned long *value_bitmap)
5f424243 3914{
5d5dfc50 3915 might_sleep();
5f424243 3916 if (!desc_array)
cf9af0d5
GU
3917 return -EINVAL;
3918 return gpiod_set_array_value_complex(false, true, array_size,
3919 desc_array, array_info,
3920 value_bitmap);
5f424243 3921}
3fff99bc 3922EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
5f424243 3923
9ce4ed5b
BG
3924void gpiod_line_state_notify(struct gpio_desc *desc, unsigned long action)
3925{
3926 blocking_notifier_call_chain(&desc->gdev->line_state_notifier,
3927 action, desc);
3928}
3929
bae48da2 3930/**
ad824783
AC
3931 * gpiod_add_lookup_table() - register GPIO device consumers
3932 * @table: table of consumers to register
bae48da2 3933 */
ad824783 3934void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
bae48da2 3935{
49fdfe66 3936 gpiod_add_lookup_tables(&table, 1);
bae48da2 3937}
226b2242 3938EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
bae48da2 3939
be9015ab
SK
3940/**
3941 * gpiod_remove_lookup_table() - unregister GPIO device consumers
3942 * @table: table of consumers to unregister
3943 */
3944void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
3945{
d321ad12
AS
3946 /* Nothing to remove */
3947 if (!table)
3948 return;
3949
be9015ab
SK
3950 mutex_lock(&gpio_lookup_lock);
3951
3952 list_del(&table->list);
3953
3954 mutex_unlock(&gpio_lookup_lock);
3955}
226b2242 3956EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
be9015ab 3957
a411e81e
BG
3958/**
3959 * gpiod_add_hogs() - register a set of GPIO hogs from machine code
3960 * @hogs: table of gpio hog entries with a zeroed sentinel at the end
3961 */
3962void gpiod_add_hogs(struct gpiod_hog *hogs)
3963{
a411e81e
BG
3964 struct gpiod_hog *hog;
3965
3966 mutex_lock(&gpio_machine_hogs_mutex);
3967
3968 for (hog = &hogs[0]; hog->chip_label; hog++) {
3969 list_add_tail(&hog->list, &gpio_machine_hogs);
3970
3971 /*
3972 * The chip may have been registered earlier, so check if it
3973 * exists and, if so, try to hog the line now.
3974 */
db546960
BG
3975 struct gpio_device *gdev __free(gpio_device_put) =
3976 gpio_device_find_by_label(hog->chip_label);
3977 if (gdev)
3978 gpiochip_machine_hog(gpio_device_get_chip(gdev), hog);
a411e81e
BG
3979 }
3980
3981 mutex_unlock(&gpio_machine_hogs_mutex);
3982}
3983EXPORT_SYMBOL_GPL(gpiod_add_hogs);
3984
dd61b292
BG
3985void gpiod_remove_hogs(struct gpiod_hog *hogs)
3986{
3987 struct gpiod_hog *hog;
3988
3989 mutex_lock(&gpio_machine_hogs_mutex);
3990 for (hog = &hogs[0]; hog->chip_label; hog++)
3991 list_del(&hog->list);
3992 mutex_unlock(&gpio_machine_hogs_mutex);
3993}
3994EXPORT_SYMBOL_GPL(gpiod_remove_hogs);
3995
ad824783 3996static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
bae48da2
AC
3997{
3998 const char *dev_id = dev ? dev_name(dev) : NULL;
ad824783 3999 struct gpiod_lookup_table *table;
bae48da2 4000
ad824783
AC
4001 list_for_each_entry(table, &gpio_lookup_list, list) {
4002 if (table->dev_id && dev_id) {
4003 /*
4004 * Valid strings on both ends, must be identical to have
4005 * a match
4006 */
4007 if (!strcmp(table->dev_id, dev_id))
c31071ea 4008 return table;
ad824783
AC
4009 } else {
4010 /*
4011 * One of the pointers is NULL, so both must be to have
4012 * a match
4013 */
4014 if (dev_id == table->dev_id)
c31071ea 4015 return table;
ad824783
AC
4016 }
4017 }
bae48da2 4018
c31071ea 4019 return NULL;
ad824783 4020}
bae48da2 4021
ad824783 4022static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
fed7026a 4023 unsigned int idx, unsigned long *flags)
ad824783 4024{
2a3cf6a3 4025 struct gpio_desc *desc = ERR_PTR(-ENOENT);
ad824783
AC
4026 struct gpiod_lookup_table *table;
4027 struct gpiod_lookup *p;
db546960 4028 struct gpio_chip *gc;
bae48da2 4029
c31071ea
BG
4030 guard(mutex)(&gpio_lookup_lock);
4031
ad824783
AC
4032 table = gpiod_find_lookup_table(dev);
4033 if (!table)
4034 return desc;
bae48da2 4035
4c033b54 4036 for (p = &table->table[0]; p->key; p++) {
ad824783 4037 /* idx must always match exactly */
bae48da2
AC
4038 if (p->idx != idx)
4039 continue;
4040
ad824783
AC
4041 /* If the lookup entry has a con_id, require exact match */
4042 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
4043 continue;
bae48da2 4044
4c033b54
GU
4045 if (p->chip_hwnum == U16_MAX) {
4046 desc = gpio_name_to_desc(p->key);
4047 if (desc) {
4048 *flags = p->flags;
4049 return desc;
4050 }
4051
4052 dev_warn(dev, "cannot find GPIO line %s, deferring\n",
4053 p->key);
4054 return ERR_PTR(-EPROBE_DEFER);
4055 }
4056
db546960
BG
4057 struct gpio_device *gdev __free(gpio_device_put) =
4058 gpio_device_find_by_label(p->key);
4059 if (!gdev) {
8853daf3
JK
4060 /*
4061 * As the lookup table indicates a chip with
4c033b54 4062 * p->key should exist, assume it may
8853daf3
JK
4063 * still appear later and let the interested
4064 * consumer be probed again or let the Deferred
4065 * Probe infrastructure handle the error.
4066 */
4067 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
4c033b54 4068 p->key);
8853daf3 4069 return ERR_PTR(-EPROBE_DEFER);
ad824783 4070 }
bae48da2 4071
db546960
BG
4072 gc = gpio_device_get_chip(gdev);
4073
a0b66a73 4074 if (gc->ngpio <= p->chip_hwnum) {
2a3cf6a3 4075 dev_err(dev,
d935bd50 4076 "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n",
a0b66a73
LW
4077 idx, p->chip_hwnum, gc->ngpio - 1,
4078 gc->label);
2a3cf6a3 4079 return ERR_PTR(-EINVAL);
bae48da2 4080 }
bae48da2 4081
db546960 4082 desc = gpio_device_get_desc(gdev, p->chip_hwnum);
ad824783 4083 *flags = p->flags;
bae48da2 4084
2a3cf6a3 4085 return desc;
bae48da2
AC
4086 }
4087
bae48da2
AC
4088 return desc;
4089}
4090
66858527
RI
4091static int platform_gpio_count(struct device *dev, const char *con_id)
4092{
4093 struct gpiod_lookup_table *table;
4094 struct gpiod_lookup *p;
4095 unsigned int count = 0;
4096
c31071ea
BG
4097 scoped_guard(mutex, &gpio_lookup_lock) {
4098 table = gpiod_find_lookup_table(dev);
4099 if (!table)
4100 return -ENOENT;
66858527 4101
c31071ea
BG
4102 for (p = &table->table[0]; p->key; p++) {
4103 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
4104 (!con_id && !p->con_id))
4105 count++;
4106 }
66858527 4107 }
c31071ea 4108
66858527
RI
4109 if (!count)
4110 return -ENOENT;
4111
4112 return count;
4113}
4114
8eb1f71e
DT
4115static struct gpio_desc *gpiod_find_by_fwnode(struct fwnode_handle *fwnode,
4116 struct device *consumer,
4117 const char *con_id,
4118 unsigned int idx,
4119 enum gpiod_flags *flags,
4120 unsigned long *lookupflags)
0eadd36d 4121{
8eb1f71e 4122 struct gpio_desc *desc = ERR_PTR(-ENOENT);
0eadd36d
DT
4123
4124 if (is_of_node(fwnode)) {
8eb1f71e
DT
4125 dev_dbg(consumer, "using DT '%pfw' for '%s' GPIO lookup\n",
4126 fwnode, con_id);
4127 desc = of_find_gpio(to_of_node(fwnode), con_id, idx, lookupflags);
0eadd36d 4128 } else if (is_acpi_node(fwnode)) {
8eb1f71e
DT
4129 dev_dbg(consumer, "using ACPI '%pfw' for '%s' GPIO lookup\n",
4130 fwnode, con_id);
4131 desc = acpi_find_gpio(fwnode, con_id, idx, flags, lookupflags);
e7f9ff5d
DT
4132 } else if (is_software_node(fwnode)) {
4133 dev_dbg(consumer, "using swnode '%pfw' for '%s' GPIO lookup\n",
4134 fwnode, con_id);
4135 desc = swnode_find_gpio(fwnode, con_id, idx, lookupflags);
0eadd36d 4136 }
0eadd36d 4137
8eb1f71e
DT
4138 return desc;
4139}
0eadd36d 4140
8eb1f71e
DT
4141static struct gpio_desc *gpiod_find_and_request(struct device *consumer,
4142 struct fwnode_handle *fwnode,
4143 const char *con_id,
4144 unsigned int idx,
4145 enum gpiod_flags flags,
4146 const char *label,
4147 bool platform_lookup_allowed)
4148{
ba2dc1cb 4149 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
c122f461 4150 struct gpio_desc *desc;
8eb1f71e
DT
4151 int ret;
4152
c122f461 4153 desc = gpiod_find_by_fwnode(fwnode, consumer, con_id, idx, &flags, &lookupflags);
8eb1f71e
DT
4154 if (gpiod_not_found(desc) && platform_lookup_allowed) {
4155 /*
4156 * Either we are not using DT or ACPI, or their lookup did not
4157 * return a result. In that case, use platform lookup as a
4158 * fallback.
4159 */
4160 dev_dbg(consumer, "using lookup tables for GPIO lookup\n");
4161 desc = gpiod_find(consumer, con_id, idx, &lookupflags);
0eadd36d
DT
4162 }
4163
8eb1f71e
DT
4164 if (IS_ERR(desc)) {
4165 dev_dbg(consumer, "No GPIO consumer %s found\n", con_id);
4166 return desc;
4167 }
4168
4169 /*
4170 * If a connection label was passed use that, else attempt to use
4171 * the device name as label
4172 */
0eadd36d 4173 ret = gpiod_request(desc, label);
8eb1f71e
DT
4174 if (ret) {
4175 if (!(ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE))
4176 return ERR_PTR(ret);
0eadd36d 4177
8eb1f71e
DT
4178 /*
4179 * This happens when there are several consumers for
4180 * the same GPIO line: we just return here without
4181 * further initialization. It is a bit of a hack.
4182 * This is necessary to support fixed regulators.
4183 *
4184 * FIXME: Make this more sane and safe.
4185 */
4186 dev_info(consumer,
4187 "nonexclusive access to GPIO for %s\n", con_id);
4188 return desc;
4189 }
0eadd36d 4190
8eb1f71e 4191 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
0eadd36d 4192 if (ret < 0) {
8eb1f71e 4193 dev_dbg(consumer, "setup of GPIO %s failed\n", con_id);
0eadd36d
DT
4194 gpiod_put(desc);
4195 return ERR_PTR(ret);
4196 }
4197
9ce4ed5b 4198 gpiod_line_state_notify(desc, GPIOLINE_CHANGED_REQUESTED);
0eadd36d
DT
4199
4200 return desc;
4201}
4202
13949fa9
DT
4203/**
4204 * fwnode_gpiod_get_index - obtain a GPIO from firmware node
4205 * @fwnode: handle of the firmware node
4206 * @con_id: function within the GPIO consumer
4207 * @index: index of the GPIO to obtain for the consumer
4208 * @flags: GPIO initialization flags
4209 * @label: label to attach to the requested GPIO
4210 *
4211 * This function can be used for drivers that get their configuration
4212 * from opaque firmware.
4213 *
4214 * The function properly finds the corresponding GPIO using whatever is the
4215 * underlying firmware interface and then makes sure that the GPIO
4216 * descriptor is requested before it is returned to the caller.
4217 *
4218 * Returns:
4219 * On successful request the GPIO pin is configured in accordance with
4220 * provided @flags.
4221 *
4222 * In case of error an ERR_PTR() is returned.
4223 */
4224struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
8eb1f71e
DT
4225 const char *con_id,
4226 int index,
13949fa9
DT
4227 enum gpiod_flags flags,
4228 const char *label)
4229{
8eb1f71e 4230 return gpiod_find_and_request(NULL, fwnode, con_id, index, flags, label, false);
13949fa9
DT
4231}
4232EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
4233
66858527
RI
4234/**
4235 * gpiod_count - return the number of GPIOs associated with a device / function
4236 * or -ENOENT if no GPIO has been assigned to the requested function
4237 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4238 * @con_id: function within the GPIO consumer
4239 */
4240int gpiod_count(struct device *dev, const char *con_id)
4241{
944f4b0a 4242 const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
66858527
RI
4243 int count = -ENOENT;
4244
944f4b0a 4245 if (is_of_node(fwnode))
f626d6df 4246 count = of_gpio_get_count(dev, con_id);
944f4b0a 4247 else if (is_acpi_node(fwnode))
66858527 4248 count = acpi_gpio_count(dev, con_id);
e7f9ff5d
DT
4249 else if (is_software_node(fwnode))
4250 count = swnode_gpio_count(fwnode, con_id);
66858527
RI
4251
4252 if (count < 0)
4253 count = platform_gpio_count(dev, con_id);
4254
4255 return count;
4256}
4257EXPORT_SYMBOL_GPL(gpiod_count);
4258
bae48da2 4259/**
0879162f 4260 * gpiod_get - obtain a GPIO for a given GPIO function
ad824783 4261 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2 4262 * @con_id: function within the GPIO consumer
39b2bbe3 4263 * @flags: optional GPIO initialization flags
bae48da2
AC
4264 *
4265 * Return the GPIO descriptor corresponding to the function con_id of device
2a3cf6a3 4266 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
20a8a968 4267 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
bae48da2 4268 */
b17d1bf1 4269struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
39b2bbe3 4270 enum gpiod_flags flags)
bae48da2 4271{
39b2bbe3 4272 return gpiod_get_index(dev, con_id, 0, flags);
bae48da2 4273}
b17d1bf1 4274EXPORT_SYMBOL_GPL(gpiod_get);
bae48da2 4275
29a1f233
TR
4276/**
4277 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
4278 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4279 * @con_id: function within the GPIO consumer
39b2bbe3 4280 * @flags: optional GPIO initialization flags
29a1f233
TR
4281 *
4282 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
4283 * the requested function it will return NULL. This is convenient for drivers
4284 * that need to handle optional GPIOs.
4285 */
b17d1bf1 4286struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
39b2bbe3
AC
4287 const char *con_id,
4288 enum gpiod_flags flags)
29a1f233 4289{
39b2bbe3 4290 return gpiod_get_index_optional(dev, con_id, 0, flags);
29a1f233 4291}
b17d1bf1 4292EXPORT_SYMBOL_GPL(gpiod_get_optional);
29a1f233 4293
f625d460
BP
4294
4295/**
4296 * gpiod_configure_flags - helper function to configure a given GPIO
4297 * @desc: gpio whose value will be assigned
4298 * @con_id: function within the GPIO consumer
fed7026a
AS
4299 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4300 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4301 * @dflags: gpiod_flags - optional GPIO initialization flags
4302 *
4303 * Return 0 on success, -ENOENT if no GPIO has been assigned to the
4304 * requested function and/or index, or another IS_ERR() code if an error
4305 * occurred while trying to acquire the GPIO.
4306 */
c29fd9eb 4307int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
85b03b30 4308 unsigned long lflags, enum gpiod_flags dflags)
f625d460 4309{
d377f56f 4310 int ret;
f625d460 4311
85b03b30
JH
4312 if (lflags & GPIO_ACTIVE_LOW)
4313 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
f926dfc1 4314
85b03b30
JH
4315 if (lflags & GPIO_OPEN_DRAIN)
4316 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
f926dfc1
LW
4317 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
4318 /*
4319 * This enforces open drain mode from the consumer side.
4320 * This is necessary for some busses like I2C, but the lookup
4321 * should *REALLY* have specified them as open drain in the
4322 * first place, so print a little warning here.
4323 */
4324 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
4325 gpiod_warn(desc,
4326 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
4327 }
4328
85b03b30
JH
4329 if (lflags & GPIO_OPEN_SOURCE)
4330 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
e10f72bf 4331
c269df8c
NS
4332 if (((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) ||
4333 ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DISABLE)) ||
4334 ((lflags & GPIO_PULL_DOWN) && (lflags & GPIO_PULL_DISABLE))) {
d449991c 4335 gpiod_err(desc,
c269df8c 4336 "multiple pull-up, pull-down or pull-disable enabled, invalid configuration\n");
d449991c
TP
4337 return -EINVAL;
4338 }
4339
4340 if (lflags & GPIO_PULL_UP)
4341 set_bit(FLAG_PULL_UP, &desc->flags);
4342 else if (lflags & GPIO_PULL_DOWN)
4343 set_bit(FLAG_PULL_DOWN, &desc->flags);
c269df8c
NS
4344 else if (lflags & GPIO_PULL_DISABLE)
4345 set_bit(FLAG_BIAS_DISABLE, &desc->flags);
d449991c 4346
d377f56f
LW
4347 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
4348 if (ret < 0)
4349 return ret;
85b03b30 4350
f625d460
BP
4351 /* No particular flag request, return here... */
4352 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
262b9011 4353 gpiod_dbg(desc, "no flags found for %s\n", con_id);
f625d460
BP
4354 return 0;
4355 }
4356
4357 /* Process flags */
4358 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
d377f56f 4359 ret = gpiod_direction_output(desc,
ad17731d 4360 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
f625d460 4361 else
d377f56f 4362 ret = gpiod_direction_input(desc);
f625d460 4363
d377f56f 4364 return ret;
f625d460
BP
4365}
4366
bae48da2
AC
4367/**
4368 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
fdd6a5fe 4369 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2
AC
4370 * @con_id: function within the GPIO consumer
4371 * @idx: index of the GPIO to obtain in the consumer
39b2bbe3 4372 * @flags: optional GPIO initialization flags
bae48da2
AC
4373 *
4374 * This variant of gpiod_get() allows to access GPIOs other than the first
4375 * defined one for functions that define several GPIOs.
4376 *
2a3cf6a3
AC
4377 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
4378 * requested function and/or index, or another IS_ERR() code if an error
20a8a968 4379 * occurred while trying to acquire the GPIO.
bae48da2 4380 */
b17d1bf1 4381struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
bae48da2 4382 const char *con_id,
39b2bbe3
AC
4383 unsigned int idx,
4384 enum gpiod_flags flags)
bae48da2 4385{
07445ae1 4386 struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
7d18f0a1 4387 const char *devname = dev ? dev_name(dev) : "?";
8eb1f71e 4388 const char *label = con_id ?: devname;
bae48da2 4389
8eb1f71e 4390 return gpiod_find_and_request(dev, fwnode, con_id, idx, flags, label, true);
6392cca4 4391}
b17d1bf1 4392EXPORT_SYMBOL_GPL(gpiod_get_index);
6392cca4 4393
29a1f233
TR
4394/**
4395 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
4396 * function
4397 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4398 * @con_id: function within the GPIO consumer
4399 * @index: index of the GPIO to obtain in the consumer
39b2bbe3 4400 * @flags: optional GPIO initialization flags
29a1f233
TR
4401 *
4402 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
4403 * specified index was assigned to the requested function it will return NULL.
4404 * This is convenient for drivers that need to handle optional GPIOs.
4405 */
b17d1bf1 4406struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
29a1f233 4407 const char *con_id,
39b2bbe3
AC
4408 unsigned int index,
4409 enum gpiod_flags flags)
29a1f233
TR
4410{
4411 struct gpio_desc *desc;
4412
39b2bbe3 4413 desc = gpiod_get_index(dev, con_id, index, flags);
7b58696d
AS
4414 if (gpiod_not_found(desc))
4415 return NULL;
29a1f233
TR
4416
4417 return desc;
4418}
b17d1bf1 4419EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
29a1f233 4420
f625d460
BP
4421/**
4422 * gpiod_hog - Hog the specified GPIO desc given the provided flags
4423 * @desc: gpio whose value will be assigned
4424 * @name: gpio line name
fed7026a
AS
4425 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4426 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4427 * @dflags: gpiod_flags - optional GPIO initialization flags
4428 */
4429int gpiod_hog(struct gpio_desc *desc, const char *name,
4430 unsigned long lflags, enum gpiod_flags dflags)
4431{
a0b66a73 4432 struct gpio_chip *gc;
f625d460
BP
4433 struct gpio_desc *local_desc;
4434 int hwnum;
d377f56f 4435 int ret;
f625d460 4436
a0b66a73 4437 gc = gpiod_to_chip(desc);
f625d460
BP
4438 hwnum = gpio_chip_hwgpio(desc);
4439
a0b66a73 4440 local_desc = gpiochip_request_own_desc(gc, hwnum, name,
5923ea6c 4441 lflags, dflags);
f625d460 4442 if (IS_ERR(local_desc)) {
d377f56f 4443 ret = PTR_ERR(local_desc);
c31a571d 4444 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
a0b66a73 4445 name, gc->label, hwnum, ret);
d377f56f 4446 return ret;
f625d460
BP
4447 }
4448
f625d460
BP
4449 /* Mark GPIO as hogged so it can be identified and removed later */
4450 set_bit(FLAG_IS_HOGGED, &desc->flags);
4451
be6736cc 4452 gpiod_dbg(desc, "hogged as %s%s\n",
b27f300f
BG
4453 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
4454 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
4455 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
f625d460
BP
4456
4457 return 0;
4458}
4459
4460/**
4461 * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
a0b66a73 4462 * @gc: gpio chip to act on
f625d460 4463 */
a0b66a73 4464static void gpiochip_free_hogs(struct gpio_chip *gc)
f625d460 4465{
80c78fbe 4466 struct gpio_desc *desc;
f625d460 4467
57017edd 4468 for_each_gpio_desc_with_flag(gc, desc, FLAG_IS_HOGGED)
80c78fbe 4469 gpiochip_free_own_desc(desc);
f625d460
BP
4470}
4471
66858527
RI
4472/**
4473 * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
4474 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4475 * @con_id: function within the GPIO consumer
4476 * @flags: optional GPIO initialization flags
4477 *
4478 * This function acquires all the GPIOs defined under a given function.
4479 *
4480 * Return a struct gpio_descs containing an array of descriptors, -ENOENT if
4481 * no GPIO has been assigned to the requested function, or another IS_ERR()
4482 * code if an error occurred while trying to acquire the GPIOs.
4483 */
4484struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
4485 const char *con_id,
4486 enum gpiod_flags flags)
4487{
4488 struct gpio_desc *desc;
4489 struct gpio_descs *descs;
bf9346f5 4490 struct gpio_array *array_info = NULL;
a0b66a73 4491 struct gpio_chip *gc;
bf9346f5 4492 int count, bitmap_size;
79736429 4493 size_t descs_size;
66858527
RI
4494
4495 count = gpiod_count(dev, con_id);
4496 if (count < 0)
4497 return ERR_PTR(count);
4498
79736429
AS
4499 descs_size = struct_size(descs, desc, count);
4500 descs = kzalloc(descs_size, GFP_KERNEL);
66858527
RI
4501 if (!descs)
4502 return ERR_PTR(-ENOMEM);
4503
4ea0c977 4504 for (descs->ndescs = 0; descs->ndescs < count; descs->ndescs++) {
66858527
RI
4505 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
4506 if (IS_ERR(desc)) {
4507 gpiod_put_array(descs);
4508 return ERR_CAST(desc);
4509 }
bf9346f5 4510
66858527 4511 descs->desc[descs->ndescs] = desc;
bf9346f5 4512
a0b66a73 4513 gc = gpiod_to_chip(desc);
bf9346f5 4514 /*
c4c958aa
JK
4515 * If pin hardware number of array member 0 is also 0, select
4516 * its chip as a candidate for fast bitmap processing path.
bf9346f5 4517 */
c4c958aa 4518 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
bf9346f5
JK
4519 struct gpio_descs *array;
4520
a0b66a73
LW
4521 bitmap_size = BITS_TO_LONGS(gc->ngpio > count ?
4522 gc->ngpio : count);
bf9346f5 4523
79736429
AS
4524 array = krealloc(descs, descs_size +
4525 struct_size(array_info, invert_mask, 3 * bitmap_size),
4526 GFP_KERNEL | __GFP_ZERO);
bf9346f5
JK
4527 if (!array) {
4528 gpiod_put_array(descs);
4529 return ERR_PTR(-ENOMEM);
4530 }
4531
bf9346f5 4532 descs = array;
79736429
AS
4533
4534 array_info = (void *)descs + descs_size;
bf9346f5
JK
4535 array_info->get_mask = array_info->invert_mask +
4536 bitmap_size;
4537 array_info->set_mask = array_info->get_mask +
4538 bitmap_size;
4539
4540 array_info->desc = descs->desc;
4541 array_info->size = count;
a0b66a73 4542 array_info->chip = gc;
bf9346f5
JK
4543 bitmap_set(array_info->get_mask, descs->ndescs,
4544 count - descs->ndescs);
4545 bitmap_set(array_info->set_mask, descs->ndescs,
4546 count - descs->ndescs);
4547 descs->info = array_info;
4548 }
4ea0c977
AS
4549
4550 /* If there is no cache for fast bitmap processing path, continue */
4551 if (!array_info)
4552 continue;
4553
c4c958aa 4554 /* Unmark array members which don't belong to the 'fast' chip */
4ea0c977 4555 if (array_info->chip != gc) {
bf9346f5
JK
4556 __clear_bit(descs->ndescs, array_info->get_mask);
4557 __clear_bit(descs->ndescs, array_info->set_mask);
c4c958aa
JK
4558 }
4559 /*
4560 * Detect array members which belong to the 'fast' chip
4561 * but their pins are not in hardware order.
4562 */
4ea0c977 4563 else if (gpio_chip_hwgpio(desc) != descs->ndescs) {
c4c958aa
JK
4564 /*
4565 * Don't use fast path if all array members processed so
4566 * far belong to the same chip as this one but its pin
4567 * hardware number is different from its array index.
4568 */
4569 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
4570 array_info = NULL;
4571 } else {
4572 __clear_bit(descs->ndescs,
4573 array_info->get_mask);
4574 __clear_bit(descs->ndescs,
4575 array_info->set_mask);
4576 }
4ea0c977 4577 } else {
bf9346f5 4578 /* Exclude open drain or open source from fast output */
a0b66a73
LW
4579 if (gpiochip_line_is_open_drain(gc, descs->ndescs) ||
4580 gpiochip_line_is_open_source(gc, descs->ndescs))
bf9346f5
JK
4581 __clear_bit(descs->ndescs,
4582 array_info->set_mask);
4583 /* Identify 'fast' pins which require invertion */
4584 if (gpiod_is_active_low(desc))
4585 __set_bit(descs->ndescs,
4586 array_info->invert_mask);
4587 }
66858527 4588 }
bf9346f5
JK
4589 if (array_info)
4590 dev_dbg(dev,
4591 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
4592 array_info->chip->label, array_info->size,
4593 *array_info->get_mask, *array_info->set_mask,
4594 *array_info->invert_mask);
66858527
RI
4595 return descs;
4596}
4597EXPORT_SYMBOL_GPL(gpiod_get_array);
4598
4599/**
4600 * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
4601 * function
4602 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4603 * @con_id: function within the GPIO consumer
4604 * @flags: optional GPIO initialization flags
4605 *
4606 * This is equivalent to gpiod_get_array(), except that when no GPIO was
4607 * assigned to the requested function it will return NULL.
4608 */
4609struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
4610 const char *con_id,
4611 enum gpiod_flags flags)
4612{
4613 struct gpio_descs *descs;
4614
4615 descs = gpiod_get_array(dev, con_id, flags);
7b58696d 4616 if (gpiod_not_found(descs))
66858527
RI
4617 return NULL;
4618
4619 return descs;
4620}
4621EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
4622
bae48da2
AC
4623/**
4624 * gpiod_put - dispose of a GPIO descriptor
4625 * @desc: GPIO descriptor to dispose of
4626 *
4627 * No descriptor can be used after gpiod_put() has been called on it.
4628 */
4629void gpiod_put(struct gpio_desc *desc)
4630{
1d7765ba
AS
4631 if (desc)
4632 gpiod_free(desc);
372e722e 4633}
bae48da2 4634EXPORT_SYMBOL_GPL(gpiod_put);
d2876d08 4635
66858527
RI
4636/**
4637 * gpiod_put_array - dispose of multiple GPIO descriptors
4638 * @descs: struct gpio_descs containing an array of descriptors
4639 */
4640void gpiod_put_array(struct gpio_descs *descs)
4641{
4642 unsigned int i;
4643
4644 for (i = 0; i < descs->ndescs; i++)
4645 gpiod_put(descs->desc[i]);
4646
4647 kfree(descs);
4648}
4649EXPORT_SYMBOL_GPL(gpiod_put_array);
4650
4731210c
SK
4651static int gpio_stub_drv_probe(struct device *dev)
4652{
4653 /*
4654 * The DT node of some GPIO chips have a "compatible" property, but
4655 * never have a struct device added and probed by a driver to register
4656 * the GPIO chip with gpiolib. In such cases, fw_devlink=on will cause
4657 * the consumers of the GPIO chip to get probe deferred forever because
4658 * they will be waiting for a device associated with the GPIO chip
4659 * firmware node to get added and bound to a driver.
4660 *
4661 * To allow these consumers to probe, we associate the struct
4662 * gpio_device of the GPIO chip with the firmware node and then simply
4663 * bind it to this stub driver.
4664 */
4665 return 0;
4666}
4667
4668static struct device_driver gpio_stub_drv = {
4669 .name = "gpio_stub_drv",
4670 .bus = &gpio_bus_type,
4671 .probe = gpio_stub_drv_probe,
4672};
4673
3c702e99
LW
4674static int __init gpiolib_dev_init(void)
4675{
4676 int ret;
4677
4678 /* Register GPIO sysfs bus */
b1911710 4679 ret = bus_register(&gpio_bus_type);
3c702e99
LW
4680 if (ret < 0) {
4681 pr_err("gpiolib: could not register GPIO bus type\n");
4682 return ret;
4683 }
4684
3875721e
WY
4685 ret = driver_register(&gpio_stub_drv);
4686 if (ret < 0) {
4731210c
SK
4687 pr_err("gpiolib: could not register GPIO stub driver\n");
4688 bus_unregister(&gpio_bus_type);
4689 return ret;
4690 }
4691
ddd8891e 4692 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME);
3c702e99
LW
4693 if (ret < 0) {
4694 pr_err("gpiolib: failed to allocate char dev region\n");
4731210c 4695 driver_unregister(&gpio_stub_drv);
3c702e99 4696 bus_unregister(&gpio_bus_type);
63636d95 4697 return ret;
3c702e99 4698 }
63636d95
GU
4699
4700 gpiolib_initialized = true;
4701 gpiochip_setup_devs();
4702
8650b609
DG
4703#if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO)
4704 WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier));
4705#endif /* CONFIG_OF_DYNAMIC && CONFIG_OF_GPIO */
63636d95 4706
3c702e99
LW
4707 return ret;
4708}
4709core_initcall(gpiolib_dev_init);
4710
d2876d08
DB
4711#ifdef CONFIG_DEBUG_FS
4712
fdeb8e15 4713static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
d2876d08 4714{
0338f6a6
BG
4715 struct gpio_chip *gc = gdev->chip;
4716 bool active_low, is_irq, is_out;
4717 unsigned int gpio = gdev->base;
4718 struct gpio_desc *desc;
4719 int value;
d2876d08 4720
3de69ae1
AS
4721 for_each_gpio_desc(gc, desc) {
4722 if (test_bit(FLAG_REQUESTED, &desc->flags)) {
4723 gpiod_get_direction(desc);
4724 is_out = test_bit(FLAG_IS_OUT, &desc->flags);
234c5209 4725 value = gpio_chip_get_value(gc, desc);
3de69ae1
AS
4726 is_irq = test_bit(FLAG_USED_AS_IRQ, &desc->flags);
4727 active_low = test_bit(FLAG_ACTIVE_LOW, &desc->flags);
4728 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s\n",
4729 gpio, desc->name ?: "", desc->label,
4730 is_out ? "out" : "in ",
4731 value >= 0 ? (value ? "hi" : "lo") : "? ",
4732 is_irq ? "IRQ " : "",
4733 active_low ? "ACTIVE LOW" : "");
4734 } else if (desc->name) {
4735 seq_printf(s, " gpio-%-3d (%-20.20s)\n", gpio, desc->name);
ced433e2 4736 }
d2876d08 4737
3de69ae1 4738 gpio++;
d2876d08
DB
4739 }
4740}
4741
f9c4a31f 4742static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
d2876d08 4743{
efb8235b 4744 unsigned long flags;
ff2b1359 4745 struct gpio_device *gdev = NULL;
cb1650d4 4746 loff_t index = *pos;
d2876d08 4747
f9c4a31f 4748 s->private = "";
d2876d08 4749
efb8235b
BG
4750 spin_lock_irqsave(&gpio_lock, flags);
4751 list_for_each_entry(gdev, &gpio_devices, list)
4752 if (index-- == 0) {
4753 spin_unlock_irqrestore(&gpio_lock, flags);
ff2b1359 4754 return gdev;
efb8235b
BG
4755 }
4756 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f 4757
cb1650d4 4758 return NULL;
f9c4a31f
TR
4759}
4760
4761static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
4762{
efb8235b 4763 unsigned long flags;
ff2b1359 4764 struct gpio_device *gdev = v;
f9c4a31f
TR
4765 void *ret = NULL;
4766
efb8235b
BG
4767 spin_lock_irqsave(&gpio_lock, flags);
4768 if (list_is_last(&gdev->list, &gpio_devices))
4769 ret = NULL;
4770 else
4771 ret = list_first_entry(&gdev->list, struct gpio_device, list);
4772 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f
TR
4773
4774 s->private = "\n";
4775 ++*pos;
4776
4777 return ret;
4778}
4779
4780static void gpiolib_seq_stop(struct seq_file *s, void *v)
4781{
4782}
4783
4784static int gpiolib_seq_show(struct seq_file *s, void *v)
4785{
ff2b1359 4786 struct gpio_device *gdev = v;
a0b66a73 4787 struct gpio_chip *gc = gdev->chip;
ff2b1359
LW
4788 struct device *parent;
4789
a0b66a73 4790 if (!gc) {
ff2b1359
LW
4791 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
4792 dev_name(&gdev->dev));
4793 return 0;
4794 }
f9c4a31f 4795
ff2b1359
LW
4796 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
4797 dev_name(&gdev->dev),
fdeb8e15 4798 gdev->base, gdev->base + gdev->ngpio - 1);
a0b66a73 4799 parent = gc->parent;
ff2b1359
LW
4800 if (parent)
4801 seq_printf(s, ", parent: %s/%s",
4802 parent->bus ? parent->bus->name : "no-bus",
4803 dev_name(parent));
a0b66a73
LW
4804 if (gc->label)
4805 seq_printf(s, ", %s", gc->label);
4806 if (gc->can_sleep)
f9c4a31f
TR
4807 seq_printf(s, ", can sleep");
4808 seq_printf(s, ":\n");
4809
a0b66a73
LW
4810 if (gc->dbg_show)
4811 gc->dbg_show(s, gc);
f9c4a31f 4812 else
fdeb8e15 4813 gpiolib_dbg_show(s, gdev);
f9c4a31f 4814
d2876d08
DB
4815 return 0;
4816}
4817
425c5b3e 4818static const struct seq_operations gpiolib_sops = {
f9c4a31f
TR
4819 .start = gpiolib_seq_start,
4820 .next = gpiolib_seq_next,
4821 .stop = gpiolib_seq_stop,
4822 .show = gpiolib_seq_show,
4823};
425c5b3e 4824DEFINE_SEQ_ATTRIBUTE(gpiolib);
d2876d08
DB
4825
4826static int __init gpiolib_debugfs_init(void)
4827{
4828 /* /sys/kernel/debug/gpio */
425c5b3e 4829 debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops);
d2876d08
DB
4830 return 0;
4831}
4832subsys_initcall(gpiolib_debugfs_init);
4833
4834#endif /* DEBUG_FS */