tools: gpio-hammer: fix spelling mistake: "occurences" -> "occurrences"
[linux-block.git] / drivers / gpio / gpiolib.c
CommitLineData
dae5f0af 1// SPDX-License-Identifier: GPL-2.0
923a654c 2#include <linux/bitmap.h>
d2876d08
DB
3#include <linux/kernel.h>
4#include <linux/module.h>
ff77c352 5#include <linux/interrupt.h>
d2876d08
DB
6#include <linux/irq.h>
7#include <linux/spinlock.h>
1a989d0f 8#include <linux/list.h>
d8f388d8
DB
9#include <linux/device.h>
10#include <linux/err.h>
11#include <linux/debugfs.h>
12#include <linux/seq_file.h>
13#include <linux/gpio.h>
ff77c352 14#include <linux/idr.h>
5a0e3ad6 15#include <linux/slab.h>
7b199811 16#include <linux/acpi.h>
53e7cac3 17#include <linux/gpio/driver.h>
0a6d3158 18#include <linux/gpio/machine.h>
c771c2f4 19#include <linux/pinctrl/consumer.h>
3c702e99
LW
20#include <linux/cdev.h>
21#include <linux/fs.h>
22#include <linux/uaccess.h>
8b92e17e 23#include <linux/compat.h>
d7c51b47 24#include <linux/anon_inodes.h>
953b956a 25#include <linux/file.h>
61f922db
LW
26#include <linux/kfifo.h>
27#include <linux/poll.h>
28#include <linux/timekeeping.h>
3c702e99 29#include <uapi/linux/gpio.h>
d2876d08 30
664e3e5a 31#include "gpiolib.h"
f626d6df 32#include "gpiolib-of.h"
77cb907a 33#include "gpiolib-acpi.h"
664e3e5a 34
3f397c21
UKK
35#define CREATE_TRACE_POINTS
36#include <trace/events/gpio.h>
d2876d08 37
79a9becd 38/* Implementation infrastructure for GPIO interfaces.
d2876d08 39 *
79a9becd
AC
40 * The GPIO programming interface allows for inlining speed-critical
41 * get/set operations for common cases, so that access to SOC-integrated
42 * GPIOs can sometimes cost only an instruction or two per bit.
d2876d08
DB
43 */
44
45
46/* When debugging, extend minimal trust to callers and platform code.
47 * Also emit diagnostic messages that may help initial bringup, when
48 * board setup or driver bugs are most common.
49 *
50 * Otherwise, minimize overhead in what may be bitbanging codepaths.
51 */
52#ifdef DEBUG
53#define extra_checks 1
54#else
55#define extra_checks 0
56#endif
57
ff2b1359
LW
58/* Device and char device-related information */
59static DEFINE_IDA(gpio_ida);
3c702e99
LW
60static dev_t gpio_devt;
61#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
62static struct bus_type gpio_bus_type = {
63 .name = "gpio",
64};
ff2b1359 65
3027743f
LA
66/*
67 * Number of GPIOs to use for the fast path in set array
68 */
69#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
70
d2876d08
DB
71/* gpio_lock prevents conflicts during gpio_desc[] table updates.
72 * While any GPIO is requested, its gpio_chip is not removable;
73 * each GPIO's "requested" flag serves as a lock and refcount.
74 */
0eb4c6c2 75DEFINE_SPINLOCK(gpio_lock);
d2876d08 76
bae48da2
AC
77static DEFINE_MUTEX(gpio_lookup_lock);
78static LIST_HEAD(gpio_lookup_list);
ff2b1359 79LIST_HEAD(gpio_devices);
6d86750c 80
a411e81e
BG
81static DEFINE_MUTEX(gpio_machine_hogs_mutex);
82static LIST_HEAD(gpio_machine_hogs);
83
6d86750c 84static void gpiochip_free_hogs(struct gpio_chip *chip);
959bc7b2 85static int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
86 struct lock_class_key *lock_key,
87 struct lock_class_key *request_key);
6d86750c 88static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip);
9411e3aa 89static int gpiochip_irqchip_init_hw(struct gpio_chip *gpiochip);
79b804cb
MW
90static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip);
91static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip);
6d86750c 92
159f3cd9 93static bool gpiolib_initialized;
6d86750c 94
d2876d08
DB
95static inline void desc_set_label(struct gpio_desc *d, const char *label)
96{
d2876d08 97 d->label = label;
d2876d08
DB
98}
99
372e722e 100/**
950d55f5
TR
101 * gpio_to_desc - Convert a GPIO number to its descriptor
102 * @gpio: global GPIO number
103 *
104 * Returns:
105 * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
106 * with the given number exists in the system.
372e722e 107 */
79a9becd 108struct gpio_desc *gpio_to_desc(unsigned gpio)
372e722e 109{
ff2b1359 110 struct gpio_device *gdev;
14e85c0e
AC
111 unsigned long flags;
112
113 spin_lock_irqsave(&gpio_lock, flags);
114
ff2b1359 115 list_for_each_entry(gdev, &gpio_devices, list) {
fdeb8e15
LW
116 if (gdev->base <= gpio &&
117 gdev->base + gdev->ngpio > gpio) {
14e85c0e 118 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 119 return &gdev->descs[gpio - gdev->base];
14e85c0e
AC
120 }
121 }
122
123 spin_unlock_irqrestore(&gpio_lock, flags);
124
0e9a5edf
AC
125 if (!gpio_is_valid(gpio))
126 WARN(1, "invalid GPIO %d\n", gpio);
127
14e85c0e 128 return NULL;
372e722e 129}
79a9becd 130EXPORT_SYMBOL_GPL(gpio_to_desc);
372e722e 131
d468bf9e 132/**
950d55f5
TR
133 * gpiochip_get_desc - get the GPIO descriptor corresponding to the given
134 * hardware number for this chip
135 * @chip: GPIO chip
136 * @hwnum: hardware number of the GPIO for this chip
137 *
138 * Returns:
139 * A pointer to the GPIO descriptor or %ERR_PTR(-EINVAL) if no GPIO exists
140 * in the given chip for the specified hardware number.
d468bf9e 141 */
bb1e88cc 142struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip,
06863620 143 unsigned int hwnum)
d468bf9e 144{
fdeb8e15
LW
145 struct gpio_device *gdev = chip->gpiodev;
146
147 if (hwnum >= gdev->ngpio)
b7d0a28a 148 return ERR_PTR(-EINVAL);
d468bf9e 149
fdeb8e15 150 return &gdev->descs[hwnum];
d468bf9e 151}
372e722e
AC
152
153/**
950d55f5
TR
154 * desc_to_gpio - convert a GPIO descriptor to the integer namespace
155 * @desc: GPIO descriptor
156 *
372e722e 157 * This should disappear in the future but is needed since we still
950d55f5
TR
158 * use GPIO numbers for error messages and sysfs nodes.
159 *
160 * Returns:
161 * The global GPIO number for the GPIO specified by its descriptor.
372e722e 162 */
79a9becd 163int desc_to_gpio(const struct gpio_desc *desc)
372e722e 164{
fdeb8e15 165 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
372e722e 166}
79a9becd 167EXPORT_SYMBOL_GPL(desc_to_gpio);
372e722e
AC
168
169
79a9becd
AC
170/**
171 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
172 * @desc: descriptor to return the chip of
173 */
174struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
372e722e 175{
dd3b9a44 176 if (!desc || !desc->gdev)
fdeb8e15
LW
177 return NULL;
178 return desc->gdev->chip;
372e722e 179}
79a9becd 180EXPORT_SYMBOL_GPL(gpiod_to_chip);
d2876d08 181
8d0aab2f
AV
182/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
183static int gpiochip_find_base(int ngpio)
184{
ff2b1359 185 struct gpio_device *gdev;
83cabe33 186 int base = ARCH_NR_GPIOS - ngpio;
8d0aab2f 187
ff2b1359 188 list_for_each_entry_reverse(gdev, &gpio_devices, list) {
83cabe33 189 /* found a free space? */
fdeb8e15 190 if (gdev->base + gdev->ngpio <= base)
83cabe33
AC
191 break;
192 else
193 /* nope, check the space right before the chip */
fdeb8e15 194 base = gdev->base - ngpio;
8d0aab2f
AV
195 }
196
83cabe33 197 if (gpio_is_valid(base)) {
8d0aab2f 198 pr_debug("%s: found new base at %d\n", __func__, base);
83cabe33
AC
199 return base;
200 } else {
201 pr_err("%s: cannot find free range\n", __func__);
202 return -ENOSPC;
169b6a7a 203 }
169b6a7a
AV
204}
205
79a9becd
AC
206/**
207 * gpiod_get_direction - return the current direction of a GPIO
208 * @desc: GPIO to get the direction of
209 *
94fc7309 210 * Returns 0 for output, 1 for input, or an error code in case of error.
79a9becd
AC
211 *
212 * This function may sleep if gpiod_cansleep() is true.
213 */
8e53b0f1 214int gpiod_get_direction(struct gpio_desc *desc)
80b0a602 215{
d0121b85
WS
216 struct gpio_chip *chip;
217 unsigned offset;
d377f56f 218 int ret;
80b0a602 219
372e722e
AC
220 chip = gpiod_to_chip(desc);
221 offset = gpio_chip_hwgpio(desc);
80b0a602 222
256efaea
RK
223 /*
224 * Open drain emulation using input mode may incorrectly report
225 * input here, fix that up.
226 */
227 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) &&
228 test_bit(FLAG_IS_OUT, &desc->flags))
229 return 0;
230
80b0a602 231 if (!chip->get_direction)
d0121b85 232 return -ENOTSUPP;
80b0a602 233
d377f56f 234 ret = chip->get_direction(chip, offset);
4fc5bfeb
AS
235 if (ret < 0)
236 return ret;
237
238 /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */
239 if (ret > 0)
d377f56f 240 ret = 1;
4fc5bfeb
AS
241
242 assign_bit(FLAG_IS_OUT, &desc->flags, !ret);
243
d377f56f 244 return ret;
80b0a602 245}
79a9becd 246EXPORT_SYMBOL_GPL(gpiod_get_direction);
80b0a602 247
1a989d0f
AC
248/*
249 * Add a new chip to the global chips list, keeping the list of chips sorted
ef7c7553 250 * by range(means [base, base + ngpio - 1]) order.
1a989d0f
AC
251 *
252 * Return -EBUSY if the new chip overlaps with some other chip's integer
253 * space.
254 */
ff2b1359 255static int gpiodev_add_to_list(struct gpio_device *gdev)
1a989d0f 256{
a961f9b4 257 struct gpio_device *prev, *next;
1a989d0f 258
ff2b1359 259 if (list_empty(&gpio_devices)) {
a961f9b4 260 /* initial entry in list */
ff2b1359 261 list_add_tail(&gdev->list, &gpio_devices);
e28ecca6 262 return 0;
1a989d0f
AC
263 }
264
a961f9b4
BJZ
265 next = list_entry(gpio_devices.next, struct gpio_device, list);
266 if (gdev->base + gdev->ngpio <= next->base) {
267 /* add before first entry */
268 list_add(&gdev->list, &gpio_devices);
269 return 0;
1a989d0f
AC
270 }
271
a961f9b4
BJZ
272 prev = list_entry(gpio_devices.prev, struct gpio_device, list);
273 if (prev->base + prev->ngpio <= gdev->base) {
274 /* add behind last entry */
275 list_add_tail(&gdev->list, &gpio_devices);
96098df1 276 return 0;
1a989d0f
AC
277 }
278
a961f9b4
BJZ
279 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
280 /* at the end of the list */
281 if (&next->list == &gpio_devices)
282 break;
1a989d0f 283
a961f9b4
BJZ
284 /* add between prev and next */
285 if (prev->base + prev->ngpio <= gdev->base
286 && gdev->base + gdev->ngpio <= next->base) {
287 list_add(&gdev->list, &prev->list);
288 return 0;
289 }
290 }
291
292 dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n");
293 return -EBUSY;
1a989d0f
AC
294}
295
950d55f5 296/*
f881bab0
LW
297 * Convert a GPIO name to its descriptor
298 */
299static struct gpio_desc *gpio_name_to_desc(const char * const name)
300{
ff2b1359 301 struct gpio_device *gdev;
f881bab0
LW
302 unsigned long flags;
303
304 spin_lock_irqsave(&gpio_lock, flags);
305
ff2b1359 306 list_for_each_entry(gdev, &gpio_devices, list) {
f881bab0
LW
307 int i;
308
fdeb8e15
LW
309 for (i = 0; i != gdev->ngpio; ++i) {
310 struct gpio_desc *desc = &gdev->descs[i];
f881bab0 311
fdeb8e15 312 if (!desc->name || !name)
f881bab0
LW
313 continue;
314
fdeb8e15 315 if (!strcmp(desc->name, name)) {
f881bab0 316 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 317 return desc;
f881bab0
LW
318 }
319 }
320 }
321
322 spin_unlock_irqrestore(&gpio_lock, flags);
323
324 return NULL;
325}
326
5f3ca732
MP
327/*
328 * Takes the names from gc->names and checks if they are all unique. If they
329 * are, they are assigned to their gpio descriptors.
330 *
ed37915c 331 * Warning if one of the names is already used for a different GPIO.
5f3ca732
MP
332 */
333static int gpiochip_set_desc_names(struct gpio_chip *gc)
334{
fdeb8e15 335 struct gpio_device *gdev = gc->gpiodev;
5f3ca732
MP
336 int i;
337
338 if (!gc->names)
339 return 0;
340
341 /* First check all names if they are unique */
342 for (i = 0; i != gc->ngpio; ++i) {
343 struct gpio_desc *gpio;
344
345 gpio = gpio_name_to_desc(gc->names[i]);
f881bab0 346 if (gpio)
fdeb8e15 347 dev_warn(&gdev->dev,
34ffd85d 348 "Detected name collision for GPIO name '%s'\n",
f881bab0 349 gc->names[i]);
5f3ca732
MP
350 }
351
352 /* Then add all names to the GPIO descriptors */
353 for (i = 0; i != gc->ngpio; ++i)
fdeb8e15 354 gdev->descs[i].name = gc->names[i];
5f3ca732
MP
355
356 return 0;
357}
358
e4371f6e
SB
359static unsigned long *gpiochip_allocate_mask(struct gpio_chip *chip)
360{
361 unsigned long *p;
362
7bdbd1ec 363 p = bitmap_alloc(chip->ngpio, GFP_KERNEL);
e4371f6e
SB
364 if (!p)
365 return NULL;
366
367 /* Assume by default all GPIOs are valid */
368 bitmap_fill(p, chip->ngpio);
369
370 return p;
371}
372
f626d6df 373static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
726cb3ba 374{
eb1e8bd6 375 if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask))
726cb3ba
SB
376 return 0;
377
f626d6df
LW
378 gc->valid_mask = gpiochip_allocate_mask(gc);
379 if (!gc->valid_mask)
726cb3ba
SB
380 return -ENOMEM;
381
382 return 0;
383}
384
c9fc5aff 385static int gpiochip_init_valid_mask(struct gpio_chip *gc)
f8ec92a9 386{
c9fc5aff
LW
387 if (gc->init_valid_mask)
388 return gc->init_valid_mask(gc,
389 gc->valid_mask,
390 gc->ngpio);
f8ec92a9
RRD
391
392 return 0;
393}
394
726cb3ba
SB
395static void gpiochip_free_valid_mask(struct gpio_chip *gpiochip)
396{
7bdbd1ec 397 bitmap_free(gpiochip->valid_mask);
726cb3ba
SB
398 gpiochip->valid_mask = NULL;
399}
400
b056ca1c
AS
401static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
402{
403 if (gc->add_pin_ranges)
404 return gc->add_pin_ranges(gc);
405
406 return 0;
407}
408
726cb3ba
SB
409bool gpiochip_line_is_valid(const struct gpio_chip *gpiochip,
410 unsigned int offset)
411{
412 /* No mask means all valid */
413 if (likely(!gpiochip->valid_mask))
414 return true;
415 return test_bit(offset, gpiochip->valid_mask);
416}
417EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
418
d7c51b47
LW
419/*
420 * GPIO line handle management
421 */
422
423/**
424 * struct linehandle_state - contains the state of a userspace handle
425 * @gdev: the GPIO device the handle pertains to
426 * @label: consumer label used to tag descriptors
427 * @descs: the GPIO descriptors held by this handle
428 * @numdescs: the number of descriptors held in the descs array
429 */
430struct linehandle_state {
431 struct gpio_device *gdev;
432 const char *label;
433 struct gpio_desc *descs[GPIOHANDLES_MAX];
434 u32 numdescs;
435};
436
e3e847c7
LPC
437#define GPIOHANDLE_REQUEST_VALID_FLAGS \
438 (GPIOHANDLE_REQUEST_INPUT | \
439 GPIOHANDLE_REQUEST_OUTPUT | \
440 GPIOHANDLE_REQUEST_ACTIVE_LOW | \
9225d516
DF
441 GPIOHANDLE_REQUEST_BIAS_PULL_UP | \
442 GPIOHANDLE_REQUEST_BIAS_PULL_DOWN | \
2148ad77 443 GPIOHANDLE_REQUEST_BIAS_DISABLE | \
e3e847c7
LPC
444 GPIOHANDLE_REQUEST_OPEN_DRAIN | \
445 GPIOHANDLE_REQUEST_OPEN_SOURCE)
446
b043ed7e
KG
447static int linehandle_validate_flags(u32 flags)
448{
449 /* Return an error if an unknown flag is set */
450 if (flags & ~GPIOHANDLE_REQUEST_VALID_FLAGS)
451 return -EINVAL;
452
453 /*
454 * Do not allow both INPUT & OUTPUT flags to be set as they are
455 * contradictory.
456 */
457 if ((flags & GPIOHANDLE_REQUEST_INPUT) &&
458 (flags & GPIOHANDLE_REQUEST_OUTPUT))
459 return -EINVAL;
460
461 /*
462 * Do not allow OPEN_SOURCE & OPEN_DRAIN flags in a single request. If
463 * the hardware actually supports enabling both at the same time the
464 * electrical result would be disastrous.
465 */
466 if ((flags & GPIOHANDLE_REQUEST_OPEN_DRAIN) &&
467 (flags & GPIOHANDLE_REQUEST_OPEN_SOURCE))
468 return -EINVAL;
469
470 /* OPEN_DRAIN and OPEN_SOURCE flags only make sense for output mode. */
471 if (!(flags & GPIOHANDLE_REQUEST_OUTPUT) &&
472 ((flags & GPIOHANDLE_REQUEST_OPEN_DRAIN) ||
473 (flags & GPIOHANDLE_REQUEST_OPEN_SOURCE)))
474 return -EINVAL;
475
476 /* Bias flags only allowed for input or output mode. */
477 if (!((flags & GPIOHANDLE_REQUEST_INPUT) ||
478 (flags & GPIOHANDLE_REQUEST_OUTPUT)) &&
479 ((flags & GPIOHANDLE_REQUEST_BIAS_DISABLE) ||
480 (flags & GPIOHANDLE_REQUEST_BIAS_PULL_UP) ||
481 (flags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)))
482 return -EINVAL;
483
484 /* Only one bias flag can be set. */
485 if (((flags & GPIOHANDLE_REQUEST_BIAS_DISABLE) &&
486 (flags & (GPIOHANDLE_REQUEST_BIAS_PULL_DOWN |
487 GPIOHANDLE_REQUEST_BIAS_PULL_UP))) ||
488 ((flags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) &&
489 (flags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)))
490 return -EINVAL;
491
492 return 0;
493}
494
e588bb1e
KG
495static long linehandle_set_config(struct linehandle_state *lh,
496 void __user *ip)
497{
498 struct gpiohandle_config gcnf;
499 struct gpio_desc *desc;
500 int i, ret;
501 u32 lflags;
502 unsigned long *flagsp;
503
504 if (copy_from_user(&gcnf, ip, sizeof(gcnf)))
505 return -EFAULT;
506
507 lflags = gcnf.flags;
508 ret = linehandle_validate_flags(lflags);
509 if (ret)
510 return ret;
511
512 for (i = 0; i < lh->numdescs; i++) {
513 desc = lh->descs[i];
514 flagsp = &desc->flags;
515
4fc5bfeb 516 assign_bit(FLAG_ACTIVE_LOW, flagsp,
e588bb1e
KG
517 lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW);
518
4fc5bfeb 519 assign_bit(FLAG_OPEN_DRAIN, flagsp,
e588bb1e
KG
520 lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN);
521
4fc5bfeb 522 assign_bit(FLAG_OPEN_SOURCE, flagsp,
e588bb1e
KG
523 lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE);
524
4fc5bfeb 525 assign_bit(FLAG_PULL_UP, flagsp,
e588bb1e
KG
526 lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP);
527
4fc5bfeb 528 assign_bit(FLAG_PULL_DOWN, flagsp,
e588bb1e
KG
529 lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN);
530
4fc5bfeb 531 assign_bit(FLAG_BIAS_DISABLE, flagsp,
e588bb1e
KG
532 lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE);
533
534 /*
535 * Lines have to be requested explicitly for input
536 * or output, else the line will be treated "as is".
537 */
538 if (lflags & GPIOHANDLE_REQUEST_OUTPUT) {
539 int val = !!gcnf.default_values[i];
540
541 ret = gpiod_direction_output(desc, val);
542 if (ret)
543 return ret;
544 } else if (lflags & GPIOHANDLE_REQUEST_INPUT) {
545 ret = gpiod_direction_input(desc);
546 if (ret)
547 return ret;
548 }
51c1064e
BG
549
550 atomic_notifier_call_chain(&desc->gdev->notifier,
551 GPIOLINE_CHANGED_CONFIG, desc);
e588bb1e
KG
552 }
553 return 0;
554}
555
d7c51b47
LW
556static long linehandle_ioctl(struct file *filep, unsigned int cmd,
557 unsigned long arg)
558{
559 struct linehandle_state *lh = filep->private_data;
560 void __user *ip = (void __user *)arg;
561 struct gpiohandle_data ghd;
b9762beb 562 DECLARE_BITMAP(vals, GPIOHANDLES_MAX);
d7c51b47
LW
563 int i;
564
565 if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) {
2b955b34 566 /* NOTE: It's ok to read values of output lines. */
eec1d566
LW
567 int ret = gpiod_get_array_value_complex(false,
568 true,
569 lh->numdescs,
570 lh->descs,
77588c14 571 NULL,
eec1d566
LW
572 vals);
573 if (ret)
574 return ret;
d7c51b47 575
3eded5d8 576 memset(&ghd, 0, sizeof(ghd));
eec1d566 577 for (i = 0; i < lh->numdescs; i++)
b9762beb 578 ghd.values[i] = test_bit(i, vals);
d7c51b47
LW
579
580 if (copy_to_user(ip, &ghd, sizeof(ghd)))
581 return -EFAULT;
582
583 return 0;
584 } else if (cmd == GPIOHANDLE_SET_LINE_VALUES_IOCTL) {
e5332d54
BG
585 /*
586 * All line descriptors were created at once with the same
587 * flags so just check if the first one is really output.
588 */
589 if (!test_bit(FLAG_IS_OUT, &lh->descs[0]->flags))
590 return -EPERM;
591
d7c51b47
LW
592 if (copy_from_user(&ghd, ip, sizeof(ghd)))
593 return -EFAULT;
594
595 /* Clamp all values to [0,1] */
596 for (i = 0; i < lh->numdescs; i++)
b9762beb 597 __assign_bit(i, vals, ghd.values[i]);
d7c51b47
LW
598
599 /* Reuse the array setting function */
3027743f 600 return gpiod_set_array_value_complex(false,
d7c51b47
LW
601 true,
602 lh->numdescs,
603 lh->descs,
77588c14 604 NULL,
d7c51b47 605 vals);
e588bb1e
KG
606 } else if (cmd == GPIOHANDLE_SET_CONFIG_IOCTL) {
607 return linehandle_set_config(lh, ip);
d7c51b47
LW
608 }
609 return -EINVAL;
610}
611
612#ifdef CONFIG_COMPAT
613static long linehandle_ioctl_compat(struct file *filep, unsigned int cmd,
614 unsigned long arg)
615{
616 return linehandle_ioctl(filep, cmd, (unsigned long)compat_ptr(arg));
617}
618#endif
619
620static int linehandle_release(struct inode *inode, struct file *filep)
621{
622 struct linehandle_state *lh = filep->private_data;
623 struct gpio_device *gdev = lh->gdev;
624 int i;
625
626 for (i = 0; i < lh->numdescs; i++)
627 gpiod_free(lh->descs[i]);
628 kfree(lh->label);
629 kfree(lh);
630 put_device(&gdev->dev);
631 return 0;
632}
633
634static const struct file_operations linehandle_fileops = {
635 .release = linehandle_release,
636 .owner = THIS_MODULE,
637 .llseek = noop_llseek,
638 .unlocked_ioctl = linehandle_ioctl,
639#ifdef CONFIG_COMPAT
640 .compat_ioctl = linehandle_ioctl_compat,
641#endif
642};
643
644static int linehandle_create(struct gpio_device *gdev, void __user *ip)
645{
646 struct gpiohandle_request handlereq;
647 struct linehandle_state *lh;
953b956a 648 struct file *file;
ab3dbcf7 649 int fd, i, count = 0, ret;
418ee8e9 650 u32 lflags;
d7c51b47
LW
651
652 if (copy_from_user(&handlereq, ip, sizeof(handlereq)))
653 return -EFAULT;
654 if ((handlereq.lines == 0) || (handlereq.lines > GPIOHANDLES_MAX))
655 return -EINVAL;
656
418ee8e9
BG
657 lflags = handlereq.flags;
658
b043ed7e
KG
659 ret = linehandle_validate_flags(lflags);
660 if (ret)
661 return ret;
2148ad77 662
d7c51b47
LW
663 lh = kzalloc(sizeof(*lh), GFP_KERNEL);
664 if (!lh)
665 return -ENOMEM;
666 lh->gdev = gdev;
667 get_device(&gdev->dev);
668
669 /* Make sure this is terminated */
670 handlereq.consumer_label[sizeof(handlereq.consumer_label)-1] = '\0';
671 if (strlen(handlereq.consumer_label)) {
672 lh->label = kstrdup(handlereq.consumer_label,
673 GFP_KERNEL);
674 if (!lh->label) {
675 ret = -ENOMEM;
676 goto out_free_lh;
677 }
678 }
679
680 /* Request each GPIO */
681 for (i = 0; i < handlereq.lines; i++) {
682 u32 offset = handlereq.lineoffsets[i];
0f41dabe 683 struct gpio_desc *desc = gpiochip_get_desc(gdev->chip, offset);
d7c51b47 684
0f41dabe
BG
685 if (IS_ERR(desc)) {
686 ret = PTR_ERR(desc);
e405f9fc
LPC
687 goto out_free_descs;
688 }
689
d7c51b47
LW
690 ret = gpiod_request(desc, lh->label);
691 if (ret)
692 goto out_free_descs;
693 lh->descs[i] = desc;
19a4fbff 694 count = i + 1;
d7c51b47
LW
695
696 if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW)
697 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
698 if (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN)
699 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
700 if (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE)
701 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
2148ad77
KG
702 if (lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE)
703 set_bit(FLAG_BIAS_DISABLE, &desc->flags);
9225d516
DF
704 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)
705 set_bit(FLAG_PULL_DOWN, &desc->flags);
706 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)
707 set_bit(FLAG_PULL_UP, &desc->flags);
d7c51b47 708
e10f72bf
AJ
709 ret = gpiod_set_transitory(desc, false);
710 if (ret < 0)
711 goto out_free_descs;
712
d7c51b47
LW
713 /*
714 * Lines have to be requested explicitly for input
715 * or output, else the line will be treated "as is".
716 */
717 if (lflags & GPIOHANDLE_REQUEST_OUTPUT) {
718 int val = !!handlereq.default_values[i];
719
720 ret = gpiod_direction_output(desc, val);
721 if (ret)
722 goto out_free_descs;
723 } else if (lflags & GPIOHANDLE_REQUEST_INPUT) {
724 ret = gpiod_direction_input(desc);
725 if (ret)
726 goto out_free_descs;
727 }
728 dev_dbg(&gdev->dev, "registered chardev handle for line %d\n",
729 offset);
730 }
e2f608be
LW
731 /* Let i point at the last handle */
732 i--;
d7c51b47
LW
733 lh->numdescs = handlereq.lines;
734
953b956a 735 fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);
d7c51b47
LW
736 if (fd < 0) {
737 ret = fd;
738 goto out_free_descs;
739 }
740
953b956a
LPC
741 file = anon_inode_getfile("gpio-linehandle",
742 &linehandle_fileops,
743 lh,
744 O_RDONLY | O_CLOEXEC);
745 if (IS_ERR(file)) {
746 ret = PTR_ERR(file);
747 goto out_put_unused_fd;
748 }
749
d7c51b47 750 handlereq.fd = fd;
d932cd49 751 if (copy_to_user(ip, &handlereq, sizeof(handlereq))) {
953b956a
LPC
752 /*
753 * fput() will trigger the release() callback, so do not go onto
754 * the regular error cleanup path here.
755 */
756 fput(file);
757 put_unused_fd(fd);
758 return -EFAULT;
d932cd49 759 }
d7c51b47 760
953b956a
LPC
761 fd_install(fd, file);
762
d7c51b47
LW
763 dev_dbg(&gdev->dev, "registered chardev handle for %d lines\n",
764 lh->numdescs);
765
766 return 0;
767
953b956a
LPC
768out_put_unused_fd:
769 put_unused_fd(fd);
d7c51b47 770out_free_descs:
ab3dbcf7 771 for (i = 0; i < count; i++)
d7c51b47
LW
772 gpiod_free(lh->descs[i]);
773 kfree(lh->label);
774out_free_lh:
775 kfree(lh);
776 put_device(&gdev->dev);
777 return ret;
778}
779
61f922db
LW
780/*
781 * GPIO line event management
782 */
783
784/**
785 * struct lineevent_state - contains the state of a userspace event
786 * @gdev: the GPIO device the event pertains to
787 * @label: consumer label used to tag descriptors
788 * @desc: the GPIO descriptor held by this event
789 * @eflags: the event flags this line was requested with
790 * @irq: the interrupt that trigger in response to events on this GPIO
791 * @wait: wait queue that handles blocking reads of events
792 * @events: KFIFO for the GPIO events
d58f2bf2
LW
793 * @timestamp: cache for the timestamp storing it between hardirq
794 * and IRQ thread, used to bring the timestamp close to the actual
795 * event
61f922db
LW
796 */
797struct lineevent_state {
798 struct gpio_device *gdev;
799 const char *label;
800 struct gpio_desc *desc;
801 u32 eflags;
802 int irq;
803 wait_queue_head_t wait;
804 DECLARE_KFIFO(events, struct gpioevent_data, 16);
d58f2bf2 805 u64 timestamp;
61f922db
LW
806};
807
ac7dbb99
LPC
808#define GPIOEVENT_REQUEST_VALID_FLAGS \
809 (GPIOEVENT_REQUEST_RISING_EDGE | \
810 GPIOEVENT_REQUEST_FALLING_EDGE)
811
afc9a42b 812static __poll_t lineevent_poll(struct file *filep,
61f922db
LW
813 struct poll_table_struct *wait)
814{
815 struct lineevent_state *le = filep->private_data;
afc9a42b 816 __poll_t events = 0;
61f922db
LW
817
818 poll_wait(filep, &le->wait, wait);
819
dea9c80e 820 if (!kfifo_is_empty_spinlocked_noirqsave(&le->events, &le->wait.lock))
a9a08845 821 events = EPOLLIN | EPOLLRDNORM;
61f922db
LW
822
823 return events;
824}
825
826
827static ssize_t lineevent_read(struct file *filep,
828 char __user *buf,
829 size_t count,
830 loff_t *f_ps)
831{
832 struct lineevent_state *le = filep->private_data;
df2cd589 833 struct gpioevent_data ge;
dea9c80e 834 ssize_t bytes_read = 0;
61f922db
LW
835 int ret;
836
df2cd589 837 if (count < sizeof(ge))
61f922db
LW
838 return -EINVAL;
839
840 do {
dea9c80e 841 spin_lock(&le->wait.lock);
61f922db 842 if (kfifo_is_empty(&le->events)) {
dea9c80e
BG
843 if (bytes_read) {
844 spin_unlock(&le->wait.lock);
845 return bytes_read;
846 }
847
848 if (filep->f_flags & O_NONBLOCK) {
849 spin_unlock(&le->wait.lock);
61f922db 850 return -EAGAIN;
dea9c80e 851 }
61f922db 852
dea9c80e 853 ret = wait_event_interruptible_locked(le->wait,
61f922db 854 !kfifo_is_empty(&le->events));
dea9c80e
BG
855 if (ret) {
856 spin_unlock(&le->wait.lock);
61f922db 857 return ret;
dea9c80e 858 }
61f922db
LW
859 }
860
df2cd589 861 ret = kfifo_out(&le->events, &ge, 1);
dea9c80e
BG
862 spin_unlock(&le->wait.lock);
863 if (ret != 1) {
864 /*
865 * This should never happen - we were holding the lock
866 * from the moment we learned the fifo is no longer
867 * empty until now.
868 */
869 ret = -EIO;
870 break;
871 }
61f922db 872
df2cd589 873 if (copy_to_user(buf + bytes_read, &ge, sizeof(ge)))
dea9c80e 874 return -EFAULT;
df2cd589
AS
875 bytes_read += sizeof(ge);
876 } while (count >= bytes_read + sizeof(ge));
61f922db 877
dea9c80e 878 return bytes_read;
61f922db
LW
879}
880
881static int lineevent_release(struct inode *inode, struct file *filep)
882{
883 struct lineevent_state *le = filep->private_data;
884 struct gpio_device *gdev = le->gdev;
885
886 free_irq(le->irq, le);
887 gpiod_free(le->desc);
888 kfree(le->label);
889 kfree(le);
890 put_device(&gdev->dev);
891 return 0;
892}
893
894static long lineevent_ioctl(struct file *filep, unsigned int cmd,
895 unsigned long arg)
896{
897 struct lineevent_state *le = filep->private_data;
898 void __user *ip = (void __user *)arg;
899 struct gpiohandle_data ghd;
900
901 /*
902 * We can get the value for an event line but not set it,
903 * because it is input by definition.
904 */
905 if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) {
906 int val;
907
d82aa4a8
LPC
908 memset(&ghd, 0, sizeof(ghd));
909
61f922db
LW
910 val = gpiod_get_value_cansleep(le->desc);
911 if (val < 0)
912 return val;
913 ghd.values[0] = val;
914
915 if (copy_to_user(ip, &ghd, sizeof(ghd)))
916 return -EFAULT;
917
918 return 0;
919 }
920 return -EINVAL;
921}
922
923#ifdef CONFIG_COMPAT
924static long lineevent_ioctl_compat(struct file *filep, unsigned int cmd,
925 unsigned long arg)
926{
927 return lineevent_ioctl(filep, cmd, (unsigned long)compat_ptr(arg));
928}
929#endif
930
931static const struct file_operations lineevent_fileops = {
932 .release = lineevent_release,
933 .read = lineevent_read,
934 .poll = lineevent_poll,
935 .owner = THIS_MODULE,
936 .llseek = noop_llseek,
937 .unlocked_ioctl = lineevent_ioctl,
938#ifdef CONFIG_COMPAT
939 .compat_ioctl = lineevent_ioctl_compat,
940#endif
941};
942
33265b17 943static irqreturn_t lineevent_irq_thread(int irq, void *p)
61f922db
LW
944{
945 struct lineevent_state *le = p;
946 struct gpioevent_data ge;
fa38869b 947 int ret;
61f922db 948
24bd3efc
LW
949 /* Do not leak kernel stack to userspace */
950 memset(&ge, 0, sizeof(ge));
951
1033be58
BG
952 /*
953 * We may be running from a nested threaded interrupt in which case
954 * we didn't get the timestamp from lineevent_irq_handler().
955 */
956 if (!le->timestamp)
f8850206 957 ge.timestamp = ktime_get_ns();
1033be58
BG
958 else
959 ge.timestamp = le->timestamp;
61f922db 960
ad537b82
BG
961 if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE
962 && le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) {
fa38869b 963 int level = gpiod_get_value_cansleep(le->desc);
61f922db
LW
964 if (level)
965 /* Emit low-to-high event */
966 ge.id = GPIOEVENT_EVENT_RISING_EDGE;
967 else
968 /* Emit high-to-low event */
969 ge.id = GPIOEVENT_EVENT_FALLING_EDGE;
fa38869b 970 } else if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE) {
61f922db
LW
971 /* Emit low-to-high event */
972 ge.id = GPIOEVENT_EVENT_RISING_EDGE;
fa38869b 973 } else if (le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) {
61f922db
LW
974 /* Emit high-to-low event */
975 ge.id = GPIOEVENT_EVENT_FALLING_EDGE;
bc0207a5
AB
976 } else {
977 return IRQ_NONE;
61f922db
LW
978 }
979
dea9c80e
BG
980 ret = kfifo_in_spinlocked_noirqsave(&le->events, &ge,
981 1, &le->wait.lock);
2efc6bfa 982 if (ret)
a9a08845 983 wake_up_poll(&le->wait, EPOLLIN);
248ae175
BG
984 else
985 pr_debug_ratelimited("event FIFO is full - event dropped\n");
61f922db
LW
986
987 return IRQ_HANDLED;
988}
989
d58f2bf2
LW
990static irqreturn_t lineevent_irq_handler(int irq, void *p)
991{
992 struct lineevent_state *le = p;
993
994 /*
995 * Just store the timestamp in hardirq context so we get it as
996 * close in time as possible to the actual event.
997 */
f8850206 998 le->timestamp = ktime_get_ns();
d58f2bf2
LW
999
1000 return IRQ_WAKE_THREAD;
1001}
1002
61f922db
LW
1003static int lineevent_create(struct gpio_device *gdev, void __user *ip)
1004{
1005 struct gpioevent_request eventreq;
1006 struct lineevent_state *le;
1007 struct gpio_desc *desc;
953b956a 1008 struct file *file;
61f922db
LW
1009 u32 offset;
1010 u32 lflags;
1011 u32 eflags;
1012 int fd;
1013 int ret;
1014 int irqflags = 0;
1015
1016 if (copy_from_user(&eventreq, ip, sizeof(eventreq)))
1017 return -EFAULT;
1018
bcc6d99a
BG
1019 offset = eventreq.lineoffset;
1020 lflags = eventreq.handleflags;
1021 eflags = eventreq.eventflags;
1022
45e23604
BG
1023 desc = gpiochip_get_desc(gdev->chip, offset);
1024 if (IS_ERR(desc))
1025 return PTR_ERR(desc);
bcc6d99a
BG
1026
1027 /* Return an error if a unknown flag is set */
1028 if ((lflags & ~GPIOHANDLE_REQUEST_VALID_FLAGS) ||
1029 (eflags & ~GPIOEVENT_REQUEST_VALID_FLAGS))
1030 return -EINVAL;
1031
1032 /* This is just wrong: we don't look for events on output lines */
1033 if ((lflags & GPIOHANDLE_REQUEST_OUTPUT) ||
1034 (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN) ||
1035 (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE))
1036 return -EINVAL;
1037
2148ad77
KG
1038 /* Only one bias flag can be set. */
1039 if (((lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE) &&
1040 (lflags & (GPIOHANDLE_REQUEST_BIAS_PULL_DOWN |
1041 GPIOHANDLE_REQUEST_BIAS_PULL_UP))) ||
1042 ((lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) &&
1043 (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)))
1044 return -EINVAL;
1045
61f922db
LW
1046 le = kzalloc(sizeof(*le), GFP_KERNEL);
1047 if (!le)
1048 return -ENOMEM;
1049 le->gdev = gdev;
1050 get_device(&gdev->dev);
1051
1052 /* Make sure this is terminated */
1053 eventreq.consumer_label[sizeof(eventreq.consumer_label)-1] = '\0';
1054 if (strlen(eventreq.consumer_label)) {
1055 le->label = kstrdup(eventreq.consumer_label,
1056 GFP_KERNEL);
1057 if (!le->label) {
1058 ret = -ENOMEM;
1059 goto out_free_le;
1060 }
1061 }
1062
61f922db
LW
1063 ret = gpiod_request(desc, le->label);
1064 if (ret)
f001cc35 1065 goto out_free_label;
61f922db
LW
1066 le->desc = desc;
1067 le->eflags = eflags;
1068
1069 if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW)
1070 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
2148ad77
KG
1071 if (lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE)
1072 set_bit(FLAG_BIAS_DISABLE, &desc->flags);
7b479a84
KG
1073 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)
1074 set_bit(FLAG_PULL_DOWN, &desc->flags);
1075 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)
1076 set_bit(FLAG_PULL_UP, &desc->flags);
61f922db
LW
1077
1078 ret = gpiod_direction_input(desc);
1079 if (ret)
1080 goto out_free_desc;
1081
1082 le->irq = gpiod_to_irq(desc);
1083 if (le->irq <= 0) {
1084 ret = -ENODEV;
1085 goto out_free_desc;
1086 }
1087
1088 if (eflags & GPIOEVENT_REQUEST_RISING_EDGE)
223ecaf1
MW
1089 irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
1090 IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING;
61f922db 1091 if (eflags & GPIOEVENT_REQUEST_FALLING_EDGE)
223ecaf1
MW
1092 irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
1093 IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING;
61f922db 1094 irqflags |= IRQF_ONESHOT;
61f922db
LW
1095
1096 INIT_KFIFO(le->events);
1097 init_waitqueue_head(&le->wait);
61f922db
LW
1098
1099 /* Request a thread to read the events */
1100 ret = request_threaded_irq(le->irq,
d58f2bf2 1101 lineevent_irq_handler,
61f922db
LW
1102 lineevent_irq_thread,
1103 irqflags,
1104 le->label,
1105 le);
1106 if (ret)
1107 goto out_free_desc;
1108
953b956a 1109 fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);
61f922db
LW
1110 if (fd < 0) {
1111 ret = fd;
1112 goto out_free_irq;
1113 }
1114
953b956a
LPC
1115 file = anon_inode_getfile("gpio-event",
1116 &lineevent_fileops,
1117 le,
1118 O_RDONLY | O_CLOEXEC);
1119 if (IS_ERR(file)) {
1120 ret = PTR_ERR(file);
1121 goto out_put_unused_fd;
1122 }
1123
61f922db 1124 eventreq.fd = fd;
d932cd49 1125 if (copy_to_user(ip, &eventreq, sizeof(eventreq))) {
953b956a
LPC
1126 /*
1127 * fput() will trigger the release() callback, so do not go onto
1128 * the regular error cleanup path here.
1129 */
1130 fput(file);
1131 put_unused_fd(fd);
1132 return -EFAULT;
d932cd49 1133 }
61f922db 1134
953b956a
LPC
1135 fd_install(fd, file);
1136
61f922db
LW
1137 return 0;
1138
953b956a
LPC
1139out_put_unused_fd:
1140 put_unused_fd(fd);
61f922db
LW
1141out_free_irq:
1142 free_irq(le->irq, le);
1143out_free_desc:
1144 gpiod_free(le->desc);
1145out_free_label:
1146 kfree(le->label);
1147out_free_le:
1148 kfree(le);
1149 put_device(&gdev->dev);
1150 return ret;
1151}
1152
d2ac2579
BG
1153static void gpio_desc_to_lineinfo(struct gpio_desc *desc,
1154 struct gpioline_info *info)
1155{
1156 struct gpio_chip *chip = desc->gdev->chip;
1157 unsigned long flags;
1158
1159 spin_lock_irqsave(&gpio_lock, flags);
1160
1161 if (desc->name) {
1162 strncpy(info->name, desc->name, sizeof(info->name));
1163 info->name[sizeof(info->name) - 1] = '\0';
1164 } else {
1165 info->name[0] = '\0';
1166 }
1167
1168 if (desc->label) {
1169 strncpy(info->consumer, desc->label, sizeof(info->consumer));
1170 info->consumer[sizeof(info->consumer) - 1] = '\0';
1171 } else {
1172 info->consumer[0] = '\0';
1173 }
1174
1175 /*
1176 * Userspace only need to know that the kernel is using this GPIO so
1177 * it can't use it.
1178 */
1179 info->flags = 0;
1180 if (test_bit(FLAG_REQUESTED, &desc->flags) ||
1181 test_bit(FLAG_IS_HOGGED, &desc->flags) ||
1182 test_bit(FLAG_USED_AS_IRQ, &desc->flags) ||
1183 test_bit(FLAG_EXPORT, &desc->flags) ||
1184 test_bit(FLAG_SYSFS, &desc->flags) ||
1185 !pinctrl_gpio_can_use_line(chip->base + info->line_offset))
1186 info->flags |= GPIOLINE_FLAG_KERNEL;
1187 if (test_bit(FLAG_IS_OUT, &desc->flags))
1188 info->flags |= GPIOLINE_FLAG_IS_OUT;
1189 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
1190 info->flags |= GPIOLINE_FLAG_ACTIVE_LOW;
1191 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
1192 info->flags |= (GPIOLINE_FLAG_OPEN_DRAIN |
1193 GPIOLINE_FLAG_IS_OUT);
1194 if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
1195 info->flags |= (GPIOLINE_FLAG_OPEN_SOURCE |
1196 GPIOLINE_FLAG_IS_OUT);
1197 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
1198 info->flags |= GPIOLINE_FLAG_BIAS_DISABLE;
1199 if (test_bit(FLAG_PULL_DOWN, &desc->flags))
1200 info->flags |= GPIOLINE_FLAG_BIAS_PULL_DOWN;
1201 if (test_bit(FLAG_PULL_UP, &desc->flags))
1202 info->flags |= GPIOLINE_FLAG_BIAS_PULL_UP;
1203
1204 spin_unlock_irqrestore(&gpio_lock, flags);
1205}
1206
51c1064e
BG
1207struct gpio_chardev_data {
1208 struct gpio_device *gdev;
1209 wait_queue_head_t wait;
1210 DECLARE_KFIFO(events, struct gpioline_info_changed, 32);
1211 struct notifier_block lineinfo_changed_nb;
1212 unsigned long *watched_lines;
1213};
1214
950d55f5 1215/*
3c702e99
LW
1216 * gpio_ioctl() - ioctl handler for the GPIO chardev
1217 */
1218static long gpio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
1219{
51c1064e
BG
1220 struct gpio_chardev_data *priv = filp->private_data;
1221 struct gpio_device *gdev = priv->gdev;
3c702e99 1222 struct gpio_chip *chip = gdev->chip;
8b92e17e 1223 void __user *ip = (void __user *)arg;
51c1064e
BG
1224 struct gpio_desc *desc;
1225 __u32 offset;
3c702e99
LW
1226
1227 /* We fail any subsequent ioctl():s when the chip is gone */
1228 if (!chip)
1229 return -ENODEV;
1230
521a2ad6 1231 /* Fill in the struct and pass to userspace */
3c702e99 1232 if (cmd == GPIO_GET_CHIPINFO_IOCTL) {
521a2ad6
LW
1233 struct gpiochip_info chipinfo;
1234
0f4bbb23
LPC
1235 memset(&chipinfo, 0, sizeof(chipinfo));
1236
3c702e99
LW
1237 strncpy(chipinfo.name, dev_name(&gdev->dev),
1238 sizeof(chipinfo.name));
1239 chipinfo.name[sizeof(chipinfo.name)-1] = '\0';
df4878e9
LW
1240 strncpy(chipinfo.label, gdev->label,
1241 sizeof(chipinfo.label));
1242 chipinfo.label[sizeof(chipinfo.label)-1] = '\0';
fdeb8e15 1243 chipinfo.lines = gdev->ngpio;
3c702e99
LW
1244 if (copy_to_user(ip, &chipinfo, sizeof(chipinfo)))
1245 return -EFAULT;
1246 return 0;
51c1064e
BG
1247 } else if (cmd == GPIO_GET_LINEINFO_IOCTL ||
1248 cmd == GPIO_GET_LINEINFO_WATCH_IOCTL) {
521a2ad6 1249 struct gpioline_info lineinfo;
521a2ad6
LW
1250
1251 if (copy_from_user(&lineinfo, ip, sizeof(lineinfo)))
1252 return -EFAULT;
521a2ad6 1253
2a2cabd8
BG
1254 desc = gpiochip_get_desc(chip, lineinfo.line_offset);
1255 if (IS_ERR(desc))
1256 return PTR_ERR(desc);
1257
d2ac2579 1258 gpio_desc_to_lineinfo(desc, &lineinfo);
521a2ad6
LW
1259
1260 if (copy_to_user(ip, &lineinfo, sizeof(lineinfo)))
1261 return -EFAULT;
51c1064e
BG
1262
1263 if (cmd == GPIO_GET_LINEINFO_WATCH_IOCTL)
19314797 1264 set_bit(gpio_chip_hwgpio(desc), priv->watched_lines);
51c1064e 1265
521a2ad6 1266 return 0;
d7c51b47
LW
1267 } else if (cmd == GPIO_GET_LINEHANDLE_IOCTL) {
1268 return linehandle_create(gdev, ip);
61f922db
LW
1269 } else if (cmd == GPIO_GET_LINEEVENT_IOCTL) {
1270 return lineevent_create(gdev, ip);
51c1064e
BG
1271 } else if (cmd == GPIO_GET_LINEINFO_UNWATCH_IOCTL) {
1272 if (copy_from_user(&offset, ip, sizeof(offset)))
1273 return -EFAULT;
1274
1275 desc = gpiochip_get_desc(chip, offset);
1276 if (IS_ERR(desc))
1277 return PTR_ERR(desc);
1278
19314797 1279 clear_bit(gpio_chip_hwgpio(desc), priv->watched_lines);
51c1064e 1280 return 0;
3c702e99
LW
1281 }
1282 return -EINVAL;
1283}
1284
8b92e17e
LW
1285#ifdef CONFIG_COMPAT
1286static long gpio_ioctl_compat(struct file *filp, unsigned int cmd,
1287 unsigned long arg)
1288{
1289 return gpio_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
1290}
1291#endif
1292
51c1064e
BG
1293static struct gpio_chardev_data *
1294to_gpio_chardev_data(struct notifier_block *nb)
1295{
1296 return container_of(nb, struct gpio_chardev_data, lineinfo_changed_nb);
1297}
1298
1299static int lineinfo_changed_notify(struct notifier_block *nb,
1300 unsigned long action, void *data)
1301{
1302 struct gpio_chardev_data *priv = to_gpio_chardev_data(nb);
1303 struct gpioline_info_changed chg;
1304 struct gpio_desc *desc = data;
1305 int ret;
1306
19314797 1307 if (!test_bit(gpio_chip_hwgpio(desc), priv->watched_lines))
51c1064e
BG
1308 return NOTIFY_DONE;
1309
1310 memset(&chg, 0, sizeof(chg));
1311 chg.info.line_offset = gpio_chip_hwgpio(desc);
1312 chg.event_type = action;
1313 chg.timestamp = ktime_get_ns();
1314 gpio_desc_to_lineinfo(desc, &chg.info);
1315
1316 ret = kfifo_in_spinlocked(&priv->events, &chg, 1, &priv->wait.lock);
1317 if (ret)
1318 wake_up_poll(&priv->wait, EPOLLIN);
1319 else
1320 pr_debug_ratelimited("lineinfo event FIFO is full - event dropped\n");
1321
1322 return NOTIFY_OK;
1323}
1324
1325static __poll_t lineinfo_watch_poll(struct file *filep,
1326 struct poll_table_struct *pollt)
1327{
1328 struct gpio_chardev_data *priv = filep->private_data;
1329 __poll_t events = 0;
1330
1331 poll_wait(filep, &priv->wait, pollt);
1332
1333 if (!kfifo_is_empty_spinlocked_noirqsave(&priv->events,
1334 &priv->wait.lock))
1335 events = EPOLLIN | EPOLLRDNORM;
1336
1337 return events;
1338}
1339
1340static ssize_t lineinfo_watch_read(struct file *filep, char __user *buf,
1341 size_t count, loff_t *off)
1342{
1343 struct gpio_chardev_data *priv = filep->private_data;
1344 struct gpioline_info_changed event;
1345 ssize_t bytes_read = 0;
1346 int ret;
1347
1348 if (count < sizeof(event))
1349 return -EINVAL;
1350
1351 do {
1352 spin_lock(&priv->wait.lock);
1353 if (kfifo_is_empty(&priv->events)) {
1354 if (bytes_read) {
1355 spin_unlock(&priv->wait.lock);
1356 return bytes_read;
1357 }
1358
1359 if (filep->f_flags & O_NONBLOCK) {
1360 spin_unlock(&priv->wait.lock);
1361 return -EAGAIN;
1362 }
1363
1364 ret = wait_event_interruptible_locked(priv->wait,
1365 !kfifo_is_empty(&priv->events));
1366 if (ret) {
1367 spin_unlock(&priv->wait.lock);
1368 return ret;
1369 }
1370 }
1371
1372 ret = kfifo_out(&priv->events, &event, 1);
1373 spin_unlock(&priv->wait.lock);
1374 if (ret != 1) {
1375 ret = -EIO;
1376 break;
1377 /* We should never get here. See lineevent_read(). */
1378 }
1379
1380 if (copy_to_user(buf + bytes_read, &event, sizeof(event)))
1381 return -EFAULT;
1382 bytes_read += sizeof(event);
1383 } while (count >= bytes_read + sizeof(event));
1384
1385 return bytes_read;
1386}
1387
3c702e99
LW
1388/**
1389 * gpio_chrdev_open() - open the chardev for ioctl operations
1390 * @inode: inode for this chardev
1391 * @filp: file struct for storing private data
1392 * Returns 0 on success
1393 */
1394static int gpio_chrdev_open(struct inode *inode, struct file *filp)
1395{
1396 struct gpio_device *gdev = container_of(inode->i_cdev,
1397 struct gpio_device, chrdev);
51c1064e
BG
1398 struct gpio_chardev_data *priv;
1399 int ret = -ENOMEM;
3c702e99
LW
1400
1401 /* Fail on open if the backing gpiochip is gone */
fb505747 1402 if (!gdev->chip)
3c702e99 1403 return -ENODEV;
51c1064e
BG
1404
1405 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1406 if (!priv)
1407 return -ENOMEM;
1408
1409 priv->watched_lines = bitmap_zalloc(gdev->chip->ngpio, GFP_KERNEL);
1410 if (!priv->watched_lines)
1411 goto out_free_priv;
1412
1413 init_waitqueue_head(&priv->wait);
1414 INIT_KFIFO(priv->events);
1415 priv->gdev = gdev;
1416
1417 priv->lineinfo_changed_nb.notifier_call = lineinfo_changed_notify;
1418 ret = atomic_notifier_chain_register(&gdev->notifier,
1419 &priv->lineinfo_changed_nb);
1420 if (ret)
1421 goto out_free_bitmap;
1422
3c702e99 1423 get_device(&gdev->dev);
51c1064e 1424 filp->private_data = priv;
f4e81c52 1425
51c1064e
BG
1426 ret = nonseekable_open(inode, filp);
1427 if (ret)
1428 goto out_unregister_notifier;
1429
1430 return ret;
1431
1432out_unregister_notifier:
1433 atomic_notifier_chain_unregister(&gdev->notifier,
1434 &priv->lineinfo_changed_nb);
1435out_free_bitmap:
1436 bitmap_free(priv->watched_lines);
1437out_free_priv:
1438 kfree(priv);
1439 return ret;
3c702e99
LW
1440}
1441
1442/**
1443 * gpio_chrdev_release() - close chardev after ioctl operations
1444 * @inode: inode for this chardev
1445 * @filp: file struct for storing private data
1446 * Returns 0 on success
1447 */
1448static int gpio_chrdev_release(struct inode *inode, struct file *filp)
1449{
51c1064e
BG
1450 struct gpio_chardev_data *priv = filp->private_data;
1451 struct gpio_device *gdev = priv->gdev;
3c702e99 1452
51c1064e
BG
1453 bitmap_free(priv->watched_lines);
1454 atomic_notifier_chain_unregister(&gdev->notifier,
1455 &priv->lineinfo_changed_nb);
3c702e99 1456 put_device(&gdev->dev);
51c1064e
BG
1457 kfree(priv);
1458
3c702e99
LW
1459 return 0;
1460}
1461
3c702e99
LW
1462static const struct file_operations gpio_fileops = {
1463 .release = gpio_chrdev_release,
1464 .open = gpio_chrdev_open,
51c1064e
BG
1465 .poll = lineinfo_watch_poll,
1466 .read = lineinfo_watch_read,
3c702e99 1467 .owner = THIS_MODULE,
f4e81c52 1468 .llseek = no_llseek,
3c702e99 1469 .unlocked_ioctl = gpio_ioctl,
8b92e17e
LW
1470#ifdef CONFIG_COMPAT
1471 .compat_ioctl = gpio_ioctl_compat,
1472#endif
3c702e99
LW
1473};
1474
ff2b1359
LW
1475static void gpiodevice_release(struct device *dev)
1476{
1477 struct gpio_device *gdev = dev_get_drvdata(dev);
1478
1479 list_del(&gdev->list);
1480 ida_simple_remove(&gpio_ida, gdev->id);
fcf273e5 1481 kfree_const(gdev->label);
476e2fc5 1482 kfree(gdev->descs);
9efd9e69 1483 kfree(gdev);
ff2b1359
LW
1484}
1485
159f3cd9
GR
1486static int gpiochip_setup_dev(struct gpio_device *gdev)
1487{
d377f56f 1488 int ret;
159f3cd9
GR
1489
1490 cdev_init(&gdev->chrdev, &gpio_fileops);
1491 gdev->chrdev.owner = THIS_MODULE;
159f3cd9 1492 gdev->dev.devt = MKDEV(MAJOR(gpio_devt), gdev->id);
111379dc 1493
d377f56f
LW
1494 ret = cdev_device_add(&gdev->chrdev, &gdev->dev);
1495 if (ret)
1496 return ret;
111379dc
LG
1497
1498 chip_dbg(gdev->chip, "added GPIO chardev (%d:%d)\n",
1499 MAJOR(gpio_devt), gdev->id);
159f3cd9 1500
d377f56f
LW
1501 ret = gpiochip_sysfs_register(gdev);
1502 if (ret)
159f3cd9
GR
1503 goto err_remove_device;
1504
1505 /* From this point, the .release() function cleans up gpio_device */
1506 gdev->dev.release = gpiodevice_release;
159f3cd9
GR
1507 pr_debug("%s: registered GPIOs %d to %d on device: %s (%s)\n",
1508 __func__, gdev->base, gdev->base + gdev->ngpio - 1,
1509 dev_name(&gdev->dev), gdev->chip->label ? : "generic");
1510
1511 return 0;
1512
1513err_remove_device:
111379dc 1514 cdev_device_del(&gdev->chrdev, &gdev->dev);
d377f56f 1515 return ret;
159f3cd9
GR
1516}
1517
a411e81e
BG
1518static void gpiochip_machine_hog(struct gpio_chip *chip, struct gpiod_hog *hog)
1519{
1520 struct gpio_desc *desc;
1521 int rv;
1522
1523 desc = gpiochip_get_desc(chip, hog->chip_hwnum);
1524 if (IS_ERR(desc)) {
1525 pr_err("%s: unable to get GPIO desc: %ld\n",
1526 __func__, PTR_ERR(desc));
1527 return;
1528 }
1529
ba3efdff 1530 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
a411e81e
BG
1531 return;
1532
1533 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
1534 if (rv)
1535 pr_err("%s: unable to hog GPIO line (%s:%u): %d\n",
1536 __func__, chip->label, hog->chip_hwnum, rv);
1537}
1538
1539static void machine_gpiochip_add(struct gpio_chip *chip)
1540{
1541 struct gpiod_hog *hog;
1542
1543 mutex_lock(&gpio_machine_hogs_mutex);
1544
1545 list_for_each_entry(hog, &gpio_machine_hogs, list) {
1546 if (!strcmp(chip->label, hog->chip_label))
1547 gpiochip_machine_hog(chip, hog);
1548 }
1549
1550 mutex_unlock(&gpio_machine_hogs_mutex);
1551}
1552
159f3cd9
GR
1553static void gpiochip_setup_devs(void)
1554{
1555 struct gpio_device *gdev;
d377f56f 1556 int ret;
159f3cd9
GR
1557
1558 list_for_each_entry(gdev, &gpio_devices, list) {
d377f56f
LW
1559 ret = gpiochip_setup_dev(gdev);
1560 if (ret)
159f3cd9 1561 pr_err("%s: Failed to initialize gpio device (%d)\n",
d377f56f 1562 dev_name(&gdev->dev), ret);
159f3cd9
GR
1563 }
1564}
1565
959bc7b2 1566int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data,
39c3fd58
AL
1567 struct lock_class_key *lock_key,
1568 struct lock_class_key *request_key)
d2876d08
DB
1569{
1570 unsigned long flags;
d377f56f 1571 int ret = 0;
ff2b1359 1572 unsigned i;
8d0aab2f 1573 int base = chip->base;
ff2b1359 1574 struct gpio_device *gdev;
d2876d08 1575
ff2b1359
LW
1576 /*
1577 * First: allocate and populate the internal stat container, and
1578 * set up the struct device.
1579 */
969f07b4 1580 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
ff2b1359 1581 if (!gdev)
14e85c0e 1582 return -ENOMEM;
3c702e99 1583 gdev->dev.bus = &gpio_bus_type;
ff2b1359
LW
1584 gdev->chip = chip;
1585 chip->gpiodev = gdev;
1586 if (chip->parent) {
1587 gdev->dev.parent = chip->parent;
1588 gdev->dev.of_node = chip->parent->of_node;
acc6e331
TR
1589 }
1590
ff2b1359
LW
1591#ifdef CONFIG_OF_GPIO
1592 /* If the gpiochip has an assigned OF node this takes precedence */
acc6e331
TR
1593 if (chip->of_node)
1594 gdev->dev.of_node = chip->of_node;
6ff04974
BD
1595 else
1596 chip->of_node = gdev->dev.of_node;
ff2b1359 1597#endif
acc6e331 1598
ff2b1359
LW
1599 gdev->id = ida_simple_get(&gpio_ida, 0, 0, GFP_KERNEL);
1600 if (gdev->id < 0) {
d377f56f 1601 ret = gdev->id;
ff2b1359
LW
1602 goto err_free_gdev;
1603 }
ddd8891e 1604 dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id);
ff2b1359
LW
1605 device_initialize(&gdev->dev);
1606 dev_set_drvdata(&gdev->dev, gdev);
1607 if (chip->parent && chip->parent->driver)
1608 gdev->owner = chip->parent->driver->owner;
1609 else if (chip->owner)
1610 /* TODO: remove chip->owner */
1611 gdev->owner = chip->owner;
1612 else
1613 gdev->owner = THIS_MODULE;
d2876d08 1614
476e2fc5 1615 gdev->descs = kcalloc(chip->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL);
1c3cdb18 1616 if (!gdev->descs) {
d377f56f 1617 ret = -ENOMEM;
a05a1404 1618 goto err_free_ida;
ff2b1359
LW
1619 }
1620
5ed41cc4
BJZ
1621 if (chip->ngpio == 0) {
1622 chip_err(chip, "tried to insert a GPIO chip with zero lines\n");
d377f56f 1623 ret = -EINVAL;
159f3cd9 1624 goto err_free_descs;
5ed41cc4 1625 }
df4878e9 1626
3027743f
LA
1627 if (chip->ngpio > FASTPATH_NGPIO)
1628 chip_warn(chip, "line cnt %u is greater than fast path cnt %u\n",
2ddac5ae 1629 chip->ngpio, FASTPATH_NGPIO);
3027743f 1630
fcf273e5 1631 gdev->label = kstrdup_const(chip->label ?: "unknown", GFP_KERNEL);
df4878e9 1632 if (!gdev->label) {
d377f56f 1633 ret = -ENOMEM;
476e2fc5 1634 goto err_free_descs;
df4878e9
LW
1635 }
1636
fdeb8e15 1637 gdev->ngpio = chip->ngpio;
43c54eca 1638 gdev->data = data;
5ed41cc4 1639
d2876d08
DB
1640 spin_lock_irqsave(&gpio_lock, flags);
1641
fdeb8e15
LW
1642 /*
1643 * TODO: this allocates a Linux GPIO number base in the global
1644 * GPIO numberspace for this chip. In the long run we want to
1645 * get *rid* of this numberspace and use only descriptors, but
1646 * it may be a pipe dream. It will not happen before we get rid
1647 * of the sysfs interface anyways.
1648 */
8d0aab2f
AV
1649 if (base < 0) {
1650 base = gpiochip_find_base(chip->ngpio);
1651 if (base < 0) {
d377f56f 1652 ret = base;
225fce83 1653 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1654 goto err_free_label;
8d0aab2f 1655 }
fdeb8e15
LW
1656 /*
1657 * TODO: it should not be necessary to reflect the assigned
1658 * base outside of the GPIO subsystem. Go over drivers and
1659 * see if anyone makes use of this, else drop this and assign
1660 * a poison instead.
1661 */
8d0aab2f
AV
1662 chip->base = base;
1663 }
fdeb8e15 1664 gdev->base = base;
8d0aab2f 1665
d377f56f
LW
1666 ret = gpiodev_add_to_list(gdev);
1667 if (ret) {
05aa5203 1668 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1669 goto err_free_label;
05aa5203 1670 }
1a989d0f 1671
767cd17a
RRD
1672 for (i = 0; i < chip->ngpio; i++)
1673 gdev->descs[i].gdev = gdev;
14e85c0e 1674
207270dd
DC
1675 spin_unlock_irqrestore(&gpio_lock, flags);
1676
51c1064e
BG
1677 ATOMIC_INIT_NOTIFIER_HEAD(&gdev->notifier);
1678
f23f1516 1679#ifdef CONFIG_PINCTRL
20ec3e39 1680 INIT_LIST_HEAD(&gdev->pin_ranges);
f23f1516
SH
1681#endif
1682
d377f56f
LW
1683 ret = gpiochip_set_desc_names(chip);
1684 if (ret)
5f3ca732
MP
1685 goto err_remove_from_list;
1686
d377f56f
LW
1687 ret = gpiochip_alloc_valid_mask(chip);
1688 if (ret)
48057ed1 1689 goto err_remove_from_list;
e0d89728 1690
d377f56f
LW
1691 ret = of_gpiochip_add(chip);
1692 if (ret)
48057ed1 1693 goto err_free_gpiochip_mask;
28355f81 1694
d377f56f
LW
1695 ret = gpiochip_init_valid_mask(chip);
1696 if (ret)
35779890 1697 goto err_remove_of_chip;
f8ec92a9 1698
3edfb7bd
RRD
1699 for (i = 0; i < chip->ngpio; i++) {
1700 struct gpio_desc *desc = &gdev->descs[i];
1701
d95da993 1702 if (chip->get_direction && gpiochip_line_is_valid(chip, i)) {
4fc5bfeb
AS
1703 assign_bit(FLAG_IS_OUT,
1704 &desc->flags, !chip->get_direction(chip, i));
d95da993 1705 } else {
4fc5bfeb
AS
1706 assign_bit(FLAG_IS_OUT,
1707 &desc->flags, !chip->direction_input);
d95da993 1708 }
3edfb7bd
RRD
1709 }
1710
b056ca1c
AS
1711 ret = gpiochip_add_pin_ranges(chip);
1712 if (ret)
1713 goto err_remove_of_chip;
1714
664e3e5a 1715 acpi_gpiochip_add(chip);
391c970c 1716
a411e81e
BG
1717 machine_gpiochip_add(chip);
1718
504369cd 1719 ret = gpiochip_irqchip_init_valid_mask(chip);
9411e3aa
AS
1720 if (ret)
1721 goto err_remove_acpi_chip;
1722
504369cd 1723 ret = gpiochip_irqchip_init_hw(chip);
fbdf8d4b 1724 if (ret)
48057ed1
LW
1725 goto err_remove_acpi_chip;
1726
fbdf8d4b
LW
1727 ret = gpiochip_add_irqchip(chip, lock_key, request_key);
1728 if (ret)
48057ed1
LW
1729 goto err_remove_irqchip_mask;
1730
3c702e99
LW
1731 /*
1732 * By first adding the chardev, and then adding the device,
1733 * we get a device node entry in sysfs under
1734 * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
1735 * coldplug of device nodes and other udev business.
159f3cd9
GR
1736 * We can do this only if gpiolib has been initialized.
1737 * Otherwise, defer until later.
3c702e99 1738 */
159f3cd9 1739 if (gpiolib_initialized) {
d377f56f
LW
1740 ret = gpiochip_setup_dev(gdev);
1741 if (ret)
48057ed1 1742 goto err_remove_irqchip;
159f3cd9 1743 }
cedb1881 1744 return 0;
3bae4811 1745
48057ed1
LW
1746err_remove_irqchip:
1747 gpiochip_irqchip_remove(chip);
1748err_remove_irqchip_mask:
1749 gpiochip_irqchip_free_valid_mask(chip);
35779890 1750err_remove_acpi_chip:
225fce83 1751 acpi_gpiochip_remove(chip);
35779890 1752err_remove_of_chip:
6d86750c 1753 gpiochip_free_hogs(chip);
225fce83 1754 of_gpiochip_remove(chip);
35779890 1755err_free_gpiochip_mask:
2f4133bb 1756 gpiochip_remove_pin_ranges(chip);
726cb3ba 1757 gpiochip_free_valid_mask(chip);
5f3ca732 1758err_remove_from_list:
225fce83 1759 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1760 list_del(&gdev->list);
3bae4811 1761 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1762err_free_label:
fcf273e5 1763 kfree_const(gdev->label);
476e2fc5
GR
1764err_free_descs:
1765 kfree(gdev->descs);
a05a1404 1766err_free_ida:
ff2b1359 1767 ida_simple_remove(&gpio_ida, gdev->id);
a05a1404 1768err_free_gdev:
d2876d08 1769 /* failures here can mean systems won't boot... */
1777fc97 1770 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
fdeb8e15 1771 gdev->base, gdev->base + gdev->ngpio - 1,
d377f56f 1772 chip->label ? : "generic", ret);
fdeb8e15 1773 kfree(gdev);
d377f56f 1774 return ret;
d2876d08 1775}
959bc7b2 1776EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
d2876d08 1777
43c54eca
LW
1778/**
1779 * gpiochip_get_data() - get per-subdriver data for the chip
950d55f5
TR
1780 * @chip: GPIO chip
1781 *
1782 * Returns:
1783 * The per-subdriver data for the chip.
43c54eca
LW
1784 */
1785void *gpiochip_get_data(struct gpio_chip *chip)
1786{
1787 return chip->gpiodev->data;
1788}
1789EXPORT_SYMBOL_GPL(gpiochip_get_data);
1790
d2876d08
DB
1791/**
1792 * gpiochip_remove() - unregister a gpio_chip
1793 * @chip: the chip to unregister
1794 *
1795 * A gpio_chip with any GPIOs still requested may not be removed.
1796 */
e1db1706 1797void gpiochip_remove(struct gpio_chip *chip)
d2876d08 1798{
ff2b1359 1799 struct gpio_device *gdev = chip->gpiodev;
d2876d08 1800 unsigned long flags;
869233f8 1801 unsigned int i;
d2876d08 1802
ff2b1359 1803 /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
afbc4f31 1804 gpiochip_sysfs_unregister(gdev);
5018ada6 1805 gpiochip_free_hogs(chip);
bd203bd5
BJZ
1806 /* Numb the device, cancelling all outstanding operations */
1807 gdev->chip = NULL;
00acc3dc 1808 gpiochip_irqchip_remove(chip);
6072b9dc 1809 acpi_gpiochip_remove(chip);
391c970c 1810 of_gpiochip_remove(chip);
2f4133bb 1811 gpiochip_remove_pin_ranges(chip);
726cb3ba 1812 gpiochip_free_valid_mask(chip);
43c54eca
LW
1813 /*
1814 * We accept no more calls into the driver from this point, so
1815 * NULL the driver data pointer
1816 */
1817 gdev->data = NULL;
391c970c 1818
6798acaa 1819 spin_lock_irqsave(&gpio_lock, flags);
fdeb8e15 1820 for (i = 0; i < gdev->ngpio; i++) {
869233f8
AS
1821 if (gpiochip_is_requested(chip, i))
1822 break;
d2876d08 1823 }
d2876d08 1824 spin_unlock_irqrestore(&gpio_lock, flags);
14e85c0e 1825
ca18a852 1826 if (i != gdev->ngpio)
fdeb8e15 1827 dev_crit(&gdev->dev,
58383c78 1828 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
fab28b89 1829
ff2b1359
LW
1830 /*
1831 * The gpiochip side puts its use of the device to rest here:
1832 * if there are no userspace clients, the chardev and device will
1833 * be removed, else it will be dangling until the last user is
1834 * gone.
1835 */
111379dc 1836 cdev_device_del(&gdev->chrdev, &gdev->dev);
ff2b1359 1837 put_device(&gdev->dev);
d2876d08
DB
1838}
1839EXPORT_SYMBOL_GPL(gpiochip_remove);
1840
594fa265
GL
1841/**
1842 * gpiochip_find() - iterator for locating a specific gpio_chip
1843 * @data: data to pass to match function
950d55f5 1844 * @match: Callback function to check gpio_chip
594fa265
GL
1845 *
1846 * Similar to bus_find_device. It returns a reference to a gpio_chip as
1847 * determined by a user supplied @match callback. The callback should return
1848 * 0 if the device doesn't match and non-zero if it does. If the callback is
1849 * non-zero, this function will return to the caller and not iterate over any
1850 * more gpio_chips.
1851 */
07ce8ec7 1852struct gpio_chip *gpiochip_find(void *data,
6e2cf651 1853 int (*match)(struct gpio_chip *chip,
3d0f7cf0 1854 void *data))
594fa265 1855{
ff2b1359 1856 struct gpio_device *gdev;
acf06ff7 1857 struct gpio_chip *chip = NULL;
594fa265 1858 unsigned long flags;
594fa265
GL
1859
1860 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1861 list_for_each_entry(gdev, &gpio_devices, list)
acf06ff7
MY
1862 if (gdev->chip && match(gdev->chip, data)) {
1863 chip = gdev->chip;
594fa265 1864 break;
acf06ff7 1865 }
ff2b1359 1866
594fa265
GL
1867 spin_unlock_irqrestore(&gpio_lock, flags);
1868
1869 return chip;
1870}
8fa0c9bf 1871EXPORT_SYMBOL_GPL(gpiochip_find);
d2876d08 1872
79697ef9
AC
1873static int gpiochip_match_name(struct gpio_chip *chip, void *data)
1874{
1875 const char *name = data;
1876
1877 return !strcmp(chip->label, name);
1878}
1879
1880static struct gpio_chip *find_chip_by_name(const char *name)
1881{
1882 return gpiochip_find((void *)name, gpiochip_match_name);
1883}
1884
14250520
LW
1885#ifdef CONFIG_GPIOLIB_IRQCHIP
1886
1887/*
1888 * The following is irqchip helper code for gpiochips.
1889 */
1890
9411e3aa
AS
1891static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
1892{
1893 struct gpio_irq_chip *girq = &gc->irq;
1894
1895 if (!girq->init_hw)
1896 return 0;
1897
1898 return girq->init_hw(gc);
1899}
1900
5fbe5b58 1901static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb 1902{
5fbe5b58
LW
1903 struct gpio_irq_chip *girq = &gc->irq;
1904
1905 if (!girq->init_valid_mask)
79b804cb
MW
1906 return 0;
1907
5fbe5b58
LW
1908 girq->valid_mask = gpiochip_allocate_mask(gc);
1909 if (!girq->valid_mask)
79b804cb
MW
1910 return -ENOMEM;
1911
5fbe5b58
LW
1912 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
1913
79b804cb
MW
1914 return 0;
1915}
1916
1917static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip)
1918{
7bdbd1ec 1919 bitmap_free(gpiochip->irq.valid_mask);
dc7b0387 1920 gpiochip->irq.valid_mask = NULL;
79b804cb
MW
1921}
1922
64ff2c8e
SB
1923bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gpiochip,
1924 unsigned int offset)
79b804cb 1925{
726cb3ba
SB
1926 if (!gpiochip_line_is_valid(gpiochip, offset))
1927 return false;
79b804cb 1928 /* No mask means all valid */
dc7b0387 1929 if (likely(!gpiochip->irq.valid_mask))
79b804cb 1930 return true;
dc7b0387 1931 return test_bit(offset, gpiochip->irq.valid_mask);
79b804cb 1932}
64ff2c8e 1933EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
79b804cb 1934
14250520 1935/**
d245b3f9 1936 * gpiochip_set_cascaded_irqchip() - connects a cascaded irqchip to a gpiochip
4892d3a6 1937 * @gc: the gpiochip to set the irqchip chain to
14250520 1938 * @parent_irq: the irq number corresponding to the parent IRQ for this
72780ce5 1939 * cascaded irqchip
14250520 1940 * @parent_handler: the parent interrupt handler for the accumulated IRQ
3f97d5fc
LW
1941 * coming out of the gpiochip. If the interrupt is nested rather than
1942 * cascaded, pass NULL in this handler argument
14250520 1943 */
4892d3a6 1944static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gc,
6f79309a 1945 unsigned int parent_irq,
d245b3f9 1946 irq_flow_handler_t parent_handler)
14250520 1947{
4892d3a6
LW
1948 struct gpio_irq_chip *girq = &gc->irq;
1949 struct device *dev = &gc->gpiodev->dev;
1950
1951 if (!girq->domain) {
1952 chip_err(gc, "called %s before setting up irqchip\n",
83141a77 1953 __func__);
1c8732bb
LW
1954 return;
1955 }
1956
3f97d5fc 1957 if (parent_handler) {
4892d3a6
LW
1958 if (gc->can_sleep) {
1959 chip_err(gc,
b1911710 1960 "you cannot have chained interrupts on a chip that may sleep\n");
3f97d5fc
LW
1961 return;
1962 }
4892d3a6
LW
1963 girq->parents = devm_kcalloc(dev, 1,
1964 sizeof(*girq->parents),
1965 GFP_KERNEL);
1966 if (!girq->parents) {
1967 chip_err(gc, "out of memory allocating parent IRQ\n");
1968 return;
1969 }
1970 girq->parents[0] = parent_irq;
1971 girq->num_parents = 1;
3f97d5fc
LW
1972 /*
1973 * The parent irqchip is already using the chip_data for this
1974 * irqchip, so our callbacks simply use the handler_data.
1975 */
f7f87753 1976 irq_set_chained_handler_and_data(parent_irq, parent_handler,
4892d3a6 1977 gc);
3f97d5fc 1978 }
14250520 1979}
d245b3f9 1980
d245b3f9
LW
1981/**
1982 * gpiochip_set_nested_irqchip() - connects a nested irqchip to a gpiochip
1983 * @gpiochip: the gpiochip to set the irqchip nested handler to
1984 * @irqchip: the irqchip to nest to the gpiochip
1985 * @parent_irq: the irq number corresponding to the parent IRQ for this
1986 * nested irqchip
1987 */
1988void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip,
1989 struct irq_chip *irqchip,
6f79309a 1990 unsigned int parent_irq)
d245b3f9 1991{
3c1f6b2d 1992 gpiochip_set_cascaded_irqchip(gpiochip, parent_irq, NULL);
d245b3f9
LW
1993}
1994EXPORT_SYMBOL_GPL(gpiochip_set_nested_irqchip);
1995
fdd61a01
LW
1996#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1997
1998/**
1999 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
2000 * to a gpiochip
2001 * @gc: the gpiochip to set the irqchip hierarchical handler to
2002 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
2003 * will then percolate up to the parent
2004 */
2005static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
2006 struct irq_chip *irqchip)
2007{
2008 /* DT will deal with mapping each IRQ as we go along */
2009 if (is_of_node(gc->irq.fwnode))
2010 return;
2011
2012 /*
2013 * This is for legacy and boardfile "irqchip" fwnodes: allocate
2014 * irqs upfront instead of dynamically since we don't have the
2015 * dynamic type of allocation that hardware description languages
2016 * provide. Once all GPIO drivers using board files are gone from
2017 * the kernel we can delete this code, but for a transitional period
2018 * it is necessary to keep this around.
2019 */
2020 if (is_fwnode_irqchip(gc->irq.fwnode)) {
2021 int i;
2022 int ret;
2023
2024 for (i = 0; i < gc->ngpio; i++) {
2025 struct irq_fwspec fwspec;
2026 unsigned int parent_hwirq;
2027 unsigned int parent_type;
2028 struct gpio_irq_chip *girq = &gc->irq;
2029
2030 /*
2031 * We call the child to parent translation function
2032 * only to check if the child IRQ is valid or not.
2033 * Just pick the rising edge type here as that is what
2034 * we likely need to support.
2035 */
2036 ret = girq->child_to_parent_hwirq(gc, i,
2037 IRQ_TYPE_EDGE_RISING,
2038 &parent_hwirq,
2039 &parent_type);
2040 if (ret) {
2041 chip_err(gc, "skip set-up on hwirq %d\n",
2042 i);
2043 continue;
2044 }
2045
2046 fwspec.fwnode = gc->irq.fwnode;
2047 /* This is the hwirq for the GPIO line side of things */
2048 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
2049 /* Just pick something */
2050 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
2051 fwspec.param_count = 2;
2052 ret = __irq_domain_alloc_irqs(gc->irq.domain,
2053 /* just pick something */
2054 -1,
2055 1,
2056 NUMA_NO_NODE,
2057 &fwspec,
2058 false,
2059 NULL);
2060 if (ret < 0) {
2061 chip_err(gc,
2062 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
2063 i, parent_hwirq,
2064 ret);
2065 }
2066 }
2067 }
2068
2069 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
2070
2071 return;
2072}
2073
2074static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
2075 struct irq_fwspec *fwspec,
2076 unsigned long *hwirq,
2077 unsigned int *type)
2078{
2079 /* We support standard DT translation */
2080 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
2081 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
2082 }
2083
2084 /* This is for board files and others not using DT */
2085 if (is_fwnode_irqchip(fwspec->fwnode)) {
2086 int ret;
2087
2088 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
2089 if (ret)
2090 return ret;
2091 WARN_ON(*type == IRQ_TYPE_NONE);
2092 return 0;
2093 }
2094 return -EINVAL;
2095}
2096
2097static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
2098 unsigned int irq,
2099 unsigned int nr_irqs,
2100 void *data)
2101{
2102 struct gpio_chip *gc = d->host_data;
2103 irq_hw_number_t hwirq;
2104 unsigned int type = IRQ_TYPE_NONE;
2105 struct irq_fwspec *fwspec = data;
24258761 2106 void *parent_arg;
fdd61a01
LW
2107 unsigned int parent_hwirq;
2108 unsigned int parent_type;
2109 struct gpio_irq_chip *girq = &gc->irq;
2110 int ret;
2111
2112 /*
2113 * The nr_irqs parameter is always one except for PCI multi-MSI
2114 * so this should not happen.
2115 */
2116 WARN_ON(nr_irqs != 1);
2117
2118 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
2119 if (ret)
2120 return ret;
2121
366950ee 2122 chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
fdd61a01
LW
2123
2124 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
2125 &parent_hwirq, &parent_type);
2126 if (ret) {
2127 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
2128 return ret;
2129 }
366950ee 2130 chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq);
fdd61a01
LW
2131
2132 /*
2133 * We set handle_bad_irq because the .set_type() should
2134 * always be invoked and set the right type of handler.
2135 */
2136 irq_domain_set_info(d,
2137 irq,
2138 hwirq,
2139 gc->irq.chip,
2140 gc,
2141 girq->handler,
2142 NULL, NULL);
2143 irq_set_probe(irq);
2144
fdd61a01 2145 /* This parent only handles asserted level IRQs */
24258761
KH
2146 parent_arg = girq->populate_parent_alloc_arg(gc, parent_hwirq, parent_type);
2147 if (!parent_arg)
2148 return -ENOMEM;
2149
366950ee 2150 chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
fdd61a01 2151 irq, parent_hwirq);
c34f6dc8 2152 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
24258761 2153 ret = irq_domain_alloc_irqs_parent(d, irq, 1, parent_arg);
880b7cf2
KH
2154 /*
2155 * If the parent irqdomain is msi, the interrupts have already
2156 * been allocated, so the EEXIST is good.
2157 */
2158 if (irq_domain_is_msi(d->parent) && (ret == -EEXIST))
2159 ret = 0;
fdd61a01
LW
2160 if (ret)
2161 chip_err(gc,
2162 "failed to allocate parent hwirq %d for hwirq %lu\n",
2163 parent_hwirq, hwirq);
2164
24258761 2165 kfree(parent_arg);
fdd61a01
LW
2166 return ret;
2167}
2168
2169static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *chip,
2170 unsigned int offset)
2171{
2172 return offset;
2173}
2174
2175static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
2176{
2177 ops->activate = gpiochip_irq_domain_activate;
2178 ops->deactivate = gpiochip_irq_domain_deactivate;
2179 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
2180 ops->free = irq_domain_free_irqs_common;
2181
2182 /*
2183 * We only allow overriding the translate() function for
2184 * hierarchical chips, and this should only be done if the user
2185 * really need something other than 1:1 translation.
2186 */
2187 if (!ops->translate)
2188 ops->translate = gpiochip_hierarchy_irq_domain_translate;
2189}
2190
2191static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
2192{
2193 if (!gc->irq.child_to_parent_hwirq ||
2194 !gc->irq.fwnode) {
2195 chip_err(gc, "missing irqdomain vital data\n");
2196 return -EINVAL;
2197 }
2198
2199 if (!gc->irq.child_offset_to_irq)
2200 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
2201
24258761
KH
2202 if (!gc->irq.populate_parent_alloc_arg)
2203 gc->irq.populate_parent_alloc_arg =
fdd61a01
LW
2204 gpiochip_populate_parent_fwspec_twocell;
2205
2206 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
2207
2208 gc->irq.domain = irq_domain_create_hierarchy(
2209 gc->irq.parent_domain,
2210 0,
2211 gc->ngpio,
2212 gc->irq.fwnode,
2213 &gc->irq.child_irq_domain_ops,
2214 gc);
2215
2216 if (!gc->irq.domain)
2217 return -ENOMEM;
2218
2219 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
2220
2221 return 0;
2222}
2223
2224static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
2225{
2226 return !!gc->irq.parent_domain;
2227}
2228
24258761 2229void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *chip,
fdd61a01
LW
2230 unsigned int parent_hwirq,
2231 unsigned int parent_type)
2232{
24258761
KH
2233 struct irq_fwspec *fwspec;
2234
2235 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
2236 if (!fwspec)
2237 return NULL;
2238
2239 fwspec->fwnode = chip->irq.parent_domain->fwnode;
fdd61a01
LW
2240 fwspec->param_count = 2;
2241 fwspec->param[0] = parent_hwirq;
2242 fwspec->param[1] = parent_type;
24258761
KH
2243
2244 return fwspec;
fdd61a01
LW
2245}
2246EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
2247
24258761 2248void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *chip,
fdd61a01
LW
2249 unsigned int parent_hwirq,
2250 unsigned int parent_type)
2251{
24258761
KH
2252 struct irq_fwspec *fwspec;
2253
2254 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
2255 if (!fwspec)
2256 return NULL;
2257
2258 fwspec->fwnode = chip->irq.parent_domain->fwnode;
fdd61a01
LW
2259 fwspec->param_count = 4;
2260 fwspec->param[0] = 0;
2261 fwspec->param[1] = parent_hwirq;
2262 fwspec->param[2] = 0;
2263 fwspec->param[3] = parent_type;
24258761
KH
2264
2265 return fwspec;
fdd61a01
LW
2266}
2267EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
2268
2269#else
2270
2271static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
2272{
2273 return -EINVAL;
2274}
2275
2276static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
2277{
2278 return false;
2279}
2280
2281#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
2282
14250520
LW
2283/**
2284 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
2285 * @d: the irqdomain used by this irqchip
2286 * @irq: the global irq number used by this GPIO irqchip irq
2287 * @hwirq: the local IRQ/GPIO line offset on this gpiochip
2288 *
2289 * This function will set up the mapping for a certain IRQ line on a
2290 * gpiochip by assigning the gpiochip as chip data, and using the irqchip
2291 * stored inside the gpiochip.
2292 */
1b95b4eb
TR
2293int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
2294 irq_hw_number_t hwirq)
14250520
LW
2295{
2296 struct gpio_chip *chip = d->host_data;
d377f56f 2297 int ret = 0;
14250520 2298
dc749a09
GS
2299 if (!gpiochip_irqchip_irq_valid(chip, hwirq))
2300 return -ENXIO;
2301
14250520 2302 irq_set_chip_data(irq, chip);
a0a8bcf4
GS
2303 /*
2304 * This lock class tells lockdep that GPIO irqs are in a different
2305 * category than their parents, so it won't report false recursion.
2306 */
39c3fd58 2307 irq_set_lockdep_class(irq, chip->irq.lock_key, chip->irq.request_key);
c7a0aa59 2308 irq_set_chip_and_handler(irq, chip->irq.chip, chip->irq.handler);
d245b3f9 2309 /* Chips that use nested thread handlers have them marked */
60ed54ca 2310 if (chip->irq.threaded)
1c8732bb 2311 irq_set_nested_thread(irq, 1);
14250520 2312 irq_set_noprobe(irq);
23393d49 2313
e0d89728 2314 if (chip->irq.num_parents == 1)
d377f56f 2315 ret = irq_set_parent(irq, chip->irq.parents[0]);
e0d89728 2316 else if (chip->irq.map)
d377f56f 2317 ret = irq_set_parent(irq, chip->irq.map[hwirq]);
e0d89728 2318
d377f56f
LW
2319 if (ret < 0)
2320 return ret;
e0d89728 2321
1333b90f
LW
2322 /*
2323 * No set-up of the hardware will happen if IRQ_TYPE_NONE
2324 * is passed as default type.
2325 */
3634eeb0
TR
2326 if (chip->irq.default_type != IRQ_TYPE_NONE)
2327 irq_set_irq_type(irq, chip->irq.default_type);
14250520
LW
2328
2329 return 0;
2330}
1b95b4eb 2331EXPORT_SYMBOL_GPL(gpiochip_irq_map);
14250520 2332
1b95b4eb 2333void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
c3626fde 2334{
1c8732bb
LW
2335 struct gpio_chip *chip = d->host_data;
2336
60ed54ca 2337 if (chip->irq.threaded)
1c8732bb 2338 irq_set_nested_thread(irq, 0);
c3626fde
LW
2339 irq_set_chip_and_handler(irq, NULL, NULL);
2340 irq_set_chip_data(irq, NULL);
2341}
1b95b4eb 2342EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
c3626fde 2343
14250520
LW
2344static const struct irq_domain_ops gpiochip_domain_ops = {
2345 .map = gpiochip_irq_map,
c3626fde 2346 .unmap = gpiochip_irq_unmap,
14250520
LW
2347 /* Virtually all GPIO irqchips are twocell:ed */
2348 .xlate = irq_domain_xlate_twocell,
2349};
2350
fdd61a01
LW
2351/*
2352 * TODO: move these activate/deactivate in under the hierarchicial
2353 * irqchip implementation as static once SPMI and SSBI (all external
2354 * users) are phased over.
2355 */
ef74f70e
BM
2356/**
2357 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
2358 * @domain: The IRQ domain used by this IRQ chip
2359 * @data: Outermost irq_data associated with the IRQ
2360 * @reserve: If set, only reserve an interrupt vector instead of assigning one
2361 *
2362 * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
2363 * used as the activate function for the &struct irq_domain_ops. The host_data
2364 * for the IRQ domain must be the &struct gpio_chip.
2365 */
2366int gpiochip_irq_domain_activate(struct irq_domain *domain,
2367 struct irq_data *data, bool reserve)
2368{
2369 struct gpio_chip *chip = domain->host_data;
2370
2371 return gpiochip_lock_as_irq(chip, data->hwirq);
2372}
2373EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
2374
2375/**
2376 * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
2377 * @domain: The IRQ domain used by this IRQ chip
2378 * @data: Outermost irq_data associated with the IRQ
2379 *
2380 * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
2381 * be used as the deactivate function for the &struct irq_domain_ops. The
2382 * host_data for the IRQ domain must be the &struct gpio_chip.
2383 */
2384void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
2385 struct irq_data *data)
2386{
2387 struct gpio_chip *chip = domain->host_data;
2388
2389 return gpiochip_unlock_as_irq(chip, data->hwirq);
2390}
2391EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
2392
4e6b8238 2393static int gpiochip_to_irq(struct gpio_chip *chip, unsigned offset)
14250520 2394{
fdd61a01
LW
2395 struct irq_domain *domain = chip->irq.domain;
2396
4e6b8238
HV
2397 if (!gpiochip_irqchip_irq_valid(chip, offset))
2398 return -ENXIO;
5b76e79c 2399
fdd61a01
LW
2400#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2401 if (irq_domain_is_hierarchy(domain)) {
2402 struct irq_fwspec spec;
2403
2404 spec.fwnode = domain->fwnode;
2405 spec.param_count = 2;
2406 spec.param[0] = chip->irq.child_offset_to_irq(chip, offset);
2407 spec.param[1] = IRQ_TYPE_NONE;
2408
2409 return irq_create_fwspec_mapping(&spec);
2410 }
2411#endif
2412
2413 return irq_create_mapping(domain, offset);
14250520
LW
2414}
2415
14250520
LW
2416static int gpiochip_irq_reqres(struct irq_data *d)
2417{
2418 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
5b76e79c 2419
4e6b8238 2420 return gpiochip_reqres_irq(chip, d->hwirq);
14250520
LW
2421}
2422
2423static void gpiochip_irq_relres(struct irq_data *d)
2424{
2425 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
2426
4e6b8238 2427 gpiochip_relres_irq(chip, d->hwirq);
14250520
LW
2428}
2429
461c1a7d 2430static void gpiochip_irq_enable(struct irq_data *d)
14250520 2431{
461c1a7d 2432 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
e0d89728 2433
461c1a7d
HV
2434 gpiochip_enable_irq(chip, d->hwirq);
2435 if (chip->irq.irq_enable)
2436 chip->irq.irq_enable(d);
2437 else
2438 chip->irq.chip->irq_unmask(d);
2439}
2440
2441static void gpiochip_irq_disable(struct irq_data *d)
2442{
2443 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
2444
2445 if (chip->irq.irq_disable)
2446 chip->irq.irq_disable(d);
2447 else
2448 chip->irq.chip->irq_mask(d);
2449 gpiochip_disable_irq(chip, d->hwirq);
2450}
2451
ca620f2d
HV
2452static void gpiochip_set_irq_hooks(struct gpio_chip *gpiochip)
2453{
2454 struct irq_chip *irqchip = gpiochip->irq.chip;
2455
2456 if (!irqchip->irq_request_resources &&
2457 !irqchip->irq_release_resources) {
2458 irqchip->irq_request_resources = gpiochip_irq_reqres;
2459 irqchip->irq_release_resources = gpiochip_irq_relres;
2460 }
461c1a7d
HV
2461 if (WARN_ON(gpiochip->irq.irq_enable))
2462 return;
171948ea
HV
2463 /* Check if the irqchip already has this hook... */
2464 if (irqchip->irq_enable == gpiochip_irq_enable) {
2465 /*
2466 * ...and if so, give a gentle warning that this is bad
2467 * practice.
2468 */
2469 chip_info(gpiochip,
2470 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
2471 return;
2472 }
461c1a7d
HV
2473 gpiochip->irq.irq_enable = irqchip->irq_enable;
2474 gpiochip->irq.irq_disable = irqchip->irq_disable;
2475 irqchip->irq_enable = gpiochip_irq_enable;
2476 irqchip->irq_disable = gpiochip_irq_disable;
14250520
LW
2477}
2478
e0d89728
TR
2479/**
2480 * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
2481 * @gpiochip: the GPIO chip to add the IRQ chip to
39c3fd58
AL
2482 * @lock_key: lockdep class for IRQ lock
2483 * @request_key: lockdep class for IRQ request
e0d89728 2484 */
959bc7b2 2485static int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
2486 struct lock_class_key *lock_key,
2487 struct lock_class_key *request_key)
e0d89728
TR
2488{
2489 struct irq_chip *irqchip = gpiochip->irq.chip;
fdd61a01 2490 const struct irq_domain_ops *ops = NULL;
e0d89728
TR
2491 struct device_node *np;
2492 unsigned int type;
2493 unsigned int i;
2494
2495 if (!irqchip)
2496 return 0;
2497
2498 if (gpiochip->irq.parent_handler && gpiochip->can_sleep) {
b1911710 2499 chip_err(gpiochip, "you cannot have chained interrupts on a chip that may sleep\n");
e0d89728
TR
2500 return -EINVAL;
2501 }
2502
2503 np = gpiochip->gpiodev->dev.of_node;
2504 type = gpiochip->irq.default_type;
2505
2506 /*
2507 * Specifying a default trigger is a terrible idea if DT or ACPI is
2508 * used to configure the interrupts, as you may end up with
2509 * conflicting triggers. Tell the user, and reset to NONE.
2510 */
2511 if (WARN(np && type != IRQ_TYPE_NONE,
2512 "%s: Ignoring %u default trigger\n", np->full_name, type))
2513 type = IRQ_TYPE_NONE;
2514
2515 if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) {
2516 acpi_handle_warn(ACPI_HANDLE(gpiochip->parent),
2517 "Ignoring %u default trigger\n", type);
2518 type = IRQ_TYPE_NONE;
2519 }
2520
2521 gpiochip->to_irq = gpiochip_to_irq;
2522 gpiochip->irq.default_type = type;
959bc7b2 2523 gpiochip->irq.lock_key = lock_key;
39c3fd58 2524 gpiochip->irq.request_key = request_key;
e0d89728 2525
fdd61a01
LW
2526 /* If a parent irqdomain is provided, let's build a hierarchy */
2527 if (gpiochip_hierarchy_is_hierarchical(gpiochip)) {
2528 int ret = gpiochip_hierarchy_add_domain(gpiochip);
2529 if (ret)
2530 return ret;
2531 } else {
2532 /* Some drivers provide custom irqdomain ops */
2533 if (gpiochip->irq.domain_ops)
2534 ops = gpiochip->irq.domain_ops;
2535
2536 if (!ops)
2537 ops = &gpiochip_domain_ops;
2538 gpiochip->irq.domain = irq_domain_add_simple(np,
2539 gpiochip->ngpio,
2540 gpiochip->irq.first,
2541 ops, gpiochip);
2542 if (!gpiochip->irq.domain)
2543 return -EINVAL;
2544 }
e0d89728 2545
e0d89728
TR
2546 if (gpiochip->irq.parent_handler) {
2547 void *data = gpiochip->irq.parent_handler_data ?: gpiochip;
2548
2549 for (i = 0; i < gpiochip->irq.num_parents; i++) {
2550 /*
2551 * The parent IRQ chip is already using the chip_data
2552 * for this IRQ chip, so our callbacks simply use the
2553 * handler_data.
2554 */
2555 irq_set_chained_handler_and_data(gpiochip->irq.parents[i],
2556 gpiochip->irq.parent_handler,
2557 data);
2558 }
e0d89728
TR
2559 }
2560
ca620f2d
HV
2561 gpiochip_set_irq_hooks(gpiochip);
2562
e0d89728
TR
2563 acpi_gpiochip_request_interrupts(gpiochip);
2564
2565 return 0;
2566}
2567
14250520
LW
2568/**
2569 * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
2570 * @gpiochip: the gpiochip to remove the irqchip from
2571 *
2572 * This is called only from gpiochip_remove()
2573 */
2574static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)
2575{
ca620f2d 2576 struct irq_chip *irqchip = gpiochip->irq.chip;
39e5f096 2577 unsigned int offset;
c3626fde 2578
afa82fab
MW
2579 acpi_gpiochip_free_interrupts(gpiochip);
2580
ca620f2d 2581 if (irqchip && gpiochip->irq.parent_handler) {
39e5f096
TR
2582 struct gpio_irq_chip *irq = &gpiochip->irq;
2583 unsigned int i;
2584
2585 for (i = 0; i < irq->num_parents; i++)
2586 irq_set_chained_handler_and_data(irq->parents[i],
2587 NULL, NULL);
25e4fe92
DES
2588 }
2589
c3626fde 2590 /* Remove all IRQ mappings and delete the domain */
f0fbe7bc 2591 if (gpiochip->irq.domain) {
39e5f096
TR
2592 unsigned int irq;
2593
79b804cb
MW
2594 for (offset = 0; offset < gpiochip->ngpio; offset++) {
2595 if (!gpiochip_irqchip_irq_valid(gpiochip, offset))
2596 continue;
f0fbe7bc
TR
2597
2598 irq = irq_find_mapping(gpiochip->irq.domain, offset);
2599 irq_dispose_mapping(irq);
79b804cb 2600 }
f0fbe7bc
TR
2601
2602 irq_domain_remove(gpiochip->irq.domain);
c3626fde 2603 }
14250520 2604
461c1a7d
HV
2605 if (irqchip) {
2606 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
2607 irqchip->irq_request_resources = NULL;
2608 irqchip->irq_release_resources = NULL;
2609 }
2610 if (irqchip->irq_enable == gpiochip_irq_enable) {
2611 irqchip->irq_enable = gpiochip->irq.irq_enable;
2612 irqchip->irq_disable = gpiochip->irq.irq_disable;
2613 }
14250520 2614 }
461c1a7d
HV
2615 gpiochip->irq.irq_enable = NULL;
2616 gpiochip->irq.irq_disable = NULL;
ca620f2d 2617 gpiochip->irq.chip = NULL;
79b804cb
MW
2618
2619 gpiochip_irqchip_free_valid_mask(gpiochip);
14250520
LW
2620}
2621
2622/**
739e6f59 2623 * gpiochip_irqchip_add_key() - adds an irqchip to a gpiochip
14250520
LW
2624 * @gpiochip: the gpiochip to add the irqchip to
2625 * @irqchip: the irqchip to add to the gpiochip
2626 * @first_irq: if not dynamically assigned, the base (first) IRQ to
2627 * allocate gpiochip irqs from
2628 * @handler: the irq handler to use (often a predefined irq core function)
1333b90f
LW
2629 * @type: the default type for IRQs on this irqchip, pass IRQ_TYPE_NONE
2630 * to have the core avoid setting up any default type in the hardware.
60ed54ca 2631 * @threaded: whether this irqchip uses a nested thread handler
39c3fd58
AL
2632 * @lock_key: lockdep class for IRQ lock
2633 * @request_key: lockdep class for IRQ request
14250520
LW
2634 *
2635 * This function closely associates a certain irqchip with a certain
2636 * gpiochip, providing an irq domain to translate the local IRQs to
2637 * global irqs in the gpiolib core, and making sure that the gpiochip
2638 * is passed as chip data to all related functions. Driver callbacks
09dd5f9e 2639 * need to use gpiochip_get_data() to get their local state containers back
14250520
LW
2640 * from the gpiochip passed as chip data. An irqdomain will be stored
2641 * in the gpiochip that shall be used by the driver to handle IRQ number
2642 * translation. The gpiochip will need to be initialized and registered
2643 * before calling this function.
2644 *
c3626fde
LW
2645 * This function will handle two cell:ed simple IRQs and assumes all
2646 * the pins on the gpiochip can generate a unique IRQ. Everything else
14250520
LW
2647 * need to be open coded.
2648 */
739e6f59
LW
2649int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip,
2650 struct irq_chip *irqchip,
2651 unsigned int first_irq,
2652 irq_flow_handler_t handler,
2653 unsigned int type,
60ed54ca 2654 bool threaded,
39c3fd58
AL
2655 struct lock_class_key *lock_key,
2656 struct lock_class_key *request_key)
14250520
LW
2657{
2658 struct device_node *of_node;
14250520
LW
2659
2660 if (!gpiochip || !irqchip)
2661 return -EINVAL;
2662
58383c78 2663 if (!gpiochip->parent) {
14250520
LW
2664 pr_err("missing gpiochip .dev parent pointer\n");
2665 return -EINVAL;
2666 }
60ed54ca 2667 gpiochip->irq.threaded = threaded;
58383c78 2668 of_node = gpiochip->parent->of_node;
14250520
LW
2669#ifdef CONFIG_OF_GPIO
2670 /*
20a8a968 2671 * If the gpiochip has an assigned OF node this takes precedence
c88402c2
BJZ
2672 * FIXME: get rid of this and use gpiochip->parent->of_node
2673 * everywhere
14250520
LW
2674 */
2675 if (gpiochip->of_node)
2676 of_node = gpiochip->of_node;
2677#endif
332e99d5 2678 /*
0a1e0053 2679 * Specifying a default trigger is a terrible idea if DT or ACPI is
332e99d5
MZ
2680 * used to configure the interrupts, as you may end-up with
2681 * conflicting triggers. Tell the user, and reset to NONE.
2682 */
2683 if (WARN(of_node && type != IRQ_TYPE_NONE,
7eb6ce2f 2684 "%pOF: Ignoring %d default trigger\n", of_node, type))
332e99d5 2685 type = IRQ_TYPE_NONE;
0a1e0053
MW
2686 if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) {
2687 acpi_handle_warn(ACPI_HANDLE(gpiochip->parent),
2688 "Ignoring %d default trigger\n", type);
2689 type = IRQ_TYPE_NONE;
2690 }
332e99d5 2691
da80ff81 2692 gpiochip->irq.chip = irqchip;
c7a0aa59 2693 gpiochip->irq.handler = handler;
3634eeb0 2694 gpiochip->irq.default_type = type;
14250520 2695 gpiochip->to_irq = gpiochip_to_irq;
ca9df053 2696 gpiochip->irq.lock_key = lock_key;
39c3fd58 2697 gpiochip->irq.request_key = request_key;
f0fbe7bc 2698 gpiochip->irq.domain = irq_domain_add_simple(of_node,
14250520
LW
2699 gpiochip->ngpio, first_irq,
2700 &gpiochip_domain_ops, gpiochip);
f0fbe7bc 2701 if (!gpiochip->irq.domain) {
da80ff81 2702 gpiochip->irq.chip = NULL;
14250520
LW
2703 return -EINVAL;
2704 }
8b67a1f0 2705
ca620f2d 2706 gpiochip_set_irq_hooks(gpiochip);
14250520 2707
afa82fab
MW
2708 acpi_gpiochip_request_interrupts(gpiochip);
2709
14250520
LW
2710 return 0;
2711}
739e6f59 2712EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_key);
14250520
LW
2713
2714#else /* CONFIG_GPIOLIB_IRQCHIP */
2715
959bc7b2 2716static inline int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
2717 struct lock_class_key *lock_key,
2718 struct lock_class_key *request_key)
e0d89728
TR
2719{
2720 return 0;
2721}
14250520 2722static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip) {}
9411e3aa
AS
2723
2724static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gpiochip)
2725{
2726 return 0;
2727}
2728
79b804cb
MW
2729static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip)
2730{
2731 return 0;
2732}
2733static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip)
2734{ }
14250520
LW
2735
2736#endif /* CONFIG_GPIOLIB_IRQCHIP */
2737
c771c2f4
JG
2738/**
2739 * gpiochip_generic_request() - request the gpio function for a pin
2740 * @chip: the gpiochip owning the GPIO
2741 * @offset: the offset of the GPIO to request for GPIO function
2742 */
2743int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset)
2744{
a9a1d2a7 2745 return pinctrl_gpio_request(chip->gpiodev->base + offset);
c771c2f4
JG
2746}
2747EXPORT_SYMBOL_GPL(gpiochip_generic_request);
2748
2749/**
2750 * gpiochip_generic_free() - free the gpio function from a pin
2751 * @chip: the gpiochip to request the gpio function for
2752 * @offset: the offset of the GPIO to free from GPIO function
2753 */
2754void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset)
2755{
a9a1d2a7 2756 pinctrl_gpio_free(chip->gpiodev->base + offset);
c771c2f4
JG
2757}
2758EXPORT_SYMBOL_GPL(gpiochip_generic_free);
2759
2956b5d9
MW
2760/**
2761 * gpiochip_generic_config() - apply configuration for a pin
2762 * @chip: the gpiochip owning the GPIO
2763 * @offset: the offset of the GPIO to apply the configuration
2764 * @config: the configuration to be applied
2765 */
2766int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset,
2767 unsigned long config)
2768{
2769 return pinctrl_gpio_set_config(chip->gpiodev->base + offset, config);
2770}
2771EXPORT_SYMBOL_GPL(gpiochip_generic_config);
2772
f23f1516 2773#ifdef CONFIG_PINCTRL
165adc9c 2774
586a87e6
CR
2775/**
2776 * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
2777 * @chip: the gpiochip to add the range for
d32651f6 2778 * @pctldev: the pin controller to map to
586a87e6
CR
2779 * @gpio_offset: the start offset in the current gpio_chip number space
2780 * @pin_group: name of the pin group inside the pin controller
973c1714
CL
2781 *
2782 * Calling this function directly from a DeviceTree-supported
2783 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2784 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2785 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
586a87e6
CR
2786 */
2787int gpiochip_add_pingroup_range(struct gpio_chip *chip,
2788 struct pinctrl_dev *pctldev,
2789 unsigned int gpio_offset, const char *pin_group)
2790{
2791 struct gpio_pin_range *pin_range;
fdeb8e15 2792 struct gpio_device *gdev = chip->gpiodev;
586a87e6
CR
2793 int ret;
2794
2795 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
2796 if (!pin_range) {
1a2a99c6 2797 chip_err(chip, "failed to allocate pin ranges\n");
586a87e6
CR
2798 return -ENOMEM;
2799 }
2800
2801 /* Use local offset as range ID */
2802 pin_range->range.id = gpio_offset;
2803 pin_range->range.gc = chip;
2804 pin_range->range.name = chip->label;
fdeb8e15 2805 pin_range->range.base = gdev->base + gpio_offset;
586a87e6
CR
2806 pin_range->pctldev = pctldev;
2807
2808 ret = pinctrl_get_group_pins(pctldev, pin_group,
2809 &pin_range->range.pins,
2810 &pin_range->range.npins);
61c6375d
MN
2811 if (ret < 0) {
2812 kfree(pin_range);
586a87e6 2813 return ret;
61c6375d 2814 }
586a87e6
CR
2815
2816 pinctrl_add_gpio_range(pctldev, &pin_range->range);
2817
1a2a99c6
AS
2818 chip_dbg(chip, "created GPIO range %d->%d ==> %s PINGRP %s\n",
2819 gpio_offset, gpio_offset + pin_range->range.npins - 1,
586a87e6
CR
2820 pinctrl_dev_get_devname(pctldev), pin_group);
2821
20ec3e39 2822 list_add_tail(&pin_range->node, &gdev->pin_ranges);
586a87e6
CR
2823
2824 return 0;
2825}
2826EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
2827
3f0f8670
LW
2828/**
2829 * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
2830 * @chip: the gpiochip to add the range for
950d55f5 2831 * @pinctl_name: the dev_name() of the pin controller to map to
316511c0
LW
2832 * @gpio_offset: the start offset in the current gpio_chip number space
2833 * @pin_offset: the start offset in the pin controller number space
3f0f8670
LW
2834 * @npins: the number of pins from the offset of each pin space (GPIO and
2835 * pin controller) to accumulate in this range
950d55f5
TR
2836 *
2837 * Returns:
2838 * 0 on success, or a negative error-code on failure.
973c1714
CL
2839 *
2840 * Calling this function directly from a DeviceTree-supported
2841 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2842 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2843 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
3f0f8670 2844 */
1e63d7b9 2845int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
316511c0 2846 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 2847 unsigned int npins)
f23f1516
SH
2848{
2849 struct gpio_pin_range *pin_range;
fdeb8e15 2850 struct gpio_device *gdev = chip->gpiodev;
b4d4b1f0 2851 int ret;
f23f1516 2852
3f0f8670 2853 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
f23f1516 2854 if (!pin_range) {
1a2a99c6 2855 chip_err(chip, "failed to allocate pin ranges\n");
1e63d7b9 2856 return -ENOMEM;
f23f1516
SH
2857 }
2858
3f0f8670 2859 /* Use local offset as range ID */
316511c0 2860 pin_range->range.id = gpio_offset;
3f0f8670 2861 pin_range->range.gc = chip;
f23f1516 2862 pin_range->range.name = chip->label;
fdeb8e15 2863 pin_range->range.base = gdev->base + gpio_offset;
316511c0 2864 pin_range->range.pin_base = pin_offset;
f23f1516 2865 pin_range->range.npins = npins;
192c369c 2866 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
f23f1516 2867 &pin_range->range);
8f23ca1a 2868 if (IS_ERR(pin_range->pctldev)) {
b4d4b1f0 2869 ret = PTR_ERR(pin_range->pctldev);
1a2a99c6 2870 chip_err(chip, "could not create pin range\n");
3f0f8670 2871 kfree(pin_range);
b4d4b1f0 2872 return ret;
3f0f8670 2873 }
1a2a99c6
AS
2874 chip_dbg(chip, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
2875 gpio_offset, gpio_offset + npins - 1,
316511c0
LW
2876 pinctl_name,
2877 pin_offset, pin_offset + npins - 1);
f23f1516 2878
20ec3e39 2879 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1e63d7b9
LW
2880
2881 return 0;
f23f1516 2882}
165adc9c 2883EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
f23f1516 2884
3f0f8670
LW
2885/**
2886 * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
2887 * @chip: the chip to remove all the mappings for
2888 */
f23f1516
SH
2889void gpiochip_remove_pin_ranges(struct gpio_chip *chip)
2890{
2891 struct gpio_pin_range *pin_range, *tmp;
20ec3e39 2892 struct gpio_device *gdev = chip->gpiodev;
f23f1516 2893
20ec3e39 2894 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
f23f1516
SH
2895 list_del(&pin_range->node);
2896 pinctrl_remove_gpio_range(pin_range->pctldev,
2897 &pin_range->range);
3f0f8670 2898 kfree(pin_range);
f23f1516
SH
2899 }
2900}
165adc9c
LW
2901EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
2902
2903#endif /* CONFIG_PINCTRL */
f23f1516 2904
d2876d08
DB
2905/* These "optional" allocation calls help prevent drivers from stomping
2906 * on each other, and help provide better diagnostics in debugfs.
2907 * They're called even less than the "set direction" calls.
2908 */
fac9d885 2909static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
d2876d08 2910{
fdeb8e15 2911 struct gpio_chip *chip = desc->gdev->chip;
d377f56f 2912 int ret;
d2876d08 2913 unsigned long flags;
3789f5ac 2914 unsigned offset;
d2876d08 2915
18534df4
MS
2916 if (label) {
2917 label = kstrdup_const(label, GFP_KERNEL);
2918 if (!label)
2919 return -ENOMEM;
2920 }
2921
bcabdef1
AC
2922 spin_lock_irqsave(&gpio_lock, flags);
2923
d2876d08 2924 /* NOTE: gpio_request() can be called in early boot,
35e8bb51 2925 * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
d2876d08
DB
2926 */
2927
2928 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
2929 desc_set_label(desc, label ? : "?");
d377f56f 2930 ret = 0;
438d8908 2931 } else {
18534df4 2932 kfree_const(label);
d377f56f 2933 ret = -EBUSY;
7460db56 2934 goto done;
35e8bb51
DB
2935 }
2936
2937 if (chip->request) {
2938 /* chip->request may sleep */
2939 spin_unlock_irqrestore(&gpio_lock, flags);
3789f5ac
BD
2940 offset = gpio_chip_hwgpio(desc);
2941 if (gpiochip_line_is_valid(chip, offset))
d377f56f 2942 ret = chip->request(chip, offset);
3789f5ac 2943 else
d377f56f 2944 ret = -EINVAL;
35e8bb51
DB
2945 spin_lock_irqsave(&gpio_lock, flags);
2946
d377f56f 2947 if (ret < 0) {
35e8bb51 2948 desc_set_label(desc, NULL);
18534df4 2949 kfree_const(label);
35e8bb51 2950 clear_bit(FLAG_REQUESTED, &desc->flags);
80b0a602 2951 goto done;
35e8bb51 2952 }
438d8908 2953 }
80b0a602
MN
2954 if (chip->get_direction) {
2955 /* chip->get_direction may sleep */
2956 spin_unlock_irqrestore(&gpio_lock, flags);
372e722e 2957 gpiod_get_direction(desc);
80b0a602
MN
2958 spin_lock_irqsave(&gpio_lock, flags);
2959 }
77c2d792
MW
2960done:
2961 spin_unlock_irqrestore(&gpio_lock, flags);
51c1064e
BG
2962 atomic_notifier_call_chain(&desc->gdev->notifier,
2963 GPIOLINE_CHANGED_REQUESTED, desc);
d377f56f 2964 return ret;
77c2d792
MW
2965}
2966
fdeb8e15
LW
2967/*
2968 * This descriptor validation needs to be inserted verbatim into each
2969 * function taking a descriptor, so we need to use a preprocessor
54d77198
LW
2970 * macro to avoid endless duplication. If the desc is NULL it is an
2971 * optional GPIO and calls should just bail out.
fdeb8e15 2972 */
a746a232
RV
2973static int validate_desc(const struct gpio_desc *desc, const char *func)
2974{
2975 if (!desc)
2976 return 0;
2977 if (IS_ERR(desc)) {
2978 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
2979 return PTR_ERR(desc);
2980 }
2981 if (!desc->gdev) {
2982 pr_warn("%s: invalid GPIO (no device)\n", func);
2983 return -EINVAL;
2984 }
2985 if (!desc->gdev->chip) {
2986 dev_warn(&desc->gdev->dev,
2987 "%s: backing chip is gone\n", func);
2988 return 0;
2989 }
2990 return 1;
2991}
2992
fdeb8e15 2993#define VALIDATE_DESC(desc) do { \
a746a232
RV
2994 int __valid = validate_desc(desc, __func__); \
2995 if (__valid <= 0) \
2996 return __valid; \
2997 } while (0)
fdeb8e15
LW
2998
2999#define VALIDATE_DESC_VOID(desc) do { \
a746a232
RV
3000 int __valid = validate_desc(desc, __func__); \
3001 if (__valid <= 0) \
fdeb8e15 3002 return; \
a746a232 3003 } while (0)
fdeb8e15 3004
0eb4c6c2 3005int gpiod_request(struct gpio_desc *desc, const char *label)
77c2d792 3006{
d377f56f 3007 int ret = -EPROBE_DEFER;
fdeb8e15 3008 struct gpio_device *gdev;
77c2d792 3009
fdeb8e15
LW
3010 VALIDATE_DESC(desc);
3011 gdev = desc->gdev;
77c2d792 3012
fdeb8e15 3013 if (try_module_get(gdev->owner)) {
d377f56f
LW
3014 ret = gpiod_request_commit(desc, label);
3015 if (ret < 0)
fdeb8e15 3016 module_put(gdev->owner);
33a68e86
LW
3017 else
3018 get_device(&gdev->dev);
77c2d792
MW
3019 }
3020
d377f56f
LW
3021 if (ret)
3022 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
77c2d792 3023
d377f56f 3024 return ret;
d2876d08 3025}
372e722e 3026
fac9d885 3027static bool gpiod_free_commit(struct gpio_desc *desc)
d2876d08 3028{
77c2d792 3029 bool ret = false;
d2876d08 3030 unsigned long flags;
35e8bb51 3031 struct gpio_chip *chip;
d2876d08 3032
3d599d1c
UKK
3033 might_sleep();
3034
372e722e 3035 gpiod_unexport(desc);
d8f388d8 3036
d2876d08
DB
3037 spin_lock_irqsave(&gpio_lock, flags);
3038
fdeb8e15 3039 chip = desc->gdev->chip;
35e8bb51
DB
3040 if (chip && test_bit(FLAG_REQUESTED, &desc->flags)) {
3041 if (chip->free) {
3042 spin_unlock_irqrestore(&gpio_lock, flags);
9c4ba946 3043 might_sleep_if(chip->can_sleep);
372e722e 3044 chip->free(chip, gpio_chip_hwgpio(desc));
35e8bb51
DB
3045 spin_lock_irqsave(&gpio_lock, flags);
3046 }
18534df4 3047 kfree_const(desc->label);
d2876d08 3048 desc_set_label(desc, NULL);
07697461 3049 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
35e8bb51 3050 clear_bit(FLAG_REQUESTED, &desc->flags);
aca5ce14 3051 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
25553ff0 3052 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
9225d516
DF
3053 clear_bit(FLAG_PULL_UP, &desc->flags);
3054 clear_bit(FLAG_PULL_DOWN, &desc->flags);
2148ad77 3055 clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
f625d460 3056 clear_bit(FLAG_IS_HOGGED, &desc->flags);
63636d95
GU
3057#ifdef CONFIG_OF_DYNAMIC
3058 desc->hog = NULL;
3059#endif
77c2d792
MW
3060 ret = true;
3061 }
d2876d08
DB
3062
3063 spin_unlock_irqrestore(&gpio_lock, flags);
51c1064e
BG
3064 atomic_notifier_call_chain(&desc->gdev->notifier,
3065 GPIOLINE_CHANGED_RELEASED, desc);
3066
77c2d792
MW
3067 return ret;
3068}
3069
0eb4c6c2 3070void gpiod_free(struct gpio_desc *desc)
77c2d792 3071{
fac9d885 3072 if (desc && desc->gdev && gpiod_free_commit(desc)) {
fdeb8e15 3073 module_put(desc->gdev->owner);
33a68e86
LW
3074 put_device(&desc->gdev->dev);
3075 } else {
77c2d792 3076 WARN_ON(extra_checks);
33a68e86 3077 }
d2876d08 3078}
372e722e 3079
d2876d08
DB
3080/**
3081 * gpiochip_is_requested - return string iff signal was requested
3082 * @chip: controller managing the signal
3083 * @offset: of signal within controller's 0..(ngpio - 1) range
3084 *
3085 * Returns NULL if the GPIO is not currently requested, else a string.
9c8318ff
AC
3086 * The string returned is the label passed to gpio_request(); if none has been
3087 * passed it is a meaningless, non-NULL constant.
d2876d08
DB
3088 *
3089 * This function is for use by GPIO controller drivers. The label can
3090 * help with diagnostics, and knowing that the signal is used as a GPIO
3091 * can help avoid accidentally multiplexing it to another controller.
3092 */
3093const char *gpiochip_is_requested(struct gpio_chip *chip, unsigned offset)
3094{
6c0b4e6c 3095 struct gpio_desc *desc;
d2876d08 3096
48b5953e 3097 if (offset >= chip->ngpio)
d2876d08 3098 return NULL;
6c0b4e6c 3099
1739a2d8
BG
3100 desc = gpiochip_get_desc(chip, offset);
3101 if (IS_ERR(desc))
3102 return NULL;
6c0b4e6c 3103
372e722e 3104 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
d2876d08 3105 return NULL;
372e722e 3106 return desc->label;
d2876d08
DB
3107}
3108EXPORT_SYMBOL_GPL(gpiochip_is_requested);
3109
77c2d792
MW
3110/**
3111 * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
950d55f5
TR
3112 * @chip: GPIO chip
3113 * @hwnum: hardware number of the GPIO for which to request the descriptor
77c2d792 3114 * @label: label for the GPIO
5923ea6c
LW
3115 * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
3116 * specify things like line inversion semantics with the machine flags
3117 * such as GPIO_OUT_LOW
3118 * @dflags: descriptor request flags for this GPIO or 0 if default, this
3119 * can be used to specify consumer semantics such as open drain
77c2d792
MW
3120 *
3121 * Function allows GPIO chip drivers to request and use their own GPIO
3122 * descriptors via gpiolib API. Difference to gpiod_request() is that this
3123 * function will not increase reference count of the GPIO chip module. This
3124 * allows the GPIO chip module to be unloaded as needed (we assume that the
3125 * GPIO chip driver handles freeing the GPIOs it has requested).
950d55f5
TR
3126 *
3127 * Returns:
3128 * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
3129 * code on failure.
77c2d792 3130 */
06863620
BG
3131struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip,
3132 unsigned int hwnum,
21abf103 3133 const char *label,
5923ea6c
LW
3134 enum gpio_lookup_flags lflags,
3135 enum gpiod_flags dflags)
77c2d792 3136{
abdc08a3 3137 struct gpio_desc *desc = gpiochip_get_desc(chip, hwnum);
d377f56f 3138 int ret;
77c2d792 3139
abdc08a3
AC
3140 if (IS_ERR(desc)) {
3141 chip_err(chip, "failed to get GPIO descriptor\n");
3142 return desc;
3143 }
3144
d377f56f
LW
3145 ret = gpiod_request_commit(desc, label);
3146 if (ret < 0)
3147 return ERR_PTR(ret);
77c2d792 3148
d377f56f
LW
3149 ret = gpiod_configure_flags(desc, label, lflags, dflags);
3150 if (ret) {
21abf103
LW
3151 chip_err(chip, "setup of own GPIO %s failed\n", label);
3152 gpiod_free_commit(desc);
d377f56f 3153 return ERR_PTR(ret);
21abf103
LW
3154 }
3155
abdc08a3 3156 return desc;
77c2d792 3157}
f7d4ad98 3158EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
77c2d792
MW
3159
3160/**
3161 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
3162 * @desc: GPIO descriptor to free
3163 *
3164 * Function frees the given GPIO requested previously with
3165 * gpiochip_request_own_desc().
3166 */
3167void gpiochip_free_own_desc(struct gpio_desc *desc)
3168{
3169 if (desc)
fac9d885 3170 gpiod_free_commit(desc);
77c2d792 3171}
f7d4ad98 3172EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
d2876d08 3173
fdeb8e15
LW
3174/*
3175 * Drivers MUST set GPIO direction before making get/set calls. In
d2876d08
DB
3176 * some cases this is done in early boot, before IRQs are enabled.
3177 *
3178 * As a rule these aren't called more than once (except for drivers
3179 * using the open-drain emulation idiom) so these are natural places
3180 * to accumulate extra debugging checks. Note that we can't (yet)
3181 * rely on gpio_request() having been called beforehand.
3182 */
3183
d18fddff 3184static int gpio_set_config(struct gpio_chip *gc, unsigned int offset,
71479789
TP
3185 enum pin_config_param mode)
3186{
d90f3685
BG
3187 if (!gc->set_config)
3188 return -ENOTSUPP;
542f3615 3189
d90f3685 3190 return gc->set_config(gc, offset, mode);
71479789
TP
3191}
3192
2148ad77
KG
3193static int gpio_set_bias(struct gpio_chip *chip, struct gpio_desc *desc)
3194{
3195 int bias = 0;
3196 int ret = 0;
3197
3198 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
3199 bias = PIN_CONFIG_BIAS_DISABLE;
3200 else if (test_bit(FLAG_PULL_UP, &desc->flags))
3201 bias = PIN_CONFIG_BIAS_PULL_UP;
3202 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
3203 bias = PIN_CONFIG_BIAS_PULL_DOWN;
3204
3205 if (bias) {
3206 ret = gpio_set_config(chip, gpio_chip_hwgpio(desc), bias);
3207 if (ret != -ENOTSUPP)
3208 return ret;
3209 }
3210 return 0;
3211}
3212
79a9becd
AC
3213/**
3214 * gpiod_direction_input - set the GPIO direction to input
3215 * @desc: GPIO to set to input
3216 *
3217 * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
3218 * be called safely on it.
3219 *
3220 * Return 0 in case of success, else an error code.
3221 */
3222int gpiod_direction_input(struct gpio_desc *desc)
d2876d08 3223{
d2876d08 3224 struct gpio_chip *chip;
d377f56f 3225 int ret = 0;
d2876d08 3226
fdeb8e15
LW
3227 VALIDATE_DESC(desc);
3228 chip = desc->gdev->chip;
bcabdef1 3229
e48d194d
LW
3230 /*
3231 * It is legal to have no .get() and .direction_input() specified if
3232 * the chip is output-only, but you can't specify .direction_input()
3233 * and not support the .get() operation, that doesn't make sense.
3234 */
ae9847f4 3235 if (!chip->get && chip->direction_input) {
6424de5a 3236 gpiod_warn(desc,
e48d194d
LW
3237 "%s: missing get() but have direction_input()\n",
3238 __func__);
be1a4b13
LW
3239 return -EIO;
3240 }
3241
e48d194d
LW
3242 /*
3243 * If we have a .direction_input() callback, things are simple,
3244 * just call it. Else we are some input-only chip so try to check the
3245 * direction (if .get_direction() is supported) else we silently
3246 * assume we are in input mode after this.
3247 */
ae9847f4 3248 if (chip->direction_input) {
d377f56f 3249 ret = chip->direction_input(chip, gpio_chip_hwgpio(desc));
ae9847f4
RRD
3250 } else if (chip->get_direction &&
3251 (chip->get_direction(chip, gpio_chip_hwgpio(desc)) != 1)) {
3252 gpiod_warn(desc,
e48d194d
LW
3253 "%s: missing direction_input() operation and line is output\n",
3254 __func__);
ae9847f4
RRD
3255 return -EIO;
3256 }
2148ad77 3257 if (ret == 0) {
d2876d08 3258 clear_bit(FLAG_IS_OUT, &desc->flags);
2148ad77
KG
3259 ret = gpio_set_bias(chip, desc);
3260 }
d449991c 3261
d377f56f 3262 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
d82da797 3263
d377f56f 3264 return ret;
d2876d08 3265}
79a9becd 3266EXPORT_SYMBOL_GPL(gpiod_direction_input);
372e722e 3267
fac9d885 3268static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
d2876d08 3269{
c663e5f5 3270 struct gpio_chip *gc = desc->gdev->chip;
ad17731d 3271 int val = !!value;
ae9847f4 3272 int ret = 0;
d2876d08 3273
e48d194d
LW
3274 /*
3275 * It's OK not to specify .direction_output() if the gpiochip is
3276 * output-only, but if there is then not even a .set() operation it
3277 * is pretty tricky to drive the output line.
3278 */
ae9847f4 3279 if (!gc->set && !gc->direction_output) {
6424de5a 3280 gpiod_warn(desc,
e48d194d
LW
3281 "%s: missing set() and direction_output() operations\n",
3282 __func__);
be1a4b13
LW
3283 return -EIO;
3284 }
3285
ae9847f4
RRD
3286 if (gc->direction_output) {
3287 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
3288 } else {
e48d194d 3289 /* Check that we are in output mode if we can */
ae9847f4
RRD
3290 if (gc->get_direction &&
3291 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
3292 gpiod_warn(desc,
3293 "%s: missing direction_output() operation\n",
3294 __func__);
3295 return -EIO;
3296 }
e48d194d
LW
3297 /*
3298 * If we can't actively set the direction, we are some
3299 * output-only chip, so just drive the output as desired.
3300 */
ae9847f4
RRD
3301 gc->set(gc, gpio_chip_hwgpio(desc), val);
3302 }
3303
c663e5f5 3304 if (!ret)
d2876d08 3305 set_bit(FLAG_IS_OUT, &desc->flags);
ad17731d 3306 trace_gpio_value(desc_to_gpio(desc), 0, val);
c663e5f5
LW
3307 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
3308 return ret;
d2876d08 3309}
ef70bbe1
PZ
3310
3311/**
3312 * gpiod_direction_output_raw - set the GPIO direction to output
3313 * @desc: GPIO to set to output
3314 * @value: initial output value of the GPIO
3315 *
3316 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
3317 * be called safely on it. The initial value of the output must be specified
3318 * as raw value on the physical line without regard for the ACTIVE_LOW status.
3319 *
3320 * Return 0 in case of success, else an error code.
3321 */
3322int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
3323{
fdeb8e15 3324 VALIDATE_DESC(desc);
fac9d885 3325 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1
PZ
3326}
3327EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
3328
3329/**
90df4fe0 3330 * gpiod_direction_output - set the GPIO direction to output
ef70bbe1
PZ
3331 * @desc: GPIO to set to output
3332 * @value: initial output value of the GPIO
3333 *
3334 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
3335 * be called safely on it. The initial value of the output must be specified
3336 * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
3337 * account.
3338 *
3339 * Return 0 in case of success, else an error code.
3340 */
3341int gpiod_direction_output(struct gpio_desc *desc, int value)
3342{
30322bcf 3343 struct gpio_chip *gc;
02e47980
LW
3344 int ret;
3345
fdeb8e15 3346 VALIDATE_DESC(desc);
ef70bbe1
PZ
3347 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3348 value = !value;
ad17731d
LW
3349 else
3350 value = !!value;
02e47980 3351
4e9439dd
HV
3352 /* GPIOs used for enabled IRQs shall not be set as output */
3353 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
3354 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
02e47980
LW
3355 gpiod_err(desc,
3356 "%s: tried to set a GPIO tied to an IRQ as output\n",
3357 __func__);
3358 return -EIO;
3359 }
3360
30322bcf 3361 gc = desc->gdev->chip;
02e47980
LW
3362 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
3363 /* First see if we can enable open drain in hardware */
71479789
TP
3364 ret = gpio_set_config(gc, gpio_chip_hwgpio(desc),
3365 PIN_CONFIG_DRIVE_OPEN_DRAIN);
02e47980
LW
3366 if (!ret)
3367 goto set_output_value;
3368 /* Emulate open drain by not actively driving the line high */
e735244e
BG
3369 if (value) {
3370 ret = gpiod_direction_input(desc);
3371 goto set_output_flag;
3372 }
02e47980
LW
3373 }
3374 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
71479789
TP
3375 ret = gpio_set_config(gc, gpio_chip_hwgpio(desc),
3376 PIN_CONFIG_DRIVE_OPEN_SOURCE);
02e47980
LW
3377 if (!ret)
3378 goto set_output_value;
3379 /* Emulate open source by not actively driving the line low */
e735244e
BG
3380 if (!value) {
3381 ret = gpiod_direction_input(desc);
3382 goto set_output_flag;
3383 }
02e47980 3384 } else {
71479789
TP
3385 gpio_set_config(gc, gpio_chip_hwgpio(desc),
3386 PIN_CONFIG_DRIVE_PUSH_PULL);
02e47980
LW
3387 }
3388
3389set_output_value:
2821ae5f
KG
3390 ret = gpio_set_bias(gc, desc);
3391 if (ret)
3392 return ret;
fac9d885 3393 return gpiod_direction_output_raw_commit(desc, value);
e735244e
BG
3394
3395set_output_flag:
3396 /*
3397 * When emulating open-source or open-drain functionalities by not
3398 * actively driving the line (setting mode to input) we still need to
3399 * set the IS_OUT flag or otherwise we won't be able to set the line
3400 * value anymore.
3401 */
3402 if (ret == 0)
3403 set_bit(FLAG_IS_OUT, &desc->flags);
3404 return ret;
ef70bbe1 3405}
79a9becd 3406EXPORT_SYMBOL_GPL(gpiod_direction_output);
d2876d08 3407
c4b5be98 3408/**
950d55f5
TR
3409 * gpiod_set_debounce - sets @debounce time for a GPIO
3410 * @desc: descriptor of the GPIO for which to set debounce time
3411 * @debounce: debounce time in microseconds
65d87656 3412 *
950d55f5
TR
3413 * Returns:
3414 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
3415 * debounce time.
c4b5be98 3416 */
79a9becd 3417int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce)
c4b5be98 3418{
c4b5be98 3419 struct gpio_chip *chip;
2956b5d9 3420 unsigned long config;
c4b5be98 3421
fdeb8e15
LW
3422 VALIDATE_DESC(desc);
3423 chip = desc->gdev->chip;
be1a4b13 3424
2956b5d9 3425 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
d18fddff 3426 return gpio_set_config(chip, gpio_chip_hwgpio(desc), config);
c4b5be98 3427}
79a9becd 3428EXPORT_SYMBOL_GPL(gpiod_set_debounce);
372e722e 3429
e10f72bf
AJ
3430/**
3431 * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
3432 * @desc: descriptor of the GPIO for which to configure persistence
3433 * @transitory: True to lose state on suspend or reset, false for persistence
3434 *
3435 * Returns:
3436 * 0 on success, otherwise a negative error code.
3437 */
3438int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
3439{
3440 struct gpio_chip *chip;
3441 unsigned long packed;
3442 int gpio;
3443 int rc;
3444
156dd392 3445 VALIDATE_DESC(desc);
e10f72bf
AJ
3446 /*
3447 * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
3448 * persistence state.
3449 */
4fc5bfeb 3450 assign_bit(FLAG_TRANSITORY, &desc->flags, transitory);
e10f72bf
AJ
3451
3452 /* If the driver supports it, set the persistence state now */
3453 chip = desc->gdev->chip;
3454 if (!chip->set_config)
3455 return 0;
3456
3457 packed = pinconf_to_config_packed(PIN_CONFIG_PERSIST_STATE,
3458 !transitory);
3459 gpio = gpio_chip_hwgpio(desc);
d18fddff 3460 rc = gpio_set_config(chip, gpio, packed);
e10f72bf
AJ
3461 if (rc == -ENOTSUPP) {
3462 dev_dbg(&desc->gdev->dev, "Persistence not supported for GPIO %d\n",
3463 gpio);
3464 return 0;
3465 }
3466
3467 return rc;
3468}
3469EXPORT_SYMBOL_GPL(gpiod_set_transitory);
3470
79a9becd
AC
3471/**
3472 * gpiod_is_active_low - test whether a GPIO is active-low or not
3473 * @desc: the gpio descriptor to test
3474 *
3475 * Returns 1 if the GPIO is active-low, 0 otherwise.
3476 */
3477int gpiod_is_active_low(const struct gpio_desc *desc)
372e722e 3478{
fdeb8e15 3479 VALIDATE_DESC(desc);
79a9becd 3480 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
372e722e 3481}
79a9becd 3482EXPORT_SYMBOL_GPL(gpiod_is_active_low);
d2876d08 3483
d3a5bcb4
MM
3484/**
3485 * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not
3486 * @desc: the gpio descriptor to change
3487 */
3488void gpiod_toggle_active_low(struct gpio_desc *desc)
3489{
3490 VALIDATE_DESC_VOID(desc);
3491 change_bit(FLAG_ACTIVE_LOW, &desc->flags);
3492}
3493EXPORT_SYMBOL_GPL(gpiod_toggle_active_low);
3494
d2876d08
DB
3495/* I/O calls are only valid after configuration completed; the relevant
3496 * "is this a valid GPIO" error checks should already have been done.
3497 *
3498 * "Get" operations are often inlinable as reading a pin value register,
3499 * and masking the relevant bit in that register.
3500 *
3501 * When "set" operations are inlinable, they involve writing that mask to
3502 * one register to set a low value, or a different register to set it high.
3503 * Otherwise locking is needed, so there may be little value to inlining.
3504 *
3505 *------------------------------------------------------------------------
3506 *
3507 * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
3508 * have requested the GPIO. That can include implicit requesting by
3509 * a direction setting call. Marking a gpio as requested locks its chip
3510 * in memory, guaranteeing that these table lookups need no more locking
3511 * and that gpiochip_remove() will fail.
3512 *
3513 * REVISIT when debugging, consider adding some instrumentation to ensure
3514 * that the GPIO was actually requested.
3515 */
3516
fac9d885 3517static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
d2876d08
DB
3518{
3519 struct gpio_chip *chip;
372e722e 3520 int offset;
e20538b8 3521 int value;
d2876d08 3522
fdeb8e15 3523 chip = desc->gdev->chip;
372e722e 3524 offset = gpio_chip_hwgpio(desc);
e20538b8 3525 value = chip->get ? chip->get(chip, offset) : -EIO;
723a6303 3526 value = value < 0 ? value : !!value;
372e722e 3527 trace_gpio_value(desc_to_gpio(desc), 1, value);
3f397c21 3528 return value;
d2876d08 3529}
372e722e 3530
eec1d566
LW
3531static int gpio_chip_get_multiple(struct gpio_chip *chip,
3532 unsigned long *mask, unsigned long *bits)
3533{
3534 if (chip->get_multiple) {
3535 return chip->get_multiple(chip, mask, bits);
3536 } else if (chip->get) {
3537 int i, value;
3538
3539 for_each_set_bit(i, mask, chip->ngpio) {
3540 value = chip->get(chip, i);
3541 if (value < 0)
3542 return value;
3543 __assign_bit(i, bits, value);
3544 }
3545 return 0;
3546 }
3547 return -EIO;
3548}
3549
3550int gpiod_get_array_value_complex(bool raw, bool can_sleep,
3551 unsigned int array_size,
3552 struct gpio_desc **desc_array,
77588c14 3553 struct gpio_array *array_info,
b9762beb 3554 unsigned long *value_bitmap)
eec1d566 3555{
d377f56f 3556 int ret, i = 0;
b17566a6
JK
3557
3558 /*
3559 * Validate array_info against desc_array and its size.
3560 * It should immediately follow desc_array if both
3561 * have been obtained from the same gpiod_get_array() call.
3562 */
3563 if (array_info && array_info->desc == desc_array &&
3564 array_size <= array_info->size &&
3565 (void *)array_info == desc_array + array_info->size) {
3566 if (!can_sleep)
3567 WARN_ON(array_info->chip->can_sleep);
3568
d377f56f 3569 ret = gpio_chip_get_multiple(array_info->chip,
b17566a6
JK
3570 array_info->get_mask,
3571 value_bitmap);
d377f56f
LW
3572 if (ret)
3573 return ret;
b17566a6
JK
3574
3575 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3576 bitmap_xor(value_bitmap, value_bitmap,
3577 array_info->invert_mask, array_size);
3578
3579 if (bitmap_full(array_info->get_mask, array_size))
3580 return 0;
3581
3582 i = find_first_zero_bit(array_info->get_mask, array_size);
3583 } else {
3584 array_info = NULL;
3585 }
eec1d566
LW
3586
3587 while (i < array_size) {
3588 struct gpio_chip *chip = desc_array[i]->gdev->chip;
3027743f
LA
3589 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
3590 unsigned long *mask, *bits;
eec1d566
LW
3591 int first, j, ret;
3592
3027743f
LA
3593 if (likely(chip->ngpio <= FASTPATH_NGPIO)) {
3594 mask = fastpath;
3595 } else {
3596 mask = kmalloc_array(2 * BITS_TO_LONGS(chip->ngpio),
3597 sizeof(*mask),
3598 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
3599 if (!mask)
3600 return -ENOMEM;
3601 }
3602
3603 bits = mask + BITS_TO_LONGS(chip->ngpio);
3604 bitmap_zero(mask, chip->ngpio);
3605
eec1d566
LW
3606 if (!can_sleep)
3607 WARN_ON(chip->can_sleep);
3608
3609 /* collect all inputs belonging to the same chip */
3610 first = i;
eec1d566
LW
3611 do {
3612 const struct gpio_desc *desc = desc_array[i];
3613 int hwgpio = gpio_chip_hwgpio(desc);
3614
3615 __set_bit(hwgpio, mask);
3616 i++;
b17566a6
JK
3617
3618 if (array_info)
35ae7f96
JK
3619 i = find_next_zero_bit(array_info->get_mask,
3620 array_size, i);
eec1d566
LW
3621 } while ((i < array_size) &&
3622 (desc_array[i]->gdev->chip == chip));
3623
3624 ret = gpio_chip_get_multiple(chip, mask, bits);
3027743f
LA
3625 if (ret) {
3626 if (mask != fastpath)
3627 kfree(mask);
eec1d566 3628 return ret;
3027743f 3629 }
eec1d566 3630
b17566a6 3631 for (j = first; j < i; ) {
eec1d566
LW
3632 const struct gpio_desc *desc = desc_array[j];
3633 int hwgpio = gpio_chip_hwgpio(desc);
3634 int value = test_bit(hwgpio, bits);
3635
3636 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3637 value = !value;
b9762beb 3638 __assign_bit(j, value_bitmap, value);
eec1d566 3639 trace_gpio_value(desc_to_gpio(desc), 1, value);
799d5eb4 3640 j++;
b17566a6
JK
3641
3642 if (array_info)
35ae7f96
JK
3643 j = find_next_zero_bit(array_info->get_mask, i,
3644 j);
eec1d566 3645 }
3027743f
LA
3646
3647 if (mask != fastpath)
3648 kfree(mask);
eec1d566
LW
3649 }
3650 return 0;
3651}
3652
d2876d08 3653/**
79a9becd
AC
3654 * gpiod_get_raw_value() - return a gpio's raw value
3655 * @desc: gpio whose value will be returned
d2876d08 3656 *
79a9becd 3657 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3658 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd 3659 *
827a9b8b 3660 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3661 * complain if the GPIO chip functions potentially sleep.
d2876d08 3662 */
79a9becd 3663int gpiod_get_raw_value(const struct gpio_desc *desc)
d2876d08 3664{
fdeb8e15 3665 VALIDATE_DESC(desc);
3285170f 3666 /* Should be using gpiod_get_raw_value_cansleep() */
fdeb8e15 3667 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3668 return gpiod_get_raw_value_commit(desc);
d2876d08 3669}
79a9becd 3670EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
372e722e 3671
79a9becd
AC
3672/**
3673 * gpiod_get_value() - return a gpio's value
3674 * @desc: gpio whose value will be returned
3675 *
3676 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3677 * account, or negative errno on failure.
79a9becd 3678 *
827a9b8b 3679 * This function can be called from contexts where we cannot sleep, and will
79a9becd
AC
3680 * complain if the GPIO chip functions potentially sleep.
3681 */
3682int gpiod_get_value(const struct gpio_desc *desc)
372e722e 3683{
79a9becd 3684 int value;
fdeb8e15
LW
3685
3686 VALIDATE_DESC(desc);
3285170f 3687 /* Should be using gpiod_get_value_cansleep() */
fdeb8e15 3688 WARN_ON(desc->gdev->chip->can_sleep);
79a9becd 3689
fac9d885 3690 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3691 if (value < 0)
3692 return value;
3693
79a9becd
AC
3694 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3695 value = !value;
3696
3697 return value;
372e722e 3698}
79a9becd 3699EXPORT_SYMBOL_GPL(gpiod_get_value);
d2876d08 3700
eec1d566
LW
3701/**
3702 * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
b9762beb 3703 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3704 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3705 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3706 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3707 *
3708 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3709 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3710 * else an error code.
3711 *
827a9b8b 3712 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
3713 * and it will complain if the GPIO chip functions potentially sleep.
3714 */
3715int gpiod_get_raw_array_value(unsigned int array_size,
b9762beb 3716 struct gpio_desc **desc_array,
77588c14 3717 struct gpio_array *array_info,
b9762beb 3718 unsigned long *value_bitmap)
eec1d566
LW
3719{
3720 if (!desc_array)
3721 return -EINVAL;
3722 return gpiod_get_array_value_complex(true, false, array_size,
77588c14
JK
3723 desc_array, array_info,
3724 value_bitmap);
eec1d566
LW
3725}
3726EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
3727
3728/**
3729 * gpiod_get_array_value() - read values from an array of GPIOs
b9762beb 3730 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3731 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3732 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3733 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3734 *
3735 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3736 * into account. Return 0 in case of success, else an error code.
3737 *
827a9b8b 3738 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
3739 * and it will complain if the GPIO chip functions potentially sleep.
3740 */
3741int gpiod_get_array_value(unsigned int array_size,
b9762beb 3742 struct gpio_desc **desc_array,
77588c14 3743 struct gpio_array *array_info,
b9762beb 3744 unsigned long *value_bitmap)
eec1d566
LW
3745{
3746 if (!desc_array)
3747 return -EINVAL;
3748 return gpiod_get_array_value_complex(false, false, array_size,
77588c14
JK
3749 desc_array, array_info,
3750 value_bitmap);
eec1d566
LW
3751}
3752EXPORT_SYMBOL_GPL(gpiod_get_array_value);
3753
aca5ce14 3754/*
fac9d885 3755 * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
79a9becd 3756 * @desc: gpio descriptor whose state need to be set.
20a8a968 3757 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
aca5ce14 3758 */
fac9d885 3759static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
aca5ce14 3760{
d377f56f 3761 int ret = 0;
fdeb8e15 3762 struct gpio_chip *chip = desc->gdev->chip;
372e722e
AC
3763 int offset = gpio_chip_hwgpio(desc);
3764
aca5ce14 3765 if (value) {
d377f56f 3766 ret = chip->direction_input(chip, offset);
aca5ce14 3767 } else {
d377f56f
LW
3768 ret = chip->direction_output(chip, offset, 0);
3769 if (!ret)
372e722e 3770 set_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 3771 }
d377f56f
LW
3772 trace_gpio_direction(desc_to_gpio(desc), value, ret);
3773 if (ret < 0)
6424de5a
MB
3774 gpiod_err(desc,
3775 "%s: Error in set_value for open drain err %d\n",
d377f56f 3776 __func__, ret);
aca5ce14
LD
3777}
3778
25553ff0 3779/*
79a9becd
AC
3780 * _gpio_set_open_source_value() - Set the open source gpio's value.
3781 * @desc: gpio descriptor whose state need to be set.
20a8a968 3782 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
25553ff0 3783 */
fac9d885 3784static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
25553ff0 3785{
d377f56f 3786 int ret = 0;
fdeb8e15 3787 struct gpio_chip *chip = desc->gdev->chip;
372e722e
AC
3788 int offset = gpio_chip_hwgpio(desc);
3789
25553ff0 3790 if (value) {
d377f56f
LW
3791 ret = chip->direction_output(chip, offset, 1);
3792 if (!ret)
372e722e 3793 set_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 3794 } else {
d377f56f 3795 ret = chip->direction_input(chip, offset);
25553ff0 3796 }
d377f56f
LW
3797 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
3798 if (ret < 0)
6424de5a
MB
3799 gpiod_err(desc,
3800 "%s: Error in set_value for open source err %d\n",
d377f56f 3801 __func__, ret);
25553ff0
LD
3802}
3803
fac9d885 3804static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
d2876d08
DB
3805{
3806 struct gpio_chip *chip;
3807
fdeb8e15 3808 chip = desc->gdev->chip;
372e722e 3809 trace_gpio_value(desc_to_gpio(desc), 0, value);
02e47980 3810 chip->set(chip, gpio_chip_hwgpio(desc), value);
372e722e
AC
3811}
3812
5f424243
RI
3813/*
3814 * set multiple outputs on the same chip;
3815 * use the chip's set_multiple function if available;
3816 * otherwise set the outputs sequentially;
3817 * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
3818 * defines which outputs are to be changed
3819 * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
3820 * defines the values the outputs specified by mask are to be set to
3821 */
3822static void gpio_chip_set_multiple(struct gpio_chip *chip,
3823 unsigned long *mask, unsigned long *bits)
3824{
3825 if (chip->set_multiple) {
3826 chip->set_multiple(chip, mask, bits);
3827 } else {
5e4e6fb3
AS
3828 unsigned int i;
3829
3830 /* set outputs if the corresponding mask bit is set */
3831 for_each_set_bit(i, mask, chip->ngpio)
3832 chip->set(chip, i, test_bit(i, bits));
5f424243
RI
3833 }
3834}
3835
3027743f 3836int gpiod_set_array_value_complex(bool raw, bool can_sleep,
3c940660
GU
3837 unsigned int array_size,
3838 struct gpio_desc **desc_array,
3839 struct gpio_array *array_info,
3840 unsigned long *value_bitmap)
5f424243
RI
3841{
3842 int i = 0;
3843
b17566a6
JK
3844 /*
3845 * Validate array_info against desc_array and its size.
3846 * It should immediately follow desc_array if both
3847 * have been obtained from the same gpiod_get_array() call.
3848 */
3849 if (array_info && array_info->desc == desc_array &&
3850 array_size <= array_info->size &&
3851 (void *)array_info == desc_array + array_info->size) {
3852 if (!can_sleep)
3853 WARN_ON(array_info->chip->can_sleep);
3854
3855 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3856 bitmap_xor(value_bitmap, value_bitmap,
3857 array_info->invert_mask, array_size);
3858
3859 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
3860 value_bitmap);
3861
3862 if (bitmap_full(array_info->set_mask, array_size))
3863 return 0;
3864
3865 i = find_first_zero_bit(array_info->set_mask, array_size);
3866 } else {
3867 array_info = NULL;
3868 }
3869
5f424243 3870 while (i < array_size) {
fdeb8e15 3871 struct gpio_chip *chip = desc_array[i]->gdev->chip;
3027743f
LA
3872 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
3873 unsigned long *mask, *bits;
5f424243
RI
3874 int count = 0;
3875
3027743f
LA
3876 if (likely(chip->ngpio <= FASTPATH_NGPIO)) {
3877 mask = fastpath;
3878 } else {
3879 mask = kmalloc_array(2 * BITS_TO_LONGS(chip->ngpio),
3880 sizeof(*mask),
3881 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
3882 if (!mask)
3883 return -ENOMEM;
3884 }
3885
3886 bits = mask + BITS_TO_LONGS(chip->ngpio);
3887 bitmap_zero(mask, chip->ngpio);
3888
38e003f4 3889 if (!can_sleep)
5f424243 3890 WARN_ON(chip->can_sleep);
38e003f4 3891
5f424243
RI
3892 do {
3893 struct gpio_desc *desc = desc_array[i];
3894 int hwgpio = gpio_chip_hwgpio(desc);
b9762beb 3895 int value = test_bit(i, value_bitmap);
5f424243 3896
b17566a6
JK
3897 /*
3898 * Pins applicable for fast input but not for
3899 * fast output processing may have been already
3900 * inverted inside the fast path, skip them.
3901 */
3902 if (!raw && !(array_info &&
3903 test_bit(i, array_info->invert_mask)) &&
3904 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
5f424243
RI
3905 value = !value;
3906 trace_gpio_value(desc_to_gpio(desc), 0, value);
3907 /*
3908 * collect all normal outputs belonging to the same chip
3909 * open drain and open source outputs are set individually
3910 */
02e47980 3911 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
fac9d885 3912 gpio_set_open_drain_value_commit(desc, value);
02e47980 3913 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
fac9d885 3914 gpio_set_open_source_value_commit(desc, value);
5f424243
RI
3915 } else {
3916 __set_bit(hwgpio, mask);
4fc5bfeb 3917 __assign_bit(hwgpio, bits, value);
5f424243
RI
3918 count++;
3919 }
3920 i++;
b17566a6
JK
3921
3922 if (array_info)
35ae7f96
JK
3923 i = find_next_zero_bit(array_info->set_mask,
3924 array_size, i);
fdeb8e15
LW
3925 } while ((i < array_size) &&
3926 (desc_array[i]->gdev->chip == chip));
5f424243 3927 /* push collected bits to outputs */
38e003f4 3928 if (count != 0)
5f424243 3929 gpio_chip_set_multiple(chip, mask, bits);
3027743f
LA
3930
3931 if (mask != fastpath)
3932 kfree(mask);
5f424243 3933 }
3027743f 3934 return 0;
5f424243
RI
3935}
3936
d2876d08 3937/**
79a9becd
AC
3938 * gpiod_set_raw_value() - assign a gpio's raw value
3939 * @desc: gpio whose value will be assigned
d2876d08 3940 * @value: value to assign
d2876d08 3941 *
79a9becd
AC
3942 * Set the raw value of the GPIO, i.e. the value of its physical line without
3943 * regard for its ACTIVE_LOW status.
3944 *
827a9b8b 3945 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3946 * complain if the GPIO chip functions potentially sleep.
d2876d08 3947 */
79a9becd 3948void gpiod_set_raw_value(struct gpio_desc *desc, int value)
372e722e 3949{
fdeb8e15 3950 VALIDATE_DESC_VOID(desc);
3285170f 3951 /* Should be using gpiod_set_raw_value_cansleep() */
fdeb8e15 3952 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3953 gpiod_set_raw_value_commit(desc, value);
d2876d08 3954}
79a9becd 3955EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
d2876d08 3956
1e77fc82
GU
3957/**
3958 * gpiod_set_value_nocheck() - set a GPIO line value without checking
3959 * @desc: the descriptor to set the value on
3960 * @value: value to set
3961 *
3962 * This sets the value of a GPIO line backing a descriptor, applying
3963 * different semantic quirks like active low and open drain/source
3964 * handling.
3965 */
3966static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
3967{
3968 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3969 value = !value;
3970 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
3971 gpio_set_open_drain_value_commit(desc, value);
3972 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
3973 gpio_set_open_source_value_commit(desc, value);
3974 else
3975 gpiod_set_raw_value_commit(desc, value);
3976}
3977
d2876d08 3978/**
79a9becd
AC
3979 * gpiod_set_value() - assign a gpio's value
3980 * @desc: gpio whose value will be assigned
3981 * @value: value to assign
3982 *
02e47980
LW
3983 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
3984 * OPEN_DRAIN and OPEN_SOURCE flags into account.
d2876d08 3985 *
827a9b8b 3986 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3987 * complain if the GPIO chip functions potentially sleep.
d2876d08 3988 */
79a9becd 3989void gpiod_set_value(struct gpio_desc *desc, int value)
d2876d08 3990{
fdeb8e15 3991 VALIDATE_DESC_VOID(desc);
3285170f 3992 /* Should be using gpiod_set_value_cansleep() */
fdeb8e15 3993 WARN_ON(desc->gdev->chip->can_sleep);
1e77fc82 3994 gpiod_set_value_nocheck(desc, value);
372e722e 3995}
79a9becd 3996EXPORT_SYMBOL_GPL(gpiod_set_value);
d2876d08 3997
5f424243 3998/**
3fff99bc 3999 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
b9762beb 4000 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4001 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4002 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4003 * @value_bitmap: bitmap of values to assign
5f424243
RI
4004 *
4005 * Set the raw values of the GPIOs, i.e. the values of the physical lines
4006 * without regard for their ACTIVE_LOW status.
4007 *
827a9b8b 4008 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
4009 * complain if the GPIO chip functions potentially sleep.
4010 */
3027743f 4011int gpiod_set_raw_array_value(unsigned int array_size,
3c940660
GU
4012 struct gpio_desc **desc_array,
4013 struct gpio_array *array_info,
4014 unsigned long *value_bitmap)
5f424243
RI
4015{
4016 if (!desc_array)
3027743f
LA
4017 return -EINVAL;
4018 return gpiod_set_array_value_complex(true, false, array_size,
77588c14 4019 desc_array, array_info, value_bitmap);
5f424243 4020}
3fff99bc 4021EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
5f424243
RI
4022
4023/**
3fff99bc 4024 * gpiod_set_array_value() - assign values to an array of GPIOs
b9762beb 4025 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4026 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4027 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4028 * @value_bitmap: bitmap of values to assign
5f424243
RI
4029 *
4030 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
4031 * into account.
4032 *
827a9b8b 4033 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
4034 * complain if the GPIO chip functions potentially sleep.
4035 */
cf9af0d5
GU
4036int gpiod_set_array_value(unsigned int array_size,
4037 struct gpio_desc **desc_array,
4038 struct gpio_array *array_info,
4039 unsigned long *value_bitmap)
5f424243
RI
4040{
4041 if (!desc_array)
cf9af0d5
GU
4042 return -EINVAL;
4043 return gpiod_set_array_value_complex(false, false, array_size,
4044 desc_array, array_info,
4045 value_bitmap);
5f424243 4046}
3fff99bc 4047EXPORT_SYMBOL_GPL(gpiod_set_array_value);
5f424243 4048
d2876d08 4049/**
79a9becd
AC
4050 * gpiod_cansleep() - report whether gpio value access may sleep
4051 * @desc: gpio to check
d2876d08 4052 *
d2876d08 4053 */
79a9becd 4054int gpiod_cansleep(const struct gpio_desc *desc)
372e722e 4055{
fdeb8e15
LW
4056 VALIDATE_DESC(desc);
4057 return desc->gdev->chip->can_sleep;
d2876d08 4058}
79a9becd 4059EXPORT_SYMBOL_GPL(gpiod_cansleep);
d2876d08 4060
90b39402
LW
4061/**
4062 * gpiod_set_consumer_name() - set the consumer name for the descriptor
4063 * @desc: gpio to set the consumer name on
4064 * @name: the new consumer name
4065 */
18534df4 4066int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
90b39402 4067{
18534df4
MS
4068 VALIDATE_DESC(desc);
4069 if (name) {
4070 name = kstrdup_const(name, GFP_KERNEL);
4071 if (!name)
4072 return -ENOMEM;
4073 }
4074
4075 kfree_const(desc->label);
4076 desc_set_label(desc, name);
4077
4078 return 0;
90b39402
LW
4079}
4080EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
4081
0f6d504e 4082/**
79a9becd
AC
4083 * gpiod_to_irq() - return the IRQ corresponding to a GPIO
4084 * @desc: gpio whose IRQ will be returned (already requested)
0f6d504e 4085 *
79a9becd
AC
4086 * Return the IRQ corresponding to the passed GPIO, or an error code in case of
4087 * error.
0f6d504e 4088 */
79a9becd 4089int gpiod_to_irq(const struct gpio_desc *desc)
0f6d504e 4090{
4c37ce86
LW
4091 struct gpio_chip *chip;
4092 int offset;
0f6d504e 4093
79bb71bd
LW
4094 /*
4095 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
4096 * requires this function to not return zero on an invalid descriptor
4097 * but rather a negative error number.
4098 */
bfbbe44d 4099 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
79bb71bd
LW
4100 return -EINVAL;
4101
fdeb8e15 4102 chip = desc->gdev->chip;
372e722e 4103 offset = gpio_chip_hwgpio(desc);
4c37ce86
LW
4104 if (chip->to_irq) {
4105 int retirq = chip->to_irq(chip, offset);
4106
4107 /* Zero means NO_IRQ */
4108 if (!retirq)
4109 return -ENXIO;
4110
4111 return retirq;
4112 }
4113 return -ENXIO;
0f6d504e 4114}
79a9becd 4115EXPORT_SYMBOL_GPL(gpiod_to_irq);
0f6d504e 4116
d468bf9e 4117/**
e3a2e878 4118 * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
d74be6df
AC
4119 * @chip: the chip the GPIO to lock belongs to
4120 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
4121 *
4122 * This is used directly by GPIO drivers that want to lock down
f438acdf 4123 * a certain GPIO line to be used for IRQs.
d468bf9e 4124 */
e3a2e878 4125int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset)
372e722e 4126{
9c10280d
LW
4127 struct gpio_desc *desc;
4128
4129 desc = gpiochip_get_desc(chip, offset);
4130 if (IS_ERR(desc))
4131 return PTR_ERR(desc);
4132
60f8339e
LW
4133 /*
4134 * If it's fast: flush the direction setting if something changed
4135 * behind our back
4136 */
4137 if (!chip->can_sleep && chip->get_direction) {
80956790 4138 int dir = gpiod_get_direction(desc);
9c10280d 4139
36b31279
AS
4140 if (dir < 0) {
4141 chip_err(chip, "%s: cannot get GPIO direction\n",
4142 __func__);
4143 return dir;
4144 }
9c10280d 4145 }
d468bf9e 4146
9c10280d 4147 if (test_bit(FLAG_IS_OUT, &desc->flags)) {
d74be6df 4148 chip_err(chip,
b1911710
AS
4149 "%s: tried to flag a GPIO set as output for IRQ\n",
4150 __func__);
d468bf9e
LW
4151 return -EIO;
4152 }
4153
9c10280d 4154 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 4155 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
4156
4157 /*
4158 * If the consumer has not set up a label (such as when the
4159 * IRQ is referenced from .to_irq()) we set up a label here
4160 * so it is clear this is used as an interrupt.
4161 */
4162 if (!desc->label)
4163 desc_set_label(desc, "interrupt");
4164
d468bf9e 4165 return 0;
372e722e 4166}
e3a2e878 4167EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
d2876d08 4168
d468bf9e 4169/**
e3a2e878 4170 * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
d74be6df
AC
4171 * @chip: the chip the GPIO to lock belongs to
4172 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
4173 *
4174 * This is used directly by GPIO drivers that want to indicate
4175 * that a certain GPIO is no longer used exclusively for IRQ.
d2876d08 4176 */
e3a2e878 4177void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset)
d468bf9e 4178{
3940c34a
LW
4179 struct gpio_desc *desc;
4180
4181 desc = gpiochip_get_desc(chip, offset);
4182 if (IS_ERR(desc))
d468bf9e 4183 return;
d2876d08 4184
3940c34a 4185 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 4186 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
4187
4188 /* If we only had this marking, erase it */
4189 if (desc->label && !strcmp(desc->label, "interrupt"))
4190 desc_set_label(desc, NULL);
d468bf9e 4191}
e3a2e878 4192EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
d468bf9e 4193
4e9439dd
HV
4194void gpiochip_disable_irq(struct gpio_chip *chip, unsigned int offset)
4195{
4196 struct gpio_desc *desc = gpiochip_get_desc(chip, offset);
4197
4198 if (!IS_ERR(desc) &&
4199 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
4200 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
4201}
4202EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
4203
4204void gpiochip_enable_irq(struct gpio_chip *chip, unsigned int offset)
4205{
4206 struct gpio_desc *desc = gpiochip_get_desc(chip, offset);
4207
4208 if (!IS_ERR(desc) &&
4209 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
4210 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags));
4211 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
4212 }
4213}
4214EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
4215
6cee3821
LW
4216bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset)
4217{
4218 if (offset >= chip->ngpio)
4219 return false;
4220
4221 return test_bit(FLAG_USED_AS_IRQ, &chip->gpiodev->descs[offset].flags);
4222}
4223EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
4224
4e6b8238
HV
4225int gpiochip_reqres_irq(struct gpio_chip *chip, unsigned int offset)
4226{
4227 int ret;
4228
4229 if (!try_module_get(chip->gpiodev->owner))
4230 return -ENODEV;
4231
4232 ret = gpiochip_lock_as_irq(chip, offset);
4233 if (ret) {
4234 chip_err(chip, "unable to lock HW IRQ %u for IRQ\n", offset);
4235 module_put(chip->gpiodev->owner);
4236 return ret;
4237 }
4238 return 0;
4239}
4240EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
4241
4242void gpiochip_relres_irq(struct gpio_chip *chip, unsigned int offset)
4243{
4244 gpiochip_unlock_as_irq(chip, offset);
4245 module_put(chip->gpiodev->owner);
4246}
4247EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
4248
143b65d6
LW
4249bool gpiochip_line_is_open_drain(struct gpio_chip *chip, unsigned int offset)
4250{
4251 if (offset >= chip->ngpio)
4252 return false;
4253
4254 return test_bit(FLAG_OPEN_DRAIN, &chip->gpiodev->descs[offset].flags);
4255}
4256EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
4257
4258bool gpiochip_line_is_open_source(struct gpio_chip *chip, unsigned int offset)
4259{
4260 if (offset >= chip->ngpio)
4261 return false;
4262
4263 return test_bit(FLAG_OPEN_SOURCE, &chip->gpiodev->descs[offset].flags);
4264}
4265EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
4266
05f479bf
CK
4267bool gpiochip_line_is_persistent(struct gpio_chip *chip, unsigned int offset)
4268{
4269 if (offset >= chip->ngpio)
4270 return false;
4271
e10f72bf 4272 return !test_bit(FLAG_TRANSITORY, &chip->gpiodev->descs[offset].flags);
05f479bf
CK
4273}
4274EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
4275
79a9becd
AC
4276/**
4277 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
4278 * @desc: gpio whose value will be returned
4279 *
4280 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 4281 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd
AC
4282 *
4283 * This function is to be called from contexts that can sleep.
d2876d08 4284 */
79a9becd 4285int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
d2876d08 4286{
d2876d08 4287 might_sleep_if(extra_checks);
fdeb8e15 4288 VALIDATE_DESC(desc);
fac9d885 4289 return gpiod_get_raw_value_commit(desc);
d2876d08 4290}
79a9becd 4291EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
372e722e 4292
79a9becd
AC
4293/**
4294 * gpiod_get_value_cansleep() - return a gpio's value
4295 * @desc: gpio whose value will be returned
4296 *
4297 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 4298 * account, or negative errno on failure.
79a9becd
AC
4299 *
4300 * This function is to be called from contexts that can sleep.
4301 */
4302int gpiod_get_value_cansleep(const struct gpio_desc *desc)
d2876d08 4303{
3f397c21 4304 int value;
d2876d08
DB
4305
4306 might_sleep_if(extra_checks);
fdeb8e15 4307 VALIDATE_DESC(desc);
fac9d885 4308 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
4309 if (value < 0)
4310 return value;
4311
79a9becd
AC
4312 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
4313 value = !value;
4314
3f397c21 4315 return value;
d2876d08 4316}
79a9becd 4317EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
372e722e 4318
eec1d566
LW
4319/**
4320 * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
b9762beb 4321 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 4322 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 4323 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4324 * @value_bitmap: bitmap to store the read values
eec1d566
LW
4325 *
4326 * Read the raw values of the GPIOs, i.e. the values of the physical lines
4327 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
4328 * else an error code.
4329 *
4330 * This function is to be called from contexts that can sleep.
4331 */
4332int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
4333 struct gpio_desc **desc_array,
77588c14 4334 struct gpio_array *array_info,
b9762beb 4335 unsigned long *value_bitmap)
eec1d566
LW
4336{
4337 might_sleep_if(extra_checks);
4338 if (!desc_array)
4339 return -EINVAL;
4340 return gpiod_get_array_value_complex(true, true, array_size,
77588c14
JK
4341 desc_array, array_info,
4342 value_bitmap);
eec1d566
LW
4343}
4344EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
4345
4346/**
4347 * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
b9762beb 4348 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 4349 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 4350 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4351 * @value_bitmap: bitmap to store the read values
eec1d566
LW
4352 *
4353 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
4354 * into account. Return 0 in case of success, else an error code.
4355 *
4356 * This function is to be called from contexts that can sleep.
4357 */
4358int gpiod_get_array_value_cansleep(unsigned int array_size,
4359 struct gpio_desc **desc_array,
77588c14 4360 struct gpio_array *array_info,
b9762beb 4361 unsigned long *value_bitmap)
eec1d566
LW
4362{
4363 might_sleep_if(extra_checks);
4364 if (!desc_array)
4365 return -EINVAL;
4366 return gpiod_get_array_value_complex(false, true, array_size,
77588c14
JK
4367 desc_array, array_info,
4368 value_bitmap);
eec1d566
LW
4369}
4370EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
4371
79a9becd
AC
4372/**
4373 * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
4374 * @desc: gpio whose value will be assigned
4375 * @value: value to assign
4376 *
4377 * Set the raw value of the GPIO, i.e. the value of its physical line without
4378 * regard for its ACTIVE_LOW status.
4379 *
4380 * This function is to be called from contexts that can sleep.
4381 */
4382void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
372e722e 4383{
d2876d08 4384 might_sleep_if(extra_checks);
fdeb8e15 4385 VALIDATE_DESC_VOID(desc);
fac9d885 4386 gpiod_set_raw_value_commit(desc, value);
372e722e 4387}
79a9becd 4388EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
d2876d08 4389
79a9becd
AC
4390/**
4391 * gpiod_set_value_cansleep() - assign a gpio's value
4392 * @desc: gpio whose value will be assigned
4393 * @value: value to assign
4394 *
4395 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
4396 * account
4397 *
4398 * This function is to be called from contexts that can sleep.
4399 */
4400void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
d2876d08 4401{
d2876d08 4402 might_sleep_if(extra_checks);
fdeb8e15 4403 VALIDATE_DESC_VOID(desc);
1e77fc82 4404 gpiod_set_value_nocheck(desc, value);
372e722e 4405}
79a9becd 4406EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
d2876d08 4407
5f424243 4408/**
3fff99bc 4409 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 4410 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4411 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4412 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4413 * @value_bitmap: bitmap of values to assign
5f424243
RI
4414 *
4415 * Set the raw values of the GPIOs, i.e. the values of the physical lines
4416 * without regard for their ACTIVE_LOW status.
4417 *
4418 * This function is to be called from contexts that can sleep.
4419 */
3027743f 4420int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3c940660
GU
4421 struct gpio_desc **desc_array,
4422 struct gpio_array *array_info,
4423 unsigned long *value_bitmap)
5f424243
RI
4424{
4425 might_sleep_if(extra_checks);
4426 if (!desc_array)
3027743f
LA
4427 return -EINVAL;
4428 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
77588c14 4429 array_info, value_bitmap);
5f424243 4430}
3fff99bc 4431EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
5f424243 4432
3946d187
DT
4433/**
4434 * gpiod_add_lookup_tables() - register GPIO device consumers
4435 * @tables: list of tables of consumers to register
4436 * @n: number of tables in the list
4437 */
4438void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
4439{
4440 unsigned int i;
4441
4442 mutex_lock(&gpio_lookup_lock);
4443
4444 for (i = 0; i < n; i++)
4445 list_add_tail(&tables[i]->list, &gpio_lookup_list);
4446
4447 mutex_unlock(&gpio_lookup_lock);
4448}
4449
5f424243 4450/**
3fff99bc 4451 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 4452 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4453 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4454 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4455 * @value_bitmap: bitmap of values to assign
5f424243
RI
4456 *
4457 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
4458 * into account.
4459 *
4460 * This function is to be called from contexts that can sleep.
4461 */
cf9af0d5
GU
4462int gpiod_set_array_value_cansleep(unsigned int array_size,
4463 struct gpio_desc **desc_array,
4464 struct gpio_array *array_info,
4465 unsigned long *value_bitmap)
5f424243
RI
4466{
4467 might_sleep_if(extra_checks);
4468 if (!desc_array)
cf9af0d5
GU
4469 return -EINVAL;
4470 return gpiod_set_array_value_complex(false, true, array_size,
4471 desc_array, array_info,
4472 value_bitmap);
5f424243 4473}
3fff99bc 4474EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
5f424243 4475
bae48da2 4476/**
ad824783
AC
4477 * gpiod_add_lookup_table() - register GPIO device consumers
4478 * @table: table of consumers to register
bae48da2 4479 */
ad824783 4480void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
bae48da2
AC
4481{
4482 mutex_lock(&gpio_lookup_lock);
4483
ad824783 4484 list_add_tail(&table->list, &gpio_lookup_list);
bae48da2
AC
4485
4486 mutex_unlock(&gpio_lookup_lock);
4487}
226b2242 4488EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
bae48da2 4489
be9015ab
SK
4490/**
4491 * gpiod_remove_lookup_table() - unregister GPIO device consumers
4492 * @table: table of consumers to unregister
4493 */
4494void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
4495{
4496 mutex_lock(&gpio_lookup_lock);
4497
4498 list_del(&table->list);
4499
4500 mutex_unlock(&gpio_lookup_lock);
4501}
226b2242 4502EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
be9015ab 4503
a411e81e
BG
4504/**
4505 * gpiod_add_hogs() - register a set of GPIO hogs from machine code
4506 * @hogs: table of gpio hog entries with a zeroed sentinel at the end
4507 */
4508void gpiod_add_hogs(struct gpiod_hog *hogs)
4509{
4510 struct gpio_chip *chip;
4511 struct gpiod_hog *hog;
4512
4513 mutex_lock(&gpio_machine_hogs_mutex);
4514
4515 for (hog = &hogs[0]; hog->chip_label; hog++) {
4516 list_add_tail(&hog->list, &gpio_machine_hogs);
4517
4518 /*
4519 * The chip may have been registered earlier, so check if it
4520 * exists and, if so, try to hog the line now.
4521 */
4522 chip = find_chip_by_name(hog->chip_label);
4523 if (chip)
4524 gpiochip_machine_hog(chip, hog);
4525 }
4526
4527 mutex_unlock(&gpio_machine_hogs_mutex);
4528}
4529EXPORT_SYMBOL_GPL(gpiod_add_hogs);
4530
ad824783 4531static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
bae48da2
AC
4532{
4533 const char *dev_id = dev ? dev_name(dev) : NULL;
ad824783 4534 struct gpiod_lookup_table *table;
bae48da2
AC
4535
4536 mutex_lock(&gpio_lookup_lock);
4537
ad824783
AC
4538 list_for_each_entry(table, &gpio_lookup_list, list) {
4539 if (table->dev_id && dev_id) {
4540 /*
4541 * Valid strings on both ends, must be identical to have
4542 * a match
4543 */
4544 if (!strcmp(table->dev_id, dev_id))
4545 goto found;
4546 } else {
4547 /*
4548 * One of the pointers is NULL, so both must be to have
4549 * a match
4550 */
4551 if (dev_id == table->dev_id)
4552 goto found;
4553 }
4554 }
4555 table = NULL;
bae48da2 4556
ad824783
AC
4557found:
4558 mutex_unlock(&gpio_lookup_lock);
4559 return table;
4560}
bae48da2 4561
ad824783 4562static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
fed7026a 4563 unsigned int idx, unsigned long *flags)
ad824783 4564{
2a3cf6a3 4565 struct gpio_desc *desc = ERR_PTR(-ENOENT);
ad824783
AC
4566 struct gpiod_lookup_table *table;
4567 struct gpiod_lookup *p;
bae48da2 4568
ad824783
AC
4569 table = gpiod_find_lookup_table(dev);
4570 if (!table)
4571 return desc;
bae48da2 4572
ad824783
AC
4573 for (p = &table->table[0]; p->chip_label; p++) {
4574 struct gpio_chip *chip;
bae48da2 4575
ad824783 4576 /* idx must always match exactly */
bae48da2
AC
4577 if (p->idx != idx)
4578 continue;
4579
ad824783
AC
4580 /* If the lookup entry has a con_id, require exact match */
4581 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
4582 continue;
bae48da2 4583
ad824783 4584 chip = find_chip_by_name(p->chip_label);
bae48da2 4585
ad824783 4586 if (!chip) {
8853daf3
JK
4587 /*
4588 * As the lookup table indicates a chip with
4589 * p->chip_label should exist, assume it may
4590 * still appear later and let the interested
4591 * consumer be probed again or let the Deferred
4592 * Probe infrastructure handle the error.
4593 */
4594 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
4595 p->chip_label);
4596 return ERR_PTR(-EPROBE_DEFER);
ad824783 4597 }
bae48da2 4598
ad824783 4599 if (chip->ngpio <= p->chip_hwnum) {
2a3cf6a3 4600 dev_err(dev,
d935bd50
GU
4601 "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n",
4602 idx, p->chip_hwnum, chip->ngpio - 1,
4603 chip->label);
2a3cf6a3 4604 return ERR_PTR(-EINVAL);
bae48da2 4605 }
bae48da2 4606
bb1e88cc 4607 desc = gpiochip_get_desc(chip, p->chip_hwnum);
ad824783 4608 *flags = p->flags;
bae48da2 4609
2a3cf6a3 4610 return desc;
bae48da2
AC
4611 }
4612
bae48da2
AC
4613 return desc;
4614}
4615
66858527
RI
4616static int platform_gpio_count(struct device *dev, const char *con_id)
4617{
4618 struct gpiod_lookup_table *table;
4619 struct gpiod_lookup *p;
4620 unsigned int count = 0;
4621
4622 table = gpiod_find_lookup_table(dev);
4623 if (!table)
4624 return -ENOENT;
4625
4626 for (p = &table->table[0]; p->chip_label; p++) {
4627 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
4628 (!con_id && !p->con_id))
4629 count++;
4630 }
4631 if (!count)
4632 return -ENOENT;
4633
4634 return count;
4635}
4636
13949fa9
DT
4637/**
4638 * fwnode_gpiod_get_index - obtain a GPIO from firmware node
4639 * @fwnode: handle of the firmware node
4640 * @con_id: function within the GPIO consumer
4641 * @index: index of the GPIO to obtain for the consumer
4642 * @flags: GPIO initialization flags
4643 * @label: label to attach to the requested GPIO
4644 *
4645 * This function can be used for drivers that get their configuration
4646 * from opaque firmware.
4647 *
4648 * The function properly finds the corresponding GPIO using whatever is the
4649 * underlying firmware interface and then makes sure that the GPIO
4650 * descriptor is requested before it is returned to the caller.
4651 *
4652 * Returns:
4653 * On successful request the GPIO pin is configured in accordance with
4654 * provided @flags.
4655 *
4656 * In case of error an ERR_PTR() is returned.
4657 */
4658struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
4659 const char *con_id, int index,
4660 enum gpiod_flags flags,
4661 const char *label)
4662{
4663 struct gpio_desc *desc;
4664 char prop_name[32]; /* 32 is max size of property name */
4665 unsigned int i;
4666
4667 for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) {
4668 if (con_id)
4669 snprintf(prop_name, sizeof(prop_name), "%s-%s",
4670 con_id, gpio_suffixes[i]);
4671 else
4672 snprintf(prop_name, sizeof(prop_name), "%s",
4673 gpio_suffixes[i]);
4674
4675 desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags,
4676 label);
4677 if (!IS_ERR(desc) || (PTR_ERR(desc) != -ENOENT))
4678 break;
4679 }
4680
4681 return desc;
4682}
4683EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
4684
66858527
RI
4685/**
4686 * gpiod_count - return the number of GPIOs associated with a device / function
4687 * or -ENOENT if no GPIO has been assigned to the requested function
4688 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4689 * @con_id: function within the GPIO consumer
4690 */
4691int gpiod_count(struct device *dev, const char *con_id)
4692{
4693 int count = -ENOENT;
4694
4695 if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node)
f626d6df 4696 count = of_gpio_get_count(dev, con_id);
66858527
RI
4697 else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev))
4698 count = acpi_gpio_count(dev, con_id);
4699
4700 if (count < 0)
4701 count = platform_gpio_count(dev, con_id);
4702
4703 return count;
4704}
4705EXPORT_SYMBOL_GPL(gpiod_count);
4706
bae48da2 4707/**
0879162f 4708 * gpiod_get - obtain a GPIO for a given GPIO function
ad824783 4709 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2 4710 * @con_id: function within the GPIO consumer
39b2bbe3 4711 * @flags: optional GPIO initialization flags
bae48da2
AC
4712 *
4713 * Return the GPIO descriptor corresponding to the function con_id of device
2a3cf6a3 4714 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
20a8a968 4715 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
bae48da2 4716 */
b17d1bf1 4717struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
39b2bbe3 4718 enum gpiod_flags flags)
bae48da2 4719{
39b2bbe3 4720 return gpiod_get_index(dev, con_id, 0, flags);
bae48da2 4721}
b17d1bf1 4722EXPORT_SYMBOL_GPL(gpiod_get);
bae48da2 4723
29a1f233
TR
4724/**
4725 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
4726 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4727 * @con_id: function within the GPIO consumer
39b2bbe3 4728 * @flags: optional GPIO initialization flags
29a1f233
TR
4729 *
4730 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
4731 * the requested function it will return NULL. This is convenient for drivers
4732 * that need to handle optional GPIOs.
4733 */
b17d1bf1 4734struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
39b2bbe3
AC
4735 const char *con_id,
4736 enum gpiod_flags flags)
29a1f233 4737{
39b2bbe3 4738 return gpiod_get_index_optional(dev, con_id, 0, flags);
29a1f233 4739}
b17d1bf1 4740EXPORT_SYMBOL_GPL(gpiod_get_optional);
29a1f233 4741
f625d460
BP
4742
4743/**
4744 * gpiod_configure_flags - helper function to configure a given GPIO
4745 * @desc: gpio whose value will be assigned
4746 * @con_id: function within the GPIO consumer
fed7026a
AS
4747 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4748 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4749 * @dflags: gpiod_flags - optional GPIO initialization flags
4750 *
4751 * Return 0 on success, -ENOENT if no GPIO has been assigned to the
4752 * requested function and/or index, or another IS_ERR() code if an error
4753 * occurred while trying to acquire the GPIO.
4754 */
c29fd9eb 4755int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
85b03b30 4756 unsigned long lflags, enum gpiod_flags dflags)
f625d460 4757{
d377f56f 4758 int ret;
f625d460 4759
85b03b30
JH
4760 if (lflags & GPIO_ACTIVE_LOW)
4761 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
f926dfc1 4762
85b03b30
JH
4763 if (lflags & GPIO_OPEN_DRAIN)
4764 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
f926dfc1
LW
4765 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
4766 /*
4767 * This enforces open drain mode from the consumer side.
4768 * This is necessary for some busses like I2C, but the lookup
4769 * should *REALLY* have specified them as open drain in the
4770 * first place, so print a little warning here.
4771 */
4772 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
4773 gpiod_warn(desc,
4774 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
4775 }
4776
85b03b30
JH
4777 if (lflags & GPIO_OPEN_SOURCE)
4778 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
e10f72bf 4779
d449991c
TP
4780 if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) {
4781 gpiod_err(desc,
4782 "both pull-up and pull-down enabled, invalid configuration\n");
4783 return -EINVAL;
4784 }
4785
4786 if (lflags & GPIO_PULL_UP)
4787 set_bit(FLAG_PULL_UP, &desc->flags);
4788 else if (lflags & GPIO_PULL_DOWN)
4789 set_bit(FLAG_PULL_DOWN, &desc->flags);
4790
d377f56f
LW
4791 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
4792 if (ret < 0)
4793 return ret;
85b03b30 4794
f625d460
BP
4795 /* No particular flag request, return here... */
4796 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
4797 pr_debug("no flags found for %s\n", con_id);
4798 return 0;
4799 }
4800
4801 /* Process flags */
4802 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
d377f56f 4803 ret = gpiod_direction_output(desc,
ad17731d 4804 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
f625d460 4805 else
d377f56f 4806 ret = gpiod_direction_input(desc);
f625d460 4807
d377f56f 4808 return ret;
f625d460
BP
4809}
4810
bae48da2
AC
4811/**
4812 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
fdd6a5fe 4813 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2
AC
4814 * @con_id: function within the GPIO consumer
4815 * @idx: index of the GPIO to obtain in the consumer
39b2bbe3 4816 * @flags: optional GPIO initialization flags
bae48da2
AC
4817 *
4818 * This variant of gpiod_get() allows to access GPIOs other than the first
4819 * defined one for functions that define several GPIOs.
4820 *
2a3cf6a3
AC
4821 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
4822 * requested function and/or index, or another IS_ERR() code if an error
20a8a968 4823 * occurred while trying to acquire the GPIO.
bae48da2 4824 */
b17d1bf1 4825struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
bae48da2 4826 const char *con_id,
39b2bbe3
AC
4827 unsigned int idx,
4828 enum gpiod_flags flags)
bae48da2 4829{
2d6c06f5 4830 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
35c5d7fd 4831 struct gpio_desc *desc = NULL;
d377f56f 4832 int ret;
7d18f0a1
LW
4833 /* Maybe we have a device name, maybe not */
4834 const char *devname = dev ? dev_name(dev) : "?";
bae48da2
AC
4835
4836 dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id);
4837
4d8440b9
RW
4838 if (dev) {
4839 /* Using device tree? */
4840 if (IS_ENABLED(CONFIG_OF) && dev->of_node) {
4841 dev_dbg(dev, "using device tree for GPIO lookup\n");
4842 desc = of_find_gpio(dev, con_id, idx, &lookupflags);
4843 } else if (ACPI_COMPANION(dev)) {
4844 dev_dbg(dev, "using ACPI for GPIO lookup\n");
a31f5c3a 4845 desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags);
4d8440b9 4846 }
35c5d7fd
AC
4847 }
4848
4849 /*
4850 * Either we are not using DT or ACPI, or their lookup did not return
4851 * a result. In that case, use platform lookup as a fallback.
4852 */
2a3cf6a3 4853 if (!desc || desc == ERR_PTR(-ENOENT)) {
43a8785a 4854 dev_dbg(dev, "using lookup tables for GPIO lookup\n");
39b2bbe3 4855 desc = gpiod_find(dev, con_id, idx, &lookupflags);
bae48da2
AC
4856 }
4857
4858 if (IS_ERR(desc)) {
9d5a1f2c 4859 dev_dbg(dev, "No GPIO consumer %s found\n", con_id);
bae48da2
AC
4860 return desc;
4861 }
4862
7d18f0a1
LW
4863 /*
4864 * If a connection label was passed use that, else attempt to use
4865 * the device name as label
4866 */
d377f56f
LW
4867 ret = gpiod_request(desc, con_id ? con_id : devname);
4868 if (ret < 0) {
4869 if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) {
b0ce7b29
LW
4870 /*
4871 * This happens when there are several consumers for
4872 * the same GPIO line: we just return here without
4873 * further initialization. It is a bit if a hack.
4874 * This is necessary to support fixed regulators.
4875 *
4876 * FIXME: Make this more sane and safe.
4877 */
4878 dev_info(dev, "nonexclusive access to GPIO for %s\n",
4879 con_id ? con_id : devname);
4880 return desc;
4881 } else {
d377f56f 4882 return ERR_PTR(ret);
b0ce7b29
LW
4883 }
4884 }
bae48da2 4885
d377f56f 4886 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
6392cca4 4887 if (ret < 0) {
39b2bbe3 4888 dev_dbg(dev, "setup of GPIO %s failed\n", con_id);
6392cca4
LW
4889 gpiod_put(desc);
4890 return ERR_PTR(ret);
4891 }
4892
4893 return desc;
4894}
b17d1bf1 4895EXPORT_SYMBOL_GPL(gpiod_get_index);
6392cca4 4896
40b73183
MW
4897/**
4898 * fwnode_get_named_gpiod - obtain a GPIO from firmware node
4899 * @fwnode: handle of the firmware node
4900 * @propname: name of the firmware property representing the GPIO
6392cca4 4901 * @index: index of the GPIO to obtain for the consumer
a264d10f 4902 * @dflags: GPIO initialization flags
950d55f5 4903 * @label: label to attach to the requested GPIO
40b73183
MW
4904 *
4905 * This function can be used for drivers that get their configuration
6392cca4 4906 * from opaque firmware.
40b73183 4907 *
6392cca4 4908 * The function properly finds the corresponding GPIO using whatever is the
40b73183
MW
4909 * underlying firmware interface and then makes sure that the GPIO
4910 * descriptor is requested before it is returned to the caller.
4911 *
950d55f5 4912 * Returns:
ff21378a 4913 * On successful request the GPIO pin is configured in accordance with
a264d10f
AS
4914 * provided @dflags.
4915 *
40b73183
MW
4916 * In case of error an ERR_PTR() is returned.
4917 */
4918struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
537b94da 4919 const char *propname, int index,
b2987d74
AS
4920 enum gpiod_flags dflags,
4921 const char *label)
40b73183 4922{
2d6c06f5 4923 unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT;
40b73183 4924 struct gpio_desc *desc = ERR_PTR(-ENODEV);
40b73183
MW
4925 int ret;
4926
4927 if (!fwnode)
4928 return ERR_PTR(-EINVAL);
4929
4930 if (is_of_node(fwnode)) {
6392cca4
LW
4931 desc = gpiod_get_from_of_node(to_of_node(fwnode),
4932 propname, index,
4933 dflags,
4934 label);
4935 return desc;
40b73183
MW
4936 } else if (is_acpi_node(fwnode)) {
4937 struct acpi_gpio_info info;
4938
537b94da 4939 desc = acpi_node_get_gpiod(fwnode, propname, index, &info);
6392cca4
LW
4940 if (IS_ERR(desc))
4941 return desc;
40b73183 4942
6392cca4 4943 acpi_gpio_update_gpiod_flags(&dflags, &info);
606be344 4944 acpi_gpio_update_gpiod_lookup_flags(&lflags, &info);
6392cca4 4945 }
40b73183 4946
6392cca4 4947 /* Currently only ACPI takes this path */
b2987d74 4948 ret = gpiod_request(desc, label);
85b03b30
JH
4949 if (ret)
4950 return ERR_PTR(ret);
4951
a264d10f
AS
4952 ret = gpiod_configure_flags(desc, propname, lflags, dflags);
4953 if (ret < 0) {
4954 gpiod_put(desc);
4955 return ERR_PTR(ret);
90b665f6
LP
4956 }
4957
40b73183
MW
4958 return desc;
4959}
4960EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod);
4961
29a1f233
TR
4962/**
4963 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
4964 * function
4965 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4966 * @con_id: function within the GPIO consumer
4967 * @index: index of the GPIO to obtain in the consumer
39b2bbe3 4968 * @flags: optional GPIO initialization flags
29a1f233
TR
4969 *
4970 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
4971 * specified index was assigned to the requested function it will return NULL.
4972 * This is convenient for drivers that need to handle optional GPIOs.
4973 */
b17d1bf1 4974struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
29a1f233 4975 const char *con_id,
39b2bbe3
AC
4976 unsigned int index,
4977 enum gpiod_flags flags)
29a1f233
TR
4978{
4979 struct gpio_desc *desc;
4980
39b2bbe3 4981 desc = gpiod_get_index(dev, con_id, index, flags);
29a1f233
TR
4982 if (IS_ERR(desc)) {
4983 if (PTR_ERR(desc) == -ENOENT)
4984 return NULL;
4985 }
4986
4987 return desc;
4988}
b17d1bf1 4989EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
29a1f233 4990
f625d460
BP
4991/**
4992 * gpiod_hog - Hog the specified GPIO desc given the provided flags
4993 * @desc: gpio whose value will be assigned
4994 * @name: gpio line name
fed7026a
AS
4995 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4996 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4997 * @dflags: gpiod_flags - optional GPIO initialization flags
4998 */
4999int gpiod_hog(struct gpio_desc *desc, const char *name,
5000 unsigned long lflags, enum gpiod_flags dflags)
5001{
5002 struct gpio_chip *chip;
5003 struct gpio_desc *local_desc;
5004 int hwnum;
d377f56f 5005 int ret;
f625d460
BP
5006
5007 chip = gpiod_to_chip(desc);
5008 hwnum = gpio_chip_hwgpio(desc);
5009
5923ea6c
LW
5010 local_desc = gpiochip_request_own_desc(chip, hwnum, name,
5011 lflags, dflags);
f625d460 5012 if (IS_ERR(local_desc)) {
d377f56f 5013 ret = PTR_ERR(local_desc);
c31a571d 5014 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
d377f56f
LW
5015 name, chip->label, hwnum, ret);
5016 return ret;
f625d460
BP
5017 }
5018
f625d460
BP
5019 /* Mark GPIO as hogged so it can be identified and removed later */
5020 set_bit(FLAG_IS_HOGGED, &desc->flags);
5021
5022 pr_info("GPIO line %d (%s) hogged as %s%s\n",
5023 desc_to_gpio(desc), name,
b27f300f
BG
5024 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
5025 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
5026 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
f625d460
BP
5027
5028 return 0;
5029}
5030
5031/**
5032 * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
5033 * @chip: gpio chip to act on
f625d460
BP
5034 */
5035static void gpiochip_free_hogs(struct gpio_chip *chip)
5036{
5037 int id;
5038
5039 for (id = 0; id < chip->ngpio; id++) {
1c3cdb18
LW
5040 if (test_bit(FLAG_IS_HOGGED, &chip->gpiodev->descs[id].flags))
5041 gpiochip_free_own_desc(&chip->gpiodev->descs[id]);
f625d460
BP
5042 }
5043}
5044
66858527
RI
5045/**
5046 * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
5047 * @dev: GPIO consumer, can be NULL for system-global GPIOs
5048 * @con_id: function within the GPIO consumer
5049 * @flags: optional GPIO initialization flags
5050 *
5051 * This function acquires all the GPIOs defined under a given function.
5052 *
5053 * Return a struct gpio_descs containing an array of descriptors, -ENOENT if
5054 * no GPIO has been assigned to the requested function, or another IS_ERR()
5055 * code if an error occurred while trying to acquire the GPIOs.
5056 */
5057struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
5058 const char *con_id,
5059 enum gpiod_flags flags)
5060{
5061 struct gpio_desc *desc;
5062 struct gpio_descs *descs;
bf9346f5
JK
5063 struct gpio_array *array_info = NULL;
5064 struct gpio_chip *chip;
5065 int count, bitmap_size;
66858527
RI
5066
5067 count = gpiod_count(dev, con_id);
5068 if (count < 0)
5069 return ERR_PTR(count);
5070
acafe7e3 5071 descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL);
66858527
RI
5072 if (!descs)
5073 return ERR_PTR(-ENOMEM);
5074
5075 for (descs->ndescs = 0; descs->ndescs < count; ) {
5076 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
5077 if (IS_ERR(desc)) {
5078 gpiod_put_array(descs);
5079 return ERR_CAST(desc);
5080 }
bf9346f5 5081
66858527 5082 descs->desc[descs->ndescs] = desc;
bf9346f5
JK
5083
5084 chip = gpiod_to_chip(desc);
5085 /*
c4c958aa
JK
5086 * If pin hardware number of array member 0 is also 0, select
5087 * its chip as a candidate for fast bitmap processing path.
bf9346f5 5088 */
c4c958aa 5089 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
bf9346f5
JK
5090 struct gpio_descs *array;
5091
5092 bitmap_size = BITS_TO_LONGS(chip->ngpio > count ?
5093 chip->ngpio : count);
5094
5095 array = kzalloc(struct_size(descs, desc, count) +
5096 struct_size(array_info, invert_mask,
5097 3 * bitmap_size), GFP_KERNEL);
5098 if (!array) {
5099 gpiod_put_array(descs);
5100 return ERR_PTR(-ENOMEM);
5101 }
5102
5103 memcpy(array, descs,
5104 struct_size(descs, desc, descs->ndescs + 1));
5105 kfree(descs);
5106
5107 descs = array;
5108 array_info = (void *)(descs->desc + count);
5109 array_info->get_mask = array_info->invert_mask +
5110 bitmap_size;
5111 array_info->set_mask = array_info->get_mask +
5112 bitmap_size;
5113
5114 array_info->desc = descs->desc;
5115 array_info->size = count;
5116 array_info->chip = chip;
5117 bitmap_set(array_info->get_mask, descs->ndescs,
5118 count - descs->ndescs);
5119 bitmap_set(array_info->set_mask, descs->ndescs,
5120 count - descs->ndescs);
5121 descs->info = array_info;
5122 }
c4c958aa
JK
5123 /* Unmark array members which don't belong to the 'fast' chip */
5124 if (array_info && array_info->chip != chip) {
bf9346f5
JK
5125 __clear_bit(descs->ndescs, array_info->get_mask);
5126 __clear_bit(descs->ndescs, array_info->set_mask);
c4c958aa
JK
5127 }
5128 /*
5129 * Detect array members which belong to the 'fast' chip
5130 * but their pins are not in hardware order.
5131 */
5132 else if (array_info &&
5133 gpio_chip_hwgpio(desc) != descs->ndescs) {
5134 /*
5135 * Don't use fast path if all array members processed so
5136 * far belong to the same chip as this one but its pin
5137 * hardware number is different from its array index.
5138 */
5139 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
5140 array_info = NULL;
5141 } else {
5142 __clear_bit(descs->ndescs,
5143 array_info->get_mask);
5144 __clear_bit(descs->ndescs,
5145 array_info->set_mask);
5146 }
bf9346f5
JK
5147 } else if (array_info) {
5148 /* Exclude open drain or open source from fast output */
5149 if (gpiochip_line_is_open_drain(chip, descs->ndescs) ||
5150 gpiochip_line_is_open_source(chip, descs->ndescs))
5151 __clear_bit(descs->ndescs,
5152 array_info->set_mask);
5153 /* Identify 'fast' pins which require invertion */
5154 if (gpiod_is_active_low(desc))
5155 __set_bit(descs->ndescs,
5156 array_info->invert_mask);
5157 }
5158
66858527
RI
5159 descs->ndescs++;
5160 }
bf9346f5
JK
5161 if (array_info)
5162 dev_dbg(dev,
5163 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
5164 array_info->chip->label, array_info->size,
5165 *array_info->get_mask, *array_info->set_mask,
5166 *array_info->invert_mask);
66858527
RI
5167 return descs;
5168}
5169EXPORT_SYMBOL_GPL(gpiod_get_array);
5170
5171/**
5172 * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
5173 * function
5174 * @dev: GPIO consumer, can be NULL for system-global GPIOs
5175 * @con_id: function within the GPIO consumer
5176 * @flags: optional GPIO initialization flags
5177 *
5178 * This is equivalent to gpiod_get_array(), except that when no GPIO was
5179 * assigned to the requested function it will return NULL.
5180 */
5181struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
5182 const char *con_id,
5183 enum gpiod_flags flags)
5184{
5185 struct gpio_descs *descs;
5186
5187 descs = gpiod_get_array(dev, con_id, flags);
45586c70 5188 if (PTR_ERR(descs) == -ENOENT)
66858527
RI
5189 return NULL;
5190
5191 return descs;
5192}
5193EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
5194
bae48da2
AC
5195/**
5196 * gpiod_put - dispose of a GPIO descriptor
5197 * @desc: GPIO descriptor to dispose of
5198 *
5199 * No descriptor can be used after gpiod_put() has been called on it.
5200 */
5201void gpiod_put(struct gpio_desc *desc)
5202{
1d7765ba
AS
5203 if (desc)
5204 gpiod_free(desc);
372e722e 5205}
bae48da2 5206EXPORT_SYMBOL_GPL(gpiod_put);
d2876d08 5207
66858527
RI
5208/**
5209 * gpiod_put_array - dispose of multiple GPIO descriptors
5210 * @descs: struct gpio_descs containing an array of descriptors
5211 */
5212void gpiod_put_array(struct gpio_descs *descs)
5213{
5214 unsigned int i;
5215
5216 for (i = 0; i < descs->ndescs; i++)
5217 gpiod_put(descs->desc[i]);
5218
5219 kfree(descs);
5220}
5221EXPORT_SYMBOL_GPL(gpiod_put_array);
5222
3c702e99
LW
5223static int __init gpiolib_dev_init(void)
5224{
5225 int ret;
5226
5227 /* Register GPIO sysfs bus */
b1911710 5228 ret = bus_register(&gpio_bus_type);
3c702e99
LW
5229 if (ret < 0) {
5230 pr_err("gpiolib: could not register GPIO bus type\n");
5231 return ret;
5232 }
5233
ddd8891e 5234 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME);
3c702e99
LW
5235 if (ret < 0) {
5236 pr_err("gpiolib: failed to allocate char dev region\n");
5237 bus_unregister(&gpio_bus_type);
63636d95 5238 return ret;
3c702e99 5239 }
63636d95
GU
5240
5241 gpiolib_initialized = true;
5242 gpiochip_setup_devs();
5243
5244 if (IS_ENABLED(CONFIG_OF_DYNAMIC))
5245 WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier));
5246
3c702e99
LW
5247 return ret;
5248}
5249core_initcall(gpiolib_dev_init);
5250
d2876d08
DB
5251#ifdef CONFIG_DEBUG_FS
5252
fdeb8e15 5253static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
d2876d08
DB
5254{
5255 unsigned i;
fdeb8e15
LW
5256 struct gpio_chip *chip = gdev->chip;
5257 unsigned gpio = gdev->base;
5258 struct gpio_desc *gdesc = &gdev->descs[0];
90fd2270
LW
5259 bool is_out;
5260 bool is_irq;
5261 bool active_low;
d2876d08 5262
fdeb8e15 5263 for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) {
ced433e2
MP
5264 if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) {
5265 if (gdesc->name) {
5266 seq_printf(s, " gpio-%-3d (%-20.20s)\n",
5267 gpio, gdesc->name);
5268 }
d2876d08 5269 continue;
ced433e2 5270 }
d2876d08 5271
372e722e 5272 gpiod_get_direction(gdesc);
d2876d08 5273 is_out = test_bit(FLAG_IS_OUT, &gdesc->flags);
d468bf9e 5274 is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags);
90fd2270
LW
5275 active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags);
5276 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s",
ced433e2 5277 gpio, gdesc->name ? gdesc->name : "", gdesc->label,
d2876d08 5278 is_out ? "out" : "in ",
1c22a252 5279 chip->get ? (chip->get(chip, i) ? "hi" : "lo") : "? ",
90fd2270
LW
5280 is_irq ? "IRQ " : "",
5281 active_low ? "ACTIVE LOW" : "");
d2876d08
DB
5282 seq_printf(s, "\n");
5283 }
5284}
5285
f9c4a31f 5286static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
d2876d08 5287{
362432ae 5288 unsigned long flags;
ff2b1359 5289 struct gpio_device *gdev = NULL;
cb1650d4 5290 loff_t index = *pos;
d2876d08 5291
f9c4a31f 5292 s->private = "";
d2876d08 5293
362432ae 5294 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 5295 list_for_each_entry(gdev, &gpio_devices, list)
362432ae
GL
5296 if (index-- == 0) {
5297 spin_unlock_irqrestore(&gpio_lock, flags);
ff2b1359 5298 return gdev;
f9c4a31f 5299 }
362432ae 5300 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f 5301
cb1650d4 5302 return NULL;
f9c4a31f
TR
5303}
5304
5305static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
5306{
362432ae 5307 unsigned long flags;
ff2b1359 5308 struct gpio_device *gdev = v;
f9c4a31f
TR
5309 void *ret = NULL;
5310
362432ae 5311 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 5312 if (list_is_last(&gdev->list, &gpio_devices))
cb1650d4
AC
5313 ret = NULL;
5314 else
ff2b1359 5315 ret = list_entry(gdev->list.next, struct gpio_device, list);
362432ae 5316 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f
TR
5317
5318 s->private = "\n";
5319 ++*pos;
5320
5321 return ret;
5322}
5323
5324static void gpiolib_seq_stop(struct seq_file *s, void *v)
5325{
5326}
5327
5328static int gpiolib_seq_show(struct seq_file *s, void *v)
5329{
ff2b1359
LW
5330 struct gpio_device *gdev = v;
5331 struct gpio_chip *chip = gdev->chip;
5332 struct device *parent;
5333
5334 if (!chip) {
5335 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
5336 dev_name(&gdev->dev));
5337 return 0;
5338 }
f9c4a31f 5339
ff2b1359
LW
5340 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
5341 dev_name(&gdev->dev),
fdeb8e15 5342 gdev->base, gdev->base + gdev->ngpio - 1);
ff2b1359
LW
5343 parent = chip->parent;
5344 if (parent)
5345 seq_printf(s, ", parent: %s/%s",
5346 parent->bus ? parent->bus->name : "no-bus",
5347 dev_name(parent));
f9c4a31f
TR
5348 if (chip->label)
5349 seq_printf(s, ", %s", chip->label);
5350 if (chip->can_sleep)
5351 seq_printf(s, ", can sleep");
5352 seq_printf(s, ":\n");
5353
5354 if (chip->dbg_show)
5355 chip->dbg_show(s, chip);
5356 else
fdeb8e15 5357 gpiolib_dbg_show(s, gdev);
f9c4a31f 5358
d2876d08
DB
5359 return 0;
5360}
5361
f9c4a31f
TR
5362static const struct seq_operations gpiolib_seq_ops = {
5363 .start = gpiolib_seq_start,
5364 .next = gpiolib_seq_next,
5365 .stop = gpiolib_seq_stop,
5366 .show = gpiolib_seq_show,
5367};
5368
d2876d08
DB
5369static int gpiolib_open(struct inode *inode, struct file *file)
5370{
f9c4a31f 5371 return seq_open(file, &gpiolib_seq_ops);
d2876d08
DB
5372}
5373
828c0950 5374static const struct file_operations gpiolib_operations = {
f9c4a31f 5375 .owner = THIS_MODULE,
d2876d08
DB
5376 .open = gpiolib_open,
5377 .read = seq_read,
5378 .llseek = seq_lseek,
f9c4a31f 5379 .release = seq_release,
d2876d08
DB
5380};
5381
5382static int __init gpiolib_debugfs_init(void)
5383{
5384 /* /sys/kernel/debug/gpio */
acc68b0e
GKH
5385 debugfs_create_file("gpio", S_IFREG | S_IRUGO, NULL, NULL,
5386 &gpiolib_operations);
d2876d08
DB
5387 return 0;
5388}
5389subsys_initcall(gpiolib_debugfs_init);
5390
5391#endif /* DEBUG_FS */