Commit | Line | Data |
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dae5f0af | 1 | // SPDX-License-Identifier: GPL-2.0 |
c47d9e1b | 2 | |
923a654c | 3 | #include <linux/bitmap.h> |
d2876d08 DB |
4 | #include <linux/kernel.h> |
5 | #include <linux/module.h> | |
ff77c352 | 6 | #include <linux/interrupt.h> |
d2876d08 DB |
7 | #include <linux/irq.h> |
8 | #include <linux/spinlock.h> | |
1a989d0f | 9 | #include <linux/list.h> |
d8f388d8 DB |
10 | #include <linux/device.h> |
11 | #include <linux/err.h> | |
12 | #include <linux/debugfs.h> | |
13 | #include <linux/seq_file.h> | |
14 | #include <linux/gpio.h> | |
ff77c352 | 15 | #include <linux/idr.h> |
5a0e3ad6 | 16 | #include <linux/slab.h> |
7b199811 | 17 | #include <linux/acpi.h> |
53e7cac3 | 18 | #include <linux/gpio/driver.h> |
0a6d3158 | 19 | #include <linux/gpio/machine.h> |
c771c2f4 | 20 | #include <linux/pinctrl/consumer.h> |
3c702e99 | 21 | #include <linux/fs.h> |
8b92e17e | 22 | #include <linux/compat.h> |
953b956a | 23 | #include <linux/file.h> |
3c702e99 | 24 | #include <uapi/linux/gpio.h> |
d2876d08 | 25 | |
664e3e5a | 26 | #include "gpiolib.h" |
f626d6df | 27 | #include "gpiolib-of.h" |
77cb907a | 28 | #include "gpiolib-acpi.h" |
925ca369 | 29 | #include "gpiolib-cdev.h" |
ef087d8e | 30 | #include "gpiolib-sysfs.h" |
664e3e5a | 31 | |
3f397c21 UKK |
32 | #define CREATE_TRACE_POINTS |
33 | #include <trace/events/gpio.h> | |
d2876d08 | 34 | |
79a9becd | 35 | /* Implementation infrastructure for GPIO interfaces. |
d2876d08 | 36 | * |
79a9becd AC |
37 | * The GPIO programming interface allows for inlining speed-critical |
38 | * get/set operations for common cases, so that access to SOC-integrated | |
39 | * GPIOs can sometimes cost only an instruction or two per bit. | |
d2876d08 DB |
40 | */ |
41 | ||
42 | ||
43 | /* When debugging, extend minimal trust to callers and platform code. | |
44 | * Also emit diagnostic messages that may help initial bringup, when | |
45 | * board setup or driver bugs are most common. | |
46 | * | |
47 | * Otherwise, minimize overhead in what may be bitbanging codepaths. | |
48 | */ | |
49 | #ifdef DEBUG | |
50 | #define extra_checks 1 | |
51 | #else | |
52 | #define extra_checks 0 | |
53 | #endif | |
54 | ||
ff2b1359 LW |
55 | /* Device and char device-related information */ |
56 | static DEFINE_IDA(gpio_ida); | |
3c702e99 LW |
57 | static dev_t gpio_devt; |
58 | #define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */ | |
ced2af41 | 59 | static int gpio_bus_match(struct device *dev, struct device_driver *drv); |
3c702e99 LW |
60 | static struct bus_type gpio_bus_type = { |
61 | .name = "gpio", | |
ced2af41 | 62 | .match = gpio_bus_match, |
3c702e99 | 63 | }; |
ff2b1359 | 64 | |
3027743f LA |
65 | /* |
66 | * Number of GPIOs to use for the fast path in set array | |
67 | */ | |
68 | #define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT | |
69 | ||
d2876d08 DB |
70 | /* gpio_lock prevents conflicts during gpio_desc[] table updates. |
71 | * While any GPIO is requested, its gpio_chip is not removable; | |
72 | * each GPIO's "requested" flag serves as a lock and refcount. | |
73 | */ | |
0eb4c6c2 | 74 | DEFINE_SPINLOCK(gpio_lock); |
d2876d08 | 75 | |
bae48da2 AC |
76 | static DEFINE_MUTEX(gpio_lookup_lock); |
77 | static LIST_HEAD(gpio_lookup_list); | |
ff2b1359 | 78 | LIST_HEAD(gpio_devices); |
6d86750c | 79 | |
a411e81e BG |
80 | static DEFINE_MUTEX(gpio_machine_hogs_mutex); |
81 | static LIST_HEAD(gpio_machine_hogs); | |
82 | ||
a0b66a73 LW |
83 | static void gpiochip_free_hogs(struct gpio_chip *gc); |
84 | static int gpiochip_add_irqchip(struct gpio_chip *gc, | |
39c3fd58 AL |
85 | struct lock_class_key *lock_key, |
86 | struct lock_class_key *request_key); | |
a0b66a73 LW |
87 | static void gpiochip_irqchip_remove(struct gpio_chip *gc); |
88 | static int gpiochip_irqchip_init_hw(struct gpio_chip *gc); | |
89 | static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc); | |
90 | static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc); | |
6d86750c | 91 | |
159f3cd9 | 92 | static bool gpiolib_initialized; |
6d86750c | 93 | |
d2876d08 DB |
94 | static inline void desc_set_label(struct gpio_desc *d, const char *label) |
95 | { | |
d2876d08 | 96 | d->label = label; |
d2876d08 DB |
97 | } |
98 | ||
372e722e | 99 | /** |
950d55f5 TR |
100 | * gpio_to_desc - Convert a GPIO number to its descriptor |
101 | * @gpio: global GPIO number | |
102 | * | |
103 | * Returns: | |
104 | * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO | |
105 | * with the given number exists in the system. | |
372e722e | 106 | */ |
79a9becd | 107 | struct gpio_desc *gpio_to_desc(unsigned gpio) |
372e722e | 108 | { |
ff2b1359 | 109 | struct gpio_device *gdev; |
14e85c0e AC |
110 | unsigned long flags; |
111 | ||
112 | spin_lock_irqsave(&gpio_lock, flags); | |
113 | ||
ff2b1359 | 114 | list_for_each_entry(gdev, &gpio_devices, list) { |
fdeb8e15 LW |
115 | if (gdev->base <= gpio && |
116 | gdev->base + gdev->ngpio > gpio) { | |
14e85c0e | 117 | spin_unlock_irqrestore(&gpio_lock, flags); |
fdeb8e15 | 118 | return &gdev->descs[gpio - gdev->base]; |
14e85c0e AC |
119 | } |
120 | } | |
121 | ||
122 | spin_unlock_irqrestore(&gpio_lock, flags); | |
123 | ||
0e9a5edf | 124 | if (!gpio_is_valid(gpio)) |
c47d9e1b | 125 | pr_warn("invalid GPIO %d\n", gpio); |
0e9a5edf | 126 | |
14e85c0e | 127 | return NULL; |
372e722e | 128 | } |
79a9becd | 129 | EXPORT_SYMBOL_GPL(gpio_to_desc); |
372e722e | 130 | |
d468bf9e | 131 | /** |
950d55f5 TR |
132 | * gpiochip_get_desc - get the GPIO descriptor corresponding to the given |
133 | * hardware number for this chip | |
a0b66a73 | 134 | * @gc: GPIO chip |
950d55f5 TR |
135 | * @hwnum: hardware number of the GPIO for this chip |
136 | * | |
137 | * Returns: | |
35c6cfb4 | 138 | * A pointer to the GPIO descriptor or ``ERR_PTR(-EINVAL)`` if no GPIO exists |
950d55f5 | 139 | * in the given chip for the specified hardware number. |
d468bf9e | 140 | */ |
a0b66a73 | 141 | struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc, |
06863620 | 142 | unsigned int hwnum) |
d468bf9e | 143 | { |
a0b66a73 | 144 | struct gpio_device *gdev = gc->gpiodev; |
fdeb8e15 LW |
145 | |
146 | if (hwnum >= gdev->ngpio) | |
b7d0a28a | 147 | return ERR_PTR(-EINVAL); |
d468bf9e | 148 | |
fdeb8e15 | 149 | return &gdev->descs[hwnum]; |
d468bf9e | 150 | } |
97795420 | 151 | EXPORT_SYMBOL_GPL(gpiochip_get_desc); |
372e722e AC |
152 | |
153 | /** | |
950d55f5 TR |
154 | * desc_to_gpio - convert a GPIO descriptor to the integer namespace |
155 | * @desc: GPIO descriptor | |
156 | * | |
372e722e | 157 | * This should disappear in the future but is needed since we still |
950d55f5 TR |
158 | * use GPIO numbers for error messages and sysfs nodes. |
159 | * | |
160 | * Returns: | |
161 | * The global GPIO number for the GPIO specified by its descriptor. | |
372e722e | 162 | */ |
79a9becd | 163 | int desc_to_gpio(const struct gpio_desc *desc) |
372e722e | 164 | { |
fdeb8e15 | 165 | return desc->gdev->base + (desc - &desc->gdev->descs[0]); |
372e722e | 166 | } |
79a9becd | 167 | EXPORT_SYMBOL_GPL(desc_to_gpio); |
372e722e AC |
168 | |
169 | ||
79a9becd AC |
170 | /** |
171 | * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs | |
172 | * @desc: descriptor to return the chip of | |
173 | */ | |
174 | struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc) | |
372e722e | 175 | { |
dd3b9a44 | 176 | if (!desc || !desc->gdev) |
fdeb8e15 LW |
177 | return NULL; |
178 | return desc->gdev->chip; | |
372e722e | 179 | } |
79a9becd | 180 | EXPORT_SYMBOL_GPL(gpiod_to_chip); |
d2876d08 | 181 | |
8d0aab2f AV |
182 | /* dynamic allocation of GPIOs, e.g. on a hotplugged device */ |
183 | static int gpiochip_find_base(int ngpio) | |
184 | { | |
ff2b1359 | 185 | struct gpio_device *gdev; |
83cabe33 | 186 | int base = ARCH_NR_GPIOS - ngpio; |
8d0aab2f | 187 | |
ff2b1359 | 188 | list_for_each_entry_reverse(gdev, &gpio_devices, list) { |
83cabe33 | 189 | /* found a free space? */ |
fdeb8e15 | 190 | if (gdev->base + gdev->ngpio <= base) |
83cabe33 AC |
191 | break; |
192 | else | |
193 | /* nope, check the space right before the chip */ | |
fdeb8e15 | 194 | base = gdev->base - ngpio; |
8d0aab2f AV |
195 | } |
196 | ||
83cabe33 | 197 | if (gpio_is_valid(base)) { |
8d0aab2f | 198 | pr_debug("%s: found new base at %d\n", __func__, base); |
83cabe33 AC |
199 | return base; |
200 | } else { | |
201 | pr_err("%s: cannot find free range\n", __func__); | |
202 | return -ENOSPC; | |
169b6a7a | 203 | } |
169b6a7a AV |
204 | } |
205 | ||
79a9becd AC |
206 | /** |
207 | * gpiod_get_direction - return the current direction of a GPIO | |
208 | * @desc: GPIO to get the direction of | |
209 | * | |
94fc7309 | 210 | * Returns 0 for output, 1 for input, or an error code in case of error. |
79a9becd AC |
211 | * |
212 | * This function may sleep if gpiod_cansleep() is true. | |
213 | */ | |
8e53b0f1 | 214 | int gpiod_get_direction(struct gpio_desc *desc) |
80b0a602 | 215 | { |
a0b66a73 | 216 | struct gpio_chip *gc; |
13daf489 | 217 | unsigned int offset; |
d377f56f | 218 | int ret; |
80b0a602 | 219 | |
a0b66a73 | 220 | gc = gpiod_to_chip(desc); |
372e722e | 221 | offset = gpio_chip_hwgpio(desc); |
80b0a602 | 222 | |
256efaea RK |
223 | /* |
224 | * Open drain emulation using input mode may incorrectly report | |
225 | * input here, fix that up. | |
226 | */ | |
227 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && | |
228 | test_bit(FLAG_IS_OUT, &desc->flags)) | |
229 | return 0; | |
230 | ||
a0b66a73 | 231 | if (!gc->get_direction) |
d0121b85 | 232 | return -ENOTSUPP; |
80b0a602 | 233 | |
a0b66a73 | 234 | ret = gc->get_direction(gc, offset); |
4fc5bfeb AS |
235 | if (ret < 0) |
236 | return ret; | |
237 | ||
238 | /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */ | |
239 | if (ret > 0) | |
d377f56f | 240 | ret = 1; |
4fc5bfeb AS |
241 | |
242 | assign_bit(FLAG_IS_OUT, &desc->flags, !ret); | |
243 | ||
d377f56f | 244 | return ret; |
80b0a602 | 245 | } |
79a9becd | 246 | EXPORT_SYMBOL_GPL(gpiod_get_direction); |
80b0a602 | 247 | |
1a989d0f AC |
248 | /* |
249 | * Add a new chip to the global chips list, keeping the list of chips sorted | |
ef7c7553 | 250 | * by range(means [base, base + ngpio - 1]) order. |
1a989d0f AC |
251 | * |
252 | * Return -EBUSY if the new chip overlaps with some other chip's integer | |
253 | * space. | |
254 | */ | |
ff2b1359 | 255 | static int gpiodev_add_to_list(struct gpio_device *gdev) |
1a989d0f | 256 | { |
a961f9b4 | 257 | struct gpio_device *prev, *next; |
1a989d0f | 258 | |
ff2b1359 | 259 | if (list_empty(&gpio_devices)) { |
a961f9b4 | 260 | /* initial entry in list */ |
ff2b1359 | 261 | list_add_tail(&gdev->list, &gpio_devices); |
e28ecca6 | 262 | return 0; |
1a989d0f AC |
263 | } |
264 | ||
a961f9b4 BJZ |
265 | next = list_entry(gpio_devices.next, struct gpio_device, list); |
266 | if (gdev->base + gdev->ngpio <= next->base) { | |
267 | /* add before first entry */ | |
268 | list_add(&gdev->list, &gpio_devices); | |
269 | return 0; | |
1a989d0f AC |
270 | } |
271 | ||
a961f9b4 BJZ |
272 | prev = list_entry(gpio_devices.prev, struct gpio_device, list); |
273 | if (prev->base + prev->ngpio <= gdev->base) { | |
274 | /* add behind last entry */ | |
275 | list_add_tail(&gdev->list, &gpio_devices); | |
96098df1 | 276 | return 0; |
1a989d0f AC |
277 | } |
278 | ||
a961f9b4 BJZ |
279 | list_for_each_entry_safe(prev, next, &gpio_devices, list) { |
280 | /* at the end of the list */ | |
281 | if (&next->list == &gpio_devices) | |
282 | break; | |
1a989d0f | 283 | |
a961f9b4 BJZ |
284 | /* add between prev and next */ |
285 | if (prev->base + prev->ngpio <= gdev->base | |
286 | && gdev->base + gdev->ngpio <= next->base) { | |
287 | list_add(&gdev->list, &prev->list); | |
288 | return 0; | |
289 | } | |
290 | } | |
291 | ||
292 | dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n"); | |
293 | return -EBUSY; | |
1a989d0f AC |
294 | } |
295 | ||
950d55f5 | 296 | /* |
f881bab0 | 297 | * Convert a GPIO name to its descriptor |
582838ea GU |
298 | * Note that there is no guarantee that GPIO names are globally unique! |
299 | * Hence this function will return, if it exists, a reference to the first GPIO | |
300 | * line found that matches the given name. | |
f881bab0 LW |
301 | */ |
302 | static struct gpio_desc *gpio_name_to_desc(const char * const name) | |
303 | { | |
ff2b1359 | 304 | struct gpio_device *gdev; |
f881bab0 LW |
305 | unsigned long flags; |
306 | ||
ee203bbd MM |
307 | if (!name) |
308 | return NULL; | |
309 | ||
f881bab0 LW |
310 | spin_lock_irqsave(&gpio_lock, flags); |
311 | ||
ff2b1359 | 312 | list_for_each_entry(gdev, &gpio_devices, list) { |
f881bab0 LW |
313 | int i; |
314 | ||
fdeb8e15 LW |
315 | for (i = 0; i != gdev->ngpio; ++i) { |
316 | struct gpio_desc *desc = &gdev->descs[i]; | |
f881bab0 | 317 | |
ee203bbd | 318 | if (!desc->name) |
f881bab0 LW |
319 | continue; |
320 | ||
fdeb8e15 | 321 | if (!strcmp(desc->name, name)) { |
f881bab0 | 322 | spin_unlock_irqrestore(&gpio_lock, flags); |
fdeb8e15 | 323 | return desc; |
f881bab0 LW |
324 | } |
325 | } | |
326 | } | |
327 | ||
328 | spin_unlock_irqrestore(&gpio_lock, flags); | |
329 | ||
330 | return NULL; | |
331 | } | |
332 | ||
5f3ca732 | 333 | /* |
582838ea GU |
334 | * Take the names from gc->names and assign them to their GPIO descriptors. |
335 | * Warn if a name is already used for a GPIO line on a different GPIO chip. | |
5f3ca732 | 336 | * |
582838ea GU |
337 | * Note that: |
338 | * 1. Non-unique names are still accepted, | |
339 | * 2. Name collisions within the same GPIO chip are not reported. | |
5f3ca732 MP |
340 | */ |
341 | static int gpiochip_set_desc_names(struct gpio_chip *gc) | |
342 | { | |
fdeb8e15 | 343 | struct gpio_device *gdev = gc->gpiodev; |
5f3ca732 MP |
344 | int i; |
345 | ||
5f3ca732 MP |
346 | /* First check all names if they are unique */ |
347 | for (i = 0; i != gc->ngpio; ++i) { | |
348 | struct gpio_desc *gpio; | |
349 | ||
350 | gpio = gpio_name_to_desc(gc->names[i]); | |
f881bab0 | 351 | if (gpio) |
fdeb8e15 | 352 | dev_warn(&gdev->dev, |
34ffd85d | 353 | "Detected name collision for GPIO name '%s'\n", |
f881bab0 | 354 | gc->names[i]); |
5f3ca732 MP |
355 | } |
356 | ||
357 | /* Then add all names to the GPIO descriptors */ | |
358 | for (i = 0; i != gc->ngpio; ++i) | |
fdeb8e15 | 359 | gdev->descs[i].name = gc->names[i]; |
5f3ca732 MP |
360 | |
361 | return 0; | |
362 | } | |
363 | ||
32fc5aa2 BG |
364 | /* |
365 | * devprop_gpiochip_set_names - Set GPIO line names using device properties | |
366 | * @chip: GPIO chip whose lines should be named, if possible | |
367 | * | |
368 | * Looks for device property "gpio-line-names" and if it exists assigns | |
369 | * GPIO line names for the chip. The memory allocated for the assigned | |
b41ba2ec | 370 | * names belong to the underlying firmware node and should not be released |
32fc5aa2 BG |
371 | * by the caller. |
372 | */ | |
373 | static int devprop_gpiochip_set_names(struct gpio_chip *chip) | |
374 | { | |
375 | struct gpio_device *gdev = chip->gpiodev; | |
b41ba2ec | 376 | struct fwnode_handle *fwnode = dev_fwnode(&gdev->dev); |
32fc5aa2 BG |
377 | const char **names; |
378 | int ret, i; | |
379 | int count; | |
380 | ||
b41ba2ec | 381 | count = fwnode_property_string_array_count(fwnode, "gpio-line-names"); |
32fc5aa2 BG |
382 | if (count < 0) |
383 | return 0; | |
384 | ||
385 | if (count > gdev->ngpio) { | |
386 | dev_warn(&gdev->dev, "gpio-line-names is length %d but should be at most length %d", | |
387 | count, gdev->ngpio); | |
388 | count = gdev->ngpio; | |
389 | } | |
390 | ||
391 | names = kcalloc(count, sizeof(*names), GFP_KERNEL); | |
392 | if (!names) | |
393 | return -ENOMEM; | |
394 | ||
b41ba2ec | 395 | ret = fwnode_property_read_string_array(fwnode, "gpio-line-names", |
32fc5aa2 BG |
396 | names, count); |
397 | if (ret < 0) { | |
398 | dev_warn(&gdev->dev, "failed to read GPIO line names\n"); | |
399 | kfree(names); | |
400 | return ret; | |
401 | } | |
402 | ||
403 | for (i = 0; i < count; i++) | |
404 | gdev->descs[i].name = names[i]; | |
405 | ||
406 | kfree(names); | |
407 | ||
408 | return 0; | |
409 | } | |
410 | ||
a0b66a73 | 411 | static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc) |
e4371f6e SB |
412 | { |
413 | unsigned long *p; | |
414 | ||
a0b66a73 | 415 | p = bitmap_alloc(gc->ngpio, GFP_KERNEL); |
e4371f6e SB |
416 | if (!p) |
417 | return NULL; | |
418 | ||
419 | /* Assume by default all GPIOs are valid */ | |
a0b66a73 | 420 | bitmap_fill(p, gc->ngpio); |
e4371f6e SB |
421 | |
422 | return p; | |
423 | } | |
424 | ||
f626d6df | 425 | static int gpiochip_alloc_valid_mask(struct gpio_chip *gc) |
726cb3ba | 426 | { |
eb1e8bd6 | 427 | if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask)) |
726cb3ba SB |
428 | return 0; |
429 | ||
f626d6df LW |
430 | gc->valid_mask = gpiochip_allocate_mask(gc); |
431 | if (!gc->valid_mask) | |
726cb3ba SB |
432 | return -ENOMEM; |
433 | ||
434 | return 0; | |
435 | } | |
436 | ||
c9fc5aff | 437 | static int gpiochip_init_valid_mask(struct gpio_chip *gc) |
f8ec92a9 | 438 | { |
c9fc5aff LW |
439 | if (gc->init_valid_mask) |
440 | return gc->init_valid_mask(gc, | |
441 | gc->valid_mask, | |
442 | gc->ngpio); | |
f8ec92a9 RRD |
443 | |
444 | return 0; | |
445 | } | |
446 | ||
a0b66a73 | 447 | static void gpiochip_free_valid_mask(struct gpio_chip *gc) |
726cb3ba | 448 | { |
a0b66a73 LW |
449 | bitmap_free(gc->valid_mask); |
450 | gc->valid_mask = NULL; | |
726cb3ba SB |
451 | } |
452 | ||
b056ca1c AS |
453 | static int gpiochip_add_pin_ranges(struct gpio_chip *gc) |
454 | { | |
455 | if (gc->add_pin_ranges) | |
456 | return gc->add_pin_ranges(gc); | |
457 | ||
458 | return 0; | |
459 | } | |
460 | ||
a0b66a73 | 461 | bool gpiochip_line_is_valid(const struct gpio_chip *gc, |
726cb3ba SB |
462 | unsigned int offset) |
463 | { | |
464 | /* No mask means all valid */ | |
a0b66a73 | 465 | if (likely(!gc->valid_mask)) |
726cb3ba | 466 | return true; |
a0b66a73 | 467 | return test_bit(offset, gc->valid_mask); |
726cb3ba SB |
468 | } |
469 | EXPORT_SYMBOL_GPL(gpiochip_line_is_valid); | |
470 | ||
ff2b1359 LW |
471 | static void gpiodevice_release(struct device *dev) |
472 | { | |
a6112998 | 473 | struct gpio_device *gdev = container_of(dev, struct gpio_device, dev); |
cf25ef6b | 474 | unsigned long flags; |
ff2b1359 | 475 | |
cf25ef6b | 476 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 477 | list_del(&gdev->list); |
cf25ef6b JH |
478 | spin_unlock_irqrestore(&gpio_lock, flags); |
479 | ||
8d4a85b6 | 480 | ida_free(&gpio_ida, gdev->id); |
fcf273e5 | 481 | kfree_const(gdev->label); |
476e2fc5 | 482 | kfree(gdev->descs); |
9efd9e69 | 483 | kfree(gdev); |
ff2b1359 LW |
484 | } |
485 | ||
1f5eb8b1 KG |
486 | #ifdef CONFIG_GPIO_CDEV |
487 | #define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt)) | |
488 | #define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev)) | |
489 | #else | |
490 | /* | |
491 | * gpiolib_cdev_register() indirectly calls device_add(), which is still | |
492 | * required even when cdev is not selected. | |
493 | */ | |
494 | #define gcdev_register(gdev, devt) device_add(&(gdev)->dev) | |
495 | #define gcdev_unregister(gdev) device_del(&(gdev)->dev) | |
496 | #endif | |
497 | ||
159f3cd9 GR |
498 | static int gpiochip_setup_dev(struct gpio_device *gdev) |
499 | { | |
d377f56f | 500 | int ret; |
159f3cd9 | 501 | |
1f5eb8b1 | 502 | ret = gcdev_register(gdev, gpio_devt); |
d377f56f LW |
503 | if (ret) |
504 | return ret; | |
111379dc | 505 | |
d377f56f LW |
506 | ret = gpiochip_sysfs_register(gdev); |
507 | if (ret) | |
159f3cd9 GR |
508 | goto err_remove_device; |
509 | ||
510 | /* From this point, the .release() function cleans up gpio_device */ | |
511 | gdev->dev.release = gpiodevice_release; | |
262b9011 GU |
512 | dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base, |
513 | gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic"); | |
159f3cd9 GR |
514 | |
515 | return 0; | |
516 | ||
517 | err_remove_device: | |
1f5eb8b1 | 518 | gcdev_unregister(gdev); |
d377f56f | 519 | return ret; |
159f3cd9 GR |
520 | } |
521 | ||
a0b66a73 | 522 | static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog) |
a411e81e BG |
523 | { |
524 | struct gpio_desc *desc; | |
525 | int rv; | |
526 | ||
a0b66a73 | 527 | desc = gpiochip_get_desc(gc, hog->chip_hwnum); |
a411e81e | 528 | if (IS_ERR(desc)) { |
262b9011 GU |
529 | chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__, |
530 | PTR_ERR(desc)); | |
a411e81e BG |
531 | return; |
532 | } | |
533 | ||
ba3efdff | 534 | if (test_bit(FLAG_IS_HOGGED, &desc->flags)) |
a411e81e BG |
535 | return; |
536 | ||
537 | rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags); | |
538 | if (rv) | |
262b9011 GU |
539 | gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n", |
540 | __func__, gc->label, hog->chip_hwnum, rv); | |
a411e81e BG |
541 | } |
542 | ||
a0b66a73 | 543 | static void machine_gpiochip_add(struct gpio_chip *gc) |
a411e81e BG |
544 | { |
545 | struct gpiod_hog *hog; | |
546 | ||
547 | mutex_lock(&gpio_machine_hogs_mutex); | |
548 | ||
549 | list_for_each_entry(hog, &gpio_machine_hogs, list) { | |
a0b66a73 LW |
550 | if (!strcmp(gc->label, hog->chip_label)) |
551 | gpiochip_machine_hog(gc, hog); | |
a411e81e BG |
552 | } |
553 | ||
554 | mutex_unlock(&gpio_machine_hogs_mutex); | |
555 | } | |
556 | ||
159f3cd9 GR |
557 | static void gpiochip_setup_devs(void) |
558 | { | |
559 | struct gpio_device *gdev; | |
d377f56f | 560 | int ret; |
159f3cd9 GR |
561 | |
562 | list_for_each_entry(gdev, &gpio_devices, list) { | |
d377f56f LW |
563 | ret = gpiochip_setup_dev(gdev); |
564 | if (ret) | |
262b9011 GU |
565 | dev_err(&gdev->dev, |
566 | "Failed to initialize gpio device (%d)\n", ret); | |
159f3cd9 GR |
567 | } |
568 | } | |
569 | ||
a0b66a73 | 570 | int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data, |
39c3fd58 AL |
571 | struct lock_class_key *lock_key, |
572 | struct lock_class_key *request_key) | |
d2876d08 | 573 | { |
6cb59afe | 574 | struct fwnode_handle *fwnode = gc->parent ? dev_fwnode(gc->parent) : NULL; |
d2876d08 | 575 | unsigned long flags; |
d377f56f | 576 | int ret = 0; |
ff2b1359 | 577 | unsigned i; |
a0b66a73 | 578 | int base = gc->base; |
ff2b1359 | 579 | struct gpio_device *gdev; |
d2876d08 | 580 | |
ff2b1359 LW |
581 | /* |
582 | * First: allocate and populate the internal stat container, and | |
583 | * set up the struct device. | |
584 | */ | |
969f07b4 | 585 | gdev = kzalloc(sizeof(*gdev), GFP_KERNEL); |
ff2b1359 | 586 | if (!gdev) |
14e85c0e | 587 | return -ENOMEM; |
3c702e99 | 588 | gdev->dev.bus = &gpio_bus_type; |
1df62542 | 589 | gdev->dev.parent = gc->parent; |
a0b66a73 LW |
590 | gdev->chip = gc; |
591 | gc->gpiodev = gdev; | |
acc6e331 | 592 | |
4731210c | 593 | of_gpio_dev_init(gc, gdev); |
515321ac | 594 | acpi_gpio_dev_init(gc, gdev); |
acc6e331 | 595 | |
6cb59afe AS |
596 | /* |
597 | * Assign fwnode depending on the result of the previous calls, | |
598 | * if none of them succeed, assign it to the parent's one. | |
599 | */ | |
600 | gdev->dev.fwnode = dev_fwnode(&gdev->dev) ?: fwnode; | |
601 | ||
8d4a85b6 | 602 | gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL); |
ff2b1359 | 603 | if (gdev->id < 0) { |
d377f56f | 604 | ret = gdev->id; |
ff2b1359 LW |
605 | goto err_free_gdev; |
606 | } | |
c351bb64 QW |
607 | |
608 | ret = dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id); | |
609 | if (ret) | |
610 | goto err_free_ida; | |
611 | ||
ff2b1359 | 612 | device_initialize(&gdev->dev); |
a0b66a73 LW |
613 | if (gc->parent && gc->parent->driver) |
614 | gdev->owner = gc->parent->driver->owner; | |
615 | else if (gc->owner) | |
ff2b1359 | 616 | /* TODO: remove chip->owner */ |
a0b66a73 | 617 | gdev->owner = gc->owner; |
ff2b1359 LW |
618 | else |
619 | gdev->owner = THIS_MODULE; | |
d2876d08 | 620 | |
a0b66a73 | 621 | gdev->descs = kcalloc(gc->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL); |
1c3cdb18 | 622 | if (!gdev->descs) { |
d377f56f | 623 | ret = -ENOMEM; |
c351bb64 | 624 | goto err_free_dev_name; |
ff2b1359 LW |
625 | } |
626 | ||
a0b66a73 LW |
627 | if (gc->ngpio == 0) { |
628 | chip_err(gc, "tried to insert a GPIO chip with zero lines\n"); | |
d377f56f | 629 | ret = -EINVAL; |
159f3cd9 | 630 | goto err_free_descs; |
5ed41cc4 | 631 | } |
df4878e9 | 632 | |
a0b66a73 LW |
633 | if (gc->ngpio > FASTPATH_NGPIO) |
634 | chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n", | |
635 | gc->ngpio, FASTPATH_NGPIO); | |
3027743f | 636 | |
a0b66a73 | 637 | gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL); |
df4878e9 | 638 | if (!gdev->label) { |
d377f56f | 639 | ret = -ENOMEM; |
476e2fc5 | 640 | goto err_free_descs; |
df4878e9 LW |
641 | } |
642 | ||
a0b66a73 | 643 | gdev->ngpio = gc->ngpio; |
43c54eca | 644 | gdev->data = data; |
5ed41cc4 | 645 | |
d2876d08 DB |
646 | spin_lock_irqsave(&gpio_lock, flags); |
647 | ||
fdeb8e15 LW |
648 | /* |
649 | * TODO: this allocates a Linux GPIO number base in the global | |
650 | * GPIO numberspace for this chip. In the long run we want to | |
651 | * get *rid* of this numberspace and use only descriptors, but | |
652 | * it may be a pipe dream. It will not happen before we get rid | |
653 | * of the sysfs interface anyways. | |
654 | */ | |
8d0aab2f | 655 | if (base < 0) { |
a0b66a73 | 656 | base = gpiochip_find_base(gc->ngpio); |
8d0aab2f | 657 | if (base < 0) { |
d377f56f | 658 | ret = base; |
225fce83 | 659 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 660 | goto err_free_label; |
8d0aab2f | 661 | } |
fdeb8e15 LW |
662 | /* |
663 | * TODO: it should not be necessary to reflect the assigned | |
664 | * base outside of the GPIO subsystem. Go over drivers and | |
665 | * see if anyone makes use of this, else drop this and assign | |
666 | * a poison instead. | |
667 | */ | |
a0b66a73 | 668 | gc->base = base; |
8d0aab2f | 669 | } |
fdeb8e15 | 670 | gdev->base = base; |
8d0aab2f | 671 | |
d377f56f LW |
672 | ret = gpiodev_add_to_list(gdev); |
673 | if (ret) { | |
05aa5203 | 674 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 675 | goto err_free_label; |
05aa5203 | 676 | } |
1a989d0f | 677 | |
a0b66a73 | 678 | for (i = 0; i < gc->ngpio; i++) |
767cd17a | 679 | gdev->descs[i].gdev = gdev; |
14e85c0e | 680 | |
207270dd DC |
681 | spin_unlock_irqrestore(&gpio_lock, flags); |
682 | ||
6accc376 | 683 | BLOCKING_INIT_NOTIFIER_HEAD(&gdev->notifier); |
51c1064e | 684 | |
f23f1516 | 685 | #ifdef CONFIG_PINCTRL |
20ec3e39 | 686 | INIT_LIST_HEAD(&gdev->pin_ranges); |
f23f1516 SH |
687 | #endif |
688 | ||
7cba1a4d BG |
689 | if (gc->names) |
690 | ret = gpiochip_set_desc_names(gc); | |
691 | else | |
692 | ret = devprop_gpiochip_set_names(gc); | |
d377f56f | 693 | if (ret) |
5f3ca732 MP |
694 | goto err_remove_from_list; |
695 | ||
a0b66a73 | 696 | ret = gpiochip_alloc_valid_mask(gc); |
d377f56f | 697 | if (ret) |
48057ed1 | 698 | goto err_remove_from_list; |
e0d89728 | 699 | |
a0b66a73 | 700 | ret = of_gpiochip_add(gc); |
d377f56f | 701 | if (ret) |
48057ed1 | 702 | goto err_free_gpiochip_mask; |
28355f81 | 703 | |
a0b66a73 | 704 | ret = gpiochip_init_valid_mask(gc); |
d377f56f | 705 | if (ret) |
35779890 | 706 | goto err_remove_of_chip; |
f8ec92a9 | 707 | |
a0b66a73 | 708 | for (i = 0; i < gc->ngpio; i++) { |
3edfb7bd RRD |
709 | struct gpio_desc *desc = &gdev->descs[i]; |
710 | ||
a0b66a73 | 711 | if (gc->get_direction && gpiochip_line_is_valid(gc, i)) { |
4fc5bfeb | 712 | assign_bit(FLAG_IS_OUT, |
a0b66a73 | 713 | &desc->flags, !gc->get_direction(gc, i)); |
d95da993 | 714 | } else { |
4fc5bfeb | 715 | assign_bit(FLAG_IS_OUT, |
a0b66a73 | 716 | &desc->flags, !gc->direction_input); |
d95da993 | 717 | } |
3edfb7bd RRD |
718 | } |
719 | ||
a0b66a73 | 720 | ret = gpiochip_add_pin_ranges(gc); |
b056ca1c AS |
721 | if (ret) |
722 | goto err_remove_of_chip; | |
723 | ||
a0b66a73 | 724 | acpi_gpiochip_add(gc); |
391c970c | 725 | |
a0b66a73 | 726 | machine_gpiochip_add(gc); |
a411e81e | 727 | |
a0b66a73 | 728 | ret = gpiochip_irqchip_init_valid_mask(gc); |
9411e3aa AS |
729 | if (ret) |
730 | goto err_remove_acpi_chip; | |
731 | ||
a0b66a73 | 732 | ret = gpiochip_irqchip_init_hw(gc); |
fbdf8d4b | 733 | if (ret) |
48057ed1 LW |
734 | goto err_remove_acpi_chip; |
735 | ||
a0b66a73 | 736 | ret = gpiochip_add_irqchip(gc, lock_key, request_key); |
fbdf8d4b | 737 | if (ret) |
48057ed1 LW |
738 | goto err_remove_irqchip_mask; |
739 | ||
3c702e99 LW |
740 | /* |
741 | * By first adding the chardev, and then adding the device, | |
742 | * we get a device node entry in sysfs under | |
743 | * /sys/bus/gpio/devices/gpiochipN/dev that can be used for | |
744 | * coldplug of device nodes and other udev business. | |
159f3cd9 GR |
745 | * We can do this only if gpiolib has been initialized. |
746 | * Otherwise, defer until later. | |
3c702e99 | 747 | */ |
159f3cd9 | 748 | if (gpiolib_initialized) { |
d377f56f LW |
749 | ret = gpiochip_setup_dev(gdev); |
750 | if (ret) | |
48057ed1 | 751 | goto err_remove_irqchip; |
159f3cd9 | 752 | } |
cedb1881 | 753 | return 0; |
3bae4811 | 754 | |
48057ed1 | 755 | err_remove_irqchip: |
a0b66a73 | 756 | gpiochip_irqchip_remove(gc); |
48057ed1 | 757 | err_remove_irqchip_mask: |
a0b66a73 | 758 | gpiochip_irqchip_free_valid_mask(gc); |
35779890 | 759 | err_remove_acpi_chip: |
a0b66a73 | 760 | acpi_gpiochip_remove(gc); |
35779890 | 761 | err_remove_of_chip: |
a0b66a73 LW |
762 | gpiochip_free_hogs(gc); |
763 | of_gpiochip_remove(gc); | |
35779890 | 764 | err_free_gpiochip_mask: |
a0b66a73 LW |
765 | gpiochip_remove_pin_ranges(gc); |
766 | gpiochip_free_valid_mask(gc); | |
5f3ca732 | 767 | err_remove_from_list: |
225fce83 | 768 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 769 | list_del(&gdev->list); |
3bae4811 | 770 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 771 | err_free_label: |
fcf273e5 | 772 | kfree_const(gdev->label); |
476e2fc5 GR |
773 | err_free_descs: |
774 | kfree(gdev->descs); | |
c351bb64 QW |
775 | err_free_dev_name: |
776 | kfree(dev_name(&gdev->dev)); | |
a05a1404 | 777 | err_free_ida: |
8d4a85b6 | 778 | ida_free(&gpio_ida, gdev->id); |
a05a1404 | 779 | err_free_gdev: |
d2876d08 | 780 | /* failures here can mean systems won't boot... */ |
3cc1fb73 GS |
781 | if (ret != -EPROBE_DEFER) { |
782 | pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__, | |
783 | gdev->base, gdev->base + gdev->ngpio - 1, | |
784 | gc->label ? : "generic", ret); | |
785 | } | |
fdeb8e15 | 786 | kfree(gdev); |
d377f56f | 787 | return ret; |
d2876d08 | 788 | } |
959bc7b2 | 789 | EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key); |
d2876d08 | 790 | |
43c54eca LW |
791 | /** |
792 | * gpiochip_get_data() - get per-subdriver data for the chip | |
a0b66a73 | 793 | * @gc: GPIO chip |
950d55f5 TR |
794 | * |
795 | * Returns: | |
796 | * The per-subdriver data for the chip. | |
43c54eca | 797 | */ |
a0b66a73 | 798 | void *gpiochip_get_data(struct gpio_chip *gc) |
43c54eca | 799 | { |
a0b66a73 | 800 | return gc->gpiodev->data; |
43c54eca LW |
801 | } |
802 | EXPORT_SYMBOL_GPL(gpiochip_get_data); | |
803 | ||
d2876d08 DB |
804 | /** |
805 | * gpiochip_remove() - unregister a gpio_chip | |
a0b66a73 | 806 | * @gc: the chip to unregister |
d2876d08 DB |
807 | * |
808 | * A gpio_chip with any GPIOs still requested may not be removed. | |
809 | */ | |
a0b66a73 | 810 | void gpiochip_remove(struct gpio_chip *gc) |
d2876d08 | 811 | { |
a0b66a73 | 812 | struct gpio_device *gdev = gc->gpiodev; |
d2876d08 | 813 | unsigned long flags; |
869233f8 | 814 | unsigned int i; |
d2876d08 | 815 | |
ff2b1359 | 816 | /* FIXME: should the legacy sysfs handling be moved to gpio_device? */ |
afbc4f31 | 817 | gpiochip_sysfs_unregister(gdev); |
a0b66a73 | 818 | gpiochip_free_hogs(gc); |
bd203bd5 BJZ |
819 | /* Numb the device, cancelling all outstanding operations */ |
820 | gdev->chip = NULL; | |
a0b66a73 LW |
821 | gpiochip_irqchip_remove(gc); |
822 | acpi_gpiochip_remove(gc); | |
823 | of_gpiochip_remove(gc); | |
824 | gpiochip_remove_pin_ranges(gc); | |
825 | gpiochip_free_valid_mask(gc); | |
43c54eca LW |
826 | /* |
827 | * We accept no more calls into the driver from this point, so | |
828 | * NULL the driver data pointer | |
829 | */ | |
830 | gdev->data = NULL; | |
391c970c | 831 | |
6798acaa | 832 | spin_lock_irqsave(&gpio_lock, flags); |
fdeb8e15 | 833 | for (i = 0; i < gdev->ngpio; i++) { |
a0b66a73 | 834 | if (gpiochip_is_requested(gc, i)) |
869233f8 | 835 | break; |
d2876d08 | 836 | } |
d2876d08 | 837 | spin_unlock_irqrestore(&gpio_lock, flags); |
14e85c0e | 838 | |
ca18a852 | 839 | if (i != gdev->ngpio) |
fdeb8e15 | 840 | dev_crit(&gdev->dev, |
58383c78 | 841 | "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n"); |
fab28b89 | 842 | |
ff2b1359 LW |
843 | /* |
844 | * The gpiochip side puts its use of the device to rest here: | |
845 | * if there are no userspace clients, the chardev and device will | |
846 | * be removed, else it will be dangling until the last user is | |
847 | * gone. | |
848 | */ | |
1f5eb8b1 | 849 | gcdev_unregister(gdev); |
ff2b1359 | 850 | put_device(&gdev->dev); |
d2876d08 DB |
851 | } |
852 | EXPORT_SYMBOL_GPL(gpiochip_remove); | |
853 | ||
594fa265 GL |
854 | /** |
855 | * gpiochip_find() - iterator for locating a specific gpio_chip | |
856 | * @data: data to pass to match function | |
950d55f5 | 857 | * @match: Callback function to check gpio_chip |
594fa265 GL |
858 | * |
859 | * Similar to bus_find_device. It returns a reference to a gpio_chip as | |
860 | * determined by a user supplied @match callback. The callback should return | |
861 | * 0 if the device doesn't match and non-zero if it does. If the callback is | |
862 | * non-zero, this function will return to the caller and not iterate over any | |
863 | * more gpio_chips. | |
864 | */ | |
07ce8ec7 | 865 | struct gpio_chip *gpiochip_find(void *data, |
a0b66a73 | 866 | int (*match)(struct gpio_chip *gc, |
3d0f7cf0 | 867 | void *data)) |
594fa265 | 868 | { |
ff2b1359 | 869 | struct gpio_device *gdev; |
a0b66a73 | 870 | struct gpio_chip *gc = NULL; |
594fa265 | 871 | unsigned long flags; |
594fa265 GL |
872 | |
873 | spin_lock_irqsave(&gpio_lock, flags); | |
ff2b1359 | 874 | list_for_each_entry(gdev, &gpio_devices, list) |
acf06ff7 | 875 | if (gdev->chip && match(gdev->chip, data)) { |
a0b66a73 | 876 | gc = gdev->chip; |
594fa265 | 877 | break; |
acf06ff7 | 878 | } |
ff2b1359 | 879 | |
594fa265 GL |
880 | spin_unlock_irqrestore(&gpio_lock, flags); |
881 | ||
a0b66a73 | 882 | return gc; |
594fa265 | 883 | } |
8fa0c9bf | 884 | EXPORT_SYMBOL_GPL(gpiochip_find); |
d2876d08 | 885 | |
a0b66a73 | 886 | static int gpiochip_match_name(struct gpio_chip *gc, void *data) |
79697ef9 AC |
887 | { |
888 | const char *name = data; | |
889 | ||
a0b66a73 | 890 | return !strcmp(gc->label, name); |
79697ef9 AC |
891 | } |
892 | ||
893 | static struct gpio_chip *find_chip_by_name(const char *name) | |
894 | { | |
895 | return gpiochip_find((void *)name, gpiochip_match_name); | |
896 | } | |
897 | ||
14250520 LW |
898 | #ifdef CONFIG_GPIOLIB_IRQCHIP |
899 | ||
900 | /* | |
901 | * The following is irqchip helper code for gpiochips. | |
902 | */ | |
903 | ||
9411e3aa AS |
904 | static int gpiochip_irqchip_init_hw(struct gpio_chip *gc) |
905 | { | |
906 | struct gpio_irq_chip *girq = &gc->irq; | |
907 | ||
908 | if (!girq->init_hw) | |
909 | return 0; | |
910 | ||
911 | return girq->init_hw(gc); | |
912 | } | |
913 | ||
5fbe5b58 | 914 | static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc) |
79b804cb | 915 | { |
5fbe5b58 LW |
916 | struct gpio_irq_chip *girq = &gc->irq; |
917 | ||
918 | if (!girq->init_valid_mask) | |
79b804cb MW |
919 | return 0; |
920 | ||
5fbe5b58 LW |
921 | girq->valid_mask = gpiochip_allocate_mask(gc); |
922 | if (!girq->valid_mask) | |
79b804cb MW |
923 | return -ENOMEM; |
924 | ||
5fbe5b58 LW |
925 | girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio); |
926 | ||
79b804cb MW |
927 | return 0; |
928 | } | |
929 | ||
a0b66a73 | 930 | static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc) |
79b804cb | 931 | { |
a0b66a73 LW |
932 | bitmap_free(gc->irq.valid_mask); |
933 | gc->irq.valid_mask = NULL; | |
79b804cb MW |
934 | } |
935 | ||
a0b66a73 | 936 | bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc, |
64ff2c8e | 937 | unsigned int offset) |
79b804cb | 938 | { |
a0b66a73 | 939 | if (!gpiochip_line_is_valid(gc, offset)) |
726cb3ba | 940 | return false; |
79b804cb | 941 | /* No mask means all valid */ |
a0b66a73 | 942 | if (likely(!gc->irq.valid_mask)) |
79b804cb | 943 | return true; |
a0b66a73 | 944 | return test_bit(offset, gc->irq.valid_mask); |
79b804cb | 945 | } |
64ff2c8e | 946 | EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid); |
79b804cb | 947 | |
fdd61a01 LW |
948 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
949 | ||
950 | /** | |
951 | * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip | |
952 | * to a gpiochip | |
953 | * @gc: the gpiochip to set the irqchip hierarchical handler to | |
954 | * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt | |
955 | * will then percolate up to the parent | |
956 | */ | |
957 | static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc, | |
958 | struct irq_chip *irqchip) | |
959 | { | |
960 | /* DT will deal with mapping each IRQ as we go along */ | |
961 | if (is_of_node(gc->irq.fwnode)) | |
962 | return; | |
963 | ||
964 | /* | |
965 | * This is for legacy and boardfile "irqchip" fwnodes: allocate | |
966 | * irqs upfront instead of dynamically since we don't have the | |
967 | * dynamic type of allocation that hardware description languages | |
968 | * provide. Once all GPIO drivers using board files are gone from | |
969 | * the kernel we can delete this code, but for a transitional period | |
970 | * it is necessary to keep this around. | |
971 | */ | |
972 | if (is_fwnode_irqchip(gc->irq.fwnode)) { | |
973 | int i; | |
974 | int ret; | |
975 | ||
976 | for (i = 0; i < gc->ngpio; i++) { | |
977 | struct irq_fwspec fwspec; | |
978 | unsigned int parent_hwirq; | |
979 | unsigned int parent_type; | |
980 | struct gpio_irq_chip *girq = &gc->irq; | |
981 | ||
982 | /* | |
983 | * We call the child to parent translation function | |
984 | * only to check if the child IRQ is valid or not. | |
985 | * Just pick the rising edge type here as that is what | |
986 | * we likely need to support. | |
987 | */ | |
988 | ret = girq->child_to_parent_hwirq(gc, i, | |
989 | IRQ_TYPE_EDGE_RISING, | |
990 | &parent_hwirq, | |
991 | &parent_type); | |
992 | if (ret) { | |
993 | chip_err(gc, "skip set-up on hwirq %d\n", | |
994 | i); | |
995 | continue; | |
996 | } | |
997 | ||
998 | fwspec.fwnode = gc->irq.fwnode; | |
999 | /* This is the hwirq for the GPIO line side of things */ | |
1000 | fwspec.param[0] = girq->child_offset_to_irq(gc, i); | |
1001 | /* Just pick something */ | |
1002 | fwspec.param[1] = IRQ_TYPE_EDGE_RISING; | |
1003 | fwspec.param_count = 2; | |
1004 | ret = __irq_domain_alloc_irqs(gc->irq.domain, | |
1005 | /* just pick something */ | |
1006 | -1, | |
1007 | 1, | |
1008 | NUMA_NO_NODE, | |
1009 | &fwspec, | |
1010 | false, | |
1011 | NULL); | |
1012 | if (ret < 0) { | |
1013 | chip_err(gc, | |
1014 | "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n", | |
1015 | i, parent_hwirq, | |
1016 | ret); | |
1017 | } | |
1018 | } | |
1019 | } | |
1020 | ||
1021 | chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__); | |
1022 | ||
1023 | return; | |
1024 | } | |
1025 | ||
1026 | static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d, | |
1027 | struct irq_fwspec *fwspec, | |
1028 | unsigned long *hwirq, | |
1029 | unsigned int *type) | |
1030 | { | |
1031 | /* We support standard DT translation */ | |
1032 | if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) { | |
1033 | return irq_domain_translate_twocell(d, fwspec, hwirq, type); | |
1034 | } | |
1035 | ||
1036 | /* This is for board files and others not using DT */ | |
1037 | if (is_fwnode_irqchip(fwspec->fwnode)) { | |
1038 | int ret; | |
1039 | ||
1040 | ret = irq_domain_translate_twocell(d, fwspec, hwirq, type); | |
1041 | if (ret) | |
1042 | return ret; | |
1043 | WARN_ON(*type == IRQ_TYPE_NONE); | |
1044 | return 0; | |
1045 | } | |
1046 | return -EINVAL; | |
1047 | } | |
1048 | ||
1049 | static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d, | |
1050 | unsigned int irq, | |
1051 | unsigned int nr_irqs, | |
1052 | void *data) | |
1053 | { | |
1054 | struct gpio_chip *gc = d->host_data; | |
1055 | irq_hw_number_t hwirq; | |
1056 | unsigned int type = IRQ_TYPE_NONE; | |
1057 | struct irq_fwspec *fwspec = data; | |
24258761 | 1058 | void *parent_arg; |
fdd61a01 LW |
1059 | unsigned int parent_hwirq; |
1060 | unsigned int parent_type; | |
1061 | struct gpio_irq_chip *girq = &gc->irq; | |
1062 | int ret; | |
1063 | ||
1064 | /* | |
1065 | * The nr_irqs parameter is always one except for PCI multi-MSI | |
1066 | * so this should not happen. | |
1067 | */ | |
1068 | WARN_ON(nr_irqs != 1); | |
1069 | ||
1070 | ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type); | |
1071 | if (ret) | |
1072 | return ret; | |
1073 | ||
366950ee | 1074 | chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq); |
fdd61a01 LW |
1075 | |
1076 | ret = girq->child_to_parent_hwirq(gc, hwirq, type, | |
1077 | &parent_hwirq, &parent_type); | |
1078 | if (ret) { | |
1079 | chip_err(gc, "can't look up hwirq %lu\n", hwirq); | |
1080 | return ret; | |
1081 | } | |
366950ee | 1082 | chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq); |
fdd61a01 LW |
1083 | |
1084 | /* | |
1085 | * We set handle_bad_irq because the .set_type() should | |
1086 | * always be invoked and set the right type of handler. | |
1087 | */ | |
1088 | irq_domain_set_info(d, | |
1089 | irq, | |
1090 | hwirq, | |
1091 | gc->irq.chip, | |
1092 | gc, | |
1093 | girq->handler, | |
1094 | NULL, NULL); | |
1095 | irq_set_probe(irq); | |
1096 | ||
fdd61a01 | 1097 | /* This parent only handles asserted level IRQs */ |
24258761 KH |
1098 | parent_arg = girq->populate_parent_alloc_arg(gc, parent_hwirq, parent_type); |
1099 | if (!parent_arg) | |
1100 | return -ENOMEM; | |
1101 | ||
366950ee | 1102 | chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n", |
fdd61a01 | 1103 | irq, parent_hwirq); |
c34f6dc8 | 1104 | irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key); |
24258761 | 1105 | ret = irq_domain_alloc_irqs_parent(d, irq, 1, parent_arg); |
880b7cf2 KH |
1106 | /* |
1107 | * If the parent irqdomain is msi, the interrupts have already | |
1108 | * been allocated, so the EEXIST is good. | |
1109 | */ | |
1110 | if (irq_domain_is_msi(d->parent) && (ret == -EEXIST)) | |
1111 | ret = 0; | |
fdd61a01 LW |
1112 | if (ret) |
1113 | chip_err(gc, | |
1114 | "failed to allocate parent hwirq %d for hwirq %lu\n", | |
1115 | parent_hwirq, hwirq); | |
1116 | ||
24258761 | 1117 | kfree(parent_arg); |
fdd61a01 LW |
1118 | return ret; |
1119 | } | |
1120 | ||
a0b66a73 | 1121 | static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc, |
fdd61a01 LW |
1122 | unsigned int offset) |
1123 | { | |
1124 | return offset; | |
1125 | } | |
1126 | ||
1127 | static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops) | |
1128 | { | |
1129 | ops->activate = gpiochip_irq_domain_activate; | |
1130 | ops->deactivate = gpiochip_irq_domain_deactivate; | |
1131 | ops->alloc = gpiochip_hierarchy_irq_domain_alloc; | |
1132 | ops->free = irq_domain_free_irqs_common; | |
1133 | ||
1134 | /* | |
1135 | * We only allow overriding the translate() function for | |
1136 | * hierarchical chips, and this should only be done if the user | |
1137 | * really need something other than 1:1 translation. | |
1138 | */ | |
1139 | if (!ops->translate) | |
1140 | ops->translate = gpiochip_hierarchy_irq_domain_translate; | |
1141 | } | |
1142 | ||
1143 | static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc) | |
1144 | { | |
1145 | if (!gc->irq.child_to_parent_hwirq || | |
1146 | !gc->irq.fwnode) { | |
1147 | chip_err(gc, "missing irqdomain vital data\n"); | |
1148 | return -EINVAL; | |
1149 | } | |
1150 | ||
1151 | if (!gc->irq.child_offset_to_irq) | |
1152 | gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop; | |
1153 | ||
24258761 KH |
1154 | if (!gc->irq.populate_parent_alloc_arg) |
1155 | gc->irq.populate_parent_alloc_arg = | |
fdd61a01 LW |
1156 | gpiochip_populate_parent_fwspec_twocell; |
1157 | ||
1158 | gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops); | |
1159 | ||
1160 | gc->irq.domain = irq_domain_create_hierarchy( | |
1161 | gc->irq.parent_domain, | |
1162 | 0, | |
1163 | gc->ngpio, | |
1164 | gc->irq.fwnode, | |
1165 | &gc->irq.child_irq_domain_ops, | |
1166 | gc); | |
1167 | ||
1168 | if (!gc->irq.domain) | |
1169 | return -ENOMEM; | |
1170 | ||
1171 | gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip); | |
1172 | ||
1173 | return 0; | |
1174 | } | |
1175 | ||
1176 | static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc) | |
1177 | { | |
1178 | return !!gc->irq.parent_domain; | |
1179 | } | |
1180 | ||
a0b66a73 | 1181 | void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc, |
fdd61a01 LW |
1182 | unsigned int parent_hwirq, |
1183 | unsigned int parent_type) | |
1184 | { | |
24258761 KH |
1185 | struct irq_fwspec *fwspec; |
1186 | ||
1187 | fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL); | |
1188 | if (!fwspec) | |
1189 | return NULL; | |
1190 | ||
a0b66a73 | 1191 | fwspec->fwnode = gc->irq.parent_domain->fwnode; |
fdd61a01 LW |
1192 | fwspec->param_count = 2; |
1193 | fwspec->param[0] = parent_hwirq; | |
1194 | fwspec->param[1] = parent_type; | |
24258761 KH |
1195 | |
1196 | return fwspec; | |
fdd61a01 LW |
1197 | } |
1198 | EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell); | |
1199 | ||
a0b66a73 | 1200 | void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc, |
fdd61a01 LW |
1201 | unsigned int parent_hwirq, |
1202 | unsigned int parent_type) | |
1203 | { | |
24258761 KH |
1204 | struct irq_fwspec *fwspec; |
1205 | ||
1206 | fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL); | |
1207 | if (!fwspec) | |
1208 | return NULL; | |
1209 | ||
a0b66a73 | 1210 | fwspec->fwnode = gc->irq.parent_domain->fwnode; |
fdd61a01 LW |
1211 | fwspec->param_count = 4; |
1212 | fwspec->param[0] = 0; | |
1213 | fwspec->param[1] = parent_hwirq; | |
1214 | fwspec->param[2] = 0; | |
1215 | fwspec->param[3] = parent_type; | |
24258761 KH |
1216 | |
1217 | return fwspec; | |
fdd61a01 LW |
1218 | } |
1219 | EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell); | |
1220 | ||
1221 | #else | |
1222 | ||
1223 | static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc) | |
1224 | { | |
1225 | return -EINVAL; | |
1226 | } | |
1227 | ||
1228 | static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc) | |
1229 | { | |
1230 | return false; | |
1231 | } | |
1232 | ||
1233 | #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ | |
1234 | ||
14250520 LW |
1235 | /** |
1236 | * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip | |
1237 | * @d: the irqdomain used by this irqchip | |
1238 | * @irq: the global irq number used by this GPIO irqchip irq | |
1239 | * @hwirq: the local IRQ/GPIO line offset on this gpiochip | |
1240 | * | |
1241 | * This function will set up the mapping for a certain IRQ line on a | |
1242 | * gpiochip by assigning the gpiochip as chip data, and using the irqchip | |
1243 | * stored inside the gpiochip. | |
1244 | */ | |
1b95b4eb TR |
1245 | int gpiochip_irq_map(struct irq_domain *d, unsigned int irq, |
1246 | irq_hw_number_t hwirq) | |
14250520 | 1247 | { |
a0b66a73 | 1248 | struct gpio_chip *gc = d->host_data; |
d377f56f | 1249 | int ret = 0; |
14250520 | 1250 | |
a0b66a73 | 1251 | if (!gpiochip_irqchip_irq_valid(gc, hwirq)) |
dc749a09 GS |
1252 | return -ENXIO; |
1253 | ||
a0b66a73 | 1254 | irq_set_chip_data(irq, gc); |
a0a8bcf4 GS |
1255 | /* |
1256 | * This lock class tells lockdep that GPIO irqs are in a different | |
1257 | * category than their parents, so it won't report false recursion. | |
1258 | */ | |
a0b66a73 LW |
1259 | irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key); |
1260 | irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler); | |
d245b3f9 | 1261 | /* Chips that use nested thread handlers have them marked */ |
a0b66a73 | 1262 | if (gc->irq.threaded) |
1c8732bb | 1263 | irq_set_nested_thread(irq, 1); |
14250520 | 1264 | irq_set_noprobe(irq); |
23393d49 | 1265 | |
a0b66a73 LW |
1266 | if (gc->irq.num_parents == 1) |
1267 | ret = irq_set_parent(irq, gc->irq.parents[0]); | |
1268 | else if (gc->irq.map) | |
1269 | ret = irq_set_parent(irq, gc->irq.map[hwirq]); | |
e0d89728 | 1270 | |
d377f56f LW |
1271 | if (ret < 0) |
1272 | return ret; | |
e0d89728 | 1273 | |
1333b90f LW |
1274 | /* |
1275 | * No set-up of the hardware will happen if IRQ_TYPE_NONE | |
1276 | * is passed as default type. | |
1277 | */ | |
a0b66a73 LW |
1278 | if (gc->irq.default_type != IRQ_TYPE_NONE) |
1279 | irq_set_irq_type(irq, gc->irq.default_type); | |
14250520 LW |
1280 | |
1281 | return 0; | |
1282 | } | |
1b95b4eb | 1283 | EXPORT_SYMBOL_GPL(gpiochip_irq_map); |
14250520 | 1284 | |
1b95b4eb | 1285 | void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq) |
c3626fde | 1286 | { |
a0b66a73 | 1287 | struct gpio_chip *gc = d->host_data; |
1c8732bb | 1288 | |
a0b66a73 | 1289 | if (gc->irq.threaded) |
1c8732bb | 1290 | irq_set_nested_thread(irq, 0); |
c3626fde LW |
1291 | irq_set_chip_and_handler(irq, NULL, NULL); |
1292 | irq_set_chip_data(irq, NULL); | |
1293 | } | |
1b95b4eb | 1294 | EXPORT_SYMBOL_GPL(gpiochip_irq_unmap); |
c3626fde | 1295 | |
14250520 LW |
1296 | static const struct irq_domain_ops gpiochip_domain_ops = { |
1297 | .map = gpiochip_irq_map, | |
c3626fde | 1298 | .unmap = gpiochip_irq_unmap, |
14250520 LW |
1299 | /* Virtually all GPIO irqchips are twocell:ed */ |
1300 | .xlate = irq_domain_xlate_twocell, | |
1301 | }; | |
1302 | ||
fdd61a01 LW |
1303 | /* |
1304 | * TODO: move these activate/deactivate in under the hierarchicial | |
1305 | * irqchip implementation as static once SPMI and SSBI (all external | |
1306 | * users) are phased over. | |
1307 | */ | |
ef74f70e BM |
1308 | /** |
1309 | * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ | |
1310 | * @domain: The IRQ domain used by this IRQ chip | |
1311 | * @data: Outermost irq_data associated with the IRQ | |
1312 | * @reserve: If set, only reserve an interrupt vector instead of assigning one | |
1313 | * | |
1314 | * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be | |
1315 | * used as the activate function for the &struct irq_domain_ops. The host_data | |
1316 | * for the IRQ domain must be the &struct gpio_chip. | |
1317 | */ | |
1318 | int gpiochip_irq_domain_activate(struct irq_domain *domain, | |
1319 | struct irq_data *data, bool reserve) | |
1320 | { | |
a0b66a73 | 1321 | struct gpio_chip *gc = domain->host_data; |
ef74f70e | 1322 | |
a0b66a73 | 1323 | return gpiochip_lock_as_irq(gc, data->hwirq); |
ef74f70e BM |
1324 | } |
1325 | EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate); | |
1326 | ||
1327 | /** | |
1328 | * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ | |
1329 | * @domain: The IRQ domain used by this IRQ chip | |
1330 | * @data: Outermost irq_data associated with the IRQ | |
1331 | * | |
1332 | * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to | |
1333 | * be used as the deactivate function for the &struct irq_domain_ops. The | |
1334 | * host_data for the IRQ domain must be the &struct gpio_chip. | |
1335 | */ | |
1336 | void gpiochip_irq_domain_deactivate(struct irq_domain *domain, | |
1337 | struct irq_data *data) | |
1338 | { | |
a0b66a73 | 1339 | struct gpio_chip *gc = domain->host_data; |
ef74f70e | 1340 | |
a0b66a73 | 1341 | return gpiochip_unlock_as_irq(gc, data->hwirq); |
ef74f70e BM |
1342 | } |
1343 | EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate); | |
1344 | ||
13daf489 | 1345 | static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset) |
14250520 | 1346 | { |
a0b66a73 | 1347 | struct irq_domain *domain = gc->irq.domain; |
fdd61a01 | 1348 | |
a0b66a73 | 1349 | if (!gpiochip_irqchip_irq_valid(gc, offset)) |
4e6b8238 | 1350 | return -ENXIO; |
5b76e79c | 1351 | |
fdd61a01 LW |
1352 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
1353 | if (irq_domain_is_hierarchy(domain)) { | |
1354 | struct irq_fwspec spec; | |
1355 | ||
1356 | spec.fwnode = domain->fwnode; | |
1357 | spec.param_count = 2; | |
a0b66a73 | 1358 | spec.param[0] = gc->irq.child_offset_to_irq(gc, offset); |
fdd61a01 LW |
1359 | spec.param[1] = IRQ_TYPE_NONE; |
1360 | ||
1361 | return irq_create_fwspec_mapping(&spec); | |
1362 | } | |
1363 | #endif | |
1364 | ||
1365 | return irq_create_mapping(domain, offset); | |
14250520 LW |
1366 | } |
1367 | ||
14250520 LW |
1368 | static int gpiochip_irq_reqres(struct irq_data *d) |
1369 | { | |
a0b66a73 | 1370 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
5b76e79c | 1371 | |
a0b66a73 | 1372 | return gpiochip_reqres_irq(gc, d->hwirq); |
14250520 LW |
1373 | } |
1374 | ||
1375 | static void gpiochip_irq_relres(struct irq_data *d) | |
1376 | { | |
a0b66a73 | 1377 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
14250520 | 1378 | |
a0b66a73 | 1379 | gpiochip_relres_irq(gc, d->hwirq); |
14250520 LW |
1380 | } |
1381 | ||
a8173820 MS |
1382 | static void gpiochip_irq_mask(struct irq_data *d) |
1383 | { | |
1384 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | |
1385 | ||
1386 | if (gc->irq.irq_mask) | |
1387 | gc->irq.irq_mask(d); | |
1388 | gpiochip_disable_irq(gc, d->hwirq); | |
1389 | } | |
1390 | ||
1391 | static void gpiochip_irq_unmask(struct irq_data *d) | |
1392 | { | |
1393 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | |
1394 | ||
1395 | gpiochip_enable_irq(gc, d->hwirq); | |
1396 | if (gc->irq.irq_unmask) | |
1397 | gc->irq.irq_unmask(d); | |
1398 | } | |
1399 | ||
461c1a7d | 1400 | static void gpiochip_irq_enable(struct irq_data *d) |
14250520 | 1401 | { |
a0b66a73 | 1402 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
e0d89728 | 1403 | |
a0b66a73 | 1404 | gpiochip_enable_irq(gc, d->hwirq); |
a8173820 | 1405 | gc->irq.irq_enable(d); |
461c1a7d HV |
1406 | } |
1407 | ||
1408 | static void gpiochip_irq_disable(struct irq_data *d) | |
1409 | { | |
a0b66a73 | 1410 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
461c1a7d | 1411 | |
a8173820 | 1412 | gc->irq.irq_disable(d); |
a0b66a73 | 1413 | gpiochip_disable_irq(gc, d->hwirq); |
461c1a7d HV |
1414 | } |
1415 | ||
a0b66a73 | 1416 | static void gpiochip_set_irq_hooks(struct gpio_chip *gc) |
ca620f2d | 1417 | { |
a0b66a73 | 1418 | struct irq_chip *irqchip = gc->irq.chip; |
ca620f2d HV |
1419 | |
1420 | if (!irqchip->irq_request_resources && | |
1421 | !irqchip->irq_release_resources) { | |
1422 | irqchip->irq_request_resources = gpiochip_irq_reqres; | |
1423 | irqchip->irq_release_resources = gpiochip_irq_relres; | |
1424 | } | |
a0b66a73 | 1425 | if (WARN_ON(gc->irq.irq_enable)) |
461c1a7d | 1426 | return; |
171948ea | 1427 | /* Check if the irqchip already has this hook... */ |
9d552219 NS |
1428 | if (irqchip->irq_enable == gpiochip_irq_enable || |
1429 | irqchip->irq_mask == gpiochip_irq_mask) { | |
171948ea HV |
1430 | /* |
1431 | * ...and if so, give a gentle warning that this is bad | |
1432 | * practice. | |
1433 | */ | |
a0b66a73 | 1434 | chip_info(gc, |
171948ea HV |
1435 | "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n"); |
1436 | return; | |
1437 | } | |
a8173820 MS |
1438 | |
1439 | if (irqchip->irq_disable) { | |
1440 | gc->irq.irq_disable = irqchip->irq_disable; | |
1441 | irqchip->irq_disable = gpiochip_irq_disable; | |
1442 | } else { | |
1443 | gc->irq.irq_mask = irqchip->irq_mask; | |
1444 | irqchip->irq_mask = gpiochip_irq_mask; | |
1445 | } | |
1446 | ||
1447 | if (irqchip->irq_enable) { | |
1448 | gc->irq.irq_enable = irqchip->irq_enable; | |
1449 | irqchip->irq_enable = gpiochip_irq_enable; | |
1450 | } else { | |
1451 | gc->irq.irq_unmask = irqchip->irq_unmask; | |
1452 | irqchip->irq_unmask = gpiochip_irq_unmask; | |
1453 | } | |
14250520 LW |
1454 | } |
1455 | ||
e0d89728 TR |
1456 | /** |
1457 | * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip | |
a0b66a73 | 1458 | * @gc: the GPIO chip to add the IRQ chip to |
39c3fd58 AL |
1459 | * @lock_key: lockdep class for IRQ lock |
1460 | * @request_key: lockdep class for IRQ request | |
e0d89728 | 1461 | */ |
a0b66a73 | 1462 | static int gpiochip_add_irqchip(struct gpio_chip *gc, |
39c3fd58 AL |
1463 | struct lock_class_key *lock_key, |
1464 | struct lock_class_key *request_key) | |
e0d89728 | 1465 | { |
a0b66a73 | 1466 | struct irq_chip *irqchip = gc->irq.chip; |
fdd61a01 | 1467 | const struct irq_domain_ops *ops = NULL; |
e0d89728 TR |
1468 | struct device_node *np; |
1469 | unsigned int type; | |
1470 | unsigned int i; | |
1471 | ||
1472 | if (!irqchip) | |
1473 | return 0; | |
1474 | ||
a0b66a73 LW |
1475 | if (gc->irq.parent_handler && gc->can_sleep) { |
1476 | chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n"); | |
e0d89728 TR |
1477 | return -EINVAL; |
1478 | } | |
1479 | ||
a0b66a73 LW |
1480 | np = gc->gpiodev->dev.of_node; |
1481 | type = gc->irq.default_type; | |
e0d89728 TR |
1482 | |
1483 | /* | |
1484 | * Specifying a default trigger is a terrible idea if DT or ACPI is | |
1485 | * used to configure the interrupts, as you may end up with | |
1486 | * conflicting triggers. Tell the user, and reset to NONE. | |
1487 | */ | |
1488 | if (WARN(np && type != IRQ_TYPE_NONE, | |
1489 | "%s: Ignoring %u default trigger\n", np->full_name, type)) | |
1490 | type = IRQ_TYPE_NONE; | |
1491 | ||
a0b66a73 LW |
1492 | if (has_acpi_companion(gc->parent) && type != IRQ_TYPE_NONE) { |
1493 | acpi_handle_warn(ACPI_HANDLE(gc->parent), | |
e0d89728 TR |
1494 | "Ignoring %u default trigger\n", type); |
1495 | type = IRQ_TYPE_NONE; | |
1496 | } | |
1497 | ||
ef382374 NS |
1498 | if (gc->to_irq) |
1499 | chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__); | |
1500 | ||
a0b66a73 LW |
1501 | gc->to_irq = gpiochip_to_irq; |
1502 | gc->irq.default_type = type; | |
1503 | gc->irq.lock_key = lock_key; | |
1504 | gc->irq.request_key = request_key; | |
e0d89728 | 1505 | |
fdd61a01 | 1506 | /* If a parent irqdomain is provided, let's build a hierarchy */ |
a0b66a73 LW |
1507 | if (gpiochip_hierarchy_is_hierarchical(gc)) { |
1508 | int ret = gpiochip_hierarchy_add_domain(gc); | |
fdd61a01 LW |
1509 | if (ret) |
1510 | return ret; | |
1511 | } else { | |
1512 | /* Some drivers provide custom irqdomain ops */ | |
a0b66a73 LW |
1513 | if (gc->irq.domain_ops) |
1514 | ops = gc->irq.domain_ops; | |
fdd61a01 LW |
1515 | |
1516 | if (!ops) | |
1517 | ops = &gpiochip_domain_ops; | |
a0b66a73 LW |
1518 | gc->irq.domain = irq_domain_add_simple(np, |
1519 | gc->ngpio, | |
1520 | gc->irq.first, | |
1521 | ops, gc); | |
1522 | if (!gc->irq.domain) | |
fdd61a01 LW |
1523 | return -EINVAL; |
1524 | } | |
e0d89728 | 1525 | |
a0b66a73 LW |
1526 | if (gc->irq.parent_handler) { |
1527 | void *data = gc->irq.parent_handler_data ?: gc; | |
e0d89728 | 1528 | |
a0b66a73 | 1529 | for (i = 0; i < gc->irq.num_parents; i++) { |
e0d89728 TR |
1530 | /* |
1531 | * The parent IRQ chip is already using the chip_data | |
1532 | * for this IRQ chip, so our callbacks simply use the | |
1533 | * handler_data. | |
1534 | */ | |
a0b66a73 LW |
1535 | irq_set_chained_handler_and_data(gc->irq.parents[i], |
1536 | gc->irq.parent_handler, | |
e0d89728 TR |
1537 | data); |
1538 | } | |
e0d89728 TR |
1539 | } |
1540 | ||
a0b66a73 | 1541 | gpiochip_set_irq_hooks(gc); |
ca620f2d | 1542 | |
a0b66a73 | 1543 | acpi_gpiochip_request_interrupts(gc); |
e0d89728 TR |
1544 | |
1545 | return 0; | |
1546 | } | |
1547 | ||
14250520 LW |
1548 | /** |
1549 | * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip | |
a0b66a73 | 1550 | * @gc: the gpiochip to remove the irqchip from |
14250520 LW |
1551 | * |
1552 | * This is called only from gpiochip_remove() | |
1553 | */ | |
a0b66a73 | 1554 | static void gpiochip_irqchip_remove(struct gpio_chip *gc) |
14250520 | 1555 | { |
a0b66a73 | 1556 | struct irq_chip *irqchip = gc->irq.chip; |
39e5f096 | 1557 | unsigned int offset; |
c3626fde | 1558 | |
a0b66a73 | 1559 | acpi_gpiochip_free_interrupts(gc); |
afa82fab | 1560 | |
a0b66a73 LW |
1561 | if (irqchip && gc->irq.parent_handler) { |
1562 | struct gpio_irq_chip *irq = &gc->irq; | |
39e5f096 TR |
1563 | unsigned int i; |
1564 | ||
1565 | for (i = 0; i < irq->num_parents; i++) | |
1566 | irq_set_chained_handler_and_data(irq->parents[i], | |
1567 | NULL, NULL); | |
25e4fe92 DES |
1568 | } |
1569 | ||
c3626fde | 1570 | /* Remove all IRQ mappings and delete the domain */ |
a0b66a73 | 1571 | if (gc->irq.domain) { |
39e5f096 TR |
1572 | unsigned int irq; |
1573 | ||
a0b66a73 LW |
1574 | for (offset = 0; offset < gc->ngpio; offset++) { |
1575 | if (!gpiochip_irqchip_irq_valid(gc, offset)) | |
79b804cb | 1576 | continue; |
f0fbe7bc | 1577 | |
a0b66a73 | 1578 | irq = irq_find_mapping(gc->irq.domain, offset); |
f0fbe7bc | 1579 | irq_dispose_mapping(irq); |
79b804cb | 1580 | } |
f0fbe7bc | 1581 | |
a0b66a73 | 1582 | irq_domain_remove(gc->irq.domain); |
c3626fde | 1583 | } |
14250520 | 1584 | |
461c1a7d HV |
1585 | if (irqchip) { |
1586 | if (irqchip->irq_request_resources == gpiochip_irq_reqres) { | |
1587 | irqchip->irq_request_resources = NULL; | |
1588 | irqchip->irq_release_resources = NULL; | |
1589 | } | |
1590 | if (irqchip->irq_enable == gpiochip_irq_enable) { | |
a0b66a73 LW |
1591 | irqchip->irq_enable = gc->irq.irq_enable; |
1592 | irqchip->irq_disable = gc->irq.irq_disable; | |
461c1a7d | 1593 | } |
14250520 | 1594 | } |
a0b66a73 LW |
1595 | gc->irq.irq_enable = NULL; |
1596 | gc->irq.irq_disable = NULL; | |
1597 | gc->irq.chip = NULL; | |
79b804cb | 1598 | |
a0b66a73 | 1599 | gpiochip_irqchip_free_valid_mask(gc); |
14250520 LW |
1600 | } |
1601 | ||
6a45b0e2 MW |
1602 | /** |
1603 | * gpiochip_irqchip_add_domain() - adds an irqdomain to a gpiochip | |
1604 | * @gc: the gpiochip to add the irqchip to | |
1605 | * @domain: the irqdomain to add to the gpiochip | |
1606 | * | |
1607 | * This function adds an IRQ domain to the gpiochip. | |
1608 | */ | |
1609 | int gpiochip_irqchip_add_domain(struct gpio_chip *gc, | |
1610 | struct irq_domain *domain) | |
1611 | { | |
1612 | if (!domain) | |
1613 | return -EINVAL; | |
1614 | ||
1615 | gc->to_irq = gpiochip_to_irq; | |
1616 | gc->irq.domain = domain; | |
1617 | ||
1618 | return 0; | |
1619 | } | |
1620 | EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain); | |
1621 | ||
14250520 LW |
1622 | #else /* CONFIG_GPIOLIB_IRQCHIP */ |
1623 | ||
a0b66a73 | 1624 | static inline int gpiochip_add_irqchip(struct gpio_chip *gc, |
39c3fd58 AL |
1625 | struct lock_class_key *lock_key, |
1626 | struct lock_class_key *request_key) | |
e0d89728 TR |
1627 | { |
1628 | return 0; | |
1629 | } | |
a0b66a73 | 1630 | static void gpiochip_irqchip_remove(struct gpio_chip *gc) {} |
9411e3aa | 1631 | |
a0b66a73 | 1632 | static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc) |
9411e3aa AS |
1633 | { |
1634 | return 0; | |
1635 | } | |
1636 | ||
a0b66a73 | 1637 | static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc) |
79b804cb MW |
1638 | { |
1639 | return 0; | |
1640 | } | |
a0b66a73 | 1641 | static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc) |
79b804cb | 1642 | { } |
14250520 LW |
1643 | |
1644 | #endif /* CONFIG_GPIOLIB_IRQCHIP */ | |
1645 | ||
c771c2f4 JG |
1646 | /** |
1647 | * gpiochip_generic_request() - request the gpio function for a pin | |
a0b66a73 | 1648 | * @gc: the gpiochip owning the GPIO |
c771c2f4 JG |
1649 | * @offset: the offset of the GPIO to request for GPIO function |
1650 | */ | |
13daf489 | 1651 | int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset) |
c771c2f4 | 1652 | { |
89ad556b | 1653 | #ifdef CONFIG_PINCTRL |
a0b66a73 | 1654 | if (list_empty(&gc->gpiodev->pin_ranges)) |
89ad556b TR |
1655 | return 0; |
1656 | #endif | |
2ab73c6d | 1657 | |
a0b66a73 | 1658 | return pinctrl_gpio_request(gc->gpiodev->base + offset); |
c771c2f4 JG |
1659 | } |
1660 | EXPORT_SYMBOL_GPL(gpiochip_generic_request); | |
1661 | ||
1662 | /** | |
1663 | * gpiochip_generic_free() - free the gpio function from a pin | |
a0b66a73 | 1664 | * @gc: the gpiochip to request the gpio function for |
c771c2f4 JG |
1665 | * @offset: the offset of the GPIO to free from GPIO function |
1666 | */ | |
13daf489 | 1667 | void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset) |
c771c2f4 | 1668 | { |
6dbbf846 EC |
1669 | #ifdef CONFIG_PINCTRL |
1670 | if (list_empty(&gc->gpiodev->pin_ranges)) | |
1671 | return; | |
1672 | #endif | |
1673 | ||
a0b66a73 | 1674 | pinctrl_gpio_free(gc->gpiodev->base + offset); |
c771c2f4 JG |
1675 | } |
1676 | EXPORT_SYMBOL_GPL(gpiochip_generic_free); | |
1677 | ||
2956b5d9 MW |
1678 | /** |
1679 | * gpiochip_generic_config() - apply configuration for a pin | |
a0b66a73 | 1680 | * @gc: the gpiochip owning the GPIO |
2956b5d9 MW |
1681 | * @offset: the offset of the GPIO to apply the configuration |
1682 | * @config: the configuration to be applied | |
1683 | */ | |
13daf489 | 1684 | int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset, |
2956b5d9 MW |
1685 | unsigned long config) |
1686 | { | |
a0b66a73 | 1687 | return pinctrl_gpio_set_config(gc->gpiodev->base + offset, config); |
2956b5d9 MW |
1688 | } |
1689 | EXPORT_SYMBOL_GPL(gpiochip_generic_config); | |
1690 | ||
f23f1516 | 1691 | #ifdef CONFIG_PINCTRL |
165adc9c | 1692 | |
586a87e6 CR |
1693 | /** |
1694 | * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping | |
a0b66a73 | 1695 | * @gc: the gpiochip to add the range for |
d32651f6 | 1696 | * @pctldev: the pin controller to map to |
586a87e6 CR |
1697 | * @gpio_offset: the start offset in the current gpio_chip number space |
1698 | * @pin_group: name of the pin group inside the pin controller | |
973c1714 CL |
1699 | * |
1700 | * Calling this function directly from a DeviceTree-supported | |
1701 | * pinctrl driver is DEPRECATED. Please see Section 2.1 of | |
1702 | * Documentation/devicetree/bindings/gpio/gpio.txt on how to | |
1703 | * bind pinctrl and gpio drivers via the "gpio-ranges" property. | |
586a87e6 | 1704 | */ |
a0b66a73 | 1705 | int gpiochip_add_pingroup_range(struct gpio_chip *gc, |
586a87e6 CR |
1706 | struct pinctrl_dev *pctldev, |
1707 | unsigned int gpio_offset, const char *pin_group) | |
1708 | { | |
1709 | struct gpio_pin_range *pin_range; | |
a0b66a73 | 1710 | struct gpio_device *gdev = gc->gpiodev; |
586a87e6 CR |
1711 | int ret; |
1712 | ||
1713 | pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL); | |
1714 | if (!pin_range) { | |
a0b66a73 | 1715 | chip_err(gc, "failed to allocate pin ranges\n"); |
586a87e6 CR |
1716 | return -ENOMEM; |
1717 | } | |
1718 | ||
1719 | /* Use local offset as range ID */ | |
1720 | pin_range->range.id = gpio_offset; | |
a0b66a73 LW |
1721 | pin_range->range.gc = gc; |
1722 | pin_range->range.name = gc->label; | |
fdeb8e15 | 1723 | pin_range->range.base = gdev->base + gpio_offset; |
586a87e6 CR |
1724 | pin_range->pctldev = pctldev; |
1725 | ||
1726 | ret = pinctrl_get_group_pins(pctldev, pin_group, | |
1727 | &pin_range->range.pins, | |
1728 | &pin_range->range.npins); | |
61c6375d MN |
1729 | if (ret < 0) { |
1730 | kfree(pin_range); | |
586a87e6 | 1731 | return ret; |
61c6375d | 1732 | } |
586a87e6 CR |
1733 | |
1734 | pinctrl_add_gpio_range(pctldev, &pin_range->range); | |
1735 | ||
a0b66a73 | 1736 | chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n", |
1a2a99c6 | 1737 | gpio_offset, gpio_offset + pin_range->range.npins - 1, |
586a87e6 CR |
1738 | pinctrl_dev_get_devname(pctldev), pin_group); |
1739 | ||
20ec3e39 | 1740 | list_add_tail(&pin_range->node, &gdev->pin_ranges); |
586a87e6 CR |
1741 | |
1742 | return 0; | |
1743 | } | |
1744 | EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range); | |
1745 | ||
3f0f8670 LW |
1746 | /** |
1747 | * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping | |
a0b66a73 | 1748 | * @gc: the gpiochip to add the range for |
950d55f5 | 1749 | * @pinctl_name: the dev_name() of the pin controller to map to |
316511c0 LW |
1750 | * @gpio_offset: the start offset in the current gpio_chip number space |
1751 | * @pin_offset: the start offset in the pin controller number space | |
3f0f8670 LW |
1752 | * @npins: the number of pins from the offset of each pin space (GPIO and |
1753 | * pin controller) to accumulate in this range | |
950d55f5 TR |
1754 | * |
1755 | * Returns: | |
1756 | * 0 on success, or a negative error-code on failure. | |
973c1714 CL |
1757 | * |
1758 | * Calling this function directly from a DeviceTree-supported | |
1759 | * pinctrl driver is DEPRECATED. Please see Section 2.1 of | |
1760 | * Documentation/devicetree/bindings/gpio/gpio.txt on how to | |
1761 | * bind pinctrl and gpio drivers via the "gpio-ranges" property. | |
3f0f8670 | 1762 | */ |
a0b66a73 | 1763 | int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name, |
316511c0 | 1764 | unsigned int gpio_offset, unsigned int pin_offset, |
3f0f8670 | 1765 | unsigned int npins) |
f23f1516 SH |
1766 | { |
1767 | struct gpio_pin_range *pin_range; | |
a0b66a73 | 1768 | struct gpio_device *gdev = gc->gpiodev; |
b4d4b1f0 | 1769 | int ret; |
f23f1516 | 1770 | |
3f0f8670 | 1771 | pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL); |
f23f1516 | 1772 | if (!pin_range) { |
a0b66a73 | 1773 | chip_err(gc, "failed to allocate pin ranges\n"); |
1e63d7b9 | 1774 | return -ENOMEM; |
f23f1516 SH |
1775 | } |
1776 | ||
3f0f8670 | 1777 | /* Use local offset as range ID */ |
316511c0 | 1778 | pin_range->range.id = gpio_offset; |
a0b66a73 LW |
1779 | pin_range->range.gc = gc; |
1780 | pin_range->range.name = gc->label; | |
fdeb8e15 | 1781 | pin_range->range.base = gdev->base + gpio_offset; |
316511c0 | 1782 | pin_range->range.pin_base = pin_offset; |
f23f1516 | 1783 | pin_range->range.npins = npins; |
192c369c | 1784 | pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name, |
f23f1516 | 1785 | &pin_range->range); |
8f23ca1a | 1786 | if (IS_ERR(pin_range->pctldev)) { |
b4d4b1f0 | 1787 | ret = PTR_ERR(pin_range->pctldev); |
a0b66a73 | 1788 | chip_err(gc, "could not create pin range\n"); |
3f0f8670 | 1789 | kfree(pin_range); |
b4d4b1f0 | 1790 | return ret; |
3f0f8670 | 1791 | } |
a0b66a73 | 1792 | chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n", |
1a2a99c6 | 1793 | gpio_offset, gpio_offset + npins - 1, |
316511c0 LW |
1794 | pinctl_name, |
1795 | pin_offset, pin_offset + npins - 1); | |
f23f1516 | 1796 | |
20ec3e39 | 1797 | list_add_tail(&pin_range->node, &gdev->pin_ranges); |
1e63d7b9 LW |
1798 | |
1799 | return 0; | |
f23f1516 | 1800 | } |
165adc9c | 1801 | EXPORT_SYMBOL_GPL(gpiochip_add_pin_range); |
f23f1516 | 1802 | |
3f0f8670 LW |
1803 | /** |
1804 | * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings | |
a0b66a73 | 1805 | * @gc: the chip to remove all the mappings for |
3f0f8670 | 1806 | */ |
a0b66a73 | 1807 | void gpiochip_remove_pin_ranges(struct gpio_chip *gc) |
f23f1516 SH |
1808 | { |
1809 | struct gpio_pin_range *pin_range, *tmp; | |
a0b66a73 | 1810 | struct gpio_device *gdev = gc->gpiodev; |
f23f1516 | 1811 | |
20ec3e39 | 1812 | list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) { |
f23f1516 SH |
1813 | list_del(&pin_range->node); |
1814 | pinctrl_remove_gpio_range(pin_range->pctldev, | |
1815 | &pin_range->range); | |
3f0f8670 | 1816 | kfree(pin_range); |
f23f1516 SH |
1817 | } |
1818 | } | |
165adc9c LW |
1819 | EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges); |
1820 | ||
1821 | #endif /* CONFIG_PINCTRL */ | |
f23f1516 | 1822 | |
d2876d08 DB |
1823 | /* These "optional" allocation calls help prevent drivers from stomping |
1824 | * on each other, and help provide better diagnostics in debugfs. | |
1825 | * They're called even less than the "set direction" calls. | |
1826 | */ | |
fac9d885 | 1827 | static int gpiod_request_commit(struct gpio_desc *desc, const char *label) |
d2876d08 | 1828 | { |
a0b66a73 | 1829 | struct gpio_chip *gc = desc->gdev->chip; |
d377f56f | 1830 | int ret; |
d2876d08 | 1831 | unsigned long flags; |
3789f5ac | 1832 | unsigned offset; |
d2876d08 | 1833 | |
18534df4 MS |
1834 | if (label) { |
1835 | label = kstrdup_const(label, GFP_KERNEL); | |
1836 | if (!label) | |
1837 | return -ENOMEM; | |
1838 | } | |
1839 | ||
bcabdef1 AC |
1840 | spin_lock_irqsave(&gpio_lock, flags); |
1841 | ||
d2876d08 | 1842 | /* NOTE: gpio_request() can be called in early boot, |
35e8bb51 | 1843 | * before IRQs are enabled, for non-sleeping (SOC) GPIOs. |
d2876d08 DB |
1844 | */ |
1845 | ||
1846 | if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) { | |
1847 | desc_set_label(desc, label ? : "?"); | |
438d8908 | 1848 | } else { |
d377f56f | 1849 | ret = -EBUSY; |
95d9f84f | 1850 | goto out_free_unlock; |
35e8bb51 DB |
1851 | } |
1852 | ||
a0b66a73 LW |
1853 | if (gc->request) { |
1854 | /* gc->request may sleep */ | |
35e8bb51 | 1855 | spin_unlock_irqrestore(&gpio_lock, flags); |
3789f5ac | 1856 | offset = gpio_chip_hwgpio(desc); |
a0b66a73 LW |
1857 | if (gpiochip_line_is_valid(gc, offset)) |
1858 | ret = gc->request(gc, offset); | |
3789f5ac | 1859 | else |
d377f56f | 1860 | ret = -EINVAL; |
35e8bb51 DB |
1861 | spin_lock_irqsave(&gpio_lock, flags); |
1862 | ||
8bbff39c | 1863 | if (ret) { |
35e8bb51 | 1864 | desc_set_label(desc, NULL); |
35e8bb51 | 1865 | clear_bit(FLAG_REQUESTED, &desc->flags); |
95d9f84f | 1866 | goto out_free_unlock; |
35e8bb51 | 1867 | } |
438d8908 | 1868 | } |
a0b66a73 LW |
1869 | if (gc->get_direction) { |
1870 | /* gc->get_direction may sleep */ | |
80b0a602 | 1871 | spin_unlock_irqrestore(&gpio_lock, flags); |
372e722e | 1872 | gpiod_get_direction(desc); |
80b0a602 MN |
1873 | spin_lock_irqsave(&gpio_lock, flags); |
1874 | } | |
77c2d792 | 1875 | spin_unlock_irqrestore(&gpio_lock, flags); |
95d9f84f AS |
1876 | return 0; |
1877 | ||
1878 | out_free_unlock: | |
1879 | spin_unlock_irqrestore(&gpio_lock, flags); | |
1880 | kfree_const(label); | |
d377f56f | 1881 | return ret; |
77c2d792 MW |
1882 | } |
1883 | ||
fdeb8e15 LW |
1884 | /* |
1885 | * This descriptor validation needs to be inserted verbatim into each | |
1886 | * function taking a descriptor, so we need to use a preprocessor | |
54d77198 LW |
1887 | * macro to avoid endless duplication. If the desc is NULL it is an |
1888 | * optional GPIO and calls should just bail out. | |
fdeb8e15 | 1889 | */ |
a746a232 RV |
1890 | static int validate_desc(const struct gpio_desc *desc, const char *func) |
1891 | { | |
1892 | if (!desc) | |
1893 | return 0; | |
1894 | if (IS_ERR(desc)) { | |
1895 | pr_warn("%s: invalid GPIO (errorpointer)\n", func); | |
1896 | return PTR_ERR(desc); | |
1897 | } | |
1898 | if (!desc->gdev) { | |
1899 | pr_warn("%s: invalid GPIO (no device)\n", func); | |
1900 | return -EINVAL; | |
1901 | } | |
1902 | if (!desc->gdev->chip) { | |
1903 | dev_warn(&desc->gdev->dev, | |
1904 | "%s: backing chip is gone\n", func); | |
1905 | return 0; | |
1906 | } | |
1907 | return 1; | |
1908 | } | |
1909 | ||
fdeb8e15 | 1910 | #define VALIDATE_DESC(desc) do { \ |
a746a232 RV |
1911 | int __valid = validate_desc(desc, __func__); \ |
1912 | if (__valid <= 0) \ | |
1913 | return __valid; \ | |
1914 | } while (0) | |
fdeb8e15 LW |
1915 | |
1916 | #define VALIDATE_DESC_VOID(desc) do { \ | |
a746a232 RV |
1917 | int __valid = validate_desc(desc, __func__); \ |
1918 | if (__valid <= 0) \ | |
fdeb8e15 | 1919 | return; \ |
a746a232 | 1920 | } while (0) |
fdeb8e15 | 1921 | |
0eb4c6c2 | 1922 | int gpiod_request(struct gpio_desc *desc, const char *label) |
77c2d792 | 1923 | { |
d377f56f | 1924 | int ret = -EPROBE_DEFER; |
fdeb8e15 | 1925 | struct gpio_device *gdev; |
77c2d792 | 1926 | |
fdeb8e15 LW |
1927 | VALIDATE_DESC(desc); |
1928 | gdev = desc->gdev; | |
77c2d792 | 1929 | |
fdeb8e15 | 1930 | if (try_module_get(gdev->owner)) { |
d377f56f | 1931 | ret = gpiod_request_commit(desc, label); |
8bbff39c | 1932 | if (ret) |
fdeb8e15 | 1933 | module_put(gdev->owner); |
33a68e86 LW |
1934 | else |
1935 | get_device(&gdev->dev); | |
77c2d792 MW |
1936 | } |
1937 | ||
d377f56f LW |
1938 | if (ret) |
1939 | gpiod_dbg(desc, "%s: status %d\n", __func__, ret); | |
77c2d792 | 1940 | |
d377f56f | 1941 | return ret; |
d2876d08 | 1942 | } |
372e722e | 1943 | |
fac9d885 | 1944 | static bool gpiod_free_commit(struct gpio_desc *desc) |
d2876d08 | 1945 | { |
77c2d792 | 1946 | bool ret = false; |
d2876d08 | 1947 | unsigned long flags; |
a0b66a73 | 1948 | struct gpio_chip *gc; |
d2876d08 | 1949 | |
3d599d1c UKK |
1950 | might_sleep(); |
1951 | ||
372e722e | 1952 | gpiod_unexport(desc); |
d8f388d8 | 1953 | |
d2876d08 DB |
1954 | spin_lock_irqsave(&gpio_lock, flags); |
1955 | ||
a0b66a73 LW |
1956 | gc = desc->gdev->chip; |
1957 | if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) { | |
1958 | if (gc->free) { | |
35e8bb51 | 1959 | spin_unlock_irqrestore(&gpio_lock, flags); |
a0b66a73 LW |
1960 | might_sleep_if(gc->can_sleep); |
1961 | gc->free(gc, gpio_chip_hwgpio(desc)); | |
35e8bb51 DB |
1962 | spin_lock_irqsave(&gpio_lock, flags); |
1963 | } | |
18534df4 | 1964 | kfree_const(desc->label); |
d2876d08 | 1965 | desc_set_label(desc, NULL); |
07697461 | 1966 | clear_bit(FLAG_ACTIVE_LOW, &desc->flags); |
35e8bb51 | 1967 | clear_bit(FLAG_REQUESTED, &desc->flags); |
aca5ce14 | 1968 | clear_bit(FLAG_OPEN_DRAIN, &desc->flags); |
25553ff0 | 1969 | clear_bit(FLAG_OPEN_SOURCE, &desc->flags); |
9225d516 DF |
1970 | clear_bit(FLAG_PULL_UP, &desc->flags); |
1971 | clear_bit(FLAG_PULL_DOWN, &desc->flags); | |
2148ad77 | 1972 | clear_bit(FLAG_BIAS_DISABLE, &desc->flags); |
73e03419 KG |
1973 | clear_bit(FLAG_EDGE_RISING, &desc->flags); |
1974 | clear_bit(FLAG_EDGE_FALLING, &desc->flags); | |
f625d460 | 1975 | clear_bit(FLAG_IS_HOGGED, &desc->flags); |
63636d95 GU |
1976 | #ifdef CONFIG_OF_DYNAMIC |
1977 | desc->hog = NULL; | |
65cff704 KG |
1978 | #endif |
1979 | #ifdef CONFIG_GPIO_CDEV | |
1980 | WRITE_ONCE(desc->debounce_period_us, 0); | |
63636d95 | 1981 | #endif |
77c2d792 MW |
1982 | ret = true; |
1983 | } | |
d2876d08 DB |
1984 | |
1985 | spin_unlock_irqrestore(&gpio_lock, flags); | |
6accc376 KG |
1986 | blocking_notifier_call_chain(&desc->gdev->notifier, |
1987 | GPIOLINE_CHANGED_RELEASED, desc); | |
51c1064e | 1988 | |
77c2d792 MW |
1989 | return ret; |
1990 | } | |
1991 | ||
0eb4c6c2 | 1992 | void gpiod_free(struct gpio_desc *desc) |
77c2d792 | 1993 | { |
fac9d885 | 1994 | if (desc && desc->gdev && gpiod_free_commit(desc)) { |
fdeb8e15 | 1995 | module_put(desc->gdev->owner); |
33a68e86 LW |
1996 | put_device(&desc->gdev->dev); |
1997 | } else { | |
77c2d792 | 1998 | WARN_ON(extra_checks); |
33a68e86 | 1999 | } |
d2876d08 | 2000 | } |
372e722e | 2001 | |
d2876d08 DB |
2002 | /** |
2003 | * gpiochip_is_requested - return string iff signal was requested | |
a0b66a73 | 2004 | * @gc: controller managing the signal |
d2876d08 DB |
2005 | * @offset: of signal within controller's 0..(ngpio - 1) range |
2006 | * | |
2007 | * Returns NULL if the GPIO is not currently requested, else a string. | |
9c8318ff AC |
2008 | * The string returned is the label passed to gpio_request(); if none has been |
2009 | * passed it is a meaningless, non-NULL constant. | |
d2876d08 DB |
2010 | * |
2011 | * This function is for use by GPIO controller drivers. The label can | |
2012 | * help with diagnostics, and knowing that the signal is used as a GPIO | |
2013 | * can help avoid accidentally multiplexing it to another controller. | |
2014 | */ | |
13daf489 | 2015 | const char *gpiochip_is_requested(struct gpio_chip *gc, unsigned int offset) |
d2876d08 | 2016 | { |
6c0b4e6c | 2017 | struct gpio_desc *desc; |
d2876d08 | 2018 | |
a0b66a73 | 2019 | if (offset >= gc->ngpio) |
d2876d08 | 2020 | return NULL; |
6c0b4e6c | 2021 | |
a0b66a73 | 2022 | desc = gpiochip_get_desc(gc, offset); |
1739a2d8 BG |
2023 | if (IS_ERR(desc)) |
2024 | return NULL; | |
6c0b4e6c | 2025 | |
372e722e | 2026 | if (test_bit(FLAG_REQUESTED, &desc->flags) == 0) |
d2876d08 | 2027 | return NULL; |
372e722e | 2028 | return desc->label; |
d2876d08 DB |
2029 | } |
2030 | EXPORT_SYMBOL_GPL(gpiochip_is_requested); | |
2031 | ||
77c2d792 MW |
2032 | /** |
2033 | * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor | |
a0b66a73 | 2034 | * @gc: GPIO chip |
950d55f5 | 2035 | * @hwnum: hardware number of the GPIO for which to request the descriptor |
77c2d792 | 2036 | * @label: label for the GPIO |
5923ea6c LW |
2037 | * @lflags: lookup flags for this GPIO or 0 if default, this can be used to |
2038 | * specify things like line inversion semantics with the machine flags | |
2039 | * such as GPIO_OUT_LOW | |
2040 | * @dflags: descriptor request flags for this GPIO or 0 if default, this | |
2041 | * can be used to specify consumer semantics such as open drain | |
77c2d792 MW |
2042 | * |
2043 | * Function allows GPIO chip drivers to request and use their own GPIO | |
2044 | * descriptors via gpiolib API. Difference to gpiod_request() is that this | |
2045 | * function will not increase reference count of the GPIO chip module. This | |
2046 | * allows the GPIO chip module to be unloaded as needed (we assume that the | |
2047 | * GPIO chip driver handles freeing the GPIOs it has requested). | |
950d55f5 TR |
2048 | * |
2049 | * Returns: | |
2050 | * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error | |
2051 | * code on failure. | |
77c2d792 | 2052 | */ |
a0b66a73 | 2053 | struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc, |
06863620 | 2054 | unsigned int hwnum, |
21abf103 | 2055 | const char *label, |
5923ea6c LW |
2056 | enum gpio_lookup_flags lflags, |
2057 | enum gpiod_flags dflags) | |
77c2d792 | 2058 | { |
a0b66a73 | 2059 | struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum); |
d377f56f | 2060 | int ret; |
77c2d792 | 2061 | |
abdc08a3 | 2062 | if (IS_ERR(desc)) { |
a0b66a73 | 2063 | chip_err(gc, "failed to get GPIO descriptor\n"); |
abdc08a3 AC |
2064 | return desc; |
2065 | } | |
2066 | ||
d377f56f LW |
2067 | ret = gpiod_request_commit(desc, label); |
2068 | if (ret < 0) | |
2069 | return ERR_PTR(ret); | |
77c2d792 | 2070 | |
d377f56f LW |
2071 | ret = gpiod_configure_flags(desc, label, lflags, dflags); |
2072 | if (ret) { | |
a0b66a73 | 2073 | chip_err(gc, "setup of own GPIO %s failed\n", label); |
21abf103 | 2074 | gpiod_free_commit(desc); |
d377f56f | 2075 | return ERR_PTR(ret); |
21abf103 LW |
2076 | } |
2077 | ||
abdc08a3 | 2078 | return desc; |
77c2d792 | 2079 | } |
f7d4ad98 | 2080 | EXPORT_SYMBOL_GPL(gpiochip_request_own_desc); |
77c2d792 MW |
2081 | |
2082 | /** | |
2083 | * gpiochip_free_own_desc - Free GPIO requested by the chip driver | |
2084 | * @desc: GPIO descriptor to free | |
2085 | * | |
2086 | * Function frees the given GPIO requested previously with | |
2087 | * gpiochip_request_own_desc(). | |
2088 | */ | |
2089 | void gpiochip_free_own_desc(struct gpio_desc *desc) | |
2090 | { | |
2091 | if (desc) | |
fac9d885 | 2092 | gpiod_free_commit(desc); |
77c2d792 | 2093 | } |
f7d4ad98 | 2094 | EXPORT_SYMBOL_GPL(gpiochip_free_own_desc); |
d2876d08 | 2095 | |
fdeb8e15 LW |
2096 | /* |
2097 | * Drivers MUST set GPIO direction before making get/set calls. In | |
d2876d08 DB |
2098 | * some cases this is done in early boot, before IRQs are enabled. |
2099 | * | |
2100 | * As a rule these aren't called more than once (except for drivers | |
2101 | * using the open-drain emulation idiom) so these are natural places | |
2102 | * to accumulate extra debugging checks. Note that we can't (yet) | |
2103 | * rely on gpio_request() having been called beforehand. | |
2104 | */ | |
2105 | ||
d99f8876 | 2106 | static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset, |
62adc6f3 | 2107 | unsigned long config) |
71479789 | 2108 | { |
d90f3685 BG |
2109 | if (!gc->set_config) |
2110 | return -ENOTSUPP; | |
542f3615 | 2111 | |
62adc6f3 | 2112 | return gc->set_config(gc, offset, config); |
71479789 TP |
2113 | } |
2114 | ||
0c4d8666 AS |
2115 | static int gpio_set_config_with_argument(struct gpio_desc *desc, |
2116 | enum pin_config_param mode, | |
2117 | u32 argument) | |
d99f8876 | 2118 | { |
a0b66a73 | 2119 | struct gpio_chip *gc = desc->gdev->chip; |
91b4ea5f | 2120 | unsigned long config; |
0c4d8666 AS |
2121 | |
2122 | config = pinconf_to_config_packed(mode, argument); | |
2123 | return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config); | |
2124 | } | |
2125 | ||
baca3b15 AS |
2126 | static int gpio_set_config_with_argument_optional(struct gpio_desc *desc, |
2127 | enum pin_config_param mode, | |
2128 | u32 argument) | |
2129 | { | |
2130 | struct device *dev = &desc->gdev->dev; | |
2131 | int gpio = gpio_chip_hwgpio(desc); | |
2132 | int ret; | |
2133 | ||
2134 | ret = gpio_set_config_with_argument(desc, mode, argument); | |
2135 | if (ret != -ENOTSUPP) | |
2136 | return ret; | |
d99f8876 BG |
2137 | |
2138 | switch (mode) { | |
baca3b15 AS |
2139 | case PIN_CONFIG_PERSIST_STATE: |
2140 | dev_dbg(dev, "Persistence not supported for GPIO %d\n", gpio); | |
d99f8876 | 2141 | break; |
d99f8876 | 2142 | default: |
baca3b15 | 2143 | break; |
d99f8876 BG |
2144 | } |
2145 | ||
baca3b15 AS |
2146 | return 0; |
2147 | } | |
2148 | ||
0c4d8666 AS |
2149 | static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode) |
2150 | { | |
6aa32ad7 | 2151 | return gpio_set_config_with_argument(desc, mode, 0); |
d99f8876 BG |
2152 | } |
2153 | ||
5f4bf171 | 2154 | static int gpio_set_bias(struct gpio_desc *desc) |
2148ad77 | 2155 | { |
9ef6293c | 2156 | enum pin_config_param bias; |
6aa32ad7 | 2157 | unsigned int arg; |
2148ad77 KG |
2158 | |
2159 | if (test_bit(FLAG_BIAS_DISABLE, &desc->flags)) | |
2160 | bias = PIN_CONFIG_BIAS_DISABLE; | |
2161 | else if (test_bit(FLAG_PULL_UP, &desc->flags)) | |
2162 | bias = PIN_CONFIG_BIAS_PULL_UP; | |
2163 | else if (test_bit(FLAG_PULL_DOWN, &desc->flags)) | |
2164 | bias = PIN_CONFIG_BIAS_PULL_DOWN; | |
9ef6293c AS |
2165 | else |
2166 | return 0; | |
2148ad77 | 2167 | |
6aa32ad7 AS |
2168 | switch (bias) { |
2169 | case PIN_CONFIG_BIAS_PULL_DOWN: | |
2170 | case PIN_CONFIG_BIAS_PULL_UP: | |
2171 | arg = 1; | |
2172 | break; | |
2173 | ||
2174 | default: | |
2175 | arg = 0; | |
2176 | break; | |
2148ad77 | 2177 | } |
6aa32ad7 | 2178 | |
baca3b15 | 2179 | return gpio_set_config_with_argument_optional(desc, bias, arg); |
2148ad77 KG |
2180 | } |
2181 | ||
f725edd8 AS |
2182 | int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce) |
2183 | { | |
2184 | return gpio_set_config_with_argument_optional(desc, | |
2185 | PIN_CONFIG_INPUT_DEBOUNCE, | |
2186 | debounce); | |
2148ad77 KG |
2187 | } |
2188 | ||
79a9becd AC |
2189 | /** |
2190 | * gpiod_direction_input - set the GPIO direction to input | |
2191 | * @desc: GPIO to set to input | |
2192 | * | |
2193 | * Set the direction of the passed GPIO to input, such as gpiod_get_value() can | |
2194 | * be called safely on it. | |
2195 | * | |
2196 | * Return 0 in case of success, else an error code. | |
2197 | */ | |
2198 | int gpiod_direction_input(struct gpio_desc *desc) | |
d2876d08 | 2199 | { |
a0b66a73 | 2200 | struct gpio_chip *gc; |
d377f56f | 2201 | int ret = 0; |
d2876d08 | 2202 | |
fdeb8e15 | 2203 | VALIDATE_DESC(desc); |
a0b66a73 | 2204 | gc = desc->gdev->chip; |
bcabdef1 | 2205 | |
e48d194d LW |
2206 | /* |
2207 | * It is legal to have no .get() and .direction_input() specified if | |
2208 | * the chip is output-only, but you can't specify .direction_input() | |
2209 | * and not support the .get() operation, that doesn't make sense. | |
2210 | */ | |
a0b66a73 | 2211 | if (!gc->get && gc->direction_input) { |
6424de5a | 2212 | gpiod_warn(desc, |
e48d194d LW |
2213 | "%s: missing get() but have direction_input()\n", |
2214 | __func__); | |
be1a4b13 LW |
2215 | return -EIO; |
2216 | } | |
2217 | ||
e48d194d LW |
2218 | /* |
2219 | * If we have a .direction_input() callback, things are simple, | |
2220 | * just call it. Else we are some input-only chip so try to check the | |
2221 | * direction (if .get_direction() is supported) else we silently | |
2222 | * assume we are in input mode after this. | |
2223 | */ | |
a0b66a73 LW |
2224 | if (gc->direction_input) { |
2225 | ret = gc->direction_input(gc, gpio_chip_hwgpio(desc)); | |
2226 | } else if (gc->get_direction && | |
2227 | (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) { | |
ae9847f4 | 2228 | gpiod_warn(desc, |
e48d194d LW |
2229 | "%s: missing direction_input() operation and line is output\n", |
2230 | __func__); | |
ae9847f4 RRD |
2231 | return -EIO; |
2232 | } | |
2148ad77 | 2233 | if (ret == 0) { |
d2876d08 | 2234 | clear_bit(FLAG_IS_OUT, &desc->flags); |
5f4bf171 | 2235 | ret = gpio_set_bias(desc); |
2148ad77 | 2236 | } |
d449991c | 2237 | |
d377f56f | 2238 | trace_gpio_direction(desc_to_gpio(desc), 1, ret); |
d82da797 | 2239 | |
d377f56f | 2240 | return ret; |
d2876d08 | 2241 | } |
79a9becd | 2242 | EXPORT_SYMBOL_GPL(gpiod_direction_input); |
372e722e | 2243 | |
fac9d885 | 2244 | static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value) |
d2876d08 | 2245 | { |
c663e5f5 | 2246 | struct gpio_chip *gc = desc->gdev->chip; |
ad17731d | 2247 | int val = !!value; |
ae9847f4 | 2248 | int ret = 0; |
d2876d08 | 2249 | |
e48d194d LW |
2250 | /* |
2251 | * It's OK not to specify .direction_output() if the gpiochip is | |
2252 | * output-only, but if there is then not even a .set() operation it | |
2253 | * is pretty tricky to drive the output line. | |
2254 | */ | |
ae9847f4 | 2255 | if (!gc->set && !gc->direction_output) { |
6424de5a | 2256 | gpiod_warn(desc, |
e48d194d LW |
2257 | "%s: missing set() and direction_output() operations\n", |
2258 | __func__); | |
be1a4b13 LW |
2259 | return -EIO; |
2260 | } | |
2261 | ||
ae9847f4 RRD |
2262 | if (gc->direction_output) { |
2263 | ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val); | |
2264 | } else { | |
e48d194d | 2265 | /* Check that we are in output mode if we can */ |
ae9847f4 RRD |
2266 | if (gc->get_direction && |
2267 | gc->get_direction(gc, gpio_chip_hwgpio(desc))) { | |
2268 | gpiod_warn(desc, | |
2269 | "%s: missing direction_output() operation\n", | |
2270 | __func__); | |
2271 | return -EIO; | |
2272 | } | |
e48d194d LW |
2273 | /* |
2274 | * If we can't actively set the direction, we are some | |
2275 | * output-only chip, so just drive the output as desired. | |
2276 | */ | |
ae9847f4 RRD |
2277 | gc->set(gc, gpio_chip_hwgpio(desc), val); |
2278 | } | |
2279 | ||
c663e5f5 | 2280 | if (!ret) |
d2876d08 | 2281 | set_bit(FLAG_IS_OUT, &desc->flags); |
ad17731d | 2282 | trace_gpio_value(desc_to_gpio(desc), 0, val); |
c663e5f5 LW |
2283 | trace_gpio_direction(desc_to_gpio(desc), 0, ret); |
2284 | return ret; | |
d2876d08 | 2285 | } |
ef70bbe1 PZ |
2286 | |
2287 | /** | |
2288 | * gpiod_direction_output_raw - set the GPIO direction to output | |
2289 | * @desc: GPIO to set to output | |
2290 | * @value: initial output value of the GPIO | |
2291 | * | |
2292 | * Set the direction of the passed GPIO to output, such as gpiod_set_value() can | |
2293 | * be called safely on it. The initial value of the output must be specified | |
2294 | * as raw value on the physical line without regard for the ACTIVE_LOW status. | |
2295 | * | |
2296 | * Return 0 in case of success, else an error code. | |
2297 | */ | |
2298 | int gpiod_direction_output_raw(struct gpio_desc *desc, int value) | |
2299 | { | |
fdeb8e15 | 2300 | VALIDATE_DESC(desc); |
fac9d885 | 2301 | return gpiod_direction_output_raw_commit(desc, value); |
ef70bbe1 PZ |
2302 | } |
2303 | EXPORT_SYMBOL_GPL(gpiod_direction_output_raw); | |
2304 | ||
2305 | /** | |
90df4fe0 | 2306 | * gpiod_direction_output - set the GPIO direction to output |
ef70bbe1 PZ |
2307 | * @desc: GPIO to set to output |
2308 | * @value: initial output value of the GPIO | |
2309 | * | |
2310 | * Set the direction of the passed GPIO to output, such as gpiod_set_value() can | |
2311 | * be called safely on it. The initial value of the output must be specified | |
2312 | * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into | |
2313 | * account. | |
2314 | * | |
2315 | * Return 0 in case of success, else an error code. | |
2316 | */ | |
2317 | int gpiod_direction_output(struct gpio_desc *desc, int value) | |
2318 | { | |
02e47980 LW |
2319 | int ret; |
2320 | ||
fdeb8e15 | 2321 | VALIDATE_DESC(desc); |
ef70bbe1 PZ |
2322 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
2323 | value = !value; | |
ad17731d LW |
2324 | else |
2325 | value = !!value; | |
02e47980 | 2326 | |
4e9439dd HV |
2327 | /* GPIOs used for enabled IRQs shall not be set as output */ |
2328 | if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) && | |
2329 | test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) { | |
02e47980 LW |
2330 | gpiod_err(desc, |
2331 | "%s: tried to set a GPIO tied to an IRQ as output\n", | |
2332 | __func__); | |
2333 | return -EIO; | |
2334 | } | |
2335 | ||
2336 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) { | |
2337 | /* First see if we can enable open drain in hardware */ | |
83522358 | 2338 | ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN); |
02e47980 LW |
2339 | if (!ret) |
2340 | goto set_output_value; | |
2341 | /* Emulate open drain by not actively driving the line high */ | |
e735244e BG |
2342 | if (value) { |
2343 | ret = gpiod_direction_input(desc); | |
2344 | goto set_output_flag; | |
2345 | } | |
02e47980 LW |
2346 | } |
2347 | else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) { | |
83522358 | 2348 | ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE); |
02e47980 LW |
2349 | if (!ret) |
2350 | goto set_output_value; | |
2351 | /* Emulate open source by not actively driving the line low */ | |
e735244e BG |
2352 | if (!value) { |
2353 | ret = gpiod_direction_input(desc); | |
2354 | goto set_output_flag; | |
2355 | } | |
02e47980 | 2356 | } else { |
83522358 | 2357 | gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL); |
02e47980 LW |
2358 | } |
2359 | ||
2360 | set_output_value: | |
5f4bf171 | 2361 | ret = gpio_set_bias(desc); |
2821ae5f KG |
2362 | if (ret) |
2363 | return ret; | |
fac9d885 | 2364 | return gpiod_direction_output_raw_commit(desc, value); |
e735244e BG |
2365 | |
2366 | set_output_flag: | |
2367 | /* | |
2368 | * When emulating open-source or open-drain functionalities by not | |
2369 | * actively driving the line (setting mode to input) we still need to | |
2370 | * set the IS_OUT flag or otherwise we won't be able to set the line | |
2371 | * value anymore. | |
2372 | */ | |
2373 | if (ret == 0) | |
2374 | set_bit(FLAG_IS_OUT, &desc->flags); | |
2375 | return ret; | |
ef70bbe1 | 2376 | } |
79a9becd | 2377 | EXPORT_SYMBOL_GPL(gpiod_direction_output); |
d2876d08 | 2378 | |
8ced32ff GU |
2379 | /** |
2380 | * gpiod_set_config - sets @config for a GPIO | |
2381 | * @desc: descriptor of the GPIO for which to set the configuration | |
2382 | * @config: Same packed config format as generic pinconf | |
2383 | * | |
2384 | * Returns: | |
2385 | * 0 on success, %-ENOTSUPP if the controller doesn't support setting the | |
2386 | * configuration. | |
2387 | */ | |
2388 | int gpiod_set_config(struct gpio_desc *desc, unsigned long config) | |
2389 | { | |
a0b66a73 | 2390 | struct gpio_chip *gc; |
8ced32ff GU |
2391 | |
2392 | VALIDATE_DESC(desc); | |
a0b66a73 | 2393 | gc = desc->gdev->chip; |
8ced32ff | 2394 | |
a0b66a73 | 2395 | return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config); |
8ced32ff GU |
2396 | } |
2397 | EXPORT_SYMBOL_GPL(gpiod_set_config); | |
2398 | ||
c4b5be98 | 2399 | /** |
950d55f5 TR |
2400 | * gpiod_set_debounce - sets @debounce time for a GPIO |
2401 | * @desc: descriptor of the GPIO for which to set debounce time | |
2402 | * @debounce: debounce time in microseconds | |
65d87656 | 2403 | * |
950d55f5 TR |
2404 | * Returns: |
2405 | * 0 on success, %-ENOTSUPP if the controller doesn't support setting the | |
2406 | * debounce time. | |
c4b5be98 | 2407 | */ |
13daf489 | 2408 | int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce) |
c4b5be98 | 2409 | { |
8ced32ff | 2410 | unsigned long config; |
be1a4b13 | 2411 | |
2956b5d9 | 2412 | config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce); |
8ced32ff | 2413 | return gpiod_set_config(desc, config); |
c4b5be98 | 2414 | } |
79a9becd | 2415 | EXPORT_SYMBOL_GPL(gpiod_set_debounce); |
372e722e | 2416 | |
e10f72bf AJ |
2417 | /** |
2418 | * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset | |
2419 | * @desc: descriptor of the GPIO for which to configure persistence | |
2420 | * @transitory: True to lose state on suspend or reset, false for persistence | |
2421 | * | |
2422 | * Returns: | |
2423 | * 0 on success, otherwise a negative error code. | |
2424 | */ | |
2425 | int gpiod_set_transitory(struct gpio_desc *desc, bool transitory) | |
2426 | { | |
156dd392 | 2427 | VALIDATE_DESC(desc); |
e10f72bf AJ |
2428 | /* |
2429 | * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for | |
2430 | * persistence state. | |
2431 | */ | |
4fc5bfeb | 2432 | assign_bit(FLAG_TRANSITORY, &desc->flags, transitory); |
e10f72bf AJ |
2433 | |
2434 | /* If the driver supports it, set the persistence state now */ | |
baca3b15 AS |
2435 | return gpio_set_config_with_argument_optional(desc, |
2436 | PIN_CONFIG_PERSIST_STATE, | |
2437 | !transitory); | |
e10f72bf AJ |
2438 | } |
2439 | EXPORT_SYMBOL_GPL(gpiod_set_transitory); | |
2440 | ||
79a9becd AC |
2441 | /** |
2442 | * gpiod_is_active_low - test whether a GPIO is active-low or not | |
2443 | * @desc: the gpio descriptor to test | |
2444 | * | |
2445 | * Returns 1 if the GPIO is active-low, 0 otherwise. | |
2446 | */ | |
2447 | int gpiod_is_active_low(const struct gpio_desc *desc) | |
372e722e | 2448 | { |
fdeb8e15 | 2449 | VALIDATE_DESC(desc); |
79a9becd | 2450 | return test_bit(FLAG_ACTIVE_LOW, &desc->flags); |
372e722e | 2451 | } |
79a9becd | 2452 | EXPORT_SYMBOL_GPL(gpiod_is_active_low); |
d2876d08 | 2453 | |
d3a5bcb4 MM |
2454 | /** |
2455 | * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not | |
2456 | * @desc: the gpio descriptor to change | |
2457 | */ | |
2458 | void gpiod_toggle_active_low(struct gpio_desc *desc) | |
2459 | { | |
2460 | VALIDATE_DESC_VOID(desc); | |
2461 | change_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
2462 | } | |
2463 | EXPORT_SYMBOL_GPL(gpiod_toggle_active_low); | |
2464 | ||
d2876d08 DB |
2465 | /* I/O calls are only valid after configuration completed; the relevant |
2466 | * "is this a valid GPIO" error checks should already have been done. | |
2467 | * | |
2468 | * "Get" operations are often inlinable as reading a pin value register, | |
2469 | * and masking the relevant bit in that register. | |
2470 | * | |
2471 | * When "set" operations are inlinable, they involve writing that mask to | |
2472 | * one register to set a low value, or a different register to set it high. | |
2473 | * Otherwise locking is needed, so there may be little value to inlining. | |
2474 | * | |
2475 | *------------------------------------------------------------------------ | |
2476 | * | |
2477 | * IMPORTANT!!! The hot paths -- get/set value -- assume that callers | |
2478 | * have requested the GPIO. That can include implicit requesting by | |
2479 | * a direction setting call. Marking a gpio as requested locks its chip | |
2480 | * in memory, guaranteeing that these table lookups need no more locking | |
2481 | * and that gpiochip_remove() will fail. | |
2482 | * | |
2483 | * REVISIT when debugging, consider adding some instrumentation to ensure | |
2484 | * that the GPIO was actually requested. | |
2485 | */ | |
2486 | ||
fac9d885 | 2487 | static int gpiod_get_raw_value_commit(const struct gpio_desc *desc) |
d2876d08 | 2488 | { |
a0b66a73 | 2489 | struct gpio_chip *gc; |
372e722e | 2490 | int offset; |
e20538b8 | 2491 | int value; |
d2876d08 | 2492 | |
a0b66a73 | 2493 | gc = desc->gdev->chip; |
372e722e | 2494 | offset = gpio_chip_hwgpio(desc); |
a0b66a73 | 2495 | value = gc->get ? gc->get(gc, offset) : -EIO; |
723a6303 | 2496 | value = value < 0 ? value : !!value; |
372e722e | 2497 | trace_gpio_value(desc_to_gpio(desc), 1, value); |
3f397c21 | 2498 | return value; |
d2876d08 | 2499 | } |
372e722e | 2500 | |
a0b66a73 | 2501 | static int gpio_chip_get_multiple(struct gpio_chip *gc, |
eec1d566 LW |
2502 | unsigned long *mask, unsigned long *bits) |
2503 | { | |
a0b66a73 LW |
2504 | if (gc->get_multiple) { |
2505 | return gc->get_multiple(gc, mask, bits); | |
2506 | } else if (gc->get) { | |
eec1d566 LW |
2507 | int i, value; |
2508 | ||
a0b66a73 LW |
2509 | for_each_set_bit(i, mask, gc->ngpio) { |
2510 | value = gc->get(gc, i); | |
eec1d566 LW |
2511 | if (value < 0) |
2512 | return value; | |
2513 | __assign_bit(i, bits, value); | |
2514 | } | |
2515 | return 0; | |
2516 | } | |
2517 | return -EIO; | |
2518 | } | |
2519 | ||
2520 | int gpiod_get_array_value_complex(bool raw, bool can_sleep, | |
2521 | unsigned int array_size, | |
2522 | struct gpio_desc **desc_array, | |
77588c14 | 2523 | struct gpio_array *array_info, |
b9762beb | 2524 | unsigned long *value_bitmap) |
eec1d566 | 2525 | { |
d377f56f | 2526 | int ret, i = 0; |
b17566a6 JK |
2527 | |
2528 | /* | |
2529 | * Validate array_info against desc_array and its size. | |
2530 | * It should immediately follow desc_array if both | |
2531 | * have been obtained from the same gpiod_get_array() call. | |
2532 | */ | |
2533 | if (array_info && array_info->desc == desc_array && | |
2534 | array_size <= array_info->size && | |
2535 | (void *)array_info == desc_array + array_info->size) { | |
2536 | if (!can_sleep) | |
2537 | WARN_ON(array_info->chip->can_sleep); | |
2538 | ||
d377f56f | 2539 | ret = gpio_chip_get_multiple(array_info->chip, |
b17566a6 JK |
2540 | array_info->get_mask, |
2541 | value_bitmap); | |
d377f56f LW |
2542 | if (ret) |
2543 | return ret; | |
b17566a6 JK |
2544 | |
2545 | if (!raw && !bitmap_empty(array_info->invert_mask, array_size)) | |
2546 | bitmap_xor(value_bitmap, value_bitmap, | |
2547 | array_info->invert_mask, array_size); | |
2548 | ||
b17566a6 | 2549 | i = find_first_zero_bit(array_info->get_mask, array_size); |
ae66eca0 AS |
2550 | if (i == array_size) |
2551 | return 0; | |
b17566a6 JK |
2552 | } else { |
2553 | array_info = NULL; | |
2554 | } | |
eec1d566 LW |
2555 | |
2556 | while (i < array_size) { | |
a0b66a73 | 2557 | struct gpio_chip *gc = desc_array[i]->gdev->chip; |
3027743f LA |
2558 | unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)]; |
2559 | unsigned long *mask, *bits; | |
c07ea8d0 | 2560 | int first, j; |
eec1d566 | 2561 | |
a0b66a73 | 2562 | if (likely(gc->ngpio <= FASTPATH_NGPIO)) { |
3027743f LA |
2563 | mask = fastpath; |
2564 | } else { | |
a0b66a73 | 2565 | mask = kmalloc_array(2 * BITS_TO_LONGS(gc->ngpio), |
3027743f LA |
2566 | sizeof(*mask), |
2567 | can_sleep ? GFP_KERNEL : GFP_ATOMIC); | |
2568 | if (!mask) | |
2569 | return -ENOMEM; | |
2570 | } | |
2571 | ||
a0b66a73 LW |
2572 | bits = mask + BITS_TO_LONGS(gc->ngpio); |
2573 | bitmap_zero(mask, gc->ngpio); | |
3027743f | 2574 | |
eec1d566 | 2575 | if (!can_sleep) |
a0b66a73 | 2576 | WARN_ON(gc->can_sleep); |
eec1d566 LW |
2577 | |
2578 | /* collect all inputs belonging to the same chip */ | |
2579 | first = i; | |
eec1d566 LW |
2580 | do { |
2581 | const struct gpio_desc *desc = desc_array[i]; | |
2582 | int hwgpio = gpio_chip_hwgpio(desc); | |
2583 | ||
2584 | __set_bit(hwgpio, mask); | |
2585 | i++; | |
b17566a6 JK |
2586 | |
2587 | if (array_info) | |
35ae7f96 JK |
2588 | i = find_next_zero_bit(array_info->get_mask, |
2589 | array_size, i); | |
eec1d566 | 2590 | } while ((i < array_size) && |
a0b66a73 | 2591 | (desc_array[i]->gdev->chip == gc)); |
eec1d566 | 2592 | |
a0b66a73 | 2593 | ret = gpio_chip_get_multiple(gc, mask, bits); |
3027743f LA |
2594 | if (ret) { |
2595 | if (mask != fastpath) | |
2596 | kfree(mask); | |
eec1d566 | 2597 | return ret; |
3027743f | 2598 | } |
eec1d566 | 2599 | |
b17566a6 | 2600 | for (j = first; j < i; ) { |
eec1d566 LW |
2601 | const struct gpio_desc *desc = desc_array[j]; |
2602 | int hwgpio = gpio_chip_hwgpio(desc); | |
2603 | int value = test_bit(hwgpio, bits); | |
2604 | ||
2605 | if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
2606 | value = !value; | |
b9762beb | 2607 | __assign_bit(j, value_bitmap, value); |
eec1d566 | 2608 | trace_gpio_value(desc_to_gpio(desc), 1, value); |
799d5eb4 | 2609 | j++; |
b17566a6 JK |
2610 | |
2611 | if (array_info) | |
35ae7f96 JK |
2612 | j = find_next_zero_bit(array_info->get_mask, i, |
2613 | j); | |
eec1d566 | 2614 | } |
3027743f LA |
2615 | |
2616 | if (mask != fastpath) | |
2617 | kfree(mask); | |
eec1d566 LW |
2618 | } |
2619 | return 0; | |
2620 | } | |
2621 | ||
d2876d08 | 2622 | /** |
79a9becd AC |
2623 | * gpiod_get_raw_value() - return a gpio's raw value |
2624 | * @desc: gpio whose value will be returned | |
d2876d08 | 2625 | * |
79a9becd | 2626 | * Return the GPIO's raw value, i.e. the value of the physical line disregarding |
e20538b8 | 2627 | * its ACTIVE_LOW status, or negative errno on failure. |
79a9becd | 2628 | * |
827a9b8b | 2629 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 2630 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 2631 | */ |
79a9becd | 2632 | int gpiod_get_raw_value(const struct gpio_desc *desc) |
d2876d08 | 2633 | { |
fdeb8e15 | 2634 | VALIDATE_DESC(desc); |
3285170f | 2635 | /* Should be using gpiod_get_raw_value_cansleep() */ |
fdeb8e15 | 2636 | WARN_ON(desc->gdev->chip->can_sleep); |
fac9d885 | 2637 | return gpiod_get_raw_value_commit(desc); |
d2876d08 | 2638 | } |
79a9becd | 2639 | EXPORT_SYMBOL_GPL(gpiod_get_raw_value); |
372e722e | 2640 | |
79a9becd AC |
2641 | /** |
2642 | * gpiod_get_value() - return a gpio's value | |
2643 | * @desc: gpio whose value will be returned | |
2644 | * | |
2645 | * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into | |
e20538b8 | 2646 | * account, or negative errno on failure. |
79a9becd | 2647 | * |
827a9b8b | 2648 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd AC |
2649 | * complain if the GPIO chip functions potentially sleep. |
2650 | */ | |
2651 | int gpiod_get_value(const struct gpio_desc *desc) | |
372e722e | 2652 | { |
79a9becd | 2653 | int value; |
fdeb8e15 LW |
2654 | |
2655 | VALIDATE_DESC(desc); | |
3285170f | 2656 | /* Should be using gpiod_get_value_cansleep() */ |
fdeb8e15 | 2657 | WARN_ON(desc->gdev->chip->can_sleep); |
79a9becd | 2658 | |
fac9d885 | 2659 | value = gpiod_get_raw_value_commit(desc); |
e20538b8 BA |
2660 | if (value < 0) |
2661 | return value; | |
2662 | ||
79a9becd AC |
2663 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
2664 | value = !value; | |
2665 | ||
2666 | return value; | |
372e722e | 2667 | } |
79a9becd | 2668 | EXPORT_SYMBOL_GPL(gpiod_get_value); |
d2876d08 | 2669 | |
eec1d566 LW |
2670 | /** |
2671 | * gpiod_get_raw_array_value() - read raw values from an array of GPIOs | |
b9762beb | 2672 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 2673 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 2674 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 2675 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
2676 | * |
2677 | * Read the raw values of the GPIOs, i.e. the values of the physical lines | |
2678 | * without regard for their ACTIVE_LOW status. Return 0 in case of success, | |
2679 | * else an error code. | |
2680 | * | |
827a9b8b | 2681 | * This function can be called from contexts where we cannot sleep, |
eec1d566 LW |
2682 | * and it will complain if the GPIO chip functions potentially sleep. |
2683 | */ | |
2684 | int gpiod_get_raw_array_value(unsigned int array_size, | |
b9762beb | 2685 | struct gpio_desc **desc_array, |
77588c14 | 2686 | struct gpio_array *array_info, |
b9762beb | 2687 | unsigned long *value_bitmap) |
eec1d566 LW |
2688 | { |
2689 | if (!desc_array) | |
2690 | return -EINVAL; | |
2691 | return gpiod_get_array_value_complex(true, false, array_size, | |
77588c14 JK |
2692 | desc_array, array_info, |
2693 | value_bitmap); | |
eec1d566 LW |
2694 | } |
2695 | EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value); | |
2696 | ||
2697 | /** | |
2698 | * gpiod_get_array_value() - read values from an array of GPIOs | |
b9762beb | 2699 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 2700 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 2701 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 2702 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
2703 | * |
2704 | * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
2705 | * into account. Return 0 in case of success, else an error code. | |
2706 | * | |
827a9b8b | 2707 | * This function can be called from contexts where we cannot sleep, |
eec1d566 LW |
2708 | * and it will complain if the GPIO chip functions potentially sleep. |
2709 | */ | |
2710 | int gpiod_get_array_value(unsigned int array_size, | |
b9762beb | 2711 | struct gpio_desc **desc_array, |
77588c14 | 2712 | struct gpio_array *array_info, |
b9762beb | 2713 | unsigned long *value_bitmap) |
eec1d566 LW |
2714 | { |
2715 | if (!desc_array) | |
2716 | return -EINVAL; | |
2717 | return gpiod_get_array_value_complex(false, false, array_size, | |
77588c14 JK |
2718 | desc_array, array_info, |
2719 | value_bitmap); | |
eec1d566 LW |
2720 | } |
2721 | EXPORT_SYMBOL_GPL(gpiod_get_array_value); | |
2722 | ||
aca5ce14 | 2723 | /* |
fac9d885 | 2724 | * gpio_set_open_drain_value_commit() - Set the open drain gpio's value. |
79a9becd | 2725 | * @desc: gpio descriptor whose state need to be set. |
20a8a968 | 2726 | * @value: Non-zero for setting it HIGH otherwise it will set to LOW. |
aca5ce14 | 2727 | */ |
fac9d885 | 2728 | static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value) |
aca5ce14 | 2729 | { |
d377f56f | 2730 | int ret = 0; |
a0b66a73 | 2731 | struct gpio_chip *gc = desc->gdev->chip; |
372e722e AC |
2732 | int offset = gpio_chip_hwgpio(desc); |
2733 | ||
aca5ce14 | 2734 | if (value) { |
a0b66a73 | 2735 | ret = gc->direction_input(gc, offset); |
aca5ce14 | 2736 | } else { |
a0b66a73 | 2737 | ret = gc->direction_output(gc, offset, 0); |
d377f56f | 2738 | if (!ret) |
372e722e | 2739 | set_bit(FLAG_IS_OUT, &desc->flags); |
aca5ce14 | 2740 | } |
d377f56f LW |
2741 | trace_gpio_direction(desc_to_gpio(desc), value, ret); |
2742 | if (ret < 0) | |
6424de5a MB |
2743 | gpiod_err(desc, |
2744 | "%s: Error in set_value for open drain err %d\n", | |
d377f56f | 2745 | __func__, ret); |
aca5ce14 LD |
2746 | } |
2747 | ||
25553ff0 | 2748 | /* |
79a9becd AC |
2749 | * _gpio_set_open_source_value() - Set the open source gpio's value. |
2750 | * @desc: gpio descriptor whose state need to be set. | |
20a8a968 | 2751 | * @value: Non-zero for setting it HIGH otherwise it will set to LOW. |
25553ff0 | 2752 | */ |
fac9d885 | 2753 | static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value) |
25553ff0 | 2754 | { |
d377f56f | 2755 | int ret = 0; |
a0b66a73 | 2756 | struct gpio_chip *gc = desc->gdev->chip; |
372e722e AC |
2757 | int offset = gpio_chip_hwgpio(desc); |
2758 | ||
25553ff0 | 2759 | if (value) { |
a0b66a73 | 2760 | ret = gc->direction_output(gc, offset, 1); |
d377f56f | 2761 | if (!ret) |
372e722e | 2762 | set_bit(FLAG_IS_OUT, &desc->flags); |
25553ff0 | 2763 | } else { |
a0b66a73 | 2764 | ret = gc->direction_input(gc, offset); |
25553ff0 | 2765 | } |
d377f56f LW |
2766 | trace_gpio_direction(desc_to_gpio(desc), !value, ret); |
2767 | if (ret < 0) | |
6424de5a MB |
2768 | gpiod_err(desc, |
2769 | "%s: Error in set_value for open source err %d\n", | |
d377f56f | 2770 | __func__, ret); |
25553ff0 LD |
2771 | } |
2772 | ||
fac9d885 | 2773 | static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value) |
d2876d08 | 2774 | { |
a0b66a73 | 2775 | struct gpio_chip *gc; |
d2876d08 | 2776 | |
a0b66a73 | 2777 | gc = desc->gdev->chip; |
372e722e | 2778 | trace_gpio_value(desc_to_gpio(desc), 0, value); |
a0b66a73 | 2779 | gc->set(gc, gpio_chip_hwgpio(desc), value); |
372e722e AC |
2780 | } |
2781 | ||
5f424243 RI |
2782 | /* |
2783 | * set multiple outputs on the same chip; | |
2784 | * use the chip's set_multiple function if available; | |
2785 | * otherwise set the outputs sequentially; | |
a0b66a73 | 2786 | * @chip: the GPIO chip we operate on |
5f424243 RI |
2787 | * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word |
2788 | * defines which outputs are to be changed | |
2789 | * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word | |
2790 | * defines the values the outputs specified by mask are to be set to | |
2791 | */ | |
a0b66a73 | 2792 | static void gpio_chip_set_multiple(struct gpio_chip *gc, |
5f424243 RI |
2793 | unsigned long *mask, unsigned long *bits) |
2794 | { | |
a0b66a73 LW |
2795 | if (gc->set_multiple) { |
2796 | gc->set_multiple(gc, mask, bits); | |
5f424243 | 2797 | } else { |
5e4e6fb3 AS |
2798 | unsigned int i; |
2799 | ||
2800 | /* set outputs if the corresponding mask bit is set */ | |
a0b66a73 LW |
2801 | for_each_set_bit(i, mask, gc->ngpio) |
2802 | gc->set(gc, i, test_bit(i, bits)); | |
5f424243 RI |
2803 | } |
2804 | } | |
2805 | ||
3027743f | 2806 | int gpiod_set_array_value_complex(bool raw, bool can_sleep, |
3c940660 GU |
2807 | unsigned int array_size, |
2808 | struct gpio_desc **desc_array, | |
2809 | struct gpio_array *array_info, | |
2810 | unsigned long *value_bitmap) | |
5f424243 RI |
2811 | { |
2812 | int i = 0; | |
2813 | ||
b17566a6 JK |
2814 | /* |
2815 | * Validate array_info against desc_array and its size. | |
2816 | * It should immediately follow desc_array if both | |
2817 | * have been obtained from the same gpiod_get_array() call. | |
2818 | */ | |
2819 | if (array_info && array_info->desc == desc_array && | |
2820 | array_size <= array_info->size && | |
2821 | (void *)array_info == desc_array + array_info->size) { | |
2822 | if (!can_sleep) | |
2823 | WARN_ON(array_info->chip->can_sleep); | |
2824 | ||
2825 | if (!raw && !bitmap_empty(array_info->invert_mask, array_size)) | |
2826 | bitmap_xor(value_bitmap, value_bitmap, | |
2827 | array_info->invert_mask, array_size); | |
2828 | ||
2829 | gpio_chip_set_multiple(array_info->chip, array_info->set_mask, | |
2830 | value_bitmap); | |
2831 | ||
b17566a6 | 2832 | i = find_first_zero_bit(array_info->set_mask, array_size); |
ae66eca0 AS |
2833 | if (i == array_size) |
2834 | return 0; | |
b17566a6 JK |
2835 | } else { |
2836 | array_info = NULL; | |
2837 | } | |
2838 | ||
5f424243 | 2839 | while (i < array_size) { |
a0b66a73 | 2840 | struct gpio_chip *gc = desc_array[i]->gdev->chip; |
3027743f LA |
2841 | unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)]; |
2842 | unsigned long *mask, *bits; | |
5f424243 RI |
2843 | int count = 0; |
2844 | ||
a0b66a73 | 2845 | if (likely(gc->ngpio <= FASTPATH_NGPIO)) { |
3027743f LA |
2846 | mask = fastpath; |
2847 | } else { | |
a0b66a73 | 2848 | mask = kmalloc_array(2 * BITS_TO_LONGS(gc->ngpio), |
3027743f LA |
2849 | sizeof(*mask), |
2850 | can_sleep ? GFP_KERNEL : GFP_ATOMIC); | |
2851 | if (!mask) | |
2852 | return -ENOMEM; | |
2853 | } | |
2854 | ||
a0b66a73 LW |
2855 | bits = mask + BITS_TO_LONGS(gc->ngpio); |
2856 | bitmap_zero(mask, gc->ngpio); | |
3027743f | 2857 | |
38e003f4 | 2858 | if (!can_sleep) |
a0b66a73 | 2859 | WARN_ON(gc->can_sleep); |
38e003f4 | 2860 | |
5f424243 RI |
2861 | do { |
2862 | struct gpio_desc *desc = desc_array[i]; | |
2863 | int hwgpio = gpio_chip_hwgpio(desc); | |
b9762beb | 2864 | int value = test_bit(i, value_bitmap); |
5f424243 | 2865 | |
b17566a6 JK |
2866 | /* |
2867 | * Pins applicable for fast input but not for | |
2868 | * fast output processing may have been already | |
2869 | * inverted inside the fast path, skip them. | |
2870 | */ | |
2871 | if (!raw && !(array_info && | |
2872 | test_bit(i, array_info->invert_mask)) && | |
2873 | test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
5f424243 RI |
2874 | value = !value; |
2875 | trace_gpio_value(desc_to_gpio(desc), 0, value); | |
2876 | /* | |
2877 | * collect all normal outputs belonging to the same chip | |
2878 | * open drain and open source outputs are set individually | |
2879 | */ | |
02e47980 | 2880 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) { |
fac9d885 | 2881 | gpio_set_open_drain_value_commit(desc, value); |
02e47980 | 2882 | } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) { |
fac9d885 | 2883 | gpio_set_open_source_value_commit(desc, value); |
5f424243 RI |
2884 | } else { |
2885 | __set_bit(hwgpio, mask); | |
4fc5bfeb | 2886 | __assign_bit(hwgpio, bits, value); |
5f424243 RI |
2887 | count++; |
2888 | } | |
2889 | i++; | |
b17566a6 JK |
2890 | |
2891 | if (array_info) | |
35ae7f96 JK |
2892 | i = find_next_zero_bit(array_info->set_mask, |
2893 | array_size, i); | |
fdeb8e15 | 2894 | } while ((i < array_size) && |
a0b66a73 | 2895 | (desc_array[i]->gdev->chip == gc)); |
5f424243 | 2896 | /* push collected bits to outputs */ |
38e003f4 | 2897 | if (count != 0) |
a0b66a73 | 2898 | gpio_chip_set_multiple(gc, mask, bits); |
3027743f LA |
2899 | |
2900 | if (mask != fastpath) | |
2901 | kfree(mask); | |
5f424243 | 2902 | } |
3027743f | 2903 | return 0; |
5f424243 RI |
2904 | } |
2905 | ||
d2876d08 | 2906 | /** |
79a9becd AC |
2907 | * gpiod_set_raw_value() - assign a gpio's raw value |
2908 | * @desc: gpio whose value will be assigned | |
d2876d08 | 2909 | * @value: value to assign |
d2876d08 | 2910 | * |
79a9becd AC |
2911 | * Set the raw value of the GPIO, i.e. the value of its physical line without |
2912 | * regard for its ACTIVE_LOW status. | |
2913 | * | |
827a9b8b | 2914 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 2915 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 2916 | */ |
79a9becd | 2917 | void gpiod_set_raw_value(struct gpio_desc *desc, int value) |
372e722e | 2918 | { |
fdeb8e15 | 2919 | VALIDATE_DESC_VOID(desc); |
3285170f | 2920 | /* Should be using gpiod_set_raw_value_cansleep() */ |
fdeb8e15 | 2921 | WARN_ON(desc->gdev->chip->can_sleep); |
fac9d885 | 2922 | gpiod_set_raw_value_commit(desc, value); |
d2876d08 | 2923 | } |
79a9becd | 2924 | EXPORT_SYMBOL_GPL(gpiod_set_raw_value); |
d2876d08 | 2925 | |
1e77fc82 GU |
2926 | /** |
2927 | * gpiod_set_value_nocheck() - set a GPIO line value without checking | |
2928 | * @desc: the descriptor to set the value on | |
2929 | * @value: value to set | |
2930 | * | |
2931 | * This sets the value of a GPIO line backing a descriptor, applying | |
2932 | * different semantic quirks like active low and open drain/source | |
2933 | * handling. | |
2934 | */ | |
2935 | static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value) | |
2936 | { | |
2937 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
2938 | value = !value; | |
2939 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) | |
2940 | gpio_set_open_drain_value_commit(desc, value); | |
2941 | else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) | |
2942 | gpio_set_open_source_value_commit(desc, value); | |
2943 | else | |
2944 | gpiod_set_raw_value_commit(desc, value); | |
2945 | } | |
2946 | ||
d2876d08 | 2947 | /** |
79a9becd AC |
2948 | * gpiod_set_value() - assign a gpio's value |
2949 | * @desc: gpio whose value will be assigned | |
2950 | * @value: value to assign | |
2951 | * | |
02e47980 LW |
2952 | * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW, |
2953 | * OPEN_DRAIN and OPEN_SOURCE flags into account. | |
d2876d08 | 2954 | * |
827a9b8b | 2955 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 2956 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 2957 | */ |
79a9becd | 2958 | void gpiod_set_value(struct gpio_desc *desc, int value) |
d2876d08 | 2959 | { |
fdeb8e15 | 2960 | VALIDATE_DESC_VOID(desc); |
3285170f | 2961 | /* Should be using gpiod_set_value_cansleep() */ |
fdeb8e15 | 2962 | WARN_ON(desc->gdev->chip->can_sleep); |
1e77fc82 | 2963 | gpiod_set_value_nocheck(desc, value); |
372e722e | 2964 | } |
79a9becd | 2965 | EXPORT_SYMBOL_GPL(gpiod_set_value); |
d2876d08 | 2966 | |
5f424243 | 2967 | /** |
3fff99bc | 2968 | * gpiod_set_raw_array_value() - assign values to an array of GPIOs |
b9762beb | 2969 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 2970 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 2971 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 2972 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
2973 | * |
2974 | * Set the raw values of the GPIOs, i.e. the values of the physical lines | |
2975 | * without regard for their ACTIVE_LOW status. | |
2976 | * | |
827a9b8b | 2977 | * This function can be called from contexts where we cannot sleep, and will |
5f424243 RI |
2978 | * complain if the GPIO chip functions potentially sleep. |
2979 | */ | |
3027743f | 2980 | int gpiod_set_raw_array_value(unsigned int array_size, |
3c940660 GU |
2981 | struct gpio_desc **desc_array, |
2982 | struct gpio_array *array_info, | |
2983 | unsigned long *value_bitmap) | |
5f424243 RI |
2984 | { |
2985 | if (!desc_array) | |
3027743f LA |
2986 | return -EINVAL; |
2987 | return gpiod_set_array_value_complex(true, false, array_size, | |
77588c14 | 2988 | desc_array, array_info, value_bitmap); |
5f424243 | 2989 | } |
3fff99bc | 2990 | EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value); |
5f424243 RI |
2991 | |
2992 | /** | |
3fff99bc | 2993 | * gpiod_set_array_value() - assign values to an array of GPIOs |
b9762beb | 2994 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 2995 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 2996 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 2997 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
2998 | * |
2999 | * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
3000 | * into account. | |
3001 | * | |
827a9b8b | 3002 | * This function can be called from contexts where we cannot sleep, and will |
5f424243 RI |
3003 | * complain if the GPIO chip functions potentially sleep. |
3004 | */ | |
cf9af0d5 GU |
3005 | int gpiod_set_array_value(unsigned int array_size, |
3006 | struct gpio_desc **desc_array, | |
3007 | struct gpio_array *array_info, | |
3008 | unsigned long *value_bitmap) | |
5f424243 RI |
3009 | { |
3010 | if (!desc_array) | |
cf9af0d5 GU |
3011 | return -EINVAL; |
3012 | return gpiod_set_array_value_complex(false, false, array_size, | |
3013 | desc_array, array_info, | |
3014 | value_bitmap); | |
5f424243 | 3015 | } |
3fff99bc | 3016 | EXPORT_SYMBOL_GPL(gpiod_set_array_value); |
5f424243 | 3017 | |
d2876d08 | 3018 | /** |
79a9becd AC |
3019 | * gpiod_cansleep() - report whether gpio value access may sleep |
3020 | * @desc: gpio to check | |
d2876d08 | 3021 | * |
d2876d08 | 3022 | */ |
79a9becd | 3023 | int gpiod_cansleep(const struct gpio_desc *desc) |
372e722e | 3024 | { |
fdeb8e15 LW |
3025 | VALIDATE_DESC(desc); |
3026 | return desc->gdev->chip->can_sleep; | |
d2876d08 | 3027 | } |
79a9becd | 3028 | EXPORT_SYMBOL_GPL(gpiod_cansleep); |
d2876d08 | 3029 | |
90b39402 LW |
3030 | /** |
3031 | * gpiod_set_consumer_name() - set the consumer name for the descriptor | |
3032 | * @desc: gpio to set the consumer name on | |
3033 | * @name: the new consumer name | |
3034 | */ | |
18534df4 | 3035 | int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name) |
90b39402 | 3036 | { |
18534df4 MS |
3037 | VALIDATE_DESC(desc); |
3038 | if (name) { | |
3039 | name = kstrdup_const(name, GFP_KERNEL); | |
3040 | if (!name) | |
3041 | return -ENOMEM; | |
3042 | } | |
3043 | ||
3044 | kfree_const(desc->label); | |
3045 | desc_set_label(desc, name); | |
3046 | ||
3047 | return 0; | |
90b39402 LW |
3048 | } |
3049 | EXPORT_SYMBOL_GPL(gpiod_set_consumer_name); | |
3050 | ||
0f6d504e | 3051 | /** |
79a9becd AC |
3052 | * gpiod_to_irq() - return the IRQ corresponding to a GPIO |
3053 | * @desc: gpio whose IRQ will be returned (already requested) | |
0f6d504e | 3054 | * |
79a9becd AC |
3055 | * Return the IRQ corresponding to the passed GPIO, or an error code in case of |
3056 | * error. | |
0f6d504e | 3057 | */ |
79a9becd | 3058 | int gpiod_to_irq(const struct gpio_desc *desc) |
0f6d504e | 3059 | { |
a0b66a73 | 3060 | struct gpio_chip *gc; |
4c37ce86 | 3061 | int offset; |
0f6d504e | 3062 | |
79bb71bd LW |
3063 | /* |
3064 | * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics | |
3065 | * requires this function to not return zero on an invalid descriptor | |
3066 | * but rather a negative error number. | |
3067 | */ | |
bfbbe44d | 3068 | if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip) |
79bb71bd LW |
3069 | return -EINVAL; |
3070 | ||
a0b66a73 | 3071 | gc = desc->gdev->chip; |
372e722e | 3072 | offset = gpio_chip_hwgpio(desc); |
a0b66a73 LW |
3073 | if (gc->to_irq) { |
3074 | int retirq = gc->to_irq(gc, offset); | |
4c37ce86 LW |
3075 | |
3076 | /* Zero means NO_IRQ */ | |
3077 | if (!retirq) | |
3078 | return -ENXIO; | |
3079 | ||
3080 | return retirq; | |
3081 | } | |
3082 | return -ENXIO; | |
0f6d504e | 3083 | } |
79a9becd | 3084 | EXPORT_SYMBOL_GPL(gpiod_to_irq); |
0f6d504e | 3085 | |
d468bf9e | 3086 | /** |
e3a2e878 | 3087 | * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ |
a0b66a73 | 3088 | * @gc: the chip the GPIO to lock belongs to |
d74be6df | 3089 | * @offset: the offset of the GPIO to lock as IRQ |
d468bf9e LW |
3090 | * |
3091 | * This is used directly by GPIO drivers that want to lock down | |
f438acdf | 3092 | * a certain GPIO line to be used for IRQs. |
d468bf9e | 3093 | */ |
a0b66a73 | 3094 | int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset) |
372e722e | 3095 | { |
9c10280d LW |
3096 | struct gpio_desc *desc; |
3097 | ||
a0b66a73 | 3098 | desc = gpiochip_get_desc(gc, offset); |
9c10280d LW |
3099 | if (IS_ERR(desc)) |
3100 | return PTR_ERR(desc); | |
3101 | ||
60f8339e LW |
3102 | /* |
3103 | * If it's fast: flush the direction setting if something changed | |
3104 | * behind our back | |
3105 | */ | |
a0b66a73 | 3106 | if (!gc->can_sleep && gc->get_direction) { |
80956790 | 3107 | int dir = gpiod_get_direction(desc); |
9c10280d | 3108 | |
36b31279 | 3109 | if (dir < 0) { |
a0b66a73 | 3110 | chip_err(gc, "%s: cannot get GPIO direction\n", |
36b31279 AS |
3111 | __func__); |
3112 | return dir; | |
3113 | } | |
9c10280d | 3114 | } |
d468bf9e | 3115 | |
e9bdf7e6 LW |
3116 | /* To be valid for IRQ the line needs to be input or open drain */ |
3117 | if (test_bit(FLAG_IS_OUT, &desc->flags) && | |
3118 | !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) { | |
a0b66a73 | 3119 | chip_err(gc, |
b1911710 AS |
3120 | "%s: tried to flag a GPIO set as output for IRQ\n", |
3121 | __func__); | |
d468bf9e LW |
3122 | return -EIO; |
3123 | } | |
3124 | ||
9c10280d | 3125 | set_bit(FLAG_USED_AS_IRQ, &desc->flags); |
4e9439dd | 3126 | set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3940c34a LW |
3127 | |
3128 | /* | |
3129 | * If the consumer has not set up a label (such as when the | |
3130 | * IRQ is referenced from .to_irq()) we set up a label here | |
3131 | * so it is clear this is used as an interrupt. | |
3132 | */ | |
3133 | if (!desc->label) | |
3134 | desc_set_label(desc, "interrupt"); | |
3135 | ||
d468bf9e | 3136 | return 0; |
372e722e | 3137 | } |
e3a2e878 | 3138 | EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq); |
d2876d08 | 3139 | |
d468bf9e | 3140 | /** |
e3a2e878 | 3141 | * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ |
a0b66a73 | 3142 | * @gc: the chip the GPIO to lock belongs to |
d74be6df | 3143 | * @offset: the offset of the GPIO to lock as IRQ |
d468bf9e LW |
3144 | * |
3145 | * This is used directly by GPIO drivers that want to indicate | |
3146 | * that a certain GPIO is no longer used exclusively for IRQ. | |
d2876d08 | 3147 | */ |
a0b66a73 | 3148 | void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset) |
d468bf9e | 3149 | { |
3940c34a LW |
3150 | struct gpio_desc *desc; |
3151 | ||
a0b66a73 | 3152 | desc = gpiochip_get_desc(gc, offset); |
3940c34a | 3153 | if (IS_ERR(desc)) |
d468bf9e | 3154 | return; |
d2876d08 | 3155 | |
3940c34a | 3156 | clear_bit(FLAG_USED_AS_IRQ, &desc->flags); |
4e9439dd | 3157 | clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3940c34a LW |
3158 | |
3159 | /* If we only had this marking, erase it */ | |
3160 | if (desc->label && !strcmp(desc->label, "interrupt")) | |
3161 | desc_set_label(desc, NULL); | |
d468bf9e | 3162 | } |
e3a2e878 | 3163 | EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq); |
d468bf9e | 3164 | |
a0b66a73 | 3165 | void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset) |
4e9439dd | 3166 | { |
a0b66a73 | 3167 | struct gpio_desc *desc = gpiochip_get_desc(gc, offset); |
4e9439dd HV |
3168 | |
3169 | if (!IS_ERR(desc) && | |
3170 | !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) | |
3171 | clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); | |
3172 | } | |
3173 | EXPORT_SYMBOL_GPL(gpiochip_disable_irq); | |
3174 | ||
a0b66a73 | 3175 | void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset) |
4e9439dd | 3176 | { |
a0b66a73 | 3177 | struct gpio_desc *desc = gpiochip_get_desc(gc, offset); |
4e9439dd HV |
3178 | |
3179 | if (!IS_ERR(desc) && | |
3180 | !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) { | |
e9bdf7e6 LW |
3181 | /* |
3182 | * We must not be output when using IRQ UNLESS we are | |
3183 | * open drain. | |
3184 | */ | |
3185 | WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) && | |
3186 | !test_bit(FLAG_OPEN_DRAIN, &desc->flags)); | |
4e9439dd HV |
3187 | set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3188 | } | |
3189 | } | |
3190 | EXPORT_SYMBOL_GPL(gpiochip_enable_irq); | |
3191 | ||
a0b66a73 | 3192 | bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset) |
6cee3821 | 3193 | { |
a0b66a73 | 3194 | if (offset >= gc->ngpio) |
6cee3821 LW |
3195 | return false; |
3196 | ||
a0b66a73 | 3197 | return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags); |
6cee3821 LW |
3198 | } |
3199 | EXPORT_SYMBOL_GPL(gpiochip_line_is_irq); | |
3200 | ||
a0b66a73 | 3201 | int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset) |
4e6b8238 HV |
3202 | { |
3203 | int ret; | |
3204 | ||
a0b66a73 | 3205 | if (!try_module_get(gc->gpiodev->owner)) |
4e6b8238 HV |
3206 | return -ENODEV; |
3207 | ||
a0b66a73 | 3208 | ret = gpiochip_lock_as_irq(gc, offset); |
4e6b8238 | 3209 | if (ret) { |
a0b66a73 LW |
3210 | chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset); |
3211 | module_put(gc->gpiodev->owner); | |
4e6b8238 HV |
3212 | return ret; |
3213 | } | |
3214 | return 0; | |
3215 | } | |
3216 | EXPORT_SYMBOL_GPL(gpiochip_reqres_irq); | |
3217 | ||
a0b66a73 | 3218 | void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset) |
4e6b8238 | 3219 | { |
a0b66a73 LW |
3220 | gpiochip_unlock_as_irq(gc, offset); |
3221 | module_put(gc->gpiodev->owner); | |
4e6b8238 HV |
3222 | } |
3223 | EXPORT_SYMBOL_GPL(gpiochip_relres_irq); | |
3224 | ||
a0b66a73 | 3225 | bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset) |
143b65d6 | 3226 | { |
a0b66a73 | 3227 | if (offset >= gc->ngpio) |
143b65d6 LW |
3228 | return false; |
3229 | ||
a0b66a73 | 3230 | return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags); |
143b65d6 LW |
3231 | } |
3232 | EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain); | |
3233 | ||
a0b66a73 | 3234 | bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset) |
143b65d6 | 3235 | { |
a0b66a73 | 3236 | if (offset >= gc->ngpio) |
143b65d6 LW |
3237 | return false; |
3238 | ||
a0b66a73 | 3239 | return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags); |
143b65d6 LW |
3240 | } |
3241 | EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source); | |
3242 | ||
a0b66a73 | 3243 | bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset) |
05f479bf | 3244 | { |
a0b66a73 | 3245 | if (offset >= gc->ngpio) |
05f479bf CK |
3246 | return false; |
3247 | ||
a0b66a73 | 3248 | return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags); |
05f479bf CK |
3249 | } |
3250 | EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent); | |
3251 | ||
79a9becd AC |
3252 | /** |
3253 | * gpiod_get_raw_value_cansleep() - return a gpio's raw value | |
3254 | * @desc: gpio whose value will be returned | |
3255 | * | |
3256 | * Return the GPIO's raw value, i.e. the value of the physical line disregarding | |
e20538b8 | 3257 | * its ACTIVE_LOW status, or negative errno on failure. |
79a9becd AC |
3258 | * |
3259 | * This function is to be called from contexts that can sleep. | |
d2876d08 | 3260 | */ |
79a9becd | 3261 | int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc) |
d2876d08 | 3262 | { |
d2876d08 | 3263 | might_sleep_if(extra_checks); |
fdeb8e15 | 3264 | VALIDATE_DESC(desc); |
fac9d885 | 3265 | return gpiod_get_raw_value_commit(desc); |
d2876d08 | 3266 | } |
79a9becd | 3267 | EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep); |
372e722e | 3268 | |
79a9becd AC |
3269 | /** |
3270 | * gpiod_get_value_cansleep() - return a gpio's value | |
3271 | * @desc: gpio whose value will be returned | |
3272 | * | |
3273 | * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into | |
e20538b8 | 3274 | * account, or negative errno on failure. |
79a9becd AC |
3275 | * |
3276 | * This function is to be called from contexts that can sleep. | |
3277 | */ | |
3278 | int gpiod_get_value_cansleep(const struct gpio_desc *desc) | |
d2876d08 | 3279 | { |
3f397c21 | 3280 | int value; |
d2876d08 DB |
3281 | |
3282 | might_sleep_if(extra_checks); | |
fdeb8e15 | 3283 | VALIDATE_DESC(desc); |
fac9d885 | 3284 | value = gpiod_get_raw_value_commit(desc); |
e20538b8 BA |
3285 | if (value < 0) |
3286 | return value; | |
3287 | ||
79a9becd AC |
3288 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
3289 | value = !value; | |
3290 | ||
3f397c21 | 3291 | return value; |
d2876d08 | 3292 | } |
79a9becd | 3293 | EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep); |
372e722e | 3294 | |
eec1d566 LW |
3295 | /** |
3296 | * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs | |
b9762beb | 3297 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 3298 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 3299 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3300 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
3301 | * |
3302 | * Read the raw values of the GPIOs, i.e. the values of the physical lines | |
3303 | * without regard for their ACTIVE_LOW status. Return 0 in case of success, | |
3304 | * else an error code. | |
3305 | * | |
3306 | * This function is to be called from contexts that can sleep. | |
3307 | */ | |
3308 | int gpiod_get_raw_array_value_cansleep(unsigned int array_size, | |
3309 | struct gpio_desc **desc_array, | |
77588c14 | 3310 | struct gpio_array *array_info, |
b9762beb | 3311 | unsigned long *value_bitmap) |
eec1d566 LW |
3312 | { |
3313 | might_sleep_if(extra_checks); | |
3314 | if (!desc_array) | |
3315 | return -EINVAL; | |
3316 | return gpiod_get_array_value_complex(true, true, array_size, | |
77588c14 JK |
3317 | desc_array, array_info, |
3318 | value_bitmap); | |
eec1d566 LW |
3319 | } |
3320 | EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep); | |
3321 | ||
3322 | /** | |
3323 | * gpiod_get_array_value_cansleep() - read values from an array of GPIOs | |
b9762beb | 3324 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 3325 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 3326 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3327 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
3328 | * |
3329 | * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
3330 | * into account. Return 0 in case of success, else an error code. | |
3331 | * | |
3332 | * This function is to be called from contexts that can sleep. | |
3333 | */ | |
3334 | int gpiod_get_array_value_cansleep(unsigned int array_size, | |
3335 | struct gpio_desc **desc_array, | |
77588c14 | 3336 | struct gpio_array *array_info, |
b9762beb | 3337 | unsigned long *value_bitmap) |
eec1d566 LW |
3338 | { |
3339 | might_sleep_if(extra_checks); | |
3340 | if (!desc_array) | |
3341 | return -EINVAL; | |
3342 | return gpiod_get_array_value_complex(false, true, array_size, | |
77588c14 JK |
3343 | desc_array, array_info, |
3344 | value_bitmap); | |
eec1d566 LW |
3345 | } |
3346 | EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep); | |
3347 | ||
79a9becd AC |
3348 | /** |
3349 | * gpiod_set_raw_value_cansleep() - assign a gpio's raw value | |
3350 | * @desc: gpio whose value will be assigned | |
3351 | * @value: value to assign | |
3352 | * | |
3353 | * Set the raw value of the GPIO, i.e. the value of its physical line without | |
3354 | * regard for its ACTIVE_LOW status. | |
3355 | * | |
3356 | * This function is to be called from contexts that can sleep. | |
3357 | */ | |
3358 | void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value) | |
372e722e | 3359 | { |
d2876d08 | 3360 | might_sleep_if(extra_checks); |
fdeb8e15 | 3361 | VALIDATE_DESC_VOID(desc); |
fac9d885 | 3362 | gpiod_set_raw_value_commit(desc, value); |
372e722e | 3363 | } |
79a9becd | 3364 | EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep); |
d2876d08 | 3365 | |
79a9becd AC |
3366 | /** |
3367 | * gpiod_set_value_cansleep() - assign a gpio's value | |
3368 | * @desc: gpio whose value will be assigned | |
3369 | * @value: value to assign | |
3370 | * | |
3371 | * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into | |
3372 | * account | |
3373 | * | |
3374 | * This function is to be called from contexts that can sleep. | |
3375 | */ | |
3376 | void gpiod_set_value_cansleep(struct gpio_desc *desc, int value) | |
d2876d08 | 3377 | { |
d2876d08 | 3378 | might_sleep_if(extra_checks); |
fdeb8e15 | 3379 | VALIDATE_DESC_VOID(desc); |
1e77fc82 | 3380 | gpiod_set_value_nocheck(desc, value); |
372e722e | 3381 | } |
79a9becd | 3382 | EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep); |
d2876d08 | 3383 | |
5f424243 | 3384 | /** |
3fff99bc | 3385 | * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs |
b9762beb | 3386 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 3387 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 3388 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3389 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
3390 | * |
3391 | * Set the raw values of the GPIOs, i.e. the values of the physical lines | |
3392 | * without regard for their ACTIVE_LOW status. | |
3393 | * | |
3394 | * This function is to be called from contexts that can sleep. | |
3395 | */ | |
3027743f | 3396 | int gpiod_set_raw_array_value_cansleep(unsigned int array_size, |
3c940660 GU |
3397 | struct gpio_desc **desc_array, |
3398 | struct gpio_array *array_info, | |
3399 | unsigned long *value_bitmap) | |
5f424243 RI |
3400 | { |
3401 | might_sleep_if(extra_checks); | |
3402 | if (!desc_array) | |
3027743f LA |
3403 | return -EINVAL; |
3404 | return gpiod_set_array_value_complex(true, true, array_size, desc_array, | |
77588c14 | 3405 | array_info, value_bitmap); |
5f424243 | 3406 | } |
3fff99bc | 3407 | EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep); |
5f424243 | 3408 | |
3946d187 DT |
3409 | /** |
3410 | * gpiod_add_lookup_tables() - register GPIO device consumers | |
3411 | * @tables: list of tables of consumers to register | |
3412 | * @n: number of tables in the list | |
3413 | */ | |
3414 | void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n) | |
3415 | { | |
3416 | unsigned int i; | |
3417 | ||
3418 | mutex_lock(&gpio_lookup_lock); | |
3419 | ||
3420 | for (i = 0; i < n; i++) | |
3421 | list_add_tail(&tables[i]->list, &gpio_lookup_list); | |
3422 | ||
3423 | mutex_unlock(&gpio_lookup_lock); | |
3424 | } | |
3425 | ||
5f424243 | 3426 | /** |
3fff99bc | 3427 | * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs |
b9762beb | 3428 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 3429 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 3430 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3431 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
3432 | * |
3433 | * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
3434 | * into account. | |
3435 | * | |
3436 | * This function is to be called from contexts that can sleep. | |
3437 | */ | |
cf9af0d5 GU |
3438 | int gpiod_set_array_value_cansleep(unsigned int array_size, |
3439 | struct gpio_desc **desc_array, | |
3440 | struct gpio_array *array_info, | |
3441 | unsigned long *value_bitmap) | |
5f424243 RI |
3442 | { |
3443 | might_sleep_if(extra_checks); | |
3444 | if (!desc_array) | |
cf9af0d5 GU |
3445 | return -EINVAL; |
3446 | return gpiod_set_array_value_complex(false, true, array_size, | |
3447 | desc_array, array_info, | |
3448 | value_bitmap); | |
5f424243 | 3449 | } |
3fff99bc | 3450 | EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep); |
5f424243 | 3451 | |
bae48da2 | 3452 | /** |
ad824783 AC |
3453 | * gpiod_add_lookup_table() - register GPIO device consumers |
3454 | * @table: table of consumers to register | |
bae48da2 | 3455 | */ |
ad824783 | 3456 | void gpiod_add_lookup_table(struct gpiod_lookup_table *table) |
bae48da2 AC |
3457 | { |
3458 | mutex_lock(&gpio_lookup_lock); | |
3459 | ||
ad824783 | 3460 | list_add_tail(&table->list, &gpio_lookup_list); |
bae48da2 AC |
3461 | |
3462 | mutex_unlock(&gpio_lookup_lock); | |
3463 | } | |
226b2242 | 3464 | EXPORT_SYMBOL_GPL(gpiod_add_lookup_table); |
bae48da2 | 3465 | |
be9015ab SK |
3466 | /** |
3467 | * gpiod_remove_lookup_table() - unregister GPIO device consumers | |
3468 | * @table: table of consumers to unregister | |
3469 | */ | |
3470 | void gpiod_remove_lookup_table(struct gpiod_lookup_table *table) | |
3471 | { | |
d321ad12 AS |
3472 | /* Nothing to remove */ |
3473 | if (!table) | |
3474 | return; | |
3475 | ||
be9015ab SK |
3476 | mutex_lock(&gpio_lookup_lock); |
3477 | ||
3478 | list_del(&table->list); | |
3479 | ||
3480 | mutex_unlock(&gpio_lookup_lock); | |
3481 | } | |
226b2242 | 3482 | EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table); |
be9015ab | 3483 | |
a411e81e BG |
3484 | /** |
3485 | * gpiod_add_hogs() - register a set of GPIO hogs from machine code | |
3486 | * @hogs: table of gpio hog entries with a zeroed sentinel at the end | |
3487 | */ | |
3488 | void gpiod_add_hogs(struct gpiod_hog *hogs) | |
3489 | { | |
a0b66a73 | 3490 | struct gpio_chip *gc; |
a411e81e BG |
3491 | struct gpiod_hog *hog; |
3492 | ||
3493 | mutex_lock(&gpio_machine_hogs_mutex); | |
3494 | ||
3495 | for (hog = &hogs[0]; hog->chip_label; hog++) { | |
3496 | list_add_tail(&hog->list, &gpio_machine_hogs); | |
3497 | ||
3498 | /* | |
3499 | * The chip may have been registered earlier, so check if it | |
3500 | * exists and, if so, try to hog the line now. | |
3501 | */ | |
a0b66a73 LW |
3502 | gc = find_chip_by_name(hog->chip_label); |
3503 | if (gc) | |
3504 | gpiochip_machine_hog(gc, hog); | |
a411e81e BG |
3505 | } |
3506 | ||
3507 | mutex_unlock(&gpio_machine_hogs_mutex); | |
3508 | } | |
3509 | EXPORT_SYMBOL_GPL(gpiod_add_hogs); | |
3510 | ||
ad824783 | 3511 | static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev) |
bae48da2 AC |
3512 | { |
3513 | const char *dev_id = dev ? dev_name(dev) : NULL; | |
ad824783 | 3514 | struct gpiod_lookup_table *table; |
bae48da2 AC |
3515 | |
3516 | mutex_lock(&gpio_lookup_lock); | |
3517 | ||
ad824783 AC |
3518 | list_for_each_entry(table, &gpio_lookup_list, list) { |
3519 | if (table->dev_id && dev_id) { | |
3520 | /* | |
3521 | * Valid strings on both ends, must be identical to have | |
3522 | * a match | |
3523 | */ | |
3524 | if (!strcmp(table->dev_id, dev_id)) | |
3525 | goto found; | |
3526 | } else { | |
3527 | /* | |
3528 | * One of the pointers is NULL, so both must be to have | |
3529 | * a match | |
3530 | */ | |
3531 | if (dev_id == table->dev_id) | |
3532 | goto found; | |
3533 | } | |
3534 | } | |
3535 | table = NULL; | |
bae48da2 | 3536 | |
ad824783 AC |
3537 | found: |
3538 | mutex_unlock(&gpio_lookup_lock); | |
3539 | return table; | |
3540 | } | |
bae48da2 | 3541 | |
ad824783 | 3542 | static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id, |
fed7026a | 3543 | unsigned int idx, unsigned long *flags) |
ad824783 | 3544 | { |
2a3cf6a3 | 3545 | struct gpio_desc *desc = ERR_PTR(-ENOENT); |
ad824783 AC |
3546 | struct gpiod_lookup_table *table; |
3547 | struct gpiod_lookup *p; | |
bae48da2 | 3548 | |
ad824783 AC |
3549 | table = gpiod_find_lookup_table(dev); |
3550 | if (!table) | |
3551 | return desc; | |
bae48da2 | 3552 | |
4c033b54 | 3553 | for (p = &table->table[0]; p->key; p++) { |
a0b66a73 | 3554 | struct gpio_chip *gc; |
bae48da2 | 3555 | |
ad824783 | 3556 | /* idx must always match exactly */ |
bae48da2 AC |
3557 | if (p->idx != idx) |
3558 | continue; | |
3559 | ||
ad824783 AC |
3560 | /* If the lookup entry has a con_id, require exact match */ |
3561 | if (p->con_id && (!con_id || strcmp(p->con_id, con_id))) | |
3562 | continue; | |
bae48da2 | 3563 | |
4c033b54 GU |
3564 | if (p->chip_hwnum == U16_MAX) { |
3565 | desc = gpio_name_to_desc(p->key); | |
3566 | if (desc) { | |
3567 | *flags = p->flags; | |
3568 | return desc; | |
3569 | } | |
3570 | ||
3571 | dev_warn(dev, "cannot find GPIO line %s, deferring\n", | |
3572 | p->key); | |
3573 | return ERR_PTR(-EPROBE_DEFER); | |
3574 | } | |
3575 | ||
3576 | gc = find_chip_by_name(p->key); | |
bae48da2 | 3577 | |
a0b66a73 | 3578 | if (!gc) { |
8853daf3 JK |
3579 | /* |
3580 | * As the lookup table indicates a chip with | |
4c033b54 | 3581 | * p->key should exist, assume it may |
8853daf3 JK |
3582 | * still appear later and let the interested |
3583 | * consumer be probed again or let the Deferred | |
3584 | * Probe infrastructure handle the error. | |
3585 | */ | |
3586 | dev_warn(dev, "cannot find GPIO chip %s, deferring\n", | |
4c033b54 | 3587 | p->key); |
8853daf3 | 3588 | return ERR_PTR(-EPROBE_DEFER); |
ad824783 | 3589 | } |
bae48da2 | 3590 | |
a0b66a73 | 3591 | if (gc->ngpio <= p->chip_hwnum) { |
2a3cf6a3 | 3592 | dev_err(dev, |
d935bd50 | 3593 | "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n", |
a0b66a73 LW |
3594 | idx, p->chip_hwnum, gc->ngpio - 1, |
3595 | gc->label); | |
2a3cf6a3 | 3596 | return ERR_PTR(-EINVAL); |
bae48da2 | 3597 | } |
bae48da2 | 3598 | |
a0b66a73 | 3599 | desc = gpiochip_get_desc(gc, p->chip_hwnum); |
ad824783 | 3600 | *flags = p->flags; |
bae48da2 | 3601 | |
2a3cf6a3 | 3602 | return desc; |
bae48da2 AC |
3603 | } |
3604 | ||
bae48da2 AC |
3605 | return desc; |
3606 | } | |
3607 | ||
66858527 RI |
3608 | static int platform_gpio_count(struct device *dev, const char *con_id) |
3609 | { | |
3610 | struct gpiod_lookup_table *table; | |
3611 | struct gpiod_lookup *p; | |
3612 | unsigned int count = 0; | |
3613 | ||
3614 | table = gpiod_find_lookup_table(dev); | |
3615 | if (!table) | |
3616 | return -ENOENT; | |
3617 | ||
4c033b54 | 3618 | for (p = &table->table[0]; p->key; p++) { |
66858527 RI |
3619 | if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) || |
3620 | (!con_id && !p->con_id)) | |
3621 | count++; | |
3622 | } | |
3623 | if (!count) | |
3624 | return -ENOENT; | |
3625 | ||
3626 | return count; | |
3627 | } | |
3628 | ||
13949fa9 DT |
3629 | /** |
3630 | * fwnode_gpiod_get_index - obtain a GPIO from firmware node | |
3631 | * @fwnode: handle of the firmware node | |
3632 | * @con_id: function within the GPIO consumer | |
3633 | * @index: index of the GPIO to obtain for the consumer | |
3634 | * @flags: GPIO initialization flags | |
3635 | * @label: label to attach to the requested GPIO | |
3636 | * | |
3637 | * This function can be used for drivers that get their configuration | |
3638 | * from opaque firmware. | |
3639 | * | |
3640 | * The function properly finds the corresponding GPIO using whatever is the | |
3641 | * underlying firmware interface and then makes sure that the GPIO | |
3642 | * descriptor is requested before it is returned to the caller. | |
3643 | * | |
3644 | * Returns: | |
3645 | * On successful request the GPIO pin is configured in accordance with | |
3646 | * provided @flags. | |
3647 | * | |
3648 | * In case of error an ERR_PTR() is returned. | |
3649 | */ | |
3650 | struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode, | |
3651 | const char *con_id, int index, | |
3652 | enum gpiod_flags flags, | |
3653 | const char *label) | |
3654 | { | |
3655 | struct gpio_desc *desc; | |
3656 | char prop_name[32]; /* 32 is max size of property name */ | |
3657 | unsigned int i; | |
3658 | ||
3659 | for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) { | |
3660 | if (con_id) | |
3661 | snprintf(prop_name, sizeof(prop_name), "%s-%s", | |
3662 | con_id, gpio_suffixes[i]); | |
3663 | else | |
3664 | snprintf(prop_name, sizeof(prop_name), "%s", | |
3665 | gpio_suffixes[i]); | |
3666 | ||
3667 | desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags, | |
3668 | label); | |
7b58696d | 3669 | if (!gpiod_not_found(desc)) |
13949fa9 DT |
3670 | break; |
3671 | } | |
3672 | ||
3673 | return desc; | |
3674 | } | |
3675 | EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index); | |
3676 | ||
66858527 RI |
3677 | /** |
3678 | * gpiod_count - return the number of GPIOs associated with a device / function | |
3679 | * or -ENOENT if no GPIO has been assigned to the requested function | |
3680 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
3681 | * @con_id: function within the GPIO consumer | |
3682 | */ | |
3683 | int gpiod_count(struct device *dev, const char *con_id) | |
3684 | { | |
944f4b0a | 3685 | const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL; |
66858527 RI |
3686 | int count = -ENOENT; |
3687 | ||
944f4b0a | 3688 | if (is_of_node(fwnode)) |
f626d6df | 3689 | count = of_gpio_get_count(dev, con_id); |
944f4b0a | 3690 | else if (is_acpi_node(fwnode)) |
66858527 RI |
3691 | count = acpi_gpio_count(dev, con_id); |
3692 | ||
3693 | if (count < 0) | |
3694 | count = platform_gpio_count(dev, con_id); | |
3695 | ||
3696 | return count; | |
3697 | } | |
3698 | EXPORT_SYMBOL_GPL(gpiod_count); | |
3699 | ||
bae48da2 | 3700 | /** |
0879162f | 3701 | * gpiod_get - obtain a GPIO for a given GPIO function |
ad824783 | 3702 | * @dev: GPIO consumer, can be NULL for system-global GPIOs |
bae48da2 | 3703 | * @con_id: function within the GPIO consumer |
39b2bbe3 | 3704 | * @flags: optional GPIO initialization flags |
bae48da2 AC |
3705 | * |
3706 | * Return the GPIO descriptor corresponding to the function con_id of device | |
2a3cf6a3 | 3707 | * dev, -ENOENT if no GPIO has been assigned to the requested function, or |
20a8a968 | 3708 | * another IS_ERR() code if an error occurred while trying to acquire the GPIO. |
bae48da2 | 3709 | */ |
b17d1bf1 | 3710 | struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id, |
39b2bbe3 | 3711 | enum gpiod_flags flags) |
bae48da2 | 3712 | { |
39b2bbe3 | 3713 | return gpiod_get_index(dev, con_id, 0, flags); |
bae48da2 | 3714 | } |
b17d1bf1 | 3715 | EXPORT_SYMBOL_GPL(gpiod_get); |
bae48da2 | 3716 | |
29a1f233 TR |
3717 | /** |
3718 | * gpiod_get_optional - obtain an optional GPIO for a given GPIO function | |
3719 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
3720 | * @con_id: function within the GPIO consumer | |
39b2bbe3 | 3721 | * @flags: optional GPIO initialization flags |
29a1f233 TR |
3722 | * |
3723 | * This is equivalent to gpiod_get(), except that when no GPIO was assigned to | |
3724 | * the requested function it will return NULL. This is convenient for drivers | |
3725 | * that need to handle optional GPIOs. | |
3726 | */ | |
b17d1bf1 | 3727 | struct gpio_desc *__must_check gpiod_get_optional(struct device *dev, |
39b2bbe3 AC |
3728 | const char *con_id, |
3729 | enum gpiod_flags flags) | |
29a1f233 | 3730 | { |
39b2bbe3 | 3731 | return gpiod_get_index_optional(dev, con_id, 0, flags); |
29a1f233 | 3732 | } |
b17d1bf1 | 3733 | EXPORT_SYMBOL_GPL(gpiod_get_optional); |
29a1f233 | 3734 | |
f625d460 BP |
3735 | |
3736 | /** | |
3737 | * gpiod_configure_flags - helper function to configure a given GPIO | |
3738 | * @desc: gpio whose value will be assigned | |
3739 | * @con_id: function within the GPIO consumer | |
fed7026a AS |
3740 | * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from |
3741 | * of_find_gpio() or of_get_gpio_hog() | |
f625d460 BP |
3742 | * @dflags: gpiod_flags - optional GPIO initialization flags |
3743 | * | |
3744 | * Return 0 on success, -ENOENT if no GPIO has been assigned to the | |
3745 | * requested function and/or index, or another IS_ERR() code if an error | |
3746 | * occurred while trying to acquire the GPIO. | |
3747 | */ | |
c29fd9eb | 3748 | int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id, |
85b03b30 | 3749 | unsigned long lflags, enum gpiod_flags dflags) |
f625d460 | 3750 | { |
d377f56f | 3751 | int ret; |
f625d460 | 3752 | |
85b03b30 JH |
3753 | if (lflags & GPIO_ACTIVE_LOW) |
3754 | set_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
f926dfc1 | 3755 | |
85b03b30 JH |
3756 | if (lflags & GPIO_OPEN_DRAIN) |
3757 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | |
f926dfc1 LW |
3758 | else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) { |
3759 | /* | |
3760 | * This enforces open drain mode from the consumer side. | |
3761 | * This is necessary for some busses like I2C, but the lookup | |
3762 | * should *REALLY* have specified them as open drain in the | |
3763 | * first place, so print a little warning here. | |
3764 | */ | |
3765 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | |
3766 | gpiod_warn(desc, | |
3767 | "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n"); | |
3768 | } | |
3769 | ||
85b03b30 JH |
3770 | if (lflags & GPIO_OPEN_SOURCE) |
3771 | set_bit(FLAG_OPEN_SOURCE, &desc->flags); | |
e10f72bf | 3772 | |
d449991c TP |
3773 | if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) { |
3774 | gpiod_err(desc, | |
3775 | "both pull-up and pull-down enabled, invalid configuration\n"); | |
3776 | return -EINVAL; | |
3777 | } | |
3778 | ||
3779 | if (lflags & GPIO_PULL_UP) | |
3780 | set_bit(FLAG_PULL_UP, &desc->flags); | |
3781 | else if (lflags & GPIO_PULL_DOWN) | |
3782 | set_bit(FLAG_PULL_DOWN, &desc->flags); | |
3783 | ||
d377f56f LW |
3784 | ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY)); |
3785 | if (ret < 0) | |
3786 | return ret; | |
85b03b30 | 3787 | |
f625d460 BP |
3788 | /* No particular flag request, return here... */ |
3789 | if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) { | |
262b9011 | 3790 | gpiod_dbg(desc, "no flags found for %s\n", con_id); |
f625d460 BP |
3791 | return 0; |
3792 | } | |
3793 | ||
3794 | /* Process flags */ | |
3795 | if (dflags & GPIOD_FLAGS_BIT_DIR_OUT) | |
d377f56f | 3796 | ret = gpiod_direction_output(desc, |
ad17731d | 3797 | !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL)); |
f625d460 | 3798 | else |
d377f56f | 3799 | ret = gpiod_direction_input(desc); |
f625d460 | 3800 | |
d377f56f | 3801 | return ret; |
f625d460 BP |
3802 | } |
3803 | ||
bae48da2 AC |
3804 | /** |
3805 | * gpiod_get_index - obtain a GPIO from a multi-index GPIO function | |
fdd6a5fe | 3806 | * @dev: GPIO consumer, can be NULL for system-global GPIOs |
bae48da2 AC |
3807 | * @con_id: function within the GPIO consumer |
3808 | * @idx: index of the GPIO to obtain in the consumer | |
39b2bbe3 | 3809 | * @flags: optional GPIO initialization flags |
bae48da2 AC |
3810 | * |
3811 | * This variant of gpiod_get() allows to access GPIOs other than the first | |
3812 | * defined one for functions that define several GPIOs. | |
3813 | * | |
2a3cf6a3 AC |
3814 | * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the |
3815 | * requested function and/or index, or another IS_ERR() code if an error | |
20a8a968 | 3816 | * occurred while trying to acquire the GPIO. |
bae48da2 | 3817 | */ |
b17d1bf1 | 3818 | struct gpio_desc *__must_check gpiod_get_index(struct device *dev, |
bae48da2 | 3819 | const char *con_id, |
39b2bbe3 AC |
3820 | unsigned int idx, |
3821 | enum gpiod_flags flags) | |
bae48da2 | 3822 | { |
2d6c06f5 | 3823 | unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT; |
35c5d7fd | 3824 | struct gpio_desc *desc = NULL; |
d377f56f | 3825 | int ret; |
7d18f0a1 LW |
3826 | /* Maybe we have a device name, maybe not */ |
3827 | const char *devname = dev ? dev_name(dev) : "?"; | |
944f4b0a | 3828 | const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL; |
bae48da2 AC |
3829 | |
3830 | dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id); | |
3831 | ||
944f4b0a AS |
3832 | /* Using device tree? */ |
3833 | if (is_of_node(fwnode)) { | |
3834 | dev_dbg(dev, "using device tree for GPIO lookup\n"); | |
3835 | desc = of_find_gpio(dev, con_id, idx, &lookupflags); | |
3836 | } else if (is_acpi_node(fwnode)) { | |
3837 | dev_dbg(dev, "using ACPI for GPIO lookup\n"); | |
3838 | desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags); | |
35c5d7fd AC |
3839 | } |
3840 | ||
3841 | /* | |
3842 | * Either we are not using DT or ACPI, or their lookup did not return | |
3843 | * a result. In that case, use platform lookup as a fallback. | |
3844 | */ | |
7b58696d | 3845 | if (!desc || gpiod_not_found(desc)) { |
43a8785a | 3846 | dev_dbg(dev, "using lookup tables for GPIO lookup\n"); |
39b2bbe3 | 3847 | desc = gpiod_find(dev, con_id, idx, &lookupflags); |
bae48da2 AC |
3848 | } |
3849 | ||
3850 | if (IS_ERR(desc)) { | |
9d5a1f2c | 3851 | dev_dbg(dev, "No GPIO consumer %s found\n", con_id); |
bae48da2 AC |
3852 | return desc; |
3853 | } | |
3854 | ||
7d18f0a1 LW |
3855 | /* |
3856 | * If a connection label was passed use that, else attempt to use | |
3857 | * the device name as label | |
3858 | */ | |
d377f56f | 3859 | ret = gpiod_request(desc, con_id ? con_id : devname); |
8bbff39c | 3860 | if (ret) { |
d377f56f | 3861 | if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) { |
b0ce7b29 LW |
3862 | /* |
3863 | * This happens when there are several consumers for | |
3864 | * the same GPIO line: we just return here without | |
3865 | * further initialization. It is a bit if a hack. | |
3866 | * This is necessary to support fixed regulators. | |
3867 | * | |
3868 | * FIXME: Make this more sane and safe. | |
3869 | */ | |
3870 | dev_info(dev, "nonexclusive access to GPIO for %s\n", | |
3871 | con_id ? con_id : devname); | |
3872 | return desc; | |
3873 | } else { | |
d377f56f | 3874 | return ERR_PTR(ret); |
b0ce7b29 LW |
3875 | } |
3876 | } | |
bae48da2 | 3877 | |
d377f56f | 3878 | ret = gpiod_configure_flags(desc, con_id, lookupflags, flags); |
6392cca4 | 3879 | if (ret < 0) { |
39b2bbe3 | 3880 | dev_dbg(dev, "setup of GPIO %s failed\n", con_id); |
6392cca4 LW |
3881 | gpiod_put(desc); |
3882 | return ERR_PTR(ret); | |
3883 | } | |
3884 | ||
6accc376 KG |
3885 | blocking_notifier_call_chain(&desc->gdev->notifier, |
3886 | GPIOLINE_CHANGED_REQUESTED, desc); | |
9fefca77 | 3887 | |
6392cca4 LW |
3888 | return desc; |
3889 | } | |
b17d1bf1 | 3890 | EXPORT_SYMBOL_GPL(gpiod_get_index); |
6392cca4 | 3891 | |
40b73183 MW |
3892 | /** |
3893 | * fwnode_get_named_gpiod - obtain a GPIO from firmware node | |
3894 | * @fwnode: handle of the firmware node | |
3895 | * @propname: name of the firmware property representing the GPIO | |
6392cca4 | 3896 | * @index: index of the GPIO to obtain for the consumer |
a264d10f | 3897 | * @dflags: GPIO initialization flags |
950d55f5 | 3898 | * @label: label to attach to the requested GPIO |
40b73183 MW |
3899 | * |
3900 | * This function can be used for drivers that get their configuration | |
6392cca4 | 3901 | * from opaque firmware. |
40b73183 | 3902 | * |
6392cca4 | 3903 | * The function properly finds the corresponding GPIO using whatever is the |
40b73183 MW |
3904 | * underlying firmware interface and then makes sure that the GPIO |
3905 | * descriptor is requested before it is returned to the caller. | |
3906 | * | |
950d55f5 | 3907 | * Returns: |
ff21378a | 3908 | * On successful request the GPIO pin is configured in accordance with |
a264d10f AS |
3909 | * provided @dflags. |
3910 | * | |
40b73183 MW |
3911 | * In case of error an ERR_PTR() is returned. |
3912 | */ | |
3913 | struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode, | |
537b94da | 3914 | const char *propname, int index, |
b2987d74 AS |
3915 | enum gpiod_flags dflags, |
3916 | const char *label) | |
40b73183 | 3917 | { |
2d6c06f5 | 3918 | unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT; |
40b73183 | 3919 | struct gpio_desc *desc = ERR_PTR(-ENODEV); |
40b73183 MW |
3920 | int ret; |
3921 | ||
40b73183 | 3922 | if (is_of_node(fwnode)) { |
6392cca4 LW |
3923 | desc = gpiod_get_from_of_node(to_of_node(fwnode), |
3924 | propname, index, | |
3925 | dflags, | |
3926 | label); | |
3927 | return desc; | |
40b73183 MW |
3928 | } else if (is_acpi_node(fwnode)) { |
3929 | struct acpi_gpio_info info; | |
3930 | ||
537b94da | 3931 | desc = acpi_node_get_gpiod(fwnode, propname, index, &info); |
6392cca4 LW |
3932 | if (IS_ERR(desc)) |
3933 | return desc; | |
40b73183 | 3934 | |
6392cca4 | 3935 | acpi_gpio_update_gpiod_flags(&dflags, &info); |
606be344 | 3936 | acpi_gpio_update_gpiod_lookup_flags(&lflags, &info); |
944f4b0a AS |
3937 | } else |
3938 | return ERR_PTR(-EINVAL); | |
40b73183 | 3939 | |
6392cca4 | 3940 | /* Currently only ACPI takes this path */ |
b2987d74 | 3941 | ret = gpiod_request(desc, label); |
85b03b30 JH |
3942 | if (ret) |
3943 | return ERR_PTR(ret); | |
3944 | ||
a264d10f AS |
3945 | ret = gpiod_configure_flags(desc, propname, lflags, dflags); |
3946 | if (ret < 0) { | |
3947 | gpiod_put(desc); | |
3948 | return ERR_PTR(ret); | |
90b665f6 LP |
3949 | } |
3950 | ||
6accc376 KG |
3951 | blocking_notifier_call_chain(&desc->gdev->notifier, |
3952 | GPIOLINE_CHANGED_REQUESTED, desc); | |
9fefca77 | 3953 | |
40b73183 MW |
3954 | return desc; |
3955 | } | |
3956 | EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod); | |
3957 | ||
29a1f233 TR |
3958 | /** |
3959 | * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO | |
3960 | * function | |
3961 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
3962 | * @con_id: function within the GPIO consumer | |
3963 | * @index: index of the GPIO to obtain in the consumer | |
39b2bbe3 | 3964 | * @flags: optional GPIO initialization flags |
29a1f233 TR |
3965 | * |
3966 | * This is equivalent to gpiod_get_index(), except that when no GPIO with the | |
3967 | * specified index was assigned to the requested function it will return NULL. | |
3968 | * This is convenient for drivers that need to handle optional GPIOs. | |
3969 | */ | |
b17d1bf1 | 3970 | struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev, |
29a1f233 | 3971 | const char *con_id, |
39b2bbe3 AC |
3972 | unsigned int index, |
3973 | enum gpiod_flags flags) | |
29a1f233 TR |
3974 | { |
3975 | struct gpio_desc *desc; | |
3976 | ||
39b2bbe3 | 3977 | desc = gpiod_get_index(dev, con_id, index, flags); |
7b58696d AS |
3978 | if (gpiod_not_found(desc)) |
3979 | return NULL; | |
29a1f233 TR |
3980 | |
3981 | return desc; | |
3982 | } | |
b17d1bf1 | 3983 | EXPORT_SYMBOL_GPL(gpiod_get_index_optional); |
29a1f233 | 3984 | |
f625d460 BP |
3985 | /** |
3986 | * gpiod_hog - Hog the specified GPIO desc given the provided flags | |
3987 | * @desc: gpio whose value will be assigned | |
3988 | * @name: gpio line name | |
fed7026a AS |
3989 | * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from |
3990 | * of_find_gpio() or of_get_gpio_hog() | |
f625d460 BP |
3991 | * @dflags: gpiod_flags - optional GPIO initialization flags |
3992 | */ | |
3993 | int gpiod_hog(struct gpio_desc *desc, const char *name, | |
3994 | unsigned long lflags, enum gpiod_flags dflags) | |
3995 | { | |
a0b66a73 | 3996 | struct gpio_chip *gc; |
f625d460 BP |
3997 | struct gpio_desc *local_desc; |
3998 | int hwnum; | |
d377f56f | 3999 | int ret; |
f625d460 | 4000 | |
a0b66a73 | 4001 | gc = gpiod_to_chip(desc); |
f625d460 BP |
4002 | hwnum = gpio_chip_hwgpio(desc); |
4003 | ||
a0b66a73 | 4004 | local_desc = gpiochip_request_own_desc(gc, hwnum, name, |
5923ea6c | 4005 | lflags, dflags); |
f625d460 | 4006 | if (IS_ERR(local_desc)) { |
d377f56f | 4007 | ret = PTR_ERR(local_desc); |
c31a571d | 4008 | pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n", |
a0b66a73 | 4009 | name, gc->label, hwnum, ret); |
d377f56f | 4010 | return ret; |
f625d460 BP |
4011 | } |
4012 | ||
f625d460 BP |
4013 | /* Mark GPIO as hogged so it can be identified and removed later */ |
4014 | set_bit(FLAG_IS_HOGGED, &desc->flags); | |
4015 | ||
262b9011 | 4016 | gpiod_info(desc, "hogged as %s%s\n", |
b27f300f BG |
4017 | (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input", |
4018 | (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? | |
4019 | (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : ""); | |
f625d460 BP |
4020 | |
4021 | return 0; | |
4022 | } | |
4023 | ||
4024 | /** | |
4025 | * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog | |
a0b66a73 | 4026 | * @gc: gpio chip to act on |
f625d460 | 4027 | */ |
a0b66a73 | 4028 | static void gpiochip_free_hogs(struct gpio_chip *gc) |
f625d460 BP |
4029 | { |
4030 | int id; | |
4031 | ||
a0b66a73 LW |
4032 | for (id = 0; id < gc->ngpio; id++) { |
4033 | if (test_bit(FLAG_IS_HOGGED, &gc->gpiodev->descs[id].flags)) | |
4034 | gpiochip_free_own_desc(&gc->gpiodev->descs[id]); | |
f625d460 BP |
4035 | } |
4036 | } | |
4037 | ||
66858527 RI |
4038 | /** |
4039 | * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function | |
4040 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4041 | * @con_id: function within the GPIO consumer | |
4042 | * @flags: optional GPIO initialization flags | |
4043 | * | |
4044 | * This function acquires all the GPIOs defined under a given function. | |
4045 | * | |
4046 | * Return a struct gpio_descs containing an array of descriptors, -ENOENT if | |
4047 | * no GPIO has been assigned to the requested function, or another IS_ERR() | |
4048 | * code if an error occurred while trying to acquire the GPIOs. | |
4049 | */ | |
4050 | struct gpio_descs *__must_check gpiod_get_array(struct device *dev, | |
4051 | const char *con_id, | |
4052 | enum gpiod_flags flags) | |
4053 | { | |
4054 | struct gpio_desc *desc; | |
4055 | struct gpio_descs *descs; | |
bf9346f5 | 4056 | struct gpio_array *array_info = NULL; |
a0b66a73 | 4057 | struct gpio_chip *gc; |
bf9346f5 | 4058 | int count, bitmap_size; |
66858527 RI |
4059 | |
4060 | count = gpiod_count(dev, con_id); | |
4061 | if (count < 0) | |
4062 | return ERR_PTR(count); | |
4063 | ||
acafe7e3 | 4064 | descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL); |
66858527 RI |
4065 | if (!descs) |
4066 | return ERR_PTR(-ENOMEM); | |
4067 | ||
4068 | for (descs->ndescs = 0; descs->ndescs < count; ) { | |
4069 | desc = gpiod_get_index(dev, con_id, descs->ndescs, flags); | |
4070 | if (IS_ERR(desc)) { | |
4071 | gpiod_put_array(descs); | |
4072 | return ERR_CAST(desc); | |
4073 | } | |
bf9346f5 | 4074 | |
66858527 | 4075 | descs->desc[descs->ndescs] = desc; |
bf9346f5 | 4076 | |
a0b66a73 | 4077 | gc = gpiod_to_chip(desc); |
bf9346f5 | 4078 | /* |
c4c958aa JK |
4079 | * If pin hardware number of array member 0 is also 0, select |
4080 | * its chip as a candidate for fast bitmap processing path. | |
bf9346f5 | 4081 | */ |
c4c958aa | 4082 | if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) { |
bf9346f5 JK |
4083 | struct gpio_descs *array; |
4084 | ||
a0b66a73 LW |
4085 | bitmap_size = BITS_TO_LONGS(gc->ngpio > count ? |
4086 | gc->ngpio : count); | |
bf9346f5 JK |
4087 | |
4088 | array = kzalloc(struct_size(descs, desc, count) + | |
4089 | struct_size(array_info, invert_mask, | |
4090 | 3 * bitmap_size), GFP_KERNEL); | |
4091 | if (!array) { | |
4092 | gpiod_put_array(descs); | |
4093 | return ERR_PTR(-ENOMEM); | |
4094 | } | |
4095 | ||
4096 | memcpy(array, descs, | |
4097 | struct_size(descs, desc, descs->ndescs + 1)); | |
4098 | kfree(descs); | |
4099 | ||
4100 | descs = array; | |
4101 | array_info = (void *)(descs->desc + count); | |
4102 | array_info->get_mask = array_info->invert_mask + | |
4103 | bitmap_size; | |
4104 | array_info->set_mask = array_info->get_mask + | |
4105 | bitmap_size; | |
4106 | ||
4107 | array_info->desc = descs->desc; | |
4108 | array_info->size = count; | |
a0b66a73 | 4109 | array_info->chip = gc; |
bf9346f5 JK |
4110 | bitmap_set(array_info->get_mask, descs->ndescs, |
4111 | count - descs->ndescs); | |
4112 | bitmap_set(array_info->set_mask, descs->ndescs, | |
4113 | count - descs->ndescs); | |
4114 | descs->info = array_info; | |
4115 | } | |
c4c958aa | 4116 | /* Unmark array members which don't belong to the 'fast' chip */ |
a0b66a73 | 4117 | if (array_info && array_info->chip != gc) { |
bf9346f5 JK |
4118 | __clear_bit(descs->ndescs, array_info->get_mask); |
4119 | __clear_bit(descs->ndescs, array_info->set_mask); | |
c4c958aa JK |
4120 | } |
4121 | /* | |
4122 | * Detect array members which belong to the 'fast' chip | |
4123 | * but their pins are not in hardware order. | |
4124 | */ | |
4125 | else if (array_info && | |
4126 | gpio_chip_hwgpio(desc) != descs->ndescs) { | |
4127 | /* | |
4128 | * Don't use fast path if all array members processed so | |
4129 | * far belong to the same chip as this one but its pin | |
4130 | * hardware number is different from its array index. | |
4131 | */ | |
4132 | if (bitmap_full(array_info->get_mask, descs->ndescs)) { | |
4133 | array_info = NULL; | |
4134 | } else { | |
4135 | __clear_bit(descs->ndescs, | |
4136 | array_info->get_mask); | |
4137 | __clear_bit(descs->ndescs, | |
4138 | array_info->set_mask); | |
4139 | } | |
bf9346f5 JK |
4140 | } else if (array_info) { |
4141 | /* Exclude open drain or open source from fast output */ | |
a0b66a73 LW |
4142 | if (gpiochip_line_is_open_drain(gc, descs->ndescs) || |
4143 | gpiochip_line_is_open_source(gc, descs->ndescs)) | |
bf9346f5 JK |
4144 | __clear_bit(descs->ndescs, |
4145 | array_info->set_mask); | |
4146 | /* Identify 'fast' pins which require invertion */ | |
4147 | if (gpiod_is_active_low(desc)) | |
4148 | __set_bit(descs->ndescs, | |
4149 | array_info->invert_mask); | |
4150 | } | |
4151 | ||
66858527 RI |
4152 | descs->ndescs++; |
4153 | } | |
bf9346f5 JK |
4154 | if (array_info) |
4155 | dev_dbg(dev, | |
4156 | "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n", | |
4157 | array_info->chip->label, array_info->size, | |
4158 | *array_info->get_mask, *array_info->set_mask, | |
4159 | *array_info->invert_mask); | |
66858527 RI |
4160 | return descs; |
4161 | } | |
4162 | EXPORT_SYMBOL_GPL(gpiod_get_array); | |
4163 | ||
4164 | /** | |
4165 | * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO | |
4166 | * function | |
4167 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4168 | * @con_id: function within the GPIO consumer | |
4169 | * @flags: optional GPIO initialization flags | |
4170 | * | |
4171 | * This is equivalent to gpiod_get_array(), except that when no GPIO was | |
4172 | * assigned to the requested function it will return NULL. | |
4173 | */ | |
4174 | struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev, | |
4175 | const char *con_id, | |
4176 | enum gpiod_flags flags) | |
4177 | { | |
4178 | struct gpio_descs *descs; | |
4179 | ||
4180 | descs = gpiod_get_array(dev, con_id, flags); | |
7b58696d | 4181 | if (gpiod_not_found(descs)) |
66858527 RI |
4182 | return NULL; |
4183 | ||
4184 | return descs; | |
4185 | } | |
4186 | EXPORT_SYMBOL_GPL(gpiod_get_array_optional); | |
4187 | ||
bae48da2 AC |
4188 | /** |
4189 | * gpiod_put - dispose of a GPIO descriptor | |
4190 | * @desc: GPIO descriptor to dispose of | |
4191 | * | |
4192 | * No descriptor can be used after gpiod_put() has been called on it. | |
4193 | */ | |
4194 | void gpiod_put(struct gpio_desc *desc) | |
4195 | { | |
1d7765ba AS |
4196 | if (desc) |
4197 | gpiod_free(desc); | |
372e722e | 4198 | } |
bae48da2 | 4199 | EXPORT_SYMBOL_GPL(gpiod_put); |
d2876d08 | 4200 | |
66858527 RI |
4201 | /** |
4202 | * gpiod_put_array - dispose of multiple GPIO descriptors | |
4203 | * @descs: struct gpio_descs containing an array of descriptors | |
4204 | */ | |
4205 | void gpiod_put_array(struct gpio_descs *descs) | |
4206 | { | |
4207 | unsigned int i; | |
4208 | ||
4209 | for (i = 0; i < descs->ndescs; i++) | |
4210 | gpiod_put(descs->desc[i]); | |
4211 | ||
4212 | kfree(descs); | |
4213 | } | |
4214 | EXPORT_SYMBOL_GPL(gpiod_put_array); | |
4215 | ||
ced2af41 SK |
4216 | |
4217 | static int gpio_bus_match(struct device *dev, struct device_driver *drv) | |
4218 | { | |
1df62542 AS |
4219 | struct fwnode_handle *fwnode = dev_fwnode(dev); |
4220 | ||
ced2af41 SK |
4221 | /* |
4222 | * Only match if the fwnode doesn't already have a proper struct device | |
4223 | * created for it. | |
4224 | */ | |
1df62542 | 4225 | if (fwnode && fwnode->dev != dev) |
ced2af41 SK |
4226 | return 0; |
4227 | return 1; | |
4228 | } | |
4229 | ||
4731210c SK |
4230 | static int gpio_stub_drv_probe(struct device *dev) |
4231 | { | |
4232 | /* | |
4233 | * The DT node of some GPIO chips have a "compatible" property, but | |
4234 | * never have a struct device added and probed by a driver to register | |
4235 | * the GPIO chip with gpiolib. In such cases, fw_devlink=on will cause | |
4236 | * the consumers of the GPIO chip to get probe deferred forever because | |
4237 | * they will be waiting for a device associated with the GPIO chip | |
4238 | * firmware node to get added and bound to a driver. | |
4239 | * | |
4240 | * To allow these consumers to probe, we associate the struct | |
4241 | * gpio_device of the GPIO chip with the firmware node and then simply | |
4242 | * bind it to this stub driver. | |
4243 | */ | |
4244 | return 0; | |
4245 | } | |
4246 | ||
4247 | static struct device_driver gpio_stub_drv = { | |
4248 | .name = "gpio_stub_drv", | |
4249 | .bus = &gpio_bus_type, | |
4250 | .probe = gpio_stub_drv_probe, | |
4251 | }; | |
4252 | ||
3c702e99 LW |
4253 | static int __init gpiolib_dev_init(void) |
4254 | { | |
4255 | int ret; | |
4256 | ||
4257 | /* Register GPIO sysfs bus */ | |
b1911710 | 4258 | ret = bus_register(&gpio_bus_type); |
3c702e99 LW |
4259 | if (ret < 0) { |
4260 | pr_err("gpiolib: could not register GPIO bus type\n"); | |
4261 | return ret; | |
4262 | } | |
4263 | ||
3875721e WY |
4264 | ret = driver_register(&gpio_stub_drv); |
4265 | if (ret < 0) { | |
4731210c SK |
4266 | pr_err("gpiolib: could not register GPIO stub driver\n"); |
4267 | bus_unregister(&gpio_bus_type); | |
4268 | return ret; | |
4269 | } | |
4270 | ||
ddd8891e | 4271 | ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME); |
3c702e99 LW |
4272 | if (ret < 0) { |
4273 | pr_err("gpiolib: failed to allocate char dev region\n"); | |
4731210c | 4274 | driver_unregister(&gpio_stub_drv); |
3c702e99 | 4275 | bus_unregister(&gpio_bus_type); |
63636d95 | 4276 | return ret; |
3c702e99 | 4277 | } |
63636d95 GU |
4278 | |
4279 | gpiolib_initialized = true; | |
4280 | gpiochip_setup_devs(); | |
4281 | ||
8650b609 DG |
4282 | #if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO) |
4283 | WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier)); | |
4284 | #endif /* CONFIG_OF_DYNAMIC && CONFIG_OF_GPIO */ | |
63636d95 | 4285 | |
3c702e99 LW |
4286 | return ret; |
4287 | } | |
4288 | core_initcall(gpiolib_dev_init); | |
4289 | ||
d2876d08 DB |
4290 | #ifdef CONFIG_DEBUG_FS |
4291 | ||
fdeb8e15 | 4292 | static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev) |
d2876d08 DB |
4293 | { |
4294 | unsigned i; | |
a0b66a73 | 4295 | struct gpio_chip *gc = gdev->chip; |
fdeb8e15 LW |
4296 | unsigned gpio = gdev->base; |
4297 | struct gpio_desc *gdesc = &gdev->descs[0]; | |
90fd2270 LW |
4298 | bool is_out; |
4299 | bool is_irq; | |
4300 | bool active_low; | |
d2876d08 | 4301 | |
fdeb8e15 | 4302 | for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) { |
ced433e2 MP |
4303 | if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) { |
4304 | if (gdesc->name) { | |
4305 | seq_printf(s, " gpio-%-3d (%-20.20s)\n", | |
4306 | gpio, gdesc->name); | |
4307 | } | |
d2876d08 | 4308 | continue; |
ced433e2 | 4309 | } |
d2876d08 | 4310 | |
372e722e | 4311 | gpiod_get_direction(gdesc); |
d2876d08 | 4312 | is_out = test_bit(FLAG_IS_OUT, &gdesc->flags); |
d468bf9e | 4313 | is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags); |
90fd2270 LW |
4314 | active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags); |
4315 | seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s", | |
ced433e2 | 4316 | gpio, gdesc->name ? gdesc->name : "", gdesc->label, |
d2876d08 | 4317 | is_out ? "out" : "in ", |
a0b66a73 | 4318 | gc->get ? (gc->get(gc, i) ? "hi" : "lo") : "? ", |
90fd2270 LW |
4319 | is_irq ? "IRQ " : "", |
4320 | active_low ? "ACTIVE LOW" : ""); | |
d2876d08 DB |
4321 | seq_printf(s, "\n"); |
4322 | } | |
4323 | } | |
4324 | ||
f9c4a31f | 4325 | static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos) |
d2876d08 | 4326 | { |
362432ae | 4327 | unsigned long flags; |
ff2b1359 | 4328 | struct gpio_device *gdev = NULL; |
cb1650d4 | 4329 | loff_t index = *pos; |
d2876d08 | 4330 | |
f9c4a31f | 4331 | s->private = ""; |
d2876d08 | 4332 | |
362432ae | 4333 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 4334 | list_for_each_entry(gdev, &gpio_devices, list) |
362432ae GL |
4335 | if (index-- == 0) { |
4336 | spin_unlock_irqrestore(&gpio_lock, flags); | |
ff2b1359 | 4337 | return gdev; |
f9c4a31f | 4338 | } |
362432ae | 4339 | spin_unlock_irqrestore(&gpio_lock, flags); |
f9c4a31f | 4340 | |
cb1650d4 | 4341 | return NULL; |
f9c4a31f TR |
4342 | } |
4343 | ||
4344 | static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos) | |
4345 | { | |
362432ae | 4346 | unsigned long flags; |
ff2b1359 | 4347 | struct gpio_device *gdev = v; |
f9c4a31f TR |
4348 | void *ret = NULL; |
4349 | ||
362432ae | 4350 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 4351 | if (list_is_last(&gdev->list, &gpio_devices)) |
cb1650d4 AC |
4352 | ret = NULL; |
4353 | else | |
ff2b1359 | 4354 | ret = list_entry(gdev->list.next, struct gpio_device, list); |
362432ae | 4355 | spin_unlock_irqrestore(&gpio_lock, flags); |
f9c4a31f TR |
4356 | |
4357 | s->private = "\n"; | |
4358 | ++*pos; | |
4359 | ||
4360 | return ret; | |
4361 | } | |
4362 | ||
4363 | static void gpiolib_seq_stop(struct seq_file *s, void *v) | |
4364 | { | |
4365 | } | |
4366 | ||
4367 | static int gpiolib_seq_show(struct seq_file *s, void *v) | |
4368 | { | |
ff2b1359 | 4369 | struct gpio_device *gdev = v; |
a0b66a73 | 4370 | struct gpio_chip *gc = gdev->chip; |
ff2b1359 LW |
4371 | struct device *parent; |
4372 | ||
a0b66a73 | 4373 | if (!gc) { |
ff2b1359 LW |
4374 | seq_printf(s, "%s%s: (dangling chip)", (char *)s->private, |
4375 | dev_name(&gdev->dev)); | |
4376 | return 0; | |
4377 | } | |
f9c4a31f | 4378 | |
ff2b1359 LW |
4379 | seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private, |
4380 | dev_name(&gdev->dev), | |
fdeb8e15 | 4381 | gdev->base, gdev->base + gdev->ngpio - 1); |
a0b66a73 | 4382 | parent = gc->parent; |
ff2b1359 LW |
4383 | if (parent) |
4384 | seq_printf(s, ", parent: %s/%s", | |
4385 | parent->bus ? parent->bus->name : "no-bus", | |
4386 | dev_name(parent)); | |
a0b66a73 LW |
4387 | if (gc->label) |
4388 | seq_printf(s, ", %s", gc->label); | |
4389 | if (gc->can_sleep) | |
f9c4a31f TR |
4390 | seq_printf(s, ", can sleep"); |
4391 | seq_printf(s, ":\n"); | |
4392 | ||
a0b66a73 LW |
4393 | if (gc->dbg_show) |
4394 | gc->dbg_show(s, gc); | |
f9c4a31f | 4395 | else |
fdeb8e15 | 4396 | gpiolib_dbg_show(s, gdev); |
f9c4a31f | 4397 | |
d2876d08 DB |
4398 | return 0; |
4399 | } | |
4400 | ||
425c5b3e | 4401 | static const struct seq_operations gpiolib_sops = { |
f9c4a31f TR |
4402 | .start = gpiolib_seq_start, |
4403 | .next = gpiolib_seq_next, | |
4404 | .stop = gpiolib_seq_stop, | |
4405 | .show = gpiolib_seq_show, | |
4406 | }; | |
425c5b3e | 4407 | DEFINE_SEQ_ATTRIBUTE(gpiolib); |
d2876d08 DB |
4408 | |
4409 | static int __init gpiolib_debugfs_init(void) | |
4410 | { | |
4411 | /* /sys/kernel/debug/gpio */ | |
425c5b3e | 4412 | debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops); |
d2876d08 DB |
4413 | return 0; |
4414 | } | |
4415 | subsys_initcall(gpiolib_debugfs_init); | |
4416 | ||
4417 | #endif /* DEBUG_FS */ |