gpiolib: of: Use named item for enum gpiod_flags variable
[linux-block.git] / drivers / gpio / gpiolib.c
CommitLineData
dae5f0af 1// SPDX-License-Identifier: GPL-2.0
923a654c 2#include <linux/bitmap.h>
d2876d08
DB
3#include <linux/kernel.h>
4#include <linux/module.h>
ff77c352 5#include <linux/interrupt.h>
d2876d08
DB
6#include <linux/irq.h>
7#include <linux/spinlock.h>
1a989d0f 8#include <linux/list.h>
d8f388d8
DB
9#include <linux/device.h>
10#include <linux/err.h>
11#include <linux/debugfs.h>
12#include <linux/seq_file.h>
13#include <linux/gpio.h>
ff77c352 14#include <linux/idr.h>
5a0e3ad6 15#include <linux/slab.h>
7b199811 16#include <linux/acpi.h>
53e7cac3 17#include <linux/gpio/driver.h>
0a6d3158 18#include <linux/gpio/machine.h>
c771c2f4 19#include <linux/pinctrl/consumer.h>
3c702e99 20#include <linux/fs.h>
8b92e17e 21#include <linux/compat.h>
953b956a 22#include <linux/file.h>
3c702e99 23#include <uapi/linux/gpio.h>
d2876d08 24
664e3e5a 25#include "gpiolib.h"
f626d6df 26#include "gpiolib-of.h"
77cb907a 27#include "gpiolib-acpi.h"
925ca369 28#include "gpiolib-cdev.h"
ef087d8e 29#include "gpiolib-sysfs.h"
664e3e5a 30
3f397c21
UKK
31#define CREATE_TRACE_POINTS
32#include <trace/events/gpio.h>
d2876d08 33
79a9becd 34/* Implementation infrastructure for GPIO interfaces.
d2876d08 35 *
79a9becd
AC
36 * The GPIO programming interface allows for inlining speed-critical
37 * get/set operations for common cases, so that access to SOC-integrated
38 * GPIOs can sometimes cost only an instruction or two per bit.
d2876d08
DB
39 */
40
41
42/* When debugging, extend minimal trust to callers and platform code.
43 * Also emit diagnostic messages that may help initial bringup, when
44 * board setup or driver bugs are most common.
45 *
46 * Otherwise, minimize overhead in what may be bitbanging codepaths.
47 */
48#ifdef DEBUG
49#define extra_checks 1
50#else
51#define extra_checks 0
52#endif
53
ff2b1359
LW
54/* Device and char device-related information */
55static DEFINE_IDA(gpio_ida);
3c702e99
LW
56static dev_t gpio_devt;
57#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
58static struct bus_type gpio_bus_type = {
59 .name = "gpio",
60};
ff2b1359 61
3027743f
LA
62/*
63 * Number of GPIOs to use for the fast path in set array
64 */
65#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
66
d2876d08
DB
67/* gpio_lock prevents conflicts during gpio_desc[] table updates.
68 * While any GPIO is requested, its gpio_chip is not removable;
69 * each GPIO's "requested" flag serves as a lock and refcount.
70 */
0eb4c6c2 71DEFINE_SPINLOCK(gpio_lock);
d2876d08 72
bae48da2
AC
73static DEFINE_MUTEX(gpio_lookup_lock);
74static LIST_HEAD(gpio_lookup_list);
ff2b1359 75LIST_HEAD(gpio_devices);
6d86750c 76
a411e81e
BG
77static DEFINE_MUTEX(gpio_machine_hogs_mutex);
78static LIST_HEAD(gpio_machine_hogs);
79
a0b66a73
LW
80static void gpiochip_free_hogs(struct gpio_chip *gc);
81static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
82 struct lock_class_key *lock_key,
83 struct lock_class_key *request_key);
a0b66a73
LW
84static void gpiochip_irqchip_remove(struct gpio_chip *gc);
85static int gpiochip_irqchip_init_hw(struct gpio_chip *gc);
86static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc);
87static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc);
6d86750c 88
159f3cd9 89static bool gpiolib_initialized;
6d86750c 90
d2876d08
DB
91static inline void desc_set_label(struct gpio_desc *d, const char *label)
92{
d2876d08 93 d->label = label;
d2876d08
DB
94}
95
372e722e 96/**
950d55f5
TR
97 * gpio_to_desc - Convert a GPIO number to its descriptor
98 * @gpio: global GPIO number
99 *
100 * Returns:
101 * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
102 * with the given number exists in the system.
372e722e 103 */
79a9becd 104struct gpio_desc *gpio_to_desc(unsigned gpio)
372e722e 105{
ff2b1359 106 struct gpio_device *gdev;
14e85c0e
AC
107 unsigned long flags;
108
109 spin_lock_irqsave(&gpio_lock, flags);
110
ff2b1359 111 list_for_each_entry(gdev, &gpio_devices, list) {
fdeb8e15
LW
112 if (gdev->base <= gpio &&
113 gdev->base + gdev->ngpio > gpio) {
14e85c0e 114 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 115 return &gdev->descs[gpio - gdev->base];
14e85c0e
AC
116 }
117 }
118
119 spin_unlock_irqrestore(&gpio_lock, flags);
120
0e9a5edf
AC
121 if (!gpio_is_valid(gpio))
122 WARN(1, "invalid GPIO %d\n", gpio);
123
14e85c0e 124 return NULL;
372e722e 125}
79a9becd 126EXPORT_SYMBOL_GPL(gpio_to_desc);
372e722e 127
d468bf9e 128/**
950d55f5
TR
129 * gpiochip_get_desc - get the GPIO descriptor corresponding to the given
130 * hardware number for this chip
a0b66a73 131 * @gc: GPIO chip
950d55f5
TR
132 * @hwnum: hardware number of the GPIO for this chip
133 *
134 * Returns:
35c6cfb4 135 * A pointer to the GPIO descriptor or ``ERR_PTR(-EINVAL)`` if no GPIO exists
950d55f5 136 * in the given chip for the specified hardware number.
d468bf9e 137 */
a0b66a73 138struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc,
06863620 139 unsigned int hwnum)
d468bf9e 140{
a0b66a73 141 struct gpio_device *gdev = gc->gpiodev;
fdeb8e15
LW
142
143 if (hwnum >= gdev->ngpio)
b7d0a28a 144 return ERR_PTR(-EINVAL);
d468bf9e 145
fdeb8e15 146 return &gdev->descs[hwnum];
d468bf9e 147}
97795420 148EXPORT_SYMBOL_GPL(gpiochip_get_desc);
372e722e
AC
149
150/**
950d55f5
TR
151 * desc_to_gpio - convert a GPIO descriptor to the integer namespace
152 * @desc: GPIO descriptor
153 *
372e722e 154 * This should disappear in the future but is needed since we still
950d55f5
TR
155 * use GPIO numbers for error messages and sysfs nodes.
156 *
157 * Returns:
158 * The global GPIO number for the GPIO specified by its descriptor.
372e722e 159 */
79a9becd 160int desc_to_gpio(const struct gpio_desc *desc)
372e722e 161{
fdeb8e15 162 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
372e722e 163}
79a9becd 164EXPORT_SYMBOL_GPL(desc_to_gpio);
372e722e
AC
165
166
79a9becd
AC
167/**
168 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
169 * @desc: descriptor to return the chip of
170 */
171struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
372e722e 172{
dd3b9a44 173 if (!desc || !desc->gdev)
fdeb8e15
LW
174 return NULL;
175 return desc->gdev->chip;
372e722e 176}
79a9becd 177EXPORT_SYMBOL_GPL(gpiod_to_chip);
d2876d08 178
8d0aab2f
AV
179/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
180static int gpiochip_find_base(int ngpio)
181{
ff2b1359 182 struct gpio_device *gdev;
83cabe33 183 int base = ARCH_NR_GPIOS - ngpio;
8d0aab2f 184
ff2b1359 185 list_for_each_entry_reverse(gdev, &gpio_devices, list) {
83cabe33 186 /* found a free space? */
fdeb8e15 187 if (gdev->base + gdev->ngpio <= base)
83cabe33
AC
188 break;
189 else
190 /* nope, check the space right before the chip */
fdeb8e15 191 base = gdev->base - ngpio;
8d0aab2f
AV
192 }
193
83cabe33 194 if (gpio_is_valid(base)) {
8d0aab2f 195 pr_debug("%s: found new base at %d\n", __func__, base);
83cabe33
AC
196 return base;
197 } else {
198 pr_err("%s: cannot find free range\n", __func__);
199 return -ENOSPC;
169b6a7a 200 }
169b6a7a
AV
201}
202
79a9becd
AC
203/**
204 * gpiod_get_direction - return the current direction of a GPIO
205 * @desc: GPIO to get the direction of
206 *
94fc7309 207 * Returns 0 for output, 1 for input, or an error code in case of error.
79a9becd
AC
208 *
209 * This function may sleep if gpiod_cansleep() is true.
210 */
8e53b0f1 211int gpiod_get_direction(struct gpio_desc *desc)
80b0a602 212{
a0b66a73 213 struct gpio_chip *gc;
d0121b85 214 unsigned offset;
d377f56f 215 int ret;
80b0a602 216
a0b66a73 217 gc = gpiod_to_chip(desc);
372e722e 218 offset = gpio_chip_hwgpio(desc);
80b0a602 219
256efaea
RK
220 /*
221 * Open drain emulation using input mode may incorrectly report
222 * input here, fix that up.
223 */
224 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) &&
225 test_bit(FLAG_IS_OUT, &desc->flags))
226 return 0;
227
a0b66a73 228 if (!gc->get_direction)
d0121b85 229 return -ENOTSUPP;
80b0a602 230
a0b66a73 231 ret = gc->get_direction(gc, offset);
4fc5bfeb
AS
232 if (ret < 0)
233 return ret;
234
235 /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */
236 if (ret > 0)
d377f56f 237 ret = 1;
4fc5bfeb
AS
238
239 assign_bit(FLAG_IS_OUT, &desc->flags, !ret);
240
d377f56f 241 return ret;
80b0a602 242}
79a9becd 243EXPORT_SYMBOL_GPL(gpiod_get_direction);
80b0a602 244
1a989d0f
AC
245/*
246 * Add a new chip to the global chips list, keeping the list of chips sorted
ef7c7553 247 * by range(means [base, base + ngpio - 1]) order.
1a989d0f
AC
248 *
249 * Return -EBUSY if the new chip overlaps with some other chip's integer
250 * space.
251 */
ff2b1359 252static int gpiodev_add_to_list(struct gpio_device *gdev)
1a989d0f 253{
a961f9b4 254 struct gpio_device *prev, *next;
1a989d0f 255
ff2b1359 256 if (list_empty(&gpio_devices)) {
a961f9b4 257 /* initial entry in list */
ff2b1359 258 list_add_tail(&gdev->list, &gpio_devices);
e28ecca6 259 return 0;
1a989d0f
AC
260 }
261
a961f9b4
BJZ
262 next = list_entry(gpio_devices.next, struct gpio_device, list);
263 if (gdev->base + gdev->ngpio <= next->base) {
264 /* add before first entry */
265 list_add(&gdev->list, &gpio_devices);
266 return 0;
1a989d0f
AC
267 }
268
a961f9b4
BJZ
269 prev = list_entry(gpio_devices.prev, struct gpio_device, list);
270 if (prev->base + prev->ngpio <= gdev->base) {
271 /* add behind last entry */
272 list_add_tail(&gdev->list, &gpio_devices);
96098df1 273 return 0;
1a989d0f
AC
274 }
275
a961f9b4
BJZ
276 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
277 /* at the end of the list */
278 if (&next->list == &gpio_devices)
279 break;
1a989d0f 280
a961f9b4
BJZ
281 /* add between prev and next */
282 if (prev->base + prev->ngpio <= gdev->base
283 && gdev->base + gdev->ngpio <= next->base) {
284 list_add(&gdev->list, &prev->list);
285 return 0;
286 }
287 }
288
289 dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n");
290 return -EBUSY;
1a989d0f
AC
291}
292
950d55f5 293/*
f881bab0 294 * Convert a GPIO name to its descriptor
582838ea
GU
295 * Note that there is no guarantee that GPIO names are globally unique!
296 * Hence this function will return, if it exists, a reference to the first GPIO
297 * line found that matches the given name.
f881bab0
LW
298 */
299static struct gpio_desc *gpio_name_to_desc(const char * const name)
300{
ff2b1359 301 struct gpio_device *gdev;
f881bab0
LW
302 unsigned long flags;
303
ee203bbd
MM
304 if (!name)
305 return NULL;
306
f881bab0
LW
307 spin_lock_irqsave(&gpio_lock, flags);
308
ff2b1359 309 list_for_each_entry(gdev, &gpio_devices, list) {
f881bab0
LW
310 int i;
311
fdeb8e15
LW
312 for (i = 0; i != gdev->ngpio; ++i) {
313 struct gpio_desc *desc = &gdev->descs[i];
f881bab0 314
ee203bbd 315 if (!desc->name)
f881bab0
LW
316 continue;
317
fdeb8e15 318 if (!strcmp(desc->name, name)) {
f881bab0 319 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 320 return desc;
f881bab0
LW
321 }
322 }
323 }
324
325 spin_unlock_irqrestore(&gpio_lock, flags);
326
327 return NULL;
328}
329
5f3ca732 330/*
582838ea
GU
331 * Take the names from gc->names and assign them to their GPIO descriptors.
332 * Warn if a name is already used for a GPIO line on a different GPIO chip.
5f3ca732 333 *
582838ea
GU
334 * Note that:
335 * 1. Non-unique names are still accepted,
336 * 2. Name collisions within the same GPIO chip are not reported.
5f3ca732
MP
337 */
338static int gpiochip_set_desc_names(struct gpio_chip *gc)
339{
fdeb8e15 340 struct gpio_device *gdev = gc->gpiodev;
5f3ca732
MP
341 int i;
342
5f3ca732
MP
343 /* First check all names if they are unique */
344 for (i = 0; i != gc->ngpio; ++i) {
345 struct gpio_desc *gpio;
346
347 gpio = gpio_name_to_desc(gc->names[i]);
f881bab0 348 if (gpio)
fdeb8e15 349 dev_warn(&gdev->dev,
34ffd85d 350 "Detected name collision for GPIO name '%s'\n",
f881bab0 351 gc->names[i]);
5f3ca732
MP
352 }
353
354 /* Then add all names to the GPIO descriptors */
355 for (i = 0; i != gc->ngpio; ++i)
fdeb8e15 356 gdev->descs[i].name = gc->names[i];
5f3ca732
MP
357
358 return 0;
359}
360
32fc5aa2
BG
361/*
362 * devprop_gpiochip_set_names - Set GPIO line names using device properties
363 * @chip: GPIO chip whose lines should be named, if possible
364 *
365 * Looks for device property "gpio-line-names" and if it exists assigns
366 * GPIO line names for the chip. The memory allocated for the assigned
367 * names belong to the underlying software node and should not be released
368 * by the caller.
369 */
370static int devprop_gpiochip_set_names(struct gpio_chip *chip)
371{
372 struct gpio_device *gdev = chip->gpiodev;
373 struct device *dev = chip->parent;
374 const char **names;
375 int ret, i;
376 int count;
377
587823d3
BG
378 /* GPIO chip may not have a parent device whose properties we inspect. */
379 if (!dev)
380 return 0;
381
32fc5aa2
BG
382 count = device_property_string_array_count(dev, "gpio-line-names");
383 if (count < 0)
384 return 0;
385
386 if (count > gdev->ngpio) {
387 dev_warn(&gdev->dev, "gpio-line-names is length %d but should be at most length %d",
388 count, gdev->ngpio);
389 count = gdev->ngpio;
390 }
391
392 names = kcalloc(count, sizeof(*names), GFP_KERNEL);
393 if (!names)
394 return -ENOMEM;
395
396 ret = device_property_read_string_array(dev, "gpio-line-names",
397 names, count);
398 if (ret < 0) {
399 dev_warn(&gdev->dev, "failed to read GPIO line names\n");
400 kfree(names);
401 return ret;
402 }
403
404 for (i = 0; i < count; i++)
405 gdev->descs[i].name = names[i];
406
407 kfree(names);
408
409 return 0;
410}
411
a0b66a73 412static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc)
e4371f6e
SB
413{
414 unsigned long *p;
415
a0b66a73 416 p = bitmap_alloc(gc->ngpio, GFP_KERNEL);
e4371f6e
SB
417 if (!p)
418 return NULL;
419
420 /* Assume by default all GPIOs are valid */
a0b66a73 421 bitmap_fill(p, gc->ngpio);
e4371f6e
SB
422
423 return p;
424}
425
f626d6df 426static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
726cb3ba 427{
eb1e8bd6 428 if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask))
726cb3ba
SB
429 return 0;
430
f626d6df
LW
431 gc->valid_mask = gpiochip_allocate_mask(gc);
432 if (!gc->valid_mask)
726cb3ba
SB
433 return -ENOMEM;
434
435 return 0;
436}
437
c9fc5aff 438static int gpiochip_init_valid_mask(struct gpio_chip *gc)
f8ec92a9 439{
c9fc5aff
LW
440 if (gc->init_valid_mask)
441 return gc->init_valid_mask(gc,
442 gc->valid_mask,
443 gc->ngpio);
f8ec92a9
RRD
444
445 return 0;
446}
447
a0b66a73 448static void gpiochip_free_valid_mask(struct gpio_chip *gc)
726cb3ba 449{
a0b66a73
LW
450 bitmap_free(gc->valid_mask);
451 gc->valid_mask = NULL;
726cb3ba
SB
452}
453
b056ca1c
AS
454static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
455{
456 if (gc->add_pin_ranges)
457 return gc->add_pin_ranges(gc);
458
459 return 0;
460}
461
a0b66a73 462bool gpiochip_line_is_valid(const struct gpio_chip *gc,
726cb3ba
SB
463 unsigned int offset)
464{
465 /* No mask means all valid */
a0b66a73 466 if (likely(!gc->valid_mask))
726cb3ba 467 return true;
a0b66a73 468 return test_bit(offset, gc->valid_mask);
726cb3ba
SB
469}
470EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
471
ff2b1359
LW
472static void gpiodevice_release(struct device *dev)
473{
474 struct gpio_device *gdev = dev_get_drvdata(dev);
475
476 list_del(&gdev->list);
8d4a85b6 477 ida_free(&gpio_ida, gdev->id);
fcf273e5 478 kfree_const(gdev->label);
476e2fc5 479 kfree(gdev->descs);
9efd9e69 480 kfree(gdev);
ff2b1359
LW
481}
482
159f3cd9
GR
483static int gpiochip_setup_dev(struct gpio_device *gdev)
484{
d377f56f 485 int ret;
159f3cd9 486
925ca369 487 ret = gpiolib_cdev_register(gdev, gpio_devt);
d377f56f
LW
488 if (ret)
489 return ret;
111379dc 490
d377f56f
LW
491 ret = gpiochip_sysfs_register(gdev);
492 if (ret)
159f3cd9
GR
493 goto err_remove_device;
494
495 /* From this point, the .release() function cleans up gpio_device */
496 gdev->dev.release = gpiodevice_release;
262b9011
GU
497 dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base,
498 gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic");
159f3cd9
GR
499
500 return 0;
501
502err_remove_device:
925ca369 503 gpiolib_cdev_unregister(gdev);
d377f56f 504 return ret;
159f3cd9
GR
505}
506
a0b66a73 507static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog)
a411e81e
BG
508{
509 struct gpio_desc *desc;
510 int rv;
511
a0b66a73 512 desc = gpiochip_get_desc(gc, hog->chip_hwnum);
a411e81e 513 if (IS_ERR(desc)) {
262b9011
GU
514 chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__,
515 PTR_ERR(desc));
a411e81e
BG
516 return;
517 }
518
ba3efdff 519 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
a411e81e
BG
520 return;
521
522 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
523 if (rv)
262b9011
GU
524 gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n",
525 __func__, gc->label, hog->chip_hwnum, rv);
a411e81e
BG
526}
527
a0b66a73 528static void machine_gpiochip_add(struct gpio_chip *gc)
a411e81e
BG
529{
530 struct gpiod_hog *hog;
531
532 mutex_lock(&gpio_machine_hogs_mutex);
533
534 list_for_each_entry(hog, &gpio_machine_hogs, list) {
a0b66a73
LW
535 if (!strcmp(gc->label, hog->chip_label))
536 gpiochip_machine_hog(gc, hog);
a411e81e
BG
537 }
538
539 mutex_unlock(&gpio_machine_hogs_mutex);
540}
541
159f3cd9
GR
542static void gpiochip_setup_devs(void)
543{
544 struct gpio_device *gdev;
d377f56f 545 int ret;
159f3cd9
GR
546
547 list_for_each_entry(gdev, &gpio_devices, list) {
d377f56f
LW
548 ret = gpiochip_setup_dev(gdev);
549 if (ret)
262b9011
GU
550 dev_err(&gdev->dev,
551 "Failed to initialize gpio device (%d)\n", ret);
159f3cd9
GR
552 }
553}
554
a0b66a73 555int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
39c3fd58
AL
556 struct lock_class_key *lock_key,
557 struct lock_class_key *request_key)
d2876d08
DB
558{
559 unsigned long flags;
d377f56f 560 int ret = 0;
ff2b1359 561 unsigned i;
a0b66a73 562 int base = gc->base;
ff2b1359 563 struct gpio_device *gdev;
d2876d08 564
ff2b1359
LW
565 /*
566 * First: allocate and populate the internal stat container, and
567 * set up the struct device.
568 */
969f07b4 569 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
ff2b1359 570 if (!gdev)
14e85c0e 571 return -ENOMEM;
3c702e99 572 gdev->dev.bus = &gpio_bus_type;
a0b66a73
LW
573 gdev->chip = gc;
574 gc->gpiodev = gdev;
575 if (gc->parent) {
576 gdev->dev.parent = gc->parent;
577 gdev->dev.of_node = gc->parent->of_node;
acc6e331
TR
578 }
579
ff2b1359
LW
580#ifdef CONFIG_OF_GPIO
581 /* If the gpiochip has an assigned OF node this takes precedence */
a0b66a73
LW
582 if (gc->of_node)
583 gdev->dev.of_node = gc->of_node;
6ff04974 584 else
a0b66a73 585 gc->of_node = gdev->dev.of_node;
ff2b1359 586#endif
acc6e331 587
8d4a85b6 588 gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL);
ff2b1359 589 if (gdev->id < 0) {
d377f56f 590 ret = gdev->id;
ff2b1359
LW
591 goto err_free_gdev;
592 }
ddd8891e 593 dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id);
ff2b1359
LW
594 device_initialize(&gdev->dev);
595 dev_set_drvdata(&gdev->dev, gdev);
a0b66a73
LW
596 if (gc->parent && gc->parent->driver)
597 gdev->owner = gc->parent->driver->owner;
598 else if (gc->owner)
ff2b1359 599 /* TODO: remove chip->owner */
a0b66a73 600 gdev->owner = gc->owner;
ff2b1359
LW
601 else
602 gdev->owner = THIS_MODULE;
d2876d08 603
a0b66a73 604 gdev->descs = kcalloc(gc->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL);
1c3cdb18 605 if (!gdev->descs) {
d377f56f 606 ret = -ENOMEM;
a05a1404 607 goto err_free_ida;
ff2b1359
LW
608 }
609
a0b66a73
LW
610 if (gc->ngpio == 0) {
611 chip_err(gc, "tried to insert a GPIO chip with zero lines\n");
d377f56f 612 ret = -EINVAL;
159f3cd9 613 goto err_free_descs;
5ed41cc4 614 }
df4878e9 615
a0b66a73
LW
616 if (gc->ngpio > FASTPATH_NGPIO)
617 chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n",
618 gc->ngpio, FASTPATH_NGPIO);
3027743f 619
a0b66a73 620 gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL);
df4878e9 621 if (!gdev->label) {
d377f56f 622 ret = -ENOMEM;
476e2fc5 623 goto err_free_descs;
df4878e9
LW
624 }
625
a0b66a73 626 gdev->ngpio = gc->ngpio;
43c54eca 627 gdev->data = data;
5ed41cc4 628
d2876d08
DB
629 spin_lock_irqsave(&gpio_lock, flags);
630
fdeb8e15
LW
631 /*
632 * TODO: this allocates a Linux GPIO number base in the global
633 * GPIO numberspace for this chip. In the long run we want to
634 * get *rid* of this numberspace and use only descriptors, but
635 * it may be a pipe dream. It will not happen before we get rid
636 * of the sysfs interface anyways.
637 */
8d0aab2f 638 if (base < 0) {
a0b66a73 639 base = gpiochip_find_base(gc->ngpio);
8d0aab2f 640 if (base < 0) {
d377f56f 641 ret = base;
225fce83 642 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 643 goto err_free_label;
8d0aab2f 644 }
fdeb8e15
LW
645 /*
646 * TODO: it should not be necessary to reflect the assigned
647 * base outside of the GPIO subsystem. Go over drivers and
648 * see if anyone makes use of this, else drop this and assign
649 * a poison instead.
650 */
a0b66a73 651 gc->base = base;
8d0aab2f 652 }
fdeb8e15 653 gdev->base = base;
8d0aab2f 654
d377f56f
LW
655 ret = gpiodev_add_to_list(gdev);
656 if (ret) {
05aa5203 657 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 658 goto err_free_label;
05aa5203 659 }
1a989d0f 660
a0b66a73 661 for (i = 0; i < gc->ngpio; i++)
767cd17a 662 gdev->descs[i].gdev = gdev;
14e85c0e 663
207270dd
DC
664 spin_unlock_irqrestore(&gpio_lock, flags);
665
6accc376 666 BLOCKING_INIT_NOTIFIER_HEAD(&gdev->notifier);
51c1064e 667
f23f1516 668#ifdef CONFIG_PINCTRL
20ec3e39 669 INIT_LIST_HEAD(&gdev->pin_ranges);
f23f1516
SH
670#endif
671
7cba1a4d
BG
672 if (gc->names)
673 ret = gpiochip_set_desc_names(gc);
674 else
675 ret = devprop_gpiochip_set_names(gc);
d377f56f 676 if (ret)
5f3ca732
MP
677 goto err_remove_from_list;
678
a0b66a73 679 ret = gpiochip_alloc_valid_mask(gc);
d377f56f 680 if (ret)
48057ed1 681 goto err_remove_from_list;
e0d89728 682
a0b66a73 683 ret = of_gpiochip_add(gc);
d377f56f 684 if (ret)
48057ed1 685 goto err_free_gpiochip_mask;
28355f81 686
a0b66a73 687 ret = gpiochip_init_valid_mask(gc);
d377f56f 688 if (ret)
35779890 689 goto err_remove_of_chip;
f8ec92a9 690
a0b66a73 691 for (i = 0; i < gc->ngpio; i++) {
3edfb7bd
RRD
692 struct gpio_desc *desc = &gdev->descs[i];
693
a0b66a73 694 if (gc->get_direction && gpiochip_line_is_valid(gc, i)) {
4fc5bfeb 695 assign_bit(FLAG_IS_OUT,
a0b66a73 696 &desc->flags, !gc->get_direction(gc, i));
d95da993 697 } else {
4fc5bfeb 698 assign_bit(FLAG_IS_OUT,
a0b66a73 699 &desc->flags, !gc->direction_input);
d95da993 700 }
3edfb7bd
RRD
701 }
702
a0b66a73 703 ret = gpiochip_add_pin_ranges(gc);
b056ca1c
AS
704 if (ret)
705 goto err_remove_of_chip;
706
a0b66a73 707 acpi_gpiochip_add(gc);
391c970c 708
a0b66a73 709 machine_gpiochip_add(gc);
a411e81e 710
a0b66a73 711 ret = gpiochip_irqchip_init_valid_mask(gc);
9411e3aa
AS
712 if (ret)
713 goto err_remove_acpi_chip;
714
a0b66a73 715 ret = gpiochip_irqchip_init_hw(gc);
fbdf8d4b 716 if (ret)
48057ed1
LW
717 goto err_remove_acpi_chip;
718
a0b66a73 719 ret = gpiochip_add_irqchip(gc, lock_key, request_key);
fbdf8d4b 720 if (ret)
48057ed1
LW
721 goto err_remove_irqchip_mask;
722
3c702e99
LW
723 /*
724 * By first adding the chardev, and then adding the device,
725 * we get a device node entry in sysfs under
726 * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
727 * coldplug of device nodes and other udev business.
159f3cd9
GR
728 * We can do this only if gpiolib has been initialized.
729 * Otherwise, defer until later.
3c702e99 730 */
159f3cd9 731 if (gpiolib_initialized) {
d377f56f
LW
732 ret = gpiochip_setup_dev(gdev);
733 if (ret)
48057ed1 734 goto err_remove_irqchip;
159f3cd9 735 }
cedb1881 736 return 0;
3bae4811 737
48057ed1 738err_remove_irqchip:
a0b66a73 739 gpiochip_irqchip_remove(gc);
48057ed1 740err_remove_irqchip_mask:
a0b66a73 741 gpiochip_irqchip_free_valid_mask(gc);
35779890 742err_remove_acpi_chip:
a0b66a73 743 acpi_gpiochip_remove(gc);
35779890 744err_remove_of_chip:
a0b66a73
LW
745 gpiochip_free_hogs(gc);
746 of_gpiochip_remove(gc);
35779890 747err_free_gpiochip_mask:
a0b66a73
LW
748 gpiochip_remove_pin_ranges(gc);
749 gpiochip_free_valid_mask(gc);
5f3ca732 750err_remove_from_list:
225fce83 751 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 752 list_del(&gdev->list);
3bae4811 753 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 754err_free_label:
fcf273e5 755 kfree_const(gdev->label);
476e2fc5
GR
756err_free_descs:
757 kfree(gdev->descs);
a05a1404 758err_free_ida:
8d4a85b6 759 ida_free(&gpio_ida, gdev->id);
a05a1404 760err_free_gdev:
d2876d08 761 /* failures here can mean systems won't boot... */
1777fc97 762 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
fdeb8e15 763 gdev->base, gdev->base + gdev->ngpio - 1,
a0b66a73 764 gc->label ? : "generic", ret);
fdeb8e15 765 kfree(gdev);
d377f56f 766 return ret;
d2876d08 767}
959bc7b2 768EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
d2876d08 769
43c54eca
LW
770/**
771 * gpiochip_get_data() - get per-subdriver data for the chip
a0b66a73 772 * @gc: GPIO chip
950d55f5
TR
773 *
774 * Returns:
775 * The per-subdriver data for the chip.
43c54eca 776 */
a0b66a73 777void *gpiochip_get_data(struct gpio_chip *gc)
43c54eca 778{
a0b66a73 779 return gc->gpiodev->data;
43c54eca
LW
780}
781EXPORT_SYMBOL_GPL(gpiochip_get_data);
782
d2876d08
DB
783/**
784 * gpiochip_remove() - unregister a gpio_chip
a0b66a73 785 * @gc: the chip to unregister
d2876d08
DB
786 *
787 * A gpio_chip with any GPIOs still requested may not be removed.
788 */
a0b66a73 789void gpiochip_remove(struct gpio_chip *gc)
d2876d08 790{
a0b66a73 791 struct gpio_device *gdev = gc->gpiodev;
d2876d08 792 unsigned long flags;
869233f8 793 unsigned int i;
d2876d08 794
ff2b1359 795 /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
afbc4f31 796 gpiochip_sysfs_unregister(gdev);
a0b66a73 797 gpiochip_free_hogs(gc);
bd203bd5
BJZ
798 /* Numb the device, cancelling all outstanding operations */
799 gdev->chip = NULL;
a0b66a73
LW
800 gpiochip_irqchip_remove(gc);
801 acpi_gpiochip_remove(gc);
802 of_gpiochip_remove(gc);
803 gpiochip_remove_pin_ranges(gc);
804 gpiochip_free_valid_mask(gc);
43c54eca
LW
805 /*
806 * We accept no more calls into the driver from this point, so
807 * NULL the driver data pointer
808 */
809 gdev->data = NULL;
391c970c 810
6798acaa 811 spin_lock_irqsave(&gpio_lock, flags);
fdeb8e15 812 for (i = 0; i < gdev->ngpio; i++) {
a0b66a73 813 if (gpiochip_is_requested(gc, i))
869233f8 814 break;
d2876d08 815 }
d2876d08 816 spin_unlock_irqrestore(&gpio_lock, flags);
14e85c0e 817
ca18a852 818 if (i != gdev->ngpio)
fdeb8e15 819 dev_crit(&gdev->dev,
58383c78 820 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
fab28b89 821
ff2b1359
LW
822 /*
823 * The gpiochip side puts its use of the device to rest here:
824 * if there are no userspace clients, the chardev and device will
825 * be removed, else it will be dangling until the last user is
826 * gone.
827 */
925ca369 828 gpiolib_cdev_unregister(gdev);
ff2b1359 829 put_device(&gdev->dev);
d2876d08
DB
830}
831EXPORT_SYMBOL_GPL(gpiochip_remove);
832
594fa265
GL
833/**
834 * gpiochip_find() - iterator for locating a specific gpio_chip
835 * @data: data to pass to match function
950d55f5 836 * @match: Callback function to check gpio_chip
594fa265
GL
837 *
838 * Similar to bus_find_device. It returns a reference to a gpio_chip as
839 * determined by a user supplied @match callback. The callback should return
840 * 0 if the device doesn't match and non-zero if it does. If the callback is
841 * non-zero, this function will return to the caller and not iterate over any
842 * more gpio_chips.
843 */
07ce8ec7 844struct gpio_chip *gpiochip_find(void *data,
a0b66a73 845 int (*match)(struct gpio_chip *gc,
3d0f7cf0 846 void *data))
594fa265 847{
ff2b1359 848 struct gpio_device *gdev;
a0b66a73 849 struct gpio_chip *gc = NULL;
594fa265 850 unsigned long flags;
594fa265
GL
851
852 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 853 list_for_each_entry(gdev, &gpio_devices, list)
acf06ff7 854 if (gdev->chip && match(gdev->chip, data)) {
a0b66a73 855 gc = gdev->chip;
594fa265 856 break;
acf06ff7 857 }
ff2b1359 858
594fa265
GL
859 spin_unlock_irqrestore(&gpio_lock, flags);
860
a0b66a73 861 return gc;
594fa265 862}
8fa0c9bf 863EXPORT_SYMBOL_GPL(gpiochip_find);
d2876d08 864
a0b66a73 865static int gpiochip_match_name(struct gpio_chip *gc, void *data)
79697ef9
AC
866{
867 const char *name = data;
868
a0b66a73 869 return !strcmp(gc->label, name);
79697ef9
AC
870}
871
872static struct gpio_chip *find_chip_by_name(const char *name)
873{
874 return gpiochip_find((void *)name, gpiochip_match_name);
875}
876
14250520
LW
877#ifdef CONFIG_GPIOLIB_IRQCHIP
878
879/*
880 * The following is irqchip helper code for gpiochips.
881 */
882
9411e3aa
AS
883static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
884{
885 struct gpio_irq_chip *girq = &gc->irq;
886
887 if (!girq->init_hw)
888 return 0;
889
890 return girq->init_hw(gc);
891}
892
5fbe5b58 893static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb 894{
5fbe5b58
LW
895 struct gpio_irq_chip *girq = &gc->irq;
896
897 if (!girq->init_valid_mask)
79b804cb
MW
898 return 0;
899
5fbe5b58
LW
900 girq->valid_mask = gpiochip_allocate_mask(gc);
901 if (!girq->valid_mask)
79b804cb
MW
902 return -ENOMEM;
903
5fbe5b58
LW
904 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
905
79b804cb
MW
906 return 0;
907}
908
a0b66a73 909static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 910{
a0b66a73
LW
911 bitmap_free(gc->irq.valid_mask);
912 gc->irq.valid_mask = NULL;
79b804cb
MW
913}
914
a0b66a73 915bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc,
64ff2c8e 916 unsigned int offset)
79b804cb 917{
a0b66a73 918 if (!gpiochip_line_is_valid(gc, offset))
726cb3ba 919 return false;
79b804cb 920 /* No mask means all valid */
a0b66a73 921 if (likely(!gc->irq.valid_mask))
79b804cb 922 return true;
a0b66a73 923 return test_bit(offset, gc->irq.valid_mask);
79b804cb 924}
64ff2c8e 925EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
79b804cb 926
14250520 927/**
d245b3f9 928 * gpiochip_set_cascaded_irqchip() - connects a cascaded irqchip to a gpiochip
4892d3a6 929 * @gc: the gpiochip to set the irqchip chain to
14250520 930 * @parent_irq: the irq number corresponding to the parent IRQ for this
72780ce5 931 * cascaded irqchip
14250520 932 * @parent_handler: the parent interrupt handler for the accumulated IRQ
3f97d5fc
LW
933 * coming out of the gpiochip. If the interrupt is nested rather than
934 * cascaded, pass NULL in this handler argument
14250520 935 */
4892d3a6 936static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gc,
6f79309a 937 unsigned int parent_irq,
d245b3f9 938 irq_flow_handler_t parent_handler)
14250520 939{
4892d3a6
LW
940 struct gpio_irq_chip *girq = &gc->irq;
941 struct device *dev = &gc->gpiodev->dev;
942
943 if (!girq->domain) {
944 chip_err(gc, "called %s before setting up irqchip\n",
83141a77 945 __func__);
1c8732bb
LW
946 return;
947 }
948
3f97d5fc 949 if (parent_handler) {
4892d3a6
LW
950 if (gc->can_sleep) {
951 chip_err(gc,
b1911710 952 "you cannot have chained interrupts on a chip that may sleep\n");
3f97d5fc
LW
953 return;
954 }
4892d3a6
LW
955 girq->parents = devm_kcalloc(dev, 1,
956 sizeof(*girq->parents),
957 GFP_KERNEL);
958 if (!girq->parents) {
959 chip_err(gc, "out of memory allocating parent IRQ\n");
960 return;
961 }
962 girq->parents[0] = parent_irq;
963 girq->num_parents = 1;
3f97d5fc
LW
964 /*
965 * The parent irqchip is already using the chip_data for this
966 * irqchip, so our callbacks simply use the handler_data.
967 */
f7f87753 968 irq_set_chained_handler_and_data(parent_irq, parent_handler,
4892d3a6 969 gc);
3f97d5fc 970 }
14250520 971}
d245b3f9 972
d245b3f9
LW
973/**
974 * gpiochip_set_nested_irqchip() - connects a nested irqchip to a gpiochip
a0b66a73 975 * @gc: the gpiochip to set the irqchip nested handler to
d245b3f9
LW
976 * @irqchip: the irqchip to nest to the gpiochip
977 * @parent_irq: the irq number corresponding to the parent IRQ for this
978 * nested irqchip
979 */
a0b66a73 980void gpiochip_set_nested_irqchip(struct gpio_chip *gc,
d245b3f9 981 struct irq_chip *irqchip,
6f79309a 982 unsigned int parent_irq)
d245b3f9 983{
a0b66a73 984 gpiochip_set_cascaded_irqchip(gc, parent_irq, NULL);
d245b3f9
LW
985}
986EXPORT_SYMBOL_GPL(gpiochip_set_nested_irqchip);
987
fdd61a01
LW
988#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
989
990/**
991 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
992 * to a gpiochip
993 * @gc: the gpiochip to set the irqchip hierarchical handler to
994 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
995 * will then percolate up to the parent
996 */
997static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
998 struct irq_chip *irqchip)
999{
1000 /* DT will deal with mapping each IRQ as we go along */
1001 if (is_of_node(gc->irq.fwnode))
1002 return;
1003
1004 /*
1005 * This is for legacy and boardfile "irqchip" fwnodes: allocate
1006 * irqs upfront instead of dynamically since we don't have the
1007 * dynamic type of allocation that hardware description languages
1008 * provide. Once all GPIO drivers using board files are gone from
1009 * the kernel we can delete this code, but for a transitional period
1010 * it is necessary to keep this around.
1011 */
1012 if (is_fwnode_irqchip(gc->irq.fwnode)) {
1013 int i;
1014 int ret;
1015
1016 for (i = 0; i < gc->ngpio; i++) {
1017 struct irq_fwspec fwspec;
1018 unsigned int parent_hwirq;
1019 unsigned int parent_type;
1020 struct gpio_irq_chip *girq = &gc->irq;
1021
1022 /*
1023 * We call the child to parent translation function
1024 * only to check if the child IRQ is valid or not.
1025 * Just pick the rising edge type here as that is what
1026 * we likely need to support.
1027 */
1028 ret = girq->child_to_parent_hwirq(gc, i,
1029 IRQ_TYPE_EDGE_RISING,
1030 &parent_hwirq,
1031 &parent_type);
1032 if (ret) {
1033 chip_err(gc, "skip set-up on hwirq %d\n",
1034 i);
1035 continue;
1036 }
1037
1038 fwspec.fwnode = gc->irq.fwnode;
1039 /* This is the hwirq for the GPIO line side of things */
1040 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
1041 /* Just pick something */
1042 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
1043 fwspec.param_count = 2;
1044 ret = __irq_domain_alloc_irqs(gc->irq.domain,
1045 /* just pick something */
1046 -1,
1047 1,
1048 NUMA_NO_NODE,
1049 &fwspec,
1050 false,
1051 NULL);
1052 if (ret < 0) {
1053 chip_err(gc,
1054 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1055 i, parent_hwirq,
1056 ret);
1057 }
1058 }
1059 }
1060
1061 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1062
1063 return;
1064}
1065
1066static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1067 struct irq_fwspec *fwspec,
1068 unsigned long *hwirq,
1069 unsigned int *type)
1070{
1071 /* We support standard DT translation */
1072 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1073 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1074 }
1075
1076 /* This is for board files and others not using DT */
1077 if (is_fwnode_irqchip(fwspec->fwnode)) {
1078 int ret;
1079
1080 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1081 if (ret)
1082 return ret;
1083 WARN_ON(*type == IRQ_TYPE_NONE);
1084 return 0;
1085 }
1086 return -EINVAL;
1087}
1088
1089static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1090 unsigned int irq,
1091 unsigned int nr_irqs,
1092 void *data)
1093{
1094 struct gpio_chip *gc = d->host_data;
1095 irq_hw_number_t hwirq;
1096 unsigned int type = IRQ_TYPE_NONE;
1097 struct irq_fwspec *fwspec = data;
24258761 1098 void *parent_arg;
fdd61a01
LW
1099 unsigned int parent_hwirq;
1100 unsigned int parent_type;
1101 struct gpio_irq_chip *girq = &gc->irq;
1102 int ret;
1103
1104 /*
1105 * The nr_irqs parameter is always one except for PCI multi-MSI
1106 * so this should not happen.
1107 */
1108 WARN_ON(nr_irqs != 1);
1109
1110 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
1111 if (ret)
1112 return ret;
1113
366950ee 1114 chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
fdd61a01
LW
1115
1116 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
1117 &parent_hwirq, &parent_type);
1118 if (ret) {
1119 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
1120 return ret;
1121 }
366950ee 1122 chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq);
fdd61a01
LW
1123
1124 /*
1125 * We set handle_bad_irq because the .set_type() should
1126 * always be invoked and set the right type of handler.
1127 */
1128 irq_domain_set_info(d,
1129 irq,
1130 hwirq,
1131 gc->irq.chip,
1132 gc,
1133 girq->handler,
1134 NULL, NULL);
1135 irq_set_probe(irq);
1136
fdd61a01 1137 /* This parent only handles asserted level IRQs */
24258761
KH
1138 parent_arg = girq->populate_parent_alloc_arg(gc, parent_hwirq, parent_type);
1139 if (!parent_arg)
1140 return -ENOMEM;
1141
366950ee 1142 chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
fdd61a01 1143 irq, parent_hwirq);
c34f6dc8 1144 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
24258761 1145 ret = irq_domain_alloc_irqs_parent(d, irq, 1, parent_arg);
880b7cf2
KH
1146 /*
1147 * If the parent irqdomain is msi, the interrupts have already
1148 * been allocated, so the EEXIST is good.
1149 */
1150 if (irq_domain_is_msi(d->parent) && (ret == -EEXIST))
1151 ret = 0;
fdd61a01
LW
1152 if (ret)
1153 chip_err(gc,
1154 "failed to allocate parent hwirq %d for hwirq %lu\n",
1155 parent_hwirq, hwirq);
1156
24258761 1157 kfree(parent_arg);
fdd61a01
LW
1158 return ret;
1159}
1160
a0b66a73 1161static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc,
fdd61a01
LW
1162 unsigned int offset)
1163{
1164 return offset;
1165}
1166
1167static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
1168{
1169 ops->activate = gpiochip_irq_domain_activate;
1170 ops->deactivate = gpiochip_irq_domain_deactivate;
1171 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
1172 ops->free = irq_domain_free_irqs_common;
1173
1174 /*
1175 * We only allow overriding the translate() function for
1176 * hierarchical chips, and this should only be done if the user
1177 * really need something other than 1:1 translation.
1178 */
1179 if (!ops->translate)
1180 ops->translate = gpiochip_hierarchy_irq_domain_translate;
1181}
1182
1183static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1184{
1185 if (!gc->irq.child_to_parent_hwirq ||
1186 !gc->irq.fwnode) {
1187 chip_err(gc, "missing irqdomain vital data\n");
1188 return -EINVAL;
1189 }
1190
1191 if (!gc->irq.child_offset_to_irq)
1192 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
1193
24258761
KH
1194 if (!gc->irq.populate_parent_alloc_arg)
1195 gc->irq.populate_parent_alloc_arg =
fdd61a01
LW
1196 gpiochip_populate_parent_fwspec_twocell;
1197
1198 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
1199
1200 gc->irq.domain = irq_domain_create_hierarchy(
1201 gc->irq.parent_domain,
1202 0,
1203 gc->ngpio,
1204 gc->irq.fwnode,
1205 &gc->irq.child_irq_domain_ops,
1206 gc);
1207
1208 if (!gc->irq.domain)
1209 return -ENOMEM;
1210
1211 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
1212
1213 return 0;
1214}
1215
1216static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1217{
1218 return !!gc->irq.parent_domain;
1219}
1220
a0b66a73 1221void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc,
fdd61a01
LW
1222 unsigned int parent_hwirq,
1223 unsigned int parent_type)
1224{
24258761
KH
1225 struct irq_fwspec *fwspec;
1226
1227 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
1228 if (!fwspec)
1229 return NULL;
1230
a0b66a73 1231 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1232 fwspec->param_count = 2;
1233 fwspec->param[0] = parent_hwirq;
1234 fwspec->param[1] = parent_type;
24258761
KH
1235
1236 return fwspec;
fdd61a01
LW
1237}
1238EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
1239
a0b66a73 1240void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc,
fdd61a01
LW
1241 unsigned int parent_hwirq,
1242 unsigned int parent_type)
1243{
24258761
KH
1244 struct irq_fwspec *fwspec;
1245
1246 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
1247 if (!fwspec)
1248 return NULL;
1249
a0b66a73 1250 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1251 fwspec->param_count = 4;
1252 fwspec->param[0] = 0;
1253 fwspec->param[1] = parent_hwirq;
1254 fwspec->param[2] = 0;
1255 fwspec->param[3] = parent_type;
24258761
KH
1256
1257 return fwspec;
fdd61a01
LW
1258}
1259EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
1260
1261#else
1262
1263static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1264{
1265 return -EINVAL;
1266}
1267
1268static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1269{
1270 return false;
1271}
1272
1273#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
1274
14250520
LW
1275/**
1276 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
1277 * @d: the irqdomain used by this irqchip
1278 * @irq: the global irq number used by this GPIO irqchip irq
1279 * @hwirq: the local IRQ/GPIO line offset on this gpiochip
1280 *
1281 * This function will set up the mapping for a certain IRQ line on a
1282 * gpiochip by assigning the gpiochip as chip data, and using the irqchip
1283 * stored inside the gpiochip.
1284 */
1b95b4eb
TR
1285int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
1286 irq_hw_number_t hwirq)
14250520 1287{
a0b66a73 1288 struct gpio_chip *gc = d->host_data;
d377f56f 1289 int ret = 0;
14250520 1290
a0b66a73 1291 if (!gpiochip_irqchip_irq_valid(gc, hwirq))
dc749a09
GS
1292 return -ENXIO;
1293
a0b66a73 1294 irq_set_chip_data(irq, gc);
a0a8bcf4
GS
1295 /*
1296 * This lock class tells lockdep that GPIO irqs are in a different
1297 * category than their parents, so it won't report false recursion.
1298 */
a0b66a73
LW
1299 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
1300 irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler);
d245b3f9 1301 /* Chips that use nested thread handlers have them marked */
a0b66a73 1302 if (gc->irq.threaded)
1c8732bb 1303 irq_set_nested_thread(irq, 1);
14250520 1304 irq_set_noprobe(irq);
23393d49 1305
a0b66a73
LW
1306 if (gc->irq.num_parents == 1)
1307 ret = irq_set_parent(irq, gc->irq.parents[0]);
1308 else if (gc->irq.map)
1309 ret = irq_set_parent(irq, gc->irq.map[hwirq]);
e0d89728 1310
d377f56f
LW
1311 if (ret < 0)
1312 return ret;
e0d89728 1313
1333b90f
LW
1314 /*
1315 * No set-up of the hardware will happen if IRQ_TYPE_NONE
1316 * is passed as default type.
1317 */
a0b66a73
LW
1318 if (gc->irq.default_type != IRQ_TYPE_NONE)
1319 irq_set_irq_type(irq, gc->irq.default_type);
14250520
LW
1320
1321 return 0;
1322}
1b95b4eb 1323EXPORT_SYMBOL_GPL(gpiochip_irq_map);
14250520 1324
1b95b4eb 1325void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
c3626fde 1326{
a0b66a73 1327 struct gpio_chip *gc = d->host_data;
1c8732bb 1328
a0b66a73 1329 if (gc->irq.threaded)
1c8732bb 1330 irq_set_nested_thread(irq, 0);
c3626fde
LW
1331 irq_set_chip_and_handler(irq, NULL, NULL);
1332 irq_set_chip_data(irq, NULL);
1333}
1b95b4eb 1334EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
c3626fde 1335
14250520
LW
1336static const struct irq_domain_ops gpiochip_domain_ops = {
1337 .map = gpiochip_irq_map,
c3626fde 1338 .unmap = gpiochip_irq_unmap,
14250520
LW
1339 /* Virtually all GPIO irqchips are twocell:ed */
1340 .xlate = irq_domain_xlate_twocell,
1341};
1342
fdd61a01
LW
1343/*
1344 * TODO: move these activate/deactivate in under the hierarchicial
1345 * irqchip implementation as static once SPMI and SSBI (all external
1346 * users) are phased over.
1347 */
ef74f70e
BM
1348/**
1349 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
1350 * @domain: The IRQ domain used by this IRQ chip
1351 * @data: Outermost irq_data associated with the IRQ
1352 * @reserve: If set, only reserve an interrupt vector instead of assigning one
1353 *
1354 * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
1355 * used as the activate function for the &struct irq_domain_ops. The host_data
1356 * for the IRQ domain must be the &struct gpio_chip.
1357 */
1358int gpiochip_irq_domain_activate(struct irq_domain *domain,
1359 struct irq_data *data, bool reserve)
1360{
a0b66a73 1361 struct gpio_chip *gc = domain->host_data;
ef74f70e 1362
a0b66a73 1363 return gpiochip_lock_as_irq(gc, data->hwirq);
ef74f70e
BM
1364}
1365EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
1366
1367/**
1368 * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
1369 * @domain: The IRQ domain used by this IRQ chip
1370 * @data: Outermost irq_data associated with the IRQ
1371 *
1372 * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
1373 * be used as the deactivate function for the &struct irq_domain_ops. The
1374 * host_data for the IRQ domain must be the &struct gpio_chip.
1375 */
1376void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
1377 struct irq_data *data)
1378{
a0b66a73 1379 struct gpio_chip *gc = domain->host_data;
ef74f70e 1380
a0b66a73 1381 return gpiochip_unlock_as_irq(gc, data->hwirq);
ef74f70e
BM
1382}
1383EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
1384
a0b66a73 1385static int gpiochip_to_irq(struct gpio_chip *gc, unsigned offset)
14250520 1386{
a0b66a73 1387 struct irq_domain *domain = gc->irq.domain;
fdd61a01 1388
a0b66a73 1389 if (!gpiochip_irqchip_irq_valid(gc, offset))
4e6b8238 1390 return -ENXIO;
5b76e79c 1391
fdd61a01
LW
1392#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1393 if (irq_domain_is_hierarchy(domain)) {
1394 struct irq_fwspec spec;
1395
1396 spec.fwnode = domain->fwnode;
1397 spec.param_count = 2;
a0b66a73 1398 spec.param[0] = gc->irq.child_offset_to_irq(gc, offset);
fdd61a01
LW
1399 spec.param[1] = IRQ_TYPE_NONE;
1400
1401 return irq_create_fwspec_mapping(&spec);
1402 }
1403#endif
1404
1405 return irq_create_mapping(domain, offset);
14250520
LW
1406}
1407
14250520
LW
1408static int gpiochip_irq_reqres(struct irq_data *d)
1409{
a0b66a73 1410 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
5b76e79c 1411
a0b66a73 1412 return gpiochip_reqres_irq(gc, d->hwirq);
14250520
LW
1413}
1414
1415static void gpiochip_irq_relres(struct irq_data *d)
1416{
a0b66a73 1417 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
14250520 1418
a0b66a73 1419 gpiochip_relres_irq(gc, d->hwirq);
14250520
LW
1420}
1421
a8173820
MS
1422static void gpiochip_irq_mask(struct irq_data *d)
1423{
1424 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1425
1426 if (gc->irq.irq_mask)
1427 gc->irq.irq_mask(d);
1428 gpiochip_disable_irq(gc, d->hwirq);
1429}
1430
1431static void gpiochip_irq_unmask(struct irq_data *d)
1432{
1433 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1434
1435 gpiochip_enable_irq(gc, d->hwirq);
1436 if (gc->irq.irq_unmask)
1437 gc->irq.irq_unmask(d);
1438}
1439
461c1a7d 1440static void gpiochip_irq_enable(struct irq_data *d)
14250520 1441{
a0b66a73 1442 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
e0d89728 1443
a0b66a73 1444 gpiochip_enable_irq(gc, d->hwirq);
a8173820 1445 gc->irq.irq_enable(d);
461c1a7d
HV
1446}
1447
1448static void gpiochip_irq_disable(struct irq_data *d)
1449{
a0b66a73 1450 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
461c1a7d 1451
a8173820 1452 gc->irq.irq_disable(d);
a0b66a73 1453 gpiochip_disable_irq(gc, d->hwirq);
461c1a7d
HV
1454}
1455
a0b66a73 1456static void gpiochip_set_irq_hooks(struct gpio_chip *gc)
ca620f2d 1457{
a0b66a73 1458 struct irq_chip *irqchip = gc->irq.chip;
ca620f2d
HV
1459
1460 if (!irqchip->irq_request_resources &&
1461 !irqchip->irq_release_resources) {
1462 irqchip->irq_request_resources = gpiochip_irq_reqres;
1463 irqchip->irq_release_resources = gpiochip_irq_relres;
1464 }
a0b66a73 1465 if (WARN_ON(gc->irq.irq_enable))
461c1a7d 1466 return;
171948ea
HV
1467 /* Check if the irqchip already has this hook... */
1468 if (irqchip->irq_enable == gpiochip_irq_enable) {
1469 /*
1470 * ...and if so, give a gentle warning that this is bad
1471 * practice.
1472 */
a0b66a73 1473 chip_info(gc,
171948ea
HV
1474 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
1475 return;
1476 }
a8173820
MS
1477
1478 if (irqchip->irq_disable) {
1479 gc->irq.irq_disable = irqchip->irq_disable;
1480 irqchip->irq_disable = gpiochip_irq_disable;
1481 } else {
1482 gc->irq.irq_mask = irqchip->irq_mask;
1483 irqchip->irq_mask = gpiochip_irq_mask;
1484 }
1485
1486 if (irqchip->irq_enable) {
1487 gc->irq.irq_enable = irqchip->irq_enable;
1488 irqchip->irq_enable = gpiochip_irq_enable;
1489 } else {
1490 gc->irq.irq_unmask = irqchip->irq_unmask;
1491 irqchip->irq_unmask = gpiochip_irq_unmask;
1492 }
14250520
LW
1493}
1494
e0d89728
TR
1495/**
1496 * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
a0b66a73 1497 * @gc: the GPIO chip to add the IRQ chip to
39c3fd58
AL
1498 * @lock_key: lockdep class for IRQ lock
1499 * @request_key: lockdep class for IRQ request
e0d89728 1500 */
a0b66a73 1501static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1502 struct lock_class_key *lock_key,
1503 struct lock_class_key *request_key)
e0d89728 1504{
a0b66a73 1505 struct irq_chip *irqchip = gc->irq.chip;
fdd61a01 1506 const struct irq_domain_ops *ops = NULL;
e0d89728
TR
1507 struct device_node *np;
1508 unsigned int type;
1509 unsigned int i;
1510
1511 if (!irqchip)
1512 return 0;
1513
a0b66a73
LW
1514 if (gc->irq.parent_handler && gc->can_sleep) {
1515 chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n");
e0d89728
TR
1516 return -EINVAL;
1517 }
1518
a0b66a73
LW
1519 np = gc->gpiodev->dev.of_node;
1520 type = gc->irq.default_type;
e0d89728
TR
1521
1522 /*
1523 * Specifying a default trigger is a terrible idea if DT or ACPI is
1524 * used to configure the interrupts, as you may end up with
1525 * conflicting triggers. Tell the user, and reset to NONE.
1526 */
1527 if (WARN(np && type != IRQ_TYPE_NONE,
1528 "%s: Ignoring %u default trigger\n", np->full_name, type))
1529 type = IRQ_TYPE_NONE;
1530
a0b66a73
LW
1531 if (has_acpi_companion(gc->parent) && type != IRQ_TYPE_NONE) {
1532 acpi_handle_warn(ACPI_HANDLE(gc->parent),
e0d89728
TR
1533 "Ignoring %u default trigger\n", type);
1534 type = IRQ_TYPE_NONE;
1535 }
1536
a0b66a73
LW
1537 gc->to_irq = gpiochip_to_irq;
1538 gc->irq.default_type = type;
1539 gc->irq.lock_key = lock_key;
1540 gc->irq.request_key = request_key;
e0d89728 1541
fdd61a01 1542 /* If a parent irqdomain is provided, let's build a hierarchy */
a0b66a73
LW
1543 if (gpiochip_hierarchy_is_hierarchical(gc)) {
1544 int ret = gpiochip_hierarchy_add_domain(gc);
fdd61a01
LW
1545 if (ret)
1546 return ret;
1547 } else {
1548 /* Some drivers provide custom irqdomain ops */
a0b66a73
LW
1549 if (gc->irq.domain_ops)
1550 ops = gc->irq.domain_ops;
fdd61a01
LW
1551
1552 if (!ops)
1553 ops = &gpiochip_domain_ops;
a0b66a73
LW
1554 gc->irq.domain = irq_domain_add_simple(np,
1555 gc->ngpio,
1556 gc->irq.first,
1557 ops, gc);
1558 if (!gc->irq.domain)
fdd61a01
LW
1559 return -EINVAL;
1560 }
e0d89728 1561
a0b66a73
LW
1562 if (gc->irq.parent_handler) {
1563 void *data = gc->irq.parent_handler_data ?: gc;
e0d89728 1564
a0b66a73 1565 for (i = 0; i < gc->irq.num_parents; i++) {
e0d89728
TR
1566 /*
1567 * The parent IRQ chip is already using the chip_data
1568 * for this IRQ chip, so our callbacks simply use the
1569 * handler_data.
1570 */
a0b66a73
LW
1571 irq_set_chained_handler_and_data(gc->irq.parents[i],
1572 gc->irq.parent_handler,
e0d89728
TR
1573 data);
1574 }
e0d89728
TR
1575 }
1576
a0b66a73 1577 gpiochip_set_irq_hooks(gc);
ca620f2d 1578
a0b66a73 1579 acpi_gpiochip_request_interrupts(gc);
e0d89728
TR
1580
1581 return 0;
1582}
1583
14250520
LW
1584/**
1585 * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
a0b66a73 1586 * @gc: the gpiochip to remove the irqchip from
14250520
LW
1587 *
1588 * This is called only from gpiochip_remove()
1589 */
a0b66a73 1590static void gpiochip_irqchip_remove(struct gpio_chip *gc)
14250520 1591{
a0b66a73 1592 struct irq_chip *irqchip = gc->irq.chip;
39e5f096 1593 unsigned int offset;
c3626fde 1594
a0b66a73 1595 acpi_gpiochip_free_interrupts(gc);
afa82fab 1596
a0b66a73
LW
1597 if (irqchip && gc->irq.parent_handler) {
1598 struct gpio_irq_chip *irq = &gc->irq;
39e5f096
TR
1599 unsigned int i;
1600
1601 for (i = 0; i < irq->num_parents; i++)
1602 irq_set_chained_handler_and_data(irq->parents[i],
1603 NULL, NULL);
25e4fe92
DES
1604 }
1605
c3626fde 1606 /* Remove all IRQ mappings and delete the domain */
a0b66a73 1607 if (gc->irq.domain) {
39e5f096
TR
1608 unsigned int irq;
1609
a0b66a73
LW
1610 for (offset = 0; offset < gc->ngpio; offset++) {
1611 if (!gpiochip_irqchip_irq_valid(gc, offset))
79b804cb 1612 continue;
f0fbe7bc 1613
a0b66a73 1614 irq = irq_find_mapping(gc->irq.domain, offset);
f0fbe7bc 1615 irq_dispose_mapping(irq);
79b804cb 1616 }
f0fbe7bc 1617
a0b66a73 1618 irq_domain_remove(gc->irq.domain);
c3626fde 1619 }
14250520 1620
461c1a7d
HV
1621 if (irqchip) {
1622 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
1623 irqchip->irq_request_resources = NULL;
1624 irqchip->irq_release_resources = NULL;
1625 }
1626 if (irqchip->irq_enable == gpiochip_irq_enable) {
a0b66a73
LW
1627 irqchip->irq_enable = gc->irq.irq_enable;
1628 irqchip->irq_disable = gc->irq.irq_disable;
461c1a7d 1629 }
14250520 1630 }
a0b66a73
LW
1631 gc->irq.irq_enable = NULL;
1632 gc->irq.irq_disable = NULL;
1633 gc->irq.chip = NULL;
79b804cb 1634
a0b66a73 1635 gpiochip_irqchip_free_valid_mask(gc);
14250520
LW
1636}
1637
1638/**
739e6f59 1639 * gpiochip_irqchip_add_key() - adds an irqchip to a gpiochip
a0b66a73 1640 * @gc: the gpiochip to add the irqchip to
14250520
LW
1641 * @irqchip: the irqchip to add to the gpiochip
1642 * @first_irq: if not dynamically assigned, the base (first) IRQ to
1643 * allocate gpiochip irqs from
1644 * @handler: the irq handler to use (often a predefined irq core function)
1333b90f
LW
1645 * @type: the default type for IRQs on this irqchip, pass IRQ_TYPE_NONE
1646 * to have the core avoid setting up any default type in the hardware.
60ed54ca 1647 * @threaded: whether this irqchip uses a nested thread handler
39c3fd58
AL
1648 * @lock_key: lockdep class for IRQ lock
1649 * @request_key: lockdep class for IRQ request
14250520
LW
1650 *
1651 * This function closely associates a certain irqchip with a certain
1652 * gpiochip, providing an irq domain to translate the local IRQs to
1653 * global irqs in the gpiolib core, and making sure that the gpiochip
1654 * is passed as chip data to all related functions. Driver callbacks
09dd5f9e 1655 * need to use gpiochip_get_data() to get their local state containers back
14250520
LW
1656 * from the gpiochip passed as chip data. An irqdomain will be stored
1657 * in the gpiochip that shall be used by the driver to handle IRQ number
1658 * translation. The gpiochip will need to be initialized and registered
1659 * before calling this function.
1660 *
c3626fde
LW
1661 * This function will handle two cell:ed simple IRQs and assumes all
1662 * the pins on the gpiochip can generate a unique IRQ. Everything else
14250520
LW
1663 * need to be open coded.
1664 */
a0b66a73 1665int gpiochip_irqchip_add_key(struct gpio_chip *gc,
739e6f59
LW
1666 struct irq_chip *irqchip,
1667 unsigned int first_irq,
1668 irq_flow_handler_t handler,
1669 unsigned int type,
60ed54ca 1670 bool threaded,
39c3fd58
AL
1671 struct lock_class_key *lock_key,
1672 struct lock_class_key *request_key)
14250520
LW
1673{
1674 struct device_node *of_node;
14250520 1675
a0b66a73 1676 if (!gc || !irqchip)
14250520
LW
1677 return -EINVAL;
1678
a0b66a73 1679 if (!gc->parent) {
262b9011 1680 chip_err(gc, "missing gpiochip .dev parent pointer\n");
14250520
LW
1681 return -EINVAL;
1682 }
a0b66a73
LW
1683 gc->irq.threaded = threaded;
1684 of_node = gc->parent->of_node;
14250520
LW
1685#ifdef CONFIG_OF_GPIO
1686 /*
20a8a968 1687 * If the gpiochip has an assigned OF node this takes precedence
a0b66a73 1688 * FIXME: get rid of this and use gc->parent->of_node
c88402c2 1689 * everywhere
14250520 1690 */
a0b66a73
LW
1691 if (gc->of_node)
1692 of_node = gc->of_node;
14250520 1693#endif
332e99d5 1694 /*
0a1e0053 1695 * Specifying a default trigger is a terrible idea if DT or ACPI is
332e99d5
MZ
1696 * used to configure the interrupts, as you may end-up with
1697 * conflicting triggers. Tell the user, and reset to NONE.
1698 */
1699 if (WARN(of_node && type != IRQ_TYPE_NONE,
7eb6ce2f 1700 "%pOF: Ignoring %d default trigger\n", of_node, type))
332e99d5 1701 type = IRQ_TYPE_NONE;
a0b66a73
LW
1702 if (has_acpi_companion(gc->parent) && type != IRQ_TYPE_NONE) {
1703 acpi_handle_warn(ACPI_HANDLE(gc->parent),
0a1e0053
MW
1704 "Ignoring %d default trigger\n", type);
1705 type = IRQ_TYPE_NONE;
1706 }
332e99d5 1707
a0b66a73
LW
1708 gc->irq.chip = irqchip;
1709 gc->irq.handler = handler;
1710 gc->irq.default_type = type;
1711 gc->to_irq = gpiochip_to_irq;
1712 gc->irq.lock_key = lock_key;
1713 gc->irq.request_key = request_key;
1714 gc->irq.domain = irq_domain_add_simple(of_node,
1715 gc->ngpio, first_irq,
1716 &gpiochip_domain_ops, gc);
1717 if (!gc->irq.domain) {
1718 gc->irq.chip = NULL;
14250520
LW
1719 return -EINVAL;
1720 }
8b67a1f0 1721
a0b66a73 1722 gpiochip_set_irq_hooks(gc);
14250520 1723
a0b66a73 1724 acpi_gpiochip_request_interrupts(gc);
afa82fab 1725
14250520
LW
1726 return 0;
1727}
739e6f59 1728EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_key);
14250520 1729
6a45b0e2
MW
1730/**
1731 * gpiochip_irqchip_add_domain() - adds an irqdomain to a gpiochip
1732 * @gc: the gpiochip to add the irqchip to
1733 * @domain: the irqdomain to add to the gpiochip
1734 *
1735 * This function adds an IRQ domain to the gpiochip.
1736 */
1737int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
1738 struct irq_domain *domain)
1739{
1740 if (!domain)
1741 return -EINVAL;
1742
1743 gc->to_irq = gpiochip_to_irq;
1744 gc->irq.domain = domain;
1745
1746 return 0;
1747}
1748EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain);
1749
14250520
LW
1750#else /* CONFIG_GPIOLIB_IRQCHIP */
1751
a0b66a73 1752static inline int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1753 struct lock_class_key *lock_key,
1754 struct lock_class_key *request_key)
e0d89728
TR
1755{
1756 return 0;
1757}
a0b66a73 1758static void gpiochip_irqchip_remove(struct gpio_chip *gc) {}
9411e3aa 1759
a0b66a73 1760static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
9411e3aa
AS
1761{
1762 return 0;
1763}
1764
a0b66a73 1765static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb
MW
1766{
1767 return 0;
1768}
a0b66a73 1769static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 1770{ }
14250520
LW
1771
1772#endif /* CONFIG_GPIOLIB_IRQCHIP */
1773
c771c2f4
JG
1774/**
1775 * gpiochip_generic_request() - request the gpio function for a pin
a0b66a73 1776 * @gc: the gpiochip owning the GPIO
c771c2f4
JG
1777 * @offset: the offset of the GPIO to request for GPIO function
1778 */
a0b66a73 1779int gpiochip_generic_request(struct gpio_chip *gc, unsigned offset)
c771c2f4 1780{
89ad556b 1781#ifdef CONFIG_PINCTRL
a0b66a73 1782 if (list_empty(&gc->gpiodev->pin_ranges))
89ad556b
TR
1783 return 0;
1784#endif
2ab73c6d 1785
a0b66a73 1786 return pinctrl_gpio_request(gc->gpiodev->base + offset);
c771c2f4
JG
1787}
1788EXPORT_SYMBOL_GPL(gpiochip_generic_request);
1789
1790/**
1791 * gpiochip_generic_free() - free the gpio function from a pin
a0b66a73 1792 * @gc: the gpiochip to request the gpio function for
c771c2f4
JG
1793 * @offset: the offset of the GPIO to free from GPIO function
1794 */
a0b66a73 1795void gpiochip_generic_free(struct gpio_chip *gc, unsigned offset)
c771c2f4 1796{
a0b66a73 1797 pinctrl_gpio_free(gc->gpiodev->base + offset);
c771c2f4
JG
1798}
1799EXPORT_SYMBOL_GPL(gpiochip_generic_free);
1800
2956b5d9
MW
1801/**
1802 * gpiochip_generic_config() - apply configuration for a pin
a0b66a73 1803 * @gc: the gpiochip owning the GPIO
2956b5d9
MW
1804 * @offset: the offset of the GPIO to apply the configuration
1805 * @config: the configuration to be applied
1806 */
a0b66a73 1807int gpiochip_generic_config(struct gpio_chip *gc, unsigned offset,
2956b5d9
MW
1808 unsigned long config)
1809{
a0b66a73 1810 return pinctrl_gpio_set_config(gc->gpiodev->base + offset, config);
2956b5d9
MW
1811}
1812EXPORT_SYMBOL_GPL(gpiochip_generic_config);
1813
f23f1516 1814#ifdef CONFIG_PINCTRL
165adc9c 1815
586a87e6
CR
1816/**
1817 * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
a0b66a73 1818 * @gc: the gpiochip to add the range for
d32651f6 1819 * @pctldev: the pin controller to map to
586a87e6
CR
1820 * @gpio_offset: the start offset in the current gpio_chip number space
1821 * @pin_group: name of the pin group inside the pin controller
973c1714
CL
1822 *
1823 * Calling this function directly from a DeviceTree-supported
1824 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
1825 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
1826 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
586a87e6 1827 */
a0b66a73 1828int gpiochip_add_pingroup_range(struct gpio_chip *gc,
586a87e6
CR
1829 struct pinctrl_dev *pctldev,
1830 unsigned int gpio_offset, const char *pin_group)
1831{
1832 struct gpio_pin_range *pin_range;
a0b66a73 1833 struct gpio_device *gdev = gc->gpiodev;
586a87e6
CR
1834 int ret;
1835
1836 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
1837 if (!pin_range) {
a0b66a73 1838 chip_err(gc, "failed to allocate pin ranges\n");
586a87e6
CR
1839 return -ENOMEM;
1840 }
1841
1842 /* Use local offset as range ID */
1843 pin_range->range.id = gpio_offset;
a0b66a73
LW
1844 pin_range->range.gc = gc;
1845 pin_range->range.name = gc->label;
fdeb8e15 1846 pin_range->range.base = gdev->base + gpio_offset;
586a87e6
CR
1847 pin_range->pctldev = pctldev;
1848
1849 ret = pinctrl_get_group_pins(pctldev, pin_group,
1850 &pin_range->range.pins,
1851 &pin_range->range.npins);
61c6375d
MN
1852 if (ret < 0) {
1853 kfree(pin_range);
586a87e6 1854 return ret;
61c6375d 1855 }
586a87e6
CR
1856
1857 pinctrl_add_gpio_range(pctldev, &pin_range->range);
1858
a0b66a73 1859 chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n",
1a2a99c6 1860 gpio_offset, gpio_offset + pin_range->range.npins - 1,
586a87e6
CR
1861 pinctrl_dev_get_devname(pctldev), pin_group);
1862
20ec3e39 1863 list_add_tail(&pin_range->node, &gdev->pin_ranges);
586a87e6
CR
1864
1865 return 0;
1866}
1867EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
1868
3f0f8670
LW
1869/**
1870 * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
a0b66a73 1871 * @gc: the gpiochip to add the range for
950d55f5 1872 * @pinctl_name: the dev_name() of the pin controller to map to
316511c0
LW
1873 * @gpio_offset: the start offset in the current gpio_chip number space
1874 * @pin_offset: the start offset in the pin controller number space
3f0f8670
LW
1875 * @npins: the number of pins from the offset of each pin space (GPIO and
1876 * pin controller) to accumulate in this range
950d55f5
TR
1877 *
1878 * Returns:
1879 * 0 on success, or a negative error-code on failure.
973c1714
CL
1880 *
1881 * Calling this function directly from a DeviceTree-supported
1882 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
1883 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
1884 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
3f0f8670 1885 */
a0b66a73 1886int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
316511c0 1887 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 1888 unsigned int npins)
f23f1516
SH
1889{
1890 struct gpio_pin_range *pin_range;
a0b66a73 1891 struct gpio_device *gdev = gc->gpiodev;
b4d4b1f0 1892 int ret;
f23f1516 1893
3f0f8670 1894 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
f23f1516 1895 if (!pin_range) {
a0b66a73 1896 chip_err(gc, "failed to allocate pin ranges\n");
1e63d7b9 1897 return -ENOMEM;
f23f1516
SH
1898 }
1899
3f0f8670 1900 /* Use local offset as range ID */
316511c0 1901 pin_range->range.id = gpio_offset;
a0b66a73
LW
1902 pin_range->range.gc = gc;
1903 pin_range->range.name = gc->label;
fdeb8e15 1904 pin_range->range.base = gdev->base + gpio_offset;
316511c0 1905 pin_range->range.pin_base = pin_offset;
f23f1516 1906 pin_range->range.npins = npins;
192c369c 1907 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
f23f1516 1908 &pin_range->range);
8f23ca1a 1909 if (IS_ERR(pin_range->pctldev)) {
b4d4b1f0 1910 ret = PTR_ERR(pin_range->pctldev);
a0b66a73 1911 chip_err(gc, "could not create pin range\n");
3f0f8670 1912 kfree(pin_range);
b4d4b1f0 1913 return ret;
3f0f8670 1914 }
a0b66a73 1915 chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
1a2a99c6 1916 gpio_offset, gpio_offset + npins - 1,
316511c0
LW
1917 pinctl_name,
1918 pin_offset, pin_offset + npins - 1);
f23f1516 1919
20ec3e39 1920 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1e63d7b9
LW
1921
1922 return 0;
f23f1516 1923}
165adc9c 1924EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
f23f1516 1925
3f0f8670
LW
1926/**
1927 * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
a0b66a73 1928 * @gc: the chip to remove all the mappings for
3f0f8670 1929 */
a0b66a73 1930void gpiochip_remove_pin_ranges(struct gpio_chip *gc)
f23f1516
SH
1931{
1932 struct gpio_pin_range *pin_range, *tmp;
a0b66a73 1933 struct gpio_device *gdev = gc->gpiodev;
f23f1516 1934
20ec3e39 1935 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
f23f1516
SH
1936 list_del(&pin_range->node);
1937 pinctrl_remove_gpio_range(pin_range->pctldev,
1938 &pin_range->range);
3f0f8670 1939 kfree(pin_range);
f23f1516
SH
1940 }
1941}
165adc9c
LW
1942EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
1943
1944#endif /* CONFIG_PINCTRL */
f23f1516 1945
d2876d08
DB
1946/* These "optional" allocation calls help prevent drivers from stomping
1947 * on each other, and help provide better diagnostics in debugfs.
1948 * They're called even less than the "set direction" calls.
1949 */
fac9d885 1950static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
d2876d08 1951{
a0b66a73 1952 struct gpio_chip *gc = desc->gdev->chip;
d377f56f 1953 int ret;
d2876d08 1954 unsigned long flags;
3789f5ac 1955 unsigned offset;
d2876d08 1956
18534df4
MS
1957 if (label) {
1958 label = kstrdup_const(label, GFP_KERNEL);
1959 if (!label)
1960 return -ENOMEM;
1961 }
1962
bcabdef1
AC
1963 spin_lock_irqsave(&gpio_lock, flags);
1964
d2876d08 1965 /* NOTE: gpio_request() can be called in early boot,
35e8bb51 1966 * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
d2876d08
DB
1967 */
1968
1969 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
1970 desc_set_label(desc, label ? : "?");
d377f56f 1971 ret = 0;
438d8908 1972 } else {
18534df4 1973 kfree_const(label);
d377f56f 1974 ret = -EBUSY;
7460db56 1975 goto done;
35e8bb51
DB
1976 }
1977
a0b66a73
LW
1978 if (gc->request) {
1979 /* gc->request may sleep */
35e8bb51 1980 spin_unlock_irqrestore(&gpio_lock, flags);
3789f5ac 1981 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
1982 if (gpiochip_line_is_valid(gc, offset))
1983 ret = gc->request(gc, offset);
3789f5ac 1984 else
d377f56f 1985 ret = -EINVAL;
35e8bb51
DB
1986 spin_lock_irqsave(&gpio_lock, flags);
1987
d377f56f 1988 if (ret < 0) {
35e8bb51 1989 desc_set_label(desc, NULL);
18534df4 1990 kfree_const(label);
35e8bb51 1991 clear_bit(FLAG_REQUESTED, &desc->flags);
80b0a602 1992 goto done;
35e8bb51 1993 }
438d8908 1994 }
a0b66a73
LW
1995 if (gc->get_direction) {
1996 /* gc->get_direction may sleep */
80b0a602 1997 spin_unlock_irqrestore(&gpio_lock, flags);
372e722e 1998 gpiod_get_direction(desc);
80b0a602
MN
1999 spin_lock_irqsave(&gpio_lock, flags);
2000 }
77c2d792
MW
2001done:
2002 spin_unlock_irqrestore(&gpio_lock, flags);
d377f56f 2003 return ret;
77c2d792
MW
2004}
2005
fdeb8e15
LW
2006/*
2007 * This descriptor validation needs to be inserted verbatim into each
2008 * function taking a descriptor, so we need to use a preprocessor
54d77198
LW
2009 * macro to avoid endless duplication. If the desc is NULL it is an
2010 * optional GPIO and calls should just bail out.
fdeb8e15 2011 */
a746a232
RV
2012static int validate_desc(const struct gpio_desc *desc, const char *func)
2013{
2014 if (!desc)
2015 return 0;
2016 if (IS_ERR(desc)) {
2017 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
2018 return PTR_ERR(desc);
2019 }
2020 if (!desc->gdev) {
2021 pr_warn("%s: invalid GPIO (no device)\n", func);
2022 return -EINVAL;
2023 }
2024 if (!desc->gdev->chip) {
2025 dev_warn(&desc->gdev->dev,
2026 "%s: backing chip is gone\n", func);
2027 return 0;
2028 }
2029 return 1;
2030}
2031
fdeb8e15 2032#define VALIDATE_DESC(desc) do { \
a746a232
RV
2033 int __valid = validate_desc(desc, __func__); \
2034 if (__valid <= 0) \
2035 return __valid; \
2036 } while (0)
fdeb8e15
LW
2037
2038#define VALIDATE_DESC_VOID(desc) do { \
a746a232
RV
2039 int __valid = validate_desc(desc, __func__); \
2040 if (__valid <= 0) \
fdeb8e15 2041 return; \
a746a232 2042 } while (0)
fdeb8e15 2043
0eb4c6c2 2044int gpiod_request(struct gpio_desc *desc, const char *label)
77c2d792 2045{
d377f56f 2046 int ret = -EPROBE_DEFER;
fdeb8e15 2047 struct gpio_device *gdev;
77c2d792 2048
fdeb8e15
LW
2049 VALIDATE_DESC(desc);
2050 gdev = desc->gdev;
77c2d792 2051
fdeb8e15 2052 if (try_module_get(gdev->owner)) {
d377f56f
LW
2053 ret = gpiod_request_commit(desc, label);
2054 if (ret < 0)
fdeb8e15 2055 module_put(gdev->owner);
33a68e86
LW
2056 else
2057 get_device(&gdev->dev);
77c2d792
MW
2058 }
2059
d377f56f
LW
2060 if (ret)
2061 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
77c2d792 2062
d377f56f 2063 return ret;
d2876d08 2064}
372e722e 2065
fac9d885 2066static bool gpiod_free_commit(struct gpio_desc *desc)
d2876d08 2067{
77c2d792 2068 bool ret = false;
d2876d08 2069 unsigned long flags;
a0b66a73 2070 struct gpio_chip *gc;
d2876d08 2071
3d599d1c
UKK
2072 might_sleep();
2073
372e722e 2074 gpiod_unexport(desc);
d8f388d8 2075
d2876d08
DB
2076 spin_lock_irqsave(&gpio_lock, flags);
2077
a0b66a73
LW
2078 gc = desc->gdev->chip;
2079 if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) {
2080 if (gc->free) {
35e8bb51 2081 spin_unlock_irqrestore(&gpio_lock, flags);
a0b66a73
LW
2082 might_sleep_if(gc->can_sleep);
2083 gc->free(gc, gpio_chip_hwgpio(desc));
35e8bb51
DB
2084 spin_lock_irqsave(&gpio_lock, flags);
2085 }
18534df4 2086 kfree_const(desc->label);
d2876d08 2087 desc_set_label(desc, NULL);
07697461 2088 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
35e8bb51 2089 clear_bit(FLAG_REQUESTED, &desc->flags);
aca5ce14 2090 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
25553ff0 2091 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
9225d516
DF
2092 clear_bit(FLAG_PULL_UP, &desc->flags);
2093 clear_bit(FLAG_PULL_DOWN, &desc->flags);
2148ad77 2094 clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
73e03419
KG
2095 clear_bit(FLAG_EDGE_RISING, &desc->flags);
2096 clear_bit(FLAG_EDGE_FALLING, &desc->flags);
f625d460 2097 clear_bit(FLAG_IS_HOGGED, &desc->flags);
63636d95
GU
2098#ifdef CONFIG_OF_DYNAMIC
2099 desc->hog = NULL;
65cff704
KG
2100#endif
2101#ifdef CONFIG_GPIO_CDEV
2102 WRITE_ONCE(desc->debounce_period_us, 0);
63636d95 2103#endif
77c2d792
MW
2104 ret = true;
2105 }
d2876d08
DB
2106
2107 spin_unlock_irqrestore(&gpio_lock, flags);
6accc376
KG
2108 blocking_notifier_call_chain(&desc->gdev->notifier,
2109 GPIOLINE_CHANGED_RELEASED, desc);
51c1064e 2110
77c2d792
MW
2111 return ret;
2112}
2113
0eb4c6c2 2114void gpiod_free(struct gpio_desc *desc)
77c2d792 2115{
fac9d885 2116 if (desc && desc->gdev && gpiod_free_commit(desc)) {
fdeb8e15 2117 module_put(desc->gdev->owner);
33a68e86
LW
2118 put_device(&desc->gdev->dev);
2119 } else {
77c2d792 2120 WARN_ON(extra_checks);
33a68e86 2121 }
d2876d08 2122}
372e722e 2123
d2876d08
DB
2124/**
2125 * gpiochip_is_requested - return string iff signal was requested
a0b66a73 2126 * @gc: controller managing the signal
d2876d08
DB
2127 * @offset: of signal within controller's 0..(ngpio - 1) range
2128 *
2129 * Returns NULL if the GPIO is not currently requested, else a string.
9c8318ff
AC
2130 * The string returned is the label passed to gpio_request(); if none has been
2131 * passed it is a meaningless, non-NULL constant.
d2876d08
DB
2132 *
2133 * This function is for use by GPIO controller drivers. The label can
2134 * help with diagnostics, and knowing that the signal is used as a GPIO
2135 * can help avoid accidentally multiplexing it to another controller.
2136 */
a0b66a73 2137const char *gpiochip_is_requested(struct gpio_chip *gc, unsigned offset)
d2876d08 2138{
6c0b4e6c 2139 struct gpio_desc *desc;
d2876d08 2140
a0b66a73 2141 if (offset >= gc->ngpio)
d2876d08 2142 return NULL;
6c0b4e6c 2143
a0b66a73 2144 desc = gpiochip_get_desc(gc, offset);
1739a2d8
BG
2145 if (IS_ERR(desc))
2146 return NULL;
6c0b4e6c 2147
372e722e 2148 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
d2876d08 2149 return NULL;
372e722e 2150 return desc->label;
d2876d08
DB
2151}
2152EXPORT_SYMBOL_GPL(gpiochip_is_requested);
2153
77c2d792
MW
2154/**
2155 * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
a0b66a73 2156 * @gc: GPIO chip
950d55f5 2157 * @hwnum: hardware number of the GPIO for which to request the descriptor
77c2d792 2158 * @label: label for the GPIO
5923ea6c
LW
2159 * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
2160 * specify things like line inversion semantics with the machine flags
2161 * such as GPIO_OUT_LOW
2162 * @dflags: descriptor request flags for this GPIO or 0 if default, this
2163 * can be used to specify consumer semantics such as open drain
77c2d792
MW
2164 *
2165 * Function allows GPIO chip drivers to request and use their own GPIO
2166 * descriptors via gpiolib API. Difference to gpiod_request() is that this
2167 * function will not increase reference count of the GPIO chip module. This
2168 * allows the GPIO chip module to be unloaded as needed (we assume that the
2169 * GPIO chip driver handles freeing the GPIOs it has requested).
950d55f5
TR
2170 *
2171 * Returns:
2172 * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
2173 * code on failure.
77c2d792 2174 */
a0b66a73 2175struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc,
06863620 2176 unsigned int hwnum,
21abf103 2177 const char *label,
5923ea6c
LW
2178 enum gpio_lookup_flags lflags,
2179 enum gpiod_flags dflags)
77c2d792 2180{
a0b66a73 2181 struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum);
d377f56f 2182 int ret;
77c2d792 2183
abdc08a3 2184 if (IS_ERR(desc)) {
a0b66a73 2185 chip_err(gc, "failed to get GPIO descriptor\n");
abdc08a3
AC
2186 return desc;
2187 }
2188
d377f56f
LW
2189 ret = gpiod_request_commit(desc, label);
2190 if (ret < 0)
2191 return ERR_PTR(ret);
77c2d792 2192
d377f56f
LW
2193 ret = gpiod_configure_flags(desc, label, lflags, dflags);
2194 if (ret) {
a0b66a73 2195 chip_err(gc, "setup of own GPIO %s failed\n", label);
21abf103 2196 gpiod_free_commit(desc);
d377f56f 2197 return ERR_PTR(ret);
21abf103
LW
2198 }
2199
abdc08a3 2200 return desc;
77c2d792 2201}
f7d4ad98 2202EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
77c2d792
MW
2203
2204/**
2205 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
2206 * @desc: GPIO descriptor to free
2207 *
2208 * Function frees the given GPIO requested previously with
2209 * gpiochip_request_own_desc().
2210 */
2211void gpiochip_free_own_desc(struct gpio_desc *desc)
2212{
2213 if (desc)
fac9d885 2214 gpiod_free_commit(desc);
77c2d792 2215}
f7d4ad98 2216EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
d2876d08 2217
fdeb8e15
LW
2218/*
2219 * Drivers MUST set GPIO direction before making get/set calls. In
d2876d08
DB
2220 * some cases this is done in early boot, before IRQs are enabled.
2221 *
2222 * As a rule these aren't called more than once (except for drivers
2223 * using the open-drain emulation idiom) so these are natural places
2224 * to accumulate extra debugging checks. Note that we can't (yet)
2225 * rely on gpio_request() having been called beforehand.
2226 */
2227
d99f8876 2228static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset,
62adc6f3 2229 unsigned long config)
71479789 2230{
d90f3685
BG
2231 if (!gc->set_config)
2232 return -ENOTSUPP;
542f3615 2233
62adc6f3 2234 return gc->set_config(gc, offset, config);
71479789
TP
2235}
2236
83522358 2237static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode)
d99f8876 2238{
a0b66a73 2239 struct gpio_chip *gc = desc->gdev->chip;
91b4ea5f 2240 unsigned long config;
d99f8876
BG
2241 unsigned arg;
2242
2243 switch (mode) {
d99f8876
BG
2244 case PIN_CONFIG_BIAS_PULL_DOWN:
2245 case PIN_CONFIG_BIAS_PULL_UP:
2246 arg = 1;
2247 break;
2248
2249 default:
2250 arg = 0;
2251 }
2252
91b4ea5f 2253 config = PIN_CONF_PACKED(mode, arg);
a0b66a73 2254 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
d99f8876
BG
2255}
2256
5f4bf171 2257static int gpio_set_bias(struct gpio_desc *desc)
2148ad77
KG
2258{
2259 int bias = 0;
2260 int ret = 0;
2261
2262 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
2263 bias = PIN_CONFIG_BIAS_DISABLE;
2264 else if (test_bit(FLAG_PULL_UP, &desc->flags))
2265 bias = PIN_CONFIG_BIAS_PULL_UP;
2266 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
2267 bias = PIN_CONFIG_BIAS_PULL_DOWN;
2268
2269 if (bias) {
83522358 2270 ret = gpio_set_config(desc, bias);
2148ad77
KG
2271 if (ret != -ENOTSUPP)
2272 return ret;
2273 }
2274 return 0;
2275}
2276
79a9becd
AC
2277/**
2278 * gpiod_direction_input - set the GPIO direction to input
2279 * @desc: GPIO to set to input
2280 *
2281 * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
2282 * be called safely on it.
2283 *
2284 * Return 0 in case of success, else an error code.
2285 */
2286int gpiod_direction_input(struct gpio_desc *desc)
d2876d08 2287{
a0b66a73 2288 struct gpio_chip *gc;
d377f56f 2289 int ret = 0;
d2876d08 2290
fdeb8e15 2291 VALIDATE_DESC(desc);
a0b66a73 2292 gc = desc->gdev->chip;
bcabdef1 2293
e48d194d
LW
2294 /*
2295 * It is legal to have no .get() and .direction_input() specified if
2296 * the chip is output-only, but you can't specify .direction_input()
2297 * and not support the .get() operation, that doesn't make sense.
2298 */
a0b66a73 2299 if (!gc->get && gc->direction_input) {
6424de5a 2300 gpiod_warn(desc,
e48d194d
LW
2301 "%s: missing get() but have direction_input()\n",
2302 __func__);
be1a4b13
LW
2303 return -EIO;
2304 }
2305
e48d194d
LW
2306 /*
2307 * If we have a .direction_input() callback, things are simple,
2308 * just call it. Else we are some input-only chip so try to check the
2309 * direction (if .get_direction() is supported) else we silently
2310 * assume we are in input mode after this.
2311 */
a0b66a73
LW
2312 if (gc->direction_input) {
2313 ret = gc->direction_input(gc, gpio_chip_hwgpio(desc));
2314 } else if (gc->get_direction &&
2315 (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) {
ae9847f4 2316 gpiod_warn(desc,
e48d194d
LW
2317 "%s: missing direction_input() operation and line is output\n",
2318 __func__);
ae9847f4
RRD
2319 return -EIO;
2320 }
2148ad77 2321 if (ret == 0) {
d2876d08 2322 clear_bit(FLAG_IS_OUT, &desc->flags);
5f4bf171 2323 ret = gpio_set_bias(desc);
2148ad77 2324 }
d449991c 2325
d377f56f 2326 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
d82da797 2327
d377f56f 2328 return ret;
d2876d08 2329}
79a9becd 2330EXPORT_SYMBOL_GPL(gpiod_direction_input);
372e722e 2331
fac9d885 2332static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
d2876d08 2333{
c663e5f5 2334 struct gpio_chip *gc = desc->gdev->chip;
ad17731d 2335 int val = !!value;
ae9847f4 2336 int ret = 0;
d2876d08 2337
e48d194d
LW
2338 /*
2339 * It's OK not to specify .direction_output() if the gpiochip is
2340 * output-only, but if there is then not even a .set() operation it
2341 * is pretty tricky to drive the output line.
2342 */
ae9847f4 2343 if (!gc->set && !gc->direction_output) {
6424de5a 2344 gpiod_warn(desc,
e48d194d
LW
2345 "%s: missing set() and direction_output() operations\n",
2346 __func__);
be1a4b13
LW
2347 return -EIO;
2348 }
2349
ae9847f4
RRD
2350 if (gc->direction_output) {
2351 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
2352 } else {
e48d194d 2353 /* Check that we are in output mode if we can */
ae9847f4
RRD
2354 if (gc->get_direction &&
2355 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
2356 gpiod_warn(desc,
2357 "%s: missing direction_output() operation\n",
2358 __func__);
2359 return -EIO;
2360 }
e48d194d
LW
2361 /*
2362 * If we can't actively set the direction, we are some
2363 * output-only chip, so just drive the output as desired.
2364 */
ae9847f4
RRD
2365 gc->set(gc, gpio_chip_hwgpio(desc), val);
2366 }
2367
c663e5f5 2368 if (!ret)
d2876d08 2369 set_bit(FLAG_IS_OUT, &desc->flags);
ad17731d 2370 trace_gpio_value(desc_to_gpio(desc), 0, val);
c663e5f5
LW
2371 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
2372 return ret;
d2876d08 2373}
ef70bbe1
PZ
2374
2375/**
2376 * gpiod_direction_output_raw - set the GPIO direction to output
2377 * @desc: GPIO to set to output
2378 * @value: initial output value of the GPIO
2379 *
2380 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2381 * be called safely on it. The initial value of the output must be specified
2382 * as raw value on the physical line without regard for the ACTIVE_LOW status.
2383 *
2384 * Return 0 in case of success, else an error code.
2385 */
2386int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
2387{
fdeb8e15 2388 VALIDATE_DESC(desc);
fac9d885 2389 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1
PZ
2390}
2391EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
2392
2393/**
90df4fe0 2394 * gpiod_direction_output - set the GPIO direction to output
ef70bbe1
PZ
2395 * @desc: GPIO to set to output
2396 * @value: initial output value of the GPIO
2397 *
2398 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2399 * be called safely on it. The initial value of the output must be specified
2400 * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
2401 * account.
2402 *
2403 * Return 0 in case of success, else an error code.
2404 */
2405int gpiod_direction_output(struct gpio_desc *desc, int value)
2406{
02e47980
LW
2407 int ret;
2408
fdeb8e15 2409 VALIDATE_DESC(desc);
ef70bbe1
PZ
2410 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2411 value = !value;
ad17731d
LW
2412 else
2413 value = !!value;
02e47980 2414
4e9439dd
HV
2415 /* GPIOs used for enabled IRQs shall not be set as output */
2416 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
2417 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
02e47980
LW
2418 gpiod_err(desc,
2419 "%s: tried to set a GPIO tied to an IRQ as output\n",
2420 __func__);
2421 return -EIO;
2422 }
2423
2424 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
2425 /* First see if we can enable open drain in hardware */
83522358 2426 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN);
02e47980
LW
2427 if (!ret)
2428 goto set_output_value;
2429 /* Emulate open drain by not actively driving the line high */
e735244e
BG
2430 if (value) {
2431 ret = gpiod_direction_input(desc);
2432 goto set_output_flag;
2433 }
02e47980
LW
2434 }
2435 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
83522358 2436 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE);
02e47980
LW
2437 if (!ret)
2438 goto set_output_value;
2439 /* Emulate open source by not actively driving the line low */
e735244e
BG
2440 if (!value) {
2441 ret = gpiod_direction_input(desc);
2442 goto set_output_flag;
2443 }
02e47980 2444 } else {
83522358 2445 gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL);
02e47980
LW
2446 }
2447
2448set_output_value:
5f4bf171 2449 ret = gpio_set_bias(desc);
2821ae5f
KG
2450 if (ret)
2451 return ret;
fac9d885 2452 return gpiod_direction_output_raw_commit(desc, value);
e735244e
BG
2453
2454set_output_flag:
2455 /*
2456 * When emulating open-source or open-drain functionalities by not
2457 * actively driving the line (setting mode to input) we still need to
2458 * set the IS_OUT flag or otherwise we won't be able to set the line
2459 * value anymore.
2460 */
2461 if (ret == 0)
2462 set_bit(FLAG_IS_OUT, &desc->flags);
2463 return ret;
ef70bbe1 2464}
79a9becd 2465EXPORT_SYMBOL_GPL(gpiod_direction_output);
d2876d08 2466
8ced32ff
GU
2467/**
2468 * gpiod_set_config - sets @config for a GPIO
2469 * @desc: descriptor of the GPIO for which to set the configuration
2470 * @config: Same packed config format as generic pinconf
2471 *
2472 * Returns:
2473 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2474 * configuration.
2475 */
2476int gpiod_set_config(struct gpio_desc *desc, unsigned long config)
2477{
a0b66a73 2478 struct gpio_chip *gc;
8ced32ff
GU
2479
2480 VALIDATE_DESC(desc);
a0b66a73 2481 gc = desc->gdev->chip;
8ced32ff 2482
a0b66a73 2483 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
8ced32ff
GU
2484}
2485EXPORT_SYMBOL_GPL(gpiod_set_config);
2486
c4b5be98 2487/**
950d55f5
TR
2488 * gpiod_set_debounce - sets @debounce time for a GPIO
2489 * @desc: descriptor of the GPIO for which to set debounce time
2490 * @debounce: debounce time in microseconds
65d87656 2491 *
950d55f5
TR
2492 * Returns:
2493 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2494 * debounce time.
c4b5be98 2495 */
79a9becd 2496int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce)
c4b5be98 2497{
8ced32ff 2498 unsigned long config;
be1a4b13 2499
2956b5d9 2500 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
8ced32ff 2501 return gpiod_set_config(desc, config);
c4b5be98 2502}
79a9becd 2503EXPORT_SYMBOL_GPL(gpiod_set_debounce);
372e722e 2504
e10f72bf
AJ
2505/**
2506 * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
2507 * @desc: descriptor of the GPIO for which to configure persistence
2508 * @transitory: True to lose state on suspend or reset, false for persistence
2509 *
2510 * Returns:
2511 * 0 on success, otherwise a negative error code.
2512 */
2513int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
2514{
a0b66a73 2515 struct gpio_chip *gc;
e10f72bf
AJ
2516 unsigned long packed;
2517 int gpio;
2518 int rc;
2519
156dd392 2520 VALIDATE_DESC(desc);
e10f72bf
AJ
2521 /*
2522 * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
2523 * persistence state.
2524 */
4fc5bfeb 2525 assign_bit(FLAG_TRANSITORY, &desc->flags, transitory);
e10f72bf
AJ
2526
2527 /* If the driver supports it, set the persistence state now */
a0b66a73
LW
2528 gc = desc->gdev->chip;
2529 if (!gc->set_config)
e10f72bf
AJ
2530 return 0;
2531
2532 packed = pinconf_to_config_packed(PIN_CONFIG_PERSIST_STATE,
2533 !transitory);
2534 gpio = gpio_chip_hwgpio(desc);
a0b66a73 2535 rc = gpio_do_set_config(gc, gpio, packed);
e10f72bf
AJ
2536 if (rc == -ENOTSUPP) {
2537 dev_dbg(&desc->gdev->dev, "Persistence not supported for GPIO %d\n",
2538 gpio);
2539 return 0;
2540 }
2541
2542 return rc;
2543}
2544EXPORT_SYMBOL_GPL(gpiod_set_transitory);
2545
79a9becd
AC
2546/**
2547 * gpiod_is_active_low - test whether a GPIO is active-low or not
2548 * @desc: the gpio descriptor to test
2549 *
2550 * Returns 1 if the GPIO is active-low, 0 otherwise.
2551 */
2552int gpiod_is_active_low(const struct gpio_desc *desc)
372e722e 2553{
fdeb8e15 2554 VALIDATE_DESC(desc);
79a9becd 2555 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
372e722e 2556}
79a9becd 2557EXPORT_SYMBOL_GPL(gpiod_is_active_low);
d2876d08 2558
d3a5bcb4
MM
2559/**
2560 * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not
2561 * @desc: the gpio descriptor to change
2562 */
2563void gpiod_toggle_active_low(struct gpio_desc *desc)
2564{
2565 VALIDATE_DESC_VOID(desc);
2566 change_bit(FLAG_ACTIVE_LOW, &desc->flags);
2567}
2568EXPORT_SYMBOL_GPL(gpiod_toggle_active_low);
2569
d2876d08
DB
2570/* I/O calls are only valid after configuration completed; the relevant
2571 * "is this a valid GPIO" error checks should already have been done.
2572 *
2573 * "Get" operations are often inlinable as reading a pin value register,
2574 * and masking the relevant bit in that register.
2575 *
2576 * When "set" operations are inlinable, they involve writing that mask to
2577 * one register to set a low value, or a different register to set it high.
2578 * Otherwise locking is needed, so there may be little value to inlining.
2579 *
2580 *------------------------------------------------------------------------
2581 *
2582 * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
2583 * have requested the GPIO. That can include implicit requesting by
2584 * a direction setting call. Marking a gpio as requested locks its chip
2585 * in memory, guaranteeing that these table lookups need no more locking
2586 * and that gpiochip_remove() will fail.
2587 *
2588 * REVISIT when debugging, consider adding some instrumentation to ensure
2589 * that the GPIO was actually requested.
2590 */
2591
fac9d885 2592static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
d2876d08 2593{
a0b66a73 2594 struct gpio_chip *gc;
372e722e 2595 int offset;
e20538b8 2596 int value;
d2876d08 2597
a0b66a73 2598 gc = desc->gdev->chip;
372e722e 2599 offset = gpio_chip_hwgpio(desc);
a0b66a73 2600 value = gc->get ? gc->get(gc, offset) : -EIO;
723a6303 2601 value = value < 0 ? value : !!value;
372e722e 2602 trace_gpio_value(desc_to_gpio(desc), 1, value);
3f397c21 2603 return value;
d2876d08 2604}
372e722e 2605
a0b66a73 2606static int gpio_chip_get_multiple(struct gpio_chip *gc,
eec1d566
LW
2607 unsigned long *mask, unsigned long *bits)
2608{
a0b66a73
LW
2609 if (gc->get_multiple) {
2610 return gc->get_multiple(gc, mask, bits);
2611 } else if (gc->get) {
eec1d566
LW
2612 int i, value;
2613
a0b66a73
LW
2614 for_each_set_bit(i, mask, gc->ngpio) {
2615 value = gc->get(gc, i);
eec1d566
LW
2616 if (value < 0)
2617 return value;
2618 __assign_bit(i, bits, value);
2619 }
2620 return 0;
2621 }
2622 return -EIO;
2623}
2624
2625int gpiod_get_array_value_complex(bool raw, bool can_sleep,
2626 unsigned int array_size,
2627 struct gpio_desc **desc_array,
77588c14 2628 struct gpio_array *array_info,
b9762beb 2629 unsigned long *value_bitmap)
eec1d566 2630{
d377f56f 2631 int ret, i = 0;
b17566a6
JK
2632
2633 /*
2634 * Validate array_info against desc_array and its size.
2635 * It should immediately follow desc_array if both
2636 * have been obtained from the same gpiod_get_array() call.
2637 */
2638 if (array_info && array_info->desc == desc_array &&
2639 array_size <= array_info->size &&
2640 (void *)array_info == desc_array + array_info->size) {
2641 if (!can_sleep)
2642 WARN_ON(array_info->chip->can_sleep);
2643
d377f56f 2644 ret = gpio_chip_get_multiple(array_info->chip,
b17566a6
JK
2645 array_info->get_mask,
2646 value_bitmap);
d377f56f
LW
2647 if (ret)
2648 return ret;
b17566a6
JK
2649
2650 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2651 bitmap_xor(value_bitmap, value_bitmap,
2652 array_info->invert_mask, array_size);
2653
b17566a6 2654 i = find_first_zero_bit(array_info->get_mask, array_size);
ae66eca0
AS
2655 if (i == array_size)
2656 return 0;
b17566a6
JK
2657 } else {
2658 array_info = NULL;
2659 }
eec1d566
LW
2660
2661 while (i < array_size) {
a0b66a73 2662 struct gpio_chip *gc = desc_array[i]->gdev->chip;
3027743f
LA
2663 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
2664 unsigned long *mask, *bits;
eec1d566
LW
2665 int first, j, ret;
2666
a0b66a73 2667 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
3027743f
LA
2668 mask = fastpath;
2669 } else {
a0b66a73 2670 mask = kmalloc_array(2 * BITS_TO_LONGS(gc->ngpio),
3027743f
LA
2671 sizeof(*mask),
2672 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
2673 if (!mask)
2674 return -ENOMEM;
2675 }
2676
a0b66a73
LW
2677 bits = mask + BITS_TO_LONGS(gc->ngpio);
2678 bitmap_zero(mask, gc->ngpio);
3027743f 2679
eec1d566 2680 if (!can_sleep)
a0b66a73 2681 WARN_ON(gc->can_sleep);
eec1d566
LW
2682
2683 /* collect all inputs belonging to the same chip */
2684 first = i;
eec1d566
LW
2685 do {
2686 const struct gpio_desc *desc = desc_array[i];
2687 int hwgpio = gpio_chip_hwgpio(desc);
2688
2689 __set_bit(hwgpio, mask);
2690 i++;
b17566a6
JK
2691
2692 if (array_info)
35ae7f96
JK
2693 i = find_next_zero_bit(array_info->get_mask,
2694 array_size, i);
eec1d566 2695 } while ((i < array_size) &&
a0b66a73 2696 (desc_array[i]->gdev->chip == gc));
eec1d566 2697
a0b66a73 2698 ret = gpio_chip_get_multiple(gc, mask, bits);
3027743f
LA
2699 if (ret) {
2700 if (mask != fastpath)
2701 kfree(mask);
eec1d566 2702 return ret;
3027743f 2703 }
eec1d566 2704
b17566a6 2705 for (j = first; j < i; ) {
eec1d566
LW
2706 const struct gpio_desc *desc = desc_array[j];
2707 int hwgpio = gpio_chip_hwgpio(desc);
2708 int value = test_bit(hwgpio, bits);
2709
2710 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2711 value = !value;
b9762beb 2712 __assign_bit(j, value_bitmap, value);
eec1d566 2713 trace_gpio_value(desc_to_gpio(desc), 1, value);
799d5eb4 2714 j++;
b17566a6
JK
2715
2716 if (array_info)
35ae7f96
JK
2717 j = find_next_zero_bit(array_info->get_mask, i,
2718 j);
eec1d566 2719 }
3027743f
LA
2720
2721 if (mask != fastpath)
2722 kfree(mask);
eec1d566
LW
2723 }
2724 return 0;
2725}
2726
d2876d08 2727/**
79a9becd
AC
2728 * gpiod_get_raw_value() - return a gpio's raw value
2729 * @desc: gpio whose value will be returned
d2876d08 2730 *
79a9becd 2731 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 2732 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd 2733 *
827a9b8b 2734 * This function can be called from contexts where we cannot sleep, and will
79a9becd 2735 * complain if the GPIO chip functions potentially sleep.
d2876d08 2736 */
79a9becd 2737int gpiod_get_raw_value(const struct gpio_desc *desc)
d2876d08 2738{
fdeb8e15 2739 VALIDATE_DESC(desc);
3285170f 2740 /* Should be using gpiod_get_raw_value_cansleep() */
fdeb8e15 2741 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 2742 return gpiod_get_raw_value_commit(desc);
d2876d08 2743}
79a9becd 2744EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
372e722e 2745
79a9becd
AC
2746/**
2747 * gpiod_get_value() - return a gpio's value
2748 * @desc: gpio whose value will be returned
2749 *
2750 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 2751 * account, or negative errno on failure.
79a9becd 2752 *
827a9b8b 2753 * This function can be called from contexts where we cannot sleep, and will
79a9becd
AC
2754 * complain if the GPIO chip functions potentially sleep.
2755 */
2756int gpiod_get_value(const struct gpio_desc *desc)
372e722e 2757{
79a9becd 2758 int value;
fdeb8e15
LW
2759
2760 VALIDATE_DESC(desc);
3285170f 2761 /* Should be using gpiod_get_value_cansleep() */
fdeb8e15 2762 WARN_ON(desc->gdev->chip->can_sleep);
79a9becd 2763
fac9d885 2764 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
2765 if (value < 0)
2766 return value;
2767
79a9becd
AC
2768 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2769 value = !value;
2770
2771 return value;
372e722e 2772}
79a9becd 2773EXPORT_SYMBOL_GPL(gpiod_get_value);
d2876d08 2774
eec1d566
LW
2775/**
2776 * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
b9762beb 2777 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 2778 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 2779 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2780 * @value_bitmap: bitmap to store the read values
eec1d566
LW
2781 *
2782 * Read the raw values of the GPIOs, i.e. the values of the physical lines
2783 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
2784 * else an error code.
2785 *
827a9b8b 2786 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
2787 * and it will complain if the GPIO chip functions potentially sleep.
2788 */
2789int gpiod_get_raw_array_value(unsigned int array_size,
b9762beb 2790 struct gpio_desc **desc_array,
77588c14 2791 struct gpio_array *array_info,
b9762beb 2792 unsigned long *value_bitmap)
eec1d566
LW
2793{
2794 if (!desc_array)
2795 return -EINVAL;
2796 return gpiod_get_array_value_complex(true, false, array_size,
77588c14
JK
2797 desc_array, array_info,
2798 value_bitmap);
eec1d566
LW
2799}
2800EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
2801
2802/**
2803 * gpiod_get_array_value() - read values from an array of GPIOs
b9762beb 2804 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 2805 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 2806 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2807 * @value_bitmap: bitmap to store the read values
eec1d566
LW
2808 *
2809 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
2810 * into account. Return 0 in case of success, else an error code.
2811 *
827a9b8b 2812 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
2813 * and it will complain if the GPIO chip functions potentially sleep.
2814 */
2815int gpiod_get_array_value(unsigned int array_size,
b9762beb 2816 struct gpio_desc **desc_array,
77588c14 2817 struct gpio_array *array_info,
b9762beb 2818 unsigned long *value_bitmap)
eec1d566
LW
2819{
2820 if (!desc_array)
2821 return -EINVAL;
2822 return gpiod_get_array_value_complex(false, false, array_size,
77588c14
JK
2823 desc_array, array_info,
2824 value_bitmap);
eec1d566
LW
2825}
2826EXPORT_SYMBOL_GPL(gpiod_get_array_value);
2827
aca5ce14 2828/*
fac9d885 2829 * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
79a9becd 2830 * @desc: gpio descriptor whose state need to be set.
20a8a968 2831 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
aca5ce14 2832 */
fac9d885 2833static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
aca5ce14 2834{
d377f56f 2835 int ret = 0;
a0b66a73 2836 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
2837 int offset = gpio_chip_hwgpio(desc);
2838
aca5ce14 2839 if (value) {
a0b66a73 2840 ret = gc->direction_input(gc, offset);
aca5ce14 2841 } else {
a0b66a73 2842 ret = gc->direction_output(gc, offset, 0);
d377f56f 2843 if (!ret)
372e722e 2844 set_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 2845 }
d377f56f
LW
2846 trace_gpio_direction(desc_to_gpio(desc), value, ret);
2847 if (ret < 0)
6424de5a
MB
2848 gpiod_err(desc,
2849 "%s: Error in set_value for open drain err %d\n",
d377f56f 2850 __func__, ret);
aca5ce14
LD
2851}
2852
25553ff0 2853/*
79a9becd
AC
2854 * _gpio_set_open_source_value() - Set the open source gpio's value.
2855 * @desc: gpio descriptor whose state need to be set.
20a8a968 2856 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
25553ff0 2857 */
fac9d885 2858static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
25553ff0 2859{
d377f56f 2860 int ret = 0;
a0b66a73 2861 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
2862 int offset = gpio_chip_hwgpio(desc);
2863
25553ff0 2864 if (value) {
a0b66a73 2865 ret = gc->direction_output(gc, offset, 1);
d377f56f 2866 if (!ret)
372e722e 2867 set_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 2868 } else {
a0b66a73 2869 ret = gc->direction_input(gc, offset);
25553ff0 2870 }
d377f56f
LW
2871 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
2872 if (ret < 0)
6424de5a
MB
2873 gpiod_err(desc,
2874 "%s: Error in set_value for open source err %d\n",
d377f56f 2875 __func__, ret);
25553ff0
LD
2876}
2877
fac9d885 2878static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
d2876d08 2879{
a0b66a73 2880 struct gpio_chip *gc;
d2876d08 2881
a0b66a73 2882 gc = desc->gdev->chip;
372e722e 2883 trace_gpio_value(desc_to_gpio(desc), 0, value);
a0b66a73 2884 gc->set(gc, gpio_chip_hwgpio(desc), value);
372e722e
AC
2885}
2886
5f424243
RI
2887/*
2888 * set multiple outputs on the same chip;
2889 * use the chip's set_multiple function if available;
2890 * otherwise set the outputs sequentially;
a0b66a73 2891 * @chip: the GPIO chip we operate on
5f424243
RI
2892 * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
2893 * defines which outputs are to be changed
2894 * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
2895 * defines the values the outputs specified by mask are to be set to
2896 */
a0b66a73 2897static void gpio_chip_set_multiple(struct gpio_chip *gc,
5f424243
RI
2898 unsigned long *mask, unsigned long *bits)
2899{
a0b66a73
LW
2900 if (gc->set_multiple) {
2901 gc->set_multiple(gc, mask, bits);
5f424243 2902 } else {
5e4e6fb3
AS
2903 unsigned int i;
2904
2905 /* set outputs if the corresponding mask bit is set */
a0b66a73
LW
2906 for_each_set_bit(i, mask, gc->ngpio)
2907 gc->set(gc, i, test_bit(i, bits));
5f424243
RI
2908 }
2909}
2910
3027743f 2911int gpiod_set_array_value_complex(bool raw, bool can_sleep,
3c940660
GU
2912 unsigned int array_size,
2913 struct gpio_desc **desc_array,
2914 struct gpio_array *array_info,
2915 unsigned long *value_bitmap)
5f424243
RI
2916{
2917 int i = 0;
2918
b17566a6
JK
2919 /*
2920 * Validate array_info against desc_array and its size.
2921 * It should immediately follow desc_array if both
2922 * have been obtained from the same gpiod_get_array() call.
2923 */
2924 if (array_info && array_info->desc == desc_array &&
2925 array_size <= array_info->size &&
2926 (void *)array_info == desc_array + array_info->size) {
2927 if (!can_sleep)
2928 WARN_ON(array_info->chip->can_sleep);
2929
2930 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2931 bitmap_xor(value_bitmap, value_bitmap,
2932 array_info->invert_mask, array_size);
2933
2934 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
2935 value_bitmap);
2936
b17566a6 2937 i = find_first_zero_bit(array_info->set_mask, array_size);
ae66eca0
AS
2938 if (i == array_size)
2939 return 0;
b17566a6
JK
2940 } else {
2941 array_info = NULL;
2942 }
2943
5f424243 2944 while (i < array_size) {
a0b66a73 2945 struct gpio_chip *gc = desc_array[i]->gdev->chip;
3027743f
LA
2946 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
2947 unsigned long *mask, *bits;
5f424243
RI
2948 int count = 0;
2949
a0b66a73 2950 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
3027743f
LA
2951 mask = fastpath;
2952 } else {
a0b66a73 2953 mask = kmalloc_array(2 * BITS_TO_LONGS(gc->ngpio),
3027743f
LA
2954 sizeof(*mask),
2955 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
2956 if (!mask)
2957 return -ENOMEM;
2958 }
2959
a0b66a73
LW
2960 bits = mask + BITS_TO_LONGS(gc->ngpio);
2961 bitmap_zero(mask, gc->ngpio);
3027743f 2962
38e003f4 2963 if (!can_sleep)
a0b66a73 2964 WARN_ON(gc->can_sleep);
38e003f4 2965
5f424243
RI
2966 do {
2967 struct gpio_desc *desc = desc_array[i];
2968 int hwgpio = gpio_chip_hwgpio(desc);
b9762beb 2969 int value = test_bit(i, value_bitmap);
5f424243 2970
b17566a6
JK
2971 /*
2972 * Pins applicable for fast input but not for
2973 * fast output processing may have been already
2974 * inverted inside the fast path, skip them.
2975 */
2976 if (!raw && !(array_info &&
2977 test_bit(i, array_info->invert_mask)) &&
2978 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
5f424243
RI
2979 value = !value;
2980 trace_gpio_value(desc_to_gpio(desc), 0, value);
2981 /*
2982 * collect all normal outputs belonging to the same chip
2983 * open drain and open source outputs are set individually
2984 */
02e47980 2985 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
fac9d885 2986 gpio_set_open_drain_value_commit(desc, value);
02e47980 2987 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
fac9d885 2988 gpio_set_open_source_value_commit(desc, value);
5f424243
RI
2989 } else {
2990 __set_bit(hwgpio, mask);
4fc5bfeb 2991 __assign_bit(hwgpio, bits, value);
5f424243
RI
2992 count++;
2993 }
2994 i++;
b17566a6
JK
2995
2996 if (array_info)
35ae7f96
JK
2997 i = find_next_zero_bit(array_info->set_mask,
2998 array_size, i);
fdeb8e15 2999 } while ((i < array_size) &&
a0b66a73 3000 (desc_array[i]->gdev->chip == gc));
5f424243 3001 /* push collected bits to outputs */
38e003f4 3002 if (count != 0)
a0b66a73 3003 gpio_chip_set_multiple(gc, mask, bits);
3027743f
LA
3004
3005 if (mask != fastpath)
3006 kfree(mask);
5f424243 3007 }
3027743f 3008 return 0;
5f424243
RI
3009}
3010
d2876d08 3011/**
79a9becd
AC
3012 * gpiod_set_raw_value() - assign a gpio's raw value
3013 * @desc: gpio whose value will be assigned
d2876d08 3014 * @value: value to assign
d2876d08 3015 *
79a9becd
AC
3016 * Set the raw value of the GPIO, i.e. the value of its physical line without
3017 * regard for its ACTIVE_LOW status.
3018 *
827a9b8b 3019 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3020 * complain if the GPIO chip functions potentially sleep.
d2876d08 3021 */
79a9becd 3022void gpiod_set_raw_value(struct gpio_desc *desc, int value)
372e722e 3023{
fdeb8e15 3024 VALIDATE_DESC_VOID(desc);
3285170f 3025 /* Should be using gpiod_set_raw_value_cansleep() */
fdeb8e15 3026 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3027 gpiod_set_raw_value_commit(desc, value);
d2876d08 3028}
79a9becd 3029EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
d2876d08 3030
1e77fc82
GU
3031/**
3032 * gpiod_set_value_nocheck() - set a GPIO line value without checking
3033 * @desc: the descriptor to set the value on
3034 * @value: value to set
3035 *
3036 * This sets the value of a GPIO line backing a descriptor, applying
3037 * different semantic quirks like active low and open drain/source
3038 * handling.
3039 */
3040static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
3041{
3042 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3043 value = !value;
3044 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
3045 gpio_set_open_drain_value_commit(desc, value);
3046 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
3047 gpio_set_open_source_value_commit(desc, value);
3048 else
3049 gpiod_set_raw_value_commit(desc, value);
3050}
3051
d2876d08 3052/**
79a9becd
AC
3053 * gpiod_set_value() - assign a gpio's value
3054 * @desc: gpio whose value will be assigned
3055 * @value: value to assign
3056 *
02e47980
LW
3057 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
3058 * OPEN_DRAIN and OPEN_SOURCE flags into account.
d2876d08 3059 *
827a9b8b 3060 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3061 * complain if the GPIO chip functions potentially sleep.
d2876d08 3062 */
79a9becd 3063void gpiod_set_value(struct gpio_desc *desc, int value)
d2876d08 3064{
fdeb8e15 3065 VALIDATE_DESC_VOID(desc);
3285170f 3066 /* Should be using gpiod_set_value_cansleep() */
fdeb8e15 3067 WARN_ON(desc->gdev->chip->can_sleep);
1e77fc82 3068 gpiod_set_value_nocheck(desc, value);
372e722e 3069}
79a9becd 3070EXPORT_SYMBOL_GPL(gpiod_set_value);
d2876d08 3071
5f424243 3072/**
3fff99bc 3073 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
b9762beb 3074 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3075 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3076 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3077 * @value_bitmap: bitmap of values to assign
5f424243
RI
3078 *
3079 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3080 * without regard for their ACTIVE_LOW status.
3081 *
827a9b8b 3082 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3083 * complain if the GPIO chip functions potentially sleep.
3084 */
3027743f 3085int gpiod_set_raw_array_value(unsigned int array_size,
3c940660
GU
3086 struct gpio_desc **desc_array,
3087 struct gpio_array *array_info,
3088 unsigned long *value_bitmap)
5f424243
RI
3089{
3090 if (!desc_array)
3027743f
LA
3091 return -EINVAL;
3092 return gpiod_set_array_value_complex(true, false, array_size,
77588c14 3093 desc_array, array_info, value_bitmap);
5f424243 3094}
3fff99bc 3095EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
5f424243
RI
3096
3097/**
3fff99bc 3098 * gpiod_set_array_value() - assign values to an array of GPIOs
b9762beb 3099 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3100 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3101 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3102 * @value_bitmap: bitmap of values to assign
5f424243
RI
3103 *
3104 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3105 * into account.
3106 *
827a9b8b 3107 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3108 * complain if the GPIO chip functions potentially sleep.
3109 */
cf9af0d5
GU
3110int gpiod_set_array_value(unsigned int array_size,
3111 struct gpio_desc **desc_array,
3112 struct gpio_array *array_info,
3113 unsigned long *value_bitmap)
5f424243
RI
3114{
3115 if (!desc_array)
cf9af0d5
GU
3116 return -EINVAL;
3117 return gpiod_set_array_value_complex(false, false, array_size,
3118 desc_array, array_info,
3119 value_bitmap);
5f424243 3120}
3fff99bc 3121EXPORT_SYMBOL_GPL(gpiod_set_array_value);
5f424243 3122
d2876d08 3123/**
79a9becd
AC
3124 * gpiod_cansleep() - report whether gpio value access may sleep
3125 * @desc: gpio to check
d2876d08 3126 *
d2876d08 3127 */
79a9becd 3128int gpiod_cansleep(const struct gpio_desc *desc)
372e722e 3129{
fdeb8e15
LW
3130 VALIDATE_DESC(desc);
3131 return desc->gdev->chip->can_sleep;
d2876d08 3132}
79a9becd 3133EXPORT_SYMBOL_GPL(gpiod_cansleep);
d2876d08 3134
90b39402
LW
3135/**
3136 * gpiod_set_consumer_name() - set the consumer name for the descriptor
3137 * @desc: gpio to set the consumer name on
3138 * @name: the new consumer name
3139 */
18534df4 3140int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
90b39402 3141{
18534df4
MS
3142 VALIDATE_DESC(desc);
3143 if (name) {
3144 name = kstrdup_const(name, GFP_KERNEL);
3145 if (!name)
3146 return -ENOMEM;
3147 }
3148
3149 kfree_const(desc->label);
3150 desc_set_label(desc, name);
3151
3152 return 0;
90b39402
LW
3153}
3154EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
3155
0f6d504e 3156/**
79a9becd
AC
3157 * gpiod_to_irq() - return the IRQ corresponding to a GPIO
3158 * @desc: gpio whose IRQ will be returned (already requested)
0f6d504e 3159 *
79a9becd
AC
3160 * Return the IRQ corresponding to the passed GPIO, or an error code in case of
3161 * error.
0f6d504e 3162 */
79a9becd 3163int gpiod_to_irq(const struct gpio_desc *desc)
0f6d504e 3164{
a0b66a73 3165 struct gpio_chip *gc;
4c37ce86 3166 int offset;
0f6d504e 3167
79bb71bd
LW
3168 /*
3169 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
3170 * requires this function to not return zero on an invalid descriptor
3171 * but rather a negative error number.
3172 */
bfbbe44d 3173 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
79bb71bd
LW
3174 return -EINVAL;
3175
a0b66a73 3176 gc = desc->gdev->chip;
372e722e 3177 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
3178 if (gc->to_irq) {
3179 int retirq = gc->to_irq(gc, offset);
4c37ce86
LW
3180
3181 /* Zero means NO_IRQ */
3182 if (!retirq)
3183 return -ENXIO;
3184
3185 return retirq;
3186 }
3187 return -ENXIO;
0f6d504e 3188}
79a9becd 3189EXPORT_SYMBOL_GPL(gpiod_to_irq);
0f6d504e 3190
d468bf9e 3191/**
e3a2e878 3192 * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
a0b66a73 3193 * @gc: the chip the GPIO to lock belongs to
d74be6df 3194 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3195 *
3196 * This is used directly by GPIO drivers that want to lock down
f438acdf 3197 * a certain GPIO line to be used for IRQs.
d468bf9e 3198 */
a0b66a73 3199int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset)
372e722e 3200{
9c10280d
LW
3201 struct gpio_desc *desc;
3202
a0b66a73 3203 desc = gpiochip_get_desc(gc, offset);
9c10280d
LW
3204 if (IS_ERR(desc))
3205 return PTR_ERR(desc);
3206
60f8339e
LW
3207 /*
3208 * If it's fast: flush the direction setting if something changed
3209 * behind our back
3210 */
a0b66a73 3211 if (!gc->can_sleep && gc->get_direction) {
80956790 3212 int dir = gpiod_get_direction(desc);
9c10280d 3213
36b31279 3214 if (dir < 0) {
a0b66a73 3215 chip_err(gc, "%s: cannot get GPIO direction\n",
36b31279
AS
3216 __func__);
3217 return dir;
3218 }
9c10280d 3219 }
d468bf9e 3220
e9bdf7e6
LW
3221 /* To be valid for IRQ the line needs to be input or open drain */
3222 if (test_bit(FLAG_IS_OUT, &desc->flags) &&
3223 !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
a0b66a73 3224 chip_err(gc,
b1911710
AS
3225 "%s: tried to flag a GPIO set as output for IRQ\n",
3226 __func__);
d468bf9e
LW
3227 return -EIO;
3228 }
3229
9c10280d 3230 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3231 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3232
3233 /*
3234 * If the consumer has not set up a label (such as when the
3235 * IRQ is referenced from .to_irq()) we set up a label here
3236 * so it is clear this is used as an interrupt.
3237 */
3238 if (!desc->label)
3239 desc_set_label(desc, "interrupt");
3240
d468bf9e 3241 return 0;
372e722e 3242}
e3a2e878 3243EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
d2876d08 3244
d468bf9e 3245/**
e3a2e878 3246 * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
a0b66a73 3247 * @gc: the chip the GPIO to lock belongs to
d74be6df 3248 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3249 *
3250 * This is used directly by GPIO drivers that want to indicate
3251 * that a certain GPIO is no longer used exclusively for IRQ.
d2876d08 3252 */
a0b66a73 3253void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset)
d468bf9e 3254{
3940c34a
LW
3255 struct gpio_desc *desc;
3256
a0b66a73 3257 desc = gpiochip_get_desc(gc, offset);
3940c34a 3258 if (IS_ERR(desc))
d468bf9e 3259 return;
d2876d08 3260
3940c34a 3261 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3262 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3263
3264 /* If we only had this marking, erase it */
3265 if (desc->label && !strcmp(desc->label, "interrupt"))
3266 desc_set_label(desc, NULL);
d468bf9e 3267}
e3a2e878 3268EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
d468bf9e 3269
a0b66a73 3270void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3271{
a0b66a73 3272 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3273
3274 if (!IS_ERR(desc) &&
3275 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
3276 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3277}
3278EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
3279
a0b66a73 3280void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3281{
a0b66a73 3282 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3283
3284 if (!IS_ERR(desc) &&
3285 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
e9bdf7e6
LW
3286 /*
3287 * We must not be output when using IRQ UNLESS we are
3288 * open drain.
3289 */
3290 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) &&
3291 !test_bit(FLAG_OPEN_DRAIN, &desc->flags));
4e9439dd
HV
3292 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3293 }
3294}
3295EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
3296
a0b66a73 3297bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset)
6cee3821 3298{
a0b66a73 3299 if (offset >= gc->ngpio)
6cee3821
LW
3300 return false;
3301
a0b66a73 3302 return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags);
6cee3821
LW
3303}
3304EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
3305
a0b66a73 3306int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238
HV
3307{
3308 int ret;
3309
a0b66a73 3310 if (!try_module_get(gc->gpiodev->owner))
4e6b8238
HV
3311 return -ENODEV;
3312
a0b66a73 3313 ret = gpiochip_lock_as_irq(gc, offset);
4e6b8238 3314 if (ret) {
a0b66a73
LW
3315 chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset);
3316 module_put(gc->gpiodev->owner);
4e6b8238
HV
3317 return ret;
3318 }
3319 return 0;
3320}
3321EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
3322
a0b66a73 3323void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238 3324{
a0b66a73
LW
3325 gpiochip_unlock_as_irq(gc, offset);
3326 module_put(gc->gpiodev->owner);
4e6b8238
HV
3327}
3328EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
3329
a0b66a73 3330bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset)
143b65d6 3331{
a0b66a73 3332 if (offset >= gc->ngpio)
143b65d6
LW
3333 return false;
3334
a0b66a73 3335 return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3336}
3337EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
3338
a0b66a73 3339bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset)
143b65d6 3340{
a0b66a73 3341 if (offset >= gc->ngpio)
143b65d6
LW
3342 return false;
3343
a0b66a73 3344 return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3345}
3346EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
3347
a0b66a73 3348bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset)
05f479bf 3349{
a0b66a73 3350 if (offset >= gc->ngpio)
05f479bf
CK
3351 return false;
3352
a0b66a73 3353 return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags);
05f479bf
CK
3354}
3355EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
3356
79a9becd
AC
3357/**
3358 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
3359 * @desc: gpio whose value will be returned
3360 *
3361 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3362 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd
AC
3363 *
3364 * This function is to be called from contexts that can sleep.
d2876d08 3365 */
79a9becd 3366int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
d2876d08 3367{
d2876d08 3368 might_sleep_if(extra_checks);
fdeb8e15 3369 VALIDATE_DESC(desc);
fac9d885 3370 return gpiod_get_raw_value_commit(desc);
d2876d08 3371}
79a9becd 3372EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
372e722e 3373
79a9becd
AC
3374/**
3375 * gpiod_get_value_cansleep() - return a gpio's value
3376 * @desc: gpio whose value will be returned
3377 *
3378 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3379 * account, or negative errno on failure.
79a9becd
AC
3380 *
3381 * This function is to be called from contexts that can sleep.
3382 */
3383int gpiod_get_value_cansleep(const struct gpio_desc *desc)
d2876d08 3384{
3f397c21 3385 int value;
d2876d08
DB
3386
3387 might_sleep_if(extra_checks);
fdeb8e15 3388 VALIDATE_DESC(desc);
fac9d885 3389 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3390 if (value < 0)
3391 return value;
3392
79a9becd
AC
3393 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3394 value = !value;
3395
3f397c21 3396 return value;
d2876d08 3397}
79a9becd 3398EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
372e722e 3399
eec1d566
LW
3400/**
3401 * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
b9762beb 3402 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3403 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3404 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3405 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3406 *
3407 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3408 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3409 * else an error code.
3410 *
3411 * This function is to be called from contexts that can sleep.
3412 */
3413int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
3414 struct gpio_desc **desc_array,
77588c14 3415 struct gpio_array *array_info,
b9762beb 3416 unsigned long *value_bitmap)
eec1d566
LW
3417{
3418 might_sleep_if(extra_checks);
3419 if (!desc_array)
3420 return -EINVAL;
3421 return gpiod_get_array_value_complex(true, true, array_size,
77588c14
JK
3422 desc_array, array_info,
3423 value_bitmap);
eec1d566
LW
3424}
3425EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
3426
3427/**
3428 * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
b9762beb 3429 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3430 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3431 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3432 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3433 *
3434 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3435 * into account. Return 0 in case of success, else an error code.
3436 *
3437 * This function is to be called from contexts that can sleep.
3438 */
3439int gpiod_get_array_value_cansleep(unsigned int array_size,
3440 struct gpio_desc **desc_array,
77588c14 3441 struct gpio_array *array_info,
b9762beb 3442 unsigned long *value_bitmap)
eec1d566
LW
3443{
3444 might_sleep_if(extra_checks);
3445 if (!desc_array)
3446 return -EINVAL;
3447 return gpiod_get_array_value_complex(false, true, array_size,
77588c14
JK
3448 desc_array, array_info,
3449 value_bitmap);
eec1d566
LW
3450}
3451EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
3452
79a9becd
AC
3453/**
3454 * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
3455 * @desc: gpio whose value will be assigned
3456 * @value: value to assign
3457 *
3458 * Set the raw value of the GPIO, i.e. the value of its physical line without
3459 * regard for its ACTIVE_LOW status.
3460 *
3461 * This function is to be called from contexts that can sleep.
3462 */
3463void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
372e722e 3464{
d2876d08 3465 might_sleep_if(extra_checks);
fdeb8e15 3466 VALIDATE_DESC_VOID(desc);
fac9d885 3467 gpiod_set_raw_value_commit(desc, value);
372e722e 3468}
79a9becd 3469EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
d2876d08 3470
79a9becd
AC
3471/**
3472 * gpiod_set_value_cansleep() - assign a gpio's value
3473 * @desc: gpio whose value will be assigned
3474 * @value: value to assign
3475 *
3476 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
3477 * account
3478 *
3479 * This function is to be called from contexts that can sleep.
3480 */
3481void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
d2876d08 3482{
d2876d08 3483 might_sleep_if(extra_checks);
fdeb8e15 3484 VALIDATE_DESC_VOID(desc);
1e77fc82 3485 gpiod_set_value_nocheck(desc, value);
372e722e 3486}
79a9becd 3487EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
d2876d08 3488
5f424243 3489/**
3fff99bc 3490 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3491 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3492 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3493 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3494 * @value_bitmap: bitmap of values to assign
5f424243
RI
3495 *
3496 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3497 * without regard for their ACTIVE_LOW status.
3498 *
3499 * This function is to be called from contexts that can sleep.
3500 */
3027743f 3501int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3c940660
GU
3502 struct gpio_desc **desc_array,
3503 struct gpio_array *array_info,
3504 unsigned long *value_bitmap)
5f424243
RI
3505{
3506 might_sleep_if(extra_checks);
3507 if (!desc_array)
3027743f
LA
3508 return -EINVAL;
3509 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
77588c14 3510 array_info, value_bitmap);
5f424243 3511}
3fff99bc 3512EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
5f424243 3513
3946d187
DT
3514/**
3515 * gpiod_add_lookup_tables() - register GPIO device consumers
3516 * @tables: list of tables of consumers to register
3517 * @n: number of tables in the list
3518 */
3519void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
3520{
3521 unsigned int i;
3522
3523 mutex_lock(&gpio_lookup_lock);
3524
3525 for (i = 0; i < n; i++)
3526 list_add_tail(&tables[i]->list, &gpio_lookup_list);
3527
3528 mutex_unlock(&gpio_lookup_lock);
3529}
3530
5f424243 3531/**
3fff99bc 3532 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3533 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3534 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3535 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3536 * @value_bitmap: bitmap of values to assign
5f424243
RI
3537 *
3538 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3539 * into account.
3540 *
3541 * This function is to be called from contexts that can sleep.
3542 */
cf9af0d5
GU
3543int gpiod_set_array_value_cansleep(unsigned int array_size,
3544 struct gpio_desc **desc_array,
3545 struct gpio_array *array_info,
3546 unsigned long *value_bitmap)
5f424243
RI
3547{
3548 might_sleep_if(extra_checks);
3549 if (!desc_array)
cf9af0d5
GU
3550 return -EINVAL;
3551 return gpiod_set_array_value_complex(false, true, array_size,
3552 desc_array, array_info,
3553 value_bitmap);
5f424243 3554}
3fff99bc 3555EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
5f424243 3556
bae48da2 3557/**
ad824783
AC
3558 * gpiod_add_lookup_table() - register GPIO device consumers
3559 * @table: table of consumers to register
bae48da2 3560 */
ad824783 3561void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
bae48da2
AC
3562{
3563 mutex_lock(&gpio_lookup_lock);
3564
ad824783 3565 list_add_tail(&table->list, &gpio_lookup_list);
bae48da2
AC
3566
3567 mutex_unlock(&gpio_lookup_lock);
3568}
226b2242 3569EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
bae48da2 3570
be9015ab
SK
3571/**
3572 * gpiod_remove_lookup_table() - unregister GPIO device consumers
3573 * @table: table of consumers to unregister
3574 */
3575void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
3576{
3577 mutex_lock(&gpio_lookup_lock);
3578
3579 list_del(&table->list);
3580
3581 mutex_unlock(&gpio_lookup_lock);
3582}
226b2242 3583EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
be9015ab 3584
a411e81e
BG
3585/**
3586 * gpiod_add_hogs() - register a set of GPIO hogs from machine code
3587 * @hogs: table of gpio hog entries with a zeroed sentinel at the end
3588 */
3589void gpiod_add_hogs(struct gpiod_hog *hogs)
3590{
a0b66a73 3591 struct gpio_chip *gc;
a411e81e
BG
3592 struct gpiod_hog *hog;
3593
3594 mutex_lock(&gpio_machine_hogs_mutex);
3595
3596 for (hog = &hogs[0]; hog->chip_label; hog++) {
3597 list_add_tail(&hog->list, &gpio_machine_hogs);
3598
3599 /*
3600 * The chip may have been registered earlier, so check if it
3601 * exists and, if so, try to hog the line now.
3602 */
a0b66a73
LW
3603 gc = find_chip_by_name(hog->chip_label);
3604 if (gc)
3605 gpiochip_machine_hog(gc, hog);
a411e81e
BG
3606 }
3607
3608 mutex_unlock(&gpio_machine_hogs_mutex);
3609}
3610EXPORT_SYMBOL_GPL(gpiod_add_hogs);
3611
ad824783 3612static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
bae48da2
AC
3613{
3614 const char *dev_id = dev ? dev_name(dev) : NULL;
ad824783 3615 struct gpiod_lookup_table *table;
bae48da2
AC
3616
3617 mutex_lock(&gpio_lookup_lock);
3618
ad824783
AC
3619 list_for_each_entry(table, &gpio_lookup_list, list) {
3620 if (table->dev_id && dev_id) {
3621 /*
3622 * Valid strings on both ends, must be identical to have
3623 * a match
3624 */
3625 if (!strcmp(table->dev_id, dev_id))
3626 goto found;
3627 } else {
3628 /*
3629 * One of the pointers is NULL, so both must be to have
3630 * a match
3631 */
3632 if (dev_id == table->dev_id)
3633 goto found;
3634 }
3635 }
3636 table = NULL;
bae48da2 3637
ad824783
AC
3638found:
3639 mutex_unlock(&gpio_lookup_lock);
3640 return table;
3641}
bae48da2 3642
ad824783 3643static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
fed7026a 3644 unsigned int idx, unsigned long *flags)
ad824783 3645{
2a3cf6a3 3646 struct gpio_desc *desc = ERR_PTR(-ENOENT);
ad824783
AC
3647 struct gpiod_lookup_table *table;
3648 struct gpiod_lookup *p;
bae48da2 3649
ad824783
AC
3650 table = gpiod_find_lookup_table(dev);
3651 if (!table)
3652 return desc;
bae48da2 3653
4c033b54 3654 for (p = &table->table[0]; p->key; p++) {
a0b66a73 3655 struct gpio_chip *gc;
bae48da2 3656
ad824783 3657 /* idx must always match exactly */
bae48da2
AC
3658 if (p->idx != idx)
3659 continue;
3660
ad824783
AC
3661 /* If the lookup entry has a con_id, require exact match */
3662 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
3663 continue;
bae48da2 3664
4c033b54
GU
3665 if (p->chip_hwnum == U16_MAX) {
3666 desc = gpio_name_to_desc(p->key);
3667 if (desc) {
3668 *flags = p->flags;
3669 return desc;
3670 }
3671
3672 dev_warn(dev, "cannot find GPIO line %s, deferring\n",
3673 p->key);
3674 return ERR_PTR(-EPROBE_DEFER);
3675 }
3676
3677 gc = find_chip_by_name(p->key);
bae48da2 3678
a0b66a73 3679 if (!gc) {
8853daf3
JK
3680 /*
3681 * As the lookup table indicates a chip with
4c033b54 3682 * p->key should exist, assume it may
8853daf3
JK
3683 * still appear later and let the interested
3684 * consumer be probed again or let the Deferred
3685 * Probe infrastructure handle the error.
3686 */
3687 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
4c033b54 3688 p->key);
8853daf3 3689 return ERR_PTR(-EPROBE_DEFER);
ad824783 3690 }
bae48da2 3691
a0b66a73 3692 if (gc->ngpio <= p->chip_hwnum) {
2a3cf6a3 3693 dev_err(dev,
d935bd50 3694 "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n",
a0b66a73
LW
3695 idx, p->chip_hwnum, gc->ngpio - 1,
3696 gc->label);
2a3cf6a3 3697 return ERR_PTR(-EINVAL);
bae48da2 3698 }
bae48da2 3699
a0b66a73 3700 desc = gpiochip_get_desc(gc, p->chip_hwnum);
ad824783 3701 *flags = p->flags;
bae48da2 3702
2a3cf6a3 3703 return desc;
bae48da2
AC
3704 }
3705
bae48da2
AC
3706 return desc;
3707}
3708
66858527
RI
3709static int platform_gpio_count(struct device *dev, const char *con_id)
3710{
3711 struct gpiod_lookup_table *table;
3712 struct gpiod_lookup *p;
3713 unsigned int count = 0;
3714
3715 table = gpiod_find_lookup_table(dev);
3716 if (!table)
3717 return -ENOENT;
3718
4c033b54 3719 for (p = &table->table[0]; p->key; p++) {
66858527
RI
3720 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
3721 (!con_id && !p->con_id))
3722 count++;
3723 }
3724 if (!count)
3725 return -ENOENT;
3726
3727 return count;
3728}
3729
13949fa9
DT
3730/**
3731 * fwnode_gpiod_get_index - obtain a GPIO from firmware node
3732 * @fwnode: handle of the firmware node
3733 * @con_id: function within the GPIO consumer
3734 * @index: index of the GPIO to obtain for the consumer
3735 * @flags: GPIO initialization flags
3736 * @label: label to attach to the requested GPIO
3737 *
3738 * This function can be used for drivers that get their configuration
3739 * from opaque firmware.
3740 *
3741 * The function properly finds the corresponding GPIO using whatever is the
3742 * underlying firmware interface and then makes sure that the GPIO
3743 * descriptor is requested before it is returned to the caller.
3744 *
3745 * Returns:
3746 * On successful request the GPIO pin is configured in accordance with
3747 * provided @flags.
3748 *
3749 * In case of error an ERR_PTR() is returned.
3750 */
3751struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
3752 const char *con_id, int index,
3753 enum gpiod_flags flags,
3754 const char *label)
3755{
3756 struct gpio_desc *desc;
3757 char prop_name[32]; /* 32 is max size of property name */
3758 unsigned int i;
3759
3760 for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) {
3761 if (con_id)
3762 snprintf(prop_name, sizeof(prop_name), "%s-%s",
3763 con_id, gpio_suffixes[i]);
3764 else
3765 snprintf(prop_name, sizeof(prop_name), "%s",
3766 gpio_suffixes[i]);
3767
3768 desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags,
3769 label);
7b58696d 3770 if (!gpiod_not_found(desc))
13949fa9
DT
3771 break;
3772 }
3773
3774 return desc;
3775}
3776EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
3777
66858527
RI
3778/**
3779 * gpiod_count - return the number of GPIOs associated with a device / function
3780 * or -ENOENT if no GPIO has been assigned to the requested function
3781 * @dev: GPIO consumer, can be NULL for system-global GPIOs
3782 * @con_id: function within the GPIO consumer
3783 */
3784int gpiod_count(struct device *dev, const char *con_id)
3785{
3786 int count = -ENOENT;
3787
3788 if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node)
f626d6df 3789 count = of_gpio_get_count(dev, con_id);
66858527
RI
3790 else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev))
3791 count = acpi_gpio_count(dev, con_id);
3792
3793 if (count < 0)
3794 count = platform_gpio_count(dev, con_id);
3795
3796 return count;
3797}
3798EXPORT_SYMBOL_GPL(gpiod_count);
3799
bae48da2 3800/**
0879162f 3801 * gpiod_get - obtain a GPIO for a given GPIO function
ad824783 3802 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2 3803 * @con_id: function within the GPIO consumer
39b2bbe3 3804 * @flags: optional GPIO initialization flags
bae48da2
AC
3805 *
3806 * Return the GPIO descriptor corresponding to the function con_id of device
2a3cf6a3 3807 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
20a8a968 3808 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
bae48da2 3809 */
b17d1bf1 3810struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
39b2bbe3 3811 enum gpiod_flags flags)
bae48da2 3812{
39b2bbe3 3813 return gpiod_get_index(dev, con_id, 0, flags);
bae48da2 3814}
b17d1bf1 3815EXPORT_SYMBOL_GPL(gpiod_get);
bae48da2 3816
29a1f233
TR
3817/**
3818 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
3819 * @dev: GPIO consumer, can be NULL for system-global GPIOs
3820 * @con_id: function within the GPIO consumer
39b2bbe3 3821 * @flags: optional GPIO initialization flags
29a1f233
TR
3822 *
3823 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
3824 * the requested function it will return NULL. This is convenient for drivers
3825 * that need to handle optional GPIOs.
3826 */
b17d1bf1 3827struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
39b2bbe3
AC
3828 const char *con_id,
3829 enum gpiod_flags flags)
29a1f233 3830{
39b2bbe3 3831 return gpiod_get_index_optional(dev, con_id, 0, flags);
29a1f233 3832}
b17d1bf1 3833EXPORT_SYMBOL_GPL(gpiod_get_optional);
29a1f233 3834
f625d460
BP
3835
3836/**
3837 * gpiod_configure_flags - helper function to configure a given GPIO
3838 * @desc: gpio whose value will be assigned
3839 * @con_id: function within the GPIO consumer
fed7026a
AS
3840 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
3841 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
3842 * @dflags: gpiod_flags - optional GPIO initialization flags
3843 *
3844 * Return 0 on success, -ENOENT if no GPIO has been assigned to the
3845 * requested function and/or index, or another IS_ERR() code if an error
3846 * occurred while trying to acquire the GPIO.
3847 */
c29fd9eb 3848int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
85b03b30 3849 unsigned long lflags, enum gpiod_flags dflags)
f625d460 3850{
d377f56f 3851 int ret;
f625d460 3852
85b03b30
JH
3853 if (lflags & GPIO_ACTIVE_LOW)
3854 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
f926dfc1 3855
85b03b30
JH
3856 if (lflags & GPIO_OPEN_DRAIN)
3857 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
f926dfc1
LW
3858 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
3859 /*
3860 * This enforces open drain mode from the consumer side.
3861 * This is necessary for some busses like I2C, but the lookup
3862 * should *REALLY* have specified them as open drain in the
3863 * first place, so print a little warning here.
3864 */
3865 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
3866 gpiod_warn(desc,
3867 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
3868 }
3869
85b03b30
JH
3870 if (lflags & GPIO_OPEN_SOURCE)
3871 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
e10f72bf 3872
d449991c
TP
3873 if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) {
3874 gpiod_err(desc,
3875 "both pull-up and pull-down enabled, invalid configuration\n");
3876 return -EINVAL;
3877 }
3878
3879 if (lflags & GPIO_PULL_UP)
3880 set_bit(FLAG_PULL_UP, &desc->flags);
3881 else if (lflags & GPIO_PULL_DOWN)
3882 set_bit(FLAG_PULL_DOWN, &desc->flags);
3883
d377f56f
LW
3884 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
3885 if (ret < 0)
3886 return ret;
85b03b30 3887
f625d460
BP
3888 /* No particular flag request, return here... */
3889 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
262b9011 3890 gpiod_dbg(desc, "no flags found for %s\n", con_id);
f625d460
BP
3891 return 0;
3892 }
3893
3894 /* Process flags */
3895 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
d377f56f 3896 ret = gpiod_direction_output(desc,
ad17731d 3897 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
f625d460 3898 else
d377f56f 3899 ret = gpiod_direction_input(desc);
f625d460 3900
d377f56f 3901 return ret;
f625d460
BP
3902}
3903
bae48da2
AC
3904/**
3905 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
fdd6a5fe 3906 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2
AC
3907 * @con_id: function within the GPIO consumer
3908 * @idx: index of the GPIO to obtain in the consumer
39b2bbe3 3909 * @flags: optional GPIO initialization flags
bae48da2
AC
3910 *
3911 * This variant of gpiod_get() allows to access GPIOs other than the first
3912 * defined one for functions that define several GPIOs.
3913 *
2a3cf6a3
AC
3914 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
3915 * requested function and/or index, or another IS_ERR() code if an error
20a8a968 3916 * occurred while trying to acquire the GPIO.
bae48da2 3917 */
b17d1bf1 3918struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
bae48da2 3919 const char *con_id,
39b2bbe3
AC
3920 unsigned int idx,
3921 enum gpiod_flags flags)
bae48da2 3922{
2d6c06f5 3923 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
35c5d7fd 3924 struct gpio_desc *desc = NULL;
d377f56f 3925 int ret;
7d18f0a1
LW
3926 /* Maybe we have a device name, maybe not */
3927 const char *devname = dev ? dev_name(dev) : "?";
bae48da2
AC
3928
3929 dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id);
3930
4d8440b9
RW
3931 if (dev) {
3932 /* Using device tree? */
3933 if (IS_ENABLED(CONFIG_OF) && dev->of_node) {
3934 dev_dbg(dev, "using device tree for GPIO lookup\n");
3935 desc = of_find_gpio(dev, con_id, idx, &lookupflags);
3936 } else if (ACPI_COMPANION(dev)) {
3937 dev_dbg(dev, "using ACPI for GPIO lookup\n");
a31f5c3a 3938 desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags);
4d8440b9 3939 }
35c5d7fd
AC
3940 }
3941
3942 /*
3943 * Either we are not using DT or ACPI, or their lookup did not return
3944 * a result. In that case, use platform lookup as a fallback.
3945 */
7b58696d 3946 if (!desc || gpiod_not_found(desc)) {
43a8785a 3947 dev_dbg(dev, "using lookup tables for GPIO lookup\n");
39b2bbe3 3948 desc = gpiod_find(dev, con_id, idx, &lookupflags);
bae48da2
AC
3949 }
3950
3951 if (IS_ERR(desc)) {
9d5a1f2c 3952 dev_dbg(dev, "No GPIO consumer %s found\n", con_id);
bae48da2
AC
3953 return desc;
3954 }
3955
7d18f0a1
LW
3956 /*
3957 * If a connection label was passed use that, else attempt to use
3958 * the device name as label
3959 */
d377f56f
LW
3960 ret = gpiod_request(desc, con_id ? con_id : devname);
3961 if (ret < 0) {
3962 if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) {
b0ce7b29
LW
3963 /*
3964 * This happens when there are several consumers for
3965 * the same GPIO line: we just return here without
3966 * further initialization. It is a bit if a hack.
3967 * This is necessary to support fixed regulators.
3968 *
3969 * FIXME: Make this more sane and safe.
3970 */
3971 dev_info(dev, "nonexclusive access to GPIO for %s\n",
3972 con_id ? con_id : devname);
3973 return desc;
3974 } else {
d377f56f 3975 return ERR_PTR(ret);
b0ce7b29
LW
3976 }
3977 }
bae48da2 3978
d377f56f 3979 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
6392cca4 3980 if (ret < 0) {
39b2bbe3 3981 dev_dbg(dev, "setup of GPIO %s failed\n", con_id);
6392cca4
LW
3982 gpiod_put(desc);
3983 return ERR_PTR(ret);
3984 }
3985
6accc376
KG
3986 blocking_notifier_call_chain(&desc->gdev->notifier,
3987 GPIOLINE_CHANGED_REQUESTED, desc);
9fefca77 3988
6392cca4
LW
3989 return desc;
3990}
b17d1bf1 3991EXPORT_SYMBOL_GPL(gpiod_get_index);
6392cca4 3992
40b73183
MW
3993/**
3994 * fwnode_get_named_gpiod - obtain a GPIO from firmware node
3995 * @fwnode: handle of the firmware node
3996 * @propname: name of the firmware property representing the GPIO
6392cca4 3997 * @index: index of the GPIO to obtain for the consumer
a264d10f 3998 * @dflags: GPIO initialization flags
950d55f5 3999 * @label: label to attach to the requested GPIO
40b73183
MW
4000 *
4001 * This function can be used for drivers that get their configuration
6392cca4 4002 * from opaque firmware.
40b73183 4003 *
6392cca4 4004 * The function properly finds the corresponding GPIO using whatever is the
40b73183
MW
4005 * underlying firmware interface and then makes sure that the GPIO
4006 * descriptor is requested before it is returned to the caller.
4007 *
950d55f5 4008 * Returns:
ff21378a 4009 * On successful request the GPIO pin is configured in accordance with
a264d10f
AS
4010 * provided @dflags.
4011 *
40b73183
MW
4012 * In case of error an ERR_PTR() is returned.
4013 */
4014struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
537b94da 4015 const char *propname, int index,
b2987d74
AS
4016 enum gpiod_flags dflags,
4017 const char *label)
40b73183 4018{
2d6c06f5 4019 unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT;
40b73183 4020 struct gpio_desc *desc = ERR_PTR(-ENODEV);
40b73183
MW
4021 int ret;
4022
4023 if (!fwnode)
4024 return ERR_PTR(-EINVAL);
4025
4026 if (is_of_node(fwnode)) {
6392cca4
LW
4027 desc = gpiod_get_from_of_node(to_of_node(fwnode),
4028 propname, index,
4029 dflags,
4030 label);
4031 return desc;
40b73183
MW
4032 } else if (is_acpi_node(fwnode)) {
4033 struct acpi_gpio_info info;
4034
537b94da 4035 desc = acpi_node_get_gpiod(fwnode, propname, index, &info);
6392cca4
LW
4036 if (IS_ERR(desc))
4037 return desc;
40b73183 4038
6392cca4 4039 acpi_gpio_update_gpiod_flags(&dflags, &info);
606be344 4040 acpi_gpio_update_gpiod_lookup_flags(&lflags, &info);
6392cca4 4041 }
40b73183 4042
6392cca4 4043 /* Currently only ACPI takes this path */
b2987d74 4044 ret = gpiod_request(desc, label);
85b03b30
JH
4045 if (ret)
4046 return ERR_PTR(ret);
4047
a264d10f
AS
4048 ret = gpiod_configure_flags(desc, propname, lflags, dflags);
4049 if (ret < 0) {
4050 gpiod_put(desc);
4051 return ERR_PTR(ret);
90b665f6
LP
4052 }
4053
6accc376
KG
4054 blocking_notifier_call_chain(&desc->gdev->notifier,
4055 GPIOLINE_CHANGED_REQUESTED, desc);
9fefca77 4056
40b73183
MW
4057 return desc;
4058}
4059EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod);
4060
29a1f233
TR
4061/**
4062 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
4063 * function
4064 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4065 * @con_id: function within the GPIO consumer
4066 * @index: index of the GPIO to obtain in the consumer
39b2bbe3 4067 * @flags: optional GPIO initialization flags
29a1f233
TR
4068 *
4069 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
4070 * specified index was assigned to the requested function it will return NULL.
4071 * This is convenient for drivers that need to handle optional GPIOs.
4072 */
b17d1bf1 4073struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
29a1f233 4074 const char *con_id,
39b2bbe3
AC
4075 unsigned int index,
4076 enum gpiod_flags flags)
29a1f233
TR
4077{
4078 struct gpio_desc *desc;
4079
39b2bbe3 4080 desc = gpiod_get_index(dev, con_id, index, flags);
7b58696d
AS
4081 if (gpiod_not_found(desc))
4082 return NULL;
29a1f233
TR
4083
4084 return desc;
4085}
b17d1bf1 4086EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
29a1f233 4087
f625d460
BP
4088/**
4089 * gpiod_hog - Hog the specified GPIO desc given the provided flags
4090 * @desc: gpio whose value will be assigned
4091 * @name: gpio line name
fed7026a
AS
4092 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4093 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4094 * @dflags: gpiod_flags - optional GPIO initialization flags
4095 */
4096int gpiod_hog(struct gpio_desc *desc, const char *name,
4097 unsigned long lflags, enum gpiod_flags dflags)
4098{
a0b66a73 4099 struct gpio_chip *gc;
f625d460
BP
4100 struct gpio_desc *local_desc;
4101 int hwnum;
d377f56f 4102 int ret;
f625d460 4103
a0b66a73 4104 gc = gpiod_to_chip(desc);
f625d460
BP
4105 hwnum = gpio_chip_hwgpio(desc);
4106
a0b66a73 4107 local_desc = gpiochip_request_own_desc(gc, hwnum, name,
5923ea6c 4108 lflags, dflags);
f625d460 4109 if (IS_ERR(local_desc)) {
d377f56f 4110 ret = PTR_ERR(local_desc);
c31a571d 4111 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
a0b66a73 4112 name, gc->label, hwnum, ret);
d377f56f 4113 return ret;
f625d460
BP
4114 }
4115
f625d460
BP
4116 /* Mark GPIO as hogged so it can be identified and removed later */
4117 set_bit(FLAG_IS_HOGGED, &desc->flags);
4118
262b9011 4119 gpiod_info(desc, "hogged as %s%s\n",
b27f300f
BG
4120 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
4121 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
4122 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
f625d460
BP
4123
4124 return 0;
4125}
4126
4127/**
4128 * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
a0b66a73 4129 * @gc: gpio chip to act on
f625d460 4130 */
a0b66a73 4131static void gpiochip_free_hogs(struct gpio_chip *gc)
f625d460
BP
4132{
4133 int id;
4134
a0b66a73
LW
4135 for (id = 0; id < gc->ngpio; id++) {
4136 if (test_bit(FLAG_IS_HOGGED, &gc->gpiodev->descs[id].flags))
4137 gpiochip_free_own_desc(&gc->gpiodev->descs[id]);
f625d460
BP
4138 }
4139}
4140
66858527
RI
4141/**
4142 * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
4143 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4144 * @con_id: function within the GPIO consumer
4145 * @flags: optional GPIO initialization flags
4146 *
4147 * This function acquires all the GPIOs defined under a given function.
4148 *
4149 * Return a struct gpio_descs containing an array of descriptors, -ENOENT if
4150 * no GPIO has been assigned to the requested function, or another IS_ERR()
4151 * code if an error occurred while trying to acquire the GPIOs.
4152 */
4153struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
4154 const char *con_id,
4155 enum gpiod_flags flags)
4156{
4157 struct gpio_desc *desc;
4158 struct gpio_descs *descs;
bf9346f5 4159 struct gpio_array *array_info = NULL;
a0b66a73 4160 struct gpio_chip *gc;
bf9346f5 4161 int count, bitmap_size;
66858527
RI
4162
4163 count = gpiod_count(dev, con_id);
4164 if (count < 0)
4165 return ERR_PTR(count);
4166
acafe7e3 4167 descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL);
66858527
RI
4168 if (!descs)
4169 return ERR_PTR(-ENOMEM);
4170
4171 for (descs->ndescs = 0; descs->ndescs < count; ) {
4172 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
4173 if (IS_ERR(desc)) {
4174 gpiod_put_array(descs);
4175 return ERR_CAST(desc);
4176 }
bf9346f5 4177
66858527 4178 descs->desc[descs->ndescs] = desc;
bf9346f5 4179
a0b66a73 4180 gc = gpiod_to_chip(desc);
bf9346f5 4181 /*
c4c958aa
JK
4182 * If pin hardware number of array member 0 is also 0, select
4183 * its chip as a candidate for fast bitmap processing path.
bf9346f5 4184 */
c4c958aa 4185 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
bf9346f5
JK
4186 struct gpio_descs *array;
4187
a0b66a73
LW
4188 bitmap_size = BITS_TO_LONGS(gc->ngpio > count ?
4189 gc->ngpio : count);
bf9346f5
JK
4190
4191 array = kzalloc(struct_size(descs, desc, count) +
4192 struct_size(array_info, invert_mask,
4193 3 * bitmap_size), GFP_KERNEL);
4194 if (!array) {
4195 gpiod_put_array(descs);
4196 return ERR_PTR(-ENOMEM);
4197 }
4198
4199 memcpy(array, descs,
4200 struct_size(descs, desc, descs->ndescs + 1));
4201 kfree(descs);
4202
4203 descs = array;
4204 array_info = (void *)(descs->desc + count);
4205 array_info->get_mask = array_info->invert_mask +
4206 bitmap_size;
4207 array_info->set_mask = array_info->get_mask +
4208 bitmap_size;
4209
4210 array_info->desc = descs->desc;
4211 array_info->size = count;
a0b66a73 4212 array_info->chip = gc;
bf9346f5
JK
4213 bitmap_set(array_info->get_mask, descs->ndescs,
4214 count - descs->ndescs);
4215 bitmap_set(array_info->set_mask, descs->ndescs,
4216 count - descs->ndescs);
4217 descs->info = array_info;
4218 }
c4c958aa 4219 /* Unmark array members which don't belong to the 'fast' chip */
a0b66a73 4220 if (array_info && array_info->chip != gc) {
bf9346f5
JK
4221 __clear_bit(descs->ndescs, array_info->get_mask);
4222 __clear_bit(descs->ndescs, array_info->set_mask);
c4c958aa
JK
4223 }
4224 /*
4225 * Detect array members which belong to the 'fast' chip
4226 * but their pins are not in hardware order.
4227 */
4228 else if (array_info &&
4229 gpio_chip_hwgpio(desc) != descs->ndescs) {
4230 /*
4231 * Don't use fast path if all array members processed so
4232 * far belong to the same chip as this one but its pin
4233 * hardware number is different from its array index.
4234 */
4235 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
4236 array_info = NULL;
4237 } else {
4238 __clear_bit(descs->ndescs,
4239 array_info->get_mask);
4240 __clear_bit(descs->ndescs,
4241 array_info->set_mask);
4242 }
bf9346f5
JK
4243 } else if (array_info) {
4244 /* Exclude open drain or open source from fast output */
a0b66a73
LW
4245 if (gpiochip_line_is_open_drain(gc, descs->ndescs) ||
4246 gpiochip_line_is_open_source(gc, descs->ndescs))
bf9346f5
JK
4247 __clear_bit(descs->ndescs,
4248 array_info->set_mask);
4249 /* Identify 'fast' pins which require invertion */
4250 if (gpiod_is_active_low(desc))
4251 __set_bit(descs->ndescs,
4252 array_info->invert_mask);
4253 }
4254
66858527
RI
4255 descs->ndescs++;
4256 }
bf9346f5
JK
4257 if (array_info)
4258 dev_dbg(dev,
4259 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
4260 array_info->chip->label, array_info->size,
4261 *array_info->get_mask, *array_info->set_mask,
4262 *array_info->invert_mask);
66858527
RI
4263 return descs;
4264}
4265EXPORT_SYMBOL_GPL(gpiod_get_array);
4266
4267/**
4268 * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
4269 * function
4270 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4271 * @con_id: function within the GPIO consumer
4272 * @flags: optional GPIO initialization flags
4273 *
4274 * This is equivalent to gpiod_get_array(), except that when no GPIO was
4275 * assigned to the requested function it will return NULL.
4276 */
4277struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
4278 const char *con_id,
4279 enum gpiod_flags flags)
4280{
4281 struct gpio_descs *descs;
4282
4283 descs = gpiod_get_array(dev, con_id, flags);
7b58696d 4284 if (gpiod_not_found(descs))
66858527
RI
4285 return NULL;
4286
4287 return descs;
4288}
4289EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
4290
bae48da2
AC
4291/**
4292 * gpiod_put - dispose of a GPIO descriptor
4293 * @desc: GPIO descriptor to dispose of
4294 *
4295 * No descriptor can be used after gpiod_put() has been called on it.
4296 */
4297void gpiod_put(struct gpio_desc *desc)
4298{
1d7765ba
AS
4299 if (desc)
4300 gpiod_free(desc);
372e722e 4301}
bae48da2 4302EXPORT_SYMBOL_GPL(gpiod_put);
d2876d08 4303
66858527
RI
4304/**
4305 * gpiod_put_array - dispose of multiple GPIO descriptors
4306 * @descs: struct gpio_descs containing an array of descriptors
4307 */
4308void gpiod_put_array(struct gpio_descs *descs)
4309{
4310 unsigned int i;
4311
4312 for (i = 0; i < descs->ndescs; i++)
4313 gpiod_put(descs->desc[i]);
4314
4315 kfree(descs);
4316}
4317EXPORT_SYMBOL_GPL(gpiod_put_array);
4318
3c702e99
LW
4319static int __init gpiolib_dev_init(void)
4320{
4321 int ret;
4322
4323 /* Register GPIO sysfs bus */
b1911710 4324 ret = bus_register(&gpio_bus_type);
3c702e99
LW
4325 if (ret < 0) {
4326 pr_err("gpiolib: could not register GPIO bus type\n");
4327 return ret;
4328 }
4329
ddd8891e 4330 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME);
3c702e99
LW
4331 if (ret < 0) {
4332 pr_err("gpiolib: failed to allocate char dev region\n");
4333 bus_unregister(&gpio_bus_type);
63636d95 4334 return ret;
3c702e99 4335 }
63636d95
GU
4336
4337 gpiolib_initialized = true;
4338 gpiochip_setup_devs();
4339
8650b609
DG
4340#if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO)
4341 WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier));
4342#endif /* CONFIG_OF_DYNAMIC && CONFIG_OF_GPIO */
63636d95 4343
3c702e99
LW
4344 return ret;
4345}
4346core_initcall(gpiolib_dev_init);
4347
d2876d08
DB
4348#ifdef CONFIG_DEBUG_FS
4349
fdeb8e15 4350static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
d2876d08
DB
4351{
4352 unsigned i;
a0b66a73 4353 struct gpio_chip *gc = gdev->chip;
fdeb8e15
LW
4354 unsigned gpio = gdev->base;
4355 struct gpio_desc *gdesc = &gdev->descs[0];
90fd2270
LW
4356 bool is_out;
4357 bool is_irq;
4358 bool active_low;
d2876d08 4359
fdeb8e15 4360 for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) {
ced433e2
MP
4361 if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) {
4362 if (gdesc->name) {
4363 seq_printf(s, " gpio-%-3d (%-20.20s)\n",
4364 gpio, gdesc->name);
4365 }
d2876d08 4366 continue;
ced433e2 4367 }
d2876d08 4368
372e722e 4369 gpiod_get_direction(gdesc);
d2876d08 4370 is_out = test_bit(FLAG_IS_OUT, &gdesc->flags);
d468bf9e 4371 is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags);
90fd2270
LW
4372 active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags);
4373 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s",
ced433e2 4374 gpio, gdesc->name ? gdesc->name : "", gdesc->label,
d2876d08 4375 is_out ? "out" : "in ",
a0b66a73 4376 gc->get ? (gc->get(gc, i) ? "hi" : "lo") : "? ",
90fd2270
LW
4377 is_irq ? "IRQ " : "",
4378 active_low ? "ACTIVE LOW" : "");
d2876d08
DB
4379 seq_printf(s, "\n");
4380 }
4381}
4382
f9c4a31f 4383static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
d2876d08 4384{
362432ae 4385 unsigned long flags;
ff2b1359 4386 struct gpio_device *gdev = NULL;
cb1650d4 4387 loff_t index = *pos;
d2876d08 4388
f9c4a31f 4389 s->private = "";
d2876d08 4390
362432ae 4391 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4392 list_for_each_entry(gdev, &gpio_devices, list)
362432ae
GL
4393 if (index-- == 0) {
4394 spin_unlock_irqrestore(&gpio_lock, flags);
ff2b1359 4395 return gdev;
f9c4a31f 4396 }
362432ae 4397 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f 4398
cb1650d4 4399 return NULL;
f9c4a31f
TR
4400}
4401
4402static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
4403{
362432ae 4404 unsigned long flags;
ff2b1359 4405 struct gpio_device *gdev = v;
f9c4a31f
TR
4406 void *ret = NULL;
4407
362432ae 4408 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4409 if (list_is_last(&gdev->list, &gpio_devices))
cb1650d4
AC
4410 ret = NULL;
4411 else
ff2b1359 4412 ret = list_entry(gdev->list.next, struct gpio_device, list);
362432ae 4413 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f
TR
4414
4415 s->private = "\n";
4416 ++*pos;
4417
4418 return ret;
4419}
4420
4421static void gpiolib_seq_stop(struct seq_file *s, void *v)
4422{
4423}
4424
4425static int gpiolib_seq_show(struct seq_file *s, void *v)
4426{
ff2b1359 4427 struct gpio_device *gdev = v;
a0b66a73 4428 struct gpio_chip *gc = gdev->chip;
ff2b1359
LW
4429 struct device *parent;
4430
a0b66a73 4431 if (!gc) {
ff2b1359
LW
4432 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
4433 dev_name(&gdev->dev));
4434 return 0;
4435 }
f9c4a31f 4436
ff2b1359
LW
4437 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
4438 dev_name(&gdev->dev),
fdeb8e15 4439 gdev->base, gdev->base + gdev->ngpio - 1);
a0b66a73 4440 parent = gc->parent;
ff2b1359
LW
4441 if (parent)
4442 seq_printf(s, ", parent: %s/%s",
4443 parent->bus ? parent->bus->name : "no-bus",
4444 dev_name(parent));
a0b66a73
LW
4445 if (gc->label)
4446 seq_printf(s, ", %s", gc->label);
4447 if (gc->can_sleep)
f9c4a31f
TR
4448 seq_printf(s, ", can sleep");
4449 seq_printf(s, ":\n");
4450
a0b66a73
LW
4451 if (gc->dbg_show)
4452 gc->dbg_show(s, gc);
f9c4a31f 4453 else
fdeb8e15 4454 gpiolib_dbg_show(s, gdev);
f9c4a31f 4455
d2876d08
DB
4456 return 0;
4457}
4458
425c5b3e 4459static const struct seq_operations gpiolib_sops = {
f9c4a31f
TR
4460 .start = gpiolib_seq_start,
4461 .next = gpiolib_seq_next,
4462 .stop = gpiolib_seq_stop,
4463 .show = gpiolib_seq_show,
4464};
425c5b3e 4465DEFINE_SEQ_ATTRIBUTE(gpiolib);
d2876d08
DB
4466
4467static int __init gpiolib_debugfs_init(void)
4468{
4469 /* /sys/kernel/debug/gpio */
425c5b3e 4470 debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops);
d2876d08
DB
4471 return 0;
4472}
4473subsys_initcall(gpiolib_debugfs_init);
4474
4475#endif /* DEBUG_FS */