irqchip: Add RZ/G2L IA55 Interrupt Controller driver
[linux-block.git] / drivers / gpio / gpiolib.c
CommitLineData
dae5f0af 1// SPDX-License-Identifier: GPL-2.0
c47d9e1b 2
923a654c 3#include <linux/bitmap.h>
d2876d08
DB
4#include <linux/kernel.h>
5#include <linux/module.h>
ff77c352 6#include <linux/interrupt.h>
d2876d08
DB
7#include <linux/irq.h>
8#include <linux/spinlock.h>
1a989d0f 9#include <linux/list.h>
d8f388d8
DB
10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/debugfs.h>
13#include <linux/seq_file.h>
14#include <linux/gpio.h>
ff77c352 15#include <linux/idr.h>
5a0e3ad6 16#include <linux/slab.h>
7b199811 17#include <linux/acpi.h>
53e7cac3 18#include <linux/gpio/driver.h>
0a6d3158 19#include <linux/gpio/machine.h>
c771c2f4 20#include <linux/pinctrl/consumer.h>
3c702e99 21#include <linux/fs.h>
8b92e17e 22#include <linux/compat.h>
953b956a 23#include <linux/file.h>
3c702e99 24#include <uapi/linux/gpio.h>
d2876d08 25
664e3e5a 26#include "gpiolib.h"
f626d6df 27#include "gpiolib-of.h"
77cb907a 28#include "gpiolib-acpi.h"
925ca369 29#include "gpiolib-cdev.h"
ef087d8e 30#include "gpiolib-sysfs.h"
664e3e5a 31
3f397c21
UKK
32#define CREATE_TRACE_POINTS
33#include <trace/events/gpio.h>
d2876d08 34
79a9becd 35/* Implementation infrastructure for GPIO interfaces.
d2876d08 36 *
79a9becd
AC
37 * The GPIO programming interface allows for inlining speed-critical
38 * get/set operations for common cases, so that access to SOC-integrated
39 * GPIOs can sometimes cost only an instruction or two per bit.
d2876d08
DB
40 */
41
42
43/* When debugging, extend minimal trust to callers and platform code.
44 * Also emit diagnostic messages that may help initial bringup, when
45 * board setup or driver bugs are most common.
46 *
47 * Otherwise, minimize overhead in what may be bitbanging codepaths.
48 */
49#ifdef DEBUG
50#define extra_checks 1
51#else
52#define extra_checks 0
53#endif
54
ff2b1359
LW
55/* Device and char device-related information */
56static DEFINE_IDA(gpio_ida);
3c702e99
LW
57static dev_t gpio_devt;
58#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
ced2af41 59static int gpio_bus_match(struct device *dev, struct device_driver *drv);
3c702e99
LW
60static struct bus_type gpio_bus_type = {
61 .name = "gpio",
ced2af41 62 .match = gpio_bus_match,
3c702e99 63};
ff2b1359 64
3027743f
LA
65/*
66 * Number of GPIOs to use for the fast path in set array
67 */
68#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
69
d2876d08
DB
70/* gpio_lock prevents conflicts during gpio_desc[] table updates.
71 * While any GPIO is requested, its gpio_chip is not removable;
72 * each GPIO's "requested" flag serves as a lock and refcount.
73 */
0eb4c6c2 74DEFINE_SPINLOCK(gpio_lock);
d2876d08 75
bae48da2
AC
76static DEFINE_MUTEX(gpio_lookup_lock);
77static LIST_HEAD(gpio_lookup_list);
ff2b1359 78LIST_HEAD(gpio_devices);
6d86750c 79
a411e81e
BG
80static DEFINE_MUTEX(gpio_machine_hogs_mutex);
81static LIST_HEAD(gpio_machine_hogs);
82
a0b66a73
LW
83static void gpiochip_free_hogs(struct gpio_chip *gc);
84static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
85 struct lock_class_key *lock_key,
86 struct lock_class_key *request_key);
a0b66a73
LW
87static void gpiochip_irqchip_remove(struct gpio_chip *gc);
88static int gpiochip_irqchip_init_hw(struct gpio_chip *gc);
89static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc);
90static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc);
6d86750c 91
159f3cd9 92static bool gpiolib_initialized;
6d86750c 93
d2876d08
DB
94static inline void desc_set_label(struct gpio_desc *d, const char *label)
95{
d2876d08 96 d->label = label;
d2876d08
DB
97}
98
372e722e 99/**
950d55f5
TR
100 * gpio_to_desc - Convert a GPIO number to its descriptor
101 * @gpio: global GPIO number
102 *
103 * Returns:
104 * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
105 * with the given number exists in the system.
372e722e 106 */
79a9becd 107struct gpio_desc *gpio_to_desc(unsigned gpio)
372e722e 108{
ff2b1359 109 struct gpio_device *gdev;
14e85c0e
AC
110 unsigned long flags;
111
112 spin_lock_irqsave(&gpio_lock, flags);
113
ff2b1359 114 list_for_each_entry(gdev, &gpio_devices, list) {
fdeb8e15
LW
115 if (gdev->base <= gpio &&
116 gdev->base + gdev->ngpio > gpio) {
14e85c0e 117 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 118 return &gdev->descs[gpio - gdev->base];
14e85c0e
AC
119 }
120 }
121
122 spin_unlock_irqrestore(&gpio_lock, flags);
123
0e9a5edf 124 if (!gpio_is_valid(gpio))
c47d9e1b 125 pr_warn("invalid GPIO %d\n", gpio);
0e9a5edf 126
14e85c0e 127 return NULL;
372e722e 128}
79a9becd 129EXPORT_SYMBOL_GPL(gpio_to_desc);
372e722e 130
d468bf9e 131/**
950d55f5
TR
132 * gpiochip_get_desc - get the GPIO descriptor corresponding to the given
133 * hardware number for this chip
a0b66a73 134 * @gc: GPIO chip
950d55f5
TR
135 * @hwnum: hardware number of the GPIO for this chip
136 *
137 * Returns:
35c6cfb4 138 * A pointer to the GPIO descriptor or ``ERR_PTR(-EINVAL)`` if no GPIO exists
950d55f5 139 * in the given chip for the specified hardware number.
d468bf9e 140 */
a0b66a73 141struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc,
06863620 142 unsigned int hwnum)
d468bf9e 143{
a0b66a73 144 struct gpio_device *gdev = gc->gpiodev;
fdeb8e15
LW
145
146 if (hwnum >= gdev->ngpio)
b7d0a28a 147 return ERR_PTR(-EINVAL);
d468bf9e 148
fdeb8e15 149 return &gdev->descs[hwnum];
d468bf9e 150}
97795420 151EXPORT_SYMBOL_GPL(gpiochip_get_desc);
372e722e
AC
152
153/**
950d55f5
TR
154 * desc_to_gpio - convert a GPIO descriptor to the integer namespace
155 * @desc: GPIO descriptor
156 *
372e722e 157 * This should disappear in the future but is needed since we still
950d55f5
TR
158 * use GPIO numbers for error messages and sysfs nodes.
159 *
160 * Returns:
161 * The global GPIO number for the GPIO specified by its descriptor.
372e722e 162 */
79a9becd 163int desc_to_gpio(const struct gpio_desc *desc)
372e722e 164{
fdeb8e15 165 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
372e722e 166}
79a9becd 167EXPORT_SYMBOL_GPL(desc_to_gpio);
372e722e
AC
168
169
79a9becd
AC
170/**
171 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
172 * @desc: descriptor to return the chip of
173 */
174struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
372e722e 175{
dd3b9a44 176 if (!desc || !desc->gdev)
fdeb8e15
LW
177 return NULL;
178 return desc->gdev->chip;
372e722e 179}
79a9becd 180EXPORT_SYMBOL_GPL(gpiod_to_chip);
d2876d08 181
8d0aab2f
AV
182/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
183static int gpiochip_find_base(int ngpio)
184{
ff2b1359 185 struct gpio_device *gdev;
83cabe33 186 int base = ARCH_NR_GPIOS - ngpio;
8d0aab2f 187
ff2b1359 188 list_for_each_entry_reverse(gdev, &gpio_devices, list) {
83cabe33 189 /* found a free space? */
fdeb8e15 190 if (gdev->base + gdev->ngpio <= base)
83cabe33 191 break;
1cef8b50
AS
192 /* nope, check the space right before the chip */
193 base = gdev->base - ngpio;
8d0aab2f
AV
194 }
195
83cabe33 196 if (gpio_is_valid(base)) {
8d0aab2f 197 pr_debug("%s: found new base at %d\n", __func__, base);
83cabe33
AC
198 return base;
199 } else {
200 pr_err("%s: cannot find free range\n", __func__);
201 return -ENOSPC;
169b6a7a 202 }
169b6a7a
AV
203}
204
79a9becd
AC
205/**
206 * gpiod_get_direction - return the current direction of a GPIO
207 * @desc: GPIO to get the direction of
208 *
94fc7309 209 * Returns 0 for output, 1 for input, or an error code in case of error.
79a9becd
AC
210 *
211 * This function may sleep if gpiod_cansleep() is true.
212 */
8e53b0f1 213int gpiod_get_direction(struct gpio_desc *desc)
80b0a602 214{
a0b66a73 215 struct gpio_chip *gc;
13daf489 216 unsigned int offset;
d377f56f 217 int ret;
80b0a602 218
a0b66a73 219 gc = gpiod_to_chip(desc);
372e722e 220 offset = gpio_chip_hwgpio(desc);
80b0a602 221
256efaea
RK
222 /*
223 * Open drain emulation using input mode may incorrectly report
224 * input here, fix that up.
225 */
226 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) &&
227 test_bit(FLAG_IS_OUT, &desc->flags))
228 return 0;
229
a0b66a73 230 if (!gc->get_direction)
d0121b85 231 return -ENOTSUPP;
80b0a602 232
a0b66a73 233 ret = gc->get_direction(gc, offset);
4fc5bfeb
AS
234 if (ret < 0)
235 return ret;
236
237 /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */
238 if (ret > 0)
d377f56f 239 ret = 1;
4fc5bfeb
AS
240
241 assign_bit(FLAG_IS_OUT, &desc->flags, !ret);
242
d377f56f 243 return ret;
80b0a602 244}
79a9becd 245EXPORT_SYMBOL_GPL(gpiod_get_direction);
80b0a602 246
1a989d0f
AC
247/*
248 * Add a new chip to the global chips list, keeping the list of chips sorted
ef7c7553 249 * by range(means [base, base + ngpio - 1]) order.
1a989d0f
AC
250 *
251 * Return -EBUSY if the new chip overlaps with some other chip's integer
252 * space.
253 */
ff2b1359 254static int gpiodev_add_to_list(struct gpio_device *gdev)
1a989d0f 255{
a961f9b4 256 struct gpio_device *prev, *next;
1a989d0f 257
ff2b1359 258 if (list_empty(&gpio_devices)) {
a961f9b4 259 /* initial entry in list */
ff2b1359 260 list_add_tail(&gdev->list, &gpio_devices);
e28ecca6 261 return 0;
1a989d0f
AC
262 }
263
243cfa6a 264 next = list_first_entry(&gpio_devices, struct gpio_device, list);
a961f9b4
BJZ
265 if (gdev->base + gdev->ngpio <= next->base) {
266 /* add before first entry */
267 list_add(&gdev->list, &gpio_devices);
268 return 0;
1a989d0f
AC
269 }
270
243cfa6a 271 prev = list_last_entry(&gpio_devices, struct gpio_device, list);
a961f9b4
BJZ
272 if (prev->base + prev->ngpio <= gdev->base) {
273 /* add behind last entry */
274 list_add_tail(&gdev->list, &gpio_devices);
96098df1 275 return 0;
1a989d0f
AC
276 }
277
a961f9b4
BJZ
278 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
279 /* at the end of the list */
280 if (&next->list == &gpio_devices)
281 break;
1a989d0f 282
a961f9b4
BJZ
283 /* add between prev and next */
284 if (prev->base + prev->ngpio <= gdev->base
285 && gdev->base + gdev->ngpio <= next->base) {
286 list_add(&gdev->list, &prev->list);
287 return 0;
288 }
289 }
290
a961f9b4 291 return -EBUSY;
1a989d0f
AC
292}
293
950d55f5 294/*
f881bab0 295 * Convert a GPIO name to its descriptor
582838ea
GU
296 * Note that there is no guarantee that GPIO names are globally unique!
297 * Hence this function will return, if it exists, a reference to the first GPIO
298 * line found that matches the given name.
f881bab0
LW
299 */
300static struct gpio_desc *gpio_name_to_desc(const char * const name)
301{
ff2b1359 302 struct gpio_device *gdev;
f881bab0
LW
303 unsigned long flags;
304
ee203bbd
MM
305 if (!name)
306 return NULL;
307
f881bab0
LW
308 spin_lock_irqsave(&gpio_lock, flags);
309
ff2b1359 310 list_for_each_entry(gdev, &gpio_devices, list) {
66f46e37 311 struct gpio_desc *desc;
f881bab0 312
66f46e37
AS
313 for_each_gpio_desc(gdev->chip, desc) {
314 if (desc->name && !strcmp(desc->name, name)) {
f881bab0 315 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 316 return desc;
f881bab0
LW
317 }
318 }
319 }
320
321 spin_unlock_irqrestore(&gpio_lock, flags);
322
323 return NULL;
324}
325
5f3ca732 326/*
582838ea
GU
327 * Take the names from gc->names and assign them to their GPIO descriptors.
328 * Warn if a name is already used for a GPIO line on a different GPIO chip.
5f3ca732 329 *
582838ea
GU
330 * Note that:
331 * 1. Non-unique names are still accepted,
332 * 2. Name collisions within the same GPIO chip are not reported.
5f3ca732
MP
333 */
334static int gpiochip_set_desc_names(struct gpio_chip *gc)
335{
fdeb8e15 336 struct gpio_device *gdev = gc->gpiodev;
5f3ca732
MP
337 int i;
338
5f3ca732
MP
339 /* First check all names if they are unique */
340 for (i = 0; i != gc->ngpio; ++i) {
341 struct gpio_desc *gpio;
342
343 gpio = gpio_name_to_desc(gc->names[i]);
f881bab0 344 if (gpio)
fdeb8e15 345 dev_warn(&gdev->dev,
34ffd85d 346 "Detected name collision for GPIO name '%s'\n",
f881bab0 347 gc->names[i]);
5f3ca732
MP
348 }
349
350 /* Then add all names to the GPIO descriptors */
351 for (i = 0; i != gc->ngpio; ++i)
fdeb8e15 352 gdev->descs[i].name = gc->names[i];
5f3ca732
MP
353
354 return 0;
355}
356
32fc5aa2
BG
357/*
358 * devprop_gpiochip_set_names - Set GPIO line names using device properties
359 * @chip: GPIO chip whose lines should be named, if possible
360 *
361 * Looks for device property "gpio-line-names" and if it exists assigns
362 * GPIO line names for the chip. The memory allocated for the assigned
b41ba2ec 363 * names belong to the underlying firmware node and should not be released
32fc5aa2
BG
364 * by the caller.
365 */
366static int devprop_gpiochip_set_names(struct gpio_chip *chip)
367{
368 struct gpio_device *gdev = chip->gpiodev;
b41ba2ec 369 struct fwnode_handle *fwnode = dev_fwnode(&gdev->dev);
32fc5aa2
BG
370 const char **names;
371 int ret, i;
372 int count;
373
b41ba2ec 374 count = fwnode_property_string_array_count(fwnode, "gpio-line-names");
32fc5aa2
BG
375 if (count < 0)
376 return 0;
377
4e804c39
SP
378 /*
379 * When offset is set in the driver side we assume the driver internally
380 * is using more than one gpiochip per the same device. We have to stop
381 * setting friendly names if the specified ones with 'gpio-line-names'
382 * are less than the offset in the device itself. This means all the
383 * lines are not present for every single pin within all the internal
384 * gpiochips.
385 */
386 if (count <= chip->offset) {
387 dev_warn(&gdev->dev, "gpio-line-names too short (length %d), cannot map names for the gpiochip at offset %u\n",
388 count, chip->offset);
389 return 0;
32fc5aa2
BG
390 }
391
392 names = kcalloc(count, sizeof(*names), GFP_KERNEL);
393 if (!names)
394 return -ENOMEM;
395
b41ba2ec 396 ret = fwnode_property_read_string_array(fwnode, "gpio-line-names",
32fc5aa2
BG
397 names, count);
398 if (ret < 0) {
399 dev_warn(&gdev->dev, "failed to read GPIO line names\n");
400 kfree(names);
401 return ret;
402 }
403
4e804c39
SP
404 /*
405 * When more that one gpiochip per device is used, 'count' can
406 * contain at most number gpiochips x chip->ngpio. We have to
407 * correctly distribute all defined lines taking into account
408 * chip->offset as starting point from where we will assign
409 * the names to pins from the 'names' array. Since property
410 * 'gpio-line-names' cannot contains gaps, we have to be sure
411 * we only assign those pins that really exists since chip->ngpio
412 * can be different of the chip->offset.
413 */
414 count = (count > chip->offset) ? count - chip->offset : count;
415 if (count > chip->ngpio)
416 count = chip->ngpio;
417
c73960bb
PR
418 for (i = 0; i < count; i++) {
419 /*
420 * Allow overriding "fixed" names provided by the GPIO
421 * provider. The "fixed" names are more often than not
422 * generic and less informative than the names given in
423 * device properties.
424 */
425 if (names[chip->offset + i] && names[chip->offset + i][0])
426 gdev->descs[i].name = names[chip->offset + i];
427 }
32fc5aa2
BG
428
429 kfree(names);
430
431 return 0;
432}
433
a0b66a73 434static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc)
e4371f6e
SB
435{
436 unsigned long *p;
437
a0b66a73 438 p = bitmap_alloc(gc->ngpio, GFP_KERNEL);
e4371f6e
SB
439 if (!p)
440 return NULL;
441
442 /* Assume by default all GPIOs are valid */
a0b66a73 443 bitmap_fill(p, gc->ngpio);
e4371f6e
SB
444
445 return p;
446}
447
f626d6df 448static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
726cb3ba 449{
eb1e8bd6 450 if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask))
726cb3ba
SB
451 return 0;
452
f626d6df
LW
453 gc->valid_mask = gpiochip_allocate_mask(gc);
454 if (!gc->valid_mask)
726cb3ba
SB
455 return -ENOMEM;
456
457 return 0;
458}
459
c9fc5aff 460static int gpiochip_init_valid_mask(struct gpio_chip *gc)
f8ec92a9 461{
c9fc5aff
LW
462 if (gc->init_valid_mask)
463 return gc->init_valid_mask(gc,
464 gc->valid_mask,
465 gc->ngpio);
f8ec92a9
RRD
466
467 return 0;
468}
469
a0b66a73 470static void gpiochip_free_valid_mask(struct gpio_chip *gc)
726cb3ba 471{
a0b66a73
LW
472 bitmap_free(gc->valid_mask);
473 gc->valid_mask = NULL;
726cb3ba
SB
474}
475
b056ca1c
AS
476static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
477{
478 if (gc->add_pin_ranges)
479 return gc->add_pin_ranges(gc);
480
481 return 0;
482}
483
a0b66a73 484bool gpiochip_line_is_valid(const struct gpio_chip *gc,
726cb3ba
SB
485 unsigned int offset)
486{
487 /* No mask means all valid */
a0b66a73 488 if (likely(!gc->valid_mask))
726cb3ba 489 return true;
a0b66a73 490 return test_bit(offset, gc->valid_mask);
726cb3ba
SB
491}
492EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
493
ff2b1359
LW
494static void gpiodevice_release(struct device *dev)
495{
a6112998 496 struct gpio_device *gdev = container_of(dev, struct gpio_device, dev);
cf25ef6b 497 unsigned long flags;
ff2b1359 498
cf25ef6b 499 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 500 list_del(&gdev->list);
cf25ef6b
JH
501 spin_unlock_irqrestore(&gpio_lock, flags);
502
8d4a85b6 503 ida_free(&gpio_ida, gdev->id);
fcf273e5 504 kfree_const(gdev->label);
476e2fc5 505 kfree(gdev->descs);
9efd9e69 506 kfree(gdev);
ff2b1359
LW
507}
508
1f5eb8b1
KG
509#ifdef CONFIG_GPIO_CDEV
510#define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt))
511#define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev))
512#else
513/*
514 * gpiolib_cdev_register() indirectly calls device_add(), which is still
515 * required even when cdev is not selected.
516 */
517#define gcdev_register(gdev, devt) device_add(&(gdev)->dev)
518#define gcdev_unregister(gdev) device_del(&(gdev)->dev)
519#endif
520
159f3cd9
GR
521static int gpiochip_setup_dev(struct gpio_device *gdev)
522{
d377f56f 523 int ret;
159f3cd9 524
1f5eb8b1 525 ret = gcdev_register(gdev, gpio_devt);
d377f56f
LW
526 if (ret)
527 return ret;
111379dc 528
d377f56f
LW
529 ret = gpiochip_sysfs_register(gdev);
530 if (ret)
159f3cd9
GR
531 goto err_remove_device;
532
533 /* From this point, the .release() function cleans up gpio_device */
534 gdev->dev.release = gpiodevice_release;
262b9011
GU
535 dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base,
536 gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic");
159f3cd9
GR
537
538 return 0;
539
540err_remove_device:
1f5eb8b1 541 gcdev_unregister(gdev);
d377f56f 542 return ret;
159f3cd9
GR
543}
544
a0b66a73 545static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog)
a411e81e
BG
546{
547 struct gpio_desc *desc;
548 int rv;
549
a0b66a73 550 desc = gpiochip_get_desc(gc, hog->chip_hwnum);
a411e81e 551 if (IS_ERR(desc)) {
262b9011
GU
552 chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__,
553 PTR_ERR(desc));
a411e81e
BG
554 return;
555 }
556
ba3efdff 557 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
a411e81e
BG
558 return;
559
560 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
561 if (rv)
262b9011
GU
562 gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n",
563 __func__, gc->label, hog->chip_hwnum, rv);
a411e81e
BG
564}
565
a0b66a73 566static void machine_gpiochip_add(struct gpio_chip *gc)
a411e81e
BG
567{
568 struct gpiod_hog *hog;
569
570 mutex_lock(&gpio_machine_hogs_mutex);
571
572 list_for_each_entry(hog, &gpio_machine_hogs, list) {
a0b66a73
LW
573 if (!strcmp(gc->label, hog->chip_label))
574 gpiochip_machine_hog(gc, hog);
a411e81e
BG
575 }
576
577 mutex_unlock(&gpio_machine_hogs_mutex);
578}
579
159f3cd9
GR
580static void gpiochip_setup_devs(void)
581{
582 struct gpio_device *gdev;
d377f56f 583 int ret;
159f3cd9
GR
584
585 list_for_each_entry(gdev, &gpio_devices, list) {
d377f56f
LW
586 ret = gpiochip_setup_dev(gdev);
587 if (ret)
262b9011
GU
588 dev_err(&gdev->dev,
589 "Failed to initialize gpio device (%d)\n", ret);
159f3cd9
GR
590 }
591}
592
a0b66a73 593int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
39c3fd58
AL
594 struct lock_class_key *lock_key,
595 struct lock_class_key *request_key)
d2876d08 596{
990f6756 597 struct fwnode_handle *fwnode = NULL;
ff2b1359 598 struct gpio_device *gdev;
e5ab49cd
BG
599 unsigned long flags;
600 int base = gc->base;
601 unsigned int i;
602 int ret = 0;
9dbd1ab2 603 u32 ngpios;
d2876d08 604
990f6756
BG
605 if (gc->fwnode)
606 fwnode = gc->fwnode;
607 else if (gc->parent)
608 fwnode = dev_fwnode(gc->parent);
609
ff2b1359
LW
610 /*
611 * First: allocate and populate the internal stat container, and
612 * set up the struct device.
613 */
969f07b4 614 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
ff2b1359 615 if (!gdev)
14e85c0e 616 return -ENOMEM;
3c702e99 617 gdev->dev.bus = &gpio_bus_type;
1df62542 618 gdev->dev.parent = gc->parent;
a0b66a73
LW
619 gdev->chip = gc;
620 gc->gpiodev = gdev;
acc6e331 621
4731210c 622 of_gpio_dev_init(gc, gdev);
515321ac 623 acpi_gpio_dev_init(gc, gdev);
acc6e331 624
6cb59afe
AS
625 /*
626 * Assign fwnode depending on the result of the previous calls,
627 * if none of them succeed, assign it to the parent's one.
628 */
629 gdev->dev.fwnode = dev_fwnode(&gdev->dev) ?: fwnode;
630
8d4a85b6 631 gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL);
ff2b1359 632 if (gdev->id < 0) {
d377f56f 633 ret = gdev->id;
ff2b1359
LW
634 goto err_free_gdev;
635 }
c351bb64
QW
636
637 ret = dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id);
638 if (ret)
639 goto err_free_ida;
640
ff2b1359 641 device_initialize(&gdev->dev);
a0b66a73
LW
642 if (gc->parent && gc->parent->driver)
643 gdev->owner = gc->parent->driver->owner;
644 else if (gc->owner)
ff2b1359 645 /* TODO: remove chip->owner */
a0b66a73 646 gdev->owner = gc->owner;
ff2b1359
LW
647 else
648 gdev->owner = THIS_MODULE;
d2876d08 649
a0b66a73 650 gdev->descs = kcalloc(gc->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL);
1c3cdb18 651 if (!gdev->descs) {
d377f56f 652 ret = -ENOMEM;
c351bb64 653 goto err_free_dev_name;
ff2b1359
LW
654 }
655
9dbd1ab2
BG
656 /*
657 * Try the device properties if the driver didn't supply the number
658 * of GPIO lines.
659 */
660 if (gc->ngpio == 0) {
661 ret = device_property_read_u32(&gdev->dev, "ngpios", &ngpios);
662 if (ret == -ENODATA)
663 /*
664 * -ENODATA means that there is no property found and
665 * we want to issue the error message to the user.
666 * Besides that, we want to return different error code
667 * to state that supplied value is not valid.
668 */
669 ngpios = 0;
670 else if (ret)
671 goto err_free_descs;
672
673 gc->ngpio = ngpios;
674 }
675
a0b66a73
LW
676 if (gc->ngpio == 0) {
677 chip_err(gc, "tried to insert a GPIO chip with zero lines\n");
d377f56f 678 ret = -EINVAL;
159f3cd9 679 goto err_free_descs;
5ed41cc4 680 }
df4878e9 681
a0b66a73
LW
682 if (gc->ngpio > FASTPATH_NGPIO)
683 chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n",
684 gc->ngpio, FASTPATH_NGPIO);
3027743f 685
a0b66a73 686 gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL);
df4878e9 687 if (!gdev->label) {
d377f56f 688 ret = -ENOMEM;
476e2fc5 689 goto err_free_descs;
df4878e9
LW
690 }
691
a0b66a73 692 gdev->ngpio = gc->ngpio;
43c54eca 693 gdev->data = data;
5ed41cc4 694
d2876d08
DB
695 spin_lock_irqsave(&gpio_lock, flags);
696
fdeb8e15
LW
697 /*
698 * TODO: this allocates a Linux GPIO number base in the global
699 * GPIO numberspace for this chip. In the long run we want to
700 * get *rid* of this numberspace and use only descriptors, but
701 * it may be a pipe dream. It will not happen before we get rid
702 * of the sysfs interface anyways.
703 */
8d0aab2f 704 if (base < 0) {
a0b66a73 705 base = gpiochip_find_base(gc->ngpio);
8d0aab2f 706 if (base < 0) {
d377f56f 707 ret = base;
225fce83 708 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 709 goto err_free_label;
8d0aab2f 710 }
fdeb8e15
LW
711 /*
712 * TODO: it should not be necessary to reflect the assigned
713 * base outside of the GPIO subsystem. Go over drivers and
714 * see if anyone makes use of this, else drop this and assign
715 * a poison instead.
716 */
a0b66a73 717 gc->base = base;
8d0aab2f 718 }
fdeb8e15 719 gdev->base = base;
8d0aab2f 720
d377f56f
LW
721 ret = gpiodev_add_to_list(gdev);
722 if (ret) {
05aa5203 723 spin_unlock_irqrestore(&gpio_lock, flags);
24a9dbb1 724 chip_err(gc, "GPIO integer space overlap, cannot add chip\n");
476e2fc5 725 goto err_free_label;
05aa5203 726 }
1a989d0f 727
a0b66a73 728 for (i = 0; i < gc->ngpio; i++)
767cd17a 729 gdev->descs[i].gdev = gdev;
14e85c0e 730
207270dd
DC
731 spin_unlock_irqrestore(&gpio_lock, flags);
732
6accc376 733 BLOCKING_INIT_NOTIFIER_HEAD(&gdev->notifier);
51c1064e 734
f23f1516 735#ifdef CONFIG_PINCTRL
20ec3e39 736 INIT_LIST_HEAD(&gdev->pin_ranges);
f23f1516
SH
737#endif
738
c73960bb 739 if (gc->names) {
7cba1a4d 740 ret = gpiochip_set_desc_names(gc);
c73960bb
PR
741 if (ret)
742 goto err_remove_from_list;
743 }
744 ret = devprop_gpiochip_set_names(gc);
d377f56f 745 if (ret)
5f3ca732
MP
746 goto err_remove_from_list;
747
a0b66a73 748 ret = gpiochip_alloc_valid_mask(gc);
d377f56f 749 if (ret)
48057ed1 750 goto err_remove_from_list;
e0d89728 751
a0b66a73 752 ret = of_gpiochip_add(gc);
d377f56f 753 if (ret)
48057ed1 754 goto err_free_gpiochip_mask;
28355f81 755
a0b66a73 756 ret = gpiochip_init_valid_mask(gc);
d377f56f 757 if (ret)
35779890 758 goto err_remove_of_chip;
f8ec92a9 759
a0b66a73 760 for (i = 0; i < gc->ngpio; i++) {
3edfb7bd
RRD
761 struct gpio_desc *desc = &gdev->descs[i];
762
a0b66a73 763 if (gc->get_direction && gpiochip_line_is_valid(gc, i)) {
4fc5bfeb 764 assign_bit(FLAG_IS_OUT,
a0b66a73 765 &desc->flags, !gc->get_direction(gc, i));
d95da993 766 } else {
4fc5bfeb 767 assign_bit(FLAG_IS_OUT,
a0b66a73 768 &desc->flags, !gc->direction_input);
d95da993 769 }
3edfb7bd
RRD
770 }
771
a0b66a73 772 ret = gpiochip_add_pin_ranges(gc);
b056ca1c
AS
773 if (ret)
774 goto err_remove_of_chip;
775
a0b66a73 776 acpi_gpiochip_add(gc);
391c970c 777
a0b66a73 778 machine_gpiochip_add(gc);
a411e81e 779
a0b66a73 780 ret = gpiochip_irqchip_init_valid_mask(gc);
9411e3aa
AS
781 if (ret)
782 goto err_remove_acpi_chip;
783
a0b66a73 784 ret = gpiochip_irqchip_init_hw(gc);
fbdf8d4b 785 if (ret)
48057ed1
LW
786 goto err_remove_acpi_chip;
787
a0b66a73 788 ret = gpiochip_add_irqchip(gc, lock_key, request_key);
fbdf8d4b 789 if (ret)
48057ed1
LW
790 goto err_remove_irqchip_mask;
791
3c702e99
LW
792 /*
793 * By first adding the chardev, and then adding the device,
794 * we get a device node entry in sysfs under
795 * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
796 * coldplug of device nodes and other udev business.
159f3cd9
GR
797 * We can do this only if gpiolib has been initialized.
798 * Otherwise, defer until later.
3c702e99 799 */
159f3cd9 800 if (gpiolib_initialized) {
d377f56f
LW
801 ret = gpiochip_setup_dev(gdev);
802 if (ret)
48057ed1 803 goto err_remove_irqchip;
159f3cd9 804 }
cedb1881 805 return 0;
3bae4811 806
48057ed1 807err_remove_irqchip:
a0b66a73 808 gpiochip_irqchip_remove(gc);
48057ed1 809err_remove_irqchip_mask:
a0b66a73 810 gpiochip_irqchip_free_valid_mask(gc);
35779890 811err_remove_acpi_chip:
a0b66a73 812 acpi_gpiochip_remove(gc);
35779890 813err_remove_of_chip:
a0b66a73
LW
814 gpiochip_free_hogs(gc);
815 of_gpiochip_remove(gc);
35779890 816err_free_gpiochip_mask:
a0b66a73
LW
817 gpiochip_remove_pin_ranges(gc);
818 gpiochip_free_valid_mask(gc);
5f3ca732 819err_remove_from_list:
225fce83 820 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 821 list_del(&gdev->list);
3bae4811 822 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 823err_free_label:
fcf273e5 824 kfree_const(gdev->label);
476e2fc5
GR
825err_free_descs:
826 kfree(gdev->descs);
c351bb64
QW
827err_free_dev_name:
828 kfree(dev_name(&gdev->dev));
a05a1404 829err_free_ida:
8d4a85b6 830 ida_free(&gpio_ida, gdev->id);
a05a1404 831err_free_gdev:
d2876d08 832 /* failures here can mean systems won't boot... */
3cc1fb73
GS
833 if (ret != -EPROBE_DEFER) {
834 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
835 gdev->base, gdev->base + gdev->ngpio - 1,
836 gc->label ? : "generic", ret);
837 }
fdeb8e15 838 kfree(gdev);
d377f56f 839 return ret;
d2876d08 840}
959bc7b2 841EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
d2876d08 842
43c54eca
LW
843/**
844 * gpiochip_get_data() - get per-subdriver data for the chip
a0b66a73 845 * @gc: GPIO chip
950d55f5
TR
846 *
847 * Returns:
848 * The per-subdriver data for the chip.
43c54eca 849 */
a0b66a73 850void *gpiochip_get_data(struct gpio_chip *gc)
43c54eca 851{
a0b66a73 852 return gc->gpiodev->data;
43c54eca
LW
853}
854EXPORT_SYMBOL_GPL(gpiochip_get_data);
855
d2876d08
DB
856/**
857 * gpiochip_remove() - unregister a gpio_chip
a0b66a73 858 * @gc: the chip to unregister
d2876d08
DB
859 *
860 * A gpio_chip with any GPIOs still requested may not be removed.
861 */
a0b66a73 862void gpiochip_remove(struct gpio_chip *gc)
d2876d08 863{
a0b66a73 864 struct gpio_device *gdev = gc->gpiodev;
d2876d08 865 unsigned long flags;
869233f8 866 unsigned int i;
d2876d08 867
ff2b1359 868 /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
afbc4f31 869 gpiochip_sysfs_unregister(gdev);
a0b66a73 870 gpiochip_free_hogs(gc);
bd203bd5
BJZ
871 /* Numb the device, cancelling all outstanding operations */
872 gdev->chip = NULL;
a0b66a73
LW
873 gpiochip_irqchip_remove(gc);
874 acpi_gpiochip_remove(gc);
875 of_gpiochip_remove(gc);
876 gpiochip_remove_pin_ranges(gc);
877 gpiochip_free_valid_mask(gc);
43c54eca
LW
878 /*
879 * We accept no more calls into the driver from this point, so
880 * NULL the driver data pointer
881 */
882 gdev->data = NULL;
391c970c 883
6798acaa 884 spin_lock_irqsave(&gpio_lock, flags);
fdeb8e15 885 for (i = 0; i < gdev->ngpio; i++) {
a0b66a73 886 if (gpiochip_is_requested(gc, i))
869233f8 887 break;
d2876d08 888 }
d2876d08 889 spin_unlock_irqrestore(&gpio_lock, flags);
14e85c0e 890
ca18a852 891 if (i != gdev->ngpio)
fdeb8e15 892 dev_crit(&gdev->dev,
58383c78 893 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
fab28b89 894
ff2b1359
LW
895 /*
896 * The gpiochip side puts its use of the device to rest here:
897 * if there are no userspace clients, the chardev and device will
898 * be removed, else it will be dangling until the last user is
899 * gone.
900 */
1f5eb8b1 901 gcdev_unregister(gdev);
ff2b1359 902 put_device(&gdev->dev);
d2876d08
DB
903}
904EXPORT_SYMBOL_GPL(gpiochip_remove);
905
594fa265
GL
906/**
907 * gpiochip_find() - iterator for locating a specific gpio_chip
908 * @data: data to pass to match function
950d55f5 909 * @match: Callback function to check gpio_chip
594fa265
GL
910 *
911 * Similar to bus_find_device. It returns a reference to a gpio_chip as
912 * determined by a user supplied @match callback. The callback should return
913 * 0 if the device doesn't match and non-zero if it does. If the callback is
914 * non-zero, this function will return to the caller and not iterate over any
915 * more gpio_chips.
916 */
07ce8ec7 917struct gpio_chip *gpiochip_find(void *data,
a0b66a73 918 int (*match)(struct gpio_chip *gc,
3d0f7cf0 919 void *data))
594fa265 920{
ff2b1359 921 struct gpio_device *gdev;
a0b66a73 922 struct gpio_chip *gc = NULL;
594fa265 923 unsigned long flags;
594fa265
GL
924
925 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 926 list_for_each_entry(gdev, &gpio_devices, list)
acf06ff7 927 if (gdev->chip && match(gdev->chip, data)) {
a0b66a73 928 gc = gdev->chip;
594fa265 929 break;
acf06ff7 930 }
ff2b1359 931
594fa265
GL
932 spin_unlock_irqrestore(&gpio_lock, flags);
933
a0b66a73 934 return gc;
594fa265 935}
8fa0c9bf 936EXPORT_SYMBOL_GPL(gpiochip_find);
d2876d08 937
a0b66a73 938static int gpiochip_match_name(struct gpio_chip *gc, void *data)
79697ef9
AC
939{
940 const char *name = data;
941
a0b66a73 942 return !strcmp(gc->label, name);
79697ef9
AC
943}
944
945static struct gpio_chip *find_chip_by_name(const char *name)
946{
947 return gpiochip_find((void *)name, gpiochip_match_name);
948}
949
14250520
LW
950#ifdef CONFIG_GPIOLIB_IRQCHIP
951
952/*
953 * The following is irqchip helper code for gpiochips.
954 */
955
9411e3aa
AS
956static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
957{
958 struct gpio_irq_chip *girq = &gc->irq;
959
960 if (!girq->init_hw)
961 return 0;
962
963 return girq->init_hw(gc);
964}
965
5fbe5b58 966static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb 967{
5fbe5b58
LW
968 struct gpio_irq_chip *girq = &gc->irq;
969
970 if (!girq->init_valid_mask)
79b804cb
MW
971 return 0;
972
5fbe5b58
LW
973 girq->valid_mask = gpiochip_allocate_mask(gc);
974 if (!girq->valid_mask)
79b804cb
MW
975 return -ENOMEM;
976
5fbe5b58
LW
977 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
978
79b804cb
MW
979 return 0;
980}
981
a0b66a73 982static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 983{
a0b66a73
LW
984 bitmap_free(gc->irq.valid_mask);
985 gc->irq.valid_mask = NULL;
79b804cb
MW
986}
987
a0b66a73 988bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc,
64ff2c8e 989 unsigned int offset)
79b804cb 990{
a0b66a73 991 if (!gpiochip_line_is_valid(gc, offset))
726cb3ba 992 return false;
79b804cb 993 /* No mask means all valid */
a0b66a73 994 if (likely(!gc->irq.valid_mask))
79b804cb 995 return true;
a0b66a73 996 return test_bit(offset, gc->irq.valid_mask);
79b804cb 997}
64ff2c8e 998EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
79b804cb 999
fdd61a01
LW
1000#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1001
1002/**
1003 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
1004 * to a gpiochip
1005 * @gc: the gpiochip to set the irqchip hierarchical handler to
1006 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
1007 * will then percolate up to the parent
1008 */
1009static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
1010 struct irq_chip *irqchip)
1011{
1012 /* DT will deal with mapping each IRQ as we go along */
1013 if (is_of_node(gc->irq.fwnode))
1014 return;
1015
1016 /*
1017 * This is for legacy and boardfile "irqchip" fwnodes: allocate
1018 * irqs upfront instead of dynamically since we don't have the
1019 * dynamic type of allocation that hardware description languages
1020 * provide. Once all GPIO drivers using board files are gone from
1021 * the kernel we can delete this code, but for a transitional period
1022 * it is necessary to keep this around.
1023 */
1024 if (is_fwnode_irqchip(gc->irq.fwnode)) {
1025 int i;
1026 int ret;
1027
1028 for (i = 0; i < gc->ngpio; i++) {
1029 struct irq_fwspec fwspec;
1030 unsigned int parent_hwirq;
1031 unsigned int parent_type;
1032 struct gpio_irq_chip *girq = &gc->irq;
1033
1034 /*
1035 * We call the child to parent translation function
1036 * only to check if the child IRQ is valid or not.
1037 * Just pick the rising edge type here as that is what
1038 * we likely need to support.
1039 */
1040 ret = girq->child_to_parent_hwirq(gc, i,
1041 IRQ_TYPE_EDGE_RISING,
1042 &parent_hwirq,
1043 &parent_type);
1044 if (ret) {
1045 chip_err(gc, "skip set-up on hwirq %d\n",
1046 i);
1047 continue;
1048 }
1049
1050 fwspec.fwnode = gc->irq.fwnode;
1051 /* This is the hwirq for the GPIO line side of things */
1052 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
1053 /* Just pick something */
1054 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
1055 fwspec.param_count = 2;
1056 ret = __irq_domain_alloc_irqs(gc->irq.domain,
1057 /* just pick something */
1058 -1,
1059 1,
1060 NUMA_NO_NODE,
1061 &fwspec,
1062 false,
1063 NULL);
1064 if (ret < 0) {
1065 chip_err(gc,
1066 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1067 i, parent_hwirq,
1068 ret);
1069 }
1070 }
1071 }
1072
1073 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1074
1075 return;
1076}
1077
1078static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1079 struct irq_fwspec *fwspec,
1080 unsigned long *hwirq,
1081 unsigned int *type)
1082{
1083 /* We support standard DT translation */
1084 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1085 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1086 }
1087
1088 /* This is for board files and others not using DT */
1089 if (is_fwnode_irqchip(fwspec->fwnode)) {
1090 int ret;
1091
1092 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1093 if (ret)
1094 return ret;
1095 WARN_ON(*type == IRQ_TYPE_NONE);
1096 return 0;
1097 }
1098 return -EINVAL;
1099}
1100
1101static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1102 unsigned int irq,
1103 unsigned int nr_irqs,
1104 void *data)
1105{
1106 struct gpio_chip *gc = d->host_data;
1107 irq_hw_number_t hwirq;
1108 unsigned int type = IRQ_TYPE_NONE;
1109 struct irq_fwspec *fwspec = data;
91a29af4 1110 union gpio_irq_fwspec gpio_parent_fwspec = {};
fdd61a01
LW
1111 unsigned int parent_hwirq;
1112 unsigned int parent_type;
1113 struct gpio_irq_chip *girq = &gc->irq;
1114 int ret;
1115
1116 /*
1117 * The nr_irqs parameter is always one except for PCI multi-MSI
1118 * so this should not happen.
1119 */
1120 WARN_ON(nr_irqs != 1);
1121
1122 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
1123 if (ret)
1124 return ret;
1125
366950ee 1126 chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
fdd61a01
LW
1127
1128 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
1129 &parent_hwirq, &parent_type);
1130 if (ret) {
1131 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
1132 return ret;
1133 }
366950ee 1134 chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq);
fdd61a01
LW
1135
1136 /*
1137 * We set handle_bad_irq because the .set_type() should
1138 * always be invoked and set the right type of handler.
1139 */
1140 irq_domain_set_info(d,
1141 irq,
1142 hwirq,
1143 gc->irq.chip,
1144 gc,
1145 girq->handler,
1146 NULL, NULL);
1147 irq_set_probe(irq);
1148
fdd61a01 1149 /* This parent only handles asserted level IRQs */
91a29af4
MZ
1150 ret = girq->populate_parent_alloc_arg(gc, &gpio_parent_fwspec,
1151 parent_hwirq, parent_type);
1152 if (ret)
1153 return ret;
24258761 1154
366950ee 1155 chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
fdd61a01 1156 irq, parent_hwirq);
c34f6dc8 1157 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
91a29af4 1158 ret = irq_domain_alloc_irqs_parent(d, irq, 1, &gpio_parent_fwspec);
880b7cf2
KH
1159 /*
1160 * If the parent irqdomain is msi, the interrupts have already
1161 * been allocated, so the EEXIST is good.
1162 */
1163 if (irq_domain_is_msi(d->parent) && (ret == -EEXIST))
1164 ret = 0;
fdd61a01
LW
1165 if (ret)
1166 chip_err(gc,
1167 "failed to allocate parent hwirq %d for hwirq %lu\n",
1168 parent_hwirq, hwirq);
1169
1170 return ret;
1171}
1172
a0b66a73 1173static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc,
fdd61a01
LW
1174 unsigned int offset)
1175{
1176 return offset;
1177}
1178
1179static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
1180{
1181 ops->activate = gpiochip_irq_domain_activate;
1182 ops->deactivate = gpiochip_irq_domain_deactivate;
1183 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
1184 ops->free = irq_domain_free_irqs_common;
1185
1186 /*
1187 * We only allow overriding the translate() function for
1188 * hierarchical chips, and this should only be done if the user
1189 * really need something other than 1:1 translation.
1190 */
1191 if (!ops->translate)
1192 ops->translate = gpiochip_hierarchy_irq_domain_translate;
1193}
1194
1195static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1196{
1197 if (!gc->irq.child_to_parent_hwirq ||
1198 !gc->irq.fwnode) {
1199 chip_err(gc, "missing irqdomain vital data\n");
1200 return -EINVAL;
1201 }
1202
1203 if (!gc->irq.child_offset_to_irq)
1204 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
1205
24258761
KH
1206 if (!gc->irq.populate_parent_alloc_arg)
1207 gc->irq.populate_parent_alloc_arg =
fdd61a01
LW
1208 gpiochip_populate_parent_fwspec_twocell;
1209
1210 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
1211
1212 gc->irq.domain = irq_domain_create_hierarchy(
1213 gc->irq.parent_domain,
1214 0,
1215 gc->ngpio,
1216 gc->irq.fwnode,
1217 &gc->irq.child_irq_domain_ops,
1218 gc);
1219
1220 if (!gc->irq.domain)
1221 return -ENOMEM;
1222
1223 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
1224
1225 return 0;
1226}
1227
1228static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1229{
1230 return !!gc->irq.parent_domain;
1231}
1232
91a29af4
MZ
1233int gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc,
1234 union gpio_irq_fwspec *gfwspec,
1235 unsigned int parent_hwirq,
1236 unsigned int parent_type)
fdd61a01 1237{
91a29af4 1238 struct irq_fwspec *fwspec = &gfwspec->fwspec;
24258761 1239
a0b66a73 1240 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1241 fwspec->param_count = 2;
1242 fwspec->param[0] = parent_hwirq;
1243 fwspec->param[1] = parent_type;
24258761 1244
91a29af4 1245 return 0;
fdd61a01
LW
1246}
1247EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
1248
91a29af4
MZ
1249int gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc,
1250 union gpio_irq_fwspec *gfwspec,
1251 unsigned int parent_hwirq,
1252 unsigned int parent_type)
fdd61a01 1253{
91a29af4 1254 struct irq_fwspec *fwspec = &gfwspec->fwspec;
24258761 1255
a0b66a73 1256 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1257 fwspec->param_count = 4;
1258 fwspec->param[0] = 0;
1259 fwspec->param[1] = parent_hwirq;
1260 fwspec->param[2] = 0;
1261 fwspec->param[3] = parent_type;
24258761 1262
91a29af4 1263 return 0;
fdd61a01
LW
1264}
1265EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
1266
1267#else
1268
1269static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1270{
1271 return -EINVAL;
1272}
1273
1274static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1275{
1276 return false;
1277}
1278
1279#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
1280
14250520
LW
1281/**
1282 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
1283 * @d: the irqdomain used by this irqchip
1284 * @irq: the global irq number used by this GPIO irqchip irq
1285 * @hwirq: the local IRQ/GPIO line offset on this gpiochip
1286 *
1287 * This function will set up the mapping for a certain IRQ line on a
1288 * gpiochip by assigning the gpiochip as chip data, and using the irqchip
1289 * stored inside the gpiochip.
1290 */
1b95b4eb
TR
1291int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
1292 irq_hw_number_t hwirq)
14250520 1293{
a0b66a73 1294 struct gpio_chip *gc = d->host_data;
d377f56f 1295 int ret = 0;
14250520 1296
a0b66a73 1297 if (!gpiochip_irqchip_irq_valid(gc, hwirq))
dc749a09
GS
1298 return -ENXIO;
1299
a0b66a73 1300 irq_set_chip_data(irq, gc);
a0a8bcf4
GS
1301 /*
1302 * This lock class tells lockdep that GPIO irqs are in a different
1303 * category than their parents, so it won't report false recursion.
1304 */
a0b66a73
LW
1305 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
1306 irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler);
d245b3f9 1307 /* Chips that use nested thread handlers have them marked */
a0b66a73 1308 if (gc->irq.threaded)
1c8732bb 1309 irq_set_nested_thread(irq, 1);
14250520 1310 irq_set_noprobe(irq);
23393d49 1311
a0b66a73
LW
1312 if (gc->irq.num_parents == 1)
1313 ret = irq_set_parent(irq, gc->irq.parents[0]);
1314 else if (gc->irq.map)
1315 ret = irq_set_parent(irq, gc->irq.map[hwirq]);
e0d89728 1316
d377f56f
LW
1317 if (ret < 0)
1318 return ret;
e0d89728 1319
1333b90f
LW
1320 /*
1321 * No set-up of the hardware will happen if IRQ_TYPE_NONE
1322 * is passed as default type.
1323 */
a0b66a73
LW
1324 if (gc->irq.default_type != IRQ_TYPE_NONE)
1325 irq_set_irq_type(irq, gc->irq.default_type);
14250520
LW
1326
1327 return 0;
1328}
1b95b4eb 1329EXPORT_SYMBOL_GPL(gpiochip_irq_map);
14250520 1330
1b95b4eb 1331void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
c3626fde 1332{
a0b66a73 1333 struct gpio_chip *gc = d->host_data;
1c8732bb 1334
a0b66a73 1335 if (gc->irq.threaded)
1c8732bb 1336 irq_set_nested_thread(irq, 0);
c3626fde
LW
1337 irq_set_chip_and_handler(irq, NULL, NULL);
1338 irq_set_chip_data(irq, NULL);
1339}
1b95b4eb 1340EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
c3626fde 1341
14250520
LW
1342static const struct irq_domain_ops gpiochip_domain_ops = {
1343 .map = gpiochip_irq_map,
c3626fde 1344 .unmap = gpiochip_irq_unmap,
14250520
LW
1345 /* Virtually all GPIO irqchips are twocell:ed */
1346 .xlate = irq_domain_xlate_twocell,
1347};
1348
fdd61a01
LW
1349/*
1350 * TODO: move these activate/deactivate in under the hierarchicial
1351 * irqchip implementation as static once SPMI and SSBI (all external
1352 * users) are phased over.
1353 */
ef74f70e
BM
1354/**
1355 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
1356 * @domain: The IRQ domain used by this IRQ chip
1357 * @data: Outermost irq_data associated with the IRQ
1358 * @reserve: If set, only reserve an interrupt vector instead of assigning one
1359 *
1360 * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
1361 * used as the activate function for the &struct irq_domain_ops. The host_data
1362 * for the IRQ domain must be the &struct gpio_chip.
1363 */
1364int gpiochip_irq_domain_activate(struct irq_domain *domain,
1365 struct irq_data *data, bool reserve)
1366{
a0b66a73 1367 struct gpio_chip *gc = domain->host_data;
ef74f70e 1368
a0b66a73 1369 return gpiochip_lock_as_irq(gc, data->hwirq);
ef74f70e
BM
1370}
1371EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
1372
1373/**
1374 * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
1375 * @domain: The IRQ domain used by this IRQ chip
1376 * @data: Outermost irq_data associated with the IRQ
1377 *
1378 * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
1379 * be used as the deactivate function for the &struct irq_domain_ops. The
1380 * host_data for the IRQ domain must be the &struct gpio_chip.
1381 */
1382void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
1383 struct irq_data *data)
1384{
a0b66a73 1385 struct gpio_chip *gc = domain->host_data;
ef74f70e 1386
a0b66a73 1387 return gpiochip_unlock_as_irq(gc, data->hwirq);
ef74f70e
BM
1388}
1389EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
1390
13daf489 1391static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset)
14250520 1392{
a0b66a73 1393 struct irq_domain *domain = gc->irq.domain;
fdd61a01 1394
5467801f
SP
1395#ifdef CONFIG_GPIOLIB_IRQCHIP
1396 /*
1397 * Avoid race condition with other code, which tries to lookup
1398 * an IRQ before the irqchip has been properly registered,
1399 * i.e. while gpiochip is still being brought up.
1400 */
1401 if (!gc->irq.initialized)
1402 return -EPROBE_DEFER;
1403#endif
1404
a0b66a73 1405 if (!gpiochip_irqchip_irq_valid(gc, offset))
4e6b8238 1406 return -ENXIO;
5b76e79c 1407
fdd61a01
LW
1408#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1409 if (irq_domain_is_hierarchy(domain)) {
1410 struct irq_fwspec spec;
1411
1412 spec.fwnode = domain->fwnode;
1413 spec.param_count = 2;
a0b66a73 1414 spec.param[0] = gc->irq.child_offset_to_irq(gc, offset);
fdd61a01
LW
1415 spec.param[1] = IRQ_TYPE_NONE;
1416
1417 return irq_create_fwspec_mapping(&spec);
1418 }
1419#endif
1420
1421 return irq_create_mapping(domain, offset);
14250520
LW
1422}
1423
704f0875 1424int gpiochip_irq_reqres(struct irq_data *d)
14250520 1425{
a0b66a73 1426 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
5b76e79c 1427
a0b66a73 1428 return gpiochip_reqres_irq(gc, d->hwirq);
14250520 1429}
704f0875 1430EXPORT_SYMBOL(gpiochip_irq_reqres);
14250520 1431
704f0875 1432void gpiochip_irq_relres(struct irq_data *d)
14250520 1433{
a0b66a73 1434 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
14250520 1435
a0b66a73 1436 gpiochip_relres_irq(gc, d->hwirq);
14250520 1437}
704f0875 1438EXPORT_SYMBOL(gpiochip_irq_relres);
14250520 1439
a8173820
MS
1440static void gpiochip_irq_mask(struct irq_data *d)
1441{
1442 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1443
1444 if (gc->irq.irq_mask)
1445 gc->irq.irq_mask(d);
1446 gpiochip_disable_irq(gc, d->hwirq);
1447}
1448
1449static void gpiochip_irq_unmask(struct irq_data *d)
1450{
1451 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1452
1453 gpiochip_enable_irq(gc, d->hwirq);
1454 if (gc->irq.irq_unmask)
1455 gc->irq.irq_unmask(d);
1456}
1457
461c1a7d 1458static void gpiochip_irq_enable(struct irq_data *d)
14250520 1459{
a0b66a73 1460 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
e0d89728 1461
a0b66a73 1462 gpiochip_enable_irq(gc, d->hwirq);
a8173820 1463 gc->irq.irq_enable(d);
461c1a7d
HV
1464}
1465
1466static void gpiochip_irq_disable(struct irq_data *d)
1467{
a0b66a73 1468 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
461c1a7d 1469
a8173820 1470 gc->irq.irq_disable(d);
a0b66a73 1471 gpiochip_disable_irq(gc, d->hwirq);
461c1a7d
HV
1472}
1473
a0b66a73 1474static void gpiochip_set_irq_hooks(struct gpio_chip *gc)
ca620f2d 1475{
a0b66a73 1476 struct irq_chip *irqchip = gc->irq.chip;
ca620f2d 1477
6c846d02
MZ
1478 if (irqchip->flags & IRQCHIP_IMMUTABLE)
1479 return;
1480
1481 chip_warn(gc, "not an immutable chip, please consider fixing it!\n");
1482
ca620f2d
HV
1483 if (!irqchip->irq_request_resources &&
1484 !irqchip->irq_release_resources) {
1485 irqchip->irq_request_resources = gpiochip_irq_reqres;
1486 irqchip->irq_release_resources = gpiochip_irq_relres;
1487 }
a0b66a73 1488 if (WARN_ON(gc->irq.irq_enable))
461c1a7d 1489 return;
171948ea 1490 /* Check if the irqchip already has this hook... */
9d552219
NS
1491 if (irqchip->irq_enable == gpiochip_irq_enable ||
1492 irqchip->irq_mask == gpiochip_irq_mask) {
171948ea
HV
1493 /*
1494 * ...and if so, give a gentle warning that this is bad
1495 * practice.
1496 */
a0b66a73 1497 chip_info(gc,
171948ea
HV
1498 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
1499 return;
1500 }
a8173820
MS
1501
1502 if (irqchip->irq_disable) {
1503 gc->irq.irq_disable = irqchip->irq_disable;
1504 irqchip->irq_disable = gpiochip_irq_disable;
1505 } else {
1506 gc->irq.irq_mask = irqchip->irq_mask;
1507 irqchip->irq_mask = gpiochip_irq_mask;
1508 }
1509
1510 if (irqchip->irq_enable) {
1511 gc->irq.irq_enable = irqchip->irq_enable;
1512 irqchip->irq_enable = gpiochip_irq_enable;
1513 } else {
1514 gc->irq.irq_unmask = irqchip->irq_unmask;
1515 irqchip->irq_unmask = gpiochip_irq_unmask;
1516 }
14250520
LW
1517}
1518
e0d89728
TR
1519/**
1520 * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
a0b66a73 1521 * @gc: the GPIO chip to add the IRQ chip to
39c3fd58
AL
1522 * @lock_key: lockdep class for IRQ lock
1523 * @request_key: lockdep class for IRQ request
e0d89728 1524 */
a0b66a73 1525static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1526 struct lock_class_key *lock_key,
1527 struct lock_class_key *request_key)
e0d89728 1528{
5c63a9db 1529 struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev);
a0b66a73 1530 struct irq_chip *irqchip = gc->irq.chip;
e0d89728
TR
1531 unsigned int type;
1532 unsigned int i;
1533
1534 if (!irqchip)
1535 return 0;
1536
a0b66a73
LW
1537 if (gc->irq.parent_handler && gc->can_sleep) {
1538 chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n");
e0d89728
TR
1539 return -EINVAL;
1540 }
1541
a0b66a73 1542 type = gc->irq.default_type;
e0d89728
TR
1543
1544 /*
1545 * Specifying a default trigger is a terrible idea if DT or ACPI is
1546 * used to configure the interrupts, as you may end up with
1547 * conflicting triggers. Tell the user, and reset to NONE.
1548 */
5c63a9db
AS
1549 if (WARN(fwnode && type != IRQ_TYPE_NONE,
1550 "%pfw: Ignoring %u default trigger\n", fwnode, type))
e0d89728
TR
1551 type = IRQ_TYPE_NONE;
1552
ef382374
NS
1553 if (gc->to_irq)
1554 chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__);
1555
a0b66a73
LW
1556 gc->to_irq = gpiochip_to_irq;
1557 gc->irq.default_type = type;
1558 gc->irq.lock_key = lock_key;
1559 gc->irq.request_key = request_key;
e0d89728 1560
fdd61a01 1561 /* If a parent irqdomain is provided, let's build a hierarchy */
a0b66a73
LW
1562 if (gpiochip_hierarchy_is_hierarchical(gc)) {
1563 int ret = gpiochip_hierarchy_add_domain(gc);
fdd61a01
LW
1564 if (ret)
1565 return ret;
1566 } else {
1567 /* Some drivers provide custom irqdomain ops */
5c63a9db 1568 gc->irq.domain = irq_domain_create_simple(fwnode,
a0b66a73
LW
1569 gc->ngpio,
1570 gc->irq.first,
266315fb
AS
1571 gc->irq.domain_ops ?: &gpiochip_domain_ops,
1572 gc);
a0b66a73 1573 if (!gc->irq.domain)
fdd61a01
LW
1574 return -EINVAL;
1575 }
e0d89728 1576
a0b66a73 1577 if (gc->irq.parent_handler) {
a0b66a73 1578 for (i = 0; i < gc->irq.num_parents; i++) {
cfe6807d
MZ
1579 void *data;
1580
1581 if (gc->irq.per_parent_data)
1582 data = gc->irq.parent_handler_data_array[i];
1583 else
1584 data = gc->irq.parent_handler_data ?: gc;
1585
e0d89728
TR
1586 /*
1587 * The parent IRQ chip is already using the chip_data
1588 * for this IRQ chip, so our callbacks simply use the
1589 * handler_data.
1590 */
a0b66a73
LW
1591 irq_set_chained_handler_and_data(gc->irq.parents[i],
1592 gc->irq.parent_handler,
e0d89728
TR
1593 data);
1594 }
e0d89728
TR
1595 }
1596
a0b66a73 1597 gpiochip_set_irq_hooks(gc);
ca620f2d 1598
5467801f
SP
1599 /*
1600 * Using barrier() here to prevent compiler from reordering
1601 * gc->irq.initialized before initialization of above
1602 * GPIO chip irq members.
1603 */
1604 barrier();
1605
1606 gc->irq.initialized = true;
1607
06fb4ecf
ML
1608 acpi_gpiochip_request_interrupts(gc);
1609
e0d89728
TR
1610 return 0;
1611}
1612
14250520
LW
1613/**
1614 * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
a0b66a73 1615 * @gc: the gpiochip to remove the irqchip from
14250520
LW
1616 *
1617 * This is called only from gpiochip_remove()
1618 */
a0b66a73 1619static void gpiochip_irqchip_remove(struct gpio_chip *gc)
14250520 1620{
a0b66a73 1621 struct irq_chip *irqchip = gc->irq.chip;
39e5f096 1622 unsigned int offset;
c3626fde 1623
a0b66a73 1624 acpi_gpiochip_free_interrupts(gc);
afa82fab 1625
a0b66a73
LW
1626 if (irqchip && gc->irq.parent_handler) {
1627 struct gpio_irq_chip *irq = &gc->irq;
39e5f096
TR
1628 unsigned int i;
1629
1630 for (i = 0; i < irq->num_parents; i++)
1631 irq_set_chained_handler_and_data(irq->parents[i],
1632 NULL, NULL);
25e4fe92
DES
1633 }
1634
c3626fde 1635 /* Remove all IRQ mappings and delete the domain */
a0b66a73 1636 if (gc->irq.domain) {
39e5f096
TR
1637 unsigned int irq;
1638
a0b66a73
LW
1639 for (offset = 0; offset < gc->ngpio; offset++) {
1640 if (!gpiochip_irqchip_irq_valid(gc, offset))
79b804cb 1641 continue;
f0fbe7bc 1642
a0b66a73 1643 irq = irq_find_mapping(gc->irq.domain, offset);
f0fbe7bc 1644 irq_dispose_mapping(irq);
79b804cb 1645 }
f0fbe7bc 1646
a0b66a73 1647 irq_domain_remove(gc->irq.domain);
c3626fde 1648 }
14250520 1649
6c846d02 1650 if (irqchip && !(irqchip->flags & IRQCHIP_IMMUTABLE)) {
461c1a7d
HV
1651 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
1652 irqchip->irq_request_resources = NULL;
1653 irqchip->irq_release_resources = NULL;
1654 }
1655 if (irqchip->irq_enable == gpiochip_irq_enable) {
a0b66a73
LW
1656 irqchip->irq_enable = gc->irq.irq_enable;
1657 irqchip->irq_disable = gc->irq.irq_disable;
461c1a7d 1658 }
14250520 1659 }
a0b66a73
LW
1660 gc->irq.irq_enable = NULL;
1661 gc->irq.irq_disable = NULL;
1662 gc->irq.chip = NULL;
79b804cb 1663
a0b66a73 1664 gpiochip_irqchip_free_valid_mask(gc);
14250520
LW
1665}
1666
6a45b0e2
MW
1667/**
1668 * gpiochip_irqchip_add_domain() - adds an irqdomain to a gpiochip
1669 * @gc: the gpiochip to add the irqchip to
1670 * @domain: the irqdomain to add to the gpiochip
1671 *
1672 * This function adds an IRQ domain to the gpiochip.
1673 */
1674int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
1675 struct irq_domain *domain)
1676{
1677 if (!domain)
1678 return -EINVAL;
1679
1680 gc->to_irq = gpiochip_to_irq;
1681 gc->irq.domain = domain;
1682
1683 return 0;
1684}
1685EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain);
1686
14250520
LW
1687#else /* CONFIG_GPIOLIB_IRQCHIP */
1688
a0b66a73 1689static inline int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1690 struct lock_class_key *lock_key,
1691 struct lock_class_key *request_key)
e0d89728
TR
1692{
1693 return 0;
1694}
a0b66a73 1695static void gpiochip_irqchip_remove(struct gpio_chip *gc) {}
9411e3aa 1696
a0b66a73 1697static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
9411e3aa
AS
1698{
1699 return 0;
1700}
1701
a0b66a73 1702static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb
MW
1703{
1704 return 0;
1705}
a0b66a73 1706static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 1707{ }
14250520
LW
1708
1709#endif /* CONFIG_GPIOLIB_IRQCHIP */
1710
c771c2f4
JG
1711/**
1712 * gpiochip_generic_request() - request the gpio function for a pin
a0b66a73 1713 * @gc: the gpiochip owning the GPIO
c771c2f4
JG
1714 * @offset: the offset of the GPIO to request for GPIO function
1715 */
13daf489 1716int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset)
c771c2f4 1717{
56e337f2
BG
1718#ifdef CONFIG_PINCTRL
1719 if (list_empty(&gc->gpiodev->pin_ranges))
1720 return 0;
1721#endif
1722
a0b66a73 1723 return pinctrl_gpio_request(gc->gpiodev->base + offset);
c771c2f4
JG
1724}
1725EXPORT_SYMBOL_GPL(gpiochip_generic_request);
1726
1727/**
1728 * gpiochip_generic_free() - free the gpio function from a pin
a0b66a73 1729 * @gc: the gpiochip to request the gpio function for
c771c2f4
JG
1730 * @offset: the offset of the GPIO to free from GPIO function
1731 */
13daf489 1732void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset)
c771c2f4 1733{
56e337f2
BG
1734#ifdef CONFIG_PINCTRL
1735 if (list_empty(&gc->gpiodev->pin_ranges))
1736 return;
1737#endif
1738
a0b66a73 1739 pinctrl_gpio_free(gc->gpiodev->base + offset);
c771c2f4
JG
1740}
1741EXPORT_SYMBOL_GPL(gpiochip_generic_free);
1742
2956b5d9
MW
1743/**
1744 * gpiochip_generic_config() - apply configuration for a pin
a0b66a73 1745 * @gc: the gpiochip owning the GPIO
2956b5d9
MW
1746 * @offset: the offset of the GPIO to apply the configuration
1747 * @config: the configuration to be applied
1748 */
13daf489 1749int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset,
2956b5d9
MW
1750 unsigned long config)
1751{
a0b66a73 1752 return pinctrl_gpio_set_config(gc->gpiodev->base + offset, config);
2956b5d9
MW
1753}
1754EXPORT_SYMBOL_GPL(gpiochip_generic_config);
1755
f23f1516 1756#ifdef CONFIG_PINCTRL
165adc9c 1757
586a87e6
CR
1758/**
1759 * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
a0b66a73 1760 * @gc: the gpiochip to add the range for
d32651f6 1761 * @pctldev: the pin controller to map to
586a87e6
CR
1762 * @gpio_offset: the start offset in the current gpio_chip number space
1763 * @pin_group: name of the pin group inside the pin controller
973c1714
CL
1764 *
1765 * Calling this function directly from a DeviceTree-supported
1766 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
1767 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
1768 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
586a87e6 1769 */
a0b66a73 1770int gpiochip_add_pingroup_range(struct gpio_chip *gc,
586a87e6
CR
1771 struct pinctrl_dev *pctldev,
1772 unsigned int gpio_offset, const char *pin_group)
1773{
1774 struct gpio_pin_range *pin_range;
a0b66a73 1775 struct gpio_device *gdev = gc->gpiodev;
586a87e6
CR
1776 int ret;
1777
1778 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
1779 if (!pin_range) {
a0b66a73 1780 chip_err(gc, "failed to allocate pin ranges\n");
586a87e6
CR
1781 return -ENOMEM;
1782 }
1783
1784 /* Use local offset as range ID */
1785 pin_range->range.id = gpio_offset;
a0b66a73
LW
1786 pin_range->range.gc = gc;
1787 pin_range->range.name = gc->label;
fdeb8e15 1788 pin_range->range.base = gdev->base + gpio_offset;
586a87e6
CR
1789 pin_range->pctldev = pctldev;
1790
1791 ret = pinctrl_get_group_pins(pctldev, pin_group,
1792 &pin_range->range.pins,
1793 &pin_range->range.npins);
61c6375d
MN
1794 if (ret < 0) {
1795 kfree(pin_range);
586a87e6 1796 return ret;
61c6375d 1797 }
586a87e6
CR
1798
1799 pinctrl_add_gpio_range(pctldev, &pin_range->range);
1800
a0b66a73 1801 chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n",
1a2a99c6 1802 gpio_offset, gpio_offset + pin_range->range.npins - 1,
586a87e6
CR
1803 pinctrl_dev_get_devname(pctldev), pin_group);
1804
20ec3e39 1805 list_add_tail(&pin_range->node, &gdev->pin_ranges);
586a87e6
CR
1806
1807 return 0;
1808}
1809EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
1810
3f0f8670
LW
1811/**
1812 * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
a0b66a73 1813 * @gc: the gpiochip to add the range for
950d55f5 1814 * @pinctl_name: the dev_name() of the pin controller to map to
316511c0
LW
1815 * @gpio_offset: the start offset in the current gpio_chip number space
1816 * @pin_offset: the start offset in the pin controller number space
3f0f8670
LW
1817 * @npins: the number of pins from the offset of each pin space (GPIO and
1818 * pin controller) to accumulate in this range
950d55f5
TR
1819 *
1820 * Returns:
1821 * 0 on success, or a negative error-code on failure.
973c1714
CL
1822 *
1823 * Calling this function directly from a DeviceTree-supported
1824 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
1825 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
1826 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
3f0f8670 1827 */
a0b66a73 1828int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
316511c0 1829 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 1830 unsigned int npins)
f23f1516
SH
1831{
1832 struct gpio_pin_range *pin_range;
a0b66a73 1833 struct gpio_device *gdev = gc->gpiodev;
b4d4b1f0 1834 int ret;
f23f1516 1835
3f0f8670 1836 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
f23f1516 1837 if (!pin_range) {
a0b66a73 1838 chip_err(gc, "failed to allocate pin ranges\n");
1e63d7b9 1839 return -ENOMEM;
f23f1516
SH
1840 }
1841
3f0f8670 1842 /* Use local offset as range ID */
316511c0 1843 pin_range->range.id = gpio_offset;
a0b66a73
LW
1844 pin_range->range.gc = gc;
1845 pin_range->range.name = gc->label;
fdeb8e15 1846 pin_range->range.base = gdev->base + gpio_offset;
316511c0 1847 pin_range->range.pin_base = pin_offset;
f23f1516 1848 pin_range->range.npins = npins;
192c369c 1849 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
f23f1516 1850 &pin_range->range);
8f23ca1a 1851 if (IS_ERR(pin_range->pctldev)) {
b4d4b1f0 1852 ret = PTR_ERR(pin_range->pctldev);
a0b66a73 1853 chip_err(gc, "could not create pin range\n");
3f0f8670 1854 kfree(pin_range);
b4d4b1f0 1855 return ret;
3f0f8670 1856 }
a0b66a73 1857 chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
1a2a99c6 1858 gpio_offset, gpio_offset + npins - 1,
316511c0
LW
1859 pinctl_name,
1860 pin_offset, pin_offset + npins - 1);
f23f1516 1861
20ec3e39 1862 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1e63d7b9
LW
1863
1864 return 0;
f23f1516 1865}
165adc9c 1866EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
f23f1516 1867
3f0f8670
LW
1868/**
1869 * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
a0b66a73 1870 * @gc: the chip to remove all the mappings for
3f0f8670 1871 */
a0b66a73 1872void gpiochip_remove_pin_ranges(struct gpio_chip *gc)
f23f1516
SH
1873{
1874 struct gpio_pin_range *pin_range, *tmp;
a0b66a73 1875 struct gpio_device *gdev = gc->gpiodev;
f23f1516 1876
20ec3e39 1877 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
f23f1516
SH
1878 list_del(&pin_range->node);
1879 pinctrl_remove_gpio_range(pin_range->pctldev,
1880 &pin_range->range);
3f0f8670 1881 kfree(pin_range);
f23f1516
SH
1882 }
1883}
165adc9c
LW
1884EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
1885
1886#endif /* CONFIG_PINCTRL */
f23f1516 1887
d2876d08
DB
1888/* These "optional" allocation calls help prevent drivers from stomping
1889 * on each other, and help provide better diagnostics in debugfs.
1890 * They're called even less than the "set direction" calls.
1891 */
fac9d885 1892static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
d2876d08 1893{
a0b66a73 1894 struct gpio_chip *gc = desc->gdev->chip;
d377f56f 1895 int ret;
d2876d08 1896 unsigned long flags;
3789f5ac 1897 unsigned offset;
d2876d08 1898
18534df4
MS
1899 if (label) {
1900 label = kstrdup_const(label, GFP_KERNEL);
1901 if (!label)
1902 return -ENOMEM;
1903 }
1904
bcabdef1
AC
1905 spin_lock_irqsave(&gpio_lock, flags);
1906
d2876d08 1907 /* NOTE: gpio_request() can be called in early boot,
35e8bb51 1908 * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
d2876d08
DB
1909 */
1910
1911 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
1912 desc_set_label(desc, label ? : "?");
438d8908 1913 } else {
d377f56f 1914 ret = -EBUSY;
95d9f84f 1915 goto out_free_unlock;
35e8bb51
DB
1916 }
1917
a0b66a73
LW
1918 if (gc->request) {
1919 /* gc->request may sleep */
35e8bb51 1920 spin_unlock_irqrestore(&gpio_lock, flags);
3789f5ac 1921 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
1922 if (gpiochip_line_is_valid(gc, offset))
1923 ret = gc->request(gc, offset);
3789f5ac 1924 else
d377f56f 1925 ret = -EINVAL;
35e8bb51
DB
1926 spin_lock_irqsave(&gpio_lock, flags);
1927
8bbff39c 1928 if (ret) {
35e8bb51 1929 desc_set_label(desc, NULL);
35e8bb51 1930 clear_bit(FLAG_REQUESTED, &desc->flags);
95d9f84f 1931 goto out_free_unlock;
35e8bb51 1932 }
438d8908 1933 }
a0b66a73
LW
1934 if (gc->get_direction) {
1935 /* gc->get_direction may sleep */
80b0a602 1936 spin_unlock_irqrestore(&gpio_lock, flags);
372e722e 1937 gpiod_get_direction(desc);
80b0a602
MN
1938 spin_lock_irqsave(&gpio_lock, flags);
1939 }
77c2d792 1940 spin_unlock_irqrestore(&gpio_lock, flags);
95d9f84f
AS
1941 return 0;
1942
1943out_free_unlock:
1944 spin_unlock_irqrestore(&gpio_lock, flags);
1945 kfree_const(label);
d377f56f 1946 return ret;
77c2d792
MW
1947}
1948
fdeb8e15
LW
1949/*
1950 * This descriptor validation needs to be inserted verbatim into each
1951 * function taking a descriptor, so we need to use a preprocessor
54d77198
LW
1952 * macro to avoid endless duplication. If the desc is NULL it is an
1953 * optional GPIO and calls should just bail out.
fdeb8e15 1954 */
a746a232
RV
1955static int validate_desc(const struct gpio_desc *desc, const char *func)
1956{
1957 if (!desc)
1958 return 0;
1959 if (IS_ERR(desc)) {
1960 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
1961 return PTR_ERR(desc);
1962 }
1963 if (!desc->gdev) {
1964 pr_warn("%s: invalid GPIO (no device)\n", func);
1965 return -EINVAL;
1966 }
1967 if (!desc->gdev->chip) {
1968 dev_warn(&desc->gdev->dev,
1969 "%s: backing chip is gone\n", func);
1970 return 0;
1971 }
1972 return 1;
1973}
1974
fdeb8e15 1975#define VALIDATE_DESC(desc) do { \
a746a232
RV
1976 int __valid = validate_desc(desc, __func__); \
1977 if (__valid <= 0) \
1978 return __valid; \
1979 } while (0)
fdeb8e15
LW
1980
1981#define VALIDATE_DESC_VOID(desc) do { \
a746a232
RV
1982 int __valid = validate_desc(desc, __func__); \
1983 if (__valid <= 0) \
fdeb8e15 1984 return; \
a746a232 1985 } while (0)
fdeb8e15 1986
0eb4c6c2 1987int gpiod_request(struct gpio_desc *desc, const char *label)
77c2d792 1988{
d377f56f 1989 int ret = -EPROBE_DEFER;
fdeb8e15 1990 struct gpio_device *gdev;
77c2d792 1991
fdeb8e15
LW
1992 VALIDATE_DESC(desc);
1993 gdev = desc->gdev;
77c2d792 1994
fdeb8e15 1995 if (try_module_get(gdev->owner)) {
d377f56f 1996 ret = gpiod_request_commit(desc, label);
8bbff39c 1997 if (ret)
fdeb8e15 1998 module_put(gdev->owner);
33a68e86
LW
1999 else
2000 get_device(&gdev->dev);
77c2d792
MW
2001 }
2002
d377f56f
LW
2003 if (ret)
2004 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
77c2d792 2005
d377f56f 2006 return ret;
d2876d08 2007}
372e722e 2008
fac9d885 2009static bool gpiod_free_commit(struct gpio_desc *desc)
d2876d08 2010{
77c2d792 2011 bool ret = false;
d2876d08 2012 unsigned long flags;
a0b66a73 2013 struct gpio_chip *gc;
d2876d08 2014
3d599d1c
UKK
2015 might_sleep();
2016
372e722e 2017 gpiod_unexport(desc);
d8f388d8 2018
d2876d08
DB
2019 spin_lock_irqsave(&gpio_lock, flags);
2020
a0b66a73
LW
2021 gc = desc->gdev->chip;
2022 if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) {
2023 if (gc->free) {
35e8bb51 2024 spin_unlock_irqrestore(&gpio_lock, flags);
a0b66a73
LW
2025 might_sleep_if(gc->can_sleep);
2026 gc->free(gc, gpio_chip_hwgpio(desc));
35e8bb51
DB
2027 spin_lock_irqsave(&gpio_lock, flags);
2028 }
18534df4 2029 kfree_const(desc->label);
d2876d08 2030 desc_set_label(desc, NULL);
07697461 2031 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
35e8bb51 2032 clear_bit(FLAG_REQUESTED, &desc->flags);
aca5ce14 2033 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
25553ff0 2034 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
9225d516
DF
2035 clear_bit(FLAG_PULL_UP, &desc->flags);
2036 clear_bit(FLAG_PULL_DOWN, &desc->flags);
2148ad77 2037 clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
73e03419
KG
2038 clear_bit(FLAG_EDGE_RISING, &desc->flags);
2039 clear_bit(FLAG_EDGE_FALLING, &desc->flags);
f625d460 2040 clear_bit(FLAG_IS_HOGGED, &desc->flags);
63636d95
GU
2041#ifdef CONFIG_OF_DYNAMIC
2042 desc->hog = NULL;
65cff704
KG
2043#endif
2044#ifdef CONFIG_GPIO_CDEV
2045 WRITE_ONCE(desc->debounce_period_us, 0);
63636d95 2046#endif
77c2d792
MW
2047 ret = true;
2048 }
d2876d08
DB
2049
2050 spin_unlock_irqrestore(&gpio_lock, flags);
6accc376
KG
2051 blocking_notifier_call_chain(&desc->gdev->notifier,
2052 GPIOLINE_CHANGED_RELEASED, desc);
51c1064e 2053
77c2d792
MW
2054 return ret;
2055}
2056
0eb4c6c2 2057void gpiod_free(struct gpio_desc *desc)
77c2d792 2058{
fac9d885 2059 if (desc && desc->gdev && gpiod_free_commit(desc)) {
fdeb8e15 2060 module_put(desc->gdev->owner);
33a68e86
LW
2061 put_device(&desc->gdev->dev);
2062 } else {
77c2d792 2063 WARN_ON(extra_checks);
33a68e86 2064 }
d2876d08 2065}
372e722e 2066
d2876d08
DB
2067/**
2068 * gpiochip_is_requested - return string iff signal was requested
a0b66a73 2069 * @gc: controller managing the signal
d2876d08
DB
2070 * @offset: of signal within controller's 0..(ngpio - 1) range
2071 *
2072 * Returns NULL if the GPIO is not currently requested, else a string.
9c8318ff
AC
2073 * The string returned is the label passed to gpio_request(); if none has been
2074 * passed it is a meaningless, non-NULL constant.
d2876d08
DB
2075 *
2076 * This function is for use by GPIO controller drivers. The label can
2077 * help with diagnostics, and knowing that the signal is used as a GPIO
2078 * can help avoid accidentally multiplexing it to another controller.
2079 */
13daf489 2080const char *gpiochip_is_requested(struct gpio_chip *gc, unsigned int offset)
d2876d08 2081{
6c0b4e6c 2082 struct gpio_desc *desc;
6c0b4e6c 2083
a0b66a73 2084 desc = gpiochip_get_desc(gc, offset);
1739a2d8
BG
2085 if (IS_ERR(desc))
2086 return NULL;
6c0b4e6c 2087
372e722e 2088 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
d2876d08 2089 return NULL;
372e722e 2090 return desc->label;
d2876d08
DB
2091}
2092EXPORT_SYMBOL_GPL(gpiochip_is_requested);
2093
77c2d792
MW
2094/**
2095 * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
a0b66a73 2096 * @gc: GPIO chip
950d55f5 2097 * @hwnum: hardware number of the GPIO for which to request the descriptor
77c2d792 2098 * @label: label for the GPIO
5923ea6c
LW
2099 * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
2100 * specify things like line inversion semantics with the machine flags
2101 * such as GPIO_OUT_LOW
2102 * @dflags: descriptor request flags for this GPIO or 0 if default, this
2103 * can be used to specify consumer semantics such as open drain
77c2d792
MW
2104 *
2105 * Function allows GPIO chip drivers to request and use their own GPIO
2106 * descriptors via gpiolib API. Difference to gpiod_request() is that this
2107 * function will not increase reference count of the GPIO chip module. This
2108 * allows the GPIO chip module to be unloaded as needed (we assume that the
2109 * GPIO chip driver handles freeing the GPIOs it has requested).
950d55f5
TR
2110 *
2111 * Returns:
2112 * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
2113 * code on failure.
77c2d792 2114 */
a0b66a73 2115struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc,
06863620 2116 unsigned int hwnum,
21abf103 2117 const char *label,
5923ea6c
LW
2118 enum gpio_lookup_flags lflags,
2119 enum gpiod_flags dflags)
77c2d792 2120{
a0b66a73 2121 struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum);
d377f56f 2122 int ret;
77c2d792 2123
abdc08a3 2124 if (IS_ERR(desc)) {
a0b66a73 2125 chip_err(gc, "failed to get GPIO descriptor\n");
abdc08a3
AC
2126 return desc;
2127 }
2128
d377f56f
LW
2129 ret = gpiod_request_commit(desc, label);
2130 if (ret < 0)
2131 return ERR_PTR(ret);
77c2d792 2132
d377f56f
LW
2133 ret = gpiod_configure_flags(desc, label, lflags, dflags);
2134 if (ret) {
a0b66a73 2135 chip_err(gc, "setup of own GPIO %s failed\n", label);
21abf103 2136 gpiod_free_commit(desc);
d377f56f 2137 return ERR_PTR(ret);
21abf103
LW
2138 }
2139
abdc08a3 2140 return desc;
77c2d792 2141}
f7d4ad98 2142EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
77c2d792
MW
2143
2144/**
2145 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
2146 * @desc: GPIO descriptor to free
2147 *
2148 * Function frees the given GPIO requested previously with
2149 * gpiochip_request_own_desc().
2150 */
2151void gpiochip_free_own_desc(struct gpio_desc *desc)
2152{
2153 if (desc)
fac9d885 2154 gpiod_free_commit(desc);
77c2d792 2155}
f7d4ad98 2156EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
d2876d08 2157
fdeb8e15
LW
2158/*
2159 * Drivers MUST set GPIO direction before making get/set calls. In
d2876d08
DB
2160 * some cases this is done in early boot, before IRQs are enabled.
2161 *
2162 * As a rule these aren't called more than once (except for drivers
2163 * using the open-drain emulation idiom) so these are natural places
2164 * to accumulate extra debugging checks. Note that we can't (yet)
2165 * rely on gpio_request() having been called beforehand.
2166 */
2167
d99f8876 2168static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset,
62adc6f3 2169 unsigned long config)
71479789 2170{
d90f3685
BG
2171 if (!gc->set_config)
2172 return -ENOTSUPP;
542f3615 2173
62adc6f3 2174 return gc->set_config(gc, offset, config);
71479789
TP
2175}
2176
0c4d8666
AS
2177static int gpio_set_config_with_argument(struct gpio_desc *desc,
2178 enum pin_config_param mode,
2179 u32 argument)
d99f8876 2180{
a0b66a73 2181 struct gpio_chip *gc = desc->gdev->chip;
91b4ea5f 2182 unsigned long config;
0c4d8666
AS
2183
2184 config = pinconf_to_config_packed(mode, argument);
2185 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
2186}
2187
baca3b15
AS
2188static int gpio_set_config_with_argument_optional(struct gpio_desc *desc,
2189 enum pin_config_param mode,
2190 u32 argument)
2191{
2192 struct device *dev = &desc->gdev->dev;
2193 int gpio = gpio_chip_hwgpio(desc);
2194 int ret;
2195
2196 ret = gpio_set_config_with_argument(desc, mode, argument);
2197 if (ret != -ENOTSUPP)
2198 return ret;
d99f8876
BG
2199
2200 switch (mode) {
baca3b15
AS
2201 case PIN_CONFIG_PERSIST_STATE:
2202 dev_dbg(dev, "Persistence not supported for GPIO %d\n", gpio);
d99f8876 2203 break;
d99f8876 2204 default:
baca3b15 2205 break;
d99f8876
BG
2206 }
2207
baca3b15
AS
2208 return 0;
2209}
2210
0c4d8666
AS
2211static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode)
2212{
6aa32ad7 2213 return gpio_set_config_with_argument(desc, mode, 0);
d99f8876
BG
2214}
2215
5f4bf171 2216static int gpio_set_bias(struct gpio_desc *desc)
2148ad77 2217{
9ef6293c 2218 enum pin_config_param bias;
6aa32ad7 2219 unsigned int arg;
2148ad77
KG
2220
2221 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
2222 bias = PIN_CONFIG_BIAS_DISABLE;
2223 else if (test_bit(FLAG_PULL_UP, &desc->flags))
2224 bias = PIN_CONFIG_BIAS_PULL_UP;
2225 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
2226 bias = PIN_CONFIG_BIAS_PULL_DOWN;
9ef6293c
AS
2227 else
2228 return 0;
2148ad77 2229
6aa32ad7
AS
2230 switch (bias) {
2231 case PIN_CONFIG_BIAS_PULL_DOWN:
2232 case PIN_CONFIG_BIAS_PULL_UP:
2233 arg = 1;
2234 break;
2235
2236 default:
2237 arg = 0;
2238 break;
2148ad77 2239 }
6aa32ad7 2240
baca3b15 2241 return gpio_set_config_with_argument_optional(desc, bias, arg);
2148ad77
KG
2242}
2243
660c619b
AS
2244/**
2245 * gpio_set_debounce_timeout() - Set debounce timeout
2246 * @desc: GPIO descriptor to set the debounce timeout
2247 * @debounce: Debounce timeout in microseconds
2248 *
2249 * The function calls the certain GPIO driver to set debounce timeout
2250 * in the hardware.
2251 *
2252 * Returns 0 on success, or negative error code otherwise.
2253 */
f725edd8
AS
2254int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce)
2255{
2256 return gpio_set_config_with_argument_optional(desc,
2257 PIN_CONFIG_INPUT_DEBOUNCE,
2258 debounce);
2148ad77
KG
2259}
2260
79a9becd
AC
2261/**
2262 * gpiod_direction_input - set the GPIO direction to input
2263 * @desc: GPIO to set to input
2264 *
2265 * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
2266 * be called safely on it.
2267 *
2268 * Return 0 in case of success, else an error code.
2269 */
2270int gpiod_direction_input(struct gpio_desc *desc)
d2876d08 2271{
a0b66a73 2272 struct gpio_chip *gc;
d377f56f 2273 int ret = 0;
d2876d08 2274
fdeb8e15 2275 VALIDATE_DESC(desc);
a0b66a73 2276 gc = desc->gdev->chip;
bcabdef1 2277
e48d194d
LW
2278 /*
2279 * It is legal to have no .get() and .direction_input() specified if
2280 * the chip is output-only, but you can't specify .direction_input()
2281 * and not support the .get() operation, that doesn't make sense.
2282 */
a0b66a73 2283 if (!gc->get && gc->direction_input) {
6424de5a 2284 gpiod_warn(desc,
e48d194d
LW
2285 "%s: missing get() but have direction_input()\n",
2286 __func__);
be1a4b13
LW
2287 return -EIO;
2288 }
2289
e48d194d
LW
2290 /*
2291 * If we have a .direction_input() callback, things are simple,
2292 * just call it. Else we are some input-only chip so try to check the
2293 * direction (if .get_direction() is supported) else we silently
2294 * assume we are in input mode after this.
2295 */
a0b66a73
LW
2296 if (gc->direction_input) {
2297 ret = gc->direction_input(gc, gpio_chip_hwgpio(desc));
2298 } else if (gc->get_direction &&
2299 (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) {
ae9847f4 2300 gpiod_warn(desc,
e48d194d
LW
2301 "%s: missing direction_input() operation and line is output\n",
2302 __func__);
ae9847f4
RRD
2303 return -EIO;
2304 }
2148ad77 2305 if (ret == 0) {
d2876d08 2306 clear_bit(FLAG_IS_OUT, &desc->flags);
5f4bf171 2307 ret = gpio_set_bias(desc);
2148ad77 2308 }
d449991c 2309
d377f56f 2310 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
d82da797 2311
d377f56f 2312 return ret;
d2876d08 2313}
79a9becd 2314EXPORT_SYMBOL_GPL(gpiod_direction_input);
372e722e 2315
fac9d885 2316static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
d2876d08 2317{
c663e5f5 2318 struct gpio_chip *gc = desc->gdev->chip;
ad17731d 2319 int val = !!value;
ae9847f4 2320 int ret = 0;
d2876d08 2321
e48d194d
LW
2322 /*
2323 * It's OK not to specify .direction_output() if the gpiochip is
2324 * output-only, but if there is then not even a .set() operation it
2325 * is pretty tricky to drive the output line.
2326 */
ae9847f4 2327 if (!gc->set && !gc->direction_output) {
6424de5a 2328 gpiod_warn(desc,
e48d194d
LW
2329 "%s: missing set() and direction_output() operations\n",
2330 __func__);
be1a4b13
LW
2331 return -EIO;
2332 }
2333
ae9847f4
RRD
2334 if (gc->direction_output) {
2335 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
2336 } else {
e48d194d 2337 /* Check that we are in output mode if we can */
ae9847f4
RRD
2338 if (gc->get_direction &&
2339 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
2340 gpiod_warn(desc,
2341 "%s: missing direction_output() operation\n",
2342 __func__);
2343 return -EIO;
2344 }
e48d194d
LW
2345 /*
2346 * If we can't actively set the direction, we are some
2347 * output-only chip, so just drive the output as desired.
2348 */
ae9847f4
RRD
2349 gc->set(gc, gpio_chip_hwgpio(desc), val);
2350 }
2351
c663e5f5 2352 if (!ret)
d2876d08 2353 set_bit(FLAG_IS_OUT, &desc->flags);
ad17731d 2354 trace_gpio_value(desc_to_gpio(desc), 0, val);
c663e5f5
LW
2355 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
2356 return ret;
d2876d08 2357}
ef70bbe1
PZ
2358
2359/**
2360 * gpiod_direction_output_raw - set the GPIO direction to output
2361 * @desc: GPIO to set to output
2362 * @value: initial output value of the GPIO
2363 *
2364 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2365 * be called safely on it. The initial value of the output must be specified
2366 * as raw value on the physical line without regard for the ACTIVE_LOW status.
2367 *
2368 * Return 0 in case of success, else an error code.
2369 */
2370int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
2371{
fdeb8e15 2372 VALIDATE_DESC(desc);
fac9d885 2373 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1
PZ
2374}
2375EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
2376
2377/**
90df4fe0 2378 * gpiod_direction_output - set the GPIO direction to output
ef70bbe1
PZ
2379 * @desc: GPIO to set to output
2380 * @value: initial output value of the GPIO
2381 *
2382 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2383 * be called safely on it. The initial value of the output must be specified
2384 * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
2385 * account.
2386 *
2387 * Return 0 in case of success, else an error code.
2388 */
2389int gpiod_direction_output(struct gpio_desc *desc, int value)
2390{
02e47980
LW
2391 int ret;
2392
fdeb8e15 2393 VALIDATE_DESC(desc);
ef70bbe1
PZ
2394 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2395 value = !value;
ad17731d
LW
2396 else
2397 value = !!value;
02e47980 2398
4e9439dd
HV
2399 /* GPIOs used for enabled IRQs shall not be set as output */
2400 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
2401 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
02e47980
LW
2402 gpiod_err(desc,
2403 "%s: tried to set a GPIO tied to an IRQ as output\n",
2404 __func__);
2405 return -EIO;
2406 }
2407
2408 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
2409 /* First see if we can enable open drain in hardware */
83522358 2410 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN);
02e47980
LW
2411 if (!ret)
2412 goto set_output_value;
2413 /* Emulate open drain by not actively driving the line high */
e735244e
BG
2414 if (value) {
2415 ret = gpiod_direction_input(desc);
2416 goto set_output_flag;
2417 }
1cef8b50 2418 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
83522358 2419 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE);
02e47980
LW
2420 if (!ret)
2421 goto set_output_value;
2422 /* Emulate open source by not actively driving the line low */
e735244e
BG
2423 if (!value) {
2424 ret = gpiod_direction_input(desc);
2425 goto set_output_flag;
2426 }
02e47980 2427 } else {
83522358 2428 gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL);
02e47980
LW
2429 }
2430
2431set_output_value:
5f4bf171 2432 ret = gpio_set_bias(desc);
2821ae5f
KG
2433 if (ret)
2434 return ret;
fac9d885 2435 return gpiod_direction_output_raw_commit(desc, value);
e735244e
BG
2436
2437set_output_flag:
2438 /*
2439 * When emulating open-source or open-drain functionalities by not
2440 * actively driving the line (setting mode to input) we still need to
2441 * set the IS_OUT flag or otherwise we won't be able to set the line
2442 * value anymore.
2443 */
2444 if (ret == 0)
2445 set_bit(FLAG_IS_OUT, &desc->flags);
2446 return ret;
ef70bbe1 2447}
79a9becd 2448EXPORT_SYMBOL_GPL(gpiod_direction_output);
d2876d08 2449
42112dd7
DP
2450/**
2451 * gpiod_enable_hw_timestamp_ns - Enable hardware timestamp in nanoseconds.
2452 *
2453 * @desc: GPIO to enable.
2454 * @flags: Flags related to GPIO edge.
2455 *
2456 * Return 0 in case of success, else negative error code.
2457 */
2458int gpiod_enable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags)
2459{
2460 int ret = 0;
2461 struct gpio_chip *gc;
2462
2463 VALIDATE_DESC(desc);
2464
2465 gc = desc->gdev->chip;
2466 if (!gc->en_hw_timestamp) {
2467 gpiod_warn(desc, "%s: hw ts not supported\n", __func__);
2468 return -ENOTSUPP;
2469 }
2470
2471 ret = gc->en_hw_timestamp(gc, gpio_chip_hwgpio(desc), flags);
2472 if (ret)
2473 gpiod_warn(desc, "%s: hw ts request failed\n", __func__);
2474
2475 return ret;
2476}
2477EXPORT_SYMBOL_GPL(gpiod_enable_hw_timestamp_ns);
2478
2479/**
2480 * gpiod_disable_hw_timestamp_ns - Disable hardware timestamp.
2481 *
2482 * @desc: GPIO to disable.
2483 * @flags: Flags related to GPIO edge, same value as used during enable call.
2484 *
2485 * Return 0 in case of success, else negative error code.
2486 */
2487int gpiod_disable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags)
2488{
2489 int ret = 0;
2490 struct gpio_chip *gc;
2491
2492 VALIDATE_DESC(desc);
2493
2494 gc = desc->gdev->chip;
2495 if (!gc->dis_hw_timestamp) {
2496 gpiod_warn(desc, "%s: hw ts not supported\n", __func__);
2497 return -ENOTSUPP;
2498 }
2499
2500 ret = gc->dis_hw_timestamp(gc, gpio_chip_hwgpio(desc), flags);
2501 if (ret)
2502 gpiod_warn(desc, "%s: hw ts release failed\n", __func__);
2503
2504 return ret;
2505}
2506EXPORT_SYMBOL_GPL(gpiod_disable_hw_timestamp_ns);
2507
8ced32ff
GU
2508/**
2509 * gpiod_set_config - sets @config for a GPIO
2510 * @desc: descriptor of the GPIO for which to set the configuration
2511 * @config: Same packed config format as generic pinconf
2512 *
2513 * Returns:
2514 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2515 * configuration.
2516 */
2517int gpiod_set_config(struct gpio_desc *desc, unsigned long config)
2518{
a0b66a73 2519 struct gpio_chip *gc;
8ced32ff
GU
2520
2521 VALIDATE_DESC(desc);
a0b66a73 2522 gc = desc->gdev->chip;
8ced32ff 2523
a0b66a73 2524 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
8ced32ff
GU
2525}
2526EXPORT_SYMBOL_GPL(gpiod_set_config);
2527
c4b5be98 2528/**
950d55f5
TR
2529 * gpiod_set_debounce - sets @debounce time for a GPIO
2530 * @desc: descriptor of the GPIO for which to set debounce time
2531 * @debounce: debounce time in microseconds
65d87656 2532 *
950d55f5
TR
2533 * Returns:
2534 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2535 * debounce time.
c4b5be98 2536 */
13daf489 2537int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce)
c4b5be98 2538{
8ced32ff 2539 unsigned long config;
be1a4b13 2540
2956b5d9 2541 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
8ced32ff 2542 return gpiod_set_config(desc, config);
c4b5be98 2543}
79a9becd 2544EXPORT_SYMBOL_GPL(gpiod_set_debounce);
372e722e 2545
e10f72bf
AJ
2546/**
2547 * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
2548 * @desc: descriptor of the GPIO for which to configure persistence
2549 * @transitory: True to lose state on suspend or reset, false for persistence
2550 *
2551 * Returns:
2552 * 0 on success, otherwise a negative error code.
2553 */
2554int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
2555{
156dd392 2556 VALIDATE_DESC(desc);
e10f72bf
AJ
2557 /*
2558 * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
2559 * persistence state.
2560 */
4fc5bfeb 2561 assign_bit(FLAG_TRANSITORY, &desc->flags, transitory);
e10f72bf
AJ
2562
2563 /* If the driver supports it, set the persistence state now */
baca3b15
AS
2564 return gpio_set_config_with_argument_optional(desc,
2565 PIN_CONFIG_PERSIST_STATE,
2566 !transitory);
e10f72bf
AJ
2567}
2568EXPORT_SYMBOL_GPL(gpiod_set_transitory);
2569
79a9becd
AC
2570/**
2571 * gpiod_is_active_low - test whether a GPIO is active-low or not
2572 * @desc: the gpio descriptor to test
2573 *
2574 * Returns 1 if the GPIO is active-low, 0 otherwise.
2575 */
2576int gpiod_is_active_low(const struct gpio_desc *desc)
372e722e 2577{
fdeb8e15 2578 VALIDATE_DESC(desc);
79a9becd 2579 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
372e722e 2580}
79a9becd 2581EXPORT_SYMBOL_GPL(gpiod_is_active_low);
d2876d08 2582
d3a5bcb4
MM
2583/**
2584 * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not
2585 * @desc: the gpio descriptor to change
2586 */
2587void gpiod_toggle_active_low(struct gpio_desc *desc)
2588{
2589 VALIDATE_DESC_VOID(desc);
2590 change_bit(FLAG_ACTIVE_LOW, &desc->flags);
2591}
2592EXPORT_SYMBOL_GPL(gpiod_toggle_active_low);
2593
234c5209
AS
2594static int gpio_chip_get_value(struct gpio_chip *gc, const struct gpio_desc *desc)
2595{
2596 return gc->get ? gc->get(gc, gpio_chip_hwgpio(desc)) : -EIO;
2597}
2598
d2876d08
DB
2599/* I/O calls are only valid after configuration completed; the relevant
2600 * "is this a valid GPIO" error checks should already have been done.
2601 *
2602 * "Get" operations are often inlinable as reading a pin value register,
2603 * and masking the relevant bit in that register.
2604 *
2605 * When "set" operations are inlinable, they involve writing that mask to
2606 * one register to set a low value, or a different register to set it high.
2607 * Otherwise locking is needed, so there may be little value to inlining.
2608 *
2609 *------------------------------------------------------------------------
2610 *
2611 * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
2612 * have requested the GPIO. That can include implicit requesting by
2613 * a direction setting call. Marking a gpio as requested locks its chip
2614 * in memory, guaranteeing that these table lookups need no more locking
2615 * and that gpiochip_remove() will fail.
2616 *
2617 * REVISIT when debugging, consider adding some instrumentation to ensure
2618 * that the GPIO was actually requested.
2619 */
2620
fac9d885 2621static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
d2876d08 2622{
a0b66a73 2623 struct gpio_chip *gc;
e20538b8 2624 int value;
d2876d08 2625
a0b66a73 2626 gc = desc->gdev->chip;
234c5209 2627 value = gpio_chip_get_value(gc, desc);
723a6303 2628 value = value < 0 ? value : !!value;
372e722e 2629 trace_gpio_value(desc_to_gpio(desc), 1, value);
3f397c21 2630 return value;
d2876d08 2631}
372e722e 2632
a0b66a73 2633static int gpio_chip_get_multiple(struct gpio_chip *gc,
eec1d566
LW
2634 unsigned long *mask, unsigned long *bits)
2635{
1cef8b50 2636 if (gc->get_multiple)
a0b66a73 2637 return gc->get_multiple(gc, mask, bits);
1cef8b50 2638 if (gc->get) {
eec1d566
LW
2639 int i, value;
2640
a0b66a73
LW
2641 for_each_set_bit(i, mask, gc->ngpio) {
2642 value = gc->get(gc, i);
eec1d566
LW
2643 if (value < 0)
2644 return value;
2645 __assign_bit(i, bits, value);
2646 }
2647 return 0;
2648 }
2649 return -EIO;
2650}
2651
2652int gpiod_get_array_value_complex(bool raw, bool can_sleep,
2653 unsigned int array_size,
2654 struct gpio_desc **desc_array,
77588c14 2655 struct gpio_array *array_info,
b9762beb 2656 unsigned long *value_bitmap)
eec1d566 2657{
d377f56f 2658 int ret, i = 0;
b17566a6
JK
2659
2660 /*
2661 * Validate array_info against desc_array and its size.
2662 * It should immediately follow desc_array if both
2663 * have been obtained from the same gpiod_get_array() call.
2664 */
2665 if (array_info && array_info->desc == desc_array &&
2666 array_size <= array_info->size &&
2667 (void *)array_info == desc_array + array_info->size) {
2668 if (!can_sleep)
2669 WARN_ON(array_info->chip->can_sleep);
2670
d377f56f 2671 ret = gpio_chip_get_multiple(array_info->chip,
b17566a6
JK
2672 array_info->get_mask,
2673 value_bitmap);
d377f56f
LW
2674 if (ret)
2675 return ret;
b17566a6
JK
2676
2677 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2678 bitmap_xor(value_bitmap, value_bitmap,
2679 array_info->invert_mask, array_size);
2680
b17566a6 2681 i = find_first_zero_bit(array_info->get_mask, array_size);
ae66eca0
AS
2682 if (i == array_size)
2683 return 0;
b17566a6
JK
2684 } else {
2685 array_info = NULL;
2686 }
eec1d566
LW
2687
2688 while (i < array_size) {
a0b66a73 2689 struct gpio_chip *gc = desc_array[i]->gdev->chip;
c80c4435
AS
2690 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
2691 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
3027743f 2692 unsigned long *mask, *bits;
c07ea8d0 2693 int first, j;
eec1d566 2694
a0b66a73 2695 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
c80c4435
AS
2696 mask = fastpath_mask;
2697 bits = fastpath_bits;
3027743f 2698 } else {
c354c295
AS
2699 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
2700
2701 mask = bitmap_alloc(gc->ngpio, flags);
3027743f
LA
2702 if (!mask)
2703 return -ENOMEM;
c80c4435 2704
c354c295
AS
2705 bits = bitmap_alloc(gc->ngpio, flags);
2706 if (!bits) {
2707 bitmap_free(mask);
2708 return -ENOMEM;
2709 }
3027743f
LA
2710 }
2711
a0b66a73 2712 bitmap_zero(mask, gc->ngpio);
3027743f 2713
eec1d566 2714 if (!can_sleep)
a0b66a73 2715 WARN_ON(gc->can_sleep);
eec1d566
LW
2716
2717 /* collect all inputs belonging to the same chip */
2718 first = i;
eec1d566
LW
2719 do {
2720 const struct gpio_desc *desc = desc_array[i];
2721 int hwgpio = gpio_chip_hwgpio(desc);
2722
2723 __set_bit(hwgpio, mask);
2724 i++;
b17566a6
JK
2725
2726 if (array_info)
35ae7f96
JK
2727 i = find_next_zero_bit(array_info->get_mask,
2728 array_size, i);
eec1d566 2729 } while ((i < array_size) &&
a0b66a73 2730 (desc_array[i]->gdev->chip == gc));
eec1d566 2731
a0b66a73 2732 ret = gpio_chip_get_multiple(gc, mask, bits);
3027743f 2733 if (ret) {
c80c4435 2734 if (mask != fastpath_mask)
c354c295
AS
2735 bitmap_free(mask);
2736 if (bits != fastpath_bits)
2737 bitmap_free(bits);
eec1d566 2738 return ret;
3027743f 2739 }
eec1d566 2740
b17566a6 2741 for (j = first; j < i; ) {
eec1d566
LW
2742 const struct gpio_desc *desc = desc_array[j];
2743 int hwgpio = gpio_chip_hwgpio(desc);
2744 int value = test_bit(hwgpio, bits);
2745
2746 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2747 value = !value;
b9762beb 2748 __assign_bit(j, value_bitmap, value);
eec1d566 2749 trace_gpio_value(desc_to_gpio(desc), 1, value);
799d5eb4 2750 j++;
b17566a6
JK
2751
2752 if (array_info)
35ae7f96
JK
2753 j = find_next_zero_bit(array_info->get_mask, i,
2754 j);
eec1d566 2755 }
3027743f 2756
c80c4435 2757 if (mask != fastpath_mask)
c354c295
AS
2758 bitmap_free(mask);
2759 if (bits != fastpath_bits)
2760 bitmap_free(bits);
eec1d566
LW
2761 }
2762 return 0;
2763}
2764
d2876d08 2765/**
79a9becd
AC
2766 * gpiod_get_raw_value() - return a gpio's raw value
2767 * @desc: gpio whose value will be returned
d2876d08 2768 *
79a9becd 2769 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 2770 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd 2771 *
827a9b8b 2772 * This function can be called from contexts where we cannot sleep, and will
79a9becd 2773 * complain if the GPIO chip functions potentially sleep.
d2876d08 2774 */
79a9becd 2775int gpiod_get_raw_value(const struct gpio_desc *desc)
d2876d08 2776{
fdeb8e15 2777 VALIDATE_DESC(desc);
3285170f 2778 /* Should be using gpiod_get_raw_value_cansleep() */
fdeb8e15 2779 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 2780 return gpiod_get_raw_value_commit(desc);
d2876d08 2781}
79a9becd 2782EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
372e722e 2783
79a9becd
AC
2784/**
2785 * gpiod_get_value() - return a gpio's value
2786 * @desc: gpio whose value will be returned
2787 *
2788 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 2789 * account, or negative errno on failure.
79a9becd 2790 *
827a9b8b 2791 * This function can be called from contexts where we cannot sleep, and will
79a9becd
AC
2792 * complain if the GPIO chip functions potentially sleep.
2793 */
2794int gpiod_get_value(const struct gpio_desc *desc)
372e722e 2795{
79a9becd 2796 int value;
fdeb8e15
LW
2797
2798 VALIDATE_DESC(desc);
3285170f 2799 /* Should be using gpiod_get_value_cansleep() */
fdeb8e15 2800 WARN_ON(desc->gdev->chip->can_sleep);
79a9becd 2801
fac9d885 2802 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
2803 if (value < 0)
2804 return value;
2805
79a9becd
AC
2806 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2807 value = !value;
2808
2809 return value;
372e722e 2810}
79a9becd 2811EXPORT_SYMBOL_GPL(gpiod_get_value);
d2876d08 2812
eec1d566
LW
2813/**
2814 * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
b9762beb 2815 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 2816 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 2817 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2818 * @value_bitmap: bitmap to store the read values
eec1d566
LW
2819 *
2820 * Read the raw values of the GPIOs, i.e. the values of the physical lines
2821 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
2822 * else an error code.
2823 *
827a9b8b 2824 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
2825 * and it will complain if the GPIO chip functions potentially sleep.
2826 */
2827int gpiod_get_raw_array_value(unsigned int array_size,
b9762beb 2828 struct gpio_desc **desc_array,
77588c14 2829 struct gpio_array *array_info,
b9762beb 2830 unsigned long *value_bitmap)
eec1d566
LW
2831{
2832 if (!desc_array)
2833 return -EINVAL;
2834 return gpiod_get_array_value_complex(true, false, array_size,
77588c14
JK
2835 desc_array, array_info,
2836 value_bitmap);
eec1d566
LW
2837}
2838EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
2839
2840/**
2841 * gpiod_get_array_value() - read values from an array of GPIOs
b9762beb 2842 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 2843 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 2844 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2845 * @value_bitmap: bitmap to store the read values
eec1d566
LW
2846 *
2847 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
2848 * into account. Return 0 in case of success, else an error code.
2849 *
827a9b8b 2850 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
2851 * and it will complain if the GPIO chip functions potentially sleep.
2852 */
2853int gpiod_get_array_value(unsigned int array_size,
b9762beb 2854 struct gpio_desc **desc_array,
77588c14 2855 struct gpio_array *array_info,
b9762beb 2856 unsigned long *value_bitmap)
eec1d566
LW
2857{
2858 if (!desc_array)
2859 return -EINVAL;
2860 return gpiod_get_array_value_complex(false, false, array_size,
77588c14
JK
2861 desc_array, array_info,
2862 value_bitmap);
eec1d566
LW
2863}
2864EXPORT_SYMBOL_GPL(gpiod_get_array_value);
2865
aca5ce14 2866/*
fac9d885 2867 * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
79a9becd 2868 * @desc: gpio descriptor whose state need to be set.
20a8a968 2869 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
aca5ce14 2870 */
fac9d885 2871static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
aca5ce14 2872{
d377f56f 2873 int ret = 0;
a0b66a73 2874 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
2875 int offset = gpio_chip_hwgpio(desc);
2876
aca5ce14 2877 if (value) {
a0b66a73 2878 ret = gc->direction_input(gc, offset);
aca5ce14 2879 } else {
a0b66a73 2880 ret = gc->direction_output(gc, offset, 0);
d377f56f 2881 if (!ret)
372e722e 2882 set_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 2883 }
d377f56f
LW
2884 trace_gpio_direction(desc_to_gpio(desc), value, ret);
2885 if (ret < 0)
6424de5a
MB
2886 gpiod_err(desc,
2887 "%s: Error in set_value for open drain err %d\n",
d377f56f 2888 __func__, ret);
aca5ce14
LD
2889}
2890
25553ff0 2891/*
79a9becd
AC
2892 * _gpio_set_open_source_value() - Set the open source gpio's value.
2893 * @desc: gpio descriptor whose state need to be set.
20a8a968 2894 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
25553ff0 2895 */
fac9d885 2896static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
25553ff0 2897{
d377f56f 2898 int ret = 0;
a0b66a73 2899 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
2900 int offset = gpio_chip_hwgpio(desc);
2901
25553ff0 2902 if (value) {
a0b66a73 2903 ret = gc->direction_output(gc, offset, 1);
d377f56f 2904 if (!ret)
372e722e 2905 set_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 2906 } else {
a0b66a73 2907 ret = gc->direction_input(gc, offset);
25553ff0 2908 }
d377f56f
LW
2909 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
2910 if (ret < 0)
6424de5a
MB
2911 gpiod_err(desc,
2912 "%s: Error in set_value for open source err %d\n",
d377f56f 2913 __func__, ret);
25553ff0
LD
2914}
2915
fac9d885 2916static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
d2876d08 2917{
a0b66a73 2918 struct gpio_chip *gc;
d2876d08 2919
a0b66a73 2920 gc = desc->gdev->chip;
372e722e 2921 trace_gpio_value(desc_to_gpio(desc), 0, value);
a0b66a73 2922 gc->set(gc, gpio_chip_hwgpio(desc), value);
372e722e
AC
2923}
2924
5f424243
RI
2925/*
2926 * set multiple outputs on the same chip;
2927 * use the chip's set_multiple function if available;
2928 * otherwise set the outputs sequentially;
a0b66a73 2929 * @chip: the GPIO chip we operate on
5f424243
RI
2930 * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
2931 * defines which outputs are to be changed
2932 * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
2933 * defines the values the outputs specified by mask are to be set to
2934 */
a0b66a73 2935static void gpio_chip_set_multiple(struct gpio_chip *gc,
5f424243
RI
2936 unsigned long *mask, unsigned long *bits)
2937{
a0b66a73
LW
2938 if (gc->set_multiple) {
2939 gc->set_multiple(gc, mask, bits);
5f424243 2940 } else {
5e4e6fb3
AS
2941 unsigned int i;
2942
2943 /* set outputs if the corresponding mask bit is set */
a0b66a73
LW
2944 for_each_set_bit(i, mask, gc->ngpio)
2945 gc->set(gc, i, test_bit(i, bits));
5f424243
RI
2946 }
2947}
2948
3027743f 2949int gpiod_set_array_value_complex(bool raw, bool can_sleep,
3c940660
GU
2950 unsigned int array_size,
2951 struct gpio_desc **desc_array,
2952 struct gpio_array *array_info,
2953 unsigned long *value_bitmap)
5f424243
RI
2954{
2955 int i = 0;
2956
b17566a6
JK
2957 /*
2958 * Validate array_info against desc_array and its size.
2959 * It should immediately follow desc_array if both
2960 * have been obtained from the same gpiod_get_array() call.
2961 */
2962 if (array_info && array_info->desc == desc_array &&
2963 array_size <= array_info->size &&
2964 (void *)array_info == desc_array + array_info->size) {
2965 if (!can_sleep)
2966 WARN_ON(array_info->chip->can_sleep);
2967
2968 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2969 bitmap_xor(value_bitmap, value_bitmap,
2970 array_info->invert_mask, array_size);
2971
2972 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
2973 value_bitmap);
2974
b17566a6 2975 i = find_first_zero_bit(array_info->set_mask, array_size);
ae66eca0
AS
2976 if (i == array_size)
2977 return 0;
b17566a6
JK
2978 } else {
2979 array_info = NULL;
2980 }
2981
5f424243 2982 while (i < array_size) {
a0b66a73 2983 struct gpio_chip *gc = desc_array[i]->gdev->chip;
c80c4435
AS
2984 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
2985 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
3027743f 2986 unsigned long *mask, *bits;
5f424243
RI
2987 int count = 0;
2988
a0b66a73 2989 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
c80c4435
AS
2990 mask = fastpath_mask;
2991 bits = fastpath_bits;
3027743f 2992 } else {
c354c295
AS
2993 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
2994
2995 mask = bitmap_alloc(gc->ngpio, flags);
3027743f
LA
2996 if (!mask)
2997 return -ENOMEM;
c80c4435 2998
c354c295
AS
2999 bits = bitmap_alloc(gc->ngpio, flags);
3000 if (!bits) {
3001 bitmap_free(mask);
3002 return -ENOMEM;
3003 }
3027743f
LA
3004 }
3005
a0b66a73 3006 bitmap_zero(mask, gc->ngpio);
3027743f 3007
38e003f4 3008 if (!can_sleep)
a0b66a73 3009 WARN_ON(gc->can_sleep);
38e003f4 3010
5f424243
RI
3011 do {
3012 struct gpio_desc *desc = desc_array[i];
3013 int hwgpio = gpio_chip_hwgpio(desc);
b9762beb 3014 int value = test_bit(i, value_bitmap);
5f424243 3015
b17566a6
JK
3016 /*
3017 * Pins applicable for fast input but not for
3018 * fast output processing may have been already
3019 * inverted inside the fast path, skip them.
3020 */
3021 if (!raw && !(array_info &&
3022 test_bit(i, array_info->invert_mask)) &&
3023 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
5f424243
RI
3024 value = !value;
3025 trace_gpio_value(desc_to_gpio(desc), 0, value);
3026 /*
3027 * collect all normal outputs belonging to the same chip
3028 * open drain and open source outputs are set individually
3029 */
02e47980 3030 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
fac9d885 3031 gpio_set_open_drain_value_commit(desc, value);
02e47980 3032 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
fac9d885 3033 gpio_set_open_source_value_commit(desc, value);
5f424243
RI
3034 } else {
3035 __set_bit(hwgpio, mask);
4fc5bfeb 3036 __assign_bit(hwgpio, bits, value);
5f424243
RI
3037 count++;
3038 }
3039 i++;
b17566a6
JK
3040
3041 if (array_info)
35ae7f96
JK
3042 i = find_next_zero_bit(array_info->set_mask,
3043 array_size, i);
fdeb8e15 3044 } while ((i < array_size) &&
a0b66a73 3045 (desc_array[i]->gdev->chip == gc));
5f424243 3046 /* push collected bits to outputs */
38e003f4 3047 if (count != 0)
a0b66a73 3048 gpio_chip_set_multiple(gc, mask, bits);
3027743f 3049
c80c4435 3050 if (mask != fastpath_mask)
c354c295
AS
3051 bitmap_free(mask);
3052 if (bits != fastpath_bits)
3053 bitmap_free(bits);
5f424243 3054 }
3027743f 3055 return 0;
5f424243
RI
3056}
3057
d2876d08 3058/**
79a9becd
AC
3059 * gpiod_set_raw_value() - assign a gpio's raw value
3060 * @desc: gpio whose value will be assigned
d2876d08 3061 * @value: value to assign
d2876d08 3062 *
79a9becd
AC
3063 * Set the raw value of the GPIO, i.e. the value of its physical line without
3064 * regard for its ACTIVE_LOW status.
3065 *
827a9b8b 3066 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3067 * complain if the GPIO chip functions potentially sleep.
d2876d08 3068 */
79a9becd 3069void gpiod_set_raw_value(struct gpio_desc *desc, int value)
372e722e 3070{
fdeb8e15 3071 VALIDATE_DESC_VOID(desc);
3285170f 3072 /* Should be using gpiod_set_raw_value_cansleep() */
fdeb8e15 3073 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3074 gpiod_set_raw_value_commit(desc, value);
d2876d08 3075}
79a9becd 3076EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
d2876d08 3077
1e77fc82
GU
3078/**
3079 * gpiod_set_value_nocheck() - set a GPIO line value without checking
3080 * @desc: the descriptor to set the value on
3081 * @value: value to set
3082 *
3083 * This sets the value of a GPIO line backing a descriptor, applying
3084 * different semantic quirks like active low and open drain/source
3085 * handling.
3086 */
3087static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
3088{
3089 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3090 value = !value;
3091 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
3092 gpio_set_open_drain_value_commit(desc, value);
3093 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
3094 gpio_set_open_source_value_commit(desc, value);
3095 else
3096 gpiod_set_raw_value_commit(desc, value);
3097}
3098
d2876d08 3099/**
79a9becd
AC
3100 * gpiod_set_value() - assign a gpio's value
3101 * @desc: gpio whose value will be assigned
3102 * @value: value to assign
3103 *
02e47980
LW
3104 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
3105 * OPEN_DRAIN and OPEN_SOURCE flags into account.
d2876d08 3106 *
827a9b8b 3107 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3108 * complain if the GPIO chip functions potentially sleep.
d2876d08 3109 */
79a9becd 3110void gpiod_set_value(struct gpio_desc *desc, int value)
d2876d08 3111{
fdeb8e15 3112 VALIDATE_DESC_VOID(desc);
3285170f 3113 /* Should be using gpiod_set_value_cansleep() */
fdeb8e15 3114 WARN_ON(desc->gdev->chip->can_sleep);
1e77fc82 3115 gpiod_set_value_nocheck(desc, value);
372e722e 3116}
79a9becd 3117EXPORT_SYMBOL_GPL(gpiod_set_value);
d2876d08 3118
5f424243 3119/**
3fff99bc 3120 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
b9762beb 3121 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3122 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3123 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3124 * @value_bitmap: bitmap of values to assign
5f424243
RI
3125 *
3126 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3127 * without regard for their ACTIVE_LOW status.
3128 *
827a9b8b 3129 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3130 * complain if the GPIO chip functions potentially sleep.
3131 */
3027743f 3132int gpiod_set_raw_array_value(unsigned int array_size,
3c940660
GU
3133 struct gpio_desc **desc_array,
3134 struct gpio_array *array_info,
3135 unsigned long *value_bitmap)
5f424243
RI
3136{
3137 if (!desc_array)
3027743f
LA
3138 return -EINVAL;
3139 return gpiod_set_array_value_complex(true, false, array_size,
77588c14 3140 desc_array, array_info, value_bitmap);
5f424243 3141}
3fff99bc 3142EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
5f424243
RI
3143
3144/**
3fff99bc 3145 * gpiod_set_array_value() - assign values to an array of GPIOs
b9762beb 3146 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3147 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3148 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3149 * @value_bitmap: bitmap of values to assign
5f424243
RI
3150 *
3151 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3152 * into account.
3153 *
827a9b8b 3154 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3155 * complain if the GPIO chip functions potentially sleep.
3156 */
cf9af0d5
GU
3157int gpiod_set_array_value(unsigned int array_size,
3158 struct gpio_desc **desc_array,
3159 struct gpio_array *array_info,
3160 unsigned long *value_bitmap)
5f424243
RI
3161{
3162 if (!desc_array)
cf9af0d5
GU
3163 return -EINVAL;
3164 return gpiod_set_array_value_complex(false, false, array_size,
3165 desc_array, array_info,
3166 value_bitmap);
5f424243 3167}
3fff99bc 3168EXPORT_SYMBOL_GPL(gpiod_set_array_value);
5f424243 3169
d2876d08 3170/**
79a9becd
AC
3171 * gpiod_cansleep() - report whether gpio value access may sleep
3172 * @desc: gpio to check
d2876d08 3173 *
d2876d08 3174 */
79a9becd 3175int gpiod_cansleep(const struct gpio_desc *desc)
372e722e 3176{
fdeb8e15
LW
3177 VALIDATE_DESC(desc);
3178 return desc->gdev->chip->can_sleep;
d2876d08 3179}
79a9becd 3180EXPORT_SYMBOL_GPL(gpiod_cansleep);
d2876d08 3181
90b39402
LW
3182/**
3183 * gpiod_set_consumer_name() - set the consumer name for the descriptor
3184 * @desc: gpio to set the consumer name on
3185 * @name: the new consumer name
3186 */
18534df4 3187int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
90b39402 3188{
18534df4
MS
3189 VALIDATE_DESC(desc);
3190 if (name) {
3191 name = kstrdup_const(name, GFP_KERNEL);
3192 if (!name)
3193 return -ENOMEM;
3194 }
3195
3196 kfree_const(desc->label);
3197 desc_set_label(desc, name);
3198
3199 return 0;
90b39402
LW
3200}
3201EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
3202
0f6d504e 3203/**
79a9becd
AC
3204 * gpiod_to_irq() - return the IRQ corresponding to a GPIO
3205 * @desc: gpio whose IRQ will be returned (already requested)
0f6d504e 3206 *
79a9becd
AC
3207 * Return the IRQ corresponding to the passed GPIO, or an error code in case of
3208 * error.
0f6d504e 3209 */
79a9becd 3210int gpiod_to_irq(const struct gpio_desc *desc)
0f6d504e 3211{
a0b66a73 3212 struct gpio_chip *gc;
4c37ce86 3213 int offset;
0f6d504e 3214
79bb71bd
LW
3215 /*
3216 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
3217 * requires this function to not return zero on an invalid descriptor
3218 * but rather a negative error number.
3219 */
bfbbe44d 3220 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
79bb71bd
LW
3221 return -EINVAL;
3222
a0b66a73 3223 gc = desc->gdev->chip;
372e722e 3224 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
3225 if (gc->to_irq) {
3226 int retirq = gc->to_irq(gc, offset);
4c37ce86
LW
3227
3228 /* Zero means NO_IRQ */
3229 if (!retirq)
3230 return -ENXIO;
3231
3232 return retirq;
3233 }
ae42f928
SP
3234#ifdef CONFIG_GPIOLIB_IRQCHIP
3235 if (gc->irq.chip) {
3236 /*
3237 * Avoid race condition with other code, which tries to lookup
3238 * an IRQ before the irqchip has been properly registered,
3239 * i.e. while gpiochip is still being brought up.
3240 */
3241 return -EPROBE_DEFER;
3242 }
3243#endif
4c37ce86 3244 return -ENXIO;
0f6d504e 3245}
79a9becd 3246EXPORT_SYMBOL_GPL(gpiod_to_irq);
0f6d504e 3247
d468bf9e 3248/**
e3a2e878 3249 * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
a0b66a73 3250 * @gc: the chip the GPIO to lock belongs to
d74be6df 3251 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3252 *
3253 * This is used directly by GPIO drivers that want to lock down
f438acdf 3254 * a certain GPIO line to be used for IRQs.
d468bf9e 3255 */
a0b66a73 3256int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset)
372e722e 3257{
9c10280d
LW
3258 struct gpio_desc *desc;
3259
a0b66a73 3260 desc = gpiochip_get_desc(gc, offset);
9c10280d
LW
3261 if (IS_ERR(desc))
3262 return PTR_ERR(desc);
3263
60f8339e
LW
3264 /*
3265 * If it's fast: flush the direction setting if something changed
3266 * behind our back
3267 */
a0b66a73 3268 if (!gc->can_sleep && gc->get_direction) {
80956790 3269 int dir = gpiod_get_direction(desc);
9c10280d 3270
36b31279 3271 if (dir < 0) {
a0b66a73 3272 chip_err(gc, "%s: cannot get GPIO direction\n",
36b31279
AS
3273 __func__);
3274 return dir;
3275 }
9c10280d 3276 }
d468bf9e 3277
e9bdf7e6
LW
3278 /* To be valid for IRQ the line needs to be input or open drain */
3279 if (test_bit(FLAG_IS_OUT, &desc->flags) &&
3280 !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
a0b66a73 3281 chip_err(gc,
b1911710
AS
3282 "%s: tried to flag a GPIO set as output for IRQ\n",
3283 __func__);
d468bf9e
LW
3284 return -EIO;
3285 }
3286
9c10280d 3287 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3288 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3289
3290 /*
3291 * If the consumer has not set up a label (such as when the
3292 * IRQ is referenced from .to_irq()) we set up a label here
3293 * so it is clear this is used as an interrupt.
3294 */
3295 if (!desc->label)
3296 desc_set_label(desc, "interrupt");
3297
d468bf9e 3298 return 0;
372e722e 3299}
e3a2e878 3300EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
d2876d08 3301
d468bf9e 3302/**
e3a2e878 3303 * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
a0b66a73 3304 * @gc: the chip the GPIO to lock belongs to
d74be6df 3305 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3306 *
3307 * This is used directly by GPIO drivers that want to indicate
3308 * that a certain GPIO is no longer used exclusively for IRQ.
d2876d08 3309 */
a0b66a73 3310void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset)
d468bf9e 3311{
3940c34a
LW
3312 struct gpio_desc *desc;
3313
a0b66a73 3314 desc = gpiochip_get_desc(gc, offset);
3940c34a 3315 if (IS_ERR(desc))
d468bf9e 3316 return;
d2876d08 3317
3940c34a 3318 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3319 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3320
3321 /* If we only had this marking, erase it */
3322 if (desc->label && !strcmp(desc->label, "interrupt"))
3323 desc_set_label(desc, NULL);
d468bf9e 3324}
e3a2e878 3325EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
d468bf9e 3326
a0b66a73 3327void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3328{
a0b66a73 3329 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3330
3331 if (!IS_ERR(desc) &&
3332 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
3333 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3334}
3335EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
3336
a0b66a73 3337void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3338{
a0b66a73 3339 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3340
3341 if (!IS_ERR(desc) &&
3342 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
e9bdf7e6
LW
3343 /*
3344 * We must not be output when using IRQ UNLESS we are
3345 * open drain.
3346 */
3347 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) &&
3348 !test_bit(FLAG_OPEN_DRAIN, &desc->flags));
4e9439dd
HV
3349 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3350 }
3351}
3352EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
3353
a0b66a73 3354bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset)
6cee3821 3355{
a0b66a73 3356 if (offset >= gc->ngpio)
6cee3821
LW
3357 return false;
3358
a0b66a73 3359 return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags);
6cee3821
LW
3360}
3361EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
3362
a0b66a73 3363int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238
HV
3364{
3365 int ret;
3366
a0b66a73 3367 if (!try_module_get(gc->gpiodev->owner))
4e6b8238
HV
3368 return -ENODEV;
3369
a0b66a73 3370 ret = gpiochip_lock_as_irq(gc, offset);
4e6b8238 3371 if (ret) {
a0b66a73
LW
3372 chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset);
3373 module_put(gc->gpiodev->owner);
4e6b8238
HV
3374 return ret;
3375 }
3376 return 0;
3377}
3378EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
3379
a0b66a73 3380void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238 3381{
a0b66a73
LW
3382 gpiochip_unlock_as_irq(gc, offset);
3383 module_put(gc->gpiodev->owner);
4e6b8238
HV
3384}
3385EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
3386
a0b66a73 3387bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset)
143b65d6 3388{
a0b66a73 3389 if (offset >= gc->ngpio)
143b65d6
LW
3390 return false;
3391
a0b66a73 3392 return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3393}
3394EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
3395
a0b66a73 3396bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset)
143b65d6 3397{
a0b66a73 3398 if (offset >= gc->ngpio)
143b65d6
LW
3399 return false;
3400
a0b66a73 3401 return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3402}
3403EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
3404
a0b66a73 3405bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset)
05f479bf 3406{
a0b66a73 3407 if (offset >= gc->ngpio)
05f479bf
CK
3408 return false;
3409
a0b66a73 3410 return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags);
05f479bf
CK
3411}
3412EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
3413
79a9becd
AC
3414/**
3415 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
3416 * @desc: gpio whose value will be returned
3417 *
3418 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3419 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd
AC
3420 *
3421 * This function is to be called from contexts that can sleep.
d2876d08 3422 */
79a9becd 3423int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
d2876d08 3424{
d2876d08 3425 might_sleep_if(extra_checks);
fdeb8e15 3426 VALIDATE_DESC(desc);
fac9d885 3427 return gpiod_get_raw_value_commit(desc);
d2876d08 3428}
79a9becd 3429EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
372e722e 3430
79a9becd
AC
3431/**
3432 * gpiod_get_value_cansleep() - return a gpio's value
3433 * @desc: gpio whose value will be returned
3434 *
3435 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3436 * account, or negative errno on failure.
79a9becd
AC
3437 *
3438 * This function is to be called from contexts that can sleep.
3439 */
3440int gpiod_get_value_cansleep(const struct gpio_desc *desc)
d2876d08 3441{
3f397c21 3442 int value;
d2876d08
DB
3443
3444 might_sleep_if(extra_checks);
fdeb8e15 3445 VALIDATE_DESC(desc);
fac9d885 3446 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3447 if (value < 0)
3448 return value;
3449
79a9becd
AC
3450 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3451 value = !value;
3452
3f397c21 3453 return value;
d2876d08 3454}
79a9becd 3455EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
372e722e 3456
eec1d566
LW
3457/**
3458 * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
b9762beb 3459 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3460 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3461 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3462 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3463 *
3464 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3465 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3466 * else an error code.
3467 *
3468 * This function is to be called from contexts that can sleep.
3469 */
3470int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
3471 struct gpio_desc **desc_array,
77588c14 3472 struct gpio_array *array_info,
b9762beb 3473 unsigned long *value_bitmap)
eec1d566
LW
3474{
3475 might_sleep_if(extra_checks);
3476 if (!desc_array)
3477 return -EINVAL;
3478 return gpiod_get_array_value_complex(true, true, array_size,
77588c14
JK
3479 desc_array, array_info,
3480 value_bitmap);
eec1d566
LW
3481}
3482EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
3483
3484/**
3485 * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
b9762beb 3486 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3487 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3488 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3489 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3490 *
3491 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3492 * into account. Return 0 in case of success, else an error code.
3493 *
3494 * This function is to be called from contexts that can sleep.
3495 */
3496int gpiod_get_array_value_cansleep(unsigned int array_size,
3497 struct gpio_desc **desc_array,
77588c14 3498 struct gpio_array *array_info,
b9762beb 3499 unsigned long *value_bitmap)
eec1d566
LW
3500{
3501 might_sleep_if(extra_checks);
3502 if (!desc_array)
3503 return -EINVAL;
3504 return gpiod_get_array_value_complex(false, true, array_size,
77588c14
JK
3505 desc_array, array_info,
3506 value_bitmap);
eec1d566
LW
3507}
3508EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
3509
79a9becd
AC
3510/**
3511 * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
3512 * @desc: gpio whose value will be assigned
3513 * @value: value to assign
3514 *
3515 * Set the raw value of the GPIO, i.e. the value of its physical line without
3516 * regard for its ACTIVE_LOW status.
3517 *
3518 * This function is to be called from contexts that can sleep.
3519 */
3520void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
372e722e 3521{
d2876d08 3522 might_sleep_if(extra_checks);
fdeb8e15 3523 VALIDATE_DESC_VOID(desc);
fac9d885 3524 gpiod_set_raw_value_commit(desc, value);
372e722e 3525}
79a9becd 3526EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
d2876d08 3527
79a9becd
AC
3528/**
3529 * gpiod_set_value_cansleep() - assign a gpio's value
3530 * @desc: gpio whose value will be assigned
3531 * @value: value to assign
3532 *
3533 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
3534 * account
3535 *
3536 * This function is to be called from contexts that can sleep.
3537 */
3538void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
d2876d08 3539{
d2876d08 3540 might_sleep_if(extra_checks);
fdeb8e15 3541 VALIDATE_DESC_VOID(desc);
1e77fc82 3542 gpiod_set_value_nocheck(desc, value);
372e722e 3543}
79a9becd 3544EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
d2876d08 3545
5f424243 3546/**
3fff99bc 3547 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3548 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3549 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3550 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3551 * @value_bitmap: bitmap of values to assign
5f424243
RI
3552 *
3553 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3554 * without regard for their ACTIVE_LOW status.
3555 *
3556 * This function is to be called from contexts that can sleep.
3557 */
3027743f 3558int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3c940660
GU
3559 struct gpio_desc **desc_array,
3560 struct gpio_array *array_info,
3561 unsigned long *value_bitmap)
5f424243
RI
3562{
3563 might_sleep_if(extra_checks);
3564 if (!desc_array)
3027743f
LA
3565 return -EINVAL;
3566 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
77588c14 3567 array_info, value_bitmap);
5f424243 3568}
3fff99bc 3569EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
5f424243 3570
3946d187
DT
3571/**
3572 * gpiod_add_lookup_tables() - register GPIO device consumers
3573 * @tables: list of tables of consumers to register
3574 * @n: number of tables in the list
3575 */
3576void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
3577{
3578 unsigned int i;
3579
3580 mutex_lock(&gpio_lookup_lock);
3581
3582 for (i = 0; i < n; i++)
3583 list_add_tail(&tables[i]->list, &gpio_lookup_list);
3584
3585 mutex_unlock(&gpio_lookup_lock);
3586}
3587
5f424243 3588/**
3fff99bc 3589 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3590 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3591 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3592 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3593 * @value_bitmap: bitmap of values to assign
5f424243
RI
3594 *
3595 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3596 * into account.
3597 *
3598 * This function is to be called from contexts that can sleep.
3599 */
cf9af0d5
GU
3600int gpiod_set_array_value_cansleep(unsigned int array_size,
3601 struct gpio_desc **desc_array,
3602 struct gpio_array *array_info,
3603 unsigned long *value_bitmap)
5f424243
RI
3604{
3605 might_sleep_if(extra_checks);
3606 if (!desc_array)
cf9af0d5
GU
3607 return -EINVAL;
3608 return gpiod_set_array_value_complex(false, true, array_size,
3609 desc_array, array_info,
3610 value_bitmap);
5f424243 3611}
3fff99bc 3612EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
5f424243 3613
bae48da2 3614/**
ad824783
AC
3615 * gpiod_add_lookup_table() - register GPIO device consumers
3616 * @table: table of consumers to register
bae48da2 3617 */
ad824783 3618void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
bae48da2 3619{
49fdfe66 3620 gpiod_add_lookup_tables(&table, 1);
bae48da2 3621}
226b2242 3622EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
bae48da2 3623
be9015ab
SK
3624/**
3625 * gpiod_remove_lookup_table() - unregister GPIO device consumers
3626 * @table: table of consumers to unregister
3627 */
3628void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
3629{
d321ad12
AS
3630 /* Nothing to remove */
3631 if (!table)
3632 return;
3633
be9015ab
SK
3634 mutex_lock(&gpio_lookup_lock);
3635
3636 list_del(&table->list);
3637
3638 mutex_unlock(&gpio_lookup_lock);
3639}
226b2242 3640EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
be9015ab 3641
a411e81e
BG
3642/**
3643 * gpiod_add_hogs() - register a set of GPIO hogs from machine code
3644 * @hogs: table of gpio hog entries with a zeroed sentinel at the end
3645 */
3646void gpiod_add_hogs(struct gpiod_hog *hogs)
3647{
a0b66a73 3648 struct gpio_chip *gc;
a411e81e
BG
3649 struct gpiod_hog *hog;
3650
3651 mutex_lock(&gpio_machine_hogs_mutex);
3652
3653 for (hog = &hogs[0]; hog->chip_label; hog++) {
3654 list_add_tail(&hog->list, &gpio_machine_hogs);
3655
3656 /*
3657 * The chip may have been registered earlier, so check if it
3658 * exists and, if so, try to hog the line now.
3659 */
a0b66a73
LW
3660 gc = find_chip_by_name(hog->chip_label);
3661 if (gc)
3662 gpiochip_machine_hog(gc, hog);
a411e81e
BG
3663 }
3664
3665 mutex_unlock(&gpio_machine_hogs_mutex);
3666}
3667EXPORT_SYMBOL_GPL(gpiod_add_hogs);
3668
dd61b292
BG
3669void gpiod_remove_hogs(struct gpiod_hog *hogs)
3670{
3671 struct gpiod_hog *hog;
3672
3673 mutex_lock(&gpio_machine_hogs_mutex);
3674 for (hog = &hogs[0]; hog->chip_label; hog++)
3675 list_del(&hog->list);
3676 mutex_unlock(&gpio_machine_hogs_mutex);
3677}
3678EXPORT_SYMBOL_GPL(gpiod_remove_hogs);
3679
ad824783 3680static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
bae48da2
AC
3681{
3682 const char *dev_id = dev ? dev_name(dev) : NULL;
ad824783 3683 struct gpiod_lookup_table *table;
bae48da2
AC
3684
3685 mutex_lock(&gpio_lookup_lock);
3686
ad824783
AC
3687 list_for_each_entry(table, &gpio_lookup_list, list) {
3688 if (table->dev_id && dev_id) {
3689 /*
3690 * Valid strings on both ends, must be identical to have
3691 * a match
3692 */
3693 if (!strcmp(table->dev_id, dev_id))
3694 goto found;
3695 } else {
3696 /*
3697 * One of the pointers is NULL, so both must be to have
3698 * a match
3699 */
3700 if (dev_id == table->dev_id)
3701 goto found;
3702 }
3703 }
3704 table = NULL;
bae48da2 3705
ad824783
AC
3706found:
3707 mutex_unlock(&gpio_lookup_lock);
3708 return table;
3709}
bae48da2 3710
ad824783 3711static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
fed7026a 3712 unsigned int idx, unsigned long *flags)
ad824783 3713{
2a3cf6a3 3714 struct gpio_desc *desc = ERR_PTR(-ENOENT);
ad824783
AC
3715 struct gpiod_lookup_table *table;
3716 struct gpiod_lookup *p;
bae48da2 3717
ad824783
AC
3718 table = gpiod_find_lookup_table(dev);
3719 if (!table)
3720 return desc;
bae48da2 3721
4c033b54 3722 for (p = &table->table[0]; p->key; p++) {
a0b66a73 3723 struct gpio_chip *gc;
bae48da2 3724
ad824783 3725 /* idx must always match exactly */
bae48da2
AC
3726 if (p->idx != idx)
3727 continue;
3728
ad824783
AC
3729 /* If the lookup entry has a con_id, require exact match */
3730 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
3731 continue;
bae48da2 3732
4c033b54
GU
3733 if (p->chip_hwnum == U16_MAX) {
3734 desc = gpio_name_to_desc(p->key);
3735 if (desc) {
3736 *flags = p->flags;
3737 return desc;
3738 }
3739
3740 dev_warn(dev, "cannot find GPIO line %s, deferring\n",
3741 p->key);
3742 return ERR_PTR(-EPROBE_DEFER);
3743 }
3744
3745 gc = find_chip_by_name(p->key);
bae48da2 3746
a0b66a73 3747 if (!gc) {
8853daf3
JK
3748 /*
3749 * As the lookup table indicates a chip with
4c033b54 3750 * p->key should exist, assume it may
8853daf3
JK
3751 * still appear later and let the interested
3752 * consumer be probed again or let the Deferred
3753 * Probe infrastructure handle the error.
3754 */
3755 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
4c033b54 3756 p->key);
8853daf3 3757 return ERR_PTR(-EPROBE_DEFER);
ad824783 3758 }
bae48da2 3759
a0b66a73 3760 if (gc->ngpio <= p->chip_hwnum) {
2a3cf6a3 3761 dev_err(dev,
d935bd50 3762 "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n",
a0b66a73
LW
3763 idx, p->chip_hwnum, gc->ngpio - 1,
3764 gc->label);
2a3cf6a3 3765 return ERR_PTR(-EINVAL);
bae48da2 3766 }
bae48da2 3767
a0b66a73 3768 desc = gpiochip_get_desc(gc, p->chip_hwnum);
ad824783 3769 *flags = p->flags;
bae48da2 3770
2a3cf6a3 3771 return desc;
bae48da2
AC
3772 }
3773
bae48da2
AC
3774 return desc;
3775}
3776
66858527
RI
3777static int platform_gpio_count(struct device *dev, const char *con_id)
3778{
3779 struct gpiod_lookup_table *table;
3780 struct gpiod_lookup *p;
3781 unsigned int count = 0;
3782
3783 table = gpiod_find_lookup_table(dev);
3784 if (!table)
3785 return -ENOENT;
3786
4c033b54 3787 for (p = &table->table[0]; p->key; p++) {
66858527
RI
3788 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
3789 (!con_id && !p->con_id))
3790 count++;
3791 }
3792 if (!count)
3793 return -ENOENT;
3794
3795 return count;
3796}
3797
13949fa9
DT
3798/**
3799 * fwnode_gpiod_get_index - obtain a GPIO from firmware node
3800 * @fwnode: handle of the firmware node
3801 * @con_id: function within the GPIO consumer
3802 * @index: index of the GPIO to obtain for the consumer
3803 * @flags: GPIO initialization flags
3804 * @label: label to attach to the requested GPIO
3805 *
3806 * This function can be used for drivers that get their configuration
3807 * from opaque firmware.
3808 *
3809 * The function properly finds the corresponding GPIO using whatever is the
3810 * underlying firmware interface and then makes sure that the GPIO
3811 * descriptor is requested before it is returned to the caller.
3812 *
3813 * Returns:
3814 * On successful request the GPIO pin is configured in accordance with
3815 * provided @flags.
3816 *
3817 * In case of error an ERR_PTR() is returned.
3818 */
3819struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
3820 const char *con_id, int index,
3821 enum gpiod_flags flags,
3822 const char *label)
3823{
3824 struct gpio_desc *desc;
3825 char prop_name[32]; /* 32 is max size of property name */
3826 unsigned int i;
3827
3828 for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) {
3829 if (con_id)
3830 snprintf(prop_name, sizeof(prop_name), "%s-%s",
3831 con_id, gpio_suffixes[i]);
3832 else
3833 snprintf(prop_name, sizeof(prop_name), "%s",
3834 gpio_suffixes[i]);
3835
3836 desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags,
3837 label);
7b58696d 3838 if (!gpiod_not_found(desc))
13949fa9
DT
3839 break;
3840 }
3841
3842 return desc;
3843}
3844EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
3845
66858527
RI
3846/**
3847 * gpiod_count - return the number of GPIOs associated with a device / function
3848 * or -ENOENT if no GPIO has been assigned to the requested function
3849 * @dev: GPIO consumer, can be NULL for system-global GPIOs
3850 * @con_id: function within the GPIO consumer
3851 */
3852int gpiod_count(struct device *dev, const char *con_id)
3853{
944f4b0a 3854 const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
66858527
RI
3855 int count = -ENOENT;
3856
944f4b0a 3857 if (is_of_node(fwnode))
f626d6df 3858 count = of_gpio_get_count(dev, con_id);
944f4b0a 3859 else if (is_acpi_node(fwnode))
66858527
RI
3860 count = acpi_gpio_count(dev, con_id);
3861
3862 if (count < 0)
3863 count = platform_gpio_count(dev, con_id);
3864
3865 return count;
3866}
3867EXPORT_SYMBOL_GPL(gpiod_count);
3868
bae48da2 3869/**
0879162f 3870 * gpiod_get - obtain a GPIO for a given GPIO function
ad824783 3871 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2 3872 * @con_id: function within the GPIO consumer
39b2bbe3 3873 * @flags: optional GPIO initialization flags
bae48da2
AC
3874 *
3875 * Return the GPIO descriptor corresponding to the function con_id of device
2a3cf6a3 3876 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
20a8a968 3877 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
bae48da2 3878 */
b17d1bf1 3879struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
39b2bbe3 3880 enum gpiod_flags flags)
bae48da2 3881{
39b2bbe3 3882 return gpiod_get_index(dev, con_id, 0, flags);
bae48da2 3883}
b17d1bf1 3884EXPORT_SYMBOL_GPL(gpiod_get);
bae48da2 3885
29a1f233
TR
3886/**
3887 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
3888 * @dev: GPIO consumer, can be NULL for system-global GPIOs
3889 * @con_id: function within the GPIO consumer
39b2bbe3 3890 * @flags: optional GPIO initialization flags
29a1f233
TR
3891 *
3892 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
3893 * the requested function it will return NULL. This is convenient for drivers
3894 * that need to handle optional GPIOs.
3895 */
b17d1bf1 3896struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
39b2bbe3
AC
3897 const char *con_id,
3898 enum gpiod_flags flags)
29a1f233 3899{
39b2bbe3 3900 return gpiod_get_index_optional(dev, con_id, 0, flags);
29a1f233 3901}
b17d1bf1 3902EXPORT_SYMBOL_GPL(gpiod_get_optional);
29a1f233 3903
f625d460
BP
3904
3905/**
3906 * gpiod_configure_flags - helper function to configure a given GPIO
3907 * @desc: gpio whose value will be assigned
3908 * @con_id: function within the GPIO consumer
fed7026a
AS
3909 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
3910 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
3911 * @dflags: gpiod_flags - optional GPIO initialization flags
3912 *
3913 * Return 0 on success, -ENOENT if no GPIO has been assigned to the
3914 * requested function and/or index, or another IS_ERR() code if an error
3915 * occurred while trying to acquire the GPIO.
3916 */
c29fd9eb 3917int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
85b03b30 3918 unsigned long lflags, enum gpiod_flags dflags)
f625d460 3919{
d377f56f 3920 int ret;
f625d460 3921
85b03b30
JH
3922 if (lflags & GPIO_ACTIVE_LOW)
3923 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
f926dfc1 3924
85b03b30
JH
3925 if (lflags & GPIO_OPEN_DRAIN)
3926 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
f926dfc1
LW
3927 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
3928 /*
3929 * This enforces open drain mode from the consumer side.
3930 * This is necessary for some busses like I2C, but the lookup
3931 * should *REALLY* have specified them as open drain in the
3932 * first place, so print a little warning here.
3933 */
3934 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
3935 gpiod_warn(desc,
3936 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
3937 }
3938
85b03b30
JH
3939 if (lflags & GPIO_OPEN_SOURCE)
3940 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
e10f72bf 3941
d449991c
TP
3942 if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) {
3943 gpiod_err(desc,
3944 "both pull-up and pull-down enabled, invalid configuration\n");
3945 return -EINVAL;
3946 }
3947
3948 if (lflags & GPIO_PULL_UP)
3949 set_bit(FLAG_PULL_UP, &desc->flags);
3950 else if (lflags & GPIO_PULL_DOWN)
3951 set_bit(FLAG_PULL_DOWN, &desc->flags);
3952
d377f56f
LW
3953 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
3954 if (ret < 0)
3955 return ret;
85b03b30 3956
f625d460
BP
3957 /* No particular flag request, return here... */
3958 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
262b9011 3959 gpiod_dbg(desc, "no flags found for %s\n", con_id);
f625d460
BP
3960 return 0;
3961 }
3962
3963 /* Process flags */
3964 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
d377f56f 3965 ret = gpiod_direction_output(desc,
ad17731d 3966 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
f625d460 3967 else
d377f56f 3968 ret = gpiod_direction_input(desc);
f625d460 3969
d377f56f 3970 return ret;
f625d460
BP
3971}
3972
bae48da2
AC
3973/**
3974 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
fdd6a5fe 3975 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2
AC
3976 * @con_id: function within the GPIO consumer
3977 * @idx: index of the GPIO to obtain in the consumer
39b2bbe3 3978 * @flags: optional GPIO initialization flags
bae48da2
AC
3979 *
3980 * This variant of gpiod_get() allows to access GPIOs other than the first
3981 * defined one for functions that define several GPIOs.
3982 *
2a3cf6a3
AC
3983 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
3984 * requested function and/or index, or another IS_ERR() code if an error
20a8a968 3985 * occurred while trying to acquire the GPIO.
bae48da2 3986 */
b17d1bf1 3987struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
bae48da2 3988 const char *con_id,
39b2bbe3
AC
3989 unsigned int idx,
3990 enum gpiod_flags flags)
bae48da2 3991{
2d6c06f5 3992 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
35c5d7fd 3993 struct gpio_desc *desc = NULL;
d377f56f 3994 int ret;
7d18f0a1
LW
3995 /* Maybe we have a device name, maybe not */
3996 const char *devname = dev ? dev_name(dev) : "?";
944f4b0a 3997 const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
bae48da2
AC
3998
3999 dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id);
4000
944f4b0a
AS
4001 /* Using device tree? */
4002 if (is_of_node(fwnode)) {
4003 dev_dbg(dev, "using device tree for GPIO lookup\n");
4004 desc = of_find_gpio(dev, con_id, idx, &lookupflags);
4005 } else if (is_acpi_node(fwnode)) {
4006 dev_dbg(dev, "using ACPI for GPIO lookup\n");
4007 desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags);
35c5d7fd
AC
4008 }
4009
4010 /*
4011 * Either we are not using DT or ACPI, or their lookup did not return
4012 * a result. In that case, use platform lookup as a fallback.
4013 */
7b58696d 4014 if (!desc || gpiod_not_found(desc)) {
43a8785a 4015 dev_dbg(dev, "using lookup tables for GPIO lookup\n");
39b2bbe3 4016 desc = gpiod_find(dev, con_id, idx, &lookupflags);
bae48da2
AC
4017 }
4018
4019 if (IS_ERR(desc)) {
9d5a1f2c 4020 dev_dbg(dev, "No GPIO consumer %s found\n", con_id);
bae48da2
AC
4021 return desc;
4022 }
4023
7d18f0a1
LW
4024 /*
4025 * If a connection label was passed use that, else attempt to use
4026 * the device name as label
4027 */
322b86e7 4028 ret = gpiod_request(desc, con_id ?: devname);
8bbff39c 4029 if (ret) {
6105b2e3 4030 if (!(ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE))
d377f56f 4031 return ERR_PTR(ret);
6105b2e3
AS
4032
4033 /*
4034 * This happens when there are several consumers for
4035 * the same GPIO line: we just return here without
4036 * further initialization. It is a bit of a hack.
4037 * This is necessary to support fixed regulators.
4038 *
4039 * FIXME: Make this more sane and safe.
4040 */
4041 dev_info(dev, "nonexclusive access to GPIO for %s\n", con_id ?: devname);
4042 return desc;
b0ce7b29 4043 }
bae48da2 4044
d377f56f 4045 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
6392cca4 4046 if (ret < 0) {
39b2bbe3 4047 dev_dbg(dev, "setup of GPIO %s failed\n", con_id);
6392cca4
LW
4048 gpiod_put(desc);
4049 return ERR_PTR(ret);
4050 }
4051
6accc376
KG
4052 blocking_notifier_call_chain(&desc->gdev->notifier,
4053 GPIOLINE_CHANGED_REQUESTED, desc);
9fefca77 4054
6392cca4
LW
4055 return desc;
4056}
b17d1bf1 4057EXPORT_SYMBOL_GPL(gpiod_get_index);
6392cca4 4058
40b73183
MW
4059/**
4060 * fwnode_get_named_gpiod - obtain a GPIO from firmware node
4061 * @fwnode: handle of the firmware node
4062 * @propname: name of the firmware property representing the GPIO
6392cca4 4063 * @index: index of the GPIO to obtain for the consumer
a264d10f 4064 * @dflags: GPIO initialization flags
950d55f5 4065 * @label: label to attach to the requested GPIO
40b73183
MW
4066 *
4067 * This function can be used for drivers that get their configuration
6392cca4 4068 * from opaque firmware.
40b73183 4069 *
6392cca4 4070 * The function properly finds the corresponding GPIO using whatever is the
40b73183
MW
4071 * underlying firmware interface and then makes sure that the GPIO
4072 * descriptor is requested before it is returned to the caller.
4073 *
950d55f5 4074 * Returns:
ff21378a 4075 * On successful request the GPIO pin is configured in accordance with
a264d10f
AS
4076 * provided @dflags.
4077 *
40b73183
MW
4078 * In case of error an ERR_PTR() is returned.
4079 */
4080struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
537b94da 4081 const char *propname, int index,
b2987d74
AS
4082 enum gpiod_flags dflags,
4083 const char *label)
40b73183 4084{
2d6c06f5 4085 unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT;
40b73183 4086 struct gpio_desc *desc = ERR_PTR(-ENODEV);
40b73183
MW
4087 int ret;
4088
40b73183 4089 if (is_of_node(fwnode)) {
6392cca4
LW
4090 desc = gpiod_get_from_of_node(to_of_node(fwnode),
4091 propname, index,
4092 dflags,
4093 label);
4094 return desc;
40b73183
MW
4095 } else if (is_acpi_node(fwnode)) {
4096 struct acpi_gpio_info info;
4097
537b94da 4098 desc = acpi_node_get_gpiod(fwnode, propname, index, &info);
6392cca4
LW
4099 if (IS_ERR(desc))
4100 return desc;
40b73183 4101
6392cca4 4102 acpi_gpio_update_gpiod_flags(&dflags, &info);
606be344 4103 acpi_gpio_update_gpiod_lookup_flags(&lflags, &info);
944f4b0a
AS
4104 } else
4105 return ERR_PTR(-EINVAL);
40b73183 4106
6392cca4 4107 /* Currently only ACPI takes this path */
b2987d74 4108 ret = gpiod_request(desc, label);
85b03b30
JH
4109 if (ret)
4110 return ERR_PTR(ret);
4111
a264d10f
AS
4112 ret = gpiod_configure_flags(desc, propname, lflags, dflags);
4113 if (ret < 0) {
4114 gpiod_put(desc);
4115 return ERR_PTR(ret);
90b665f6
LP
4116 }
4117
6accc376
KG
4118 blocking_notifier_call_chain(&desc->gdev->notifier,
4119 GPIOLINE_CHANGED_REQUESTED, desc);
9fefca77 4120
40b73183
MW
4121 return desc;
4122}
4123EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod);
4124
29a1f233
TR
4125/**
4126 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
4127 * function
4128 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4129 * @con_id: function within the GPIO consumer
4130 * @index: index of the GPIO to obtain in the consumer
39b2bbe3 4131 * @flags: optional GPIO initialization flags
29a1f233
TR
4132 *
4133 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
4134 * specified index was assigned to the requested function it will return NULL.
4135 * This is convenient for drivers that need to handle optional GPIOs.
4136 */
b17d1bf1 4137struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
29a1f233 4138 const char *con_id,
39b2bbe3
AC
4139 unsigned int index,
4140 enum gpiod_flags flags)
29a1f233
TR
4141{
4142 struct gpio_desc *desc;
4143
39b2bbe3 4144 desc = gpiod_get_index(dev, con_id, index, flags);
7b58696d
AS
4145 if (gpiod_not_found(desc))
4146 return NULL;
29a1f233
TR
4147
4148 return desc;
4149}
b17d1bf1 4150EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
29a1f233 4151
f625d460
BP
4152/**
4153 * gpiod_hog - Hog the specified GPIO desc given the provided flags
4154 * @desc: gpio whose value will be assigned
4155 * @name: gpio line name
fed7026a
AS
4156 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4157 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4158 * @dflags: gpiod_flags - optional GPIO initialization flags
4159 */
4160int gpiod_hog(struct gpio_desc *desc, const char *name,
4161 unsigned long lflags, enum gpiod_flags dflags)
4162{
a0b66a73 4163 struct gpio_chip *gc;
f625d460
BP
4164 struct gpio_desc *local_desc;
4165 int hwnum;
d377f56f 4166 int ret;
f625d460 4167
a0b66a73 4168 gc = gpiod_to_chip(desc);
f625d460
BP
4169 hwnum = gpio_chip_hwgpio(desc);
4170
a0b66a73 4171 local_desc = gpiochip_request_own_desc(gc, hwnum, name,
5923ea6c 4172 lflags, dflags);
f625d460 4173 if (IS_ERR(local_desc)) {
d377f56f 4174 ret = PTR_ERR(local_desc);
c31a571d 4175 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
a0b66a73 4176 name, gc->label, hwnum, ret);
d377f56f 4177 return ret;
f625d460
BP
4178 }
4179
f625d460
BP
4180 /* Mark GPIO as hogged so it can be identified and removed later */
4181 set_bit(FLAG_IS_HOGGED, &desc->flags);
4182
262b9011 4183 gpiod_info(desc, "hogged as %s%s\n",
b27f300f
BG
4184 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
4185 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
4186 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
f625d460
BP
4187
4188 return 0;
4189}
4190
4191/**
4192 * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
a0b66a73 4193 * @gc: gpio chip to act on
f625d460 4194 */
a0b66a73 4195static void gpiochip_free_hogs(struct gpio_chip *gc)
f625d460 4196{
80c78fbe 4197 struct gpio_desc *desc;
f625d460 4198
57017edd 4199 for_each_gpio_desc_with_flag(gc, desc, FLAG_IS_HOGGED)
80c78fbe 4200 gpiochip_free_own_desc(desc);
f625d460
BP
4201}
4202
66858527
RI
4203/**
4204 * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
4205 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4206 * @con_id: function within the GPIO consumer
4207 * @flags: optional GPIO initialization flags
4208 *
4209 * This function acquires all the GPIOs defined under a given function.
4210 *
4211 * Return a struct gpio_descs containing an array of descriptors, -ENOENT if
4212 * no GPIO has been assigned to the requested function, or another IS_ERR()
4213 * code if an error occurred while trying to acquire the GPIOs.
4214 */
4215struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
4216 const char *con_id,
4217 enum gpiod_flags flags)
4218{
4219 struct gpio_desc *desc;
4220 struct gpio_descs *descs;
bf9346f5 4221 struct gpio_array *array_info = NULL;
a0b66a73 4222 struct gpio_chip *gc;
bf9346f5 4223 int count, bitmap_size;
66858527
RI
4224
4225 count = gpiod_count(dev, con_id);
4226 if (count < 0)
4227 return ERR_PTR(count);
4228
acafe7e3 4229 descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL);
66858527
RI
4230 if (!descs)
4231 return ERR_PTR(-ENOMEM);
4232
4233 for (descs->ndescs = 0; descs->ndescs < count; ) {
4234 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
4235 if (IS_ERR(desc)) {
4236 gpiod_put_array(descs);
4237 return ERR_CAST(desc);
4238 }
bf9346f5 4239
66858527 4240 descs->desc[descs->ndescs] = desc;
bf9346f5 4241
a0b66a73 4242 gc = gpiod_to_chip(desc);
bf9346f5 4243 /*
c4c958aa
JK
4244 * If pin hardware number of array member 0 is also 0, select
4245 * its chip as a candidate for fast bitmap processing path.
bf9346f5 4246 */
c4c958aa 4247 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
bf9346f5
JK
4248 struct gpio_descs *array;
4249
a0b66a73
LW
4250 bitmap_size = BITS_TO_LONGS(gc->ngpio > count ?
4251 gc->ngpio : count);
bf9346f5
JK
4252
4253 array = kzalloc(struct_size(descs, desc, count) +
4254 struct_size(array_info, invert_mask,
4255 3 * bitmap_size), GFP_KERNEL);
4256 if (!array) {
4257 gpiod_put_array(descs);
4258 return ERR_PTR(-ENOMEM);
4259 }
4260
4261 memcpy(array, descs,
4262 struct_size(descs, desc, descs->ndescs + 1));
4263 kfree(descs);
4264
4265 descs = array;
4266 array_info = (void *)(descs->desc + count);
4267 array_info->get_mask = array_info->invert_mask +
4268 bitmap_size;
4269 array_info->set_mask = array_info->get_mask +
4270 bitmap_size;
4271
4272 array_info->desc = descs->desc;
4273 array_info->size = count;
a0b66a73 4274 array_info->chip = gc;
bf9346f5
JK
4275 bitmap_set(array_info->get_mask, descs->ndescs,
4276 count - descs->ndescs);
4277 bitmap_set(array_info->set_mask, descs->ndescs,
4278 count - descs->ndescs);
4279 descs->info = array_info;
4280 }
c4c958aa 4281 /* Unmark array members which don't belong to the 'fast' chip */
a0b66a73 4282 if (array_info && array_info->chip != gc) {
bf9346f5
JK
4283 __clear_bit(descs->ndescs, array_info->get_mask);
4284 __clear_bit(descs->ndescs, array_info->set_mask);
c4c958aa
JK
4285 }
4286 /*
4287 * Detect array members which belong to the 'fast' chip
4288 * but their pins are not in hardware order.
4289 */
4290 else if (array_info &&
4291 gpio_chip_hwgpio(desc) != descs->ndescs) {
4292 /*
4293 * Don't use fast path if all array members processed so
4294 * far belong to the same chip as this one but its pin
4295 * hardware number is different from its array index.
4296 */
4297 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
4298 array_info = NULL;
4299 } else {
4300 __clear_bit(descs->ndescs,
4301 array_info->get_mask);
4302 __clear_bit(descs->ndescs,
4303 array_info->set_mask);
4304 }
bf9346f5
JK
4305 } else if (array_info) {
4306 /* Exclude open drain or open source from fast output */
a0b66a73
LW
4307 if (gpiochip_line_is_open_drain(gc, descs->ndescs) ||
4308 gpiochip_line_is_open_source(gc, descs->ndescs))
bf9346f5
JK
4309 __clear_bit(descs->ndescs,
4310 array_info->set_mask);
4311 /* Identify 'fast' pins which require invertion */
4312 if (gpiod_is_active_low(desc))
4313 __set_bit(descs->ndescs,
4314 array_info->invert_mask);
4315 }
4316
66858527
RI
4317 descs->ndescs++;
4318 }
bf9346f5
JK
4319 if (array_info)
4320 dev_dbg(dev,
4321 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
4322 array_info->chip->label, array_info->size,
4323 *array_info->get_mask, *array_info->set_mask,
4324 *array_info->invert_mask);
66858527
RI
4325 return descs;
4326}
4327EXPORT_SYMBOL_GPL(gpiod_get_array);
4328
4329/**
4330 * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
4331 * function
4332 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4333 * @con_id: function within the GPIO consumer
4334 * @flags: optional GPIO initialization flags
4335 *
4336 * This is equivalent to gpiod_get_array(), except that when no GPIO was
4337 * assigned to the requested function it will return NULL.
4338 */
4339struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
4340 const char *con_id,
4341 enum gpiod_flags flags)
4342{
4343 struct gpio_descs *descs;
4344
4345 descs = gpiod_get_array(dev, con_id, flags);
7b58696d 4346 if (gpiod_not_found(descs))
66858527
RI
4347 return NULL;
4348
4349 return descs;
4350}
4351EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
4352
bae48da2
AC
4353/**
4354 * gpiod_put - dispose of a GPIO descriptor
4355 * @desc: GPIO descriptor to dispose of
4356 *
4357 * No descriptor can be used after gpiod_put() has been called on it.
4358 */
4359void gpiod_put(struct gpio_desc *desc)
4360{
1d7765ba
AS
4361 if (desc)
4362 gpiod_free(desc);
372e722e 4363}
bae48da2 4364EXPORT_SYMBOL_GPL(gpiod_put);
d2876d08 4365
66858527
RI
4366/**
4367 * gpiod_put_array - dispose of multiple GPIO descriptors
4368 * @descs: struct gpio_descs containing an array of descriptors
4369 */
4370void gpiod_put_array(struct gpio_descs *descs)
4371{
4372 unsigned int i;
4373
4374 for (i = 0; i < descs->ndescs; i++)
4375 gpiod_put(descs->desc[i]);
4376
4377 kfree(descs);
4378}
4379EXPORT_SYMBOL_GPL(gpiod_put_array);
4380
ced2af41
SK
4381
4382static int gpio_bus_match(struct device *dev, struct device_driver *drv)
4383{
1df62542
AS
4384 struct fwnode_handle *fwnode = dev_fwnode(dev);
4385
ced2af41
SK
4386 /*
4387 * Only match if the fwnode doesn't already have a proper struct device
4388 * created for it.
4389 */
1df62542 4390 if (fwnode && fwnode->dev != dev)
ced2af41
SK
4391 return 0;
4392 return 1;
4393}
4394
4731210c
SK
4395static int gpio_stub_drv_probe(struct device *dev)
4396{
4397 /*
4398 * The DT node of some GPIO chips have a "compatible" property, but
4399 * never have a struct device added and probed by a driver to register
4400 * the GPIO chip with gpiolib. In such cases, fw_devlink=on will cause
4401 * the consumers of the GPIO chip to get probe deferred forever because
4402 * they will be waiting for a device associated with the GPIO chip
4403 * firmware node to get added and bound to a driver.
4404 *
4405 * To allow these consumers to probe, we associate the struct
4406 * gpio_device of the GPIO chip with the firmware node and then simply
4407 * bind it to this stub driver.
4408 */
4409 return 0;
4410}
4411
4412static struct device_driver gpio_stub_drv = {
4413 .name = "gpio_stub_drv",
4414 .bus = &gpio_bus_type,
4415 .probe = gpio_stub_drv_probe,
4416};
4417
3c702e99
LW
4418static int __init gpiolib_dev_init(void)
4419{
4420 int ret;
4421
4422 /* Register GPIO sysfs bus */
b1911710 4423 ret = bus_register(&gpio_bus_type);
3c702e99
LW
4424 if (ret < 0) {
4425 pr_err("gpiolib: could not register GPIO bus type\n");
4426 return ret;
4427 }
4428
3875721e
WY
4429 ret = driver_register(&gpio_stub_drv);
4430 if (ret < 0) {
4731210c
SK
4431 pr_err("gpiolib: could not register GPIO stub driver\n");
4432 bus_unregister(&gpio_bus_type);
4433 return ret;
4434 }
4435
ddd8891e 4436 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME);
3c702e99
LW
4437 if (ret < 0) {
4438 pr_err("gpiolib: failed to allocate char dev region\n");
4731210c 4439 driver_unregister(&gpio_stub_drv);
3c702e99 4440 bus_unregister(&gpio_bus_type);
63636d95 4441 return ret;
3c702e99 4442 }
63636d95
GU
4443
4444 gpiolib_initialized = true;
4445 gpiochip_setup_devs();
4446
8650b609
DG
4447#if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO)
4448 WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier));
4449#endif /* CONFIG_OF_DYNAMIC && CONFIG_OF_GPIO */
63636d95 4450
3c702e99
LW
4451 return ret;
4452}
4453core_initcall(gpiolib_dev_init);
4454
d2876d08
DB
4455#ifdef CONFIG_DEBUG_FS
4456
fdeb8e15 4457static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
d2876d08 4458{
a0b66a73 4459 struct gpio_chip *gc = gdev->chip;
3de69ae1 4460 struct gpio_desc *desc;
fdeb8e15 4461 unsigned gpio = gdev->base;
3de69ae1 4462 int value;
90fd2270
LW
4463 bool is_out;
4464 bool is_irq;
4465 bool active_low;
d2876d08 4466
3de69ae1
AS
4467 for_each_gpio_desc(gc, desc) {
4468 if (test_bit(FLAG_REQUESTED, &desc->flags)) {
4469 gpiod_get_direction(desc);
4470 is_out = test_bit(FLAG_IS_OUT, &desc->flags);
234c5209 4471 value = gpio_chip_get_value(gc, desc);
3de69ae1
AS
4472 is_irq = test_bit(FLAG_USED_AS_IRQ, &desc->flags);
4473 active_low = test_bit(FLAG_ACTIVE_LOW, &desc->flags);
4474 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s\n",
4475 gpio, desc->name ?: "", desc->label,
4476 is_out ? "out" : "in ",
4477 value >= 0 ? (value ? "hi" : "lo") : "? ",
4478 is_irq ? "IRQ " : "",
4479 active_low ? "ACTIVE LOW" : "");
4480 } else if (desc->name) {
4481 seq_printf(s, " gpio-%-3d (%-20.20s)\n", gpio, desc->name);
ced433e2 4482 }
d2876d08 4483
3de69ae1 4484 gpio++;
d2876d08
DB
4485 }
4486}
4487
f9c4a31f 4488static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
d2876d08 4489{
362432ae 4490 unsigned long flags;
ff2b1359 4491 struct gpio_device *gdev = NULL;
cb1650d4 4492 loff_t index = *pos;
d2876d08 4493
f9c4a31f 4494 s->private = "";
d2876d08 4495
362432ae 4496 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4497 list_for_each_entry(gdev, &gpio_devices, list)
362432ae
GL
4498 if (index-- == 0) {
4499 spin_unlock_irqrestore(&gpio_lock, flags);
ff2b1359 4500 return gdev;
f9c4a31f 4501 }
362432ae 4502 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f 4503
cb1650d4 4504 return NULL;
f9c4a31f
TR
4505}
4506
4507static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
4508{
362432ae 4509 unsigned long flags;
ff2b1359 4510 struct gpio_device *gdev = v;
f9c4a31f
TR
4511 void *ret = NULL;
4512
362432ae 4513 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4514 if (list_is_last(&gdev->list, &gpio_devices))
cb1650d4
AC
4515 ret = NULL;
4516 else
243cfa6a 4517 ret = list_first_entry(&gdev->list, struct gpio_device, list);
362432ae 4518 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f
TR
4519
4520 s->private = "\n";
4521 ++*pos;
4522
4523 return ret;
4524}
4525
4526static void gpiolib_seq_stop(struct seq_file *s, void *v)
4527{
4528}
4529
4530static int gpiolib_seq_show(struct seq_file *s, void *v)
4531{
ff2b1359 4532 struct gpio_device *gdev = v;
a0b66a73 4533 struct gpio_chip *gc = gdev->chip;
ff2b1359
LW
4534 struct device *parent;
4535
a0b66a73 4536 if (!gc) {
ff2b1359
LW
4537 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
4538 dev_name(&gdev->dev));
4539 return 0;
4540 }
f9c4a31f 4541
ff2b1359
LW
4542 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
4543 dev_name(&gdev->dev),
fdeb8e15 4544 gdev->base, gdev->base + gdev->ngpio - 1);
a0b66a73 4545 parent = gc->parent;
ff2b1359
LW
4546 if (parent)
4547 seq_printf(s, ", parent: %s/%s",
4548 parent->bus ? parent->bus->name : "no-bus",
4549 dev_name(parent));
a0b66a73
LW
4550 if (gc->label)
4551 seq_printf(s, ", %s", gc->label);
4552 if (gc->can_sleep)
f9c4a31f
TR
4553 seq_printf(s, ", can sleep");
4554 seq_printf(s, ":\n");
4555
a0b66a73
LW
4556 if (gc->dbg_show)
4557 gc->dbg_show(s, gc);
f9c4a31f 4558 else
fdeb8e15 4559 gpiolib_dbg_show(s, gdev);
f9c4a31f 4560
d2876d08
DB
4561 return 0;
4562}
4563
425c5b3e 4564static const struct seq_operations gpiolib_sops = {
f9c4a31f
TR
4565 .start = gpiolib_seq_start,
4566 .next = gpiolib_seq_next,
4567 .stop = gpiolib_seq_stop,
4568 .show = gpiolib_seq_show,
4569};
425c5b3e 4570DEFINE_SEQ_ATTRIBUTE(gpiolib);
d2876d08
DB
4571
4572static int __init gpiolib_debugfs_init(void)
4573{
4574 /* /sys/kernel/debug/gpio */
425c5b3e 4575 debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops);
d2876d08
DB
4576 return 0;
4577}
4578subsys_initcall(gpiolib_debugfs_init);
4579
4580#endif /* DEBUG_FS */