gpiolib: Clean up headers
[linux-2.6-block.git] / drivers / gpio / gpiolib.c
CommitLineData
dae5f0af 1// SPDX-License-Identifier: GPL-2.0
c47d9e1b 2
79aabb1e 3#include <linux/acpi.h>
923a654c 4#include <linux/bitmap.h>
79aabb1e
AS
5#include <linux/compat.h>
6#include <linux/debugfs.h>
d8f388d8
DB
7#include <linux/device.h>
8#include <linux/err.h>
380c7ba3 9#include <linux/errno.h>
79aabb1e
AS
10#include <linux/file.h>
11#include <linux/fs.h>
79aabb1e
AS
12#include <linux/idr.h>
13#include <linux/interrupt.h>
14#include <linux/irq.h>
15#include <linux/kernel.h>
16#include <linux/list.h>
17#include <linux/module.h>
380c7ba3 18#include <linux/of.h>
c771c2f4 19#include <linux/pinctrl/consumer.h>
79aabb1e
AS
20#include <linux/seq_file.h>
21#include <linux/slab.h>
22#include <linux/spinlock.h>
23
380c7ba3
AS
24#include <linux/gpio.h>
25#include <linux/gpio/driver.h>
26#include <linux/gpio/machine.h>
27
3c702e99 28#include <uapi/linux/gpio.h>
d2876d08 29
77cb907a 30#include "gpiolib-acpi.h"
925ca369 31#include "gpiolib-cdev.h"
79aabb1e
AS
32#include "gpiolib-of.h"
33#include "gpiolib-swnode.h"
ef087d8e 34#include "gpiolib-sysfs.h"
79aabb1e 35#include "gpiolib.h"
664e3e5a 36
3f397c21
UKK
37#define CREATE_TRACE_POINTS
38#include <trace/events/gpio.h>
d2876d08 39
79a9becd 40/* Implementation infrastructure for GPIO interfaces.
d2876d08 41 *
79a9becd
AC
42 * The GPIO programming interface allows for inlining speed-critical
43 * get/set operations for common cases, so that access to SOC-integrated
44 * GPIOs can sometimes cost only an instruction or two per bit.
d2876d08
DB
45 */
46
47
48/* When debugging, extend minimal trust to callers and platform code.
49 * Also emit diagnostic messages that may help initial bringup, when
50 * board setup or driver bugs are most common.
51 *
52 * Otherwise, minimize overhead in what may be bitbanging codepaths.
53 */
54#ifdef DEBUG
55#define extra_checks 1
56#else
57#define extra_checks 0
58#endif
59
ff2b1359
LW
60/* Device and char device-related information */
61static DEFINE_IDA(gpio_ida);
3c702e99
LW
62static dev_t gpio_devt;
63#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
ced2af41 64static int gpio_bus_match(struct device *dev, struct device_driver *drv);
3c702e99
LW
65static struct bus_type gpio_bus_type = {
66 .name = "gpio",
ced2af41 67 .match = gpio_bus_match,
3c702e99 68};
ff2b1359 69
3027743f
LA
70/*
71 * Number of GPIOs to use for the fast path in set array
72 */
73#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
74
d2876d08
DB
75/* gpio_lock prevents conflicts during gpio_desc[] table updates.
76 * While any GPIO is requested, its gpio_chip is not removable;
77 * each GPIO's "requested" flag serves as a lock and refcount.
78 */
0eb4c6c2 79DEFINE_SPINLOCK(gpio_lock);
d2876d08 80
bae48da2
AC
81static DEFINE_MUTEX(gpio_lookup_lock);
82static LIST_HEAD(gpio_lookup_list);
ff2b1359 83LIST_HEAD(gpio_devices);
6d86750c 84
a411e81e
BG
85static DEFINE_MUTEX(gpio_machine_hogs_mutex);
86static LIST_HEAD(gpio_machine_hogs);
87
a0b66a73
LW
88static void gpiochip_free_hogs(struct gpio_chip *gc);
89static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
90 struct lock_class_key *lock_key,
91 struct lock_class_key *request_key);
a0b66a73
LW
92static void gpiochip_irqchip_remove(struct gpio_chip *gc);
93static int gpiochip_irqchip_init_hw(struct gpio_chip *gc);
94static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc);
95static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc);
6d86750c 96
159f3cd9 97static bool gpiolib_initialized;
6d86750c 98
d2876d08
DB
99static inline void desc_set_label(struct gpio_desc *d, const char *label)
100{
d2876d08 101 d->label = label;
d2876d08
DB
102}
103
372e722e 104/**
950d55f5
TR
105 * gpio_to_desc - Convert a GPIO number to its descriptor
106 * @gpio: global GPIO number
107 *
108 * Returns:
109 * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
110 * with the given number exists in the system.
372e722e 111 */
79a9becd 112struct gpio_desc *gpio_to_desc(unsigned gpio)
372e722e 113{
ff2b1359 114 struct gpio_device *gdev;
14e85c0e
AC
115 unsigned long flags;
116
117 spin_lock_irqsave(&gpio_lock, flags);
118
ff2b1359 119 list_for_each_entry(gdev, &gpio_devices, list) {
fdeb8e15
LW
120 if (gdev->base <= gpio &&
121 gdev->base + gdev->ngpio > gpio) {
14e85c0e 122 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 123 return &gdev->descs[gpio - gdev->base];
14e85c0e
AC
124 }
125 }
126
127 spin_unlock_irqrestore(&gpio_lock, flags);
128
0e9a5edf 129 if (!gpio_is_valid(gpio))
c47d9e1b 130 pr_warn("invalid GPIO %d\n", gpio);
0e9a5edf 131
14e85c0e 132 return NULL;
372e722e 133}
79a9becd 134EXPORT_SYMBOL_GPL(gpio_to_desc);
372e722e 135
d468bf9e 136/**
950d55f5
TR
137 * gpiochip_get_desc - get the GPIO descriptor corresponding to the given
138 * hardware number for this chip
a0b66a73 139 * @gc: GPIO chip
950d55f5
TR
140 * @hwnum: hardware number of the GPIO for this chip
141 *
142 * Returns:
35c6cfb4 143 * A pointer to the GPIO descriptor or ``ERR_PTR(-EINVAL)`` if no GPIO exists
950d55f5 144 * in the given chip for the specified hardware number.
d468bf9e 145 */
a0b66a73 146struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc,
06863620 147 unsigned int hwnum)
d468bf9e 148{
a0b66a73 149 struct gpio_device *gdev = gc->gpiodev;
fdeb8e15
LW
150
151 if (hwnum >= gdev->ngpio)
b7d0a28a 152 return ERR_PTR(-EINVAL);
d468bf9e 153
fdeb8e15 154 return &gdev->descs[hwnum];
d468bf9e 155}
97795420 156EXPORT_SYMBOL_GPL(gpiochip_get_desc);
372e722e
AC
157
158/**
950d55f5
TR
159 * desc_to_gpio - convert a GPIO descriptor to the integer namespace
160 * @desc: GPIO descriptor
161 *
372e722e 162 * This should disappear in the future but is needed since we still
950d55f5
TR
163 * use GPIO numbers for error messages and sysfs nodes.
164 *
165 * Returns:
166 * The global GPIO number for the GPIO specified by its descriptor.
372e722e 167 */
79a9becd 168int desc_to_gpio(const struct gpio_desc *desc)
372e722e 169{
fdeb8e15 170 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
372e722e 171}
79a9becd 172EXPORT_SYMBOL_GPL(desc_to_gpio);
372e722e
AC
173
174
79a9becd
AC
175/**
176 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
177 * @desc: descriptor to return the chip of
178 */
179struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
372e722e 180{
dd3b9a44 181 if (!desc || !desc->gdev)
fdeb8e15
LW
182 return NULL;
183 return desc->gdev->chip;
372e722e 184}
79a9becd 185EXPORT_SYMBOL_GPL(gpiod_to_chip);
d2876d08 186
8d0aab2f
AV
187/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
188static int gpiochip_find_base(int ngpio)
189{
ff2b1359 190 struct gpio_device *gdev;
7b61212f 191 int base = GPIO_DYNAMIC_BASE;
8d0aab2f 192
7b61212f 193 list_for_each_entry(gdev, &gpio_devices, list) {
83cabe33 194 /* found a free space? */
7b61212f 195 if (gdev->base >= base + ngpio)
83cabe33 196 break;
7b61212f
CL
197 /* nope, check the space right after the chip */
198 base = gdev->base + gdev->ngpio;
8d0aab2f
AV
199 }
200
83cabe33 201 if (gpio_is_valid(base)) {
8d0aab2f 202 pr_debug("%s: found new base at %d\n", __func__, base);
83cabe33
AC
203 return base;
204 } else {
205 pr_err("%s: cannot find free range\n", __func__);
206 return -ENOSPC;
169b6a7a 207 }
169b6a7a
AV
208}
209
79a9becd
AC
210/**
211 * gpiod_get_direction - return the current direction of a GPIO
212 * @desc: GPIO to get the direction of
213 *
94fc7309 214 * Returns 0 for output, 1 for input, or an error code in case of error.
79a9becd
AC
215 *
216 * This function may sleep if gpiod_cansleep() is true.
217 */
8e53b0f1 218int gpiod_get_direction(struct gpio_desc *desc)
80b0a602 219{
a0b66a73 220 struct gpio_chip *gc;
13daf489 221 unsigned int offset;
d377f56f 222 int ret;
80b0a602 223
a0b66a73 224 gc = gpiod_to_chip(desc);
372e722e 225 offset = gpio_chip_hwgpio(desc);
80b0a602 226
256efaea
RK
227 /*
228 * Open drain emulation using input mode may incorrectly report
229 * input here, fix that up.
230 */
231 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) &&
232 test_bit(FLAG_IS_OUT, &desc->flags))
233 return 0;
234
a0b66a73 235 if (!gc->get_direction)
d0121b85 236 return -ENOTSUPP;
80b0a602 237
a0b66a73 238 ret = gc->get_direction(gc, offset);
4fc5bfeb
AS
239 if (ret < 0)
240 return ret;
241
242 /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */
243 if (ret > 0)
d377f56f 244 ret = 1;
4fc5bfeb
AS
245
246 assign_bit(FLAG_IS_OUT, &desc->flags, !ret);
247
d377f56f 248 return ret;
80b0a602 249}
79a9becd 250EXPORT_SYMBOL_GPL(gpiod_get_direction);
80b0a602 251
1a989d0f
AC
252/*
253 * Add a new chip to the global chips list, keeping the list of chips sorted
ef7c7553 254 * by range(means [base, base + ngpio - 1]) order.
1a989d0f
AC
255 *
256 * Return -EBUSY if the new chip overlaps with some other chip's integer
257 * space.
258 */
ff2b1359 259static int gpiodev_add_to_list(struct gpio_device *gdev)
1a989d0f 260{
a961f9b4 261 struct gpio_device *prev, *next;
1a989d0f 262
ff2b1359 263 if (list_empty(&gpio_devices)) {
a961f9b4 264 /* initial entry in list */
ff2b1359 265 list_add_tail(&gdev->list, &gpio_devices);
e28ecca6 266 return 0;
1a989d0f
AC
267 }
268
243cfa6a 269 next = list_first_entry(&gpio_devices, struct gpio_device, list);
a961f9b4
BJZ
270 if (gdev->base + gdev->ngpio <= next->base) {
271 /* add before first entry */
272 list_add(&gdev->list, &gpio_devices);
273 return 0;
1a989d0f
AC
274 }
275
243cfa6a 276 prev = list_last_entry(&gpio_devices, struct gpio_device, list);
a961f9b4
BJZ
277 if (prev->base + prev->ngpio <= gdev->base) {
278 /* add behind last entry */
279 list_add_tail(&gdev->list, &gpio_devices);
96098df1 280 return 0;
1a989d0f
AC
281 }
282
a961f9b4
BJZ
283 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
284 /* at the end of the list */
285 if (&next->list == &gpio_devices)
286 break;
1a989d0f 287
a961f9b4
BJZ
288 /* add between prev and next */
289 if (prev->base + prev->ngpio <= gdev->base
290 && gdev->base + gdev->ngpio <= next->base) {
291 list_add(&gdev->list, &prev->list);
292 return 0;
293 }
294 }
295
a961f9b4 296 return -EBUSY;
1a989d0f
AC
297}
298
950d55f5 299/*
f881bab0 300 * Convert a GPIO name to its descriptor
582838ea
GU
301 * Note that there is no guarantee that GPIO names are globally unique!
302 * Hence this function will return, if it exists, a reference to the first GPIO
303 * line found that matches the given name.
f881bab0
LW
304 */
305static struct gpio_desc *gpio_name_to_desc(const char * const name)
306{
ff2b1359 307 struct gpio_device *gdev;
f881bab0
LW
308 unsigned long flags;
309
ee203bbd
MM
310 if (!name)
311 return NULL;
312
f881bab0
LW
313 spin_lock_irqsave(&gpio_lock, flags);
314
ff2b1359 315 list_for_each_entry(gdev, &gpio_devices, list) {
66f46e37 316 struct gpio_desc *desc;
f881bab0 317
66f46e37
AS
318 for_each_gpio_desc(gdev->chip, desc) {
319 if (desc->name && !strcmp(desc->name, name)) {
f881bab0 320 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 321 return desc;
f881bab0
LW
322 }
323 }
324 }
325
326 spin_unlock_irqrestore(&gpio_lock, flags);
327
328 return NULL;
329}
330
5f3ca732 331/*
582838ea
GU
332 * Take the names from gc->names and assign them to their GPIO descriptors.
333 * Warn if a name is already used for a GPIO line on a different GPIO chip.
5f3ca732 334 *
582838ea
GU
335 * Note that:
336 * 1. Non-unique names are still accepted,
337 * 2. Name collisions within the same GPIO chip are not reported.
5f3ca732
MP
338 */
339static int gpiochip_set_desc_names(struct gpio_chip *gc)
340{
fdeb8e15 341 struct gpio_device *gdev = gc->gpiodev;
5f3ca732
MP
342 int i;
343
5f3ca732
MP
344 /* First check all names if they are unique */
345 for (i = 0; i != gc->ngpio; ++i) {
346 struct gpio_desc *gpio;
347
348 gpio = gpio_name_to_desc(gc->names[i]);
f881bab0 349 if (gpio)
fdeb8e15 350 dev_warn(&gdev->dev,
34ffd85d 351 "Detected name collision for GPIO name '%s'\n",
f881bab0 352 gc->names[i]);
5f3ca732
MP
353 }
354
355 /* Then add all names to the GPIO descriptors */
356 for (i = 0; i != gc->ngpio; ++i)
fdeb8e15 357 gdev->descs[i].name = gc->names[i];
5f3ca732
MP
358
359 return 0;
360}
361
32fc5aa2
BG
362/*
363 * devprop_gpiochip_set_names - Set GPIO line names using device properties
364 * @chip: GPIO chip whose lines should be named, if possible
365 *
366 * Looks for device property "gpio-line-names" and if it exists assigns
367 * GPIO line names for the chip. The memory allocated for the assigned
b41ba2ec 368 * names belong to the underlying firmware node and should not be released
32fc5aa2
BG
369 * by the caller.
370 */
371static int devprop_gpiochip_set_names(struct gpio_chip *chip)
372{
373 struct gpio_device *gdev = chip->gpiodev;
4ef339bc 374 struct device *dev = &gdev->dev;
32fc5aa2
BG
375 const char **names;
376 int ret, i;
377 int count;
378
4ef339bc 379 count = device_property_string_array_count(dev, "gpio-line-names");
32fc5aa2
BG
380 if (count < 0)
381 return 0;
382
4e804c39
SP
383 /*
384 * When offset is set in the driver side we assume the driver internally
385 * is using more than one gpiochip per the same device. We have to stop
386 * setting friendly names if the specified ones with 'gpio-line-names'
387 * are less than the offset in the device itself. This means all the
388 * lines are not present for every single pin within all the internal
389 * gpiochips.
390 */
391 if (count <= chip->offset) {
4ef339bc 392 dev_warn(dev, "gpio-line-names too short (length %d), cannot map names for the gpiochip at offset %u\n",
4e804c39
SP
393 count, chip->offset);
394 return 0;
32fc5aa2
BG
395 }
396
397 names = kcalloc(count, sizeof(*names), GFP_KERNEL);
398 if (!names)
399 return -ENOMEM;
400
4ef339bc 401 ret = device_property_read_string_array(dev, "gpio-line-names",
32fc5aa2
BG
402 names, count);
403 if (ret < 0) {
4ef339bc 404 dev_warn(dev, "failed to read GPIO line names\n");
32fc5aa2
BG
405 kfree(names);
406 return ret;
407 }
408
4e804c39
SP
409 /*
410 * When more that one gpiochip per device is used, 'count' can
411 * contain at most number gpiochips x chip->ngpio. We have to
412 * correctly distribute all defined lines taking into account
413 * chip->offset as starting point from where we will assign
414 * the names to pins from the 'names' array. Since property
415 * 'gpio-line-names' cannot contains gaps, we have to be sure
416 * we only assign those pins that really exists since chip->ngpio
417 * can be different of the chip->offset.
418 */
419 count = (count > chip->offset) ? count - chip->offset : count;
420 if (count > chip->ngpio)
421 count = chip->ngpio;
422
c73960bb
PR
423 for (i = 0; i < count; i++) {
424 /*
425 * Allow overriding "fixed" names provided by the GPIO
426 * provider. The "fixed" names are more often than not
427 * generic and less informative than the names given in
428 * device properties.
429 */
430 if (names[chip->offset + i] && names[chip->offset + i][0])
431 gdev->descs[i].name = names[chip->offset + i];
432 }
32fc5aa2
BG
433
434 kfree(names);
435
436 return 0;
437}
438
a0b66a73 439static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc)
e4371f6e
SB
440{
441 unsigned long *p;
442
a0b66a73 443 p = bitmap_alloc(gc->ngpio, GFP_KERNEL);
e4371f6e
SB
444 if (!p)
445 return NULL;
446
447 /* Assume by default all GPIOs are valid */
a0b66a73 448 bitmap_fill(p, gc->ngpio);
e4371f6e
SB
449
450 return p;
451}
452
27043a7d
AS
453static unsigned int gpiochip_count_reserved_ranges(struct gpio_chip *gc)
454{
4ef339bc 455 struct device *dev = &gc->gpiodev->dev;
27043a7d
AS
456 int size;
457
458 /* Format is "start, count, ..." */
4ef339bc 459 size = device_property_count_u32(dev, "gpio-reserved-ranges");
27043a7d
AS
460 if (size > 0 && size % 2 == 0)
461 return size;
462
463 return 0;
464}
465
f626d6df 466static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
726cb3ba 467{
27043a7d 468 if (!(gpiochip_count_reserved_ranges(gc) || gc->init_valid_mask))
726cb3ba
SB
469 return 0;
470
f626d6df
LW
471 gc->valid_mask = gpiochip_allocate_mask(gc);
472 if (!gc->valid_mask)
726cb3ba
SB
473 return -ENOMEM;
474
475 return 0;
476}
477
27043a7d
AS
478static int gpiochip_apply_reserved_ranges(struct gpio_chip *gc)
479{
4ef339bc 480 struct device *dev = &gc->gpiodev->dev;
27043a7d
AS
481 unsigned int size;
482 u32 *ranges;
483 int ret;
484
485 size = gpiochip_count_reserved_ranges(gc);
486 if (size == 0)
487 return 0;
488
489 ranges = kmalloc_array(size, sizeof(*ranges), GFP_KERNEL);
490 if (!ranges)
491 return -ENOMEM;
492
4ef339bc
AS
493 ret = device_property_read_u32_array(dev, "gpio-reserved-ranges",
494 ranges, size);
27043a7d
AS
495 if (ret) {
496 kfree(ranges);
497 return ret;
498 }
499
500 while (size) {
501 u32 count = ranges[--size];
502 u32 start = ranges[--size];
503
504 if (start >= gc->ngpio || start + count > gc->ngpio)
505 continue;
506
507 bitmap_clear(gc->valid_mask, start, count);
508 }
509
510 kfree(ranges);
511 return 0;
512}
513
c9fc5aff 514static int gpiochip_init_valid_mask(struct gpio_chip *gc)
f8ec92a9 515{
27043a7d
AS
516 int ret;
517
518 ret = gpiochip_apply_reserved_ranges(gc);
519 if (ret)
520 return ret;
521
c9fc5aff
LW
522 if (gc->init_valid_mask)
523 return gc->init_valid_mask(gc,
524 gc->valid_mask,
525 gc->ngpio);
f8ec92a9
RRD
526
527 return 0;
528}
529
a0b66a73 530static void gpiochip_free_valid_mask(struct gpio_chip *gc)
726cb3ba 531{
a0b66a73
LW
532 bitmap_free(gc->valid_mask);
533 gc->valid_mask = NULL;
726cb3ba
SB
534}
535
b056ca1c
AS
536static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
537{
c40aa80d
AS
538 /*
539 * Device Tree platforms are supposed to use "gpio-ranges"
540 * property. This check ensures that the ->add_pin_ranges()
541 * won't be called for them.
542 */
543 if (device_property_present(&gc->gpiodev->dev, "gpio-ranges"))
544 return 0;
545
b056ca1c
AS
546 if (gc->add_pin_ranges)
547 return gc->add_pin_ranges(gc);
548
549 return 0;
550}
551
a0b66a73 552bool gpiochip_line_is_valid(const struct gpio_chip *gc,
726cb3ba
SB
553 unsigned int offset)
554{
555 /* No mask means all valid */
a0b66a73 556 if (likely(!gc->valid_mask))
726cb3ba 557 return true;
a0b66a73 558 return test_bit(offset, gc->valid_mask);
726cb3ba
SB
559}
560EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
561
ff2b1359
LW
562static void gpiodevice_release(struct device *dev)
563{
3b7c7478 564 struct gpio_device *gdev = to_gpio_device(dev);
cf25ef6b 565 unsigned long flags;
ff2b1359 566
cf25ef6b 567 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 568 list_del(&gdev->list);
cf25ef6b
JH
569 spin_unlock_irqrestore(&gpio_lock, flags);
570
8d4a85b6 571 ida_free(&gpio_ida, gdev->id);
fcf273e5 572 kfree_const(gdev->label);
476e2fc5 573 kfree(gdev->descs);
9efd9e69 574 kfree(gdev);
ff2b1359
LW
575}
576
1f5eb8b1
KG
577#ifdef CONFIG_GPIO_CDEV
578#define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt))
579#define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev))
580#else
581/*
582 * gpiolib_cdev_register() indirectly calls device_add(), which is still
583 * required even when cdev is not selected.
584 */
585#define gcdev_register(gdev, devt) device_add(&(gdev)->dev)
586#define gcdev_unregister(gdev) device_del(&(gdev)->dev)
587#endif
588
159f3cd9
GR
589static int gpiochip_setup_dev(struct gpio_device *gdev)
590{
d377f56f 591 int ret;
159f3cd9 592
38dfa56b
SK
593 /*
594 * If fwnode doesn't belong to another device, it's safe to clear its
595 * initialized flag.
596 */
597 if (gdev->dev.fwnode && !gdev->dev.fwnode->dev)
598 fwnode_dev_initialized(gdev->dev.fwnode, false);
599
1f5eb8b1 600 ret = gcdev_register(gdev, gpio_devt);
d377f56f
LW
601 if (ret)
602 return ret;
111379dc 603
ec851b23
ZH
604 /* From this point, the .release() function cleans up gpio_device */
605 gdev->dev.release = gpiodevice_release;
606
d377f56f
LW
607 ret = gpiochip_sysfs_register(gdev);
608 if (ret)
159f3cd9
GR
609 goto err_remove_device;
610
262b9011
GU
611 dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base,
612 gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic");
159f3cd9
GR
613
614 return 0;
615
616err_remove_device:
1f5eb8b1 617 gcdev_unregister(gdev);
d377f56f 618 return ret;
159f3cd9
GR
619}
620
a0b66a73 621static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog)
a411e81e
BG
622{
623 struct gpio_desc *desc;
624 int rv;
625
a0b66a73 626 desc = gpiochip_get_desc(gc, hog->chip_hwnum);
a411e81e 627 if (IS_ERR(desc)) {
262b9011
GU
628 chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__,
629 PTR_ERR(desc));
a411e81e
BG
630 return;
631 }
632
ba3efdff 633 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
a411e81e
BG
634 return;
635
636 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
637 if (rv)
262b9011
GU
638 gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n",
639 __func__, gc->label, hog->chip_hwnum, rv);
a411e81e
BG
640}
641
a0b66a73 642static void machine_gpiochip_add(struct gpio_chip *gc)
a411e81e
BG
643{
644 struct gpiod_hog *hog;
645
646 mutex_lock(&gpio_machine_hogs_mutex);
647
648 list_for_each_entry(hog, &gpio_machine_hogs, list) {
a0b66a73
LW
649 if (!strcmp(gc->label, hog->chip_label))
650 gpiochip_machine_hog(gc, hog);
a411e81e
BG
651 }
652
653 mutex_unlock(&gpio_machine_hogs_mutex);
654}
655
159f3cd9
GR
656static void gpiochip_setup_devs(void)
657{
658 struct gpio_device *gdev;
d377f56f 659 int ret;
159f3cd9
GR
660
661 list_for_each_entry(gdev, &gpio_devices, list) {
d377f56f
LW
662 ret = gpiochip_setup_dev(gdev);
663 if (ret)
262b9011
GU
664 dev_err(&gdev->dev,
665 "Failed to initialize gpio device (%d)\n", ret);
159f3cd9
GR
666 }
667}
668
a0b66a73 669int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
39c3fd58
AL
670 struct lock_class_key *lock_key,
671 struct lock_class_key *request_key)
d2876d08 672{
990f6756 673 struct fwnode_handle *fwnode = NULL;
ff2b1359 674 struct gpio_device *gdev;
e5ab49cd 675 unsigned long flags;
e5ab49cd 676 unsigned int i;
ec851b23
ZH
677 u32 ngpios = 0;
678 int base = 0;
e5ab49cd 679 int ret = 0;
d2876d08 680
70d0fc42 681 /* If the calling driver did not initialize firmware node, do it here */
990f6756
BG
682 if (gc->fwnode)
683 fwnode = gc->fwnode;
684 else if (gc->parent)
685 fwnode = dev_fwnode(gc->parent);
70d0fc42 686 gc->fwnode = fwnode;
990f6756 687
ff2b1359
LW
688 /*
689 * First: allocate and populate the internal stat container, and
690 * set up the struct device.
691 */
969f07b4 692 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
ff2b1359 693 if (!gdev)
14e85c0e 694 return -ENOMEM;
3c702e99 695 gdev->dev.bus = &gpio_bus_type;
1df62542 696 gdev->dev.parent = gc->parent;
a0b66a73
LW
697 gdev->chip = gc;
698 gc->gpiodev = gdev;
acc6e331 699
70d0fc42 700 device_set_node(&gdev->dev, gc->fwnode);
6cb59afe 701
8d4a85b6 702 gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL);
ff2b1359 703 if (gdev->id < 0) {
d377f56f 704 ret = gdev->id;
ff2b1359
LW
705 goto err_free_gdev;
706 }
c351bb64
QW
707
708 ret = dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id);
709 if (ret)
710 goto err_free_ida;
711
ff2b1359 712 device_initialize(&gdev->dev);
a0b66a73
LW
713 if (gc->parent && gc->parent->driver)
714 gdev->owner = gc->parent->driver->owner;
715 else if (gc->owner)
ff2b1359 716 /* TODO: remove chip->owner */
a0b66a73 717 gdev->owner = gc->owner;
ff2b1359
LW
718 else
719 gdev->owner = THIS_MODULE;
d2876d08 720
9dbd1ab2
BG
721 /*
722 * Try the device properties if the driver didn't supply the number
723 * of GPIO lines.
724 */
ec851b23
ZH
725 ngpios = gc->ngpio;
726 if (ngpios == 0) {
9dbd1ab2
BG
727 ret = device_property_read_u32(&gdev->dev, "ngpios", &ngpios);
728 if (ret == -ENODATA)
729 /*
730 * -ENODATA means that there is no property found and
731 * we want to issue the error message to the user.
732 * Besides that, we want to return different error code
733 * to state that supplied value is not valid.
734 */
735 ngpios = 0;
736 else if (ret)
ec851b23 737 goto err_free_dev_name;
9dbd1ab2
BG
738
739 gc->ngpio = ngpios;
740 }
741
a0b66a73
LW
742 if (gc->ngpio == 0) {
743 chip_err(gc, "tried to insert a GPIO chip with zero lines\n");
d377f56f 744 ret = -EINVAL;
ec851b23 745 goto err_free_dev_name;
5ed41cc4 746 }
df4878e9 747
a0b66a73
LW
748 if (gc->ngpio > FASTPATH_NGPIO)
749 chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n",
750 gc->ngpio, FASTPATH_NGPIO);
3027743f 751
ec851b23
ZH
752 gdev->descs = kcalloc(gc->ngpio, sizeof(*gdev->descs), GFP_KERNEL);
753 if (!gdev->descs) {
754 ret = -ENOMEM;
755 goto err_free_dev_name;
756 }
757
a0b66a73 758 gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL);
df4878e9 759 if (!gdev->label) {
d377f56f 760 ret = -ENOMEM;
476e2fc5 761 goto err_free_descs;
df4878e9
LW
762 }
763
a0b66a73 764 gdev->ngpio = gc->ngpio;
43c54eca 765 gdev->data = data;
5ed41cc4 766
d2876d08
DB
767 spin_lock_irqsave(&gpio_lock, flags);
768
fdeb8e15
LW
769 /*
770 * TODO: this allocates a Linux GPIO number base in the global
771 * GPIO numberspace for this chip. In the long run we want to
772 * get *rid* of this numberspace and use only descriptors, but
773 * it may be a pipe dream. It will not happen before we get rid
774 * of the sysfs interface anyways.
775 */
ec851b23 776 base = gc->base;
8d0aab2f 777 if (base < 0) {
a0b66a73 778 base = gpiochip_find_base(gc->ngpio);
8d0aab2f 779 if (base < 0) {
225fce83 780 spin_unlock_irqrestore(&gpio_lock, flags);
ec851b23
ZH
781 ret = base;
782 base = 0;
476e2fc5 783 goto err_free_label;
8d0aab2f 784 }
fdeb8e15
LW
785 /*
786 * TODO: it should not be necessary to reflect the assigned
787 * base outside of the GPIO subsystem. Go over drivers and
788 * see if anyone makes use of this, else drop this and assign
789 * a poison instead.
790 */
a0b66a73 791 gc->base = base;
502df79b
CL
792 } else {
793 dev_warn(&gdev->dev,
794 "Static allocation of GPIO base is deprecated, use dynamic allocation.\n");
8d0aab2f 795 }
fdeb8e15 796 gdev->base = base;
8d0aab2f 797
d377f56f
LW
798 ret = gpiodev_add_to_list(gdev);
799 if (ret) {
05aa5203 800 spin_unlock_irqrestore(&gpio_lock, flags);
24a9dbb1 801 chip_err(gc, "GPIO integer space overlap, cannot add chip\n");
476e2fc5 802 goto err_free_label;
05aa5203 803 }
1a989d0f 804
a0b66a73 805 for (i = 0; i < gc->ngpio; i++)
767cd17a 806 gdev->descs[i].gdev = gdev;
14e85c0e 807
207270dd
DC
808 spin_unlock_irqrestore(&gpio_lock, flags);
809
6accc376 810 BLOCKING_INIT_NOTIFIER_HEAD(&gdev->notifier);
bdbbae24 811 init_rwsem(&gdev->sem);
51c1064e 812
f23f1516 813#ifdef CONFIG_PINCTRL
20ec3e39 814 INIT_LIST_HEAD(&gdev->pin_ranges);
f23f1516
SH
815#endif
816
c73960bb 817 if (gc->names) {
7cba1a4d 818 ret = gpiochip_set_desc_names(gc);
c73960bb
PR
819 if (ret)
820 goto err_remove_from_list;
821 }
822 ret = devprop_gpiochip_set_names(gc);
d377f56f 823 if (ret)
5f3ca732
MP
824 goto err_remove_from_list;
825
a0b66a73 826 ret = gpiochip_alloc_valid_mask(gc);
d377f56f 827 if (ret)
48057ed1 828 goto err_remove_from_list;
e0d89728 829
a0b66a73 830 ret = of_gpiochip_add(gc);
d377f56f 831 if (ret)
48057ed1 832 goto err_free_gpiochip_mask;
28355f81 833
a0b66a73 834 ret = gpiochip_init_valid_mask(gc);
d377f56f 835 if (ret)
35779890 836 goto err_remove_of_chip;
f8ec92a9 837
a0b66a73 838 for (i = 0; i < gc->ngpio; i++) {
3edfb7bd
RRD
839 struct gpio_desc *desc = &gdev->descs[i];
840
a0b66a73 841 if (gc->get_direction && gpiochip_line_is_valid(gc, i)) {
4fc5bfeb 842 assign_bit(FLAG_IS_OUT,
a0b66a73 843 &desc->flags, !gc->get_direction(gc, i));
d95da993 844 } else {
4fc5bfeb 845 assign_bit(FLAG_IS_OUT,
a0b66a73 846 &desc->flags, !gc->direction_input);
d95da993 847 }
3edfb7bd
RRD
848 }
849
a0b66a73 850 ret = gpiochip_add_pin_ranges(gc);
b056ca1c
AS
851 if (ret)
852 goto err_remove_of_chip;
853
a0b66a73 854 acpi_gpiochip_add(gc);
391c970c 855
a0b66a73 856 machine_gpiochip_add(gc);
a411e81e 857
a0b66a73 858 ret = gpiochip_irqchip_init_valid_mask(gc);
9411e3aa
AS
859 if (ret)
860 goto err_remove_acpi_chip;
861
a0b66a73 862 ret = gpiochip_irqchip_init_hw(gc);
fbdf8d4b 863 if (ret)
48057ed1
LW
864 goto err_remove_acpi_chip;
865
a0b66a73 866 ret = gpiochip_add_irqchip(gc, lock_key, request_key);
fbdf8d4b 867 if (ret)
48057ed1
LW
868 goto err_remove_irqchip_mask;
869
3c702e99
LW
870 /*
871 * By first adding the chardev, and then adding the device,
872 * we get a device node entry in sysfs under
873 * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
874 * coldplug of device nodes and other udev business.
159f3cd9
GR
875 * We can do this only if gpiolib has been initialized.
876 * Otherwise, defer until later.
3c702e99 877 */
159f3cd9 878 if (gpiolib_initialized) {
d377f56f
LW
879 ret = gpiochip_setup_dev(gdev);
880 if (ret)
48057ed1 881 goto err_remove_irqchip;
159f3cd9 882 }
cedb1881 883 return 0;
3bae4811 884
48057ed1 885err_remove_irqchip:
a0b66a73 886 gpiochip_irqchip_remove(gc);
48057ed1 887err_remove_irqchip_mask:
a0b66a73 888 gpiochip_irqchip_free_valid_mask(gc);
35779890 889err_remove_acpi_chip:
a0b66a73 890 acpi_gpiochip_remove(gc);
35779890 891err_remove_of_chip:
a0b66a73
LW
892 gpiochip_free_hogs(gc);
893 of_gpiochip_remove(gc);
35779890 894err_free_gpiochip_mask:
a0b66a73
LW
895 gpiochip_remove_pin_ranges(gc);
896 gpiochip_free_valid_mask(gc);
ec851b23
ZH
897 if (gdev->dev.release) {
898 /* release() has been registered by gpiochip_setup_dev() */
dc0989e3 899 gpio_device_put(gdev);
ec851b23
ZH
900 goto err_print_message;
901 }
5f3ca732 902err_remove_from_list:
225fce83 903 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 904 list_del(&gdev->list);
3bae4811 905 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 906err_free_label:
fcf273e5 907 kfree_const(gdev->label);
476e2fc5
GR
908err_free_descs:
909 kfree(gdev->descs);
c351bb64
QW
910err_free_dev_name:
911 kfree(dev_name(&gdev->dev));
a05a1404 912err_free_ida:
8d4a85b6 913 ida_free(&gpio_ida, gdev->id);
a05a1404 914err_free_gdev:
ec851b23
ZH
915 kfree(gdev);
916err_print_message:
d2876d08 917 /* failures here can mean systems won't boot... */
3cc1fb73
GS
918 if (ret != -EPROBE_DEFER) {
919 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
ec851b23 920 base, base + (int)ngpios - 1,
3cc1fb73
GS
921 gc->label ? : "generic", ret);
922 }
d377f56f 923 return ret;
d2876d08 924}
959bc7b2 925EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
d2876d08 926
43c54eca
LW
927/**
928 * gpiochip_get_data() - get per-subdriver data for the chip
a0b66a73 929 * @gc: GPIO chip
950d55f5
TR
930 *
931 * Returns:
932 * The per-subdriver data for the chip.
43c54eca 933 */
a0b66a73 934void *gpiochip_get_data(struct gpio_chip *gc)
43c54eca 935{
a0b66a73 936 return gc->gpiodev->data;
43c54eca
LW
937}
938EXPORT_SYMBOL_GPL(gpiochip_get_data);
939
d2876d08
DB
940/**
941 * gpiochip_remove() - unregister a gpio_chip
a0b66a73 942 * @gc: the chip to unregister
d2876d08
DB
943 *
944 * A gpio_chip with any GPIOs still requested may not be removed.
945 */
a0b66a73 946void gpiochip_remove(struct gpio_chip *gc)
d2876d08 947{
a0b66a73 948 struct gpio_device *gdev = gc->gpiodev;
d2876d08 949 unsigned long flags;
869233f8 950 unsigned int i;
d2876d08 951
bdbbae24
BG
952 down_write(&gdev->sem);
953
ff2b1359 954 /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
afbc4f31 955 gpiochip_sysfs_unregister(gdev);
a0b66a73 956 gpiochip_free_hogs(gc);
bd203bd5
BJZ
957 /* Numb the device, cancelling all outstanding operations */
958 gdev->chip = NULL;
a0b66a73
LW
959 gpiochip_irqchip_remove(gc);
960 acpi_gpiochip_remove(gc);
961 of_gpiochip_remove(gc);
962 gpiochip_remove_pin_ranges(gc);
963 gpiochip_free_valid_mask(gc);
43c54eca
LW
964 /*
965 * We accept no more calls into the driver from this point, so
966 * NULL the driver data pointer
967 */
968 gdev->data = NULL;
391c970c 969
6798acaa 970 spin_lock_irqsave(&gpio_lock, flags);
fdeb8e15 971 for (i = 0; i < gdev->ngpio; i++) {
a0b66a73 972 if (gpiochip_is_requested(gc, i))
869233f8 973 break;
d2876d08 974 }
d2876d08 975 spin_unlock_irqrestore(&gpio_lock, flags);
14e85c0e 976
ca18a852 977 if (i != gdev->ngpio)
fdeb8e15 978 dev_crit(&gdev->dev,
58383c78 979 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
fab28b89 980
ff2b1359
LW
981 /*
982 * The gpiochip side puts its use of the device to rest here:
983 * if there are no userspace clients, the chardev and device will
984 * be removed, else it will be dangling until the last user is
985 * gone.
986 */
1f5eb8b1 987 gcdev_unregister(gdev);
bdbbae24 988 up_write(&gdev->sem);
dc0989e3 989 gpio_device_put(gdev);
d2876d08
DB
990}
991EXPORT_SYMBOL_GPL(gpiochip_remove);
992
594fa265
GL
993/**
994 * gpiochip_find() - iterator for locating a specific gpio_chip
995 * @data: data to pass to match function
950d55f5 996 * @match: Callback function to check gpio_chip
594fa265
GL
997 *
998 * Similar to bus_find_device. It returns a reference to a gpio_chip as
999 * determined by a user supplied @match callback. The callback should return
1000 * 0 if the device doesn't match and non-zero if it does. If the callback is
1001 * non-zero, this function will return to the caller and not iterate over any
1002 * more gpio_chips.
1003 */
07ce8ec7 1004struct gpio_chip *gpiochip_find(void *data,
a0b66a73 1005 int (*match)(struct gpio_chip *gc,
3d0f7cf0 1006 void *data))
594fa265 1007{
ff2b1359 1008 struct gpio_device *gdev;
a0b66a73 1009 struct gpio_chip *gc = NULL;
594fa265 1010 unsigned long flags;
594fa265
GL
1011
1012 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1013 list_for_each_entry(gdev, &gpio_devices, list)
acf06ff7 1014 if (gdev->chip && match(gdev->chip, data)) {
a0b66a73 1015 gc = gdev->chip;
594fa265 1016 break;
acf06ff7 1017 }
ff2b1359 1018
594fa265
GL
1019 spin_unlock_irqrestore(&gpio_lock, flags);
1020
a0b66a73 1021 return gc;
594fa265 1022}
8fa0c9bf 1023EXPORT_SYMBOL_GPL(gpiochip_find);
d2876d08 1024
a0b66a73 1025static int gpiochip_match_name(struct gpio_chip *gc, void *data)
79697ef9
AC
1026{
1027 const char *name = data;
1028
a0b66a73 1029 return !strcmp(gc->label, name);
79697ef9
AC
1030}
1031
1032static struct gpio_chip *find_chip_by_name(const char *name)
1033{
1034 return gpiochip_find((void *)name, gpiochip_match_name);
1035}
1036
14250520
LW
1037#ifdef CONFIG_GPIOLIB_IRQCHIP
1038
1039/*
1040 * The following is irqchip helper code for gpiochips.
1041 */
1042
9411e3aa
AS
1043static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
1044{
1045 struct gpio_irq_chip *girq = &gc->irq;
1046
1047 if (!girq->init_hw)
1048 return 0;
1049
1050 return girq->init_hw(gc);
1051}
1052
5fbe5b58 1053static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb 1054{
5fbe5b58
LW
1055 struct gpio_irq_chip *girq = &gc->irq;
1056
1057 if (!girq->init_valid_mask)
79b804cb
MW
1058 return 0;
1059
5fbe5b58
LW
1060 girq->valid_mask = gpiochip_allocate_mask(gc);
1061 if (!girq->valid_mask)
79b804cb
MW
1062 return -ENOMEM;
1063
5fbe5b58
LW
1064 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
1065
79b804cb
MW
1066 return 0;
1067}
1068
a0b66a73 1069static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 1070{
a0b66a73
LW
1071 bitmap_free(gc->irq.valid_mask);
1072 gc->irq.valid_mask = NULL;
79b804cb
MW
1073}
1074
a0b66a73 1075bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc,
64ff2c8e 1076 unsigned int offset)
79b804cb 1077{
a0b66a73 1078 if (!gpiochip_line_is_valid(gc, offset))
726cb3ba 1079 return false;
79b804cb 1080 /* No mask means all valid */
a0b66a73 1081 if (likely(!gc->irq.valid_mask))
79b804cb 1082 return true;
a0b66a73 1083 return test_bit(offset, gc->irq.valid_mask);
79b804cb 1084}
64ff2c8e 1085EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
79b804cb 1086
fdd61a01
LW
1087#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1088
1089/**
1090 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
1091 * to a gpiochip
1092 * @gc: the gpiochip to set the irqchip hierarchical handler to
1093 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
1094 * will then percolate up to the parent
1095 */
1096static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
1097 struct irq_chip *irqchip)
1098{
1099 /* DT will deal with mapping each IRQ as we go along */
1100 if (is_of_node(gc->irq.fwnode))
1101 return;
1102
1103 /*
1104 * This is for legacy and boardfile "irqchip" fwnodes: allocate
1105 * irqs upfront instead of dynamically since we don't have the
1106 * dynamic type of allocation that hardware description languages
1107 * provide. Once all GPIO drivers using board files are gone from
1108 * the kernel we can delete this code, but for a transitional period
1109 * it is necessary to keep this around.
1110 */
1111 if (is_fwnode_irqchip(gc->irq.fwnode)) {
1112 int i;
1113 int ret;
1114
1115 for (i = 0; i < gc->ngpio; i++) {
1116 struct irq_fwspec fwspec;
1117 unsigned int parent_hwirq;
1118 unsigned int parent_type;
1119 struct gpio_irq_chip *girq = &gc->irq;
1120
1121 /*
1122 * We call the child to parent translation function
1123 * only to check if the child IRQ is valid or not.
1124 * Just pick the rising edge type here as that is what
1125 * we likely need to support.
1126 */
1127 ret = girq->child_to_parent_hwirq(gc, i,
1128 IRQ_TYPE_EDGE_RISING,
1129 &parent_hwirq,
1130 &parent_type);
1131 if (ret) {
1132 chip_err(gc, "skip set-up on hwirq %d\n",
1133 i);
1134 continue;
1135 }
1136
1137 fwspec.fwnode = gc->irq.fwnode;
1138 /* This is the hwirq for the GPIO line side of things */
1139 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
1140 /* Just pick something */
1141 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
1142 fwspec.param_count = 2;
908334ab
JH
1143 ret = irq_domain_alloc_irqs(gc->irq.domain, 1,
1144 NUMA_NO_NODE, &fwspec);
fdd61a01
LW
1145 if (ret < 0) {
1146 chip_err(gc,
1147 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1148 i, parent_hwirq,
1149 ret);
1150 }
1151 }
1152 }
1153
1154 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1155
1156 return;
1157}
1158
1159static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1160 struct irq_fwspec *fwspec,
1161 unsigned long *hwirq,
1162 unsigned int *type)
1163{
1164 /* We support standard DT translation */
1165 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1166 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1167 }
1168
1169 /* This is for board files and others not using DT */
1170 if (is_fwnode_irqchip(fwspec->fwnode)) {
1171 int ret;
1172
1173 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1174 if (ret)
1175 return ret;
1176 WARN_ON(*type == IRQ_TYPE_NONE);
1177 return 0;
1178 }
1179 return -EINVAL;
1180}
1181
1182static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1183 unsigned int irq,
1184 unsigned int nr_irqs,
1185 void *data)
1186{
1187 struct gpio_chip *gc = d->host_data;
1188 irq_hw_number_t hwirq;
1189 unsigned int type = IRQ_TYPE_NONE;
1190 struct irq_fwspec *fwspec = data;
91a29af4 1191 union gpio_irq_fwspec gpio_parent_fwspec = {};
fdd61a01
LW
1192 unsigned int parent_hwirq;
1193 unsigned int parent_type;
1194 struct gpio_irq_chip *girq = &gc->irq;
1195 int ret;
1196
1197 /*
1198 * The nr_irqs parameter is always one except for PCI multi-MSI
1199 * so this should not happen.
1200 */
1201 WARN_ON(nr_irqs != 1);
1202
1203 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
1204 if (ret)
1205 return ret;
1206
366950ee 1207 chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
fdd61a01
LW
1208
1209 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
1210 &parent_hwirq, &parent_type);
1211 if (ret) {
1212 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
1213 return ret;
1214 }
366950ee 1215 chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq);
fdd61a01
LW
1216
1217 /*
1218 * We set handle_bad_irq because the .set_type() should
1219 * always be invoked and set the right type of handler.
1220 */
1221 irq_domain_set_info(d,
1222 irq,
1223 hwirq,
1224 gc->irq.chip,
1225 gc,
1226 girq->handler,
1227 NULL, NULL);
1228 irq_set_probe(irq);
1229
fdd61a01 1230 /* This parent only handles asserted level IRQs */
91a29af4
MZ
1231 ret = girq->populate_parent_alloc_arg(gc, &gpio_parent_fwspec,
1232 parent_hwirq, parent_type);
1233 if (ret)
1234 return ret;
24258761 1235
366950ee 1236 chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
fdd61a01 1237 irq, parent_hwirq);
c34f6dc8 1238 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
91a29af4 1239 ret = irq_domain_alloc_irqs_parent(d, irq, 1, &gpio_parent_fwspec);
880b7cf2
KH
1240 /*
1241 * If the parent irqdomain is msi, the interrupts have already
1242 * been allocated, so the EEXIST is good.
1243 */
1244 if (irq_domain_is_msi(d->parent) && (ret == -EEXIST))
1245 ret = 0;
fdd61a01
LW
1246 if (ret)
1247 chip_err(gc,
1248 "failed to allocate parent hwirq %d for hwirq %lu\n",
1249 parent_hwirq, hwirq);
1250
1251 return ret;
1252}
1253
a0b66a73 1254static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc,
fdd61a01
LW
1255 unsigned int offset)
1256{
1257 return offset;
1258}
1259
1260static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
1261{
1262 ops->activate = gpiochip_irq_domain_activate;
1263 ops->deactivate = gpiochip_irq_domain_deactivate;
1264 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
fdd61a01
LW
1265
1266 /*
08f12b45 1267 * We only allow overriding the translate() and free() functions for
fdd61a01 1268 * hierarchical chips, and this should only be done if the user
08f12b45
LP
1269 * really need something other than 1:1 translation for translate()
1270 * callback and free if user wants to free up any resources which
1271 * were allocated during callbacks, for example populate_parent_alloc_arg.
fdd61a01
LW
1272 */
1273 if (!ops->translate)
1274 ops->translate = gpiochip_hierarchy_irq_domain_translate;
08f12b45
LP
1275 if (!ops->free)
1276 ops->free = irq_domain_free_irqs_common;
fdd61a01
LW
1277}
1278
1279static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1280{
1281 if (!gc->irq.child_to_parent_hwirq ||
1282 !gc->irq.fwnode) {
1283 chip_err(gc, "missing irqdomain vital data\n");
1284 return -EINVAL;
1285 }
1286
1287 if (!gc->irq.child_offset_to_irq)
1288 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
1289
24258761
KH
1290 if (!gc->irq.populate_parent_alloc_arg)
1291 gc->irq.populate_parent_alloc_arg =
fdd61a01
LW
1292 gpiochip_populate_parent_fwspec_twocell;
1293
1294 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
1295
1296 gc->irq.domain = irq_domain_create_hierarchy(
1297 gc->irq.parent_domain,
1298 0,
1299 gc->ngpio,
1300 gc->irq.fwnode,
1301 &gc->irq.child_irq_domain_ops,
1302 gc);
1303
1304 if (!gc->irq.domain)
1305 return -ENOMEM;
1306
1307 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
1308
1309 return 0;
1310}
1311
1312static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1313{
1314 return !!gc->irq.parent_domain;
1315}
1316
91a29af4
MZ
1317int gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc,
1318 union gpio_irq_fwspec *gfwspec,
1319 unsigned int parent_hwirq,
1320 unsigned int parent_type)
fdd61a01 1321{
91a29af4 1322 struct irq_fwspec *fwspec = &gfwspec->fwspec;
24258761 1323
a0b66a73 1324 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1325 fwspec->param_count = 2;
1326 fwspec->param[0] = parent_hwirq;
1327 fwspec->param[1] = parent_type;
24258761 1328
91a29af4 1329 return 0;
fdd61a01
LW
1330}
1331EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
1332
91a29af4
MZ
1333int gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc,
1334 union gpio_irq_fwspec *gfwspec,
1335 unsigned int parent_hwirq,
1336 unsigned int parent_type)
fdd61a01 1337{
91a29af4 1338 struct irq_fwspec *fwspec = &gfwspec->fwspec;
24258761 1339
a0b66a73 1340 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1341 fwspec->param_count = 4;
1342 fwspec->param[0] = 0;
1343 fwspec->param[1] = parent_hwirq;
1344 fwspec->param[2] = 0;
1345 fwspec->param[3] = parent_type;
24258761 1346
91a29af4 1347 return 0;
fdd61a01
LW
1348}
1349EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
1350
1351#else
1352
1353static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1354{
1355 return -EINVAL;
1356}
1357
1358static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1359{
1360 return false;
1361}
1362
1363#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
1364
14250520
LW
1365/**
1366 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
1367 * @d: the irqdomain used by this irqchip
1368 * @irq: the global irq number used by this GPIO irqchip irq
1369 * @hwirq: the local IRQ/GPIO line offset on this gpiochip
1370 *
1371 * This function will set up the mapping for a certain IRQ line on a
1372 * gpiochip by assigning the gpiochip as chip data, and using the irqchip
1373 * stored inside the gpiochip.
1374 */
1b95b4eb
TR
1375int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
1376 irq_hw_number_t hwirq)
14250520 1377{
a0b66a73 1378 struct gpio_chip *gc = d->host_data;
d377f56f 1379 int ret = 0;
14250520 1380
a0b66a73 1381 if (!gpiochip_irqchip_irq_valid(gc, hwirq))
dc749a09
GS
1382 return -ENXIO;
1383
a0b66a73 1384 irq_set_chip_data(irq, gc);
a0a8bcf4
GS
1385 /*
1386 * This lock class tells lockdep that GPIO irqs are in a different
1387 * category than their parents, so it won't report false recursion.
1388 */
a0b66a73
LW
1389 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
1390 irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler);
d245b3f9 1391 /* Chips that use nested thread handlers have them marked */
a0b66a73 1392 if (gc->irq.threaded)
1c8732bb 1393 irq_set_nested_thread(irq, 1);
14250520 1394 irq_set_noprobe(irq);
23393d49 1395
a0b66a73
LW
1396 if (gc->irq.num_parents == 1)
1397 ret = irq_set_parent(irq, gc->irq.parents[0]);
1398 else if (gc->irq.map)
1399 ret = irq_set_parent(irq, gc->irq.map[hwirq]);
e0d89728 1400
d377f56f
LW
1401 if (ret < 0)
1402 return ret;
e0d89728 1403
1333b90f
LW
1404 /*
1405 * No set-up of the hardware will happen if IRQ_TYPE_NONE
1406 * is passed as default type.
1407 */
a0b66a73
LW
1408 if (gc->irq.default_type != IRQ_TYPE_NONE)
1409 irq_set_irq_type(irq, gc->irq.default_type);
14250520
LW
1410
1411 return 0;
1412}
1b95b4eb 1413EXPORT_SYMBOL_GPL(gpiochip_irq_map);
14250520 1414
1b95b4eb 1415void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
c3626fde 1416{
a0b66a73 1417 struct gpio_chip *gc = d->host_data;
1c8732bb 1418
a0b66a73 1419 if (gc->irq.threaded)
1c8732bb 1420 irq_set_nested_thread(irq, 0);
c3626fde
LW
1421 irq_set_chip_and_handler(irq, NULL, NULL);
1422 irq_set_chip_data(irq, NULL);
1423}
1b95b4eb 1424EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
c3626fde 1425
14250520
LW
1426static const struct irq_domain_ops gpiochip_domain_ops = {
1427 .map = gpiochip_irq_map,
c3626fde 1428 .unmap = gpiochip_irq_unmap,
14250520
LW
1429 /* Virtually all GPIO irqchips are twocell:ed */
1430 .xlate = irq_domain_xlate_twocell,
1431};
1432
fdd61a01
LW
1433/*
1434 * TODO: move these activate/deactivate in under the hierarchicial
1435 * irqchip implementation as static once SPMI and SSBI (all external
1436 * users) are phased over.
1437 */
ef74f70e
BM
1438/**
1439 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
1440 * @domain: The IRQ domain used by this IRQ chip
1441 * @data: Outermost irq_data associated with the IRQ
1442 * @reserve: If set, only reserve an interrupt vector instead of assigning one
1443 *
1444 * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
1445 * used as the activate function for the &struct irq_domain_ops. The host_data
1446 * for the IRQ domain must be the &struct gpio_chip.
1447 */
1448int gpiochip_irq_domain_activate(struct irq_domain *domain,
1449 struct irq_data *data, bool reserve)
1450{
a0b66a73 1451 struct gpio_chip *gc = domain->host_data;
ef74f70e 1452
a0b66a73 1453 return gpiochip_lock_as_irq(gc, data->hwirq);
ef74f70e
BM
1454}
1455EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
1456
1457/**
1458 * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
1459 * @domain: The IRQ domain used by this IRQ chip
1460 * @data: Outermost irq_data associated with the IRQ
1461 *
1462 * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
1463 * be used as the deactivate function for the &struct irq_domain_ops. The
1464 * host_data for the IRQ domain must be the &struct gpio_chip.
1465 */
1466void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
1467 struct irq_data *data)
1468{
a0b66a73 1469 struct gpio_chip *gc = domain->host_data;
ef74f70e 1470
a0b66a73 1471 return gpiochip_unlock_as_irq(gc, data->hwirq);
ef74f70e
BM
1472}
1473EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
1474
13daf489 1475static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset)
14250520 1476{
a0b66a73 1477 struct irq_domain *domain = gc->irq.domain;
fdd61a01 1478
5467801f
SP
1479#ifdef CONFIG_GPIOLIB_IRQCHIP
1480 /*
1481 * Avoid race condition with other code, which tries to lookup
1482 * an IRQ before the irqchip has been properly registered,
1483 * i.e. while gpiochip is still being brought up.
1484 */
1485 if (!gc->irq.initialized)
1486 return -EPROBE_DEFER;
1487#endif
1488
a0b66a73 1489 if (!gpiochip_irqchip_irq_valid(gc, offset))
4e6b8238 1490 return -ENXIO;
5b76e79c 1491
fdd61a01
LW
1492#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1493 if (irq_domain_is_hierarchy(domain)) {
1494 struct irq_fwspec spec;
1495
1496 spec.fwnode = domain->fwnode;
1497 spec.param_count = 2;
a0b66a73 1498 spec.param[0] = gc->irq.child_offset_to_irq(gc, offset);
fdd61a01
LW
1499 spec.param[1] = IRQ_TYPE_NONE;
1500
1501 return irq_create_fwspec_mapping(&spec);
1502 }
1503#endif
1504
1505 return irq_create_mapping(domain, offset);
14250520
LW
1506}
1507
704f0875 1508int gpiochip_irq_reqres(struct irq_data *d)
14250520 1509{
a0b66a73 1510 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
5b76e79c 1511
a0b66a73 1512 return gpiochip_reqres_irq(gc, d->hwirq);
14250520 1513}
704f0875 1514EXPORT_SYMBOL(gpiochip_irq_reqres);
14250520 1515
704f0875 1516void gpiochip_irq_relres(struct irq_data *d)
14250520 1517{
a0b66a73 1518 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
14250520 1519
a0b66a73 1520 gpiochip_relres_irq(gc, d->hwirq);
14250520 1521}
704f0875 1522EXPORT_SYMBOL(gpiochip_irq_relres);
14250520 1523
a8173820
MS
1524static void gpiochip_irq_mask(struct irq_data *d)
1525{
1526 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1527
1528 if (gc->irq.irq_mask)
1529 gc->irq.irq_mask(d);
1530 gpiochip_disable_irq(gc, d->hwirq);
1531}
1532
1533static void gpiochip_irq_unmask(struct irq_data *d)
1534{
1535 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1536
1537 gpiochip_enable_irq(gc, d->hwirq);
1538 if (gc->irq.irq_unmask)
1539 gc->irq.irq_unmask(d);
1540}
1541
461c1a7d 1542static void gpiochip_irq_enable(struct irq_data *d)
14250520 1543{
a0b66a73 1544 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
e0d89728 1545
a0b66a73 1546 gpiochip_enable_irq(gc, d->hwirq);
a8173820 1547 gc->irq.irq_enable(d);
461c1a7d
HV
1548}
1549
1550static void gpiochip_irq_disable(struct irq_data *d)
1551{
a0b66a73 1552 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
461c1a7d 1553
a8173820 1554 gc->irq.irq_disable(d);
a0b66a73 1555 gpiochip_disable_irq(gc, d->hwirq);
461c1a7d
HV
1556}
1557
a0b66a73 1558static void gpiochip_set_irq_hooks(struct gpio_chip *gc)
ca620f2d 1559{
a0b66a73 1560 struct irq_chip *irqchip = gc->irq.chip;
ca620f2d 1561
6c846d02
MZ
1562 if (irqchip->flags & IRQCHIP_IMMUTABLE)
1563 return;
1564
1565 chip_warn(gc, "not an immutable chip, please consider fixing it!\n");
1566
ca620f2d
HV
1567 if (!irqchip->irq_request_resources &&
1568 !irqchip->irq_release_resources) {
1569 irqchip->irq_request_resources = gpiochip_irq_reqres;
1570 irqchip->irq_release_resources = gpiochip_irq_relres;
1571 }
a0b66a73 1572 if (WARN_ON(gc->irq.irq_enable))
461c1a7d 1573 return;
171948ea 1574 /* Check if the irqchip already has this hook... */
9d552219
NS
1575 if (irqchip->irq_enable == gpiochip_irq_enable ||
1576 irqchip->irq_mask == gpiochip_irq_mask) {
171948ea
HV
1577 /*
1578 * ...and if so, give a gentle warning that this is bad
1579 * practice.
1580 */
a0b66a73 1581 chip_info(gc,
171948ea
HV
1582 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
1583 return;
1584 }
a8173820
MS
1585
1586 if (irqchip->irq_disable) {
1587 gc->irq.irq_disable = irqchip->irq_disable;
1588 irqchip->irq_disable = gpiochip_irq_disable;
1589 } else {
1590 gc->irq.irq_mask = irqchip->irq_mask;
1591 irqchip->irq_mask = gpiochip_irq_mask;
1592 }
1593
1594 if (irqchip->irq_enable) {
1595 gc->irq.irq_enable = irqchip->irq_enable;
1596 irqchip->irq_enable = gpiochip_irq_enable;
1597 } else {
1598 gc->irq.irq_unmask = irqchip->irq_unmask;
1599 irqchip->irq_unmask = gpiochip_irq_unmask;
1600 }
14250520
LW
1601}
1602
e0d89728
TR
1603/**
1604 * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
a0b66a73 1605 * @gc: the GPIO chip to add the IRQ chip to
39c3fd58
AL
1606 * @lock_key: lockdep class for IRQ lock
1607 * @request_key: lockdep class for IRQ request
e0d89728 1608 */
a0b66a73 1609static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1610 struct lock_class_key *lock_key,
1611 struct lock_class_key *request_key)
e0d89728 1612{
5c63a9db 1613 struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev);
a0b66a73 1614 struct irq_chip *irqchip = gc->irq.chip;
e0d89728
TR
1615 unsigned int type;
1616 unsigned int i;
1617
1618 if (!irqchip)
1619 return 0;
1620
a0b66a73
LW
1621 if (gc->irq.parent_handler && gc->can_sleep) {
1622 chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n");
e0d89728
TR
1623 return -EINVAL;
1624 }
1625
a0b66a73 1626 type = gc->irq.default_type;
e0d89728
TR
1627
1628 /*
1629 * Specifying a default trigger is a terrible idea if DT or ACPI is
1630 * used to configure the interrupts, as you may end up with
1631 * conflicting triggers. Tell the user, and reset to NONE.
1632 */
5c63a9db
AS
1633 if (WARN(fwnode && type != IRQ_TYPE_NONE,
1634 "%pfw: Ignoring %u default trigger\n", fwnode, type))
e0d89728
TR
1635 type = IRQ_TYPE_NONE;
1636
ef382374
NS
1637 if (gc->to_irq)
1638 chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__);
1639
a0b66a73
LW
1640 gc->to_irq = gpiochip_to_irq;
1641 gc->irq.default_type = type;
1642 gc->irq.lock_key = lock_key;
1643 gc->irq.request_key = request_key;
e0d89728 1644
fdd61a01 1645 /* If a parent irqdomain is provided, let's build a hierarchy */
a0b66a73
LW
1646 if (gpiochip_hierarchy_is_hierarchical(gc)) {
1647 int ret = gpiochip_hierarchy_add_domain(gc);
fdd61a01
LW
1648 if (ret)
1649 return ret;
1650 } else {
1651 /* Some drivers provide custom irqdomain ops */
5c63a9db 1652 gc->irq.domain = irq_domain_create_simple(fwnode,
a0b66a73
LW
1653 gc->ngpio,
1654 gc->irq.first,
266315fb
AS
1655 gc->irq.domain_ops ?: &gpiochip_domain_ops,
1656 gc);
a0b66a73 1657 if (!gc->irq.domain)
fdd61a01
LW
1658 return -EINVAL;
1659 }
e0d89728 1660
a0b66a73 1661 if (gc->irq.parent_handler) {
a0b66a73 1662 for (i = 0; i < gc->irq.num_parents; i++) {
cfe6807d
MZ
1663 void *data;
1664
1665 if (gc->irq.per_parent_data)
1666 data = gc->irq.parent_handler_data_array[i];
1667 else
1668 data = gc->irq.parent_handler_data ?: gc;
1669
e0d89728
TR
1670 /*
1671 * The parent IRQ chip is already using the chip_data
1672 * for this IRQ chip, so our callbacks simply use the
1673 * handler_data.
1674 */
a0b66a73
LW
1675 irq_set_chained_handler_and_data(gc->irq.parents[i],
1676 gc->irq.parent_handler,
e0d89728
TR
1677 data);
1678 }
e0d89728
TR
1679 }
1680
a0b66a73 1681 gpiochip_set_irq_hooks(gc);
ca620f2d 1682
5467801f
SP
1683 /*
1684 * Using barrier() here to prevent compiler from reordering
1685 * gc->irq.initialized before initialization of above
1686 * GPIO chip irq members.
1687 */
1688 barrier();
1689
1690 gc->irq.initialized = true;
1691
06fb4ecf
ML
1692 acpi_gpiochip_request_interrupts(gc);
1693
e0d89728
TR
1694 return 0;
1695}
1696
14250520
LW
1697/**
1698 * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
a0b66a73 1699 * @gc: the gpiochip to remove the irqchip from
14250520
LW
1700 *
1701 * This is called only from gpiochip_remove()
1702 */
a0b66a73 1703static void gpiochip_irqchip_remove(struct gpio_chip *gc)
14250520 1704{
a0b66a73 1705 struct irq_chip *irqchip = gc->irq.chip;
39e5f096 1706 unsigned int offset;
c3626fde 1707
a0b66a73 1708 acpi_gpiochip_free_interrupts(gc);
afa82fab 1709
a0b66a73
LW
1710 if (irqchip && gc->irq.parent_handler) {
1711 struct gpio_irq_chip *irq = &gc->irq;
39e5f096
TR
1712 unsigned int i;
1713
1714 for (i = 0; i < irq->num_parents; i++)
1715 irq_set_chained_handler_and_data(irq->parents[i],
1716 NULL, NULL);
25e4fe92
DES
1717 }
1718
c3626fde 1719 /* Remove all IRQ mappings and delete the domain */
a0b66a73 1720 if (gc->irq.domain) {
39e5f096
TR
1721 unsigned int irq;
1722
a0b66a73
LW
1723 for (offset = 0; offset < gc->ngpio; offset++) {
1724 if (!gpiochip_irqchip_irq_valid(gc, offset))
79b804cb 1725 continue;
f0fbe7bc 1726
a0b66a73 1727 irq = irq_find_mapping(gc->irq.domain, offset);
f0fbe7bc 1728 irq_dispose_mapping(irq);
79b804cb 1729 }
f0fbe7bc 1730
a0b66a73 1731 irq_domain_remove(gc->irq.domain);
c3626fde 1732 }
14250520 1733
6c846d02 1734 if (irqchip && !(irqchip->flags & IRQCHIP_IMMUTABLE)) {
461c1a7d
HV
1735 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
1736 irqchip->irq_request_resources = NULL;
1737 irqchip->irq_release_resources = NULL;
1738 }
1739 if (irqchip->irq_enable == gpiochip_irq_enable) {
a0b66a73
LW
1740 irqchip->irq_enable = gc->irq.irq_enable;
1741 irqchip->irq_disable = gc->irq.irq_disable;
461c1a7d 1742 }
14250520 1743 }
a0b66a73
LW
1744 gc->irq.irq_enable = NULL;
1745 gc->irq.irq_disable = NULL;
1746 gc->irq.chip = NULL;
79b804cb 1747
a0b66a73 1748 gpiochip_irqchip_free_valid_mask(gc);
14250520
LW
1749}
1750
6a45b0e2
MW
1751/**
1752 * gpiochip_irqchip_add_domain() - adds an irqdomain to a gpiochip
1753 * @gc: the gpiochip to add the irqchip to
1754 * @domain: the irqdomain to add to the gpiochip
1755 *
1756 * This function adds an IRQ domain to the gpiochip.
1757 */
1758int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
1759 struct irq_domain *domain)
1760{
1761 if (!domain)
1762 return -EINVAL;
1763
1764 gc->to_irq = gpiochip_to_irq;
1765 gc->irq.domain = domain;
1766
1767 return 0;
1768}
1769EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain);
1770
14250520
LW
1771#else /* CONFIG_GPIOLIB_IRQCHIP */
1772
a0b66a73 1773static inline int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1774 struct lock_class_key *lock_key,
1775 struct lock_class_key *request_key)
e0d89728
TR
1776{
1777 return 0;
1778}
a0b66a73 1779static void gpiochip_irqchip_remove(struct gpio_chip *gc) {}
9411e3aa 1780
a0b66a73 1781static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
9411e3aa
AS
1782{
1783 return 0;
1784}
1785
a0b66a73 1786static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb
MW
1787{
1788 return 0;
1789}
a0b66a73 1790static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 1791{ }
14250520
LW
1792
1793#endif /* CONFIG_GPIOLIB_IRQCHIP */
1794
c771c2f4
JG
1795/**
1796 * gpiochip_generic_request() - request the gpio function for a pin
a0b66a73 1797 * @gc: the gpiochip owning the GPIO
c771c2f4
JG
1798 * @offset: the offset of the GPIO to request for GPIO function
1799 */
13daf489 1800int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset)
c771c2f4 1801{
56e337f2
BG
1802#ifdef CONFIG_PINCTRL
1803 if (list_empty(&gc->gpiodev->pin_ranges))
1804 return 0;
1805#endif
1806
a0b66a73 1807 return pinctrl_gpio_request(gc->gpiodev->base + offset);
c771c2f4
JG
1808}
1809EXPORT_SYMBOL_GPL(gpiochip_generic_request);
1810
1811/**
1812 * gpiochip_generic_free() - free the gpio function from a pin
a0b66a73 1813 * @gc: the gpiochip to request the gpio function for
c771c2f4
JG
1814 * @offset: the offset of the GPIO to free from GPIO function
1815 */
13daf489 1816void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset)
c771c2f4 1817{
56e337f2
BG
1818#ifdef CONFIG_PINCTRL
1819 if (list_empty(&gc->gpiodev->pin_ranges))
1820 return;
1821#endif
1822
a0b66a73 1823 pinctrl_gpio_free(gc->gpiodev->base + offset);
c771c2f4
JG
1824}
1825EXPORT_SYMBOL_GPL(gpiochip_generic_free);
1826
2956b5d9
MW
1827/**
1828 * gpiochip_generic_config() - apply configuration for a pin
a0b66a73 1829 * @gc: the gpiochip owning the GPIO
2956b5d9
MW
1830 * @offset: the offset of the GPIO to apply the configuration
1831 * @config: the configuration to be applied
1832 */
13daf489 1833int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset,
2956b5d9
MW
1834 unsigned long config)
1835{
a0b66a73 1836 return pinctrl_gpio_set_config(gc->gpiodev->base + offset, config);
2956b5d9
MW
1837}
1838EXPORT_SYMBOL_GPL(gpiochip_generic_config);
1839
f23f1516 1840#ifdef CONFIG_PINCTRL
165adc9c 1841
586a87e6
CR
1842/**
1843 * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
a0b66a73 1844 * @gc: the gpiochip to add the range for
d32651f6 1845 * @pctldev: the pin controller to map to
586a87e6
CR
1846 * @gpio_offset: the start offset in the current gpio_chip number space
1847 * @pin_group: name of the pin group inside the pin controller
973c1714
CL
1848 *
1849 * Calling this function directly from a DeviceTree-supported
1850 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
1851 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
1852 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
586a87e6 1853 */
a0b66a73 1854int gpiochip_add_pingroup_range(struct gpio_chip *gc,
586a87e6
CR
1855 struct pinctrl_dev *pctldev,
1856 unsigned int gpio_offset, const char *pin_group)
1857{
1858 struct gpio_pin_range *pin_range;
a0b66a73 1859 struct gpio_device *gdev = gc->gpiodev;
586a87e6
CR
1860 int ret;
1861
1862 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
1863 if (!pin_range) {
a0b66a73 1864 chip_err(gc, "failed to allocate pin ranges\n");
586a87e6
CR
1865 return -ENOMEM;
1866 }
1867
1868 /* Use local offset as range ID */
1869 pin_range->range.id = gpio_offset;
a0b66a73
LW
1870 pin_range->range.gc = gc;
1871 pin_range->range.name = gc->label;
fdeb8e15 1872 pin_range->range.base = gdev->base + gpio_offset;
586a87e6
CR
1873 pin_range->pctldev = pctldev;
1874
1875 ret = pinctrl_get_group_pins(pctldev, pin_group,
1876 &pin_range->range.pins,
1877 &pin_range->range.npins);
61c6375d
MN
1878 if (ret < 0) {
1879 kfree(pin_range);
586a87e6 1880 return ret;
61c6375d 1881 }
586a87e6
CR
1882
1883 pinctrl_add_gpio_range(pctldev, &pin_range->range);
1884
a0b66a73 1885 chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n",
1a2a99c6 1886 gpio_offset, gpio_offset + pin_range->range.npins - 1,
586a87e6
CR
1887 pinctrl_dev_get_devname(pctldev), pin_group);
1888
20ec3e39 1889 list_add_tail(&pin_range->node, &gdev->pin_ranges);
586a87e6
CR
1890
1891 return 0;
1892}
1893EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
1894
3f0f8670
LW
1895/**
1896 * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
a0b66a73 1897 * @gc: the gpiochip to add the range for
950d55f5 1898 * @pinctl_name: the dev_name() of the pin controller to map to
316511c0
LW
1899 * @gpio_offset: the start offset in the current gpio_chip number space
1900 * @pin_offset: the start offset in the pin controller number space
3f0f8670
LW
1901 * @npins: the number of pins from the offset of each pin space (GPIO and
1902 * pin controller) to accumulate in this range
950d55f5
TR
1903 *
1904 * Returns:
1905 * 0 on success, or a negative error-code on failure.
973c1714
CL
1906 *
1907 * Calling this function directly from a DeviceTree-supported
1908 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
1909 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
1910 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
3f0f8670 1911 */
a0b66a73 1912int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
316511c0 1913 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 1914 unsigned int npins)
f23f1516
SH
1915{
1916 struct gpio_pin_range *pin_range;
a0b66a73 1917 struct gpio_device *gdev = gc->gpiodev;
b4d4b1f0 1918 int ret;
f23f1516 1919
3f0f8670 1920 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
f23f1516 1921 if (!pin_range) {
a0b66a73 1922 chip_err(gc, "failed to allocate pin ranges\n");
1e63d7b9 1923 return -ENOMEM;
f23f1516
SH
1924 }
1925
3f0f8670 1926 /* Use local offset as range ID */
316511c0 1927 pin_range->range.id = gpio_offset;
a0b66a73
LW
1928 pin_range->range.gc = gc;
1929 pin_range->range.name = gc->label;
fdeb8e15 1930 pin_range->range.base = gdev->base + gpio_offset;
316511c0 1931 pin_range->range.pin_base = pin_offset;
f23f1516 1932 pin_range->range.npins = npins;
192c369c 1933 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
f23f1516 1934 &pin_range->range);
8f23ca1a 1935 if (IS_ERR(pin_range->pctldev)) {
b4d4b1f0 1936 ret = PTR_ERR(pin_range->pctldev);
a0b66a73 1937 chip_err(gc, "could not create pin range\n");
3f0f8670 1938 kfree(pin_range);
b4d4b1f0 1939 return ret;
3f0f8670 1940 }
a0b66a73 1941 chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
1a2a99c6 1942 gpio_offset, gpio_offset + npins - 1,
316511c0
LW
1943 pinctl_name,
1944 pin_offset, pin_offset + npins - 1);
f23f1516 1945
20ec3e39 1946 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1e63d7b9
LW
1947
1948 return 0;
f23f1516 1949}
165adc9c 1950EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
f23f1516 1951
3f0f8670
LW
1952/**
1953 * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
a0b66a73 1954 * @gc: the chip to remove all the mappings for
3f0f8670 1955 */
a0b66a73 1956void gpiochip_remove_pin_ranges(struct gpio_chip *gc)
f23f1516
SH
1957{
1958 struct gpio_pin_range *pin_range, *tmp;
a0b66a73 1959 struct gpio_device *gdev = gc->gpiodev;
f23f1516 1960
20ec3e39 1961 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
f23f1516
SH
1962 list_del(&pin_range->node);
1963 pinctrl_remove_gpio_range(pin_range->pctldev,
1964 &pin_range->range);
3f0f8670 1965 kfree(pin_range);
f23f1516
SH
1966 }
1967}
165adc9c
LW
1968EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
1969
1970#endif /* CONFIG_PINCTRL */
f23f1516 1971
d2876d08
DB
1972/* These "optional" allocation calls help prevent drivers from stomping
1973 * on each other, and help provide better diagnostics in debugfs.
1974 * They're called even less than the "set direction" calls.
1975 */
fac9d885 1976static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
d2876d08 1977{
a0b66a73 1978 struct gpio_chip *gc = desc->gdev->chip;
d377f56f 1979 int ret;
d2876d08 1980 unsigned long flags;
3789f5ac 1981 unsigned offset;
d2876d08 1982
18534df4
MS
1983 if (label) {
1984 label = kstrdup_const(label, GFP_KERNEL);
1985 if (!label)
1986 return -ENOMEM;
1987 }
1988
bcabdef1
AC
1989 spin_lock_irqsave(&gpio_lock, flags);
1990
d2876d08 1991 /* NOTE: gpio_request() can be called in early boot,
35e8bb51 1992 * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
d2876d08
DB
1993 */
1994
1995 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
1996 desc_set_label(desc, label ? : "?");
438d8908 1997 } else {
d377f56f 1998 ret = -EBUSY;
95d9f84f 1999 goto out_free_unlock;
35e8bb51
DB
2000 }
2001
a0b66a73
LW
2002 if (gc->request) {
2003 /* gc->request may sleep */
35e8bb51 2004 spin_unlock_irqrestore(&gpio_lock, flags);
3789f5ac 2005 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
2006 if (gpiochip_line_is_valid(gc, offset))
2007 ret = gc->request(gc, offset);
3789f5ac 2008 else
d377f56f 2009 ret = -EINVAL;
35e8bb51
DB
2010 spin_lock_irqsave(&gpio_lock, flags);
2011
8bbff39c 2012 if (ret) {
35e8bb51 2013 desc_set_label(desc, NULL);
35e8bb51 2014 clear_bit(FLAG_REQUESTED, &desc->flags);
95d9f84f 2015 goto out_free_unlock;
35e8bb51 2016 }
438d8908 2017 }
a0b66a73
LW
2018 if (gc->get_direction) {
2019 /* gc->get_direction may sleep */
80b0a602 2020 spin_unlock_irqrestore(&gpio_lock, flags);
372e722e 2021 gpiod_get_direction(desc);
80b0a602
MN
2022 spin_lock_irqsave(&gpio_lock, flags);
2023 }
77c2d792 2024 spin_unlock_irqrestore(&gpio_lock, flags);
95d9f84f
AS
2025 return 0;
2026
2027out_free_unlock:
2028 spin_unlock_irqrestore(&gpio_lock, flags);
2029 kfree_const(label);
d377f56f 2030 return ret;
77c2d792
MW
2031}
2032
fdeb8e15
LW
2033/*
2034 * This descriptor validation needs to be inserted verbatim into each
2035 * function taking a descriptor, so we need to use a preprocessor
54d77198
LW
2036 * macro to avoid endless duplication. If the desc is NULL it is an
2037 * optional GPIO and calls should just bail out.
fdeb8e15 2038 */
a746a232
RV
2039static int validate_desc(const struct gpio_desc *desc, const char *func)
2040{
2041 if (!desc)
2042 return 0;
2043 if (IS_ERR(desc)) {
2044 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
2045 return PTR_ERR(desc);
2046 }
2047 if (!desc->gdev) {
2048 pr_warn("%s: invalid GPIO (no device)\n", func);
2049 return -EINVAL;
2050 }
2051 if (!desc->gdev->chip) {
2052 dev_warn(&desc->gdev->dev,
2053 "%s: backing chip is gone\n", func);
2054 return 0;
2055 }
2056 return 1;
2057}
2058
fdeb8e15 2059#define VALIDATE_DESC(desc) do { \
a746a232
RV
2060 int __valid = validate_desc(desc, __func__); \
2061 if (__valid <= 0) \
2062 return __valid; \
2063 } while (0)
fdeb8e15
LW
2064
2065#define VALIDATE_DESC_VOID(desc) do { \
a746a232
RV
2066 int __valid = validate_desc(desc, __func__); \
2067 if (__valid <= 0) \
fdeb8e15 2068 return; \
a746a232 2069 } while (0)
fdeb8e15 2070
0eb4c6c2 2071int gpiod_request(struct gpio_desc *desc, const char *label)
77c2d792 2072{
d377f56f 2073 int ret = -EPROBE_DEFER;
77c2d792 2074
fdeb8e15 2075 VALIDATE_DESC(desc);
77c2d792 2076
dc0989e3 2077 if (try_module_get(desc->gdev->owner)) {
d377f56f 2078 ret = gpiod_request_commit(desc, label);
8bbff39c 2079 if (ret)
dc0989e3 2080 module_put(desc->gdev->owner);
33a68e86 2081 else
dc0989e3 2082 gpio_device_get(desc->gdev);
77c2d792
MW
2083 }
2084
d377f56f
LW
2085 if (ret)
2086 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
77c2d792 2087
d377f56f 2088 return ret;
d2876d08 2089}
372e722e 2090
fac9d885 2091static bool gpiod_free_commit(struct gpio_desc *desc)
d2876d08 2092{
77c2d792 2093 bool ret = false;
d2876d08 2094 unsigned long flags;
a0b66a73 2095 struct gpio_chip *gc;
d2876d08 2096
3d599d1c
UKK
2097 might_sleep();
2098
372e722e 2099 gpiod_unexport(desc);
d8f388d8 2100
d2876d08
DB
2101 spin_lock_irqsave(&gpio_lock, flags);
2102
a0b66a73
LW
2103 gc = desc->gdev->chip;
2104 if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) {
2105 if (gc->free) {
35e8bb51 2106 spin_unlock_irqrestore(&gpio_lock, flags);
a0b66a73
LW
2107 might_sleep_if(gc->can_sleep);
2108 gc->free(gc, gpio_chip_hwgpio(desc));
35e8bb51
DB
2109 spin_lock_irqsave(&gpio_lock, flags);
2110 }
18534df4 2111 kfree_const(desc->label);
d2876d08 2112 desc_set_label(desc, NULL);
07697461 2113 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
35e8bb51 2114 clear_bit(FLAG_REQUESTED, &desc->flags);
aca5ce14 2115 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
25553ff0 2116 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
9225d516
DF
2117 clear_bit(FLAG_PULL_UP, &desc->flags);
2118 clear_bit(FLAG_PULL_DOWN, &desc->flags);
2148ad77 2119 clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
73e03419
KG
2120 clear_bit(FLAG_EDGE_RISING, &desc->flags);
2121 clear_bit(FLAG_EDGE_FALLING, &desc->flags);
f625d460 2122 clear_bit(FLAG_IS_HOGGED, &desc->flags);
63636d95
GU
2123#ifdef CONFIG_OF_DYNAMIC
2124 desc->hog = NULL;
65cff704
KG
2125#endif
2126#ifdef CONFIG_GPIO_CDEV
2127 WRITE_ONCE(desc->debounce_period_us, 0);
63636d95 2128#endif
77c2d792
MW
2129 ret = true;
2130 }
d2876d08
DB
2131
2132 spin_unlock_irqrestore(&gpio_lock, flags);
6accc376
KG
2133 blocking_notifier_call_chain(&desc->gdev->notifier,
2134 GPIOLINE_CHANGED_RELEASED, desc);
51c1064e 2135
77c2d792
MW
2136 return ret;
2137}
2138
0eb4c6c2 2139void gpiod_free(struct gpio_desc *desc)
77c2d792 2140{
fac9d885 2141 if (desc && desc->gdev && gpiod_free_commit(desc)) {
fdeb8e15 2142 module_put(desc->gdev->owner);
dc0989e3 2143 gpio_device_put(desc->gdev);
33a68e86 2144 } else {
77c2d792 2145 WARN_ON(extra_checks);
33a68e86 2146 }
d2876d08 2147}
372e722e 2148
d2876d08
DB
2149/**
2150 * gpiochip_is_requested - return string iff signal was requested
a0b66a73 2151 * @gc: controller managing the signal
d2876d08
DB
2152 * @offset: of signal within controller's 0..(ngpio - 1) range
2153 *
2154 * Returns NULL if the GPIO is not currently requested, else a string.
9c8318ff
AC
2155 * The string returned is the label passed to gpio_request(); if none has been
2156 * passed it is a meaningless, non-NULL constant.
d2876d08
DB
2157 *
2158 * This function is for use by GPIO controller drivers. The label can
2159 * help with diagnostics, and knowing that the signal is used as a GPIO
2160 * can help avoid accidentally multiplexing it to another controller.
2161 */
13daf489 2162const char *gpiochip_is_requested(struct gpio_chip *gc, unsigned int offset)
d2876d08 2163{
6c0b4e6c 2164 struct gpio_desc *desc;
6c0b4e6c 2165
a0b66a73 2166 desc = gpiochip_get_desc(gc, offset);
1739a2d8
BG
2167 if (IS_ERR(desc))
2168 return NULL;
6c0b4e6c 2169
372e722e 2170 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
d2876d08 2171 return NULL;
372e722e 2172 return desc->label;
d2876d08
DB
2173}
2174EXPORT_SYMBOL_GPL(gpiochip_is_requested);
2175
77c2d792
MW
2176/**
2177 * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
a0b66a73 2178 * @gc: GPIO chip
950d55f5 2179 * @hwnum: hardware number of the GPIO for which to request the descriptor
77c2d792 2180 * @label: label for the GPIO
5923ea6c
LW
2181 * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
2182 * specify things like line inversion semantics with the machine flags
2183 * such as GPIO_OUT_LOW
2184 * @dflags: descriptor request flags for this GPIO or 0 if default, this
2185 * can be used to specify consumer semantics such as open drain
77c2d792
MW
2186 *
2187 * Function allows GPIO chip drivers to request and use their own GPIO
2188 * descriptors via gpiolib API. Difference to gpiod_request() is that this
2189 * function will not increase reference count of the GPIO chip module. This
2190 * allows the GPIO chip module to be unloaded as needed (we assume that the
2191 * GPIO chip driver handles freeing the GPIOs it has requested).
950d55f5
TR
2192 *
2193 * Returns:
2194 * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
2195 * code on failure.
77c2d792 2196 */
a0b66a73 2197struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc,
06863620 2198 unsigned int hwnum,
21abf103 2199 const char *label,
5923ea6c
LW
2200 enum gpio_lookup_flags lflags,
2201 enum gpiod_flags dflags)
77c2d792 2202{
a0b66a73 2203 struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum);
d377f56f 2204 int ret;
77c2d792 2205
abdc08a3 2206 if (IS_ERR(desc)) {
a0b66a73 2207 chip_err(gc, "failed to get GPIO descriptor\n");
abdc08a3
AC
2208 return desc;
2209 }
2210
d377f56f
LW
2211 ret = gpiod_request_commit(desc, label);
2212 if (ret < 0)
2213 return ERR_PTR(ret);
77c2d792 2214
d377f56f
LW
2215 ret = gpiod_configure_flags(desc, label, lflags, dflags);
2216 if (ret) {
a0b66a73 2217 chip_err(gc, "setup of own GPIO %s failed\n", label);
21abf103 2218 gpiod_free_commit(desc);
d377f56f 2219 return ERR_PTR(ret);
21abf103
LW
2220 }
2221
abdc08a3 2222 return desc;
77c2d792 2223}
f7d4ad98 2224EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
77c2d792
MW
2225
2226/**
2227 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
2228 * @desc: GPIO descriptor to free
2229 *
2230 * Function frees the given GPIO requested previously with
2231 * gpiochip_request_own_desc().
2232 */
2233void gpiochip_free_own_desc(struct gpio_desc *desc)
2234{
2235 if (desc)
fac9d885 2236 gpiod_free_commit(desc);
77c2d792 2237}
f7d4ad98 2238EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
d2876d08 2239
fdeb8e15
LW
2240/*
2241 * Drivers MUST set GPIO direction before making get/set calls. In
d2876d08
DB
2242 * some cases this is done in early boot, before IRQs are enabled.
2243 *
2244 * As a rule these aren't called more than once (except for drivers
2245 * using the open-drain emulation idiom) so these are natural places
2246 * to accumulate extra debugging checks. Note that we can't (yet)
2247 * rely on gpio_request() having been called beforehand.
2248 */
2249
d99f8876 2250static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset,
62adc6f3 2251 unsigned long config)
71479789 2252{
d90f3685
BG
2253 if (!gc->set_config)
2254 return -ENOTSUPP;
542f3615 2255
62adc6f3 2256 return gc->set_config(gc, offset, config);
71479789
TP
2257}
2258
0c4d8666
AS
2259static int gpio_set_config_with_argument(struct gpio_desc *desc,
2260 enum pin_config_param mode,
2261 u32 argument)
d99f8876 2262{
a0b66a73 2263 struct gpio_chip *gc = desc->gdev->chip;
91b4ea5f 2264 unsigned long config;
0c4d8666
AS
2265
2266 config = pinconf_to_config_packed(mode, argument);
2267 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
2268}
2269
baca3b15
AS
2270static int gpio_set_config_with_argument_optional(struct gpio_desc *desc,
2271 enum pin_config_param mode,
2272 u32 argument)
2273{
2274 struct device *dev = &desc->gdev->dev;
2275 int gpio = gpio_chip_hwgpio(desc);
2276 int ret;
2277
2278 ret = gpio_set_config_with_argument(desc, mode, argument);
2279 if (ret != -ENOTSUPP)
2280 return ret;
d99f8876
BG
2281
2282 switch (mode) {
baca3b15
AS
2283 case PIN_CONFIG_PERSIST_STATE:
2284 dev_dbg(dev, "Persistence not supported for GPIO %d\n", gpio);
d99f8876 2285 break;
d99f8876 2286 default:
baca3b15 2287 break;
d99f8876
BG
2288 }
2289
baca3b15
AS
2290 return 0;
2291}
2292
0c4d8666
AS
2293static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode)
2294{
6aa32ad7 2295 return gpio_set_config_with_argument(desc, mode, 0);
d99f8876
BG
2296}
2297
5f4bf171 2298static int gpio_set_bias(struct gpio_desc *desc)
2148ad77 2299{
9ef6293c 2300 enum pin_config_param bias;
6aa32ad7 2301 unsigned int arg;
2148ad77
KG
2302
2303 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
2304 bias = PIN_CONFIG_BIAS_DISABLE;
2305 else if (test_bit(FLAG_PULL_UP, &desc->flags))
2306 bias = PIN_CONFIG_BIAS_PULL_UP;
2307 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
2308 bias = PIN_CONFIG_BIAS_PULL_DOWN;
9ef6293c
AS
2309 else
2310 return 0;
2148ad77 2311
6aa32ad7
AS
2312 switch (bias) {
2313 case PIN_CONFIG_BIAS_PULL_DOWN:
2314 case PIN_CONFIG_BIAS_PULL_UP:
2315 arg = 1;
2316 break;
2317
2318 default:
2319 arg = 0;
2320 break;
2148ad77 2321 }
6aa32ad7 2322
baca3b15 2323 return gpio_set_config_with_argument_optional(desc, bias, arg);
2148ad77
KG
2324}
2325
660c619b
AS
2326/**
2327 * gpio_set_debounce_timeout() - Set debounce timeout
2328 * @desc: GPIO descriptor to set the debounce timeout
2329 * @debounce: Debounce timeout in microseconds
2330 *
2331 * The function calls the certain GPIO driver to set debounce timeout
2332 * in the hardware.
2333 *
2334 * Returns 0 on success, or negative error code otherwise.
2335 */
f725edd8
AS
2336int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce)
2337{
2338 return gpio_set_config_with_argument_optional(desc,
2339 PIN_CONFIG_INPUT_DEBOUNCE,
2340 debounce);
2148ad77
KG
2341}
2342
79a9becd
AC
2343/**
2344 * gpiod_direction_input - set the GPIO direction to input
2345 * @desc: GPIO to set to input
2346 *
2347 * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
2348 * be called safely on it.
2349 *
2350 * Return 0 in case of success, else an error code.
2351 */
2352int gpiod_direction_input(struct gpio_desc *desc)
d2876d08 2353{
a0b66a73 2354 struct gpio_chip *gc;
d377f56f 2355 int ret = 0;
d2876d08 2356
fdeb8e15 2357 VALIDATE_DESC(desc);
a0b66a73 2358 gc = desc->gdev->chip;
bcabdef1 2359
e48d194d
LW
2360 /*
2361 * It is legal to have no .get() and .direction_input() specified if
2362 * the chip is output-only, but you can't specify .direction_input()
2363 * and not support the .get() operation, that doesn't make sense.
2364 */
a0b66a73 2365 if (!gc->get && gc->direction_input) {
6424de5a 2366 gpiod_warn(desc,
e48d194d
LW
2367 "%s: missing get() but have direction_input()\n",
2368 __func__);
be1a4b13
LW
2369 return -EIO;
2370 }
2371
e48d194d
LW
2372 /*
2373 * If we have a .direction_input() callback, things are simple,
2374 * just call it. Else we are some input-only chip so try to check the
2375 * direction (if .get_direction() is supported) else we silently
2376 * assume we are in input mode after this.
2377 */
a0b66a73
LW
2378 if (gc->direction_input) {
2379 ret = gc->direction_input(gc, gpio_chip_hwgpio(desc));
2380 } else if (gc->get_direction &&
2381 (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) {
ae9847f4 2382 gpiod_warn(desc,
e48d194d
LW
2383 "%s: missing direction_input() operation and line is output\n",
2384 __func__);
ae9847f4
RRD
2385 return -EIO;
2386 }
2148ad77 2387 if (ret == 0) {
d2876d08 2388 clear_bit(FLAG_IS_OUT, &desc->flags);
5f4bf171 2389 ret = gpio_set_bias(desc);
2148ad77 2390 }
d449991c 2391
d377f56f 2392 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
d82da797 2393
d377f56f 2394 return ret;
d2876d08 2395}
79a9becd 2396EXPORT_SYMBOL_GPL(gpiod_direction_input);
372e722e 2397
fac9d885 2398static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
d2876d08 2399{
c663e5f5 2400 struct gpio_chip *gc = desc->gdev->chip;
ad17731d 2401 int val = !!value;
ae9847f4 2402 int ret = 0;
d2876d08 2403
e48d194d
LW
2404 /*
2405 * It's OK not to specify .direction_output() if the gpiochip is
2406 * output-only, but if there is then not even a .set() operation it
2407 * is pretty tricky to drive the output line.
2408 */
ae9847f4 2409 if (!gc->set && !gc->direction_output) {
6424de5a 2410 gpiod_warn(desc,
e48d194d
LW
2411 "%s: missing set() and direction_output() operations\n",
2412 __func__);
be1a4b13
LW
2413 return -EIO;
2414 }
2415
ae9847f4
RRD
2416 if (gc->direction_output) {
2417 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
2418 } else {
e48d194d 2419 /* Check that we are in output mode if we can */
ae9847f4
RRD
2420 if (gc->get_direction &&
2421 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
2422 gpiod_warn(desc,
2423 "%s: missing direction_output() operation\n",
2424 __func__);
2425 return -EIO;
2426 }
e48d194d
LW
2427 /*
2428 * If we can't actively set the direction, we are some
2429 * output-only chip, so just drive the output as desired.
2430 */
ae9847f4
RRD
2431 gc->set(gc, gpio_chip_hwgpio(desc), val);
2432 }
2433
c663e5f5 2434 if (!ret)
d2876d08 2435 set_bit(FLAG_IS_OUT, &desc->flags);
ad17731d 2436 trace_gpio_value(desc_to_gpio(desc), 0, val);
c663e5f5
LW
2437 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
2438 return ret;
d2876d08 2439}
ef70bbe1
PZ
2440
2441/**
2442 * gpiod_direction_output_raw - set the GPIO direction to output
2443 * @desc: GPIO to set to output
2444 * @value: initial output value of the GPIO
2445 *
2446 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2447 * be called safely on it. The initial value of the output must be specified
2448 * as raw value on the physical line without regard for the ACTIVE_LOW status.
2449 *
2450 * Return 0 in case of success, else an error code.
2451 */
2452int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
2453{
fdeb8e15 2454 VALIDATE_DESC(desc);
fac9d885 2455 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1
PZ
2456}
2457EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
2458
2459/**
90df4fe0 2460 * gpiod_direction_output - set the GPIO direction to output
ef70bbe1
PZ
2461 * @desc: GPIO to set to output
2462 * @value: initial output value of the GPIO
2463 *
2464 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2465 * be called safely on it. The initial value of the output must be specified
2466 * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
2467 * account.
2468 *
2469 * Return 0 in case of success, else an error code.
2470 */
2471int gpiod_direction_output(struct gpio_desc *desc, int value)
2472{
02e47980
LW
2473 int ret;
2474
fdeb8e15 2475 VALIDATE_DESC(desc);
ef70bbe1
PZ
2476 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2477 value = !value;
ad17731d
LW
2478 else
2479 value = !!value;
02e47980 2480
4e9439dd
HV
2481 /* GPIOs used for enabled IRQs shall not be set as output */
2482 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
2483 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
02e47980
LW
2484 gpiod_err(desc,
2485 "%s: tried to set a GPIO tied to an IRQ as output\n",
2486 __func__);
2487 return -EIO;
2488 }
2489
2490 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
2491 /* First see if we can enable open drain in hardware */
83522358 2492 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN);
02e47980
LW
2493 if (!ret)
2494 goto set_output_value;
2495 /* Emulate open drain by not actively driving the line high */
e735244e
BG
2496 if (value) {
2497 ret = gpiod_direction_input(desc);
2498 goto set_output_flag;
2499 }
1cef8b50 2500 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
83522358 2501 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE);
02e47980
LW
2502 if (!ret)
2503 goto set_output_value;
2504 /* Emulate open source by not actively driving the line low */
e735244e
BG
2505 if (!value) {
2506 ret = gpiod_direction_input(desc);
2507 goto set_output_flag;
2508 }
02e47980 2509 } else {
83522358 2510 gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL);
02e47980
LW
2511 }
2512
2513set_output_value:
5f4bf171 2514 ret = gpio_set_bias(desc);
2821ae5f
KG
2515 if (ret)
2516 return ret;
fac9d885 2517 return gpiod_direction_output_raw_commit(desc, value);
e735244e
BG
2518
2519set_output_flag:
2520 /*
2521 * When emulating open-source or open-drain functionalities by not
2522 * actively driving the line (setting mode to input) we still need to
2523 * set the IS_OUT flag or otherwise we won't be able to set the line
2524 * value anymore.
2525 */
2526 if (ret == 0)
2527 set_bit(FLAG_IS_OUT, &desc->flags);
2528 return ret;
ef70bbe1 2529}
79a9becd 2530EXPORT_SYMBOL_GPL(gpiod_direction_output);
d2876d08 2531
42112dd7
DP
2532/**
2533 * gpiod_enable_hw_timestamp_ns - Enable hardware timestamp in nanoseconds.
2534 *
2535 * @desc: GPIO to enable.
2536 * @flags: Flags related to GPIO edge.
2537 *
2538 * Return 0 in case of success, else negative error code.
2539 */
2540int gpiod_enable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags)
2541{
2542 int ret = 0;
2543 struct gpio_chip *gc;
2544
2545 VALIDATE_DESC(desc);
2546
2547 gc = desc->gdev->chip;
2548 if (!gc->en_hw_timestamp) {
2549 gpiod_warn(desc, "%s: hw ts not supported\n", __func__);
2550 return -ENOTSUPP;
2551 }
2552
2553 ret = gc->en_hw_timestamp(gc, gpio_chip_hwgpio(desc), flags);
2554 if (ret)
2555 gpiod_warn(desc, "%s: hw ts request failed\n", __func__);
2556
2557 return ret;
2558}
2559EXPORT_SYMBOL_GPL(gpiod_enable_hw_timestamp_ns);
2560
2561/**
2562 * gpiod_disable_hw_timestamp_ns - Disable hardware timestamp.
2563 *
2564 * @desc: GPIO to disable.
2565 * @flags: Flags related to GPIO edge, same value as used during enable call.
2566 *
2567 * Return 0 in case of success, else negative error code.
2568 */
2569int gpiod_disable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags)
2570{
2571 int ret = 0;
2572 struct gpio_chip *gc;
2573
2574 VALIDATE_DESC(desc);
2575
2576 gc = desc->gdev->chip;
2577 if (!gc->dis_hw_timestamp) {
2578 gpiod_warn(desc, "%s: hw ts not supported\n", __func__);
2579 return -ENOTSUPP;
2580 }
2581
2582 ret = gc->dis_hw_timestamp(gc, gpio_chip_hwgpio(desc), flags);
2583 if (ret)
2584 gpiod_warn(desc, "%s: hw ts release failed\n", __func__);
2585
2586 return ret;
2587}
2588EXPORT_SYMBOL_GPL(gpiod_disable_hw_timestamp_ns);
2589
8ced32ff
GU
2590/**
2591 * gpiod_set_config - sets @config for a GPIO
2592 * @desc: descriptor of the GPIO for which to set the configuration
2593 * @config: Same packed config format as generic pinconf
2594 *
2595 * Returns:
2596 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2597 * configuration.
2598 */
2599int gpiod_set_config(struct gpio_desc *desc, unsigned long config)
2600{
a0b66a73 2601 struct gpio_chip *gc;
8ced32ff
GU
2602
2603 VALIDATE_DESC(desc);
a0b66a73 2604 gc = desc->gdev->chip;
8ced32ff 2605
a0b66a73 2606 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
8ced32ff
GU
2607}
2608EXPORT_SYMBOL_GPL(gpiod_set_config);
2609
c4b5be98 2610/**
950d55f5
TR
2611 * gpiod_set_debounce - sets @debounce time for a GPIO
2612 * @desc: descriptor of the GPIO for which to set debounce time
2613 * @debounce: debounce time in microseconds
65d87656 2614 *
950d55f5
TR
2615 * Returns:
2616 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2617 * debounce time.
c4b5be98 2618 */
13daf489 2619int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce)
c4b5be98 2620{
8ced32ff 2621 unsigned long config;
be1a4b13 2622
2956b5d9 2623 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
8ced32ff 2624 return gpiod_set_config(desc, config);
c4b5be98 2625}
79a9becd 2626EXPORT_SYMBOL_GPL(gpiod_set_debounce);
372e722e 2627
e10f72bf
AJ
2628/**
2629 * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
2630 * @desc: descriptor of the GPIO for which to configure persistence
2631 * @transitory: True to lose state on suspend or reset, false for persistence
2632 *
2633 * Returns:
2634 * 0 on success, otherwise a negative error code.
2635 */
2636int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
2637{
156dd392 2638 VALIDATE_DESC(desc);
e10f72bf
AJ
2639 /*
2640 * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
2641 * persistence state.
2642 */
4fc5bfeb 2643 assign_bit(FLAG_TRANSITORY, &desc->flags, transitory);
e10f72bf
AJ
2644
2645 /* If the driver supports it, set the persistence state now */
baca3b15
AS
2646 return gpio_set_config_with_argument_optional(desc,
2647 PIN_CONFIG_PERSIST_STATE,
2648 !transitory);
e10f72bf
AJ
2649}
2650EXPORT_SYMBOL_GPL(gpiod_set_transitory);
2651
79a9becd
AC
2652/**
2653 * gpiod_is_active_low - test whether a GPIO is active-low or not
2654 * @desc: the gpio descriptor to test
2655 *
2656 * Returns 1 if the GPIO is active-low, 0 otherwise.
2657 */
2658int gpiod_is_active_low(const struct gpio_desc *desc)
372e722e 2659{
fdeb8e15 2660 VALIDATE_DESC(desc);
79a9becd 2661 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
372e722e 2662}
79a9becd 2663EXPORT_SYMBOL_GPL(gpiod_is_active_low);
d2876d08 2664
d3a5bcb4
MM
2665/**
2666 * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not
2667 * @desc: the gpio descriptor to change
2668 */
2669void gpiod_toggle_active_low(struct gpio_desc *desc)
2670{
2671 VALIDATE_DESC_VOID(desc);
2672 change_bit(FLAG_ACTIVE_LOW, &desc->flags);
2673}
2674EXPORT_SYMBOL_GPL(gpiod_toggle_active_low);
2675
234c5209
AS
2676static int gpio_chip_get_value(struct gpio_chip *gc, const struct gpio_desc *desc)
2677{
2678 return gc->get ? gc->get(gc, gpio_chip_hwgpio(desc)) : -EIO;
2679}
2680
d2876d08
DB
2681/* I/O calls are only valid after configuration completed; the relevant
2682 * "is this a valid GPIO" error checks should already have been done.
2683 *
2684 * "Get" operations are often inlinable as reading a pin value register,
2685 * and masking the relevant bit in that register.
2686 *
2687 * When "set" operations are inlinable, they involve writing that mask to
2688 * one register to set a low value, or a different register to set it high.
2689 * Otherwise locking is needed, so there may be little value to inlining.
2690 *
2691 *------------------------------------------------------------------------
2692 *
2693 * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
2694 * have requested the GPIO. That can include implicit requesting by
2695 * a direction setting call. Marking a gpio as requested locks its chip
2696 * in memory, guaranteeing that these table lookups need no more locking
2697 * and that gpiochip_remove() will fail.
2698 *
2699 * REVISIT when debugging, consider adding some instrumentation to ensure
2700 * that the GPIO was actually requested.
2701 */
2702
fac9d885 2703static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
d2876d08 2704{
a0b66a73 2705 struct gpio_chip *gc;
e20538b8 2706 int value;
d2876d08 2707
a0b66a73 2708 gc = desc->gdev->chip;
234c5209 2709 value = gpio_chip_get_value(gc, desc);
723a6303 2710 value = value < 0 ? value : !!value;
372e722e 2711 trace_gpio_value(desc_to_gpio(desc), 1, value);
3f397c21 2712 return value;
d2876d08 2713}
372e722e 2714
a0b66a73 2715static int gpio_chip_get_multiple(struct gpio_chip *gc,
eec1d566
LW
2716 unsigned long *mask, unsigned long *bits)
2717{
1cef8b50 2718 if (gc->get_multiple)
a0b66a73 2719 return gc->get_multiple(gc, mask, bits);
1cef8b50 2720 if (gc->get) {
eec1d566
LW
2721 int i, value;
2722
a0b66a73
LW
2723 for_each_set_bit(i, mask, gc->ngpio) {
2724 value = gc->get(gc, i);
eec1d566
LW
2725 if (value < 0)
2726 return value;
2727 __assign_bit(i, bits, value);
2728 }
2729 return 0;
2730 }
2731 return -EIO;
2732}
2733
2734int gpiod_get_array_value_complex(bool raw, bool can_sleep,
2735 unsigned int array_size,
2736 struct gpio_desc **desc_array,
77588c14 2737 struct gpio_array *array_info,
b9762beb 2738 unsigned long *value_bitmap)
eec1d566 2739{
d377f56f 2740 int ret, i = 0;
b17566a6
JK
2741
2742 /*
2743 * Validate array_info against desc_array and its size.
2744 * It should immediately follow desc_array if both
2745 * have been obtained from the same gpiod_get_array() call.
2746 */
2747 if (array_info && array_info->desc == desc_array &&
2748 array_size <= array_info->size &&
2749 (void *)array_info == desc_array + array_info->size) {
2750 if (!can_sleep)
2751 WARN_ON(array_info->chip->can_sleep);
2752
d377f56f 2753 ret = gpio_chip_get_multiple(array_info->chip,
b17566a6
JK
2754 array_info->get_mask,
2755 value_bitmap);
d377f56f
LW
2756 if (ret)
2757 return ret;
b17566a6
JK
2758
2759 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2760 bitmap_xor(value_bitmap, value_bitmap,
2761 array_info->invert_mask, array_size);
2762
b17566a6 2763 i = find_first_zero_bit(array_info->get_mask, array_size);
ae66eca0
AS
2764 if (i == array_size)
2765 return 0;
b17566a6
JK
2766 } else {
2767 array_info = NULL;
2768 }
eec1d566
LW
2769
2770 while (i < array_size) {
a0b66a73 2771 struct gpio_chip *gc = desc_array[i]->gdev->chip;
c80c4435
AS
2772 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
2773 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
3027743f 2774 unsigned long *mask, *bits;
c07ea8d0 2775 int first, j;
eec1d566 2776
a0b66a73 2777 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
c80c4435
AS
2778 mask = fastpath_mask;
2779 bits = fastpath_bits;
3027743f 2780 } else {
c354c295
AS
2781 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
2782
2783 mask = bitmap_alloc(gc->ngpio, flags);
3027743f
LA
2784 if (!mask)
2785 return -ENOMEM;
c80c4435 2786
c354c295
AS
2787 bits = bitmap_alloc(gc->ngpio, flags);
2788 if (!bits) {
2789 bitmap_free(mask);
2790 return -ENOMEM;
2791 }
3027743f
LA
2792 }
2793
a0b66a73 2794 bitmap_zero(mask, gc->ngpio);
3027743f 2795
eec1d566 2796 if (!can_sleep)
a0b66a73 2797 WARN_ON(gc->can_sleep);
eec1d566
LW
2798
2799 /* collect all inputs belonging to the same chip */
2800 first = i;
eec1d566
LW
2801 do {
2802 const struct gpio_desc *desc = desc_array[i];
2803 int hwgpio = gpio_chip_hwgpio(desc);
2804
2805 __set_bit(hwgpio, mask);
2806 i++;
b17566a6
JK
2807
2808 if (array_info)
35ae7f96
JK
2809 i = find_next_zero_bit(array_info->get_mask,
2810 array_size, i);
eec1d566 2811 } while ((i < array_size) &&
a0b66a73 2812 (desc_array[i]->gdev->chip == gc));
eec1d566 2813
a0b66a73 2814 ret = gpio_chip_get_multiple(gc, mask, bits);
3027743f 2815 if (ret) {
c80c4435 2816 if (mask != fastpath_mask)
c354c295
AS
2817 bitmap_free(mask);
2818 if (bits != fastpath_bits)
2819 bitmap_free(bits);
eec1d566 2820 return ret;
3027743f 2821 }
eec1d566 2822
b17566a6 2823 for (j = first; j < i; ) {
eec1d566
LW
2824 const struct gpio_desc *desc = desc_array[j];
2825 int hwgpio = gpio_chip_hwgpio(desc);
2826 int value = test_bit(hwgpio, bits);
2827
2828 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2829 value = !value;
b9762beb 2830 __assign_bit(j, value_bitmap, value);
eec1d566 2831 trace_gpio_value(desc_to_gpio(desc), 1, value);
799d5eb4 2832 j++;
b17566a6
JK
2833
2834 if (array_info)
35ae7f96
JK
2835 j = find_next_zero_bit(array_info->get_mask, i,
2836 j);
eec1d566 2837 }
3027743f 2838
c80c4435 2839 if (mask != fastpath_mask)
c354c295
AS
2840 bitmap_free(mask);
2841 if (bits != fastpath_bits)
2842 bitmap_free(bits);
eec1d566
LW
2843 }
2844 return 0;
2845}
2846
d2876d08 2847/**
79a9becd
AC
2848 * gpiod_get_raw_value() - return a gpio's raw value
2849 * @desc: gpio whose value will be returned
d2876d08 2850 *
79a9becd 2851 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 2852 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd 2853 *
827a9b8b 2854 * This function can be called from contexts where we cannot sleep, and will
79a9becd 2855 * complain if the GPIO chip functions potentially sleep.
d2876d08 2856 */
79a9becd 2857int gpiod_get_raw_value(const struct gpio_desc *desc)
d2876d08 2858{
fdeb8e15 2859 VALIDATE_DESC(desc);
3285170f 2860 /* Should be using gpiod_get_raw_value_cansleep() */
fdeb8e15 2861 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 2862 return gpiod_get_raw_value_commit(desc);
d2876d08 2863}
79a9becd 2864EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
372e722e 2865
79a9becd
AC
2866/**
2867 * gpiod_get_value() - return a gpio's value
2868 * @desc: gpio whose value will be returned
2869 *
2870 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 2871 * account, or negative errno on failure.
79a9becd 2872 *
827a9b8b 2873 * This function can be called from contexts where we cannot sleep, and will
79a9becd
AC
2874 * complain if the GPIO chip functions potentially sleep.
2875 */
2876int gpiod_get_value(const struct gpio_desc *desc)
372e722e 2877{
79a9becd 2878 int value;
fdeb8e15
LW
2879
2880 VALIDATE_DESC(desc);
3285170f 2881 /* Should be using gpiod_get_value_cansleep() */
fdeb8e15 2882 WARN_ON(desc->gdev->chip->can_sleep);
79a9becd 2883
fac9d885 2884 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
2885 if (value < 0)
2886 return value;
2887
79a9becd
AC
2888 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2889 value = !value;
2890
2891 return value;
372e722e 2892}
79a9becd 2893EXPORT_SYMBOL_GPL(gpiod_get_value);
d2876d08 2894
eec1d566
LW
2895/**
2896 * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
b9762beb 2897 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 2898 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 2899 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2900 * @value_bitmap: bitmap to store the read values
eec1d566
LW
2901 *
2902 * Read the raw values of the GPIOs, i.e. the values of the physical lines
2903 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
2904 * else an error code.
2905 *
827a9b8b 2906 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
2907 * and it will complain if the GPIO chip functions potentially sleep.
2908 */
2909int gpiod_get_raw_array_value(unsigned int array_size,
b9762beb 2910 struct gpio_desc **desc_array,
77588c14 2911 struct gpio_array *array_info,
b9762beb 2912 unsigned long *value_bitmap)
eec1d566
LW
2913{
2914 if (!desc_array)
2915 return -EINVAL;
2916 return gpiod_get_array_value_complex(true, false, array_size,
77588c14
JK
2917 desc_array, array_info,
2918 value_bitmap);
eec1d566
LW
2919}
2920EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
2921
2922/**
2923 * gpiod_get_array_value() - read values from an array of GPIOs
b9762beb 2924 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 2925 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 2926 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2927 * @value_bitmap: bitmap to store the read values
eec1d566
LW
2928 *
2929 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
2930 * into account. Return 0 in case of success, else an error code.
2931 *
827a9b8b 2932 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
2933 * and it will complain if the GPIO chip functions potentially sleep.
2934 */
2935int gpiod_get_array_value(unsigned int array_size,
b9762beb 2936 struct gpio_desc **desc_array,
77588c14 2937 struct gpio_array *array_info,
b9762beb 2938 unsigned long *value_bitmap)
eec1d566
LW
2939{
2940 if (!desc_array)
2941 return -EINVAL;
2942 return gpiod_get_array_value_complex(false, false, array_size,
77588c14
JK
2943 desc_array, array_info,
2944 value_bitmap);
eec1d566
LW
2945}
2946EXPORT_SYMBOL_GPL(gpiod_get_array_value);
2947
aca5ce14 2948/*
fac9d885 2949 * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
79a9becd 2950 * @desc: gpio descriptor whose state need to be set.
20a8a968 2951 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
aca5ce14 2952 */
fac9d885 2953static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
aca5ce14 2954{
d377f56f 2955 int ret = 0;
a0b66a73 2956 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
2957 int offset = gpio_chip_hwgpio(desc);
2958
aca5ce14 2959 if (value) {
a0b66a73 2960 ret = gc->direction_input(gc, offset);
aca5ce14 2961 } else {
a0b66a73 2962 ret = gc->direction_output(gc, offset, 0);
d377f56f 2963 if (!ret)
372e722e 2964 set_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 2965 }
d377f56f
LW
2966 trace_gpio_direction(desc_to_gpio(desc), value, ret);
2967 if (ret < 0)
6424de5a
MB
2968 gpiod_err(desc,
2969 "%s: Error in set_value for open drain err %d\n",
d377f56f 2970 __func__, ret);
aca5ce14
LD
2971}
2972
25553ff0 2973/*
79a9becd
AC
2974 * _gpio_set_open_source_value() - Set the open source gpio's value.
2975 * @desc: gpio descriptor whose state need to be set.
20a8a968 2976 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
25553ff0 2977 */
fac9d885 2978static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
25553ff0 2979{
d377f56f 2980 int ret = 0;
a0b66a73 2981 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
2982 int offset = gpio_chip_hwgpio(desc);
2983
25553ff0 2984 if (value) {
a0b66a73 2985 ret = gc->direction_output(gc, offset, 1);
d377f56f 2986 if (!ret)
372e722e 2987 set_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 2988 } else {
a0b66a73 2989 ret = gc->direction_input(gc, offset);
25553ff0 2990 }
d377f56f
LW
2991 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
2992 if (ret < 0)
6424de5a
MB
2993 gpiod_err(desc,
2994 "%s: Error in set_value for open source err %d\n",
d377f56f 2995 __func__, ret);
25553ff0
LD
2996}
2997
fac9d885 2998static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
d2876d08 2999{
a0b66a73 3000 struct gpio_chip *gc;
d2876d08 3001
a0b66a73 3002 gc = desc->gdev->chip;
372e722e 3003 trace_gpio_value(desc_to_gpio(desc), 0, value);
a0b66a73 3004 gc->set(gc, gpio_chip_hwgpio(desc), value);
372e722e
AC
3005}
3006
5f424243
RI
3007/*
3008 * set multiple outputs on the same chip;
3009 * use the chip's set_multiple function if available;
3010 * otherwise set the outputs sequentially;
a0b66a73 3011 * @chip: the GPIO chip we operate on
5f424243
RI
3012 * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
3013 * defines which outputs are to be changed
3014 * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
3015 * defines the values the outputs specified by mask are to be set to
3016 */
a0b66a73 3017static void gpio_chip_set_multiple(struct gpio_chip *gc,
5f424243
RI
3018 unsigned long *mask, unsigned long *bits)
3019{
a0b66a73
LW
3020 if (gc->set_multiple) {
3021 gc->set_multiple(gc, mask, bits);
5f424243 3022 } else {
5e4e6fb3
AS
3023 unsigned int i;
3024
3025 /* set outputs if the corresponding mask bit is set */
a0b66a73
LW
3026 for_each_set_bit(i, mask, gc->ngpio)
3027 gc->set(gc, i, test_bit(i, bits));
5f424243
RI
3028 }
3029}
3030
3027743f 3031int gpiod_set_array_value_complex(bool raw, bool can_sleep,
3c940660
GU
3032 unsigned int array_size,
3033 struct gpio_desc **desc_array,
3034 struct gpio_array *array_info,
3035 unsigned long *value_bitmap)
5f424243
RI
3036{
3037 int i = 0;
3038
b17566a6
JK
3039 /*
3040 * Validate array_info against desc_array and its size.
3041 * It should immediately follow desc_array if both
3042 * have been obtained from the same gpiod_get_array() call.
3043 */
3044 if (array_info && array_info->desc == desc_array &&
3045 array_size <= array_info->size &&
3046 (void *)array_info == desc_array + array_info->size) {
3047 if (!can_sleep)
3048 WARN_ON(array_info->chip->can_sleep);
3049
3050 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3051 bitmap_xor(value_bitmap, value_bitmap,
3052 array_info->invert_mask, array_size);
3053
3054 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
3055 value_bitmap);
3056
b17566a6 3057 i = find_first_zero_bit(array_info->set_mask, array_size);
ae66eca0
AS
3058 if (i == array_size)
3059 return 0;
b17566a6
JK
3060 } else {
3061 array_info = NULL;
3062 }
3063
5f424243 3064 while (i < array_size) {
a0b66a73 3065 struct gpio_chip *gc = desc_array[i]->gdev->chip;
c80c4435
AS
3066 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
3067 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
3027743f 3068 unsigned long *mask, *bits;
5f424243
RI
3069 int count = 0;
3070
a0b66a73 3071 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
c80c4435
AS
3072 mask = fastpath_mask;
3073 bits = fastpath_bits;
3027743f 3074 } else {
c354c295
AS
3075 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
3076
3077 mask = bitmap_alloc(gc->ngpio, flags);
3027743f
LA
3078 if (!mask)
3079 return -ENOMEM;
c80c4435 3080
c354c295
AS
3081 bits = bitmap_alloc(gc->ngpio, flags);
3082 if (!bits) {
3083 bitmap_free(mask);
3084 return -ENOMEM;
3085 }
3027743f
LA
3086 }
3087
a0b66a73 3088 bitmap_zero(mask, gc->ngpio);
3027743f 3089
38e003f4 3090 if (!can_sleep)
a0b66a73 3091 WARN_ON(gc->can_sleep);
38e003f4 3092
5f424243
RI
3093 do {
3094 struct gpio_desc *desc = desc_array[i];
3095 int hwgpio = gpio_chip_hwgpio(desc);
b9762beb 3096 int value = test_bit(i, value_bitmap);
5f424243 3097
b17566a6
JK
3098 /*
3099 * Pins applicable for fast input but not for
3100 * fast output processing may have been already
3101 * inverted inside the fast path, skip them.
3102 */
3103 if (!raw && !(array_info &&
3104 test_bit(i, array_info->invert_mask)) &&
3105 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
5f424243
RI
3106 value = !value;
3107 trace_gpio_value(desc_to_gpio(desc), 0, value);
3108 /*
3109 * collect all normal outputs belonging to the same chip
3110 * open drain and open source outputs are set individually
3111 */
02e47980 3112 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
fac9d885 3113 gpio_set_open_drain_value_commit(desc, value);
02e47980 3114 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
fac9d885 3115 gpio_set_open_source_value_commit(desc, value);
5f424243
RI
3116 } else {
3117 __set_bit(hwgpio, mask);
4fc5bfeb 3118 __assign_bit(hwgpio, bits, value);
5f424243
RI
3119 count++;
3120 }
3121 i++;
b17566a6
JK
3122
3123 if (array_info)
35ae7f96
JK
3124 i = find_next_zero_bit(array_info->set_mask,
3125 array_size, i);
fdeb8e15 3126 } while ((i < array_size) &&
a0b66a73 3127 (desc_array[i]->gdev->chip == gc));
5f424243 3128 /* push collected bits to outputs */
38e003f4 3129 if (count != 0)
a0b66a73 3130 gpio_chip_set_multiple(gc, mask, bits);
3027743f 3131
c80c4435 3132 if (mask != fastpath_mask)
c354c295
AS
3133 bitmap_free(mask);
3134 if (bits != fastpath_bits)
3135 bitmap_free(bits);
5f424243 3136 }
3027743f 3137 return 0;
5f424243
RI
3138}
3139
d2876d08 3140/**
79a9becd
AC
3141 * gpiod_set_raw_value() - assign a gpio's raw value
3142 * @desc: gpio whose value will be assigned
d2876d08 3143 * @value: value to assign
d2876d08 3144 *
79a9becd
AC
3145 * Set the raw value of the GPIO, i.e. the value of its physical line without
3146 * regard for its ACTIVE_LOW status.
3147 *
827a9b8b 3148 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3149 * complain if the GPIO chip functions potentially sleep.
d2876d08 3150 */
79a9becd 3151void gpiod_set_raw_value(struct gpio_desc *desc, int value)
372e722e 3152{
fdeb8e15 3153 VALIDATE_DESC_VOID(desc);
3285170f 3154 /* Should be using gpiod_set_raw_value_cansleep() */
fdeb8e15 3155 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3156 gpiod_set_raw_value_commit(desc, value);
d2876d08 3157}
79a9becd 3158EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
d2876d08 3159
1e77fc82
GU
3160/**
3161 * gpiod_set_value_nocheck() - set a GPIO line value without checking
3162 * @desc: the descriptor to set the value on
3163 * @value: value to set
3164 *
3165 * This sets the value of a GPIO line backing a descriptor, applying
3166 * different semantic quirks like active low and open drain/source
3167 * handling.
3168 */
3169static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
3170{
3171 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3172 value = !value;
3173 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
3174 gpio_set_open_drain_value_commit(desc, value);
3175 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
3176 gpio_set_open_source_value_commit(desc, value);
3177 else
3178 gpiod_set_raw_value_commit(desc, value);
3179}
3180
d2876d08 3181/**
79a9becd
AC
3182 * gpiod_set_value() - assign a gpio's value
3183 * @desc: gpio whose value will be assigned
3184 * @value: value to assign
3185 *
02e47980
LW
3186 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
3187 * OPEN_DRAIN and OPEN_SOURCE flags into account.
d2876d08 3188 *
827a9b8b 3189 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3190 * complain if the GPIO chip functions potentially sleep.
d2876d08 3191 */
79a9becd 3192void gpiod_set_value(struct gpio_desc *desc, int value)
d2876d08 3193{
fdeb8e15 3194 VALIDATE_DESC_VOID(desc);
3285170f 3195 /* Should be using gpiod_set_value_cansleep() */
fdeb8e15 3196 WARN_ON(desc->gdev->chip->can_sleep);
1e77fc82 3197 gpiod_set_value_nocheck(desc, value);
372e722e 3198}
79a9becd 3199EXPORT_SYMBOL_GPL(gpiod_set_value);
d2876d08 3200
5f424243 3201/**
3fff99bc 3202 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
b9762beb 3203 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3204 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3205 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3206 * @value_bitmap: bitmap of values to assign
5f424243
RI
3207 *
3208 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3209 * without regard for their ACTIVE_LOW status.
3210 *
827a9b8b 3211 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3212 * complain if the GPIO chip functions potentially sleep.
3213 */
3027743f 3214int gpiod_set_raw_array_value(unsigned int array_size,
3c940660
GU
3215 struct gpio_desc **desc_array,
3216 struct gpio_array *array_info,
3217 unsigned long *value_bitmap)
5f424243
RI
3218{
3219 if (!desc_array)
3027743f
LA
3220 return -EINVAL;
3221 return gpiod_set_array_value_complex(true, false, array_size,
77588c14 3222 desc_array, array_info, value_bitmap);
5f424243 3223}
3fff99bc 3224EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
5f424243
RI
3225
3226/**
3fff99bc 3227 * gpiod_set_array_value() - assign values to an array of GPIOs
b9762beb 3228 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3229 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3230 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3231 * @value_bitmap: bitmap of values to assign
5f424243
RI
3232 *
3233 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3234 * into account.
3235 *
827a9b8b 3236 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3237 * complain if the GPIO chip functions potentially sleep.
3238 */
cf9af0d5
GU
3239int gpiod_set_array_value(unsigned int array_size,
3240 struct gpio_desc **desc_array,
3241 struct gpio_array *array_info,
3242 unsigned long *value_bitmap)
5f424243
RI
3243{
3244 if (!desc_array)
cf9af0d5
GU
3245 return -EINVAL;
3246 return gpiod_set_array_value_complex(false, false, array_size,
3247 desc_array, array_info,
3248 value_bitmap);
5f424243 3249}
3fff99bc 3250EXPORT_SYMBOL_GPL(gpiod_set_array_value);
5f424243 3251
d2876d08 3252/**
79a9becd
AC
3253 * gpiod_cansleep() - report whether gpio value access may sleep
3254 * @desc: gpio to check
d2876d08 3255 *
d2876d08 3256 */
79a9becd 3257int gpiod_cansleep(const struct gpio_desc *desc)
372e722e 3258{
fdeb8e15
LW
3259 VALIDATE_DESC(desc);
3260 return desc->gdev->chip->can_sleep;
d2876d08 3261}
79a9becd 3262EXPORT_SYMBOL_GPL(gpiod_cansleep);
d2876d08 3263
90b39402
LW
3264/**
3265 * gpiod_set_consumer_name() - set the consumer name for the descriptor
3266 * @desc: gpio to set the consumer name on
3267 * @name: the new consumer name
3268 */
18534df4 3269int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
90b39402 3270{
18534df4
MS
3271 VALIDATE_DESC(desc);
3272 if (name) {
3273 name = kstrdup_const(name, GFP_KERNEL);
3274 if (!name)
3275 return -ENOMEM;
3276 }
3277
3278 kfree_const(desc->label);
3279 desc_set_label(desc, name);
3280
3281 return 0;
90b39402
LW
3282}
3283EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
3284
0f6d504e 3285/**
79a9becd
AC
3286 * gpiod_to_irq() - return the IRQ corresponding to a GPIO
3287 * @desc: gpio whose IRQ will be returned (already requested)
0f6d504e 3288 *
79a9becd
AC
3289 * Return the IRQ corresponding to the passed GPIO, or an error code in case of
3290 * error.
0f6d504e 3291 */
79a9becd 3292int gpiod_to_irq(const struct gpio_desc *desc)
0f6d504e 3293{
a0b66a73 3294 struct gpio_chip *gc;
4c37ce86 3295 int offset;
0f6d504e 3296
79bb71bd
LW
3297 /*
3298 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
3299 * requires this function to not return zero on an invalid descriptor
3300 * but rather a negative error number.
3301 */
bfbbe44d 3302 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
79bb71bd
LW
3303 return -EINVAL;
3304
a0b66a73 3305 gc = desc->gdev->chip;
372e722e 3306 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
3307 if (gc->to_irq) {
3308 int retirq = gc->to_irq(gc, offset);
4c37ce86
LW
3309
3310 /* Zero means NO_IRQ */
3311 if (!retirq)
3312 return -ENXIO;
3313
3314 return retirq;
3315 }
ae42f928
SP
3316#ifdef CONFIG_GPIOLIB_IRQCHIP
3317 if (gc->irq.chip) {
3318 /*
3319 * Avoid race condition with other code, which tries to lookup
3320 * an IRQ before the irqchip has been properly registered,
3321 * i.e. while gpiochip is still being brought up.
3322 */
3323 return -EPROBE_DEFER;
3324 }
3325#endif
4c37ce86 3326 return -ENXIO;
0f6d504e 3327}
79a9becd 3328EXPORT_SYMBOL_GPL(gpiod_to_irq);
0f6d504e 3329
d468bf9e 3330/**
e3a2e878 3331 * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
a0b66a73 3332 * @gc: the chip the GPIO to lock belongs to
d74be6df 3333 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3334 *
3335 * This is used directly by GPIO drivers that want to lock down
f438acdf 3336 * a certain GPIO line to be used for IRQs.
d468bf9e 3337 */
a0b66a73 3338int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset)
372e722e 3339{
9c10280d
LW
3340 struct gpio_desc *desc;
3341
a0b66a73 3342 desc = gpiochip_get_desc(gc, offset);
9c10280d
LW
3343 if (IS_ERR(desc))
3344 return PTR_ERR(desc);
3345
60f8339e
LW
3346 /*
3347 * If it's fast: flush the direction setting if something changed
3348 * behind our back
3349 */
a0b66a73 3350 if (!gc->can_sleep && gc->get_direction) {
80956790 3351 int dir = gpiod_get_direction(desc);
9c10280d 3352
36b31279 3353 if (dir < 0) {
a0b66a73 3354 chip_err(gc, "%s: cannot get GPIO direction\n",
36b31279
AS
3355 __func__);
3356 return dir;
3357 }
9c10280d 3358 }
d468bf9e 3359
e9bdf7e6
LW
3360 /* To be valid for IRQ the line needs to be input or open drain */
3361 if (test_bit(FLAG_IS_OUT, &desc->flags) &&
3362 !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
a0b66a73 3363 chip_err(gc,
b1911710
AS
3364 "%s: tried to flag a GPIO set as output for IRQ\n",
3365 __func__);
d468bf9e
LW
3366 return -EIO;
3367 }
3368
9c10280d 3369 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3370 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3371
3372 /*
3373 * If the consumer has not set up a label (such as when the
3374 * IRQ is referenced from .to_irq()) we set up a label here
3375 * so it is clear this is used as an interrupt.
3376 */
3377 if (!desc->label)
3378 desc_set_label(desc, "interrupt");
3379
d468bf9e 3380 return 0;
372e722e 3381}
e3a2e878 3382EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
d2876d08 3383
d468bf9e 3384/**
e3a2e878 3385 * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
a0b66a73 3386 * @gc: the chip the GPIO to lock belongs to
d74be6df 3387 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3388 *
3389 * This is used directly by GPIO drivers that want to indicate
3390 * that a certain GPIO is no longer used exclusively for IRQ.
d2876d08 3391 */
a0b66a73 3392void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset)
d468bf9e 3393{
3940c34a
LW
3394 struct gpio_desc *desc;
3395
a0b66a73 3396 desc = gpiochip_get_desc(gc, offset);
3940c34a 3397 if (IS_ERR(desc))
d468bf9e 3398 return;
d2876d08 3399
3940c34a 3400 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3401 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3402
3403 /* If we only had this marking, erase it */
3404 if (desc->label && !strcmp(desc->label, "interrupt"))
3405 desc_set_label(desc, NULL);
d468bf9e 3406}
e3a2e878 3407EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
d468bf9e 3408
a0b66a73 3409void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3410{
a0b66a73 3411 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3412
3413 if (!IS_ERR(desc) &&
3414 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
3415 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3416}
3417EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
3418
a0b66a73 3419void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3420{
a0b66a73 3421 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3422
3423 if (!IS_ERR(desc) &&
3424 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
e9bdf7e6
LW
3425 /*
3426 * We must not be output when using IRQ UNLESS we are
3427 * open drain.
3428 */
3429 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) &&
3430 !test_bit(FLAG_OPEN_DRAIN, &desc->flags));
4e9439dd
HV
3431 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3432 }
3433}
3434EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
3435
a0b66a73 3436bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset)
6cee3821 3437{
a0b66a73 3438 if (offset >= gc->ngpio)
6cee3821
LW
3439 return false;
3440
a0b66a73 3441 return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags);
6cee3821
LW
3442}
3443EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
3444
a0b66a73 3445int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238
HV
3446{
3447 int ret;
3448
a0b66a73 3449 if (!try_module_get(gc->gpiodev->owner))
4e6b8238
HV
3450 return -ENODEV;
3451
a0b66a73 3452 ret = gpiochip_lock_as_irq(gc, offset);
4e6b8238 3453 if (ret) {
a0b66a73
LW
3454 chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset);
3455 module_put(gc->gpiodev->owner);
4e6b8238
HV
3456 return ret;
3457 }
3458 return 0;
3459}
3460EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
3461
a0b66a73 3462void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238 3463{
a0b66a73
LW
3464 gpiochip_unlock_as_irq(gc, offset);
3465 module_put(gc->gpiodev->owner);
4e6b8238
HV
3466}
3467EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
3468
a0b66a73 3469bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset)
143b65d6 3470{
a0b66a73 3471 if (offset >= gc->ngpio)
143b65d6
LW
3472 return false;
3473
a0b66a73 3474 return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3475}
3476EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
3477
a0b66a73 3478bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset)
143b65d6 3479{
a0b66a73 3480 if (offset >= gc->ngpio)
143b65d6
LW
3481 return false;
3482
a0b66a73 3483 return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3484}
3485EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
3486
a0b66a73 3487bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset)
05f479bf 3488{
a0b66a73 3489 if (offset >= gc->ngpio)
05f479bf
CK
3490 return false;
3491
a0b66a73 3492 return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags);
05f479bf
CK
3493}
3494EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
3495
79a9becd
AC
3496/**
3497 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
3498 * @desc: gpio whose value will be returned
3499 *
3500 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3501 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd
AC
3502 *
3503 * This function is to be called from contexts that can sleep.
d2876d08 3504 */
79a9becd 3505int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
d2876d08 3506{
d2876d08 3507 might_sleep_if(extra_checks);
fdeb8e15 3508 VALIDATE_DESC(desc);
fac9d885 3509 return gpiod_get_raw_value_commit(desc);
d2876d08 3510}
79a9becd 3511EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
372e722e 3512
79a9becd
AC
3513/**
3514 * gpiod_get_value_cansleep() - return a gpio's value
3515 * @desc: gpio whose value will be returned
3516 *
3517 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3518 * account, or negative errno on failure.
79a9becd
AC
3519 *
3520 * This function is to be called from contexts that can sleep.
3521 */
3522int gpiod_get_value_cansleep(const struct gpio_desc *desc)
d2876d08 3523{
3f397c21 3524 int value;
d2876d08
DB
3525
3526 might_sleep_if(extra_checks);
fdeb8e15 3527 VALIDATE_DESC(desc);
fac9d885 3528 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3529 if (value < 0)
3530 return value;
3531
79a9becd
AC
3532 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3533 value = !value;
3534
3f397c21 3535 return value;
d2876d08 3536}
79a9becd 3537EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
372e722e 3538
eec1d566
LW
3539/**
3540 * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
b9762beb 3541 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3542 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3543 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3544 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3545 *
3546 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3547 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3548 * else an error code.
3549 *
3550 * This function is to be called from contexts that can sleep.
3551 */
3552int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
3553 struct gpio_desc **desc_array,
77588c14 3554 struct gpio_array *array_info,
b9762beb 3555 unsigned long *value_bitmap)
eec1d566
LW
3556{
3557 might_sleep_if(extra_checks);
3558 if (!desc_array)
3559 return -EINVAL;
3560 return gpiod_get_array_value_complex(true, true, array_size,
77588c14
JK
3561 desc_array, array_info,
3562 value_bitmap);
eec1d566
LW
3563}
3564EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
3565
3566/**
3567 * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
b9762beb 3568 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3569 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3570 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3571 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3572 *
3573 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3574 * into account. Return 0 in case of success, else an error code.
3575 *
3576 * This function is to be called from contexts that can sleep.
3577 */
3578int gpiod_get_array_value_cansleep(unsigned int array_size,
3579 struct gpio_desc **desc_array,
77588c14 3580 struct gpio_array *array_info,
b9762beb 3581 unsigned long *value_bitmap)
eec1d566
LW
3582{
3583 might_sleep_if(extra_checks);
3584 if (!desc_array)
3585 return -EINVAL;
3586 return gpiod_get_array_value_complex(false, true, array_size,
77588c14
JK
3587 desc_array, array_info,
3588 value_bitmap);
eec1d566
LW
3589}
3590EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
3591
79a9becd
AC
3592/**
3593 * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
3594 * @desc: gpio whose value will be assigned
3595 * @value: value to assign
3596 *
3597 * Set the raw value of the GPIO, i.e. the value of its physical line without
3598 * regard for its ACTIVE_LOW status.
3599 *
3600 * This function is to be called from contexts that can sleep.
3601 */
3602void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
372e722e 3603{
d2876d08 3604 might_sleep_if(extra_checks);
fdeb8e15 3605 VALIDATE_DESC_VOID(desc);
fac9d885 3606 gpiod_set_raw_value_commit(desc, value);
372e722e 3607}
79a9becd 3608EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
d2876d08 3609
79a9becd
AC
3610/**
3611 * gpiod_set_value_cansleep() - assign a gpio's value
3612 * @desc: gpio whose value will be assigned
3613 * @value: value to assign
3614 *
3615 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
3616 * account
3617 *
3618 * This function is to be called from contexts that can sleep.
3619 */
3620void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
d2876d08 3621{
d2876d08 3622 might_sleep_if(extra_checks);
fdeb8e15 3623 VALIDATE_DESC_VOID(desc);
1e77fc82 3624 gpiod_set_value_nocheck(desc, value);
372e722e 3625}
79a9becd 3626EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
d2876d08 3627
5f424243 3628/**
3fff99bc 3629 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3630 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3631 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3632 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3633 * @value_bitmap: bitmap of values to assign
5f424243
RI
3634 *
3635 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3636 * without regard for their ACTIVE_LOW status.
3637 *
3638 * This function is to be called from contexts that can sleep.
3639 */
3027743f 3640int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3c940660
GU
3641 struct gpio_desc **desc_array,
3642 struct gpio_array *array_info,
3643 unsigned long *value_bitmap)
5f424243
RI
3644{
3645 might_sleep_if(extra_checks);
3646 if (!desc_array)
3027743f
LA
3647 return -EINVAL;
3648 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
77588c14 3649 array_info, value_bitmap);
5f424243 3650}
3fff99bc 3651EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
5f424243 3652
3946d187
DT
3653/**
3654 * gpiod_add_lookup_tables() - register GPIO device consumers
3655 * @tables: list of tables of consumers to register
3656 * @n: number of tables in the list
3657 */
3658void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
3659{
3660 unsigned int i;
3661
3662 mutex_lock(&gpio_lookup_lock);
3663
3664 for (i = 0; i < n; i++)
3665 list_add_tail(&tables[i]->list, &gpio_lookup_list);
3666
3667 mutex_unlock(&gpio_lookup_lock);
3668}
3669
5f424243 3670/**
3fff99bc 3671 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3672 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3673 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3674 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3675 * @value_bitmap: bitmap of values to assign
5f424243
RI
3676 *
3677 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3678 * into account.
3679 *
3680 * This function is to be called from contexts that can sleep.
3681 */
cf9af0d5
GU
3682int gpiod_set_array_value_cansleep(unsigned int array_size,
3683 struct gpio_desc **desc_array,
3684 struct gpio_array *array_info,
3685 unsigned long *value_bitmap)
5f424243
RI
3686{
3687 might_sleep_if(extra_checks);
3688 if (!desc_array)
cf9af0d5
GU
3689 return -EINVAL;
3690 return gpiod_set_array_value_complex(false, true, array_size,
3691 desc_array, array_info,
3692 value_bitmap);
5f424243 3693}
3fff99bc 3694EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
5f424243 3695
bae48da2 3696/**
ad824783
AC
3697 * gpiod_add_lookup_table() - register GPIO device consumers
3698 * @table: table of consumers to register
bae48da2 3699 */
ad824783 3700void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
bae48da2 3701{
49fdfe66 3702 gpiod_add_lookup_tables(&table, 1);
bae48da2 3703}
226b2242 3704EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
bae48da2 3705
be9015ab
SK
3706/**
3707 * gpiod_remove_lookup_table() - unregister GPIO device consumers
3708 * @table: table of consumers to unregister
3709 */
3710void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
3711{
d321ad12
AS
3712 /* Nothing to remove */
3713 if (!table)
3714 return;
3715
be9015ab
SK
3716 mutex_lock(&gpio_lookup_lock);
3717
3718 list_del(&table->list);
3719
3720 mutex_unlock(&gpio_lookup_lock);
3721}
226b2242 3722EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
be9015ab 3723
a411e81e
BG
3724/**
3725 * gpiod_add_hogs() - register a set of GPIO hogs from machine code
3726 * @hogs: table of gpio hog entries with a zeroed sentinel at the end
3727 */
3728void gpiod_add_hogs(struct gpiod_hog *hogs)
3729{
a0b66a73 3730 struct gpio_chip *gc;
a411e81e
BG
3731 struct gpiod_hog *hog;
3732
3733 mutex_lock(&gpio_machine_hogs_mutex);
3734
3735 for (hog = &hogs[0]; hog->chip_label; hog++) {
3736 list_add_tail(&hog->list, &gpio_machine_hogs);
3737
3738 /*
3739 * The chip may have been registered earlier, so check if it
3740 * exists and, if so, try to hog the line now.
3741 */
a0b66a73
LW
3742 gc = find_chip_by_name(hog->chip_label);
3743 if (gc)
3744 gpiochip_machine_hog(gc, hog);
a411e81e
BG
3745 }
3746
3747 mutex_unlock(&gpio_machine_hogs_mutex);
3748}
3749EXPORT_SYMBOL_GPL(gpiod_add_hogs);
3750
dd61b292
BG
3751void gpiod_remove_hogs(struct gpiod_hog *hogs)
3752{
3753 struct gpiod_hog *hog;
3754
3755 mutex_lock(&gpio_machine_hogs_mutex);
3756 for (hog = &hogs[0]; hog->chip_label; hog++)
3757 list_del(&hog->list);
3758 mutex_unlock(&gpio_machine_hogs_mutex);
3759}
3760EXPORT_SYMBOL_GPL(gpiod_remove_hogs);
3761
ad824783 3762static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
bae48da2
AC
3763{
3764 const char *dev_id = dev ? dev_name(dev) : NULL;
ad824783 3765 struct gpiod_lookup_table *table;
bae48da2
AC
3766
3767 mutex_lock(&gpio_lookup_lock);
3768
ad824783
AC
3769 list_for_each_entry(table, &gpio_lookup_list, list) {
3770 if (table->dev_id && dev_id) {
3771 /*
3772 * Valid strings on both ends, must be identical to have
3773 * a match
3774 */
3775 if (!strcmp(table->dev_id, dev_id))
3776 goto found;
3777 } else {
3778 /*
3779 * One of the pointers is NULL, so both must be to have
3780 * a match
3781 */
3782 if (dev_id == table->dev_id)
3783 goto found;
3784 }
3785 }
3786 table = NULL;
bae48da2 3787
ad824783
AC
3788found:
3789 mutex_unlock(&gpio_lookup_lock);
3790 return table;
3791}
bae48da2 3792
ad824783 3793static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
fed7026a 3794 unsigned int idx, unsigned long *flags)
ad824783 3795{
2a3cf6a3 3796 struct gpio_desc *desc = ERR_PTR(-ENOENT);
ad824783
AC
3797 struct gpiod_lookup_table *table;
3798 struct gpiod_lookup *p;
bae48da2 3799
ad824783
AC
3800 table = gpiod_find_lookup_table(dev);
3801 if (!table)
3802 return desc;
bae48da2 3803
4c033b54 3804 for (p = &table->table[0]; p->key; p++) {
a0b66a73 3805 struct gpio_chip *gc;
bae48da2 3806
ad824783 3807 /* idx must always match exactly */
bae48da2
AC
3808 if (p->idx != idx)
3809 continue;
3810
ad824783
AC
3811 /* If the lookup entry has a con_id, require exact match */
3812 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
3813 continue;
bae48da2 3814
4c033b54
GU
3815 if (p->chip_hwnum == U16_MAX) {
3816 desc = gpio_name_to_desc(p->key);
3817 if (desc) {
3818 *flags = p->flags;
3819 return desc;
3820 }
3821
3822 dev_warn(dev, "cannot find GPIO line %s, deferring\n",
3823 p->key);
3824 return ERR_PTR(-EPROBE_DEFER);
3825 }
3826
3827 gc = find_chip_by_name(p->key);
bae48da2 3828
a0b66a73 3829 if (!gc) {
8853daf3
JK
3830 /*
3831 * As the lookup table indicates a chip with
4c033b54 3832 * p->key should exist, assume it may
8853daf3
JK
3833 * still appear later and let the interested
3834 * consumer be probed again or let the Deferred
3835 * Probe infrastructure handle the error.
3836 */
3837 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
4c033b54 3838 p->key);
8853daf3 3839 return ERR_PTR(-EPROBE_DEFER);
ad824783 3840 }
bae48da2 3841
a0b66a73 3842 if (gc->ngpio <= p->chip_hwnum) {
2a3cf6a3 3843 dev_err(dev,
d935bd50 3844 "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n",
a0b66a73
LW
3845 idx, p->chip_hwnum, gc->ngpio - 1,
3846 gc->label);
2a3cf6a3 3847 return ERR_PTR(-EINVAL);
bae48da2 3848 }
bae48da2 3849
a0b66a73 3850 desc = gpiochip_get_desc(gc, p->chip_hwnum);
ad824783 3851 *flags = p->flags;
bae48da2 3852
2a3cf6a3 3853 return desc;
bae48da2
AC
3854 }
3855
bae48da2
AC
3856 return desc;
3857}
3858
66858527
RI
3859static int platform_gpio_count(struct device *dev, const char *con_id)
3860{
3861 struct gpiod_lookup_table *table;
3862 struct gpiod_lookup *p;
3863 unsigned int count = 0;
3864
3865 table = gpiod_find_lookup_table(dev);
3866 if (!table)
3867 return -ENOENT;
3868
4c033b54 3869 for (p = &table->table[0]; p->key; p++) {
66858527
RI
3870 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
3871 (!con_id && !p->con_id))
3872 count++;
3873 }
3874 if (!count)
3875 return -ENOENT;
3876
3877 return count;
3878}
3879
8eb1f71e
DT
3880static struct gpio_desc *gpiod_find_by_fwnode(struct fwnode_handle *fwnode,
3881 struct device *consumer,
3882 const char *con_id,
3883 unsigned int idx,
3884 enum gpiod_flags *flags,
3885 unsigned long *lookupflags)
0eadd36d 3886{
8eb1f71e 3887 struct gpio_desc *desc = ERR_PTR(-ENOENT);
0eadd36d
DT
3888
3889 if (is_of_node(fwnode)) {
8eb1f71e
DT
3890 dev_dbg(consumer, "using DT '%pfw' for '%s' GPIO lookup\n",
3891 fwnode, con_id);
3892 desc = of_find_gpio(to_of_node(fwnode), con_id, idx, lookupflags);
0eadd36d 3893 } else if (is_acpi_node(fwnode)) {
8eb1f71e
DT
3894 dev_dbg(consumer, "using ACPI '%pfw' for '%s' GPIO lookup\n",
3895 fwnode, con_id);
3896 desc = acpi_find_gpio(fwnode, con_id, idx, flags, lookupflags);
e7f9ff5d
DT
3897 } else if (is_software_node(fwnode)) {
3898 dev_dbg(consumer, "using swnode '%pfw' for '%s' GPIO lookup\n",
3899 fwnode, con_id);
3900 desc = swnode_find_gpio(fwnode, con_id, idx, lookupflags);
0eadd36d 3901 }
0eadd36d 3902
8eb1f71e
DT
3903 return desc;
3904}
0eadd36d 3905
8eb1f71e
DT
3906static struct gpio_desc *gpiod_find_and_request(struct device *consumer,
3907 struct fwnode_handle *fwnode,
3908 const char *con_id,
3909 unsigned int idx,
3910 enum gpiod_flags flags,
3911 const char *label,
3912 bool platform_lookup_allowed)
3913{
ba2dc1cb 3914 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
8eb1f71e 3915 struct gpio_desc *desc = ERR_PTR(-ENOENT);
8eb1f71e
DT
3916 int ret;
3917
3918 if (!IS_ERR_OR_NULL(fwnode))
3919 desc = gpiod_find_by_fwnode(fwnode, consumer, con_id, idx,
3920 &flags, &lookupflags);
3921
3922 if (gpiod_not_found(desc) && platform_lookup_allowed) {
3923 /*
3924 * Either we are not using DT or ACPI, or their lookup did not
3925 * return a result. In that case, use platform lookup as a
3926 * fallback.
3927 */
3928 dev_dbg(consumer, "using lookup tables for GPIO lookup\n");
3929 desc = gpiod_find(consumer, con_id, idx, &lookupflags);
0eadd36d
DT
3930 }
3931
8eb1f71e
DT
3932 if (IS_ERR(desc)) {
3933 dev_dbg(consumer, "No GPIO consumer %s found\n", con_id);
3934 return desc;
3935 }
3936
3937 /*
3938 * If a connection label was passed use that, else attempt to use
3939 * the device name as label
3940 */
0eadd36d 3941 ret = gpiod_request(desc, label);
8eb1f71e
DT
3942 if (ret) {
3943 if (!(ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE))
3944 return ERR_PTR(ret);
0eadd36d 3945
8eb1f71e
DT
3946 /*
3947 * This happens when there are several consumers for
3948 * the same GPIO line: we just return here without
3949 * further initialization. It is a bit of a hack.
3950 * This is necessary to support fixed regulators.
3951 *
3952 * FIXME: Make this more sane and safe.
3953 */
3954 dev_info(consumer,
3955 "nonexclusive access to GPIO for %s\n", con_id);
3956 return desc;
3957 }
0eadd36d 3958
8eb1f71e 3959 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
0eadd36d 3960 if (ret < 0) {
8eb1f71e 3961 dev_dbg(consumer, "setup of GPIO %s failed\n", con_id);
0eadd36d
DT
3962 gpiod_put(desc);
3963 return ERR_PTR(ret);
3964 }
3965
3966 blocking_notifier_call_chain(&desc->gdev->notifier,
3967 GPIOLINE_CHANGED_REQUESTED, desc);
3968
3969 return desc;
3970}
3971
13949fa9
DT
3972/**
3973 * fwnode_gpiod_get_index - obtain a GPIO from firmware node
3974 * @fwnode: handle of the firmware node
3975 * @con_id: function within the GPIO consumer
3976 * @index: index of the GPIO to obtain for the consumer
3977 * @flags: GPIO initialization flags
3978 * @label: label to attach to the requested GPIO
3979 *
3980 * This function can be used for drivers that get their configuration
3981 * from opaque firmware.
3982 *
3983 * The function properly finds the corresponding GPIO using whatever is the
3984 * underlying firmware interface and then makes sure that the GPIO
3985 * descriptor is requested before it is returned to the caller.
3986 *
3987 * Returns:
3988 * On successful request the GPIO pin is configured in accordance with
3989 * provided @flags.
3990 *
3991 * In case of error an ERR_PTR() is returned.
3992 */
3993struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
8eb1f71e
DT
3994 const char *con_id,
3995 int index,
13949fa9
DT
3996 enum gpiod_flags flags,
3997 const char *label)
3998{
8eb1f71e 3999 return gpiod_find_and_request(NULL, fwnode, con_id, index, flags, label, false);
13949fa9
DT
4000}
4001EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
4002
66858527
RI
4003/**
4004 * gpiod_count - return the number of GPIOs associated with a device / function
4005 * or -ENOENT if no GPIO has been assigned to the requested function
4006 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4007 * @con_id: function within the GPIO consumer
4008 */
4009int gpiod_count(struct device *dev, const char *con_id)
4010{
944f4b0a 4011 const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
66858527
RI
4012 int count = -ENOENT;
4013
944f4b0a 4014 if (is_of_node(fwnode))
f626d6df 4015 count = of_gpio_get_count(dev, con_id);
944f4b0a 4016 else if (is_acpi_node(fwnode))
66858527 4017 count = acpi_gpio_count(dev, con_id);
e7f9ff5d
DT
4018 else if (is_software_node(fwnode))
4019 count = swnode_gpio_count(fwnode, con_id);
66858527
RI
4020
4021 if (count < 0)
4022 count = platform_gpio_count(dev, con_id);
4023
4024 return count;
4025}
4026EXPORT_SYMBOL_GPL(gpiod_count);
4027
bae48da2 4028/**
0879162f 4029 * gpiod_get - obtain a GPIO for a given GPIO function
ad824783 4030 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2 4031 * @con_id: function within the GPIO consumer
39b2bbe3 4032 * @flags: optional GPIO initialization flags
bae48da2
AC
4033 *
4034 * Return the GPIO descriptor corresponding to the function con_id of device
2a3cf6a3 4035 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
20a8a968 4036 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
bae48da2 4037 */
b17d1bf1 4038struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
39b2bbe3 4039 enum gpiod_flags flags)
bae48da2 4040{
39b2bbe3 4041 return gpiod_get_index(dev, con_id, 0, flags);
bae48da2 4042}
b17d1bf1 4043EXPORT_SYMBOL_GPL(gpiod_get);
bae48da2 4044
29a1f233
TR
4045/**
4046 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
4047 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4048 * @con_id: function within the GPIO consumer
39b2bbe3 4049 * @flags: optional GPIO initialization flags
29a1f233
TR
4050 *
4051 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
4052 * the requested function it will return NULL. This is convenient for drivers
4053 * that need to handle optional GPIOs.
4054 */
b17d1bf1 4055struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
39b2bbe3
AC
4056 const char *con_id,
4057 enum gpiod_flags flags)
29a1f233 4058{
39b2bbe3 4059 return gpiod_get_index_optional(dev, con_id, 0, flags);
29a1f233 4060}
b17d1bf1 4061EXPORT_SYMBOL_GPL(gpiod_get_optional);
29a1f233 4062
f625d460
BP
4063
4064/**
4065 * gpiod_configure_flags - helper function to configure a given GPIO
4066 * @desc: gpio whose value will be assigned
4067 * @con_id: function within the GPIO consumer
fed7026a
AS
4068 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4069 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4070 * @dflags: gpiod_flags - optional GPIO initialization flags
4071 *
4072 * Return 0 on success, -ENOENT if no GPIO has been assigned to the
4073 * requested function and/or index, or another IS_ERR() code if an error
4074 * occurred while trying to acquire the GPIO.
4075 */
c29fd9eb 4076int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
85b03b30 4077 unsigned long lflags, enum gpiod_flags dflags)
f625d460 4078{
d377f56f 4079 int ret;
f625d460 4080
85b03b30
JH
4081 if (lflags & GPIO_ACTIVE_LOW)
4082 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
f926dfc1 4083
85b03b30
JH
4084 if (lflags & GPIO_OPEN_DRAIN)
4085 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
f926dfc1
LW
4086 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
4087 /*
4088 * This enforces open drain mode from the consumer side.
4089 * This is necessary for some busses like I2C, but the lookup
4090 * should *REALLY* have specified them as open drain in the
4091 * first place, so print a little warning here.
4092 */
4093 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
4094 gpiod_warn(desc,
4095 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
4096 }
4097
85b03b30
JH
4098 if (lflags & GPIO_OPEN_SOURCE)
4099 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
e10f72bf 4100
c269df8c
NS
4101 if (((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) ||
4102 ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DISABLE)) ||
4103 ((lflags & GPIO_PULL_DOWN) && (lflags & GPIO_PULL_DISABLE))) {
d449991c 4104 gpiod_err(desc,
c269df8c 4105 "multiple pull-up, pull-down or pull-disable enabled, invalid configuration\n");
d449991c
TP
4106 return -EINVAL;
4107 }
4108
4109 if (lflags & GPIO_PULL_UP)
4110 set_bit(FLAG_PULL_UP, &desc->flags);
4111 else if (lflags & GPIO_PULL_DOWN)
4112 set_bit(FLAG_PULL_DOWN, &desc->flags);
c269df8c
NS
4113 else if (lflags & GPIO_PULL_DISABLE)
4114 set_bit(FLAG_BIAS_DISABLE, &desc->flags);
d449991c 4115
d377f56f
LW
4116 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
4117 if (ret < 0)
4118 return ret;
85b03b30 4119
f625d460
BP
4120 /* No particular flag request, return here... */
4121 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
262b9011 4122 gpiod_dbg(desc, "no flags found for %s\n", con_id);
f625d460
BP
4123 return 0;
4124 }
4125
4126 /* Process flags */
4127 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
d377f56f 4128 ret = gpiod_direction_output(desc,
ad17731d 4129 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
f625d460 4130 else
d377f56f 4131 ret = gpiod_direction_input(desc);
f625d460 4132
d377f56f 4133 return ret;
f625d460
BP
4134}
4135
bae48da2
AC
4136/**
4137 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
fdd6a5fe 4138 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2
AC
4139 * @con_id: function within the GPIO consumer
4140 * @idx: index of the GPIO to obtain in the consumer
39b2bbe3 4141 * @flags: optional GPIO initialization flags
bae48da2
AC
4142 *
4143 * This variant of gpiod_get() allows to access GPIOs other than the first
4144 * defined one for functions that define several GPIOs.
4145 *
2a3cf6a3
AC
4146 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
4147 * requested function and/or index, or another IS_ERR() code if an error
20a8a968 4148 * occurred while trying to acquire the GPIO.
bae48da2 4149 */
b17d1bf1 4150struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
bae48da2 4151 const char *con_id,
39b2bbe3
AC
4152 unsigned int idx,
4153 enum gpiod_flags flags)
bae48da2 4154{
07445ae1 4155 struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
7d18f0a1 4156 const char *devname = dev ? dev_name(dev) : "?";
8eb1f71e 4157 const char *label = con_id ?: devname;
bae48da2 4158
8eb1f71e 4159 return gpiod_find_and_request(dev, fwnode, con_id, idx, flags, label, true);
6392cca4 4160}
b17d1bf1 4161EXPORT_SYMBOL_GPL(gpiod_get_index);
6392cca4 4162
29a1f233
TR
4163/**
4164 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
4165 * function
4166 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4167 * @con_id: function within the GPIO consumer
4168 * @index: index of the GPIO to obtain in the consumer
39b2bbe3 4169 * @flags: optional GPIO initialization flags
29a1f233
TR
4170 *
4171 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
4172 * specified index was assigned to the requested function it will return NULL.
4173 * This is convenient for drivers that need to handle optional GPIOs.
4174 */
b17d1bf1 4175struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
29a1f233 4176 const char *con_id,
39b2bbe3
AC
4177 unsigned int index,
4178 enum gpiod_flags flags)
29a1f233
TR
4179{
4180 struct gpio_desc *desc;
4181
39b2bbe3 4182 desc = gpiod_get_index(dev, con_id, index, flags);
7b58696d
AS
4183 if (gpiod_not_found(desc))
4184 return NULL;
29a1f233
TR
4185
4186 return desc;
4187}
b17d1bf1 4188EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
29a1f233 4189
f625d460
BP
4190/**
4191 * gpiod_hog - Hog the specified GPIO desc given the provided flags
4192 * @desc: gpio whose value will be assigned
4193 * @name: gpio line name
fed7026a
AS
4194 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4195 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4196 * @dflags: gpiod_flags - optional GPIO initialization flags
4197 */
4198int gpiod_hog(struct gpio_desc *desc, const char *name,
4199 unsigned long lflags, enum gpiod_flags dflags)
4200{
a0b66a73 4201 struct gpio_chip *gc;
f625d460
BP
4202 struct gpio_desc *local_desc;
4203 int hwnum;
d377f56f 4204 int ret;
f625d460 4205
a0b66a73 4206 gc = gpiod_to_chip(desc);
f625d460
BP
4207 hwnum = gpio_chip_hwgpio(desc);
4208
a0b66a73 4209 local_desc = gpiochip_request_own_desc(gc, hwnum, name,
5923ea6c 4210 lflags, dflags);
f625d460 4211 if (IS_ERR(local_desc)) {
d377f56f 4212 ret = PTR_ERR(local_desc);
c31a571d 4213 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
a0b66a73 4214 name, gc->label, hwnum, ret);
d377f56f 4215 return ret;
f625d460
BP
4216 }
4217
f625d460
BP
4218 /* Mark GPIO as hogged so it can be identified and removed later */
4219 set_bit(FLAG_IS_HOGGED, &desc->flags);
4220
262b9011 4221 gpiod_info(desc, "hogged as %s%s\n",
b27f300f
BG
4222 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
4223 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
4224 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
f625d460
BP
4225
4226 return 0;
4227}
4228
4229/**
4230 * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
a0b66a73 4231 * @gc: gpio chip to act on
f625d460 4232 */
a0b66a73 4233static void gpiochip_free_hogs(struct gpio_chip *gc)
f625d460 4234{
80c78fbe 4235 struct gpio_desc *desc;
f625d460 4236
57017edd 4237 for_each_gpio_desc_with_flag(gc, desc, FLAG_IS_HOGGED)
80c78fbe 4238 gpiochip_free_own_desc(desc);
f625d460
BP
4239}
4240
66858527
RI
4241/**
4242 * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
4243 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4244 * @con_id: function within the GPIO consumer
4245 * @flags: optional GPIO initialization flags
4246 *
4247 * This function acquires all the GPIOs defined under a given function.
4248 *
4249 * Return a struct gpio_descs containing an array of descriptors, -ENOENT if
4250 * no GPIO has been assigned to the requested function, or another IS_ERR()
4251 * code if an error occurred while trying to acquire the GPIOs.
4252 */
4253struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
4254 const char *con_id,
4255 enum gpiod_flags flags)
4256{
4257 struct gpio_desc *desc;
4258 struct gpio_descs *descs;
bf9346f5 4259 struct gpio_array *array_info = NULL;
a0b66a73 4260 struct gpio_chip *gc;
bf9346f5 4261 int count, bitmap_size;
66858527
RI
4262
4263 count = gpiod_count(dev, con_id);
4264 if (count < 0)
4265 return ERR_PTR(count);
4266
acafe7e3 4267 descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL);
66858527
RI
4268 if (!descs)
4269 return ERR_PTR(-ENOMEM);
4270
4271 for (descs->ndescs = 0; descs->ndescs < count; ) {
4272 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
4273 if (IS_ERR(desc)) {
4274 gpiod_put_array(descs);
4275 return ERR_CAST(desc);
4276 }
bf9346f5 4277
66858527 4278 descs->desc[descs->ndescs] = desc;
bf9346f5 4279
a0b66a73 4280 gc = gpiod_to_chip(desc);
bf9346f5 4281 /*
c4c958aa
JK
4282 * If pin hardware number of array member 0 is also 0, select
4283 * its chip as a candidate for fast bitmap processing path.
bf9346f5 4284 */
c4c958aa 4285 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
bf9346f5
JK
4286 struct gpio_descs *array;
4287
a0b66a73
LW
4288 bitmap_size = BITS_TO_LONGS(gc->ngpio > count ?
4289 gc->ngpio : count);
bf9346f5
JK
4290
4291 array = kzalloc(struct_size(descs, desc, count) +
4292 struct_size(array_info, invert_mask,
4293 3 * bitmap_size), GFP_KERNEL);
4294 if (!array) {
4295 gpiod_put_array(descs);
4296 return ERR_PTR(-ENOMEM);
4297 }
4298
4299 memcpy(array, descs,
4300 struct_size(descs, desc, descs->ndescs + 1));
4301 kfree(descs);
4302
4303 descs = array;
4304 array_info = (void *)(descs->desc + count);
4305 array_info->get_mask = array_info->invert_mask +
4306 bitmap_size;
4307 array_info->set_mask = array_info->get_mask +
4308 bitmap_size;
4309
4310 array_info->desc = descs->desc;
4311 array_info->size = count;
a0b66a73 4312 array_info->chip = gc;
bf9346f5
JK
4313 bitmap_set(array_info->get_mask, descs->ndescs,
4314 count - descs->ndescs);
4315 bitmap_set(array_info->set_mask, descs->ndescs,
4316 count - descs->ndescs);
4317 descs->info = array_info;
4318 }
c4c958aa 4319 /* Unmark array members which don't belong to the 'fast' chip */
a0b66a73 4320 if (array_info && array_info->chip != gc) {
bf9346f5
JK
4321 __clear_bit(descs->ndescs, array_info->get_mask);
4322 __clear_bit(descs->ndescs, array_info->set_mask);
c4c958aa
JK
4323 }
4324 /*
4325 * Detect array members which belong to the 'fast' chip
4326 * but their pins are not in hardware order.
4327 */
4328 else if (array_info &&
4329 gpio_chip_hwgpio(desc) != descs->ndescs) {
4330 /*
4331 * Don't use fast path if all array members processed so
4332 * far belong to the same chip as this one but its pin
4333 * hardware number is different from its array index.
4334 */
4335 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
4336 array_info = NULL;
4337 } else {
4338 __clear_bit(descs->ndescs,
4339 array_info->get_mask);
4340 __clear_bit(descs->ndescs,
4341 array_info->set_mask);
4342 }
bf9346f5
JK
4343 } else if (array_info) {
4344 /* Exclude open drain or open source from fast output */
a0b66a73
LW
4345 if (gpiochip_line_is_open_drain(gc, descs->ndescs) ||
4346 gpiochip_line_is_open_source(gc, descs->ndescs))
bf9346f5
JK
4347 __clear_bit(descs->ndescs,
4348 array_info->set_mask);
4349 /* Identify 'fast' pins which require invertion */
4350 if (gpiod_is_active_low(desc))
4351 __set_bit(descs->ndescs,
4352 array_info->invert_mask);
4353 }
4354
66858527
RI
4355 descs->ndescs++;
4356 }
bf9346f5
JK
4357 if (array_info)
4358 dev_dbg(dev,
4359 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
4360 array_info->chip->label, array_info->size,
4361 *array_info->get_mask, *array_info->set_mask,
4362 *array_info->invert_mask);
66858527
RI
4363 return descs;
4364}
4365EXPORT_SYMBOL_GPL(gpiod_get_array);
4366
4367/**
4368 * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
4369 * function
4370 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4371 * @con_id: function within the GPIO consumer
4372 * @flags: optional GPIO initialization flags
4373 *
4374 * This is equivalent to gpiod_get_array(), except that when no GPIO was
4375 * assigned to the requested function it will return NULL.
4376 */
4377struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
4378 const char *con_id,
4379 enum gpiod_flags flags)
4380{
4381 struct gpio_descs *descs;
4382
4383 descs = gpiod_get_array(dev, con_id, flags);
7b58696d 4384 if (gpiod_not_found(descs))
66858527
RI
4385 return NULL;
4386
4387 return descs;
4388}
4389EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
4390
bae48da2
AC
4391/**
4392 * gpiod_put - dispose of a GPIO descriptor
4393 * @desc: GPIO descriptor to dispose of
4394 *
4395 * No descriptor can be used after gpiod_put() has been called on it.
4396 */
4397void gpiod_put(struct gpio_desc *desc)
4398{
1d7765ba
AS
4399 if (desc)
4400 gpiod_free(desc);
372e722e 4401}
bae48da2 4402EXPORT_SYMBOL_GPL(gpiod_put);
d2876d08 4403
66858527
RI
4404/**
4405 * gpiod_put_array - dispose of multiple GPIO descriptors
4406 * @descs: struct gpio_descs containing an array of descriptors
4407 */
4408void gpiod_put_array(struct gpio_descs *descs)
4409{
4410 unsigned int i;
4411
4412 for (i = 0; i < descs->ndescs; i++)
4413 gpiod_put(descs->desc[i]);
4414
4415 kfree(descs);
4416}
4417EXPORT_SYMBOL_GPL(gpiod_put_array);
4418
ced2af41
SK
4419
4420static int gpio_bus_match(struct device *dev, struct device_driver *drv)
4421{
1df62542
AS
4422 struct fwnode_handle *fwnode = dev_fwnode(dev);
4423
ced2af41
SK
4424 /*
4425 * Only match if the fwnode doesn't already have a proper struct device
4426 * created for it.
4427 */
1df62542 4428 if (fwnode && fwnode->dev != dev)
ced2af41
SK
4429 return 0;
4430 return 1;
4431}
4432
4731210c
SK
4433static int gpio_stub_drv_probe(struct device *dev)
4434{
4435 /*
4436 * The DT node of some GPIO chips have a "compatible" property, but
4437 * never have a struct device added and probed by a driver to register
4438 * the GPIO chip with gpiolib. In such cases, fw_devlink=on will cause
4439 * the consumers of the GPIO chip to get probe deferred forever because
4440 * they will be waiting for a device associated with the GPIO chip
4441 * firmware node to get added and bound to a driver.
4442 *
4443 * To allow these consumers to probe, we associate the struct
4444 * gpio_device of the GPIO chip with the firmware node and then simply
4445 * bind it to this stub driver.
4446 */
4447 return 0;
4448}
4449
4450static struct device_driver gpio_stub_drv = {
4451 .name = "gpio_stub_drv",
4452 .bus = &gpio_bus_type,
4453 .probe = gpio_stub_drv_probe,
4454};
4455
3c702e99
LW
4456static int __init gpiolib_dev_init(void)
4457{
4458 int ret;
4459
4460 /* Register GPIO sysfs bus */
b1911710 4461 ret = bus_register(&gpio_bus_type);
3c702e99
LW
4462 if (ret < 0) {
4463 pr_err("gpiolib: could not register GPIO bus type\n");
4464 return ret;
4465 }
4466
3875721e
WY
4467 ret = driver_register(&gpio_stub_drv);
4468 if (ret < 0) {
4731210c
SK
4469 pr_err("gpiolib: could not register GPIO stub driver\n");
4470 bus_unregister(&gpio_bus_type);
4471 return ret;
4472 }
4473
ddd8891e 4474 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME);
3c702e99
LW
4475 if (ret < 0) {
4476 pr_err("gpiolib: failed to allocate char dev region\n");
4731210c 4477 driver_unregister(&gpio_stub_drv);
3c702e99 4478 bus_unregister(&gpio_bus_type);
63636d95 4479 return ret;
3c702e99 4480 }
63636d95
GU
4481
4482 gpiolib_initialized = true;
4483 gpiochip_setup_devs();
4484
8650b609
DG
4485#if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO)
4486 WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier));
4487#endif /* CONFIG_OF_DYNAMIC && CONFIG_OF_GPIO */
63636d95 4488
3c702e99
LW
4489 return ret;
4490}
4491core_initcall(gpiolib_dev_init);
4492
d2876d08
DB
4493#ifdef CONFIG_DEBUG_FS
4494
fdeb8e15 4495static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
d2876d08 4496{
a0b66a73 4497 struct gpio_chip *gc = gdev->chip;
3de69ae1 4498 struct gpio_desc *desc;
fdeb8e15 4499 unsigned gpio = gdev->base;
3de69ae1 4500 int value;
90fd2270
LW
4501 bool is_out;
4502 bool is_irq;
4503 bool active_low;
d2876d08 4504
3de69ae1
AS
4505 for_each_gpio_desc(gc, desc) {
4506 if (test_bit(FLAG_REQUESTED, &desc->flags)) {
4507 gpiod_get_direction(desc);
4508 is_out = test_bit(FLAG_IS_OUT, &desc->flags);
234c5209 4509 value = gpio_chip_get_value(gc, desc);
3de69ae1
AS
4510 is_irq = test_bit(FLAG_USED_AS_IRQ, &desc->flags);
4511 active_low = test_bit(FLAG_ACTIVE_LOW, &desc->flags);
4512 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s\n",
4513 gpio, desc->name ?: "", desc->label,
4514 is_out ? "out" : "in ",
4515 value >= 0 ? (value ? "hi" : "lo") : "? ",
4516 is_irq ? "IRQ " : "",
4517 active_low ? "ACTIVE LOW" : "");
4518 } else if (desc->name) {
4519 seq_printf(s, " gpio-%-3d (%-20.20s)\n", gpio, desc->name);
ced433e2 4520 }
d2876d08 4521
3de69ae1 4522 gpio++;
d2876d08
DB
4523 }
4524}
4525
f9c4a31f 4526static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
d2876d08 4527{
362432ae 4528 unsigned long flags;
ff2b1359 4529 struct gpio_device *gdev = NULL;
cb1650d4 4530 loff_t index = *pos;
d2876d08 4531
f9c4a31f 4532 s->private = "";
d2876d08 4533
362432ae 4534 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4535 list_for_each_entry(gdev, &gpio_devices, list)
362432ae
GL
4536 if (index-- == 0) {
4537 spin_unlock_irqrestore(&gpio_lock, flags);
ff2b1359 4538 return gdev;
f9c4a31f 4539 }
362432ae 4540 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f 4541
cb1650d4 4542 return NULL;
f9c4a31f
TR
4543}
4544
4545static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
4546{
362432ae 4547 unsigned long flags;
ff2b1359 4548 struct gpio_device *gdev = v;
f9c4a31f
TR
4549 void *ret = NULL;
4550
362432ae 4551 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4552 if (list_is_last(&gdev->list, &gpio_devices))
cb1650d4
AC
4553 ret = NULL;
4554 else
243cfa6a 4555 ret = list_first_entry(&gdev->list, struct gpio_device, list);
362432ae 4556 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f
TR
4557
4558 s->private = "\n";
4559 ++*pos;
4560
4561 return ret;
4562}
4563
4564static void gpiolib_seq_stop(struct seq_file *s, void *v)
4565{
4566}
4567
4568static int gpiolib_seq_show(struct seq_file *s, void *v)
4569{
ff2b1359 4570 struct gpio_device *gdev = v;
a0b66a73 4571 struct gpio_chip *gc = gdev->chip;
ff2b1359
LW
4572 struct device *parent;
4573
a0b66a73 4574 if (!gc) {
ff2b1359
LW
4575 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
4576 dev_name(&gdev->dev));
4577 return 0;
4578 }
f9c4a31f 4579
ff2b1359
LW
4580 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
4581 dev_name(&gdev->dev),
fdeb8e15 4582 gdev->base, gdev->base + gdev->ngpio - 1);
a0b66a73 4583 parent = gc->parent;
ff2b1359
LW
4584 if (parent)
4585 seq_printf(s, ", parent: %s/%s",
4586 parent->bus ? parent->bus->name : "no-bus",
4587 dev_name(parent));
a0b66a73
LW
4588 if (gc->label)
4589 seq_printf(s, ", %s", gc->label);
4590 if (gc->can_sleep)
f9c4a31f
TR
4591 seq_printf(s, ", can sleep");
4592 seq_printf(s, ":\n");
4593
a0b66a73
LW
4594 if (gc->dbg_show)
4595 gc->dbg_show(s, gc);
f9c4a31f 4596 else
fdeb8e15 4597 gpiolib_dbg_show(s, gdev);
f9c4a31f 4598
d2876d08
DB
4599 return 0;
4600}
4601
425c5b3e 4602static const struct seq_operations gpiolib_sops = {
f9c4a31f
TR
4603 .start = gpiolib_seq_start,
4604 .next = gpiolib_seq_next,
4605 .stop = gpiolib_seq_stop,
4606 .show = gpiolib_seq_show,
4607};
425c5b3e 4608DEFINE_SEQ_ATTRIBUTE(gpiolib);
d2876d08
DB
4609
4610static int __init gpiolib_debugfs_init(void)
4611{
4612 /* /sys/kernel/debug/gpio */
425c5b3e 4613 debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops);
d2876d08
DB
4614 return 0;
4615}
4616subsys_initcall(gpiolib_debugfs_init);
4617
4618#endif /* DEBUG_FS */