Commit | Line | Data |
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dae5f0af | 1 | // SPDX-License-Identifier: GPL-2.0 |
c47d9e1b | 2 | |
923a654c | 3 | #include <linux/bitmap.h> |
d2876d08 DB |
4 | #include <linux/kernel.h> |
5 | #include <linux/module.h> | |
ff77c352 | 6 | #include <linux/interrupt.h> |
d2876d08 DB |
7 | #include <linux/irq.h> |
8 | #include <linux/spinlock.h> | |
1a989d0f | 9 | #include <linux/list.h> |
d8f388d8 DB |
10 | #include <linux/device.h> |
11 | #include <linux/err.h> | |
12 | #include <linux/debugfs.h> | |
13 | #include <linux/seq_file.h> | |
14 | #include <linux/gpio.h> | |
ff77c352 | 15 | #include <linux/idr.h> |
5a0e3ad6 | 16 | #include <linux/slab.h> |
7b199811 | 17 | #include <linux/acpi.h> |
53e7cac3 | 18 | #include <linux/gpio/driver.h> |
0a6d3158 | 19 | #include <linux/gpio/machine.h> |
c771c2f4 | 20 | #include <linux/pinctrl/consumer.h> |
3c702e99 | 21 | #include <linux/fs.h> |
8b92e17e | 22 | #include <linux/compat.h> |
953b956a | 23 | #include <linux/file.h> |
3c702e99 | 24 | #include <uapi/linux/gpio.h> |
d2876d08 | 25 | |
664e3e5a | 26 | #include "gpiolib.h" |
f626d6df | 27 | #include "gpiolib-of.h" |
77cb907a | 28 | #include "gpiolib-acpi.h" |
925ca369 | 29 | #include "gpiolib-cdev.h" |
ef087d8e | 30 | #include "gpiolib-sysfs.h" |
664e3e5a | 31 | |
3f397c21 UKK |
32 | #define CREATE_TRACE_POINTS |
33 | #include <trace/events/gpio.h> | |
d2876d08 | 34 | |
79a9becd | 35 | /* Implementation infrastructure for GPIO interfaces. |
d2876d08 | 36 | * |
79a9becd AC |
37 | * The GPIO programming interface allows for inlining speed-critical |
38 | * get/set operations for common cases, so that access to SOC-integrated | |
39 | * GPIOs can sometimes cost only an instruction or two per bit. | |
d2876d08 DB |
40 | */ |
41 | ||
42 | ||
43 | /* When debugging, extend minimal trust to callers and platform code. | |
44 | * Also emit diagnostic messages that may help initial bringup, when | |
45 | * board setup or driver bugs are most common. | |
46 | * | |
47 | * Otherwise, minimize overhead in what may be bitbanging codepaths. | |
48 | */ | |
49 | #ifdef DEBUG | |
50 | #define extra_checks 1 | |
51 | #else | |
52 | #define extra_checks 0 | |
53 | #endif | |
54 | ||
ff2b1359 LW |
55 | /* Device and char device-related information */ |
56 | static DEFINE_IDA(gpio_ida); | |
3c702e99 LW |
57 | static dev_t gpio_devt; |
58 | #define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */ | |
ced2af41 | 59 | static int gpio_bus_match(struct device *dev, struct device_driver *drv); |
3c702e99 LW |
60 | static struct bus_type gpio_bus_type = { |
61 | .name = "gpio", | |
ced2af41 | 62 | .match = gpio_bus_match, |
3c702e99 | 63 | }; |
ff2b1359 | 64 | |
3027743f LA |
65 | /* |
66 | * Number of GPIOs to use for the fast path in set array | |
67 | */ | |
68 | #define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT | |
69 | ||
d2876d08 DB |
70 | /* gpio_lock prevents conflicts during gpio_desc[] table updates. |
71 | * While any GPIO is requested, its gpio_chip is not removable; | |
72 | * each GPIO's "requested" flag serves as a lock and refcount. | |
73 | */ | |
0eb4c6c2 | 74 | DEFINE_SPINLOCK(gpio_lock); |
d2876d08 | 75 | |
bae48da2 AC |
76 | static DEFINE_MUTEX(gpio_lookup_lock); |
77 | static LIST_HEAD(gpio_lookup_list); | |
ff2b1359 | 78 | LIST_HEAD(gpio_devices); |
6d86750c | 79 | |
a411e81e BG |
80 | static DEFINE_MUTEX(gpio_machine_hogs_mutex); |
81 | static LIST_HEAD(gpio_machine_hogs); | |
82 | ||
a0b66a73 LW |
83 | static void gpiochip_free_hogs(struct gpio_chip *gc); |
84 | static int gpiochip_add_irqchip(struct gpio_chip *gc, | |
39c3fd58 AL |
85 | struct lock_class_key *lock_key, |
86 | struct lock_class_key *request_key); | |
a0b66a73 LW |
87 | static void gpiochip_irqchip_remove(struct gpio_chip *gc); |
88 | static int gpiochip_irqchip_init_hw(struct gpio_chip *gc); | |
89 | static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc); | |
90 | static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc); | |
6d86750c | 91 | |
159f3cd9 | 92 | static bool gpiolib_initialized; |
6d86750c | 93 | |
d2876d08 DB |
94 | static inline void desc_set_label(struct gpio_desc *d, const char *label) |
95 | { | |
d2876d08 | 96 | d->label = label; |
d2876d08 DB |
97 | } |
98 | ||
372e722e | 99 | /** |
950d55f5 TR |
100 | * gpio_to_desc - Convert a GPIO number to its descriptor |
101 | * @gpio: global GPIO number | |
102 | * | |
103 | * Returns: | |
104 | * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO | |
105 | * with the given number exists in the system. | |
372e722e | 106 | */ |
79a9becd | 107 | struct gpio_desc *gpio_to_desc(unsigned gpio) |
372e722e | 108 | { |
ff2b1359 | 109 | struct gpio_device *gdev; |
14e85c0e AC |
110 | unsigned long flags; |
111 | ||
112 | spin_lock_irqsave(&gpio_lock, flags); | |
113 | ||
ff2b1359 | 114 | list_for_each_entry(gdev, &gpio_devices, list) { |
fdeb8e15 LW |
115 | if (gdev->base <= gpio && |
116 | gdev->base + gdev->ngpio > gpio) { | |
14e85c0e | 117 | spin_unlock_irqrestore(&gpio_lock, flags); |
fdeb8e15 | 118 | return &gdev->descs[gpio - gdev->base]; |
14e85c0e AC |
119 | } |
120 | } | |
121 | ||
122 | spin_unlock_irqrestore(&gpio_lock, flags); | |
123 | ||
0e9a5edf | 124 | if (!gpio_is_valid(gpio)) |
c47d9e1b | 125 | pr_warn("invalid GPIO %d\n", gpio); |
0e9a5edf | 126 | |
14e85c0e | 127 | return NULL; |
372e722e | 128 | } |
79a9becd | 129 | EXPORT_SYMBOL_GPL(gpio_to_desc); |
372e722e | 130 | |
d468bf9e | 131 | /** |
950d55f5 TR |
132 | * gpiochip_get_desc - get the GPIO descriptor corresponding to the given |
133 | * hardware number for this chip | |
a0b66a73 | 134 | * @gc: GPIO chip |
950d55f5 TR |
135 | * @hwnum: hardware number of the GPIO for this chip |
136 | * | |
137 | * Returns: | |
35c6cfb4 | 138 | * A pointer to the GPIO descriptor or ``ERR_PTR(-EINVAL)`` if no GPIO exists |
950d55f5 | 139 | * in the given chip for the specified hardware number. |
d468bf9e | 140 | */ |
a0b66a73 | 141 | struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc, |
06863620 | 142 | unsigned int hwnum) |
d468bf9e | 143 | { |
a0b66a73 | 144 | struct gpio_device *gdev = gc->gpiodev; |
fdeb8e15 LW |
145 | |
146 | if (hwnum >= gdev->ngpio) | |
b7d0a28a | 147 | return ERR_PTR(-EINVAL); |
d468bf9e | 148 | |
fdeb8e15 | 149 | return &gdev->descs[hwnum]; |
d468bf9e | 150 | } |
97795420 | 151 | EXPORT_SYMBOL_GPL(gpiochip_get_desc); |
372e722e AC |
152 | |
153 | /** | |
950d55f5 TR |
154 | * desc_to_gpio - convert a GPIO descriptor to the integer namespace |
155 | * @desc: GPIO descriptor | |
156 | * | |
372e722e | 157 | * This should disappear in the future but is needed since we still |
950d55f5 TR |
158 | * use GPIO numbers for error messages and sysfs nodes. |
159 | * | |
160 | * Returns: | |
161 | * The global GPIO number for the GPIO specified by its descriptor. | |
372e722e | 162 | */ |
79a9becd | 163 | int desc_to_gpio(const struct gpio_desc *desc) |
372e722e | 164 | { |
fdeb8e15 | 165 | return desc->gdev->base + (desc - &desc->gdev->descs[0]); |
372e722e | 166 | } |
79a9becd | 167 | EXPORT_SYMBOL_GPL(desc_to_gpio); |
372e722e AC |
168 | |
169 | ||
79a9becd AC |
170 | /** |
171 | * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs | |
172 | * @desc: descriptor to return the chip of | |
173 | */ | |
174 | struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc) | |
372e722e | 175 | { |
dd3b9a44 | 176 | if (!desc || !desc->gdev) |
fdeb8e15 LW |
177 | return NULL; |
178 | return desc->gdev->chip; | |
372e722e | 179 | } |
79a9becd | 180 | EXPORT_SYMBOL_GPL(gpiod_to_chip); |
d2876d08 | 181 | |
8d0aab2f AV |
182 | /* dynamic allocation of GPIOs, e.g. on a hotplugged device */ |
183 | static int gpiochip_find_base(int ngpio) | |
184 | { | |
ff2b1359 | 185 | struct gpio_device *gdev; |
83cabe33 | 186 | int base = ARCH_NR_GPIOS - ngpio; |
8d0aab2f | 187 | |
ff2b1359 | 188 | list_for_each_entry_reverse(gdev, &gpio_devices, list) { |
83cabe33 | 189 | /* found a free space? */ |
fdeb8e15 | 190 | if (gdev->base + gdev->ngpio <= base) |
83cabe33 AC |
191 | break; |
192 | else | |
193 | /* nope, check the space right before the chip */ | |
fdeb8e15 | 194 | base = gdev->base - ngpio; |
8d0aab2f AV |
195 | } |
196 | ||
83cabe33 | 197 | if (gpio_is_valid(base)) { |
8d0aab2f | 198 | pr_debug("%s: found new base at %d\n", __func__, base); |
83cabe33 AC |
199 | return base; |
200 | } else { | |
201 | pr_err("%s: cannot find free range\n", __func__); | |
202 | return -ENOSPC; | |
169b6a7a | 203 | } |
169b6a7a AV |
204 | } |
205 | ||
79a9becd AC |
206 | /** |
207 | * gpiod_get_direction - return the current direction of a GPIO | |
208 | * @desc: GPIO to get the direction of | |
209 | * | |
94fc7309 | 210 | * Returns 0 for output, 1 for input, or an error code in case of error. |
79a9becd AC |
211 | * |
212 | * This function may sleep if gpiod_cansleep() is true. | |
213 | */ | |
8e53b0f1 | 214 | int gpiod_get_direction(struct gpio_desc *desc) |
80b0a602 | 215 | { |
a0b66a73 | 216 | struct gpio_chip *gc; |
13daf489 | 217 | unsigned int offset; |
d377f56f | 218 | int ret; |
80b0a602 | 219 | |
a0b66a73 | 220 | gc = gpiod_to_chip(desc); |
372e722e | 221 | offset = gpio_chip_hwgpio(desc); |
80b0a602 | 222 | |
256efaea RK |
223 | /* |
224 | * Open drain emulation using input mode may incorrectly report | |
225 | * input here, fix that up. | |
226 | */ | |
227 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && | |
228 | test_bit(FLAG_IS_OUT, &desc->flags)) | |
229 | return 0; | |
230 | ||
a0b66a73 | 231 | if (!gc->get_direction) |
d0121b85 | 232 | return -ENOTSUPP; |
80b0a602 | 233 | |
a0b66a73 | 234 | ret = gc->get_direction(gc, offset); |
4fc5bfeb AS |
235 | if (ret < 0) |
236 | return ret; | |
237 | ||
238 | /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */ | |
239 | if (ret > 0) | |
d377f56f | 240 | ret = 1; |
4fc5bfeb AS |
241 | |
242 | assign_bit(FLAG_IS_OUT, &desc->flags, !ret); | |
243 | ||
d377f56f | 244 | return ret; |
80b0a602 | 245 | } |
79a9becd | 246 | EXPORT_SYMBOL_GPL(gpiod_get_direction); |
80b0a602 | 247 | |
1a989d0f AC |
248 | /* |
249 | * Add a new chip to the global chips list, keeping the list of chips sorted | |
ef7c7553 | 250 | * by range(means [base, base + ngpio - 1]) order. |
1a989d0f AC |
251 | * |
252 | * Return -EBUSY if the new chip overlaps with some other chip's integer | |
253 | * space. | |
254 | */ | |
ff2b1359 | 255 | static int gpiodev_add_to_list(struct gpio_device *gdev) |
1a989d0f | 256 | { |
a961f9b4 | 257 | struct gpio_device *prev, *next; |
1a989d0f | 258 | |
ff2b1359 | 259 | if (list_empty(&gpio_devices)) { |
a961f9b4 | 260 | /* initial entry in list */ |
ff2b1359 | 261 | list_add_tail(&gdev->list, &gpio_devices); |
e28ecca6 | 262 | return 0; |
1a989d0f AC |
263 | } |
264 | ||
a961f9b4 BJZ |
265 | next = list_entry(gpio_devices.next, struct gpio_device, list); |
266 | if (gdev->base + gdev->ngpio <= next->base) { | |
267 | /* add before first entry */ | |
268 | list_add(&gdev->list, &gpio_devices); | |
269 | return 0; | |
1a989d0f AC |
270 | } |
271 | ||
a961f9b4 BJZ |
272 | prev = list_entry(gpio_devices.prev, struct gpio_device, list); |
273 | if (prev->base + prev->ngpio <= gdev->base) { | |
274 | /* add behind last entry */ | |
275 | list_add_tail(&gdev->list, &gpio_devices); | |
96098df1 | 276 | return 0; |
1a989d0f AC |
277 | } |
278 | ||
a961f9b4 BJZ |
279 | list_for_each_entry_safe(prev, next, &gpio_devices, list) { |
280 | /* at the end of the list */ | |
281 | if (&next->list == &gpio_devices) | |
282 | break; | |
1a989d0f | 283 | |
a961f9b4 BJZ |
284 | /* add between prev and next */ |
285 | if (prev->base + prev->ngpio <= gdev->base | |
286 | && gdev->base + gdev->ngpio <= next->base) { | |
287 | list_add(&gdev->list, &prev->list); | |
288 | return 0; | |
289 | } | |
290 | } | |
291 | ||
292 | dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n"); | |
293 | return -EBUSY; | |
1a989d0f AC |
294 | } |
295 | ||
950d55f5 | 296 | /* |
f881bab0 | 297 | * Convert a GPIO name to its descriptor |
582838ea GU |
298 | * Note that there is no guarantee that GPIO names are globally unique! |
299 | * Hence this function will return, if it exists, a reference to the first GPIO | |
300 | * line found that matches the given name. | |
f881bab0 LW |
301 | */ |
302 | static struct gpio_desc *gpio_name_to_desc(const char * const name) | |
303 | { | |
ff2b1359 | 304 | struct gpio_device *gdev; |
f881bab0 LW |
305 | unsigned long flags; |
306 | ||
ee203bbd MM |
307 | if (!name) |
308 | return NULL; | |
309 | ||
f881bab0 LW |
310 | spin_lock_irqsave(&gpio_lock, flags); |
311 | ||
ff2b1359 | 312 | list_for_each_entry(gdev, &gpio_devices, list) { |
f881bab0 LW |
313 | int i; |
314 | ||
fdeb8e15 LW |
315 | for (i = 0; i != gdev->ngpio; ++i) { |
316 | struct gpio_desc *desc = &gdev->descs[i]; | |
f881bab0 | 317 | |
ee203bbd | 318 | if (!desc->name) |
f881bab0 LW |
319 | continue; |
320 | ||
fdeb8e15 | 321 | if (!strcmp(desc->name, name)) { |
f881bab0 | 322 | spin_unlock_irqrestore(&gpio_lock, flags); |
fdeb8e15 | 323 | return desc; |
f881bab0 LW |
324 | } |
325 | } | |
326 | } | |
327 | ||
328 | spin_unlock_irqrestore(&gpio_lock, flags); | |
329 | ||
330 | return NULL; | |
331 | } | |
332 | ||
5f3ca732 | 333 | /* |
582838ea GU |
334 | * Take the names from gc->names and assign them to their GPIO descriptors. |
335 | * Warn if a name is already used for a GPIO line on a different GPIO chip. | |
5f3ca732 | 336 | * |
582838ea GU |
337 | * Note that: |
338 | * 1. Non-unique names are still accepted, | |
339 | * 2. Name collisions within the same GPIO chip are not reported. | |
5f3ca732 MP |
340 | */ |
341 | static int gpiochip_set_desc_names(struct gpio_chip *gc) | |
342 | { | |
fdeb8e15 | 343 | struct gpio_device *gdev = gc->gpiodev; |
5f3ca732 MP |
344 | int i; |
345 | ||
5f3ca732 MP |
346 | /* First check all names if they are unique */ |
347 | for (i = 0; i != gc->ngpio; ++i) { | |
348 | struct gpio_desc *gpio; | |
349 | ||
350 | gpio = gpio_name_to_desc(gc->names[i]); | |
f881bab0 | 351 | if (gpio) |
fdeb8e15 | 352 | dev_warn(&gdev->dev, |
34ffd85d | 353 | "Detected name collision for GPIO name '%s'\n", |
f881bab0 | 354 | gc->names[i]); |
5f3ca732 MP |
355 | } |
356 | ||
357 | /* Then add all names to the GPIO descriptors */ | |
358 | for (i = 0; i != gc->ngpio; ++i) | |
fdeb8e15 | 359 | gdev->descs[i].name = gc->names[i]; |
5f3ca732 MP |
360 | |
361 | return 0; | |
362 | } | |
363 | ||
32fc5aa2 BG |
364 | /* |
365 | * devprop_gpiochip_set_names - Set GPIO line names using device properties | |
366 | * @chip: GPIO chip whose lines should be named, if possible | |
367 | * | |
368 | * Looks for device property "gpio-line-names" and if it exists assigns | |
369 | * GPIO line names for the chip. The memory allocated for the assigned | |
b41ba2ec | 370 | * names belong to the underlying firmware node and should not be released |
32fc5aa2 BG |
371 | * by the caller. |
372 | */ | |
373 | static int devprop_gpiochip_set_names(struct gpio_chip *chip) | |
374 | { | |
375 | struct gpio_device *gdev = chip->gpiodev; | |
b41ba2ec | 376 | struct fwnode_handle *fwnode = dev_fwnode(&gdev->dev); |
32fc5aa2 BG |
377 | const char **names; |
378 | int ret, i; | |
379 | int count; | |
380 | ||
b41ba2ec | 381 | count = fwnode_property_string_array_count(fwnode, "gpio-line-names"); |
32fc5aa2 BG |
382 | if (count < 0) |
383 | return 0; | |
384 | ||
4e804c39 SP |
385 | /* |
386 | * When offset is set in the driver side we assume the driver internally | |
387 | * is using more than one gpiochip per the same device. We have to stop | |
388 | * setting friendly names if the specified ones with 'gpio-line-names' | |
389 | * are less than the offset in the device itself. This means all the | |
390 | * lines are not present for every single pin within all the internal | |
391 | * gpiochips. | |
392 | */ | |
393 | if (count <= chip->offset) { | |
394 | dev_warn(&gdev->dev, "gpio-line-names too short (length %d), cannot map names for the gpiochip at offset %u\n", | |
395 | count, chip->offset); | |
396 | return 0; | |
32fc5aa2 BG |
397 | } |
398 | ||
399 | names = kcalloc(count, sizeof(*names), GFP_KERNEL); | |
400 | if (!names) | |
401 | return -ENOMEM; | |
402 | ||
b41ba2ec | 403 | ret = fwnode_property_read_string_array(fwnode, "gpio-line-names", |
32fc5aa2 BG |
404 | names, count); |
405 | if (ret < 0) { | |
406 | dev_warn(&gdev->dev, "failed to read GPIO line names\n"); | |
407 | kfree(names); | |
408 | return ret; | |
409 | } | |
410 | ||
4e804c39 SP |
411 | /* |
412 | * When more that one gpiochip per device is used, 'count' can | |
413 | * contain at most number gpiochips x chip->ngpio. We have to | |
414 | * correctly distribute all defined lines taking into account | |
415 | * chip->offset as starting point from where we will assign | |
416 | * the names to pins from the 'names' array. Since property | |
417 | * 'gpio-line-names' cannot contains gaps, we have to be sure | |
418 | * we only assign those pins that really exists since chip->ngpio | |
419 | * can be different of the chip->offset. | |
420 | */ | |
421 | count = (count > chip->offset) ? count - chip->offset : count; | |
422 | if (count > chip->ngpio) | |
423 | count = chip->ngpio; | |
424 | ||
32fc5aa2 | 425 | for (i = 0; i < count; i++) |
4e804c39 | 426 | gdev->descs[i].name = names[chip->offset + i]; |
32fc5aa2 BG |
427 | |
428 | kfree(names); | |
429 | ||
430 | return 0; | |
431 | } | |
432 | ||
a0b66a73 | 433 | static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc) |
e4371f6e SB |
434 | { |
435 | unsigned long *p; | |
436 | ||
a0b66a73 | 437 | p = bitmap_alloc(gc->ngpio, GFP_KERNEL); |
e4371f6e SB |
438 | if (!p) |
439 | return NULL; | |
440 | ||
441 | /* Assume by default all GPIOs are valid */ | |
a0b66a73 | 442 | bitmap_fill(p, gc->ngpio); |
e4371f6e SB |
443 | |
444 | return p; | |
445 | } | |
446 | ||
f626d6df | 447 | static int gpiochip_alloc_valid_mask(struct gpio_chip *gc) |
726cb3ba | 448 | { |
eb1e8bd6 | 449 | if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask)) |
726cb3ba SB |
450 | return 0; |
451 | ||
f626d6df LW |
452 | gc->valid_mask = gpiochip_allocate_mask(gc); |
453 | if (!gc->valid_mask) | |
726cb3ba SB |
454 | return -ENOMEM; |
455 | ||
456 | return 0; | |
457 | } | |
458 | ||
c9fc5aff | 459 | static int gpiochip_init_valid_mask(struct gpio_chip *gc) |
f8ec92a9 | 460 | { |
c9fc5aff LW |
461 | if (gc->init_valid_mask) |
462 | return gc->init_valid_mask(gc, | |
463 | gc->valid_mask, | |
464 | gc->ngpio); | |
f8ec92a9 RRD |
465 | |
466 | return 0; | |
467 | } | |
468 | ||
a0b66a73 | 469 | static void gpiochip_free_valid_mask(struct gpio_chip *gc) |
726cb3ba | 470 | { |
a0b66a73 LW |
471 | bitmap_free(gc->valid_mask); |
472 | gc->valid_mask = NULL; | |
726cb3ba SB |
473 | } |
474 | ||
b056ca1c AS |
475 | static int gpiochip_add_pin_ranges(struct gpio_chip *gc) |
476 | { | |
477 | if (gc->add_pin_ranges) | |
478 | return gc->add_pin_ranges(gc); | |
479 | ||
480 | return 0; | |
481 | } | |
482 | ||
a0b66a73 | 483 | bool gpiochip_line_is_valid(const struct gpio_chip *gc, |
726cb3ba SB |
484 | unsigned int offset) |
485 | { | |
486 | /* No mask means all valid */ | |
a0b66a73 | 487 | if (likely(!gc->valid_mask)) |
726cb3ba | 488 | return true; |
a0b66a73 | 489 | return test_bit(offset, gc->valid_mask); |
726cb3ba SB |
490 | } |
491 | EXPORT_SYMBOL_GPL(gpiochip_line_is_valid); | |
492 | ||
ff2b1359 LW |
493 | static void gpiodevice_release(struct device *dev) |
494 | { | |
a6112998 | 495 | struct gpio_device *gdev = container_of(dev, struct gpio_device, dev); |
cf25ef6b | 496 | unsigned long flags; |
ff2b1359 | 497 | |
cf25ef6b | 498 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 499 | list_del(&gdev->list); |
cf25ef6b JH |
500 | spin_unlock_irqrestore(&gpio_lock, flags); |
501 | ||
8d4a85b6 | 502 | ida_free(&gpio_ida, gdev->id); |
fcf273e5 | 503 | kfree_const(gdev->label); |
476e2fc5 | 504 | kfree(gdev->descs); |
9efd9e69 | 505 | kfree(gdev); |
ff2b1359 LW |
506 | } |
507 | ||
1f5eb8b1 KG |
508 | #ifdef CONFIG_GPIO_CDEV |
509 | #define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt)) | |
510 | #define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev)) | |
511 | #else | |
512 | /* | |
513 | * gpiolib_cdev_register() indirectly calls device_add(), which is still | |
514 | * required even when cdev is not selected. | |
515 | */ | |
516 | #define gcdev_register(gdev, devt) device_add(&(gdev)->dev) | |
517 | #define gcdev_unregister(gdev) device_del(&(gdev)->dev) | |
518 | #endif | |
519 | ||
159f3cd9 GR |
520 | static int gpiochip_setup_dev(struct gpio_device *gdev) |
521 | { | |
d377f56f | 522 | int ret; |
159f3cd9 | 523 | |
1f5eb8b1 | 524 | ret = gcdev_register(gdev, gpio_devt); |
d377f56f LW |
525 | if (ret) |
526 | return ret; | |
111379dc | 527 | |
d377f56f LW |
528 | ret = gpiochip_sysfs_register(gdev); |
529 | if (ret) | |
159f3cd9 GR |
530 | goto err_remove_device; |
531 | ||
532 | /* From this point, the .release() function cleans up gpio_device */ | |
533 | gdev->dev.release = gpiodevice_release; | |
262b9011 GU |
534 | dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base, |
535 | gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic"); | |
159f3cd9 GR |
536 | |
537 | return 0; | |
538 | ||
539 | err_remove_device: | |
1f5eb8b1 | 540 | gcdev_unregister(gdev); |
d377f56f | 541 | return ret; |
159f3cd9 GR |
542 | } |
543 | ||
a0b66a73 | 544 | static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog) |
a411e81e BG |
545 | { |
546 | struct gpio_desc *desc; | |
547 | int rv; | |
548 | ||
a0b66a73 | 549 | desc = gpiochip_get_desc(gc, hog->chip_hwnum); |
a411e81e | 550 | if (IS_ERR(desc)) { |
262b9011 GU |
551 | chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__, |
552 | PTR_ERR(desc)); | |
a411e81e BG |
553 | return; |
554 | } | |
555 | ||
ba3efdff | 556 | if (test_bit(FLAG_IS_HOGGED, &desc->flags)) |
a411e81e BG |
557 | return; |
558 | ||
559 | rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags); | |
560 | if (rv) | |
262b9011 GU |
561 | gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n", |
562 | __func__, gc->label, hog->chip_hwnum, rv); | |
a411e81e BG |
563 | } |
564 | ||
a0b66a73 | 565 | static void machine_gpiochip_add(struct gpio_chip *gc) |
a411e81e BG |
566 | { |
567 | struct gpiod_hog *hog; | |
568 | ||
569 | mutex_lock(&gpio_machine_hogs_mutex); | |
570 | ||
571 | list_for_each_entry(hog, &gpio_machine_hogs, list) { | |
a0b66a73 LW |
572 | if (!strcmp(gc->label, hog->chip_label)) |
573 | gpiochip_machine_hog(gc, hog); | |
a411e81e BG |
574 | } |
575 | ||
576 | mutex_unlock(&gpio_machine_hogs_mutex); | |
577 | } | |
578 | ||
159f3cd9 GR |
579 | static void gpiochip_setup_devs(void) |
580 | { | |
581 | struct gpio_device *gdev; | |
d377f56f | 582 | int ret; |
159f3cd9 GR |
583 | |
584 | list_for_each_entry(gdev, &gpio_devices, list) { | |
d377f56f LW |
585 | ret = gpiochip_setup_dev(gdev); |
586 | if (ret) | |
262b9011 GU |
587 | dev_err(&gdev->dev, |
588 | "Failed to initialize gpio device (%d)\n", ret); | |
159f3cd9 GR |
589 | } |
590 | } | |
591 | ||
a0b66a73 | 592 | int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data, |
39c3fd58 AL |
593 | struct lock_class_key *lock_key, |
594 | struct lock_class_key *request_key) | |
d2876d08 | 595 | { |
990f6756 | 596 | struct fwnode_handle *fwnode = NULL; |
ff2b1359 | 597 | struct gpio_device *gdev; |
e5ab49cd BG |
598 | unsigned long flags; |
599 | int base = gc->base; | |
600 | unsigned int i; | |
601 | int ret = 0; | |
9dbd1ab2 | 602 | u32 ngpios; |
d2876d08 | 603 | |
990f6756 BG |
604 | if (gc->fwnode) |
605 | fwnode = gc->fwnode; | |
606 | else if (gc->parent) | |
607 | fwnode = dev_fwnode(gc->parent); | |
608 | ||
ff2b1359 LW |
609 | /* |
610 | * First: allocate and populate the internal stat container, and | |
611 | * set up the struct device. | |
612 | */ | |
969f07b4 | 613 | gdev = kzalloc(sizeof(*gdev), GFP_KERNEL); |
ff2b1359 | 614 | if (!gdev) |
14e85c0e | 615 | return -ENOMEM; |
3c702e99 | 616 | gdev->dev.bus = &gpio_bus_type; |
1df62542 | 617 | gdev->dev.parent = gc->parent; |
a0b66a73 LW |
618 | gdev->chip = gc; |
619 | gc->gpiodev = gdev; | |
acc6e331 | 620 | |
4731210c | 621 | of_gpio_dev_init(gc, gdev); |
515321ac | 622 | acpi_gpio_dev_init(gc, gdev); |
acc6e331 | 623 | |
6cb59afe AS |
624 | /* |
625 | * Assign fwnode depending on the result of the previous calls, | |
626 | * if none of them succeed, assign it to the parent's one. | |
627 | */ | |
628 | gdev->dev.fwnode = dev_fwnode(&gdev->dev) ?: fwnode; | |
629 | ||
8d4a85b6 | 630 | gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL); |
ff2b1359 | 631 | if (gdev->id < 0) { |
d377f56f | 632 | ret = gdev->id; |
ff2b1359 LW |
633 | goto err_free_gdev; |
634 | } | |
c351bb64 QW |
635 | |
636 | ret = dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id); | |
637 | if (ret) | |
638 | goto err_free_ida; | |
639 | ||
ff2b1359 | 640 | device_initialize(&gdev->dev); |
a0b66a73 LW |
641 | if (gc->parent && gc->parent->driver) |
642 | gdev->owner = gc->parent->driver->owner; | |
643 | else if (gc->owner) | |
ff2b1359 | 644 | /* TODO: remove chip->owner */ |
a0b66a73 | 645 | gdev->owner = gc->owner; |
ff2b1359 LW |
646 | else |
647 | gdev->owner = THIS_MODULE; | |
d2876d08 | 648 | |
a0b66a73 | 649 | gdev->descs = kcalloc(gc->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL); |
1c3cdb18 | 650 | if (!gdev->descs) { |
d377f56f | 651 | ret = -ENOMEM; |
c351bb64 | 652 | goto err_free_dev_name; |
ff2b1359 LW |
653 | } |
654 | ||
9dbd1ab2 BG |
655 | /* |
656 | * Try the device properties if the driver didn't supply the number | |
657 | * of GPIO lines. | |
658 | */ | |
659 | if (gc->ngpio == 0) { | |
660 | ret = device_property_read_u32(&gdev->dev, "ngpios", &ngpios); | |
661 | if (ret == -ENODATA) | |
662 | /* | |
663 | * -ENODATA means that there is no property found and | |
664 | * we want to issue the error message to the user. | |
665 | * Besides that, we want to return different error code | |
666 | * to state that supplied value is not valid. | |
667 | */ | |
668 | ngpios = 0; | |
669 | else if (ret) | |
670 | goto err_free_descs; | |
671 | ||
672 | gc->ngpio = ngpios; | |
673 | } | |
674 | ||
a0b66a73 LW |
675 | if (gc->ngpio == 0) { |
676 | chip_err(gc, "tried to insert a GPIO chip with zero lines\n"); | |
d377f56f | 677 | ret = -EINVAL; |
159f3cd9 | 678 | goto err_free_descs; |
5ed41cc4 | 679 | } |
df4878e9 | 680 | |
a0b66a73 LW |
681 | if (gc->ngpio > FASTPATH_NGPIO) |
682 | chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n", | |
683 | gc->ngpio, FASTPATH_NGPIO); | |
3027743f | 684 | |
a0b66a73 | 685 | gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL); |
df4878e9 | 686 | if (!gdev->label) { |
d377f56f | 687 | ret = -ENOMEM; |
476e2fc5 | 688 | goto err_free_descs; |
df4878e9 LW |
689 | } |
690 | ||
a0b66a73 | 691 | gdev->ngpio = gc->ngpio; |
43c54eca | 692 | gdev->data = data; |
5ed41cc4 | 693 | |
d2876d08 DB |
694 | spin_lock_irqsave(&gpio_lock, flags); |
695 | ||
fdeb8e15 LW |
696 | /* |
697 | * TODO: this allocates a Linux GPIO number base in the global | |
698 | * GPIO numberspace for this chip. In the long run we want to | |
699 | * get *rid* of this numberspace and use only descriptors, but | |
700 | * it may be a pipe dream. It will not happen before we get rid | |
701 | * of the sysfs interface anyways. | |
702 | */ | |
8d0aab2f | 703 | if (base < 0) { |
a0b66a73 | 704 | base = gpiochip_find_base(gc->ngpio); |
8d0aab2f | 705 | if (base < 0) { |
d377f56f | 706 | ret = base; |
225fce83 | 707 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 708 | goto err_free_label; |
8d0aab2f | 709 | } |
fdeb8e15 LW |
710 | /* |
711 | * TODO: it should not be necessary to reflect the assigned | |
712 | * base outside of the GPIO subsystem. Go over drivers and | |
713 | * see if anyone makes use of this, else drop this and assign | |
714 | * a poison instead. | |
715 | */ | |
a0b66a73 | 716 | gc->base = base; |
8d0aab2f | 717 | } |
fdeb8e15 | 718 | gdev->base = base; |
8d0aab2f | 719 | |
d377f56f LW |
720 | ret = gpiodev_add_to_list(gdev); |
721 | if (ret) { | |
05aa5203 | 722 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 723 | goto err_free_label; |
05aa5203 | 724 | } |
1a989d0f | 725 | |
a0b66a73 | 726 | for (i = 0; i < gc->ngpio; i++) |
767cd17a | 727 | gdev->descs[i].gdev = gdev; |
14e85c0e | 728 | |
207270dd DC |
729 | spin_unlock_irqrestore(&gpio_lock, flags); |
730 | ||
6accc376 | 731 | BLOCKING_INIT_NOTIFIER_HEAD(&gdev->notifier); |
51c1064e | 732 | |
f23f1516 | 733 | #ifdef CONFIG_PINCTRL |
20ec3e39 | 734 | INIT_LIST_HEAD(&gdev->pin_ranges); |
f23f1516 SH |
735 | #endif |
736 | ||
7cba1a4d BG |
737 | if (gc->names) |
738 | ret = gpiochip_set_desc_names(gc); | |
739 | else | |
740 | ret = devprop_gpiochip_set_names(gc); | |
d377f56f | 741 | if (ret) |
5f3ca732 MP |
742 | goto err_remove_from_list; |
743 | ||
a0b66a73 | 744 | ret = gpiochip_alloc_valid_mask(gc); |
d377f56f | 745 | if (ret) |
48057ed1 | 746 | goto err_remove_from_list; |
e0d89728 | 747 | |
a0b66a73 | 748 | ret = of_gpiochip_add(gc); |
d377f56f | 749 | if (ret) |
48057ed1 | 750 | goto err_free_gpiochip_mask; |
28355f81 | 751 | |
a0b66a73 | 752 | ret = gpiochip_init_valid_mask(gc); |
d377f56f | 753 | if (ret) |
35779890 | 754 | goto err_remove_of_chip; |
f8ec92a9 | 755 | |
a0b66a73 | 756 | for (i = 0; i < gc->ngpio; i++) { |
3edfb7bd RRD |
757 | struct gpio_desc *desc = &gdev->descs[i]; |
758 | ||
a0b66a73 | 759 | if (gc->get_direction && gpiochip_line_is_valid(gc, i)) { |
4fc5bfeb | 760 | assign_bit(FLAG_IS_OUT, |
a0b66a73 | 761 | &desc->flags, !gc->get_direction(gc, i)); |
d95da993 | 762 | } else { |
4fc5bfeb | 763 | assign_bit(FLAG_IS_OUT, |
a0b66a73 | 764 | &desc->flags, !gc->direction_input); |
d95da993 | 765 | } |
3edfb7bd RRD |
766 | } |
767 | ||
a0b66a73 | 768 | ret = gpiochip_add_pin_ranges(gc); |
b056ca1c AS |
769 | if (ret) |
770 | goto err_remove_of_chip; | |
771 | ||
a0b66a73 | 772 | acpi_gpiochip_add(gc); |
391c970c | 773 | |
a0b66a73 | 774 | machine_gpiochip_add(gc); |
a411e81e | 775 | |
a0b66a73 | 776 | ret = gpiochip_irqchip_init_valid_mask(gc); |
9411e3aa AS |
777 | if (ret) |
778 | goto err_remove_acpi_chip; | |
779 | ||
a0b66a73 | 780 | ret = gpiochip_irqchip_init_hw(gc); |
fbdf8d4b | 781 | if (ret) |
48057ed1 LW |
782 | goto err_remove_acpi_chip; |
783 | ||
a0b66a73 | 784 | ret = gpiochip_add_irqchip(gc, lock_key, request_key); |
fbdf8d4b | 785 | if (ret) |
48057ed1 LW |
786 | goto err_remove_irqchip_mask; |
787 | ||
3c702e99 LW |
788 | /* |
789 | * By first adding the chardev, and then adding the device, | |
790 | * we get a device node entry in sysfs under | |
791 | * /sys/bus/gpio/devices/gpiochipN/dev that can be used for | |
792 | * coldplug of device nodes and other udev business. | |
159f3cd9 GR |
793 | * We can do this only if gpiolib has been initialized. |
794 | * Otherwise, defer until later. | |
3c702e99 | 795 | */ |
159f3cd9 | 796 | if (gpiolib_initialized) { |
d377f56f LW |
797 | ret = gpiochip_setup_dev(gdev); |
798 | if (ret) | |
48057ed1 | 799 | goto err_remove_irqchip; |
159f3cd9 | 800 | } |
cedb1881 | 801 | return 0; |
3bae4811 | 802 | |
48057ed1 | 803 | err_remove_irqchip: |
a0b66a73 | 804 | gpiochip_irqchip_remove(gc); |
48057ed1 | 805 | err_remove_irqchip_mask: |
a0b66a73 | 806 | gpiochip_irqchip_free_valid_mask(gc); |
35779890 | 807 | err_remove_acpi_chip: |
a0b66a73 | 808 | acpi_gpiochip_remove(gc); |
35779890 | 809 | err_remove_of_chip: |
a0b66a73 LW |
810 | gpiochip_free_hogs(gc); |
811 | of_gpiochip_remove(gc); | |
35779890 | 812 | err_free_gpiochip_mask: |
a0b66a73 LW |
813 | gpiochip_remove_pin_ranges(gc); |
814 | gpiochip_free_valid_mask(gc); | |
5f3ca732 | 815 | err_remove_from_list: |
225fce83 | 816 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 817 | list_del(&gdev->list); |
3bae4811 | 818 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 819 | err_free_label: |
fcf273e5 | 820 | kfree_const(gdev->label); |
476e2fc5 GR |
821 | err_free_descs: |
822 | kfree(gdev->descs); | |
c351bb64 QW |
823 | err_free_dev_name: |
824 | kfree(dev_name(&gdev->dev)); | |
a05a1404 | 825 | err_free_ida: |
8d4a85b6 | 826 | ida_free(&gpio_ida, gdev->id); |
a05a1404 | 827 | err_free_gdev: |
d2876d08 | 828 | /* failures here can mean systems won't boot... */ |
3cc1fb73 GS |
829 | if (ret != -EPROBE_DEFER) { |
830 | pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__, | |
831 | gdev->base, gdev->base + gdev->ngpio - 1, | |
832 | gc->label ? : "generic", ret); | |
833 | } | |
fdeb8e15 | 834 | kfree(gdev); |
d377f56f | 835 | return ret; |
d2876d08 | 836 | } |
959bc7b2 | 837 | EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key); |
d2876d08 | 838 | |
43c54eca LW |
839 | /** |
840 | * gpiochip_get_data() - get per-subdriver data for the chip | |
a0b66a73 | 841 | * @gc: GPIO chip |
950d55f5 TR |
842 | * |
843 | * Returns: | |
844 | * The per-subdriver data for the chip. | |
43c54eca | 845 | */ |
a0b66a73 | 846 | void *gpiochip_get_data(struct gpio_chip *gc) |
43c54eca | 847 | { |
a0b66a73 | 848 | return gc->gpiodev->data; |
43c54eca LW |
849 | } |
850 | EXPORT_SYMBOL_GPL(gpiochip_get_data); | |
851 | ||
d2876d08 DB |
852 | /** |
853 | * gpiochip_remove() - unregister a gpio_chip | |
a0b66a73 | 854 | * @gc: the chip to unregister |
d2876d08 DB |
855 | * |
856 | * A gpio_chip with any GPIOs still requested may not be removed. | |
857 | */ | |
a0b66a73 | 858 | void gpiochip_remove(struct gpio_chip *gc) |
d2876d08 | 859 | { |
a0b66a73 | 860 | struct gpio_device *gdev = gc->gpiodev; |
d2876d08 | 861 | unsigned long flags; |
869233f8 | 862 | unsigned int i; |
d2876d08 | 863 | |
ff2b1359 | 864 | /* FIXME: should the legacy sysfs handling be moved to gpio_device? */ |
afbc4f31 | 865 | gpiochip_sysfs_unregister(gdev); |
a0b66a73 | 866 | gpiochip_free_hogs(gc); |
bd203bd5 BJZ |
867 | /* Numb the device, cancelling all outstanding operations */ |
868 | gdev->chip = NULL; | |
a0b66a73 LW |
869 | gpiochip_irqchip_remove(gc); |
870 | acpi_gpiochip_remove(gc); | |
871 | of_gpiochip_remove(gc); | |
872 | gpiochip_remove_pin_ranges(gc); | |
873 | gpiochip_free_valid_mask(gc); | |
43c54eca LW |
874 | /* |
875 | * We accept no more calls into the driver from this point, so | |
876 | * NULL the driver data pointer | |
877 | */ | |
878 | gdev->data = NULL; | |
391c970c | 879 | |
6798acaa | 880 | spin_lock_irqsave(&gpio_lock, flags); |
fdeb8e15 | 881 | for (i = 0; i < gdev->ngpio; i++) { |
a0b66a73 | 882 | if (gpiochip_is_requested(gc, i)) |
869233f8 | 883 | break; |
d2876d08 | 884 | } |
d2876d08 | 885 | spin_unlock_irqrestore(&gpio_lock, flags); |
14e85c0e | 886 | |
ca18a852 | 887 | if (i != gdev->ngpio) |
fdeb8e15 | 888 | dev_crit(&gdev->dev, |
58383c78 | 889 | "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n"); |
fab28b89 | 890 | |
ff2b1359 LW |
891 | /* |
892 | * The gpiochip side puts its use of the device to rest here: | |
893 | * if there are no userspace clients, the chardev and device will | |
894 | * be removed, else it will be dangling until the last user is | |
895 | * gone. | |
896 | */ | |
1f5eb8b1 | 897 | gcdev_unregister(gdev); |
ff2b1359 | 898 | put_device(&gdev->dev); |
d2876d08 DB |
899 | } |
900 | EXPORT_SYMBOL_GPL(gpiochip_remove); | |
901 | ||
594fa265 GL |
902 | /** |
903 | * gpiochip_find() - iterator for locating a specific gpio_chip | |
904 | * @data: data to pass to match function | |
950d55f5 | 905 | * @match: Callback function to check gpio_chip |
594fa265 GL |
906 | * |
907 | * Similar to bus_find_device. It returns a reference to a gpio_chip as | |
908 | * determined by a user supplied @match callback. The callback should return | |
909 | * 0 if the device doesn't match and non-zero if it does. If the callback is | |
910 | * non-zero, this function will return to the caller and not iterate over any | |
911 | * more gpio_chips. | |
912 | */ | |
07ce8ec7 | 913 | struct gpio_chip *gpiochip_find(void *data, |
a0b66a73 | 914 | int (*match)(struct gpio_chip *gc, |
3d0f7cf0 | 915 | void *data)) |
594fa265 | 916 | { |
ff2b1359 | 917 | struct gpio_device *gdev; |
a0b66a73 | 918 | struct gpio_chip *gc = NULL; |
594fa265 | 919 | unsigned long flags; |
594fa265 GL |
920 | |
921 | spin_lock_irqsave(&gpio_lock, flags); | |
ff2b1359 | 922 | list_for_each_entry(gdev, &gpio_devices, list) |
acf06ff7 | 923 | if (gdev->chip && match(gdev->chip, data)) { |
a0b66a73 | 924 | gc = gdev->chip; |
594fa265 | 925 | break; |
acf06ff7 | 926 | } |
ff2b1359 | 927 | |
594fa265 GL |
928 | spin_unlock_irqrestore(&gpio_lock, flags); |
929 | ||
a0b66a73 | 930 | return gc; |
594fa265 | 931 | } |
8fa0c9bf | 932 | EXPORT_SYMBOL_GPL(gpiochip_find); |
d2876d08 | 933 | |
a0b66a73 | 934 | static int gpiochip_match_name(struct gpio_chip *gc, void *data) |
79697ef9 AC |
935 | { |
936 | const char *name = data; | |
937 | ||
a0b66a73 | 938 | return !strcmp(gc->label, name); |
79697ef9 AC |
939 | } |
940 | ||
941 | static struct gpio_chip *find_chip_by_name(const char *name) | |
942 | { | |
943 | return gpiochip_find((void *)name, gpiochip_match_name); | |
944 | } | |
945 | ||
14250520 LW |
946 | #ifdef CONFIG_GPIOLIB_IRQCHIP |
947 | ||
948 | /* | |
949 | * The following is irqchip helper code for gpiochips. | |
950 | */ | |
951 | ||
9411e3aa AS |
952 | static int gpiochip_irqchip_init_hw(struct gpio_chip *gc) |
953 | { | |
954 | struct gpio_irq_chip *girq = &gc->irq; | |
955 | ||
956 | if (!girq->init_hw) | |
957 | return 0; | |
958 | ||
959 | return girq->init_hw(gc); | |
960 | } | |
961 | ||
5fbe5b58 | 962 | static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc) |
79b804cb | 963 | { |
5fbe5b58 LW |
964 | struct gpio_irq_chip *girq = &gc->irq; |
965 | ||
966 | if (!girq->init_valid_mask) | |
79b804cb MW |
967 | return 0; |
968 | ||
5fbe5b58 LW |
969 | girq->valid_mask = gpiochip_allocate_mask(gc); |
970 | if (!girq->valid_mask) | |
79b804cb MW |
971 | return -ENOMEM; |
972 | ||
5fbe5b58 LW |
973 | girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio); |
974 | ||
79b804cb MW |
975 | return 0; |
976 | } | |
977 | ||
a0b66a73 | 978 | static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc) |
79b804cb | 979 | { |
a0b66a73 LW |
980 | bitmap_free(gc->irq.valid_mask); |
981 | gc->irq.valid_mask = NULL; | |
79b804cb MW |
982 | } |
983 | ||
a0b66a73 | 984 | bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc, |
64ff2c8e | 985 | unsigned int offset) |
79b804cb | 986 | { |
a0b66a73 | 987 | if (!gpiochip_line_is_valid(gc, offset)) |
726cb3ba | 988 | return false; |
79b804cb | 989 | /* No mask means all valid */ |
a0b66a73 | 990 | if (likely(!gc->irq.valid_mask)) |
79b804cb | 991 | return true; |
a0b66a73 | 992 | return test_bit(offset, gc->irq.valid_mask); |
79b804cb | 993 | } |
64ff2c8e | 994 | EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid); |
79b804cb | 995 | |
fdd61a01 LW |
996 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
997 | ||
998 | /** | |
999 | * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip | |
1000 | * to a gpiochip | |
1001 | * @gc: the gpiochip to set the irqchip hierarchical handler to | |
1002 | * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt | |
1003 | * will then percolate up to the parent | |
1004 | */ | |
1005 | static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc, | |
1006 | struct irq_chip *irqchip) | |
1007 | { | |
1008 | /* DT will deal with mapping each IRQ as we go along */ | |
1009 | if (is_of_node(gc->irq.fwnode)) | |
1010 | return; | |
1011 | ||
1012 | /* | |
1013 | * This is for legacy and boardfile "irqchip" fwnodes: allocate | |
1014 | * irqs upfront instead of dynamically since we don't have the | |
1015 | * dynamic type of allocation that hardware description languages | |
1016 | * provide. Once all GPIO drivers using board files are gone from | |
1017 | * the kernel we can delete this code, but for a transitional period | |
1018 | * it is necessary to keep this around. | |
1019 | */ | |
1020 | if (is_fwnode_irqchip(gc->irq.fwnode)) { | |
1021 | int i; | |
1022 | int ret; | |
1023 | ||
1024 | for (i = 0; i < gc->ngpio; i++) { | |
1025 | struct irq_fwspec fwspec; | |
1026 | unsigned int parent_hwirq; | |
1027 | unsigned int parent_type; | |
1028 | struct gpio_irq_chip *girq = &gc->irq; | |
1029 | ||
1030 | /* | |
1031 | * We call the child to parent translation function | |
1032 | * only to check if the child IRQ is valid or not. | |
1033 | * Just pick the rising edge type here as that is what | |
1034 | * we likely need to support. | |
1035 | */ | |
1036 | ret = girq->child_to_parent_hwirq(gc, i, | |
1037 | IRQ_TYPE_EDGE_RISING, | |
1038 | &parent_hwirq, | |
1039 | &parent_type); | |
1040 | if (ret) { | |
1041 | chip_err(gc, "skip set-up on hwirq %d\n", | |
1042 | i); | |
1043 | continue; | |
1044 | } | |
1045 | ||
1046 | fwspec.fwnode = gc->irq.fwnode; | |
1047 | /* This is the hwirq for the GPIO line side of things */ | |
1048 | fwspec.param[0] = girq->child_offset_to_irq(gc, i); | |
1049 | /* Just pick something */ | |
1050 | fwspec.param[1] = IRQ_TYPE_EDGE_RISING; | |
1051 | fwspec.param_count = 2; | |
1052 | ret = __irq_domain_alloc_irqs(gc->irq.domain, | |
1053 | /* just pick something */ | |
1054 | -1, | |
1055 | 1, | |
1056 | NUMA_NO_NODE, | |
1057 | &fwspec, | |
1058 | false, | |
1059 | NULL); | |
1060 | if (ret < 0) { | |
1061 | chip_err(gc, | |
1062 | "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n", | |
1063 | i, parent_hwirq, | |
1064 | ret); | |
1065 | } | |
1066 | } | |
1067 | } | |
1068 | ||
1069 | chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__); | |
1070 | ||
1071 | return; | |
1072 | } | |
1073 | ||
1074 | static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d, | |
1075 | struct irq_fwspec *fwspec, | |
1076 | unsigned long *hwirq, | |
1077 | unsigned int *type) | |
1078 | { | |
1079 | /* We support standard DT translation */ | |
1080 | if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) { | |
1081 | return irq_domain_translate_twocell(d, fwspec, hwirq, type); | |
1082 | } | |
1083 | ||
1084 | /* This is for board files and others not using DT */ | |
1085 | if (is_fwnode_irqchip(fwspec->fwnode)) { | |
1086 | int ret; | |
1087 | ||
1088 | ret = irq_domain_translate_twocell(d, fwspec, hwirq, type); | |
1089 | if (ret) | |
1090 | return ret; | |
1091 | WARN_ON(*type == IRQ_TYPE_NONE); | |
1092 | return 0; | |
1093 | } | |
1094 | return -EINVAL; | |
1095 | } | |
1096 | ||
1097 | static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d, | |
1098 | unsigned int irq, | |
1099 | unsigned int nr_irqs, | |
1100 | void *data) | |
1101 | { | |
1102 | struct gpio_chip *gc = d->host_data; | |
1103 | irq_hw_number_t hwirq; | |
1104 | unsigned int type = IRQ_TYPE_NONE; | |
1105 | struct irq_fwspec *fwspec = data; | |
24258761 | 1106 | void *parent_arg; |
fdd61a01 LW |
1107 | unsigned int parent_hwirq; |
1108 | unsigned int parent_type; | |
1109 | struct gpio_irq_chip *girq = &gc->irq; | |
1110 | int ret; | |
1111 | ||
1112 | /* | |
1113 | * The nr_irqs parameter is always one except for PCI multi-MSI | |
1114 | * so this should not happen. | |
1115 | */ | |
1116 | WARN_ON(nr_irqs != 1); | |
1117 | ||
1118 | ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type); | |
1119 | if (ret) | |
1120 | return ret; | |
1121 | ||
366950ee | 1122 | chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq); |
fdd61a01 LW |
1123 | |
1124 | ret = girq->child_to_parent_hwirq(gc, hwirq, type, | |
1125 | &parent_hwirq, &parent_type); | |
1126 | if (ret) { | |
1127 | chip_err(gc, "can't look up hwirq %lu\n", hwirq); | |
1128 | return ret; | |
1129 | } | |
366950ee | 1130 | chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq); |
fdd61a01 LW |
1131 | |
1132 | /* | |
1133 | * We set handle_bad_irq because the .set_type() should | |
1134 | * always be invoked and set the right type of handler. | |
1135 | */ | |
1136 | irq_domain_set_info(d, | |
1137 | irq, | |
1138 | hwirq, | |
1139 | gc->irq.chip, | |
1140 | gc, | |
1141 | girq->handler, | |
1142 | NULL, NULL); | |
1143 | irq_set_probe(irq); | |
1144 | ||
fdd61a01 | 1145 | /* This parent only handles asserted level IRQs */ |
24258761 KH |
1146 | parent_arg = girq->populate_parent_alloc_arg(gc, parent_hwirq, parent_type); |
1147 | if (!parent_arg) | |
1148 | return -ENOMEM; | |
1149 | ||
366950ee | 1150 | chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n", |
fdd61a01 | 1151 | irq, parent_hwirq); |
c34f6dc8 | 1152 | irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key); |
24258761 | 1153 | ret = irq_domain_alloc_irqs_parent(d, irq, 1, parent_arg); |
880b7cf2 KH |
1154 | /* |
1155 | * If the parent irqdomain is msi, the interrupts have already | |
1156 | * been allocated, so the EEXIST is good. | |
1157 | */ | |
1158 | if (irq_domain_is_msi(d->parent) && (ret == -EEXIST)) | |
1159 | ret = 0; | |
fdd61a01 LW |
1160 | if (ret) |
1161 | chip_err(gc, | |
1162 | "failed to allocate parent hwirq %d for hwirq %lu\n", | |
1163 | parent_hwirq, hwirq); | |
1164 | ||
24258761 | 1165 | kfree(parent_arg); |
fdd61a01 LW |
1166 | return ret; |
1167 | } | |
1168 | ||
a0b66a73 | 1169 | static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc, |
fdd61a01 LW |
1170 | unsigned int offset) |
1171 | { | |
1172 | return offset; | |
1173 | } | |
1174 | ||
1175 | static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops) | |
1176 | { | |
1177 | ops->activate = gpiochip_irq_domain_activate; | |
1178 | ops->deactivate = gpiochip_irq_domain_deactivate; | |
1179 | ops->alloc = gpiochip_hierarchy_irq_domain_alloc; | |
1180 | ops->free = irq_domain_free_irqs_common; | |
1181 | ||
1182 | /* | |
1183 | * We only allow overriding the translate() function for | |
1184 | * hierarchical chips, and this should only be done if the user | |
1185 | * really need something other than 1:1 translation. | |
1186 | */ | |
1187 | if (!ops->translate) | |
1188 | ops->translate = gpiochip_hierarchy_irq_domain_translate; | |
1189 | } | |
1190 | ||
1191 | static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc) | |
1192 | { | |
1193 | if (!gc->irq.child_to_parent_hwirq || | |
1194 | !gc->irq.fwnode) { | |
1195 | chip_err(gc, "missing irqdomain vital data\n"); | |
1196 | return -EINVAL; | |
1197 | } | |
1198 | ||
1199 | if (!gc->irq.child_offset_to_irq) | |
1200 | gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop; | |
1201 | ||
24258761 KH |
1202 | if (!gc->irq.populate_parent_alloc_arg) |
1203 | gc->irq.populate_parent_alloc_arg = | |
fdd61a01 LW |
1204 | gpiochip_populate_parent_fwspec_twocell; |
1205 | ||
1206 | gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops); | |
1207 | ||
1208 | gc->irq.domain = irq_domain_create_hierarchy( | |
1209 | gc->irq.parent_domain, | |
1210 | 0, | |
1211 | gc->ngpio, | |
1212 | gc->irq.fwnode, | |
1213 | &gc->irq.child_irq_domain_ops, | |
1214 | gc); | |
1215 | ||
1216 | if (!gc->irq.domain) | |
1217 | return -ENOMEM; | |
1218 | ||
1219 | gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip); | |
1220 | ||
1221 | return 0; | |
1222 | } | |
1223 | ||
1224 | static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc) | |
1225 | { | |
1226 | return !!gc->irq.parent_domain; | |
1227 | } | |
1228 | ||
a0b66a73 | 1229 | void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc, |
fdd61a01 LW |
1230 | unsigned int parent_hwirq, |
1231 | unsigned int parent_type) | |
1232 | { | |
24258761 KH |
1233 | struct irq_fwspec *fwspec; |
1234 | ||
1235 | fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL); | |
1236 | if (!fwspec) | |
1237 | return NULL; | |
1238 | ||
a0b66a73 | 1239 | fwspec->fwnode = gc->irq.parent_domain->fwnode; |
fdd61a01 LW |
1240 | fwspec->param_count = 2; |
1241 | fwspec->param[0] = parent_hwirq; | |
1242 | fwspec->param[1] = parent_type; | |
24258761 KH |
1243 | |
1244 | return fwspec; | |
fdd61a01 LW |
1245 | } |
1246 | EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell); | |
1247 | ||
a0b66a73 | 1248 | void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc, |
fdd61a01 LW |
1249 | unsigned int parent_hwirq, |
1250 | unsigned int parent_type) | |
1251 | { | |
24258761 KH |
1252 | struct irq_fwspec *fwspec; |
1253 | ||
1254 | fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL); | |
1255 | if (!fwspec) | |
1256 | return NULL; | |
1257 | ||
a0b66a73 | 1258 | fwspec->fwnode = gc->irq.parent_domain->fwnode; |
fdd61a01 LW |
1259 | fwspec->param_count = 4; |
1260 | fwspec->param[0] = 0; | |
1261 | fwspec->param[1] = parent_hwirq; | |
1262 | fwspec->param[2] = 0; | |
1263 | fwspec->param[3] = parent_type; | |
24258761 KH |
1264 | |
1265 | return fwspec; | |
fdd61a01 LW |
1266 | } |
1267 | EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell); | |
1268 | ||
1269 | #else | |
1270 | ||
1271 | static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc) | |
1272 | { | |
1273 | return -EINVAL; | |
1274 | } | |
1275 | ||
1276 | static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc) | |
1277 | { | |
1278 | return false; | |
1279 | } | |
1280 | ||
1281 | #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ | |
1282 | ||
14250520 LW |
1283 | /** |
1284 | * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip | |
1285 | * @d: the irqdomain used by this irqchip | |
1286 | * @irq: the global irq number used by this GPIO irqchip irq | |
1287 | * @hwirq: the local IRQ/GPIO line offset on this gpiochip | |
1288 | * | |
1289 | * This function will set up the mapping for a certain IRQ line on a | |
1290 | * gpiochip by assigning the gpiochip as chip data, and using the irqchip | |
1291 | * stored inside the gpiochip. | |
1292 | */ | |
1b95b4eb TR |
1293 | int gpiochip_irq_map(struct irq_domain *d, unsigned int irq, |
1294 | irq_hw_number_t hwirq) | |
14250520 | 1295 | { |
a0b66a73 | 1296 | struct gpio_chip *gc = d->host_data; |
d377f56f | 1297 | int ret = 0; |
14250520 | 1298 | |
a0b66a73 | 1299 | if (!gpiochip_irqchip_irq_valid(gc, hwirq)) |
dc749a09 GS |
1300 | return -ENXIO; |
1301 | ||
a0b66a73 | 1302 | irq_set_chip_data(irq, gc); |
a0a8bcf4 GS |
1303 | /* |
1304 | * This lock class tells lockdep that GPIO irqs are in a different | |
1305 | * category than their parents, so it won't report false recursion. | |
1306 | */ | |
a0b66a73 LW |
1307 | irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key); |
1308 | irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler); | |
d245b3f9 | 1309 | /* Chips that use nested thread handlers have them marked */ |
a0b66a73 | 1310 | if (gc->irq.threaded) |
1c8732bb | 1311 | irq_set_nested_thread(irq, 1); |
14250520 | 1312 | irq_set_noprobe(irq); |
23393d49 | 1313 | |
a0b66a73 LW |
1314 | if (gc->irq.num_parents == 1) |
1315 | ret = irq_set_parent(irq, gc->irq.parents[0]); | |
1316 | else if (gc->irq.map) | |
1317 | ret = irq_set_parent(irq, gc->irq.map[hwirq]); | |
e0d89728 | 1318 | |
d377f56f LW |
1319 | if (ret < 0) |
1320 | return ret; | |
e0d89728 | 1321 | |
1333b90f LW |
1322 | /* |
1323 | * No set-up of the hardware will happen if IRQ_TYPE_NONE | |
1324 | * is passed as default type. | |
1325 | */ | |
a0b66a73 LW |
1326 | if (gc->irq.default_type != IRQ_TYPE_NONE) |
1327 | irq_set_irq_type(irq, gc->irq.default_type); | |
14250520 LW |
1328 | |
1329 | return 0; | |
1330 | } | |
1b95b4eb | 1331 | EXPORT_SYMBOL_GPL(gpiochip_irq_map); |
14250520 | 1332 | |
1b95b4eb | 1333 | void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq) |
c3626fde | 1334 | { |
a0b66a73 | 1335 | struct gpio_chip *gc = d->host_data; |
1c8732bb | 1336 | |
a0b66a73 | 1337 | if (gc->irq.threaded) |
1c8732bb | 1338 | irq_set_nested_thread(irq, 0); |
c3626fde LW |
1339 | irq_set_chip_and_handler(irq, NULL, NULL); |
1340 | irq_set_chip_data(irq, NULL); | |
1341 | } | |
1b95b4eb | 1342 | EXPORT_SYMBOL_GPL(gpiochip_irq_unmap); |
c3626fde | 1343 | |
14250520 LW |
1344 | static const struct irq_domain_ops gpiochip_domain_ops = { |
1345 | .map = gpiochip_irq_map, | |
c3626fde | 1346 | .unmap = gpiochip_irq_unmap, |
14250520 LW |
1347 | /* Virtually all GPIO irqchips are twocell:ed */ |
1348 | .xlate = irq_domain_xlate_twocell, | |
1349 | }; | |
1350 | ||
fdd61a01 LW |
1351 | /* |
1352 | * TODO: move these activate/deactivate in under the hierarchicial | |
1353 | * irqchip implementation as static once SPMI and SSBI (all external | |
1354 | * users) are phased over. | |
1355 | */ | |
ef74f70e BM |
1356 | /** |
1357 | * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ | |
1358 | * @domain: The IRQ domain used by this IRQ chip | |
1359 | * @data: Outermost irq_data associated with the IRQ | |
1360 | * @reserve: If set, only reserve an interrupt vector instead of assigning one | |
1361 | * | |
1362 | * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be | |
1363 | * used as the activate function for the &struct irq_domain_ops. The host_data | |
1364 | * for the IRQ domain must be the &struct gpio_chip. | |
1365 | */ | |
1366 | int gpiochip_irq_domain_activate(struct irq_domain *domain, | |
1367 | struct irq_data *data, bool reserve) | |
1368 | { | |
a0b66a73 | 1369 | struct gpio_chip *gc = domain->host_data; |
ef74f70e | 1370 | |
a0b66a73 | 1371 | return gpiochip_lock_as_irq(gc, data->hwirq); |
ef74f70e BM |
1372 | } |
1373 | EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate); | |
1374 | ||
1375 | /** | |
1376 | * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ | |
1377 | * @domain: The IRQ domain used by this IRQ chip | |
1378 | * @data: Outermost irq_data associated with the IRQ | |
1379 | * | |
1380 | * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to | |
1381 | * be used as the deactivate function for the &struct irq_domain_ops. The | |
1382 | * host_data for the IRQ domain must be the &struct gpio_chip. | |
1383 | */ | |
1384 | void gpiochip_irq_domain_deactivate(struct irq_domain *domain, | |
1385 | struct irq_data *data) | |
1386 | { | |
a0b66a73 | 1387 | struct gpio_chip *gc = domain->host_data; |
ef74f70e | 1388 | |
a0b66a73 | 1389 | return gpiochip_unlock_as_irq(gc, data->hwirq); |
ef74f70e BM |
1390 | } |
1391 | EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate); | |
1392 | ||
13daf489 | 1393 | static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset) |
14250520 | 1394 | { |
a0b66a73 | 1395 | struct irq_domain *domain = gc->irq.domain; |
fdd61a01 | 1396 | |
a0b66a73 | 1397 | if (!gpiochip_irqchip_irq_valid(gc, offset)) |
4e6b8238 | 1398 | return -ENXIO; |
5b76e79c | 1399 | |
fdd61a01 LW |
1400 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
1401 | if (irq_domain_is_hierarchy(domain)) { | |
1402 | struct irq_fwspec spec; | |
1403 | ||
1404 | spec.fwnode = domain->fwnode; | |
1405 | spec.param_count = 2; | |
a0b66a73 | 1406 | spec.param[0] = gc->irq.child_offset_to_irq(gc, offset); |
fdd61a01 LW |
1407 | spec.param[1] = IRQ_TYPE_NONE; |
1408 | ||
1409 | return irq_create_fwspec_mapping(&spec); | |
1410 | } | |
1411 | #endif | |
1412 | ||
1413 | return irq_create_mapping(domain, offset); | |
14250520 LW |
1414 | } |
1415 | ||
14250520 LW |
1416 | static int gpiochip_irq_reqres(struct irq_data *d) |
1417 | { | |
a0b66a73 | 1418 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
5b76e79c | 1419 | |
a0b66a73 | 1420 | return gpiochip_reqres_irq(gc, d->hwirq); |
14250520 LW |
1421 | } |
1422 | ||
1423 | static void gpiochip_irq_relres(struct irq_data *d) | |
1424 | { | |
a0b66a73 | 1425 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
14250520 | 1426 | |
a0b66a73 | 1427 | gpiochip_relres_irq(gc, d->hwirq); |
14250520 LW |
1428 | } |
1429 | ||
a8173820 MS |
1430 | static void gpiochip_irq_mask(struct irq_data *d) |
1431 | { | |
1432 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | |
1433 | ||
1434 | if (gc->irq.irq_mask) | |
1435 | gc->irq.irq_mask(d); | |
1436 | gpiochip_disable_irq(gc, d->hwirq); | |
1437 | } | |
1438 | ||
1439 | static void gpiochip_irq_unmask(struct irq_data *d) | |
1440 | { | |
1441 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | |
1442 | ||
1443 | gpiochip_enable_irq(gc, d->hwirq); | |
1444 | if (gc->irq.irq_unmask) | |
1445 | gc->irq.irq_unmask(d); | |
1446 | } | |
1447 | ||
461c1a7d | 1448 | static void gpiochip_irq_enable(struct irq_data *d) |
14250520 | 1449 | { |
a0b66a73 | 1450 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
e0d89728 | 1451 | |
a0b66a73 | 1452 | gpiochip_enable_irq(gc, d->hwirq); |
a8173820 | 1453 | gc->irq.irq_enable(d); |
461c1a7d HV |
1454 | } |
1455 | ||
1456 | static void gpiochip_irq_disable(struct irq_data *d) | |
1457 | { | |
a0b66a73 | 1458 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
461c1a7d | 1459 | |
a8173820 | 1460 | gc->irq.irq_disable(d); |
a0b66a73 | 1461 | gpiochip_disable_irq(gc, d->hwirq); |
461c1a7d HV |
1462 | } |
1463 | ||
a0b66a73 | 1464 | static void gpiochip_set_irq_hooks(struct gpio_chip *gc) |
ca620f2d | 1465 | { |
a0b66a73 | 1466 | struct irq_chip *irqchip = gc->irq.chip; |
ca620f2d HV |
1467 | |
1468 | if (!irqchip->irq_request_resources && | |
1469 | !irqchip->irq_release_resources) { | |
1470 | irqchip->irq_request_resources = gpiochip_irq_reqres; | |
1471 | irqchip->irq_release_resources = gpiochip_irq_relres; | |
1472 | } | |
a0b66a73 | 1473 | if (WARN_ON(gc->irq.irq_enable)) |
461c1a7d | 1474 | return; |
171948ea | 1475 | /* Check if the irqchip already has this hook... */ |
9d552219 NS |
1476 | if (irqchip->irq_enable == gpiochip_irq_enable || |
1477 | irqchip->irq_mask == gpiochip_irq_mask) { | |
171948ea HV |
1478 | /* |
1479 | * ...and if so, give a gentle warning that this is bad | |
1480 | * practice. | |
1481 | */ | |
a0b66a73 | 1482 | chip_info(gc, |
171948ea HV |
1483 | "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n"); |
1484 | return; | |
1485 | } | |
a8173820 MS |
1486 | |
1487 | if (irqchip->irq_disable) { | |
1488 | gc->irq.irq_disable = irqchip->irq_disable; | |
1489 | irqchip->irq_disable = gpiochip_irq_disable; | |
1490 | } else { | |
1491 | gc->irq.irq_mask = irqchip->irq_mask; | |
1492 | irqchip->irq_mask = gpiochip_irq_mask; | |
1493 | } | |
1494 | ||
1495 | if (irqchip->irq_enable) { | |
1496 | gc->irq.irq_enable = irqchip->irq_enable; | |
1497 | irqchip->irq_enable = gpiochip_irq_enable; | |
1498 | } else { | |
1499 | gc->irq.irq_unmask = irqchip->irq_unmask; | |
1500 | irqchip->irq_unmask = gpiochip_irq_unmask; | |
1501 | } | |
14250520 LW |
1502 | } |
1503 | ||
e0d89728 TR |
1504 | /** |
1505 | * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip | |
a0b66a73 | 1506 | * @gc: the GPIO chip to add the IRQ chip to |
39c3fd58 AL |
1507 | * @lock_key: lockdep class for IRQ lock |
1508 | * @request_key: lockdep class for IRQ request | |
e0d89728 | 1509 | */ |
a0b66a73 | 1510 | static int gpiochip_add_irqchip(struct gpio_chip *gc, |
39c3fd58 AL |
1511 | struct lock_class_key *lock_key, |
1512 | struct lock_class_key *request_key) | |
e0d89728 | 1513 | { |
5c63a9db | 1514 | struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev); |
a0b66a73 | 1515 | struct irq_chip *irqchip = gc->irq.chip; |
e0d89728 TR |
1516 | unsigned int type; |
1517 | unsigned int i; | |
1518 | ||
1519 | if (!irqchip) | |
1520 | return 0; | |
1521 | ||
a0b66a73 LW |
1522 | if (gc->irq.parent_handler && gc->can_sleep) { |
1523 | chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n"); | |
e0d89728 TR |
1524 | return -EINVAL; |
1525 | } | |
1526 | ||
a0b66a73 | 1527 | type = gc->irq.default_type; |
e0d89728 TR |
1528 | |
1529 | /* | |
1530 | * Specifying a default trigger is a terrible idea if DT or ACPI is | |
1531 | * used to configure the interrupts, as you may end up with | |
1532 | * conflicting triggers. Tell the user, and reset to NONE. | |
1533 | */ | |
5c63a9db AS |
1534 | if (WARN(fwnode && type != IRQ_TYPE_NONE, |
1535 | "%pfw: Ignoring %u default trigger\n", fwnode, type)) | |
e0d89728 TR |
1536 | type = IRQ_TYPE_NONE; |
1537 | ||
ef382374 NS |
1538 | if (gc->to_irq) |
1539 | chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__); | |
1540 | ||
a0b66a73 LW |
1541 | gc->to_irq = gpiochip_to_irq; |
1542 | gc->irq.default_type = type; | |
1543 | gc->irq.lock_key = lock_key; | |
1544 | gc->irq.request_key = request_key; | |
e0d89728 | 1545 | |
fdd61a01 | 1546 | /* If a parent irqdomain is provided, let's build a hierarchy */ |
a0b66a73 LW |
1547 | if (gpiochip_hierarchy_is_hierarchical(gc)) { |
1548 | int ret = gpiochip_hierarchy_add_domain(gc); | |
fdd61a01 LW |
1549 | if (ret) |
1550 | return ret; | |
1551 | } else { | |
1552 | /* Some drivers provide custom irqdomain ops */ | |
5c63a9db | 1553 | gc->irq.domain = irq_domain_create_simple(fwnode, |
a0b66a73 LW |
1554 | gc->ngpio, |
1555 | gc->irq.first, | |
266315fb AS |
1556 | gc->irq.domain_ops ?: &gpiochip_domain_ops, |
1557 | gc); | |
a0b66a73 | 1558 | if (!gc->irq.domain) |
fdd61a01 LW |
1559 | return -EINVAL; |
1560 | } | |
e0d89728 | 1561 | |
a0b66a73 | 1562 | if (gc->irq.parent_handler) { |
a0b66a73 | 1563 | for (i = 0; i < gc->irq.num_parents; i++) { |
cfe6807d MZ |
1564 | void *data; |
1565 | ||
1566 | if (gc->irq.per_parent_data) | |
1567 | data = gc->irq.parent_handler_data_array[i]; | |
1568 | else | |
1569 | data = gc->irq.parent_handler_data ?: gc; | |
1570 | ||
e0d89728 TR |
1571 | /* |
1572 | * The parent IRQ chip is already using the chip_data | |
1573 | * for this IRQ chip, so our callbacks simply use the | |
1574 | * handler_data. | |
1575 | */ | |
a0b66a73 LW |
1576 | irq_set_chained_handler_and_data(gc->irq.parents[i], |
1577 | gc->irq.parent_handler, | |
e0d89728 TR |
1578 | data); |
1579 | } | |
e0d89728 TR |
1580 | } |
1581 | ||
a0b66a73 | 1582 | gpiochip_set_irq_hooks(gc); |
ca620f2d | 1583 | |
a0b66a73 | 1584 | acpi_gpiochip_request_interrupts(gc); |
e0d89728 TR |
1585 | |
1586 | return 0; | |
1587 | } | |
1588 | ||
14250520 LW |
1589 | /** |
1590 | * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip | |
a0b66a73 | 1591 | * @gc: the gpiochip to remove the irqchip from |
14250520 LW |
1592 | * |
1593 | * This is called only from gpiochip_remove() | |
1594 | */ | |
a0b66a73 | 1595 | static void gpiochip_irqchip_remove(struct gpio_chip *gc) |
14250520 | 1596 | { |
a0b66a73 | 1597 | struct irq_chip *irqchip = gc->irq.chip; |
39e5f096 | 1598 | unsigned int offset; |
c3626fde | 1599 | |
a0b66a73 | 1600 | acpi_gpiochip_free_interrupts(gc); |
afa82fab | 1601 | |
a0b66a73 LW |
1602 | if (irqchip && gc->irq.parent_handler) { |
1603 | struct gpio_irq_chip *irq = &gc->irq; | |
39e5f096 TR |
1604 | unsigned int i; |
1605 | ||
1606 | for (i = 0; i < irq->num_parents; i++) | |
1607 | irq_set_chained_handler_and_data(irq->parents[i], | |
1608 | NULL, NULL); | |
25e4fe92 DES |
1609 | } |
1610 | ||
c3626fde | 1611 | /* Remove all IRQ mappings and delete the domain */ |
a0b66a73 | 1612 | if (gc->irq.domain) { |
39e5f096 TR |
1613 | unsigned int irq; |
1614 | ||
a0b66a73 LW |
1615 | for (offset = 0; offset < gc->ngpio; offset++) { |
1616 | if (!gpiochip_irqchip_irq_valid(gc, offset)) | |
79b804cb | 1617 | continue; |
f0fbe7bc | 1618 | |
a0b66a73 | 1619 | irq = irq_find_mapping(gc->irq.domain, offset); |
f0fbe7bc | 1620 | irq_dispose_mapping(irq); |
79b804cb | 1621 | } |
f0fbe7bc | 1622 | |
a0b66a73 | 1623 | irq_domain_remove(gc->irq.domain); |
c3626fde | 1624 | } |
14250520 | 1625 | |
461c1a7d HV |
1626 | if (irqchip) { |
1627 | if (irqchip->irq_request_resources == gpiochip_irq_reqres) { | |
1628 | irqchip->irq_request_resources = NULL; | |
1629 | irqchip->irq_release_resources = NULL; | |
1630 | } | |
1631 | if (irqchip->irq_enable == gpiochip_irq_enable) { | |
a0b66a73 LW |
1632 | irqchip->irq_enable = gc->irq.irq_enable; |
1633 | irqchip->irq_disable = gc->irq.irq_disable; | |
461c1a7d | 1634 | } |
14250520 | 1635 | } |
a0b66a73 LW |
1636 | gc->irq.irq_enable = NULL; |
1637 | gc->irq.irq_disable = NULL; | |
1638 | gc->irq.chip = NULL; | |
79b804cb | 1639 | |
a0b66a73 | 1640 | gpiochip_irqchip_free_valid_mask(gc); |
14250520 LW |
1641 | } |
1642 | ||
6a45b0e2 MW |
1643 | /** |
1644 | * gpiochip_irqchip_add_domain() - adds an irqdomain to a gpiochip | |
1645 | * @gc: the gpiochip to add the irqchip to | |
1646 | * @domain: the irqdomain to add to the gpiochip | |
1647 | * | |
1648 | * This function adds an IRQ domain to the gpiochip. | |
1649 | */ | |
1650 | int gpiochip_irqchip_add_domain(struct gpio_chip *gc, | |
1651 | struct irq_domain *domain) | |
1652 | { | |
1653 | if (!domain) | |
1654 | return -EINVAL; | |
1655 | ||
1656 | gc->to_irq = gpiochip_to_irq; | |
1657 | gc->irq.domain = domain; | |
1658 | ||
1659 | return 0; | |
1660 | } | |
1661 | EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain); | |
1662 | ||
14250520 LW |
1663 | #else /* CONFIG_GPIOLIB_IRQCHIP */ |
1664 | ||
a0b66a73 | 1665 | static inline int gpiochip_add_irqchip(struct gpio_chip *gc, |
39c3fd58 AL |
1666 | struct lock_class_key *lock_key, |
1667 | struct lock_class_key *request_key) | |
e0d89728 TR |
1668 | { |
1669 | return 0; | |
1670 | } | |
a0b66a73 | 1671 | static void gpiochip_irqchip_remove(struct gpio_chip *gc) {} |
9411e3aa | 1672 | |
a0b66a73 | 1673 | static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc) |
9411e3aa AS |
1674 | { |
1675 | return 0; | |
1676 | } | |
1677 | ||
a0b66a73 | 1678 | static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc) |
79b804cb MW |
1679 | { |
1680 | return 0; | |
1681 | } | |
a0b66a73 | 1682 | static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc) |
79b804cb | 1683 | { } |
14250520 LW |
1684 | |
1685 | #endif /* CONFIG_GPIOLIB_IRQCHIP */ | |
1686 | ||
c771c2f4 JG |
1687 | /** |
1688 | * gpiochip_generic_request() - request the gpio function for a pin | |
a0b66a73 | 1689 | * @gc: the gpiochip owning the GPIO |
c771c2f4 JG |
1690 | * @offset: the offset of the GPIO to request for GPIO function |
1691 | */ | |
13daf489 | 1692 | int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset) |
c771c2f4 | 1693 | { |
89ad556b | 1694 | #ifdef CONFIG_PINCTRL |
a0b66a73 | 1695 | if (list_empty(&gc->gpiodev->pin_ranges)) |
89ad556b TR |
1696 | return 0; |
1697 | #endif | |
2ab73c6d | 1698 | |
a0b66a73 | 1699 | return pinctrl_gpio_request(gc->gpiodev->base + offset); |
c771c2f4 JG |
1700 | } |
1701 | EXPORT_SYMBOL_GPL(gpiochip_generic_request); | |
1702 | ||
1703 | /** | |
1704 | * gpiochip_generic_free() - free the gpio function from a pin | |
a0b66a73 | 1705 | * @gc: the gpiochip to request the gpio function for |
c771c2f4 JG |
1706 | * @offset: the offset of the GPIO to free from GPIO function |
1707 | */ | |
13daf489 | 1708 | void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset) |
c771c2f4 | 1709 | { |
6dbbf846 EC |
1710 | #ifdef CONFIG_PINCTRL |
1711 | if (list_empty(&gc->gpiodev->pin_ranges)) | |
1712 | return; | |
1713 | #endif | |
1714 | ||
a0b66a73 | 1715 | pinctrl_gpio_free(gc->gpiodev->base + offset); |
c771c2f4 JG |
1716 | } |
1717 | EXPORT_SYMBOL_GPL(gpiochip_generic_free); | |
1718 | ||
2956b5d9 MW |
1719 | /** |
1720 | * gpiochip_generic_config() - apply configuration for a pin | |
a0b66a73 | 1721 | * @gc: the gpiochip owning the GPIO |
2956b5d9 MW |
1722 | * @offset: the offset of the GPIO to apply the configuration |
1723 | * @config: the configuration to be applied | |
1724 | */ | |
13daf489 | 1725 | int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset, |
2956b5d9 MW |
1726 | unsigned long config) |
1727 | { | |
a0b66a73 | 1728 | return pinctrl_gpio_set_config(gc->gpiodev->base + offset, config); |
2956b5d9 MW |
1729 | } |
1730 | EXPORT_SYMBOL_GPL(gpiochip_generic_config); | |
1731 | ||
f23f1516 | 1732 | #ifdef CONFIG_PINCTRL |
165adc9c | 1733 | |
586a87e6 CR |
1734 | /** |
1735 | * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping | |
a0b66a73 | 1736 | * @gc: the gpiochip to add the range for |
d32651f6 | 1737 | * @pctldev: the pin controller to map to |
586a87e6 CR |
1738 | * @gpio_offset: the start offset in the current gpio_chip number space |
1739 | * @pin_group: name of the pin group inside the pin controller | |
973c1714 CL |
1740 | * |
1741 | * Calling this function directly from a DeviceTree-supported | |
1742 | * pinctrl driver is DEPRECATED. Please see Section 2.1 of | |
1743 | * Documentation/devicetree/bindings/gpio/gpio.txt on how to | |
1744 | * bind pinctrl and gpio drivers via the "gpio-ranges" property. | |
586a87e6 | 1745 | */ |
a0b66a73 | 1746 | int gpiochip_add_pingroup_range(struct gpio_chip *gc, |
586a87e6 CR |
1747 | struct pinctrl_dev *pctldev, |
1748 | unsigned int gpio_offset, const char *pin_group) | |
1749 | { | |
1750 | struct gpio_pin_range *pin_range; | |
a0b66a73 | 1751 | struct gpio_device *gdev = gc->gpiodev; |
586a87e6 CR |
1752 | int ret; |
1753 | ||
1754 | pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL); | |
1755 | if (!pin_range) { | |
a0b66a73 | 1756 | chip_err(gc, "failed to allocate pin ranges\n"); |
586a87e6 CR |
1757 | return -ENOMEM; |
1758 | } | |
1759 | ||
1760 | /* Use local offset as range ID */ | |
1761 | pin_range->range.id = gpio_offset; | |
a0b66a73 LW |
1762 | pin_range->range.gc = gc; |
1763 | pin_range->range.name = gc->label; | |
fdeb8e15 | 1764 | pin_range->range.base = gdev->base + gpio_offset; |
586a87e6 CR |
1765 | pin_range->pctldev = pctldev; |
1766 | ||
1767 | ret = pinctrl_get_group_pins(pctldev, pin_group, | |
1768 | &pin_range->range.pins, | |
1769 | &pin_range->range.npins); | |
61c6375d MN |
1770 | if (ret < 0) { |
1771 | kfree(pin_range); | |
586a87e6 | 1772 | return ret; |
61c6375d | 1773 | } |
586a87e6 CR |
1774 | |
1775 | pinctrl_add_gpio_range(pctldev, &pin_range->range); | |
1776 | ||
a0b66a73 | 1777 | chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n", |
1a2a99c6 | 1778 | gpio_offset, gpio_offset + pin_range->range.npins - 1, |
586a87e6 CR |
1779 | pinctrl_dev_get_devname(pctldev), pin_group); |
1780 | ||
20ec3e39 | 1781 | list_add_tail(&pin_range->node, &gdev->pin_ranges); |
586a87e6 CR |
1782 | |
1783 | return 0; | |
1784 | } | |
1785 | EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range); | |
1786 | ||
3f0f8670 LW |
1787 | /** |
1788 | * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping | |
a0b66a73 | 1789 | * @gc: the gpiochip to add the range for |
950d55f5 | 1790 | * @pinctl_name: the dev_name() of the pin controller to map to |
316511c0 LW |
1791 | * @gpio_offset: the start offset in the current gpio_chip number space |
1792 | * @pin_offset: the start offset in the pin controller number space | |
3f0f8670 LW |
1793 | * @npins: the number of pins from the offset of each pin space (GPIO and |
1794 | * pin controller) to accumulate in this range | |
950d55f5 TR |
1795 | * |
1796 | * Returns: | |
1797 | * 0 on success, or a negative error-code on failure. | |
973c1714 CL |
1798 | * |
1799 | * Calling this function directly from a DeviceTree-supported | |
1800 | * pinctrl driver is DEPRECATED. Please see Section 2.1 of | |
1801 | * Documentation/devicetree/bindings/gpio/gpio.txt on how to | |
1802 | * bind pinctrl and gpio drivers via the "gpio-ranges" property. | |
3f0f8670 | 1803 | */ |
a0b66a73 | 1804 | int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name, |
316511c0 | 1805 | unsigned int gpio_offset, unsigned int pin_offset, |
3f0f8670 | 1806 | unsigned int npins) |
f23f1516 SH |
1807 | { |
1808 | struct gpio_pin_range *pin_range; | |
a0b66a73 | 1809 | struct gpio_device *gdev = gc->gpiodev; |
b4d4b1f0 | 1810 | int ret; |
f23f1516 | 1811 | |
3f0f8670 | 1812 | pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL); |
f23f1516 | 1813 | if (!pin_range) { |
a0b66a73 | 1814 | chip_err(gc, "failed to allocate pin ranges\n"); |
1e63d7b9 | 1815 | return -ENOMEM; |
f23f1516 SH |
1816 | } |
1817 | ||
3f0f8670 | 1818 | /* Use local offset as range ID */ |
316511c0 | 1819 | pin_range->range.id = gpio_offset; |
a0b66a73 LW |
1820 | pin_range->range.gc = gc; |
1821 | pin_range->range.name = gc->label; | |
fdeb8e15 | 1822 | pin_range->range.base = gdev->base + gpio_offset; |
316511c0 | 1823 | pin_range->range.pin_base = pin_offset; |
f23f1516 | 1824 | pin_range->range.npins = npins; |
192c369c | 1825 | pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name, |
f23f1516 | 1826 | &pin_range->range); |
8f23ca1a | 1827 | if (IS_ERR(pin_range->pctldev)) { |
b4d4b1f0 | 1828 | ret = PTR_ERR(pin_range->pctldev); |
a0b66a73 | 1829 | chip_err(gc, "could not create pin range\n"); |
3f0f8670 | 1830 | kfree(pin_range); |
b4d4b1f0 | 1831 | return ret; |
3f0f8670 | 1832 | } |
a0b66a73 | 1833 | chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n", |
1a2a99c6 | 1834 | gpio_offset, gpio_offset + npins - 1, |
316511c0 LW |
1835 | pinctl_name, |
1836 | pin_offset, pin_offset + npins - 1); | |
f23f1516 | 1837 | |
20ec3e39 | 1838 | list_add_tail(&pin_range->node, &gdev->pin_ranges); |
1e63d7b9 LW |
1839 | |
1840 | return 0; | |
f23f1516 | 1841 | } |
165adc9c | 1842 | EXPORT_SYMBOL_GPL(gpiochip_add_pin_range); |
f23f1516 | 1843 | |
3f0f8670 LW |
1844 | /** |
1845 | * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings | |
a0b66a73 | 1846 | * @gc: the chip to remove all the mappings for |
3f0f8670 | 1847 | */ |
a0b66a73 | 1848 | void gpiochip_remove_pin_ranges(struct gpio_chip *gc) |
f23f1516 SH |
1849 | { |
1850 | struct gpio_pin_range *pin_range, *tmp; | |
a0b66a73 | 1851 | struct gpio_device *gdev = gc->gpiodev; |
f23f1516 | 1852 | |
20ec3e39 | 1853 | list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) { |
f23f1516 SH |
1854 | list_del(&pin_range->node); |
1855 | pinctrl_remove_gpio_range(pin_range->pctldev, | |
1856 | &pin_range->range); | |
3f0f8670 | 1857 | kfree(pin_range); |
f23f1516 SH |
1858 | } |
1859 | } | |
165adc9c LW |
1860 | EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges); |
1861 | ||
1862 | #endif /* CONFIG_PINCTRL */ | |
f23f1516 | 1863 | |
d2876d08 DB |
1864 | /* These "optional" allocation calls help prevent drivers from stomping |
1865 | * on each other, and help provide better diagnostics in debugfs. | |
1866 | * They're called even less than the "set direction" calls. | |
1867 | */ | |
fac9d885 | 1868 | static int gpiod_request_commit(struct gpio_desc *desc, const char *label) |
d2876d08 | 1869 | { |
a0b66a73 | 1870 | struct gpio_chip *gc = desc->gdev->chip; |
d377f56f | 1871 | int ret; |
d2876d08 | 1872 | unsigned long flags; |
3789f5ac | 1873 | unsigned offset; |
d2876d08 | 1874 | |
18534df4 MS |
1875 | if (label) { |
1876 | label = kstrdup_const(label, GFP_KERNEL); | |
1877 | if (!label) | |
1878 | return -ENOMEM; | |
1879 | } | |
1880 | ||
bcabdef1 AC |
1881 | spin_lock_irqsave(&gpio_lock, flags); |
1882 | ||
d2876d08 | 1883 | /* NOTE: gpio_request() can be called in early boot, |
35e8bb51 | 1884 | * before IRQs are enabled, for non-sleeping (SOC) GPIOs. |
d2876d08 DB |
1885 | */ |
1886 | ||
1887 | if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) { | |
1888 | desc_set_label(desc, label ? : "?"); | |
438d8908 | 1889 | } else { |
d377f56f | 1890 | ret = -EBUSY; |
95d9f84f | 1891 | goto out_free_unlock; |
35e8bb51 DB |
1892 | } |
1893 | ||
a0b66a73 LW |
1894 | if (gc->request) { |
1895 | /* gc->request may sleep */ | |
35e8bb51 | 1896 | spin_unlock_irqrestore(&gpio_lock, flags); |
3789f5ac | 1897 | offset = gpio_chip_hwgpio(desc); |
a0b66a73 LW |
1898 | if (gpiochip_line_is_valid(gc, offset)) |
1899 | ret = gc->request(gc, offset); | |
3789f5ac | 1900 | else |
d377f56f | 1901 | ret = -EINVAL; |
35e8bb51 DB |
1902 | spin_lock_irqsave(&gpio_lock, flags); |
1903 | ||
8bbff39c | 1904 | if (ret) { |
35e8bb51 | 1905 | desc_set_label(desc, NULL); |
35e8bb51 | 1906 | clear_bit(FLAG_REQUESTED, &desc->flags); |
95d9f84f | 1907 | goto out_free_unlock; |
35e8bb51 | 1908 | } |
438d8908 | 1909 | } |
a0b66a73 LW |
1910 | if (gc->get_direction) { |
1911 | /* gc->get_direction may sleep */ | |
80b0a602 | 1912 | spin_unlock_irqrestore(&gpio_lock, flags); |
372e722e | 1913 | gpiod_get_direction(desc); |
80b0a602 MN |
1914 | spin_lock_irqsave(&gpio_lock, flags); |
1915 | } | |
77c2d792 | 1916 | spin_unlock_irqrestore(&gpio_lock, flags); |
95d9f84f AS |
1917 | return 0; |
1918 | ||
1919 | out_free_unlock: | |
1920 | spin_unlock_irqrestore(&gpio_lock, flags); | |
1921 | kfree_const(label); | |
d377f56f | 1922 | return ret; |
77c2d792 MW |
1923 | } |
1924 | ||
fdeb8e15 LW |
1925 | /* |
1926 | * This descriptor validation needs to be inserted verbatim into each | |
1927 | * function taking a descriptor, so we need to use a preprocessor | |
54d77198 LW |
1928 | * macro to avoid endless duplication. If the desc is NULL it is an |
1929 | * optional GPIO and calls should just bail out. | |
fdeb8e15 | 1930 | */ |
a746a232 RV |
1931 | static int validate_desc(const struct gpio_desc *desc, const char *func) |
1932 | { | |
1933 | if (!desc) | |
1934 | return 0; | |
1935 | if (IS_ERR(desc)) { | |
1936 | pr_warn("%s: invalid GPIO (errorpointer)\n", func); | |
1937 | return PTR_ERR(desc); | |
1938 | } | |
1939 | if (!desc->gdev) { | |
1940 | pr_warn("%s: invalid GPIO (no device)\n", func); | |
1941 | return -EINVAL; | |
1942 | } | |
1943 | if (!desc->gdev->chip) { | |
1944 | dev_warn(&desc->gdev->dev, | |
1945 | "%s: backing chip is gone\n", func); | |
1946 | return 0; | |
1947 | } | |
1948 | return 1; | |
1949 | } | |
1950 | ||
fdeb8e15 | 1951 | #define VALIDATE_DESC(desc) do { \ |
a746a232 RV |
1952 | int __valid = validate_desc(desc, __func__); \ |
1953 | if (__valid <= 0) \ | |
1954 | return __valid; \ | |
1955 | } while (0) | |
fdeb8e15 LW |
1956 | |
1957 | #define VALIDATE_DESC_VOID(desc) do { \ | |
a746a232 RV |
1958 | int __valid = validate_desc(desc, __func__); \ |
1959 | if (__valid <= 0) \ | |
fdeb8e15 | 1960 | return; \ |
a746a232 | 1961 | } while (0) |
fdeb8e15 | 1962 | |
0eb4c6c2 | 1963 | int gpiod_request(struct gpio_desc *desc, const char *label) |
77c2d792 | 1964 | { |
d377f56f | 1965 | int ret = -EPROBE_DEFER; |
fdeb8e15 | 1966 | struct gpio_device *gdev; |
77c2d792 | 1967 | |
fdeb8e15 LW |
1968 | VALIDATE_DESC(desc); |
1969 | gdev = desc->gdev; | |
77c2d792 | 1970 | |
fdeb8e15 | 1971 | if (try_module_get(gdev->owner)) { |
d377f56f | 1972 | ret = gpiod_request_commit(desc, label); |
8bbff39c | 1973 | if (ret) |
fdeb8e15 | 1974 | module_put(gdev->owner); |
33a68e86 LW |
1975 | else |
1976 | get_device(&gdev->dev); | |
77c2d792 MW |
1977 | } |
1978 | ||
d377f56f LW |
1979 | if (ret) |
1980 | gpiod_dbg(desc, "%s: status %d\n", __func__, ret); | |
77c2d792 | 1981 | |
d377f56f | 1982 | return ret; |
d2876d08 | 1983 | } |
372e722e | 1984 | |
fac9d885 | 1985 | static bool gpiod_free_commit(struct gpio_desc *desc) |
d2876d08 | 1986 | { |
77c2d792 | 1987 | bool ret = false; |
d2876d08 | 1988 | unsigned long flags; |
a0b66a73 | 1989 | struct gpio_chip *gc; |
d2876d08 | 1990 | |
3d599d1c UKK |
1991 | might_sleep(); |
1992 | ||
372e722e | 1993 | gpiod_unexport(desc); |
d8f388d8 | 1994 | |
d2876d08 DB |
1995 | spin_lock_irqsave(&gpio_lock, flags); |
1996 | ||
a0b66a73 LW |
1997 | gc = desc->gdev->chip; |
1998 | if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) { | |
1999 | if (gc->free) { | |
35e8bb51 | 2000 | spin_unlock_irqrestore(&gpio_lock, flags); |
a0b66a73 LW |
2001 | might_sleep_if(gc->can_sleep); |
2002 | gc->free(gc, gpio_chip_hwgpio(desc)); | |
35e8bb51 DB |
2003 | spin_lock_irqsave(&gpio_lock, flags); |
2004 | } | |
18534df4 | 2005 | kfree_const(desc->label); |
d2876d08 | 2006 | desc_set_label(desc, NULL); |
07697461 | 2007 | clear_bit(FLAG_ACTIVE_LOW, &desc->flags); |
35e8bb51 | 2008 | clear_bit(FLAG_REQUESTED, &desc->flags); |
aca5ce14 | 2009 | clear_bit(FLAG_OPEN_DRAIN, &desc->flags); |
25553ff0 | 2010 | clear_bit(FLAG_OPEN_SOURCE, &desc->flags); |
9225d516 DF |
2011 | clear_bit(FLAG_PULL_UP, &desc->flags); |
2012 | clear_bit(FLAG_PULL_DOWN, &desc->flags); | |
2148ad77 | 2013 | clear_bit(FLAG_BIAS_DISABLE, &desc->flags); |
73e03419 KG |
2014 | clear_bit(FLAG_EDGE_RISING, &desc->flags); |
2015 | clear_bit(FLAG_EDGE_FALLING, &desc->flags); | |
f625d460 | 2016 | clear_bit(FLAG_IS_HOGGED, &desc->flags); |
63636d95 GU |
2017 | #ifdef CONFIG_OF_DYNAMIC |
2018 | desc->hog = NULL; | |
65cff704 KG |
2019 | #endif |
2020 | #ifdef CONFIG_GPIO_CDEV | |
2021 | WRITE_ONCE(desc->debounce_period_us, 0); | |
63636d95 | 2022 | #endif |
77c2d792 MW |
2023 | ret = true; |
2024 | } | |
d2876d08 DB |
2025 | |
2026 | spin_unlock_irqrestore(&gpio_lock, flags); | |
6accc376 KG |
2027 | blocking_notifier_call_chain(&desc->gdev->notifier, |
2028 | GPIOLINE_CHANGED_RELEASED, desc); | |
51c1064e | 2029 | |
77c2d792 MW |
2030 | return ret; |
2031 | } | |
2032 | ||
0eb4c6c2 | 2033 | void gpiod_free(struct gpio_desc *desc) |
77c2d792 | 2034 | { |
fac9d885 | 2035 | if (desc && desc->gdev && gpiod_free_commit(desc)) { |
fdeb8e15 | 2036 | module_put(desc->gdev->owner); |
33a68e86 LW |
2037 | put_device(&desc->gdev->dev); |
2038 | } else { | |
77c2d792 | 2039 | WARN_ON(extra_checks); |
33a68e86 | 2040 | } |
d2876d08 | 2041 | } |
372e722e | 2042 | |
d2876d08 DB |
2043 | /** |
2044 | * gpiochip_is_requested - return string iff signal was requested | |
a0b66a73 | 2045 | * @gc: controller managing the signal |
d2876d08 DB |
2046 | * @offset: of signal within controller's 0..(ngpio - 1) range |
2047 | * | |
2048 | * Returns NULL if the GPIO is not currently requested, else a string. | |
9c8318ff AC |
2049 | * The string returned is the label passed to gpio_request(); if none has been |
2050 | * passed it is a meaningless, non-NULL constant. | |
d2876d08 DB |
2051 | * |
2052 | * This function is for use by GPIO controller drivers. The label can | |
2053 | * help with diagnostics, and knowing that the signal is used as a GPIO | |
2054 | * can help avoid accidentally multiplexing it to another controller. | |
2055 | */ | |
13daf489 | 2056 | const char *gpiochip_is_requested(struct gpio_chip *gc, unsigned int offset) |
d2876d08 | 2057 | { |
6c0b4e6c | 2058 | struct gpio_desc *desc; |
6c0b4e6c | 2059 | |
a0b66a73 | 2060 | desc = gpiochip_get_desc(gc, offset); |
1739a2d8 BG |
2061 | if (IS_ERR(desc)) |
2062 | return NULL; | |
6c0b4e6c | 2063 | |
372e722e | 2064 | if (test_bit(FLAG_REQUESTED, &desc->flags) == 0) |
d2876d08 | 2065 | return NULL; |
372e722e | 2066 | return desc->label; |
d2876d08 DB |
2067 | } |
2068 | EXPORT_SYMBOL_GPL(gpiochip_is_requested); | |
2069 | ||
77c2d792 MW |
2070 | /** |
2071 | * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor | |
a0b66a73 | 2072 | * @gc: GPIO chip |
950d55f5 | 2073 | * @hwnum: hardware number of the GPIO for which to request the descriptor |
77c2d792 | 2074 | * @label: label for the GPIO |
5923ea6c LW |
2075 | * @lflags: lookup flags for this GPIO or 0 if default, this can be used to |
2076 | * specify things like line inversion semantics with the machine flags | |
2077 | * such as GPIO_OUT_LOW | |
2078 | * @dflags: descriptor request flags for this GPIO or 0 if default, this | |
2079 | * can be used to specify consumer semantics such as open drain | |
77c2d792 MW |
2080 | * |
2081 | * Function allows GPIO chip drivers to request and use their own GPIO | |
2082 | * descriptors via gpiolib API. Difference to gpiod_request() is that this | |
2083 | * function will not increase reference count of the GPIO chip module. This | |
2084 | * allows the GPIO chip module to be unloaded as needed (we assume that the | |
2085 | * GPIO chip driver handles freeing the GPIOs it has requested). | |
950d55f5 TR |
2086 | * |
2087 | * Returns: | |
2088 | * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error | |
2089 | * code on failure. | |
77c2d792 | 2090 | */ |
a0b66a73 | 2091 | struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc, |
06863620 | 2092 | unsigned int hwnum, |
21abf103 | 2093 | const char *label, |
5923ea6c LW |
2094 | enum gpio_lookup_flags lflags, |
2095 | enum gpiod_flags dflags) | |
77c2d792 | 2096 | { |
a0b66a73 | 2097 | struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum); |
d377f56f | 2098 | int ret; |
77c2d792 | 2099 | |
abdc08a3 | 2100 | if (IS_ERR(desc)) { |
a0b66a73 | 2101 | chip_err(gc, "failed to get GPIO descriptor\n"); |
abdc08a3 AC |
2102 | return desc; |
2103 | } | |
2104 | ||
d377f56f LW |
2105 | ret = gpiod_request_commit(desc, label); |
2106 | if (ret < 0) | |
2107 | return ERR_PTR(ret); | |
77c2d792 | 2108 | |
d377f56f LW |
2109 | ret = gpiod_configure_flags(desc, label, lflags, dflags); |
2110 | if (ret) { | |
a0b66a73 | 2111 | chip_err(gc, "setup of own GPIO %s failed\n", label); |
21abf103 | 2112 | gpiod_free_commit(desc); |
d377f56f | 2113 | return ERR_PTR(ret); |
21abf103 LW |
2114 | } |
2115 | ||
abdc08a3 | 2116 | return desc; |
77c2d792 | 2117 | } |
f7d4ad98 | 2118 | EXPORT_SYMBOL_GPL(gpiochip_request_own_desc); |
77c2d792 MW |
2119 | |
2120 | /** | |
2121 | * gpiochip_free_own_desc - Free GPIO requested by the chip driver | |
2122 | * @desc: GPIO descriptor to free | |
2123 | * | |
2124 | * Function frees the given GPIO requested previously with | |
2125 | * gpiochip_request_own_desc(). | |
2126 | */ | |
2127 | void gpiochip_free_own_desc(struct gpio_desc *desc) | |
2128 | { | |
2129 | if (desc) | |
fac9d885 | 2130 | gpiod_free_commit(desc); |
77c2d792 | 2131 | } |
f7d4ad98 | 2132 | EXPORT_SYMBOL_GPL(gpiochip_free_own_desc); |
d2876d08 | 2133 | |
fdeb8e15 LW |
2134 | /* |
2135 | * Drivers MUST set GPIO direction before making get/set calls. In | |
d2876d08 DB |
2136 | * some cases this is done in early boot, before IRQs are enabled. |
2137 | * | |
2138 | * As a rule these aren't called more than once (except for drivers | |
2139 | * using the open-drain emulation idiom) so these are natural places | |
2140 | * to accumulate extra debugging checks. Note that we can't (yet) | |
2141 | * rely on gpio_request() having been called beforehand. | |
2142 | */ | |
2143 | ||
d99f8876 | 2144 | static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset, |
62adc6f3 | 2145 | unsigned long config) |
71479789 | 2146 | { |
d90f3685 BG |
2147 | if (!gc->set_config) |
2148 | return -ENOTSUPP; | |
542f3615 | 2149 | |
62adc6f3 | 2150 | return gc->set_config(gc, offset, config); |
71479789 TP |
2151 | } |
2152 | ||
0c4d8666 AS |
2153 | static int gpio_set_config_with_argument(struct gpio_desc *desc, |
2154 | enum pin_config_param mode, | |
2155 | u32 argument) | |
d99f8876 | 2156 | { |
a0b66a73 | 2157 | struct gpio_chip *gc = desc->gdev->chip; |
91b4ea5f | 2158 | unsigned long config; |
0c4d8666 AS |
2159 | |
2160 | config = pinconf_to_config_packed(mode, argument); | |
2161 | return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config); | |
2162 | } | |
2163 | ||
baca3b15 AS |
2164 | static int gpio_set_config_with_argument_optional(struct gpio_desc *desc, |
2165 | enum pin_config_param mode, | |
2166 | u32 argument) | |
2167 | { | |
2168 | struct device *dev = &desc->gdev->dev; | |
2169 | int gpio = gpio_chip_hwgpio(desc); | |
2170 | int ret; | |
2171 | ||
2172 | ret = gpio_set_config_with_argument(desc, mode, argument); | |
2173 | if (ret != -ENOTSUPP) | |
2174 | return ret; | |
d99f8876 BG |
2175 | |
2176 | switch (mode) { | |
baca3b15 AS |
2177 | case PIN_CONFIG_PERSIST_STATE: |
2178 | dev_dbg(dev, "Persistence not supported for GPIO %d\n", gpio); | |
d99f8876 | 2179 | break; |
d99f8876 | 2180 | default: |
baca3b15 | 2181 | break; |
d99f8876 BG |
2182 | } |
2183 | ||
baca3b15 AS |
2184 | return 0; |
2185 | } | |
2186 | ||
0c4d8666 AS |
2187 | static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode) |
2188 | { | |
6aa32ad7 | 2189 | return gpio_set_config_with_argument(desc, mode, 0); |
d99f8876 BG |
2190 | } |
2191 | ||
5f4bf171 | 2192 | static int gpio_set_bias(struct gpio_desc *desc) |
2148ad77 | 2193 | { |
9ef6293c | 2194 | enum pin_config_param bias; |
6aa32ad7 | 2195 | unsigned int arg; |
2148ad77 KG |
2196 | |
2197 | if (test_bit(FLAG_BIAS_DISABLE, &desc->flags)) | |
2198 | bias = PIN_CONFIG_BIAS_DISABLE; | |
2199 | else if (test_bit(FLAG_PULL_UP, &desc->flags)) | |
2200 | bias = PIN_CONFIG_BIAS_PULL_UP; | |
2201 | else if (test_bit(FLAG_PULL_DOWN, &desc->flags)) | |
2202 | bias = PIN_CONFIG_BIAS_PULL_DOWN; | |
9ef6293c AS |
2203 | else |
2204 | return 0; | |
2148ad77 | 2205 | |
6aa32ad7 AS |
2206 | switch (bias) { |
2207 | case PIN_CONFIG_BIAS_PULL_DOWN: | |
2208 | case PIN_CONFIG_BIAS_PULL_UP: | |
2209 | arg = 1; | |
2210 | break; | |
2211 | ||
2212 | default: | |
2213 | arg = 0; | |
2214 | break; | |
2148ad77 | 2215 | } |
6aa32ad7 | 2216 | |
baca3b15 | 2217 | return gpio_set_config_with_argument_optional(desc, bias, arg); |
2148ad77 KG |
2218 | } |
2219 | ||
f725edd8 AS |
2220 | int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce) |
2221 | { | |
2222 | return gpio_set_config_with_argument_optional(desc, | |
2223 | PIN_CONFIG_INPUT_DEBOUNCE, | |
2224 | debounce); | |
2148ad77 KG |
2225 | } |
2226 | ||
79a9becd AC |
2227 | /** |
2228 | * gpiod_direction_input - set the GPIO direction to input | |
2229 | * @desc: GPIO to set to input | |
2230 | * | |
2231 | * Set the direction of the passed GPIO to input, such as gpiod_get_value() can | |
2232 | * be called safely on it. | |
2233 | * | |
2234 | * Return 0 in case of success, else an error code. | |
2235 | */ | |
2236 | int gpiod_direction_input(struct gpio_desc *desc) | |
d2876d08 | 2237 | { |
a0b66a73 | 2238 | struct gpio_chip *gc; |
d377f56f | 2239 | int ret = 0; |
d2876d08 | 2240 | |
fdeb8e15 | 2241 | VALIDATE_DESC(desc); |
a0b66a73 | 2242 | gc = desc->gdev->chip; |
bcabdef1 | 2243 | |
e48d194d LW |
2244 | /* |
2245 | * It is legal to have no .get() and .direction_input() specified if | |
2246 | * the chip is output-only, but you can't specify .direction_input() | |
2247 | * and not support the .get() operation, that doesn't make sense. | |
2248 | */ | |
a0b66a73 | 2249 | if (!gc->get && gc->direction_input) { |
6424de5a | 2250 | gpiod_warn(desc, |
e48d194d LW |
2251 | "%s: missing get() but have direction_input()\n", |
2252 | __func__); | |
be1a4b13 LW |
2253 | return -EIO; |
2254 | } | |
2255 | ||
e48d194d LW |
2256 | /* |
2257 | * If we have a .direction_input() callback, things are simple, | |
2258 | * just call it. Else we are some input-only chip so try to check the | |
2259 | * direction (if .get_direction() is supported) else we silently | |
2260 | * assume we are in input mode after this. | |
2261 | */ | |
a0b66a73 LW |
2262 | if (gc->direction_input) { |
2263 | ret = gc->direction_input(gc, gpio_chip_hwgpio(desc)); | |
2264 | } else if (gc->get_direction && | |
2265 | (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) { | |
ae9847f4 | 2266 | gpiod_warn(desc, |
e48d194d LW |
2267 | "%s: missing direction_input() operation and line is output\n", |
2268 | __func__); | |
ae9847f4 RRD |
2269 | return -EIO; |
2270 | } | |
2148ad77 | 2271 | if (ret == 0) { |
d2876d08 | 2272 | clear_bit(FLAG_IS_OUT, &desc->flags); |
5f4bf171 | 2273 | ret = gpio_set_bias(desc); |
2148ad77 | 2274 | } |
d449991c | 2275 | |
d377f56f | 2276 | trace_gpio_direction(desc_to_gpio(desc), 1, ret); |
d82da797 | 2277 | |
d377f56f | 2278 | return ret; |
d2876d08 | 2279 | } |
79a9becd | 2280 | EXPORT_SYMBOL_GPL(gpiod_direction_input); |
372e722e | 2281 | |
fac9d885 | 2282 | static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value) |
d2876d08 | 2283 | { |
c663e5f5 | 2284 | struct gpio_chip *gc = desc->gdev->chip; |
ad17731d | 2285 | int val = !!value; |
ae9847f4 | 2286 | int ret = 0; |
d2876d08 | 2287 | |
e48d194d LW |
2288 | /* |
2289 | * It's OK not to specify .direction_output() if the gpiochip is | |
2290 | * output-only, but if there is then not even a .set() operation it | |
2291 | * is pretty tricky to drive the output line. | |
2292 | */ | |
ae9847f4 | 2293 | if (!gc->set && !gc->direction_output) { |
6424de5a | 2294 | gpiod_warn(desc, |
e48d194d LW |
2295 | "%s: missing set() and direction_output() operations\n", |
2296 | __func__); | |
be1a4b13 LW |
2297 | return -EIO; |
2298 | } | |
2299 | ||
ae9847f4 RRD |
2300 | if (gc->direction_output) { |
2301 | ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val); | |
2302 | } else { | |
e48d194d | 2303 | /* Check that we are in output mode if we can */ |
ae9847f4 RRD |
2304 | if (gc->get_direction && |
2305 | gc->get_direction(gc, gpio_chip_hwgpio(desc))) { | |
2306 | gpiod_warn(desc, | |
2307 | "%s: missing direction_output() operation\n", | |
2308 | __func__); | |
2309 | return -EIO; | |
2310 | } | |
e48d194d LW |
2311 | /* |
2312 | * If we can't actively set the direction, we are some | |
2313 | * output-only chip, so just drive the output as desired. | |
2314 | */ | |
ae9847f4 RRD |
2315 | gc->set(gc, gpio_chip_hwgpio(desc), val); |
2316 | } | |
2317 | ||
c663e5f5 | 2318 | if (!ret) |
d2876d08 | 2319 | set_bit(FLAG_IS_OUT, &desc->flags); |
ad17731d | 2320 | trace_gpio_value(desc_to_gpio(desc), 0, val); |
c663e5f5 LW |
2321 | trace_gpio_direction(desc_to_gpio(desc), 0, ret); |
2322 | return ret; | |
d2876d08 | 2323 | } |
ef70bbe1 PZ |
2324 | |
2325 | /** | |
2326 | * gpiod_direction_output_raw - set the GPIO direction to output | |
2327 | * @desc: GPIO to set to output | |
2328 | * @value: initial output value of the GPIO | |
2329 | * | |
2330 | * Set the direction of the passed GPIO to output, such as gpiod_set_value() can | |
2331 | * be called safely on it. The initial value of the output must be specified | |
2332 | * as raw value on the physical line without regard for the ACTIVE_LOW status. | |
2333 | * | |
2334 | * Return 0 in case of success, else an error code. | |
2335 | */ | |
2336 | int gpiod_direction_output_raw(struct gpio_desc *desc, int value) | |
2337 | { | |
fdeb8e15 | 2338 | VALIDATE_DESC(desc); |
fac9d885 | 2339 | return gpiod_direction_output_raw_commit(desc, value); |
ef70bbe1 PZ |
2340 | } |
2341 | EXPORT_SYMBOL_GPL(gpiod_direction_output_raw); | |
2342 | ||
2343 | /** | |
90df4fe0 | 2344 | * gpiod_direction_output - set the GPIO direction to output |
ef70bbe1 PZ |
2345 | * @desc: GPIO to set to output |
2346 | * @value: initial output value of the GPIO | |
2347 | * | |
2348 | * Set the direction of the passed GPIO to output, such as gpiod_set_value() can | |
2349 | * be called safely on it. The initial value of the output must be specified | |
2350 | * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into | |
2351 | * account. | |
2352 | * | |
2353 | * Return 0 in case of success, else an error code. | |
2354 | */ | |
2355 | int gpiod_direction_output(struct gpio_desc *desc, int value) | |
2356 | { | |
02e47980 LW |
2357 | int ret; |
2358 | ||
fdeb8e15 | 2359 | VALIDATE_DESC(desc); |
ef70bbe1 PZ |
2360 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
2361 | value = !value; | |
ad17731d LW |
2362 | else |
2363 | value = !!value; | |
02e47980 | 2364 | |
4e9439dd HV |
2365 | /* GPIOs used for enabled IRQs shall not be set as output */ |
2366 | if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) && | |
2367 | test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) { | |
02e47980 LW |
2368 | gpiod_err(desc, |
2369 | "%s: tried to set a GPIO tied to an IRQ as output\n", | |
2370 | __func__); | |
2371 | return -EIO; | |
2372 | } | |
2373 | ||
2374 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) { | |
2375 | /* First see if we can enable open drain in hardware */ | |
83522358 | 2376 | ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN); |
02e47980 LW |
2377 | if (!ret) |
2378 | goto set_output_value; | |
2379 | /* Emulate open drain by not actively driving the line high */ | |
e735244e BG |
2380 | if (value) { |
2381 | ret = gpiod_direction_input(desc); | |
2382 | goto set_output_flag; | |
2383 | } | |
02e47980 LW |
2384 | } |
2385 | else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) { | |
83522358 | 2386 | ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE); |
02e47980 LW |
2387 | if (!ret) |
2388 | goto set_output_value; | |
2389 | /* Emulate open source by not actively driving the line low */ | |
e735244e BG |
2390 | if (!value) { |
2391 | ret = gpiod_direction_input(desc); | |
2392 | goto set_output_flag; | |
2393 | } | |
02e47980 | 2394 | } else { |
83522358 | 2395 | gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL); |
02e47980 LW |
2396 | } |
2397 | ||
2398 | set_output_value: | |
5f4bf171 | 2399 | ret = gpio_set_bias(desc); |
2821ae5f KG |
2400 | if (ret) |
2401 | return ret; | |
fac9d885 | 2402 | return gpiod_direction_output_raw_commit(desc, value); |
e735244e BG |
2403 | |
2404 | set_output_flag: | |
2405 | /* | |
2406 | * When emulating open-source or open-drain functionalities by not | |
2407 | * actively driving the line (setting mode to input) we still need to | |
2408 | * set the IS_OUT flag or otherwise we won't be able to set the line | |
2409 | * value anymore. | |
2410 | */ | |
2411 | if (ret == 0) | |
2412 | set_bit(FLAG_IS_OUT, &desc->flags); | |
2413 | return ret; | |
ef70bbe1 | 2414 | } |
79a9becd | 2415 | EXPORT_SYMBOL_GPL(gpiod_direction_output); |
d2876d08 | 2416 | |
8ced32ff GU |
2417 | /** |
2418 | * gpiod_set_config - sets @config for a GPIO | |
2419 | * @desc: descriptor of the GPIO for which to set the configuration | |
2420 | * @config: Same packed config format as generic pinconf | |
2421 | * | |
2422 | * Returns: | |
2423 | * 0 on success, %-ENOTSUPP if the controller doesn't support setting the | |
2424 | * configuration. | |
2425 | */ | |
2426 | int gpiod_set_config(struct gpio_desc *desc, unsigned long config) | |
2427 | { | |
a0b66a73 | 2428 | struct gpio_chip *gc; |
8ced32ff GU |
2429 | |
2430 | VALIDATE_DESC(desc); | |
a0b66a73 | 2431 | gc = desc->gdev->chip; |
8ced32ff | 2432 | |
a0b66a73 | 2433 | return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config); |
8ced32ff GU |
2434 | } |
2435 | EXPORT_SYMBOL_GPL(gpiod_set_config); | |
2436 | ||
c4b5be98 | 2437 | /** |
950d55f5 TR |
2438 | * gpiod_set_debounce - sets @debounce time for a GPIO |
2439 | * @desc: descriptor of the GPIO for which to set debounce time | |
2440 | * @debounce: debounce time in microseconds | |
65d87656 | 2441 | * |
950d55f5 TR |
2442 | * Returns: |
2443 | * 0 on success, %-ENOTSUPP if the controller doesn't support setting the | |
2444 | * debounce time. | |
c4b5be98 | 2445 | */ |
13daf489 | 2446 | int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce) |
c4b5be98 | 2447 | { |
8ced32ff | 2448 | unsigned long config; |
be1a4b13 | 2449 | |
2956b5d9 | 2450 | config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce); |
8ced32ff | 2451 | return gpiod_set_config(desc, config); |
c4b5be98 | 2452 | } |
79a9becd | 2453 | EXPORT_SYMBOL_GPL(gpiod_set_debounce); |
372e722e | 2454 | |
e10f72bf AJ |
2455 | /** |
2456 | * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset | |
2457 | * @desc: descriptor of the GPIO for which to configure persistence | |
2458 | * @transitory: True to lose state on suspend or reset, false for persistence | |
2459 | * | |
2460 | * Returns: | |
2461 | * 0 on success, otherwise a negative error code. | |
2462 | */ | |
2463 | int gpiod_set_transitory(struct gpio_desc *desc, bool transitory) | |
2464 | { | |
156dd392 | 2465 | VALIDATE_DESC(desc); |
e10f72bf AJ |
2466 | /* |
2467 | * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for | |
2468 | * persistence state. | |
2469 | */ | |
4fc5bfeb | 2470 | assign_bit(FLAG_TRANSITORY, &desc->flags, transitory); |
e10f72bf AJ |
2471 | |
2472 | /* If the driver supports it, set the persistence state now */ | |
baca3b15 AS |
2473 | return gpio_set_config_with_argument_optional(desc, |
2474 | PIN_CONFIG_PERSIST_STATE, | |
2475 | !transitory); | |
e10f72bf AJ |
2476 | } |
2477 | EXPORT_SYMBOL_GPL(gpiod_set_transitory); | |
2478 | ||
79a9becd AC |
2479 | /** |
2480 | * gpiod_is_active_low - test whether a GPIO is active-low or not | |
2481 | * @desc: the gpio descriptor to test | |
2482 | * | |
2483 | * Returns 1 if the GPIO is active-low, 0 otherwise. | |
2484 | */ | |
2485 | int gpiod_is_active_low(const struct gpio_desc *desc) | |
372e722e | 2486 | { |
fdeb8e15 | 2487 | VALIDATE_DESC(desc); |
79a9becd | 2488 | return test_bit(FLAG_ACTIVE_LOW, &desc->flags); |
372e722e | 2489 | } |
79a9becd | 2490 | EXPORT_SYMBOL_GPL(gpiod_is_active_low); |
d2876d08 | 2491 | |
d3a5bcb4 MM |
2492 | /** |
2493 | * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not | |
2494 | * @desc: the gpio descriptor to change | |
2495 | */ | |
2496 | void gpiod_toggle_active_low(struct gpio_desc *desc) | |
2497 | { | |
2498 | VALIDATE_DESC_VOID(desc); | |
2499 | change_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
2500 | } | |
2501 | EXPORT_SYMBOL_GPL(gpiod_toggle_active_low); | |
2502 | ||
d2876d08 DB |
2503 | /* I/O calls are only valid after configuration completed; the relevant |
2504 | * "is this a valid GPIO" error checks should already have been done. | |
2505 | * | |
2506 | * "Get" operations are often inlinable as reading a pin value register, | |
2507 | * and masking the relevant bit in that register. | |
2508 | * | |
2509 | * When "set" operations are inlinable, they involve writing that mask to | |
2510 | * one register to set a low value, or a different register to set it high. | |
2511 | * Otherwise locking is needed, so there may be little value to inlining. | |
2512 | * | |
2513 | *------------------------------------------------------------------------ | |
2514 | * | |
2515 | * IMPORTANT!!! The hot paths -- get/set value -- assume that callers | |
2516 | * have requested the GPIO. That can include implicit requesting by | |
2517 | * a direction setting call. Marking a gpio as requested locks its chip | |
2518 | * in memory, guaranteeing that these table lookups need no more locking | |
2519 | * and that gpiochip_remove() will fail. | |
2520 | * | |
2521 | * REVISIT when debugging, consider adding some instrumentation to ensure | |
2522 | * that the GPIO was actually requested. | |
2523 | */ | |
2524 | ||
fac9d885 | 2525 | static int gpiod_get_raw_value_commit(const struct gpio_desc *desc) |
d2876d08 | 2526 | { |
a0b66a73 | 2527 | struct gpio_chip *gc; |
372e722e | 2528 | int offset; |
e20538b8 | 2529 | int value; |
d2876d08 | 2530 | |
a0b66a73 | 2531 | gc = desc->gdev->chip; |
372e722e | 2532 | offset = gpio_chip_hwgpio(desc); |
a0b66a73 | 2533 | value = gc->get ? gc->get(gc, offset) : -EIO; |
723a6303 | 2534 | value = value < 0 ? value : !!value; |
372e722e | 2535 | trace_gpio_value(desc_to_gpio(desc), 1, value); |
3f397c21 | 2536 | return value; |
d2876d08 | 2537 | } |
372e722e | 2538 | |
a0b66a73 | 2539 | static int gpio_chip_get_multiple(struct gpio_chip *gc, |
eec1d566 LW |
2540 | unsigned long *mask, unsigned long *bits) |
2541 | { | |
a0b66a73 LW |
2542 | if (gc->get_multiple) { |
2543 | return gc->get_multiple(gc, mask, bits); | |
2544 | } else if (gc->get) { | |
eec1d566 LW |
2545 | int i, value; |
2546 | ||
a0b66a73 LW |
2547 | for_each_set_bit(i, mask, gc->ngpio) { |
2548 | value = gc->get(gc, i); | |
eec1d566 LW |
2549 | if (value < 0) |
2550 | return value; | |
2551 | __assign_bit(i, bits, value); | |
2552 | } | |
2553 | return 0; | |
2554 | } | |
2555 | return -EIO; | |
2556 | } | |
2557 | ||
2558 | int gpiod_get_array_value_complex(bool raw, bool can_sleep, | |
2559 | unsigned int array_size, | |
2560 | struct gpio_desc **desc_array, | |
77588c14 | 2561 | struct gpio_array *array_info, |
b9762beb | 2562 | unsigned long *value_bitmap) |
eec1d566 | 2563 | { |
d377f56f | 2564 | int ret, i = 0; |
b17566a6 JK |
2565 | |
2566 | /* | |
2567 | * Validate array_info against desc_array and its size. | |
2568 | * It should immediately follow desc_array if both | |
2569 | * have been obtained from the same gpiod_get_array() call. | |
2570 | */ | |
2571 | if (array_info && array_info->desc == desc_array && | |
2572 | array_size <= array_info->size && | |
2573 | (void *)array_info == desc_array + array_info->size) { | |
2574 | if (!can_sleep) | |
2575 | WARN_ON(array_info->chip->can_sleep); | |
2576 | ||
d377f56f | 2577 | ret = gpio_chip_get_multiple(array_info->chip, |
b17566a6 JK |
2578 | array_info->get_mask, |
2579 | value_bitmap); | |
d377f56f LW |
2580 | if (ret) |
2581 | return ret; | |
b17566a6 JK |
2582 | |
2583 | if (!raw && !bitmap_empty(array_info->invert_mask, array_size)) | |
2584 | bitmap_xor(value_bitmap, value_bitmap, | |
2585 | array_info->invert_mask, array_size); | |
2586 | ||
b17566a6 | 2587 | i = find_first_zero_bit(array_info->get_mask, array_size); |
ae66eca0 AS |
2588 | if (i == array_size) |
2589 | return 0; | |
b17566a6 JK |
2590 | } else { |
2591 | array_info = NULL; | |
2592 | } | |
eec1d566 LW |
2593 | |
2594 | while (i < array_size) { | |
a0b66a73 | 2595 | struct gpio_chip *gc = desc_array[i]->gdev->chip; |
c80c4435 AS |
2596 | DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO); |
2597 | DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO); | |
3027743f | 2598 | unsigned long *mask, *bits; |
c07ea8d0 | 2599 | int first, j; |
eec1d566 | 2600 | |
a0b66a73 | 2601 | if (likely(gc->ngpio <= FASTPATH_NGPIO)) { |
c80c4435 AS |
2602 | mask = fastpath_mask; |
2603 | bits = fastpath_bits; | |
3027743f | 2604 | } else { |
c354c295 AS |
2605 | gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC; |
2606 | ||
2607 | mask = bitmap_alloc(gc->ngpio, flags); | |
3027743f LA |
2608 | if (!mask) |
2609 | return -ENOMEM; | |
c80c4435 | 2610 | |
c354c295 AS |
2611 | bits = bitmap_alloc(gc->ngpio, flags); |
2612 | if (!bits) { | |
2613 | bitmap_free(mask); | |
2614 | return -ENOMEM; | |
2615 | } | |
3027743f LA |
2616 | } |
2617 | ||
a0b66a73 | 2618 | bitmap_zero(mask, gc->ngpio); |
3027743f | 2619 | |
eec1d566 | 2620 | if (!can_sleep) |
a0b66a73 | 2621 | WARN_ON(gc->can_sleep); |
eec1d566 LW |
2622 | |
2623 | /* collect all inputs belonging to the same chip */ | |
2624 | first = i; | |
eec1d566 LW |
2625 | do { |
2626 | const struct gpio_desc *desc = desc_array[i]; | |
2627 | int hwgpio = gpio_chip_hwgpio(desc); | |
2628 | ||
2629 | __set_bit(hwgpio, mask); | |
2630 | i++; | |
b17566a6 JK |
2631 | |
2632 | if (array_info) | |
35ae7f96 JK |
2633 | i = find_next_zero_bit(array_info->get_mask, |
2634 | array_size, i); | |
eec1d566 | 2635 | } while ((i < array_size) && |
a0b66a73 | 2636 | (desc_array[i]->gdev->chip == gc)); |
eec1d566 | 2637 | |
a0b66a73 | 2638 | ret = gpio_chip_get_multiple(gc, mask, bits); |
3027743f | 2639 | if (ret) { |
c80c4435 | 2640 | if (mask != fastpath_mask) |
c354c295 AS |
2641 | bitmap_free(mask); |
2642 | if (bits != fastpath_bits) | |
2643 | bitmap_free(bits); | |
eec1d566 | 2644 | return ret; |
3027743f | 2645 | } |
eec1d566 | 2646 | |
b17566a6 | 2647 | for (j = first; j < i; ) { |
eec1d566 LW |
2648 | const struct gpio_desc *desc = desc_array[j]; |
2649 | int hwgpio = gpio_chip_hwgpio(desc); | |
2650 | int value = test_bit(hwgpio, bits); | |
2651 | ||
2652 | if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
2653 | value = !value; | |
b9762beb | 2654 | __assign_bit(j, value_bitmap, value); |
eec1d566 | 2655 | trace_gpio_value(desc_to_gpio(desc), 1, value); |
799d5eb4 | 2656 | j++; |
b17566a6 JK |
2657 | |
2658 | if (array_info) | |
35ae7f96 JK |
2659 | j = find_next_zero_bit(array_info->get_mask, i, |
2660 | j); | |
eec1d566 | 2661 | } |
3027743f | 2662 | |
c80c4435 | 2663 | if (mask != fastpath_mask) |
c354c295 AS |
2664 | bitmap_free(mask); |
2665 | if (bits != fastpath_bits) | |
2666 | bitmap_free(bits); | |
eec1d566 LW |
2667 | } |
2668 | return 0; | |
2669 | } | |
2670 | ||
d2876d08 | 2671 | /** |
79a9becd AC |
2672 | * gpiod_get_raw_value() - return a gpio's raw value |
2673 | * @desc: gpio whose value will be returned | |
d2876d08 | 2674 | * |
79a9becd | 2675 | * Return the GPIO's raw value, i.e. the value of the physical line disregarding |
e20538b8 | 2676 | * its ACTIVE_LOW status, or negative errno on failure. |
79a9becd | 2677 | * |
827a9b8b | 2678 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 2679 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 2680 | */ |
79a9becd | 2681 | int gpiod_get_raw_value(const struct gpio_desc *desc) |
d2876d08 | 2682 | { |
fdeb8e15 | 2683 | VALIDATE_DESC(desc); |
3285170f | 2684 | /* Should be using gpiod_get_raw_value_cansleep() */ |
fdeb8e15 | 2685 | WARN_ON(desc->gdev->chip->can_sleep); |
fac9d885 | 2686 | return gpiod_get_raw_value_commit(desc); |
d2876d08 | 2687 | } |
79a9becd | 2688 | EXPORT_SYMBOL_GPL(gpiod_get_raw_value); |
372e722e | 2689 | |
79a9becd AC |
2690 | /** |
2691 | * gpiod_get_value() - return a gpio's value | |
2692 | * @desc: gpio whose value will be returned | |
2693 | * | |
2694 | * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into | |
e20538b8 | 2695 | * account, or negative errno on failure. |
79a9becd | 2696 | * |
827a9b8b | 2697 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd AC |
2698 | * complain if the GPIO chip functions potentially sleep. |
2699 | */ | |
2700 | int gpiod_get_value(const struct gpio_desc *desc) | |
372e722e | 2701 | { |
79a9becd | 2702 | int value; |
fdeb8e15 LW |
2703 | |
2704 | VALIDATE_DESC(desc); | |
3285170f | 2705 | /* Should be using gpiod_get_value_cansleep() */ |
fdeb8e15 | 2706 | WARN_ON(desc->gdev->chip->can_sleep); |
79a9becd | 2707 | |
fac9d885 | 2708 | value = gpiod_get_raw_value_commit(desc); |
e20538b8 BA |
2709 | if (value < 0) |
2710 | return value; | |
2711 | ||
79a9becd AC |
2712 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
2713 | value = !value; | |
2714 | ||
2715 | return value; | |
372e722e | 2716 | } |
79a9becd | 2717 | EXPORT_SYMBOL_GPL(gpiod_get_value); |
d2876d08 | 2718 | |
eec1d566 LW |
2719 | /** |
2720 | * gpiod_get_raw_array_value() - read raw values from an array of GPIOs | |
b9762beb | 2721 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 2722 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 2723 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 2724 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
2725 | * |
2726 | * Read the raw values of the GPIOs, i.e. the values of the physical lines | |
2727 | * without regard for their ACTIVE_LOW status. Return 0 in case of success, | |
2728 | * else an error code. | |
2729 | * | |
827a9b8b | 2730 | * This function can be called from contexts where we cannot sleep, |
eec1d566 LW |
2731 | * and it will complain if the GPIO chip functions potentially sleep. |
2732 | */ | |
2733 | int gpiod_get_raw_array_value(unsigned int array_size, | |
b9762beb | 2734 | struct gpio_desc **desc_array, |
77588c14 | 2735 | struct gpio_array *array_info, |
b9762beb | 2736 | unsigned long *value_bitmap) |
eec1d566 LW |
2737 | { |
2738 | if (!desc_array) | |
2739 | return -EINVAL; | |
2740 | return gpiod_get_array_value_complex(true, false, array_size, | |
77588c14 JK |
2741 | desc_array, array_info, |
2742 | value_bitmap); | |
eec1d566 LW |
2743 | } |
2744 | EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value); | |
2745 | ||
2746 | /** | |
2747 | * gpiod_get_array_value() - read values from an array of GPIOs | |
b9762beb | 2748 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 2749 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 2750 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 2751 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
2752 | * |
2753 | * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
2754 | * into account. Return 0 in case of success, else an error code. | |
2755 | * | |
827a9b8b | 2756 | * This function can be called from contexts where we cannot sleep, |
eec1d566 LW |
2757 | * and it will complain if the GPIO chip functions potentially sleep. |
2758 | */ | |
2759 | int gpiod_get_array_value(unsigned int array_size, | |
b9762beb | 2760 | struct gpio_desc **desc_array, |
77588c14 | 2761 | struct gpio_array *array_info, |
b9762beb | 2762 | unsigned long *value_bitmap) |
eec1d566 LW |
2763 | { |
2764 | if (!desc_array) | |
2765 | return -EINVAL; | |
2766 | return gpiod_get_array_value_complex(false, false, array_size, | |
77588c14 JK |
2767 | desc_array, array_info, |
2768 | value_bitmap); | |
eec1d566 LW |
2769 | } |
2770 | EXPORT_SYMBOL_GPL(gpiod_get_array_value); | |
2771 | ||
aca5ce14 | 2772 | /* |
fac9d885 | 2773 | * gpio_set_open_drain_value_commit() - Set the open drain gpio's value. |
79a9becd | 2774 | * @desc: gpio descriptor whose state need to be set. |
20a8a968 | 2775 | * @value: Non-zero for setting it HIGH otherwise it will set to LOW. |
aca5ce14 | 2776 | */ |
fac9d885 | 2777 | static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value) |
aca5ce14 | 2778 | { |
d377f56f | 2779 | int ret = 0; |
a0b66a73 | 2780 | struct gpio_chip *gc = desc->gdev->chip; |
372e722e AC |
2781 | int offset = gpio_chip_hwgpio(desc); |
2782 | ||
aca5ce14 | 2783 | if (value) { |
a0b66a73 | 2784 | ret = gc->direction_input(gc, offset); |
aca5ce14 | 2785 | } else { |
a0b66a73 | 2786 | ret = gc->direction_output(gc, offset, 0); |
d377f56f | 2787 | if (!ret) |
372e722e | 2788 | set_bit(FLAG_IS_OUT, &desc->flags); |
aca5ce14 | 2789 | } |
d377f56f LW |
2790 | trace_gpio_direction(desc_to_gpio(desc), value, ret); |
2791 | if (ret < 0) | |
6424de5a MB |
2792 | gpiod_err(desc, |
2793 | "%s: Error in set_value for open drain err %d\n", | |
d377f56f | 2794 | __func__, ret); |
aca5ce14 LD |
2795 | } |
2796 | ||
25553ff0 | 2797 | /* |
79a9becd AC |
2798 | * _gpio_set_open_source_value() - Set the open source gpio's value. |
2799 | * @desc: gpio descriptor whose state need to be set. | |
20a8a968 | 2800 | * @value: Non-zero for setting it HIGH otherwise it will set to LOW. |
25553ff0 | 2801 | */ |
fac9d885 | 2802 | static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value) |
25553ff0 | 2803 | { |
d377f56f | 2804 | int ret = 0; |
a0b66a73 | 2805 | struct gpio_chip *gc = desc->gdev->chip; |
372e722e AC |
2806 | int offset = gpio_chip_hwgpio(desc); |
2807 | ||
25553ff0 | 2808 | if (value) { |
a0b66a73 | 2809 | ret = gc->direction_output(gc, offset, 1); |
d377f56f | 2810 | if (!ret) |
372e722e | 2811 | set_bit(FLAG_IS_OUT, &desc->flags); |
25553ff0 | 2812 | } else { |
a0b66a73 | 2813 | ret = gc->direction_input(gc, offset); |
25553ff0 | 2814 | } |
d377f56f LW |
2815 | trace_gpio_direction(desc_to_gpio(desc), !value, ret); |
2816 | if (ret < 0) | |
6424de5a MB |
2817 | gpiod_err(desc, |
2818 | "%s: Error in set_value for open source err %d\n", | |
d377f56f | 2819 | __func__, ret); |
25553ff0 LD |
2820 | } |
2821 | ||
fac9d885 | 2822 | static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value) |
d2876d08 | 2823 | { |
a0b66a73 | 2824 | struct gpio_chip *gc; |
d2876d08 | 2825 | |
a0b66a73 | 2826 | gc = desc->gdev->chip; |
372e722e | 2827 | trace_gpio_value(desc_to_gpio(desc), 0, value); |
a0b66a73 | 2828 | gc->set(gc, gpio_chip_hwgpio(desc), value); |
372e722e AC |
2829 | } |
2830 | ||
5f424243 RI |
2831 | /* |
2832 | * set multiple outputs on the same chip; | |
2833 | * use the chip's set_multiple function if available; | |
2834 | * otherwise set the outputs sequentially; | |
a0b66a73 | 2835 | * @chip: the GPIO chip we operate on |
5f424243 RI |
2836 | * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word |
2837 | * defines which outputs are to be changed | |
2838 | * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word | |
2839 | * defines the values the outputs specified by mask are to be set to | |
2840 | */ | |
a0b66a73 | 2841 | static void gpio_chip_set_multiple(struct gpio_chip *gc, |
5f424243 RI |
2842 | unsigned long *mask, unsigned long *bits) |
2843 | { | |
a0b66a73 LW |
2844 | if (gc->set_multiple) { |
2845 | gc->set_multiple(gc, mask, bits); | |
5f424243 | 2846 | } else { |
5e4e6fb3 AS |
2847 | unsigned int i; |
2848 | ||
2849 | /* set outputs if the corresponding mask bit is set */ | |
a0b66a73 LW |
2850 | for_each_set_bit(i, mask, gc->ngpio) |
2851 | gc->set(gc, i, test_bit(i, bits)); | |
5f424243 RI |
2852 | } |
2853 | } | |
2854 | ||
3027743f | 2855 | int gpiod_set_array_value_complex(bool raw, bool can_sleep, |
3c940660 GU |
2856 | unsigned int array_size, |
2857 | struct gpio_desc **desc_array, | |
2858 | struct gpio_array *array_info, | |
2859 | unsigned long *value_bitmap) | |
5f424243 RI |
2860 | { |
2861 | int i = 0; | |
2862 | ||
b17566a6 JK |
2863 | /* |
2864 | * Validate array_info against desc_array and its size. | |
2865 | * It should immediately follow desc_array if both | |
2866 | * have been obtained from the same gpiod_get_array() call. | |
2867 | */ | |
2868 | if (array_info && array_info->desc == desc_array && | |
2869 | array_size <= array_info->size && | |
2870 | (void *)array_info == desc_array + array_info->size) { | |
2871 | if (!can_sleep) | |
2872 | WARN_ON(array_info->chip->can_sleep); | |
2873 | ||
2874 | if (!raw && !bitmap_empty(array_info->invert_mask, array_size)) | |
2875 | bitmap_xor(value_bitmap, value_bitmap, | |
2876 | array_info->invert_mask, array_size); | |
2877 | ||
2878 | gpio_chip_set_multiple(array_info->chip, array_info->set_mask, | |
2879 | value_bitmap); | |
2880 | ||
b17566a6 | 2881 | i = find_first_zero_bit(array_info->set_mask, array_size); |
ae66eca0 AS |
2882 | if (i == array_size) |
2883 | return 0; | |
b17566a6 JK |
2884 | } else { |
2885 | array_info = NULL; | |
2886 | } | |
2887 | ||
5f424243 | 2888 | while (i < array_size) { |
a0b66a73 | 2889 | struct gpio_chip *gc = desc_array[i]->gdev->chip; |
c80c4435 AS |
2890 | DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO); |
2891 | DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO); | |
3027743f | 2892 | unsigned long *mask, *bits; |
5f424243 RI |
2893 | int count = 0; |
2894 | ||
a0b66a73 | 2895 | if (likely(gc->ngpio <= FASTPATH_NGPIO)) { |
c80c4435 AS |
2896 | mask = fastpath_mask; |
2897 | bits = fastpath_bits; | |
3027743f | 2898 | } else { |
c354c295 AS |
2899 | gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC; |
2900 | ||
2901 | mask = bitmap_alloc(gc->ngpio, flags); | |
3027743f LA |
2902 | if (!mask) |
2903 | return -ENOMEM; | |
c80c4435 | 2904 | |
c354c295 AS |
2905 | bits = bitmap_alloc(gc->ngpio, flags); |
2906 | if (!bits) { | |
2907 | bitmap_free(mask); | |
2908 | return -ENOMEM; | |
2909 | } | |
3027743f LA |
2910 | } |
2911 | ||
a0b66a73 | 2912 | bitmap_zero(mask, gc->ngpio); |
3027743f | 2913 | |
38e003f4 | 2914 | if (!can_sleep) |
a0b66a73 | 2915 | WARN_ON(gc->can_sleep); |
38e003f4 | 2916 | |
5f424243 RI |
2917 | do { |
2918 | struct gpio_desc *desc = desc_array[i]; | |
2919 | int hwgpio = gpio_chip_hwgpio(desc); | |
b9762beb | 2920 | int value = test_bit(i, value_bitmap); |
5f424243 | 2921 | |
b17566a6 JK |
2922 | /* |
2923 | * Pins applicable for fast input but not for | |
2924 | * fast output processing may have been already | |
2925 | * inverted inside the fast path, skip them. | |
2926 | */ | |
2927 | if (!raw && !(array_info && | |
2928 | test_bit(i, array_info->invert_mask)) && | |
2929 | test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
5f424243 RI |
2930 | value = !value; |
2931 | trace_gpio_value(desc_to_gpio(desc), 0, value); | |
2932 | /* | |
2933 | * collect all normal outputs belonging to the same chip | |
2934 | * open drain and open source outputs are set individually | |
2935 | */ | |
02e47980 | 2936 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) { |
fac9d885 | 2937 | gpio_set_open_drain_value_commit(desc, value); |
02e47980 | 2938 | } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) { |
fac9d885 | 2939 | gpio_set_open_source_value_commit(desc, value); |
5f424243 RI |
2940 | } else { |
2941 | __set_bit(hwgpio, mask); | |
4fc5bfeb | 2942 | __assign_bit(hwgpio, bits, value); |
5f424243 RI |
2943 | count++; |
2944 | } | |
2945 | i++; | |
b17566a6 JK |
2946 | |
2947 | if (array_info) | |
35ae7f96 JK |
2948 | i = find_next_zero_bit(array_info->set_mask, |
2949 | array_size, i); | |
fdeb8e15 | 2950 | } while ((i < array_size) && |
a0b66a73 | 2951 | (desc_array[i]->gdev->chip == gc)); |
5f424243 | 2952 | /* push collected bits to outputs */ |
38e003f4 | 2953 | if (count != 0) |
a0b66a73 | 2954 | gpio_chip_set_multiple(gc, mask, bits); |
3027743f | 2955 | |
c80c4435 | 2956 | if (mask != fastpath_mask) |
c354c295 AS |
2957 | bitmap_free(mask); |
2958 | if (bits != fastpath_bits) | |
2959 | bitmap_free(bits); | |
5f424243 | 2960 | } |
3027743f | 2961 | return 0; |
5f424243 RI |
2962 | } |
2963 | ||
d2876d08 | 2964 | /** |
79a9becd AC |
2965 | * gpiod_set_raw_value() - assign a gpio's raw value |
2966 | * @desc: gpio whose value will be assigned | |
d2876d08 | 2967 | * @value: value to assign |
d2876d08 | 2968 | * |
79a9becd AC |
2969 | * Set the raw value of the GPIO, i.e. the value of its physical line without |
2970 | * regard for its ACTIVE_LOW status. | |
2971 | * | |
827a9b8b | 2972 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 2973 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 2974 | */ |
79a9becd | 2975 | void gpiod_set_raw_value(struct gpio_desc *desc, int value) |
372e722e | 2976 | { |
fdeb8e15 | 2977 | VALIDATE_DESC_VOID(desc); |
3285170f | 2978 | /* Should be using gpiod_set_raw_value_cansleep() */ |
fdeb8e15 | 2979 | WARN_ON(desc->gdev->chip->can_sleep); |
fac9d885 | 2980 | gpiod_set_raw_value_commit(desc, value); |
d2876d08 | 2981 | } |
79a9becd | 2982 | EXPORT_SYMBOL_GPL(gpiod_set_raw_value); |
d2876d08 | 2983 | |
1e77fc82 GU |
2984 | /** |
2985 | * gpiod_set_value_nocheck() - set a GPIO line value without checking | |
2986 | * @desc: the descriptor to set the value on | |
2987 | * @value: value to set | |
2988 | * | |
2989 | * This sets the value of a GPIO line backing a descriptor, applying | |
2990 | * different semantic quirks like active low and open drain/source | |
2991 | * handling. | |
2992 | */ | |
2993 | static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value) | |
2994 | { | |
2995 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
2996 | value = !value; | |
2997 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) | |
2998 | gpio_set_open_drain_value_commit(desc, value); | |
2999 | else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) | |
3000 | gpio_set_open_source_value_commit(desc, value); | |
3001 | else | |
3002 | gpiod_set_raw_value_commit(desc, value); | |
3003 | } | |
3004 | ||
d2876d08 | 3005 | /** |
79a9becd AC |
3006 | * gpiod_set_value() - assign a gpio's value |
3007 | * @desc: gpio whose value will be assigned | |
3008 | * @value: value to assign | |
3009 | * | |
02e47980 LW |
3010 | * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW, |
3011 | * OPEN_DRAIN and OPEN_SOURCE flags into account. | |
d2876d08 | 3012 | * |
827a9b8b | 3013 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 3014 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 3015 | */ |
79a9becd | 3016 | void gpiod_set_value(struct gpio_desc *desc, int value) |
d2876d08 | 3017 | { |
fdeb8e15 | 3018 | VALIDATE_DESC_VOID(desc); |
3285170f | 3019 | /* Should be using gpiod_set_value_cansleep() */ |
fdeb8e15 | 3020 | WARN_ON(desc->gdev->chip->can_sleep); |
1e77fc82 | 3021 | gpiod_set_value_nocheck(desc, value); |
372e722e | 3022 | } |
79a9becd | 3023 | EXPORT_SYMBOL_GPL(gpiod_set_value); |
d2876d08 | 3024 | |
5f424243 | 3025 | /** |
3fff99bc | 3026 | * gpiod_set_raw_array_value() - assign values to an array of GPIOs |
b9762beb | 3027 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 3028 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 3029 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3030 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
3031 | * |
3032 | * Set the raw values of the GPIOs, i.e. the values of the physical lines | |
3033 | * without regard for their ACTIVE_LOW status. | |
3034 | * | |
827a9b8b | 3035 | * This function can be called from contexts where we cannot sleep, and will |
5f424243 RI |
3036 | * complain if the GPIO chip functions potentially sleep. |
3037 | */ | |
3027743f | 3038 | int gpiod_set_raw_array_value(unsigned int array_size, |
3c940660 GU |
3039 | struct gpio_desc **desc_array, |
3040 | struct gpio_array *array_info, | |
3041 | unsigned long *value_bitmap) | |
5f424243 RI |
3042 | { |
3043 | if (!desc_array) | |
3027743f LA |
3044 | return -EINVAL; |
3045 | return gpiod_set_array_value_complex(true, false, array_size, | |
77588c14 | 3046 | desc_array, array_info, value_bitmap); |
5f424243 | 3047 | } |
3fff99bc | 3048 | EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value); |
5f424243 RI |
3049 | |
3050 | /** | |
3fff99bc | 3051 | * gpiod_set_array_value() - assign values to an array of GPIOs |
b9762beb | 3052 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 3053 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 3054 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3055 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
3056 | * |
3057 | * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
3058 | * into account. | |
3059 | * | |
827a9b8b | 3060 | * This function can be called from contexts where we cannot sleep, and will |
5f424243 RI |
3061 | * complain if the GPIO chip functions potentially sleep. |
3062 | */ | |
cf9af0d5 GU |
3063 | int gpiod_set_array_value(unsigned int array_size, |
3064 | struct gpio_desc **desc_array, | |
3065 | struct gpio_array *array_info, | |
3066 | unsigned long *value_bitmap) | |
5f424243 RI |
3067 | { |
3068 | if (!desc_array) | |
cf9af0d5 GU |
3069 | return -EINVAL; |
3070 | return gpiod_set_array_value_complex(false, false, array_size, | |
3071 | desc_array, array_info, | |
3072 | value_bitmap); | |
5f424243 | 3073 | } |
3fff99bc | 3074 | EXPORT_SYMBOL_GPL(gpiod_set_array_value); |
5f424243 | 3075 | |
d2876d08 | 3076 | /** |
79a9becd AC |
3077 | * gpiod_cansleep() - report whether gpio value access may sleep |
3078 | * @desc: gpio to check | |
d2876d08 | 3079 | * |
d2876d08 | 3080 | */ |
79a9becd | 3081 | int gpiod_cansleep(const struct gpio_desc *desc) |
372e722e | 3082 | { |
fdeb8e15 LW |
3083 | VALIDATE_DESC(desc); |
3084 | return desc->gdev->chip->can_sleep; | |
d2876d08 | 3085 | } |
79a9becd | 3086 | EXPORT_SYMBOL_GPL(gpiod_cansleep); |
d2876d08 | 3087 | |
90b39402 LW |
3088 | /** |
3089 | * gpiod_set_consumer_name() - set the consumer name for the descriptor | |
3090 | * @desc: gpio to set the consumer name on | |
3091 | * @name: the new consumer name | |
3092 | */ | |
18534df4 | 3093 | int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name) |
90b39402 | 3094 | { |
18534df4 MS |
3095 | VALIDATE_DESC(desc); |
3096 | if (name) { | |
3097 | name = kstrdup_const(name, GFP_KERNEL); | |
3098 | if (!name) | |
3099 | return -ENOMEM; | |
3100 | } | |
3101 | ||
3102 | kfree_const(desc->label); | |
3103 | desc_set_label(desc, name); | |
3104 | ||
3105 | return 0; | |
90b39402 LW |
3106 | } |
3107 | EXPORT_SYMBOL_GPL(gpiod_set_consumer_name); | |
3108 | ||
0f6d504e | 3109 | /** |
79a9becd AC |
3110 | * gpiod_to_irq() - return the IRQ corresponding to a GPIO |
3111 | * @desc: gpio whose IRQ will be returned (already requested) | |
0f6d504e | 3112 | * |
79a9becd AC |
3113 | * Return the IRQ corresponding to the passed GPIO, or an error code in case of |
3114 | * error. | |
0f6d504e | 3115 | */ |
79a9becd | 3116 | int gpiod_to_irq(const struct gpio_desc *desc) |
0f6d504e | 3117 | { |
a0b66a73 | 3118 | struct gpio_chip *gc; |
4c37ce86 | 3119 | int offset; |
0f6d504e | 3120 | |
79bb71bd LW |
3121 | /* |
3122 | * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics | |
3123 | * requires this function to not return zero on an invalid descriptor | |
3124 | * but rather a negative error number. | |
3125 | */ | |
bfbbe44d | 3126 | if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip) |
79bb71bd LW |
3127 | return -EINVAL; |
3128 | ||
a0b66a73 | 3129 | gc = desc->gdev->chip; |
372e722e | 3130 | offset = gpio_chip_hwgpio(desc); |
a0b66a73 LW |
3131 | if (gc->to_irq) { |
3132 | int retirq = gc->to_irq(gc, offset); | |
4c37ce86 LW |
3133 | |
3134 | /* Zero means NO_IRQ */ | |
3135 | if (!retirq) | |
3136 | return -ENXIO; | |
3137 | ||
3138 | return retirq; | |
3139 | } | |
3140 | return -ENXIO; | |
0f6d504e | 3141 | } |
79a9becd | 3142 | EXPORT_SYMBOL_GPL(gpiod_to_irq); |
0f6d504e | 3143 | |
d468bf9e | 3144 | /** |
e3a2e878 | 3145 | * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ |
a0b66a73 | 3146 | * @gc: the chip the GPIO to lock belongs to |
d74be6df | 3147 | * @offset: the offset of the GPIO to lock as IRQ |
d468bf9e LW |
3148 | * |
3149 | * This is used directly by GPIO drivers that want to lock down | |
f438acdf | 3150 | * a certain GPIO line to be used for IRQs. |
d468bf9e | 3151 | */ |
a0b66a73 | 3152 | int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset) |
372e722e | 3153 | { |
9c10280d LW |
3154 | struct gpio_desc *desc; |
3155 | ||
a0b66a73 | 3156 | desc = gpiochip_get_desc(gc, offset); |
9c10280d LW |
3157 | if (IS_ERR(desc)) |
3158 | return PTR_ERR(desc); | |
3159 | ||
60f8339e LW |
3160 | /* |
3161 | * If it's fast: flush the direction setting if something changed | |
3162 | * behind our back | |
3163 | */ | |
a0b66a73 | 3164 | if (!gc->can_sleep && gc->get_direction) { |
80956790 | 3165 | int dir = gpiod_get_direction(desc); |
9c10280d | 3166 | |
36b31279 | 3167 | if (dir < 0) { |
a0b66a73 | 3168 | chip_err(gc, "%s: cannot get GPIO direction\n", |
36b31279 AS |
3169 | __func__); |
3170 | return dir; | |
3171 | } | |
9c10280d | 3172 | } |
d468bf9e | 3173 | |
e9bdf7e6 LW |
3174 | /* To be valid for IRQ the line needs to be input or open drain */ |
3175 | if (test_bit(FLAG_IS_OUT, &desc->flags) && | |
3176 | !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) { | |
a0b66a73 | 3177 | chip_err(gc, |
b1911710 AS |
3178 | "%s: tried to flag a GPIO set as output for IRQ\n", |
3179 | __func__); | |
d468bf9e LW |
3180 | return -EIO; |
3181 | } | |
3182 | ||
9c10280d | 3183 | set_bit(FLAG_USED_AS_IRQ, &desc->flags); |
4e9439dd | 3184 | set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3940c34a LW |
3185 | |
3186 | /* | |
3187 | * If the consumer has not set up a label (such as when the | |
3188 | * IRQ is referenced from .to_irq()) we set up a label here | |
3189 | * so it is clear this is used as an interrupt. | |
3190 | */ | |
3191 | if (!desc->label) | |
3192 | desc_set_label(desc, "interrupt"); | |
3193 | ||
d468bf9e | 3194 | return 0; |
372e722e | 3195 | } |
e3a2e878 | 3196 | EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq); |
d2876d08 | 3197 | |
d468bf9e | 3198 | /** |
e3a2e878 | 3199 | * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ |
a0b66a73 | 3200 | * @gc: the chip the GPIO to lock belongs to |
d74be6df | 3201 | * @offset: the offset of the GPIO to lock as IRQ |
d468bf9e LW |
3202 | * |
3203 | * This is used directly by GPIO drivers that want to indicate | |
3204 | * that a certain GPIO is no longer used exclusively for IRQ. | |
d2876d08 | 3205 | */ |
a0b66a73 | 3206 | void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset) |
d468bf9e | 3207 | { |
3940c34a LW |
3208 | struct gpio_desc *desc; |
3209 | ||
a0b66a73 | 3210 | desc = gpiochip_get_desc(gc, offset); |
3940c34a | 3211 | if (IS_ERR(desc)) |
d468bf9e | 3212 | return; |
d2876d08 | 3213 | |
3940c34a | 3214 | clear_bit(FLAG_USED_AS_IRQ, &desc->flags); |
4e9439dd | 3215 | clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3940c34a LW |
3216 | |
3217 | /* If we only had this marking, erase it */ | |
3218 | if (desc->label && !strcmp(desc->label, "interrupt")) | |
3219 | desc_set_label(desc, NULL); | |
d468bf9e | 3220 | } |
e3a2e878 | 3221 | EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq); |
d468bf9e | 3222 | |
a0b66a73 | 3223 | void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset) |
4e9439dd | 3224 | { |
a0b66a73 | 3225 | struct gpio_desc *desc = gpiochip_get_desc(gc, offset); |
4e9439dd HV |
3226 | |
3227 | if (!IS_ERR(desc) && | |
3228 | !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) | |
3229 | clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); | |
3230 | } | |
3231 | EXPORT_SYMBOL_GPL(gpiochip_disable_irq); | |
3232 | ||
a0b66a73 | 3233 | void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset) |
4e9439dd | 3234 | { |
a0b66a73 | 3235 | struct gpio_desc *desc = gpiochip_get_desc(gc, offset); |
4e9439dd HV |
3236 | |
3237 | if (!IS_ERR(desc) && | |
3238 | !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) { | |
e9bdf7e6 LW |
3239 | /* |
3240 | * We must not be output when using IRQ UNLESS we are | |
3241 | * open drain. | |
3242 | */ | |
3243 | WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) && | |
3244 | !test_bit(FLAG_OPEN_DRAIN, &desc->flags)); | |
4e9439dd HV |
3245 | set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3246 | } | |
3247 | } | |
3248 | EXPORT_SYMBOL_GPL(gpiochip_enable_irq); | |
3249 | ||
a0b66a73 | 3250 | bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset) |
6cee3821 | 3251 | { |
a0b66a73 | 3252 | if (offset >= gc->ngpio) |
6cee3821 LW |
3253 | return false; |
3254 | ||
a0b66a73 | 3255 | return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags); |
6cee3821 LW |
3256 | } |
3257 | EXPORT_SYMBOL_GPL(gpiochip_line_is_irq); | |
3258 | ||
a0b66a73 | 3259 | int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset) |
4e6b8238 HV |
3260 | { |
3261 | int ret; | |
3262 | ||
a0b66a73 | 3263 | if (!try_module_get(gc->gpiodev->owner)) |
4e6b8238 HV |
3264 | return -ENODEV; |
3265 | ||
a0b66a73 | 3266 | ret = gpiochip_lock_as_irq(gc, offset); |
4e6b8238 | 3267 | if (ret) { |
a0b66a73 LW |
3268 | chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset); |
3269 | module_put(gc->gpiodev->owner); | |
4e6b8238 HV |
3270 | return ret; |
3271 | } | |
3272 | return 0; | |
3273 | } | |
3274 | EXPORT_SYMBOL_GPL(gpiochip_reqres_irq); | |
3275 | ||
a0b66a73 | 3276 | void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset) |
4e6b8238 | 3277 | { |
a0b66a73 LW |
3278 | gpiochip_unlock_as_irq(gc, offset); |
3279 | module_put(gc->gpiodev->owner); | |
4e6b8238 HV |
3280 | } |
3281 | EXPORT_SYMBOL_GPL(gpiochip_relres_irq); | |
3282 | ||
a0b66a73 | 3283 | bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset) |
143b65d6 | 3284 | { |
a0b66a73 | 3285 | if (offset >= gc->ngpio) |
143b65d6 LW |
3286 | return false; |
3287 | ||
a0b66a73 | 3288 | return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags); |
143b65d6 LW |
3289 | } |
3290 | EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain); | |
3291 | ||
a0b66a73 | 3292 | bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset) |
143b65d6 | 3293 | { |
a0b66a73 | 3294 | if (offset >= gc->ngpio) |
143b65d6 LW |
3295 | return false; |
3296 | ||
a0b66a73 | 3297 | return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags); |
143b65d6 LW |
3298 | } |
3299 | EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source); | |
3300 | ||
a0b66a73 | 3301 | bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset) |
05f479bf | 3302 | { |
a0b66a73 | 3303 | if (offset >= gc->ngpio) |
05f479bf CK |
3304 | return false; |
3305 | ||
a0b66a73 | 3306 | return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags); |
05f479bf CK |
3307 | } |
3308 | EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent); | |
3309 | ||
79a9becd AC |
3310 | /** |
3311 | * gpiod_get_raw_value_cansleep() - return a gpio's raw value | |
3312 | * @desc: gpio whose value will be returned | |
3313 | * | |
3314 | * Return the GPIO's raw value, i.e. the value of the physical line disregarding | |
e20538b8 | 3315 | * its ACTIVE_LOW status, or negative errno on failure. |
79a9becd AC |
3316 | * |
3317 | * This function is to be called from contexts that can sleep. | |
d2876d08 | 3318 | */ |
79a9becd | 3319 | int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc) |
d2876d08 | 3320 | { |
d2876d08 | 3321 | might_sleep_if(extra_checks); |
fdeb8e15 | 3322 | VALIDATE_DESC(desc); |
fac9d885 | 3323 | return gpiod_get_raw_value_commit(desc); |
d2876d08 | 3324 | } |
79a9becd | 3325 | EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep); |
372e722e | 3326 | |
79a9becd AC |
3327 | /** |
3328 | * gpiod_get_value_cansleep() - return a gpio's value | |
3329 | * @desc: gpio whose value will be returned | |
3330 | * | |
3331 | * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into | |
e20538b8 | 3332 | * account, or negative errno on failure. |
79a9becd AC |
3333 | * |
3334 | * This function is to be called from contexts that can sleep. | |
3335 | */ | |
3336 | int gpiod_get_value_cansleep(const struct gpio_desc *desc) | |
d2876d08 | 3337 | { |
3f397c21 | 3338 | int value; |
d2876d08 DB |
3339 | |
3340 | might_sleep_if(extra_checks); | |
fdeb8e15 | 3341 | VALIDATE_DESC(desc); |
fac9d885 | 3342 | value = gpiod_get_raw_value_commit(desc); |
e20538b8 BA |
3343 | if (value < 0) |
3344 | return value; | |
3345 | ||
79a9becd AC |
3346 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
3347 | value = !value; | |
3348 | ||
3f397c21 | 3349 | return value; |
d2876d08 | 3350 | } |
79a9becd | 3351 | EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep); |
372e722e | 3352 | |
eec1d566 LW |
3353 | /** |
3354 | * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs | |
b9762beb | 3355 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 3356 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 3357 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3358 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
3359 | * |
3360 | * Read the raw values of the GPIOs, i.e. the values of the physical lines | |
3361 | * without regard for their ACTIVE_LOW status. Return 0 in case of success, | |
3362 | * else an error code. | |
3363 | * | |
3364 | * This function is to be called from contexts that can sleep. | |
3365 | */ | |
3366 | int gpiod_get_raw_array_value_cansleep(unsigned int array_size, | |
3367 | struct gpio_desc **desc_array, | |
77588c14 | 3368 | struct gpio_array *array_info, |
b9762beb | 3369 | unsigned long *value_bitmap) |
eec1d566 LW |
3370 | { |
3371 | might_sleep_if(extra_checks); | |
3372 | if (!desc_array) | |
3373 | return -EINVAL; | |
3374 | return gpiod_get_array_value_complex(true, true, array_size, | |
77588c14 JK |
3375 | desc_array, array_info, |
3376 | value_bitmap); | |
eec1d566 LW |
3377 | } |
3378 | EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep); | |
3379 | ||
3380 | /** | |
3381 | * gpiod_get_array_value_cansleep() - read values from an array of GPIOs | |
b9762beb | 3382 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 3383 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 3384 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3385 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
3386 | * |
3387 | * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
3388 | * into account. Return 0 in case of success, else an error code. | |
3389 | * | |
3390 | * This function is to be called from contexts that can sleep. | |
3391 | */ | |
3392 | int gpiod_get_array_value_cansleep(unsigned int array_size, | |
3393 | struct gpio_desc **desc_array, | |
77588c14 | 3394 | struct gpio_array *array_info, |
b9762beb | 3395 | unsigned long *value_bitmap) |
eec1d566 LW |
3396 | { |
3397 | might_sleep_if(extra_checks); | |
3398 | if (!desc_array) | |
3399 | return -EINVAL; | |
3400 | return gpiod_get_array_value_complex(false, true, array_size, | |
77588c14 JK |
3401 | desc_array, array_info, |
3402 | value_bitmap); | |
eec1d566 LW |
3403 | } |
3404 | EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep); | |
3405 | ||
79a9becd AC |
3406 | /** |
3407 | * gpiod_set_raw_value_cansleep() - assign a gpio's raw value | |
3408 | * @desc: gpio whose value will be assigned | |
3409 | * @value: value to assign | |
3410 | * | |
3411 | * Set the raw value of the GPIO, i.e. the value of its physical line without | |
3412 | * regard for its ACTIVE_LOW status. | |
3413 | * | |
3414 | * This function is to be called from contexts that can sleep. | |
3415 | */ | |
3416 | void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value) | |
372e722e | 3417 | { |
d2876d08 | 3418 | might_sleep_if(extra_checks); |
fdeb8e15 | 3419 | VALIDATE_DESC_VOID(desc); |
fac9d885 | 3420 | gpiod_set_raw_value_commit(desc, value); |
372e722e | 3421 | } |
79a9becd | 3422 | EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep); |
d2876d08 | 3423 | |
79a9becd AC |
3424 | /** |
3425 | * gpiod_set_value_cansleep() - assign a gpio's value | |
3426 | * @desc: gpio whose value will be assigned | |
3427 | * @value: value to assign | |
3428 | * | |
3429 | * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into | |
3430 | * account | |
3431 | * | |
3432 | * This function is to be called from contexts that can sleep. | |
3433 | */ | |
3434 | void gpiod_set_value_cansleep(struct gpio_desc *desc, int value) | |
d2876d08 | 3435 | { |
d2876d08 | 3436 | might_sleep_if(extra_checks); |
fdeb8e15 | 3437 | VALIDATE_DESC_VOID(desc); |
1e77fc82 | 3438 | gpiod_set_value_nocheck(desc, value); |
372e722e | 3439 | } |
79a9becd | 3440 | EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep); |
d2876d08 | 3441 | |
5f424243 | 3442 | /** |
3fff99bc | 3443 | * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs |
b9762beb | 3444 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 3445 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 3446 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3447 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
3448 | * |
3449 | * Set the raw values of the GPIOs, i.e. the values of the physical lines | |
3450 | * without regard for their ACTIVE_LOW status. | |
3451 | * | |
3452 | * This function is to be called from contexts that can sleep. | |
3453 | */ | |
3027743f | 3454 | int gpiod_set_raw_array_value_cansleep(unsigned int array_size, |
3c940660 GU |
3455 | struct gpio_desc **desc_array, |
3456 | struct gpio_array *array_info, | |
3457 | unsigned long *value_bitmap) | |
5f424243 RI |
3458 | { |
3459 | might_sleep_if(extra_checks); | |
3460 | if (!desc_array) | |
3027743f LA |
3461 | return -EINVAL; |
3462 | return gpiod_set_array_value_complex(true, true, array_size, desc_array, | |
77588c14 | 3463 | array_info, value_bitmap); |
5f424243 | 3464 | } |
3fff99bc | 3465 | EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep); |
5f424243 | 3466 | |
3946d187 DT |
3467 | /** |
3468 | * gpiod_add_lookup_tables() - register GPIO device consumers | |
3469 | * @tables: list of tables of consumers to register | |
3470 | * @n: number of tables in the list | |
3471 | */ | |
3472 | void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n) | |
3473 | { | |
3474 | unsigned int i; | |
3475 | ||
3476 | mutex_lock(&gpio_lookup_lock); | |
3477 | ||
3478 | for (i = 0; i < n; i++) | |
3479 | list_add_tail(&tables[i]->list, &gpio_lookup_list); | |
3480 | ||
3481 | mutex_unlock(&gpio_lookup_lock); | |
3482 | } | |
3483 | ||
5f424243 | 3484 | /** |
3fff99bc | 3485 | * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs |
b9762beb | 3486 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 3487 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 3488 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3489 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
3490 | * |
3491 | * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
3492 | * into account. | |
3493 | * | |
3494 | * This function is to be called from contexts that can sleep. | |
3495 | */ | |
cf9af0d5 GU |
3496 | int gpiod_set_array_value_cansleep(unsigned int array_size, |
3497 | struct gpio_desc **desc_array, | |
3498 | struct gpio_array *array_info, | |
3499 | unsigned long *value_bitmap) | |
5f424243 RI |
3500 | { |
3501 | might_sleep_if(extra_checks); | |
3502 | if (!desc_array) | |
cf9af0d5 GU |
3503 | return -EINVAL; |
3504 | return gpiod_set_array_value_complex(false, true, array_size, | |
3505 | desc_array, array_info, | |
3506 | value_bitmap); | |
5f424243 | 3507 | } |
3fff99bc | 3508 | EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep); |
5f424243 | 3509 | |
bae48da2 | 3510 | /** |
ad824783 AC |
3511 | * gpiod_add_lookup_table() - register GPIO device consumers |
3512 | * @table: table of consumers to register | |
bae48da2 | 3513 | */ |
ad824783 | 3514 | void gpiod_add_lookup_table(struct gpiod_lookup_table *table) |
bae48da2 | 3515 | { |
49fdfe66 | 3516 | gpiod_add_lookup_tables(&table, 1); |
bae48da2 | 3517 | } |
226b2242 | 3518 | EXPORT_SYMBOL_GPL(gpiod_add_lookup_table); |
bae48da2 | 3519 | |
be9015ab SK |
3520 | /** |
3521 | * gpiod_remove_lookup_table() - unregister GPIO device consumers | |
3522 | * @table: table of consumers to unregister | |
3523 | */ | |
3524 | void gpiod_remove_lookup_table(struct gpiod_lookup_table *table) | |
3525 | { | |
d321ad12 AS |
3526 | /* Nothing to remove */ |
3527 | if (!table) | |
3528 | return; | |
3529 | ||
be9015ab SK |
3530 | mutex_lock(&gpio_lookup_lock); |
3531 | ||
3532 | list_del(&table->list); | |
3533 | ||
3534 | mutex_unlock(&gpio_lookup_lock); | |
3535 | } | |
226b2242 | 3536 | EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table); |
be9015ab | 3537 | |
a411e81e BG |
3538 | /** |
3539 | * gpiod_add_hogs() - register a set of GPIO hogs from machine code | |
3540 | * @hogs: table of gpio hog entries with a zeroed sentinel at the end | |
3541 | */ | |
3542 | void gpiod_add_hogs(struct gpiod_hog *hogs) | |
3543 | { | |
a0b66a73 | 3544 | struct gpio_chip *gc; |
a411e81e BG |
3545 | struct gpiod_hog *hog; |
3546 | ||
3547 | mutex_lock(&gpio_machine_hogs_mutex); | |
3548 | ||
3549 | for (hog = &hogs[0]; hog->chip_label; hog++) { | |
3550 | list_add_tail(&hog->list, &gpio_machine_hogs); | |
3551 | ||
3552 | /* | |
3553 | * The chip may have been registered earlier, so check if it | |
3554 | * exists and, if so, try to hog the line now. | |
3555 | */ | |
a0b66a73 LW |
3556 | gc = find_chip_by_name(hog->chip_label); |
3557 | if (gc) | |
3558 | gpiochip_machine_hog(gc, hog); | |
a411e81e BG |
3559 | } |
3560 | ||
3561 | mutex_unlock(&gpio_machine_hogs_mutex); | |
3562 | } | |
3563 | EXPORT_SYMBOL_GPL(gpiod_add_hogs); | |
3564 | ||
dd61b292 BG |
3565 | void gpiod_remove_hogs(struct gpiod_hog *hogs) |
3566 | { | |
3567 | struct gpiod_hog *hog; | |
3568 | ||
3569 | mutex_lock(&gpio_machine_hogs_mutex); | |
3570 | for (hog = &hogs[0]; hog->chip_label; hog++) | |
3571 | list_del(&hog->list); | |
3572 | mutex_unlock(&gpio_machine_hogs_mutex); | |
3573 | } | |
3574 | EXPORT_SYMBOL_GPL(gpiod_remove_hogs); | |
3575 | ||
ad824783 | 3576 | static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev) |
bae48da2 AC |
3577 | { |
3578 | const char *dev_id = dev ? dev_name(dev) : NULL; | |
ad824783 | 3579 | struct gpiod_lookup_table *table; |
bae48da2 AC |
3580 | |
3581 | mutex_lock(&gpio_lookup_lock); | |
3582 | ||
ad824783 AC |
3583 | list_for_each_entry(table, &gpio_lookup_list, list) { |
3584 | if (table->dev_id && dev_id) { | |
3585 | /* | |
3586 | * Valid strings on both ends, must be identical to have | |
3587 | * a match | |
3588 | */ | |
3589 | if (!strcmp(table->dev_id, dev_id)) | |
3590 | goto found; | |
3591 | } else { | |
3592 | /* | |
3593 | * One of the pointers is NULL, so both must be to have | |
3594 | * a match | |
3595 | */ | |
3596 | if (dev_id == table->dev_id) | |
3597 | goto found; | |
3598 | } | |
3599 | } | |
3600 | table = NULL; | |
bae48da2 | 3601 | |
ad824783 AC |
3602 | found: |
3603 | mutex_unlock(&gpio_lookup_lock); | |
3604 | return table; | |
3605 | } | |
bae48da2 | 3606 | |
ad824783 | 3607 | static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id, |
fed7026a | 3608 | unsigned int idx, unsigned long *flags) |
ad824783 | 3609 | { |
2a3cf6a3 | 3610 | struct gpio_desc *desc = ERR_PTR(-ENOENT); |
ad824783 AC |
3611 | struct gpiod_lookup_table *table; |
3612 | struct gpiod_lookup *p; | |
bae48da2 | 3613 | |
ad824783 AC |
3614 | table = gpiod_find_lookup_table(dev); |
3615 | if (!table) | |
3616 | return desc; | |
bae48da2 | 3617 | |
4c033b54 | 3618 | for (p = &table->table[0]; p->key; p++) { |
a0b66a73 | 3619 | struct gpio_chip *gc; |
bae48da2 | 3620 | |
ad824783 | 3621 | /* idx must always match exactly */ |
bae48da2 AC |
3622 | if (p->idx != idx) |
3623 | continue; | |
3624 | ||
ad824783 AC |
3625 | /* If the lookup entry has a con_id, require exact match */ |
3626 | if (p->con_id && (!con_id || strcmp(p->con_id, con_id))) | |
3627 | continue; | |
bae48da2 | 3628 | |
4c033b54 GU |
3629 | if (p->chip_hwnum == U16_MAX) { |
3630 | desc = gpio_name_to_desc(p->key); | |
3631 | if (desc) { | |
3632 | *flags = p->flags; | |
3633 | return desc; | |
3634 | } | |
3635 | ||
3636 | dev_warn(dev, "cannot find GPIO line %s, deferring\n", | |
3637 | p->key); | |
3638 | return ERR_PTR(-EPROBE_DEFER); | |
3639 | } | |
3640 | ||
3641 | gc = find_chip_by_name(p->key); | |
bae48da2 | 3642 | |
a0b66a73 | 3643 | if (!gc) { |
8853daf3 JK |
3644 | /* |
3645 | * As the lookup table indicates a chip with | |
4c033b54 | 3646 | * p->key should exist, assume it may |
8853daf3 JK |
3647 | * still appear later and let the interested |
3648 | * consumer be probed again or let the Deferred | |
3649 | * Probe infrastructure handle the error. | |
3650 | */ | |
3651 | dev_warn(dev, "cannot find GPIO chip %s, deferring\n", | |
4c033b54 | 3652 | p->key); |
8853daf3 | 3653 | return ERR_PTR(-EPROBE_DEFER); |
ad824783 | 3654 | } |
bae48da2 | 3655 | |
a0b66a73 | 3656 | if (gc->ngpio <= p->chip_hwnum) { |
2a3cf6a3 | 3657 | dev_err(dev, |
d935bd50 | 3658 | "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n", |
a0b66a73 LW |
3659 | idx, p->chip_hwnum, gc->ngpio - 1, |
3660 | gc->label); | |
2a3cf6a3 | 3661 | return ERR_PTR(-EINVAL); |
bae48da2 | 3662 | } |
bae48da2 | 3663 | |
a0b66a73 | 3664 | desc = gpiochip_get_desc(gc, p->chip_hwnum); |
ad824783 | 3665 | *flags = p->flags; |
bae48da2 | 3666 | |
2a3cf6a3 | 3667 | return desc; |
bae48da2 AC |
3668 | } |
3669 | ||
bae48da2 AC |
3670 | return desc; |
3671 | } | |
3672 | ||
66858527 RI |
3673 | static int platform_gpio_count(struct device *dev, const char *con_id) |
3674 | { | |
3675 | struct gpiod_lookup_table *table; | |
3676 | struct gpiod_lookup *p; | |
3677 | unsigned int count = 0; | |
3678 | ||
3679 | table = gpiod_find_lookup_table(dev); | |
3680 | if (!table) | |
3681 | return -ENOENT; | |
3682 | ||
4c033b54 | 3683 | for (p = &table->table[0]; p->key; p++) { |
66858527 RI |
3684 | if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) || |
3685 | (!con_id && !p->con_id)) | |
3686 | count++; | |
3687 | } | |
3688 | if (!count) | |
3689 | return -ENOENT; | |
3690 | ||
3691 | return count; | |
3692 | } | |
3693 | ||
13949fa9 DT |
3694 | /** |
3695 | * fwnode_gpiod_get_index - obtain a GPIO from firmware node | |
3696 | * @fwnode: handle of the firmware node | |
3697 | * @con_id: function within the GPIO consumer | |
3698 | * @index: index of the GPIO to obtain for the consumer | |
3699 | * @flags: GPIO initialization flags | |
3700 | * @label: label to attach to the requested GPIO | |
3701 | * | |
3702 | * This function can be used for drivers that get their configuration | |
3703 | * from opaque firmware. | |
3704 | * | |
3705 | * The function properly finds the corresponding GPIO using whatever is the | |
3706 | * underlying firmware interface and then makes sure that the GPIO | |
3707 | * descriptor is requested before it is returned to the caller. | |
3708 | * | |
3709 | * Returns: | |
3710 | * On successful request the GPIO pin is configured in accordance with | |
3711 | * provided @flags. | |
3712 | * | |
3713 | * In case of error an ERR_PTR() is returned. | |
3714 | */ | |
3715 | struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode, | |
3716 | const char *con_id, int index, | |
3717 | enum gpiod_flags flags, | |
3718 | const char *label) | |
3719 | { | |
3720 | struct gpio_desc *desc; | |
3721 | char prop_name[32]; /* 32 is max size of property name */ | |
3722 | unsigned int i; | |
3723 | ||
3724 | for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) { | |
3725 | if (con_id) | |
3726 | snprintf(prop_name, sizeof(prop_name), "%s-%s", | |
3727 | con_id, gpio_suffixes[i]); | |
3728 | else | |
3729 | snprintf(prop_name, sizeof(prop_name), "%s", | |
3730 | gpio_suffixes[i]); | |
3731 | ||
3732 | desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags, | |
3733 | label); | |
7b58696d | 3734 | if (!gpiod_not_found(desc)) |
13949fa9 DT |
3735 | break; |
3736 | } | |
3737 | ||
3738 | return desc; | |
3739 | } | |
3740 | EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index); | |
3741 | ||
66858527 RI |
3742 | /** |
3743 | * gpiod_count - return the number of GPIOs associated with a device / function | |
3744 | * or -ENOENT if no GPIO has been assigned to the requested function | |
3745 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
3746 | * @con_id: function within the GPIO consumer | |
3747 | */ | |
3748 | int gpiod_count(struct device *dev, const char *con_id) | |
3749 | { | |
944f4b0a | 3750 | const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL; |
66858527 RI |
3751 | int count = -ENOENT; |
3752 | ||
944f4b0a | 3753 | if (is_of_node(fwnode)) |
f626d6df | 3754 | count = of_gpio_get_count(dev, con_id); |
944f4b0a | 3755 | else if (is_acpi_node(fwnode)) |
66858527 RI |
3756 | count = acpi_gpio_count(dev, con_id); |
3757 | ||
3758 | if (count < 0) | |
3759 | count = platform_gpio_count(dev, con_id); | |
3760 | ||
3761 | return count; | |
3762 | } | |
3763 | EXPORT_SYMBOL_GPL(gpiod_count); | |
3764 | ||
bae48da2 | 3765 | /** |
0879162f | 3766 | * gpiod_get - obtain a GPIO for a given GPIO function |
ad824783 | 3767 | * @dev: GPIO consumer, can be NULL for system-global GPIOs |
bae48da2 | 3768 | * @con_id: function within the GPIO consumer |
39b2bbe3 | 3769 | * @flags: optional GPIO initialization flags |
bae48da2 AC |
3770 | * |
3771 | * Return the GPIO descriptor corresponding to the function con_id of device | |
2a3cf6a3 | 3772 | * dev, -ENOENT if no GPIO has been assigned to the requested function, or |
20a8a968 | 3773 | * another IS_ERR() code if an error occurred while trying to acquire the GPIO. |
bae48da2 | 3774 | */ |
b17d1bf1 | 3775 | struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id, |
39b2bbe3 | 3776 | enum gpiod_flags flags) |
bae48da2 | 3777 | { |
39b2bbe3 | 3778 | return gpiod_get_index(dev, con_id, 0, flags); |
bae48da2 | 3779 | } |
b17d1bf1 | 3780 | EXPORT_SYMBOL_GPL(gpiod_get); |
bae48da2 | 3781 | |
29a1f233 TR |
3782 | /** |
3783 | * gpiod_get_optional - obtain an optional GPIO for a given GPIO function | |
3784 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
3785 | * @con_id: function within the GPIO consumer | |
39b2bbe3 | 3786 | * @flags: optional GPIO initialization flags |
29a1f233 TR |
3787 | * |
3788 | * This is equivalent to gpiod_get(), except that when no GPIO was assigned to | |
3789 | * the requested function it will return NULL. This is convenient for drivers | |
3790 | * that need to handle optional GPIOs. | |
3791 | */ | |
b17d1bf1 | 3792 | struct gpio_desc *__must_check gpiod_get_optional(struct device *dev, |
39b2bbe3 AC |
3793 | const char *con_id, |
3794 | enum gpiod_flags flags) | |
29a1f233 | 3795 | { |
39b2bbe3 | 3796 | return gpiod_get_index_optional(dev, con_id, 0, flags); |
29a1f233 | 3797 | } |
b17d1bf1 | 3798 | EXPORT_SYMBOL_GPL(gpiod_get_optional); |
29a1f233 | 3799 | |
f625d460 BP |
3800 | |
3801 | /** | |
3802 | * gpiod_configure_flags - helper function to configure a given GPIO | |
3803 | * @desc: gpio whose value will be assigned | |
3804 | * @con_id: function within the GPIO consumer | |
fed7026a AS |
3805 | * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from |
3806 | * of_find_gpio() or of_get_gpio_hog() | |
f625d460 BP |
3807 | * @dflags: gpiod_flags - optional GPIO initialization flags |
3808 | * | |
3809 | * Return 0 on success, -ENOENT if no GPIO has been assigned to the | |
3810 | * requested function and/or index, or another IS_ERR() code if an error | |
3811 | * occurred while trying to acquire the GPIO. | |
3812 | */ | |
c29fd9eb | 3813 | int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id, |
85b03b30 | 3814 | unsigned long lflags, enum gpiod_flags dflags) |
f625d460 | 3815 | { |
d377f56f | 3816 | int ret; |
f625d460 | 3817 | |
85b03b30 JH |
3818 | if (lflags & GPIO_ACTIVE_LOW) |
3819 | set_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
f926dfc1 | 3820 | |
85b03b30 JH |
3821 | if (lflags & GPIO_OPEN_DRAIN) |
3822 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | |
f926dfc1 LW |
3823 | else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) { |
3824 | /* | |
3825 | * This enforces open drain mode from the consumer side. | |
3826 | * This is necessary for some busses like I2C, but the lookup | |
3827 | * should *REALLY* have specified them as open drain in the | |
3828 | * first place, so print a little warning here. | |
3829 | */ | |
3830 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | |
3831 | gpiod_warn(desc, | |
3832 | "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n"); | |
3833 | } | |
3834 | ||
85b03b30 JH |
3835 | if (lflags & GPIO_OPEN_SOURCE) |
3836 | set_bit(FLAG_OPEN_SOURCE, &desc->flags); | |
e10f72bf | 3837 | |
d449991c TP |
3838 | if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) { |
3839 | gpiod_err(desc, | |
3840 | "both pull-up and pull-down enabled, invalid configuration\n"); | |
3841 | return -EINVAL; | |
3842 | } | |
3843 | ||
3844 | if (lflags & GPIO_PULL_UP) | |
3845 | set_bit(FLAG_PULL_UP, &desc->flags); | |
3846 | else if (lflags & GPIO_PULL_DOWN) | |
3847 | set_bit(FLAG_PULL_DOWN, &desc->flags); | |
3848 | ||
d377f56f LW |
3849 | ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY)); |
3850 | if (ret < 0) | |
3851 | return ret; | |
85b03b30 | 3852 | |
f625d460 BP |
3853 | /* No particular flag request, return here... */ |
3854 | if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) { | |
262b9011 | 3855 | gpiod_dbg(desc, "no flags found for %s\n", con_id); |
f625d460 BP |
3856 | return 0; |
3857 | } | |
3858 | ||
3859 | /* Process flags */ | |
3860 | if (dflags & GPIOD_FLAGS_BIT_DIR_OUT) | |
d377f56f | 3861 | ret = gpiod_direction_output(desc, |
ad17731d | 3862 | !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL)); |
f625d460 | 3863 | else |
d377f56f | 3864 | ret = gpiod_direction_input(desc); |
f625d460 | 3865 | |
d377f56f | 3866 | return ret; |
f625d460 BP |
3867 | } |
3868 | ||
bae48da2 AC |
3869 | /** |
3870 | * gpiod_get_index - obtain a GPIO from a multi-index GPIO function | |
fdd6a5fe | 3871 | * @dev: GPIO consumer, can be NULL for system-global GPIOs |
bae48da2 AC |
3872 | * @con_id: function within the GPIO consumer |
3873 | * @idx: index of the GPIO to obtain in the consumer | |
39b2bbe3 | 3874 | * @flags: optional GPIO initialization flags |
bae48da2 AC |
3875 | * |
3876 | * This variant of gpiod_get() allows to access GPIOs other than the first | |
3877 | * defined one for functions that define several GPIOs. | |
3878 | * | |
2a3cf6a3 AC |
3879 | * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the |
3880 | * requested function and/or index, or another IS_ERR() code if an error | |
20a8a968 | 3881 | * occurred while trying to acquire the GPIO. |
bae48da2 | 3882 | */ |
b17d1bf1 | 3883 | struct gpio_desc *__must_check gpiod_get_index(struct device *dev, |
bae48da2 | 3884 | const char *con_id, |
39b2bbe3 AC |
3885 | unsigned int idx, |
3886 | enum gpiod_flags flags) | |
bae48da2 | 3887 | { |
2d6c06f5 | 3888 | unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT; |
35c5d7fd | 3889 | struct gpio_desc *desc = NULL; |
d377f56f | 3890 | int ret; |
7d18f0a1 LW |
3891 | /* Maybe we have a device name, maybe not */ |
3892 | const char *devname = dev ? dev_name(dev) : "?"; | |
944f4b0a | 3893 | const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL; |
bae48da2 AC |
3894 | |
3895 | dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id); | |
3896 | ||
944f4b0a AS |
3897 | /* Using device tree? */ |
3898 | if (is_of_node(fwnode)) { | |
3899 | dev_dbg(dev, "using device tree for GPIO lookup\n"); | |
3900 | desc = of_find_gpio(dev, con_id, idx, &lookupflags); | |
3901 | } else if (is_acpi_node(fwnode)) { | |
3902 | dev_dbg(dev, "using ACPI for GPIO lookup\n"); | |
3903 | desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags); | |
35c5d7fd AC |
3904 | } |
3905 | ||
3906 | /* | |
3907 | * Either we are not using DT or ACPI, or their lookup did not return | |
3908 | * a result. In that case, use platform lookup as a fallback. | |
3909 | */ | |
7b58696d | 3910 | if (!desc || gpiod_not_found(desc)) { |
43a8785a | 3911 | dev_dbg(dev, "using lookup tables for GPIO lookup\n"); |
39b2bbe3 | 3912 | desc = gpiod_find(dev, con_id, idx, &lookupflags); |
bae48da2 AC |
3913 | } |
3914 | ||
3915 | if (IS_ERR(desc)) { | |
9d5a1f2c | 3916 | dev_dbg(dev, "No GPIO consumer %s found\n", con_id); |
bae48da2 AC |
3917 | return desc; |
3918 | } | |
3919 | ||
7d18f0a1 LW |
3920 | /* |
3921 | * If a connection label was passed use that, else attempt to use | |
3922 | * the device name as label | |
3923 | */ | |
d377f56f | 3924 | ret = gpiod_request(desc, con_id ? con_id : devname); |
8bbff39c | 3925 | if (ret) { |
d377f56f | 3926 | if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) { |
b0ce7b29 LW |
3927 | /* |
3928 | * This happens when there are several consumers for | |
3929 | * the same GPIO line: we just return here without | |
3930 | * further initialization. It is a bit if a hack. | |
3931 | * This is necessary to support fixed regulators. | |
3932 | * | |
3933 | * FIXME: Make this more sane and safe. | |
3934 | */ | |
3935 | dev_info(dev, "nonexclusive access to GPIO for %s\n", | |
3936 | con_id ? con_id : devname); | |
3937 | return desc; | |
3938 | } else { | |
d377f56f | 3939 | return ERR_PTR(ret); |
b0ce7b29 LW |
3940 | } |
3941 | } | |
bae48da2 | 3942 | |
d377f56f | 3943 | ret = gpiod_configure_flags(desc, con_id, lookupflags, flags); |
6392cca4 | 3944 | if (ret < 0) { |
39b2bbe3 | 3945 | dev_dbg(dev, "setup of GPIO %s failed\n", con_id); |
6392cca4 LW |
3946 | gpiod_put(desc); |
3947 | return ERR_PTR(ret); | |
3948 | } | |
3949 | ||
6accc376 KG |
3950 | blocking_notifier_call_chain(&desc->gdev->notifier, |
3951 | GPIOLINE_CHANGED_REQUESTED, desc); | |
9fefca77 | 3952 | |
6392cca4 LW |
3953 | return desc; |
3954 | } | |
b17d1bf1 | 3955 | EXPORT_SYMBOL_GPL(gpiod_get_index); |
6392cca4 | 3956 | |
40b73183 MW |
3957 | /** |
3958 | * fwnode_get_named_gpiod - obtain a GPIO from firmware node | |
3959 | * @fwnode: handle of the firmware node | |
3960 | * @propname: name of the firmware property representing the GPIO | |
6392cca4 | 3961 | * @index: index of the GPIO to obtain for the consumer |
a264d10f | 3962 | * @dflags: GPIO initialization flags |
950d55f5 | 3963 | * @label: label to attach to the requested GPIO |
40b73183 MW |
3964 | * |
3965 | * This function can be used for drivers that get their configuration | |
6392cca4 | 3966 | * from opaque firmware. |
40b73183 | 3967 | * |
6392cca4 | 3968 | * The function properly finds the corresponding GPIO using whatever is the |
40b73183 MW |
3969 | * underlying firmware interface and then makes sure that the GPIO |
3970 | * descriptor is requested before it is returned to the caller. | |
3971 | * | |
950d55f5 | 3972 | * Returns: |
ff21378a | 3973 | * On successful request the GPIO pin is configured in accordance with |
a264d10f AS |
3974 | * provided @dflags. |
3975 | * | |
40b73183 MW |
3976 | * In case of error an ERR_PTR() is returned. |
3977 | */ | |
3978 | struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode, | |
537b94da | 3979 | const char *propname, int index, |
b2987d74 AS |
3980 | enum gpiod_flags dflags, |
3981 | const char *label) | |
40b73183 | 3982 | { |
2d6c06f5 | 3983 | unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT; |
40b73183 | 3984 | struct gpio_desc *desc = ERR_PTR(-ENODEV); |
40b73183 MW |
3985 | int ret; |
3986 | ||
40b73183 | 3987 | if (is_of_node(fwnode)) { |
6392cca4 LW |
3988 | desc = gpiod_get_from_of_node(to_of_node(fwnode), |
3989 | propname, index, | |
3990 | dflags, | |
3991 | label); | |
3992 | return desc; | |
40b73183 MW |
3993 | } else if (is_acpi_node(fwnode)) { |
3994 | struct acpi_gpio_info info; | |
3995 | ||
537b94da | 3996 | desc = acpi_node_get_gpiod(fwnode, propname, index, &info); |
6392cca4 LW |
3997 | if (IS_ERR(desc)) |
3998 | return desc; | |
40b73183 | 3999 | |
6392cca4 | 4000 | acpi_gpio_update_gpiod_flags(&dflags, &info); |
606be344 | 4001 | acpi_gpio_update_gpiod_lookup_flags(&lflags, &info); |
944f4b0a AS |
4002 | } else |
4003 | return ERR_PTR(-EINVAL); | |
40b73183 | 4004 | |
6392cca4 | 4005 | /* Currently only ACPI takes this path */ |
b2987d74 | 4006 | ret = gpiod_request(desc, label); |
85b03b30 JH |
4007 | if (ret) |
4008 | return ERR_PTR(ret); | |
4009 | ||
a264d10f AS |
4010 | ret = gpiod_configure_flags(desc, propname, lflags, dflags); |
4011 | if (ret < 0) { | |
4012 | gpiod_put(desc); | |
4013 | return ERR_PTR(ret); | |
90b665f6 LP |
4014 | } |
4015 | ||
6accc376 KG |
4016 | blocking_notifier_call_chain(&desc->gdev->notifier, |
4017 | GPIOLINE_CHANGED_REQUESTED, desc); | |
9fefca77 | 4018 | |
40b73183 MW |
4019 | return desc; |
4020 | } | |
4021 | EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod); | |
4022 | ||
29a1f233 TR |
4023 | /** |
4024 | * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO | |
4025 | * function | |
4026 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4027 | * @con_id: function within the GPIO consumer | |
4028 | * @index: index of the GPIO to obtain in the consumer | |
39b2bbe3 | 4029 | * @flags: optional GPIO initialization flags |
29a1f233 TR |
4030 | * |
4031 | * This is equivalent to gpiod_get_index(), except that when no GPIO with the | |
4032 | * specified index was assigned to the requested function it will return NULL. | |
4033 | * This is convenient for drivers that need to handle optional GPIOs. | |
4034 | */ | |
b17d1bf1 | 4035 | struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev, |
29a1f233 | 4036 | const char *con_id, |
39b2bbe3 AC |
4037 | unsigned int index, |
4038 | enum gpiod_flags flags) | |
29a1f233 TR |
4039 | { |
4040 | struct gpio_desc *desc; | |
4041 | ||
39b2bbe3 | 4042 | desc = gpiod_get_index(dev, con_id, index, flags); |
7b58696d AS |
4043 | if (gpiod_not_found(desc)) |
4044 | return NULL; | |
29a1f233 TR |
4045 | |
4046 | return desc; | |
4047 | } | |
b17d1bf1 | 4048 | EXPORT_SYMBOL_GPL(gpiod_get_index_optional); |
29a1f233 | 4049 | |
f625d460 BP |
4050 | /** |
4051 | * gpiod_hog - Hog the specified GPIO desc given the provided flags | |
4052 | * @desc: gpio whose value will be assigned | |
4053 | * @name: gpio line name | |
fed7026a AS |
4054 | * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from |
4055 | * of_find_gpio() or of_get_gpio_hog() | |
f625d460 BP |
4056 | * @dflags: gpiod_flags - optional GPIO initialization flags |
4057 | */ | |
4058 | int gpiod_hog(struct gpio_desc *desc, const char *name, | |
4059 | unsigned long lflags, enum gpiod_flags dflags) | |
4060 | { | |
a0b66a73 | 4061 | struct gpio_chip *gc; |
f625d460 BP |
4062 | struct gpio_desc *local_desc; |
4063 | int hwnum; | |
d377f56f | 4064 | int ret; |
f625d460 | 4065 | |
a0b66a73 | 4066 | gc = gpiod_to_chip(desc); |
f625d460 BP |
4067 | hwnum = gpio_chip_hwgpio(desc); |
4068 | ||
a0b66a73 | 4069 | local_desc = gpiochip_request_own_desc(gc, hwnum, name, |
5923ea6c | 4070 | lflags, dflags); |
f625d460 | 4071 | if (IS_ERR(local_desc)) { |
d377f56f | 4072 | ret = PTR_ERR(local_desc); |
c31a571d | 4073 | pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n", |
a0b66a73 | 4074 | name, gc->label, hwnum, ret); |
d377f56f | 4075 | return ret; |
f625d460 BP |
4076 | } |
4077 | ||
f625d460 BP |
4078 | /* Mark GPIO as hogged so it can be identified and removed later */ |
4079 | set_bit(FLAG_IS_HOGGED, &desc->flags); | |
4080 | ||
262b9011 | 4081 | gpiod_info(desc, "hogged as %s%s\n", |
b27f300f BG |
4082 | (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input", |
4083 | (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? | |
4084 | (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : ""); | |
f625d460 BP |
4085 | |
4086 | return 0; | |
4087 | } | |
4088 | ||
4089 | /** | |
4090 | * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog | |
a0b66a73 | 4091 | * @gc: gpio chip to act on |
f625d460 | 4092 | */ |
a0b66a73 | 4093 | static void gpiochip_free_hogs(struct gpio_chip *gc) |
f625d460 BP |
4094 | { |
4095 | int id; | |
4096 | ||
a0b66a73 LW |
4097 | for (id = 0; id < gc->ngpio; id++) { |
4098 | if (test_bit(FLAG_IS_HOGGED, &gc->gpiodev->descs[id].flags)) | |
4099 | gpiochip_free_own_desc(&gc->gpiodev->descs[id]); | |
f625d460 BP |
4100 | } |
4101 | } | |
4102 | ||
66858527 RI |
4103 | /** |
4104 | * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function | |
4105 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4106 | * @con_id: function within the GPIO consumer | |
4107 | * @flags: optional GPIO initialization flags | |
4108 | * | |
4109 | * This function acquires all the GPIOs defined under a given function. | |
4110 | * | |
4111 | * Return a struct gpio_descs containing an array of descriptors, -ENOENT if | |
4112 | * no GPIO has been assigned to the requested function, or another IS_ERR() | |
4113 | * code if an error occurred while trying to acquire the GPIOs. | |
4114 | */ | |
4115 | struct gpio_descs *__must_check gpiod_get_array(struct device *dev, | |
4116 | const char *con_id, | |
4117 | enum gpiod_flags flags) | |
4118 | { | |
4119 | struct gpio_desc *desc; | |
4120 | struct gpio_descs *descs; | |
bf9346f5 | 4121 | struct gpio_array *array_info = NULL; |
a0b66a73 | 4122 | struct gpio_chip *gc; |
bf9346f5 | 4123 | int count, bitmap_size; |
66858527 RI |
4124 | |
4125 | count = gpiod_count(dev, con_id); | |
4126 | if (count < 0) | |
4127 | return ERR_PTR(count); | |
4128 | ||
acafe7e3 | 4129 | descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL); |
66858527 RI |
4130 | if (!descs) |
4131 | return ERR_PTR(-ENOMEM); | |
4132 | ||
4133 | for (descs->ndescs = 0; descs->ndescs < count; ) { | |
4134 | desc = gpiod_get_index(dev, con_id, descs->ndescs, flags); | |
4135 | if (IS_ERR(desc)) { | |
4136 | gpiod_put_array(descs); | |
4137 | return ERR_CAST(desc); | |
4138 | } | |
bf9346f5 | 4139 | |
66858527 | 4140 | descs->desc[descs->ndescs] = desc; |
bf9346f5 | 4141 | |
a0b66a73 | 4142 | gc = gpiod_to_chip(desc); |
bf9346f5 | 4143 | /* |
c4c958aa JK |
4144 | * If pin hardware number of array member 0 is also 0, select |
4145 | * its chip as a candidate for fast bitmap processing path. | |
bf9346f5 | 4146 | */ |
c4c958aa | 4147 | if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) { |
bf9346f5 JK |
4148 | struct gpio_descs *array; |
4149 | ||
a0b66a73 LW |
4150 | bitmap_size = BITS_TO_LONGS(gc->ngpio > count ? |
4151 | gc->ngpio : count); | |
bf9346f5 JK |
4152 | |
4153 | array = kzalloc(struct_size(descs, desc, count) + | |
4154 | struct_size(array_info, invert_mask, | |
4155 | 3 * bitmap_size), GFP_KERNEL); | |
4156 | if (!array) { | |
4157 | gpiod_put_array(descs); | |
4158 | return ERR_PTR(-ENOMEM); | |
4159 | } | |
4160 | ||
4161 | memcpy(array, descs, | |
4162 | struct_size(descs, desc, descs->ndescs + 1)); | |
4163 | kfree(descs); | |
4164 | ||
4165 | descs = array; | |
4166 | array_info = (void *)(descs->desc + count); | |
4167 | array_info->get_mask = array_info->invert_mask + | |
4168 | bitmap_size; | |
4169 | array_info->set_mask = array_info->get_mask + | |
4170 | bitmap_size; | |
4171 | ||
4172 | array_info->desc = descs->desc; | |
4173 | array_info->size = count; | |
a0b66a73 | 4174 | array_info->chip = gc; |
bf9346f5 JK |
4175 | bitmap_set(array_info->get_mask, descs->ndescs, |
4176 | count - descs->ndescs); | |
4177 | bitmap_set(array_info->set_mask, descs->ndescs, | |
4178 | count - descs->ndescs); | |
4179 | descs->info = array_info; | |
4180 | } | |
c4c958aa | 4181 | /* Unmark array members which don't belong to the 'fast' chip */ |
a0b66a73 | 4182 | if (array_info && array_info->chip != gc) { |
bf9346f5 JK |
4183 | __clear_bit(descs->ndescs, array_info->get_mask); |
4184 | __clear_bit(descs->ndescs, array_info->set_mask); | |
c4c958aa JK |
4185 | } |
4186 | /* | |
4187 | * Detect array members which belong to the 'fast' chip | |
4188 | * but their pins are not in hardware order. | |
4189 | */ | |
4190 | else if (array_info && | |
4191 | gpio_chip_hwgpio(desc) != descs->ndescs) { | |
4192 | /* | |
4193 | * Don't use fast path if all array members processed so | |
4194 | * far belong to the same chip as this one but its pin | |
4195 | * hardware number is different from its array index. | |
4196 | */ | |
4197 | if (bitmap_full(array_info->get_mask, descs->ndescs)) { | |
4198 | array_info = NULL; | |
4199 | } else { | |
4200 | __clear_bit(descs->ndescs, | |
4201 | array_info->get_mask); | |
4202 | __clear_bit(descs->ndescs, | |
4203 | array_info->set_mask); | |
4204 | } | |
bf9346f5 JK |
4205 | } else if (array_info) { |
4206 | /* Exclude open drain or open source from fast output */ | |
a0b66a73 LW |
4207 | if (gpiochip_line_is_open_drain(gc, descs->ndescs) || |
4208 | gpiochip_line_is_open_source(gc, descs->ndescs)) | |
bf9346f5 JK |
4209 | __clear_bit(descs->ndescs, |
4210 | array_info->set_mask); | |
4211 | /* Identify 'fast' pins which require invertion */ | |
4212 | if (gpiod_is_active_low(desc)) | |
4213 | __set_bit(descs->ndescs, | |
4214 | array_info->invert_mask); | |
4215 | } | |
4216 | ||
66858527 RI |
4217 | descs->ndescs++; |
4218 | } | |
bf9346f5 JK |
4219 | if (array_info) |
4220 | dev_dbg(dev, | |
4221 | "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n", | |
4222 | array_info->chip->label, array_info->size, | |
4223 | *array_info->get_mask, *array_info->set_mask, | |
4224 | *array_info->invert_mask); | |
66858527 RI |
4225 | return descs; |
4226 | } | |
4227 | EXPORT_SYMBOL_GPL(gpiod_get_array); | |
4228 | ||
4229 | /** | |
4230 | * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO | |
4231 | * function | |
4232 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4233 | * @con_id: function within the GPIO consumer | |
4234 | * @flags: optional GPIO initialization flags | |
4235 | * | |
4236 | * This is equivalent to gpiod_get_array(), except that when no GPIO was | |
4237 | * assigned to the requested function it will return NULL. | |
4238 | */ | |
4239 | struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev, | |
4240 | const char *con_id, | |
4241 | enum gpiod_flags flags) | |
4242 | { | |
4243 | struct gpio_descs *descs; | |
4244 | ||
4245 | descs = gpiod_get_array(dev, con_id, flags); | |
7b58696d | 4246 | if (gpiod_not_found(descs)) |
66858527 RI |
4247 | return NULL; |
4248 | ||
4249 | return descs; | |
4250 | } | |
4251 | EXPORT_SYMBOL_GPL(gpiod_get_array_optional); | |
4252 | ||
bae48da2 AC |
4253 | /** |
4254 | * gpiod_put - dispose of a GPIO descriptor | |
4255 | * @desc: GPIO descriptor to dispose of | |
4256 | * | |
4257 | * No descriptor can be used after gpiod_put() has been called on it. | |
4258 | */ | |
4259 | void gpiod_put(struct gpio_desc *desc) | |
4260 | { | |
1d7765ba AS |
4261 | if (desc) |
4262 | gpiod_free(desc); | |
372e722e | 4263 | } |
bae48da2 | 4264 | EXPORT_SYMBOL_GPL(gpiod_put); |
d2876d08 | 4265 | |
66858527 RI |
4266 | /** |
4267 | * gpiod_put_array - dispose of multiple GPIO descriptors | |
4268 | * @descs: struct gpio_descs containing an array of descriptors | |
4269 | */ | |
4270 | void gpiod_put_array(struct gpio_descs *descs) | |
4271 | { | |
4272 | unsigned int i; | |
4273 | ||
4274 | for (i = 0; i < descs->ndescs; i++) | |
4275 | gpiod_put(descs->desc[i]); | |
4276 | ||
4277 | kfree(descs); | |
4278 | } | |
4279 | EXPORT_SYMBOL_GPL(gpiod_put_array); | |
4280 | ||
ced2af41 SK |
4281 | |
4282 | static int gpio_bus_match(struct device *dev, struct device_driver *drv) | |
4283 | { | |
1df62542 AS |
4284 | struct fwnode_handle *fwnode = dev_fwnode(dev); |
4285 | ||
ced2af41 SK |
4286 | /* |
4287 | * Only match if the fwnode doesn't already have a proper struct device | |
4288 | * created for it. | |
4289 | */ | |
1df62542 | 4290 | if (fwnode && fwnode->dev != dev) |
ced2af41 SK |
4291 | return 0; |
4292 | return 1; | |
4293 | } | |
4294 | ||
4731210c SK |
4295 | static int gpio_stub_drv_probe(struct device *dev) |
4296 | { | |
4297 | /* | |
4298 | * The DT node of some GPIO chips have a "compatible" property, but | |
4299 | * never have a struct device added and probed by a driver to register | |
4300 | * the GPIO chip with gpiolib. In such cases, fw_devlink=on will cause | |
4301 | * the consumers of the GPIO chip to get probe deferred forever because | |
4302 | * they will be waiting for a device associated with the GPIO chip | |
4303 | * firmware node to get added and bound to a driver. | |
4304 | * | |
4305 | * To allow these consumers to probe, we associate the struct | |
4306 | * gpio_device of the GPIO chip with the firmware node and then simply | |
4307 | * bind it to this stub driver. | |
4308 | */ | |
4309 | return 0; | |
4310 | } | |
4311 | ||
4312 | static struct device_driver gpio_stub_drv = { | |
4313 | .name = "gpio_stub_drv", | |
4314 | .bus = &gpio_bus_type, | |
4315 | .probe = gpio_stub_drv_probe, | |
4316 | }; | |
4317 | ||
3c702e99 LW |
4318 | static int __init gpiolib_dev_init(void) |
4319 | { | |
4320 | int ret; | |
4321 | ||
4322 | /* Register GPIO sysfs bus */ | |
b1911710 | 4323 | ret = bus_register(&gpio_bus_type); |
3c702e99 LW |
4324 | if (ret < 0) { |
4325 | pr_err("gpiolib: could not register GPIO bus type\n"); | |
4326 | return ret; | |
4327 | } | |
4328 | ||
3875721e WY |
4329 | ret = driver_register(&gpio_stub_drv); |
4330 | if (ret < 0) { | |
4731210c SK |
4331 | pr_err("gpiolib: could not register GPIO stub driver\n"); |
4332 | bus_unregister(&gpio_bus_type); | |
4333 | return ret; | |
4334 | } | |
4335 | ||
ddd8891e | 4336 | ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME); |
3c702e99 LW |
4337 | if (ret < 0) { |
4338 | pr_err("gpiolib: failed to allocate char dev region\n"); | |
4731210c | 4339 | driver_unregister(&gpio_stub_drv); |
3c702e99 | 4340 | bus_unregister(&gpio_bus_type); |
63636d95 | 4341 | return ret; |
3c702e99 | 4342 | } |
63636d95 GU |
4343 | |
4344 | gpiolib_initialized = true; | |
4345 | gpiochip_setup_devs(); | |
4346 | ||
8650b609 DG |
4347 | #if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO) |
4348 | WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier)); | |
4349 | #endif /* CONFIG_OF_DYNAMIC && CONFIG_OF_GPIO */ | |
63636d95 | 4350 | |
3c702e99 LW |
4351 | return ret; |
4352 | } | |
4353 | core_initcall(gpiolib_dev_init); | |
4354 | ||
d2876d08 DB |
4355 | #ifdef CONFIG_DEBUG_FS |
4356 | ||
fdeb8e15 | 4357 | static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev) |
d2876d08 DB |
4358 | { |
4359 | unsigned i; | |
a0b66a73 | 4360 | struct gpio_chip *gc = gdev->chip; |
fdeb8e15 LW |
4361 | unsigned gpio = gdev->base; |
4362 | struct gpio_desc *gdesc = &gdev->descs[0]; | |
90fd2270 LW |
4363 | bool is_out; |
4364 | bool is_irq; | |
4365 | bool active_low; | |
d2876d08 | 4366 | |
fdeb8e15 | 4367 | for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) { |
ced433e2 MP |
4368 | if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) { |
4369 | if (gdesc->name) { | |
4370 | seq_printf(s, " gpio-%-3d (%-20.20s)\n", | |
4371 | gpio, gdesc->name); | |
4372 | } | |
d2876d08 | 4373 | continue; |
ced433e2 | 4374 | } |
d2876d08 | 4375 | |
372e722e | 4376 | gpiod_get_direction(gdesc); |
d2876d08 | 4377 | is_out = test_bit(FLAG_IS_OUT, &gdesc->flags); |
d468bf9e | 4378 | is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags); |
90fd2270 LW |
4379 | active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags); |
4380 | seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s", | |
ced433e2 | 4381 | gpio, gdesc->name ? gdesc->name : "", gdesc->label, |
d2876d08 | 4382 | is_out ? "out" : "in ", |
a0b66a73 | 4383 | gc->get ? (gc->get(gc, i) ? "hi" : "lo") : "? ", |
90fd2270 LW |
4384 | is_irq ? "IRQ " : "", |
4385 | active_low ? "ACTIVE LOW" : ""); | |
d2876d08 DB |
4386 | seq_printf(s, "\n"); |
4387 | } | |
4388 | } | |
4389 | ||
f9c4a31f | 4390 | static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos) |
d2876d08 | 4391 | { |
362432ae | 4392 | unsigned long flags; |
ff2b1359 | 4393 | struct gpio_device *gdev = NULL; |
cb1650d4 | 4394 | loff_t index = *pos; |
d2876d08 | 4395 | |
f9c4a31f | 4396 | s->private = ""; |
d2876d08 | 4397 | |
362432ae | 4398 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 4399 | list_for_each_entry(gdev, &gpio_devices, list) |
362432ae GL |
4400 | if (index-- == 0) { |
4401 | spin_unlock_irqrestore(&gpio_lock, flags); | |
ff2b1359 | 4402 | return gdev; |
f9c4a31f | 4403 | } |
362432ae | 4404 | spin_unlock_irqrestore(&gpio_lock, flags); |
f9c4a31f | 4405 | |
cb1650d4 | 4406 | return NULL; |
f9c4a31f TR |
4407 | } |
4408 | ||
4409 | static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos) | |
4410 | { | |
362432ae | 4411 | unsigned long flags; |
ff2b1359 | 4412 | struct gpio_device *gdev = v; |
f9c4a31f TR |
4413 | void *ret = NULL; |
4414 | ||
362432ae | 4415 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 4416 | if (list_is_last(&gdev->list, &gpio_devices)) |
cb1650d4 AC |
4417 | ret = NULL; |
4418 | else | |
ff2b1359 | 4419 | ret = list_entry(gdev->list.next, struct gpio_device, list); |
362432ae | 4420 | spin_unlock_irqrestore(&gpio_lock, flags); |
f9c4a31f TR |
4421 | |
4422 | s->private = "\n"; | |
4423 | ++*pos; | |
4424 | ||
4425 | return ret; | |
4426 | } | |
4427 | ||
4428 | static void gpiolib_seq_stop(struct seq_file *s, void *v) | |
4429 | { | |
4430 | } | |
4431 | ||
4432 | static int gpiolib_seq_show(struct seq_file *s, void *v) | |
4433 | { | |
ff2b1359 | 4434 | struct gpio_device *gdev = v; |
a0b66a73 | 4435 | struct gpio_chip *gc = gdev->chip; |
ff2b1359 LW |
4436 | struct device *parent; |
4437 | ||
a0b66a73 | 4438 | if (!gc) { |
ff2b1359 LW |
4439 | seq_printf(s, "%s%s: (dangling chip)", (char *)s->private, |
4440 | dev_name(&gdev->dev)); | |
4441 | return 0; | |
4442 | } | |
f9c4a31f | 4443 | |
ff2b1359 LW |
4444 | seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private, |
4445 | dev_name(&gdev->dev), | |
fdeb8e15 | 4446 | gdev->base, gdev->base + gdev->ngpio - 1); |
a0b66a73 | 4447 | parent = gc->parent; |
ff2b1359 LW |
4448 | if (parent) |
4449 | seq_printf(s, ", parent: %s/%s", | |
4450 | parent->bus ? parent->bus->name : "no-bus", | |
4451 | dev_name(parent)); | |
a0b66a73 LW |
4452 | if (gc->label) |
4453 | seq_printf(s, ", %s", gc->label); | |
4454 | if (gc->can_sleep) | |
f9c4a31f TR |
4455 | seq_printf(s, ", can sleep"); |
4456 | seq_printf(s, ":\n"); | |
4457 | ||
a0b66a73 LW |
4458 | if (gc->dbg_show) |
4459 | gc->dbg_show(s, gc); | |
f9c4a31f | 4460 | else |
fdeb8e15 | 4461 | gpiolib_dbg_show(s, gdev); |
f9c4a31f | 4462 | |
d2876d08 DB |
4463 | return 0; |
4464 | } | |
4465 | ||
425c5b3e | 4466 | static const struct seq_operations gpiolib_sops = { |
f9c4a31f TR |
4467 | .start = gpiolib_seq_start, |
4468 | .next = gpiolib_seq_next, | |
4469 | .stop = gpiolib_seq_stop, | |
4470 | .show = gpiolib_seq_show, | |
4471 | }; | |
425c5b3e | 4472 | DEFINE_SEQ_ATTRIBUTE(gpiolib); |
d2876d08 DB |
4473 | |
4474 | static int __init gpiolib_debugfs_init(void) | |
4475 | { | |
4476 | /* /sys/kernel/debug/gpio */ | |
425c5b3e | 4477 | debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops); |
d2876d08 DB |
4478 | return 0; |
4479 | } | |
4480 | subsys_initcall(gpiolib_debugfs_init); | |
4481 | ||
4482 | #endif /* DEBUG_FS */ |