gpiolib: Add support for the irqdomain which doesn't use irq_fwspec as arg
[linux-block.git] / drivers / gpio / gpiolib.c
CommitLineData
dae5f0af 1// SPDX-License-Identifier: GPL-2.0
923a654c 2#include <linux/bitmap.h>
d2876d08
DB
3#include <linux/kernel.h>
4#include <linux/module.h>
ff77c352 5#include <linux/interrupt.h>
d2876d08
DB
6#include <linux/irq.h>
7#include <linux/spinlock.h>
1a989d0f 8#include <linux/list.h>
d8f388d8
DB
9#include <linux/device.h>
10#include <linux/err.h>
11#include <linux/debugfs.h>
12#include <linux/seq_file.h>
13#include <linux/gpio.h>
ff77c352 14#include <linux/idr.h>
5a0e3ad6 15#include <linux/slab.h>
7b199811 16#include <linux/acpi.h>
53e7cac3 17#include <linux/gpio/driver.h>
0a6d3158 18#include <linux/gpio/machine.h>
c771c2f4 19#include <linux/pinctrl/consumer.h>
3c702e99
LW
20#include <linux/cdev.h>
21#include <linux/fs.h>
22#include <linux/uaccess.h>
8b92e17e 23#include <linux/compat.h>
d7c51b47 24#include <linux/anon_inodes.h>
953b956a 25#include <linux/file.h>
61f922db
LW
26#include <linux/kfifo.h>
27#include <linux/poll.h>
28#include <linux/timekeeping.h>
3c702e99 29#include <uapi/linux/gpio.h>
d2876d08 30
664e3e5a 31#include "gpiolib.h"
f626d6df 32#include "gpiolib-of.h"
77cb907a 33#include "gpiolib-acpi.h"
664e3e5a 34
3f397c21
UKK
35#define CREATE_TRACE_POINTS
36#include <trace/events/gpio.h>
d2876d08 37
79a9becd 38/* Implementation infrastructure for GPIO interfaces.
d2876d08 39 *
79a9becd
AC
40 * The GPIO programming interface allows for inlining speed-critical
41 * get/set operations for common cases, so that access to SOC-integrated
42 * GPIOs can sometimes cost only an instruction or two per bit.
d2876d08
DB
43 */
44
45
46/* When debugging, extend minimal trust to callers and platform code.
47 * Also emit diagnostic messages that may help initial bringup, when
48 * board setup or driver bugs are most common.
49 *
50 * Otherwise, minimize overhead in what may be bitbanging codepaths.
51 */
52#ifdef DEBUG
53#define extra_checks 1
54#else
55#define extra_checks 0
56#endif
57
ff2b1359
LW
58/* Device and char device-related information */
59static DEFINE_IDA(gpio_ida);
3c702e99
LW
60static dev_t gpio_devt;
61#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
62static struct bus_type gpio_bus_type = {
63 .name = "gpio",
64};
ff2b1359 65
3027743f
LA
66/*
67 * Number of GPIOs to use for the fast path in set array
68 */
69#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
70
d2876d08
DB
71/* gpio_lock prevents conflicts during gpio_desc[] table updates.
72 * While any GPIO is requested, its gpio_chip is not removable;
73 * each GPIO's "requested" flag serves as a lock and refcount.
74 */
0eb4c6c2 75DEFINE_SPINLOCK(gpio_lock);
d2876d08 76
bae48da2
AC
77static DEFINE_MUTEX(gpio_lookup_lock);
78static LIST_HEAD(gpio_lookup_list);
ff2b1359 79LIST_HEAD(gpio_devices);
6d86750c 80
a411e81e
BG
81static DEFINE_MUTEX(gpio_machine_hogs_mutex);
82static LIST_HEAD(gpio_machine_hogs);
83
6d86750c 84static void gpiochip_free_hogs(struct gpio_chip *chip);
959bc7b2 85static int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
86 struct lock_class_key *lock_key,
87 struct lock_class_key *request_key);
6d86750c 88static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip);
9411e3aa 89static int gpiochip_irqchip_init_hw(struct gpio_chip *gpiochip);
79b804cb
MW
90static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip);
91static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip);
6d86750c 92
159f3cd9 93static bool gpiolib_initialized;
6d86750c 94
d2876d08
DB
95static inline void desc_set_label(struct gpio_desc *d, const char *label)
96{
d2876d08 97 d->label = label;
d2876d08
DB
98}
99
372e722e 100/**
950d55f5
TR
101 * gpio_to_desc - Convert a GPIO number to its descriptor
102 * @gpio: global GPIO number
103 *
104 * Returns:
105 * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
106 * with the given number exists in the system.
372e722e 107 */
79a9becd 108struct gpio_desc *gpio_to_desc(unsigned gpio)
372e722e 109{
ff2b1359 110 struct gpio_device *gdev;
14e85c0e
AC
111 unsigned long flags;
112
113 spin_lock_irqsave(&gpio_lock, flags);
114
ff2b1359 115 list_for_each_entry(gdev, &gpio_devices, list) {
fdeb8e15
LW
116 if (gdev->base <= gpio &&
117 gdev->base + gdev->ngpio > gpio) {
14e85c0e 118 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 119 return &gdev->descs[gpio - gdev->base];
14e85c0e
AC
120 }
121 }
122
123 spin_unlock_irqrestore(&gpio_lock, flags);
124
0e9a5edf
AC
125 if (!gpio_is_valid(gpio))
126 WARN(1, "invalid GPIO %d\n", gpio);
127
14e85c0e 128 return NULL;
372e722e 129}
79a9becd 130EXPORT_SYMBOL_GPL(gpio_to_desc);
372e722e 131
d468bf9e 132/**
950d55f5
TR
133 * gpiochip_get_desc - get the GPIO descriptor corresponding to the given
134 * hardware number for this chip
135 * @chip: GPIO chip
136 * @hwnum: hardware number of the GPIO for this chip
137 *
138 * Returns:
139 * A pointer to the GPIO descriptor or %ERR_PTR(-EINVAL) if no GPIO exists
140 * in the given chip for the specified hardware number.
d468bf9e 141 */
bb1e88cc
AC
142struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip,
143 u16 hwnum)
d468bf9e 144{
fdeb8e15
LW
145 struct gpio_device *gdev = chip->gpiodev;
146
147 if (hwnum >= gdev->ngpio)
b7d0a28a 148 return ERR_PTR(-EINVAL);
d468bf9e 149
fdeb8e15 150 return &gdev->descs[hwnum];
d468bf9e 151}
372e722e
AC
152
153/**
950d55f5
TR
154 * desc_to_gpio - convert a GPIO descriptor to the integer namespace
155 * @desc: GPIO descriptor
156 *
372e722e 157 * This should disappear in the future but is needed since we still
950d55f5
TR
158 * use GPIO numbers for error messages and sysfs nodes.
159 *
160 * Returns:
161 * The global GPIO number for the GPIO specified by its descriptor.
372e722e 162 */
79a9becd 163int desc_to_gpio(const struct gpio_desc *desc)
372e722e 164{
fdeb8e15 165 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
372e722e 166}
79a9becd 167EXPORT_SYMBOL_GPL(desc_to_gpio);
372e722e
AC
168
169
79a9becd
AC
170/**
171 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
172 * @desc: descriptor to return the chip of
173 */
174struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
372e722e 175{
dd3b9a44 176 if (!desc || !desc->gdev)
fdeb8e15
LW
177 return NULL;
178 return desc->gdev->chip;
372e722e 179}
79a9becd 180EXPORT_SYMBOL_GPL(gpiod_to_chip);
d2876d08 181
8d0aab2f
AV
182/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
183static int gpiochip_find_base(int ngpio)
184{
ff2b1359 185 struct gpio_device *gdev;
83cabe33 186 int base = ARCH_NR_GPIOS - ngpio;
8d0aab2f 187
ff2b1359 188 list_for_each_entry_reverse(gdev, &gpio_devices, list) {
83cabe33 189 /* found a free space? */
fdeb8e15 190 if (gdev->base + gdev->ngpio <= base)
83cabe33
AC
191 break;
192 else
193 /* nope, check the space right before the chip */
fdeb8e15 194 base = gdev->base - ngpio;
8d0aab2f
AV
195 }
196
83cabe33 197 if (gpio_is_valid(base)) {
8d0aab2f 198 pr_debug("%s: found new base at %d\n", __func__, base);
83cabe33
AC
199 return base;
200 } else {
201 pr_err("%s: cannot find free range\n", __func__);
202 return -ENOSPC;
169b6a7a 203 }
169b6a7a
AV
204}
205
79a9becd
AC
206/**
207 * gpiod_get_direction - return the current direction of a GPIO
208 * @desc: GPIO to get the direction of
209 *
94fc7309 210 * Returns 0 for output, 1 for input, or an error code in case of error.
79a9becd
AC
211 *
212 * This function may sleep if gpiod_cansleep() is true.
213 */
8e53b0f1 214int gpiod_get_direction(struct gpio_desc *desc)
80b0a602 215{
d0121b85
WS
216 struct gpio_chip *chip;
217 unsigned offset;
d377f56f 218 int ret;
80b0a602 219
372e722e
AC
220 chip = gpiod_to_chip(desc);
221 offset = gpio_chip_hwgpio(desc);
80b0a602 222
256efaea
RK
223 /*
224 * Open drain emulation using input mode may incorrectly report
225 * input here, fix that up.
226 */
227 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) &&
228 test_bit(FLAG_IS_OUT, &desc->flags))
229 return 0;
230
80b0a602 231 if (!chip->get_direction)
d0121b85 232 return -ENOTSUPP;
80b0a602 233
d377f56f
LW
234 ret = chip->get_direction(chip, offset);
235 if (ret > 0) {
80b0a602 236 /* GPIOF_DIR_IN, or other positive */
d377f56f 237 ret = 1;
8e53b0f1 238 clear_bit(FLAG_IS_OUT, &desc->flags);
80b0a602 239 }
d377f56f 240 if (ret == 0) {
80b0a602 241 /* GPIOF_DIR_OUT */
8e53b0f1 242 set_bit(FLAG_IS_OUT, &desc->flags);
80b0a602 243 }
d377f56f 244 return ret;
80b0a602 245}
79a9becd 246EXPORT_SYMBOL_GPL(gpiod_get_direction);
80b0a602 247
1a989d0f
AC
248/*
249 * Add a new chip to the global chips list, keeping the list of chips sorted
ef7c7553 250 * by range(means [base, base + ngpio - 1]) order.
1a989d0f
AC
251 *
252 * Return -EBUSY if the new chip overlaps with some other chip's integer
253 * space.
254 */
ff2b1359 255static int gpiodev_add_to_list(struct gpio_device *gdev)
1a989d0f 256{
a961f9b4 257 struct gpio_device *prev, *next;
1a989d0f 258
ff2b1359 259 if (list_empty(&gpio_devices)) {
a961f9b4 260 /* initial entry in list */
ff2b1359 261 list_add_tail(&gdev->list, &gpio_devices);
e28ecca6 262 return 0;
1a989d0f
AC
263 }
264
a961f9b4
BJZ
265 next = list_entry(gpio_devices.next, struct gpio_device, list);
266 if (gdev->base + gdev->ngpio <= next->base) {
267 /* add before first entry */
268 list_add(&gdev->list, &gpio_devices);
269 return 0;
1a989d0f
AC
270 }
271
a961f9b4
BJZ
272 prev = list_entry(gpio_devices.prev, struct gpio_device, list);
273 if (prev->base + prev->ngpio <= gdev->base) {
274 /* add behind last entry */
275 list_add_tail(&gdev->list, &gpio_devices);
96098df1 276 return 0;
1a989d0f
AC
277 }
278
a961f9b4
BJZ
279 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
280 /* at the end of the list */
281 if (&next->list == &gpio_devices)
282 break;
1a989d0f 283
a961f9b4
BJZ
284 /* add between prev and next */
285 if (prev->base + prev->ngpio <= gdev->base
286 && gdev->base + gdev->ngpio <= next->base) {
287 list_add(&gdev->list, &prev->list);
288 return 0;
289 }
290 }
291
292 dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n");
293 return -EBUSY;
1a989d0f
AC
294}
295
950d55f5 296/*
f881bab0
LW
297 * Convert a GPIO name to its descriptor
298 */
299static struct gpio_desc *gpio_name_to_desc(const char * const name)
300{
ff2b1359 301 struct gpio_device *gdev;
f881bab0
LW
302 unsigned long flags;
303
304 spin_lock_irqsave(&gpio_lock, flags);
305
ff2b1359 306 list_for_each_entry(gdev, &gpio_devices, list) {
f881bab0
LW
307 int i;
308
fdeb8e15
LW
309 for (i = 0; i != gdev->ngpio; ++i) {
310 struct gpio_desc *desc = &gdev->descs[i];
f881bab0 311
fdeb8e15 312 if (!desc->name || !name)
f881bab0
LW
313 continue;
314
fdeb8e15 315 if (!strcmp(desc->name, name)) {
f881bab0 316 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 317 return desc;
f881bab0
LW
318 }
319 }
320 }
321
322 spin_unlock_irqrestore(&gpio_lock, flags);
323
324 return NULL;
325}
326
5f3ca732
MP
327/*
328 * Takes the names from gc->names and checks if they are all unique. If they
329 * are, they are assigned to their gpio descriptors.
330 *
ed37915c 331 * Warning if one of the names is already used for a different GPIO.
5f3ca732
MP
332 */
333static int gpiochip_set_desc_names(struct gpio_chip *gc)
334{
fdeb8e15 335 struct gpio_device *gdev = gc->gpiodev;
5f3ca732
MP
336 int i;
337
338 if (!gc->names)
339 return 0;
340
341 /* First check all names if they are unique */
342 for (i = 0; i != gc->ngpio; ++i) {
343 struct gpio_desc *gpio;
344
345 gpio = gpio_name_to_desc(gc->names[i]);
f881bab0 346 if (gpio)
fdeb8e15 347 dev_warn(&gdev->dev,
34ffd85d 348 "Detected name collision for GPIO name '%s'\n",
f881bab0 349 gc->names[i]);
5f3ca732
MP
350 }
351
352 /* Then add all names to the GPIO descriptors */
353 for (i = 0; i != gc->ngpio; ++i)
fdeb8e15 354 gdev->descs[i].name = gc->names[i];
5f3ca732
MP
355
356 return 0;
357}
358
e4371f6e
SB
359static unsigned long *gpiochip_allocate_mask(struct gpio_chip *chip)
360{
361 unsigned long *p;
362
7bdbd1ec 363 p = bitmap_alloc(chip->ngpio, GFP_KERNEL);
e4371f6e
SB
364 if (!p)
365 return NULL;
366
367 /* Assume by default all GPIOs are valid */
368 bitmap_fill(p, chip->ngpio);
369
370 return p;
371}
372
f626d6df 373static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
726cb3ba 374{
eb1e8bd6 375 if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask))
726cb3ba
SB
376 return 0;
377
f626d6df
LW
378 gc->valid_mask = gpiochip_allocate_mask(gc);
379 if (!gc->valid_mask)
726cb3ba
SB
380 return -ENOMEM;
381
382 return 0;
383}
384
c9fc5aff 385static int gpiochip_init_valid_mask(struct gpio_chip *gc)
f8ec92a9 386{
c9fc5aff
LW
387 if (gc->init_valid_mask)
388 return gc->init_valid_mask(gc,
389 gc->valid_mask,
390 gc->ngpio);
f8ec92a9
RRD
391
392 return 0;
393}
394
726cb3ba
SB
395static void gpiochip_free_valid_mask(struct gpio_chip *gpiochip)
396{
7bdbd1ec 397 bitmap_free(gpiochip->valid_mask);
726cb3ba
SB
398 gpiochip->valid_mask = NULL;
399}
400
b056ca1c
AS
401static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
402{
403 if (gc->add_pin_ranges)
404 return gc->add_pin_ranges(gc);
405
406 return 0;
407}
408
726cb3ba
SB
409bool gpiochip_line_is_valid(const struct gpio_chip *gpiochip,
410 unsigned int offset)
411{
412 /* No mask means all valid */
413 if (likely(!gpiochip->valid_mask))
414 return true;
415 return test_bit(offset, gpiochip->valid_mask);
416}
417EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
418
d7c51b47
LW
419/*
420 * GPIO line handle management
421 */
422
423/**
424 * struct linehandle_state - contains the state of a userspace handle
425 * @gdev: the GPIO device the handle pertains to
426 * @label: consumer label used to tag descriptors
427 * @descs: the GPIO descriptors held by this handle
428 * @numdescs: the number of descriptors held in the descs array
429 */
430struct linehandle_state {
431 struct gpio_device *gdev;
432 const char *label;
433 struct gpio_desc *descs[GPIOHANDLES_MAX];
434 u32 numdescs;
435};
436
e3e847c7
LPC
437#define GPIOHANDLE_REQUEST_VALID_FLAGS \
438 (GPIOHANDLE_REQUEST_INPUT | \
439 GPIOHANDLE_REQUEST_OUTPUT | \
440 GPIOHANDLE_REQUEST_ACTIVE_LOW | \
9225d516
DF
441 GPIOHANDLE_REQUEST_BIAS_PULL_UP | \
442 GPIOHANDLE_REQUEST_BIAS_PULL_DOWN | \
2148ad77 443 GPIOHANDLE_REQUEST_BIAS_DISABLE | \
e3e847c7
LPC
444 GPIOHANDLE_REQUEST_OPEN_DRAIN | \
445 GPIOHANDLE_REQUEST_OPEN_SOURCE)
446
b043ed7e
KG
447static int linehandle_validate_flags(u32 flags)
448{
449 /* Return an error if an unknown flag is set */
450 if (flags & ~GPIOHANDLE_REQUEST_VALID_FLAGS)
451 return -EINVAL;
452
453 /*
454 * Do not allow both INPUT & OUTPUT flags to be set as they are
455 * contradictory.
456 */
457 if ((flags & GPIOHANDLE_REQUEST_INPUT) &&
458 (flags & GPIOHANDLE_REQUEST_OUTPUT))
459 return -EINVAL;
460
461 /*
462 * Do not allow OPEN_SOURCE & OPEN_DRAIN flags in a single request. If
463 * the hardware actually supports enabling both at the same time the
464 * electrical result would be disastrous.
465 */
466 if ((flags & GPIOHANDLE_REQUEST_OPEN_DRAIN) &&
467 (flags & GPIOHANDLE_REQUEST_OPEN_SOURCE))
468 return -EINVAL;
469
470 /* OPEN_DRAIN and OPEN_SOURCE flags only make sense for output mode. */
471 if (!(flags & GPIOHANDLE_REQUEST_OUTPUT) &&
472 ((flags & GPIOHANDLE_REQUEST_OPEN_DRAIN) ||
473 (flags & GPIOHANDLE_REQUEST_OPEN_SOURCE)))
474 return -EINVAL;
475
476 /* Bias flags only allowed for input or output mode. */
477 if (!((flags & GPIOHANDLE_REQUEST_INPUT) ||
478 (flags & GPIOHANDLE_REQUEST_OUTPUT)) &&
479 ((flags & GPIOHANDLE_REQUEST_BIAS_DISABLE) ||
480 (flags & GPIOHANDLE_REQUEST_BIAS_PULL_UP) ||
481 (flags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)))
482 return -EINVAL;
483
484 /* Only one bias flag can be set. */
485 if (((flags & GPIOHANDLE_REQUEST_BIAS_DISABLE) &&
486 (flags & (GPIOHANDLE_REQUEST_BIAS_PULL_DOWN |
487 GPIOHANDLE_REQUEST_BIAS_PULL_UP))) ||
488 ((flags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) &&
489 (flags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)))
490 return -EINVAL;
491
492 return 0;
493}
494
e588bb1e
KG
495static void linehandle_configure_flag(unsigned long *flagsp,
496 u32 bit, bool active)
497{
498 if (active)
499 set_bit(bit, flagsp);
500 else
501 clear_bit(bit, flagsp);
502}
503
504static long linehandle_set_config(struct linehandle_state *lh,
505 void __user *ip)
506{
507 struct gpiohandle_config gcnf;
508 struct gpio_desc *desc;
509 int i, ret;
510 u32 lflags;
511 unsigned long *flagsp;
512
513 if (copy_from_user(&gcnf, ip, sizeof(gcnf)))
514 return -EFAULT;
515
516 lflags = gcnf.flags;
517 ret = linehandle_validate_flags(lflags);
518 if (ret)
519 return ret;
520
521 for (i = 0; i < lh->numdescs; i++) {
522 desc = lh->descs[i];
523 flagsp = &desc->flags;
524
525 linehandle_configure_flag(flagsp, FLAG_ACTIVE_LOW,
526 lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW);
527
528 linehandle_configure_flag(flagsp, FLAG_OPEN_DRAIN,
529 lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN);
530
531 linehandle_configure_flag(flagsp, FLAG_OPEN_SOURCE,
532 lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE);
533
534 linehandle_configure_flag(flagsp, FLAG_PULL_UP,
535 lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP);
536
537 linehandle_configure_flag(flagsp, FLAG_PULL_DOWN,
538 lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN);
539
540 linehandle_configure_flag(flagsp, FLAG_BIAS_DISABLE,
541 lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE);
542
543 /*
544 * Lines have to be requested explicitly for input
545 * or output, else the line will be treated "as is".
546 */
547 if (lflags & GPIOHANDLE_REQUEST_OUTPUT) {
548 int val = !!gcnf.default_values[i];
549
550 ret = gpiod_direction_output(desc, val);
551 if (ret)
552 return ret;
553 } else if (lflags & GPIOHANDLE_REQUEST_INPUT) {
554 ret = gpiod_direction_input(desc);
555 if (ret)
556 return ret;
557 }
558 }
559 return 0;
560}
561
d7c51b47
LW
562static long linehandle_ioctl(struct file *filep, unsigned int cmd,
563 unsigned long arg)
564{
565 struct linehandle_state *lh = filep->private_data;
566 void __user *ip = (void __user *)arg;
567 struct gpiohandle_data ghd;
b9762beb 568 DECLARE_BITMAP(vals, GPIOHANDLES_MAX);
d7c51b47
LW
569 int i;
570
571 if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) {
2b955b34 572 /* NOTE: It's ok to read values of output lines. */
eec1d566
LW
573 int ret = gpiod_get_array_value_complex(false,
574 true,
575 lh->numdescs,
576 lh->descs,
77588c14 577 NULL,
eec1d566
LW
578 vals);
579 if (ret)
580 return ret;
d7c51b47 581
3eded5d8 582 memset(&ghd, 0, sizeof(ghd));
eec1d566 583 for (i = 0; i < lh->numdescs; i++)
b9762beb 584 ghd.values[i] = test_bit(i, vals);
d7c51b47
LW
585
586 if (copy_to_user(ip, &ghd, sizeof(ghd)))
587 return -EFAULT;
588
589 return 0;
590 } else if (cmd == GPIOHANDLE_SET_LINE_VALUES_IOCTL) {
e5332d54
BG
591 /*
592 * All line descriptors were created at once with the same
593 * flags so just check if the first one is really output.
594 */
595 if (!test_bit(FLAG_IS_OUT, &lh->descs[0]->flags))
596 return -EPERM;
597
d7c51b47
LW
598 if (copy_from_user(&ghd, ip, sizeof(ghd)))
599 return -EFAULT;
600
601 /* Clamp all values to [0,1] */
602 for (i = 0; i < lh->numdescs; i++)
b9762beb 603 __assign_bit(i, vals, ghd.values[i]);
d7c51b47
LW
604
605 /* Reuse the array setting function */
3027743f 606 return gpiod_set_array_value_complex(false,
d7c51b47
LW
607 true,
608 lh->numdescs,
609 lh->descs,
77588c14 610 NULL,
d7c51b47 611 vals);
e588bb1e
KG
612 } else if (cmd == GPIOHANDLE_SET_CONFIG_IOCTL) {
613 return linehandle_set_config(lh, ip);
d7c51b47
LW
614 }
615 return -EINVAL;
616}
617
618#ifdef CONFIG_COMPAT
619static long linehandle_ioctl_compat(struct file *filep, unsigned int cmd,
620 unsigned long arg)
621{
622 return linehandle_ioctl(filep, cmd, (unsigned long)compat_ptr(arg));
623}
624#endif
625
626static int linehandle_release(struct inode *inode, struct file *filep)
627{
628 struct linehandle_state *lh = filep->private_data;
629 struct gpio_device *gdev = lh->gdev;
630 int i;
631
632 for (i = 0; i < lh->numdescs; i++)
633 gpiod_free(lh->descs[i]);
634 kfree(lh->label);
635 kfree(lh);
636 put_device(&gdev->dev);
637 return 0;
638}
639
640static const struct file_operations linehandle_fileops = {
641 .release = linehandle_release,
642 .owner = THIS_MODULE,
643 .llseek = noop_llseek,
644 .unlocked_ioctl = linehandle_ioctl,
645#ifdef CONFIG_COMPAT
646 .compat_ioctl = linehandle_ioctl_compat,
647#endif
648};
649
650static int linehandle_create(struct gpio_device *gdev, void __user *ip)
651{
652 struct gpiohandle_request handlereq;
653 struct linehandle_state *lh;
953b956a 654 struct file *file;
ab3dbcf7 655 int fd, i, count = 0, ret;
418ee8e9 656 u32 lflags;
d7c51b47
LW
657
658 if (copy_from_user(&handlereq, ip, sizeof(handlereq)))
659 return -EFAULT;
660 if ((handlereq.lines == 0) || (handlereq.lines > GPIOHANDLES_MAX))
661 return -EINVAL;
662
418ee8e9
BG
663 lflags = handlereq.flags;
664
b043ed7e
KG
665 ret = linehandle_validate_flags(lflags);
666 if (ret)
667 return ret;
2148ad77 668
d7c51b47
LW
669 lh = kzalloc(sizeof(*lh), GFP_KERNEL);
670 if (!lh)
671 return -ENOMEM;
672 lh->gdev = gdev;
673 get_device(&gdev->dev);
674
675 /* Make sure this is terminated */
676 handlereq.consumer_label[sizeof(handlereq.consumer_label)-1] = '\0';
677 if (strlen(handlereq.consumer_label)) {
678 lh->label = kstrdup(handlereq.consumer_label,
679 GFP_KERNEL);
680 if (!lh->label) {
681 ret = -ENOMEM;
682 goto out_free_lh;
683 }
684 }
685
686 /* Request each GPIO */
687 for (i = 0; i < handlereq.lines; i++) {
688 u32 offset = handlereq.lineoffsets[i];
d7c51b47
LW
689 struct gpio_desc *desc;
690
e405f9fc
LPC
691 if (offset >= gdev->ngpio) {
692 ret = -EINVAL;
693 goto out_free_descs;
694 }
695
d7c51b47
LW
696 desc = &gdev->descs[offset];
697 ret = gpiod_request(desc, lh->label);
698 if (ret)
699 goto out_free_descs;
700 lh->descs[i] = desc;
19a4fbff 701 count = i + 1;
d7c51b47
LW
702
703 if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW)
704 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
705 if (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN)
706 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
707 if (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE)
708 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
2148ad77
KG
709 if (lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE)
710 set_bit(FLAG_BIAS_DISABLE, &desc->flags);
9225d516
DF
711 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)
712 set_bit(FLAG_PULL_DOWN, &desc->flags);
713 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)
714 set_bit(FLAG_PULL_UP, &desc->flags);
d7c51b47 715
e10f72bf
AJ
716 ret = gpiod_set_transitory(desc, false);
717 if (ret < 0)
718 goto out_free_descs;
719
d7c51b47
LW
720 /*
721 * Lines have to be requested explicitly for input
722 * or output, else the line will be treated "as is".
723 */
724 if (lflags & GPIOHANDLE_REQUEST_OUTPUT) {
725 int val = !!handlereq.default_values[i];
726
727 ret = gpiod_direction_output(desc, val);
728 if (ret)
729 goto out_free_descs;
730 } else if (lflags & GPIOHANDLE_REQUEST_INPUT) {
731 ret = gpiod_direction_input(desc);
732 if (ret)
733 goto out_free_descs;
734 }
735 dev_dbg(&gdev->dev, "registered chardev handle for line %d\n",
736 offset);
737 }
e2f608be
LW
738 /* Let i point at the last handle */
739 i--;
d7c51b47
LW
740 lh->numdescs = handlereq.lines;
741
953b956a 742 fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);
d7c51b47
LW
743 if (fd < 0) {
744 ret = fd;
745 goto out_free_descs;
746 }
747
953b956a
LPC
748 file = anon_inode_getfile("gpio-linehandle",
749 &linehandle_fileops,
750 lh,
751 O_RDONLY | O_CLOEXEC);
752 if (IS_ERR(file)) {
753 ret = PTR_ERR(file);
754 goto out_put_unused_fd;
755 }
756
d7c51b47 757 handlereq.fd = fd;
d932cd49 758 if (copy_to_user(ip, &handlereq, sizeof(handlereq))) {
953b956a
LPC
759 /*
760 * fput() will trigger the release() callback, so do not go onto
761 * the regular error cleanup path here.
762 */
763 fput(file);
764 put_unused_fd(fd);
765 return -EFAULT;
d932cd49 766 }
d7c51b47 767
953b956a
LPC
768 fd_install(fd, file);
769
d7c51b47
LW
770 dev_dbg(&gdev->dev, "registered chardev handle for %d lines\n",
771 lh->numdescs);
772
773 return 0;
774
953b956a
LPC
775out_put_unused_fd:
776 put_unused_fd(fd);
d7c51b47 777out_free_descs:
ab3dbcf7 778 for (i = 0; i < count; i++)
d7c51b47
LW
779 gpiod_free(lh->descs[i]);
780 kfree(lh->label);
781out_free_lh:
782 kfree(lh);
783 put_device(&gdev->dev);
784 return ret;
785}
786
61f922db
LW
787/*
788 * GPIO line event management
789 */
790
791/**
792 * struct lineevent_state - contains the state of a userspace event
793 * @gdev: the GPIO device the event pertains to
794 * @label: consumer label used to tag descriptors
795 * @desc: the GPIO descriptor held by this event
796 * @eflags: the event flags this line was requested with
797 * @irq: the interrupt that trigger in response to events on this GPIO
798 * @wait: wait queue that handles blocking reads of events
799 * @events: KFIFO for the GPIO events
800 * @read_lock: mutex lock to protect reads from colliding with adding
801 * new events to the FIFO
d58f2bf2
LW
802 * @timestamp: cache for the timestamp storing it between hardirq
803 * and IRQ thread, used to bring the timestamp close to the actual
804 * event
61f922db
LW
805 */
806struct lineevent_state {
807 struct gpio_device *gdev;
808 const char *label;
809 struct gpio_desc *desc;
810 u32 eflags;
811 int irq;
812 wait_queue_head_t wait;
813 DECLARE_KFIFO(events, struct gpioevent_data, 16);
814 struct mutex read_lock;
d58f2bf2 815 u64 timestamp;
61f922db
LW
816};
817
ac7dbb99
LPC
818#define GPIOEVENT_REQUEST_VALID_FLAGS \
819 (GPIOEVENT_REQUEST_RISING_EDGE | \
820 GPIOEVENT_REQUEST_FALLING_EDGE)
821
afc9a42b 822static __poll_t lineevent_poll(struct file *filep,
61f922db
LW
823 struct poll_table_struct *wait)
824{
825 struct lineevent_state *le = filep->private_data;
afc9a42b 826 __poll_t events = 0;
61f922db
LW
827
828 poll_wait(filep, &le->wait, wait);
829
830 if (!kfifo_is_empty(&le->events))
a9a08845 831 events = EPOLLIN | EPOLLRDNORM;
61f922db
LW
832
833 return events;
834}
835
836
837static ssize_t lineevent_read(struct file *filep,
838 char __user *buf,
839 size_t count,
840 loff_t *f_ps)
841{
842 struct lineevent_state *le = filep->private_data;
843 unsigned int copied;
844 int ret;
845
846 if (count < sizeof(struct gpioevent_data))
847 return -EINVAL;
848
849 do {
850 if (kfifo_is_empty(&le->events)) {
851 if (filep->f_flags & O_NONBLOCK)
852 return -EAGAIN;
853
854 ret = wait_event_interruptible(le->wait,
855 !kfifo_is_empty(&le->events));
856 if (ret)
857 return ret;
858 }
859
860 if (mutex_lock_interruptible(&le->read_lock))
861 return -ERESTARTSYS;
862 ret = kfifo_to_user(&le->events, buf, count, &copied);
863 mutex_unlock(&le->read_lock);
864
865 if (ret)
866 return ret;
867
868 /*
869 * If we couldn't read anything from the fifo (a different
870 * thread might have been faster) we either return -EAGAIN if
871 * the file descriptor is non-blocking, otherwise we go back to
872 * sleep and wait for more data to arrive.
873 */
874 if (copied == 0 && (filep->f_flags & O_NONBLOCK))
875 return -EAGAIN;
876
877 } while (copied == 0);
878
879 return copied;
880}
881
882static int lineevent_release(struct inode *inode, struct file *filep)
883{
884 struct lineevent_state *le = filep->private_data;
885 struct gpio_device *gdev = le->gdev;
886
887 free_irq(le->irq, le);
888 gpiod_free(le->desc);
889 kfree(le->label);
890 kfree(le);
891 put_device(&gdev->dev);
892 return 0;
893}
894
895static long lineevent_ioctl(struct file *filep, unsigned int cmd,
896 unsigned long arg)
897{
898 struct lineevent_state *le = filep->private_data;
899 void __user *ip = (void __user *)arg;
900 struct gpiohandle_data ghd;
901
902 /*
903 * We can get the value for an event line but not set it,
904 * because it is input by definition.
905 */
906 if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) {
907 int val;
908
d82aa4a8
LPC
909 memset(&ghd, 0, sizeof(ghd));
910
61f922db
LW
911 val = gpiod_get_value_cansleep(le->desc);
912 if (val < 0)
913 return val;
914 ghd.values[0] = val;
915
916 if (copy_to_user(ip, &ghd, sizeof(ghd)))
917 return -EFAULT;
918
919 return 0;
920 }
921 return -EINVAL;
922}
923
924#ifdef CONFIG_COMPAT
925static long lineevent_ioctl_compat(struct file *filep, unsigned int cmd,
926 unsigned long arg)
927{
928 return lineevent_ioctl(filep, cmd, (unsigned long)compat_ptr(arg));
929}
930#endif
931
932static const struct file_operations lineevent_fileops = {
933 .release = lineevent_release,
934 .read = lineevent_read,
935 .poll = lineevent_poll,
936 .owner = THIS_MODULE,
937 .llseek = noop_llseek,
938 .unlocked_ioctl = lineevent_ioctl,
939#ifdef CONFIG_COMPAT
940 .compat_ioctl = lineevent_ioctl_compat,
941#endif
942};
943
33265b17 944static irqreturn_t lineevent_irq_thread(int irq, void *p)
61f922db
LW
945{
946 struct lineevent_state *le = p;
947 struct gpioevent_data ge;
fa38869b 948 int ret;
61f922db 949
24bd3efc
LW
950 /* Do not leak kernel stack to userspace */
951 memset(&ge, 0, sizeof(ge));
952
1033be58
BG
953 /*
954 * We may be running from a nested threaded interrupt in which case
955 * we didn't get the timestamp from lineevent_irq_handler().
956 */
957 if (!le->timestamp)
958 ge.timestamp = ktime_get_real_ns();
959 else
960 ge.timestamp = le->timestamp;
61f922db 961
ad537b82
BG
962 if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE
963 && le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) {
fa38869b 964 int level = gpiod_get_value_cansleep(le->desc);
61f922db
LW
965 if (level)
966 /* Emit low-to-high event */
967 ge.id = GPIOEVENT_EVENT_RISING_EDGE;
968 else
969 /* Emit high-to-low event */
970 ge.id = GPIOEVENT_EVENT_FALLING_EDGE;
fa38869b 971 } else if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE) {
61f922db
LW
972 /* Emit low-to-high event */
973 ge.id = GPIOEVENT_EVENT_RISING_EDGE;
fa38869b 974 } else if (le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) {
61f922db
LW
975 /* Emit high-to-low event */
976 ge.id = GPIOEVENT_EVENT_FALLING_EDGE;
bc0207a5
AB
977 } else {
978 return IRQ_NONE;
61f922db
LW
979 }
980
981 ret = kfifo_put(&le->events, ge);
2efc6bfa 982 if (ret)
a9a08845 983 wake_up_poll(&le->wait, EPOLLIN);
61f922db
LW
984
985 return IRQ_HANDLED;
986}
987
d58f2bf2
LW
988static irqreturn_t lineevent_irq_handler(int irq, void *p)
989{
990 struct lineevent_state *le = p;
991
992 /*
993 * Just store the timestamp in hardirq context so we get it as
994 * close in time as possible to the actual event.
995 */
996 le->timestamp = ktime_get_real_ns();
997
998 return IRQ_WAKE_THREAD;
999}
1000
61f922db
LW
1001static int lineevent_create(struct gpio_device *gdev, void __user *ip)
1002{
1003 struct gpioevent_request eventreq;
1004 struct lineevent_state *le;
1005 struct gpio_desc *desc;
953b956a 1006 struct file *file;
61f922db
LW
1007 u32 offset;
1008 u32 lflags;
1009 u32 eflags;
1010 int fd;
1011 int ret;
1012 int irqflags = 0;
1013
1014 if (copy_from_user(&eventreq, ip, sizeof(eventreq)))
1015 return -EFAULT;
1016
bcc6d99a
BG
1017 offset = eventreq.lineoffset;
1018 lflags = eventreq.handleflags;
1019 eflags = eventreq.eventflags;
1020
1021 if (offset >= gdev->ngpio)
1022 return -EINVAL;
1023
1024 /* Return an error if a unknown flag is set */
1025 if ((lflags & ~GPIOHANDLE_REQUEST_VALID_FLAGS) ||
1026 (eflags & ~GPIOEVENT_REQUEST_VALID_FLAGS))
1027 return -EINVAL;
1028
1029 /* This is just wrong: we don't look for events on output lines */
1030 if ((lflags & GPIOHANDLE_REQUEST_OUTPUT) ||
1031 (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN) ||
1032 (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE))
1033 return -EINVAL;
1034
2148ad77
KG
1035 /* Only one bias flag can be set. */
1036 if (((lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE) &&
1037 (lflags & (GPIOHANDLE_REQUEST_BIAS_PULL_DOWN |
1038 GPIOHANDLE_REQUEST_BIAS_PULL_UP))) ||
1039 ((lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) &&
1040 (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)))
1041 return -EINVAL;
1042
61f922db
LW
1043 le = kzalloc(sizeof(*le), GFP_KERNEL);
1044 if (!le)
1045 return -ENOMEM;
1046 le->gdev = gdev;
1047 get_device(&gdev->dev);
1048
1049 /* Make sure this is terminated */
1050 eventreq.consumer_label[sizeof(eventreq.consumer_label)-1] = '\0';
1051 if (strlen(eventreq.consumer_label)) {
1052 le->label = kstrdup(eventreq.consumer_label,
1053 GFP_KERNEL);
1054 if (!le->label) {
1055 ret = -ENOMEM;
1056 goto out_free_le;
1057 }
1058 }
1059
61f922db
LW
1060 desc = &gdev->descs[offset];
1061 ret = gpiod_request(desc, le->label);
1062 if (ret)
f001cc35 1063 goto out_free_label;
61f922db
LW
1064 le->desc = desc;
1065 le->eflags = eflags;
1066
1067 if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW)
1068 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
2148ad77
KG
1069 if (lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE)
1070 set_bit(FLAG_BIAS_DISABLE, &desc->flags);
7b479a84
KG
1071 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)
1072 set_bit(FLAG_PULL_DOWN, &desc->flags);
1073 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)
1074 set_bit(FLAG_PULL_UP, &desc->flags);
61f922db
LW
1075
1076 ret = gpiod_direction_input(desc);
1077 if (ret)
1078 goto out_free_desc;
1079
1080 le->irq = gpiod_to_irq(desc);
1081 if (le->irq <= 0) {
1082 ret = -ENODEV;
1083 goto out_free_desc;
1084 }
1085
1086 if (eflags & GPIOEVENT_REQUEST_RISING_EDGE)
223ecaf1
MW
1087 irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
1088 IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING;
61f922db 1089 if (eflags & GPIOEVENT_REQUEST_FALLING_EDGE)
223ecaf1
MW
1090 irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
1091 IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING;
61f922db 1092 irqflags |= IRQF_ONESHOT;
61f922db
LW
1093
1094 INIT_KFIFO(le->events);
1095 init_waitqueue_head(&le->wait);
1096 mutex_init(&le->read_lock);
1097
1098 /* Request a thread to read the events */
1099 ret = request_threaded_irq(le->irq,
d58f2bf2 1100 lineevent_irq_handler,
61f922db
LW
1101 lineevent_irq_thread,
1102 irqflags,
1103 le->label,
1104 le);
1105 if (ret)
1106 goto out_free_desc;
1107
953b956a 1108 fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);
61f922db
LW
1109 if (fd < 0) {
1110 ret = fd;
1111 goto out_free_irq;
1112 }
1113
953b956a
LPC
1114 file = anon_inode_getfile("gpio-event",
1115 &lineevent_fileops,
1116 le,
1117 O_RDONLY | O_CLOEXEC);
1118 if (IS_ERR(file)) {
1119 ret = PTR_ERR(file);
1120 goto out_put_unused_fd;
1121 }
1122
61f922db 1123 eventreq.fd = fd;
d932cd49 1124 if (copy_to_user(ip, &eventreq, sizeof(eventreq))) {
953b956a
LPC
1125 /*
1126 * fput() will trigger the release() callback, so do not go onto
1127 * the regular error cleanup path here.
1128 */
1129 fput(file);
1130 put_unused_fd(fd);
1131 return -EFAULT;
d932cd49 1132 }
61f922db 1133
953b956a
LPC
1134 fd_install(fd, file);
1135
61f922db
LW
1136 return 0;
1137
953b956a
LPC
1138out_put_unused_fd:
1139 put_unused_fd(fd);
61f922db
LW
1140out_free_irq:
1141 free_irq(le->irq, le);
1142out_free_desc:
1143 gpiod_free(le->desc);
1144out_free_label:
1145 kfree(le->label);
1146out_free_le:
1147 kfree(le);
1148 put_device(&gdev->dev);
1149 return ret;
1150}
1151
950d55f5 1152/*
3c702e99
LW
1153 * gpio_ioctl() - ioctl handler for the GPIO chardev
1154 */
1155static long gpio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
1156{
1157 struct gpio_device *gdev = filp->private_data;
1158 struct gpio_chip *chip = gdev->chip;
8b92e17e 1159 void __user *ip = (void __user *)arg;
3c702e99
LW
1160
1161 /* We fail any subsequent ioctl():s when the chip is gone */
1162 if (!chip)
1163 return -ENODEV;
1164
521a2ad6 1165 /* Fill in the struct and pass to userspace */
3c702e99 1166 if (cmd == GPIO_GET_CHIPINFO_IOCTL) {
521a2ad6
LW
1167 struct gpiochip_info chipinfo;
1168
0f4bbb23
LPC
1169 memset(&chipinfo, 0, sizeof(chipinfo));
1170
3c702e99
LW
1171 strncpy(chipinfo.name, dev_name(&gdev->dev),
1172 sizeof(chipinfo.name));
1173 chipinfo.name[sizeof(chipinfo.name)-1] = '\0';
df4878e9
LW
1174 strncpy(chipinfo.label, gdev->label,
1175 sizeof(chipinfo.label));
1176 chipinfo.label[sizeof(chipinfo.label)-1] = '\0';
fdeb8e15 1177 chipinfo.lines = gdev->ngpio;
3c702e99
LW
1178 if (copy_to_user(ip, &chipinfo, sizeof(chipinfo)))
1179 return -EFAULT;
1180 return 0;
521a2ad6
LW
1181 } else if (cmd == GPIO_GET_LINEINFO_IOCTL) {
1182 struct gpioline_info lineinfo;
1183 struct gpio_desc *desc;
1184
1185 if (copy_from_user(&lineinfo, ip, sizeof(lineinfo)))
1186 return -EFAULT;
1f1cc456 1187 if (lineinfo.line_offset >= gdev->ngpio)
521a2ad6
LW
1188 return -EINVAL;
1189
1190 desc = &gdev->descs[lineinfo.line_offset];
1191 if (desc->name) {
1192 strncpy(lineinfo.name, desc->name,
1193 sizeof(lineinfo.name));
1194 lineinfo.name[sizeof(lineinfo.name)-1] = '\0';
1195 } else {
1196 lineinfo.name[0] = '\0';
1197 }
1198 if (desc->label) {
214338e3
LW
1199 strncpy(lineinfo.consumer, desc->label,
1200 sizeof(lineinfo.consumer));
1201 lineinfo.consumer[sizeof(lineinfo.consumer)-1] = '\0';
521a2ad6 1202 } else {
214338e3 1203 lineinfo.consumer[0] = '\0';
521a2ad6
LW
1204 }
1205
1206 /*
1207 * Userspace only need to know that the kernel is using
1208 * this GPIO so it can't use it.
1209 */
1210 lineinfo.flags = 0;
9d8cc89c
LW
1211 if (test_bit(FLAG_REQUESTED, &desc->flags) ||
1212 test_bit(FLAG_IS_HOGGED, &desc->flags) ||
1213 test_bit(FLAG_USED_AS_IRQ, &desc->flags) ||
1214 test_bit(FLAG_EXPORT, &desc->flags) ||
472a61e7
SW
1215 test_bit(FLAG_SYSFS, &desc->flags) ||
1216 !pinctrl_gpio_can_use_line(chip->base + lineinfo.line_offset))
521a2ad6 1217 lineinfo.flags |= GPIOLINE_FLAG_KERNEL;
9d8cc89c 1218 if (test_bit(FLAG_IS_OUT, &desc->flags))
521a2ad6 1219 lineinfo.flags |= GPIOLINE_FLAG_IS_OUT;
9d8cc89c 1220 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
521a2ad6 1221 lineinfo.flags |= GPIOLINE_FLAG_ACTIVE_LOW;
9d8cc89c 1222 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
2c60e6b5
BG
1223 lineinfo.flags |= (GPIOLINE_FLAG_OPEN_DRAIN |
1224 GPIOLINE_FLAG_IS_OUT);
9d8cc89c 1225 if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
2c60e6b5
BG
1226 lineinfo.flags |= (GPIOLINE_FLAG_OPEN_SOURCE |
1227 GPIOLINE_FLAG_IS_OUT);
2148ad77
KG
1228 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
1229 lineinfo.flags |= GPIOLINE_FLAG_BIAS_DISABLE;
9225d516
DF
1230 if (test_bit(FLAG_PULL_DOWN, &desc->flags))
1231 lineinfo.flags |= GPIOLINE_FLAG_BIAS_PULL_DOWN;
1232 if (test_bit(FLAG_PULL_UP, &desc->flags))
1233 lineinfo.flags |= GPIOLINE_FLAG_BIAS_PULL_UP;
521a2ad6
LW
1234
1235 if (copy_to_user(ip, &lineinfo, sizeof(lineinfo)))
1236 return -EFAULT;
1237 return 0;
d7c51b47
LW
1238 } else if (cmd == GPIO_GET_LINEHANDLE_IOCTL) {
1239 return linehandle_create(gdev, ip);
61f922db
LW
1240 } else if (cmd == GPIO_GET_LINEEVENT_IOCTL) {
1241 return lineevent_create(gdev, ip);
3c702e99
LW
1242 }
1243 return -EINVAL;
1244}
1245
8b92e17e
LW
1246#ifdef CONFIG_COMPAT
1247static long gpio_ioctl_compat(struct file *filp, unsigned int cmd,
1248 unsigned long arg)
1249{
1250 return gpio_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
1251}
1252#endif
1253
3c702e99
LW
1254/**
1255 * gpio_chrdev_open() - open the chardev for ioctl operations
1256 * @inode: inode for this chardev
1257 * @filp: file struct for storing private data
1258 * Returns 0 on success
1259 */
1260static int gpio_chrdev_open(struct inode *inode, struct file *filp)
1261{
1262 struct gpio_device *gdev = container_of(inode->i_cdev,
1263 struct gpio_device, chrdev);
1264
1265 /* Fail on open if the backing gpiochip is gone */
fb505747 1266 if (!gdev->chip)
3c702e99
LW
1267 return -ENODEV;
1268 get_device(&gdev->dev);
1269 filp->private_data = gdev;
f4e81c52
LPC
1270
1271 return nonseekable_open(inode, filp);
3c702e99
LW
1272}
1273
1274/**
1275 * gpio_chrdev_release() - close chardev after ioctl operations
1276 * @inode: inode for this chardev
1277 * @filp: file struct for storing private data
1278 * Returns 0 on success
1279 */
1280static int gpio_chrdev_release(struct inode *inode, struct file *filp)
1281{
1282 struct gpio_device *gdev = container_of(inode->i_cdev,
1283 struct gpio_device, chrdev);
1284
3c702e99
LW
1285 put_device(&gdev->dev);
1286 return 0;
1287}
1288
1289
1290static const struct file_operations gpio_fileops = {
1291 .release = gpio_chrdev_release,
1292 .open = gpio_chrdev_open,
1293 .owner = THIS_MODULE,
f4e81c52 1294 .llseek = no_llseek,
3c702e99 1295 .unlocked_ioctl = gpio_ioctl,
8b92e17e
LW
1296#ifdef CONFIG_COMPAT
1297 .compat_ioctl = gpio_ioctl_compat,
1298#endif
3c702e99
LW
1299};
1300
ff2b1359
LW
1301static void gpiodevice_release(struct device *dev)
1302{
1303 struct gpio_device *gdev = dev_get_drvdata(dev);
1304
1305 list_del(&gdev->list);
1306 ida_simple_remove(&gpio_ida, gdev->id);
fcf273e5 1307 kfree_const(gdev->label);
476e2fc5 1308 kfree(gdev->descs);
9efd9e69 1309 kfree(gdev);
ff2b1359
LW
1310}
1311
159f3cd9
GR
1312static int gpiochip_setup_dev(struct gpio_device *gdev)
1313{
d377f56f 1314 int ret;
159f3cd9
GR
1315
1316 cdev_init(&gdev->chrdev, &gpio_fileops);
1317 gdev->chrdev.owner = THIS_MODULE;
159f3cd9 1318 gdev->dev.devt = MKDEV(MAJOR(gpio_devt), gdev->id);
111379dc 1319
d377f56f
LW
1320 ret = cdev_device_add(&gdev->chrdev, &gdev->dev);
1321 if (ret)
1322 return ret;
111379dc
LG
1323
1324 chip_dbg(gdev->chip, "added GPIO chardev (%d:%d)\n",
1325 MAJOR(gpio_devt), gdev->id);
159f3cd9 1326
d377f56f
LW
1327 ret = gpiochip_sysfs_register(gdev);
1328 if (ret)
159f3cd9
GR
1329 goto err_remove_device;
1330
1331 /* From this point, the .release() function cleans up gpio_device */
1332 gdev->dev.release = gpiodevice_release;
159f3cd9
GR
1333 pr_debug("%s: registered GPIOs %d to %d on device: %s (%s)\n",
1334 __func__, gdev->base, gdev->base + gdev->ngpio - 1,
1335 dev_name(&gdev->dev), gdev->chip->label ? : "generic");
1336
1337 return 0;
1338
1339err_remove_device:
111379dc 1340 cdev_device_del(&gdev->chrdev, &gdev->dev);
d377f56f 1341 return ret;
159f3cd9
GR
1342}
1343
a411e81e
BG
1344static void gpiochip_machine_hog(struct gpio_chip *chip, struct gpiod_hog *hog)
1345{
1346 struct gpio_desc *desc;
1347 int rv;
1348
1349 desc = gpiochip_get_desc(chip, hog->chip_hwnum);
1350 if (IS_ERR(desc)) {
1351 pr_err("%s: unable to get GPIO desc: %ld\n",
1352 __func__, PTR_ERR(desc));
1353 return;
1354 }
1355
ba3efdff 1356 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
a411e81e
BG
1357 return;
1358
1359 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
1360 if (rv)
1361 pr_err("%s: unable to hog GPIO line (%s:%u): %d\n",
1362 __func__, chip->label, hog->chip_hwnum, rv);
1363}
1364
1365static void machine_gpiochip_add(struct gpio_chip *chip)
1366{
1367 struct gpiod_hog *hog;
1368
1369 mutex_lock(&gpio_machine_hogs_mutex);
1370
1371 list_for_each_entry(hog, &gpio_machine_hogs, list) {
1372 if (!strcmp(chip->label, hog->chip_label))
1373 gpiochip_machine_hog(chip, hog);
1374 }
1375
1376 mutex_unlock(&gpio_machine_hogs_mutex);
1377}
1378
159f3cd9
GR
1379static void gpiochip_setup_devs(void)
1380{
1381 struct gpio_device *gdev;
d377f56f 1382 int ret;
159f3cd9
GR
1383
1384 list_for_each_entry(gdev, &gpio_devices, list) {
d377f56f
LW
1385 ret = gpiochip_setup_dev(gdev);
1386 if (ret)
159f3cd9 1387 pr_err("%s: Failed to initialize gpio device (%d)\n",
d377f56f 1388 dev_name(&gdev->dev), ret);
159f3cd9
GR
1389 }
1390}
1391
959bc7b2 1392int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data,
39c3fd58
AL
1393 struct lock_class_key *lock_key,
1394 struct lock_class_key *request_key)
d2876d08
DB
1395{
1396 unsigned long flags;
d377f56f 1397 int ret = 0;
ff2b1359 1398 unsigned i;
8d0aab2f 1399 int base = chip->base;
ff2b1359 1400 struct gpio_device *gdev;
d2876d08 1401
ff2b1359
LW
1402 /*
1403 * First: allocate and populate the internal stat container, and
1404 * set up the struct device.
1405 */
969f07b4 1406 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
ff2b1359 1407 if (!gdev)
14e85c0e 1408 return -ENOMEM;
3c702e99 1409 gdev->dev.bus = &gpio_bus_type;
ff2b1359
LW
1410 gdev->chip = chip;
1411 chip->gpiodev = gdev;
1412 if (chip->parent) {
1413 gdev->dev.parent = chip->parent;
1414 gdev->dev.of_node = chip->parent->of_node;
acc6e331
TR
1415 }
1416
ff2b1359
LW
1417#ifdef CONFIG_OF_GPIO
1418 /* If the gpiochip has an assigned OF node this takes precedence */
acc6e331
TR
1419 if (chip->of_node)
1420 gdev->dev.of_node = chip->of_node;
6ff04974
BD
1421 else
1422 chip->of_node = gdev->dev.of_node;
ff2b1359 1423#endif
acc6e331 1424
ff2b1359
LW
1425 gdev->id = ida_simple_get(&gpio_ida, 0, 0, GFP_KERNEL);
1426 if (gdev->id < 0) {
d377f56f 1427 ret = gdev->id;
ff2b1359
LW
1428 goto err_free_gdev;
1429 }
1430 dev_set_name(&gdev->dev, "gpiochip%d", gdev->id);
1431 device_initialize(&gdev->dev);
1432 dev_set_drvdata(&gdev->dev, gdev);
1433 if (chip->parent && chip->parent->driver)
1434 gdev->owner = chip->parent->driver->owner;
1435 else if (chip->owner)
1436 /* TODO: remove chip->owner */
1437 gdev->owner = chip->owner;
1438 else
1439 gdev->owner = THIS_MODULE;
d2876d08 1440
476e2fc5 1441 gdev->descs = kcalloc(chip->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL);
1c3cdb18 1442 if (!gdev->descs) {
d377f56f 1443 ret = -ENOMEM;
a05a1404 1444 goto err_free_ida;
ff2b1359
LW
1445 }
1446
5ed41cc4
BJZ
1447 if (chip->ngpio == 0) {
1448 chip_err(chip, "tried to insert a GPIO chip with zero lines\n");
d377f56f 1449 ret = -EINVAL;
159f3cd9 1450 goto err_free_descs;
5ed41cc4 1451 }
df4878e9 1452
3027743f
LA
1453 if (chip->ngpio > FASTPATH_NGPIO)
1454 chip_warn(chip, "line cnt %u is greater than fast path cnt %u\n",
1455 chip->ngpio, FASTPATH_NGPIO);
1456
fcf273e5 1457 gdev->label = kstrdup_const(chip->label ?: "unknown", GFP_KERNEL);
df4878e9 1458 if (!gdev->label) {
d377f56f 1459 ret = -ENOMEM;
476e2fc5 1460 goto err_free_descs;
df4878e9
LW
1461 }
1462
fdeb8e15 1463 gdev->ngpio = chip->ngpio;
43c54eca 1464 gdev->data = data;
5ed41cc4 1465
d2876d08
DB
1466 spin_lock_irqsave(&gpio_lock, flags);
1467
fdeb8e15
LW
1468 /*
1469 * TODO: this allocates a Linux GPIO number base in the global
1470 * GPIO numberspace for this chip. In the long run we want to
1471 * get *rid* of this numberspace and use only descriptors, but
1472 * it may be a pipe dream. It will not happen before we get rid
1473 * of the sysfs interface anyways.
1474 */
8d0aab2f
AV
1475 if (base < 0) {
1476 base = gpiochip_find_base(chip->ngpio);
1477 if (base < 0) {
d377f56f 1478 ret = base;
225fce83 1479 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1480 goto err_free_label;
8d0aab2f 1481 }
fdeb8e15
LW
1482 /*
1483 * TODO: it should not be necessary to reflect the assigned
1484 * base outside of the GPIO subsystem. Go over drivers and
1485 * see if anyone makes use of this, else drop this and assign
1486 * a poison instead.
1487 */
8d0aab2f
AV
1488 chip->base = base;
1489 }
fdeb8e15 1490 gdev->base = base;
8d0aab2f 1491
d377f56f
LW
1492 ret = gpiodev_add_to_list(gdev);
1493 if (ret) {
05aa5203 1494 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1495 goto err_free_label;
05aa5203 1496 }
1a989d0f 1497
545ebd9a
LW
1498 spin_unlock_irqrestore(&gpio_lock, flags);
1499
767cd17a
RRD
1500 for (i = 0; i < chip->ngpio; i++)
1501 gdev->descs[i].gdev = gdev;
14e85c0e 1502
f23f1516 1503#ifdef CONFIG_PINCTRL
20ec3e39 1504 INIT_LIST_HEAD(&gdev->pin_ranges);
f23f1516
SH
1505#endif
1506
d377f56f
LW
1507 ret = gpiochip_set_desc_names(chip);
1508 if (ret)
5f3ca732
MP
1509 goto err_remove_from_list;
1510
d377f56f
LW
1511 ret = gpiochip_alloc_valid_mask(chip);
1512 if (ret)
48057ed1 1513 goto err_remove_from_list;
e0d89728 1514
d377f56f
LW
1515 ret = of_gpiochip_add(chip);
1516 if (ret)
48057ed1 1517 goto err_free_gpiochip_mask;
28355f81 1518
d377f56f
LW
1519 ret = gpiochip_init_valid_mask(chip);
1520 if (ret)
35779890 1521 goto err_remove_of_chip;
f8ec92a9 1522
3edfb7bd
RRD
1523 for (i = 0; i < chip->ngpio; i++) {
1524 struct gpio_desc *desc = &gdev->descs[i];
1525
d95da993
CP
1526 if (chip->get_direction && gpiochip_line_is_valid(chip, i)) {
1527 if (!chip->get_direction(chip, i))
1528 set_bit(FLAG_IS_OUT, &desc->flags);
1529 else
1530 clear_bit(FLAG_IS_OUT, &desc->flags);
1531 } else {
1532 if (!chip->direction_input)
1533 set_bit(FLAG_IS_OUT, &desc->flags);
1534 else
1535 clear_bit(FLAG_IS_OUT, &desc->flags);
1536 }
3edfb7bd
RRD
1537 }
1538
b056ca1c
AS
1539 ret = gpiochip_add_pin_ranges(chip);
1540 if (ret)
1541 goto err_remove_of_chip;
1542
664e3e5a 1543 acpi_gpiochip_add(chip);
391c970c 1544
a411e81e
BG
1545 machine_gpiochip_add(chip);
1546
504369cd 1547 ret = gpiochip_irqchip_init_valid_mask(chip);
9411e3aa
AS
1548 if (ret)
1549 goto err_remove_acpi_chip;
1550
504369cd 1551 ret = gpiochip_irqchip_init_hw(chip);
fbdf8d4b 1552 if (ret)
48057ed1
LW
1553 goto err_remove_acpi_chip;
1554
fbdf8d4b
LW
1555 ret = gpiochip_add_irqchip(chip, lock_key, request_key);
1556 if (ret)
48057ed1
LW
1557 goto err_remove_irqchip_mask;
1558
3c702e99
LW
1559 /*
1560 * By first adding the chardev, and then adding the device,
1561 * we get a device node entry in sysfs under
1562 * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
1563 * coldplug of device nodes and other udev business.
159f3cd9
GR
1564 * We can do this only if gpiolib has been initialized.
1565 * Otherwise, defer until later.
3c702e99 1566 */
159f3cd9 1567 if (gpiolib_initialized) {
d377f56f
LW
1568 ret = gpiochip_setup_dev(gdev);
1569 if (ret)
48057ed1 1570 goto err_remove_irqchip;
159f3cd9 1571 }
cedb1881 1572 return 0;
3bae4811 1573
48057ed1
LW
1574err_remove_irqchip:
1575 gpiochip_irqchip_remove(chip);
1576err_remove_irqchip_mask:
1577 gpiochip_irqchip_free_valid_mask(chip);
35779890 1578err_remove_acpi_chip:
225fce83 1579 acpi_gpiochip_remove(chip);
35779890 1580err_remove_of_chip:
6d86750c 1581 gpiochip_free_hogs(chip);
225fce83 1582 of_gpiochip_remove(chip);
35779890 1583err_free_gpiochip_mask:
2f4133bb 1584 gpiochip_remove_pin_ranges(chip);
726cb3ba 1585 gpiochip_free_valid_mask(chip);
5f3ca732 1586err_remove_from_list:
225fce83 1587 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1588 list_del(&gdev->list);
3bae4811 1589 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1590err_free_label:
fcf273e5 1591 kfree_const(gdev->label);
476e2fc5
GR
1592err_free_descs:
1593 kfree(gdev->descs);
a05a1404 1594err_free_ida:
ff2b1359 1595 ida_simple_remove(&gpio_ida, gdev->id);
a05a1404 1596err_free_gdev:
d2876d08 1597 /* failures here can mean systems won't boot... */
1777fc97 1598 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
fdeb8e15 1599 gdev->base, gdev->base + gdev->ngpio - 1,
d377f56f 1600 chip->label ? : "generic", ret);
fdeb8e15 1601 kfree(gdev);
d377f56f 1602 return ret;
d2876d08 1603}
959bc7b2 1604EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
d2876d08 1605
43c54eca
LW
1606/**
1607 * gpiochip_get_data() - get per-subdriver data for the chip
950d55f5
TR
1608 * @chip: GPIO chip
1609 *
1610 * Returns:
1611 * The per-subdriver data for the chip.
43c54eca
LW
1612 */
1613void *gpiochip_get_data(struct gpio_chip *chip)
1614{
1615 return chip->gpiodev->data;
1616}
1617EXPORT_SYMBOL_GPL(gpiochip_get_data);
1618
d2876d08
DB
1619/**
1620 * gpiochip_remove() - unregister a gpio_chip
1621 * @chip: the chip to unregister
1622 *
1623 * A gpio_chip with any GPIOs still requested may not be removed.
1624 */
e1db1706 1625void gpiochip_remove(struct gpio_chip *chip)
d2876d08 1626{
ff2b1359 1627 struct gpio_device *gdev = chip->gpiodev;
fab28b89 1628 struct gpio_desc *desc;
d2876d08 1629 unsigned long flags;
1c3cdb18 1630 unsigned i;
fab28b89 1631 bool requested = false;
d2876d08 1632
ff2b1359 1633 /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
afbc4f31 1634 gpiochip_sysfs_unregister(gdev);
5018ada6 1635 gpiochip_free_hogs(chip);
bd203bd5
BJZ
1636 /* Numb the device, cancelling all outstanding operations */
1637 gdev->chip = NULL;
00acc3dc 1638 gpiochip_irqchip_remove(chip);
6072b9dc 1639 acpi_gpiochip_remove(chip);
391c970c 1640 of_gpiochip_remove(chip);
2f4133bb 1641 gpiochip_remove_pin_ranges(chip);
726cb3ba 1642 gpiochip_free_valid_mask(chip);
43c54eca
LW
1643 /*
1644 * We accept no more calls into the driver from this point, so
1645 * NULL the driver data pointer
1646 */
1647 gdev->data = NULL;
391c970c 1648
6798acaa 1649 spin_lock_irqsave(&gpio_lock, flags);
fdeb8e15 1650 for (i = 0; i < gdev->ngpio; i++) {
1c3cdb18 1651 desc = &gdev->descs[i];
fab28b89
JH
1652 if (test_bit(FLAG_REQUESTED, &desc->flags))
1653 requested = true;
d2876d08 1654 }
d2876d08 1655 spin_unlock_irqrestore(&gpio_lock, flags);
14e85c0e 1656
fab28b89 1657 if (requested)
fdeb8e15 1658 dev_crit(&gdev->dev,
58383c78 1659 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
fab28b89 1660
ff2b1359
LW
1661 /*
1662 * The gpiochip side puts its use of the device to rest here:
1663 * if there are no userspace clients, the chardev and device will
1664 * be removed, else it will be dangling until the last user is
1665 * gone.
1666 */
111379dc 1667 cdev_device_del(&gdev->chrdev, &gdev->dev);
ff2b1359 1668 put_device(&gdev->dev);
d2876d08
DB
1669}
1670EXPORT_SYMBOL_GPL(gpiochip_remove);
1671
0cf3292c
LD
1672static void devm_gpio_chip_release(struct device *dev, void *res)
1673{
1674 struct gpio_chip *chip = *(struct gpio_chip **)res;
1675
1676 gpiochip_remove(chip);
1677}
1678
0cf3292c 1679/**
51158416 1680 * devm_gpiochip_add_data() - Resource managed gpiochip_add_data()
3925b90f 1681 * @dev: pointer to the device that gpio_chip belongs to.
0cf3292c 1682 * @chip: the chip to register, with chip->base initialized
950d55f5 1683 * @data: driver-private data associated with this chip
0cf3292c 1684 *
950d55f5 1685 * Context: potentially before irqs will work
0cf3292c
LD
1686 *
1687 * The gpio chip automatically be released when the device is unbound.
950d55f5
TR
1688 *
1689 * Returns:
1690 * A negative errno if the chip can't be registered, such as because the
1691 * chip->base is invalid or already associated with a different chip.
1692 * Otherwise it returns zero as a success code.
0cf3292c
LD
1693 */
1694int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip,
1695 void *data)
1696{
1697 struct gpio_chip **ptr;
1698 int ret;
1699
1700 ptr = devres_alloc(devm_gpio_chip_release, sizeof(*ptr),
1701 GFP_KERNEL);
1702 if (!ptr)
1703 return -ENOMEM;
1704
1705 ret = gpiochip_add_data(chip, data);
1706 if (ret < 0) {
1707 devres_free(ptr);
1708 return ret;
1709 }
1710
1711 *ptr = chip;
1712 devres_add(dev, ptr);
1713
1714 return 0;
1715}
1716EXPORT_SYMBOL_GPL(devm_gpiochip_add_data);
1717
594fa265
GL
1718/**
1719 * gpiochip_find() - iterator for locating a specific gpio_chip
1720 * @data: data to pass to match function
950d55f5 1721 * @match: Callback function to check gpio_chip
594fa265
GL
1722 *
1723 * Similar to bus_find_device. It returns a reference to a gpio_chip as
1724 * determined by a user supplied @match callback. The callback should return
1725 * 0 if the device doesn't match and non-zero if it does. If the callback is
1726 * non-zero, this function will return to the caller and not iterate over any
1727 * more gpio_chips.
1728 */
07ce8ec7 1729struct gpio_chip *gpiochip_find(void *data,
6e2cf651 1730 int (*match)(struct gpio_chip *chip,
3d0f7cf0 1731 void *data))
594fa265 1732{
ff2b1359 1733 struct gpio_device *gdev;
acf06ff7 1734 struct gpio_chip *chip = NULL;
594fa265 1735 unsigned long flags;
594fa265
GL
1736
1737 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1738 list_for_each_entry(gdev, &gpio_devices, list)
acf06ff7
MY
1739 if (gdev->chip && match(gdev->chip, data)) {
1740 chip = gdev->chip;
594fa265 1741 break;
acf06ff7 1742 }
ff2b1359 1743
594fa265
GL
1744 spin_unlock_irqrestore(&gpio_lock, flags);
1745
1746 return chip;
1747}
8fa0c9bf 1748EXPORT_SYMBOL_GPL(gpiochip_find);
d2876d08 1749
79697ef9
AC
1750static int gpiochip_match_name(struct gpio_chip *chip, void *data)
1751{
1752 const char *name = data;
1753
1754 return !strcmp(chip->label, name);
1755}
1756
1757static struct gpio_chip *find_chip_by_name(const char *name)
1758{
1759 return gpiochip_find((void *)name, gpiochip_match_name);
1760}
1761
14250520
LW
1762#ifdef CONFIG_GPIOLIB_IRQCHIP
1763
1764/*
1765 * The following is irqchip helper code for gpiochips.
1766 */
1767
9411e3aa
AS
1768static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
1769{
1770 struct gpio_irq_chip *girq = &gc->irq;
1771
1772 if (!girq->init_hw)
1773 return 0;
1774
1775 return girq->init_hw(gc);
1776}
1777
5fbe5b58 1778static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb 1779{
5fbe5b58
LW
1780 struct gpio_irq_chip *girq = &gc->irq;
1781
1782 if (!girq->init_valid_mask)
79b804cb
MW
1783 return 0;
1784
5fbe5b58
LW
1785 girq->valid_mask = gpiochip_allocate_mask(gc);
1786 if (!girq->valid_mask)
79b804cb
MW
1787 return -ENOMEM;
1788
5fbe5b58
LW
1789 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
1790
79b804cb
MW
1791 return 0;
1792}
1793
1794static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip)
1795{
7bdbd1ec 1796 bitmap_free(gpiochip->irq.valid_mask);
dc7b0387 1797 gpiochip->irq.valid_mask = NULL;
79b804cb
MW
1798}
1799
64ff2c8e
SB
1800bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gpiochip,
1801 unsigned int offset)
79b804cb 1802{
726cb3ba
SB
1803 if (!gpiochip_line_is_valid(gpiochip, offset))
1804 return false;
79b804cb 1805 /* No mask means all valid */
dc7b0387 1806 if (likely(!gpiochip->irq.valid_mask))
79b804cb 1807 return true;
dc7b0387 1808 return test_bit(offset, gpiochip->irq.valid_mask);
79b804cb 1809}
64ff2c8e 1810EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
79b804cb 1811
14250520 1812/**
d245b3f9 1813 * gpiochip_set_cascaded_irqchip() - connects a cascaded irqchip to a gpiochip
4892d3a6 1814 * @gc: the gpiochip to set the irqchip chain to
14250520
LW
1815 * @parent_irq: the irq number corresponding to the parent IRQ for this
1816 * chained irqchip
1817 * @parent_handler: the parent interrupt handler for the accumulated IRQ
3f97d5fc
LW
1818 * coming out of the gpiochip. If the interrupt is nested rather than
1819 * cascaded, pass NULL in this handler argument
14250520 1820 */
4892d3a6 1821static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gc,
6f79309a 1822 unsigned int parent_irq,
d245b3f9 1823 irq_flow_handler_t parent_handler)
14250520 1824{
4892d3a6
LW
1825 struct gpio_irq_chip *girq = &gc->irq;
1826 struct device *dev = &gc->gpiodev->dev;
1827
1828 if (!girq->domain) {
1829 chip_err(gc, "called %s before setting up irqchip\n",
83141a77 1830 __func__);
1c8732bb
LW
1831 return;
1832 }
1833
3f97d5fc 1834 if (parent_handler) {
4892d3a6
LW
1835 if (gc->can_sleep) {
1836 chip_err(gc,
b1911710 1837 "you cannot have chained interrupts on a chip that may sleep\n");
3f97d5fc
LW
1838 return;
1839 }
4892d3a6
LW
1840 girq->parents = devm_kcalloc(dev, 1,
1841 sizeof(*girq->parents),
1842 GFP_KERNEL);
1843 if (!girq->parents) {
1844 chip_err(gc, "out of memory allocating parent IRQ\n");
1845 return;
1846 }
1847 girq->parents[0] = parent_irq;
1848 girq->num_parents = 1;
3f97d5fc
LW
1849 /*
1850 * The parent irqchip is already using the chip_data for this
1851 * irqchip, so our callbacks simply use the handler_data.
1852 */
f7f87753 1853 irq_set_chained_handler_and_data(parent_irq, parent_handler,
4892d3a6 1854 gc);
3f97d5fc 1855 }
14250520 1856}
d245b3f9
LW
1857
1858/**
1859 * gpiochip_set_chained_irqchip() - connects a chained irqchip to a gpiochip
1860 * @gpiochip: the gpiochip to set the irqchip chain to
1861 * @irqchip: the irqchip to chain to the gpiochip
1862 * @parent_irq: the irq number corresponding to the parent IRQ for this
1863 * chained irqchip
1864 * @parent_handler: the parent interrupt handler for the accumulated IRQ
40f5ff4f 1865 * coming out of the gpiochip.
d245b3f9
LW
1866 */
1867void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
1868 struct irq_chip *irqchip,
6f79309a 1869 unsigned int parent_irq,
d245b3f9
LW
1870 irq_flow_handler_t parent_handler)
1871{
60ed54ca
TR
1872 if (gpiochip->irq.threaded) {
1873 chip_err(gpiochip, "tried to chain a threaded gpiochip\n");
1874 return;
1875 }
1876
3c1f6b2d 1877 gpiochip_set_cascaded_irqchip(gpiochip, parent_irq, parent_handler);
d245b3f9 1878}
14250520
LW
1879EXPORT_SYMBOL_GPL(gpiochip_set_chained_irqchip);
1880
d245b3f9
LW
1881/**
1882 * gpiochip_set_nested_irqchip() - connects a nested irqchip to a gpiochip
1883 * @gpiochip: the gpiochip to set the irqchip nested handler to
1884 * @irqchip: the irqchip to nest to the gpiochip
1885 * @parent_irq: the irq number corresponding to the parent IRQ for this
1886 * nested irqchip
1887 */
1888void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip,
1889 struct irq_chip *irqchip,
6f79309a 1890 unsigned int parent_irq)
d245b3f9 1891{
3c1f6b2d 1892 gpiochip_set_cascaded_irqchip(gpiochip, parent_irq, NULL);
d245b3f9
LW
1893}
1894EXPORT_SYMBOL_GPL(gpiochip_set_nested_irqchip);
1895
fdd61a01
LW
1896#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1897
1898/**
1899 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
1900 * to a gpiochip
1901 * @gc: the gpiochip to set the irqchip hierarchical handler to
1902 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
1903 * will then percolate up to the parent
1904 */
1905static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
1906 struct irq_chip *irqchip)
1907{
1908 /* DT will deal with mapping each IRQ as we go along */
1909 if (is_of_node(gc->irq.fwnode))
1910 return;
1911
1912 /*
1913 * This is for legacy and boardfile "irqchip" fwnodes: allocate
1914 * irqs upfront instead of dynamically since we don't have the
1915 * dynamic type of allocation that hardware description languages
1916 * provide. Once all GPIO drivers using board files are gone from
1917 * the kernel we can delete this code, but for a transitional period
1918 * it is necessary to keep this around.
1919 */
1920 if (is_fwnode_irqchip(gc->irq.fwnode)) {
1921 int i;
1922 int ret;
1923
1924 for (i = 0; i < gc->ngpio; i++) {
1925 struct irq_fwspec fwspec;
1926 unsigned int parent_hwirq;
1927 unsigned int parent_type;
1928 struct gpio_irq_chip *girq = &gc->irq;
1929
1930 /*
1931 * We call the child to parent translation function
1932 * only to check if the child IRQ is valid or not.
1933 * Just pick the rising edge type here as that is what
1934 * we likely need to support.
1935 */
1936 ret = girq->child_to_parent_hwirq(gc, i,
1937 IRQ_TYPE_EDGE_RISING,
1938 &parent_hwirq,
1939 &parent_type);
1940 if (ret) {
1941 chip_err(gc, "skip set-up on hwirq %d\n",
1942 i);
1943 continue;
1944 }
1945
1946 fwspec.fwnode = gc->irq.fwnode;
1947 /* This is the hwirq for the GPIO line side of things */
1948 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
1949 /* Just pick something */
1950 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
1951 fwspec.param_count = 2;
1952 ret = __irq_domain_alloc_irqs(gc->irq.domain,
1953 /* just pick something */
1954 -1,
1955 1,
1956 NUMA_NO_NODE,
1957 &fwspec,
1958 false,
1959 NULL);
1960 if (ret < 0) {
1961 chip_err(gc,
1962 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1963 i, parent_hwirq,
1964 ret);
1965 }
1966 }
1967 }
1968
1969 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1970
1971 return;
1972}
1973
1974static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1975 struct irq_fwspec *fwspec,
1976 unsigned long *hwirq,
1977 unsigned int *type)
1978{
1979 /* We support standard DT translation */
1980 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1981 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1982 }
1983
1984 /* This is for board files and others not using DT */
1985 if (is_fwnode_irqchip(fwspec->fwnode)) {
1986 int ret;
1987
1988 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1989 if (ret)
1990 return ret;
1991 WARN_ON(*type == IRQ_TYPE_NONE);
1992 return 0;
1993 }
1994 return -EINVAL;
1995}
1996
1997static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1998 unsigned int irq,
1999 unsigned int nr_irqs,
2000 void *data)
2001{
2002 struct gpio_chip *gc = d->host_data;
2003 irq_hw_number_t hwirq;
2004 unsigned int type = IRQ_TYPE_NONE;
2005 struct irq_fwspec *fwspec = data;
24258761 2006 void *parent_arg;
fdd61a01
LW
2007 unsigned int parent_hwirq;
2008 unsigned int parent_type;
2009 struct gpio_irq_chip *girq = &gc->irq;
2010 int ret;
2011
2012 /*
2013 * The nr_irqs parameter is always one except for PCI multi-MSI
2014 * so this should not happen.
2015 */
2016 WARN_ON(nr_irqs != 1);
2017
2018 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
2019 if (ret)
2020 return ret;
2021
2022 chip_info(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
2023
2024 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
2025 &parent_hwirq, &parent_type);
2026 if (ret) {
2027 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
2028 return ret;
2029 }
2030 chip_info(gc, "found parent hwirq %u\n", parent_hwirq);
2031
2032 /*
2033 * We set handle_bad_irq because the .set_type() should
2034 * always be invoked and set the right type of handler.
2035 */
2036 irq_domain_set_info(d,
2037 irq,
2038 hwirq,
2039 gc->irq.chip,
2040 gc,
2041 girq->handler,
2042 NULL, NULL);
2043 irq_set_probe(irq);
2044
fdd61a01 2045 /* This parent only handles asserted level IRQs */
24258761
KH
2046 parent_arg = girq->populate_parent_alloc_arg(gc, parent_hwirq, parent_type);
2047 if (!parent_arg)
2048 return -ENOMEM;
2049
fdd61a01
LW
2050 chip_info(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
2051 irq, parent_hwirq);
24258761 2052 ret = irq_domain_alloc_irqs_parent(d, irq, 1, parent_arg);
fdd61a01
LW
2053 if (ret)
2054 chip_err(gc,
2055 "failed to allocate parent hwirq %d for hwirq %lu\n",
2056 parent_hwirq, hwirq);
2057
24258761 2058 kfree(parent_arg);
fdd61a01
LW
2059 return ret;
2060}
2061
2062static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *chip,
2063 unsigned int offset)
2064{
2065 return offset;
2066}
2067
2068static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
2069{
2070 ops->activate = gpiochip_irq_domain_activate;
2071 ops->deactivate = gpiochip_irq_domain_deactivate;
2072 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
2073 ops->free = irq_domain_free_irqs_common;
2074
2075 /*
2076 * We only allow overriding the translate() function for
2077 * hierarchical chips, and this should only be done if the user
2078 * really need something other than 1:1 translation.
2079 */
2080 if (!ops->translate)
2081 ops->translate = gpiochip_hierarchy_irq_domain_translate;
2082}
2083
2084static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
2085{
2086 if (!gc->irq.child_to_parent_hwirq ||
2087 !gc->irq.fwnode) {
2088 chip_err(gc, "missing irqdomain vital data\n");
2089 return -EINVAL;
2090 }
2091
2092 if (!gc->irq.child_offset_to_irq)
2093 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
2094
24258761
KH
2095 if (!gc->irq.populate_parent_alloc_arg)
2096 gc->irq.populate_parent_alloc_arg =
fdd61a01
LW
2097 gpiochip_populate_parent_fwspec_twocell;
2098
2099 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
2100
2101 gc->irq.domain = irq_domain_create_hierarchy(
2102 gc->irq.parent_domain,
2103 0,
2104 gc->ngpio,
2105 gc->irq.fwnode,
2106 &gc->irq.child_irq_domain_ops,
2107 gc);
2108
2109 if (!gc->irq.domain)
2110 return -ENOMEM;
2111
2112 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
2113
2114 return 0;
2115}
2116
2117static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
2118{
2119 return !!gc->irq.parent_domain;
2120}
2121
24258761 2122void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *chip,
fdd61a01
LW
2123 unsigned int parent_hwirq,
2124 unsigned int parent_type)
2125{
24258761
KH
2126 struct irq_fwspec *fwspec;
2127
2128 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
2129 if (!fwspec)
2130 return NULL;
2131
2132 fwspec->fwnode = chip->irq.parent_domain->fwnode;
fdd61a01
LW
2133 fwspec->param_count = 2;
2134 fwspec->param[0] = parent_hwirq;
2135 fwspec->param[1] = parent_type;
24258761
KH
2136
2137 return fwspec;
fdd61a01
LW
2138}
2139EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
2140
24258761 2141void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *chip,
fdd61a01
LW
2142 unsigned int parent_hwirq,
2143 unsigned int parent_type)
2144{
24258761
KH
2145 struct irq_fwspec *fwspec;
2146
2147 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
2148 if (!fwspec)
2149 return NULL;
2150
2151 fwspec->fwnode = chip->irq.parent_domain->fwnode;
fdd61a01
LW
2152 fwspec->param_count = 4;
2153 fwspec->param[0] = 0;
2154 fwspec->param[1] = parent_hwirq;
2155 fwspec->param[2] = 0;
2156 fwspec->param[3] = parent_type;
24258761
KH
2157
2158 return fwspec;
fdd61a01
LW
2159}
2160EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
2161
2162#else
2163
2164static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
2165{
2166 return -EINVAL;
2167}
2168
2169static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
2170{
2171 return false;
2172}
2173
2174#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
2175
14250520
LW
2176/**
2177 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
2178 * @d: the irqdomain used by this irqchip
2179 * @irq: the global irq number used by this GPIO irqchip irq
2180 * @hwirq: the local IRQ/GPIO line offset on this gpiochip
2181 *
2182 * This function will set up the mapping for a certain IRQ line on a
2183 * gpiochip by assigning the gpiochip as chip data, and using the irqchip
2184 * stored inside the gpiochip.
2185 */
1b95b4eb
TR
2186int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
2187 irq_hw_number_t hwirq)
14250520
LW
2188{
2189 struct gpio_chip *chip = d->host_data;
d377f56f 2190 int ret = 0;
14250520 2191
dc749a09
GS
2192 if (!gpiochip_irqchip_irq_valid(chip, hwirq))
2193 return -ENXIO;
2194
14250520 2195 irq_set_chip_data(irq, chip);
a0a8bcf4
GS
2196 /*
2197 * This lock class tells lockdep that GPIO irqs are in a different
2198 * category than their parents, so it won't report false recursion.
2199 */
39c3fd58 2200 irq_set_lockdep_class(irq, chip->irq.lock_key, chip->irq.request_key);
c7a0aa59 2201 irq_set_chip_and_handler(irq, chip->irq.chip, chip->irq.handler);
d245b3f9 2202 /* Chips that use nested thread handlers have them marked */
60ed54ca 2203 if (chip->irq.threaded)
1c8732bb 2204 irq_set_nested_thread(irq, 1);
14250520 2205 irq_set_noprobe(irq);
23393d49 2206
e0d89728 2207 if (chip->irq.num_parents == 1)
d377f56f 2208 ret = irq_set_parent(irq, chip->irq.parents[0]);
e0d89728 2209 else if (chip->irq.map)
d377f56f 2210 ret = irq_set_parent(irq, chip->irq.map[hwirq]);
e0d89728 2211
d377f56f
LW
2212 if (ret < 0)
2213 return ret;
e0d89728 2214
1333b90f
LW
2215 /*
2216 * No set-up of the hardware will happen if IRQ_TYPE_NONE
2217 * is passed as default type.
2218 */
3634eeb0
TR
2219 if (chip->irq.default_type != IRQ_TYPE_NONE)
2220 irq_set_irq_type(irq, chip->irq.default_type);
14250520
LW
2221
2222 return 0;
2223}
1b95b4eb 2224EXPORT_SYMBOL_GPL(gpiochip_irq_map);
14250520 2225
1b95b4eb 2226void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
c3626fde 2227{
1c8732bb
LW
2228 struct gpio_chip *chip = d->host_data;
2229
60ed54ca 2230 if (chip->irq.threaded)
1c8732bb 2231 irq_set_nested_thread(irq, 0);
c3626fde
LW
2232 irq_set_chip_and_handler(irq, NULL, NULL);
2233 irq_set_chip_data(irq, NULL);
2234}
1b95b4eb 2235EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
c3626fde 2236
14250520
LW
2237static const struct irq_domain_ops gpiochip_domain_ops = {
2238 .map = gpiochip_irq_map,
c3626fde 2239 .unmap = gpiochip_irq_unmap,
14250520
LW
2240 /* Virtually all GPIO irqchips are twocell:ed */
2241 .xlate = irq_domain_xlate_twocell,
2242};
2243
fdd61a01
LW
2244/*
2245 * TODO: move these activate/deactivate in under the hierarchicial
2246 * irqchip implementation as static once SPMI and SSBI (all external
2247 * users) are phased over.
2248 */
ef74f70e
BM
2249/**
2250 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
2251 * @domain: The IRQ domain used by this IRQ chip
2252 * @data: Outermost irq_data associated with the IRQ
2253 * @reserve: If set, only reserve an interrupt vector instead of assigning one
2254 *
2255 * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
2256 * used as the activate function for the &struct irq_domain_ops. The host_data
2257 * for the IRQ domain must be the &struct gpio_chip.
2258 */
2259int gpiochip_irq_domain_activate(struct irq_domain *domain,
2260 struct irq_data *data, bool reserve)
2261{
2262 struct gpio_chip *chip = domain->host_data;
2263
2264 return gpiochip_lock_as_irq(chip, data->hwirq);
2265}
2266EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
2267
2268/**
2269 * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
2270 * @domain: The IRQ domain used by this IRQ chip
2271 * @data: Outermost irq_data associated with the IRQ
2272 *
2273 * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
2274 * be used as the deactivate function for the &struct irq_domain_ops. The
2275 * host_data for the IRQ domain must be the &struct gpio_chip.
2276 */
2277void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
2278 struct irq_data *data)
2279{
2280 struct gpio_chip *chip = domain->host_data;
2281
2282 return gpiochip_unlock_as_irq(chip, data->hwirq);
2283}
2284EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
2285
4e6b8238 2286static int gpiochip_to_irq(struct gpio_chip *chip, unsigned offset)
14250520 2287{
fdd61a01
LW
2288 struct irq_domain *domain = chip->irq.domain;
2289
4e6b8238
HV
2290 if (!gpiochip_irqchip_irq_valid(chip, offset))
2291 return -ENXIO;
5b76e79c 2292
fdd61a01
LW
2293#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2294 if (irq_domain_is_hierarchy(domain)) {
2295 struct irq_fwspec spec;
2296
2297 spec.fwnode = domain->fwnode;
2298 spec.param_count = 2;
2299 spec.param[0] = chip->irq.child_offset_to_irq(chip, offset);
2300 spec.param[1] = IRQ_TYPE_NONE;
2301
2302 return irq_create_fwspec_mapping(&spec);
2303 }
2304#endif
2305
2306 return irq_create_mapping(domain, offset);
14250520
LW
2307}
2308
14250520
LW
2309static int gpiochip_irq_reqres(struct irq_data *d)
2310{
2311 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
5b76e79c 2312
4e6b8238 2313 return gpiochip_reqres_irq(chip, d->hwirq);
14250520
LW
2314}
2315
2316static void gpiochip_irq_relres(struct irq_data *d)
2317{
2318 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
2319
4e6b8238 2320 gpiochip_relres_irq(chip, d->hwirq);
14250520
LW
2321}
2322
461c1a7d 2323static void gpiochip_irq_enable(struct irq_data *d)
14250520 2324{
461c1a7d 2325 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
e0d89728 2326
461c1a7d
HV
2327 gpiochip_enable_irq(chip, d->hwirq);
2328 if (chip->irq.irq_enable)
2329 chip->irq.irq_enable(d);
2330 else
2331 chip->irq.chip->irq_unmask(d);
2332}
2333
2334static void gpiochip_irq_disable(struct irq_data *d)
2335{
2336 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
2337
2338 if (chip->irq.irq_disable)
2339 chip->irq.irq_disable(d);
2340 else
2341 chip->irq.chip->irq_mask(d);
2342 gpiochip_disable_irq(chip, d->hwirq);
2343}
2344
ca620f2d
HV
2345static void gpiochip_set_irq_hooks(struct gpio_chip *gpiochip)
2346{
2347 struct irq_chip *irqchip = gpiochip->irq.chip;
2348
2349 if (!irqchip->irq_request_resources &&
2350 !irqchip->irq_release_resources) {
2351 irqchip->irq_request_resources = gpiochip_irq_reqres;
2352 irqchip->irq_release_resources = gpiochip_irq_relres;
2353 }
461c1a7d
HV
2354 if (WARN_ON(gpiochip->irq.irq_enable))
2355 return;
171948ea
HV
2356 /* Check if the irqchip already has this hook... */
2357 if (irqchip->irq_enable == gpiochip_irq_enable) {
2358 /*
2359 * ...and if so, give a gentle warning that this is bad
2360 * practice.
2361 */
2362 chip_info(gpiochip,
2363 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
2364 return;
2365 }
461c1a7d
HV
2366 gpiochip->irq.irq_enable = irqchip->irq_enable;
2367 gpiochip->irq.irq_disable = irqchip->irq_disable;
2368 irqchip->irq_enable = gpiochip_irq_enable;
2369 irqchip->irq_disable = gpiochip_irq_disable;
14250520
LW
2370}
2371
e0d89728
TR
2372/**
2373 * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
2374 * @gpiochip: the GPIO chip to add the IRQ chip to
39c3fd58
AL
2375 * @lock_key: lockdep class for IRQ lock
2376 * @request_key: lockdep class for IRQ request
e0d89728 2377 */
959bc7b2 2378static int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
2379 struct lock_class_key *lock_key,
2380 struct lock_class_key *request_key)
e0d89728
TR
2381{
2382 struct irq_chip *irqchip = gpiochip->irq.chip;
fdd61a01 2383 const struct irq_domain_ops *ops = NULL;
e0d89728
TR
2384 struct device_node *np;
2385 unsigned int type;
2386 unsigned int i;
2387
2388 if (!irqchip)
2389 return 0;
2390
2391 if (gpiochip->irq.parent_handler && gpiochip->can_sleep) {
b1911710 2392 chip_err(gpiochip, "you cannot have chained interrupts on a chip that may sleep\n");
e0d89728
TR
2393 return -EINVAL;
2394 }
2395
2396 np = gpiochip->gpiodev->dev.of_node;
2397 type = gpiochip->irq.default_type;
2398
2399 /*
2400 * Specifying a default trigger is a terrible idea if DT or ACPI is
2401 * used to configure the interrupts, as you may end up with
2402 * conflicting triggers. Tell the user, and reset to NONE.
2403 */
2404 if (WARN(np && type != IRQ_TYPE_NONE,
2405 "%s: Ignoring %u default trigger\n", np->full_name, type))
2406 type = IRQ_TYPE_NONE;
2407
2408 if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) {
2409 acpi_handle_warn(ACPI_HANDLE(gpiochip->parent),
2410 "Ignoring %u default trigger\n", type);
2411 type = IRQ_TYPE_NONE;
2412 }
2413
2414 gpiochip->to_irq = gpiochip_to_irq;
2415 gpiochip->irq.default_type = type;
959bc7b2 2416 gpiochip->irq.lock_key = lock_key;
39c3fd58 2417 gpiochip->irq.request_key = request_key;
e0d89728 2418
fdd61a01
LW
2419 /* If a parent irqdomain is provided, let's build a hierarchy */
2420 if (gpiochip_hierarchy_is_hierarchical(gpiochip)) {
2421 int ret = gpiochip_hierarchy_add_domain(gpiochip);
2422 if (ret)
2423 return ret;
2424 } else {
2425 /* Some drivers provide custom irqdomain ops */
2426 if (gpiochip->irq.domain_ops)
2427 ops = gpiochip->irq.domain_ops;
2428
2429 if (!ops)
2430 ops = &gpiochip_domain_ops;
2431 gpiochip->irq.domain = irq_domain_add_simple(np,
2432 gpiochip->ngpio,
2433 gpiochip->irq.first,
2434 ops, gpiochip);
2435 if (!gpiochip->irq.domain)
2436 return -EINVAL;
2437 }
e0d89728 2438
e0d89728
TR
2439 if (gpiochip->irq.parent_handler) {
2440 void *data = gpiochip->irq.parent_handler_data ?: gpiochip;
2441
2442 for (i = 0; i < gpiochip->irq.num_parents; i++) {
2443 /*
2444 * The parent IRQ chip is already using the chip_data
2445 * for this IRQ chip, so our callbacks simply use the
2446 * handler_data.
2447 */
2448 irq_set_chained_handler_and_data(gpiochip->irq.parents[i],
2449 gpiochip->irq.parent_handler,
2450 data);
2451 }
e0d89728
TR
2452 }
2453
ca620f2d
HV
2454 gpiochip_set_irq_hooks(gpiochip);
2455
e0d89728
TR
2456 acpi_gpiochip_request_interrupts(gpiochip);
2457
2458 return 0;
2459}
2460
14250520
LW
2461/**
2462 * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
2463 * @gpiochip: the gpiochip to remove the irqchip from
2464 *
2465 * This is called only from gpiochip_remove()
2466 */
2467static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)
2468{
ca620f2d 2469 struct irq_chip *irqchip = gpiochip->irq.chip;
39e5f096 2470 unsigned int offset;
c3626fde 2471
afa82fab
MW
2472 acpi_gpiochip_free_interrupts(gpiochip);
2473
ca620f2d 2474 if (irqchip && gpiochip->irq.parent_handler) {
39e5f096
TR
2475 struct gpio_irq_chip *irq = &gpiochip->irq;
2476 unsigned int i;
2477
2478 for (i = 0; i < irq->num_parents; i++)
2479 irq_set_chained_handler_and_data(irq->parents[i],
2480 NULL, NULL);
25e4fe92
DES
2481 }
2482
c3626fde 2483 /* Remove all IRQ mappings and delete the domain */
f0fbe7bc 2484 if (gpiochip->irq.domain) {
39e5f096
TR
2485 unsigned int irq;
2486
79b804cb
MW
2487 for (offset = 0; offset < gpiochip->ngpio; offset++) {
2488 if (!gpiochip_irqchip_irq_valid(gpiochip, offset))
2489 continue;
f0fbe7bc
TR
2490
2491 irq = irq_find_mapping(gpiochip->irq.domain, offset);
2492 irq_dispose_mapping(irq);
79b804cb 2493 }
f0fbe7bc
TR
2494
2495 irq_domain_remove(gpiochip->irq.domain);
c3626fde 2496 }
14250520 2497
461c1a7d
HV
2498 if (irqchip) {
2499 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
2500 irqchip->irq_request_resources = NULL;
2501 irqchip->irq_release_resources = NULL;
2502 }
2503 if (irqchip->irq_enable == gpiochip_irq_enable) {
2504 irqchip->irq_enable = gpiochip->irq.irq_enable;
2505 irqchip->irq_disable = gpiochip->irq.irq_disable;
2506 }
14250520 2507 }
461c1a7d
HV
2508 gpiochip->irq.irq_enable = NULL;
2509 gpiochip->irq.irq_disable = NULL;
ca620f2d 2510 gpiochip->irq.chip = NULL;
79b804cb
MW
2511
2512 gpiochip_irqchip_free_valid_mask(gpiochip);
14250520
LW
2513}
2514
2515/**
739e6f59 2516 * gpiochip_irqchip_add_key() - adds an irqchip to a gpiochip
14250520
LW
2517 * @gpiochip: the gpiochip to add the irqchip to
2518 * @irqchip: the irqchip to add to the gpiochip
2519 * @first_irq: if not dynamically assigned, the base (first) IRQ to
2520 * allocate gpiochip irqs from
2521 * @handler: the irq handler to use (often a predefined irq core function)
1333b90f
LW
2522 * @type: the default type for IRQs on this irqchip, pass IRQ_TYPE_NONE
2523 * to have the core avoid setting up any default type in the hardware.
60ed54ca 2524 * @threaded: whether this irqchip uses a nested thread handler
39c3fd58
AL
2525 * @lock_key: lockdep class for IRQ lock
2526 * @request_key: lockdep class for IRQ request
14250520
LW
2527 *
2528 * This function closely associates a certain irqchip with a certain
2529 * gpiochip, providing an irq domain to translate the local IRQs to
2530 * global irqs in the gpiolib core, and making sure that the gpiochip
2531 * is passed as chip data to all related functions. Driver callbacks
09dd5f9e 2532 * need to use gpiochip_get_data() to get their local state containers back
14250520
LW
2533 * from the gpiochip passed as chip data. An irqdomain will be stored
2534 * in the gpiochip that shall be used by the driver to handle IRQ number
2535 * translation. The gpiochip will need to be initialized and registered
2536 * before calling this function.
2537 *
c3626fde
LW
2538 * This function will handle two cell:ed simple IRQs and assumes all
2539 * the pins on the gpiochip can generate a unique IRQ. Everything else
14250520
LW
2540 * need to be open coded.
2541 */
739e6f59
LW
2542int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip,
2543 struct irq_chip *irqchip,
2544 unsigned int first_irq,
2545 irq_flow_handler_t handler,
2546 unsigned int type,
60ed54ca 2547 bool threaded,
39c3fd58
AL
2548 struct lock_class_key *lock_key,
2549 struct lock_class_key *request_key)
14250520
LW
2550{
2551 struct device_node *of_node;
14250520
LW
2552
2553 if (!gpiochip || !irqchip)
2554 return -EINVAL;
2555
58383c78 2556 if (!gpiochip->parent) {
14250520
LW
2557 pr_err("missing gpiochip .dev parent pointer\n");
2558 return -EINVAL;
2559 }
60ed54ca 2560 gpiochip->irq.threaded = threaded;
58383c78 2561 of_node = gpiochip->parent->of_node;
14250520
LW
2562#ifdef CONFIG_OF_GPIO
2563 /*
20a8a968 2564 * If the gpiochip has an assigned OF node this takes precedence
c88402c2
BJZ
2565 * FIXME: get rid of this and use gpiochip->parent->of_node
2566 * everywhere
14250520
LW
2567 */
2568 if (gpiochip->of_node)
2569 of_node = gpiochip->of_node;
2570#endif
332e99d5 2571 /*
0a1e0053 2572 * Specifying a default trigger is a terrible idea if DT or ACPI is
332e99d5
MZ
2573 * used to configure the interrupts, as you may end-up with
2574 * conflicting triggers. Tell the user, and reset to NONE.
2575 */
2576 if (WARN(of_node && type != IRQ_TYPE_NONE,
7eb6ce2f 2577 "%pOF: Ignoring %d default trigger\n", of_node, type))
332e99d5 2578 type = IRQ_TYPE_NONE;
0a1e0053
MW
2579 if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) {
2580 acpi_handle_warn(ACPI_HANDLE(gpiochip->parent),
2581 "Ignoring %d default trigger\n", type);
2582 type = IRQ_TYPE_NONE;
2583 }
332e99d5 2584
da80ff81 2585 gpiochip->irq.chip = irqchip;
c7a0aa59 2586 gpiochip->irq.handler = handler;
3634eeb0 2587 gpiochip->irq.default_type = type;
14250520 2588 gpiochip->to_irq = gpiochip_to_irq;
ca9df053 2589 gpiochip->irq.lock_key = lock_key;
39c3fd58 2590 gpiochip->irq.request_key = request_key;
f0fbe7bc 2591 gpiochip->irq.domain = irq_domain_add_simple(of_node,
14250520
LW
2592 gpiochip->ngpio, first_irq,
2593 &gpiochip_domain_ops, gpiochip);
f0fbe7bc 2594 if (!gpiochip->irq.domain) {
da80ff81 2595 gpiochip->irq.chip = NULL;
14250520
LW
2596 return -EINVAL;
2597 }
8b67a1f0 2598
ca620f2d 2599 gpiochip_set_irq_hooks(gpiochip);
14250520 2600
afa82fab
MW
2601 acpi_gpiochip_request_interrupts(gpiochip);
2602
14250520
LW
2603 return 0;
2604}
739e6f59 2605EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_key);
14250520
LW
2606
2607#else /* CONFIG_GPIOLIB_IRQCHIP */
2608
959bc7b2 2609static inline int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
2610 struct lock_class_key *lock_key,
2611 struct lock_class_key *request_key)
e0d89728
TR
2612{
2613 return 0;
2614}
14250520 2615static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip) {}
9411e3aa
AS
2616
2617static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gpiochip)
2618{
2619 return 0;
2620}
2621
79b804cb
MW
2622static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip)
2623{
2624 return 0;
2625}
2626static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip)
2627{ }
14250520
LW
2628
2629#endif /* CONFIG_GPIOLIB_IRQCHIP */
2630
c771c2f4
JG
2631/**
2632 * gpiochip_generic_request() - request the gpio function for a pin
2633 * @chip: the gpiochip owning the GPIO
2634 * @offset: the offset of the GPIO to request for GPIO function
2635 */
2636int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset)
2637{
a9a1d2a7 2638 return pinctrl_gpio_request(chip->gpiodev->base + offset);
c771c2f4
JG
2639}
2640EXPORT_SYMBOL_GPL(gpiochip_generic_request);
2641
2642/**
2643 * gpiochip_generic_free() - free the gpio function from a pin
2644 * @chip: the gpiochip to request the gpio function for
2645 * @offset: the offset of the GPIO to free from GPIO function
2646 */
2647void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset)
2648{
a9a1d2a7 2649 pinctrl_gpio_free(chip->gpiodev->base + offset);
c771c2f4
JG
2650}
2651EXPORT_SYMBOL_GPL(gpiochip_generic_free);
2652
2956b5d9
MW
2653/**
2654 * gpiochip_generic_config() - apply configuration for a pin
2655 * @chip: the gpiochip owning the GPIO
2656 * @offset: the offset of the GPIO to apply the configuration
2657 * @config: the configuration to be applied
2658 */
2659int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset,
2660 unsigned long config)
2661{
2662 return pinctrl_gpio_set_config(chip->gpiodev->base + offset, config);
2663}
2664EXPORT_SYMBOL_GPL(gpiochip_generic_config);
2665
f23f1516 2666#ifdef CONFIG_PINCTRL
165adc9c 2667
586a87e6
CR
2668/**
2669 * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
2670 * @chip: the gpiochip to add the range for
d32651f6 2671 * @pctldev: the pin controller to map to
586a87e6
CR
2672 * @gpio_offset: the start offset in the current gpio_chip number space
2673 * @pin_group: name of the pin group inside the pin controller
973c1714
CL
2674 *
2675 * Calling this function directly from a DeviceTree-supported
2676 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2677 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2678 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
586a87e6
CR
2679 */
2680int gpiochip_add_pingroup_range(struct gpio_chip *chip,
2681 struct pinctrl_dev *pctldev,
2682 unsigned int gpio_offset, const char *pin_group)
2683{
2684 struct gpio_pin_range *pin_range;
fdeb8e15 2685 struct gpio_device *gdev = chip->gpiodev;
586a87e6
CR
2686 int ret;
2687
2688 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
2689 if (!pin_range) {
1a2a99c6 2690 chip_err(chip, "failed to allocate pin ranges\n");
586a87e6
CR
2691 return -ENOMEM;
2692 }
2693
2694 /* Use local offset as range ID */
2695 pin_range->range.id = gpio_offset;
2696 pin_range->range.gc = chip;
2697 pin_range->range.name = chip->label;
fdeb8e15 2698 pin_range->range.base = gdev->base + gpio_offset;
586a87e6
CR
2699 pin_range->pctldev = pctldev;
2700
2701 ret = pinctrl_get_group_pins(pctldev, pin_group,
2702 &pin_range->range.pins,
2703 &pin_range->range.npins);
61c6375d
MN
2704 if (ret < 0) {
2705 kfree(pin_range);
586a87e6 2706 return ret;
61c6375d 2707 }
586a87e6
CR
2708
2709 pinctrl_add_gpio_range(pctldev, &pin_range->range);
2710
1a2a99c6
AS
2711 chip_dbg(chip, "created GPIO range %d->%d ==> %s PINGRP %s\n",
2712 gpio_offset, gpio_offset + pin_range->range.npins - 1,
586a87e6
CR
2713 pinctrl_dev_get_devname(pctldev), pin_group);
2714
20ec3e39 2715 list_add_tail(&pin_range->node, &gdev->pin_ranges);
586a87e6
CR
2716
2717 return 0;
2718}
2719EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
2720
3f0f8670
LW
2721/**
2722 * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
2723 * @chip: the gpiochip to add the range for
950d55f5 2724 * @pinctl_name: the dev_name() of the pin controller to map to
316511c0
LW
2725 * @gpio_offset: the start offset in the current gpio_chip number space
2726 * @pin_offset: the start offset in the pin controller number space
3f0f8670
LW
2727 * @npins: the number of pins from the offset of each pin space (GPIO and
2728 * pin controller) to accumulate in this range
950d55f5
TR
2729 *
2730 * Returns:
2731 * 0 on success, or a negative error-code on failure.
973c1714
CL
2732 *
2733 * Calling this function directly from a DeviceTree-supported
2734 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2735 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2736 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
3f0f8670 2737 */
1e63d7b9 2738int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
316511c0 2739 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 2740 unsigned int npins)
f23f1516
SH
2741{
2742 struct gpio_pin_range *pin_range;
fdeb8e15 2743 struct gpio_device *gdev = chip->gpiodev;
b4d4b1f0 2744 int ret;
f23f1516 2745
3f0f8670 2746 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
f23f1516 2747 if (!pin_range) {
1a2a99c6 2748 chip_err(chip, "failed to allocate pin ranges\n");
1e63d7b9 2749 return -ENOMEM;
f23f1516
SH
2750 }
2751
3f0f8670 2752 /* Use local offset as range ID */
316511c0 2753 pin_range->range.id = gpio_offset;
3f0f8670 2754 pin_range->range.gc = chip;
f23f1516 2755 pin_range->range.name = chip->label;
fdeb8e15 2756 pin_range->range.base = gdev->base + gpio_offset;
316511c0 2757 pin_range->range.pin_base = pin_offset;
f23f1516 2758 pin_range->range.npins = npins;
192c369c 2759 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
f23f1516 2760 &pin_range->range);
8f23ca1a 2761 if (IS_ERR(pin_range->pctldev)) {
b4d4b1f0 2762 ret = PTR_ERR(pin_range->pctldev);
1a2a99c6 2763 chip_err(chip, "could not create pin range\n");
3f0f8670 2764 kfree(pin_range);
b4d4b1f0 2765 return ret;
3f0f8670 2766 }
1a2a99c6
AS
2767 chip_dbg(chip, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
2768 gpio_offset, gpio_offset + npins - 1,
316511c0
LW
2769 pinctl_name,
2770 pin_offset, pin_offset + npins - 1);
f23f1516 2771
20ec3e39 2772 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1e63d7b9
LW
2773
2774 return 0;
f23f1516 2775}
165adc9c 2776EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
f23f1516 2777
3f0f8670
LW
2778/**
2779 * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
2780 * @chip: the chip to remove all the mappings for
2781 */
f23f1516
SH
2782void gpiochip_remove_pin_ranges(struct gpio_chip *chip)
2783{
2784 struct gpio_pin_range *pin_range, *tmp;
20ec3e39 2785 struct gpio_device *gdev = chip->gpiodev;
f23f1516 2786
20ec3e39 2787 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
f23f1516
SH
2788 list_del(&pin_range->node);
2789 pinctrl_remove_gpio_range(pin_range->pctldev,
2790 &pin_range->range);
3f0f8670 2791 kfree(pin_range);
f23f1516
SH
2792 }
2793}
165adc9c
LW
2794EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
2795
2796#endif /* CONFIG_PINCTRL */
f23f1516 2797
d2876d08
DB
2798/* These "optional" allocation calls help prevent drivers from stomping
2799 * on each other, and help provide better diagnostics in debugfs.
2800 * They're called even less than the "set direction" calls.
2801 */
fac9d885 2802static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
d2876d08 2803{
fdeb8e15 2804 struct gpio_chip *chip = desc->gdev->chip;
d377f56f 2805 int ret;
d2876d08 2806 unsigned long flags;
3789f5ac 2807 unsigned offset;
d2876d08 2808
18534df4
MS
2809 if (label) {
2810 label = kstrdup_const(label, GFP_KERNEL);
2811 if (!label)
2812 return -ENOMEM;
2813 }
2814
bcabdef1
AC
2815 spin_lock_irqsave(&gpio_lock, flags);
2816
d2876d08 2817 /* NOTE: gpio_request() can be called in early boot,
35e8bb51 2818 * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
d2876d08
DB
2819 */
2820
2821 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
2822 desc_set_label(desc, label ? : "?");
d377f56f 2823 ret = 0;
438d8908 2824 } else {
18534df4 2825 kfree_const(label);
d377f56f 2826 ret = -EBUSY;
7460db56 2827 goto done;
35e8bb51
DB
2828 }
2829
2830 if (chip->request) {
2831 /* chip->request may sleep */
2832 spin_unlock_irqrestore(&gpio_lock, flags);
3789f5ac
BD
2833 offset = gpio_chip_hwgpio(desc);
2834 if (gpiochip_line_is_valid(chip, offset))
d377f56f 2835 ret = chip->request(chip, offset);
3789f5ac 2836 else
d377f56f 2837 ret = -EINVAL;
35e8bb51
DB
2838 spin_lock_irqsave(&gpio_lock, flags);
2839
d377f56f 2840 if (ret < 0) {
35e8bb51 2841 desc_set_label(desc, NULL);
18534df4 2842 kfree_const(label);
35e8bb51 2843 clear_bit(FLAG_REQUESTED, &desc->flags);
80b0a602 2844 goto done;
35e8bb51 2845 }
438d8908 2846 }
80b0a602
MN
2847 if (chip->get_direction) {
2848 /* chip->get_direction may sleep */
2849 spin_unlock_irqrestore(&gpio_lock, flags);
372e722e 2850 gpiod_get_direction(desc);
80b0a602
MN
2851 spin_lock_irqsave(&gpio_lock, flags);
2852 }
77c2d792
MW
2853done:
2854 spin_unlock_irqrestore(&gpio_lock, flags);
d377f56f 2855 return ret;
77c2d792
MW
2856}
2857
fdeb8e15
LW
2858/*
2859 * This descriptor validation needs to be inserted verbatim into each
2860 * function taking a descriptor, so we need to use a preprocessor
54d77198
LW
2861 * macro to avoid endless duplication. If the desc is NULL it is an
2862 * optional GPIO and calls should just bail out.
fdeb8e15 2863 */
a746a232
RV
2864static int validate_desc(const struct gpio_desc *desc, const char *func)
2865{
2866 if (!desc)
2867 return 0;
2868 if (IS_ERR(desc)) {
2869 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
2870 return PTR_ERR(desc);
2871 }
2872 if (!desc->gdev) {
2873 pr_warn("%s: invalid GPIO (no device)\n", func);
2874 return -EINVAL;
2875 }
2876 if (!desc->gdev->chip) {
2877 dev_warn(&desc->gdev->dev,
2878 "%s: backing chip is gone\n", func);
2879 return 0;
2880 }
2881 return 1;
2882}
2883
fdeb8e15 2884#define VALIDATE_DESC(desc) do { \
a746a232
RV
2885 int __valid = validate_desc(desc, __func__); \
2886 if (__valid <= 0) \
2887 return __valid; \
2888 } while (0)
fdeb8e15
LW
2889
2890#define VALIDATE_DESC_VOID(desc) do { \
a746a232
RV
2891 int __valid = validate_desc(desc, __func__); \
2892 if (__valid <= 0) \
fdeb8e15 2893 return; \
a746a232 2894 } while (0)
fdeb8e15 2895
0eb4c6c2 2896int gpiod_request(struct gpio_desc *desc, const char *label)
77c2d792 2897{
d377f56f 2898 int ret = -EPROBE_DEFER;
fdeb8e15 2899 struct gpio_device *gdev;
77c2d792 2900
fdeb8e15
LW
2901 VALIDATE_DESC(desc);
2902 gdev = desc->gdev;
77c2d792 2903
fdeb8e15 2904 if (try_module_get(gdev->owner)) {
d377f56f
LW
2905 ret = gpiod_request_commit(desc, label);
2906 if (ret < 0)
fdeb8e15 2907 module_put(gdev->owner);
33a68e86
LW
2908 else
2909 get_device(&gdev->dev);
77c2d792
MW
2910 }
2911
d377f56f
LW
2912 if (ret)
2913 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
77c2d792 2914
d377f56f 2915 return ret;
d2876d08 2916}
372e722e 2917
fac9d885 2918static bool gpiod_free_commit(struct gpio_desc *desc)
d2876d08 2919{
77c2d792 2920 bool ret = false;
d2876d08 2921 unsigned long flags;
35e8bb51 2922 struct gpio_chip *chip;
d2876d08 2923
3d599d1c
UKK
2924 might_sleep();
2925
372e722e 2926 gpiod_unexport(desc);
d8f388d8 2927
d2876d08
DB
2928 spin_lock_irqsave(&gpio_lock, flags);
2929
fdeb8e15 2930 chip = desc->gdev->chip;
35e8bb51
DB
2931 if (chip && test_bit(FLAG_REQUESTED, &desc->flags)) {
2932 if (chip->free) {
2933 spin_unlock_irqrestore(&gpio_lock, flags);
9c4ba946 2934 might_sleep_if(chip->can_sleep);
372e722e 2935 chip->free(chip, gpio_chip_hwgpio(desc));
35e8bb51
DB
2936 spin_lock_irqsave(&gpio_lock, flags);
2937 }
18534df4 2938 kfree_const(desc->label);
d2876d08 2939 desc_set_label(desc, NULL);
07697461 2940 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
35e8bb51 2941 clear_bit(FLAG_REQUESTED, &desc->flags);
aca5ce14 2942 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
25553ff0 2943 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
9225d516
DF
2944 clear_bit(FLAG_PULL_UP, &desc->flags);
2945 clear_bit(FLAG_PULL_DOWN, &desc->flags);
2148ad77 2946 clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
f625d460 2947 clear_bit(FLAG_IS_HOGGED, &desc->flags);
77c2d792
MW
2948 ret = true;
2949 }
d2876d08
DB
2950
2951 spin_unlock_irqrestore(&gpio_lock, flags);
77c2d792
MW
2952 return ret;
2953}
2954
0eb4c6c2 2955void gpiod_free(struct gpio_desc *desc)
77c2d792 2956{
fac9d885 2957 if (desc && desc->gdev && gpiod_free_commit(desc)) {
fdeb8e15 2958 module_put(desc->gdev->owner);
33a68e86
LW
2959 put_device(&desc->gdev->dev);
2960 } else {
77c2d792 2961 WARN_ON(extra_checks);
33a68e86 2962 }
d2876d08 2963}
372e722e 2964
d2876d08
DB
2965/**
2966 * gpiochip_is_requested - return string iff signal was requested
2967 * @chip: controller managing the signal
2968 * @offset: of signal within controller's 0..(ngpio - 1) range
2969 *
2970 * Returns NULL if the GPIO is not currently requested, else a string.
9c8318ff
AC
2971 * The string returned is the label passed to gpio_request(); if none has been
2972 * passed it is a meaningless, non-NULL constant.
d2876d08
DB
2973 *
2974 * This function is for use by GPIO controller drivers. The label can
2975 * help with diagnostics, and knowing that the signal is used as a GPIO
2976 * can help avoid accidentally multiplexing it to another controller.
2977 */
2978const char *gpiochip_is_requested(struct gpio_chip *chip, unsigned offset)
2979{
6c0b4e6c 2980 struct gpio_desc *desc;
d2876d08 2981
48b5953e 2982 if (offset >= chip->ngpio)
d2876d08 2983 return NULL;
6c0b4e6c 2984
1c3cdb18 2985 desc = &chip->gpiodev->descs[offset];
6c0b4e6c 2986
372e722e 2987 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
d2876d08 2988 return NULL;
372e722e 2989 return desc->label;
d2876d08
DB
2990}
2991EXPORT_SYMBOL_GPL(gpiochip_is_requested);
2992
77c2d792
MW
2993/**
2994 * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
950d55f5
TR
2995 * @chip: GPIO chip
2996 * @hwnum: hardware number of the GPIO for which to request the descriptor
77c2d792 2997 * @label: label for the GPIO
5923ea6c
LW
2998 * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
2999 * specify things like line inversion semantics with the machine flags
3000 * such as GPIO_OUT_LOW
3001 * @dflags: descriptor request flags for this GPIO or 0 if default, this
3002 * can be used to specify consumer semantics such as open drain
77c2d792
MW
3003 *
3004 * Function allows GPIO chip drivers to request and use their own GPIO
3005 * descriptors via gpiolib API. Difference to gpiod_request() is that this
3006 * function will not increase reference count of the GPIO chip module. This
3007 * allows the GPIO chip module to be unloaded as needed (we assume that the
3008 * GPIO chip driver handles freeing the GPIOs it has requested).
950d55f5
TR
3009 *
3010 * Returns:
3011 * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
3012 * code on failure.
77c2d792 3013 */
abdc08a3 3014struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum,
21abf103 3015 const char *label,
5923ea6c
LW
3016 enum gpio_lookup_flags lflags,
3017 enum gpiod_flags dflags)
77c2d792 3018{
abdc08a3 3019 struct gpio_desc *desc = gpiochip_get_desc(chip, hwnum);
d377f56f 3020 int ret;
77c2d792 3021
abdc08a3
AC
3022 if (IS_ERR(desc)) {
3023 chip_err(chip, "failed to get GPIO descriptor\n");
3024 return desc;
3025 }
3026
d377f56f
LW
3027 ret = gpiod_request_commit(desc, label);
3028 if (ret < 0)
3029 return ERR_PTR(ret);
77c2d792 3030
d377f56f
LW
3031 ret = gpiod_configure_flags(desc, label, lflags, dflags);
3032 if (ret) {
21abf103
LW
3033 chip_err(chip, "setup of own GPIO %s failed\n", label);
3034 gpiod_free_commit(desc);
d377f56f 3035 return ERR_PTR(ret);
21abf103
LW
3036 }
3037
abdc08a3 3038 return desc;
77c2d792 3039}
f7d4ad98 3040EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
77c2d792
MW
3041
3042/**
3043 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
3044 * @desc: GPIO descriptor to free
3045 *
3046 * Function frees the given GPIO requested previously with
3047 * gpiochip_request_own_desc().
3048 */
3049void gpiochip_free_own_desc(struct gpio_desc *desc)
3050{
3051 if (desc)
fac9d885 3052 gpiod_free_commit(desc);
77c2d792 3053}
f7d4ad98 3054EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
d2876d08 3055
fdeb8e15
LW
3056/*
3057 * Drivers MUST set GPIO direction before making get/set calls. In
d2876d08
DB
3058 * some cases this is done in early boot, before IRQs are enabled.
3059 *
3060 * As a rule these aren't called more than once (except for drivers
3061 * using the open-drain emulation idiom) so these are natural places
3062 * to accumulate extra debugging checks. Note that we can't (yet)
3063 * rely on gpio_request() having been called beforehand.
3064 */
3065
71479789
TP
3066static int gpio_set_config(struct gpio_chip *gc, unsigned offset,
3067 enum pin_config_param mode)
3068{
542f3615
MR
3069 unsigned long config;
3070 unsigned arg;
71479789 3071
542f3615 3072 switch (mode) {
2148ad77 3073 case PIN_CONFIG_BIAS_DISABLE:
542f3615
MR
3074 case PIN_CONFIG_BIAS_PULL_DOWN:
3075 case PIN_CONFIG_BIAS_PULL_UP:
3076 arg = 1;
3077 break;
3078
3079 default:
3080 arg = 0;
3081 }
3082
3083 config = PIN_CONF_PACKED(mode, arg);
71479789
TP
3084 return gc->set_config ? gc->set_config(gc, offset, config) : -ENOTSUPP;
3085}
3086
2148ad77
KG
3087static int gpio_set_bias(struct gpio_chip *chip, struct gpio_desc *desc)
3088{
3089 int bias = 0;
3090 int ret = 0;
3091
3092 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
3093 bias = PIN_CONFIG_BIAS_DISABLE;
3094 else if (test_bit(FLAG_PULL_UP, &desc->flags))
3095 bias = PIN_CONFIG_BIAS_PULL_UP;
3096 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
3097 bias = PIN_CONFIG_BIAS_PULL_DOWN;
3098
3099 if (bias) {
3100 ret = gpio_set_config(chip, gpio_chip_hwgpio(desc), bias);
3101 if (ret != -ENOTSUPP)
3102 return ret;
3103 }
3104 return 0;
3105}
3106
79a9becd
AC
3107/**
3108 * gpiod_direction_input - set the GPIO direction to input
3109 * @desc: GPIO to set to input
3110 *
3111 * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
3112 * be called safely on it.
3113 *
3114 * Return 0 in case of success, else an error code.
3115 */
3116int gpiod_direction_input(struct gpio_desc *desc)
d2876d08 3117{
d2876d08 3118 struct gpio_chip *chip;
d377f56f 3119 int ret = 0;
d2876d08 3120
fdeb8e15
LW
3121 VALIDATE_DESC(desc);
3122 chip = desc->gdev->chip;
bcabdef1 3123
e48d194d
LW
3124 /*
3125 * It is legal to have no .get() and .direction_input() specified if
3126 * the chip is output-only, but you can't specify .direction_input()
3127 * and not support the .get() operation, that doesn't make sense.
3128 */
ae9847f4 3129 if (!chip->get && chip->direction_input) {
6424de5a 3130 gpiod_warn(desc,
e48d194d
LW
3131 "%s: missing get() but have direction_input()\n",
3132 __func__);
be1a4b13
LW
3133 return -EIO;
3134 }
3135
e48d194d
LW
3136 /*
3137 * If we have a .direction_input() callback, things are simple,
3138 * just call it. Else we are some input-only chip so try to check the
3139 * direction (if .get_direction() is supported) else we silently
3140 * assume we are in input mode after this.
3141 */
ae9847f4 3142 if (chip->direction_input) {
d377f56f 3143 ret = chip->direction_input(chip, gpio_chip_hwgpio(desc));
ae9847f4
RRD
3144 } else if (chip->get_direction &&
3145 (chip->get_direction(chip, gpio_chip_hwgpio(desc)) != 1)) {
3146 gpiod_warn(desc,
e48d194d
LW
3147 "%s: missing direction_input() operation and line is output\n",
3148 __func__);
ae9847f4
RRD
3149 return -EIO;
3150 }
2148ad77 3151 if (ret == 0) {
d2876d08 3152 clear_bit(FLAG_IS_OUT, &desc->flags);
2148ad77
KG
3153 ret = gpio_set_bias(chip, desc);
3154 }
d449991c 3155
d377f56f 3156 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
d82da797 3157
d377f56f 3158 return ret;
d2876d08 3159}
79a9becd 3160EXPORT_SYMBOL_GPL(gpiod_direction_input);
372e722e 3161
fac9d885 3162static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
d2876d08 3163{
c663e5f5 3164 struct gpio_chip *gc = desc->gdev->chip;
ad17731d 3165 int val = !!value;
ae9847f4 3166 int ret = 0;
d2876d08 3167
e48d194d
LW
3168 /*
3169 * It's OK not to specify .direction_output() if the gpiochip is
3170 * output-only, but if there is then not even a .set() operation it
3171 * is pretty tricky to drive the output line.
3172 */
ae9847f4 3173 if (!gc->set && !gc->direction_output) {
6424de5a 3174 gpiod_warn(desc,
e48d194d
LW
3175 "%s: missing set() and direction_output() operations\n",
3176 __func__);
be1a4b13
LW
3177 return -EIO;
3178 }
3179
ae9847f4
RRD
3180 if (gc->direction_output) {
3181 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
3182 } else {
e48d194d 3183 /* Check that we are in output mode if we can */
ae9847f4
RRD
3184 if (gc->get_direction &&
3185 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
3186 gpiod_warn(desc,
3187 "%s: missing direction_output() operation\n",
3188 __func__);
3189 return -EIO;
3190 }
e48d194d
LW
3191 /*
3192 * If we can't actively set the direction, we are some
3193 * output-only chip, so just drive the output as desired.
3194 */
ae9847f4
RRD
3195 gc->set(gc, gpio_chip_hwgpio(desc), val);
3196 }
3197
c663e5f5 3198 if (!ret)
d2876d08 3199 set_bit(FLAG_IS_OUT, &desc->flags);
ad17731d 3200 trace_gpio_value(desc_to_gpio(desc), 0, val);
c663e5f5
LW
3201 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
3202 return ret;
d2876d08 3203}
ef70bbe1
PZ
3204
3205/**
3206 * gpiod_direction_output_raw - set the GPIO direction to output
3207 * @desc: GPIO to set to output
3208 * @value: initial output value of the GPIO
3209 *
3210 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
3211 * be called safely on it. The initial value of the output must be specified
3212 * as raw value on the physical line without regard for the ACTIVE_LOW status.
3213 *
3214 * Return 0 in case of success, else an error code.
3215 */
3216int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
3217{
fdeb8e15 3218 VALIDATE_DESC(desc);
fac9d885 3219 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1
PZ
3220}
3221EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
3222
3223/**
90df4fe0 3224 * gpiod_direction_output - set the GPIO direction to output
ef70bbe1
PZ
3225 * @desc: GPIO to set to output
3226 * @value: initial output value of the GPIO
3227 *
3228 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
3229 * be called safely on it. The initial value of the output must be specified
3230 * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
3231 * account.
3232 *
3233 * Return 0 in case of success, else an error code.
3234 */
3235int gpiod_direction_output(struct gpio_desc *desc, int value)
3236{
30322bcf 3237 struct gpio_chip *gc;
02e47980
LW
3238 int ret;
3239
fdeb8e15 3240 VALIDATE_DESC(desc);
ef70bbe1
PZ
3241 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3242 value = !value;
ad17731d
LW
3243 else
3244 value = !!value;
02e47980 3245
4e9439dd
HV
3246 /* GPIOs used for enabled IRQs shall not be set as output */
3247 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
3248 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
02e47980
LW
3249 gpiod_err(desc,
3250 "%s: tried to set a GPIO tied to an IRQ as output\n",
3251 __func__);
3252 return -EIO;
3253 }
3254
30322bcf 3255 gc = desc->gdev->chip;
02e47980
LW
3256 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
3257 /* First see if we can enable open drain in hardware */
71479789
TP
3258 ret = gpio_set_config(gc, gpio_chip_hwgpio(desc),
3259 PIN_CONFIG_DRIVE_OPEN_DRAIN);
02e47980
LW
3260 if (!ret)
3261 goto set_output_value;
3262 /* Emulate open drain by not actively driving the line high */
e735244e
BG
3263 if (value) {
3264 ret = gpiod_direction_input(desc);
3265 goto set_output_flag;
3266 }
02e47980
LW
3267 }
3268 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
71479789
TP
3269 ret = gpio_set_config(gc, gpio_chip_hwgpio(desc),
3270 PIN_CONFIG_DRIVE_OPEN_SOURCE);
02e47980
LW
3271 if (!ret)
3272 goto set_output_value;
3273 /* Emulate open source by not actively driving the line low */
e735244e
BG
3274 if (!value) {
3275 ret = gpiod_direction_input(desc);
3276 goto set_output_flag;
3277 }
02e47980 3278 } else {
71479789
TP
3279 gpio_set_config(gc, gpio_chip_hwgpio(desc),
3280 PIN_CONFIG_DRIVE_PUSH_PULL);
02e47980
LW
3281 }
3282
3283set_output_value:
2821ae5f
KG
3284 ret = gpio_set_bias(gc, desc);
3285 if (ret)
3286 return ret;
fac9d885 3287 return gpiod_direction_output_raw_commit(desc, value);
e735244e
BG
3288
3289set_output_flag:
3290 /*
3291 * When emulating open-source or open-drain functionalities by not
3292 * actively driving the line (setting mode to input) we still need to
3293 * set the IS_OUT flag or otherwise we won't be able to set the line
3294 * value anymore.
3295 */
3296 if (ret == 0)
3297 set_bit(FLAG_IS_OUT, &desc->flags);
3298 return ret;
ef70bbe1 3299}
79a9becd 3300EXPORT_SYMBOL_GPL(gpiod_direction_output);
d2876d08 3301
c4b5be98 3302/**
950d55f5
TR
3303 * gpiod_set_debounce - sets @debounce time for a GPIO
3304 * @desc: descriptor of the GPIO for which to set debounce time
3305 * @debounce: debounce time in microseconds
65d87656 3306 *
950d55f5
TR
3307 * Returns:
3308 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
3309 * debounce time.
c4b5be98 3310 */
79a9becd 3311int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce)
c4b5be98 3312{
c4b5be98 3313 struct gpio_chip *chip;
2956b5d9 3314 unsigned long config;
c4b5be98 3315
fdeb8e15
LW
3316 VALIDATE_DESC(desc);
3317 chip = desc->gdev->chip;
2956b5d9 3318 if (!chip->set || !chip->set_config) {
6424de5a 3319 gpiod_dbg(desc,
2956b5d9 3320 "%s: missing set() or set_config() operations\n",
6424de5a 3321 __func__);
65d87656 3322 return -ENOTSUPP;
be1a4b13
LW
3323 }
3324
2956b5d9 3325 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
fa59dd23 3326 return chip->set_config(chip, gpio_chip_hwgpio(desc), config);
c4b5be98 3327}
79a9becd 3328EXPORT_SYMBOL_GPL(gpiod_set_debounce);
372e722e 3329
e10f72bf
AJ
3330/**
3331 * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
3332 * @desc: descriptor of the GPIO for which to configure persistence
3333 * @transitory: True to lose state on suspend or reset, false for persistence
3334 *
3335 * Returns:
3336 * 0 on success, otherwise a negative error code.
3337 */
3338int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
3339{
3340 struct gpio_chip *chip;
3341 unsigned long packed;
3342 int gpio;
3343 int rc;
3344
156dd392 3345 VALIDATE_DESC(desc);
e10f72bf
AJ
3346 /*
3347 * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
3348 * persistence state.
3349 */
3350 if (transitory)
3351 set_bit(FLAG_TRANSITORY, &desc->flags);
3352 else
3353 clear_bit(FLAG_TRANSITORY, &desc->flags);
3354
3355 /* If the driver supports it, set the persistence state now */
3356 chip = desc->gdev->chip;
3357 if (!chip->set_config)
3358 return 0;
3359
3360 packed = pinconf_to_config_packed(PIN_CONFIG_PERSIST_STATE,
3361 !transitory);
3362 gpio = gpio_chip_hwgpio(desc);
fa59dd23 3363 rc = chip->set_config(chip, gpio, packed);
e10f72bf
AJ
3364 if (rc == -ENOTSUPP) {
3365 dev_dbg(&desc->gdev->dev, "Persistence not supported for GPIO %d\n",
3366 gpio);
3367 return 0;
3368 }
3369
3370 return rc;
3371}
3372EXPORT_SYMBOL_GPL(gpiod_set_transitory);
3373
79a9becd
AC
3374/**
3375 * gpiod_is_active_low - test whether a GPIO is active-low or not
3376 * @desc: the gpio descriptor to test
3377 *
3378 * Returns 1 if the GPIO is active-low, 0 otherwise.
3379 */
3380int gpiod_is_active_low(const struct gpio_desc *desc)
372e722e 3381{
fdeb8e15 3382 VALIDATE_DESC(desc);
79a9becd 3383 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
372e722e 3384}
79a9becd 3385EXPORT_SYMBOL_GPL(gpiod_is_active_low);
d2876d08
DB
3386
3387/* I/O calls are only valid after configuration completed; the relevant
3388 * "is this a valid GPIO" error checks should already have been done.
3389 *
3390 * "Get" operations are often inlinable as reading a pin value register,
3391 * and masking the relevant bit in that register.
3392 *
3393 * When "set" operations are inlinable, they involve writing that mask to
3394 * one register to set a low value, or a different register to set it high.
3395 * Otherwise locking is needed, so there may be little value to inlining.
3396 *
3397 *------------------------------------------------------------------------
3398 *
3399 * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
3400 * have requested the GPIO. That can include implicit requesting by
3401 * a direction setting call. Marking a gpio as requested locks its chip
3402 * in memory, guaranteeing that these table lookups need no more locking
3403 * and that gpiochip_remove() will fail.
3404 *
3405 * REVISIT when debugging, consider adding some instrumentation to ensure
3406 * that the GPIO was actually requested.
3407 */
3408
fac9d885 3409static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
d2876d08
DB
3410{
3411 struct gpio_chip *chip;
372e722e 3412 int offset;
e20538b8 3413 int value;
d2876d08 3414
fdeb8e15 3415 chip = desc->gdev->chip;
372e722e 3416 offset = gpio_chip_hwgpio(desc);
e20538b8 3417 value = chip->get ? chip->get(chip, offset) : -EIO;
723a6303 3418 value = value < 0 ? value : !!value;
372e722e 3419 trace_gpio_value(desc_to_gpio(desc), 1, value);
3f397c21 3420 return value;
d2876d08 3421}
372e722e 3422
eec1d566
LW
3423static int gpio_chip_get_multiple(struct gpio_chip *chip,
3424 unsigned long *mask, unsigned long *bits)
3425{
3426 if (chip->get_multiple) {
3427 return chip->get_multiple(chip, mask, bits);
3428 } else if (chip->get) {
3429 int i, value;
3430
3431 for_each_set_bit(i, mask, chip->ngpio) {
3432 value = chip->get(chip, i);
3433 if (value < 0)
3434 return value;
3435 __assign_bit(i, bits, value);
3436 }
3437 return 0;
3438 }
3439 return -EIO;
3440}
3441
3442int gpiod_get_array_value_complex(bool raw, bool can_sleep,
3443 unsigned int array_size,
3444 struct gpio_desc **desc_array,
77588c14 3445 struct gpio_array *array_info,
b9762beb 3446 unsigned long *value_bitmap)
eec1d566 3447{
d377f56f 3448 int ret, i = 0;
b17566a6
JK
3449
3450 /*
3451 * Validate array_info against desc_array and its size.
3452 * It should immediately follow desc_array if both
3453 * have been obtained from the same gpiod_get_array() call.
3454 */
3455 if (array_info && array_info->desc == desc_array &&
3456 array_size <= array_info->size &&
3457 (void *)array_info == desc_array + array_info->size) {
3458 if (!can_sleep)
3459 WARN_ON(array_info->chip->can_sleep);
3460
d377f56f 3461 ret = gpio_chip_get_multiple(array_info->chip,
b17566a6
JK
3462 array_info->get_mask,
3463 value_bitmap);
d377f56f
LW
3464 if (ret)
3465 return ret;
b17566a6
JK
3466
3467 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3468 bitmap_xor(value_bitmap, value_bitmap,
3469 array_info->invert_mask, array_size);
3470
3471 if (bitmap_full(array_info->get_mask, array_size))
3472 return 0;
3473
3474 i = find_first_zero_bit(array_info->get_mask, array_size);
3475 } else {
3476 array_info = NULL;
3477 }
eec1d566
LW
3478
3479 while (i < array_size) {
3480 struct gpio_chip *chip = desc_array[i]->gdev->chip;
3027743f
LA
3481 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
3482 unsigned long *mask, *bits;
eec1d566
LW
3483 int first, j, ret;
3484
3027743f
LA
3485 if (likely(chip->ngpio <= FASTPATH_NGPIO)) {
3486 mask = fastpath;
3487 } else {
3488 mask = kmalloc_array(2 * BITS_TO_LONGS(chip->ngpio),
3489 sizeof(*mask),
3490 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
3491 if (!mask)
3492 return -ENOMEM;
3493 }
3494
3495 bits = mask + BITS_TO_LONGS(chip->ngpio);
3496 bitmap_zero(mask, chip->ngpio);
3497
eec1d566
LW
3498 if (!can_sleep)
3499 WARN_ON(chip->can_sleep);
3500
3501 /* collect all inputs belonging to the same chip */
3502 first = i;
eec1d566
LW
3503 do {
3504 const struct gpio_desc *desc = desc_array[i];
3505 int hwgpio = gpio_chip_hwgpio(desc);
3506
3507 __set_bit(hwgpio, mask);
3508 i++;
b17566a6
JK
3509
3510 if (array_info)
35ae7f96
JK
3511 i = find_next_zero_bit(array_info->get_mask,
3512 array_size, i);
eec1d566
LW
3513 } while ((i < array_size) &&
3514 (desc_array[i]->gdev->chip == chip));
3515
3516 ret = gpio_chip_get_multiple(chip, mask, bits);
3027743f
LA
3517 if (ret) {
3518 if (mask != fastpath)
3519 kfree(mask);
eec1d566 3520 return ret;
3027743f 3521 }
eec1d566 3522
b17566a6 3523 for (j = first; j < i; ) {
eec1d566
LW
3524 const struct gpio_desc *desc = desc_array[j];
3525 int hwgpio = gpio_chip_hwgpio(desc);
3526 int value = test_bit(hwgpio, bits);
3527
3528 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3529 value = !value;
b9762beb 3530 __assign_bit(j, value_bitmap, value);
eec1d566 3531 trace_gpio_value(desc_to_gpio(desc), 1, value);
799d5eb4 3532 j++;
b17566a6
JK
3533
3534 if (array_info)
35ae7f96
JK
3535 j = find_next_zero_bit(array_info->get_mask, i,
3536 j);
eec1d566 3537 }
3027743f
LA
3538
3539 if (mask != fastpath)
3540 kfree(mask);
eec1d566
LW
3541 }
3542 return 0;
3543}
3544
d2876d08 3545/**
79a9becd
AC
3546 * gpiod_get_raw_value() - return a gpio's raw value
3547 * @desc: gpio whose value will be returned
d2876d08 3548 *
79a9becd 3549 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3550 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd 3551 *
827a9b8b 3552 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3553 * complain if the GPIO chip functions potentially sleep.
d2876d08 3554 */
79a9becd 3555int gpiod_get_raw_value(const struct gpio_desc *desc)
d2876d08 3556{
fdeb8e15 3557 VALIDATE_DESC(desc);
3285170f 3558 /* Should be using gpiod_get_raw_value_cansleep() */
fdeb8e15 3559 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3560 return gpiod_get_raw_value_commit(desc);
d2876d08 3561}
79a9becd 3562EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
372e722e 3563
79a9becd
AC
3564/**
3565 * gpiod_get_value() - return a gpio's value
3566 * @desc: gpio whose value will be returned
3567 *
3568 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3569 * account, or negative errno on failure.
79a9becd 3570 *
827a9b8b 3571 * This function can be called from contexts where we cannot sleep, and will
79a9becd
AC
3572 * complain if the GPIO chip functions potentially sleep.
3573 */
3574int gpiod_get_value(const struct gpio_desc *desc)
372e722e 3575{
79a9becd 3576 int value;
fdeb8e15
LW
3577
3578 VALIDATE_DESC(desc);
3285170f 3579 /* Should be using gpiod_get_value_cansleep() */
fdeb8e15 3580 WARN_ON(desc->gdev->chip->can_sleep);
79a9becd 3581
fac9d885 3582 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3583 if (value < 0)
3584 return value;
3585
79a9becd
AC
3586 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3587 value = !value;
3588
3589 return value;
372e722e 3590}
79a9becd 3591EXPORT_SYMBOL_GPL(gpiod_get_value);
d2876d08 3592
eec1d566
LW
3593/**
3594 * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
b9762beb 3595 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3596 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3597 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3598 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3599 *
3600 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3601 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3602 * else an error code.
3603 *
827a9b8b 3604 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
3605 * and it will complain if the GPIO chip functions potentially sleep.
3606 */
3607int gpiod_get_raw_array_value(unsigned int array_size,
b9762beb 3608 struct gpio_desc **desc_array,
77588c14 3609 struct gpio_array *array_info,
b9762beb 3610 unsigned long *value_bitmap)
eec1d566
LW
3611{
3612 if (!desc_array)
3613 return -EINVAL;
3614 return gpiod_get_array_value_complex(true, false, array_size,
77588c14
JK
3615 desc_array, array_info,
3616 value_bitmap);
eec1d566
LW
3617}
3618EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
3619
3620/**
3621 * gpiod_get_array_value() - read values from an array of GPIOs
b9762beb 3622 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3623 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3624 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3625 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3626 *
3627 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3628 * into account. Return 0 in case of success, else an error code.
3629 *
827a9b8b 3630 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
3631 * and it will complain if the GPIO chip functions potentially sleep.
3632 */
3633int gpiod_get_array_value(unsigned int array_size,
b9762beb 3634 struct gpio_desc **desc_array,
77588c14 3635 struct gpio_array *array_info,
b9762beb 3636 unsigned long *value_bitmap)
eec1d566
LW
3637{
3638 if (!desc_array)
3639 return -EINVAL;
3640 return gpiod_get_array_value_complex(false, false, array_size,
77588c14
JK
3641 desc_array, array_info,
3642 value_bitmap);
eec1d566
LW
3643}
3644EXPORT_SYMBOL_GPL(gpiod_get_array_value);
3645
aca5ce14 3646/*
fac9d885 3647 * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
79a9becd 3648 * @desc: gpio descriptor whose state need to be set.
20a8a968 3649 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
aca5ce14 3650 */
fac9d885 3651static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
aca5ce14 3652{
d377f56f 3653 int ret = 0;
fdeb8e15 3654 struct gpio_chip *chip = desc->gdev->chip;
372e722e
AC
3655 int offset = gpio_chip_hwgpio(desc);
3656
aca5ce14 3657 if (value) {
d377f56f 3658 ret = chip->direction_input(chip, offset);
aca5ce14 3659 } else {
d377f56f
LW
3660 ret = chip->direction_output(chip, offset, 0);
3661 if (!ret)
372e722e 3662 set_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 3663 }
d377f56f
LW
3664 trace_gpio_direction(desc_to_gpio(desc), value, ret);
3665 if (ret < 0)
6424de5a
MB
3666 gpiod_err(desc,
3667 "%s: Error in set_value for open drain err %d\n",
d377f56f 3668 __func__, ret);
aca5ce14
LD
3669}
3670
25553ff0 3671/*
79a9becd
AC
3672 * _gpio_set_open_source_value() - Set the open source gpio's value.
3673 * @desc: gpio descriptor whose state need to be set.
20a8a968 3674 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
25553ff0 3675 */
fac9d885 3676static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
25553ff0 3677{
d377f56f 3678 int ret = 0;
fdeb8e15 3679 struct gpio_chip *chip = desc->gdev->chip;
372e722e
AC
3680 int offset = gpio_chip_hwgpio(desc);
3681
25553ff0 3682 if (value) {
d377f56f
LW
3683 ret = chip->direction_output(chip, offset, 1);
3684 if (!ret)
372e722e 3685 set_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 3686 } else {
d377f56f 3687 ret = chip->direction_input(chip, offset);
25553ff0 3688 }
d377f56f
LW
3689 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
3690 if (ret < 0)
6424de5a
MB
3691 gpiod_err(desc,
3692 "%s: Error in set_value for open source err %d\n",
d377f56f 3693 __func__, ret);
25553ff0
LD
3694}
3695
fac9d885 3696static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
d2876d08
DB
3697{
3698 struct gpio_chip *chip;
3699
fdeb8e15 3700 chip = desc->gdev->chip;
372e722e 3701 trace_gpio_value(desc_to_gpio(desc), 0, value);
02e47980 3702 chip->set(chip, gpio_chip_hwgpio(desc), value);
372e722e
AC
3703}
3704
5f424243
RI
3705/*
3706 * set multiple outputs on the same chip;
3707 * use the chip's set_multiple function if available;
3708 * otherwise set the outputs sequentially;
3709 * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
3710 * defines which outputs are to be changed
3711 * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
3712 * defines the values the outputs specified by mask are to be set to
3713 */
3714static void gpio_chip_set_multiple(struct gpio_chip *chip,
3715 unsigned long *mask, unsigned long *bits)
3716{
3717 if (chip->set_multiple) {
3718 chip->set_multiple(chip, mask, bits);
3719 } else {
5e4e6fb3
AS
3720 unsigned int i;
3721
3722 /* set outputs if the corresponding mask bit is set */
3723 for_each_set_bit(i, mask, chip->ngpio)
3724 chip->set(chip, i, test_bit(i, bits));
5f424243
RI
3725 }
3726}
3727
3027743f 3728int gpiod_set_array_value_complex(bool raw, bool can_sleep,
3c940660
GU
3729 unsigned int array_size,
3730 struct gpio_desc **desc_array,
3731 struct gpio_array *array_info,
3732 unsigned long *value_bitmap)
5f424243
RI
3733{
3734 int i = 0;
3735
b17566a6
JK
3736 /*
3737 * Validate array_info against desc_array and its size.
3738 * It should immediately follow desc_array if both
3739 * have been obtained from the same gpiod_get_array() call.
3740 */
3741 if (array_info && array_info->desc == desc_array &&
3742 array_size <= array_info->size &&
3743 (void *)array_info == desc_array + array_info->size) {
3744 if (!can_sleep)
3745 WARN_ON(array_info->chip->can_sleep);
3746
3747 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3748 bitmap_xor(value_bitmap, value_bitmap,
3749 array_info->invert_mask, array_size);
3750
3751 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
3752 value_bitmap);
3753
3754 if (bitmap_full(array_info->set_mask, array_size))
3755 return 0;
3756
3757 i = find_first_zero_bit(array_info->set_mask, array_size);
3758 } else {
3759 array_info = NULL;
3760 }
3761
5f424243 3762 while (i < array_size) {
fdeb8e15 3763 struct gpio_chip *chip = desc_array[i]->gdev->chip;
3027743f
LA
3764 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
3765 unsigned long *mask, *bits;
5f424243
RI
3766 int count = 0;
3767
3027743f
LA
3768 if (likely(chip->ngpio <= FASTPATH_NGPIO)) {
3769 mask = fastpath;
3770 } else {
3771 mask = kmalloc_array(2 * BITS_TO_LONGS(chip->ngpio),
3772 sizeof(*mask),
3773 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
3774 if (!mask)
3775 return -ENOMEM;
3776 }
3777
3778 bits = mask + BITS_TO_LONGS(chip->ngpio);
3779 bitmap_zero(mask, chip->ngpio);
3780
38e003f4 3781 if (!can_sleep)
5f424243 3782 WARN_ON(chip->can_sleep);
38e003f4 3783
5f424243
RI
3784 do {
3785 struct gpio_desc *desc = desc_array[i];
3786 int hwgpio = gpio_chip_hwgpio(desc);
b9762beb 3787 int value = test_bit(i, value_bitmap);
5f424243 3788
b17566a6
JK
3789 /*
3790 * Pins applicable for fast input but not for
3791 * fast output processing may have been already
3792 * inverted inside the fast path, skip them.
3793 */
3794 if (!raw && !(array_info &&
3795 test_bit(i, array_info->invert_mask)) &&
3796 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
5f424243
RI
3797 value = !value;
3798 trace_gpio_value(desc_to_gpio(desc), 0, value);
3799 /*
3800 * collect all normal outputs belonging to the same chip
3801 * open drain and open source outputs are set individually
3802 */
02e47980 3803 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
fac9d885 3804 gpio_set_open_drain_value_commit(desc, value);
02e47980 3805 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
fac9d885 3806 gpio_set_open_source_value_commit(desc, value);
5f424243
RI
3807 } else {
3808 __set_bit(hwgpio, mask);
38e003f4 3809 if (value)
5f424243 3810 __set_bit(hwgpio, bits);
38e003f4 3811 else
5f424243 3812 __clear_bit(hwgpio, bits);
5f424243
RI
3813 count++;
3814 }
3815 i++;
b17566a6
JK
3816
3817 if (array_info)
35ae7f96
JK
3818 i = find_next_zero_bit(array_info->set_mask,
3819 array_size, i);
fdeb8e15
LW
3820 } while ((i < array_size) &&
3821 (desc_array[i]->gdev->chip == chip));
5f424243 3822 /* push collected bits to outputs */
38e003f4 3823 if (count != 0)
5f424243 3824 gpio_chip_set_multiple(chip, mask, bits);
3027743f
LA
3825
3826 if (mask != fastpath)
3827 kfree(mask);
5f424243 3828 }
3027743f 3829 return 0;
5f424243
RI
3830}
3831
d2876d08 3832/**
79a9becd
AC
3833 * gpiod_set_raw_value() - assign a gpio's raw value
3834 * @desc: gpio whose value will be assigned
d2876d08 3835 * @value: value to assign
d2876d08 3836 *
79a9becd
AC
3837 * Set the raw value of the GPIO, i.e. the value of its physical line without
3838 * regard for its ACTIVE_LOW status.
3839 *
827a9b8b 3840 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3841 * complain if the GPIO chip functions potentially sleep.
d2876d08 3842 */
79a9becd 3843void gpiod_set_raw_value(struct gpio_desc *desc, int value)
372e722e 3844{
fdeb8e15 3845 VALIDATE_DESC_VOID(desc);
3285170f 3846 /* Should be using gpiod_set_raw_value_cansleep() */
fdeb8e15 3847 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3848 gpiod_set_raw_value_commit(desc, value);
d2876d08 3849}
79a9becd 3850EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
d2876d08 3851
1e77fc82
GU
3852/**
3853 * gpiod_set_value_nocheck() - set a GPIO line value without checking
3854 * @desc: the descriptor to set the value on
3855 * @value: value to set
3856 *
3857 * This sets the value of a GPIO line backing a descriptor, applying
3858 * different semantic quirks like active low and open drain/source
3859 * handling.
3860 */
3861static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
3862{
3863 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3864 value = !value;
3865 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
3866 gpio_set_open_drain_value_commit(desc, value);
3867 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
3868 gpio_set_open_source_value_commit(desc, value);
3869 else
3870 gpiod_set_raw_value_commit(desc, value);
3871}
3872
d2876d08 3873/**
79a9becd
AC
3874 * gpiod_set_value() - assign a gpio's value
3875 * @desc: gpio whose value will be assigned
3876 * @value: value to assign
3877 *
02e47980
LW
3878 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
3879 * OPEN_DRAIN and OPEN_SOURCE flags into account.
d2876d08 3880 *
827a9b8b 3881 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3882 * complain if the GPIO chip functions potentially sleep.
d2876d08 3883 */
79a9becd 3884void gpiod_set_value(struct gpio_desc *desc, int value)
d2876d08 3885{
fdeb8e15 3886 VALIDATE_DESC_VOID(desc);
3285170f 3887 /* Should be using gpiod_set_value_cansleep() */
fdeb8e15 3888 WARN_ON(desc->gdev->chip->can_sleep);
1e77fc82 3889 gpiod_set_value_nocheck(desc, value);
372e722e 3890}
79a9becd 3891EXPORT_SYMBOL_GPL(gpiod_set_value);
d2876d08 3892
5f424243 3893/**
3fff99bc 3894 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
b9762beb 3895 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3896 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3897 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3898 * @value_bitmap: bitmap of values to assign
5f424243
RI
3899 *
3900 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3901 * without regard for their ACTIVE_LOW status.
3902 *
827a9b8b 3903 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3904 * complain if the GPIO chip functions potentially sleep.
3905 */
3027743f 3906int gpiod_set_raw_array_value(unsigned int array_size,
3c940660
GU
3907 struct gpio_desc **desc_array,
3908 struct gpio_array *array_info,
3909 unsigned long *value_bitmap)
5f424243
RI
3910{
3911 if (!desc_array)
3027743f
LA
3912 return -EINVAL;
3913 return gpiod_set_array_value_complex(true, false, array_size,
77588c14 3914 desc_array, array_info, value_bitmap);
5f424243 3915}
3fff99bc 3916EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
5f424243
RI
3917
3918/**
3fff99bc 3919 * gpiod_set_array_value() - assign values to an array of GPIOs
b9762beb 3920 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3921 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3922 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3923 * @value_bitmap: bitmap of values to assign
5f424243
RI
3924 *
3925 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3926 * into account.
3927 *
827a9b8b 3928 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3929 * complain if the GPIO chip functions potentially sleep.
3930 */
cf9af0d5
GU
3931int gpiod_set_array_value(unsigned int array_size,
3932 struct gpio_desc **desc_array,
3933 struct gpio_array *array_info,
3934 unsigned long *value_bitmap)
5f424243
RI
3935{
3936 if (!desc_array)
cf9af0d5
GU
3937 return -EINVAL;
3938 return gpiod_set_array_value_complex(false, false, array_size,
3939 desc_array, array_info,
3940 value_bitmap);
5f424243 3941}
3fff99bc 3942EXPORT_SYMBOL_GPL(gpiod_set_array_value);
5f424243 3943
d2876d08 3944/**
79a9becd
AC
3945 * gpiod_cansleep() - report whether gpio value access may sleep
3946 * @desc: gpio to check
d2876d08 3947 *
d2876d08 3948 */
79a9becd 3949int gpiod_cansleep(const struct gpio_desc *desc)
372e722e 3950{
fdeb8e15
LW
3951 VALIDATE_DESC(desc);
3952 return desc->gdev->chip->can_sleep;
d2876d08 3953}
79a9becd 3954EXPORT_SYMBOL_GPL(gpiod_cansleep);
d2876d08 3955
90b39402
LW
3956/**
3957 * gpiod_set_consumer_name() - set the consumer name for the descriptor
3958 * @desc: gpio to set the consumer name on
3959 * @name: the new consumer name
3960 */
18534df4 3961int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
90b39402 3962{
18534df4
MS
3963 VALIDATE_DESC(desc);
3964 if (name) {
3965 name = kstrdup_const(name, GFP_KERNEL);
3966 if (!name)
3967 return -ENOMEM;
3968 }
3969
3970 kfree_const(desc->label);
3971 desc_set_label(desc, name);
3972
3973 return 0;
90b39402
LW
3974}
3975EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
3976
0f6d504e 3977/**
79a9becd
AC
3978 * gpiod_to_irq() - return the IRQ corresponding to a GPIO
3979 * @desc: gpio whose IRQ will be returned (already requested)
0f6d504e 3980 *
79a9becd
AC
3981 * Return the IRQ corresponding to the passed GPIO, or an error code in case of
3982 * error.
0f6d504e 3983 */
79a9becd 3984int gpiod_to_irq(const struct gpio_desc *desc)
0f6d504e 3985{
4c37ce86
LW
3986 struct gpio_chip *chip;
3987 int offset;
0f6d504e 3988
79bb71bd
LW
3989 /*
3990 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
3991 * requires this function to not return zero on an invalid descriptor
3992 * but rather a negative error number.
3993 */
bfbbe44d 3994 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
79bb71bd
LW
3995 return -EINVAL;
3996
fdeb8e15 3997 chip = desc->gdev->chip;
372e722e 3998 offset = gpio_chip_hwgpio(desc);
4c37ce86
LW
3999 if (chip->to_irq) {
4000 int retirq = chip->to_irq(chip, offset);
4001
4002 /* Zero means NO_IRQ */
4003 if (!retirq)
4004 return -ENXIO;
4005
4006 return retirq;
4007 }
4008 return -ENXIO;
0f6d504e 4009}
79a9becd 4010EXPORT_SYMBOL_GPL(gpiod_to_irq);
0f6d504e 4011
d468bf9e 4012/**
e3a2e878 4013 * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
d74be6df
AC
4014 * @chip: the chip the GPIO to lock belongs to
4015 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
4016 *
4017 * This is used directly by GPIO drivers that want to lock down
f438acdf 4018 * a certain GPIO line to be used for IRQs.
d468bf9e 4019 */
e3a2e878 4020int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset)
372e722e 4021{
9c10280d
LW
4022 struct gpio_desc *desc;
4023
4024 desc = gpiochip_get_desc(chip, offset);
4025 if (IS_ERR(desc))
4026 return PTR_ERR(desc);
4027
60f8339e
LW
4028 /*
4029 * If it's fast: flush the direction setting if something changed
4030 * behind our back
4031 */
4032 if (!chip->can_sleep && chip->get_direction) {
80956790 4033 int dir = gpiod_get_direction(desc);
9c10280d 4034
36b31279
AS
4035 if (dir < 0) {
4036 chip_err(chip, "%s: cannot get GPIO direction\n",
4037 __func__);
4038 return dir;
4039 }
9c10280d 4040 }
d468bf9e 4041
9c10280d 4042 if (test_bit(FLAG_IS_OUT, &desc->flags)) {
d74be6df 4043 chip_err(chip,
b1911710
AS
4044 "%s: tried to flag a GPIO set as output for IRQ\n",
4045 __func__);
d468bf9e
LW
4046 return -EIO;
4047 }
4048
9c10280d 4049 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 4050 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
4051
4052 /*
4053 * If the consumer has not set up a label (such as when the
4054 * IRQ is referenced from .to_irq()) we set up a label here
4055 * so it is clear this is used as an interrupt.
4056 */
4057 if (!desc->label)
4058 desc_set_label(desc, "interrupt");
4059
d468bf9e 4060 return 0;
372e722e 4061}
e3a2e878 4062EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
d2876d08 4063
d468bf9e 4064/**
e3a2e878 4065 * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
d74be6df
AC
4066 * @chip: the chip the GPIO to lock belongs to
4067 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
4068 *
4069 * This is used directly by GPIO drivers that want to indicate
4070 * that a certain GPIO is no longer used exclusively for IRQ.
d2876d08 4071 */
e3a2e878 4072void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset)
d468bf9e 4073{
3940c34a
LW
4074 struct gpio_desc *desc;
4075
4076 desc = gpiochip_get_desc(chip, offset);
4077 if (IS_ERR(desc))
d468bf9e 4078 return;
d2876d08 4079
3940c34a 4080 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 4081 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
4082
4083 /* If we only had this marking, erase it */
4084 if (desc->label && !strcmp(desc->label, "interrupt"))
4085 desc_set_label(desc, NULL);
d468bf9e 4086}
e3a2e878 4087EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
d468bf9e 4088
4e9439dd
HV
4089void gpiochip_disable_irq(struct gpio_chip *chip, unsigned int offset)
4090{
4091 struct gpio_desc *desc = gpiochip_get_desc(chip, offset);
4092
4093 if (!IS_ERR(desc) &&
4094 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
4095 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
4096}
4097EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
4098
4099void gpiochip_enable_irq(struct gpio_chip *chip, unsigned int offset)
4100{
4101 struct gpio_desc *desc = gpiochip_get_desc(chip, offset);
4102
4103 if (!IS_ERR(desc) &&
4104 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
4105 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags));
4106 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
4107 }
4108}
4109EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
4110
6cee3821
LW
4111bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset)
4112{
4113 if (offset >= chip->ngpio)
4114 return false;
4115
4116 return test_bit(FLAG_USED_AS_IRQ, &chip->gpiodev->descs[offset].flags);
4117}
4118EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
4119
4e6b8238
HV
4120int gpiochip_reqres_irq(struct gpio_chip *chip, unsigned int offset)
4121{
4122 int ret;
4123
4124 if (!try_module_get(chip->gpiodev->owner))
4125 return -ENODEV;
4126
4127 ret = gpiochip_lock_as_irq(chip, offset);
4128 if (ret) {
4129 chip_err(chip, "unable to lock HW IRQ %u for IRQ\n", offset);
4130 module_put(chip->gpiodev->owner);
4131 return ret;
4132 }
4133 return 0;
4134}
4135EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
4136
4137void gpiochip_relres_irq(struct gpio_chip *chip, unsigned int offset)
4138{
4139 gpiochip_unlock_as_irq(chip, offset);
4140 module_put(chip->gpiodev->owner);
4141}
4142EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
4143
143b65d6
LW
4144bool gpiochip_line_is_open_drain(struct gpio_chip *chip, unsigned int offset)
4145{
4146 if (offset >= chip->ngpio)
4147 return false;
4148
4149 return test_bit(FLAG_OPEN_DRAIN, &chip->gpiodev->descs[offset].flags);
4150}
4151EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
4152
4153bool gpiochip_line_is_open_source(struct gpio_chip *chip, unsigned int offset)
4154{
4155 if (offset >= chip->ngpio)
4156 return false;
4157
4158 return test_bit(FLAG_OPEN_SOURCE, &chip->gpiodev->descs[offset].flags);
4159}
4160EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
4161
05f479bf
CK
4162bool gpiochip_line_is_persistent(struct gpio_chip *chip, unsigned int offset)
4163{
4164 if (offset >= chip->ngpio)
4165 return false;
4166
e10f72bf 4167 return !test_bit(FLAG_TRANSITORY, &chip->gpiodev->descs[offset].flags);
05f479bf
CK
4168}
4169EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
4170
79a9becd
AC
4171/**
4172 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
4173 * @desc: gpio whose value will be returned
4174 *
4175 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 4176 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd
AC
4177 *
4178 * This function is to be called from contexts that can sleep.
d2876d08 4179 */
79a9becd 4180int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
d2876d08 4181{
d2876d08 4182 might_sleep_if(extra_checks);
fdeb8e15 4183 VALIDATE_DESC(desc);
fac9d885 4184 return gpiod_get_raw_value_commit(desc);
d2876d08 4185}
79a9becd 4186EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
372e722e 4187
79a9becd
AC
4188/**
4189 * gpiod_get_value_cansleep() - return a gpio's value
4190 * @desc: gpio whose value will be returned
4191 *
4192 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 4193 * account, or negative errno on failure.
79a9becd
AC
4194 *
4195 * This function is to be called from contexts that can sleep.
4196 */
4197int gpiod_get_value_cansleep(const struct gpio_desc *desc)
d2876d08 4198{
3f397c21 4199 int value;
d2876d08
DB
4200
4201 might_sleep_if(extra_checks);
fdeb8e15 4202 VALIDATE_DESC(desc);
fac9d885 4203 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
4204 if (value < 0)
4205 return value;
4206
79a9becd
AC
4207 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
4208 value = !value;
4209
3f397c21 4210 return value;
d2876d08 4211}
79a9becd 4212EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
372e722e 4213
eec1d566
LW
4214/**
4215 * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
b9762beb 4216 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 4217 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 4218 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4219 * @value_bitmap: bitmap to store the read values
eec1d566
LW
4220 *
4221 * Read the raw values of the GPIOs, i.e. the values of the physical lines
4222 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
4223 * else an error code.
4224 *
4225 * This function is to be called from contexts that can sleep.
4226 */
4227int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
4228 struct gpio_desc **desc_array,
77588c14 4229 struct gpio_array *array_info,
b9762beb 4230 unsigned long *value_bitmap)
eec1d566
LW
4231{
4232 might_sleep_if(extra_checks);
4233 if (!desc_array)
4234 return -EINVAL;
4235 return gpiod_get_array_value_complex(true, true, array_size,
77588c14
JK
4236 desc_array, array_info,
4237 value_bitmap);
eec1d566
LW
4238}
4239EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
4240
4241/**
4242 * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
b9762beb 4243 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 4244 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 4245 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4246 * @value_bitmap: bitmap to store the read values
eec1d566
LW
4247 *
4248 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
4249 * into account. Return 0 in case of success, else an error code.
4250 *
4251 * This function is to be called from contexts that can sleep.
4252 */
4253int gpiod_get_array_value_cansleep(unsigned int array_size,
4254 struct gpio_desc **desc_array,
77588c14 4255 struct gpio_array *array_info,
b9762beb 4256 unsigned long *value_bitmap)
eec1d566
LW
4257{
4258 might_sleep_if(extra_checks);
4259 if (!desc_array)
4260 return -EINVAL;
4261 return gpiod_get_array_value_complex(false, true, array_size,
77588c14
JK
4262 desc_array, array_info,
4263 value_bitmap);
eec1d566
LW
4264}
4265EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
4266
79a9becd
AC
4267/**
4268 * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
4269 * @desc: gpio whose value will be assigned
4270 * @value: value to assign
4271 *
4272 * Set the raw value of the GPIO, i.e. the value of its physical line without
4273 * regard for its ACTIVE_LOW status.
4274 *
4275 * This function is to be called from contexts that can sleep.
4276 */
4277void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
372e722e 4278{
d2876d08 4279 might_sleep_if(extra_checks);
fdeb8e15 4280 VALIDATE_DESC_VOID(desc);
fac9d885 4281 gpiod_set_raw_value_commit(desc, value);
372e722e 4282}
79a9becd 4283EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
d2876d08 4284
79a9becd
AC
4285/**
4286 * gpiod_set_value_cansleep() - assign a gpio's value
4287 * @desc: gpio whose value will be assigned
4288 * @value: value to assign
4289 *
4290 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
4291 * account
4292 *
4293 * This function is to be called from contexts that can sleep.
4294 */
4295void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
d2876d08 4296{
d2876d08 4297 might_sleep_if(extra_checks);
fdeb8e15 4298 VALIDATE_DESC_VOID(desc);
1e77fc82 4299 gpiod_set_value_nocheck(desc, value);
372e722e 4300}
79a9becd 4301EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
d2876d08 4302
5f424243 4303/**
3fff99bc 4304 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 4305 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4306 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4307 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4308 * @value_bitmap: bitmap of values to assign
5f424243
RI
4309 *
4310 * Set the raw values of the GPIOs, i.e. the values of the physical lines
4311 * without regard for their ACTIVE_LOW status.
4312 *
4313 * This function is to be called from contexts that can sleep.
4314 */
3027743f 4315int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3c940660
GU
4316 struct gpio_desc **desc_array,
4317 struct gpio_array *array_info,
4318 unsigned long *value_bitmap)
5f424243
RI
4319{
4320 might_sleep_if(extra_checks);
4321 if (!desc_array)
3027743f
LA
4322 return -EINVAL;
4323 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
77588c14 4324 array_info, value_bitmap);
5f424243 4325}
3fff99bc 4326EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
5f424243 4327
3946d187
DT
4328/**
4329 * gpiod_add_lookup_tables() - register GPIO device consumers
4330 * @tables: list of tables of consumers to register
4331 * @n: number of tables in the list
4332 */
4333void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
4334{
4335 unsigned int i;
4336
4337 mutex_lock(&gpio_lookup_lock);
4338
4339 for (i = 0; i < n; i++)
4340 list_add_tail(&tables[i]->list, &gpio_lookup_list);
4341
4342 mutex_unlock(&gpio_lookup_lock);
4343}
4344
5f424243 4345/**
3fff99bc 4346 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 4347 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4348 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4349 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4350 * @value_bitmap: bitmap of values to assign
5f424243
RI
4351 *
4352 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
4353 * into account.
4354 *
4355 * This function is to be called from contexts that can sleep.
4356 */
cf9af0d5
GU
4357int gpiod_set_array_value_cansleep(unsigned int array_size,
4358 struct gpio_desc **desc_array,
4359 struct gpio_array *array_info,
4360 unsigned long *value_bitmap)
5f424243
RI
4361{
4362 might_sleep_if(extra_checks);
4363 if (!desc_array)
cf9af0d5
GU
4364 return -EINVAL;
4365 return gpiod_set_array_value_complex(false, true, array_size,
4366 desc_array, array_info,
4367 value_bitmap);
5f424243 4368}
3fff99bc 4369EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
5f424243 4370
bae48da2 4371/**
ad824783
AC
4372 * gpiod_add_lookup_table() - register GPIO device consumers
4373 * @table: table of consumers to register
bae48da2 4374 */
ad824783 4375void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
bae48da2
AC
4376{
4377 mutex_lock(&gpio_lookup_lock);
4378
ad824783 4379 list_add_tail(&table->list, &gpio_lookup_list);
bae48da2
AC
4380
4381 mutex_unlock(&gpio_lookup_lock);
4382}
226b2242 4383EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
bae48da2 4384
be9015ab
SK
4385/**
4386 * gpiod_remove_lookup_table() - unregister GPIO device consumers
4387 * @table: table of consumers to unregister
4388 */
4389void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
4390{
4391 mutex_lock(&gpio_lookup_lock);
4392
4393 list_del(&table->list);
4394
4395 mutex_unlock(&gpio_lookup_lock);
4396}
226b2242 4397EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
be9015ab 4398
a411e81e
BG
4399/**
4400 * gpiod_add_hogs() - register a set of GPIO hogs from machine code
4401 * @hogs: table of gpio hog entries with a zeroed sentinel at the end
4402 */
4403void gpiod_add_hogs(struct gpiod_hog *hogs)
4404{
4405 struct gpio_chip *chip;
4406 struct gpiod_hog *hog;
4407
4408 mutex_lock(&gpio_machine_hogs_mutex);
4409
4410 for (hog = &hogs[0]; hog->chip_label; hog++) {
4411 list_add_tail(&hog->list, &gpio_machine_hogs);
4412
4413 /*
4414 * The chip may have been registered earlier, so check if it
4415 * exists and, if so, try to hog the line now.
4416 */
4417 chip = find_chip_by_name(hog->chip_label);
4418 if (chip)
4419 gpiochip_machine_hog(chip, hog);
4420 }
4421
4422 mutex_unlock(&gpio_machine_hogs_mutex);
4423}
4424EXPORT_SYMBOL_GPL(gpiod_add_hogs);
4425
ad824783 4426static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
bae48da2
AC
4427{
4428 const char *dev_id = dev ? dev_name(dev) : NULL;
ad824783 4429 struct gpiod_lookup_table *table;
bae48da2
AC
4430
4431 mutex_lock(&gpio_lookup_lock);
4432
ad824783
AC
4433 list_for_each_entry(table, &gpio_lookup_list, list) {
4434 if (table->dev_id && dev_id) {
4435 /*
4436 * Valid strings on both ends, must be identical to have
4437 * a match
4438 */
4439 if (!strcmp(table->dev_id, dev_id))
4440 goto found;
4441 } else {
4442 /*
4443 * One of the pointers is NULL, so both must be to have
4444 * a match
4445 */
4446 if (dev_id == table->dev_id)
4447 goto found;
4448 }
4449 }
4450 table = NULL;
bae48da2 4451
ad824783
AC
4452found:
4453 mutex_unlock(&gpio_lookup_lock);
4454 return table;
4455}
bae48da2 4456
ad824783 4457static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
fed7026a 4458 unsigned int idx, unsigned long *flags)
ad824783 4459{
2a3cf6a3 4460 struct gpio_desc *desc = ERR_PTR(-ENOENT);
ad824783
AC
4461 struct gpiod_lookup_table *table;
4462 struct gpiod_lookup *p;
bae48da2 4463
ad824783
AC
4464 table = gpiod_find_lookup_table(dev);
4465 if (!table)
4466 return desc;
bae48da2 4467
ad824783
AC
4468 for (p = &table->table[0]; p->chip_label; p++) {
4469 struct gpio_chip *chip;
bae48da2 4470
ad824783 4471 /* idx must always match exactly */
bae48da2
AC
4472 if (p->idx != idx)
4473 continue;
4474
ad824783
AC
4475 /* If the lookup entry has a con_id, require exact match */
4476 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
4477 continue;
bae48da2 4478
ad824783 4479 chip = find_chip_by_name(p->chip_label);
bae48da2 4480
ad824783 4481 if (!chip) {
8853daf3
JK
4482 /*
4483 * As the lookup table indicates a chip with
4484 * p->chip_label should exist, assume it may
4485 * still appear later and let the interested
4486 * consumer be probed again or let the Deferred
4487 * Probe infrastructure handle the error.
4488 */
4489 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
4490 p->chip_label);
4491 return ERR_PTR(-EPROBE_DEFER);
ad824783 4492 }
bae48da2 4493
ad824783 4494 if (chip->ngpio <= p->chip_hwnum) {
2a3cf6a3 4495 dev_err(dev,
d935bd50
GU
4496 "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n",
4497 idx, p->chip_hwnum, chip->ngpio - 1,
4498 chip->label);
2a3cf6a3 4499 return ERR_PTR(-EINVAL);
bae48da2 4500 }
bae48da2 4501
bb1e88cc 4502 desc = gpiochip_get_desc(chip, p->chip_hwnum);
ad824783 4503 *flags = p->flags;
bae48da2 4504
2a3cf6a3 4505 return desc;
bae48da2
AC
4506 }
4507
bae48da2
AC
4508 return desc;
4509}
4510
66858527
RI
4511static int platform_gpio_count(struct device *dev, const char *con_id)
4512{
4513 struct gpiod_lookup_table *table;
4514 struct gpiod_lookup *p;
4515 unsigned int count = 0;
4516
4517 table = gpiod_find_lookup_table(dev);
4518 if (!table)
4519 return -ENOENT;
4520
4521 for (p = &table->table[0]; p->chip_label; p++) {
4522 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
4523 (!con_id && !p->con_id))
4524 count++;
4525 }
4526 if (!count)
4527 return -ENOENT;
4528
4529 return count;
4530}
4531
13949fa9
DT
4532/**
4533 * fwnode_gpiod_get_index - obtain a GPIO from firmware node
4534 * @fwnode: handle of the firmware node
4535 * @con_id: function within the GPIO consumer
4536 * @index: index of the GPIO to obtain for the consumer
4537 * @flags: GPIO initialization flags
4538 * @label: label to attach to the requested GPIO
4539 *
4540 * This function can be used for drivers that get their configuration
4541 * from opaque firmware.
4542 *
4543 * The function properly finds the corresponding GPIO using whatever is the
4544 * underlying firmware interface and then makes sure that the GPIO
4545 * descriptor is requested before it is returned to the caller.
4546 *
4547 * Returns:
4548 * On successful request the GPIO pin is configured in accordance with
4549 * provided @flags.
4550 *
4551 * In case of error an ERR_PTR() is returned.
4552 */
4553struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
4554 const char *con_id, int index,
4555 enum gpiod_flags flags,
4556 const char *label)
4557{
4558 struct gpio_desc *desc;
4559 char prop_name[32]; /* 32 is max size of property name */
4560 unsigned int i;
4561
4562 for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) {
4563 if (con_id)
4564 snprintf(prop_name, sizeof(prop_name), "%s-%s",
4565 con_id, gpio_suffixes[i]);
4566 else
4567 snprintf(prop_name, sizeof(prop_name), "%s",
4568 gpio_suffixes[i]);
4569
4570 desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags,
4571 label);
4572 if (!IS_ERR(desc) || (PTR_ERR(desc) != -ENOENT))
4573 break;
4574 }
4575
4576 return desc;
4577}
4578EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
4579
66858527
RI
4580/**
4581 * gpiod_count - return the number of GPIOs associated with a device / function
4582 * or -ENOENT if no GPIO has been assigned to the requested function
4583 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4584 * @con_id: function within the GPIO consumer
4585 */
4586int gpiod_count(struct device *dev, const char *con_id)
4587{
4588 int count = -ENOENT;
4589
4590 if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node)
f626d6df 4591 count = of_gpio_get_count(dev, con_id);
66858527
RI
4592 else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev))
4593 count = acpi_gpio_count(dev, con_id);
4594
4595 if (count < 0)
4596 count = platform_gpio_count(dev, con_id);
4597
4598 return count;
4599}
4600EXPORT_SYMBOL_GPL(gpiod_count);
4601
bae48da2 4602/**
0879162f 4603 * gpiod_get - obtain a GPIO for a given GPIO function
ad824783 4604 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2 4605 * @con_id: function within the GPIO consumer
39b2bbe3 4606 * @flags: optional GPIO initialization flags
bae48da2
AC
4607 *
4608 * Return the GPIO descriptor corresponding to the function con_id of device
2a3cf6a3 4609 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
20a8a968 4610 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
bae48da2 4611 */
b17d1bf1 4612struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
39b2bbe3 4613 enum gpiod_flags flags)
bae48da2 4614{
39b2bbe3 4615 return gpiod_get_index(dev, con_id, 0, flags);
bae48da2 4616}
b17d1bf1 4617EXPORT_SYMBOL_GPL(gpiod_get);
bae48da2 4618
29a1f233
TR
4619/**
4620 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
4621 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4622 * @con_id: function within the GPIO consumer
39b2bbe3 4623 * @flags: optional GPIO initialization flags
29a1f233
TR
4624 *
4625 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
4626 * the requested function it will return NULL. This is convenient for drivers
4627 * that need to handle optional GPIOs.
4628 */
b17d1bf1 4629struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
39b2bbe3
AC
4630 const char *con_id,
4631 enum gpiod_flags flags)
29a1f233 4632{
39b2bbe3 4633 return gpiod_get_index_optional(dev, con_id, 0, flags);
29a1f233 4634}
b17d1bf1 4635EXPORT_SYMBOL_GPL(gpiod_get_optional);
29a1f233 4636
f625d460
BP
4637
4638/**
4639 * gpiod_configure_flags - helper function to configure a given GPIO
4640 * @desc: gpio whose value will be assigned
4641 * @con_id: function within the GPIO consumer
fed7026a
AS
4642 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4643 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4644 * @dflags: gpiod_flags - optional GPIO initialization flags
4645 *
4646 * Return 0 on success, -ENOENT if no GPIO has been assigned to the
4647 * requested function and/or index, or another IS_ERR() code if an error
4648 * occurred while trying to acquire the GPIO.
4649 */
c29fd9eb 4650int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
85b03b30 4651 unsigned long lflags, enum gpiod_flags dflags)
f625d460 4652{
d377f56f 4653 int ret;
f625d460 4654
85b03b30
JH
4655 if (lflags & GPIO_ACTIVE_LOW)
4656 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
f926dfc1 4657
85b03b30
JH
4658 if (lflags & GPIO_OPEN_DRAIN)
4659 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
f926dfc1
LW
4660 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
4661 /*
4662 * This enforces open drain mode from the consumer side.
4663 * This is necessary for some busses like I2C, but the lookup
4664 * should *REALLY* have specified them as open drain in the
4665 * first place, so print a little warning here.
4666 */
4667 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
4668 gpiod_warn(desc,
4669 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
4670 }
4671
85b03b30
JH
4672 if (lflags & GPIO_OPEN_SOURCE)
4673 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
e10f72bf 4674
d449991c
TP
4675 if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) {
4676 gpiod_err(desc,
4677 "both pull-up and pull-down enabled, invalid configuration\n");
4678 return -EINVAL;
4679 }
4680
4681 if (lflags & GPIO_PULL_UP)
4682 set_bit(FLAG_PULL_UP, &desc->flags);
4683 else if (lflags & GPIO_PULL_DOWN)
4684 set_bit(FLAG_PULL_DOWN, &desc->flags);
4685
d377f56f
LW
4686 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
4687 if (ret < 0)
4688 return ret;
85b03b30 4689
f625d460
BP
4690 /* No particular flag request, return here... */
4691 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
4692 pr_debug("no flags found for %s\n", con_id);
4693 return 0;
4694 }
4695
4696 /* Process flags */
4697 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
d377f56f 4698 ret = gpiod_direction_output(desc,
ad17731d 4699 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
f625d460 4700 else
d377f56f 4701 ret = gpiod_direction_input(desc);
f625d460 4702
d377f56f 4703 return ret;
f625d460
BP
4704}
4705
bae48da2
AC
4706/**
4707 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
fdd6a5fe 4708 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2
AC
4709 * @con_id: function within the GPIO consumer
4710 * @idx: index of the GPIO to obtain in the consumer
39b2bbe3 4711 * @flags: optional GPIO initialization flags
bae48da2
AC
4712 *
4713 * This variant of gpiod_get() allows to access GPIOs other than the first
4714 * defined one for functions that define several GPIOs.
4715 *
2a3cf6a3
AC
4716 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
4717 * requested function and/or index, or another IS_ERR() code if an error
20a8a968 4718 * occurred while trying to acquire the GPIO.
bae48da2 4719 */
b17d1bf1 4720struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
bae48da2 4721 const char *con_id,
39b2bbe3
AC
4722 unsigned int idx,
4723 enum gpiod_flags flags)
bae48da2 4724{
2d6c06f5 4725 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
35c5d7fd 4726 struct gpio_desc *desc = NULL;
d377f56f 4727 int ret;
7d18f0a1
LW
4728 /* Maybe we have a device name, maybe not */
4729 const char *devname = dev ? dev_name(dev) : "?";
bae48da2
AC
4730
4731 dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id);
4732
4d8440b9
RW
4733 if (dev) {
4734 /* Using device tree? */
4735 if (IS_ENABLED(CONFIG_OF) && dev->of_node) {
4736 dev_dbg(dev, "using device tree for GPIO lookup\n");
4737 desc = of_find_gpio(dev, con_id, idx, &lookupflags);
4738 } else if (ACPI_COMPANION(dev)) {
4739 dev_dbg(dev, "using ACPI for GPIO lookup\n");
a31f5c3a 4740 desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags);
4d8440b9 4741 }
35c5d7fd
AC
4742 }
4743
4744 /*
4745 * Either we are not using DT or ACPI, or their lookup did not return
4746 * a result. In that case, use platform lookup as a fallback.
4747 */
2a3cf6a3 4748 if (!desc || desc == ERR_PTR(-ENOENT)) {
43a8785a 4749 dev_dbg(dev, "using lookup tables for GPIO lookup\n");
39b2bbe3 4750 desc = gpiod_find(dev, con_id, idx, &lookupflags);
bae48da2
AC
4751 }
4752
4753 if (IS_ERR(desc)) {
9d5a1f2c 4754 dev_dbg(dev, "No GPIO consumer %s found\n", con_id);
bae48da2
AC
4755 return desc;
4756 }
4757
7d18f0a1
LW
4758 /*
4759 * If a connection label was passed use that, else attempt to use
4760 * the device name as label
4761 */
d377f56f
LW
4762 ret = gpiod_request(desc, con_id ? con_id : devname);
4763 if (ret < 0) {
4764 if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) {
b0ce7b29
LW
4765 /*
4766 * This happens when there are several consumers for
4767 * the same GPIO line: we just return here without
4768 * further initialization. It is a bit if a hack.
4769 * This is necessary to support fixed regulators.
4770 *
4771 * FIXME: Make this more sane and safe.
4772 */
4773 dev_info(dev, "nonexclusive access to GPIO for %s\n",
4774 con_id ? con_id : devname);
4775 return desc;
4776 } else {
d377f56f 4777 return ERR_PTR(ret);
b0ce7b29
LW
4778 }
4779 }
bae48da2 4780
d377f56f 4781 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
6392cca4 4782 if (ret < 0) {
39b2bbe3 4783 dev_dbg(dev, "setup of GPIO %s failed\n", con_id);
6392cca4
LW
4784 gpiod_put(desc);
4785 return ERR_PTR(ret);
4786 }
4787
4788 return desc;
4789}
b17d1bf1 4790EXPORT_SYMBOL_GPL(gpiod_get_index);
6392cca4 4791
40b73183
MW
4792/**
4793 * fwnode_get_named_gpiod - obtain a GPIO from firmware node
4794 * @fwnode: handle of the firmware node
4795 * @propname: name of the firmware property representing the GPIO
6392cca4 4796 * @index: index of the GPIO to obtain for the consumer
a264d10f 4797 * @dflags: GPIO initialization flags
950d55f5 4798 * @label: label to attach to the requested GPIO
40b73183
MW
4799 *
4800 * This function can be used for drivers that get their configuration
6392cca4 4801 * from opaque firmware.
40b73183 4802 *
6392cca4 4803 * The function properly finds the corresponding GPIO using whatever is the
40b73183
MW
4804 * underlying firmware interface and then makes sure that the GPIO
4805 * descriptor is requested before it is returned to the caller.
4806 *
950d55f5 4807 * Returns:
ff21378a 4808 * On successful request the GPIO pin is configured in accordance with
a264d10f
AS
4809 * provided @dflags.
4810 *
40b73183
MW
4811 * In case of error an ERR_PTR() is returned.
4812 */
4813struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
537b94da 4814 const char *propname, int index,
b2987d74
AS
4815 enum gpiod_flags dflags,
4816 const char *label)
40b73183 4817{
2d6c06f5 4818 unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT;
40b73183 4819 struct gpio_desc *desc = ERR_PTR(-ENODEV);
40b73183
MW
4820 int ret;
4821
4822 if (!fwnode)
4823 return ERR_PTR(-EINVAL);
4824
4825 if (is_of_node(fwnode)) {
6392cca4
LW
4826 desc = gpiod_get_from_of_node(to_of_node(fwnode),
4827 propname, index,
4828 dflags,
4829 label);
4830 return desc;
40b73183
MW
4831 } else if (is_acpi_node(fwnode)) {
4832 struct acpi_gpio_info info;
4833
537b94da 4834 desc = acpi_node_get_gpiod(fwnode, propname, index, &info);
6392cca4
LW
4835 if (IS_ERR(desc))
4836 return desc;
40b73183 4837
6392cca4 4838 acpi_gpio_update_gpiod_flags(&dflags, &info);
606be344 4839 acpi_gpio_update_gpiod_lookup_flags(&lflags, &info);
6392cca4 4840 }
40b73183 4841
6392cca4 4842 /* Currently only ACPI takes this path */
b2987d74 4843 ret = gpiod_request(desc, label);
85b03b30
JH
4844 if (ret)
4845 return ERR_PTR(ret);
4846
a264d10f
AS
4847 ret = gpiod_configure_flags(desc, propname, lflags, dflags);
4848 if (ret < 0) {
4849 gpiod_put(desc);
4850 return ERR_PTR(ret);
90b665f6
LP
4851 }
4852
40b73183
MW
4853 return desc;
4854}
4855EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod);
4856
29a1f233
TR
4857/**
4858 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
4859 * function
4860 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4861 * @con_id: function within the GPIO consumer
4862 * @index: index of the GPIO to obtain in the consumer
39b2bbe3 4863 * @flags: optional GPIO initialization flags
29a1f233
TR
4864 *
4865 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
4866 * specified index was assigned to the requested function it will return NULL.
4867 * This is convenient for drivers that need to handle optional GPIOs.
4868 */
b17d1bf1 4869struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
29a1f233 4870 const char *con_id,
39b2bbe3
AC
4871 unsigned int index,
4872 enum gpiod_flags flags)
29a1f233
TR
4873{
4874 struct gpio_desc *desc;
4875
39b2bbe3 4876 desc = gpiod_get_index(dev, con_id, index, flags);
29a1f233
TR
4877 if (IS_ERR(desc)) {
4878 if (PTR_ERR(desc) == -ENOENT)
4879 return NULL;
4880 }
4881
4882 return desc;
4883}
b17d1bf1 4884EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
29a1f233 4885
f625d460
BP
4886/**
4887 * gpiod_hog - Hog the specified GPIO desc given the provided flags
4888 * @desc: gpio whose value will be assigned
4889 * @name: gpio line name
fed7026a
AS
4890 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4891 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4892 * @dflags: gpiod_flags - optional GPIO initialization flags
4893 */
4894int gpiod_hog(struct gpio_desc *desc, const char *name,
4895 unsigned long lflags, enum gpiod_flags dflags)
4896{
4897 struct gpio_chip *chip;
4898 struct gpio_desc *local_desc;
4899 int hwnum;
d377f56f 4900 int ret;
f625d460
BP
4901
4902 chip = gpiod_to_chip(desc);
4903 hwnum = gpio_chip_hwgpio(desc);
4904
5923ea6c
LW
4905 local_desc = gpiochip_request_own_desc(chip, hwnum, name,
4906 lflags, dflags);
f625d460 4907 if (IS_ERR(local_desc)) {
d377f56f 4908 ret = PTR_ERR(local_desc);
c31a571d 4909 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
d377f56f
LW
4910 name, chip->label, hwnum, ret);
4911 return ret;
f625d460
BP
4912 }
4913
f625d460
BP
4914 /* Mark GPIO as hogged so it can be identified and removed later */
4915 set_bit(FLAG_IS_HOGGED, &desc->flags);
4916
4917 pr_info("GPIO line %d (%s) hogged as %s%s\n",
4918 desc_to_gpio(desc), name,
b27f300f
BG
4919 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
4920 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
4921 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
f625d460
BP
4922
4923 return 0;
4924}
4925
4926/**
4927 * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
4928 * @chip: gpio chip to act on
f625d460
BP
4929 */
4930static void gpiochip_free_hogs(struct gpio_chip *chip)
4931{
4932 int id;
4933
4934 for (id = 0; id < chip->ngpio; id++) {
1c3cdb18
LW
4935 if (test_bit(FLAG_IS_HOGGED, &chip->gpiodev->descs[id].flags))
4936 gpiochip_free_own_desc(&chip->gpiodev->descs[id]);
f625d460
BP
4937 }
4938}
4939
66858527
RI
4940/**
4941 * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
4942 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4943 * @con_id: function within the GPIO consumer
4944 * @flags: optional GPIO initialization flags
4945 *
4946 * This function acquires all the GPIOs defined under a given function.
4947 *
4948 * Return a struct gpio_descs containing an array of descriptors, -ENOENT if
4949 * no GPIO has been assigned to the requested function, or another IS_ERR()
4950 * code if an error occurred while trying to acquire the GPIOs.
4951 */
4952struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
4953 const char *con_id,
4954 enum gpiod_flags flags)
4955{
4956 struct gpio_desc *desc;
4957 struct gpio_descs *descs;
bf9346f5
JK
4958 struct gpio_array *array_info = NULL;
4959 struct gpio_chip *chip;
4960 int count, bitmap_size;
66858527
RI
4961
4962 count = gpiod_count(dev, con_id);
4963 if (count < 0)
4964 return ERR_PTR(count);
4965
acafe7e3 4966 descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL);
66858527
RI
4967 if (!descs)
4968 return ERR_PTR(-ENOMEM);
4969
4970 for (descs->ndescs = 0; descs->ndescs < count; ) {
4971 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
4972 if (IS_ERR(desc)) {
4973 gpiod_put_array(descs);
4974 return ERR_CAST(desc);
4975 }
bf9346f5 4976
66858527 4977 descs->desc[descs->ndescs] = desc;
bf9346f5
JK
4978
4979 chip = gpiod_to_chip(desc);
4980 /*
c4c958aa
JK
4981 * If pin hardware number of array member 0 is also 0, select
4982 * its chip as a candidate for fast bitmap processing path.
bf9346f5 4983 */
c4c958aa 4984 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
bf9346f5
JK
4985 struct gpio_descs *array;
4986
4987 bitmap_size = BITS_TO_LONGS(chip->ngpio > count ?
4988 chip->ngpio : count);
4989
4990 array = kzalloc(struct_size(descs, desc, count) +
4991 struct_size(array_info, invert_mask,
4992 3 * bitmap_size), GFP_KERNEL);
4993 if (!array) {
4994 gpiod_put_array(descs);
4995 return ERR_PTR(-ENOMEM);
4996 }
4997
4998 memcpy(array, descs,
4999 struct_size(descs, desc, descs->ndescs + 1));
5000 kfree(descs);
5001
5002 descs = array;
5003 array_info = (void *)(descs->desc + count);
5004 array_info->get_mask = array_info->invert_mask +
5005 bitmap_size;
5006 array_info->set_mask = array_info->get_mask +
5007 bitmap_size;
5008
5009 array_info->desc = descs->desc;
5010 array_info->size = count;
5011 array_info->chip = chip;
5012 bitmap_set(array_info->get_mask, descs->ndescs,
5013 count - descs->ndescs);
5014 bitmap_set(array_info->set_mask, descs->ndescs,
5015 count - descs->ndescs);
5016 descs->info = array_info;
5017 }
c4c958aa
JK
5018 /* Unmark array members which don't belong to the 'fast' chip */
5019 if (array_info && array_info->chip != chip) {
bf9346f5
JK
5020 __clear_bit(descs->ndescs, array_info->get_mask);
5021 __clear_bit(descs->ndescs, array_info->set_mask);
c4c958aa
JK
5022 }
5023 /*
5024 * Detect array members which belong to the 'fast' chip
5025 * but their pins are not in hardware order.
5026 */
5027 else if (array_info &&
5028 gpio_chip_hwgpio(desc) != descs->ndescs) {
5029 /*
5030 * Don't use fast path if all array members processed so
5031 * far belong to the same chip as this one but its pin
5032 * hardware number is different from its array index.
5033 */
5034 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
5035 array_info = NULL;
5036 } else {
5037 __clear_bit(descs->ndescs,
5038 array_info->get_mask);
5039 __clear_bit(descs->ndescs,
5040 array_info->set_mask);
5041 }
bf9346f5
JK
5042 } else if (array_info) {
5043 /* Exclude open drain or open source from fast output */
5044 if (gpiochip_line_is_open_drain(chip, descs->ndescs) ||
5045 gpiochip_line_is_open_source(chip, descs->ndescs))
5046 __clear_bit(descs->ndescs,
5047 array_info->set_mask);
5048 /* Identify 'fast' pins which require invertion */
5049 if (gpiod_is_active_low(desc))
5050 __set_bit(descs->ndescs,
5051 array_info->invert_mask);
5052 }
5053
66858527
RI
5054 descs->ndescs++;
5055 }
bf9346f5
JK
5056 if (array_info)
5057 dev_dbg(dev,
5058 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
5059 array_info->chip->label, array_info->size,
5060 *array_info->get_mask, *array_info->set_mask,
5061 *array_info->invert_mask);
66858527
RI
5062 return descs;
5063}
5064EXPORT_SYMBOL_GPL(gpiod_get_array);
5065
5066/**
5067 * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
5068 * function
5069 * @dev: GPIO consumer, can be NULL for system-global GPIOs
5070 * @con_id: function within the GPIO consumer
5071 * @flags: optional GPIO initialization flags
5072 *
5073 * This is equivalent to gpiod_get_array(), except that when no GPIO was
5074 * assigned to the requested function it will return NULL.
5075 */
5076struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
5077 const char *con_id,
5078 enum gpiod_flags flags)
5079{
5080 struct gpio_descs *descs;
5081
5082 descs = gpiod_get_array(dev, con_id, flags);
5083 if (IS_ERR(descs) && (PTR_ERR(descs) == -ENOENT))
5084 return NULL;
5085
5086 return descs;
5087}
5088EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
5089
bae48da2
AC
5090/**
5091 * gpiod_put - dispose of a GPIO descriptor
5092 * @desc: GPIO descriptor to dispose of
5093 *
5094 * No descriptor can be used after gpiod_put() has been called on it.
5095 */
5096void gpiod_put(struct gpio_desc *desc)
5097{
1d7765ba
AS
5098 if (desc)
5099 gpiod_free(desc);
372e722e 5100}
bae48da2 5101EXPORT_SYMBOL_GPL(gpiod_put);
d2876d08 5102
66858527
RI
5103/**
5104 * gpiod_put_array - dispose of multiple GPIO descriptors
5105 * @descs: struct gpio_descs containing an array of descriptors
5106 */
5107void gpiod_put_array(struct gpio_descs *descs)
5108{
5109 unsigned int i;
5110
5111 for (i = 0; i < descs->ndescs; i++)
5112 gpiod_put(descs->desc[i]);
5113
5114 kfree(descs);
5115}
5116EXPORT_SYMBOL_GPL(gpiod_put_array);
5117
3c702e99
LW
5118static int __init gpiolib_dev_init(void)
5119{
5120 int ret;
5121
5122 /* Register GPIO sysfs bus */
b1911710 5123 ret = bus_register(&gpio_bus_type);
3c702e99
LW
5124 if (ret < 0) {
5125 pr_err("gpiolib: could not register GPIO bus type\n");
5126 return ret;
5127 }
5128
5129 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, "gpiochip");
5130 if (ret < 0) {
5131 pr_err("gpiolib: failed to allocate char dev region\n");
5132 bus_unregister(&gpio_bus_type);
159f3cd9
GR
5133 } else {
5134 gpiolib_initialized = true;
5135 gpiochip_setup_devs();
3c702e99
LW
5136 }
5137 return ret;
5138}
5139core_initcall(gpiolib_dev_init);
5140
d2876d08
DB
5141#ifdef CONFIG_DEBUG_FS
5142
fdeb8e15 5143static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
d2876d08
DB
5144{
5145 unsigned i;
fdeb8e15
LW
5146 struct gpio_chip *chip = gdev->chip;
5147 unsigned gpio = gdev->base;
5148 struct gpio_desc *gdesc = &gdev->descs[0];
90fd2270
LW
5149 bool is_out;
5150 bool is_irq;
5151 bool active_low;
d2876d08 5152
fdeb8e15 5153 for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) {
ced433e2
MP
5154 if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) {
5155 if (gdesc->name) {
5156 seq_printf(s, " gpio-%-3d (%-20.20s)\n",
5157 gpio, gdesc->name);
5158 }
d2876d08 5159 continue;
ced433e2 5160 }
d2876d08 5161
372e722e 5162 gpiod_get_direction(gdesc);
d2876d08 5163 is_out = test_bit(FLAG_IS_OUT, &gdesc->flags);
d468bf9e 5164 is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags);
90fd2270
LW
5165 active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags);
5166 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s",
ced433e2 5167 gpio, gdesc->name ? gdesc->name : "", gdesc->label,
d2876d08 5168 is_out ? "out" : "in ",
1c22a252 5169 chip->get ? (chip->get(chip, i) ? "hi" : "lo") : "? ",
90fd2270
LW
5170 is_irq ? "IRQ " : "",
5171 active_low ? "ACTIVE LOW" : "");
d2876d08
DB
5172 seq_printf(s, "\n");
5173 }
5174}
5175
f9c4a31f 5176static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
d2876d08 5177{
362432ae 5178 unsigned long flags;
ff2b1359 5179 struct gpio_device *gdev = NULL;
cb1650d4 5180 loff_t index = *pos;
d2876d08 5181
f9c4a31f 5182 s->private = "";
d2876d08 5183
362432ae 5184 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 5185 list_for_each_entry(gdev, &gpio_devices, list)
362432ae
GL
5186 if (index-- == 0) {
5187 spin_unlock_irqrestore(&gpio_lock, flags);
ff2b1359 5188 return gdev;
f9c4a31f 5189 }
362432ae 5190 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f 5191
cb1650d4 5192 return NULL;
f9c4a31f
TR
5193}
5194
5195static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
5196{
362432ae 5197 unsigned long flags;
ff2b1359 5198 struct gpio_device *gdev = v;
f9c4a31f
TR
5199 void *ret = NULL;
5200
362432ae 5201 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 5202 if (list_is_last(&gdev->list, &gpio_devices))
cb1650d4
AC
5203 ret = NULL;
5204 else
ff2b1359 5205 ret = list_entry(gdev->list.next, struct gpio_device, list);
362432ae 5206 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f
TR
5207
5208 s->private = "\n";
5209 ++*pos;
5210
5211 return ret;
5212}
5213
5214static void gpiolib_seq_stop(struct seq_file *s, void *v)
5215{
5216}
5217
5218static int gpiolib_seq_show(struct seq_file *s, void *v)
5219{
ff2b1359
LW
5220 struct gpio_device *gdev = v;
5221 struct gpio_chip *chip = gdev->chip;
5222 struct device *parent;
5223
5224 if (!chip) {
5225 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
5226 dev_name(&gdev->dev));
5227 return 0;
5228 }
f9c4a31f 5229
ff2b1359
LW
5230 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
5231 dev_name(&gdev->dev),
fdeb8e15 5232 gdev->base, gdev->base + gdev->ngpio - 1);
ff2b1359
LW
5233 parent = chip->parent;
5234 if (parent)
5235 seq_printf(s, ", parent: %s/%s",
5236 parent->bus ? parent->bus->name : "no-bus",
5237 dev_name(parent));
f9c4a31f
TR
5238 if (chip->label)
5239 seq_printf(s, ", %s", chip->label);
5240 if (chip->can_sleep)
5241 seq_printf(s, ", can sleep");
5242 seq_printf(s, ":\n");
5243
5244 if (chip->dbg_show)
5245 chip->dbg_show(s, chip);
5246 else
fdeb8e15 5247 gpiolib_dbg_show(s, gdev);
f9c4a31f 5248
d2876d08
DB
5249 return 0;
5250}
5251
f9c4a31f
TR
5252static const struct seq_operations gpiolib_seq_ops = {
5253 .start = gpiolib_seq_start,
5254 .next = gpiolib_seq_next,
5255 .stop = gpiolib_seq_stop,
5256 .show = gpiolib_seq_show,
5257};
5258
d2876d08
DB
5259static int gpiolib_open(struct inode *inode, struct file *file)
5260{
f9c4a31f 5261 return seq_open(file, &gpiolib_seq_ops);
d2876d08
DB
5262}
5263
828c0950 5264static const struct file_operations gpiolib_operations = {
f9c4a31f 5265 .owner = THIS_MODULE,
d2876d08
DB
5266 .open = gpiolib_open,
5267 .read = seq_read,
5268 .llseek = seq_lseek,
f9c4a31f 5269 .release = seq_release,
d2876d08
DB
5270};
5271
5272static int __init gpiolib_debugfs_init(void)
5273{
5274 /* /sys/kernel/debug/gpio */
acc68b0e
GKH
5275 debugfs_create_file("gpio", S_IFREG | S_IRUGO, NULL, NULL,
5276 &gpiolib_operations);
d2876d08
DB
5277 return 0;
5278}
5279subsys_initcall(gpiolib_debugfs_init);
5280
5281#endif /* DEBUG_FS */