gpiolib: order includes alphabetically in gpiolib.h
[linux-block.git] / drivers / gpio / gpiolib.c
CommitLineData
dae5f0af 1// SPDX-License-Identifier: GPL-2.0
c47d9e1b 2
79aabb1e 3#include <linux/acpi.h>
923a654c 4#include <linux/bitmap.h>
79aabb1e
AS
5#include <linux/compat.h>
6#include <linux/debugfs.h>
d8f388d8
DB
7#include <linux/device.h>
8#include <linux/err.h>
380c7ba3 9#include <linux/errno.h>
79aabb1e
AS
10#include <linux/file.h>
11#include <linux/fs.h>
79aabb1e
AS
12#include <linux/idr.h>
13#include <linux/interrupt.h>
14#include <linux/irq.h>
15#include <linux/kernel.h>
16#include <linux/list.h>
17#include <linux/module.h>
380c7ba3 18#include <linux/of.h>
c771c2f4 19#include <linux/pinctrl/consumer.h>
79aabb1e
AS
20#include <linux/seq_file.h>
21#include <linux/slab.h>
22#include <linux/spinlock.h>
23
380c7ba3
AS
24#include <linux/gpio.h>
25#include <linux/gpio/driver.h>
26#include <linux/gpio/machine.h>
27
3c702e99 28#include <uapi/linux/gpio.h>
d2876d08 29
77cb907a 30#include "gpiolib-acpi.h"
925ca369 31#include "gpiolib-cdev.h"
79aabb1e
AS
32#include "gpiolib-of.h"
33#include "gpiolib-swnode.h"
ef087d8e 34#include "gpiolib-sysfs.h"
79aabb1e 35#include "gpiolib.h"
664e3e5a 36
3f397c21
UKK
37#define CREATE_TRACE_POINTS
38#include <trace/events/gpio.h>
d2876d08 39
79a9becd 40/* Implementation infrastructure for GPIO interfaces.
d2876d08 41 *
79a9becd
AC
42 * The GPIO programming interface allows for inlining speed-critical
43 * get/set operations for common cases, so that access to SOC-integrated
44 * GPIOs can sometimes cost only an instruction or two per bit.
d2876d08
DB
45 */
46
47
48/* When debugging, extend minimal trust to callers and platform code.
49 * Also emit diagnostic messages that may help initial bringup, when
50 * board setup or driver bugs are most common.
51 *
52 * Otherwise, minimize overhead in what may be bitbanging codepaths.
53 */
54#ifdef DEBUG
55#define extra_checks 1
56#else
57#define extra_checks 0
58#endif
59
ff2b1359
LW
60/* Device and char device-related information */
61static DEFINE_IDA(gpio_ida);
3c702e99
LW
62static dev_t gpio_devt;
63#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
c135f401
AS
64
65static int gpio_bus_match(struct device *dev, struct device_driver *drv)
66{
67 struct fwnode_handle *fwnode = dev_fwnode(dev);
68
69 /*
70 * Only match if the fwnode doesn't already have a proper struct device
71 * created for it.
72 */
73 if (fwnode && fwnode->dev != dev)
74 return 0;
75 return 1;
76}
77
3c702e99
LW
78static struct bus_type gpio_bus_type = {
79 .name = "gpio",
ced2af41 80 .match = gpio_bus_match,
3c702e99 81};
ff2b1359 82
3027743f
LA
83/*
84 * Number of GPIOs to use for the fast path in set array
85 */
86#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
87
d2876d08
DB
88/* gpio_lock prevents conflicts during gpio_desc[] table updates.
89 * While any GPIO is requested, its gpio_chip is not removable;
90 * each GPIO's "requested" flag serves as a lock and refcount.
91 */
0eb4c6c2 92DEFINE_SPINLOCK(gpio_lock);
d2876d08 93
bae48da2
AC
94static DEFINE_MUTEX(gpio_lookup_lock);
95static LIST_HEAD(gpio_lookup_list);
ff2b1359 96LIST_HEAD(gpio_devices);
6d86750c 97
a411e81e
BG
98static DEFINE_MUTEX(gpio_machine_hogs_mutex);
99static LIST_HEAD(gpio_machine_hogs);
100
a0b66a73
LW
101static void gpiochip_free_hogs(struct gpio_chip *gc);
102static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
103 struct lock_class_key *lock_key,
104 struct lock_class_key *request_key);
a0b66a73
LW
105static void gpiochip_irqchip_remove(struct gpio_chip *gc);
106static int gpiochip_irqchip_init_hw(struct gpio_chip *gc);
107static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc);
108static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc);
6d86750c 109
159f3cd9 110static bool gpiolib_initialized;
6d86750c 111
d2876d08
DB
112static inline void desc_set_label(struct gpio_desc *d, const char *label)
113{
d2876d08 114 d->label = label;
d2876d08
DB
115}
116
372e722e 117/**
950d55f5
TR
118 * gpio_to_desc - Convert a GPIO number to its descriptor
119 * @gpio: global GPIO number
120 *
121 * Returns:
122 * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
123 * with the given number exists in the system.
372e722e 124 */
79a9becd 125struct gpio_desc *gpio_to_desc(unsigned gpio)
372e722e 126{
ff2b1359 127 struct gpio_device *gdev;
14e85c0e
AC
128 unsigned long flags;
129
130 spin_lock_irqsave(&gpio_lock, flags);
131
ff2b1359 132 list_for_each_entry(gdev, &gpio_devices, list) {
fdeb8e15
LW
133 if (gdev->base <= gpio &&
134 gdev->base + gdev->ngpio > gpio) {
14e85c0e 135 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 136 return &gdev->descs[gpio - gdev->base];
14e85c0e
AC
137 }
138 }
139
140 spin_unlock_irqrestore(&gpio_lock, flags);
141
0e9a5edf 142 if (!gpio_is_valid(gpio))
c47d9e1b 143 pr_warn("invalid GPIO %d\n", gpio);
0e9a5edf 144
14e85c0e 145 return NULL;
372e722e 146}
79a9becd 147EXPORT_SYMBOL_GPL(gpio_to_desc);
372e722e 148
d468bf9e 149/**
950d55f5
TR
150 * gpiochip_get_desc - get the GPIO descriptor corresponding to the given
151 * hardware number for this chip
a0b66a73 152 * @gc: GPIO chip
950d55f5
TR
153 * @hwnum: hardware number of the GPIO for this chip
154 *
155 * Returns:
35c6cfb4 156 * A pointer to the GPIO descriptor or ``ERR_PTR(-EINVAL)`` if no GPIO exists
950d55f5 157 * in the given chip for the specified hardware number.
d468bf9e 158 */
a0b66a73 159struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc,
06863620 160 unsigned int hwnum)
d468bf9e 161{
a0b66a73 162 struct gpio_device *gdev = gc->gpiodev;
fdeb8e15
LW
163
164 if (hwnum >= gdev->ngpio)
b7d0a28a 165 return ERR_PTR(-EINVAL);
d468bf9e 166
fdeb8e15 167 return &gdev->descs[hwnum];
d468bf9e 168}
97795420 169EXPORT_SYMBOL_GPL(gpiochip_get_desc);
372e722e
AC
170
171/**
950d55f5
TR
172 * desc_to_gpio - convert a GPIO descriptor to the integer namespace
173 * @desc: GPIO descriptor
174 *
372e722e 175 * This should disappear in the future but is needed since we still
950d55f5
TR
176 * use GPIO numbers for error messages and sysfs nodes.
177 *
178 * Returns:
179 * The global GPIO number for the GPIO specified by its descriptor.
372e722e 180 */
79a9becd 181int desc_to_gpio(const struct gpio_desc *desc)
372e722e 182{
fdeb8e15 183 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
372e722e 184}
79a9becd 185EXPORT_SYMBOL_GPL(desc_to_gpio);
372e722e
AC
186
187
79a9becd
AC
188/**
189 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
190 * @desc: descriptor to return the chip of
191 */
192struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
372e722e 193{
dd3b9a44 194 if (!desc || !desc->gdev)
fdeb8e15
LW
195 return NULL;
196 return desc->gdev->chip;
372e722e 197}
79a9becd 198EXPORT_SYMBOL_GPL(gpiod_to_chip);
d2876d08 199
8d0aab2f
AV
200/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
201static int gpiochip_find_base(int ngpio)
202{
ff2b1359 203 struct gpio_device *gdev;
7b61212f 204 int base = GPIO_DYNAMIC_BASE;
8d0aab2f 205
7b61212f 206 list_for_each_entry(gdev, &gpio_devices, list) {
83cabe33 207 /* found a free space? */
7b61212f 208 if (gdev->base >= base + ngpio)
83cabe33 209 break;
7b61212f
CL
210 /* nope, check the space right after the chip */
211 base = gdev->base + gdev->ngpio;
7dd3d9bd
AK
212 if (base < GPIO_DYNAMIC_BASE)
213 base = GPIO_DYNAMIC_BASE;
8d0aab2f
AV
214 }
215
83cabe33 216 if (gpio_is_valid(base)) {
8d0aab2f 217 pr_debug("%s: found new base at %d\n", __func__, base);
83cabe33
AC
218 return base;
219 } else {
220 pr_err("%s: cannot find free range\n", __func__);
221 return -ENOSPC;
169b6a7a 222 }
169b6a7a
AV
223}
224
79a9becd
AC
225/**
226 * gpiod_get_direction - return the current direction of a GPIO
227 * @desc: GPIO to get the direction of
228 *
94fc7309 229 * Returns 0 for output, 1 for input, or an error code in case of error.
79a9becd
AC
230 *
231 * This function may sleep if gpiod_cansleep() is true.
232 */
8e53b0f1 233int gpiod_get_direction(struct gpio_desc *desc)
80b0a602 234{
a0b66a73 235 struct gpio_chip *gc;
13daf489 236 unsigned int offset;
d377f56f 237 int ret;
80b0a602 238
a0b66a73 239 gc = gpiod_to_chip(desc);
372e722e 240 offset = gpio_chip_hwgpio(desc);
80b0a602 241
256efaea
RK
242 /*
243 * Open drain emulation using input mode may incorrectly report
244 * input here, fix that up.
245 */
246 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) &&
247 test_bit(FLAG_IS_OUT, &desc->flags))
248 return 0;
249
a0b66a73 250 if (!gc->get_direction)
d0121b85 251 return -ENOTSUPP;
80b0a602 252
a0b66a73 253 ret = gc->get_direction(gc, offset);
4fc5bfeb
AS
254 if (ret < 0)
255 return ret;
256
257 /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */
258 if (ret > 0)
d377f56f 259 ret = 1;
4fc5bfeb
AS
260
261 assign_bit(FLAG_IS_OUT, &desc->flags, !ret);
262
d377f56f 263 return ret;
80b0a602 264}
79a9becd 265EXPORT_SYMBOL_GPL(gpiod_get_direction);
80b0a602 266
1a989d0f
AC
267/*
268 * Add a new chip to the global chips list, keeping the list of chips sorted
ef7c7553 269 * by range(means [base, base + ngpio - 1]) order.
1a989d0f
AC
270 *
271 * Return -EBUSY if the new chip overlaps with some other chip's integer
272 * space.
273 */
ff2b1359 274static int gpiodev_add_to_list(struct gpio_device *gdev)
1a989d0f 275{
a961f9b4 276 struct gpio_device *prev, *next;
1a989d0f 277
ff2b1359 278 if (list_empty(&gpio_devices)) {
a961f9b4 279 /* initial entry in list */
ff2b1359 280 list_add_tail(&gdev->list, &gpio_devices);
e28ecca6 281 return 0;
1a989d0f
AC
282 }
283
243cfa6a 284 next = list_first_entry(&gpio_devices, struct gpio_device, list);
a961f9b4
BJZ
285 if (gdev->base + gdev->ngpio <= next->base) {
286 /* add before first entry */
287 list_add(&gdev->list, &gpio_devices);
288 return 0;
1a989d0f
AC
289 }
290
243cfa6a 291 prev = list_last_entry(&gpio_devices, struct gpio_device, list);
a961f9b4
BJZ
292 if (prev->base + prev->ngpio <= gdev->base) {
293 /* add behind last entry */
294 list_add_tail(&gdev->list, &gpio_devices);
96098df1 295 return 0;
1a989d0f
AC
296 }
297
a961f9b4
BJZ
298 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
299 /* at the end of the list */
300 if (&next->list == &gpio_devices)
301 break;
1a989d0f 302
a961f9b4
BJZ
303 /* add between prev and next */
304 if (prev->base + prev->ngpio <= gdev->base
305 && gdev->base + gdev->ngpio <= next->base) {
306 list_add(&gdev->list, &prev->list);
307 return 0;
308 }
309 }
310
a961f9b4 311 return -EBUSY;
1a989d0f
AC
312}
313
950d55f5 314/*
f881bab0 315 * Convert a GPIO name to its descriptor
582838ea
GU
316 * Note that there is no guarantee that GPIO names are globally unique!
317 * Hence this function will return, if it exists, a reference to the first GPIO
318 * line found that matches the given name.
f881bab0
LW
319 */
320static struct gpio_desc *gpio_name_to_desc(const char * const name)
321{
ff2b1359 322 struct gpio_device *gdev;
f881bab0
LW
323 unsigned long flags;
324
ee203bbd
MM
325 if (!name)
326 return NULL;
327
f881bab0
LW
328 spin_lock_irqsave(&gpio_lock, flags);
329
ff2b1359 330 list_for_each_entry(gdev, &gpio_devices, list) {
66f46e37 331 struct gpio_desc *desc;
f881bab0 332
66f46e37
AS
333 for_each_gpio_desc(gdev->chip, desc) {
334 if (desc->name && !strcmp(desc->name, name)) {
f881bab0 335 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 336 return desc;
f881bab0
LW
337 }
338 }
339 }
340
341 spin_unlock_irqrestore(&gpio_lock, flags);
342
343 return NULL;
344}
345
5f3ca732 346/*
582838ea
GU
347 * Take the names from gc->names and assign them to their GPIO descriptors.
348 * Warn if a name is already used for a GPIO line on a different GPIO chip.
5f3ca732 349 *
582838ea
GU
350 * Note that:
351 * 1. Non-unique names are still accepted,
352 * 2. Name collisions within the same GPIO chip are not reported.
5f3ca732
MP
353 */
354static int gpiochip_set_desc_names(struct gpio_chip *gc)
355{
fdeb8e15 356 struct gpio_device *gdev = gc->gpiodev;
5f3ca732
MP
357 int i;
358
5f3ca732
MP
359 /* First check all names if they are unique */
360 for (i = 0; i != gc->ngpio; ++i) {
361 struct gpio_desc *gpio;
362
363 gpio = gpio_name_to_desc(gc->names[i]);
f881bab0 364 if (gpio)
fdeb8e15 365 dev_warn(&gdev->dev,
34ffd85d 366 "Detected name collision for GPIO name '%s'\n",
f881bab0 367 gc->names[i]);
5f3ca732
MP
368 }
369
370 /* Then add all names to the GPIO descriptors */
371 for (i = 0; i != gc->ngpio; ++i)
fdeb8e15 372 gdev->descs[i].name = gc->names[i];
5f3ca732
MP
373
374 return 0;
375}
376
32fc5aa2 377/*
0c5ebb4c 378 * gpiochip_set_names - Set GPIO line names using device properties
32fc5aa2
BG
379 * @chip: GPIO chip whose lines should be named, if possible
380 *
381 * Looks for device property "gpio-line-names" and if it exists assigns
382 * GPIO line names for the chip. The memory allocated for the assigned
b41ba2ec 383 * names belong to the underlying firmware node and should not be released
32fc5aa2
BG
384 * by the caller.
385 */
0c5ebb4c 386static int gpiochip_set_names(struct gpio_chip *chip)
32fc5aa2
BG
387{
388 struct gpio_device *gdev = chip->gpiodev;
4ef339bc 389 struct device *dev = &gdev->dev;
32fc5aa2
BG
390 const char **names;
391 int ret, i;
392 int count;
393
4ef339bc 394 count = device_property_string_array_count(dev, "gpio-line-names");
32fc5aa2
BG
395 if (count < 0)
396 return 0;
397
4e804c39
SP
398 /*
399 * When offset is set in the driver side we assume the driver internally
400 * is using more than one gpiochip per the same device. We have to stop
401 * setting friendly names if the specified ones with 'gpio-line-names'
402 * are less than the offset in the device itself. This means all the
403 * lines are not present for every single pin within all the internal
404 * gpiochips.
405 */
406 if (count <= chip->offset) {
4ef339bc 407 dev_warn(dev, "gpio-line-names too short (length %d), cannot map names for the gpiochip at offset %u\n",
4e804c39
SP
408 count, chip->offset);
409 return 0;
32fc5aa2
BG
410 }
411
412 names = kcalloc(count, sizeof(*names), GFP_KERNEL);
413 if (!names)
414 return -ENOMEM;
415
4ef339bc 416 ret = device_property_read_string_array(dev, "gpio-line-names",
32fc5aa2
BG
417 names, count);
418 if (ret < 0) {
4ef339bc 419 dev_warn(dev, "failed to read GPIO line names\n");
32fc5aa2
BG
420 kfree(names);
421 return ret;
422 }
423
4e804c39
SP
424 /*
425 * When more that one gpiochip per device is used, 'count' can
426 * contain at most number gpiochips x chip->ngpio. We have to
427 * correctly distribute all defined lines taking into account
428 * chip->offset as starting point from where we will assign
429 * the names to pins from the 'names' array. Since property
430 * 'gpio-line-names' cannot contains gaps, we have to be sure
431 * we only assign those pins that really exists since chip->ngpio
432 * can be different of the chip->offset.
433 */
434 count = (count > chip->offset) ? count - chip->offset : count;
435 if (count > chip->ngpio)
436 count = chip->ngpio;
437
c73960bb
PR
438 for (i = 0; i < count; i++) {
439 /*
440 * Allow overriding "fixed" names provided by the GPIO
441 * provider. The "fixed" names are more often than not
442 * generic and less informative than the names given in
443 * device properties.
444 */
445 if (names[chip->offset + i] && names[chip->offset + i][0])
446 gdev->descs[i].name = names[chip->offset + i];
447 }
32fc5aa2
BG
448
449 kfree(names);
450
451 return 0;
452}
453
a0b66a73 454static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc)
e4371f6e
SB
455{
456 unsigned long *p;
457
a0b66a73 458 p = bitmap_alloc(gc->ngpio, GFP_KERNEL);
e4371f6e
SB
459 if (!p)
460 return NULL;
461
462 /* Assume by default all GPIOs are valid */
a0b66a73 463 bitmap_fill(p, gc->ngpio);
e4371f6e
SB
464
465 return p;
466}
467
05a854c5
AS
468static void gpiochip_free_mask(unsigned long **p)
469{
470 bitmap_free(*p);
471 *p = NULL;
472}
473
27043a7d
AS
474static unsigned int gpiochip_count_reserved_ranges(struct gpio_chip *gc)
475{
4ef339bc 476 struct device *dev = &gc->gpiodev->dev;
27043a7d
AS
477 int size;
478
479 /* Format is "start, count, ..." */
4ef339bc 480 size = device_property_count_u32(dev, "gpio-reserved-ranges");
27043a7d
AS
481 if (size > 0 && size % 2 == 0)
482 return size;
483
484 return 0;
485}
486
27043a7d
AS
487static int gpiochip_apply_reserved_ranges(struct gpio_chip *gc)
488{
4ef339bc 489 struct device *dev = &gc->gpiodev->dev;
27043a7d
AS
490 unsigned int size;
491 u32 *ranges;
492 int ret;
493
494 size = gpiochip_count_reserved_ranges(gc);
495 if (size == 0)
496 return 0;
497
498 ranges = kmalloc_array(size, sizeof(*ranges), GFP_KERNEL);
499 if (!ranges)
500 return -ENOMEM;
501
4ef339bc
AS
502 ret = device_property_read_u32_array(dev, "gpio-reserved-ranges",
503 ranges, size);
27043a7d
AS
504 if (ret) {
505 kfree(ranges);
506 return ret;
507 }
508
509 while (size) {
510 u32 count = ranges[--size];
511 u32 start = ranges[--size];
512
513 if (start >= gc->ngpio || start + count > gc->ngpio)
514 continue;
515
516 bitmap_clear(gc->valid_mask, start, count);
517 }
518
519 kfree(ranges);
520 return 0;
521}
522
c9fc5aff 523static int gpiochip_init_valid_mask(struct gpio_chip *gc)
f8ec92a9 524{
27043a7d
AS
525 int ret;
526
1a55fc40
AS
527 if (!(gpiochip_count_reserved_ranges(gc) || gc->init_valid_mask))
528 return 0;
529
530 gc->valid_mask = gpiochip_allocate_mask(gc);
531 if (!gc->valid_mask)
532 return -ENOMEM;
533
27043a7d
AS
534 ret = gpiochip_apply_reserved_ranges(gc);
535 if (ret)
536 return ret;
537
c9fc5aff
LW
538 if (gc->init_valid_mask)
539 return gc->init_valid_mask(gc,
540 gc->valid_mask,
541 gc->ngpio);
f8ec92a9
RRD
542
543 return 0;
544}
545
a0b66a73 546static void gpiochip_free_valid_mask(struct gpio_chip *gc)
726cb3ba 547{
05a854c5 548 gpiochip_free_mask(&gc->valid_mask);
726cb3ba
SB
549}
550
b056ca1c
AS
551static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
552{
c40aa80d
AS
553 /*
554 * Device Tree platforms are supposed to use "gpio-ranges"
555 * property. This check ensures that the ->add_pin_ranges()
556 * won't be called for them.
557 */
558 if (device_property_present(&gc->gpiodev->dev, "gpio-ranges"))
559 return 0;
560
b056ca1c
AS
561 if (gc->add_pin_ranges)
562 return gc->add_pin_ranges(gc);
563
564 return 0;
565}
566
a0b66a73 567bool gpiochip_line_is_valid(const struct gpio_chip *gc,
726cb3ba
SB
568 unsigned int offset)
569{
570 /* No mask means all valid */
a0b66a73 571 if (likely(!gc->valid_mask))
726cb3ba 572 return true;
a0b66a73 573 return test_bit(offset, gc->valid_mask);
726cb3ba
SB
574}
575EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
576
7aa90f90 577static void gpiodev_release(struct device *dev)
ff2b1359 578{
3b7c7478 579 struct gpio_device *gdev = to_gpio_device(dev);
cf25ef6b 580 unsigned long flags;
ff2b1359 581
cf25ef6b 582 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 583 list_del(&gdev->list);
cf25ef6b
JH
584 spin_unlock_irqrestore(&gpio_lock, flags);
585
8d4a85b6 586 ida_free(&gpio_ida, gdev->id);
fcf273e5 587 kfree_const(gdev->label);
476e2fc5 588 kfree(gdev->descs);
9efd9e69 589 kfree(gdev);
ff2b1359
LW
590}
591
1f5eb8b1
KG
592#ifdef CONFIG_GPIO_CDEV
593#define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt))
594#define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev))
595#else
596/*
597 * gpiolib_cdev_register() indirectly calls device_add(), which is still
598 * required even when cdev is not selected.
599 */
600#define gcdev_register(gdev, devt) device_add(&(gdev)->dev)
601#define gcdev_unregister(gdev) device_del(&(gdev)->dev)
602#endif
603
159f3cd9
GR
604static int gpiochip_setup_dev(struct gpio_device *gdev)
605{
67f64d15 606 struct fwnode_handle *fwnode = dev_fwnode(&gdev->dev);
d377f56f 607 int ret;
159f3cd9 608
38dfa56b
SK
609 /*
610 * If fwnode doesn't belong to another device, it's safe to clear its
611 * initialized flag.
612 */
67f64d15
AS
613 if (fwnode && !fwnode->dev)
614 fwnode_dev_initialized(fwnode, false);
38dfa56b 615
1f5eb8b1 616 ret = gcdev_register(gdev, gpio_devt);
d377f56f
LW
617 if (ret)
618 return ret;
111379dc 619
ec851b23 620 /* From this point, the .release() function cleans up gpio_device */
7aa90f90 621 gdev->dev.release = gpiodev_release;
ec851b23 622
d377f56f
LW
623 ret = gpiochip_sysfs_register(gdev);
624 if (ret)
159f3cd9
GR
625 goto err_remove_device;
626
262b9011
GU
627 dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base,
628 gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic");
159f3cd9
GR
629
630 return 0;
631
632err_remove_device:
1f5eb8b1 633 gcdev_unregister(gdev);
d377f56f 634 return ret;
159f3cd9
GR
635}
636
a0b66a73 637static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog)
a411e81e
BG
638{
639 struct gpio_desc *desc;
640 int rv;
641
a0b66a73 642 desc = gpiochip_get_desc(gc, hog->chip_hwnum);
a411e81e 643 if (IS_ERR(desc)) {
262b9011
GU
644 chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__,
645 PTR_ERR(desc));
a411e81e
BG
646 return;
647 }
648
ba3efdff 649 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
a411e81e
BG
650 return;
651
652 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
653 if (rv)
262b9011
GU
654 gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n",
655 __func__, gc->label, hog->chip_hwnum, rv);
a411e81e
BG
656}
657
a0b66a73 658static void machine_gpiochip_add(struct gpio_chip *gc)
a411e81e
BG
659{
660 struct gpiod_hog *hog;
661
662 mutex_lock(&gpio_machine_hogs_mutex);
663
664 list_for_each_entry(hog, &gpio_machine_hogs, list) {
a0b66a73
LW
665 if (!strcmp(gc->label, hog->chip_label))
666 gpiochip_machine_hog(gc, hog);
a411e81e
BG
667 }
668
669 mutex_unlock(&gpio_machine_hogs_mutex);
670}
671
159f3cd9
GR
672static void gpiochip_setup_devs(void)
673{
674 struct gpio_device *gdev;
d377f56f 675 int ret;
159f3cd9
GR
676
677 list_for_each_entry(gdev, &gpio_devices, list) {
d377f56f
LW
678 ret = gpiochip_setup_dev(gdev);
679 if (ret)
262b9011
GU
680 dev_err(&gdev->dev,
681 "Failed to initialize gpio device (%d)\n", ret);
159f3cd9
GR
682 }
683}
684
7b59bdbc
AS
685static void gpiochip_set_data(struct gpio_chip *gc, void *data)
686{
687 gc->gpiodev->data = data;
688}
689
8deb779d
AS
690/**
691 * gpiochip_get_data() - get per-subdriver data for the chip
692 * @gc: GPIO chip
693 *
694 * Returns:
695 * The per-subdriver data for the chip.
696 */
697void *gpiochip_get_data(struct gpio_chip *gc)
698{
699 return gc->gpiodev->data;
700}
701EXPORT_SYMBOL_GPL(gpiochip_get_data);
702
a0b66a73 703int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
39c3fd58
AL
704 struct lock_class_key *lock_key,
705 struct lock_class_key *request_key)
d2876d08 706{
ff2b1359 707 struct gpio_device *gdev;
e5ab49cd 708 unsigned long flags;
e5ab49cd 709 unsigned int i;
ec851b23
ZH
710 u32 ngpios = 0;
711 int base = 0;
e5ab49cd 712 int ret = 0;
d2876d08 713
ff2b1359
LW
714 /*
715 * First: allocate and populate the internal stat container, and
716 * set up the struct device.
717 */
969f07b4 718 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
ff2b1359 719 if (!gdev)
14e85c0e 720 return -ENOMEM;
3c702e99 721 gdev->dev.bus = &gpio_bus_type;
1df62542 722 gdev->dev.parent = gc->parent;
a0b66a73 723 gdev->chip = gc;
7b59bdbc 724
a0b66a73 725 gc->gpiodev = gdev;
7b59bdbc 726 gpiochip_set_data(gc, data);
acc6e331 727
daecca4b
AS
728 /*
729 * If the calling driver did not initialize firmware node,
730 * do it here using the parent device, if any.
731 */
732 if (gc->fwnode)
733 device_set_node(&gdev->dev, gc->fwnode);
734 else if (gc->parent)
735 device_set_node(&gdev->dev, dev_fwnode(gc->parent));
6cb59afe 736
8d4a85b6 737 gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL);
ff2b1359 738 if (gdev->id < 0) {
d377f56f 739 ret = gdev->id;
ff2b1359
LW
740 goto err_free_gdev;
741 }
c351bb64
QW
742
743 ret = dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id);
744 if (ret)
745 goto err_free_ida;
746
ff2b1359 747 device_initialize(&gdev->dev);
a0b66a73
LW
748 if (gc->parent && gc->parent->driver)
749 gdev->owner = gc->parent->driver->owner;
750 else if (gc->owner)
ff2b1359 751 /* TODO: remove chip->owner */
a0b66a73 752 gdev->owner = gc->owner;
ff2b1359
LW
753 else
754 gdev->owner = THIS_MODULE;
d2876d08 755
9dbd1ab2
BG
756 /*
757 * Try the device properties if the driver didn't supply the number
758 * of GPIO lines.
759 */
ec851b23
ZH
760 ngpios = gc->ngpio;
761 if (ngpios == 0) {
9dbd1ab2
BG
762 ret = device_property_read_u32(&gdev->dev, "ngpios", &ngpios);
763 if (ret == -ENODATA)
764 /*
765 * -ENODATA means that there is no property found and
766 * we want to issue the error message to the user.
767 * Besides that, we want to return different error code
768 * to state that supplied value is not valid.
769 */
770 ngpios = 0;
771 else if (ret)
ec851b23 772 goto err_free_dev_name;
9dbd1ab2
BG
773
774 gc->ngpio = ngpios;
775 }
776
a0b66a73
LW
777 if (gc->ngpio == 0) {
778 chip_err(gc, "tried to insert a GPIO chip with zero lines\n");
d377f56f 779 ret = -EINVAL;
ec851b23 780 goto err_free_dev_name;
5ed41cc4 781 }
df4878e9 782
a0b66a73
LW
783 if (gc->ngpio > FASTPATH_NGPIO)
784 chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n",
785 gc->ngpio, FASTPATH_NGPIO);
3027743f 786
ec851b23
ZH
787 gdev->descs = kcalloc(gc->ngpio, sizeof(*gdev->descs), GFP_KERNEL);
788 if (!gdev->descs) {
789 ret = -ENOMEM;
790 goto err_free_dev_name;
791 }
792
a0b66a73 793 gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL);
df4878e9 794 if (!gdev->label) {
d377f56f 795 ret = -ENOMEM;
476e2fc5 796 goto err_free_descs;
df4878e9
LW
797 }
798
a0b66a73 799 gdev->ngpio = gc->ngpio;
5ed41cc4 800
d2876d08
DB
801 spin_lock_irqsave(&gpio_lock, flags);
802
fdeb8e15
LW
803 /*
804 * TODO: this allocates a Linux GPIO number base in the global
805 * GPIO numberspace for this chip. In the long run we want to
806 * get *rid* of this numberspace and use only descriptors, but
807 * it may be a pipe dream. It will not happen before we get rid
808 * of the sysfs interface anyways.
809 */
ec851b23 810 base = gc->base;
8d0aab2f 811 if (base < 0) {
a0b66a73 812 base = gpiochip_find_base(gc->ngpio);
8d0aab2f 813 if (base < 0) {
225fce83 814 spin_unlock_irqrestore(&gpio_lock, flags);
ec851b23
ZH
815 ret = base;
816 base = 0;
476e2fc5 817 goto err_free_label;
8d0aab2f 818 }
fdeb8e15
LW
819 /*
820 * TODO: it should not be necessary to reflect the assigned
821 * base outside of the GPIO subsystem. Go over drivers and
822 * see if anyone makes use of this, else drop this and assign
823 * a poison instead.
824 */
a0b66a73 825 gc->base = base;
502df79b
CL
826 } else {
827 dev_warn(&gdev->dev,
828 "Static allocation of GPIO base is deprecated, use dynamic allocation.\n");
8d0aab2f 829 }
fdeb8e15 830 gdev->base = base;
8d0aab2f 831
d377f56f
LW
832 ret = gpiodev_add_to_list(gdev);
833 if (ret) {
05aa5203 834 spin_unlock_irqrestore(&gpio_lock, flags);
24a9dbb1 835 chip_err(gc, "GPIO integer space overlap, cannot add chip\n");
476e2fc5 836 goto err_free_label;
05aa5203 837 }
1a989d0f 838
a0b66a73 839 for (i = 0; i < gc->ngpio; i++)
767cd17a 840 gdev->descs[i].gdev = gdev;
14e85c0e 841
207270dd
DC
842 spin_unlock_irqrestore(&gpio_lock, flags);
843
6accc376 844 BLOCKING_INIT_NOTIFIER_HEAD(&gdev->notifier);
bdbbae24 845 init_rwsem(&gdev->sem);
51c1064e 846
f23f1516 847#ifdef CONFIG_PINCTRL
20ec3e39 848 INIT_LIST_HEAD(&gdev->pin_ranges);
f23f1516
SH
849#endif
850
c73960bb 851 if (gc->names) {
7cba1a4d 852 ret = gpiochip_set_desc_names(gc);
c73960bb
PR
853 if (ret)
854 goto err_remove_from_list;
855 }
0c5ebb4c 856 ret = gpiochip_set_names(gc);
d377f56f 857 if (ret)
5f3ca732
MP
858 goto err_remove_from_list;
859
1a55fc40 860 ret = gpiochip_init_valid_mask(gc);
d377f56f 861 if (ret)
48057ed1 862 goto err_remove_from_list;
e0d89728 863
a0b66a73 864 ret = of_gpiochip_add(gc);
d377f56f 865 if (ret)
48057ed1 866 goto err_free_gpiochip_mask;
28355f81 867
a0b66a73 868 for (i = 0; i < gc->ngpio; i++) {
3edfb7bd
RRD
869 struct gpio_desc *desc = &gdev->descs[i];
870
a0b66a73 871 if (gc->get_direction && gpiochip_line_is_valid(gc, i)) {
4fc5bfeb 872 assign_bit(FLAG_IS_OUT,
a0b66a73 873 &desc->flags, !gc->get_direction(gc, i));
d95da993 874 } else {
4fc5bfeb 875 assign_bit(FLAG_IS_OUT,
a0b66a73 876 &desc->flags, !gc->direction_input);
d95da993 877 }
3edfb7bd
RRD
878 }
879
a0b66a73 880 ret = gpiochip_add_pin_ranges(gc);
b056ca1c
AS
881 if (ret)
882 goto err_remove_of_chip;
883
a0b66a73 884 acpi_gpiochip_add(gc);
391c970c 885
a0b66a73 886 machine_gpiochip_add(gc);
a411e81e 887
a0b66a73 888 ret = gpiochip_irqchip_init_valid_mask(gc);
9411e3aa
AS
889 if (ret)
890 goto err_remove_acpi_chip;
891
a0b66a73 892 ret = gpiochip_irqchip_init_hw(gc);
fbdf8d4b 893 if (ret)
48057ed1
LW
894 goto err_remove_acpi_chip;
895
a0b66a73 896 ret = gpiochip_add_irqchip(gc, lock_key, request_key);
fbdf8d4b 897 if (ret)
48057ed1
LW
898 goto err_remove_irqchip_mask;
899
3c702e99
LW
900 /*
901 * By first adding the chardev, and then adding the device,
902 * we get a device node entry in sysfs under
903 * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
904 * coldplug of device nodes and other udev business.
159f3cd9
GR
905 * We can do this only if gpiolib has been initialized.
906 * Otherwise, defer until later.
3c702e99 907 */
159f3cd9 908 if (gpiolib_initialized) {
d377f56f
LW
909 ret = gpiochip_setup_dev(gdev);
910 if (ret)
48057ed1 911 goto err_remove_irqchip;
159f3cd9 912 }
cedb1881 913 return 0;
3bae4811 914
48057ed1 915err_remove_irqchip:
a0b66a73 916 gpiochip_irqchip_remove(gc);
48057ed1 917err_remove_irqchip_mask:
a0b66a73 918 gpiochip_irqchip_free_valid_mask(gc);
35779890 919err_remove_acpi_chip:
a0b66a73 920 acpi_gpiochip_remove(gc);
35779890 921err_remove_of_chip:
a0b66a73
LW
922 gpiochip_free_hogs(gc);
923 of_gpiochip_remove(gc);
35779890 924err_free_gpiochip_mask:
a0b66a73
LW
925 gpiochip_remove_pin_ranges(gc);
926 gpiochip_free_valid_mask(gc);
ec851b23
ZH
927 if (gdev->dev.release) {
928 /* release() has been registered by gpiochip_setup_dev() */
dc0989e3 929 gpio_device_put(gdev);
ec851b23
ZH
930 goto err_print_message;
931 }
5f3ca732 932err_remove_from_list:
225fce83 933 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 934 list_del(&gdev->list);
3bae4811 935 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 936err_free_label:
fcf273e5 937 kfree_const(gdev->label);
476e2fc5
GR
938err_free_descs:
939 kfree(gdev->descs);
c351bb64
QW
940err_free_dev_name:
941 kfree(dev_name(&gdev->dev));
a05a1404 942err_free_ida:
8d4a85b6 943 ida_free(&gpio_ida, gdev->id);
a05a1404 944err_free_gdev:
ec851b23
ZH
945 kfree(gdev);
946err_print_message:
d2876d08 947 /* failures here can mean systems won't boot... */
3cc1fb73
GS
948 if (ret != -EPROBE_DEFER) {
949 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
ec851b23 950 base, base + (int)ngpios - 1,
3cc1fb73
GS
951 gc->label ? : "generic", ret);
952 }
d377f56f 953 return ret;
d2876d08 954}
959bc7b2 955EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
d2876d08
DB
956
957/**
958 * gpiochip_remove() - unregister a gpio_chip
a0b66a73 959 * @gc: the chip to unregister
d2876d08
DB
960 *
961 * A gpio_chip with any GPIOs still requested may not be removed.
962 */
a0b66a73 963void gpiochip_remove(struct gpio_chip *gc)
d2876d08 964{
a0b66a73 965 struct gpio_device *gdev = gc->gpiodev;
d2876d08 966 unsigned long flags;
869233f8 967 unsigned int i;
d2876d08 968
bdbbae24
BG
969 down_write(&gdev->sem);
970
ff2b1359 971 /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
afbc4f31 972 gpiochip_sysfs_unregister(gdev);
a0b66a73 973 gpiochip_free_hogs(gc);
bd203bd5
BJZ
974 /* Numb the device, cancelling all outstanding operations */
975 gdev->chip = NULL;
a0b66a73
LW
976 gpiochip_irqchip_remove(gc);
977 acpi_gpiochip_remove(gc);
978 of_gpiochip_remove(gc);
979 gpiochip_remove_pin_ranges(gc);
980 gpiochip_free_valid_mask(gc);
43c54eca
LW
981 /*
982 * We accept no more calls into the driver from this point, so
7b59bdbc 983 * NULL the driver data pointer.
43c54eca 984 */
7b59bdbc 985 gpiochip_set_data(gc, NULL);
391c970c 986
6798acaa 987 spin_lock_irqsave(&gpio_lock, flags);
fdeb8e15 988 for (i = 0; i < gdev->ngpio; i++) {
a0b66a73 989 if (gpiochip_is_requested(gc, i))
869233f8 990 break;
d2876d08 991 }
d2876d08 992 spin_unlock_irqrestore(&gpio_lock, flags);
14e85c0e 993
ca18a852 994 if (i != gdev->ngpio)
fdeb8e15 995 dev_crit(&gdev->dev,
58383c78 996 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
fab28b89 997
ff2b1359
LW
998 /*
999 * The gpiochip side puts its use of the device to rest here:
1000 * if there are no userspace clients, the chardev and device will
1001 * be removed, else it will be dangling until the last user is
1002 * gone.
1003 */
1f5eb8b1 1004 gcdev_unregister(gdev);
bdbbae24 1005 up_write(&gdev->sem);
dc0989e3 1006 gpio_device_put(gdev);
d2876d08
DB
1007}
1008EXPORT_SYMBOL_GPL(gpiochip_remove);
1009
594fa265
GL
1010/**
1011 * gpiochip_find() - iterator for locating a specific gpio_chip
1012 * @data: data to pass to match function
950d55f5 1013 * @match: Callback function to check gpio_chip
594fa265
GL
1014 *
1015 * Similar to bus_find_device. It returns a reference to a gpio_chip as
1016 * determined by a user supplied @match callback. The callback should return
1017 * 0 if the device doesn't match and non-zero if it does. If the callback is
1018 * non-zero, this function will return to the caller and not iterate over any
1019 * more gpio_chips.
1020 */
07ce8ec7 1021struct gpio_chip *gpiochip_find(void *data,
a0b66a73 1022 int (*match)(struct gpio_chip *gc,
3d0f7cf0 1023 void *data))
594fa265 1024{
ff2b1359 1025 struct gpio_device *gdev;
a0b66a73 1026 struct gpio_chip *gc = NULL;
594fa265 1027 unsigned long flags;
594fa265
GL
1028
1029 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1030 list_for_each_entry(gdev, &gpio_devices, list)
acf06ff7 1031 if (gdev->chip && match(gdev->chip, data)) {
a0b66a73 1032 gc = gdev->chip;
594fa265 1033 break;
acf06ff7 1034 }
ff2b1359 1035
594fa265
GL
1036 spin_unlock_irqrestore(&gpio_lock, flags);
1037
a0b66a73 1038 return gc;
594fa265 1039}
8fa0c9bf 1040EXPORT_SYMBOL_GPL(gpiochip_find);
d2876d08 1041
a0b66a73 1042static int gpiochip_match_name(struct gpio_chip *gc, void *data)
79697ef9
AC
1043{
1044 const char *name = data;
1045
a0b66a73 1046 return !strcmp(gc->label, name);
79697ef9
AC
1047}
1048
1049static struct gpio_chip *find_chip_by_name(const char *name)
1050{
1051 return gpiochip_find((void *)name, gpiochip_match_name);
1052}
1053
14250520
LW
1054#ifdef CONFIG_GPIOLIB_IRQCHIP
1055
1056/*
1057 * The following is irqchip helper code for gpiochips.
1058 */
1059
9411e3aa
AS
1060static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
1061{
1062 struct gpio_irq_chip *girq = &gc->irq;
1063
1064 if (!girq->init_hw)
1065 return 0;
1066
1067 return girq->init_hw(gc);
1068}
1069
5fbe5b58 1070static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb 1071{
5fbe5b58
LW
1072 struct gpio_irq_chip *girq = &gc->irq;
1073
1074 if (!girq->init_valid_mask)
79b804cb
MW
1075 return 0;
1076
5fbe5b58
LW
1077 girq->valid_mask = gpiochip_allocate_mask(gc);
1078 if (!girq->valid_mask)
79b804cb
MW
1079 return -ENOMEM;
1080
5fbe5b58
LW
1081 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
1082
79b804cb
MW
1083 return 0;
1084}
1085
a0b66a73 1086static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 1087{
05a854c5 1088 gpiochip_free_mask(&gc->irq.valid_mask);
79b804cb
MW
1089}
1090
a0b66a73 1091bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc,
64ff2c8e 1092 unsigned int offset)
79b804cb 1093{
a0b66a73 1094 if (!gpiochip_line_is_valid(gc, offset))
726cb3ba 1095 return false;
79b804cb 1096 /* No mask means all valid */
a0b66a73 1097 if (likely(!gc->irq.valid_mask))
79b804cb 1098 return true;
a0b66a73 1099 return test_bit(offset, gc->irq.valid_mask);
79b804cb 1100}
64ff2c8e 1101EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
79b804cb 1102
fdd61a01
LW
1103#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1104
1105/**
1106 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
1107 * to a gpiochip
1108 * @gc: the gpiochip to set the irqchip hierarchical handler to
1109 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
1110 * will then percolate up to the parent
1111 */
1112static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
1113 struct irq_chip *irqchip)
1114{
1115 /* DT will deal with mapping each IRQ as we go along */
1116 if (is_of_node(gc->irq.fwnode))
1117 return;
1118
1119 /*
1120 * This is for legacy and boardfile "irqchip" fwnodes: allocate
1121 * irqs upfront instead of dynamically since we don't have the
1122 * dynamic type of allocation that hardware description languages
1123 * provide. Once all GPIO drivers using board files are gone from
1124 * the kernel we can delete this code, but for a transitional period
1125 * it is necessary to keep this around.
1126 */
1127 if (is_fwnode_irqchip(gc->irq.fwnode)) {
1128 int i;
1129 int ret;
1130
1131 for (i = 0; i < gc->ngpio; i++) {
1132 struct irq_fwspec fwspec;
1133 unsigned int parent_hwirq;
1134 unsigned int parent_type;
1135 struct gpio_irq_chip *girq = &gc->irq;
1136
1137 /*
1138 * We call the child to parent translation function
1139 * only to check if the child IRQ is valid or not.
1140 * Just pick the rising edge type here as that is what
1141 * we likely need to support.
1142 */
1143 ret = girq->child_to_parent_hwirq(gc, i,
1144 IRQ_TYPE_EDGE_RISING,
1145 &parent_hwirq,
1146 &parent_type);
1147 if (ret) {
1148 chip_err(gc, "skip set-up on hwirq %d\n",
1149 i);
1150 continue;
1151 }
1152
1153 fwspec.fwnode = gc->irq.fwnode;
1154 /* This is the hwirq for the GPIO line side of things */
1155 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
1156 /* Just pick something */
1157 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
1158 fwspec.param_count = 2;
908334ab
JH
1159 ret = irq_domain_alloc_irqs(gc->irq.domain, 1,
1160 NUMA_NO_NODE, &fwspec);
fdd61a01
LW
1161 if (ret < 0) {
1162 chip_err(gc,
1163 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1164 i, parent_hwirq,
1165 ret);
1166 }
1167 }
1168 }
1169
1170 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1171
1172 return;
1173}
1174
1175static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1176 struct irq_fwspec *fwspec,
1177 unsigned long *hwirq,
1178 unsigned int *type)
1179{
1180 /* We support standard DT translation */
1181 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1182 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1183 }
1184
1185 /* This is for board files and others not using DT */
1186 if (is_fwnode_irqchip(fwspec->fwnode)) {
1187 int ret;
1188
1189 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1190 if (ret)
1191 return ret;
1192 WARN_ON(*type == IRQ_TYPE_NONE);
1193 return 0;
1194 }
1195 return -EINVAL;
1196}
1197
1198static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1199 unsigned int irq,
1200 unsigned int nr_irqs,
1201 void *data)
1202{
1203 struct gpio_chip *gc = d->host_data;
1204 irq_hw_number_t hwirq;
1205 unsigned int type = IRQ_TYPE_NONE;
1206 struct irq_fwspec *fwspec = data;
91a29af4 1207 union gpio_irq_fwspec gpio_parent_fwspec = {};
fdd61a01
LW
1208 unsigned int parent_hwirq;
1209 unsigned int parent_type;
1210 struct gpio_irq_chip *girq = &gc->irq;
1211 int ret;
1212
1213 /*
1214 * The nr_irqs parameter is always one except for PCI multi-MSI
1215 * so this should not happen.
1216 */
1217 WARN_ON(nr_irqs != 1);
1218
1219 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
1220 if (ret)
1221 return ret;
1222
db4064cc 1223 chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
fdd61a01
LW
1224
1225 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
1226 &parent_hwirq, &parent_type);
1227 if (ret) {
1228 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
1229 return ret;
1230 }
366950ee 1231 chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq);
fdd61a01
LW
1232
1233 /*
1234 * We set handle_bad_irq because the .set_type() should
1235 * always be invoked and set the right type of handler.
1236 */
1237 irq_domain_set_info(d,
1238 irq,
1239 hwirq,
1240 gc->irq.chip,
1241 gc,
1242 girq->handler,
1243 NULL, NULL);
1244 irq_set_probe(irq);
1245
fdd61a01 1246 /* This parent only handles asserted level IRQs */
91a29af4
MZ
1247 ret = girq->populate_parent_alloc_arg(gc, &gpio_parent_fwspec,
1248 parent_hwirq, parent_type);
1249 if (ret)
1250 return ret;
24258761 1251
366950ee 1252 chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
fdd61a01 1253 irq, parent_hwirq);
c34f6dc8 1254 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
91a29af4 1255 ret = irq_domain_alloc_irqs_parent(d, irq, 1, &gpio_parent_fwspec);
880b7cf2
KH
1256 /*
1257 * If the parent irqdomain is msi, the interrupts have already
1258 * been allocated, so the EEXIST is good.
1259 */
1260 if (irq_domain_is_msi(d->parent) && (ret == -EEXIST))
1261 ret = 0;
fdd61a01
LW
1262 if (ret)
1263 chip_err(gc,
1264 "failed to allocate parent hwirq %d for hwirq %lu\n",
1265 parent_hwirq, hwirq);
1266
1267 return ret;
1268}
1269
a0b66a73 1270static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc,
fdd61a01
LW
1271 unsigned int offset)
1272{
1273 return offset;
1274}
1275
1276static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
1277{
1278 ops->activate = gpiochip_irq_domain_activate;
1279 ops->deactivate = gpiochip_irq_domain_deactivate;
1280 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
fdd61a01
LW
1281
1282 /*
08f12b45 1283 * We only allow overriding the translate() and free() functions for
fdd61a01 1284 * hierarchical chips, and this should only be done if the user
08f12b45
LP
1285 * really need something other than 1:1 translation for translate()
1286 * callback and free if user wants to free up any resources which
1287 * were allocated during callbacks, for example populate_parent_alloc_arg.
fdd61a01
LW
1288 */
1289 if (!ops->translate)
1290 ops->translate = gpiochip_hierarchy_irq_domain_translate;
08f12b45
LP
1291 if (!ops->free)
1292 ops->free = irq_domain_free_irqs_common;
fdd61a01
LW
1293}
1294
b683b487 1295static struct irq_domain *gpiochip_hierarchy_create_domain(struct gpio_chip *gc)
fdd61a01 1296{
b683b487
AS
1297 struct irq_domain *domain;
1298
fdd61a01
LW
1299 if (!gc->irq.child_to_parent_hwirq ||
1300 !gc->irq.fwnode) {
1301 chip_err(gc, "missing irqdomain vital data\n");
b683b487 1302 return ERR_PTR(-EINVAL);
fdd61a01
LW
1303 }
1304
1305 if (!gc->irq.child_offset_to_irq)
1306 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
1307
24258761
KH
1308 if (!gc->irq.populate_parent_alloc_arg)
1309 gc->irq.populate_parent_alloc_arg =
fdd61a01
LW
1310 gpiochip_populate_parent_fwspec_twocell;
1311
1312 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
1313
b683b487 1314 domain = irq_domain_create_hierarchy(
fdd61a01
LW
1315 gc->irq.parent_domain,
1316 0,
1317 gc->ngpio,
1318 gc->irq.fwnode,
1319 &gc->irq.child_irq_domain_ops,
1320 gc);
1321
b683b487
AS
1322 if (!domain)
1323 return ERR_PTR(-ENOMEM);
fdd61a01
LW
1324
1325 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
1326
b683b487 1327 return domain;
fdd61a01
LW
1328}
1329
1330static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1331{
1332 return !!gc->irq.parent_domain;
1333}
1334
91a29af4
MZ
1335int gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc,
1336 union gpio_irq_fwspec *gfwspec,
1337 unsigned int parent_hwirq,
1338 unsigned int parent_type)
fdd61a01 1339{
91a29af4 1340 struct irq_fwspec *fwspec = &gfwspec->fwspec;
24258761 1341
a0b66a73 1342 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1343 fwspec->param_count = 2;
1344 fwspec->param[0] = parent_hwirq;
1345 fwspec->param[1] = parent_type;
24258761 1346
91a29af4 1347 return 0;
fdd61a01
LW
1348}
1349EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
1350
91a29af4
MZ
1351int gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc,
1352 union gpio_irq_fwspec *gfwspec,
1353 unsigned int parent_hwirq,
1354 unsigned int parent_type)
fdd61a01 1355{
91a29af4 1356 struct irq_fwspec *fwspec = &gfwspec->fwspec;
24258761 1357
a0b66a73 1358 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1359 fwspec->param_count = 4;
1360 fwspec->param[0] = 0;
1361 fwspec->param[1] = parent_hwirq;
1362 fwspec->param[2] = 0;
1363 fwspec->param[3] = parent_type;
24258761 1364
91a29af4 1365 return 0;
fdd61a01
LW
1366}
1367EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
1368
1369#else
1370
b683b487 1371static struct irq_domain *gpiochip_hierarchy_create_domain(struct gpio_chip *gc)
fdd61a01 1372{
b683b487 1373 return ERR_PTR(-EINVAL);
fdd61a01
LW
1374}
1375
1376static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1377{
1378 return false;
1379}
1380
1381#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
1382
14250520
LW
1383/**
1384 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
1385 * @d: the irqdomain used by this irqchip
1386 * @irq: the global irq number used by this GPIO irqchip irq
1387 * @hwirq: the local IRQ/GPIO line offset on this gpiochip
1388 *
1389 * This function will set up the mapping for a certain IRQ line on a
1390 * gpiochip by assigning the gpiochip as chip data, and using the irqchip
1391 * stored inside the gpiochip.
1392 */
db4064cc 1393int gpiochip_irq_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hwirq)
14250520 1394{
a0b66a73 1395 struct gpio_chip *gc = d->host_data;
d377f56f 1396 int ret = 0;
14250520 1397
a0b66a73 1398 if (!gpiochip_irqchip_irq_valid(gc, hwirq))
dc749a09
GS
1399 return -ENXIO;
1400
a0b66a73 1401 irq_set_chip_data(irq, gc);
a0a8bcf4
GS
1402 /*
1403 * This lock class tells lockdep that GPIO irqs are in a different
1404 * category than their parents, so it won't report false recursion.
1405 */
a0b66a73
LW
1406 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
1407 irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler);
d245b3f9 1408 /* Chips that use nested thread handlers have them marked */
a0b66a73 1409 if (gc->irq.threaded)
1c8732bb 1410 irq_set_nested_thread(irq, 1);
14250520 1411 irq_set_noprobe(irq);
23393d49 1412
a0b66a73
LW
1413 if (gc->irq.num_parents == 1)
1414 ret = irq_set_parent(irq, gc->irq.parents[0]);
1415 else if (gc->irq.map)
1416 ret = irq_set_parent(irq, gc->irq.map[hwirq]);
e0d89728 1417
d377f56f
LW
1418 if (ret < 0)
1419 return ret;
e0d89728 1420
1333b90f
LW
1421 /*
1422 * No set-up of the hardware will happen if IRQ_TYPE_NONE
1423 * is passed as default type.
1424 */
a0b66a73
LW
1425 if (gc->irq.default_type != IRQ_TYPE_NONE)
1426 irq_set_irq_type(irq, gc->irq.default_type);
14250520
LW
1427
1428 return 0;
1429}
1b95b4eb 1430EXPORT_SYMBOL_GPL(gpiochip_irq_map);
14250520 1431
1b95b4eb 1432void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
c3626fde 1433{
a0b66a73 1434 struct gpio_chip *gc = d->host_data;
1c8732bb 1435
a0b66a73 1436 if (gc->irq.threaded)
1c8732bb 1437 irq_set_nested_thread(irq, 0);
c3626fde
LW
1438 irq_set_chip_and_handler(irq, NULL, NULL);
1439 irq_set_chip_data(irq, NULL);
1440}
1b95b4eb 1441EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
c3626fde 1442
14250520
LW
1443static const struct irq_domain_ops gpiochip_domain_ops = {
1444 .map = gpiochip_irq_map,
c3626fde 1445 .unmap = gpiochip_irq_unmap,
14250520
LW
1446 /* Virtually all GPIO irqchips are twocell:ed */
1447 .xlate = irq_domain_xlate_twocell,
1448};
1449
1efc43de
AS
1450static struct irq_domain *gpiochip_simple_create_domain(struct gpio_chip *gc)
1451{
1452 struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev);
1453 struct irq_domain *domain;
1454
1455 domain = irq_domain_create_simple(fwnode, gc->ngpio, gc->irq.first,
1456 &gpiochip_domain_ops, gc);
1457 if (!domain)
1458 return ERR_PTR(-EINVAL);
1459
1460 return domain;
1461}
1462
fdd61a01
LW
1463/*
1464 * TODO: move these activate/deactivate in under the hierarchicial
1465 * irqchip implementation as static once SPMI and SSBI (all external
1466 * users) are phased over.
1467 */
ef74f70e
BM
1468/**
1469 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
1470 * @domain: The IRQ domain used by this IRQ chip
1471 * @data: Outermost irq_data associated with the IRQ
1472 * @reserve: If set, only reserve an interrupt vector instead of assigning one
1473 *
1474 * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
1475 * used as the activate function for the &struct irq_domain_ops. The host_data
1476 * for the IRQ domain must be the &struct gpio_chip.
1477 */
1478int gpiochip_irq_domain_activate(struct irq_domain *domain,
1479 struct irq_data *data, bool reserve)
1480{
a0b66a73 1481 struct gpio_chip *gc = domain->host_data;
db4064cc 1482 unsigned int hwirq = irqd_to_hwirq(data);
ef74f70e 1483
db4064cc 1484 return gpiochip_lock_as_irq(gc, hwirq);
ef74f70e
BM
1485}
1486EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
1487
1488/**
1489 * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
1490 * @domain: The IRQ domain used by this IRQ chip
1491 * @data: Outermost irq_data associated with the IRQ
1492 *
1493 * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
1494 * be used as the deactivate function for the &struct irq_domain_ops. The
1495 * host_data for the IRQ domain must be the &struct gpio_chip.
1496 */
1497void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
1498 struct irq_data *data)
1499{
a0b66a73 1500 struct gpio_chip *gc = domain->host_data;
db4064cc 1501 unsigned int hwirq = irqd_to_hwirq(data);
ef74f70e 1502
db4064cc 1503 return gpiochip_unlock_as_irq(gc, hwirq);
ef74f70e
BM
1504}
1505EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
1506
13daf489 1507static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset)
14250520 1508{
a0b66a73 1509 struct irq_domain *domain = gc->irq.domain;
fdd61a01 1510
5467801f
SP
1511#ifdef CONFIG_GPIOLIB_IRQCHIP
1512 /*
1513 * Avoid race condition with other code, which tries to lookup
1514 * an IRQ before the irqchip has been properly registered,
1515 * i.e. while gpiochip is still being brought up.
1516 */
1517 if (!gc->irq.initialized)
1518 return -EPROBE_DEFER;
1519#endif
1520
a0b66a73 1521 if (!gpiochip_irqchip_irq_valid(gc, offset))
4e6b8238 1522 return -ENXIO;
5b76e79c 1523
fdd61a01
LW
1524#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1525 if (irq_domain_is_hierarchy(domain)) {
1526 struct irq_fwspec spec;
1527
1528 spec.fwnode = domain->fwnode;
1529 spec.param_count = 2;
a0b66a73 1530 spec.param[0] = gc->irq.child_offset_to_irq(gc, offset);
fdd61a01
LW
1531 spec.param[1] = IRQ_TYPE_NONE;
1532
1533 return irq_create_fwspec_mapping(&spec);
1534 }
1535#endif
1536
1537 return irq_create_mapping(domain, offset);
14250520
LW
1538}
1539
704f0875 1540int gpiochip_irq_reqres(struct irq_data *d)
14250520 1541{
a0b66a73 1542 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1543 unsigned int hwirq = irqd_to_hwirq(d);
5b76e79c 1544
db4064cc 1545 return gpiochip_reqres_irq(gc, hwirq);
14250520 1546}
704f0875 1547EXPORT_SYMBOL(gpiochip_irq_reqres);
14250520 1548
704f0875 1549void gpiochip_irq_relres(struct irq_data *d)
14250520 1550{
a0b66a73 1551 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1552 unsigned int hwirq = irqd_to_hwirq(d);
14250520 1553
db4064cc 1554 gpiochip_relres_irq(gc, hwirq);
14250520 1555}
704f0875 1556EXPORT_SYMBOL(gpiochip_irq_relres);
14250520 1557
a8173820
MS
1558static void gpiochip_irq_mask(struct irq_data *d)
1559{
1560 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1561 unsigned int hwirq = irqd_to_hwirq(d);
a8173820
MS
1562
1563 if (gc->irq.irq_mask)
1564 gc->irq.irq_mask(d);
db4064cc 1565 gpiochip_disable_irq(gc, hwirq);
a8173820
MS
1566}
1567
1568static void gpiochip_irq_unmask(struct irq_data *d)
1569{
1570 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1571 unsigned int hwirq = irqd_to_hwirq(d);
a8173820 1572
db4064cc 1573 gpiochip_enable_irq(gc, hwirq);
a8173820
MS
1574 if (gc->irq.irq_unmask)
1575 gc->irq.irq_unmask(d);
1576}
1577
461c1a7d 1578static void gpiochip_irq_enable(struct irq_data *d)
14250520 1579{
a0b66a73 1580 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1581 unsigned int hwirq = irqd_to_hwirq(d);
e0d89728 1582
db4064cc 1583 gpiochip_enable_irq(gc, hwirq);
a8173820 1584 gc->irq.irq_enable(d);
461c1a7d
HV
1585}
1586
1587static void gpiochip_irq_disable(struct irq_data *d)
1588{
a0b66a73 1589 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
db4064cc 1590 unsigned int hwirq = irqd_to_hwirq(d);
461c1a7d 1591
a8173820 1592 gc->irq.irq_disable(d);
db4064cc 1593 gpiochip_disable_irq(gc, hwirq);
461c1a7d
HV
1594}
1595
a0b66a73 1596static void gpiochip_set_irq_hooks(struct gpio_chip *gc)
ca620f2d 1597{
a0b66a73 1598 struct irq_chip *irqchip = gc->irq.chip;
ca620f2d 1599
6c846d02
MZ
1600 if (irqchip->flags & IRQCHIP_IMMUTABLE)
1601 return;
1602
1603 chip_warn(gc, "not an immutable chip, please consider fixing it!\n");
1604
ca620f2d
HV
1605 if (!irqchip->irq_request_resources &&
1606 !irqchip->irq_release_resources) {
1607 irqchip->irq_request_resources = gpiochip_irq_reqres;
1608 irqchip->irq_release_resources = gpiochip_irq_relres;
1609 }
a0b66a73 1610 if (WARN_ON(gc->irq.irq_enable))
461c1a7d 1611 return;
171948ea 1612 /* Check if the irqchip already has this hook... */
9d552219
NS
1613 if (irqchip->irq_enable == gpiochip_irq_enable ||
1614 irqchip->irq_mask == gpiochip_irq_mask) {
171948ea
HV
1615 /*
1616 * ...and if so, give a gentle warning that this is bad
1617 * practice.
1618 */
a0b66a73 1619 chip_info(gc,
171948ea
HV
1620 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
1621 return;
1622 }
a8173820
MS
1623
1624 if (irqchip->irq_disable) {
1625 gc->irq.irq_disable = irqchip->irq_disable;
1626 irqchip->irq_disable = gpiochip_irq_disable;
1627 } else {
1628 gc->irq.irq_mask = irqchip->irq_mask;
1629 irqchip->irq_mask = gpiochip_irq_mask;
1630 }
1631
1632 if (irqchip->irq_enable) {
1633 gc->irq.irq_enable = irqchip->irq_enable;
1634 irqchip->irq_enable = gpiochip_irq_enable;
1635 } else {
1636 gc->irq.irq_unmask = irqchip->irq_unmask;
1637 irqchip->irq_unmask = gpiochip_irq_unmask;
1638 }
14250520
LW
1639}
1640
081bfdb3
AS
1641static int gpiochip_irqchip_add_allocated_domain(struct gpio_chip *gc,
1642 struct irq_domain *domain,
1643 bool allocated_externally)
1644{
1645 if (!domain)
1646 return -EINVAL;
1647
eec349db
AS
1648 if (gc->to_irq)
1649 chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__);
1650
081bfdb3
AS
1651 gc->to_irq = gpiochip_to_irq;
1652 gc->irq.domain = domain;
1653 gc->irq.domain_is_allocated_externally = allocated_externally;
1654
1655 /*
1656 * Using barrier() here to prevent compiler from reordering
1657 * gc->irq.initialized before adding irqdomain.
1658 */
1659 barrier();
1660
1661 gc->irq.initialized = true;
1662
1663 return 0;
1664}
1665
e0d89728
TR
1666/**
1667 * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
a0b66a73 1668 * @gc: the GPIO chip to add the IRQ chip to
39c3fd58
AL
1669 * @lock_key: lockdep class for IRQ lock
1670 * @request_key: lockdep class for IRQ request
e0d89728 1671 */
a0b66a73 1672static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1673 struct lock_class_key *lock_key,
1674 struct lock_class_key *request_key)
e0d89728 1675{
5c63a9db 1676 struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev);
a0b66a73 1677 struct irq_chip *irqchip = gc->irq.chip;
39f3ad73 1678 struct irq_domain *domain;
e0d89728
TR
1679 unsigned int type;
1680 unsigned int i;
eec349db 1681 int ret;
e0d89728
TR
1682
1683 if (!irqchip)
1684 return 0;
1685
a0b66a73
LW
1686 if (gc->irq.parent_handler && gc->can_sleep) {
1687 chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n");
e0d89728
TR
1688 return -EINVAL;
1689 }
1690
a0b66a73 1691 type = gc->irq.default_type;
e0d89728
TR
1692
1693 /*
1694 * Specifying a default trigger is a terrible idea if DT or ACPI is
1695 * used to configure the interrupts, as you may end up with
1696 * conflicting triggers. Tell the user, and reset to NONE.
1697 */
5c63a9db
AS
1698 if (WARN(fwnode && type != IRQ_TYPE_NONE,
1699 "%pfw: Ignoring %u default trigger\n", fwnode, type))
e0d89728
TR
1700 type = IRQ_TYPE_NONE;
1701
a0b66a73
LW
1702 gc->irq.default_type = type;
1703 gc->irq.lock_key = lock_key;
1704 gc->irq.request_key = request_key;
e0d89728 1705
fdd61a01 1706 /* If a parent irqdomain is provided, let's build a hierarchy */
a0b66a73 1707 if (gpiochip_hierarchy_is_hierarchical(gc)) {
39f3ad73 1708 domain = gpiochip_hierarchy_create_domain(gc);
fdd61a01 1709 } else {
39f3ad73 1710 domain = gpiochip_simple_create_domain(gc);
fdd61a01 1711 }
39f3ad73
AS
1712 if (IS_ERR(domain))
1713 return PTR_ERR(domain);
e0d89728 1714
a0b66a73 1715 if (gc->irq.parent_handler) {
a0b66a73 1716 for (i = 0; i < gc->irq.num_parents; i++) {
cfe6807d
MZ
1717 void *data;
1718
1719 if (gc->irq.per_parent_data)
1720 data = gc->irq.parent_handler_data_array[i];
1721 else
1722 data = gc->irq.parent_handler_data ?: gc;
1723
e0d89728
TR
1724 /*
1725 * The parent IRQ chip is already using the chip_data
1726 * for this IRQ chip, so our callbacks simply use the
1727 * handler_data.
1728 */
a0b66a73
LW
1729 irq_set_chained_handler_and_data(gc->irq.parents[i],
1730 gc->irq.parent_handler,
e0d89728
TR
1731 data);
1732 }
e0d89728
TR
1733 }
1734
a0b66a73 1735 gpiochip_set_irq_hooks(gc);
ca620f2d 1736
eec349db
AS
1737 ret = gpiochip_irqchip_add_allocated_domain(gc, domain, false);
1738 if (ret)
1739 return ret;
5467801f 1740
06fb4ecf
ML
1741 acpi_gpiochip_request_interrupts(gc);
1742
e0d89728
TR
1743 return 0;
1744}
1745
14250520
LW
1746/**
1747 * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
a0b66a73 1748 * @gc: the gpiochip to remove the irqchip from
14250520
LW
1749 *
1750 * This is called only from gpiochip_remove()
1751 */
a0b66a73 1752static void gpiochip_irqchip_remove(struct gpio_chip *gc)
14250520 1753{
a0b66a73 1754 struct irq_chip *irqchip = gc->irq.chip;
39e5f096 1755 unsigned int offset;
c3626fde 1756
a0b66a73 1757 acpi_gpiochip_free_interrupts(gc);
afa82fab 1758
a0b66a73
LW
1759 if (irqchip && gc->irq.parent_handler) {
1760 struct gpio_irq_chip *irq = &gc->irq;
39e5f096
TR
1761 unsigned int i;
1762
1763 for (i = 0; i < irq->num_parents; i++)
1764 irq_set_chained_handler_and_data(irq->parents[i],
1765 NULL, NULL);
25e4fe92
DES
1766 }
1767
c3626fde 1768 /* Remove all IRQ mappings and delete the domain */
ff7a1790 1769 if (!gc->irq.domain_is_allocated_externally && gc->irq.domain) {
39e5f096
TR
1770 unsigned int irq;
1771
a0b66a73
LW
1772 for (offset = 0; offset < gc->ngpio; offset++) {
1773 if (!gpiochip_irqchip_irq_valid(gc, offset))
79b804cb 1774 continue;
f0fbe7bc 1775
a0b66a73 1776 irq = irq_find_mapping(gc->irq.domain, offset);
f0fbe7bc 1777 irq_dispose_mapping(irq);
79b804cb 1778 }
f0fbe7bc 1779
a0b66a73 1780 irq_domain_remove(gc->irq.domain);
c3626fde 1781 }
14250520 1782
6c846d02 1783 if (irqchip && !(irqchip->flags & IRQCHIP_IMMUTABLE)) {
461c1a7d
HV
1784 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
1785 irqchip->irq_request_resources = NULL;
1786 irqchip->irq_release_resources = NULL;
1787 }
1788 if (irqchip->irq_enable == gpiochip_irq_enable) {
a0b66a73
LW
1789 irqchip->irq_enable = gc->irq.irq_enable;
1790 irqchip->irq_disable = gc->irq.irq_disable;
461c1a7d 1791 }
14250520 1792 }
a0b66a73
LW
1793 gc->irq.irq_enable = NULL;
1794 gc->irq.irq_disable = NULL;
1795 gc->irq.chip = NULL;
79b804cb 1796
a0b66a73 1797 gpiochip_irqchip_free_valid_mask(gc);
14250520
LW
1798}
1799
6a45b0e2
MW
1800/**
1801 * gpiochip_irqchip_add_domain() - adds an irqdomain to a gpiochip
1802 * @gc: the gpiochip to add the irqchip to
1803 * @domain: the irqdomain to add to the gpiochip
1804 *
1805 * This function adds an IRQ domain to the gpiochip.
1806 */
1807int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
1808 struct irq_domain *domain)
1809{
081bfdb3 1810 return gpiochip_irqchip_add_allocated_domain(gc, domain, true);
6a45b0e2
MW
1811}
1812EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain);
1813
14250520
LW
1814#else /* CONFIG_GPIOLIB_IRQCHIP */
1815
a0b66a73 1816static inline int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1817 struct lock_class_key *lock_key,
1818 struct lock_class_key *request_key)
e0d89728
TR
1819{
1820 return 0;
1821}
a0b66a73 1822static void gpiochip_irqchip_remove(struct gpio_chip *gc) {}
9411e3aa 1823
a0b66a73 1824static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
9411e3aa
AS
1825{
1826 return 0;
1827}
1828
a0b66a73 1829static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb
MW
1830{
1831 return 0;
1832}
a0b66a73 1833static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 1834{ }
14250520
LW
1835
1836#endif /* CONFIG_GPIOLIB_IRQCHIP */
1837
c771c2f4
JG
1838/**
1839 * gpiochip_generic_request() - request the gpio function for a pin
a0b66a73 1840 * @gc: the gpiochip owning the GPIO
c771c2f4
JG
1841 * @offset: the offset of the GPIO to request for GPIO function
1842 */
13daf489 1843int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset)
c771c2f4 1844{
56e337f2
BG
1845#ifdef CONFIG_PINCTRL
1846 if (list_empty(&gc->gpiodev->pin_ranges))
1847 return 0;
1848#endif
1849
a0b66a73 1850 return pinctrl_gpio_request(gc->gpiodev->base + offset);
c771c2f4
JG
1851}
1852EXPORT_SYMBOL_GPL(gpiochip_generic_request);
1853
1854/**
1855 * gpiochip_generic_free() - free the gpio function from a pin
a0b66a73 1856 * @gc: the gpiochip to request the gpio function for
c771c2f4
JG
1857 * @offset: the offset of the GPIO to free from GPIO function
1858 */
13daf489 1859void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset)
c771c2f4 1860{
56e337f2
BG
1861#ifdef CONFIG_PINCTRL
1862 if (list_empty(&gc->gpiodev->pin_ranges))
1863 return;
1864#endif
1865
a0b66a73 1866 pinctrl_gpio_free(gc->gpiodev->base + offset);
c771c2f4
JG
1867}
1868EXPORT_SYMBOL_GPL(gpiochip_generic_free);
1869
2956b5d9
MW
1870/**
1871 * gpiochip_generic_config() - apply configuration for a pin
a0b66a73 1872 * @gc: the gpiochip owning the GPIO
2956b5d9
MW
1873 * @offset: the offset of the GPIO to apply the configuration
1874 * @config: the configuration to be applied
1875 */
13daf489 1876int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset,
2956b5d9
MW
1877 unsigned long config)
1878{
a0b66a73 1879 return pinctrl_gpio_set_config(gc->gpiodev->base + offset, config);
2956b5d9
MW
1880}
1881EXPORT_SYMBOL_GPL(gpiochip_generic_config);
1882
f23f1516 1883#ifdef CONFIG_PINCTRL
165adc9c 1884
586a87e6
CR
1885/**
1886 * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
a0b66a73 1887 * @gc: the gpiochip to add the range for
d32651f6 1888 * @pctldev: the pin controller to map to
586a87e6
CR
1889 * @gpio_offset: the start offset in the current gpio_chip number space
1890 * @pin_group: name of the pin group inside the pin controller
973c1714
CL
1891 *
1892 * Calling this function directly from a DeviceTree-supported
1893 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
1894 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
1895 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
586a87e6 1896 */
a0b66a73 1897int gpiochip_add_pingroup_range(struct gpio_chip *gc,
586a87e6
CR
1898 struct pinctrl_dev *pctldev,
1899 unsigned int gpio_offset, const char *pin_group)
1900{
1901 struct gpio_pin_range *pin_range;
a0b66a73 1902 struct gpio_device *gdev = gc->gpiodev;
586a87e6
CR
1903 int ret;
1904
1905 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
1906 if (!pin_range) {
a0b66a73 1907 chip_err(gc, "failed to allocate pin ranges\n");
586a87e6
CR
1908 return -ENOMEM;
1909 }
1910
1911 /* Use local offset as range ID */
1912 pin_range->range.id = gpio_offset;
a0b66a73
LW
1913 pin_range->range.gc = gc;
1914 pin_range->range.name = gc->label;
fdeb8e15 1915 pin_range->range.base = gdev->base + gpio_offset;
586a87e6
CR
1916 pin_range->pctldev = pctldev;
1917
1918 ret = pinctrl_get_group_pins(pctldev, pin_group,
1919 &pin_range->range.pins,
1920 &pin_range->range.npins);
61c6375d
MN
1921 if (ret < 0) {
1922 kfree(pin_range);
586a87e6 1923 return ret;
61c6375d 1924 }
586a87e6
CR
1925
1926 pinctrl_add_gpio_range(pctldev, &pin_range->range);
1927
a0b66a73 1928 chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n",
1a2a99c6 1929 gpio_offset, gpio_offset + pin_range->range.npins - 1,
586a87e6
CR
1930 pinctrl_dev_get_devname(pctldev), pin_group);
1931
20ec3e39 1932 list_add_tail(&pin_range->node, &gdev->pin_ranges);
586a87e6
CR
1933
1934 return 0;
1935}
1936EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
1937
3f0f8670
LW
1938/**
1939 * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
a0b66a73 1940 * @gc: the gpiochip to add the range for
950d55f5 1941 * @pinctl_name: the dev_name() of the pin controller to map to
316511c0
LW
1942 * @gpio_offset: the start offset in the current gpio_chip number space
1943 * @pin_offset: the start offset in the pin controller number space
3f0f8670
LW
1944 * @npins: the number of pins from the offset of each pin space (GPIO and
1945 * pin controller) to accumulate in this range
950d55f5
TR
1946 *
1947 * Returns:
1948 * 0 on success, or a negative error-code on failure.
973c1714
CL
1949 *
1950 * Calling this function directly from a DeviceTree-supported
1951 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
1952 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
1953 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
3f0f8670 1954 */
a0b66a73 1955int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
316511c0 1956 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 1957 unsigned int npins)
f23f1516
SH
1958{
1959 struct gpio_pin_range *pin_range;
a0b66a73 1960 struct gpio_device *gdev = gc->gpiodev;
b4d4b1f0 1961 int ret;
f23f1516 1962
3f0f8670 1963 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
f23f1516 1964 if (!pin_range) {
a0b66a73 1965 chip_err(gc, "failed to allocate pin ranges\n");
1e63d7b9 1966 return -ENOMEM;
f23f1516
SH
1967 }
1968
3f0f8670 1969 /* Use local offset as range ID */
316511c0 1970 pin_range->range.id = gpio_offset;
a0b66a73
LW
1971 pin_range->range.gc = gc;
1972 pin_range->range.name = gc->label;
fdeb8e15 1973 pin_range->range.base = gdev->base + gpio_offset;
316511c0 1974 pin_range->range.pin_base = pin_offset;
f23f1516 1975 pin_range->range.npins = npins;
192c369c 1976 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
f23f1516 1977 &pin_range->range);
8f23ca1a 1978 if (IS_ERR(pin_range->pctldev)) {
b4d4b1f0 1979 ret = PTR_ERR(pin_range->pctldev);
a0b66a73 1980 chip_err(gc, "could not create pin range\n");
3f0f8670 1981 kfree(pin_range);
b4d4b1f0 1982 return ret;
3f0f8670 1983 }
a0b66a73 1984 chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
1a2a99c6 1985 gpio_offset, gpio_offset + npins - 1,
316511c0
LW
1986 pinctl_name,
1987 pin_offset, pin_offset + npins - 1);
f23f1516 1988
20ec3e39 1989 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1e63d7b9
LW
1990
1991 return 0;
f23f1516 1992}
165adc9c 1993EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
f23f1516 1994
3f0f8670
LW
1995/**
1996 * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
a0b66a73 1997 * @gc: the chip to remove all the mappings for
3f0f8670 1998 */
a0b66a73 1999void gpiochip_remove_pin_ranges(struct gpio_chip *gc)
f23f1516
SH
2000{
2001 struct gpio_pin_range *pin_range, *tmp;
a0b66a73 2002 struct gpio_device *gdev = gc->gpiodev;
f23f1516 2003
20ec3e39 2004 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
f23f1516
SH
2005 list_del(&pin_range->node);
2006 pinctrl_remove_gpio_range(pin_range->pctldev,
2007 &pin_range->range);
3f0f8670 2008 kfree(pin_range);
f23f1516
SH
2009 }
2010}
165adc9c
LW
2011EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
2012
2013#endif /* CONFIG_PINCTRL */
f23f1516 2014
d2876d08
DB
2015/* These "optional" allocation calls help prevent drivers from stomping
2016 * on each other, and help provide better diagnostics in debugfs.
2017 * They're called even less than the "set direction" calls.
2018 */
fac9d885 2019static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
d2876d08 2020{
a0b66a73 2021 struct gpio_chip *gc = desc->gdev->chip;
d377f56f 2022 int ret;
d2876d08 2023 unsigned long flags;
3789f5ac 2024 unsigned offset;
d2876d08 2025
18534df4
MS
2026 if (label) {
2027 label = kstrdup_const(label, GFP_KERNEL);
2028 if (!label)
2029 return -ENOMEM;
2030 }
2031
bcabdef1
AC
2032 spin_lock_irqsave(&gpio_lock, flags);
2033
d2876d08 2034 /* NOTE: gpio_request() can be called in early boot,
35e8bb51 2035 * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
d2876d08
DB
2036 */
2037
2038 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
2039 desc_set_label(desc, label ? : "?");
438d8908 2040 } else {
d377f56f 2041 ret = -EBUSY;
95d9f84f 2042 goto out_free_unlock;
35e8bb51
DB
2043 }
2044
a0b66a73
LW
2045 if (gc->request) {
2046 /* gc->request may sleep */
35e8bb51 2047 spin_unlock_irqrestore(&gpio_lock, flags);
3789f5ac 2048 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
2049 if (gpiochip_line_is_valid(gc, offset))
2050 ret = gc->request(gc, offset);
3789f5ac 2051 else
d377f56f 2052 ret = -EINVAL;
35e8bb51
DB
2053 spin_lock_irqsave(&gpio_lock, flags);
2054
8bbff39c 2055 if (ret) {
35e8bb51 2056 desc_set_label(desc, NULL);
35e8bb51 2057 clear_bit(FLAG_REQUESTED, &desc->flags);
95d9f84f 2058 goto out_free_unlock;
35e8bb51 2059 }
438d8908 2060 }
a0b66a73
LW
2061 if (gc->get_direction) {
2062 /* gc->get_direction may sleep */
80b0a602 2063 spin_unlock_irqrestore(&gpio_lock, flags);
372e722e 2064 gpiod_get_direction(desc);
80b0a602
MN
2065 spin_lock_irqsave(&gpio_lock, flags);
2066 }
77c2d792 2067 spin_unlock_irqrestore(&gpio_lock, flags);
95d9f84f
AS
2068 return 0;
2069
2070out_free_unlock:
2071 spin_unlock_irqrestore(&gpio_lock, flags);
2072 kfree_const(label);
d377f56f 2073 return ret;
77c2d792
MW
2074}
2075
fdeb8e15
LW
2076/*
2077 * This descriptor validation needs to be inserted verbatim into each
2078 * function taking a descriptor, so we need to use a preprocessor
54d77198
LW
2079 * macro to avoid endless duplication. If the desc is NULL it is an
2080 * optional GPIO and calls should just bail out.
fdeb8e15 2081 */
a746a232
RV
2082static int validate_desc(const struct gpio_desc *desc, const char *func)
2083{
2084 if (!desc)
2085 return 0;
2086 if (IS_ERR(desc)) {
2087 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
2088 return PTR_ERR(desc);
2089 }
2090 if (!desc->gdev) {
2091 pr_warn("%s: invalid GPIO (no device)\n", func);
2092 return -EINVAL;
2093 }
2094 if (!desc->gdev->chip) {
2095 dev_warn(&desc->gdev->dev,
2096 "%s: backing chip is gone\n", func);
2097 return 0;
2098 }
2099 return 1;
2100}
2101
fdeb8e15 2102#define VALIDATE_DESC(desc) do { \
a746a232
RV
2103 int __valid = validate_desc(desc, __func__); \
2104 if (__valid <= 0) \
2105 return __valid; \
2106 } while (0)
fdeb8e15
LW
2107
2108#define VALIDATE_DESC_VOID(desc) do { \
a746a232
RV
2109 int __valid = validate_desc(desc, __func__); \
2110 if (__valid <= 0) \
fdeb8e15 2111 return; \
a746a232 2112 } while (0)
fdeb8e15 2113
0eb4c6c2 2114int gpiod_request(struct gpio_desc *desc, const char *label)
77c2d792 2115{
d377f56f 2116 int ret = -EPROBE_DEFER;
77c2d792 2117
fdeb8e15 2118 VALIDATE_DESC(desc);
77c2d792 2119
dc0989e3 2120 if (try_module_get(desc->gdev->owner)) {
d377f56f 2121 ret = gpiod_request_commit(desc, label);
8bbff39c 2122 if (ret)
dc0989e3 2123 module_put(desc->gdev->owner);
33a68e86 2124 else
dc0989e3 2125 gpio_device_get(desc->gdev);
77c2d792
MW
2126 }
2127
d377f56f
LW
2128 if (ret)
2129 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
77c2d792 2130
d377f56f 2131 return ret;
d2876d08 2132}
372e722e 2133
fac9d885 2134static bool gpiod_free_commit(struct gpio_desc *desc)
d2876d08 2135{
77c2d792 2136 bool ret = false;
d2876d08 2137 unsigned long flags;
a0b66a73 2138 struct gpio_chip *gc;
d2876d08 2139
3d599d1c
UKK
2140 might_sleep();
2141
d2876d08
DB
2142 spin_lock_irqsave(&gpio_lock, flags);
2143
a0b66a73
LW
2144 gc = desc->gdev->chip;
2145 if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) {
2146 if (gc->free) {
35e8bb51 2147 spin_unlock_irqrestore(&gpio_lock, flags);
a0b66a73
LW
2148 might_sleep_if(gc->can_sleep);
2149 gc->free(gc, gpio_chip_hwgpio(desc));
35e8bb51
DB
2150 spin_lock_irqsave(&gpio_lock, flags);
2151 }
18534df4 2152 kfree_const(desc->label);
d2876d08 2153 desc_set_label(desc, NULL);
07697461 2154 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
35e8bb51 2155 clear_bit(FLAG_REQUESTED, &desc->flags);
aca5ce14 2156 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
25553ff0 2157 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
9225d516
DF
2158 clear_bit(FLAG_PULL_UP, &desc->flags);
2159 clear_bit(FLAG_PULL_DOWN, &desc->flags);
2148ad77 2160 clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
73e03419
KG
2161 clear_bit(FLAG_EDGE_RISING, &desc->flags);
2162 clear_bit(FLAG_EDGE_FALLING, &desc->flags);
f625d460 2163 clear_bit(FLAG_IS_HOGGED, &desc->flags);
63636d95
GU
2164#ifdef CONFIG_OF_DYNAMIC
2165 desc->hog = NULL;
65cff704
KG
2166#endif
2167#ifdef CONFIG_GPIO_CDEV
2168 WRITE_ONCE(desc->debounce_period_us, 0);
63636d95 2169#endif
77c2d792
MW
2170 ret = true;
2171 }
d2876d08
DB
2172
2173 spin_unlock_irqrestore(&gpio_lock, flags);
6accc376
KG
2174 blocking_notifier_call_chain(&desc->gdev->notifier,
2175 GPIOLINE_CHANGED_RELEASED, desc);
51c1064e 2176
77c2d792
MW
2177 return ret;
2178}
2179
0eb4c6c2 2180void gpiod_free(struct gpio_desc *desc)
77c2d792 2181{
fac9d885 2182 if (desc && desc->gdev && gpiod_free_commit(desc)) {
fdeb8e15 2183 module_put(desc->gdev->owner);
dc0989e3 2184 gpio_device_put(desc->gdev);
33a68e86 2185 } else {
77c2d792 2186 WARN_ON(extra_checks);
33a68e86 2187 }
d2876d08 2188}
372e722e 2189
d2876d08
DB
2190/**
2191 * gpiochip_is_requested - return string iff signal was requested
a0b66a73 2192 * @gc: controller managing the signal
d2876d08
DB
2193 * @offset: of signal within controller's 0..(ngpio - 1) range
2194 *
2195 * Returns NULL if the GPIO is not currently requested, else a string.
9c8318ff
AC
2196 * The string returned is the label passed to gpio_request(); if none has been
2197 * passed it is a meaningless, non-NULL constant.
d2876d08
DB
2198 *
2199 * This function is for use by GPIO controller drivers. The label can
2200 * help with diagnostics, and knowing that the signal is used as a GPIO
2201 * can help avoid accidentally multiplexing it to another controller.
2202 */
13daf489 2203const char *gpiochip_is_requested(struct gpio_chip *gc, unsigned int offset)
d2876d08 2204{
6c0b4e6c 2205 struct gpio_desc *desc;
6c0b4e6c 2206
a0b66a73 2207 desc = gpiochip_get_desc(gc, offset);
1739a2d8
BG
2208 if (IS_ERR(desc))
2209 return NULL;
6c0b4e6c 2210
372e722e 2211 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
d2876d08 2212 return NULL;
372e722e 2213 return desc->label;
d2876d08
DB
2214}
2215EXPORT_SYMBOL_GPL(gpiochip_is_requested);
2216
77c2d792
MW
2217/**
2218 * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
a0b66a73 2219 * @gc: GPIO chip
950d55f5 2220 * @hwnum: hardware number of the GPIO for which to request the descriptor
77c2d792 2221 * @label: label for the GPIO
5923ea6c
LW
2222 * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
2223 * specify things like line inversion semantics with the machine flags
2224 * such as GPIO_OUT_LOW
2225 * @dflags: descriptor request flags for this GPIO or 0 if default, this
2226 * can be used to specify consumer semantics such as open drain
77c2d792
MW
2227 *
2228 * Function allows GPIO chip drivers to request and use their own GPIO
2229 * descriptors via gpiolib API. Difference to gpiod_request() is that this
2230 * function will not increase reference count of the GPIO chip module. This
2231 * allows the GPIO chip module to be unloaded as needed (we assume that the
2232 * GPIO chip driver handles freeing the GPIOs it has requested).
950d55f5
TR
2233 *
2234 * Returns:
2235 * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
2236 * code on failure.
77c2d792 2237 */
a0b66a73 2238struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc,
06863620 2239 unsigned int hwnum,
21abf103 2240 const char *label,
5923ea6c
LW
2241 enum gpio_lookup_flags lflags,
2242 enum gpiod_flags dflags)
77c2d792 2243{
a0b66a73 2244 struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum);
d377f56f 2245 int ret;
77c2d792 2246
abdc08a3 2247 if (IS_ERR(desc)) {
a0b66a73 2248 chip_err(gc, "failed to get GPIO descriptor\n");
abdc08a3
AC
2249 return desc;
2250 }
2251
d377f56f
LW
2252 ret = gpiod_request_commit(desc, label);
2253 if (ret < 0)
2254 return ERR_PTR(ret);
77c2d792 2255
d377f56f
LW
2256 ret = gpiod_configure_flags(desc, label, lflags, dflags);
2257 if (ret) {
a0b66a73 2258 chip_err(gc, "setup of own GPIO %s failed\n", label);
21abf103 2259 gpiod_free_commit(desc);
d377f56f 2260 return ERR_PTR(ret);
21abf103
LW
2261 }
2262
abdc08a3 2263 return desc;
77c2d792 2264}
f7d4ad98 2265EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
77c2d792
MW
2266
2267/**
2268 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
2269 * @desc: GPIO descriptor to free
2270 *
2271 * Function frees the given GPIO requested previously with
2272 * gpiochip_request_own_desc().
2273 */
2274void gpiochip_free_own_desc(struct gpio_desc *desc)
2275{
2276 if (desc)
fac9d885 2277 gpiod_free_commit(desc);
77c2d792 2278}
f7d4ad98 2279EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
d2876d08 2280
fdeb8e15
LW
2281/*
2282 * Drivers MUST set GPIO direction before making get/set calls. In
d2876d08
DB
2283 * some cases this is done in early boot, before IRQs are enabled.
2284 *
2285 * As a rule these aren't called more than once (except for drivers
2286 * using the open-drain emulation idiom) so these are natural places
2287 * to accumulate extra debugging checks. Note that we can't (yet)
2288 * rely on gpio_request() having been called beforehand.
2289 */
2290
d99f8876 2291static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset,
62adc6f3 2292 unsigned long config)
71479789 2293{
d90f3685
BG
2294 if (!gc->set_config)
2295 return -ENOTSUPP;
542f3615 2296
62adc6f3 2297 return gc->set_config(gc, offset, config);
71479789
TP
2298}
2299
0c4d8666
AS
2300static int gpio_set_config_with_argument(struct gpio_desc *desc,
2301 enum pin_config_param mode,
2302 u32 argument)
d99f8876 2303{
a0b66a73 2304 struct gpio_chip *gc = desc->gdev->chip;
91b4ea5f 2305 unsigned long config;
0c4d8666
AS
2306
2307 config = pinconf_to_config_packed(mode, argument);
2308 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
2309}
2310
baca3b15
AS
2311static int gpio_set_config_with_argument_optional(struct gpio_desc *desc,
2312 enum pin_config_param mode,
2313 u32 argument)
2314{
2315 struct device *dev = &desc->gdev->dev;
2316 int gpio = gpio_chip_hwgpio(desc);
2317 int ret;
2318
2319 ret = gpio_set_config_with_argument(desc, mode, argument);
2320 if (ret != -ENOTSUPP)
2321 return ret;
d99f8876
BG
2322
2323 switch (mode) {
baca3b15
AS
2324 case PIN_CONFIG_PERSIST_STATE:
2325 dev_dbg(dev, "Persistence not supported for GPIO %d\n", gpio);
d99f8876 2326 break;
d99f8876 2327 default:
baca3b15 2328 break;
d99f8876
BG
2329 }
2330
baca3b15
AS
2331 return 0;
2332}
2333
0c4d8666
AS
2334static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode)
2335{
6aa32ad7 2336 return gpio_set_config_with_argument(desc, mode, 0);
d99f8876
BG
2337}
2338
5f4bf171 2339static int gpio_set_bias(struct gpio_desc *desc)
2148ad77 2340{
9ef6293c 2341 enum pin_config_param bias;
6aa32ad7 2342 unsigned int arg;
2148ad77
KG
2343
2344 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
2345 bias = PIN_CONFIG_BIAS_DISABLE;
2346 else if (test_bit(FLAG_PULL_UP, &desc->flags))
2347 bias = PIN_CONFIG_BIAS_PULL_UP;
2348 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
2349 bias = PIN_CONFIG_BIAS_PULL_DOWN;
9ef6293c
AS
2350 else
2351 return 0;
2148ad77 2352
6aa32ad7
AS
2353 switch (bias) {
2354 case PIN_CONFIG_BIAS_PULL_DOWN:
2355 case PIN_CONFIG_BIAS_PULL_UP:
2356 arg = 1;
2357 break;
2358
2359 default:
2360 arg = 0;
2361 break;
2148ad77 2362 }
6aa32ad7 2363
baca3b15 2364 return gpio_set_config_with_argument_optional(desc, bias, arg);
2148ad77
KG
2365}
2366
660c619b
AS
2367/**
2368 * gpio_set_debounce_timeout() - Set debounce timeout
2369 * @desc: GPIO descriptor to set the debounce timeout
2370 * @debounce: Debounce timeout in microseconds
2371 *
2372 * The function calls the certain GPIO driver to set debounce timeout
2373 * in the hardware.
2374 *
2375 * Returns 0 on success, or negative error code otherwise.
2376 */
f725edd8
AS
2377int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce)
2378{
2379 return gpio_set_config_with_argument_optional(desc,
2380 PIN_CONFIG_INPUT_DEBOUNCE,
2381 debounce);
2148ad77
KG
2382}
2383
79a9becd
AC
2384/**
2385 * gpiod_direction_input - set the GPIO direction to input
2386 * @desc: GPIO to set to input
2387 *
2388 * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
2389 * be called safely on it.
2390 *
2391 * Return 0 in case of success, else an error code.
2392 */
2393int gpiod_direction_input(struct gpio_desc *desc)
d2876d08 2394{
a0b66a73 2395 struct gpio_chip *gc;
d377f56f 2396 int ret = 0;
d2876d08 2397
fdeb8e15 2398 VALIDATE_DESC(desc);
a0b66a73 2399 gc = desc->gdev->chip;
bcabdef1 2400
e48d194d
LW
2401 /*
2402 * It is legal to have no .get() and .direction_input() specified if
2403 * the chip is output-only, but you can't specify .direction_input()
2404 * and not support the .get() operation, that doesn't make sense.
2405 */
a0b66a73 2406 if (!gc->get && gc->direction_input) {
6424de5a 2407 gpiod_warn(desc,
e48d194d
LW
2408 "%s: missing get() but have direction_input()\n",
2409 __func__);
be1a4b13
LW
2410 return -EIO;
2411 }
2412
e48d194d
LW
2413 /*
2414 * If we have a .direction_input() callback, things are simple,
2415 * just call it. Else we are some input-only chip so try to check the
2416 * direction (if .get_direction() is supported) else we silently
2417 * assume we are in input mode after this.
2418 */
a0b66a73
LW
2419 if (gc->direction_input) {
2420 ret = gc->direction_input(gc, gpio_chip_hwgpio(desc));
2421 } else if (gc->get_direction &&
2422 (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) {
ae9847f4 2423 gpiod_warn(desc,
e48d194d
LW
2424 "%s: missing direction_input() operation and line is output\n",
2425 __func__);
ae9847f4
RRD
2426 return -EIO;
2427 }
2148ad77 2428 if (ret == 0) {
d2876d08 2429 clear_bit(FLAG_IS_OUT, &desc->flags);
5f4bf171 2430 ret = gpio_set_bias(desc);
2148ad77 2431 }
d449991c 2432
d377f56f 2433 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
d82da797 2434
d377f56f 2435 return ret;
d2876d08 2436}
79a9becd 2437EXPORT_SYMBOL_GPL(gpiod_direction_input);
372e722e 2438
fac9d885 2439static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
d2876d08 2440{
c663e5f5 2441 struct gpio_chip *gc = desc->gdev->chip;
ad17731d 2442 int val = !!value;
ae9847f4 2443 int ret = 0;
d2876d08 2444
e48d194d
LW
2445 /*
2446 * It's OK not to specify .direction_output() if the gpiochip is
2447 * output-only, but if there is then not even a .set() operation it
2448 * is pretty tricky to drive the output line.
2449 */
ae9847f4 2450 if (!gc->set && !gc->direction_output) {
6424de5a 2451 gpiod_warn(desc,
e48d194d
LW
2452 "%s: missing set() and direction_output() operations\n",
2453 __func__);
be1a4b13
LW
2454 return -EIO;
2455 }
2456
ae9847f4
RRD
2457 if (gc->direction_output) {
2458 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
2459 } else {
e48d194d 2460 /* Check that we are in output mode if we can */
ae9847f4
RRD
2461 if (gc->get_direction &&
2462 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
2463 gpiod_warn(desc,
2464 "%s: missing direction_output() operation\n",
2465 __func__);
2466 return -EIO;
2467 }
e48d194d
LW
2468 /*
2469 * If we can't actively set the direction, we are some
2470 * output-only chip, so just drive the output as desired.
2471 */
ae9847f4
RRD
2472 gc->set(gc, gpio_chip_hwgpio(desc), val);
2473 }
2474
c663e5f5 2475 if (!ret)
d2876d08 2476 set_bit(FLAG_IS_OUT, &desc->flags);
ad17731d 2477 trace_gpio_value(desc_to_gpio(desc), 0, val);
c663e5f5
LW
2478 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
2479 return ret;
d2876d08 2480}
ef70bbe1
PZ
2481
2482/**
2483 * gpiod_direction_output_raw - set the GPIO direction to output
2484 * @desc: GPIO to set to output
2485 * @value: initial output value of the GPIO
2486 *
2487 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2488 * be called safely on it. The initial value of the output must be specified
2489 * as raw value on the physical line without regard for the ACTIVE_LOW status.
2490 *
2491 * Return 0 in case of success, else an error code.
2492 */
2493int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
2494{
fdeb8e15 2495 VALIDATE_DESC(desc);
fac9d885 2496 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1
PZ
2497}
2498EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
2499
2500/**
90df4fe0 2501 * gpiod_direction_output - set the GPIO direction to output
ef70bbe1
PZ
2502 * @desc: GPIO to set to output
2503 * @value: initial output value of the GPIO
2504 *
2505 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2506 * be called safely on it. The initial value of the output must be specified
2507 * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
2508 * account.
2509 *
2510 * Return 0 in case of success, else an error code.
2511 */
2512int gpiod_direction_output(struct gpio_desc *desc, int value)
2513{
02e47980
LW
2514 int ret;
2515
fdeb8e15 2516 VALIDATE_DESC(desc);
ef70bbe1
PZ
2517 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2518 value = !value;
ad17731d
LW
2519 else
2520 value = !!value;
02e47980 2521
4e9439dd
HV
2522 /* GPIOs used for enabled IRQs shall not be set as output */
2523 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
2524 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
02e47980
LW
2525 gpiod_err(desc,
2526 "%s: tried to set a GPIO tied to an IRQ as output\n",
2527 __func__);
2528 return -EIO;
2529 }
2530
2531 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
2532 /* First see if we can enable open drain in hardware */
83522358 2533 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN);
02e47980
LW
2534 if (!ret)
2535 goto set_output_value;
2536 /* Emulate open drain by not actively driving the line high */
e735244e
BG
2537 if (value) {
2538 ret = gpiod_direction_input(desc);
2539 goto set_output_flag;
2540 }
1cef8b50 2541 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
83522358 2542 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE);
02e47980
LW
2543 if (!ret)
2544 goto set_output_value;
2545 /* Emulate open source by not actively driving the line low */
e735244e
BG
2546 if (!value) {
2547 ret = gpiod_direction_input(desc);
2548 goto set_output_flag;
2549 }
02e47980 2550 } else {
83522358 2551 gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL);
02e47980
LW
2552 }
2553
2554set_output_value:
5f4bf171 2555 ret = gpio_set_bias(desc);
2821ae5f
KG
2556 if (ret)
2557 return ret;
fac9d885 2558 return gpiod_direction_output_raw_commit(desc, value);
e735244e
BG
2559
2560set_output_flag:
2561 /*
2562 * When emulating open-source or open-drain functionalities by not
2563 * actively driving the line (setting mode to input) we still need to
2564 * set the IS_OUT flag or otherwise we won't be able to set the line
2565 * value anymore.
2566 */
2567 if (ret == 0)
2568 set_bit(FLAG_IS_OUT, &desc->flags);
2569 return ret;
ef70bbe1 2570}
79a9becd 2571EXPORT_SYMBOL_GPL(gpiod_direction_output);
d2876d08 2572
42112dd7
DP
2573/**
2574 * gpiod_enable_hw_timestamp_ns - Enable hardware timestamp in nanoseconds.
2575 *
2576 * @desc: GPIO to enable.
2577 * @flags: Flags related to GPIO edge.
2578 *
2579 * Return 0 in case of success, else negative error code.
2580 */
2581int gpiod_enable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags)
2582{
2583 int ret = 0;
2584 struct gpio_chip *gc;
2585
2586 VALIDATE_DESC(desc);
2587
2588 gc = desc->gdev->chip;
2589 if (!gc->en_hw_timestamp) {
2590 gpiod_warn(desc, "%s: hw ts not supported\n", __func__);
2591 return -ENOTSUPP;
2592 }
2593
2594 ret = gc->en_hw_timestamp(gc, gpio_chip_hwgpio(desc), flags);
2595 if (ret)
2596 gpiod_warn(desc, "%s: hw ts request failed\n", __func__);
2597
2598 return ret;
2599}
2600EXPORT_SYMBOL_GPL(gpiod_enable_hw_timestamp_ns);
2601
2602/**
2603 * gpiod_disable_hw_timestamp_ns - Disable hardware timestamp.
2604 *
2605 * @desc: GPIO to disable.
2606 * @flags: Flags related to GPIO edge, same value as used during enable call.
2607 *
2608 * Return 0 in case of success, else negative error code.
2609 */
2610int gpiod_disable_hw_timestamp_ns(struct gpio_desc *desc, unsigned long flags)
2611{
2612 int ret = 0;
2613 struct gpio_chip *gc;
2614
2615 VALIDATE_DESC(desc);
2616
2617 gc = desc->gdev->chip;
2618 if (!gc->dis_hw_timestamp) {
2619 gpiod_warn(desc, "%s: hw ts not supported\n", __func__);
2620 return -ENOTSUPP;
2621 }
2622
2623 ret = gc->dis_hw_timestamp(gc, gpio_chip_hwgpio(desc), flags);
2624 if (ret)
2625 gpiod_warn(desc, "%s: hw ts release failed\n", __func__);
2626
2627 return ret;
2628}
2629EXPORT_SYMBOL_GPL(gpiod_disable_hw_timestamp_ns);
2630
8ced32ff
GU
2631/**
2632 * gpiod_set_config - sets @config for a GPIO
2633 * @desc: descriptor of the GPIO for which to set the configuration
2634 * @config: Same packed config format as generic pinconf
2635 *
2636 * Returns:
2637 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2638 * configuration.
2639 */
2640int gpiod_set_config(struct gpio_desc *desc, unsigned long config)
2641{
a0b66a73 2642 struct gpio_chip *gc;
8ced32ff
GU
2643
2644 VALIDATE_DESC(desc);
a0b66a73 2645 gc = desc->gdev->chip;
8ced32ff 2646
a0b66a73 2647 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
8ced32ff
GU
2648}
2649EXPORT_SYMBOL_GPL(gpiod_set_config);
2650
c4b5be98 2651/**
950d55f5
TR
2652 * gpiod_set_debounce - sets @debounce time for a GPIO
2653 * @desc: descriptor of the GPIO for which to set debounce time
2654 * @debounce: debounce time in microseconds
65d87656 2655 *
950d55f5
TR
2656 * Returns:
2657 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2658 * debounce time.
c4b5be98 2659 */
13daf489 2660int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce)
c4b5be98 2661{
8ced32ff 2662 unsigned long config;
be1a4b13 2663
2956b5d9 2664 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
8ced32ff 2665 return gpiod_set_config(desc, config);
c4b5be98 2666}
79a9becd 2667EXPORT_SYMBOL_GPL(gpiod_set_debounce);
372e722e 2668
e10f72bf
AJ
2669/**
2670 * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
2671 * @desc: descriptor of the GPIO for which to configure persistence
2672 * @transitory: True to lose state on suspend or reset, false for persistence
2673 *
2674 * Returns:
2675 * 0 on success, otherwise a negative error code.
2676 */
2677int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
2678{
156dd392 2679 VALIDATE_DESC(desc);
e10f72bf
AJ
2680 /*
2681 * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
2682 * persistence state.
2683 */
4fc5bfeb 2684 assign_bit(FLAG_TRANSITORY, &desc->flags, transitory);
e10f72bf
AJ
2685
2686 /* If the driver supports it, set the persistence state now */
baca3b15
AS
2687 return gpio_set_config_with_argument_optional(desc,
2688 PIN_CONFIG_PERSIST_STATE,
2689 !transitory);
e10f72bf
AJ
2690}
2691EXPORT_SYMBOL_GPL(gpiod_set_transitory);
2692
79a9becd
AC
2693/**
2694 * gpiod_is_active_low - test whether a GPIO is active-low or not
2695 * @desc: the gpio descriptor to test
2696 *
2697 * Returns 1 if the GPIO is active-low, 0 otherwise.
2698 */
2699int gpiod_is_active_low(const struct gpio_desc *desc)
372e722e 2700{
fdeb8e15 2701 VALIDATE_DESC(desc);
79a9becd 2702 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
372e722e 2703}
79a9becd 2704EXPORT_SYMBOL_GPL(gpiod_is_active_low);
d2876d08 2705
d3a5bcb4
MM
2706/**
2707 * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not
2708 * @desc: the gpio descriptor to change
2709 */
2710void gpiod_toggle_active_low(struct gpio_desc *desc)
2711{
2712 VALIDATE_DESC_VOID(desc);
2713 change_bit(FLAG_ACTIVE_LOW, &desc->flags);
2714}
2715EXPORT_SYMBOL_GPL(gpiod_toggle_active_low);
2716
234c5209
AS
2717static int gpio_chip_get_value(struct gpio_chip *gc, const struct gpio_desc *desc)
2718{
2719 return gc->get ? gc->get(gc, gpio_chip_hwgpio(desc)) : -EIO;
2720}
2721
d2876d08
DB
2722/* I/O calls are only valid after configuration completed; the relevant
2723 * "is this a valid GPIO" error checks should already have been done.
2724 *
2725 * "Get" operations are often inlinable as reading a pin value register,
2726 * and masking the relevant bit in that register.
2727 *
2728 * When "set" operations are inlinable, they involve writing that mask to
2729 * one register to set a low value, or a different register to set it high.
2730 * Otherwise locking is needed, so there may be little value to inlining.
2731 *
2732 *------------------------------------------------------------------------
2733 *
2734 * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
2735 * have requested the GPIO. That can include implicit requesting by
2736 * a direction setting call. Marking a gpio as requested locks its chip
2737 * in memory, guaranteeing that these table lookups need no more locking
2738 * and that gpiochip_remove() will fail.
2739 *
2740 * REVISIT when debugging, consider adding some instrumentation to ensure
2741 * that the GPIO was actually requested.
2742 */
2743
fac9d885 2744static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
d2876d08 2745{
a0b66a73 2746 struct gpio_chip *gc;
e20538b8 2747 int value;
d2876d08 2748
a0b66a73 2749 gc = desc->gdev->chip;
234c5209 2750 value = gpio_chip_get_value(gc, desc);
723a6303 2751 value = value < 0 ? value : !!value;
372e722e 2752 trace_gpio_value(desc_to_gpio(desc), 1, value);
3f397c21 2753 return value;
d2876d08 2754}
372e722e 2755
a0b66a73 2756static int gpio_chip_get_multiple(struct gpio_chip *gc,
eec1d566
LW
2757 unsigned long *mask, unsigned long *bits)
2758{
1cef8b50 2759 if (gc->get_multiple)
a0b66a73 2760 return gc->get_multiple(gc, mask, bits);
1cef8b50 2761 if (gc->get) {
eec1d566
LW
2762 int i, value;
2763
a0b66a73
LW
2764 for_each_set_bit(i, mask, gc->ngpio) {
2765 value = gc->get(gc, i);
eec1d566
LW
2766 if (value < 0)
2767 return value;
2768 __assign_bit(i, bits, value);
2769 }
2770 return 0;
2771 }
2772 return -EIO;
2773}
2774
2775int gpiod_get_array_value_complex(bool raw, bool can_sleep,
2776 unsigned int array_size,
2777 struct gpio_desc **desc_array,
77588c14 2778 struct gpio_array *array_info,
b9762beb 2779 unsigned long *value_bitmap)
eec1d566 2780{
d377f56f 2781 int ret, i = 0;
b17566a6
JK
2782
2783 /*
2784 * Validate array_info against desc_array and its size.
2785 * It should immediately follow desc_array if both
2786 * have been obtained from the same gpiod_get_array() call.
2787 */
2788 if (array_info && array_info->desc == desc_array &&
2789 array_size <= array_info->size &&
2790 (void *)array_info == desc_array + array_info->size) {
2791 if (!can_sleep)
2792 WARN_ON(array_info->chip->can_sleep);
2793
d377f56f 2794 ret = gpio_chip_get_multiple(array_info->chip,
b17566a6
JK
2795 array_info->get_mask,
2796 value_bitmap);
d377f56f
LW
2797 if (ret)
2798 return ret;
b17566a6
JK
2799
2800 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2801 bitmap_xor(value_bitmap, value_bitmap,
2802 array_info->invert_mask, array_size);
2803
b17566a6 2804 i = find_first_zero_bit(array_info->get_mask, array_size);
ae66eca0
AS
2805 if (i == array_size)
2806 return 0;
b17566a6
JK
2807 } else {
2808 array_info = NULL;
2809 }
eec1d566
LW
2810
2811 while (i < array_size) {
a0b66a73 2812 struct gpio_chip *gc = desc_array[i]->gdev->chip;
c80c4435
AS
2813 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
2814 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
3027743f 2815 unsigned long *mask, *bits;
c07ea8d0 2816 int first, j;
eec1d566 2817
a0b66a73 2818 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
c80c4435
AS
2819 mask = fastpath_mask;
2820 bits = fastpath_bits;
3027743f 2821 } else {
c354c295
AS
2822 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
2823
2824 mask = bitmap_alloc(gc->ngpio, flags);
3027743f
LA
2825 if (!mask)
2826 return -ENOMEM;
c80c4435 2827
c354c295
AS
2828 bits = bitmap_alloc(gc->ngpio, flags);
2829 if (!bits) {
2830 bitmap_free(mask);
2831 return -ENOMEM;
2832 }
3027743f
LA
2833 }
2834
a0b66a73 2835 bitmap_zero(mask, gc->ngpio);
3027743f 2836
eec1d566 2837 if (!can_sleep)
a0b66a73 2838 WARN_ON(gc->can_sleep);
eec1d566
LW
2839
2840 /* collect all inputs belonging to the same chip */
2841 first = i;
eec1d566
LW
2842 do {
2843 const struct gpio_desc *desc = desc_array[i];
2844 int hwgpio = gpio_chip_hwgpio(desc);
2845
2846 __set_bit(hwgpio, mask);
2847 i++;
b17566a6
JK
2848
2849 if (array_info)
35ae7f96
JK
2850 i = find_next_zero_bit(array_info->get_mask,
2851 array_size, i);
eec1d566 2852 } while ((i < array_size) &&
a0b66a73 2853 (desc_array[i]->gdev->chip == gc));
eec1d566 2854
a0b66a73 2855 ret = gpio_chip_get_multiple(gc, mask, bits);
3027743f 2856 if (ret) {
c80c4435 2857 if (mask != fastpath_mask)
c354c295
AS
2858 bitmap_free(mask);
2859 if (bits != fastpath_bits)
2860 bitmap_free(bits);
eec1d566 2861 return ret;
3027743f 2862 }
eec1d566 2863
b17566a6 2864 for (j = first; j < i; ) {
eec1d566
LW
2865 const struct gpio_desc *desc = desc_array[j];
2866 int hwgpio = gpio_chip_hwgpio(desc);
2867 int value = test_bit(hwgpio, bits);
2868
2869 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2870 value = !value;
b9762beb 2871 __assign_bit(j, value_bitmap, value);
eec1d566 2872 trace_gpio_value(desc_to_gpio(desc), 1, value);
799d5eb4 2873 j++;
b17566a6
JK
2874
2875 if (array_info)
35ae7f96
JK
2876 j = find_next_zero_bit(array_info->get_mask, i,
2877 j);
eec1d566 2878 }
3027743f 2879
c80c4435 2880 if (mask != fastpath_mask)
c354c295
AS
2881 bitmap_free(mask);
2882 if (bits != fastpath_bits)
2883 bitmap_free(bits);
eec1d566
LW
2884 }
2885 return 0;
2886}
2887
d2876d08 2888/**
79a9becd
AC
2889 * gpiod_get_raw_value() - return a gpio's raw value
2890 * @desc: gpio whose value will be returned
d2876d08 2891 *
79a9becd 2892 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 2893 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd 2894 *
827a9b8b 2895 * This function can be called from contexts where we cannot sleep, and will
79a9becd 2896 * complain if the GPIO chip functions potentially sleep.
d2876d08 2897 */
79a9becd 2898int gpiod_get_raw_value(const struct gpio_desc *desc)
d2876d08 2899{
fdeb8e15 2900 VALIDATE_DESC(desc);
3285170f 2901 /* Should be using gpiod_get_raw_value_cansleep() */
fdeb8e15 2902 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 2903 return gpiod_get_raw_value_commit(desc);
d2876d08 2904}
79a9becd 2905EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
372e722e 2906
79a9becd
AC
2907/**
2908 * gpiod_get_value() - return a gpio's value
2909 * @desc: gpio whose value will be returned
2910 *
2911 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 2912 * account, or negative errno on failure.
79a9becd 2913 *
827a9b8b 2914 * This function can be called from contexts where we cannot sleep, and will
79a9becd
AC
2915 * complain if the GPIO chip functions potentially sleep.
2916 */
2917int gpiod_get_value(const struct gpio_desc *desc)
372e722e 2918{
79a9becd 2919 int value;
fdeb8e15
LW
2920
2921 VALIDATE_DESC(desc);
3285170f 2922 /* Should be using gpiod_get_value_cansleep() */
fdeb8e15 2923 WARN_ON(desc->gdev->chip->can_sleep);
79a9becd 2924
fac9d885 2925 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
2926 if (value < 0)
2927 return value;
2928
79a9becd
AC
2929 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2930 value = !value;
2931
2932 return value;
372e722e 2933}
79a9becd 2934EXPORT_SYMBOL_GPL(gpiod_get_value);
d2876d08 2935
eec1d566
LW
2936/**
2937 * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
b9762beb 2938 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 2939 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 2940 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2941 * @value_bitmap: bitmap to store the read values
eec1d566
LW
2942 *
2943 * Read the raw values of the GPIOs, i.e. the values of the physical lines
2944 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
2945 * else an error code.
2946 *
827a9b8b 2947 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
2948 * and it will complain if the GPIO chip functions potentially sleep.
2949 */
2950int gpiod_get_raw_array_value(unsigned int array_size,
b9762beb 2951 struct gpio_desc **desc_array,
77588c14 2952 struct gpio_array *array_info,
b9762beb 2953 unsigned long *value_bitmap)
eec1d566
LW
2954{
2955 if (!desc_array)
2956 return -EINVAL;
2957 return gpiod_get_array_value_complex(true, false, array_size,
77588c14
JK
2958 desc_array, array_info,
2959 value_bitmap);
eec1d566
LW
2960}
2961EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
2962
2963/**
2964 * gpiod_get_array_value() - read values from an array of GPIOs
b9762beb 2965 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 2966 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 2967 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2968 * @value_bitmap: bitmap to store the read values
eec1d566
LW
2969 *
2970 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
2971 * into account. Return 0 in case of success, else an error code.
2972 *
827a9b8b 2973 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
2974 * and it will complain if the GPIO chip functions potentially sleep.
2975 */
2976int gpiod_get_array_value(unsigned int array_size,
b9762beb 2977 struct gpio_desc **desc_array,
77588c14 2978 struct gpio_array *array_info,
b9762beb 2979 unsigned long *value_bitmap)
eec1d566
LW
2980{
2981 if (!desc_array)
2982 return -EINVAL;
2983 return gpiod_get_array_value_complex(false, false, array_size,
77588c14
JK
2984 desc_array, array_info,
2985 value_bitmap);
eec1d566
LW
2986}
2987EXPORT_SYMBOL_GPL(gpiod_get_array_value);
2988
aca5ce14 2989/*
fac9d885 2990 * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
79a9becd 2991 * @desc: gpio descriptor whose state need to be set.
20a8a968 2992 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
aca5ce14 2993 */
fac9d885 2994static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
aca5ce14 2995{
d377f56f 2996 int ret = 0;
a0b66a73 2997 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
2998 int offset = gpio_chip_hwgpio(desc);
2999
aca5ce14 3000 if (value) {
a0b66a73 3001 ret = gc->direction_input(gc, offset);
aca5ce14 3002 } else {
a0b66a73 3003 ret = gc->direction_output(gc, offset, 0);
d377f56f 3004 if (!ret)
372e722e 3005 set_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 3006 }
d377f56f
LW
3007 trace_gpio_direction(desc_to_gpio(desc), value, ret);
3008 if (ret < 0)
6424de5a
MB
3009 gpiod_err(desc,
3010 "%s: Error in set_value for open drain err %d\n",
d377f56f 3011 __func__, ret);
aca5ce14
LD
3012}
3013
25553ff0 3014/*
79a9becd
AC
3015 * _gpio_set_open_source_value() - Set the open source gpio's value.
3016 * @desc: gpio descriptor whose state need to be set.
20a8a968 3017 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
25553ff0 3018 */
fac9d885 3019static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
25553ff0 3020{
d377f56f 3021 int ret = 0;
a0b66a73 3022 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
3023 int offset = gpio_chip_hwgpio(desc);
3024
25553ff0 3025 if (value) {
a0b66a73 3026 ret = gc->direction_output(gc, offset, 1);
d377f56f 3027 if (!ret)
372e722e 3028 set_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 3029 } else {
a0b66a73 3030 ret = gc->direction_input(gc, offset);
25553ff0 3031 }
d377f56f
LW
3032 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
3033 if (ret < 0)
6424de5a
MB
3034 gpiod_err(desc,
3035 "%s: Error in set_value for open source err %d\n",
d377f56f 3036 __func__, ret);
25553ff0
LD
3037}
3038
fac9d885 3039static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
d2876d08 3040{
a0b66a73 3041 struct gpio_chip *gc;
d2876d08 3042
a0b66a73 3043 gc = desc->gdev->chip;
372e722e 3044 trace_gpio_value(desc_to_gpio(desc), 0, value);
a0b66a73 3045 gc->set(gc, gpio_chip_hwgpio(desc), value);
372e722e
AC
3046}
3047
5f424243
RI
3048/*
3049 * set multiple outputs on the same chip;
3050 * use the chip's set_multiple function if available;
3051 * otherwise set the outputs sequentially;
a0b66a73 3052 * @chip: the GPIO chip we operate on
5f424243
RI
3053 * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
3054 * defines which outputs are to be changed
3055 * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
3056 * defines the values the outputs specified by mask are to be set to
3057 */
a0b66a73 3058static void gpio_chip_set_multiple(struct gpio_chip *gc,
5f424243
RI
3059 unsigned long *mask, unsigned long *bits)
3060{
a0b66a73
LW
3061 if (gc->set_multiple) {
3062 gc->set_multiple(gc, mask, bits);
5f424243 3063 } else {
5e4e6fb3
AS
3064 unsigned int i;
3065
3066 /* set outputs if the corresponding mask bit is set */
a0b66a73
LW
3067 for_each_set_bit(i, mask, gc->ngpio)
3068 gc->set(gc, i, test_bit(i, bits));
5f424243
RI
3069 }
3070}
3071
3027743f 3072int gpiod_set_array_value_complex(bool raw, bool can_sleep,
3c940660
GU
3073 unsigned int array_size,
3074 struct gpio_desc **desc_array,
3075 struct gpio_array *array_info,
3076 unsigned long *value_bitmap)
5f424243
RI
3077{
3078 int i = 0;
3079
b17566a6
JK
3080 /*
3081 * Validate array_info against desc_array and its size.
3082 * It should immediately follow desc_array if both
3083 * have been obtained from the same gpiod_get_array() call.
3084 */
3085 if (array_info && array_info->desc == desc_array &&
3086 array_size <= array_info->size &&
3087 (void *)array_info == desc_array + array_info->size) {
3088 if (!can_sleep)
3089 WARN_ON(array_info->chip->can_sleep);
3090
3091 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3092 bitmap_xor(value_bitmap, value_bitmap,
3093 array_info->invert_mask, array_size);
3094
3095 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
3096 value_bitmap);
3097
b17566a6 3098 i = find_first_zero_bit(array_info->set_mask, array_size);
ae66eca0
AS
3099 if (i == array_size)
3100 return 0;
b17566a6
JK
3101 } else {
3102 array_info = NULL;
3103 }
3104
5f424243 3105 while (i < array_size) {
a0b66a73 3106 struct gpio_chip *gc = desc_array[i]->gdev->chip;
c80c4435
AS
3107 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
3108 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
3027743f 3109 unsigned long *mask, *bits;
5f424243
RI
3110 int count = 0;
3111
a0b66a73 3112 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
c80c4435
AS
3113 mask = fastpath_mask;
3114 bits = fastpath_bits;
3027743f 3115 } else {
c354c295
AS
3116 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
3117
3118 mask = bitmap_alloc(gc->ngpio, flags);
3027743f
LA
3119 if (!mask)
3120 return -ENOMEM;
c80c4435 3121
c354c295
AS
3122 bits = bitmap_alloc(gc->ngpio, flags);
3123 if (!bits) {
3124 bitmap_free(mask);
3125 return -ENOMEM;
3126 }
3027743f
LA
3127 }
3128
a0b66a73 3129 bitmap_zero(mask, gc->ngpio);
3027743f 3130
38e003f4 3131 if (!can_sleep)
a0b66a73 3132 WARN_ON(gc->can_sleep);
38e003f4 3133
5f424243
RI
3134 do {
3135 struct gpio_desc *desc = desc_array[i];
3136 int hwgpio = gpio_chip_hwgpio(desc);
b9762beb 3137 int value = test_bit(i, value_bitmap);
5f424243 3138
b17566a6
JK
3139 /*
3140 * Pins applicable for fast input but not for
3141 * fast output processing may have been already
3142 * inverted inside the fast path, skip them.
3143 */
3144 if (!raw && !(array_info &&
3145 test_bit(i, array_info->invert_mask)) &&
3146 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
5f424243
RI
3147 value = !value;
3148 trace_gpio_value(desc_to_gpio(desc), 0, value);
3149 /*
3150 * collect all normal outputs belonging to the same chip
3151 * open drain and open source outputs are set individually
3152 */
02e47980 3153 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
fac9d885 3154 gpio_set_open_drain_value_commit(desc, value);
02e47980 3155 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
fac9d885 3156 gpio_set_open_source_value_commit(desc, value);
5f424243
RI
3157 } else {
3158 __set_bit(hwgpio, mask);
4fc5bfeb 3159 __assign_bit(hwgpio, bits, value);
5f424243
RI
3160 count++;
3161 }
3162 i++;
b17566a6
JK
3163
3164 if (array_info)
35ae7f96
JK
3165 i = find_next_zero_bit(array_info->set_mask,
3166 array_size, i);
fdeb8e15 3167 } while ((i < array_size) &&
a0b66a73 3168 (desc_array[i]->gdev->chip == gc));
5f424243 3169 /* push collected bits to outputs */
38e003f4 3170 if (count != 0)
a0b66a73 3171 gpio_chip_set_multiple(gc, mask, bits);
3027743f 3172
c80c4435 3173 if (mask != fastpath_mask)
c354c295
AS
3174 bitmap_free(mask);
3175 if (bits != fastpath_bits)
3176 bitmap_free(bits);
5f424243 3177 }
3027743f 3178 return 0;
5f424243
RI
3179}
3180
d2876d08 3181/**
79a9becd
AC
3182 * gpiod_set_raw_value() - assign a gpio's raw value
3183 * @desc: gpio whose value will be assigned
d2876d08 3184 * @value: value to assign
d2876d08 3185 *
79a9becd
AC
3186 * Set the raw value of the GPIO, i.e. the value of its physical line without
3187 * regard for its ACTIVE_LOW status.
3188 *
827a9b8b 3189 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3190 * complain if the GPIO chip functions potentially sleep.
d2876d08 3191 */
79a9becd 3192void gpiod_set_raw_value(struct gpio_desc *desc, int value)
372e722e 3193{
fdeb8e15 3194 VALIDATE_DESC_VOID(desc);
3285170f 3195 /* Should be using gpiod_set_raw_value_cansleep() */
fdeb8e15 3196 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3197 gpiod_set_raw_value_commit(desc, value);
d2876d08 3198}
79a9becd 3199EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
d2876d08 3200
1e77fc82
GU
3201/**
3202 * gpiod_set_value_nocheck() - set a GPIO line value without checking
3203 * @desc: the descriptor to set the value on
3204 * @value: value to set
3205 *
3206 * This sets the value of a GPIO line backing a descriptor, applying
3207 * different semantic quirks like active low and open drain/source
3208 * handling.
3209 */
3210static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
3211{
3212 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3213 value = !value;
3214 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
3215 gpio_set_open_drain_value_commit(desc, value);
3216 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
3217 gpio_set_open_source_value_commit(desc, value);
3218 else
3219 gpiod_set_raw_value_commit(desc, value);
3220}
3221
d2876d08 3222/**
79a9becd
AC
3223 * gpiod_set_value() - assign a gpio's value
3224 * @desc: gpio whose value will be assigned
3225 * @value: value to assign
3226 *
02e47980
LW
3227 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
3228 * OPEN_DRAIN and OPEN_SOURCE flags into account.
d2876d08 3229 *
827a9b8b 3230 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3231 * complain if the GPIO chip functions potentially sleep.
d2876d08 3232 */
79a9becd 3233void gpiod_set_value(struct gpio_desc *desc, int value)
d2876d08 3234{
fdeb8e15 3235 VALIDATE_DESC_VOID(desc);
3285170f 3236 /* Should be using gpiod_set_value_cansleep() */
fdeb8e15 3237 WARN_ON(desc->gdev->chip->can_sleep);
1e77fc82 3238 gpiod_set_value_nocheck(desc, value);
372e722e 3239}
79a9becd 3240EXPORT_SYMBOL_GPL(gpiod_set_value);
d2876d08 3241
5f424243 3242/**
3fff99bc 3243 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
b9762beb 3244 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3245 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3246 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3247 * @value_bitmap: bitmap of values to assign
5f424243
RI
3248 *
3249 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3250 * without regard for their ACTIVE_LOW status.
3251 *
827a9b8b 3252 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3253 * complain if the GPIO chip functions potentially sleep.
3254 */
3027743f 3255int gpiod_set_raw_array_value(unsigned int array_size,
3c940660
GU
3256 struct gpio_desc **desc_array,
3257 struct gpio_array *array_info,
3258 unsigned long *value_bitmap)
5f424243
RI
3259{
3260 if (!desc_array)
3027743f
LA
3261 return -EINVAL;
3262 return gpiod_set_array_value_complex(true, false, array_size,
77588c14 3263 desc_array, array_info, value_bitmap);
5f424243 3264}
3fff99bc 3265EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
5f424243
RI
3266
3267/**
3fff99bc 3268 * gpiod_set_array_value() - assign values to an array of GPIOs
b9762beb 3269 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3270 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3271 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3272 * @value_bitmap: bitmap of values to assign
5f424243
RI
3273 *
3274 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3275 * into account.
3276 *
827a9b8b 3277 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3278 * complain if the GPIO chip functions potentially sleep.
3279 */
cf9af0d5
GU
3280int gpiod_set_array_value(unsigned int array_size,
3281 struct gpio_desc **desc_array,
3282 struct gpio_array *array_info,
3283 unsigned long *value_bitmap)
5f424243
RI
3284{
3285 if (!desc_array)
cf9af0d5
GU
3286 return -EINVAL;
3287 return gpiod_set_array_value_complex(false, false, array_size,
3288 desc_array, array_info,
3289 value_bitmap);
5f424243 3290}
3fff99bc 3291EXPORT_SYMBOL_GPL(gpiod_set_array_value);
5f424243 3292
d2876d08 3293/**
79a9becd
AC
3294 * gpiod_cansleep() - report whether gpio value access may sleep
3295 * @desc: gpio to check
d2876d08 3296 *
d2876d08 3297 */
79a9becd 3298int gpiod_cansleep(const struct gpio_desc *desc)
372e722e 3299{
fdeb8e15
LW
3300 VALIDATE_DESC(desc);
3301 return desc->gdev->chip->can_sleep;
d2876d08 3302}
79a9becd 3303EXPORT_SYMBOL_GPL(gpiod_cansleep);
d2876d08 3304
90b39402
LW
3305/**
3306 * gpiod_set_consumer_name() - set the consumer name for the descriptor
3307 * @desc: gpio to set the consumer name on
3308 * @name: the new consumer name
3309 */
18534df4 3310int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
90b39402 3311{
18534df4
MS
3312 VALIDATE_DESC(desc);
3313 if (name) {
3314 name = kstrdup_const(name, GFP_KERNEL);
3315 if (!name)
3316 return -ENOMEM;
3317 }
3318
3319 kfree_const(desc->label);
3320 desc_set_label(desc, name);
3321
3322 return 0;
90b39402
LW
3323}
3324EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
3325
0f6d504e 3326/**
79a9becd
AC
3327 * gpiod_to_irq() - return the IRQ corresponding to a GPIO
3328 * @desc: gpio whose IRQ will be returned (already requested)
0f6d504e 3329 *
79a9becd
AC
3330 * Return the IRQ corresponding to the passed GPIO, or an error code in case of
3331 * error.
0f6d504e 3332 */
79a9becd 3333int gpiod_to_irq(const struct gpio_desc *desc)
0f6d504e 3334{
a0b66a73 3335 struct gpio_chip *gc;
4c37ce86 3336 int offset;
0f6d504e 3337
79bb71bd
LW
3338 /*
3339 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
3340 * requires this function to not return zero on an invalid descriptor
3341 * but rather a negative error number.
3342 */
bfbbe44d 3343 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
79bb71bd
LW
3344 return -EINVAL;
3345
a0b66a73 3346 gc = desc->gdev->chip;
372e722e 3347 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
3348 if (gc->to_irq) {
3349 int retirq = gc->to_irq(gc, offset);
4c37ce86
LW
3350
3351 /* Zero means NO_IRQ */
3352 if (!retirq)
3353 return -ENXIO;
3354
3355 return retirq;
3356 }
ae42f928
SP
3357#ifdef CONFIG_GPIOLIB_IRQCHIP
3358 if (gc->irq.chip) {
3359 /*
3360 * Avoid race condition with other code, which tries to lookup
3361 * an IRQ before the irqchip has been properly registered,
3362 * i.e. while gpiochip is still being brought up.
3363 */
3364 return -EPROBE_DEFER;
3365 }
3366#endif
4c37ce86 3367 return -ENXIO;
0f6d504e 3368}
79a9becd 3369EXPORT_SYMBOL_GPL(gpiod_to_irq);
0f6d504e 3370
d468bf9e 3371/**
e3a2e878 3372 * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
a0b66a73 3373 * @gc: the chip the GPIO to lock belongs to
d74be6df 3374 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3375 *
3376 * This is used directly by GPIO drivers that want to lock down
f438acdf 3377 * a certain GPIO line to be used for IRQs.
d468bf9e 3378 */
a0b66a73 3379int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset)
372e722e 3380{
9c10280d
LW
3381 struct gpio_desc *desc;
3382
a0b66a73 3383 desc = gpiochip_get_desc(gc, offset);
9c10280d
LW
3384 if (IS_ERR(desc))
3385 return PTR_ERR(desc);
3386
60f8339e
LW
3387 /*
3388 * If it's fast: flush the direction setting if something changed
3389 * behind our back
3390 */
a0b66a73 3391 if (!gc->can_sleep && gc->get_direction) {
80956790 3392 int dir = gpiod_get_direction(desc);
9c10280d 3393
36b31279 3394 if (dir < 0) {
a0b66a73 3395 chip_err(gc, "%s: cannot get GPIO direction\n",
36b31279
AS
3396 __func__);
3397 return dir;
3398 }
9c10280d 3399 }
d468bf9e 3400
e9bdf7e6
LW
3401 /* To be valid for IRQ the line needs to be input or open drain */
3402 if (test_bit(FLAG_IS_OUT, &desc->flags) &&
3403 !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
a0b66a73 3404 chip_err(gc,
b1911710
AS
3405 "%s: tried to flag a GPIO set as output for IRQ\n",
3406 __func__);
d468bf9e
LW
3407 return -EIO;
3408 }
3409
9c10280d 3410 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3411 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3412
3413 /*
3414 * If the consumer has not set up a label (such as when the
3415 * IRQ is referenced from .to_irq()) we set up a label here
3416 * so it is clear this is used as an interrupt.
3417 */
3418 if (!desc->label)
3419 desc_set_label(desc, "interrupt");
3420
d468bf9e 3421 return 0;
372e722e 3422}
e3a2e878 3423EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
d2876d08 3424
d468bf9e 3425/**
e3a2e878 3426 * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
a0b66a73 3427 * @gc: the chip the GPIO to lock belongs to
d74be6df 3428 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3429 *
3430 * This is used directly by GPIO drivers that want to indicate
3431 * that a certain GPIO is no longer used exclusively for IRQ.
d2876d08 3432 */
a0b66a73 3433void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset)
d468bf9e 3434{
3940c34a
LW
3435 struct gpio_desc *desc;
3436
a0b66a73 3437 desc = gpiochip_get_desc(gc, offset);
3940c34a 3438 if (IS_ERR(desc))
d468bf9e 3439 return;
d2876d08 3440
3940c34a 3441 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3442 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3443
3444 /* If we only had this marking, erase it */
3445 if (desc->label && !strcmp(desc->label, "interrupt"))
3446 desc_set_label(desc, NULL);
d468bf9e 3447}
e3a2e878 3448EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
d468bf9e 3449
a0b66a73 3450void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3451{
a0b66a73 3452 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3453
3454 if (!IS_ERR(desc) &&
3455 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
3456 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3457}
3458EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
3459
a0b66a73 3460void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3461{
a0b66a73 3462 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3463
3464 if (!IS_ERR(desc) &&
3465 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
e9bdf7e6
LW
3466 /*
3467 * We must not be output when using IRQ UNLESS we are
3468 * open drain.
3469 */
3470 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) &&
3471 !test_bit(FLAG_OPEN_DRAIN, &desc->flags));
4e9439dd
HV
3472 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3473 }
3474}
3475EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
3476
a0b66a73 3477bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset)
6cee3821 3478{
a0b66a73 3479 if (offset >= gc->ngpio)
6cee3821
LW
3480 return false;
3481
a0b66a73 3482 return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags);
6cee3821
LW
3483}
3484EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
3485
a0b66a73 3486int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238
HV
3487{
3488 int ret;
3489
a0b66a73 3490 if (!try_module_get(gc->gpiodev->owner))
4e6b8238
HV
3491 return -ENODEV;
3492
a0b66a73 3493 ret = gpiochip_lock_as_irq(gc, offset);
4e6b8238 3494 if (ret) {
a0b66a73
LW
3495 chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset);
3496 module_put(gc->gpiodev->owner);
4e6b8238
HV
3497 return ret;
3498 }
3499 return 0;
3500}
3501EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
3502
a0b66a73 3503void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238 3504{
a0b66a73
LW
3505 gpiochip_unlock_as_irq(gc, offset);
3506 module_put(gc->gpiodev->owner);
4e6b8238
HV
3507}
3508EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
3509
a0b66a73 3510bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset)
143b65d6 3511{
a0b66a73 3512 if (offset >= gc->ngpio)
143b65d6
LW
3513 return false;
3514
a0b66a73 3515 return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3516}
3517EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
3518
a0b66a73 3519bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset)
143b65d6 3520{
a0b66a73 3521 if (offset >= gc->ngpio)
143b65d6
LW
3522 return false;
3523
a0b66a73 3524 return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3525}
3526EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
3527
a0b66a73 3528bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset)
05f479bf 3529{
a0b66a73 3530 if (offset >= gc->ngpio)
05f479bf
CK
3531 return false;
3532
a0b66a73 3533 return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags);
05f479bf
CK
3534}
3535EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
3536
79a9becd
AC
3537/**
3538 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
3539 * @desc: gpio whose value will be returned
3540 *
3541 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3542 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd
AC
3543 *
3544 * This function is to be called from contexts that can sleep.
d2876d08 3545 */
79a9becd 3546int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
d2876d08 3547{
d2876d08 3548 might_sleep_if(extra_checks);
fdeb8e15 3549 VALIDATE_DESC(desc);
fac9d885 3550 return gpiod_get_raw_value_commit(desc);
d2876d08 3551}
79a9becd 3552EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
372e722e 3553
79a9becd
AC
3554/**
3555 * gpiod_get_value_cansleep() - return a gpio's value
3556 * @desc: gpio whose value will be returned
3557 *
3558 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3559 * account, or negative errno on failure.
79a9becd
AC
3560 *
3561 * This function is to be called from contexts that can sleep.
3562 */
3563int gpiod_get_value_cansleep(const struct gpio_desc *desc)
d2876d08 3564{
3f397c21 3565 int value;
d2876d08
DB
3566
3567 might_sleep_if(extra_checks);
fdeb8e15 3568 VALIDATE_DESC(desc);
fac9d885 3569 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3570 if (value < 0)
3571 return value;
3572
79a9becd
AC
3573 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3574 value = !value;
3575
3f397c21 3576 return value;
d2876d08 3577}
79a9becd 3578EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
372e722e 3579
eec1d566
LW
3580/**
3581 * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
b9762beb 3582 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3583 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3584 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3585 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3586 *
3587 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3588 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3589 * else an error code.
3590 *
3591 * This function is to be called from contexts that can sleep.
3592 */
3593int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
3594 struct gpio_desc **desc_array,
77588c14 3595 struct gpio_array *array_info,
b9762beb 3596 unsigned long *value_bitmap)
eec1d566
LW
3597{
3598 might_sleep_if(extra_checks);
3599 if (!desc_array)
3600 return -EINVAL;
3601 return gpiod_get_array_value_complex(true, true, array_size,
77588c14
JK
3602 desc_array, array_info,
3603 value_bitmap);
eec1d566
LW
3604}
3605EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
3606
3607/**
3608 * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
b9762beb 3609 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3610 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3611 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3612 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3613 *
3614 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3615 * into account. Return 0 in case of success, else an error code.
3616 *
3617 * This function is to be called from contexts that can sleep.
3618 */
3619int gpiod_get_array_value_cansleep(unsigned int array_size,
3620 struct gpio_desc **desc_array,
77588c14 3621 struct gpio_array *array_info,
b9762beb 3622 unsigned long *value_bitmap)
eec1d566
LW
3623{
3624 might_sleep_if(extra_checks);
3625 if (!desc_array)
3626 return -EINVAL;
3627 return gpiod_get_array_value_complex(false, true, array_size,
77588c14
JK
3628 desc_array, array_info,
3629 value_bitmap);
eec1d566
LW
3630}
3631EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
3632
79a9becd
AC
3633/**
3634 * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
3635 * @desc: gpio whose value will be assigned
3636 * @value: value to assign
3637 *
3638 * Set the raw value of the GPIO, i.e. the value of its physical line without
3639 * regard for its ACTIVE_LOW status.
3640 *
3641 * This function is to be called from contexts that can sleep.
3642 */
3643void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
372e722e 3644{
d2876d08 3645 might_sleep_if(extra_checks);
fdeb8e15 3646 VALIDATE_DESC_VOID(desc);
fac9d885 3647 gpiod_set_raw_value_commit(desc, value);
372e722e 3648}
79a9becd 3649EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
d2876d08 3650
79a9becd
AC
3651/**
3652 * gpiod_set_value_cansleep() - assign a gpio's value
3653 * @desc: gpio whose value will be assigned
3654 * @value: value to assign
3655 *
3656 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
3657 * account
3658 *
3659 * This function is to be called from contexts that can sleep.
3660 */
3661void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
d2876d08 3662{
d2876d08 3663 might_sleep_if(extra_checks);
fdeb8e15 3664 VALIDATE_DESC_VOID(desc);
1e77fc82 3665 gpiod_set_value_nocheck(desc, value);
372e722e 3666}
79a9becd 3667EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
d2876d08 3668
5f424243 3669/**
3fff99bc 3670 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3671 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3672 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3673 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3674 * @value_bitmap: bitmap of values to assign
5f424243
RI
3675 *
3676 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3677 * without regard for their ACTIVE_LOW status.
3678 *
3679 * This function is to be called from contexts that can sleep.
3680 */
3027743f 3681int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3c940660
GU
3682 struct gpio_desc **desc_array,
3683 struct gpio_array *array_info,
3684 unsigned long *value_bitmap)
5f424243
RI
3685{
3686 might_sleep_if(extra_checks);
3687 if (!desc_array)
3027743f
LA
3688 return -EINVAL;
3689 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
77588c14 3690 array_info, value_bitmap);
5f424243 3691}
3fff99bc 3692EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
5f424243 3693
3946d187
DT
3694/**
3695 * gpiod_add_lookup_tables() - register GPIO device consumers
3696 * @tables: list of tables of consumers to register
3697 * @n: number of tables in the list
3698 */
3699void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
3700{
3701 unsigned int i;
3702
3703 mutex_lock(&gpio_lookup_lock);
3704
3705 for (i = 0; i < n; i++)
3706 list_add_tail(&tables[i]->list, &gpio_lookup_list);
3707
3708 mutex_unlock(&gpio_lookup_lock);
3709}
3710
5f424243 3711/**
3fff99bc 3712 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3713 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3714 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3715 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3716 * @value_bitmap: bitmap of values to assign
5f424243
RI
3717 *
3718 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3719 * into account.
3720 *
3721 * This function is to be called from contexts that can sleep.
3722 */
cf9af0d5
GU
3723int gpiod_set_array_value_cansleep(unsigned int array_size,
3724 struct gpio_desc **desc_array,
3725 struct gpio_array *array_info,
3726 unsigned long *value_bitmap)
5f424243
RI
3727{
3728 might_sleep_if(extra_checks);
3729 if (!desc_array)
cf9af0d5
GU
3730 return -EINVAL;
3731 return gpiod_set_array_value_complex(false, true, array_size,
3732 desc_array, array_info,
3733 value_bitmap);
5f424243 3734}
3fff99bc 3735EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
5f424243 3736
bae48da2 3737/**
ad824783
AC
3738 * gpiod_add_lookup_table() - register GPIO device consumers
3739 * @table: table of consumers to register
bae48da2 3740 */
ad824783 3741void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
bae48da2 3742{
49fdfe66 3743 gpiod_add_lookup_tables(&table, 1);
bae48da2 3744}
226b2242 3745EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
bae48da2 3746
be9015ab
SK
3747/**
3748 * gpiod_remove_lookup_table() - unregister GPIO device consumers
3749 * @table: table of consumers to unregister
3750 */
3751void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
3752{
d321ad12
AS
3753 /* Nothing to remove */
3754 if (!table)
3755 return;
3756
be9015ab
SK
3757 mutex_lock(&gpio_lookup_lock);
3758
3759 list_del(&table->list);
3760
3761 mutex_unlock(&gpio_lookup_lock);
3762}
226b2242 3763EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
be9015ab 3764
a411e81e
BG
3765/**
3766 * gpiod_add_hogs() - register a set of GPIO hogs from machine code
3767 * @hogs: table of gpio hog entries with a zeroed sentinel at the end
3768 */
3769void gpiod_add_hogs(struct gpiod_hog *hogs)
3770{
a0b66a73 3771 struct gpio_chip *gc;
a411e81e
BG
3772 struct gpiod_hog *hog;
3773
3774 mutex_lock(&gpio_machine_hogs_mutex);
3775
3776 for (hog = &hogs[0]; hog->chip_label; hog++) {
3777 list_add_tail(&hog->list, &gpio_machine_hogs);
3778
3779 /*
3780 * The chip may have been registered earlier, so check if it
3781 * exists and, if so, try to hog the line now.
3782 */
a0b66a73
LW
3783 gc = find_chip_by_name(hog->chip_label);
3784 if (gc)
3785 gpiochip_machine_hog(gc, hog);
a411e81e
BG
3786 }
3787
3788 mutex_unlock(&gpio_machine_hogs_mutex);
3789}
3790EXPORT_SYMBOL_GPL(gpiod_add_hogs);
3791
dd61b292
BG
3792void gpiod_remove_hogs(struct gpiod_hog *hogs)
3793{
3794 struct gpiod_hog *hog;
3795
3796 mutex_lock(&gpio_machine_hogs_mutex);
3797 for (hog = &hogs[0]; hog->chip_label; hog++)
3798 list_del(&hog->list);
3799 mutex_unlock(&gpio_machine_hogs_mutex);
3800}
3801EXPORT_SYMBOL_GPL(gpiod_remove_hogs);
3802
ad824783 3803static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
bae48da2
AC
3804{
3805 const char *dev_id = dev ? dev_name(dev) : NULL;
ad824783 3806 struct gpiod_lookup_table *table;
bae48da2
AC
3807
3808 mutex_lock(&gpio_lookup_lock);
3809
ad824783
AC
3810 list_for_each_entry(table, &gpio_lookup_list, list) {
3811 if (table->dev_id && dev_id) {
3812 /*
3813 * Valid strings on both ends, must be identical to have
3814 * a match
3815 */
3816 if (!strcmp(table->dev_id, dev_id))
3817 goto found;
3818 } else {
3819 /*
3820 * One of the pointers is NULL, so both must be to have
3821 * a match
3822 */
3823 if (dev_id == table->dev_id)
3824 goto found;
3825 }
3826 }
3827 table = NULL;
bae48da2 3828
ad824783
AC
3829found:
3830 mutex_unlock(&gpio_lookup_lock);
3831 return table;
3832}
bae48da2 3833
ad824783 3834static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
fed7026a 3835 unsigned int idx, unsigned long *flags)
ad824783 3836{
2a3cf6a3 3837 struct gpio_desc *desc = ERR_PTR(-ENOENT);
ad824783
AC
3838 struct gpiod_lookup_table *table;
3839 struct gpiod_lookup *p;
bae48da2 3840
ad824783
AC
3841 table = gpiod_find_lookup_table(dev);
3842 if (!table)
3843 return desc;
bae48da2 3844
4c033b54 3845 for (p = &table->table[0]; p->key; p++) {
a0b66a73 3846 struct gpio_chip *gc;
bae48da2 3847
ad824783 3848 /* idx must always match exactly */
bae48da2
AC
3849 if (p->idx != idx)
3850 continue;
3851
ad824783
AC
3852 /* If the lookup entry has a con_id, require exact match */
3853 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
3854 continue;
bae48da2 3855
4c033b54
GU
3856 if (p->chip_hwnum == U16_MAX) {
3857 desc = gpio_name_to_desc(p->key);
3858 if (desc) {
3859 *flags = p->flags;
3860 return desc;
3861 }
3862
3863 dev_warn(dev, "cannot find GPIO line %s, deferring\n",
3864 p->key);
3865 return ERR_PTR(-EPROBE_DEFER);
3866 }
3867
3868 gc = find_chip_by_name(p->key);
bae48da2 3869
a0b66a73 3870 if (!gc) {
8853daf3
JK
3871 /*
3872 * As the lookup table indicates a chip with
4c033b54 3873 * p->key should exist, assume it may
8853daf3
JK
3874 * still appear later and let the interested
3875 * consumer be probed again or let the Deferred
3876 * Probe infrastructure handle the error.
3877 */
3878 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
4c033b54 3879 p->key);
8853daf3 3880 return ERR_PTR(-EPROBE_DEFER);
ad824783 3881 }
bae48da2 3882
a0b66a73 3883 if (gc->ngpio <= p->chip_hwnum) {
2a3cf6a3 3884 dev_err(dev,
d935bd50 3885 "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n",
a0b66a73
LW
3886 idx, p->chip_hwnum, gc->ngpio - 1,
3887 gc->label);
2a3cf6a3 3888 return ERR_PTR(-EINVAL);
bae48da2 3889 }
bae48da2 3890
a0b66a73 3891 desc = gpiochip_get_desc(gc, p->chip_hwnum);
ad824783 3892 *flags = p->flags;
bae48da2 3893
2a3cf6a3 3894 return desc;
bae48da2
AC
3895 }
3896
bae48da2
AC
3897 return desc;
3898}
3899
66858527
RI
3900static int platform_gpio_count(struct device *dev, const char *con_id)
3901{
3902 struct gpiod_lookup_table *table;
3903 struct gpiod_lookup *p;
3904 unsigned int count = 0;
3905
3906 table = gpiod_find_lookup_table(dev);
3907 if (!table)
3908 return -ENOENT;
3909
4c033b54 3910 for (p = &table->table[0]; p->key; p++) {
66858527
RI
3911 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
3912 (!con_id && !p->con_id))
3913 count++;
3914 }
3915 if (!count)
3916 return -ENOENT;
3917
3918 return count;
3919}
3920
8eb1f71e
DT
3921static struct gpio_desc *gpiod_find_by_fwnode(struct fwnode_handle *fwnode,
3922 struct device *consumer,
3923 const char *con_id,
3924 unsigned int idx,
3925 enum gpiod_flags *flags,
3926 unsigned long *lookupflags)
0eadd36d 3927{
8eb1f71e 3928 struct gpio_desc *desc = ERR_PTR(-ENOENT);
0eadd36d
DT
3929
3930 if (is_of_node(fwnode)) {
8eb1f71e
DT
3931 dev_dbg(consumer, "using DT '%pfw' for '%s' GPIO lookup\n",
3932 fwnode, con_id);
3933 desc = of_find_gpio(to_of_node(fwnode), con_id, idx, lookupflags);
0eadd36d 3934 } else if (is_acpi_node(fwnode)) {
8eb1f71e
DT
3935 dev_dbg(consumer, "using ACPI '%pfw' for '%s' GPIO lookup\n",
3936 fwnode, con_id);
3937 desc = acpi_find_gpio(fwnode, con_id, idx, flags, lookupflags);
e7f9ff5d
DT
3938 } else if (is_software_node(fwnode)) {
3939 dev_dbg(consumer, "using swnode '%pfw' for '%s' GPIO lookup\n",
3940 fwnode, con_id);
3941 desc = swnode_find_gpio(fwnode, con_id, idx, lookupflags);
0eadd36d 3942 }
0eadd36d 3943
8eb1f71e
DT
3944 return desc;
3945}
0eadd36d 3946
8eb1f71e
DT
3947static struct gpio_desc *gpiod_find_and_request(struct device *consumer,
3948 struct fwnode_handle *fwnode,
3949 const char *con_id,
3950 unsigned int idx,
3951 enum gpiod_flags flags,
3952 const char *label,
3953 bool platform_lookup_allowed)
3954{
ba2dc1cb 3955 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
c122f461 3956 struct gpio_desc *desc;
8eb1f71e
DT
3957 int ret;
3958
c122f461 3959 desc = gpiod_find_by_fwnode(fwnode, consumer, con_id, idx, &flags, &lookupflags);
8eb1f71e
DT
3960 if (gpiod_not_found(desc) && platform_lookup_allowed) {
3961 /*
3962 * Either we are not using DT or ACPI, or their lookup did not
3963 * return a result. In that case, use platform lookup as a
3964 * fallback.
3965 */
3966 dev_dbg(consumer, "using lookup tables for GPIO lookup\n");
3967 desc = gpiod_find(consumer, con_id, idx, &lookupflags);
0eadd36d
DT
3968 }
3969
8eb1f71e
DT
3970 if (IS_ERR(desc)) {
3971 dev_dbg(consumer, "No GPIO consumer %s found\n", con_id);
3972 return desc;
3973 }
3974
3975 /*
3976 * If a connection label was passed use that, else attempt to use
3977 * the device name as label
3978 */
0eadd36d 3979 ret = gpiod_request(desc, label);
8eb1f71e
DT
3980 if (ret) {
3981 if (!(ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE))
3982 return ERR_PTR(ret);
0eadd36d 3983
8eb1f71e
DT
3984 /*
3985 * This happens when there are several consumers for
3986 * the same GPIO line: we just return here without
3987 * further initialization. It is a bit of a hack.
3988 * This is necessary to support fixed regulators.
3989 *
3990 * FIXME: Make this more sane and safe.
3991 */
3992 dev_info(consumer,
3993 "nonexclusive access to GPIO for %s\n", con_id);
3994 return desc;
3995 }
0eadd36d 3996
8eb1f71e 3997 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
0eadd36d 3998 if (ret < 0) {
8eb1f71e 3999 dev_dbg(consumer, "setup of GPIO %s failed\n", con_id);
0eadd36d
DT
4000 gpiod_put(desc);
4001 return ERR_PTR(ret);
4002 }
4003
4004 blocking_notifier_call_chain(&desc->gdev->notifier,
4005 GPIOLINE_CHANGED_REQUESTED, desc);
4006
4007 return desc;
4008}
4009
13949fa9
DT
4010/**
4011 * fwnode_gpiod_get_index - obtain a GPIO from firmware node
4012 * @fwnode: handle of the firmware node
4013 * @con_id: function within the GPIO consumer
4014 * @index: index of the GPIO to obtain for the consumer
4015 * @flags: GPIO initialization flags
4016 * @label: label to attach to the requested GPIO
4017 *
4018 * This function can be used for drivers that get their configuration
4019 * from opaque firmware.
4020 *
4021 * The function properly finds the corresponding GPIO using whatever is the
4022 * underlying firmware interface and then makes sure that the GPIO
4023 * descriptor is requested before it is returned to the caller.
4024 *
4025 * Returns:
4026 * On successful request the GPIO pin is configured in accordance with
4027 * provided @flags.
4028 *
4029 * In case of error an ERR_PTR() is returned.
4030 */
4031struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
8eb1f71e
DT
4032 const char *con_id,
4033 int index,
13949fa9
DT
4034 enum gpiod_flags flags,
4035 const char *label)
4036{
8eb1f71e 4037 return gpiod_find_and_request(NULL, fwnode, con_id, index, flags, label, false);
13949fa9
DT
4038}
4039EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
4040
66858527
RI
4041/**
4042 * gpiod_count - return the number of GPIOs associated with a device / function
4043 * or -ENOENT if no GPIO has been assigned to the requested function
4044 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4045 * @con_id: function within the GPIO consumer
4046 */
4047int gpiod_count(struct device *dev, const char *con_id)
4048{
944f4b0a 4049 const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
66858527
RI
4050 int count = -ENOENT;
4051
944f4b0a 4052 if (is_of_node(fwnode))
f626d6df 4053 count = of_gpio_get_count(dev, con_id);
944f4b0a 4054 else if (is_acpi_node(fwnode))
66858527 4055 count = acpi_gpio_count(dev, con_id);
e7f9ff5d
DT
4056 else if (is_software_node(fwnode))
4057 count = swnode_gpio_count(fwnode, con_id);
66858527
RI
4058
4059 if (count < 0)
4060 count = platform_gpio_count(dev, con_id);
4061
4062 return count;
4063}
4064EXPORT_SYMBOL_GPL(gpiod_count);
4065
bae48da2 4066/**
0879162f 4067 * gpiod_get - obtain a GPIO for a given GPIO function
ad824783 4068 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2 4069 * @con_id: function within the GPIO consumer
39b2bbe3 4070 * @flags: optional GPIO initialization flags
bae48da2
AC
4071 *
4072 * Return the GPIO descriptor corresponding to the function con_id of device
2a3cf6a3 4073 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
20a8a968 4074 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
bae48da2 4075 */
b17d1bf1 4076struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
39b2bbe3 4077 enum gpiod_flags flags)
bae48da2 4078{
39b2bbe3 4079 return gpiod_get_index(dev, con_id, 0, flags);
bae48da2 4080}
b17d1bf1 4081EXPORT_SYMBOL_GPL(gpiod_get);
bae48da2 4082
29a1f233
TR
4083/**
4084 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
4085 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4086 * @con_id: function within the GPIO consumer
39b2bbe3 4087 * @flags: optional GPIO initialization flags
29a1f233
TR
4088 *
4089 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
4090 * the requested function it will return NULL. This is convenient for drivers
4091 * that need to handle optional GPIOs.
4092 */
b17d1bf1 4093struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
39b2bbe3
AC
4094 const char *con_id,
4095 enum gpiod_flags flags)
29a1f233 4096{
39b2bbe3 4097 return gpiod_get_index_optional(dev, con_id, 0, flags);
29a1f233 4098}
b17d1bf1 4099EXPORT_SYMBOL_GPL(gpiod_get_optional);
29a1f233 4100
f625d460
BP
4101
4102/**
4103 * gpiod_configure_flags - helper function to configure a given GPIO
4104 * @desc: gpio whose value will be assigned
4105 * @con_id: function within the GPIO consumer
fed7026a
AS
4106 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4107 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4108 * @dflags: gpiod_flags - optional GPIO initialization flags
4109 *
4110 * Return 0 on success, -ENOENT if no GPIO has been assigned to the
4111 * requested function and/or index, or another IS_ERR() code if an error
4112 * occurred while trying to acquire the GPIO.
4113 */
c29fd9eb 4114int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
85b03b30 4115 unsigned long lflags, enum gpiod_flags dflags)
f625d460 4116{
d377f56f 4117 int ret;
f625d460 4118
85b03b30
JH
4119 if (lflags & GPIO_ACTIVE_LOW)
4120 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
f926dfc1 4121
85b03b30
JH
4122 if (lflags & GPIO_OPEN_DRAIN)
4123 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
f926dfc1
LW
4124 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
4125 /*
4126 * This enforces open drain mode from the consumer side.
4127 * This is necessary for some busses like I2C, but the lookup
4128 * should *REALLY* have specified them as open drain in the
4129 * first place, so print a little warning here.
4130 */
4131 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
4132 gpiod_warn(desc,
4133 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
4134 }
4135
85b03b30
JH
4136 if (lflags & GPIO_OPEN_SOURCE)
4137 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
e10f72bf 4138
c269df8c
NS
4139 if (((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) ||
4140 ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DISABLE)) ||
4141 ((lflags & GPIO_PULL_DOWN) && (lflags & GPIO_PULL_DISABLE))) {
d449991c 4142 gpiod_err(desc,
c269df8c 4143 "multiple pull-up, pull-down or pull-disable enabled, invalid configuration\n");
d449991c
TP
4144 return -EINVAL;
4145 }
4146
4147 if (lflags & GPIO_PULL_UP)
4148 set_bit(FLAG_PULL_UP, &desc->flags);
4149 else if (lflags & GPIO_PULL_DOWN)
4150 set_bit(FLAG_PULL_DOWN, &desc->flags);
c269df8c
NS
4151 else if (lflags & GPIO_PULL_DISABLE)
4152 set_bit(FLAG_BIAS_DISABLE, &desc->flags);
d449991c 4153
d377f56f
LW
4154 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
4155 if (ret < 0)
4156 return ret;
85b03b30 4157
f625d460
BP
4158 /* No particular flag request, return here... */
4159 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
262b9011 4160 gpiod_dbg(desc, "no flags found for %s\n", con_id);
f625d460
BP
4161 return 0;
4162 }
4163
4164 /* Process flags */
4165 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
d377f56f 4166 ret = gpiod_direction_output(desc,
ad17731d 4167 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
f625d460 4168 else
d377f56f 4169 ret = gpiod_direction_input(desc);
f625d460 4170
d377f56f 4171 return ret;
f625d460
BP
4172}
4173
bae48da2
AC
4174/**
4175 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
fdd6a5fe 4176 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2
AC
4177 * @con_id: function within the GPIO consumer
4178 * @idx: index of the GPIO to obtain in the consumer
39b2bbe3 4179 * @flags: optional GPIO initialization flags
bae48da2
AC
4180 *
4181 * This variant of gpiod_get() allows to access GPIOs other than the first
4182 * defined one for functions that define several GPIOs.
4183 *
2a3cf6a3
AC
4184 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
4185 * requested function and/or index, or another IS_ERR() code if an error
20a8a968 4186 * occurred while trying to acquire the GPIO.
bae48da2 4187 */
b17d1bf1 4188struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
bae48da2 4189 const char *con_id,
39b2bbe3
AC
4190 unsigned int idx,
4191 enum gpiod_flags flags)
bae48da2 4192{
07445ae1 4193 struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
7d18f0a1 4194 const char *devname = dev ? dev_name(dev) : "?";
8eb1f71e 4195 const char *label = con_id ?: devname;
bae48da2 4196
8eb1f71e 4197 return gpiod_find_and_request(dev, fwnode, con_id, idx, flags, label, true);
6392cca4 4198}
b17d1bf1 4199EXPORT_SYMBOL_GPL(gpiod_get_index);
6392cca4 4200
29a1f233
TR
4201/**
4202 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
4203 * function
4204 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4205 * @con_id: function within the GPIO consumer
4206 * @index: index of the GPIO to obtain in the consumer
39b2bbe3 4207 * @flags: optional GPIO initialization flags
29a1f233
TR
4208 *
4209 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
4210 * specified index was assigned to the requested function it will return NULL.
4211 * This is convenient for drivers that need to handle optional GPIOs.
4212 */
b17d1bf1 4213struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
29a1f233 4214 const char *con_id,
39b2bbe3
AC
4215 unsigned int index,
4216 enum gpiod_flags flags)
29a1f233
TR
4217{
4218 struct gpio_desc *desc;
4219
39b2bbe3 4220 desc = gpiod_get_index(dev, con_id, index, flags);
7b58696d
AS
4221 if (gpiod_not_found(desc))
4222 return NULL;
29a1f233
TR
4223
4224 return desc;
4225}
b17d1bf1 4226EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
29a1f233 4227
f625d460
BP
4228/**
4229 * gpiod_hog - Hog the specified GPIO desc given the provided flags
4230 * @desc: gpio whose value will be assigned
4231 * @name: gpio line name
fed7026a
AS
4232 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4233 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4234 * @dflags: gpiod_flags - optional GPIO initialization flags
4235 */
4236int gpiod_hog(struct gpio_desc *desc, const char *name,
4237 unsigned long lflags, enum gpiod_flags dflags)
4238{
a0b66a73 4239 struct gpio_chip *gc;
f625d460
BP
4240 struct gpio_desc *local_desc;
4241 int hwnum;
d377f56f 4242 int ret;
f625d460 4243
a0b66a73 4244 gc = gpiod_to_chip(desc);
f625d460
BP
4245 hwnum = gpio_chip_hwgpio(desc);
4246
a0b66a73 4247 local_desc = gpiochip_request_own_desc(gc, hwnum, name,
5923ea6c 4248 lflags, dflags);
f625d460 4249 if (IS_ERR(local_desc)) {
d377f56f 4250 ret = PTR_ERR(local_desc);
c31a571d 4251 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
a0b66a73 4252 name, gc->label, hwnum, ret);
d377f56f 4253 return ret;
f625d460
BP
4254 }
4255
f625d460
BP
4256 /* Mark GPIO as hogged so it can be identified and removed later */
4257 set_bit(FLAG_IS_HOGGED, &desc->flags);
4258
be6736cc 4259 gpiod_dbg(desc, "hogged as %s%s\n",
b27f300f
BG
4260 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
4261 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
4262 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
f625d460
BP
4263
4264 return 0;
4265}
4266
4267/**
4268 * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
a0b66a73 4269 * @gc: gpio chip to act on
f625d460 4270 */
a0b66a73 4271static void gpiochip_free_hogs(struct gpio_chip *gc)
f625d460 4272{
80c78fbe 4273 struct gpio_desc *desc;
f625d460 4274
57017edd 4275 for_each_gpio_desc_with_flag(gc, desc, FLAG_IS_HOGGED)
80c78fbe 4276 gpiochip_free_own_desc(desc);
f625d460
BP
4277}
4278
66858527
RI
4279/**
4280 * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
4281 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4282 * @con_id: function within the GPIO consumer
4283 * @flags: optional GPIO initialization flags
4284 *
4285 * This function acquires all the GPIOs defined under a given function.
4286 *
4287 * Return a struct gpio_descs containing an array of descriptors, -ENOENT if
4288 * no GPIO has been assigned to the requested function, or another IS_ERR()
4289 * code if an error occurred while trying to acquire the GPIOs.
4290 */
4291struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
4292 const char *con_id,
4293 enum gpiod_flags flags)
4294{
4295 struct gpio_desc *desc;
4296 struct gpio_descs *descs;
bf9346f5 4297 struct gpio_array *array_info = NULL;
a0b66a73 4298 struct gpio_chip *gc;
bf9346f5 4299 int count, bitmap_size;
79736429 4300 size_t descs_size;
66858527
RI
4301
4302 count = gpiod_count(dev, con_id);
4303 if (count < 0)
4304 return ERR_PTR(count);
4305
79736429
AS
4306 descs_size = struct_size(descs, desc, count);
4307 descs = kzalloc(descs_size, GFP_KERNEL);
66858527
RI
4308 if (!descs)
4309 return ERR_PTR(-ENOMEM);
4310
4ea0c977 4311 for (descs->ndescs = 0; descs->ndescs < count; descs->ndescs++) {
66858527
RI
4312 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
4313 if (IS_ERR(desc)) {
4314 gpiod_put_array(descs);
4315 return ERR_CAST(desc);
4316 }
bf9346f5 4317
66858527 4318 descs->desc[descs->ndescs] = desc;
bf9346f5 4319
a0b66a73 4320 gc = gpiod_to_chip(desc);
bf9346f5 4321 /*
c4c958aa
JK
4322 * If pin hardware number of array member 0 is also 0, select
4323 * its chip as a candidate for fast bitmap processing path.
bf9346f5 4324 */
c4c958aa 4325 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
bf9346f5
JK
4326 struct gpio_descs *array;
4327
a0b66a73
LW
4328 bitmap_size = BITS_TO_LONGS(gc->ngpio > count ?
4329 gc->ngpio : count);
bf9346f5 4330
79736429
AS
4331 array = krealloc(descs, descs_size +
4332 struct_size(array_info, invert_mask, 3 * bitmap_size),
4333 GFP_KERNEL | __GFP_ZERO);
bf9346f5
JK
4334 if (!array) {
4335 gpiod_put_array(descs);
4336 return ERR_PTR(-ENOMEM);
4337 }
4338
bf9346f5 4339 descs = array;
79736429
AS
4340
4341 array_info = (void *)descs + descs_size;
bf9346f5
JK
4342 array_info->get_mask = array_info->invert_mask +
4343 bitmap_size;
4344 array_info->set_mask = array_info->get_mask +
4345 bitmap_size;
4346
4347 array_info->desc = descs->desc;
4348 array_info->size = count;
a0b66a73 4349 array_info->chip = gc;
bf9346f5
JK
4350 bitmap_set(array_info->get_mask, descs->ndescs,
4351 count - descs->ndescs);
4352 bitmap_set(array_info->set_mask, descs->ndescs,
4353 count - descs->ndescs);
4354 descs->info = array_info;
4355 }
4ea0c977
AS
4356
4357 /* If there is no cache for fast bitmap processing path, continue */
4358 if (!array_info)
4359 continue;
4360
c4c958aa 4361 /* Unmark array members which don't belong to the 'fast' chip */
4ea0c977 4362 if (array_info->chip != gc) {
bf9346f5
JK
4363 __clear_bit(descs->ndescs, array_info->get_mask);
4364 __clear_bit(descs->ndescs, array_info->set_mask);
c4c958aa
JK
4365 }
4366 /*
4367 * Detect array members which belong to the 'fast' chip
4368 * but their pins are not in hardware order.
4369 */
4ea0c977 4370 else if (gpio_chip_hwgpio(desc) != descs->ndescs) {
c4c958aa
JK
4371 /*
4372 * Don't use fast path if all array members processed so
4373 * far belong to the same chip as this one but its pin
4374 * hardware number is different from its array index.
4375 */
4376 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
4377 array_info = NULL;
4378 } else {
4379 __clear_bit(descs->ndescs,
4380 array_info->get_mask);
4381 __clear_bit(descs->ndescs,
4382 array_info->set_mask);
4383 }
4ea0c977 4384 } else {
bf9346f5 4385 /* Exclude open drain or open source from fast output */
a0b66a73
LW
4386 if (gpiochip_line_is_open_drain(gc, descs->ndescs) ||
4387 gpiochip_line_is_open_source(gc, descs->ndescs))
bf9346f5
JK
4388 __clear_bit(descs->ndescs,
4389 array_info->set_mask);
4390 /* Identify 'fast' pins which require invertion */
4391 if (gpiod_is_active_low(desc))
4392 __set_bit(descs->ndescs,
4393 array_info->invert_mask);
4394 }
66858527 4395 }
bf9346f5
JK
4396 if (array_info)
4397 dev_dbg(dev,
4398 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
4399 array_info->chip->label, array_info->size,
4400 *array_info->get_mask, *array_info->set_mask,
4401 *array_info->invert_mask);
66858527
RI
4402 return descs;
4403}
4404EXPORT_SYMBOL_GPL(gpiod_get_array);
4405
4406/**
4407 * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
4408 * function
4409 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4410 * @con_id: function within the GPIO consumer
4411 * @flags: optional GPIO initialization flags
4412 *
4413 * This is equivalent to gpiod_get_array(), except that when no GPIO was
4414 * assigned to the requested function it will return NULL.
4415 */
4416struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
4417 const char *con_id,
4418 enum gpiod_flags flags)
4419{
4420 struct gpio_descs *descs;
4421
4422 descs = gpiod_get_array(dev, con_id, flags);
7b58696d 4423 if (gpiod_not_found(descs))
66858527
RI
4424 return NULL;
4425
4426 return descs;
4427}
4428EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
4429
bae48da2
AC
4430/**
4431 * gpiod_put - dispose of a GPIO descriptor
4432 * @desc: GPIO descriptor to dispose of
4433 *
4434 * No descriptor can be used after gpiod_put() has been called on it.
4435 */
4436void gpiod_put(struct gpio_desc *desc)
4437{
1d7765ba
AS
4438 if (desc)
4439 gpiod_free(desc);
372e722e 4440}
bae48da2 4441EXPORT_SYMBOL_GPL(gpiod_put);
d2876d08 4442
66858527
RI
4443/**
4444 * gpiod_put_array - dispose of multiple GPIO descriptors
4445 * @descs: struct gpio_descs containing an array of descriptors
4446 */
4447void gpiod_put_array(struct gpio_descs *descs)
4448{
4449 unsigned int i;
4450
4451 for (i = 0; i < descs->ndescs; i++)
4452 gpiod_put(descs->desc[i]);
4453
4454 kfree(descs);
4455}
4456EXPORT_SYMBOL_GPL(gpiod_put_array);
4457
4731210c
SK
4458static int gpio_stub_drv_probe(struct device *dev)
4459{
4460 /*
4461 * The DT node of some GPIO chips have a "compatible" property, but
4462 * never have a struct device added and probed by a driver to register
4463 * the GPIO chip with gpiolib. In such cases, fw_devlink=on will cause
4464 * the consumers of the GPIO chip to get probe deferred forever because
4465 * they will be waiting for a device associated with the GPIO chip
4466 * firmware node to get added and bound to a driver.
4467 *
4468 * To allow these consumers to probe, we associate the struct
4469 * gpio_device of the GPIO chip with the firmware node and then simply
4470 * bind it to this stub driver.
4471 */
4472 return 0;
4473}
4474
4475static struct device_driver gpio_stub_drv = {
4476 .name = "gpio_stub_drv",
4477 .bus = &gpio_bus_type,
4478 .probe = gpio_stub_drv_probe,
4479};
4480
3c702e99
LW
4481static int __init gpiolib_dev_init(void)
4482{
4483 int ret;
4484
4485 /* Register GPIO sysfs bus */
b1911710 4486 ret = bus_register(&gpio_bus_type);
3c702e99
LW
4487 if (ret < 0) {
4488 pr_err("gpiolib: could not register GPIO bus type\n");
4489 return ret;
4490 }
4491
3875721e
WY
4492 ret = driver_register(&gpio_stub_drv);
4493 if (ret < 0) {
4731210c
SK
4494 pr_err("gpiolib: could not register GPIO stub driver\n");
4495 bus_unregister(&gpio_bus_type);
4496 return ret;
4497 }
4498
ddd8891e 4499 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME);
3c702e99
LW
4500 if (ret < 0) {
4501 pr_err("gpiolib: failed to allocate char dev region\n");
4731210c 4502 driver_unregister(&gpio_stub_drv);
3c702e99 4503 bus_unregister(&gpio_bus_type);
63636d95 4504 return ret;
3c702e99 4505 }
63636d95
GU
4506
4507 gpiolib_initialized = true;
4508 gpiochip_setup_devs();
4509
8650b609
DG
4510#if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO)
4511 WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier));
4512#endif /* CONFIG_OF_DYNAMIC && CONFIG_OF_GPIO */
63636d95 4513
3c702e99
LW
4514 return ret;
4515}
4516core_initcall(gpiolib_dev_init);
4517
d2876d08
DB
4518#ifdef CONFIG_DEBUG_FS
4519
fdeb8e15 4520static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
d2876d08 4521{
a0b66a73 4522 struct gpio_chip *gc = gdev->chip;
3de69ae1 4523 struct gpio_desc *desc;
fdeb8e15 4524 unsigned gpio = gdev->base;
3de69ae1 4525 int value;
90fd2270
LW
4526 bool is_out;
4527 bool is_irq;
4528 bool active_low;
d2876d08 4529
3de69ae1
AS
4530 for_each_gpio_desc(gc, desc) {
4531 if (test_bit(FLAG_REQUESTED, &desc->flags)) {
4532 gpiod_get_direction(desc);
4533 is_out = test_bit(FLAG_IS_OUT, &desc->flags);
234c5209 4534 value = gpio_chip_get_value(gc, desc);
3de69ae1
AS
4535 is_irq = test_bit(FLAG_USED_AS_IRQ, &desc->flags);
4536 active_low = test_bit(FLAG_ACTIVE_LOW, &desc->flags);
4537 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s\n",
4538 gpio, desc->name ?: "", desc->label,
4539 is_out ? "out" : "in ",
4540 value >= 0 ? (value ? "hi" : "lo") : "? ",
4541 is_irq ? "IRQ " : "",
4542 active_low ? "ACTIVE LOW" : "");
4543 } else if (desc->name) {
4544 seq_printf(s, " gpio-%-3d (%-20.20s)\n", gpio, desc->name);
ced433e2 4545 }
d2876d08 4546
3de69ae1 4547 gpio++;
d2876d08
DB
4548 }
4549}
4550
f9c4a31f 4551static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
d2876d08 4552{
362432ae 4553 unsigned long flags;
ff2b1359 4554 struct gpio_device *gdev = NULL;
cb1650d4 4555 loff_t index = *pos;
d2876d08 4556
f9c4a31f 4557 s->private = "";
d2876d08 4558
362432ae 4559 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4560 list_for_each_entry(gdev, &gpio_devices, list)
362432ae
GL
4561 if (index-- == 0) {
4562 spin_unlock_irqrestore(&gpio_lock, flags);
ff2b1359 4563 return gdev;
f9c4a31f 4564 }
362432ae 4565 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f 4566
cb1650d4 4567 return NULL;
f9c4a31f
TR
4568}
4569
4570static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
4571{
362432ae 4572 unsigned long flags;
ff2b1359 4573 struct gpio_device *gdev = v;
f9c4a31f
TR
4574 void *ret = NULL;
4575
362432ae 4576 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4577 if (list_is_last(&gdev->list, &gpio_devices))
cb1650d4
AC
4578 ret = NULL;
4579 else
243cfa6a 4580 ret = list_first_entry(&gdev->list, struct gpio_device, list);
362432ae 4581 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f
TR
4582
4583 s->private = "\n";
4584 ++*pos;
4585
4586 return ret;
4587}
4588
4589static void gpiolib_seq_stop(struct seq_file *s, void *v)
4590{
4591}
4592
4593static int gpiolib_seq_show(struct seq_file *s, void *v)
4594{
ff2b1359 4595 struct gpio_device *gdev = v;
a0b66a73 4596 struct gpio_chip *gc = gdev->chip;
ff2b1359
LW
4597 struct device *parent;
4598
a0b66a73 4599 if (!gc) {
ff2b1359
LW
4600 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
4601 dev_name(&gdev->dev));
4602 return 0;
4603 }
f9c4a31f 4604
ff2b1359
LW
4605 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
4606 dev_name(&gdev->dev),
fdeb8e15 4607 gdev->base, gdev->base + gdev->ngpio - 1);
a0b66a73 4608 parent = gc->parent;
ff2b1359
LW
4609 if (parent)
4610 seq_printf(s, ", parent: %s/%s",
4611 parent->bus ? parent->bus->name : "no-bus",
4612 dev_name(parent));
a0b66a73
LW
4613 if (gc->label)
4614 seq_printf(s, ", %s", gc->label);
4615 if (gc->can_sleep)
f9c4a31f
TR
4616 seq_printf(s, ", can sleep");
4617 seq_printf(s, ":\n");
4618
a0b66a73
LW
4619 if (gc->dbg_show)
4620 gc->dbg_show(s, gc);
f9c4a31f 4621 else
fdeb8e15 4622 gpiolib_dbg_show(s, gdev);
f9c4a31f 4623
d2876d08
DB
4624 return 0;
4625}
4626
425c5b3e 4627static const struct seq_operations gpiolib_sops = {
f9c4a31f
TR
4628 .start = gpiolib_seq_start,
4629 .next = gpiolib_seq_next,
4630 .stop = gpiolib_seq_stop,
4631 .show = gpiolib_seq_show,
4632};
425c5b3e 4633DEFINE_SEQ_ATTRIBUTE(gpiolib);
d2876d08
DB
4634
4635static int __init gpiolib_debugfs_init(void)
4636{
4637 /* /sys/kernel/debug/gpio */
425c5b3e 4638 debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops);
d2876d08
DB
4639 return 0;
4640}
4641subsys_initcall(gpiolib_debugfs_init);
4642
4643#endif /* DEBUG_FS */