gpio: Add support for Airoha EN7523 GPIO controller
[linux-block.git] / drivers / gpio / gpiolib.c
CommitLineData
dae5f0af 1// SPDX-License-Identifier: GPL-2.0
c47d9e1b 2
923a654c 3#include <linux/bitmap.h>
d2876d08
DB
4#include <linux/kernel.h>
5#include <linux/module.h>
ff77c352 6#include <linux/interrupt.h>
d2876d08
DB
7#include <linux/irq.h>
8#include <linux/spinlock.h>
1a989d0f 9#include <linux/list.h>
d8f388d8
DB
10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/debugfs.h>
13#include <linux/seq_file.h>
14#include <linux/gpio.h>
ff77c352 15#include <linux/idr.h>
5a0e3ad6 16#include <linux/slab.h>
7b199811 17#include <linux/acpi.h>
53e7cac3 18#include <linux/gpio/driver.h>
0a6d3158 19#include <linux/gpio/machine.h>
c771c2f4 20#include <linux/pinctrl/consumer.h>
3c702e99 21#include <linux/fs.h>
8b92e17e 22#include <linux/compat.h>
953b956a 23#include <linux/file.h>
3c702e99 24#include <uapi/linux/gpio.h>
d2876d08 25
664e3e5a 26#include "gpiolib.h"
f626d6df 27#include "gpiolib-of.h"
77cb907a 28#include "gpiolib-acpi.h"
925ca369 29#include "gpiolib-cdev.h"
ef087d8e 30#include "gpiolib-sysfs.h"
664e3e5a 31
3f397c21
UKK
32#define CREATE_TRACE_POINTS
33#include <trace/events/gpio.h>
d2876d08 34
79a9becd 35/* Implementation infrastructure for GPIO interfaces.
d2876d08 36 *
79a9becd
AC
37 * The GPIO programming interface allows for inlining speed-critical
38 * get/set operations for common cases, so that access to SOC-integrated
39 * GPIOs can sometimes cost only an instruction or two per bit.
d2876d08
DB
40 */
41
42
43/* When debugging, extend minimal trust to callers and platform code.
44 * Also emit diagnostic messages that may help initial bringup, when
45 * board setup or driver bugs are most common.
46 *
47 * Otherwise, minimize overhead in what may be bitbanging codepaths.
48 */
49#ifdef DEBUG
50#define extra_checks 1
51#else
52#define extra_checks 0
53#endif
54
ff2b1359
LW
55/* Device and char device-related information */
56static DEFINE_IDA(gpio_ida);
3c702e99
LW
57static dev_t gpio_devt;
58#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
ced2af41 59static int gpio_bus_match(struct device *dev, struct device_driver *drv);
3c702e99
LW
60static struct bus_type gpio_bus_type = {
61 .name = "gpio",
ced2af41 62 .match = gpio_bus_match,
3c702e99 63};
ff2b1359 64
3027743f
LA
65/*
66 * Number of GPIOs to use for the fast path in set array
67 */
68#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
69
d2876d08
DB
70/* gpio_lock prevents conflicts during gpio_desc[] table updates.
71 * While any GPIO is requested, its gpio_chip is not removable;
72 * each GPIO's "requested" flag serves as a lock and refcount.
73 */
0eb4c6c2 74DEFINE_SPINLOCK(gpio_lock);
d2876d08 75
bae48da2
AC
76static DEFINE_MUTEX(gpio_lookup_lock);
77static LIST_HEAD(gpio_lookup_list);
ff2b1359 78LIST_HEAD(gpio_devices);
6d86750c 79
a411e81e
BG
80static DEFINE_MUTEX(gpio_machine_hogs_mutex);
81static LIST_HEAD(gpio_machine_hogs);
82
a0b66a73
LW
83static void gpiochip_free_hogs(struct gpio_chip *gc);
84static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
85 struct lock_class_key *lock_key,
86 struct lock_class_key *request_key);
a0b66a73
LW
87static void gpiochip_irqchip_remove(struct gpio_chip *gc);
88static int gpiochip_irqchip_init_hw(struct gpio_chip *gc);
89static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc);
90static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc);
6d86750c 91
159f3cd9 92static bool gpiolib_initialized;
6d86750c 93
d2876d08
DB
94static inline void desc_set_label(struct gpio_desc *d, const char *label)
95{
d2876d08 96 d->label = label;
d2876d08
DB
97}
98
372e722e 99/**
950d55f5
TR
100 * gpio_to_desc - Convert a GPIO number to its descriptor
101 * @gpio: global GPIO number
102 *
103 * Returns:
104 * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
105 * with the given number exists in the system.
372e722e 106 */
79a9becd 107struct gpio_desc *gpio_to_desc(unsigned gpio)
372e722e 108{
ff2b1359 109 struct gpio_device *gdev;
14e85c0e
AC
110 unsigned long flags;
111
112 spin_lock_irqsave(&gpio_lock, flags);
113
ff2b1359 114 list_for_each_entry(gdev, &gpio_devices, list) {
fdeb8e15
LW
115 if (gdev->base <= gpio &&
116 gdev->base + gdev->ngpio > gpio) {
14e85c0e 117 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 118 return &gdev->descs[gpio - gdev->base];
14e85c0e
AC
119 }
120 }
121
122 spin_unlock_irqrestore(&gpio_lock, flags);
123
0e9a5edf 124 if (!gpio_is_valid(gpio))
c47d9e1b 125 pr_warn("invalid GPIO %d\n", gpio);
0e9a5edf 126
14e85c0e 127 return NULL;
372e722e 128}
79a9becd 129EXPORT_SYMBOL_GPL(gpio_to_desc);
372e722e 130
d468bf9e 131/**
950d55f5
TR
132 * gpiochip_get_desc - get the GPIO descriptor corresponding to the given
133 * hardware number for this chip
a0b66a73 134 * @gc: GPIO chip
950d55f5
TR
135 * @hwnum: hardware number of the GPIO for this chip
136 *
137 * Returns:
35c6cfb4 138 * A pointer to the GPIO descriptor or ``ERR_PTR(-EINVAL)`` if no GPIO exists
950d55f5 139 * in the given chip for the specified hardware number.
d468bf9e 140 */
a0b66a73 141struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc,
06863620 142 unsigned int hwnum)
d468bf9e 143{
a0b66a73 144 struct gpio_device *gdev = gc->gpiodev;
fdeb8e15
LW
145
146 if (hwnum >= gdev->ngpio)
b7d0a28a 147 return ERR_PTR(-EINVAL);
d468bf9e 148
fdeb8e15 149 return &gdev->descs[hwnum];
d468bf9e 150}
97795420 151EXPORT_SYMBOL_GPL(gpiochip_get_desc);
372e722e
AC
152
153/**
950d55f5
TR
154 * desc_to_gpio - convert a GPIO descriptor to the integer namespace
155 * @desc: GPIO descriptor
156 *
372e722e 157 * This should disappear in the future but is needed since we still
950d55f5
TR
158 * use GPIO numbers for error messages and sysfs nodes.
159 *
160 * Returns:
161 * The global GPIO number for the GPIO specified by its descriptor.
372e722e 162 */
79a9becd 163int desc_to_gpio(const struct gpio_desc *desc)
372e722e 164{
fdeb8e15 165 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
372e722e 166}
79a9becd 167EXPORT_SYMBOL_GPL(desc_to_gpio);
372e722e
AC
168
169
79a9becd
AC
170/**
171 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
172 * @desc: descriptor to return the chip of
173 */
174struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
372e722e 175{
dd3b9a44 176 if (!desc || !desc->gdev)
fdeb8e15
LW
177 return NULL;
178 return desc->gdev->chip;
372e722e 179}
79a9becd 180EXPORT_SYMBOL_GPL(gpiod_to_chip);
d2876d08 181
8d0aab2f
AV
182/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
183static int gpiochip_find_base(int ngpio)
184{
ff2b1359 185 struct gpio_device *gdev;
83cabe33 186 int base = ARCH_NR_GPIOS - ngpio;
8d0aab2f 187
ff2b1359 188 list_for_each_entry_reverse(gdev, &gpio_devices, list) {
83cabe33 189 /* found a free space? */
fdeb8e15 190 if (gdev->base + gdev->ngpio <= base)
83cabe33
AC
191 break;
192 else
193 /* nope, check the space right before the chip */
fdeb8e15 194 base = gdev->base - ngpio;
8d0aab2f
AV
195 }
196
83cabe33 197 if (gpio_is_valid(base)) {
8d0aab2f 198 pr_debug("%s: found new base at %d\n", __func__, base);
83cabe33
AC
199 return base;
200 } else {
201 pr_err("%s: cannot find free range\n", __func__);
202 return -ENOSPC;
169b6a7a 203 }
169b6a7a
AV
204}
205
79a9becd
AC
206/**
207 * gpiod_get_direction - return the current direction of a GPIO
208 * @desc: GPIO to get the direction of
209 *
94fc7309 210 * Returns 0 for output, 1 for input, or an error code in case of error.
79a9becd
AC
211 *
212 * This function may sleep if gpiod_cansleep() is true.
213 */
8e53b0f1 214int gpiod_get_direction(struct gpio_desc *desc)
80b0a602 215{
a0b66a73 216 struct gpio_chip *gc;
13daf489 217 unsigned int offset;
d377f56f 218 int ret;
80b0a602 219
a0b66a73 220 gc = gpiod_to_chip(desc);
372e722e 221 offset = gpio_chip_hwgpio(desc);
80b0a602 222
256efaea
RK
223 /*
224 * Open drain emulation using input mode may incorrectly report
225 * input here, fix that up.
226 */
227 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) &&
228 test_bit(FLAG_IS_OUT, &desc->flags))
229 return 0;
230
a0b66a73 231 if (!gc->get_direction)
d0121b85 232 return -ENOTSUPP;
80b0a602 233
a0b66a73 234 ret = gc->get_direction(gc, offset);
4fc5bfeb
AS
235 if (ret < 0)
236 return ret;
237
238 /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */
239 if (ret > 0)
d377f56f 240 ret = 1;
4fc5bfeb
AS
241
242 assign_bit(FLAG_IS_OUT, &desc->flags, !ret);
243
d377f56f 244 return ret;
80b0a602 245}
79a9becd 246EXPORT_SYMBOL_GPL(gpiod_get_direction);
80b0a602 247
1a989d0f
AC
248/*
249 * Add a new chip to the global chips list, keeping the list of chips sorted
ef7c7553 250 * by range(means [base, base + ngpio - 1]) order.
1a989d0f
AC
251 *
252 * Return -EBUSY if the new chip overlaps with some other chip's integer
253 * space.
254 */
ff2b1359 255static int gpiodev_add_to_list(struct gpio_device *gdev)
1a989d0f 256{
a961f9b4 257 struct gpio_device *prev, *next;
1a989d0f 258
ff2b1359 259 if (list_empty(&gpio_devices)) {
a961f9b4 260 /* initial entry in list */
ff2b1359 261 list_add_tail(&gdev->list, &gpio_devices);
e28ecca6 262 return 0;
1a989d0f
AC
263 }
264
a961f9b4
BJZ
265 next = list_entry(gpio_devices.next, struct gpio_device, list);
266 if (gdev->base + gdev->ngpio <= next->base) {
267 /* add before first entry */
268 list_add(&gdev->list, &gpio_devices);
269 return 0;
1a989d0f
AC
270 }
271
a961f9b4
BJZ
272 prev = list_entry(gpio_devices.prev, struct gpio_device, list);
273 if (prev->base + prev->ngpio <= gdev->base) {
274 /* add behind last entry */
275 list_add_tail(&gdev->list, &gpio_devices);
96098df1 276 return 0;
1a989d0f
AC
277 }
278
a961f9b4
BJZ
279 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
280 /* at the end of the list */
281 if (&next->list == &gpio_devices)
282 break;
1a989d0f 283
a961f9b4
BJZ
284 /* add between prev and next */
285 if (prev->base + prev->ngpio <= gdev->base
286 && gdev->base + gdev->ngpio <= next->base) {
287 list_add(&gdev->list, &prev->list);
288 return 0;
289 }
290 }
291
292 dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n");
293 return -EBUSY;
1a989d0f
AC
294}
295
950d55f5 296/*
f881bab0 297 * Convert a GPIO name to its descriptor
582838ea
GU
298 * Note that there is no guarantee that GPIO names are globally unique!
299 * Hence this function will return, if it exists, a reference to the first GPIO
300 * line found that matches the given name.
f881bab0
LW
301 */
302static struct gpio_desc *gpio_name_to_desc(const char * const name)
303{
ff2b1359 304 struct gpio_device *gdev;
f881bab0
LW
305 unsigned long flags;
306
ee203bbd
MM
307 if (!name)
308 return NULL;
309
f881bab0
LW
310 spin_lock_irqsave(&gpio_lock, flags);
311
ff2b1359 312 list_for_each_entry(gdev, &gpio_devices, list) {
f881bab0
LW
313 int i;
314
fdeb8e15
LW
315 for (i = 0; i != gdev->ngpio; ++i) {
316 struct gpio_desc *desc = &gdev->descs[i];
f881bab0 317
ee203bbd 318 if (!desc->name)
f881bab0
LW
319 continue;
320
fdeb8e15 321 if (!strcmp(desc->name, name)) {
f881bab0 322 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 323 return desc;
f881bab0
LW
324 }
325 }
326 }
327
328 spin_unlock_irqrestore(&gpio_lock, flags);
329
330 return NULL;
331}
332
5f3ca732 333/*
582838ea
GU
334 * Take the names from gc->names and assign them to their GPIO descriptors.
335 * Warn if a name is already used for a GPIO line on a different GPIO chip.
5f3ca732 336 *
582838ea
GU
337 * Note that:
338 * 1. Non-unique names are still accepted,
339 * 2. Name collisions within the same GPIO chip are not reported.
5f3ca732
MP
340 */
341static int gpiochip_set_desc_names(struct gpio_chip *gc)
342{
fdeb8e15 343 struct gpio_device *gdev = gc->gpiodev;
5f3ca732
MP
344 int i;
345
5f3ca732
MP
346 /* First check all names if they are unique */
347 for (i = 0; i != gc->ngpio; ++i) {
348 struct gpio_desc *gpio;
349
350 gpio = gpio_name_to_desc(gc->names[i]);
f881bab0 351 if (gpio)
fdeb8e15 352 dev_warn(&gdev->dev,
34ffd85d 353 "Detected name collision for GPIO name '%s'\n",
f881bab0 354 gc->names[i]);
5f3ca732
MP
355 }
356
357 /* Then add all names to the GPIO descriptors */
358 for (i = 0; i != gc->ngpio; ++i)
fdeb8e15 359 gdev->descs[i].name = gc->names[i];
5f3ca732
MP
360
361 return 0;
362}
363
32fc5aa2
BG
364/*
365 * devprop_gpiochip_set_names - Set GPIO line names using device properties
366 * @chip: GPIO chip whose lines should be named, if possible
367 *
368 * Looks for device property "gpio-line-names" and if it exists assigns
369 * GPIO line names for the chip. The memory allocated for the assigned
b41ba2ec 370 * names belong to the underlying firmware node and should not be released
32fc5aa2
BG
371 * by the caller.
372 */
373static int devprop_gpiochip_set_names(struct gpio_chip *chip)
374{
375 struct gpio_device *gdev = chip->gpiodev;
b41ba2ec 376 struct fwnode_handle *fwnode = dev_fwnode(&gdev->dev);
32fc5aa2
BG
377 const char **names;
378 int ret, i;
379 int count;
380
b41ba2ec 381 count = fwnode_property_string_array_count(fwnode, "gpio-line-names");
32fc5aa2
BG
382 if (count < 0)
383 return 0;
384
4e804c39
SP
385 /*
386 * When offset is set in the driver side we assume the driver internally
387 * is using more than one gpiochip per the same device. We have to stop
388 * setting friendly names if the specified ones with 'gpio-line-names'
389 * are less than the offset in the device itself. This means all the
390 * lines are not present for every single pin within all the internal
391 * gpiochips.
392 */
393 if (count <= chip->offset) {
394 dev_warn(&gdev->dev, "gpio-line-names too short (length %d), cannot map names for the gpiochip at offset %u\n",
395 count, chip->offset);
396 return 0;
32fc5aa2
BG
397 }
398
399 names = kcalloc(count, sizeof(*names), GFP_KERNEL);
400 if (!names)
401 return -ENOMEM;
402
b41ba2ec 403 ret = fwnode_property_read_string_array(fwnode, "gpio-line-names",
32fc5aa2
BG
404 names, count);
405 if (ret < 0) {
406 dev_warn(&gdev->dev, "failed to read GPIO line names\n");
407 kfree(names);
408 return ret;
409 }
410
4e804c39
SP
411 /*
412 * When more that one gpiochip per device is used, 'count' can
413 * contain at most number gpiochips x chip->ngpio. We have to
414 * correctly distribute all defined lines taking into account
415 * chip->offset as starting point from where we will assign
416 * the names to pins from the 'names' array. Since property
417 * 'gpio-line-names' cannot contains gaps, we have to be sure
418 * we only assign those pins that really exists since chip->ngpio
419 * can be different of the chip->offset.
420 */
421 count = (count > chip->offset) ? count - chip->offset : count;
422 if (count > chip->ngpio)
423 count = chip->ngpio;
424
c73960bb
PR
425 for (i = 0; i < count; i++) {
426 /*
427 * Allow overriding "fixed" names provided by the GPIO
428 * provider. The "fixed" names are more often than not
429 * generic and less informative than the names given in
430 * device properties.
431 */
432 if (names[chip->offset + i] && names[chip->offset + i][0])
433 gdev->descs[i].name = names[chip->offset + i];
434 }
32fc5aa2
BG
435
436 kfree(names);
437
438 return 0;
439}
440
a0b66a73 441static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc)
e4371f6e
SB
442{
443 unsigned long *p;
444
a0b66a73 445 p = bitmap_alloc(gc->ngpio, GFP_KERNEL);
e4371f6e
SB
446 if (!p)
447 return NULL;
448
449 /* Assume by default all GPIOs are valid */
a0b66a73 450 bitmap_fill(p, gc->ngpio);
e4371f6e
SB
451
452 return p;
453}
454
f626d6df 455static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
726cb3ba 456{
eb1e8bd6 457 if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask))
726cb3ba
SB
458 return 0;
459
f626d6df
LW
460 gc->valid_mask = gpiochip_allocate_mask(gc);
461 if (!gc->valid_mask)
726cb3ba
SB
462 return -ENOMEM;
463
464 return 0;
465}
466
c9fc5aff 467static int gpiochip_init_valid_mask(struct gpio_chip *gc)
f8ec92a9 468{
c9fc5aff
LW
469 if (gc->init_valid_mask)
470 return gc->init_valid_mask(gc,
471 gc->valid_mask,
472 gc->ngpio);
f8ec92a9
RRD
473
474 return 0;
475}
476
a0b66a73 477static void gpiochip_free_valid_mask(struct gpio_chip *gc)
726cb3ba 478{
a0b66a73
LW
479 bitmap_free(gc->valid_mask);
480 gc->valid_mask = NULL;
726cb3ba
SB
481}
482
b056ca1c
AS
483static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
484{
485 if (gc->add_pin_ranges)
486 return gc->add_pin_ranges(gc);
487
488 return 0;
489}
490
a0b66a73 491bool gpiochip_line_is_valid(const struct gpio_chip *gc,
726cb3ba
SB
492 unsigned int offset)
493{
494 /* No mask means all valid */
a0b66a73 495 if (likely(!gc->valid_mask))
726cb3ba 496 return true;
a0b66a73 497 return test_bit(offset, gc->valid_mask);
726cb3ba
SB
498}
499EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
500
ff2b1359
LW
501static void gpiodevice_release(struct device *dev)
502{
a6112998 503 struct gpio_device *gdev = container_of(dev, struct gpio_device, dev);
cf25ef6b 504 unsigned long flags;
ff2b1359 505
cf25ef6b 506 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 507 list_del(&gdev->list);
cf25ef6b
JH
508 spin_unlock_irqrestore(&gpio_lock, flags);
509
8d4a85b6 510 ida_free(&gpio_ida, gdev->id);
fcf273e5 511 kfree_const(gdev->label);
476e2fc5 512 kfree(gdev->descs);
9efd9e69 513 kfree(gdev);
ff2b1359
LW
514}
515
1f5eb8b1
KG
516#ifdef CONFIG_GPIO_CDEV
517#define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt))
518#define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev))
519#else
520/*
521 * gpiolib_cdev_register() indirectly calls device_add(), which is still
522 * required even when cdev is not selected.
523 */
524#define gcdev_register(gdev, devt) device_add(&(gdev)->dev)
525#define gcdev_unregister(gdev) device_del(&(gdev)->dev)
526#endif
527
159f3cd9
GR
528static int gpiochip_setup_dev(struct gpio_device *gdev)
529{
d377f56f 530 int ret;
159f3cd9 531
1f5eb8b1 532 ret = gcdev_register(gdev, gpio_devt);
d377f56f
LW
533 if (ret)
534 return ret;
111379dc 535
d377f56f
LW
536 ret = gpiochip_sysfs_register(gdev);
537 if (ret)
159f3cd9
GR
538 goto err_remove_device;
539
540 /* From this point, the .release() function cleans up gpio_device */
541 gdev->dev.release = gpiodevice_release;
262b9011
GU
542 dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base,
543 gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic");
159f3cd9
GR
544
545 return 0;
546
547err_remove_device:
1f5eb8b1 548 gcdev_unregister(gdev);
d377f56f 549 return ret;
159f3cd9
GR
550}
551
a0b66a73 552static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog)
a411e81e
BG
553{
554 struct gpio_desc *desc;
555 int rv;
556
a0b66a73 557 desc = gpiochip_get_desc(gc, hog->chip_hwnum);
a411e81e 558 if (IS_ERR(desc)) {
262b9011
GU
559 chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__,
560 PTR_ERR(desc));
a411e81e
BG
561 return;
562 }
563
ba3efdff 564 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
a411e81e
BG
565 return;
566
567 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
568 if (rv)
262b9011
GU
569 gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n",
570 __func__, gc->label, hog->chip_hwnum, rv);
a411e81e
BG
571}
572
a0b66a73 573static void machine_gpiochip_add(struct gpio_chip *gc)
a411e81e
BG
574{
575 struct gpiod_hog *hog;
576
577 mutex_lock(&gpio_machine_hogs_mutex);
578
579 list_for_each_entry(hog, &gpio_machine_hogs, list) {
a0b66a73
LW
580 if (!strcmp(gc->label, hog->chip_label))
581 gpiochip_machine_hog(gc, hog);
a411e81e
BG
582 }
583
584 mutex_unlock(&gpio_machine_hogs_mutex);
585}
586
159f3cd9
GR
587static void gpiochip_setup_devs(void)
588{
589 struct gpio_device *gdev;
d377f56f 590 int ret;
159f3cd9
GR
591
592 list_for_each_entry(gdev, &gpio_devices, list) {
d377f56f
LW
593 ret = gpiochip_setup_dev(gdev);
594 if (ret)
262b9011
GU
595 dev_err(&gdev->dev,
596 "Failed to initialize gpio device (%d)\n", ret);
159f3cd9
GR
597 }
598}
599
a0b66a73 600int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
39c3fd58
AL
601 struct lock_class_key *lock_key,
602 struct lock_class_key *request_key)
d2876d08 603{
990f6756 604 struct fwnode_handle *fwnode = NULL;
ff2b1359 605 struct gpio_device *gdev;
e5ab49cd
BG
606 unsigned long flags;
607 int base = gc->base;
608 unsigned int i;
609 int ret = 0;
9dbd1ab2 610 u32 ngpios;
d2876d08 611
990f6756
BG
612 if (gc->fwnode)
613 fwnode = gc->fwnode;
614 else if (gc->parent)
615 fwnode = dev_fwnode(gc->parent);
616
ff2b1359
LW
617 /*
618 * First: allocate and populate the internal stat container, and
619 * set up the struct device.
620 */
969f07b4 621 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
ff2b1359 622 if (!gdev)
14e85c0e 623 return -ENOMEM;
3c702e99 624 gdev->dev.bus = &gpio_bus_type;
1df62542 625 gdev->dev.parent = gc->parent;
a0b66a73
LW
626 gdev->chip = gc;
627 gc->gpiodev = gdev;
acc6e331 628
4731210c 629 of_gpio_dev_init(gc, gdev);
515321ac 630 acpi_gpio_dev_init(gc, gdev);
acc6e331 631
6cb59afe
AS
632 /*
633 * Assign fwnode depending on the result of the previous calls,
634 * if none of them succeed, assign it to the parent's one.
635 */
636 gdev->dev.fwnode = dev_fwnode(&gdev->dev) ?: fwnode;
637
8d4a85b6 638 gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL);
ff2b1359 639 if (gdev->id < 0) {
d377f56f 640 ret = gdev->id;
ff2b1359
LW
641 goto err_free_gdev;
642 }
c351bb64
QW
643
644 ret = dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id);
645 if (ret)
646 goto err_free_ida;
647
ff2b1359 648 device_initialize(&gdev->dev);
a0b66a73
LW
649 if (gc->parent && gc->parent->driver)
650 gdev->owner = gc->parent->driver->owner;
651 else if (gc->owner)
ff2b1359 652 /* TODO: remove chip->owner */
a0b66a73 653 gdev->owner = gc->owner;
ff2b1359
LW
654 else
655 gdev->owner = THIS_MODULE;
d2876d08 656
a0b66a73 657 gdev->descs = kcalloc(gc->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL);
1c3cdb18 658 if (!gdev->descs) {
d377f56f 659 ret = -ENOMEM;
c351bb64 660 goto err_free_dev_name;
ff2b1359
LW
661 }
662
9dbd1ab2
BG
663 /*
664 * Try the device properties if the driver didn't supply the number
665 * of GPIO lines.
666 */
667 if (gc->ngpio == 0) {
668 ret = device_property_read_u32(&gdev->dev, "ngpios", &ngpios);
669 if (ret == -ENODATA)
670 /*
671 * -ENODATA means that there is no property found and
672 * we want to issue the error message to the user.
673 * Besides that, we want to return different error code
674 * to state that supplied value is not valid.
675 */
676 ngpios = 0;
677 else if (ret)
678 goto err_free_descs;
679
680 gc->ngpio = ngpios;
681 }
682
a0b66a73
LW
683 if (gc->ngpio == 0) {
684 chip_err(gc, "tried to insert a GPIO chip with zero lines\n");
d377f56f 685 ret = -EINVAL;
159f3cd9 686 goto err_free_descs;
5ed41cc4 687 }
df4878e9 688
a0b66a73
LW
689 if (gc->ngpio > FASTPATH_NGPIO)
690 chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n",
691 gc->ngpio, FASTPATH_NGPIO);
3027743f 692
a0b66a73 693 gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL);
df4878e9 694 if (!gdev->label) {
d377f56f 695 ret = -ENOMEM;
476e2fc5 696 goto err_free_descs;
df4878e9
LW
697 }
698
a0b66a73 699 gdev->ngpio = gc->ngpio;
43c54eca 700 gdev->data = data;
5ed41cc4 701
d2876d08
DB
702 spin_lock_irqsave(&gpio_lock, flags);
703
fdeb8e15
LW
704 /*
705 * TODO: this allocates a Linux GPIO number base in the global
706 * GPIO numberspace for this chip. In the long run we want to
707 * get *rid* of this numberspace and use only descriptors, but
708 * it may be a pipe dream. It will not happen before we get rid
709 * of the sysfs interface anyways.
710 */
8d0aab2f 711 if (base < 0) {
a0b66a73 712 base = gpiochip_find_base(gc->ngpio);
8d0aab2f 713 if (base < 0) {
d377f56f 714 ret = base;
225fce83 715 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 716 goto err_free_label;
8d0aab2f 717 }
fdeb8e15
LW
718 /*
719 * TODO: it should not be necessary to reflect the assigned
720 * base outside of the GPIO subsystem. Go over drivers and
721 * see if anyone makes use of this, else drop this and assign
722 * a poison instead.
723 */
a0b66a73 724 gc->base = base;
8d0aab2f 725 }
fdeb8e15 726 gdev->base = base;
8d0aab2f 727
d377f56f
LW
728 ret = gpiodev_add_to_list(gdev);
729 if (ret) {
05aa5203 730 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 731 goto err_free_label;
05aa5203 732 }
1a989d0f 733
a0b66a73 734 for (i = 0; i < gc->ngpio; i++)
767cd17a 735 gdev->descs[i].gdev = gdev;
14e85c0e 736
207270dd
DC
737 spin_unlock_irqrestore(&gpio_lock, flags);
738
6accc376 739 BLOCKING_INIT_NOTIFIER_HEAD(&gdev->notifier);
51c1064e 740
f23f1516 741#ifdef CONFIG_PINCTRL
20ec3e39 742 INIT_LIST_HEAD(&gdev->pin_ranges);
f23f1516
SH
743#endif
744
c73960bb 745 if (gc->names) {
7cba1a4d 746 ret = gpiochip_set_desc_names(gc);
c73960bb
PR
747 if (ret)
748 goto err_remove_from_list;
749 }
750 ret = devprop_gpiochip_set_names(gc);
d377f56f 751 if (ret)
5f3ca732
MP
752 goto err_remove_from_list;
753
a0b66a73 754 ret = gpiochip_alloc_valid_mask(gc);
d377f56f 755 if (ret)
48057ed1 756 goto err_remove_from_list;
e0d89728 757
a0b66a73 758 ret = of_gpiochip_add(gc);
d377f56f 759 if (ret)
48057ed1 760 goto err_free_gpiochip_mask;
28355f81 761
a0b66a73 762 ret = gpiochip_init_valid_mask(gc);
d377f56f 763 if (ret)
35779890 764 goto err_remove_of_chip;
f8ec92a9 765
a0b66a73 766 for (i = 0; i < gc->ngpio; i++) {
3edfb7bd
RRD
767 struct gpio_desc *desc = &gdev->descs[i];
768
a0b66a73 769 if (gc->get_direction && gpiochip_line_is_valid(gc, i)) {
4fc5bfeb 770 assign_bit(FLAG_IS_OUT,
a0b66a73 771 &desc->flags, !gc->get_direction(gc, i));
d95da993 772 } else {
4fc5bfeb 773 assign_bit(FLAG_IS_OUT,
a0b66a73 774 &desc->flags, !gc->direction_input);
d95da993 775 }
3edfb7bd
RRD
776 }
777
a0b66a73 778 ret = gpiochip_add_pin_ranges(gc);
b056ca1c
AS
779 if (ret)
780 goto err_remove_of_chip;
781
a0b66a73 782 acpi_gpiochip_add(gc);
391c970c 783
a0b66a73 784 machine_gpiochip_add(gc);
a411e81e 785
a0b66a73 786 ret = gpiochip_irqchip_init_valid_mask(gc);
9411e3aa
AS
787 if (ret)
788 goto err_remove_acpi_chip;
789
a0b66a73 790 ret = gpiochip_irqchip_init_hw(gc);
fbdf8d4b 791 if (ret)
48057ed1
LW
792 goto err_remove_acpi_chip;
793
a0b66a73 794 ret = gpiochip_add_irqchip(gc, lock_key, request_key);
fbdf8d4b 795 if (ret)
48057ed1
LW
796 goto err_remove_irqchip_mask;
797
3c702e99
LW
798 /*
799 * By first adding the chardev, and then adding the device,
800 * we get a device node entry in sysfs under
801 * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
802 * coldplug of device nodes and other udev business.
159f3cd9
GR
803 * We can do this only if gpiolib has been initialized.
804 * Otherwise, defer until later.
3c702e99 805 */
159f3cd9 806 if (gpiolib_initialized) {
d377f56f
LW
807 ret = gpiochip_setup_dev(gdev);
808 if (ret)
48057ed1 809 goto err_remove_irqchip;
159f3cd9 810 }
cedb1881 811 return 0;
3bae4811 812
48057ed1 813err_remove_irqchip:
a0b66a73 814 gpiochip_irqchip_remove(gc);
48057ed1 815err_remove_irqchip_mask:
a0b66a73 816 gpiochip_irqchip_free_valid_mask(gc);
35779890 817err_remove_acpi_chip:
a0b66a73 818 acpi_gpiochip_remove(gc);
35779890 819err_remove_of_chip:
a0b66a73
LW
820 gpiochip_free_hogs(gc);
821 of_gpiochip_remove(gc);
35779890 822err_free_gpiochip_mask:
a0b66a73
LW
823 gpiochip_remove_pin_ranges(gc);
824 gpiochip_free_valid_mask(gc);
5f3ca732 825err_remove_from_list:
225fce83 826 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 827 list_del(&gdev->list);
3bae4811 828 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 829err_free_label:
fcf273e5 830 kfree_const(gdev->label);
476e2fc5
GR
831err_free_descs:
832 kfree(gdev->descs);
c351bb64
QW
833err_free_dev_name:
834 kfree(dev_name(&gdev->dev));
a05a1404 835err_free_ida:
8d4a85b6 836 ida_free(&gpio_ida, gdev->id);
a05a1404 837err_free_gdev:
d2876d08 838 /* failures here can mean systems won't boot... */
3cc1fb73
GS
839 if (ret != -EPROBE_DEFER) {
840 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
841 gdev->base, gdev->base + gdev->ngpio - 1,
842 gc->label ? : "generic", ret);
843 }
fdeb8e15 844 kfree(gdev);
d377f56f 845 return ret;
d2876d08 846}
959bc7b2 847EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
d2876d08 848
43c54eca
LW
849/**
850 * gpiochip_get_data() - get per-subdriver data for the chip
a0b66a73 851 * @gc: GPIO chip
950d55f5
TR
852 *
853 * Returns:
854 * The per-subdriver data for the chip.
43c54eca 855 */
a0b66a73 856void *gpiochip_get_data(struct gpio_chip *gc)
43c54eca 857{
a0b66a73 858 return gc->gpiodev->data;
43c54eca
LW
859}
860EXPORT_SYMBOL_GPL(gpiochip_get_data);
861
d2876d08
DB
862/**
863 * gpiochip_remove() - unregister a gpio_chip
a0b66a73 864 * @gc: the chip to unregister
d2876d08
DB
865 *
866 * A gpio_chip with any GPIOs still requested may not be removed.
867 */
a0b66a73 868void gpiochip_remove(struct gpio_chip *gc)
d2876d08 869{
a0b66a73 870 struct gpio_device *gdev = gc->gpiodev;
d2876d08 871 unsigned long flags;
869233f8 872 unsigned int i;
d2876d08 873
ff2b1359 874 /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
afbc4f31 875 gpiochip_sysfs_unregister(gdev);
a0b66a73 876 gpiochip_free_hogs(gc);
bd203bd5
BJZ
877 /* Numb the device, cancelling all outstanding operations */
878 gdev->chip = NULL;
a0b66a73
LW
879 gpiochip_irqchip_remove(gc);
880 acpi_gpiochip_remove(gc);
881 of_gpiochip_remove(gc);
882 gpiochip_remove_pin_ranges(gc);
883 gpiochip_free_valid_mask(gc);
43c54eca
LW
884 /*
885 * We accept no more calls into the driver from this point, so
886 * NULL the driver data pointer
887 */
888 gdev->data = NULL;
391c970c 889
6798acaa 890 spin_lock_irqsave(&gpio_lock, flags);
fdeb8e15 891 for (i = 0; i < gdev->ngpio; i++) {
a0b66a73 892 if (gpiochip_is_requested(gc, i))
869233f8 893 break;
d2876d08 894 }
d2876d08 895 spin_unlock_irqrestore(&gpio_lock, flags);
14e85c0e 896
ca18a852 897 if (i != gdev->ngpio)
fdeb8e15 898 dev_crit(&gdev->dev,
58383c78 899 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
fab28b89 900
ff2b1359
LW
901 /*
902 * The gpiochip side puts its use of the device to rest here:
903 * if there are no userspace clients, the chardev and device will
904 * be removed, else it will be dangling until the last user is
905 * gone.
906 */
1f5eb8b1 907 gcdev_unregister(gdev);
ff2b1359 908 put_device(&gdev->dev);
d2876d08
DB
909}
910EXPORT_SYMBOL_GPL(gpiochip_remove);
911
594fa265
GL
912/**
913 * gpiochip_find() - iterator for locating a specific gpio_chip
914 * @data: data to pass to match function
950d55f5 915 * @match: Callback function to check gpio_chip
594fa265
GL
916 *
917 * Similar to bus_find_device. It returns a reference to a gpio_chip as
918 * determined by a user supplied @match callback. The callback should return
919 * 0 if the device doesn't match and non-zero if it does. If the callback is
920 * non-zero, this function will return to the caller and not iterate over any
921 * more gpio_chips.
922 */
07ce8ec7 923struct gpio_chip *gpiochip_find(void *data,
a0b66a73 924 int (*match)(struct gpio_chip *gc,
3d0f7cf0 925 void *data))
594fa265 926{
ff2b1359 927 struct gpio_device *gdev;
a0b66a73 928 struct gpio_chip *gc = NULL;
594fa265 929 unsigned long flags;
594fa265
GL
930
931 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 932 list_for_each_entry(gdev, &gpio_devices, list)
acf06ff7 933 if (gdev->chip && match(gdev->chip, data)) {
a0b66a73 934 gc = gdev->chip;
594fa265 935 break;
acf06ff7 936 }
ff2b1359 937
594fa265
GL
938 spin_unlock_irqrestore(&gpio_lock, flags);
939
a0b66a73 940 return gc;
594fa265 941}
8fa0c9bf 942EXPORT_SYMBOL_GPL(gpiochip_find);
d2876d08 943
a0b66a73 944static int gpiochip_match_name(struct gpio_chip *gc, void *data)
79697ef9
AC
945{
946 const char *name = data;
947
a0b66a73 948 return !strcmp(gc->label, name);
79697ef9
AC
949}
950
951static struct gpio_chip *find_chip_by_name(const char *name)
952{
953 return gpiochip_find((void *)name, gpiochip_match_name);
954}
955
14250520
LW
956#ifdef CONFIG_GPIOLIB_IRQCHIP
957
958/*
959 * The following is irqchip helper code for gpiochips.
960 */
961
9411e3aa
AS
962static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
963{
964 struct gpio_irq_chip *girq = &gc->irq;
965
966 if (!girq->init_hw)
967 return 0;
968
969 return girq->init_hw(gc);
970}
971
5fbe5b58 972static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb 973{
5fbe5b58
LW
974 struct gpio_irq_chip *girq = &gc->irq;
975
976 if (!girq->init_valid_mask)
79b804cb
MW
977 return 0;
978
5fbe5b58
LW
979 girq->valid_mask = gpiochip_allocate_mask(gc);
980 if (!girq->valid_mask)
79b804cb
MW
981 return -ENOMEM;
982
5fbe5b58
LW
983 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
984
79b804cb
MW
985 return 0;
986}
987
a0b66a73 988static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 989{
a0b66a73
LW
990 bitmap_free(gc->irq.valid_mask);
991 gc->irq.valid_mask = NULL;
79b804cb
MW
992}
993
a0b66a73 994bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc,
64ff2c8e 995 unsigned int offset)
79b804cb 996{
a0b66a73 997 if (!gpiochip_line_is_valid(gc, offset))
726cb3ba 998 return false;
79b804cb 999 /* No mask means all valid */
a0b66a73 1000 if (likely(!gc->irq.valid_mask))
79b804cb 1001 return true;
a0b66a73 1002 return test_bit(offset, gc->irq.valid_mask);
79b804cb 1003}
64ff2c8e 1004EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
79b804cb 1005
fdd61a01
LW
1006#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1007
1008/**
1009 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
1010 * to a gpiochip
1011 * @gc: the gpiochip to set the irqchip hierarchical handler to
1012 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
1013 * will then percolate up to the parent
1014 */
1015static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
1016 struct irq_chip *irqchip)
1017{
1018 /* DT will deal with mapping each IRQ as we go along */
1019 if (is_of_node(gc->irq.fwnode))
1020 return;
1021
1022 /*
1023 * This is for legacy and boardfile "irqchip" fwnodes: allocate
1024 * irqs upfront instead of dynamically since we don't have the
1025 * dynamic type of allocation that hardware description languages
1026 * provide. Once all GPIO drivers using board files are gone from
1027 * the kernel we can delete this code, but for a transitional period
1028 * it is necessary to keep this around.
1029 */
1030 if (is_fwnode_irqchip(gc->irq.fwnode)) {
1031 int i;
1032 int ret;
1033
1034 for (i = 0; i < gc->ngpio; i++) {
1035 struct irq_fwspec fwspec;
1036 unsigned int parent_hwirq;
1037 unsigned int parent_type;
1038 struct gpio_irq_chip *girq = &gc->irq;
1039
1040 /*
1041 * We call the child to parent translation function
1042 * only to check if the child IRQ is valid or not.
1043 * Just pick the rising edge type here as that is what
1044 * we likely need to support.
1045 */
1046 ret = girq->child_to_parent_hwirq(gc, i,
1047 IRQ_TYPE_EDGE_RISING,
1048 &parent_hwirq,
1049 &parent_type);
1050 if (ret) {
1051 chip_err(gc, "skip set-up on hwirq %d\n",
1052 i);
1053 continue;
1054 }
1055
1056 fwspec.fwnode = gc->irq.fwnode;
1057 /* This is the hwirq for the GPIO line side of things */
1058 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
1059 /* Just pick something */
1060 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
1061 fwspec.param_count = 2;
1062 ret = __irq_domain_alloc_irqs(gc->irq.domain,
1063 /* just pick something */
1064 -1,
1065 1,
1066 NUMA_NO_NODE,
1067 &fwspec,
1068 false,
1069 NULL);
1070 if (ret < 0) {
1071 chip_err(gc,
1072 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1073 i, parent_hwirq,
1074 ret);
1075 }
1076 }
1077 }
1078
1079 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1080
1081 return;
1082}
1083
1084static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1085 struct irq_fwspec *fwspec,
1086 unsigned long *hwirq,
1087 unsigned int *type)
1088{
1089 /* We support standard DT translation */
1090 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1091 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1092 }
1093
1094 /* This is for board files and others not using DT */
1095 if (is_fwnode_irqchip(fwspec->fwnode)) {
1096 int ret;
1097
1098 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1099 if (ret)
1100 return ret;
1101 WARN_ON(*type == IRQ_TYPE_NONE);
1102 return 0;
1103 }
1104 return -EINVAL;
1105}
1106
1107static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1108 unsigned int irq,
1109 unsigned int nr_irqs,
1110 void *data)
1111{
1112 struct gpio_chip *gc = d->host_data;
1113 irq_hw_number_t hwirq;
1114 unsigned int type = IRQ_TYPE_NONE;
1115 struct irq_fwspec *fwspec = data;
24258761 1116 void *parent_arg;
fdd61a01
LW
1117 unsigned int parent_hwirq;
1118 unsigned int parent_type;
1119 struct gpio_irq_chip *girq = &gc->irq;
1120 int ret;
1121
1122 /*
1123 * The nr_irqs parameter is always one except for PCI multi-MSI
1124 * so this should not happen.
1125 */
1126 WARN_ON(nr_irqs != 1);
1127
1128 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
1129 if (ret)
1130 return ret;
1131
366950ee 1132 chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
fdd61a01
LW
1133
1134 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
1135 &parent_hwirq, &parent_type);
1136 if (ret) {
1137 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
1138 return ret;
1139 }
366950ee 1140 chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq);
fdd61a01
LW
1141
1142 /*
1143 * We set handle_bad_irq because the .set_type() should
1144 * always be invoked and set the right type of handler.
1145 */
1146 irq_domain_set_info(d,
1147 irq,
1148 hwirq,
1149 gc->irq.chip,
1150 gc,
1151 girq->handler,
1152 NULL, NULL);
1153 irq_set_probe(irq);
1154
fdd61a01 1155 /* This parent only handles asserted level IRQs */
24258761
KH
1156 parent_arg = girq->populate_parent_alloc_arg(gc, parent_hwirq, parent_type);
1157 if (!parent_arg)
1158 return -ENOMEM;
1159
366950ee 1160 chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
fdd61a01 1161 irq, parent_hwirq);
c34f6dc8 1162 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
24258761 1163 ret = irq_domain_alloc_irqs_parent(d, irq, 1, parent_arg);
880b7cf2
KH
1164 /*
1165 * If the parent irqdomain is msi, the interrupts have already
1166 * been allocated, so the EEXIST is good.
1167 */
1168 if (irq_domain_is_msi(d->parent) && (ret == -EEXIST))
1169 ret = 0;
fdd61a01
LW
1170 if (ret)
1171 chip_err(gc,
1172 "failed to allocate parent hwirq %d for hwirq %lu\n",
1173 parent_hwirq, hwirq);
1174
24258761 1175 kfree(parent_arg);
fdd61a01
LW
1176 return ret;
1177}
1178
a0b66a73 1179static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc,
fdd61a01
LW
1180 unsigned int offset)
1181{
1182 return offset;
1183}
1184
1185static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
1186{
1187 ops->activate = gpiochip_irq_domain_activate;
1188 ops->deactivate = gpiochip_irq_domain_deactivate;
1189 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
1190 ops->free = irq_domain_free_irqs_common;
1191
1192 /*
1193 * We only allow overriding the translate() function for
1194 * hierarchical chips, and this should only be done if the user
1195 * really need something other than 1:1 translation.
1196 */
1197 if (!ops->translate)
1198 ops->translate = gpiochip_hierarchy_irq_domain_translate;
1199}
1200
1201static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1202{
1203 if (!gc->irq.child_to_parent_hwirq ||
1204 !gc->irq.fwnode) {
1205 chip_err(gc, "missing irqdomain vital data\n");
1206 return -EINVAL;
1207 }
1208
1209 if (!gc->irq.child_offset_to_irq)
1210 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
1211
24258761
KH
1212 if (!gc->irq.populate_parent_alloc_arg)
1213 gc->irq.populate_parent_alloc_arg =
fdd61a01
LW
1214 gpiochip_populate_parent_fwspec_twocell;
1215
1216 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
1217
1218 gc->irq.domain = irq_domain_create_hierarchy(
1219 gc->irq.parent_domain,
1220 0,
1221 gc->ngpio,
1222 gc->irq.fwnode,
1223 &gc->irq.child_irq_domain_ops,
1224 gc);
1225
1226 if (!gc->irq.domain)
1227 return -ENOMEM;
1228
1229 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
1230
1231 return 0;
1232}
1233
1234static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1235{
1236 return !!gc->irq.parent_domain;
1237}
1238
a0b66a73 1239void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc,
fdd61a01
LW
1240 unsigned int parent_hwirq,
1241 unsigned int parent_type)
1242{
24258761
KH
1243 struct irq_fwspec *fwspec;
1244
1245 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
1246 if (!fwspec)
1247 return NULL;
1248
a0b66a73 1249 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1250 fwspec->param_count = 2;
1251 fwspec->param[0] = parent_hwirq;
1252 fwspec->param[1] = parent_type;
24258761
KH
1253
1254 return fwspec;
fdd61a01
LW
1255}
1256EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
1257
a0b66a73 1258void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc,
fdd61a01
LW
1259 unsigned int parent_hwirq,
1260 unsigned int parent_type)
1261{
24258761
KH
1262 struct irq_fwspec *fwspec;
1263
1264 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
1265 if (!fwspec)
1266 return NULL;
1267
a0b66a73 1268 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1269 fwspec->param_count = 4;
1270 fwspec->param[0] = 0;
1271 fwspec->param[1] = parent_hwirq;
1272 fwspec->param[2] = 0;
1273 fwspec->param[3] = parent_type;
24258761
KH
1274
1275 return fwspec;
fdd61a01
LW
1276}
1277EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
1278
1279#else
1280
1281static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1282{
1283 return -EINVAL;
1284}
1285
1286static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1287{
1288 return false;
1289}
1290
1291#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
1292
14250520
LW
1293/**
1294 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
1295 * @d: the irqdomain used by this irqchip
1296 * @irq: the global irq number used by this GPIO irqchip irq
1297 * @hwirq: the local IRQ/GPIO line offset on this gpiochip
1298 *
1299 * This function will set up the mapping for a certain IRQ line on a
1300 * gpiochip by assigning the gpiochip as chip data, and using the irqchip
1301 * stored inside the gpiochip.
1302 */
1b95b4eb
TR
1303int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
1304 irq_hw_number_t hwirq)
14250520 1305{
a0b66a73 1306 struct gpio_chip *gc = d->host_data;
d377f56f 1307 int ret = 0;
14250520 1308
a0b66a73 1309 if (!gpiochip_irqchip_irq_valid(gc, hwirq))
dc749a09
GS
1310 return -ENXIO;
1311
a0b66a73 1312 irq_set_chip_data(irq, gc);
a0a8bcf4
GS
1313 /*
1314 * This lock class tells lockdep that GPIO irqs are in a different
1315 * category than their parents, so it won't report false recursion.
1316 */
a0b66a73
LW
1317 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
1318 irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler);
d245b3f9 1319 /* Chips that use nested thread handlers have them marked */
a0b66a73 1320 if (gc->irq.threaded)
1c8732bb 1321 irq_set_nested_thread(irq, 1);
14250520 1322 irq_set_noprobe(irq);
23393d49 1323
a0b66a73
LW
1324 if (gc->irq.num_parents == 1)
1325 ret = irq_set_parent(irq, gc->irq.parents[0]);
1326 else if (gc->irq.map)
1327 ret = irq_set_parent(irq, gc->irq.map[hwirq]);
e0d89728 1328
d377f56f
LW
1329 if (ret < 0)
1330 return ret;
e0d89728 1331
1333b90f
LW
1332 /*
1333 * No set-up of the hardware will happen if IRQ_TYPE_NONE
1334 * is passed as default type.
1335 */
a0b66a73
LW
1336 if (gc->irq.default_type != IRQ_TYPE_NONE)
1337 irq_set_irq_type(irq, gc->irq.default_type);
14250520
LW
1338
1339 return 0;
1340}
1b95b4eb 1341EXPORT_SYMBOL_GPL(gpiochip_irq_map);
14250520 1342
1b95b4eb 1343void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
c3626fde 1344{
a0b66a73 1345 struct gpio_chip *gc = d->host_data;
1c8732bb 1346
a0b66a73 1347 if (gc->irq.threaded)
1c8732bb 1348 irq_set_nested_thread(irq, 0);
c3626fde
LW
1349 irq_set_chip_and_handler(irq, NULL, NULL);
1350 irq_set_chip_data(irq, NULL);
1351}
1b95b4eb 1352EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
c3626fde 1353
14250520
LW
1354static const struct irq_domain_ops gpiochip_domain_ops = {
1355 .map = gpiochip_irq_map,
c3626fde 1356 .unmap = gpiochip_irq_unmap,
14250520
LW
1357 /* Virtually all GPIO irqchips are twocell:ed */
1358 .xlate = irq_domain_xlate_twocell,
1359};
1360
fdd61a01
LW
1361/*
1362 * TODO: move these activate/deactivate in under the hierarchicial
1363 * irqchip implementation as static once SPMI and SSBI (all external
1364 * users) are phased over.
1365 */
ef74f70e
BM
1366/**
1367 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
1368 * @domain: The IRQ domain used by this IRQ chip
1369 * @data: Outermost irq_data associated with the IRQ
1370 * @reserve: If set, only reserve an interrupt vector instead of assigning one
1371 *
1372 * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
1373 * used as the activate function for the &struct irq_domain_ops. The host_data
1374 * for the IRQ domain must be the &struct gpio_chip.
1375 */
1376int gpiochip_irq_domain_activate(struct irq_domain *domain,
1377 struct irq_data *data, bool reserve)
1378{
a0b66a73 1379 struct gpio_chip *gc = domain->host_data;
ef74f70e 1380
a0b66a73 1381 return gpiochip_lock_as_irq(gc, data->hwirq);
ef74f70e
BM
1382}
1383EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
1384
1385/**
1386 * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
1387 * @domain: The IRQ domain used by this IRQ chip
1388 * @data: Outermost irq_data associated with the IRQ
1389 *
1390 * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
1391 * be used as the deactivate function for the &struct irq_domain_ops. The
1392 * host_data for the IRQ domain must be the &struct gpio_chip.
1393 */
1394void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
1395 struct irq_data *data)
1396{
a0b66a73 1397 struct gpio_chip *gc = domain->host_data;
ef74f70e 1398
a0b66a73 1399 return gpiochip_unlock_as_irq(gc, data->hwirq);
ef74f70e
BM
1400}
1401EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
1402
13daf489 1403static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset)
14250520 1404{
a0b66a73 1405 struct irq_domain *domain = gc->irq.domain;
fdd61a01 1406
a0b66a73 1407 if (!gpiochip_irqchip_irq_valid(gc, offset))
4e6b8238 1408 return -ENXIO;
5b76e79c 1409
fdd61a01
LW
1410#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1411 if (irq_domain_is_hierarchy(domain)) {
1412 struct irq_fwspec spec;
1413
1414 spec.fwnode = domain->fwnode;
1415 spec.param_count = 2;
a0b66a73 1416 spec.param[0] = gc->irq.child_offset_to_irq(gc, offset);
fdd61a01
LW
1417 spec.param[1] = IRQ_TYPE_NONE;
1418
1419 return irq_create_fwspec_mapping(&spec);
1420 }
1421#endif
1422
1423 return irq_create_mapping(domain, offset);
14250520
LW
1424}
1425
14250520
LW
1426static int gpiochip_irq_reqres(struct irq_data *d)
1427{
a0b66a73 1428 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
5b76e79c 1429
a0b66a73 1430 return gpiochip_reqres_irq(gc, d->hwirq);
14250520
LW
1431}
1432
1433static void gpiochip_irq_relres(struct irq_data *d)
1434{
a0b66a73 1435 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
14250520 1436
a0b66a73 1437 gpiochip_relres_irq(gc, d->hwirq);
14250520
LW
1438}
1439
a8173820
MS
1440static void gpiochip_irq_mask(struct irq_data *d)
1441{
1442 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1443
1444 if (gc->irq.irq_mask)
1445 gc->irq.irq_mask(d);
1446 gpiochip_disable_irq(gc, d->hwirq);
1447}
1448
1449static void gpiochip_irq_unmask(struct irq_data *d)
1450{
1451 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1452
1453 gpiochip_enable_irq(gc, d->hwirq);
1454 if (gc->irq.irq_unmask)
1455 gc->irq.irq_unmask(d);
1456}
1457
461c1a7d 1458static void gpiochip_irq_enable(struct irq_data *d)
14250520 1459{
a0b66a73 1460 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
e0d89728 1461
a0b66a73 1462 gpiochip_enable_irq(gc, d->hwirq);
a8173820 1463 gc->irq.irq_enable(d);
461c1a7d
HV
1464}
1465
1466static void gpiochip_irq_disable(struct irq_data *d)
1467{
a0b66a73 1468 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
461c1a7d 1469
a8173820 1470 gc->irq.irq_disable(d);
a0b66a73 1471 gpiochip_disable_irq(gc, d->hwirq);
461c1a7d
HV
1472}
1473
a0b66a73 1474static void gpiochip_set_irq_hooks(struct gpio_chip *gc)
ca620f2d 1475{
a0b66a73 1476 struct irq_chip *irqchip = gc->irq.chip;
ca620f2d
HV
1477
1478 if (!irqchip->irq_request_resources &&
1479 !irqchip->irq_release_resources) {
1480 irqchip->irq_request_resources = gpiochip_irq_reqres;
1481 irqchip->irq_release_resources = gpiochip_irq_relres;
1482 }
a0b66a73 1483 if (WARN_ON(gc->irq.irq_enable))
461c1a7d 1484 return;
171948ea 1485 /* Check if the irqchip already has this hook... */
9d552219
NS
1486 if (irqchip->irq_enable == gpiochip_irq_enable ||
1487 irqchip->irq_mask == gpiochip_irq_mask) {
171948ea
HV
1488 /*
1489 * ...and if so, give a gentle warning that this is bad
1490 * practice.
1491 */
a0b66a73 1492 chip_info(gc,
171948ea
HV
1493 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
1494 return;
1495 }
a8173820
MS
1496
1497 if (irqchip->irq_disable) {
1498 gc->irq.irq_disable = irqchip->irq_disable;
1499 irqchip->irq_disable = gpiochip_irq_disable;
1500 } else {
1501 gc->irq.irq_mask = irqchip->irq_mask;
1502 irqchip->irq_mask = gpiochip_irq_mask;
1503 }
1504
1505 if (irqchip->irq_enable) {
1506 gc->irq.irq_enable = irqchip->irq_enable;
1507 irqchip->irq_enable = gpiochip_irq_enable;
1508 } else {
1509 gc->irq.irq_unmask = irqchip->irq_unmask;
1510 irqchip->irq_unmask = gpiochip_irq_unmask;
1511 }
14250520
LW
1512}
1513
e0d89728
TR
1514/**
1515 * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
a0b66a73 1516 * @gc: the GPIO chip to add the IRQ chip to
39c3fd58
AL
1517 * @lock_key: lockdep class for IRQ lock
1518 * @request_key: lockdep class for IRQ request
e0d89728 1519 */
a0b66a73 1520static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1521 struct lock_class_key *lock_key,
1522 struct lock_class_key *request_key)
e0d89728 1523{
5c63a9db 1524 struct fwnode_handle *fwnode = dev_fwnode(&gc->gpiodev->dev);
a0b66a73 1525 struct irq_chip *irqchip = gc->irq.chip;
e0d89728
TR
1526 unsigned int type;
1527 unsigned int i;
1528
1529 if (!irqchip)
1530 return 0;
1531
a0b66a73
LW
1532 if (gc->irq.parent_handler && gc->can_sleep) {
1533 chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n");
e0d89728
TR
1534 return -EINVAL;
1535 }
1536
a0b66a73 1537 type = gc->irq.default_type;
e0d89728
TR
1538
1539 /*
1540 * Specifying a default trigger is a terrible idea if DT or ACPI is
1541 * used to configure the interrupts, as you may end up with
1542 * conflicting triggers. Tell the user, and reset to NONE.
1543 */
5c63a9db
AS
1544 if (WARN(fwnode && type != IRQ_TYPE_NONE,
1545 "%pfw: Ignoring %u default trigger\n", fwnode, type))
e0d89728
TR
1546 type = IRQ_TYPE_NONE;
1547
ef382374
NS
1548 if (gc->to_irq)
1549 chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__);
1550
a0b66a73
LW
1551 gc->to_irq = gpiochip_to_irq;
1552 gc->irq.default_type = type;
1553 gc->irq.lock_key = lock_key;
1554 gc->irq.request_key = request_key;
e0d89728 1555
fdd61a01 1556 /* If a parent irqdomain is provided, let's build a hierarchy */
a0b66a73
LW
1557 if (gpiochip_hierarchy_is_hierarchical(gc)) {
1558 int ret = gpiochip_hierarchy_add_domain(gc);
fdd61a01
LW
1559 if (ret)
1560 return ret;
1561 } else {
1562 /* Some drivers provide custom irqdomain ops */
5c63a9db 1563 gc->irq.domain = irq_domain_create_simple(fwnode,
a0b66a73
LW
1564 gc->ngpio,
1565 gc->irq.first,
266315fb
AS
1566 gc->irq.domain_ops ?: &gpiochip_domain_ops,
1567 gc);
a0b66a73 1568 if (!gc->irq.domain)
fdd61a01
LW
1569 return -EINVAL;
1570 }
e0d89728 1571
a0b66a73 1572 if (gc->irq.parent_handler) {
a0b66a73 1573 for (i = 0; i < gc->irq.num_parents; i++) {
cfe6807d
MZ
1574 void *data;
1575
1576 if (gc->irq.per_parent_data)
1577 data = gc->irq.parent_handler_data_array[i];
1578 else
1579 data = gc->irq.parent_handler_data ?: gc;
1580
e0d89728
TR
1581 /*
1582 * The parent IRQ chip is already using the chip_data
1583 * for this IRQ chip, so our callbacks simply use the
1584 * handler_data.
1585 */
a0b66a73
LW
1586 irq_set_chained_handler_and_data(gc->irq.parents[i],
1587 gc->irq.parent_handler,
e0d89728
TR
1588 data);
1589 }
e0d89728
TR
1590 }
1591
a0b66a73 1592 gpiochip_set_irq_hooks(gc);
ca620f2d 1593
a0b66a73 1594 acpi_gpiochip_request_interrupts(gc);
e0d89728
TR
1595
1596 return 0;
1597}
1598
14250520
LW
1599/**
1600 * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
a0b66a73 1601 * @gc: the gpiochip to remove the irqchip from
14250520
LW
1602 *
1603 * This is called only from gpiochip_remove()
1604 */
a0b66a73 1605static void gpiochip_irqchip_remove(struct gpio_chip *gc)
14250520 1606{
a0b66a73 1607 struct irq_chip *irqchip = gc->irq.chip;
39e5f096 1608 unsigned int offset;
c3626fde 1609
a0b66a73 1610 acpi_gpiochip_free_interrupts(gc);
afa82fab 1611
a0b66a73
LW
1612 if (irqchip && gc->irq.parent_handler) {
1613 struct gpio_irq_chip *irq = &gc->irq;
39e5f096
TR
1614 unsigned int i;
1615
1616 for (i = 0; i < irq->num_parents; i++)
1617 irq_set_chained_handler_and_data(irq->parents[i],
1618 NULL, NULL);
25e4fe92
DES
1619 }
1620
c3626fde 1621 /* Remove all IRQ mappings and delete the domain */
a0b66a73 1622 if (gc->irq.domain) {
39e5f096
TR
1623 unsigned int irq;
1624
a0b66a73
LW
1625 for (offset = 0; offset < gc->ngpio; offset++) {
1626 if (!gpiochip_irqchip_irq_valid(gc, offset))
79b804cb 1627 continue;
f0fbe7bc 1628
a0b66a73 1629 irq = irq_find_mapping(gc->irq.domain, offset);
f0fbe7bc 1630 irq_dispose_mapping(irq);
79b804cb 1631 }
f0fbe7bc 1632
a0b66a73 1633 irq_domain_remove(gc->irq.domain);
c3626fde 1634 }
14250520 1635
461c1a7d
HV
1636 if (irqchip) {
1637 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
1638 irqchip->irq_request_resources = NULL;
1639 irqchip->irq_release_resources = NULL;
1640 }
1641 if (irqchip->irq_enable == gpiochip_irq_enable) {
a0b66a73
LW
1642 irqchip->irq_enable = gc->irq.irq_enable;
1643 irqchip->irq_disable = gc->irq.irq_disable;
461c1a7d 1644 }
14250520 1645 }
a0b66a73
LW
1646 gc->irq.irq_enable = NULL;
1647 gc->irq.irq_disable = NULL;
1648 gc->irq.chip = NULL;
79b804cb 1649
a0b66a73 1650 gpiochip_irqchip_free_valid_mask(gc);
14250520
LW
1651}
1652
6a45b0e2
MW
1653/**
1654 * gpiochip_irqchip_add_domain() - adds an irqdomain to a gpiochip
1655 * @gc: the gpiochip to add the irqchip to
1656 * @domain: the irqdomain to add to the gpiochip
1657 *
1658 * This function adds an IRQ domain to the gpiochip.
1659 */
1660int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
1661 struct irq_domain *domain)
1662{
1663 if (!domain)
1664 return -EINVAL;
1665
1666 gc->to_irq = gpiochip_to_irq;
1667 gc->irq.domain = domain;
1668
1669 return 0;
1670}
1671EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain);
1672
14250520
LW
1673#else /* CONFIG_GPIOLIB_IRQCHIP */
1674
a0b66a73 1675static inline int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1676 struct lock_class_key *lock_key,
1677 struct lock_class_key *request_key)
e0d89728
TR
1678{
1679 return 0;
1680}
a0b66a73 1681static void gpiochip_irqchip_remove(struct gpio_chip *gc) {}
9411e3aa 1682
a0b66a73 1683static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
9411e3aa
AS
1684{
1685 return 0;
1686}
1687
a0b66a73 1688static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb
MW
1689{
1690 return 0;
1691}
a0b66a73 1692static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 1693{ }
14250520
LW
1694
1695#endif /* CONFIG_GPIOLIB_IRQCHIP */
1696
c771c2f4
JG
1697/**
1698 * gpiochip_generic_request() - request the gpio function for a pin
a0b66a73 1699 * @gc: the gpiochip owning the GPIO
c771c2f4
JG
1700 * @offset: the offset of the GPIO to request for GPIO function
1701 */
13daf489 1702int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset)
c771c2f4 1703{
89ad556b 1704#ifdef CONFIG_PINCTRL
a0b66a73 1705 if (list_empty(&gc->gpiodev->pin_ranges))
89ad556b
TR
1706 return 0;
1707#endif
2ab73c6d 1708
a0b66a73 1709 return pinctrl_gpio_request(gc->gpiodev->base + offset);
c771c2f4
JG
1710}
1711EXPORT_SYMBOL_GPL(gpiochip_generic_request);
1712
1713/**
1714 * gpiochip_generic_free() - free the gpio function from a pin
a0b66a73 1715 * @gc: the gpiochip to request the gpio function for
c771c2f4
JG
1716 * @offset: the offset of the GPIO to free from GPIO function
1717 */
13daf489 1718void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset)
c771c2f4 1719{
6dbbf846
EC
1720#ifdef CONFIG_PINCTRL
1721 if (list_empty(&gc->gpiodev->pin_ranges))
1722 return;
1723#endif
1724
a0b66a73 1725 pinctrl_gpio_free(gc->gpiodev->base + offset);
c771c2f4
JG
1726}
1727EXPORT_SYMBOL_GPL(gpiochip_generic_free);
1728
2956b5d9
MW
1729/**
1730 * gpiochip_generic_config() - apply configuration for a pin
a0b66a73 1731 * @gc: the gpiochip owning the GPIO
2956b5d9
MW
1732 * @offset: the offset of the GPIO to apply the configuration
1733 * @config: the configuration to be applied
1734 */
13daf489 1735int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset,
2956b5d9
MW
1736 unsigned long config)
1737{
a0b66a73 1738 return pinctrl_gpio_set_config(gc->gpiodev->base + offset, config);
2956b5d9
MW
1739}
1740EXPORT_SYMBOL_GPL(gpiochip_generic_config);
1741
f23f1516 1742#ifdef CONFIG_PINCTRL
165adc9c 1743
586a87e6
CR
1744/**
1745 * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
a0b66a73 1746 * @gc: the gpiochip to add the range for
d32651f6 1747 * @pctldev: the pin controller to map to
586a87e6
CR
1748 * @gpio_offset: the start offset in the current gpio_chip number space
1749 * @pin_group: name of the pin group inside the pin controller
973c1714
CL
1750 *
1751 * Calling this function directly from a DeviceTree-supported
1752 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
1753 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
1754 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
586a87e6 1755 */
a0b66a73 1756int gpiochip_add_pingroup_range(struct gpio_chip *gc,
586a87e6
CR
1757 struct pinctrl_dev *pctldev,
1758 unsigned int gpio_offset, const char *pin_group)
1759{
1760 struct gpio_pin_range *pin_range;
a0b66a73 1761 struct gpio_device *gdev = gc->gpiodev;
586a87e6
CR
1762 int ret;
1763
1764 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
1765 if (!pin_range) {
a0b66a73 1766 chip_err(gc, "failed to allocate pin ranges\n");
586a87e6
CR
1767 return -ENOMEM;
1768 }
1769
1770 /* Use local offset as range ID */
1771 pin_range->range.id = gpio_offset;
a0b66a73
LW
1772 pin_range->range.gc = gc;
1773 pin_range->range.name = gc->label;
fdeb8e15 1774 pin_range->range.base = gdev->base + gpio_offset;
586a87e6
CR
1775 pin_range->pctldev = pctldev;
1776
1777 ret = pinctrl_get_group_pins(pctldev, pin_group,
1778 &pin_range->range.pins,
1779 &pin_range->range.npins);
61c6375d
MN
1780 if (ret < 0) {
1781 kfree(pin_range);
586a87e6 1782 return ret;
61c6375d 1783 }
586a87e6
CR
1784
1785 pinctrl_add_gpio_range(pctldev, &pin_range->range);
1786
a0b66a73 1787 chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n",
1a2a99c6 1788 gpio_offset, gpio_offset + pin_range->range.npins - 1,
586a87e6
CR
1789 pinctrl_dev_get_devname(pctldev), pin_group);
1790
20ec3e39 1791 list_add_tail(&pin_range->node, &gdev->pin_ranges);
586a87e6
CR
1792
1793 return 0;
1794}
1795EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
1796
3f0f8670
LW
1797/**
1798 * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
a0b66a73 1799 * @gc: the gpiochip to add the range for
950d55f5 1800 * @pinctl_name: the dev_name() of the pin controller to map to
316511c0
LW
1801 * @gpio_offset: the start offset in the current gpio_chip number space
1802 * @pin_offset: the start offset in the pin controller number space
3f0f8670
LW
1803 * @npins: the number of pins from the offset of each pin space (GPIO and
1804 * pin controller) to accumulate in this range
950d55f5
TR
1805 *
1806 * Returns:
1807 * 0 on success, or a negative error-code on failure.
973c1714
CL
1808 *
1809 * Calling this function directly from a DeviceTree-supported
1810 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
1811 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
1812 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
3f0f8670 1813 */
a0b66a73 1814int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
316511c0 1815 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 1816 unsigned int npins)
f23f1516
SH
1817{
1818 struct gpio_pin_range *pin_range;
a0b66a73 1819 struct gpio_device *gdev = gc->gpiodev;
b4d4b1f0 1820 int ret;
f23f1516 1821
3f0f8670 1822 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
f23f1516 1823 if (!pin_range) {
a0b66a73 1824 chip_err(gc, "failed to allocate pin ranges\n");
1e63d7b9 1825 return -ENOMEM;
f23f1516
SH
1826 }
1827
3f0f8670 1828 /* Use local offset as range ID */
316511c0 1829 pin_range->range.id = gpio_offset;
a0b66a73
LW
1830 pin_range->range.gc = gc;
1831 pin_range->range.name = gc->label;
fdeb8e15 1832 pin_range->range.base = gdev->base + gpio_offset;
316511c0 1833 pin_range->range.pin_base = pin_offset;
f23f1516 1834 pin_range->range.npins = npins;
192c369c 1835 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
f23f1516 1836 &pin_range->range);
8f23ca1a 1837 if (IS_ERR(pin_range->pctldev)) {
b4d4b1f0 1838 ret = PTR_ERR(pin_range->pctldev);
a0b66a73 1839 chip_err(gc, "could not create pin range\n");
3f0f8670 1840 kfree(pin_range);
b4d4b1f0 1841 return ret;
3f0f8670 1842 }
a0b66a73 1843 chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
1a2a99c6 1844 gpio_offset, gpio_offset + npins - 1,
316511c0
LW
1845 pinctl_name,
1846 pin_offset, pin_offset + npins - 1);
f23f1516 1847
20ec3e39 1848 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1e63d7b9
LW
1849
1850 return 0;
f23f1516 1851}
165adc9c 1852EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
f23f1516 1853
3f0f8670
LW
1854/**
1855 * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
a0b66a73 1856 * @gc: the chip to remove all the mappings for
3f0f8670 1857 */
a0b66a73 1858void gpiochip_remove_pin_ranges(struct gpio_chip *gc)
f23f1516
SH
1859{
1860 struct gpio_pin_range *pin_range, *tmp;
a0b66a73 1861 struct gpio_device *gdev = gc->gpiodev;
f23f1516 1862
20ec3e39 1863 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
f23f1516
SH
1864 list_del(&pin_range->node);
1865 pinctrl_remove_gpio_range(pin_range->pctldev,
1866 &pin_range->range);
3f0f8670 1867 kfree(pin_range);
f23f1516
SH
1868 }
1869}
165adc9c
LW
1870EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
1871
1872#endif /* CONFIG_PINCTRL */
f23f1516 1873
d2876d08
DB
1874/* These "optional" allocation calls help prevent drivers from stomping
1875 * on each other, and help provide better diagnostics in debugfs.
1876 * They're called even less than the "set direction" calls.
1877 */
fac9d885 1878static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
d2876d08 1879{
a0b66a73 1880 struct gpio_chip *gc = desc->gdev->chip;
d377f56f 1881 int ret;
d2876d08 1882 unsigned long flags;
3789f5ac 1883 unsigned offset;
d2876d08 1884
18534df4
MS
1885 if (label) {
1886 label = kstrdup_const(label, GFP_KERNEL);
1887 if (!label)
1888 return -ENOMEM;
1889 }
1890
bcabdef1
AC
1891 spin_lock_irqsave(&gpio_lock, flags);
1892
d2876d08 1893 /* NOTE: gpio_request() can be called in early boot,
35e8bb51 1894 * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
d2876d08
DB
1895 */
1896
1897 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
1898 desc_set_label(desc, label ? : "?");
438d8908 1899 } else {
d377f56f 1900 ret = -EBUSY;
95d9f84f 1901 goto out_free_unlock;
35e8bb51
DB
1902 }
1903
a0b66a73
LW
1904 if (gc->request) {
1905 /* gc->request may sleep */
35e8bb51 1906 spin_unlock_irqrestore(&gpio_lock, flags);
3789f5ac 1907 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
1908 if (gpiochip_line_is_valid(gc, offset))
1909 ret = gc->request(gc, offset);
3789f5ac 1910 else
d377f56f 1911 ret = -EINVAL;
35e8bb51
DB
1912 spin_lock_irqsave(&gpio_lock, flags);
1913
8bbff39c 1914 if (ret) {
35e8bb51 1915 desc_set_label(desc, NULL);
35e8bb51 1916 clear_bit(FLAG_REQUESTED, &desc->flags);
95d9f84f 1917 goto out_free_unlock;
35e8bb51 1918 }
438d8908 1919 }
a0b66a73
LW
1920 if (gc->get_direction) {
1921 /* gc->get_direction may sleep */
80b0a602 1922 spin_unlock_irqrestore(&gpio_lock, flags);
372e722e 1923 gpiod_get_direction(desc);
80b0a602
MN
1924 spin_lock_irqsave(&gpio_lock, flags);
1925 }
77c2d792 1926 spin_unlock_irqrestore(&gpio_lock, flags);
95d9f84f
AS
1927 return 0;
1928
1929out_free_unlock:
1930 spin_unlock_irqrestore(&gpio_lock, flags);
1931 kfree_const(label);
d377f56f 1932 return ret;
77c2d792
MW
1933}
1934
fdeb8e15
LW
1935/*
1936 * This descriptor validation needs to be inserted verbatim into each
1937 * function taking a descriptor, so we need to use a preprocessor
54d77198
LW
1938 * macro to avoid endless duplication. If the desc is NULL it is an
1939 * optional GPIO and calls should just bail out.
fdeb8e15 1940 */
a746a232
RV
1941static int validate_desc(const struct gpio_desc *desc, const char *func)
1942{
1943 if (!desc)
1944 return 0;
1945 if (IS_ERR(desc)) {
1946 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
1947 return PTR_ERR(desc);
1948 }
1949 if (!desc->gdev) {
1950 pr_warn("%s: invalid GPIO (no device)\n", func);
1951 return -EINVAL;
1952 }
1953 if (!desc->gdev->chip) {
1954 dev_warn(&desc->gdev->dev,
1955 "%s: backing chip is gone\n", func);
1956 return 0;
1957 }
1958 return 1;
1959}
1960
fdeb8e15 1961#define VALIDATE_DESC(desc) do { \
a746a232
RV
1962 int __valid = validate_desc(desc, __func__); \
1963 if (__valid <= 0) \
1964 return __valid; \
1965 } while (0)
fdeb8e15
LW
1966
1967#define VALIDATE_DESC_VOID(desc) do { \
a746a232
RV
1968 int __valid = validate_desc(desc, __func__); \
1969 if (__valid <= 0) \
fdeb8e15 1970 return; \
a746a232 1971 } while (0)
fdeb8e15 1972
0eb4c6c2 1973int gpiod_request(struct gpio_desc *desc, const char *label)
77c2d792 1974{
d377f56f 1975 int ret = -EPROBE_DEFER;
fdeb8e15 1976 struct gpio_device *gdev;
77c2d792 1977
fdeb8e15
LW
1978 VALIDATE_DESC(desc);
1979 gdev = desc->gdev;
77c2d792 1980
fdeb8e15 1981 if (try_module_get(gdev->owner)) {
d377f56f 1982 ret = gpiod_request_commit(desc, label);
8bbff39c 1983 if (ret)
fdeb8e15 1984 module_put(gdev->owner);
33a68e86
LW
1985 else
1986 get_device(&gdev->dev);
77c2d792
MW
1987 }
1988
d377f56f
LW
1989 if (ret)
1990 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
77c2d792 1991
d377f56f 1992 return ret;
d2876d08 1993}
372e722e 1994
fac9d885 1995static bool gpiod_free_commit(struct gpio_desc *desc)
d2876d08 1996{
77c2d792 1997 bool ret = false;
d2876d08 1998 unsigned long flags;
a0b66a73 1999 struct gpio_chip *gc;
d2876d08 2000
3d599d1c
UKK
2001 might_sleep();
2002
372e722e 2003 gpiod_unexport(desc);
d8f388d8 2004
d2876d08
DB
2005 spin_lock_irqsave(&gpio_lock, flags);
2006
a0b66a73
LW
2007 gc = desc->gdev->chip;
2008 if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) {
2009 if (gc->free) {
35e8bb51 2010 spin_unlock_irqrestore(&gpio_lock, flags);
a0b66a73
LW
2011 might_sleep_if(gc->can_sleep);
2012 gc->free(gc, gpio_chip_hwgpio(desc));
35e8bb51
DB
2013 spin_lock_irqsave(&gpio_lock, flags);
2014 }
18534df4 2015 kfree_const(desc->label);
d2876d08 2016 desc_set_label(desc, NULL);
07697461 2017 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
35e8bb51 2018 clear_bit(FLAG_REQUESTED, &desc->flags);
aca5ce14 2019 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
25553ff0 2020 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
9225d516
DF
2021 clear_bit(FLAG_PULL_UP, &desc->flags);
2022 clear_bit(FLAG_PULL_DOWN, &desc->flags);
2148ad77 2023 clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
73e03419
KG
2024 clear_bit(FLAG_EDGE_RISING, &desc->flags);
2025 clear_bit(FLAG_EDGE_FALLING, &desc->flags);
f625d460 2026 clear_bit(FLAG_IS_HOGGED, &desc->flags);
63636d95
GU
2027#ifdef CONFIG_OF_DYNAMIC
2028 desc->hog = NULL;
65cff704
KG
2029#endif
2030#ifdef CONFIG_GPIO_CDEV
2031 WRITE_ONCE(desc->debounce_period_us, 0);
63636d95 2032#endif
77c2d792
MW
2033 ret = true;
2034 }
d2876d08
DB
2035
2036 spin_unlock_irqrestore(&gpio_lock, flags);
6accc376
KG
2037 blocking_notifier_call_chain(&desc->gdev->notifier,
2038 GPIOLINE_CHANGED_RELEASED, desc);
51c1064e 2039
77c2d792
MW
2040 return ret;
2041}
2042
0eb4c6c2 2043void gpiod_free(struct gpio_desc *desc)
77c2d792 2044{
fac9d885 2045 if (desc && desc->gdev && gpiod_free_commit(desc)) {
fdeb8e15 2046 module_put(desc->gdev->owner);
33a68e86
LW
2047 put_device(&desc->gdev->dev);
2048 } else {
77c2d792 2049 WARN_ON(extra_checks);
33a68e86 2050 }
d2876d08 2051}
372e722e 2052
d2876d08
DB
2053/**
2054 * gpiochip_is_requested - return string iff signal was requested
a0b66a73 2055 * @gc: controller managing the signal
d2876d08
DB
2056 * @offset: of signal within controller's 0..(ngpio - 1) range
2057 *
2058 * Returns NULL if the GPIO is not currently requested, else a string.
9c8318ff
AC
2059 * The string returned is the label passed to gpio_request(); if none has been
2060 * passed it is a meaningless, non-NULL constant.
d2876d08
DB
2061 *
2062 * This function is for use by GPIO controller drivers. The label can
2063 * help with diagnostics, and knowing that the signal is used as a GPIO
2064 * can help avoid accidentally multiplexing it to another controller.
2065 */
13daf489 2066const char *gpiochip_is_requested(struct gpio_chip *gc, unsigned int offset)
d2876d08 2067{
6c0b4e6c 2068 struct gpio_desc *desc;
6c0b4e6c 2069
a0b66a73 2070 desc = gpiochip_get_desc(gc, offset);
1739a2d8
BG
2071 if (IS_ERR(desc))
2072 return NULL;
6c0b4e6c 2073
372e722e 2074 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
d2876d08 2075 return NULL;
372e722e 2076 return desc->label;
d2876d08
DB
2077}
2078EXPORT_SYMBOL_GPL(gpiochip_is_requested);
2079
77c2d792
MW
2080/**
2081 * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
a0b66a73 2082 * @gc: GPIO chip
950d55f5 2083 * @hwnum: hardware number of the GPIO for which to request the descriptor
77c2d792 2084 * @label: label for the GPIO
5923ea6c
LW
2085 * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
2086 * specify things like line inversion semantics with the machine flags
2087 * such as GPIO_OUT_LOW
2088 * @dflags: descriptor request flags for this GPIO or 0 if default, this
2089 * can be used to specify consumer semantics such as open drain
77c2d792
MW
2090 *
2091 * Function allows GPIO chip drivers to request and use their own GPIO
2092 * descriptors via gpiolib API. Difference to gpiod_request() is that this
2093 * function will not increase reference count of the GPIO chip module. This
2094 * allows the GPIO chip module to be unloaded as needed (we assume that the
2095 * GPIO chip driver handles freeing the GPIOs it has requested).
950d55f5
TR
2096 *
2097 * Returns:
2098 * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
2099 * code on failure.
77c2d792 2100 */
a0b66a73 2101struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc,
06863620 2102 unsigned int hwnum,
21abf103 2103 const char *label,
5923ea6c
LW
2104 enum gpio_lookup_flags lflags,
2105 enum gpiod_flags dflags)
77c2d792 2106{
a0b66a73 2107 struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum);
d377f56f 2108 int ret;
77c2d792 2109
abdc08a3 2110 if (IS_ERR(desc)) {
a0b66a73 2111 chip_err(gc, "failed to get GPIO descriptor\n");
abdc08a3
AC
2112 return desc;
2113 }
2114
d377f56f
LW
2115 ret = gpiod_request_commit(desc, label);
2116 if (ret < 0)
2117 return ERR_PTR(ret);
77c2d792 2118
d377f56f
LW
2119 ret = gpiod_configure_flags(desc, label, lflags, dflags);
2120 if (ret) {
a0b66a73 2121 chip_err(gc, "setup of own GPIO %s failed\n", label);
21abf103 2122 gpiod_free_commit(desc);
d377f56f 2123 return ERR_PTR(ret);
21abf103
LW
2124 }
2125
abdc08a3 2126 return desc;
77c2d792 2127}
f7d4ad98 2128EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
77c2d792
MW
2129
2130/**
2131 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
2132 * @desc: GPIO descriptor to free
2133 *
2134 * Function frees the given GPIO requested previously with
2135 * gpiochip_request_own_desc().
2136 */
2137void gpiochip_free_own_desc(struct gpio_desc *desc)
2138{
2139 if (desc)
fac9d885 2140 gpiod_free_commit(desc);
77c2d792 2141}
f7d4ad98 2142EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
d2876d08 2143
fdeb8e15
LW
2144/*
2145 * Drivers MUST set GPIO direction before making get/set calls. In
d2876d08
DB
2146 * some cases this is done in early boot, before IRQs are enabled.
2147 *
2148 * As a rule these aren't called more than once (except for drivers
2149 * using the open-drain emulation idiom) so these are natural places
2150 * to accumulate extra debugging checks. Note that we can't (yet)
2151 * rely on gpio_request() having been called beforehand.
2152 */
2153
d99f8876 2154static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset,
62adc6f3 2155 unsigned long config)
71479789 2156{
d90f3685
BG
2157 if (!gc->set_config)
2158 return -ENOTSUPP;
542f3615 2159
62adc6f3 2160 return gc->set_config(gc, offset, config);
71479789
TP
2161}
2162
0c4d8666
AS
2163static int gpio_set_config_with_argument(struct gpio_desc *desc,
2164 enum pin_config_param mode,
2165 u32 argument)
d99f8876 2166{
a0b66a73 2167 struct gpio_chip *gc = desc->gdev->chip;
91b4ea5f 2168 unsigned long config;
0c4d8666
AS
2169
2170 config = pinconf_to_config_packed(mode, argument);
2171 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
2172}
2173
baca3b15
AS
2174static int gpio_set_config_with_argument_optional(struct gpio_desc *desc,
2175 enum pin_config_param mode,
2176 u32 argument)
2177{
2178 struct device *dev = &desc->gdev->dev;
2179 int gpio = gpio_chip_hwgpio(desc);
2180 int ret;
2181
2182 ret = gpio_set_config_with_argument(desc, mode, argument);
2183 if (ret != -ENOTSUPP)
2184 return ret;
d99f8876
BG
2185
2186 switch (mode) {
baca3b15
AS
2187 case PIN_CONFIG_PERSIST_STATE:
2188 dev_dbg(dev, "Persistence not supported for GPIO %d\n", gpio);
d99f8876 2189 break;
d99f8876 2190 default:
baca3b15 2191 break;
d99f8876
BG
2192 }
2193
baca3b15
AS
2194 return 0;
2195}
2196
0c4d8666
AS
2197static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode)
2198{
6aa32ad7 2199 return gpio_set_config_with_argument(desc, mode, 0);
d99f8876
BG
2200}
2201
5f4bf171 2202static int gpio_set_bias(struct gpio_desc *desc)
2148ad77 2203{
9ef6293c 2204 enum pin_config_param bias;
6aa32ad7 2205 unsigned int arg;
2148ad77
KG
2206
2207 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
2208 bias = PIN_CONFIG_BIAS_DISABLE;
2209 else if (test_bit(FLAG_PULL_UP, &desc->flags))
2210 bias = PIN_CONFIG_BIAS_PULL_UP;
2211 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
2212 bias = PIN_CONFIG_BIAS_PULL_DOWN;
9ef6293c
AS
2213 else
2214 return 0;
2148ad77 2215
6aa32ad7
AS
2216 switch (bias) {
2217 case PIN_CONFIG_BIAS_PULL_DOWN:
2218 case PIN_CONFIG_BIAS_PULL_UP:
2219 arg = 1;
2220 break;
2221
2222 default:
2223 arg = 0;
2224 break;
2148ad77 2225 }
6aa32ad7 2226
baca3b15 2227 return gpio_set_config_with_argument_optional(desc, bias, arg);
2148ad77
KG
2228}
2229
f725edd8
AS
2230int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce)
2231{
2232 return gpio_set_config_with_argument_optional(desc,
2233 PIN_CONFIG_INPUT_DEBOUNCE,
2234 debounce);
2148ad77
KG
2235}
2236
79a9becd
AC
2237/**
2238 * gpiod_direction_input - set the GPIO direction to input
2239 * @desc: GPIO to set to input
2240 *
2241 * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
2242 * be called safely on it.
2243 *
2244 * Return 0 in case of success, else an error code.
2245 */
2246int gpiod_direction_input(struct gpio_desc *desc)
d2876d08 2247{
a0b66a73 2248 struct gpio_chip *gc;
d377f56f 2249 int ret = 0;
d2876d08 2250
fdeb8e15 2251 VALIDATE_DESC(desc);
a0b66a73 2252 gc = desc->gdev->chip;
bcabdef1 2253
e48d194d
LW
2254 /*
2255 * It is legal to have no .get() and .direction_input() specified if
2256 * the chip is output-only, but you can't specify .direction_input()
2257 * and not support the .get() operation, that doesn't make sense.
2258 */
a0b66a73 2259 if (!gc->get && gc->direction_input) {
6424de5a 2260 gpiod_warn(desc,
e48d194d
LW
2261 "%s: missing get() but have direction_input()\n",
2262 __func__);
be1a4b13
LW
2263 return -EIO;
2264 }
2265
e48d194d
LW
2266 /*
2267 * If we have a .direction_input() callback, things are simple,
2268 * just call it. Else we are some input-only chip so try to check the
2269 * direction (if .get_direction() is supported) else we silently
2270 * assume we are in input mode after this.
2271 */
a0b66a73
LW
2272 if (gc->direction_input) {
2273 ret = gc->direction_input(gc, gpio_chip_hwgpio(desc));
2274 } else if (gc->get_direction &&
2275 (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) {
ae9847f4 2276 gpiod_warn(desc,
e48d194d
LW
2277 "%s: missing direction_input() operation and line is output\n",
2278 __func__);
ae9847f4
RRD
2279 return -EIO;
2280 }
2148ad77 2281 if (ret == 0) {
d2876d08 2282 clear_bit(FLAG_IS_OUT, &desc->flags);
5f4bf171 2283 ret = gpio_set_bias(desc);
2148ad77 2284 }
d449991c 2285
d377f56f 2286 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
d82da797 2287
d377f56f 2288 return ret;
d2876d08 2289}
79a9becd 2290EXPORT_SYMBOL_GPL(gpiod_direction_input);
372e722e 2291
fac9d885 2292static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
d2876d08 2293{
c663e5f5 2294 struct gpio_chip *gc = desc->gdev->chip;
ad17731d 2295 int val = !!value;
ae9847f4 2296 int ret = 0;
d2876d08 2297
e48d194d
LW
2298 /*
2299 * It's OK not to specify .direction_output() if the gpiochip is
2300 * output-only, but if there is then not even a .set() operation it
2301 * is pretty tricky to drive the output line.
2302 */
ae9847f4 2303 if (!gc->set && !gc->direction_output) {
6424de5a 2304 gpiod_warn(desc,
e48d194d
LW
2305 "%s: missing set() and direction_output() operations\n",
2306 __func__);
be1a4b13
LW
2307 return -EIO;
2308 }
2309
ae9847f4
RRD
2310 if (gc->direction_output) {
2311 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
2312 } else {
e48d194d 2313 /* Check that we are in output mode if we can */
ae9847f4
RRD
2314 if (gc->get_direction &&
2315 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
2316 gpiod_warn(desc,
2317 "%s: missing direction_output() operation\n",
2318 __func__);
2319 return -EIO;
2320 }
e48d194d
LW
2321 /*
2322 * If we can't actively set the direction, we are some
2323 * output-only chip, so just drive the output as desired.
2324 */
ae9847f4
RRD
2325 gc->set(gc, gpio_chip_hwgpio(desc), val);
2326 }
2327
c663e5f5 2328 if (!ret)
d2876d08 2329 set_bit(FLAG_IS_OUT, &desc->flags);
ad17731d 2330 trace_gpio_value(desc_to_gpio(desc), 0, val);
c663e5f5
LW
2331 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
2332 return ret;
d2876d08 2333}
ef70bbe1
PZ
2334
2335/**
2336 * gpiod_direction_output_raw - set the GPIO direction to output
2337 * @desc: GPIO to set to output
2338 * @value: initial output value of the GPIO
2339 *
2340 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2341 * be called safely on it. The initial value of the output must be specified
2342 * as raw value on the physical line without regard for the ACTIVE_LOW status.
2343 *
2344 * Return 0 in case of success, else an error code.
2345 */
2346int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
2347{
fdeb8e15 2348 VALIDATE_DESC(desc);
fac9d885 2349 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1
PZ
2350}
2351EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
2352
2353/**
90df4fe0 2354 * gpiod_direction_output - set the GPIO direction to output
ef70bbe1
PZ
2355 * @desc: GPIO to set to output
2356 * @value: initial output value of the GPIO
2357 *
2358 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2359 * be called safely on it. The initial value of the output must be specified
2360 * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
2361 * account.
2362 *
2363 * Return 0 in case of success, else an error code.
2364 */
2365int gpiod_direction_output(struct gpio_desc *desc, int value)
2366{
02e47980
LW
2367 int ret;
2368
fdeb8e15 2369 VALIDATE_DESC(desc);
ef70bbe1
PZ
2370 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2371 value = !value;
ad17731d
LW
2372 else
2373 value = !!value;
02e47980 2374
4e9439dd
HV
2375 /* GPIOs used for enabled IRQs shall not be set as output */
2376 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
2377 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
02e47980
LW
2378 gpiod_err(desc,
2379 "%s: tried to set a GPIO tied to an IRQ as output\n",
2380 __func__);
2381 return -EIO;
2382 }
2383
2384 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
2385 /* First see if we can enable open drain in hardware */
83522358 2386 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN);
02e47980
LW
2387 if (!ret)
2388 goto set_output_value;
2389 /* Emulate open drain by not actively driving the line high */
e735244e
BG
2390 if (value) {
2391 ret = gpiod_direction_input(desc);
2392 goto set_output_flag;
2393 }
02e47980
LW
2394 }
2395 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
83522358 2396 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE);
02e47980
LW
2397 if (!ret)
2398 goto set_output_value;
2399 /* Emulate open source by not actively driving the line low */
e735244e
BG
2400 if (!value) {
2401 ret = gpiod_direction_input(desc);
2402 goto set_output_flag;
2403 }
02e47980 2404 } else {
83522358 2405 gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL);
02e47980
LW
2406 }
2407
2408set_output_value:
5f4bf171 2409 ret = gpio_set_bias(desc);
2821ae5f
KG
2410 if (ret)
2411 return ret;
fac9d885 2412 return gpiod_direction_output_raw_commit(desc, value);
e735244e
BG
2413
2414set_output_flag:
2415 /*
2416 * When emulating open-source or open-drain functionalities by not
2417 * actively driving the line (setting mode to input) we still need to
2418 * set the IS_OUT flag or otherwise we won't be able to set the line
2419 * value anymore.
2420 */
2421 if (ret == 0)
2422 set_bit(FLAG_IS_OUT, &desc->flags);
2423 return ret;
ef70bbe1 2424}
79a9becd 2425EXPORT_SYMBOL_GPL(gpiod_direction_output);
d2876d08 2426
8ced32ff
GU
2427/**
2428 * gpiod_set_config - sets @config for a GPIO
2429 * @desc: descriptor of the GPIO for which to set the configuration
2430 * @config: Same packed config format as generic pinconf
2431 *
2432 * Returns:
2433 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2434 * configuration.
2435 */
2436int gpiod_set_config(struct gpio_desc *desc, unsigned long config)
2437{
a0b66a73 2438 struct gpio_chip *gc;
8ced32ff
GU
2439
2440 VALIDATE_DESC(desc);
a0b66a73 2441 gc = desc->gdev->chip;
8ced32ff 2442
a0b66a73 2443 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
8ced32ff
GU
2444}
2445EXPORT_SYMBOL_GPL(gpiod_set_config);
2446
c4b5be98 2447/**
950d55f5
TR
2448 * gpiod_set_debounce - sets @debounce time for a GPIO
2449 * @desc: descriptor of the GPIO for which to set debounce time
2450 * @debounce: debounce time in microseconds
65d87656 2451 *
950d55f5
TR
2452 * Returns:
2453 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2454 * debounce time.
c4b5be98 2455 */
13daf489 2456int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce)
c4b5be98 2457{
8ced32ff 2458 unsigned long config;
be1a4b13 2459
2956b5d9 2460 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
8ced32ff 2461 return gpiod_set_config(desc, config);
c4b5be98 2462}
79a9becd 2463EXPORT_SYMBOL_GPL(gpiod_set_debounce);
372e722e 2464
e10f72bf
AJ
2465/**
2466 * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
2467 * @desc: descriptor of the GPIO for which to configure persistence
2468 * @transitory: True to lose state on suspend or reset, false for persistence
2469 *
2470 * Returns:
2471 * 0 on success, otherwise a negative error code.
2472 */
2473int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
2474{
156dd392 2475 VALIDATE_DESC(desc);
e10f72bf
AJ
2476 /*
2477 * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
2478 * persistence state.
2479 */
4fc5bfeb 2480 assign_bit(FLAG_TRANSITORY, &desc->flags, transitory);
e10f72bf
AJ
2481
2482 /* If the driver supports it, set the persistence state now */
baca3b15
AS
2483 return gpio_set_config_with_argument_optional(desc,
2484 PIN_CONFIG_PERSIST_STATE,
2485 !transitory);
e10f72bf
AJ
2486}
2487EXPORT_SYMBOL_GPL(gpiod_set_transitory);
2488
79a9becd
AC
2489/**
2490 * gpiod_is_active_low - test whether a GPIO is active-low or not
2491 * @desc: the gpio descriptor to test
2492 *
2493 * Returns 1 if the GPIO is active-low, 0 otherwise.
2494 */
2495int gpiod_is_active_low(const struct gpio_desc *desc)
372e722e 2496{
fdeb8e15 2497 VALIDATE_DESC(desc);
79a9becd 2498 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
372e722e 2499}
79a9becd 2500EXPORT_SYMBOL_GPL(gpiod_is_active_low);
d2876d08 2501
d3a5bcb4
MM
2502/**
2503 * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not
2504 * @desc: the gpio descriptor to change
2505 */
2506void gpiod_toggle_active_low(struct gpio_desc *desc)
2507{
2508 VALIDATE_DESC_VOID(desc);
2509 change_bit(FLAG_ACTIVE_LOW, &desc->flags);
2510}
2511EXPORT_SYMBOL_GPL(gpiod_toggle_active_low);
2512
d2876d08
DB
2513/* I/O calls are only valid after configuration completed; the relevant
2514 * "is this a valid GPIO" error checks should already have been done.
2515 *
2516 * "Get" operations are often inlinable as reading a pin value register,
2517 * and masking the relevant bit in that register.
2518 *
2519 * When "set" operations are inlinable, they involve writing that mask to
2520 * one register to set a low value, or a different register to set it high.
2521 * Otherwise locking is needed, so there may be little value to inlining.
2522 *
2523 *------------------------------------------------------------------------
2524 *
2525 * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
2526 * have requested the GPIO. That can include implicit requesting by
2527 * a direction setting call. Marking a gpio as requested locks its chip
2528 * in memory, guaranteeing that these table lookups need no more locking
2529 * and that gpiochip_remove() will fail.
2530 *
2531 * REVISIT when debugging, consider adding some instrumentation to ensure
2532 * that the GPIO was actually requested.
2533 */
2534
fac9d885 2535static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
d2876d08 2536{
a0b66a73 2537 struct gpio_chip *gc;
372e722e 2538 int offset;
e20538b8 2539 int value;
d2876d08 2540
a0b66a73 2541 gc = desc->gdev->chip;
372e722e 2542 offset = gpio_chip_hwgpio(desc);
a0b66a73 2543 value = gc->get ? gc->get(gc, offset) : -EIO;
723a6303 2544 value = value < 0 ? value : !!value;
372e722e 2545 trace_gpio_value(desc_to_gpio(desc), 1, value);
3f397c21 2546 return value;
d2876d08 2547}
372e722e 2548
a0b66a73 2549static int gpio_chip_get_multiple(struct gpio_chip *gc,
eec1d566
LW
2550 unsigned long *mask, unsigned long *bits)
2551{
a0b66a73
LW
2552 if (gc->get_multiple) {
2553 return gc->get_multiple(gc, mask, bits);
2554 } else if (gc->get) {
eec1d566
LW
2555 int i, value;
2556
a0b66a73
LW
2557 for_each_set_bit(i, mask, gc->ngpio) {
2558 value = gc->get(gc, i);
eec1d566
LW
2559 if (value < 0)
2560 return value;
2561 __assign_bit(i, bits, value);
2562 }
2563 return 0;
2564 }
2565 return -EIO;
2566}
2567
2568int gpiod_get_array_value_complex(bool raw, bool can_sleep,
2569 unsigned int array_size,
2570 struct gpio_desc **desc_array,
77588c14 2571 struct gpio_array *array_info,
b9762beb 2572 unsigned long *value_bitmap)
eec1d566 2573{
d377f56f 2574 int ret, i = 0;
b17566a6
JK
2575
2576 /*
2577 * Validate array_info against desc_array and its size.
2578 * It should immediately follow desc_array if both
2579 * have been obtained from the same gpiod_get_array() call.
2580 */
2581 if (array_info && array_info->desc == desc_array &&
2582 array_size <= array_info->size &&
2583 (void *)array_info == desc_array + array_info->size) {
2584 if (!can_sleep)
2585 WARN_ON(array_info->chip->can_sleep);
2586
d377f56f 2587 ret = gpio_chip_get_multiple(array_info->chip,
b17566a6
JK
2588 array_info->get_mask,
2589 value_bitmap);
d377f56f
LW
2590 if (ret)
2591 return ret;
b17566a6
JK
2592
2593 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2594 bitmap_xor(value_bitmap, value_bitmap,
2595 array_info->invert_mask, array_size);
2596
b17566a6 2597 i = find_first_zero_bit(array_info->get_mask, array_size);
ae66eca0
AS
2598 if (i == array_size)
2599 return 0;
b17566a6
JK
2600 } else {
2601 array_info = NULL;
2602 }
eec1d566
LW
2603
2604 while (i < array_size) {
a0b66a73 2605 struct gpio_chip *gc = desc_array[i]->gdev->chip;
c80c4435
AS
2606 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
2607 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
3027743f 2608 unsigned long *mask, *bits;
c07ea8d0 2609 int first, j;
eec1d566 2610
a0b66a73 2611 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
c80c4435
AS
2612 mask = fastpath_mask;
2613 bits = fastpath_bits;
3027743f 2614 } else {
c354c295
AS
2615 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
2616
2617 mask = bitmap_alloc(gc->ngpio, flags);
3027743f
LA
2618 if (!mask)
2619 return -ENOMEM;
c80c4435 2620
c354c295
AS
2621 bits = bitmap_alloc(gc->ngpio, flags);
2622 if (!bits) {
2623 bitmap_free(mask);
2624 return -ENOMEM;
2625 }
3027743f
LA
2626 }
2627
a0b66a73 2628 bitmap_zero(mask, gc->ngpio);
3027743f 2629
eec1d566 2630 if (!can_sleep)
a0b66a73 2631 WARN_ON(gc->can_sleep);
eec1d566
LW
2632
2633 /* collect all inputs belonging to the same chip */
2634 first = i;
eec1d566
LW
2635 do {
2636 const struct gpio_desc *desc = desc_array[i];
2637 int hwgpio = gpio_chip_hwgpio(desc);
2638
2639 __set_bit(hwgpio, mask);
2640 i++;
b17566a6
JK
2641
2642 if (array_info)
35ae7f96
JK
2643 i = find_next_zero_bit(array_info->get_mask,
2644 array_size, i);
eec1d566 2645 } while ((i < array_size) &&
a0b66a73 2646 (desc_array[i]->gdev->chip == gc));
eec1d566 2647
a0b66a73 2648 ret = gpio_chip_get_multiple(gc, mask, bits);
3027743f 2649 if (ret) {
c80c4435 2650 if (mask != fastpath_mask)
c354c295
AS
2651 bitmap_free(mask);
2652 if (bits != fastpath_bits)
2653 bitmap_free(bits);
eec1d566 2654 return ret;
3027743f 2655 }
eec1d566 2656
b17566a6 2657 for (j = first; j < i; ) {
eec1d566
LW
2658 const struct gpio_desc *desc = desc_array[j];
2659 int hwgpio = gpio_chip_hwgpio(desc);
2660 int value = test_bit(hwgpio, bits);
2661
2662 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2663 value = !value;
b9762beb 2664 __assign_bit(j, value_bitmap, value);
eec1d566 2665 trace_gpio_value(desc_to_gpio(desc), 1, value);
799d5eb4 2666 j++;
b17566a6
JK
2667
2668 if (array_info)
35ae7f96
JK
2669 j = find_next_zero_bit(array_info->get_mask, i,
2670 j);
eec1d566 2671 }
3027743f 2672
c80c4435 2673 if (mask != fastpath_mask)
c354c295
AS
2674 bitmap_free(mask);
2675 if (bits != fastpath_bits)
2676 bitmap_free(bits);
eec1d566
LW
2677 }
2678 return 0;
2679}
2680
d2876d08 2681/**
79a9becd
AC
2682 * gpiod_get_raw_value() - return a gpio's raw value
2683 * @desc: gpio whose value will be returned
d2876d08 2684 *
79a9becd 2685 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 2686 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd 2687 *
827a9b8b 2688 * This function can be called from contexts where we cannot sleep, and will
79a9becd 2689 * complain if the GPIO chip functions potentially sleep.
d2876d08 2690 */
79a9becd 2691int gpiod_get_raw_value(const struct gpio_desc *desc)
d2876d08 2692{
fdeb8e15 2693 VALIDATE_DESC(desc);
3285170f 2694 /* Should be using gpiod_get_raw_value_cansleep() */
fdeb8e15 2695 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 2696 return gpiod_get_raw_value_commit(desc);
d2876d08 2697}
79a9becd 2698EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
372e722e 2699
79a9becd
AC
2700/**
2701 * gpiod_get_value() - return a gpio's value
2702 * @desc: gpio whose value will be returned
2703 *
2704 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 2705 * account, or negative errno on failure.
79a9becd 2706 *
827a9b8b 2707 * This function can be called from contexts where we cannot sleep, and will
79a9becd
AC
2708 * complain if the GPIO chip functions potentially sleep.
2709 */
2710int gpiod_get_value(const struct gpio_desc *desc)
372e722e 2711{
79a9becd 2712 int value;
fdeb8e15
LW
2713
2714 VALIDATE_DESC(desc);
3285170f 2715 /* Should be using gpiod_get_value_cansleep() */
fdeb8e15 2716 WARN_ON(desc->gdev->chip->can_sleep);
79a9becd 2717
fac9d885 2718 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
2719 if (value < 0)
2720 return value;
2721
79a9becd
AC
2722 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2723 value = !value;
2724
2725 return value;
372e722e 2726}
79a9becd 2727EXPORT_SYMBOL_GPL(gpiod_get_value);
d2876d08 2728
eec1d566
LW
2729/**
2730 * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
b9762beb 2731 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 2732 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 2733 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2734 * @value_bitmap: bitmap to store the read values
eec1d566
LW
2735 *
2736 * Read the raw values of the GPIOs, i.e. the values of the physical lines
2737 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
2738 * else an error code.
2739 *
827a9b8b 2740 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
2741 * and it will complain if the GPIO chip functions potentially sleep.
2742 */
2743int gpiod_get_raw_array_value(unsigned int array_size,
b9762beb 2744 struct gpio_desc **desc_array,
77588c14 2745 struct gpio_array *array_info,
b9762beb 2746 unsigned long *value_bitmap)
eec1d566
LW
2747{
2748 if (!desc_array)
2749 return -EINVAL;
2750 return gpiod_get_array_value_complex(true, false, array_size,
77588c14
JK
2751 desc_array, array_info,
2752 value_bitmap);
eec1d566
LW
2753}
2754EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
2755
2756/**
2757 * gpiod_get_array_value() - read values from an array of GPIOs
b9762beb 2758 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 2759 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 2760 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2761 * @value_bitmap: bitmap to store the read values
eec1d566
LW
2762 *
2763 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
2764 * into account. Return 0 in case of success, else an error code.
2765 *
827a9b8b 2766 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
2767 * and it will complain if the GPIO chip functions potentially sleep.
2768 */
2769int gpiod_get_array_value(unsigned int array_size,
b9762beb 2770 struct gpio_desc **desc_array,
77588c14 2771 struct gpio_array *array_info,
b9762beb 2772 unsigned long *value_bitmap)
eec1d566
LW
2773{
2774 if (!desc_array)
2775 return -EINVAL;
2776 return gpiod_get_array_value_complex(false, false, array_size,
77588c14
JK
2777 desc_array, array_info,
2778 value_bitmap);
eec1d566
LW
2779}
2780EXPORT_SYMBOL_GPL(gpiod_get_array_value);
2781
aca5ce14 2782/*
fac9d885 2783 * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
79a9becd 2784 * @desc: gpio descriptor whose state need to be set.
20a8a968 2785 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
aca5ce14 2786 */
fac9d885 2787static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
aca5ce14 2788{
d377f56f 2789 int ret = 0;
a0b66a73 2790 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
2791 int offset = gpio_chip_hwgpio(desc);
2792
aca5ce14 2793 if (value) {
a0b66a73 2794 ret = gc->direction_input(gc, offset);
aca5ce14 2795 } else {
a0b66a73 2796 ret = gc->direction_output(gc, offset, 0);
d377f56f 2797 if (!ret)
372e722e 2798 set_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 2799 }
d377f56f
LW
2800 trace_gpio_direction(desc_to_gpio(desc), value, ret);
2801 if (ret < 0)
6424de5a
MB
2802 gpiod_err(desc,
2803 "%s: Error in set_value for open drain err %d\n",
d377f56f 2804 __func__, ret);
aca5ce14
LD
2805}
2806
25553ff0 2807/*
79a9becd
AC
2808 * _gpio_set_open_source_value() - Set the open source gpio's value.
2809 * @desc: gpio descriptor whose state need to be set.
20a8a968 2810 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
25553ff0 2811 */
fac9d885 2812static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
25553ff0 2813{
d377f56f 2814 int ret = 0;
a0b66a73 2815 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
2816 int offset = gpio_chip_hwgpio(desc);
2817
25553ff0 2818 if (value) {
a0b66a73 2819 ret = gc->direction_output(gc, offset, 1);
d377f56f 2820 if (!ret)
372e722e 2821 set_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 2822 } else {
a0b66a73 2823 ret = gc->direction_input(gc, offset);
25553ff0 2824 }
d377f56f
LW
2825 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
2826 if (ret < 0)
6424de5a
MB
2827 gpiod_err(desc,
2828 "%s: Error in set_value for open source err %d\n",
d377f56f 2829 __func__, ret);
25553ff0
LD
2830}
2831
fac9d885 2832static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
d2876d08 2833{
a0b66a73 2834 struct gpio_chip *gc;
d2876d08 2835
a0b66a73 2836 gc = desc->gdev->chip;
372e722e 2837 trace_gpio_value(desc_to_gpio(desc), 0, value);
a0b66a73 2838 gc->set(gc, gpio_chip_hwgpio(desc), value);
372e722e
AC
2839}
2840
5f424243
RI
2841/*
2842 * set multiple outputs on the same chip;
2843 * use the chip's set_multiple function if available;
2844 * otherwise set the outputs sequentially;
a0b66a73 2845 * @chip: the GPIO chip we operate on
5f424243
RI
2846 * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
2847 * defines which outputs are to be changed
2848 * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
2849 * defines the values the outputs specified by mask are to be set to
2850 */
a0b66a73 2851static void gpio_chip_set_multiple(struct gpio_chip *gc,
5f424243
RI
2852 unsigned long *mask, unsigned long *bits)
2853{
a0b66a73
LW
2854 if (gc->set_multiple) {
2855 gc->set_multiple(gc, mask, bits);
5f424243 2856 } else {
5e4e6fb3
AS
2857 unsigned int i;
2858
2859 /* set outputs if the corresponding mask bit is set */
a0b66a73
LW
2860 for_each_set_bit(i, mask, gc->ngpio)
2861 gc->set(gc, i, test_bit(i, bits));
5f424243
RI
2862 }
2863}
2864
3027743f 2865int gpiod_set_array_value_complex(bool raw, bool can_sleep,
3c940660
GU
2866 unsigned int array_size,
2867 struct gpio_desc **desc_array,
2868 struct gpio_array *array_info,
2869 unsigned long *value_bitmap)
5f424243
RI
2870{
2871 int i = 0;
2872
b17566a6
JK
2873 /*
2874 * Validate array_info against desc_array and its size.
2875 * It should immediately follow desc_array if both
2876 * have been obtained from the same gpiod_get_array() call.
2877 */
2878 if (array_info && array_info->desc == desc_array &&
2879 array_size <= array_info->size &&
2880 (void *)array_info == desc_array + array_info->size) {
2881 if (!can_sleep)
2882 WARN_ON(array_info->chip->can_sleep);
2883
2884 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2885 bitmap_xor(value_bitmap, value_bitmap,
2886 array_info->invert_mask, array_size);
2887
2888 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
2889 value_bitmap);
2890
b17566a6 2891 i = find_first_zero_bit(array_info->set_mask, array_size);
ae66eca0
AS
2892 if (i == array_size)
2893 return 0;
b17566a6
JK
2894 } else {
2895 array_info = NULL;
2896 }
2897
5f424243 2898 while (i < array_size) {
a0b66a73 2899 struct gpio_chip *gc = desc_array[i]->gdev->chip;
c80c4435
AS
2900 DECLARE_BITMAP(fastpath_mask, FASTPATH_NGPIO);
2901 DECLARE_BITMAP(fastpath_bits, FASTPATH_NGPIO);
3027743f 2902 unsigned long *mask, *bits;
5f424243
RI
2903 int count = 0;
2904
a0b66a73 2905 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
c80c4435
AS
2906 mask = fastpath_mask;
2907 bits = fastpath_bits;
3027743f 2908 } else {
c354c295
AS
2909 gfp_t flags = can_sleep ? GFP_KERNEL : GFP_ATOMIC;
2910
2911 mask = bitmap_alloc(gc->ngpio, flags);
3027743f
LA
2912 if (!mask)
2913 return -ENOMEM;
c80c4435 2914
c354c295
AS
2915 bits = bitmap_alloc(gc->ngpio, flags);
2916 if (!bits) {
2917 bitmap_free(mask);
2918 return -ENOMEM;
2919 }
3027743f
LA
2920 }
2921
a0b66a73 2922 bitmap_zero(mask, gc->ngpio);
3027743f 2923
38e003f4 2924 if (!can_sleep)
a0b66a73 2925 WARN_ON(gc->can_sleep);
38e003f4 2926
5f424243
RI
2927 do {
2928 struct gpio_desc *desc = desc_array[i];
2929 int hwgpio = gpio_chip_hwgpio(desc);
b9762beb 2930 int value = test_bit(i, value_bitmap);
5f424243 2931
b17566a6
JK
2932 /*
2933 * Pins applicable for fast input but not for
2934 * fast output processing may have been already
2935 * inverted inside the fast path, skip them.
2936 */
2937 if (!raw && !(array_info &&
2938 test_bit(i, array_info->invert_mask)) &&
2939 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
5f424243
RI
2940 value = !value;
2941 trace_gpio_value(desc_to_gpio(desc), 0, value);
2942 /*
2943 * collect all normal outputs belonging to the same chip
2944 * open drain and open source outputs are set individually
2945 */
02e47980 2946 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
fac9d885 2947 gpio_set_open_drain_value_commit(desc, value);
02e47980 2948 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
fac9d885 2949 gpio_set_open_source_value_commit(desc, value);
5f424243
RI
2950 } else {
2951 __set_bit(hwgpio, mask);
4fc5bfeb 2952 __assign_bit(hwgpio, bits, value);
5f424243
RI
2953 count++;
2954 }
2955 i++;
b17566a6
JK
2956
2957 if (array_info)
35ae7f96
JK
2958 i = find_next_zero_bit(array_info->set_mask,
2959 array_size, i);
fdeb8e15 2960 } while ((i < array_size) &&
a0b66a73 2961 (desc_array[i]->gdev->chip == gc));
5f424243 2962 /* push collected bits to outputs */
38e003f4 2963 if (count != 0)
a0b66a73 2964 gpio_chip_set_multiple(gc, mask, bits);
3027743f 2965
c80c4435 2966 if (mask != fastpath_mask)
c354c295
AS
2967 bitmap_free(mask);
2968 if (bits != fastpath_bits)
2969 bitmap_free(bits);
5f424243 2970 }
3027743f 2971 return 0;
5f424243
RI
2972}
2973
d2876d08 2974/**
79a9becd
AC
2975 * gpiod_set_raw_value() - assign a gpio's raw value
2976 * @desc: gpio whose value will be assigned
d2876d08 2977 * @value: value to assign
d2876d08 2978 *
79a9becd
AC
2979 * Set the raw value of the GPIO, i.e. the value of its physical line without
2980 * regard for its ACTIVE_LOW status.
2981 *
827a9b8b 2982 * This function can be called from contexts where we cannot sleep, and will
79a9becd 2983 * complain if the GPIO chip functions potentially sleep.
d2876d08 2984 */
79a9becd 2985void gpiod_set_raw_value(struct gpio_desc *desc, int value)
372e722e 2986{
fdeb8e15 2987 VALIDATE_DESC_VOID(desc);
3285170f 2988 /* Should be using gpiod_set_raw_value_cansleep() */
fdeb8e15 2989 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 2990 gpiod_set_raw_value_commit(desc, value);
d2876d08 2991}
79a9becd 2992EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
d2876d08 2993
1e77fc82
GU
2994/**
2995 * gpiod_set_value_nocheck() - set a GPIO line value without checking
2996 * @desc: the descriptor to set the value on
2997 * @value: value to set
2998 *
2999 * This sets the value of a GPIO line backing a descriptor, applying
3000 * different semantic quirks like active low and open drain/source
3001 * handling.
3002 */
3003static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
3004{
3005 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3006 value = !value;
3007 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
3008 gpio_set_open_drain_value_commit(desc, value);
3009 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
3010 gpio_set_open_source_value_commit(desc, value);
3011 else
3012 gpiod_set_raw_value_commit(desc, value);
3013}
3014
d2876d08 3015/**
79a9becd
AC
3016 * gpiod_set_value() - assign a gpio's value
3017 * @desc: gpio whose value will be assigned
3018 * @value: value to assign
3019 *
02e47980
LW
3020 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
3021 * OPEN_DRAIN and OPEN_SOURCE flags into account.
d2876d08 3022 *
827a9b8b 3023 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3024 * complain if the GPIO chip functions potentially sleep.
d2876d08 3025 */
79a9becd 3026void gpiod_set_value(struct gpio_desc *desc, int value)
d2876d08 3027{
fdeb8e15 3028 VALIDATE_DESC_VOID(desc);
3285170f 3029 /* Should be using gpiod_set_value_cansleep() */
fdeb8e15 3030 WARN_ON(desc->gdev->chip->can_sleep);
1e77fc82 3031 gpiod_set_value_nocheck(desc, value);
372e722e 3032}
79a9becd 3033EXPORT_SYMBOL_GPL(gpiod_set_value);
d2876d08 3034
5f424243 3035/**
3fff99bc 3036 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
b9762beb 3037 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3038 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3039 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3040 * @value_bitmap: bitmap of values to assign
5f424243
RI
3041 *
3042 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3043 * without regard for their ACTIVE_LOW status.
3044 *
827a9b8b 3045 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3046 * complain if the GPIO chip functions potentially sleep.
3047 */
3027743f 3048int gpiod_set_raw_array_value(unsigned int array_size,
3c940660
GU
3049 struct gpio_desc **desc_array,
3050 struct gpio_array *array_info,
3051 unsigned long *value_bitmap)
5f424243
RI
3052{
3053 if (!desc_array)
3027743f
LA
3054 return -EINVAL;
3055 return gpiod_set_array_value_complex(true, false, array_size,
77588c14 3056 desc_array, array_info, value_bitmap);
5f424243 3057}
3fff99bc 3058EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
5f424243
RI
3059
3060/**
3fff99bc 3061 * gpiod_set_array_value() - assign values to an array of GPIOs
b9762beb 3062 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3063 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3064 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3065 * @value_bitmap: bitmap of values to assign
5f424243
RI
3066 *
3067 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3068 * into account.
3069 *
827a9b8b 3070 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3071 * complain if the GPIO chip functions potentially sleep.
3072 */
cf9af0d5
GU
3073int gpiod_set_array_value(unsigned int array_size,
3074 struct gpio_desc **desc_array,
3075 struct gpio_array *array_info,
3076 unsigned long *value_bitmap)
5f424243
RI
3077{
3078 if (!desc_array)
cf9af0d5
GU
3079 return -EINVAL;
3080 return gpiod_set_array_value_complex(false, false, array_size,
3081 desc_array, array_info,
3082 value_bitmap);
5f424243 3083}
3fff99bc 3084EXPORT_SYMBOL_GPL(gpiod_set_array_value);
5f424243 3085
d2876d08 3086/**
79a9becd
AC
3087 * gpiod_cansleep() - report whether gpio value access may sleep
3088 * @desc: gpio to check
d2876d08 3089 *
d2876d08 3090 */
79a9becd 3091int gpiod_cansleep(const struct gpio_desc *desc)
372e722e 3092{
fdeb8e15
LW
3093 VALIDATE_DESC(desc);
3094 return desc->gdev->chip->can_sleep;
d2876d08 3095}
79a9becd 3096EXPORT_SYMBOL_GPL(gpiod_cansleep);
d2876d08 3097
90b39402
LW
3098/**
3099 * gpiod_set_consumer_name() - set the consumer name for the descriptor
3100 * @desc: gpio to set the consumer name on
3101 * @name: the new consumer name
3102 */
18534df4 3103int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
90b39402 3104{
18534df4
MS
3105 VALIDATE_DESC(desc);
3106 if (name) {
3107 name = kstrdup_const(name, GFP_KERNEL);
3108 if (!name)
3109 return -ENOMEM;
3110 }
3111
3112 kfree_const(desc->label);
3113 desc_set_label(desc, name);
3114
3115 return 0;
90b39402
LW
3116}
3117EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
3118
0f6d504e 3119/**
79a9becd
AC
3120 * gpiod_to_irq() - return the IRQ corresponding to a GPIO
3121 * @desc: gpio whose IRQ will be returned (already requested)
0f6d504e 3122 *
79a9becd
AC
3123 * Return the IRQ corresponding to the passed GPIO, or an error code in case of
3124 * error.
0f6d504e 3125 */
79a9becd 3126int gpiod_to_irq(const struct gpio_desc *desc)
0f6d504e 3127{
a0b66a73 3128 struct gpio_chip *gc;
4c37ce86 3129 int offset;
0f6d504e 3130
79bb71bd
LW
3131 /*
3132 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
3133 * requires this function to not return zero on an invalid descriptor
3134 * but rather a negative error number.
3135 */
bfbbe44d 3136 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
79bb71bd
LW
3137 return -EINVAL;
3138
a0b66a73 3139 gc = desc->gdev->chip;
372e722e 3140 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
3141 if (gc->to_irq) {
3142 int retirq = gc->to_irq(gc, offset);
4c37ce86
LW
3143
3144 /* Zero means NO_IRQ */
3145 if (!retirq)
3146 return -ENXIO;
3147
3148 return retirq;
3149 }
3150 return -ENXIO;
0f6d504e 3151}
79a9becd 3152EXPORT_SYMBOL_GPL(gpiod_to_irq);
0f6d504e 3153
d468bf9e 3154/**
e3a2e878 3155 * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
a0b66a73 3156 * @gc: the chip the GPIO to lock belongs to
d74be6df 3157 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3158 *
3159 * This is used directly by GPIO drivers that want to lock down
f438acdf 3160 * a certain GPIO line to be used for IRQs.
d468bf9e 3161 */
a0b66a73 3162int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset)
372e722e 3163{
9c10280d
LW
3164 struct gpio_desc *desc;
3165
a0b66a73 3166 desc = gpiochip_get_desc(gc, offset);
9c10280d
LW
3167 if (IS_ERR(desc))
3168 return PTR_ERR(desc);
3169
60f8339e
LW
3170 /*
3171 * If it's fast: flush the direction setting if something changed
3172 * behind our back
3173 */
a0b66a73 3174 if (!gc->can_sleep && gc->get_direction) {
80956790 3175 int dir = gpiod_get_direction(desc);
9c10280d 3176
36b31279 3177 if (dir < 0) {
a0b66a73 3178 chip_err(gc, "%s: cannot get GPIO direction\n",
36b31279
AS
3179 __func__);
3180 return dir;
3181 }
9c10280d 3182 }
d468bf9e 3183
e9bdf7e6
LW
3184 /* To be valid for IRQ the line needs to be input or open drain */
3185 if (test_bit(FLAG_IS_OUT, &desc->flags) &&
3186 !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
a0b66a73 3187 chip_err(gc,
b1911710
AS
3188 "%s: tried to flag a GPIO set as output for IRQ\n",
3189 __func__);
d468bf9e
LW
3190 return -EIO;
3191 }
3192
9c10280d 3193 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3194 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3195
3196 /*
3197 * If the consumer has not set up a label (such as when the
3198 * IRQ is referenced from .to_irq()) we set up a label here
3199 * so it is clear this is used as an interrupt.
3200 */
3201 if (!desc->label)
3202 desc_set_label(desc, "interrupt");
3203
d468bf9e 3204 return 0;
372e722e 3205}
e3a2e878 3206EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
d2876d08 3207
d468bf9e 3208/**
e3a2e878 3209 * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
a0b66a73 3210 * @gc: the chip the GPIO to lock belongs to
d74be6df 3211 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3212 *
3213 * This is used directly by GPIO drivers that want to indicate
3214 * that a certain GPIO is no longer used exclusively for IRQ.
d2876d08 3215 */
a0b66a73 3216void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset)
d468bf9e 3217{
3940c34a
LW
3218 struct gpio_desc *desc;
3219
a0b66a73 3220 desc = gpiochip_get_desc(gc, offset);
3940c34a 3221 if (IS_ERR(desc))
d468bf9e 3222 return;
d2876d08 3223
3940c34a 3224 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3225 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3226
3227 /* If we only had this marking, erase it */
3228 if (desc->label && !strcmp(desc->label, "interrupt"))
3229 desc_set_label(desc, NULL);
d468bf9e 3230}
e3a2e878 3231EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
d468bf9e 3232
a0b66a73 3233void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3234{
a0b66a73 3235 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3236
3237 if (!IS_ERR(desc) &&
3238 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
3239 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3240}
3241EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
3242
a0b66a73 3243void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3244{
a0b66a73 3245 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3246
3247 if (!IS_ERR(desc) &&
3248 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
e9bdf7e6
LW
3249 /*
3250 * We must not be output when using IRQ UNLESS we are
3251 * open drain.
3252 */
3253 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) &&
3254 !test_bit(FLAG_OPEN_DRAIN, &desc->flags));
4e9439dd
HV
3255 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3256 }
3257}
3258EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
3259
a0b66a73 3260bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset)
6cee3821 3261{
a0b66a73 3262 if (offset >= gc->ngpio)
6cee3821
LW
3263 return false;
3264
a0b66a73 3265 return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags);
6cee3821
LW
3266}
3267EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
3268
a0b66a73 3269int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238
HV
3270{
3271 int ret;
3272
a0b66a73 3273 if (!try_module_get(gc->gpiodev->owner))
4e6b8238
HV
3274 return -ENODEV;
3275
a0b66a73 3276 ret = gpiochip_lock_as_irq(gc, offset);
4e6b8238 3277 if (ret) {
a0b66a73
LW
3278 chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset);
3279 module_put(gc->gpiodev->owner);
4e6b8238
HV
3280 return ret;
3281 }
3282 return 0;
3283}
3284EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
3285
a0b66a73 3286void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238 3287{
a0b66a73
LW
3288 gpiochip_unlock_as_irq(gc, offset);
3289 module_put(gc->gpiodev->owner);
4e6b8238
HV
3290}
3291EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
3292
a0b66a73 3293bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset)
143b65d6 3294{
a0b66a73 3295 if (offset >= gc->ngpio)
143b65d6
LW
3296 return false;
3297
a0b66a73 3298 return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3299}
3300EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
3301
a0b66a73 3302bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset)
143b65d6 3303{
a0b66a73 3304 if (offset >= gc->ngpio)
143b65d6
LW
3305 return false;
3306
a0b66a73 3307 return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3308}
3309EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
3310
a0b66a73 3311bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset)
05f479bf 3312{
a0b66a73 3313 if (offset >= gc->ngpio)
05f479bf
CK
3314 return false;
3315
a0b66a73 3316 return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags);
05f479bf
CK
3317}
3318EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
3319
79a9becd
AC
3320/**
3321 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
3322 * @desc: gpio whose value will be returned
3323 *
3324 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3325 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd
AC
3326 *
3327 * This function is to be called from contexts that can sleep.
d2876d08 3328 */
79a9becd 3329int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
d2876d08 3330{
d2876d08 3331 might_sleep_if(extra_checks);
fdeb8e15 3332 VALIDATE_DESC(desc);
fac9d885 3333 return gpiod_get_raw_value_commit(desc);
d2876d08 3334}
79a9becd 3335EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
372e722e 3336
79a9becd
AC
3337/**
3338 * gpiod_get_value_cansleep() - return a gpio's value
3339 * @desc: gpio whose value will be returned
3340 *
3341 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3342 * account, or negative errno on failure.
79a9becd
AC
3343 *
3344 * This function is to be called from contexts that can sleep.
3345 */
3346int gpiod_get_value_cansleep(const struct gpio_desc *desc)
d2876d08 3347{
3f397c21 3348 int value;
d2876d08
DB
3349
3350 might_sleep_if(extra_checks);
fdeb8e15 3351 VALIDATE_DESC(desc);
fac9d885 3352 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3353 if (value < 0)
3354 return value;
3355
79a9becd
AC
3356 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3357 value = !value;
3358
3f397c21 3359 return value;
d2876d08 3360}
79a9becd 3361EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
372e722e 3362
eec1d566
LW
3363/**
3364 * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
b9762beb 3365 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3366 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3367 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3368 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3369 *
3370 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3371 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3372 * else an error code.
3373 *
3374 * This function is to be called from contexts that can sleep.
3375 */
3376int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
3377 struct gpio_desc **desc_array,
77588c14 3378 struct gpio_array *array_info,
b9762beb 3379 unsigned long *value_bitmap)
eec1d566
LW
3380{
3381 might_sleep_if(extra_checks);
3382 if (!desc_array)
3383 return -EINVAL;
3384 return gpiod_get_array_value_complex(true, true, array_size,
77588c14
JK
3385 desc_array, array_info,
3386 value_bitmap);
eec1d566
LW
3387}
3388EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
3389
3390/**
3391 * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
b9762beb 3392 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3393 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3394 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3395 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3396 *
3397 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3398 * into account. Return 0 in case of success, else an error code.
3399 *
3400 * This function is to be called from contexts that can sleep.
3401 */
3402int gpiod_get_array_value_cansleep(unsigned int array_size,
3403 struct gpio_desc **desc_array,
77588c14 3404 struct gpio_array *array_info,
b9762beb 3405 unsigned long *value_bitmap)
eec1d566
LW
3406{
3407 might_sleep_if(extra_checks);
3408 if (!desc_array)
3409 return -EINVAL;
3410 return gpiod_get_array_value_complex(false, true, array_size,
77588c14
JK
3411 desc_array, array_info,
3412 value_bitmap);
eec1d566
LW
3413}
3414EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
3415
79a9becd
AC
3416/**
3417 * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
3418 * @desc: gpio whose value will be assigned
3419 * @value: value to assign
3420 *
3421 * Set the raw value of the GPIO, i.e. the value of its physical line without
3422 * regard for its ACTIVE_LOW status.
3423 *
3424 * This function is to be called from contexts that can sleep.
3425 */
3426void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
372e722e 3427{
d2876d08 3428 might_sleep_if(extra_checks);
fdeb8e15 3429 VALIDATE_DESC_VOID(desc);
fac9d885 3430 gpiod_set_raw_value_commit(desc, value);
372e722e 3431}
79a9becd 3432EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
d2876d08 3433
79a9becd
AC
3434/**
3435 * gpiod_set_value_cansleep() - assign a gpio's value
3436 * @desc: gpio whose value will be assigned
3437 * @value: value to assign
3438 *
3439 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
3440 * account
3441 *
3442 * This function is to be called from contexts that can sleep.
3443 */
3444void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
d2876d08 3445{
d2876d08 3446 might_sleep_if(extra_checks);
fdeb8e15 3447 VALIDATE_DESC_VOID(desc);
1e77fc82 3448 gpiod_set_value_nocheck(desc, value);
372e722e 3449}
79a9becd 3450EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
d2876d08 3451
5f424243 3452/**
3fff99bc 3453 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3454 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3455 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3456 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3457 * @value_bitmap: bitmap of values to assign
5f424243
RI
3458 *
3459 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3460 * without regard for their ACTIVE_LOW status.
3461 *
3462 * This function is to be called from contexts that can sleep.
3463 */
3027743f 3464int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3c940660
GU
3465 struct gpio_desc **desc_array,
3466 struct gpio_array *array_info,
3467 unsigned long *value_bitmap)
5f424243
RI
3468{
3469 might_sleep_if(extra_checks);
3470 if (!desc_array)
3027743f
LA
3471 return -EINVAL;
3472 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
77588c14 3473 array_info, value_bitmap);
5f424243 3474}
3fff99bc 3475EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
5f424243 3476
3946d187
DT
3477/**
3478 * gpiod_add_lookup_tables() - register GPIO device consumers
3479 * @tables: list of tables of consumers to register
3480 * @n: number of tables in the list
3481 */
3482void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
3483{
3484 unsigned int i;
3485
3486 mutex_lock(&gpio_lookup_lock);
3487
3488 for (i = 0; i < n; i++)
3489 list_add_tail(&tables[i]->list, &gpio_lookup_list);
3490
3491 mutex_unlock(&gpio_lookup_lock);
3492}
3493
5f424243 3494/**
3fff99bc 3495 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3496 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3497 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3498 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3499 * @value_bitmap: bitmap of values to assign
5f424243
RI
3500 *
3501 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3502 * into account.
3503 *
3504 * This function is to be called from contexts that can sleep.
3505 */
cf9af0d5
GU
3506int gpiod_set_array_value_cansleep(unsigned int array_size,
3507 struct gpio_desc **desc_array,
3508 struct gpio_array *array_info,
3509 unsigned long *value_bitmap)
5f424243
RI
3510{
3511 might_sleep_if(extra_checks);
3512 if (!desc_array)
cf9af0d5
GU
3513 return -EINVAL;
3514 return gpiod_set_array_value_complex(false, true, array_size,
3515 desc_array, array_info,
3516 value_bitmap);
5f424243 3517}
3fff99bc 3518EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
5f424243 3519
bae48da2 3520/**
ad824783
AC
3521 * gpiod_add_lookup_table() - register GPIO device consumers
3522 * @table: table of consumers to register
bae48da2 3523 */
ad824783 3524void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
bae48da2 3525{
49fdfe66 3526 gpiod_add_lookup_tables(&table, 1);
bae48da2 3527}
226b2242 3528EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
bae48da2 3529
be9015ab
SK
3530/**
3531 * gpiod_remove_lookup_table() - unregister GPIO device consumers
3532 * @table: table of consumers to unregister
3533 */
3534void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
3535{
d321ad12
AS
3536 /* Nothing to remove */
3537 if (!table)
3538 return;
3539
be9015ab
SK
3540 mutex_lock(&gpio_lookup_lock);
3541
3542 list_del(&table->list);
3543
3544 mutex_unlock(&gpio_lookup_lock);
3545}
226b2242 3546EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
be9015ab 3547
a411e81e
BG
3548/**
3549 * gpiod_add_hogs() - register a set of GPIO hogs from machine code
3550 * @hogs: table of gpio hog entries with a zeroed sentinel at the end
3551 */
3552void gpiod_add_hogs(struct gpiod_hog *hogs)
3553{
a0b66a73 3554 struct gpio_chip *gc;
a411e81e
BG
3555 struct gpiod_hog *hog;
3556
3557 mutex_lock(&gpio_machine_hogs_mutex);
3558
3559 for (hog = &hogs[0]; hog->chip_label; hog++) {
3560 list_add_tail(&hog->list, &gpio_machine_hogs);
3561
3562 /*
3563 * The chip may have been registered earlier, so check if it
3564 * exists and, if so, try to hog the line now.
3565 */
a0b66a73
LW
3566 gc = find_chip_by_name(hog->chip_label);
3567 if (gc)
3568 gpiochip_machine_hog(gc, hog);
a411e81e
BG
3569 }
3570
3571 mutex_unlock(&gpio_machine_hogs_mutex);
3572}
3573EXPORT_SYMBOL_GPL(gpiod_add_hogs);
3574
dd61b292
BG
3575void gpiod_remove_hogs(struct gpiod_hog *hogs)
3576{
3577 struct gpiod_hog *hog;
3578
3579 mutex_lock(&gpio_machine_hogs_mutex);
3580 for (hog = &hogs[0]; hog->chip_label; hog++)
3581 list_del(&hog->list);
3582 mutex_unlock(&gpio_machine_hogs_mutex);
3583}
3584EXPORT_SYMBOL_GPL(gpiod_remove_hogs);
3585
ad824783 3586static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
bae48da2
AC
3587{
3588 const char *dev_id = dev ? dev_name(dev) : NULL;
ad824783 3589 struct gpiod_lookup_table *table;
bae48da2
AC
3590
3591 mutex_lock(&gpio_lookup_lock);
3592
ad824783
AC
3593 list_for_each_entry(table, &gpio_lookup_list, list) {
3594 if (table->dev_id && dev_id) {
3595 /*
3596 * Valid strings on both ends, must be identical to have
3597 * a match
3598 */
3599 if (!strcmp(table->dev_id, dev_id))
3600 goto found;
3601 } else {
3602 /*
3603 * One of the pointers is NULL, so both must be to have
3604 * a match
3605 */
3606 if (dev_id == table->dev_id)
3607 goto found;
3608 }
3609 }
3610 table = NULL;
bae48da2 3611
ad824783
AC
3612found:
3613 mutex_unlock(&gpio_lookup_lock);
3614 return table;
3615}
bae48da2 3616
ad824783 3617static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
fed7026a 3618 unsigned int idx, unsigned long *flags)
ad824783 3619{
2a3cf6a3 3620 struct gpio_desc *desc = ERR_PTR(-ENOENT);
ad824783
AC
3621 struct gpiod_lookup_table *table;
3622 struct gpiod_lookup *p;
bae48da2 3623
ad824783
AC
3624 table = gpiod_find_lookup_table(dev);
3625 if (!table)
3626 return desc;
bae48da2 3627
4c033b54 3628 for (p = &table->table[0]; p->key; p++) {
a0b66a73 3629 struct gpio_chip *gc;
bae48da2 3630
ad824783 3631 /* idx must always match exactly */
bae48da2
AC
3632 if (p->idx != idx)
3633 continue;
3634
ad824783
AC
3635 /* If the lookup entry has a con_id, require exact match */
3636 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
3637 continue;
bae48da2 3638
4c033b54
GU
3639 if (p->chip_hwnum == U16_MAX) {
3640 desc = gpio_name_to_desc(p->key);
3641 if (desc) {
3642 *flags = p->flags;
3643 return desc;
3644 }
3645
3646 dev_warn(dev, "cannot find GPIO line %s, deferring\n",
3647 p->key);
3648 return ERR_PTR(-EPROBE_DEFER);
3649 }
3650
3651 gc = find_chip_by_name(p->key);
bae48da2 3652
a0b66a73 3653 if (!gc) {
8853daf3
JK
3654 /*
3655 * As the lookup table indicates a chip with
4c033b54 3656 * p->key should exist, assume it may
8853daf3
JK
3657 * still appear later and let the interested
3658 * consumer be probed again or let the Deferred
3659 * Probe infrastructure handle the error.
3660 */
3661 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
4c033b54 3662 p->key);
8853daf3 3663 return ERR_PTR(-EPROBE_DEFER);
ad824783 3664 }
bae48da2 3665
a0b66a73 3666 if (gc->ngpio <= p->chip_hwnum) {
2a3cf6a3 3667 dev_err(dev,
d935bd50 3668 "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n",
a0b66a73
LW
3669 idx, p->chip_hwnum, gc->ngpio - 1,
3670 gc->label);
2a3cf6a3 3671 return ERR_PTR(-EINVAL);
bae48da2 3672 }
bae48da2 3673
a0b66a73 3674 desc = gpiochip_get_desc(gc, p->chip_hwnum);
ad824783 3675 *flags = p->flags;
bae48da2 3676
2a3cf6a3 3677 return desc;
bae48da2
AC
3678 }
3679
bae48da2
AC
3680 return desc;
3681}
3682
66858527
RI
3683static int platform_gpio_count(struct device *dev, const char *con_id)
3684{
3685 struct gpiod_lookup_table *table;
3686 struct gpiod_lookup *p;
3687 unsigned int count = 0;
3688
3689 table = gpiod_find_lookup_table(dev);
3690 if (!table)
3691 return -ENOENT;
3692
4c033b54 3693 for (p = &table->table[0]; p->key; p++) {
66858527
RI
3694 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
3695 (!con_id && !p->con_id))
3696 count++;
3697 }
3698 if (!count)
3699 return -ENOENT;
3700
3701 return count;
3702}
3703
13949fa9
DT
3704/**
3705 * fwnode_gpiod_get_index - obtain a GPIO from firmware node
3706 * @fwnode: handle of the firmware node
3707 * @con_id: function within the GPIO consumer
3708 * @index: index of the GPIO to obtain for the consumer
3709 * @flags: GPIO initialization flags
3710 * @label: label to attach to the requested GPIO
3711 *
3712 * This function can be used for drivers that get their configuration
3713 * from opaque firmware.
3714 *
3715 * The function properly finds the corresponding GPIO using whatever is the
3716 * underlying firmware interface and then makes sure that the GPIO
3717 * descriptor is requested before it is returned to the caller.
3718 *
3719 * Returns:
3720 * On successful request the GPIO pin is configured in accordance with
3721 * provided @flags.
3722 *
3723 * In case of error an ERR_PTR() is returned.
3724 */
3725struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
3726 const char *con_id, int index,
3727 enum gpiod_flags flags,
3728 const char *label)
3729{
3730 struct gpio_desc *desc;
3731 char prop_name[32]; /* 32 is max size of property name */
3732 unsigned int i;
3733
3734 for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) {
3735 if (con_id)
3736 snprintf(prop_name, sizeof(prop_name), "%s-%s",
3737 con_id, gpio_suffixes[i]);
3738 else
3739 snprintf(prop_name, sizeof(prop_name), "%s",
3740 gpio_suffixes[i]);
3741
3742 desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags,
3743 label);
7b58696d 3744 if (!gpiod_not_found(desc))
13949fa9
DT
3745 break;
3746 }
3747
3748 return desc;
3749}
3750EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
3751
66858527
RI
3752/**
3753 * gpiod_count - return the number of GPIOs associated with a device / function
3754 * or -ENOENT if no GPIO has been assigned to the requested function
3755 * @dev: GPIO consumer, can be NULL for system-global GPIOs
3756 * @con_id: function within the GPIO consumer
3757 */
3758int gpiod_count(struct device *dev, const char *con_id)
3759{
944f4b0a 3760 const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
66858527
RI
3761 int count = -ENOENT;
3762
944f4b0a 3763 if (is_of_node(fwnode))
f626d6df 3764 count = of_gpio_get_count(dev, con_id);
944f4b0a 3765 else if (is_acpi_node(fwnode))
66858527
RI
3766 count = acpi_gpio_count(dev, con_id);
3767
3768 if (count < 0)
3769 count = platform_gpio_count(dev, con_id);
3770
3771 return count;
3772}
3773EXPORT_SYMBOL_GPL(gpiod_count);
3774
bae48da2 3775/**
0879162f 3776 * gpiod_get - obtain a GPIO for a given GPIO function
ad824783 3777 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2 3778 * @con_id: function within the GPIO consumer
39b2bbe3 3779 * @flags: optional GPIO initialization flags
bae48da2
AC
3780 *
3781 * Return the GPIO descriptor corresponding to the function con_id of device
2a3cf6a3 3782 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
20a8a968 3783 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
bae48da2 3784 */
b17d1bf1 3785struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
39b2bbe3 3786 enum gpiod_flags flags)
bae48da2 3787{
39b2bbe3 3788 return gpiod_get_index(dev, con_id, 0, flags);
bae48da2 3789}
b17d1bf1 3790EXPORT_SYMBOL_GPL(gpiod_get);
bae48da2 3791
29a1f233
TR
3792/**
3793 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
3794 * @dev: GPIO consumer, can be NULL for system-global GPIOs
3795 * @con_id: function within the GPIO consumer
39b2bbe3 3796 * @flags: optional GPIO initialization flags
29a1f233
TR
3797 *
3798 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
3799 * the requested function it will return NULL. This is convenient for drivers
3800 * that need to handle optional GPIOs.
3801 */
b17d1bf1 3802struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
39b2bbe3
AC
3803 const char *con_id,
3804 enum gpiod_flags flags)
29a1f233 3805{
39b2bbe3 3806 return gpiod_get_index_optional(dev, con_id, 0, flags);
29a1f233 3807}
b17d1bf1 3808EXPORT_SYMBOL_GPL(gpiod_get_optional);
29a1f233 3809
f625d460
BP
3810
3811/**
3812 * gpiod_configure_flags - helper function to configure a given GPIO
3813 * @desc: gpio whose value will be assigned
3814 * @con_id: function within the GPIO consumer
fed7026a
AS
3815 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
3816 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
3817 * @dflags: gpiod_flags - optional GPIO initialization flags
3818 *
3819 * Return 0 on success, -ENOENT if no GPIO has been assigned to the
3820 * requested function and/or index, or another IS_ERR() code if an error
3821 * occurred while trying to acquire the GPIO.
3822 */
c29fd9eb 3823int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
85b03b30 3824 unsigned long lflags, enum gpiod_flags dflags)
f625d460 3825{
d377f56f 3826 int ret;
f625d460 3827
85b03b30
JH
3828 if (lflags & GPIO_ACTIVE_LOW)
3829 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
f926dfc1 3830
85b03b30
JH
3831 if (lflags & GPIO_OPEN_DRAIN)
3832 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
f926dfc1
LW
3833 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
3834 /*
3835 * This enforces open drain mode from the consumer side.
3836 * This is necessary for some busses like I2C, but the lookup
3837 * should *REALLY* have specified them as open drain in the
3838 * first place, so print a little warning here.
3839 */
3840 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
3841 gpiod_warn(desc,
3842 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
3843 }
3844
85b03b30
JH
3845 if (lflags & GPIO_OPEN_SOURCE)
3846 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
e10f72bf 3847
d449991c
TP
3848 if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) {
3849 gpiod_err(desc,
3850 "both pull-up and pull-down enabled, invalid configuration\n");
3851 return -EINVAL;
3852 }
3853
3854 if (lflags & GPIO_PULL_UP)
3855 set_bit(FLAG_PULL_UP, &desc->flags);
3856 else if (lflags & GPIO_PULL_DOWN)
3857 set_bit(FLAG_PULL_DOWN, &desc->flags);
3858
d377f56f
LW
3859 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
3860 if (ret < 0)
3861 return ret;
85b03b30 3862
f625d460
BP
3863 /* No particular flag request, return here... */
3864 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
262b9011 3865 gpiod_dbg(desc, "no flags found for %s\n", con_id);
f625d460
BP
3866 return 0;
3867 }
3868
3869 /* Process flags */
3870 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
d377f56f 3871 ret = gpiod_direction_output(desc,
ad17731d 3872 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
f625d460 3873 else
d377f56f 3874 ret = gpiod_direction_input(desc);
f625d460 3875
d377f56f 3876 return ret;
f625d460
BP
3877}
3878
bae48da2
AC
3879/**
3880 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
fdd6a5fe 3881 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2
AC
3882 * @con_id: function within the GPIO consumer
3883 * @idx: index of the GPIO to obtain in the consumer
39b2bbe3 3884 * @flags: optional GPIO initialization flags
bae48da2
AC
3885 *
3886 * This variant of gpiod_get() allows to access GPIOs other than the first
3887 * defined one for functions that define several GPIOs.
3888 *
2a3cf6a3
AC
3889 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
3890 * requested function and/or index, or another IS_ERR() code if an error
20a8a968 3891 * occurred while trying to acquire the GPIO.
bae48da2 3892 */
b17d1bf1 3893struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
bae48da2 3894 const char *con_id,
39b2bbe3
AC
3895 unsigned int idx,
3896 enum gpiod_flags flags)
bae48da2 3897{
2d6c06f5 3898 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
35c5d7fd 3899 struct gpio_desc *desc = NULL;
d377f56f 3900 int ret;
7d18f0a1
LW
3901 /* Maybe we have a device name, maybe not */
3902 const char *devname = dev ? dev_name(dev) : "?";
944f4b0a 3903 const struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
bae48da2
AC
3904
3905 dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id);
3906
944f4b0a
AS
3907 /* Using device tree? */
3908 if (is_of_node(fwnode)) {
3909 dev_dbg(dev, "using device tree for GPIO lookup\n");
3910 desc = of_find_gpio(dev, con_id, idx, &lookupflags);
3911 } else if (is_acpi_node(fwnode)) {
3912 dev_dbg(dev, "using ACPI for GPIO lookup\n");
3913 desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags);
35c5d7fd
AC
3914 }
3915
3916 /*
3917 * Either we are not using DT or ACPI, or their lookup did not return
3918 * a result. In that case, use platform lookup as a fallback.
3919 */
7b58696d 3920 if (!desc || gpiod_not_found(desc)) {
43a8785a 3921 dev_dbg(dev, "using lookup tables for GPIO lookup\n");
39b2bbe3 3922 desc = gpiod_find(dev, con_id, idx, &lookupflags);
bae48da2
AC
3923 }
3924
3925 if (IS_ERR(desc)) {
9d5a1f2c 3926 dev_dbg(dev, "No GPIO consumer %s found\n", con_id);
bae48da2
AC
3927 return desc;
3928 }
3929
7d18f0a1
LW
3930 /*
3931 * If a connection label was passed use that, else attempt to use
3932 * the device name as label
3933 */
d377f56f 3934 ret = gpiod_request(desc, con_id ? con_id : devname);
8bbff39c 3935 if (ret) {
d377f56f 3936 if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) {
b0ce7b29
LW
3937 /*
3938 * This happens when there are several consumers for
3939 * the same GPIO line: we just return here without
3940 * further initialization. It is a bit if a hack.
3941 * This is necessary to support fixed regulators.
3942 *
3943 * FIXME: Make this more sane and safe.
3944 */
3945 dev_info(dev, "nonexclusive access to GPIO for %s\n",
3946 con_id ? con_id : devname);
3947 return desc;
3948 } else {
d377f56f 3949 return ERR_PTR(ret);
b0ce7b29
LW
3950 }
3951 }
bae48da2 3952
d377f56f 3953 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
6392cca4 3954 if (ret < 0) {
39b2bbe3 3955 dev_dbg(dev, "setup of GPIO %s failed\n", con_id);
6392cca4
LW
3956 gpiod_put(desc);
3957 return ERR_PTR(ret);
3958 }
3959
6accc376
KG
3960 blocking_notifier_call_chain(&desc->gdev->notifier,
3961 GPIOLINE_CHANGED_REQUESTED, desc);
9fefca77 3962
6392cca4
LW
3963 return desc;
3964}
b17d1bf1 3965EXPORT_SYMBOL_GPL(gpiod_get_index);
6392cca4 3966
40b73183
MW
3967/**
3968 * fwnode_get_named_gpiod - obtain a GPIO from firmware node
3969 * @fwnode: handle of the firmware node
3970 * @propname: name of the firmware property representing the GPIO
6392cca4 3971 * @index: index of the GPIO to obtain for the consumer
a264d10f 3972 * @dflags: GPIO initialization flags
950d55f5 3973 * @label: label to attach to the requested GPIO
40b73183
MW
3974 *
3975 * This function can be used for drivers that get their configuration
6392cca4 3976 * from opaque firmware.
40b73183 3977 *
6392cca4 3978 * The function properly finds the corresponding GPIO using whatever is the
40b73183
MW
3979 * underlying firmware interface and then makes sure that the GPIO
3980 * descriptor is requested before it is returned to the caller.
3981 *
950d55f5 3982 * Returns:
ff21378a 3983 * On successful request the GPIO pin is configured in accordance with
a264d10f
AS
3984 * provided @dflags.
3985 *
40b73183
MW
3986 * In case of error an ERR_PTR() is returned.
3987 */
3988struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
537b94da 3989 const char *propname, int index,
b2987d74
AS
3990 enum gpiod_flags dflags,
3991 const char *label)
40b73183 3992{
2d6c06f5 3993 unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT;
40b73183 3994 struct gpio_desc *desc = ERR_PTR(-ENODEV);
40b73183
MW
3995 int ret;
3996
40b73183 3997 if (is_of_node(fwnode)) {
6392cca4
LW
3998 desc = gpiod_get_from_of_node(to_of_node(fwnode),
3999 propname, index,
4000 dflags,
4001 label);
4002 return desc;
40b73183
MW
4003 } else if (is_acpi_node(fwnode)) {
4004 struct acpi_gpio_info info;
4005
537b94da 4006 desc = acpi_node_get_gpiod(fwnode, propname, index, &info);
6392cca4
LW
4007 if (IS_ERR(desc))
4008 return desc;
40b73183 4009
6392cca4 4010 acpi_gpio_update_gpiod_flags(&dflags, &info);
606be344 4011 acpi_gpio_update_gpiod_lookup_flags(&lflags, &info);
944f4b0a
AS
4012 } else
4013 return ERR_PTR(-EINVAL);
40b73183 4014
6392cca4 4015 /* Currently only ACPI takes this path */
b2987d74 4016 ret = gpiod_request(desc, label);
85b03b30
JH
4017 if (ret)
4018 return ERR_PTR(ret);
4019
a264d10f
AS
4020 ret = gpiod_configure_flags(desc, propname, lflags, dflags);
4021 if (ret < 0) {
4022 gpiod_put(desc);
4023 return ERR_PTR(ret);
90b665f6
LP
4024 }
4025
6accc376
KG
4026 blocking_notifier_call_chain(&desc->gdev->notifier,
4027 GPIOLINE_CHANGED_REQUESTED, desc);
9fefca77 4028
40b73183
MW
4029 return desc;
4030}
4031EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod);
4032
29a1f233
TR
4033/**
4034 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
4035 * function
4036 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4037 * @con_id: function within the GPIO consumer
4038 * @index: index of the GPIO to obtain in the consumer
39b2bbe3 4039 * @flags: optional GPIO initialization flags
29a1f233
TR
4040 *
4041 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
4042 * specified index was assigned to the requested function it will return NULL.
4043 * This is convenient for drivers that need to handle optional GPIOs.
4044 */
b17d1bf1 4045struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
29a1f233 4046 const char *con_id,
39b2bbe3
AC
4047 unsigned int index,
4048 enum gpiod_flags flags)
29a1f233
TR
4049{
4050 struct gpio_desc *desc;
4051
39b2bbe3 4052 desc = gpiod_get_index(dev, con_id, index, flags);
7b58696d
AS
4053 if (gpiod_not_found(desc))
4054 return NULL;
29a1f233
TR
4055
4056 return desc;
4057}
b17d1bf1 4058EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
29a1f233 4059
f625d460
BP
4060/**
4061 * gpiod_hog - Hog the specified GPIO desc given the provided flags
4062 * @desc: gpio whose value will be assigned
4063 * @name: gpio line name
fed7026a
AS
4064 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4065 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4066 * @dflags: gpiod_flags - optional GPIO initialization flags
4067 */
4068int gpiod_hog(struct gpio_desc *desc, const char *name,
4069 unsigned long lflags, enum gpiod_flags dflags)
4070{
a0b66a73 4071 struct gpio_chip *gc;
f625d460
BP
4072 struct gpio_desc *local_desc;
4073 int hwnum;
d377f56f 4074 int ret;
f625d460 4075
a0b66a73 4076 gc = gpiod_to_chip(desc);
f625d460
BP
4077 hwnum = gpio_chip_hwgpio(desc);
4078
a0b66a73 4079 local_desc = gpiochip_request_own_desc(gc, hwnum, name,
5923ea6c 4080 lflags, dflags);
f625d460 4081 if (IS_ERR(local_desc)) {
d377f56f 4082 ret = PTR_ERR(local_desc);
c31a571d 4083 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
a0b66a73 4084 name, gc->label, hwnum, ret);
d377f56f 4085 return ret;
f625d460
BP
4086 }
4087
f625d460
BP
4088 /* Mark GPIO as hogged so it can be identified and removed later */
4089 set_bit(FLAG_IS_HOGGED, &desc->flags);
4090
262b9011 4091 gpiod_info(desc, "hogged as %s%s\n",
b27f300f
BG
4092 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
4093 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
4094 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
f625d460
BP
4095
4096 return 0;
4097}
4098
4099/**
4100 * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
a0b66a73 4101 * @gc: gpio chip to act on
f625d460 4102 */
a0b66a73 4103static void gpiochip_free_hogs(struct gpio_chip *gc)
f625d460
BP
4104{
4105 int id;
4106
a0b66a73
LW
4107 for (id = 0; id < gc->ngpio; id++) {
4108 if (test_bit(FLAG_IS_HOGGED, &gc->gpiodev->descs[id].flags))
4109 gpiochip_free_own_desc(&gc->gpiodev->descs[id]);
f625d460
BP
4110 }
4111}
4112
66858527
RI
4113/**
4114 * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
4115 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4116 * @con_id: function within the GPIO consumer
4117 * @flags: optional GPIO initialization flags
4118 *
4119 * This function acquires all the GPIOs defined under a given function.
4120 *
4121 * Return a struct gpio_descs containing an array of descriptors, -ENOENT if
4122 * no GPIO has been assigned to the requested function, or another IS_ERR()
4123 * code if an error occurred while trying to acquire the GPIOs.
4124 */
4125struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
4126 const char *con_id,
4127 enum gpiod_flags flags)
4128{
4129 struct gpio_desc *desc;
4130 struct gpio_descs *descs;
bf9346f5 4131 struct gpio_array *array_info = NULL;
a0b66a73 4132 struct gpio_chip *gc;
bf9346f5 4133 int count, bitmap_size;
66858527
RI
4134
4135 count = gpiod_count(dev, con_id);
4136 if (count < 0)
4137 return ERR_PTR(count);
4138
acafe7e3 4139 descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL);
66858527
RI
4140 if (!descs)
4141 return ERR_PTR(-ENOMEM);
4142
4143 for (descs->ndescs = 0; descs->ndescs < count; ) {
4144 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
4145 if (IS_ERR(desc)) {
4146 gpiod_put_array(descs);
4147 return ERR_CAST(desc);
4148 }
bf9346f5 4149
66858527 4150 descs->desc[descs->ndescs] = desc;
bf9346f5 4151
a0b66a73 4152 gc = gpiod_to_chip(desc);
bf9346f5 4153 /*
c4c958aa
JK
4154 * If pin hardware number of array member 0 is also 0, select
4155 * its chip as a candidate for fast bitmap processing path.
bf9346f5 4156 */
c4c958aa 4157 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
bf9346f5
JK
4158 struct gpio_descs *array;
4159
a0b66a73
LW
4160 bitmap_size = BITS_TO_LONGS(gc->ngpio > count ?
4161 gc->ngpio : count);
bf9346f5
JK
4162
4163 array = kzalloc(struct_size(descs, desc, count) +
4164 struct_size(array_info, invert_mask,
4165 3 * bitmap_size), GFP_KERNEL);
4166 if (!array) {
4167 gpiod_put_array(descs);
4168 return ERR_PTR(-ENOMEM);
4169 }
4170
4171 memcpy(array, descs,
4172 struct_size(descs, desc, descs->ndescs + 1));
4173 kfree(descs);
4174
4175 descs = array;
4176 array_info = (void *)(descs->desc + count);
4177 array_info->get_mask = array_info->invert_mask +
4178 bitmap_size;
4179 array_info->set_mask = array_info->get_mask +
4180 bitmap_size;
4181
4182 array_info->desc = descs->desc;
4183 array_info->size = count;
a0b66a73 4184 array_info->chip = gc;
bf9346f5
JK
4185 bitmap_set(array_info->get_mask, descs->ndescs,
4186 count - descs->ndescs);
4187 bitmap_set(array_info->set_mask, descs->ndescs,
4188 count - descs->ndescs);
4189 descs->info = array_info;
4190 }
c4c958aa 4191 /* Unmark array members which don't belong to the 'fast' chip */
a0b66a73 4192 if (array_info && array_info->chip != gc) {
bf9346f5
JK
4193 __clear_bit(descs->ndescs, array_info->get_mask);
4194 __clear_bit(descs->ndescs, array_info->set_mask);
c4c958aa
JK
4195 }
4196 /*
4197 * Detect array members which belong to the 'fast' chip
4198 * but their pins are not in hardware order.
4199 */
4200 else if (array_info &&
4201 gpio_chip_hwgpio(desc) != descs->ndescs) {
4202 /*
4203 * Don't use fast path if all array members processed so
4204 * far belong to the same chip as this one but its pin
4205 * hardware number is different from its array index.
4206 */
4207 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
4208 array_info = NULL;
4209 } else {
4210 __clear_bit(descs->ndescs,
4211 array_info->get_mask);
4212 __clear_bit(descs->ndescs,
4213 array_info->set_mask);
4214 }
bf9346f5
JK
4215 } else if (array_info) {
4216 /* Exclude open drain or open source from fast output */
a0b66a73
LW
4217 if (gpiochip_line_is_open_drain(gc, descs->ndescs) ||
4218 gpiochip_line_is_open_source(gc, descs->ndescs))
bf9346f5
JK
4219 __clear_bit(descs->ndescs,
4220 array_info->set_mask);
4221 /* Identify 'fast' pins which require invertion */
4222 if (gpiod_is_active_low(desc))
4223 __set_bit(descs->ndescs,
4224 array_info->invert_mask);
4225 }
4226
66858527
RI
4227 descs->ndescs++;
4228 }
bf9346f5
JK
4229 if (array_info)
4230 dev_dbg(dev,
4231 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
4232 array_info->chip->label, array_info->size,
4233 *array_info->get_mask, *array_info->set_mask,
4234 *array_info->invert_mask);
66858527
RI
4235 return descs;
4236}
4237EXPORT_SYMBOL_GPL(gpiod_get_array);
4238
4239/**
4240 * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
4241 * function
4242 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4243 * @con_id: function within the GPIO consumer
4244 * @flags: optional GPIO initialization flags
4245 *
4246 * This is equivalent to gpiod_get_array(), except that when no GPIO was
4247 * assigned to the requested function it will return NULL.
4248 */
4249struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
4250 const char *con_id,
4251 enum gpiod_flags flags)
4252{
4253 struct gpio_descs *descs;
4254
4255 descs = gpiod_get_array(dev, con_id, flags);
7b58696d 4256 if (gpiod_not_found(descs))
66858527
RI
4257 return NULL;
4258
4259 return descs;
4260}
4261EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
4262
bae48da2
AC
4263/**
4264 * gpiod_put - dispose of a GPIO descriptor
4265 * @desc: GPIO descriptor to dispose of
4266 *
4267 * No descriptor can be used after gpiod_put() has been called on it.
4268 */
4269void gpiod_put(struct gpio_desc *desc)
4270{
1d7765ba
AS
4271 if (desc)
4272 gpiod_free(desc);
372e722e 4273}
bae48da2 4274EXPORT_SYMBOL_GPL(gpiod_put);
d2876d08 4275
66858527
RI
4276/**
4277 * gpiod_put_array - dispose of multiple GPIO descriptors
4278 * @descs: struct gpio_descs containing an array of descriptors
4279 */
4280void gpiod_put_array(struct gpio_descs *descs)
4281{
4282 unsigned int i;
4283
4284 for (i = 0; i < descs->ndescs; i++)
4285 gpiod_put(descs->desc[i]);
4286
4287 kfree(descs);
4288}
4289EXPORT_SYMBOL_GPL(gpiod_put_array);
4290
ced2af41
SK
4291
4292static int gpio_bus_match(struct device *dev, struct device_driver *drv)
4293{
1df62542
AS
4294 struct fwnode_handle *fwnode = dev_fwnode(dev);
4295
ced2af41
SK
4296 /*
4297 * Only match if the fwnode doesn't already have a proper struct device
4298 * created for it.
4299 */
1df62542 4300 if (fwnode && fwnode->dev != dev)
ced2af41
SK
4301 return 0;
4302 return 1;
4303}
4304
4731210c
SK
4305static int gpio_stub_drv_probe(struct device *dev)
4306{
4307 /*
4308 * The DT node of some GPIO chips have a "compatible" property, but
4309 * never have a struct device added and probed by a driver to register
4310 * the GPIO chip with gpiolib. In such cases, fw_devlink=on will cause
4311 * the consumers of the GPIO chip to get probe deferred forever because
4312 * they will be waiting for a device associated with the GPIO chip
4313 * firmware node to get added and bound to a driver.
4314 *
4315 * To allow these consumers to probe, we associate the struct
4316 * gpio_device of the GPIO chip with the firmware node and then simply
4317 * bind it to this stub driver.
4318 */
4319 return 0;
4320}
4321
4322static struct device_driver gpio_stub_drv = {
4323 .name = "gpio_stub_drv",
4324 .bus = &gpio_bus_type,
4325 .probe = gpio_stub_drv_probe,
4326};
4327
3c702e99
LW
4328static int __init gpiolib_dev_init(void)
4329{
4330 int ret;
4331
4332 /* Register GPIO sysfs bus */
b1911710 4333 ret = bus_register(&gpio_bus_type);
3c702e99
LW
4334 if (ret < 0) {
4335 pr_err("gpiolib: could not register GPIO bus type\n");
4336 return ret;
4337 }
4338
3875721e
WY
4339 ret = driver_register(&gpio_stub_drv);
4340 if (ret < 0) {
4731210c
SK
4341 pr_err("gpiolib: could not register GPIO stub driver\n");
4342 bus_unregister(&gpio_bus_type);
4343 return ret;
4344 }
4345
ddd8891e 4346 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME);
3c702e99
LW
4347 if (ret < 0) {
4348 pr_err("gpiolib: failed to allocate char dev region\n");
4731210c 4349 driver_unregister(&gpio_stub_drv);
3c702e99 4350 bus_unregister(&gpio_bus_type);
63636d95 4351 return ret;
3c702e99 4352 }
63636d95
GU
4353
4354 gpiolib_initialized = true;
4355 gpiochip_setup_devs();
4356
8650b609
DG
4357#if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO)
4358 WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier));
4359#endif /* CONFIG_OF_DYNAMIC && CONFIG_OF_GPIO */
63636d95 4360
3c702e99
LW
4361 return ret;
4362}
4363core_initcall(gpiolib_dev_init);
4364
d2876d08
DB
4365#ifdef CONFIG_DEBUG_FS
4366
fdeb8e15 4367static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
d2876d08
DB
4368{
4369 unsigned i;
a0b66a73 4370 struct gpio_chip *gc = gdev->chip;
fdeb8e15
LW
4371 unsigned gpio = gdev->base;
4372 struct gpio_desc *gdesc = &gdev->descs[0];
90fd2270
LW
4373 bool is_out;
4374 bool is_irq;
4375 bool active_low;
d2876d08 4376
fdeb8e15 4377 for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) {
ced433e2
MP
4378 if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) {
4379 if (gdesc->name) {
4380 seq_printf(s, " gpio-%-3d (%-20.20s)\n",
4381 gpio, gdesc->name);
4382 }
d2876d08 4383 continue;
ced433e2 4384 }
d2876d08 4385
372e722e 4386 gpiod_get_direction(gdesc);
d2876d08 4387 is_out = test_bit(FLAG_IS_OUT, &gdesc->flags);
d468bf9e 4388 is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags);
90fd2270
LW
4389 active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags);
4390 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s",
ced433e2 4391 gpio, gdesc->name ? gdesc->name : "", gdesc->label,
d2876d08 4392 is_out ? "out" : "in ",
a0b66a73 4393 gc->get ? (gc->get(gc, i) ? "hi" : "lo") : "? ",
90fd2270
LW
4394 is_irq ? "IRQ " : "",
4395 active_low ? "ACTIVE LOW" : "");
d2876d08
DB
4396 seq_printf(s, "\n");
4397 }
4398}
4399
f9c4a31f 4400static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
d2876d08 4401{
362432ae 4402 unsigned long flags;
ff2b1359 4403 struct gpio_device *gdev = NULL;
cb1650d4 4404 loff_t index = *pos;
d2876d08 4405
f9c4a31f 4406 s->private = "";
d2876d08 4407
362432ae 4408 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4409 list_for_each_entry(gdev, &gpio_devices, list)
362432ae
GL
4410 if (index-- == 0) {
4411 spin_unlock_irqrestore(&gpio_lock, flags);
ff2b1359 4412 return gdev;
f9c4a31f 4413 }
362432ae 4414 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f 4415
cb1650d4 4416 return NULL;
f9c4a31f
TR
4417}
4418
4419static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
4420{
362432ae 4421 unsigned long flags;
ff2b1359 4422 struct gpio_device *gdev = v;
f9c4a31f
TR
4423 void *ret = NULL;
4424
362432ae 4425 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4426 if (list_is_last(&gdev->list, &gpio_devices))
cb1650d4
AC
4427 ret = NULL;
4428 else
ff2b1359 4429 ret = list_entry(gdev->list.next, struct gpio_device, list);
362432ae 4430 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f
TR
4431
4432 s->private = "\n";
4433 ++*pos;
4434
4435 return ret;
4436}
4437
4438static void gpiolib_seq_stop(struct seq_file *s, void *v)
4439{
4440}
4441
4442static int gpiolib_seq_show(struct seq_file *s, void *v)
4443{
ff2b1359 4444 struct gpio_device *gdev = v;
a0b66a73 4445 struct gpio_chip *gc = gdev->chip;
ff2b1359
LW
4446 struct device *parent;
4447
a0b66a73 4448 if (!gc) {
ff2b1359
LW
4449 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
4450 dev_name(&gdev->dev));
4451 return 0;
4452 }
f9c4a31f 4453
ff2b1359
LW
4454 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
4455 dev_name(&gdev->dev),
fdeb8e15 4456 gdev->base, gdev->base + gdev->ngpio - 1);
a0b66a73 4457 parent = gc->parent;
ff2b1359
LW
4458 if (parent)
4459 seq_printf(s, ", parent: %s/%s",
4460 parent->bus ? parent->bus->name : "no-bus",
4461 dev_name(parent));
a0b66a73
LW
4462 if (gc->label)
4463 seq_printf(s, ", %s", gc->label);
4464 if (gc->can_sleep)
f9c4a31f
TR
4465 seq_printf(s, ", can sleep");
4466 seq_printf(s, ":\n");
4467
a0b66a73
LW
4468 if (gc->dbg_show)
4469 gc->dbg_show(s, gc);
f9c4a31f 4470 else
fdeb8e15 4471 gpiolib_dbg_show(s, gdev);
f9c4a31f 4472
d2876d08
DB
4473 return 0;
4474}
4475
425c5b3e 4476static const struct seq_operations gpiolib_sops = {
f9c4a31f
TR
4477 .start = gpiolib_seq_start,
4478 .next = gpiolib_seq_next,
4479 .stop = gpiolib_seq_stop,
4480 .show = gpiolib_seq_show,
4481};
425c5b3e 4482DEFINE_SEQ_ATTRIBUTE(gpiolib);
d2876d08
DB
4483
4484static int __init gpiolib_debugfs_init(void)
4485{
4486 /* /sys/kernel/debug/gpio */
425c5b3e 4487 debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops);
d2876d08
DB
4488 return 0;
4489}
4490subsys_initcall(gpiolib_debugfs_init);
4491
4492#endif /* DEBUG_FS */