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dae5f0af | 1 | // SPDX-License-Identifier: GPL-2.0 |
923a654c | 2 | #include <linux/bitmap.h> |
d2876d08 DB |
3 | #include <linux/kernel.h> |
4 | #include <linux/module.h> | |
ff77c352 | 5 | #include <linux/interrupt.h> |
d2876d08 DB |
6 | #include <linux/irq.h> |
7 | #include <linux/spinlock.h> | |
1a989d0f | 8 | #include <linux/list.h> |
d8f388d8 DB |
9 | #include <linux/device.h> |
10 | #include <linux/err.h> | |
11 | #include <linux/debugfs.h> | |
12 | #include <linux/seq_file.h> | |
13 | #include <linux/gpio.h> | |
ff77c352 | 14 | #include <linux/idr.h> |
5a0e3ad6 | 15 | #include <linux/slab.h> |
7b199811 | 16 | #include <linux/acpi.h> |
53e7cac3 | 17 | #include <linux/gpio/driver.h> |
0a6d3158 | 18 | #include <linux/gpio/machine.h> |
c771c2f4 | 19 | #include <linux/pinctrl/consumer.h> |
3c702e99 LW |
20 | #include <linux/cdev.h> |
21 | #include <linux/fs.h> | |
22 | #include <linux/uaccess.h> | |
8b92e17e | 23 | #include <linux/compat.h> |
d7c51b47 | 24 | #include <linux/anon_inodes.h> |
953b956a | 25 | #include <linux/file.h> |
61f922db LW |
26 | #include <linux/kfifo.h> |
27 | #include <linux/poll.h> | |
28 | #include <linux/timekeeping.h> | |
3c702e99 | 29 | #include <uapi/linux/gpio.h> |
d2876d08 | 30 | |
664e3e5a | 31 | #include "gpiolib.h" |
f626d6df | 32 | #include "gpiolib-of.h" |
77cb907a | 33 | #include "gpiolib-acpi.h" |
664e3e5a | 34 | |
3f397c21 UKK |
35 | #define CREATE_TRACE_POINTS |
36 | #include <trace/events/gpio.h> | |
d2876d08 | 37 | |
79a9becd | 38 | /* Implementation infrastructure for GPIO interfaces. |
d2876d08 | 39 | * |
79a9becd AC |
40 | * The GPIO programming interface allows for inlining speed-critical |
41 | * get/set operations for common cases, so that access to SOC-integrated | |
42 | * GPIOs can sometimes cost only an instruction or two per bit. | |
d2876d08 DB |
43 | */ |
44 | ||
45 | ||
46 | /* When debugging, extend minimal trust to callers and platform code. | |
47 | * Also emit diagnostic messages that may help initial bringup, when | |
48 | * board setup or driver bugs are most common. | |
49 | * | |
50 | * Otherwise, minimize overhead in what may be bitbanging codepaths. | |
51 | */ | |
52 | #ifdef DEBUG | |
53 | #define extra_checks 1 | |
54 | #else | |
55 | #define extra_checks 0 | |
56 | #endif | |
57 | ||
ff2b1359 LW |
58 | /* Device and char device-related information */ |
59 | static DEFINE_IDA(gpio_ida); | |
3c702e99 LW |
60 | static dev_t gpio_devt; |
61 | #define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */ | |
62 | static struct bus_type gpio_bus_type = { | |
63 | .name = "gpio", | |
64 | }; | |
ff2b1359 | 65 | |
3027743f LA |
66 | /* |
67 | * Number of GPIOs to use for the fast path in set array | |
68 | */ | |
69 | #define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT | |
70 | ||
d2876d08 DB |
71 | /* gpio_lock prevents conflicts during gpio_desc[] table updates. |
72 | * While any GPIO is requested, its gpio_chip is not removable; | |
73 | * each GPIO's "requested" flag serves as a lock and refcount. | |
74 | */ | |
0eb4c6c2 | 75 | DEFINE_SPINLOCK(gpio_lock); |
d2876d08 | 76 | |
bae48da2 AC |
77 | static DEFINE_MUTEX(gpio_lookup_lock); |
78 | static LIST_HEAD(gpio_lookup_list); | |
ff2b1359 | 79 | LIST_HEAD(gpio_devices); |
6d86750c | 80 | |
a411e81e BG |
81 | static DEFINE_MUTEX(gpio_machine_hogs_mutex); |
82 | static LIST_HEAD(gpio_machine_hogs); | |
83 | ||
6d86750c | 84 | static void gpiochip_free_hogs(struct gpio_chip *chip); |
959bc7b2 | 85 | static int gpiochip_add_irqchip(struct gpio_chip *gpiochip, |
39c3fd58 AL |
86 | struct lock_class_key *lock_key, |
87 | struct lock_class_key *request_key); | |
6d86750c | 88 | static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip); |
9411e3aa | 89 | static int gpiochip_irqchip_init_hw(struct gpio_chip *gpiochip); |
79b804cb MW |
90 | static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip); |
91 | static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip); | |
6d86750c | 92 | |
159f3cd9 | 93 | static bool gpiolib_initialized; |
6d86750c | 94 | |
d2876d08 DB |
95 | static inline void desc_set_label(struct gpio_desc *d, const char *label) |
96 | { | |
d2876d08 | 97 | d->label = label; |
d2876d08 DB |
98 | } |
99 | ||
372e722e | 100 | /** |
950d55f5 TR |
101 | * gpio_to_desc - Convert a GPIO number to its descriptor |
102 | * @gpio: global GPIO number | |
103 | * | |
104 | * Returns: | |
105 | * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO | |
106 | * with the given number exists in the system. | |
372e722e | 107 | */ |
79a9becd | 108 | struct gpio_desc *gpio_to_desc(unsigned gpio) |
372e722e | 109 | { |
ff2b1359 | 110 | struct gpio_device *gdev; |
14e85c0e AC |
111 | unsigned long flags; |
112 | ||
113 | spin_lock_irqsave(&gpio_lock, flags); | |
114 | ||
ff2b1359 | 115 | list_for_each_entry(gdev, &gpio_devices, list) { |
fdeb8e15 LW |
116 | if (gdev->base <= gpio && |
117 | gdev->base + gdev->ngpio > gpio) { | |
14e85c0e | 118 | spin_unlock_irqrestore(&gpio_lock, flags); |
fdeb8e15 | 119 | return &gdev->descs[gpio - gdev->base]; |
14e85c0e AC |
120 | } |
121 | } | |
122 | ||
123 | spin_unlock_irqrestore(&gpio_lock, flags); | |
124 | ||
0e9a5edf AC |
125 | if (!gpio_is_valid(gpio)) |
126 | WARN(1, "invalid GPIO %d\n", gpio); | |
127 | ||
14e85c0e | 128 | return NULL; |
372e722e | 129 | } |
79a9becd | 130 | EXPORT_SYMBOL_GPL(gpio_to_desc); |
372e722e | 131 | |
d468bf9e | 132 | /** |
950d55f5 TR |
133 | * gpiochip_get_desc - get the GPIO descriptor corresponding to the given |
134 | * hardware number for this chip | |
135 | * @chip: GPIO chip | |
136 | * @hwnum: hardware number of the GPIO for this chip | |
137 | * | |
138 | * Returns: | |
139 | * A pointer to the GPIO descriptor or %ERR_PTR(-EINVAL) if no GPIO exists | |
140 | * in the given chip for the specified hardware number. | |
d468bf9e | 141 | */ |
bb1e88cc | 142 | struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip, |
06863620 | 143 | unsigned int hwnum) |
d468bf9e | 144 | { |
fdeb8e15 LW |
145 | struct gpio_device *gdev = chip->gpiodev; |
146 | ||
147 | if (hwnum >= gdev->ngpio) | |
b7d0a28a | 148 | return ERR_PTR(-EINVAL); |
d468bf9e | 149 | |
fdeb8e15 | 150 | return &gdev->descs[hwnum]; |
d468bf9e | 151 | } |
372e722e AC |
152 | |
153 | /** | |
950d55f5 TR |
154 | * desc_to_gpio - convert a GPIO descriptor to the integer namespace |
155 | * @desc: GPIO descriptor | |
156 | * | |
372e722e | 157 | * This should disappear in the future but is needed since we still |
950d55f5 TR |
158 | * use GPIO numbers for error messages and sysfs nodes. |
159 | * | |
160 | * Returns: | |
161 | * The global GPIO number for the GPIO specified by its descriptor. | |
372e722e | 162 | */ |
79a9becd | 163 | int desc_to_gpio(const struct gpio_desc *desc) |
372e722e | 164 | { |
fdeb8e15 | 165 | return desc->gdev->base + (desc - &desc->gdev->descs[0]); |
372e722e | 166 | } |
79a9becd | 167 | EXPORT_SYMBOL_GPL(desc_to_gpio); |
372e722e AC |
168 | |
169 | ||
79a9becd AC |
170 | /** |
171 | * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs | |
172 | * @desc: descriptor to return the chip of | |
173 | */ | |
174 | struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc) | |
372e722e | 175 | { |
dd3b9a44 | 176 | if (!desc || !desc->gdev) |
fdeb8e15 LW |
177 | return NULL; |
178 | return desc->gdev->chip; | |
372e722e | 179 | } |
79a9becd | 180 | EXPORT_SYMBOL_GPL(gpiod_to_chip); |
d2876d08 | 181 | |
8d0aab2f AV |
182 | /* dynamic allocation of GPIOs, e.g. on a hotplugged device */ |
183 | static int gpiochip_find_base(int ngpio) | |
184 | { | |
ff2b1359 | 185 | struct gpio_device *gdev; |
83cabe33 | 186 | int base = ARCH_NR_GPIOS - ngpio; |
8d0aab2f | 187 | |
ff2b1359 | 188 | list_for_each_entry_reverse(gdev, &gpio_devices, list) { |
83cabe33 | 189 | /* found a free space? */ |
fdeb8e15 | 190 | if (gdev->base + gdev->ngpio <= base) |
83cabe33 AC |
191 | break; |
192 | else | |
193 | /* nope, check the space right before the chip */ | |
fdeb8e15 | 194 | base = gdev->base - ngpio; |
8d0aab2f AV |
195 | } |
196 | ||
83cabe33 | 197 | if (gpio_is_valid(base)) { |
8d0aab2f | 198 | pr_debug("%s: found new base at %d\n", __func__, base); |
83cabe33 AC |
199 | return base; |
200 | } else { | |
201 | pr_err("%s: cannot find free range\n", __func__); | |
202 | return -ENOSPC; | |
169b6a7a | 203 | } |
169b6a7a AV |
204 | } |
205 | ||
79a9becd AC |
206 | /** |
207 | * gpiod_get_direction - return the current direction of a GPIO | |
208 | * @desc: GPIO to get the direction of | |
209 | * | |
94fc7309 | 210 | * Returns 0 for output, 1 for input, or an error code in case of error. |
79a9becd AC |
211 | * |
212 | * This function may sleep if gpiod_cansleep() is true. | |
213 | */ | |
8e53b0f1 | 214 | int gpiod_get_direction(struct gpio_desc *desc) |
80b0a602 | 215 | { |
d0121b85 WS |
216 | struct gpio_chip *chip; |
217 | unsigned offset; | |
d377f56f | 218 | int ret; |
80b0a602 | 219 | |
372e722e AC |
220 | chip = gpiod_to_chip(desc); |
221 | offset = gpio_chip_hwgpio(desc); | |
80b0a602 | 222 | |
256efaea RK |
223 | /* |
224 | * Open drain emulation using input mode may incorrectly report | |
225 | * input here, fix that up. | |
226 | */ | |
227 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && | |
228 | test_bit(FLAG_IS_OUT, &desc->flags)) | |
229 | return 0; | |
230 | ||
80b0a602 | 231 | if (!chip->get_direction) |
d0121b85 | 232 | return -ENOTSUPP; |
80b0a602 | 233 | |
d377f56f | 234 | ret = chip->get_direction(chip, offset); |
4fc5bfeb AS |
235 | if (ret < 0) |
236 | return ret; | |
237 | ||
238 | /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */ | |
239 | if (ret > 0) | |
d377f56f | 240 | ret = 1; |
4fc5bfeb AS |
241 | |
242 | assign_bit(FLAG_IS_OUT, &desc->flags, !ret); | |
243 | ||
d377f56f | 244 | return ret; |
80b0a602 | 245 | } |
79a9becd | 246 | EXPORT_SYMBOL_GPL(gpiod_get_direction); |
80b0a602 | 247 | |
1a989d0f AC |
248 | /* |
249 | * Add a new chip to the global chips list, keeping the list of chips sorted | |
ef7c7553 | 250 | * by range(means [base, base + ngpio - 1]) order. |
1a989d0f AC |
251 | * |
252 | * Return -EBUSY if the new chip overlaps with some other chip's integer | |
253 | * space. | |
254 | */ | |
ff2b1359 | 255 | static int gpiodev_add_to_list(struct gpio_device *gdev) |
1a989d0f | 256 | { |
a961f9b4 | 257 | struct gpio_device *prev, *next; |
1a989d0f | 258 | |
ff2b1359 | 259 | if (list_empty(&gpio_devices)) { |
a961f9b4 | 260 | /* initial entry in list */ |
ff2b1359 | 261 | list_add_tail(&gdev->list, &gpio_devices); |
e28ecca6 | 262 | return 0; |
1a989d0f AC |
263 | } |
264 | ||
a961f9b4 BJZ |
265 | next = list_entry(gpio_devices.next, struct gpio_device, list); |
266 | if (gdev->base + gdev->ngpio <= next->base) { | |
267 | /* add before first entry */ | |
268 | list_add(&gdev->list, &gpio_devices); | |
269 | return 0; | |
1a989d0f AC |
270 | } |
271 | ||
a961f9b4 BJZ |
272 | prev = list_entry(gpio_devices.prev, struct gpio_device, list); |
273 | if (prev->base + prev->ngpio <= gdev->base) { | |
274 | /* add behind last entry */ | |
275 | list_add_tail(&gdev->list, &gpio_devices); | |
96098df1 | 276 | return 0; |
1a989d0f AC |
277 | } |
278 | ||
a961f9b4 BJZ |
279 | list_for_each_entry_safe(prev, next, &gpio_devices, list) { |
280 | /* at the end of the list */ | |
281 | if (&next->list == &gpio_devices) | |
282 | break; | |
1a989d0f | 283 | |
a961f9b4 BJZ |
284 | /* add between prev and next */ |
285 | if (prev->base + prev->ngpio <= gdev->base | |
286 | && gdev->base + gdev->ngpio <= next->base) { | |
287 | list_add(&gdev->list, &prev->list); | |
288 | return 0; | |
289 | } | |
290 | } | |
291 | ||
292 | dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n"); | |
293 | return -EBUSY; | |
1a989d0f AC |
294 | } |
295 | ||
950d55f5 | 296 | /* |
f881bab0 LW |
297 | * Convert a GPIO name to its descriptor |
298 | */ | |
299 | static struct gpio_desc *gpio_name_to_desc(const char * const name) | |
300 | { | |
ff2b1359 | 301 | struct gpio_device *gdev; |
f881bab0 LW |
302 | unsigned long flags; |
303 | ||
304 | spin_lock_irqsave(&gpio_lock, flags); | |
305 | ||
ff2b1359 | 306 | list_for_each_entry(gdev, &gpio_devices, list) { |
f881bab0 LW |
307 | int i; |
308 | ||
fdeb8e15 LW |
309 | for (i = 0; i != gdev->ngpio; ++i) { |
310 | struct gpio_desc *desc = &gdev->descs[i]; | |
f881bab0 | 311 | |
fdeb8e15 | 312 | if (!desc->name || !name) |
f881bab0 LW |
313 | continue; |
314 | ||
fdeb8e15 | 315 | if (!strcmp(desc->name, name)) { |
f881bab0 | 316 | spin_unlock_irqrestore(&gpio_lock, flags); |
fdeb8e15 | 317 | return desc; |
f881bab0 LW |
318 | } |
319 | } | |
320 | } | |
321 | ||
322 | spin_unlock_irqrestore(&gpio_lock, flags); | |
323 | ||
324 | return NULL; | |
325 | } | |
326 | ||
5f3ca732 MP |
327 | /* |
328 | * Takes the names from gc->names and checks if they are all unique. If they | |
329 | * are, they are assigned to their gpio descriptors. | |
330 | * | |
ed37915c | 331 | * Warning if one of the names is already used for a different GPIO. |
5f3ca732 MP |
332 | */ |
333 | static int gpiochip_set_desc_names(struct gpio_chip *gc) | |
334 | { | |
fdeb8e15 | 335 | struct gpio_device *gdev = gc->gpiodev; |
5f3ca732 MP |
336 | int i; |
337 | ||
338 | if (!gc->names) | |
339 | return 0; | |
340 | ||
341 | /* First check all names if they are unique */ | |
342 | for (i = 0; i != gc->ngpio; ++i) { | |
343 | struct gpio_desc *gpio; | |
344 | ||
345 | gpio = gpio_name_to_desc(gc->names[i]); | |
f881bab0 | 346 | if (gpio) |
fdeb8e15 | 347 | dev_warn(&gdev->dev, |
34ffd85d | 348 | "Detected name collision for GPIO name '%s'\n", |
f881bab0 | 349 | gc->names[i]); |
5f3ca732 MP |
350 | } |
351 | ||
352 | /* Then add all names to the GPIO descriptors */ | |
353 | for (i = 0; i != gc->ngpio; ++i) | |
fdeb8e15 | 354 | gdev->descs[i].name = gc->names[i]; |
5f3ca732 MP |
355 | |
356 | return 0; | |
357 | } | |
358 | ||
e4371f6e SB |
359 | static unsigned long *gpiochip_allocate_mask(struct gpio_chip *chip) |
360 | { | |
361 | unsigned long *p; | |
362 | ||
7bdbd1ec | 363 | p = bitmap_alloc(chip->ngpio, GFP_KERNEL); |
e4371f6e SB |
364 | if (!p) |
365 | return NULL; | |
366 | ||
367 | /* Assume by default all GPIOs are valid */ | |
368 | bitmap_fill(p, chip->ngpio); | |
369 | ||
370 | return p; | |
371 | } | |
372 | ||
f626d6df | 373 | static int gpiochip_alloc_valid_mask(struct gpio_chip *gc) |
726cb3ba | 374 | { |
eb1e8bd6 | 375 | if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask)) |
726cb3ba SB |
376 | return 0; |
377 | ||
f626d6df LW |
378 | gc->valid_mask = gpiochip_allocate_mask(gc); |
379 | if (!gc->valid_mask) | |
726cb3ba SB |
380 | return -ENOMEM; |
381 | ||
382 | return 0; | |
383 | } | |
384 | ||
c9fc5aff | 385 | static int gpiochip_init_valid_mask(struct gpio_chip *gc) |
f8ec92a9 | 386 | { |
c9fc5aff LW |
387 | if (gc->init_valid_mask) |
388 | return gc->init_valid_mask(gc, | |
389 | gc->valid_mask, | |
390 | gc->ngpio); | |
f8ec92a9 RRD |
391 | |
392 | return 0; | |
393 | } | |
394 | ||
726cb3ba SB |
395 | static void gpiochip_free_valid_mask(struct gpio_chip *gpiochip) |
396 | { | |
7bdbd1ec | 397 | bitmap_free(gpiochip->valid_mask); |
726cb3ba SB |
398 | gpiochip->valid_mask = NULL; |
399 | } | |
400 | ||
b056ca1c AS |
401 | static int gpiochip_add_pin_ranges(struct gpio_chip *gc) |
402 | { | |
403 | if (gc->add_pin_ranges) | |
404 | return gc->add_pin_ranges(gc); | |
405 | ||
406 | return 0; | |
407 | } | |
408 | ||
726cb3ba SB |
409 | bool gpiochip_line_is_valid(const struct gpio_chip *gpiochip, |
410 | unsigned int offset) | |
411 | { | |
412 | /* No mask means all valid */ | |
413 | if (likely(!gpiochip->valid_mask)) | |
414 | return true; | |
415 | return test_bit(offset, gpiochip->valid_mask); | |
416 | } | |
417 | EXPORT_SYMBOL_GPL(gpiochip_line_is_valid); | |
418 | ||
d7c51b47 LW |
419 | /* |
420 | * GPIO line handle management | |
421 | */ | |
422 | ||
423 | /** | |
424 | * struct linehandle_state - contains the state of a userspace handle | |
425 | * @gdev: the GPIO device the handle pertains to | |
426 | * @label: consumer label used to tag descriptors | |
427 | * @descs: the GPIO descriptors held by this handle | |
428 | * @numdescs: the number of descriptors held in the descs array | |
429 | */ | |
430 | struct linehandle_state { | |
431 | struct gpio_device *gdev; | |
432 | const char *label; | |
433 | struct gpio_desc *descs[GPIOHANDLES_MAX]; | |
434 | u32 numdescs; | |
435 | }; | |
436 | ||
e3e847c7 LPC |
437 | #define GPIOHANDLE_REQUEST_VALID_FLAGS \ |
438 | (GPIOHANDLE_REQUEST_INPUT | \ | |
439 | GPIOHANDLE_REQUEST_OUTPUT | \ | |
440 | GPIOHANDLE_REQUEST_ACTIVE_LOW | \ | |
9225d516 DF |
441 | GPIOHANDLE_REQUEST_BIAS_PULL_UP | \ |
442 | GPIOHANDLE_REQUEST_BIAS_PULL_DOWN | \ | |
2148ad77 | 443 | GPIOHANDLE_REQUEST_BIAS_DISABLE | \ |
e3e847c7 LPC |
444 | GPIOHANDLE_REQUEST_OPEN_DRAIN | \ |
445 | GPIOHANDLE_REQUEST_OPEN_SOURCE) | |
446 | ||
b043ed7e KG |
447 | static int linehandle_validate_flags(u32 flags) |
448 | { | |
449 | /* Return an error if an unknown flag is set */ | |
450 | if (flags & ~GPIOHANDLE_REQUEST_VALID_FLAGS) | |
451 | return -EINVAL; | |
452 | ||
453 | /* | |
454 | * Do not allow both INPUT & OUTPUT flags to be set as they are | |
455 | * contradictory. | |
456 | */ | |
457 | if ((flags & GPIOHANDLE_REQUEST_INPUT) && | |
458 | (flags & GPIOHANDLE_REQUEST_OUTPUT)) | |
459 | return -EINVAL; | |
460 | ||
461 | /* | |
462 | * Do not allow OPEN_SOURCE & OPEN_DRAIN flags in a single request. If | |
463 | * the hardware actually supports enabling both at the same time the | |
464 | * electrical result would be disastrous. | |
465 | */ | |
466 | if ((flags & GPIOHANDLE_REQUEST_OPEN_DRAIN) && | |
467 | (flags & GPIOHANDLE_REQUEST_OPEN_SOURCE)) | |
468 | return -EINVAL; | |
469 | ||
470 | /* OPEN_DRAIN and OPEN_SOURCE flags only make sense for output mode. */ | |
471 | if (!(flags & GPIOHANDLE_REQUEST_OUTPUT) && | |
472 | ((flags & GPIOHANDLE_REQUEST_OPEN_DRAIN) || | |
473 | (flags & GPIOHANDLE_REQUEST_OPEN_SOURCE))) | |
474 | return -EINVAL; | |
475 | ||
476 | /* Bias flags only allowed for input or output mode. */ | |
477 | if (!((flags & GPIOHANDLE_REQUEST_INPUT) || | |
478 | (flags & GPIOHANDLE_REQUEST_OUTPUT)) && | |
479 | ((flags & GPIOHANDLE_REQUEST_BIAS_DISABLE) || | |
480 | (flags & GPIOHANDLE_REQUEST_BIAS_PULL_UP) || | |
481 | (flags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN))) | |
482 | return -EINVAL; | |
483 | ||
484 | /* Only one bias flag can be set. */ | |
485 | if (((flags & GPIOHANDLE_REQUEST_BIAS_DISABLE) && | |
486 | (flags & (GPIOHANDLE_REQUEST_BIAS_PULL_DOWN | | |
487 | GPIOHANDLE_REQUEST_BIAS_PULL_UP))) || | |
488 | ((flags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) && | |
489 | (flags & GPIOHANDLE_REQUEST_BIAS_PULL_UP))) | |
490 | return -EINVAL; | |
491 | ||
492 | return 0; | |
493 | } | |
494 | ||
e588bb1e KG |
495 | static long linehandle_set_config(struct linehandle_state *lh, |
496 | void __user *ip) | |
497 | { | |
498 | struct gpiohandle_config gcnf; | |
499 | struct gpio_desc *desc; | |
500 | int i, ret; | |
501 | u32 lflags; | |
502 | unsigned long *flagsp; | |
503 | ||
504 | if (copy_from_user(&gcnf, ip, sizeof(gcnf))) | |
505 | return -EFAULT; | |
506 | ||
507 | lflags = gcnf.flags; | |
508 | ret = linehandle_validate_flags(lflags); | |
509 | if (ret) | |
510 | return ret; | |
511 | ||
512 | for (i = 0; i < lh->numdescs; i++) { | |
513 | desc = lh->descs[i]; | |
514 | flagsp = &desc->flags; | |
515 | ||
4fc5bfeb | 516 | assign_bit(FLAG_ACTIVE_LOW, flagsp, |
e588bb1e KG |
517 | lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW); |
518 | ||
4fc5bfeb | 519 | assign_bit(FLAG_OPEN_DRAIN, flagsp, |
e588bb1e KG |
520 | lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN); |
521 | ||
4fc5bfeb | 522 | assign_bit(FLAG_OPEN_SOURCE, flagsp, |
e588bb1e KG |
523 | lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE); |
524 | ||
4fc5bfeb | 525 | assign_bit(FLAG_PULL_UP, flagsp, |
e588bb1e KG |
526 | lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP); |
527 | ||
4fc5bfeb | 528 | assign_bit(FLAG_PULL_DOWN, flagsp, |
e588bb1e KG |
529 | lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN); |
530 | ||
4fc5bfeb | 531 | assign_bit(FLAG_BIAS_DISABLE, flagsp, |
e588bb1e KG |
532 | lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE); |
533 | ||
534 | /* | |
535 | * Lines have to be requested explicitly for input | |
536 | * or output, else the line will be treated "as is". | |
537 | */ | |
538 | if (lflags & GPIOHANDLE_REQUEST_OUTPUT) { | |
539 | int val = !!gcnf.default_values[i]; | |
540 | ||
541 | ret = gpiod_direction_output(desc, val); | |
542 | if (ret) | |
543 | return ret; | |
544 | } else if (lflags & GPIOHANDLE_REQUEST_INPUT) { | |
545 | ret = gpiod_direction_input(desc); | |
546 | if (ret) | |
547 | return ret; | |
548 | } | |
51c1064e BG |
549 | |
550 | atomic_notifier_call_chain(&desc->gdev->notifier, | |
551 | GPIOLINE_CHANGED_CONFIG, desc); | |
e588bb1e KG |
552 | } |
553 | return 0; | |
554 | } | |
555 | ||
d7c51b47 LW |
556 | static long linehandle_ioctl(struct file *filep, unsigned int cmd, |
557 | unsigned long arg) | |
558 | { | |
559 | struct linehandle_state *lh = filep->private_data; | |
560 | void __user *ip = (void __user *)arg; | |
561 | struct gpiohandle_data ghd; | |
b9762beb | 562 | DECLARE_BITMAP(vals, GPIOHANDLES_MAX); |
d7c51b47 LW |
563 | int i; |
564 | ||
565 | if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) { | |
2b955b34 | 566 | /* NOTE: It's ok to read values of output lines. */ |
eec1d566 LW |
567 | int ret = gpiod_get_array_value_complex(false, |
568 | true, | |
569 | lh->numdescs, | |
570 | lh->descs, | |
77588c14 | 571 | NULL, |
eec1d566 LW |
572 | vals); |
573 | if (ret) | |
574 | return ret; | |
d7c51b47 | 575 | |
3eded5d8 | 576 | memset(&ghd, 0, sizeof(ghd)); |
eec1d566 | 577 | for (i = 0; i < lh->numdescs; i++) |
b9762beb | 578 | ghd.values[i] = test_bit(i, vals); |
d7c51b47 LW |
579 | |
580 | if (copy_to_user(ip, &ghd, sizeof(ghd))) | |
581 | return -EFAULT; | |
582 | ||
583 | return 0; | |
584 | } else if (cmd == GPIOHANDLE_SET_LINE_VALUES_IOCTL) { | |
e5332d54 BG |
585 | /* |
586 | * All line descriptors were created at once with the same | |
587 | * flags so just check if the first one is really output. | |
588 | */ | |
589 | if (!test_bit(FLAG_IS_OUT, &lh->descs[0]->flags)) | |
590 | return -EPERM; | |
591 | ||
d7c51b47 LW |
592 | if (copy_from_user(&ghd, ip, sizeof(ghd))) |
593 | return -EFAULT; | |
594 | ||
595 | /* Clamp all values to [0,1] */ | |
596 | for (i = 0; i < lh->numdescs; i++) | |
b9762beb | 597 | __assign_bit(i, vals, ghd.values[i]); |
d7c51b47 LW |
598 | |
599 | /* Reuse the array setting function */ | |
3027743f | 600 | return gpiod_set_array_value_complex(false, |
d7c51b47 LW |
601 | true, |
602 | lh->numdescs, | |
603 | lh->descs, | |
77588c14 | 604 | NULL, |
d7c51b47 | 605 | vals); |
e588bb1e KG |
606 | } else if (cmd == GPIOHANDLE_SET_CONFIG_IOCTL) { |
607 | return linehandle_set_config(lh, ip); | |
d7c51b47 LW |
608 | } |
609 | return -EINVAL; | |
610 | } | |
611 | ||
612 | #ifdef CONFIG_COMPAT | |
613 | static long linehandle_ioctl_compat(struct file *filep, unsigned int cmd, | |
614 | unsigned long arg) | |
615 | { | |
616 | return linehandle_ioctl(filep, cmd, (unsigned long)compat_ptr(arg)); | |
617 | } | |
618 | #endif | |
619 | ||
620 | static int linehandle_release(struct inode *inode, struct file *filep) | |
621 | { | |
622 | struct linehandle_state *lh = filep->private_data; | |
623 | struct gpio_device *gdev = lh->gdev; | |
624 | int i; | |
625 | ||
626 | for (i = 0; i < lh->numdescs; i++) | |
627 | gpiod_free(lh->descs[i]); | |
628 | kfree(lh->label); | |
629 | kfree(lh); | |
630 | put_device(&gdev->dev); | |
631 | return 0; | |
632 | } | |
633 | ||
634 | static const struct file_operations linehandle_fileops = { | |
635 | .release = linehandle_release, | |
636 | .owner = THIS_MODULE, | |
637 | .llseek = noop_llseek, | |
638 | .unlocked_ioctl = linehandle_ioctl, | |
639 | #ifdef CONFIG_COMPAT | |
640 | .compat_ioctl = linehandle_ioctl_compat, | |
641 | #endif | |
642 | }; | |
643 | ||
644 | static int linehandle_create(struct gpio_device *gdev, void __user *ip) | |
645 | { | |
646 | struct gpiohandle_request handlereq; | |
647 | struct linehandle_state *lh; | |
953b956a | 648 | struct file *file; |
ab3dbcf7 | 649 | int fd, i, count = 0, ret; |
418ee8e9 | 650 | u32 lflags; |
d7c51b47 LW |
651 | |
652 | if (copy_from_user(&handlereq, ip, sizeof(handlereq))) | |
653 | return -EFAULT; | |
654 | if ((handlereq.lines == 0) || (handlereq.lines > GPIOHANDLES_MAX)) | |
655 | return -EINVAL; | |
656 | ||
418ee8e9 BG |
657 | lflags = handlereq.flags; |
658 | ||
b043ed7e KG |
659 | ret = linehandle_validate_flags(lflags); |
660 | if (ret) | |
661 | return ret; | |
2148ad77 | 662 | |
d7c51b47 LW |
663 | lh = kzalloc(sizeof(*lh), GFP_KERNEL); |
664 | if (!lh) | |
665 | return -ENOMEM; | |
666 | lh->gdev = gdev; | |
667 | get_device(&gdev->dev); | |
668 | ||
669 | /* Make sure this is terminated */ | |
670 | handlereq.consumer_label[sizeof(handlereq.consumer_label)-1] = '\0'; | |
671 | if (strlen(handlereq.consumer_label)) { | |
672 | lh->label = kstrdup(handlereq.consumer_label, | |
673 | GFP_KERNEL); | |
674 | if (!lh->label) { | |
675 | ret = -ENOMEM; | |
676 | goto out_free_lh; | |
677 | } | |
678 | } | |
679 | ||
680 | /* Request each GPIO */ | |
681 | for (i = 0; i < handlereq.lines; i++) { | |
682 | u32 offset = handlereq.lineoffsets[i]; | |
0f41dabe | 683 | struct gpio_desc *desc = gpiochip_get_desc(gdev->chip, offset); |
d7c51b47 | 684 | |
0f41dabe BG |
685 | if (IS_ERR(desc)) { |
686 | ret = PTR_ERR(desc); | |
e405f9fc LPC |
687 | goto out_free_descs; |
688 | } | |
689 | ||
d7c51b47 LW |
690 | ret = gpiod_request(desc, lh->label); |
691 | if (ret) | |
692 | goto out_free_descs; | |
693 | lh->descs[i] = desc; | |
19a4fbff | 694 | count = i + 1; |
d7c51b47 LW |
695 | |
696 | if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW) | |
697 | set_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
698 | if (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN) | |
699 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | |
700 | if (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE) | |
701 | set_bit(FLAG_OPEN_SOURCE, &desc->flags); | |
2148ad77 KG |
702 | if (lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE) |
703 | set_bit(FLAG_BIAS_DISABLE, &desc->flags); | |
9225d516 DF |
704 | if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) |
705 | set_bit(FLAG_PULL_DOWN, &desc->flags); | |
706 | if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP) | |
707 | set_bit(FLAG_PULL_UP, &desc->flags); | |
d7c51b47 | 708 | |
e10f72bf AJ |
709 | ret = gpiod_set_transitory(desc, false); |
710 | if (ret < 0) | |
711 | goto out_free_descs; | |
712 | ||
d7c51b47 LW |
713 | /* |
714 | * Lines have to be requested explicitly for input | |
715 | * or output, else the line will be treated "as is". | |
716 | */ | |
717 | if (lflags & GPIOHANDLE_REQUEST_OUTPUT) { | |
718 | int val = !!handlereq.default_values[i]; | |
719 | ||
720 | ret = gpiod_direction_output(desc, val); | |
721 | if (ret) | |
722 | goto out_free_descs; | |
723 | } else if (lflags & GPIOHANDLE_REQUEST_INPUT) { | |
724 | ret = gpiod_direction_input(desc); | |
725 | if (ret) | |
726 | goto out_free_descs; | |
727 | } | |
728 | dev_dbg(&gdev->dev, "registered chardev handle for line %d\n", | |
729 | offset); | |
730 | } | |
e2f608be LW |
731 | /* Let i point at the last handle */ |
732 | i--; | |
d7c51b47 LW |
733 | lh->numdescs = handlereq.lines; |
734 | ||
953b956a | 735 | fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC); |
d7c51b47 LW |
736 | if (fd < 0) { |
737 | ret = fd; | |
738 | goto out_free_descs; | |
739 | } | |
740 | ||
953b956a LPC |
741 | file = anon_inode_getfile("gpio-linehandle", |
742 | &linehandle_fileops, | |
743 | lh, | |
744 | O_RDONLY | O_CLOEXEC); | |
745 | if (IS_ERR(file)) { | |
746 | ret = PTR_ERR(file); | |
747 | goto out_put_unused_fd; | |
748 | } | |
749 | ||
d7c51b47 | 750 | handlereq.fd = fd; |
d932cd49 | 751 | if (copy_to_user(ip, &handlereq, sizeof(handlereq))) { |
953b956a LPC |
752 | /* |
753 | * fput() will trigger the release() callback, so do not go onto | |
754 | * the regular error cleanup path here. | |
755 | */ | |
756 | fput(file); | |
757 | put_unused_fd(fd); | |
758 | return -EFAULT; | |
d932cd49 | 759 | } |
d7c51b47 | 760 | |
953b956a LPC |
761 | fd_install(fd, file); |
762 | ||
d7c51b47 LW |
763 | dev_dbg(&gdev->dev, "registered chardev handle for %d lines\n", |
764 | lh->numdescs); | |
765 | ||
766 | return 0; | |
767 | ||
953b956a LPC |
768 | out_put_unused_fd: |
769 | put_unused_fd(fd); | |
d7c51b47 | 770 | out_free_descs: |
ab3dbcf7 | 771 | for (i = 0; i < count; i++) |
d7c51b47 LW |
772 | gpiod_free(lh->descs[i]); |
773 | kfree(lh->label); | |
774 | out_free_lh: | |
775 | kfree(lh); | |
776 | put_device(&gdev->dev); | |
777 | return ret; | |
778 | } | |
779 | ||
61f922db LW |
780 | /* |
781 | * GPIO line event management | |
782 | */ | |
783 | ||
784 | /** | |
785 | * struct lineevent_state - contains the state of a userspace event | |
786 | * @gdev: the GPIO device the event pertains to | |
787 | * @label: consumer label used to tag descriptors | |
788 | * @desc: the GPIO descriptor held by this event | |
789 | * @eflags: the event flags this line was requested with | |
790 | * @irq: the interrupt that trigger in response to events on this GPIO | |
791 | * @wait: wait queue that handles blocking reads of events | |
792 | * @events: KFIFO for the GPIO events | |
d58f2bf2 LW |
793 | * @timestamp: cache for the timestamp storing it between hardirq |
794 | * and IRQ thread, used to bring the timestamp close to the actual | |
795 | * event | |
61f922db LW |
796 | */ |
797 | struct lineevent_state { | |
798 | struct gpio_device *gdev; | |
799 | const char *label; | |
800 | struct gpio_desc *desc; | |
801 | u32 eflags; | |
802 | int irq; | |
803 | wait_queue_head_t wait; | |
804 | DECLARE_KFIFO(events, struct gpioevent_data, 16); | |
d58f2bf2 | 805 | u64 timestamp; |
61f922db LW |
806 | }; |
807 | ||
ac7dbb99 LPC |
808 | #define GPIOEVENT_REQUEST_VALID_FLAGS \ |
809 | (GPIOEVENT_REQUEST_RISING_EDGE | \ | |
810 | GPIOEVENT_REQUEST_FALLING_EDGE) | |
811 | ||
afc9a42b | 812 | static __poll_t lineevent_poll(struct file *filep, |
61f922db LW |
813 | struct poll_table_struct *wait) |
814 | { | |
815 | struct lineevent_state *le = filep->private_data; | |
afc9a42b | 816 | __poll_t events = 0; |
61f922db LW |
817 | |
818 | poll_wait(filep, &le->wait, wait); | |
819 | ||
dea9c80e | 820 | if (!kfifo_is_empty_spinlocked_noirqsave(&le->events, &le->wait.lock)) |
a9a08845 | 821 | events = EPOLLIN | EPOLLRDNORM; |
61f922db LW |
822 | |
823 | return events; | |
824 | } | |
825 | ||
826 | ||
827 | static ssize_t lineevent_read(struct file *filep, | |
828 | char __user *buf, | |
829 | size_t count, | |
830 | loff_t *f_ps) | |
831 | { | |
832 | struct lineevent_state *le = filep->private_data; | |
dea9c80e BG |
833 | struct gpioevent_data event; |
834 | ssize_t bytes_read = 0; | |
61f922db LW |
835 | int ret; |
836 | ||
dea9c80e | 837 | if (count < sizeof(event)) |
61f922db LW |
838 | return -EINVAL; |
839 | ||
840 | do { | |
dea9c80e | 841 | spin_lock(&le->wait.lock); |
61f922db | 842 | if (kfifo_is_empty(&le->events)) { |
dea9c80e BG |
843 | if (bytes_read) { |
844 | spin_unlock(&le->wait.lock); | |
845 | return bytes_read; | |
846 | } | |
847 | ||
848 | if (filep->f_flags & O_NONBLOCK) { | |
849 | spin_unlock(&le->wait.lock); | |
61f922db | 850 | return -EAGAIN; |
dea9c80e | 851 | } |
61f922db | 852 | |
dea9c80e | 853 | ret = wait_event_interruptible_locked(le->wait, |
61f922db | 854 | !kfifo_is_empty(&le->events)); |
dea9c80e BG |
855 | if (ret) { |
856 | spin_unlock(&le->wait.lock); | |
61f922db | 857 | return ret; |
dea9c80e | 858 | } |
61f922db LW |
859 | } |
860 | ||
dea9c80e BG |
861 | ret = kfifo_out(&le->events, &event, 1); |
862 | spin_unlock(&le->wait.lock); | |
863 | if (ret != 1) { | |
864 | /* | |
865 | * This should never happen - we were holding the lock | |
866 | * from the moment we learned the fifo is no longer | |
867 | * empty until now. | |
868 | */ | |
869 | ret = -EIO; | |
870 | break; | |
871 | } | |
61f922db | 872 | |
dea9c80e BG |
873 | if (copy_to_user(buf + bytes_read, &event, sizeof(event))) |
874 | return -EFAULT; | |
875 | bytes_read += sizeof(event); | |
876 | } while (count >= bytes_read + sizeof(event)); | |
61f922db | 877 | |
dea9c80e | 878 | return bytes_read; |
61f922db LW |
879 | } |
880 | ||
881 | static int lineevent_release(struct inode *inode, struct file *filep) | |
882 | { | |
883 | struct lineevent_state *le = filep->private_data; | |
884 | struct gpio_device *gdev = le->gdev; | |
885 | ||
886 | free_irq(le->irq, le); | |
887 | gpiod_free(le->desc); | |
888 | kfree(le->label); | |
889 | kfree(le); | |
890 | put_device(&gdev->dev); | |
891 | return 0; | |
892 | } | |
893 | ||
894 | static long lineevent_ioctl(struct file *filep, unsigned int cmd, | |
895 | unsigned long arg) | |
896 | { | |
897 | struct lineevent_state *le = filep->private_data; | |
898 | void __user *ip = (void __user *)arg; | |
899 | struct gpiohandle_data ghd; | |
900 | ||
901 | /* | |
902 | * We can get the value for an event line but not set it, | |
903 | * because it is input by definition. | |
904 | */ | |
905 | if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) { | |
906 | int val; | |
907 | ||
d82aa4a8 LPC |
908 | memset(&ghd, 0, sizeof(ghd)); |
909 | ||
61f922db LW |
910 | val = gpiod_get_value_cansleep(le->desc); |
911 | if (val < 0) | |
912 | return val; | |
913 | ghd.values[0] = val; | |
914 | ||
915 | if (copy_to_user(ip, &ghd, sizeof(ghd))) | |
916 | return -EFAULT; | |
917 | ||
918 | return 0; | |
919 | } | |
920 | return -EINVAL; | |
921 | } | |
922 | ||
923 | #ifdef CONFIG_COMPAT | |
924 | static long lineevent_ioctl_compat(struct file *filep, unsigned int cmd, | |
925 | unsigned long arg) | |
926 | { | |
927 | return lineevent_ioctl(filep, cmd, (unsigned long)compat_ptr(arg)); | |
928 | } | |
929 | #endif | |
930 | ||
931 | static const struct file_operations lineevent_fileops = { | |
932 | .release = lineevent_release, | |
933 | .read = lineevent_read, | |
934 | .poll = lineevent_poll, | |
935 | .owner = THIS_MODULE, | |
936 | .llseek = noop_llseek, | |
937 | .unlocked_ioctl = lineevent_ioctl, | |
938 | #ifdef CONFIG_COMPAT | |
939 | .compat_ioctl = lineevent_ioctl_compat, | |
940 | #endif | |
941 | }; | |
942 | ||
33265b17 | 943 | static irqreturn_t lineevent_irq_thread(int irq, void *p) |
61f922db LW |
944 | { |
945 | struct lineevent_state *le = p; | |
946 | struct gpioevent_data ge; | |
fa38869b | 947 | int ret; |
61f922db | 948 | |
24bd3efc LW |
949 | /* Do not leak kernel stack to userspace */ |
950 | memset(&ge, 0, sizeof(ge)); | |
951 | ||
1033be58 BG |
952 | /* |
953 | * We may be running from a nested threaded interrupt in which case | |
954 | * we didn't get the timestamp from lineevent_irq_handler(). | |
955 | */ | |
956 | if (!le->timestamp) | |
957 | ge.timestamp = ktime_get_real_ns(); | |
958 | else | |
959 | ge.timestamp = le->timestamp; | |
61f922db | 960 | |
ad537b82 BG |
961 | if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE |
962 | && le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) { | |
fa38869b | 963 | int level = gpiod_get_value_cansleep(le->desc); |
61f922db LW |
964 | if (level) |
965 | /* Emit low-to-high event */ | |
966 | ge.id = GPIOEVENT_EVENT_RISING_EDGE; | |
967 | else | |
968 | /* Emit high-to-low event */ | |
969 | ge.id = GPIOEVENT_EVENT_FALLING_EDGE; | |
fa38869b | 970 | } else if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE) { |
61f922db LW |
971 | /* Emit low-to-high event */ |
972 | ge.id = GPIOEVENT_EVENT_RISING_EDGE; | |
fa38869b | 973 | } else if (le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) { |
61f922db LW |
974 | /* Emit high-to-low event */ |
975 | ge.id = GPIOEVENT_EVENT_FALLING_EDGE; | |
bc0207a5 AB |
976 | } else { |
977 | return IRQ_NONE; | |
61f922db LW |
978 | } |
979 | ||
dea9c80e BG |
980 | ret = kfifo_in_spinlocked_noirqsave(&le->events, &ge, |
981 | 1, &le->wait.lock); | |
2efc6bfa | 982 | if (ret) |
a9a08845 | 983 | wake_up_poll(&le->wait, EPOLLIN); |
248ae175 BG |
984 | else |
985 | pr_debug_ratelimited("event FIFO is full - event dropped\n"); | |
61f922db LW |
986 | |
987 | return IRQ_HANDLED; | |
988 | } | |
989 | ||
d58f2bf2 LW |
990 | static irqreturn_t lineevent_irq_handler(int irq, void *p) |
991 | { | |
992 | struct lineevent_state *le = p; | |
993 | ||
994 | /* | |
995 | * Just store the timestamp in hardirq context so we get it as | |
996 | * close in time as possible to the actual event. | |
997 | */ | |
998 | le->timestamp = ktime_get_real_ns(); | |
999 | ||
1000 | return IRQ_WAKE_THREAD; | |
1001 | } | |
1002 | ||
61f922db LW |
1003 | static int lineevent_create(struct gpio_device *gdev, void __user *ip) |
1004 | { | |
1005 | struct gpioevent_request eventreq; | |
1006 | struct lineevent_state *le; | |
1007 | struct gpio_desc *desc; | |
953b956a | 1008 | struct file *file; |
61f922db LW |
1009 | u32 offset; |
1010 | u32 lflags; | |
1011 | u32 eflags; | |
1012 | int fd; | |
1013 | int ret; | |
1014 | int irqflags = 0; | |
1015 | ||
1016 | if (copy_from_user(&eventreq, ip, sizeof(eventreq))) | |
1017 | return -EFAULT; | |
1018 | ||
bcc6d99a BG |
1019 | offset = eventreq.lineoffset; |
1020 | lflags = eventreq.handleflags; | |
1021 | eflags = eventreq.eventflags; | |
1022 | ||
45e23604 BG |
1023 | desc = gpiochip_get_desc(gdev->chip, offset); |
1024 | if (IS_ERR(desc)) | |
1025 | return PTR_ERR(desc); | |
bcc6d99a BG |
1026 | |
1027 | /* Return an error if a unknown flag is set */ | |
1028 | if ((lflags & ~GPIOHANDLE_REQUEST_VALID_FLAGS) || | |
1029 | (eflags & ~GPIOEVENT_REQUEST_VALID_FLAGS)) | |
1030 | return -EINVAL; | |
1031 | ||
1032 | /* This is just wrong: we don't look for events on output lines */ | |
1033 | if ((lflags & GPIOHANDLE_REQUEST_OUTPUT) || | |
1034 | (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN) || | |
1035 | (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE)) | |
1036 | return -EINVAL; | |
1037 | ||
2148ad77 KG |
1038 | /* Only one bias flag can be set. */ |
1039 | if (((lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE) && | |
1040 | (lflags & (GPIOHANDLE_REQUEST_BIAS_PULL_DOWN | | |
1041 | GPIOHANDLE_REQUEST_BIAS_PULL_UP))) || | |
1042 | ((lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) && | |
1043 | (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP))) | |
1044 | return -EINVAL; | |
1045 | ||
61f922db LW |
1046 | le = kzalloc(sizeof(*le), GFP_KERNEL); |
1047 | if (!le) | |
1048 | return -ENOMEM; | |
1049 | le->gdev = gdev; | |
1050 | get_device(&gdev->dev); | |
1051 | ||
1052 | /* Make sure this is terminated */ | |
1053 | eventreq.consumer_label[sizeof(eventreq.consumer_label)-1] = '\0'; | |
1054 | if (strlen(eventreq.consumer_label)) { | |
1055 | le->label = kstrdup(eventreq.consumer_label, | |
1056 | GFP_KERNEL); | |
1057 | if (!le->label) { | |
1058 | ret = -ENOMEM; | |
1059 | goto out_free_le; | |
1060 | } | |
1061 | } | |
1062 | ||
61f922db LW |
1063 | ret = gpiod_request(desc, le->label); |
1064 | if (ret) | |
f001cc35 | 1065 | goto out_free_label; |
61f922db LW |
1066 | le->desc = desc; |
1067 | le->eflags = eflags; | |
1068 | ||
1069 | if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW) | |
1070 | set_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
2148ad77 KG |
1071 | if (lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE) |
1072 | set_bit(FLAG_BIAS_DISABLE, &desc->flags); | |
7b479a84 KG |
1073 | if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) |
1074 | set_bit(FLAG_PULL_DOWN, &desc->flags); | |
1075 | if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP) | |
1076 | set_bit(FLAG_PULL_UP, &desc->flags); | |
61f922db LW |
1077 | |
1078 | ret = gpiod_direction_input(desc); | |
1079 | if (ret) | |
1080 | goto out_free_desc; | |
1081 | ||
1082 | le->irq = gpiod_to_irq(desc); | |
1083 | if (le->irq <= 0) { | |
1084 | ret = -ENODEV; | |
1085 | goto out_free_desc; | |
1086 | } | |
1087 | ||
1088 | if (eflags & GPIOEVENT_REQUEST_RISING_EDGE) | |
223ecaf1 MW |
1089 | irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ? |
1090 | IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING; | |
61f922db | 1091 | if (eflags & GPIOEVENT_REQUEST_FALLING_EDGE) |
223ecaf1 MW |
1092 | irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ? |
1093 | IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING; | |
61f922db | 1094 | irqflags |= IRQF_ONESHOT; |
61f922db LW |
1095 | |
1096 | INIT_KFIFO(le->events); | |
1097 | init_waitqueue_head(&le->wait); | |
61f922db LW |
1098 | |
1099 | /* Request a thread to read the events */ | |
1100 | ret = request_threaded_irq(le->irq, | |
d58f2bf2 | 1101 | lineevent_irq_handler, |
61f922db LW |
1102 | lineevent_irq_thread, |
1103 | irqflags, | |
1104 | le->label, | |
1105 | le); | |
1106 | if (ret) | |
1107 | goto out_free_desc; | |
1108 | ||
953b956a | 1109 | fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC); |
61f922db LW |
1110 | if (fd < 0) { |
1111 | ret = fd; | |
1112 | goto out_free_irq; | |
1113 | } | |
1114 | ||
953b956a LPC |
1115 | file = anon_inode_getfile("gpio-event", |
1116 | &lineevent_fileops, | |
1117 | le, | |
1118 | O_RDONLY | O_CLOEXEC); | |
1119 | if (IS_ERR(file)) { | |
1120 | ret = PTR_ERR(file); | |
1121 | goto out_put_unused_fd; | |
1122 | } | |
1123 | ||
61f922db | 1124 | eventreq.fd = fd; |
d932cd49 | 1125 | if (copy_to_user(ip, &eventreq, sizeof(eventreq))) { |
953b956a LPC |
1126 | /* |
1127 | * fput() will trigger the release() callback, so do not go onto | |
1128 | * the regular error cleanup path here. | |
1129 | */ | |
1130 | fput(file); | |
1131 | put_unused_fd(fd); | |
1132 | return -EFAULT; | |
d932cd49 | 1133 | } |
61f922db | 1134 | |
953b956a LPC |
1135 | fd_install(fd, file); |
1136 | ||
61f922db LW |
1137 | return 0; |
1138 | ||
953b956a LPC |
1139 | out_put_unused_fd: |
1140 | put_unused_fd(fd); | |
61f922db LW |
1141 | out_free_irq: |
1142 | free_irq(le->irq, le); | |
1143 | out_free_desc: | |
1144 | gpiod_free(le->desc); | |
1145 | out_free_label: | |
1146 | kfree(le->label); | |
1147 | out_free_le: | |
1148 | kfree(le); | |
1149 | put_device(&gdev->dev); | |
1150 | return ret; | |
1151 | } | |
1152 | ||
d2ac2579 BG |
1153 | static void gpio_desc_to_lineinfo(struct gpio_desc *desc, |
1154 | struct gpioline_info *info) | |
1155 | { | |
1156 | struct gpio_chip *chip = desc->gdev->chip; | |
1157 | unsigned long flags; | |
1158 | ||
1159 | spin_lock_irqsave(&gpio_lock, flags); | |
1160 | ||
1161 | if (desc->name) { | |
1162 | strncpy(info->name, desc->name, sizeof(info->name)); | |
1163 | info->name[sizeof(info->name) - 1] = '\0'; | |
1164 | } else { | |
1165 | info->name[0] = '\0'; | |
1166 | } | |
1167 | ||
1168 | if (desc->label) { | |
1169 | strncpy(info->consumer, desc->label, sizeof(info->consumer)); | |
1170 | info->consumer[sizeof(info->consumer) - 1] = '\0'; | |
1171 | } else { | |
1172 | info->consumer[0] = '\0'; | |
1173 | } | |
1174 | ||
1175 | /* | |
1176 | * Userspace only need to know that the kernel is using this GPIO so | |
1177 | * it can't use it. | |
1178 | */ | |
1179 | info->flags = 0; | |
1180 | if (test_bit(FLAG_REQUESTED, &desc->flags) || | |
1181 | test_bit(FLAG_IS_HOGGED, &desc->flags) || | |
1182 | test_bit(FLAG_USED_AS_IRQ, &desc->flags) || | |
1183 | test_bit(FLAG_EXPORT, &desc->flags) || | |
1184 | test_bit(FLAG_SYSFS, &desc->flags) || | |
1185 | !pinctrl_gpio_can_use_line(chip->base + info->line_offset)) | |
1186 | info->flags |= GPIOLINE_FLAG_KERNEL; | |
1187 | if (test_bit(FLAG_IS_OUT, &desc->flags)) | |
1188 | info->flags |= GPIOLINE_FLAG_IS_OUT; | |
1189 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
1190 | info->flags |= GPIOLINE_FLAG_ACTIVE_LOW; | |
1191 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) | |
1192 | info->flags |= (GPIOLINE_FLAG_OPEN_DRAIN | | |
1193 | GPIOLINE_FLAG_IS_OUT); | |
1194 | if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) | |
1195 | info->flags |= (GPIOLINE_FLAG_OPEN_SOURCE | | |
1196 | GPIOLINE_FLAG_IS_OUT); | |
1197 | if (test_bit(FLAG_BIAS_DISABLE, &desc->flags)) | |
1198 | info->flags |= GPIOLINE_FLAG_BIAS_DISABLE; | |
1199 | if (test_bit(FLAG_PULL_DOWN, &desc->flags)) | |
1200 | info->flags |= GPIOLINE_FLAG_BIAS_PULL_DOWN; | |
1201 | if (test_bit(FLAG_PULL_UP, &desc->flags)) | |
1202 | info->flags |= GPIOLINE_FLAG_BIAS_PULL_UP; | |
1203 | ||
1204 | spin_unlock_irqrestore(&gpio_lock, flags); | |
1205 | } | |
1206 | ||
51c1064e BG |
1207 | struct gpio_chardev_data { |
1208 | struct gpio_device *gdev; | |
1209 | wait_queue_head_t wait; | |
1210 | DECLARE_KFIFO(events, struct gpioline_info_changed, 32); | |
1211 | struct notifier_block lineinfo_changed_nb; | |
1212 | unsigned long *watched_lines; | |
1213 | }; | |
1214 | ||
950d55f5 | 1215 | /* |
3c702e99 LW |
1216 | * gpio_ioctl() - ioctl handler for the GPIO chardev |
1217 | */ | |
1218 | static long gpio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) | |
1219 | { | |
51c1064e BG |
1220 | struct gpio_chardev_data *priv = filp->private_data; |
1221 | struct gpio_device *gdev = priv->gdev; | |
3c702e99 | 1222 | struct gpio_chip *chip = gdev->chip; |
8b92e17e | 1223 | void __user *ip = (void __user *)arg; |
51c1064e BG |
1224 | struct gpio_desc *desc; |
1225 | __u32 offset; | |
3c702e99 LW |
1226 | |
1227 | /* We fail any subsequent ioctl():s when the chip is gone */ | |
1228 | if (!chip) | |
1229 | return -ENODEV; | |
1230 | ||
521a2ad6 | 1231 | /* Fill in the struct and pass to userspace */ |
3c702e99 | 1232 | if (cmd == GPIO_GET_CHIPINFO_IOCTL) { |
521a2ad6 LW |
1233 | struct gpiochip_info chipinfo; |
1234 | ||
0f4bbb23 LPC |
1235 | memset(&chipinfo, 0, sizeof(chipinfo)); |
1236 | ||
3c702e99 LW |
1237 | strncpy(chipinfo.name, dev_name(&gdev->dev), |
1238 | sizeof(chipinfo.name)); | |
1239 | chipinfo.name[sizeof(chipinfo.name)-1] = '\0'; | |
df4878e9 LW |
1240 | strncpy(chipinfo.label, gdev->label, |
1241 | sizeof(chipinfo.label)); | |
1242 | chipinfo.label[sizeof(chipinfo.label)-1] = '\0'; | |
fdeb8e15 | 1243 | chipinfo.lines = gdev->ngpio; |
3c702e99 LW |
1244 | if (copy_to_user(ip, &chipinfo, sizeof(chipinfo))) |
1245 | return -EFAULT; | |
1246 | return 0; | |
51c1064e BG |
1247 | } else if (cmd == GPIO_GET_LINEINFO_IOCTL || |
1248 | cmd == GPIO_GET_LINEINFO_WATCH_IOCTL) { | |
521a2ad6 | 1249 | struct gpioline_info lineinfo; |
521a2ad6 LW |
1250 | |
1251 | if (copy_from_user(&lineinfo, ip, sizeof(lineinfo))) | |
1252 | return -EFAULT; | |
521a2ad6 | 1253 | |
2a2cabd8 BG |
1254 | desc = gpiochip_get_desc(chip, lineinfo.line_offset); |
1255 | if (IS_ERR(desc)) | |
1256 | return PTR_ERR(desc); | |
1257 | ||
d2ac2579 | 1258 | gpio_desc_to_lineinfo(desc, &lineinfo); |
521a2ad6 LW |
1259 | |
1260 | if (copy_to_user(ip, &lineinfo, sizeof(lineinfo))) | |
1261 | return -EFAULT; | |
51c1064e BG |
1262 | |
1263 | if (cmd == GPIO_GET_LINEINFO_WATCH_IOCTL) | |
1264 | set_bit(desc_to_gpio(desc), priv->watched_lines); | |
1265 | ||
521a2ad6 | 1266 | return 0; |
d7c51b47 LW |
1267 | } else if (cmd == GPIO_GET_LINEHANDLE_IOCTL) { |
1268 | return linehandle_create(gdev, ip); | |
61f922db LW |
1269 | } else if (cmd == GPIO_GET_LINEEVENT_IOCTL) { |
1270 | return lineevent_create(gdev, ip); | |
51c1064e BG |
1271 | } else if (cmd == GPIO_GET_LINEINFO_UNWATCH_IOCTL) { |
1272 | if (copy_from_user(&offset, ip, sizeof(offset))) | |
1273 | return -EFAULT; | |
1274 | ||
1275 | desc = gpiochip_get_desc(chip, offset); | |
1276 | if (IS_ERR(desc)) | |
1277 | return PTR_ERR(desc); | |
1278 | ||
1279 | clear_bit(desc_to_gpio(desc), &desc->flags); | |
1280 | return 0; | |
3c702e99 LW |
1281 | } |
1282 | return -EINVAL; | |
1283 | } | |
1284 | ||
8b92e17e LW |
1285 | #ifdef CONFIG_COMPAT |
1286 | static long gpio_ioctl_compat(struct file *filp, unsigned int cmd, | |
1287 | unsigned long arg) | |
1288 | { | |
1289 | return gpio_ioctl(filp, cmd, (unsigned long)compat_ptr(arg)); | |
1290 | } | |
1291 | #endif | |
1292 | ||
51c1064e BG |
1293 | static struct gpio_chardev_data * |
1294 | to_gpio_chardev_data(struct notifier_block *nb) | |
1295 | { | |
1296 | return container_of(nb, struct gpio_chardev_data, lineinfo_changed_nb); | |
1297 | } | |
1298 | ||
1299 | static int lineinfo_changed_notify(struct notifier_block *nb, | |
1300 | unsigned long action, void *data) | |
1301 | { | |
1302 | struct gpio_chardev_data *priv = to_gpio_chardev_data(nb); | |
1303 | struct gpioline_info_changed chg; | |
1304 | struct gpio_desc *desc = data; | |
1305 | int ret; | |
1306 | ||
1307 | if (!test_bit(desc_to_gpio(desc), priv->watched_lines)) | |
1308 | return NOTIFY_DONE; | |
1309 | ||
1310 | memset(&chg, 0, sizeof(chg)); | |
1311 | chg.info.line_offset = gpio_chip_hwgpio(desc); | |
1312 | chg.event_type = action; | |
1313 | chg.timestamp = ktime_get_ns(); | |
1314 | gpio_desc_to_lineinfo(desc, &chg.info); | |
1315 | ||
1316 | ret = kfifo_in_spinlocked(&priv->events, &chg, 1, &priv->wait.lock); | |
1317 | if (ret) | |
1318 | wake_up_poll(&priv->wait, EPOLLIN); | |
1319 | else | |
1320 | pr_debug_ratelimited("lineinfo event FIFO is full - event dropped\n"); | |
1321 | ||
1322 | return NOTIFY_OK; | |
1323 | } | |
1324 | ||
1325 | static __poll_t lineinfo_watch_poll(struct file *filep, | |
1326 | struct poll_table_struct *pollt) | |
1327 | { | |
1328 | struct gpio_chardev_data *priv = filep->private_data; | |
1329 | __poll_t events = 0; | |
1330 | ||
1331 | poll_wait(filep, &priv->wait, pollt); | |
1332 | ||
1333 | if (!kfifo_is_empty_spinlocked_noirqsave(&priv->events, | |
1334 | &priv->wait.lock)) | |
1335 | events = EPOLLIN | EPOLLRDNORM; | |
1336 | ||
1337 | return events; | |
1338 | } | |
1339 | ||
1340 | static ssize_t lineinfo_watch_read(struct file *filep, char __user *buf, | |
1341 | size_t count, loff_t *off) | |
1342 | { | |
1343 | struct gpio_chardev_data *priv = filep->private_data; | |
1344 | struct gpioline_info_changed event; | |
1345 | ssize_t bytes_read = 0; | |
1346 | int ret; | |
1347 | ||
1348 | if (count < sizeof(event)) | |
1349 | return -EINVAL; | |
1350 | ||
1351 | do { | |
1352 | spin_lock(&priv->wait.lock); | |
1353 | if (kfifo_is_empty(&priv->events)) { | |
1354 | if (bytes_read) { | |
1355 | spin_unlock(&priv->wait.lock); | |
1356 | return bytes_read; | |
1357 | } | |
1358 | ||
1359 | if (filep->f_flags & O_NONBLOCK) { | |
1360 | spin_unlock(&priv->wait.lock); | |
1361 | return -EAGAIN; | |
1362 | } | |
1363 | ||
1364 | ret = wait_event_interruptible_locked(priv->wait, | |
1365 | !kfifo_is_empty(&priv->events)); | |
1366 | if (ret) { | |
1367 | spin_unlock(&priv->wait.lock); | |
1368 | return ret; | |
1369 | } | |
1370 | } | |
1371 | ||
1372 | ret = kfifo_out(&priv->events, &event, 1); | |
1373 | spin_unlock(&priv->wait.lock); | |
1374 | if (ret != 1) { | |
1375 | ret = -EIO; | |
1376 | break; | |
1377 | /* We should never get here. See lineevent_read(). */ | |
1378 | } | |
1379 | ||
1380 | if (copy_to_user(buf + bytes_read, &event, sizeof(event))) | |
1381 | return -EFAULT; | |
1382 | bytes_read += sizeof(event); | |
1383 | } while (count >= bytes_read + sizeof(event)); | |
1384 | ||
1385 | return bytes_read; | |
1386 | } | |
1387 | ||
3c702e99 LW |
1388 | /** |
1389 | * gpio_chrdev_open() - open the chardev for ioctl operations | |
1390 | * @inode: inode for this chardev | |
1391 | * @filp: file struct for storing private data | |
1392 | * Returns 0 on success | |
1393 | */ | |
1394 | static int gpio_chrdev_open(struct inode *inode, struct file *filp) | |
1395 | { | |
1396 | struct gpio_device *gdev = container_of(inode->i_cdev, | |
1397 | struct gpio_device, chrdev); | |
51c1064e BG |
1398 | struct gpio_chardev_data *priv; |
1399 | int ret = -ENOMEM; | |
3c702e99 LW |
1400 | |
1401 | /* Fail on open if the backing gpiochip is gone */ | |
fb505747 | 1402 | if (!gdev->chip) |
3c702e99 | 1403 | return -ENODEV; |
51c1064e BG |
1404 | |
1405 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); | |
1406 | if (!priv) | |
1407 | return -ENOMEM; | |
1408 | ||
1409 | priv->watched_lines = bitmap_zalloc(gdev->chip->ngpio, GFP_KERNEL); | |
1410 | if (!priv->watched_lines) | |
1411 | goto out_free_priv; | |
1412 | ||
1413 | init_waitqueue_head(&priv->wait); | |
1414 | INIT_KFIFO(priv->events); | |
1415 | priv->gdev = gdev; | |
1416 | ||
1417 | priv->lineinfo_changed_nb.notifier_call = lineinfo_changed_notify; | |
1418 | ret = atomic_notifier_chain_register(&gdev->notifier, | |
1419 | &priv->lineinfo_changed_nb); | |
1420 | if (ret) | |
1421 | goto out_free_bitmap; | |
1422 | ||
3c702e99 | 1423 | get_device(&gdev->dev); |
51c1064e | 1424 | filp->private_data = priv; |
f4e81c52 | 1425 | |
51c1064e BG |
1426 | ret = nonseekable_open(inode, filp); |
1427 | if (ret) | |
1428 | goto out_unregister_notifier; | |
1429 | ||
1430 | return ret; | |
1431 | ||
1432 | out_unregister_notifier: | |
1433 | atomic_notifier_chain_unregister(&gdev->notifier, | |
1434 | &priv->lineinfo_changed_nb); | |
1435 | out_free_bitmap: | |
1436 | bitmap_free(priv->watched_lines); | |
1437 | out_free_priv: | |
1438 | kfree(priv); | |
1439 | return ret; | |
3c702e99 LW |
1440 | } |
1441 | ||
1442 | /** | |
1443 | * gpio_chrdev_release() - close chardev after ioctl operations | |
1444 | * @inode: inode for this chardev | |
1445 | * @filp: file struct for storing private data | |
1446 | * Returns 0 on success | |
1447 | */ | |
1448 | static int gpio_chrdev_release(struct inode *inode, struct file *filp) | |
1449 | { | |
51c1064e BG |
1450 | struct gpio_chardev_data *priv = filp->private_data; |
1451 | struct gpio_device *gdev = priv->gdev; | |
3c702e99 | 1452 | |
51c1064e BG |
1453 | bitmap_free(priv->watched_lines); |
1454 | atomic_notifier_chain_unregister(&gdev->notifier, | |
1455 | &priv->lineinfo_changed_nb); | |
3c702e99 | 1456 | put_device(&gdev->dev); |
51c1064e BG |
1457 | kfree(priv); |
1458 | ||
3c702e99 LW |
1459 | return 0; |
1460 | } | |
1461 | ||
3c702e99 LW |
1462 | static const struct file_operations gpio_fileops = { |
1463 | .release = gpio_chrdev_release, | |
1464 | .open = gpio_chrdev_open, | |
51c1064e BG |
1465 | .poll = lineinfo_watch_poll, |
1466 | .read = lineinfo_watch_read, | |
3c702e99 | 1467 | .owner = THIS_MODULE, |
f4e81c52 | 1468 | .llseek = no_llseek, |
3c702e99 | 1469 | .unlocked_ioctl = gpio_ioctl, |
8b92e17e LW |
1470 | #ifdef CONFIG_COMPAT |
1471 | .compat_ioctl = gpio_ioctl_compat, | |
1472 | #endif | |
3c702e99 LW |
1473 | }; |
1474 | ||
ff2b1359 LW |
1475 | static void gpiodevice_release(struct device *dev) |
1476 | { | |
1477 | struct gpio_device *gdev = dev_get_drvdata(dev); | |
1478 | ||
1479 | list_del(&gdev->list); | |
1480 | ida_simple_remove(&gpio_ida, gdev->id); | |
fcf273e5 | 1481 | kfree_const(gdev->label); |
476e2fc5 | 1482 | kfree(gdev->descs); |
9efd9e69 | 1483 | kfree(gdev); |
ff2b1359 LW |
1484 | } |
1485 | ||
159f3cd9 GR |
1486 | static int gpiochip_setup_dev(struct gpio_device *gdev) |
1487 | { | |
d377f56f | 1488 | int ret; |
159f3cd9 GR |
1489 | |
1490 | cdev_init(&gdev->chrdev, &gpio_fileops); | |
1491 | gdev->chrdev.owner = THIS_MODULE; | |
159f3cd9 | 1492 | gdev->dev.devt = MKDEV(MAJOR(gpio_devt), gdev->id); |
111379dc | 1493 | |
d377f56f LW |
1494 | ret = cdev_device_add(&gdev->chrdev, &gdev->dev); |
1495 | if (ret) | |
1496 | return ret; | |
111379dc LG |
1497 | |
1498 | chip_dbg(gdev->chip, "added GPIO chardev (%d:%d)\n", | |
1499 | MAJOR(gpio_devt), gdev->id); | |
159f3cd9 | 1500 | |
d377f56f LW |
1501 | ret = gpiochip_sysfs_register(gdev); |
1502 | if (ret) | |
159f3cd9 GR |
1503 | goto err_remove_device; |
1504 | ||
1505 | /* From this point, the .release() function cleans up gpio_device */ | |
1506 | gdev->dev.release = gpiodevice_release; | |
159f3cd9 GR |
1507 | pr_debug("%s: registered GPIOs %d to %d on device: %s (%s)\n", |
1508 | __func__, gdev->base, gdev->base + gdev->ngpio - 1, | |
1509 | dev_name(&gdev->dev), gdev->chip->label ? : "generic"); | |
1510 | ||
1511 | return 0; | |
1512 | ||
1513 | err_remove_device: | |
111379dc | 1514 | cdev_device_del(&gdev->chrdev, &gdev->dev); |
d377f56f | 1515 | return ret; |
159f3cd9 GR |
1516 | } |
1517 | ||
a411e81e BG |
1518 | static void gpiochip_machine_hog(struct gpio_chip *chip, struct gpiod_hog *hog) |
1519 | { | |
1520 | struct gpio_desc *desc; | |
1521 | int rv; | |
1522 | ||
1523 | desc = gpiochip_get_desc(chip, hog->chip_hwnum); | |
1524 | if (IS_ERR(desc)) { | |
1525 | pr_err("%s: unable to get GPIO desc: %ld\n", | |
1526 | __func__, PTR_ERR(desc)); | |
1527 | return; | |
1528 | } | |
1529 | ||
ba3efdff | 1530 | if (test_bit(FLAG_IS_HOGGED, &desc->flags)) |
a411e81e BG |
1531 | return; |
1532 | ||
1533 | rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags); | |
1534 | if (rv) | |
1535 | pr_err("%s: unable to hog GPIO line (%s:%u): %d\n", | |
1536 | __func__, chip->label, hog->chip_hwnum, rv); | |
1537 | } | |
1538 | ||
1539 | static void machine_gpiochip_add(struct gpio_chip *chip) | |
1540 | { | |
1541 | struct gpiod_hog *hog; | |
1542 | ||
1543 | mutex_lock(&gpio_machine_hogs_mutex); | |
1544 | ||
1545 | list_for_each_entry(hog, &gpio_machine_hogs, list) { | |
1546 | if (!strcmp(chip->label, hog->chip_label)) | |
1547 | gpiochip_machine_hog(chip, hog); | |
1548 | } | |
1549 | ||
1550 | mutex_unlock(&gpio_machine_hogs_mutex); | |
1551 | } | |
1552 | ||
159f3cd9 GR |
1553 | static void gpiochip_setup_devs(void) |
1554 | { | |
1555 | struct gpio_device *gdev; | |
d377f56f | 1556 | int ret; |
159f3cd9 GR |
1557 | |
1558 | list_for_each_entry(gdev, &gpio_devices, list) { | |
d377f56f LW |
1559 | ret = gpiochip_setup_dev(gdev); |
1560 | if (ret) | |
159f3cd9 | 1561 | pr_err("%s: Failed to initialize gpio device (%d)\n", |
d377f56f | 1562 | dev_name(&gdev->dev), ret); |
159f3cd9 GR |
1563 | } |
1564 | } | |
1565 | ||
959bc7b2 | 1566 | int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data, |
39c3fd58 AL |
1567 | struct lock_class_key *lock_key, |
1568 | struct lock_class_key *request_key) | |
d2876d08 DB |
1569 | { |
1570 | unsigned long flags; | |
d377f56f | 1571 | int ret = 0; |
ff2b1359 | 1572 | unsigned i; |
8d0aab2f | 1573 | int base = chip->base; |
ff2b1359 | 1574 | struct gpio_device *gdev; |
d2876d08 | 1575 | |
ff2b1359 LW |
1576 | /* |
1577 | * First: allocate and populate the internal stat container, and | |
1578 | * set up the struct device. | |
1579 | */ | |
969f07b4 | 1580 | gdev = kzalloc(sizeof(*gdev), GFP_KERNEL); |
ff2b1359 | 1581 | if (!gdev) |
14e85c0e | 1582 | return -ENOMEM; |
3c702e99 | 1583 | gdev->dev.bus = &gpio_bus_type; |
ff2b1359 LW |
1584 | gdev->chip = chip; |
1585 | chip->gpiodev = gdev; | |
1586 | if (chip->parent) { | |
1587 | gdev->dev.parent = chip->parent; | |
1588 | gdev->dev.of_node = chip->parent->of_node; | |
acc6e331 TR |
1589 | } |
1590 | ||
ff2b1359 LW |
1591 | #ifdef CONFIG_OF_GPIO |
1592 | /* If the gpiochip has an assigned OF node this takes precedence */ | |
acc6e331 TR |
1593 | if (chip->of_node) |
1594 | gdev->dev.of_node = chip->of_node; | |
6ff04974 BD |
1595 | else |
1596 | chip->of_node = gdev->dev.of_node; | |
ff2b1359 | 1597 | #endif |
acc6e331 | 1598 | |
ff2b1359 LW |
1599 | gdev->id = ida_simple_get(&gpio_ida, 0, 0, GFP_KERNEL); |
1600 | if (gdev->id < 0) { | |
d377f56f | 1601 | ret = gdev->id; |
ff2b1359 LW |
1602 | goto err_free_gdev; |
1603 | } | |
ddd8891e | 1604 | dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id); |
ff2b1359 LW |
1605 | device_initialize(&gdev->dev); |
1606 | dev_set_drvdata(&gdev->dev, gdev); | |
1607 | if (chip->parent && chip->parent->driver) | |
1608 | gdev->owner = chip->parent->driver->owner; | |
1609 | else if (chip->owner) | |
1610 | /* TODO: remove chip->owner */ | |
1611 | gdev->owner = chip->owner; | |
1612 | else | |
1613 | gdev->owner = THIS_MODULE; | |
d2876d08 | 1614 | |
476e2fc5 | 1615 | gdev->descs = kcalloc(chip->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL); |
1c3cdb18 | 1616 | if (!gdev->descs) { |
d377f56f | 1617 | ret = -ENOMEM; |
a05a1404 | 1618 | goto err_free_ida; |
ff2b1359 LW |
1619 | } |
1620 | ||
5ed41cc4 BJZ |
1621 | if (chip->ngpio == 0) { |
1622 | chip_err(chip, "tried to insert a GPIO chip with zero lines\n"); | |
d377f56f | 1623 | ret = -EINVAL; |
159f3cd9 | 1624 | goto err_free_descs; |
5ed41cc4 | 1625 | } |
df4878e9 | 1626 | |
3027743f LA |
1627 | if (chip->ngpio > FASTPATH_NGPIO) |
1628 | chip_warn(chip, "line cnt %u is greater than fast path cnt %u\n", | |
2ddac5ae | 1629 | chip->ngpio, FASTPATH_NGPIO); |
3027743f | 1630 | |
fcf273e5 | 1631 | gdev->label = kstrdup_const(chip->label ?: "unknown", GFP_KERNEL); |
df4878e9 | 1632 | if (!gdev->label) { |
d377f56f | 1633 | ret = -ENOMEM; |
476e2fc5 | 1634 | goto err_free_descs; |
df4878e9 LW |
1635 | } |
1636 | ||
fdeb8e15 | 1637 | gdev->ngpio = chip->ngpio; |
43c54eca | 1638 | gdev->data = data; |
5ed41cc4 | 1639 | |
d2876d08 DB |
1640 | spin_lock_irqsave(&gpio_lock, flags); |
1641 | ||
fdeb8e15 LW |
1642 | /* |
1643 | * TODO: this allocates a Linux GPIO number base in the global | |
1644 | * GPIO numberspace for this chip. In the long run we want to | |
1645 | * get *rid* of this numberspace and use only descriptors, but | |
1646 | * it may be a pipe dream. It will not happen before we get rid | |
1647 | * of the sysfs interface anyways. | |
1648 | */ | |
8d0aab2f AV |
1649 | if (base < 0) { |
1650 | base = gpiochip_find_base(chip->ngpio); | |
1651 | if (base < 0) { | |
d377f56f | 1652 | ret = base; |
225fce83 | 1653 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 1654 | goto err_free_label; |
8d0aab2f | 1655 | } |
fdeb8e15 LW |
1656 | /* |
1657 | * TODO: it should not be necessary to reflect the assigned | |
1658 | * base outside of the GPIO subsystem. Go over drivers and | |
1659 | * see if anyone makes use of this, else drop this and assign | |
1660 | * a poison instead. | |
1661 | */ | |
8d0aab2f AV |
1662 | chip->base = base; |
1663 | } | |
fdeb8e15 | 1664 | gdev->base = base; |
8d0aab2f | 1665 | |
d377f56f LW |
1666 | ret = gpiodev_add_to_list(gdev); |
1667 | if (ret) { | |
05aa5203 | 1668 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 1669 | goto err_free_label; |
05aa5203 | 1670 | } |
1a989d0f | 1671 | |
767cd17a RRD |
1672 | for (i = 0; i < chip->ngpio; i++) |
1673 | gdev->descs[i].gdev = gdev; | |
14e85c0e | 1674 | |
207270dd DC |
1675 | spin_unlock_irqrestore(&gpio_lock, flags); |
1676 | ||
51c1064e BG |
1677 | ATOMIC_INIT_NOTIFIER_HEAD(&gdev->notifier); |
1678 | ||
f23f1516 | 1679 | #ifdef CONFIG_PINCTRL |
20ec3e39 | 1680 | INIT_LIST_HEAD(&gdev->pin_ranges); |
f23f1516 SH |
1681 | #endif |
1682 | ||
d377f56f LW |
1683 | ret = gpiochip_set_desc_names(chip); |
1684 | if (ret) | |
5f3ca732 MP |
1685 | goto err_remove_from_list; |
1686 | ||
d377f56f LW |
1687 | ret = gpiochip_alloc_valid_mask(chip); |
1688 | if (ret) | |
48057ed1 | 1689 | goto err_remove_from_list; |
e0d89728 | 1690 | |
d377f56f LW |
1691 | ret = of_gpiochip_add(chip); |
1692 | if (ret) | |
48057ed1 | 1693 | goto err_free_gpiochip_mask; |
28355f81 | 1694 | |
d377f56f LW |
1695 | ret = gpiochip_init_valid_mask(chip); |
1696 | if (ret) | |
35779890 | 1697 | goto err_remove_of_chip; |
f8ec92a9 | 1698 | |
3edfb7bd RRD |
1699 | for (i = 0; i < chip->ngpio; i++) { |
1700 | struct gpio_desc *desc = &gdev->descs[i]; | |
1701 | ||
d95da993 | 1702 | if (chip->get_direction && gpiochip_line_is_valid(chip, i)) { |
4fc5bfeb AS |
1703 | assign_bit(FLAG_IS_OUT, |
1704 | &desc->flags, !chip->get_direction(chip, i)); | |
d95da993 | 1705 | } else { |
4fc5bfeb AS |
1706 | assign_bit(FLAG_IS_OUT, |
1707 | &desc->flags, !chip->direction_input); | |
d95da993 | 1708 | } |
3edfb7bd RRD |
1709 | } |
1710 | ||
b056ca1c AS |
1711 | ret = gpiochip_add_pin_ranges(chip); |
1712 | if (ret) | |
1713 | goto err_remove_of_chip; | |
1714 | ||
664e3e5a | 1715 | acpi_gpiochip_add(chip); |
391c970c | 1716 | |
a411e81e BG |
1717 | machine_gpiochip_add(chip); |
1718 | ||
504369cd | 1719 | ret = gpiochip_irqchip_init_valid_mask(chip); |
9411e3aa AS |
1720 | if (ret) |
1721 | goto err_remove_acpi_chip; | |
1722 | ||
504369cd | 1723 | ret = gpiochip_irqchip_init_hw(chip); |
fbdf8d4b | 1724 | if (ret) |
48057ed1 LW |
1725 | goto err_remove_acpi_chip; |
1726 | ||
fbdf8d4b LW |
1727 | ret = gpiochip_add_irqchip(chip, lock_key, request_key); |
1728 | if (ret) | |
48057ed1 LW |
1729 | goto err_remove_irqchip_mask; |
1730 | ||
3c702e99 LW |
1731 | /* |
1732 | * By first adding the chardev, and then adding the device, | |
1733 | * we get a device node entry in sysfs under | |
1734 | * /sys/bus/gpio/devices/gpiochipN/dev that can be used for | |
1735 | * coldplug of device nodes and other udev business. | |
159f3cd9 GR |
1736 | * We can do this only if gpiolib has been initialized. |
1737 | * Otherwise, defer until later. | |
3c702e99 | 1738 | */ |
159f3cd9 | 1739 | if (gpiolib_initialized) { |
d377f56f LW |
1740 | ret = gpiochip_setup_dev(gdev); |
1741 | if (ret) | |
48057ed1 | 1742 | goto err_remove_irqchip; |
159f3cd9 | 1743 | } |
cedb1881 | 1744 | return 0; |
3bae4811 | 1745 | |
48057ed1 LW |
1746 | err_remove_irqchip: |
1747 | gpiochip_irqchip_remove(chip); | |
1748 | err_remove_irqchip_mask: | |
1749 | gpiochip_irqchip_free_valid_mask(chip); | |
35779890 | 1750 | err_remove_acpi_chip: |
225fce83 | 1751 | acpi_gpiochip_remove(chip); |
35779890 | 1752 | err_remove_of_chip: |
6d86750c | 1753 | gpiochip_free_hogs(chip); |
225fce83 | 1754 | of_gpiochip_remove(chip); |
35779890 | 1755 | err_free_gpiochip_mask: |
2f4133bb | 1756 | gpiochip_remove_pin_ranges(chip); |
726cb3ba | 1757 | gpiochip_free_valid_mask(chip); |
5f3ca732 | 1758 | err_remove_from_list: |
225fce83 | 1759 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 1760 | list_del(&gdev->list); |
3bae4811 | 1761 | spin_unlock_irqrestore(&gpio_lock, flags); |
476e2fc5 | 1762 | err_free_label: |
fcf273e5 | 1763 | kfree_const(gdev->label); |
476e2fc5 GR |
1764 | err_free_descs: |
1765 | kfree(gdev->descs); | |
a05a1404 | 1766 | err_free_ida: |
ff2b1359 | 1767 | ida_simple_remove(&gpio_ida, gdev->id); |
a05a1404 | 1768 | err_free_gdev: |
d2876d08 | 1769 | /* failures here can mean systems won't boot... */ |
1777fc97 | 1770 | pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__, |
fdeb8e15 | 1771 | gdev->base, gdev->base + gdev->ngpio - 1, |
d377f56f | 1772 | chip->label ? : "generic", ret); |
fdeb8e15 | 1773 | kfree(gdev); |
d377f56f | 1774 | return ret; |
d2876d08 | 1775 | } |
959bc7b2 | 1776 | EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key); |
d2876d08 | 1777 | |
43c54eca LW |
1778 | /** |
1779 | * gpiochip_get_data() - get per-subdriver data for the chip | |
950d55f5 TR |
1780 | * @chip: GPIO chip |
1781 | * | |
1782 | * Returns: | |
1783 | * The per-subdriver data for the chip. | |
43c54eca LW |
1784 | */ |
1785 | void *gpiochip_get_data(struct gpio_chip *chip) | |
1786 | { | |
1787 | return chip->gpiodev->data; | |
1788 | } | |
1789 | EXPORT_SYMBOL_GPL(gpiochip_get_data); | |
1790 | ||
d2876d08 DB |
1791 | /** |
1792 | * gpiochip_remove() - unregister a gpio_chip | |
1793 | * @chip: the chip to unregister | |
1794 | * | |
1795 | * A gpio_chip with any GPIOs still requested may not be removed. | |
1796 | */ | |
e1db1706 | 1797 | void gpiochip_remove(struct gpio_chip *chip) |
d2876d08 | 1798 | { |
ff2b1359 | 1799 | struct gpio_device *gdev = chip->gpiodev; |
fab28b89 | 1800 | struct gpio_desc *desc; |
d2876d08 | 1801 | unsigned long flags; |
1c3cdb18 | 1802 | unsigned i; |
fab28b89 | 1803 | bool requested = false; |
d2876d08 | 1804 | |
ff2b1359 | 1805 | /* FIXME: should the legacy sysfs handling be moved to gpio_device? */ |
afbc4f31 | 1806 | gpiochip_sysfs_unregister(gdev); |
5018ada6 | 1807 | gpiochip_free_hogs(chip); |
bd203bd5 BJZ |
1808 | /* Numb the device, cancelling all outstanding operations */ |
1809 | gdev->chip = NULL; | |
00acc3dc | 1810 | gpiochip_irqchip_remove(chip); |
6072b9dc | 1811 | acpi_gpiochip_remove(chip); |
391c970c | 1812 | of_gpiochip_remove(chip); |
2f4133bb | 1813 | gpiochip_remove_pin_ranges(chip); |
726cb3ba | 1814 | gpiochip_free_valid_mask(chip); |
43c54eca LW |
1815 | /* |
1816 | * We accept no more calls into the driver from this point, so | |
1817 | * NULL the driver data pointer | |
1818 | */ | |
1819 | gdev->data = NULL; | |
391c970c | 1820 | |
6798acaa | 1821 | spin_lock_irqsave(&gpio_lock, flags); |
fdeb8e15 | 1822 | for (i = 0; i < gdev->ngpio; i++) { |
1c3cdb18 | 1823 | desc = &gdev->descs[i]; |
fab28b89 JH |
1824 | if (test_bit(FLAG_REQUESTED, &desc->flags)) |
1825 | requested = true; | |
d2876d08 | 1826 | } |
d2876d08 | 1827 | spin_unlock_irqrestore(&gpio_lock, flags); |
14e85c0e | 1828 | |
fab28b89 | 1829 | if (requested) |
fdeb8e15 | 1830 | dev_crit(&gdev->dev, |
58383c78 | 1831 | "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n"); |
fab28b89 | 1832 | |
ff2b1359 LW |
1833 | /* |
1834 | * The gpiochip side puts its use of the device to rest here: | |
1835 | * if there are no userspace clients, the chardev and device will | |
1836 | * be removed, else it will be dangling until the last user is | |
1837 | * gone. | |
1838 | */ | |
111379dc | 1839 | cdev_device_del(&gdev->chrdev, &gdev->dev); |
ff2b1359 | 1840 | put_device(&gdev->dev); |
d2876d08 DB |
1841 | } |
1842 | EXPORT_SYMBOL_GPL(gpiochip_remove); | |
1843 | ||
0cf3292c LD |
1844 | static void devm_gpio_chip_release(struct device *dev, void *res) |
1845 | { | |
1846 | struct gpio_chip *chip = *(struct gpio_chip **)res; | |
1847 | ||
1848 | gpiochip_remove(chip); | |
1849 | } | |
1850 | ||
0cf3292c | 1851 | /** |
51158416 | 1852 | * devm_gpiochip_add_data() - Resource managed gpiochip_add_data() |
3925b90f | 1853 | * @dev: pointer to the device that gpio_chip belongs to. |
0cf3292c | 1854 | * @chip: the chip to register, with chip->base initialized |
950d55f5 | 1855 | * @data: driver-private data associated with this chip |
0cf3292c | 1856 | * |
950d55f5 | 1857 | * Context: potentially before irqs will work |
0cf3292c LD |
1858 | * |
1859 | * The gpio chip automatically be released when the device is unbound. | |
950d55f5 TR |
1860 | * |
1861 | * Returns: | |
1862 | * A negative errno if the chip can't be registered, such as because the | |
1863 | * chip->base is invalid or already associated with a different chip. | |
1864 | * Otherwise it returns zero as a success code. | |
0cf3292c LD |
1865 | */ |
1866 | int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip, | |
1867 | void *data) | |
1868 | { | |
1869 | struct gpio_chip **ptr; | |
1870 | int ret; | |
1871 | ||
1872 | ptr = devres_alloc(devm_gpio_chip_release, sizeof(*ptr), | |
1873 | GFP_KERNEL); | |
1874 | if (!ptr) | |
1875 | return -ENOMEM; | |
1876 | ||
1877 | ret = gpiochip_add_data(chip, data); | |
1878 | if (ret < 0) { | |
1879 | devres_free(ptr); | |
1880 | return ret; | |
1881 | } | |
1882 | ||
1883 | *ptr = chip; | |
1884 | devres_add(dev, ptr); | |
1885 | ||
1886 | return 0; | |
1887 | } | |
1888 | EXPORT_SYMBOL_GPL(devm_gpiochip_add_data); | |
1889 | ||
594fa265 GL |
1890 | /** |
1891 | * gpiochip_find() - iterator for locating a specific gpio_chip | |
1892 | * @data: data to pass to match function | |
950d55f5 | 1893 | * @match: Callback function to check gpio_chip |
594fa265 GL |
1894 | * |
1895 | * Similar to bus_find_device. It returns a reference to a gpio_chip as | |
1896 | * determined by a user supplied @match callback. The callback should return | |
1897 | * 0 if the device doesn't match and non-zero if it does. If the callback is | |
1898 | * non-zero, this function will return to the caller and not iterate over any | |
1899 | * more gpio_chips. | |
1900 | */ | |
07ce8ec7 | 1901 | struct gpio_chip *gpiochip_find(void *data, |
6e2cf651 | 1902 | int (*match)(struct gpio_chip *chip, |
3d0f7cf0 | 1903 | void *data)) |
594fa265 | 1904 | { |
ff2b1359 | 1905 | struct gpio_device *gdev; |
acf06ff7 | 1906 | struct gpio_chip *chip = NULL; |
594fa265 | 1907 | unsigned long flags; |
594fa265 GL |
1908 | |
1909 | spin_lock_irqsave(&gpio_lock, flags); | |
ff2b1359 | 1910 | list_for_each_entry(gdev, &gpio_devices, list) |
acf06ff7 MY |
1911 | if (gdev->chip && match(gdev->chip, data)) { |
1912 | chip = gdev->chip; | |
594fa265 | 1913 | break; |
acf06ff7 | 1914 | } |
ff2b1359 | 1915 | |
594fa265 GL |
1916 | spin_unlock_irqrestore(&gpio_lock, flags); |
1917 | ||
1918 | return chip; | |
1919 | } | |
8fa0c9bf | 1920 | EXPORT_SYMBOL_GPL(gpiochip_find); |
d2876d08 | 1921 | |
79697ef9 AC |
1922 | static int gpiochip_match_name(struct gpio_chip *chip, void *data) |
1923 | { | |
1924 | const char *name = data; | |
1925 | ||
1926 | return !strcmp(chip->label, name); | |
1927 | } | |
1928 | ||
1929 | static struct gpio_chip *find_chip_by_name(const char *name) | |
1930 | { | |
1931 | return gpiochip_find((void *)name, gpiochip_match_name); | |
1932 | } | |
1933 | ||
14250520 LW |
1934 | #ifdef CONFIG_GPIOLIB_IRQCHIP |
1935 | ||
1936 | /* | |
1937 | * The following is irqchip helper code for gpiochips. | |
1938 | */ | |
1939 | ||
9411e3aa AS |
1940 | static int gpiochip_irqchip_init_hw(struct gpio_chip *gc) |
1941 | { | |
1942 | struct gpio_irq_chip *girq = &gc->irq; | |
1943 | ||
1944 | if (!girq->init_hw) | |
1945 | return 0; | |
1946 | ||
1947 | return girq->init_hw(gc); | |
1948 | } | |
1949 | ||
5fbe5b58 | 1950 | static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc) |
79b804cb | 1951 | { |
5fbe5b58 LW |
1952 | struct gpio_irq_chip *girq = &gc->irq; |
1953 | ||
1954 | if (!girq->init_valid_mask) | |
79b804cb MW |
1955 | return 0; |
1956 | ||
5fbe5b58 LW |
1957 | girq->valid_mask = gpiochip_allocate_mask(gc); |
1958 | if (!girq->valid_mask) | |
79b804cb MW |
1959 | return -ENOMEM; |
1960 | ||
5fbe5b58 LW |
1961 | girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio); |
1962 | ||
79b804cb MW |
1963 | return 0; |
1964 | } | |
1965 | ||
1966 | static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip) | |
1967 | { | |
7bdbd1ec | 1968 | bitmap_free(gpiochip->irq.valid_mask); |
dc7b0387 | 1969 | gpiochip->irq.valid_mask = NULL; |
79b804cb MW |
1970 | } |
1971 | ||
64ff2c8e SB |
1972 | bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gpiochip, |
1973 | unsigned int offset) | |
79b804cb | 1974 | { |
726cb3ba SB |
1975 | if (!gpiochip_line_is_valid(gpiochip, offset)) |
1976 | return false; | |
79b804cb | 1977 | /* No mask means all valid */ |
dc7b0387 | 1978 | if (likely(!gpiochip->irq.valid_mask)) |
79b804cb | 1979 | return true; |
dc7b0387 | 1980 | return test_bit(offset, gpiochip->irq.valid_mask); |
79b804cb | 1981 | } |
64ff2c8e | 1982 | EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid); |
79b804cb | 1983 | |
14250520 | 1984 | /** |
d245b3f9 | 1985 | * gpiochip_set_cascaded_irqchip() - connects a cascaded irqchip to a gpiochip |
4892d3a6 | 1986 | * @gc: the gpiochip to set the irqchip chain to |
14250520 | 1987 | * @parent_irq: the irq number corresponding to the parent IRQ for this |
72780ce5 | 1988 | * cascaded irqchip |
14250520 | 1989 | * @parent_handler: the parent interrupt handler for the accumulated IRQ |
3f97d5fc LW |
1990 | * coming out of the gpiochip. If the interrupt is nested rather than |
1991 | * cascaded, pass NULL in this handler argument | |
14250520 | 1992 | */ |
4892d3a6 | 1993 | static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gc, |
6f79309a | 1994 | unsigned int parent_irq, |
d245b3f9 | 1995 | irq_flow_handler_t parent_handler) |
14250520 | 1996 | { |
4892d3a6 LW |
1997 | struct gpio_irq_chip *girq = &gc->irq; |
1998 | struct device *dev = &gc->gpiodev->dev; | |
1999 | ||
2000 | if (!girq->domain) { | |
2001 | chip_err(gc, "called %s before setting up irqchip\n", | |
83141a77 | 2002 | __func__); |
1c8732bb LW |
2003 | return; |
2004 | } | |
2005 | ||
3f97d5fc | 2006 | if (parent_handler) { |
4892d3a6 LW |
2007 | if (gc->can_sleep) { |
2008 | chip_err(gc, | |
b1911710 | 2009 | "you cannot have chained interrupts on a chip that may sleep\n"); |
3f97d5fc LW |
2010 | return; |
2011 | } | |
4892d3a6 LW |
2012 | girq->parents = devm_kcalloc(dev, 1, |
2013 | sizeof(*girq->parents), | |
2014 | GFP_KERNEL); | |
2015 | if (!girq->parents) { | |
2016 | chip_err(gc, "out of memory allocating parent IRQ\n"); | |
2017 | return; | |
2018 | } | |
2019 | girq->parents[0] = parent_irq; | |
2020 | girq->num_parents = 1; | |
3f97d5fc LW |
2021 | /* |
2022 | * The parent irqchip is already using the chip_data for this | |
2023 | * irqchip, so our callbacks simply use the handler_data. | |
2024 | */ | |
f7f87753 | 2025 | irq_set_chained_handler_and_data(parent_irq, parent_handler, |
4892d3a6 | 2026 | gc); |
3f97d5fc | 2027 | } |
14250520 | 2028 | } |
d245b3f9 | 2029 | |
d245b3f9 LW |
2030 | /** |
2031 | * gpiochip_set_nested_irqchip() - connects a nested irqchip to a gpiochip | |
2032 | * @gpiochip: the gpiochip to set the irqchip nested handler to | |
2033 | * @irqchip: the irqchip to nest to the gpiochip | |
2034 | * @parent_irq: the irq number corresponding to the parent IRQ for this | |
2035 | * nested irqchip | |
2036 | */ | |
2037 | void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip, | |
2038 | struct irq_chip *irqchip, | |
6f79309a | 2039 | unsigned int parent_irq) |
d245b3f9 | 2040 | { |
3c1f6b2d | 2041 | gpiochip_set_cascaded_irqchip(gpiochip, parent_irq, NULL); |
d245b3f9 LW |
2042 | } |
2043 | EXPORT_SYMBOL_GPL(gpiochip_set_nested_irqchip); | |
2044 | ||
fdd61a01 LW |
2045 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
2046 | ||
2047 | /** | |
2048 | * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip | |
2049 | * to a gpiochip | |
2050 | * @gc: the gpiochip to set the irqchip hierarchical handler to | |
2051 | * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt | |
2052 | * will then percolate up to the parent | |
2053 | */ | |
2054 | static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc, | |
2055 | struct irq_chip *irqchip) | |
2056 | { | |
2057 | /* DT will deal with mapping each IRQ as we go along */ | |
2058 | if (is_of_node(gc->irq.fwnode)) | |
2059 | return; | |
2060 | ||
2061 | /* | |
2062 | * This is for legacy and boardfile "irqchip" fwnodes: allocate | |
2063 | * irqs upfront instead of dynamically since we don't have the | |
2064 | * dynamic type of allocation that hardware description languages | |
2065 | * provide. Once all GPIO drivers using board files are gone from | |
2066 | * the kernel we can delete this code, but for a transitional period | |
2067 | * it is necessary to keep this around. | |
2068 | */ | |
2069 | if (is_fwnode_irqchip(gc->irq.fwnode)) { | |
2070 | int i; | |
2071 | int ret; | |
2072 | ||
2073 | for (i = 0; i < gc->ngpio; i++) { | |
2074 | struct irq_fwspec fwspec; | |
2075 | unsigned int parent_hwirq; | |
2076 | unsigned int parent_type; | |
2077 | struct gpio_irq_chip *girq = &gc->irq; | |
2078 | ||
2079 | /* | |
2080 | * We call the child to parent translation function | |
2081 | * only to check if the child IRQ is valid or not. | |
2082 | * Just pick the rising edge type here as that is what | |
2083 | * we likely need to support. | |
2084 | */ | |
2085 | ret = girq->child_to_parent_hwirq(gc, i, | |
2086 | IRQ_TYPE_EDGE_RISING, | |
2087 | &parent_hwirq, | |
2088 | &parent_type); | |
2089 | if (ret) { | |
2090 | chip_err(gc, "skip set-up on hwirq %d\n", | |
2091 | i); | |
2092 | continue; | |
2093 | } | |
2094 | ||
2095 | fwspec.fwnode = gc->irq.fwnode; | |
2096 | /* This is the hwirq for the GPIO line side of things */ | |
2097 | fwspec.param[0] = girq->child_offset_to_irq(gc, i); | |
2098 | /* Just pick something */ | |
2099 | fwspec.param[1] = IRQ_TYPE_EDGE_RISING; | |
2100 | fwspec.param_count = 2; | |
2101 | ret = __irq_domain_alloc_irqs(gc->irq.domain, | |
2102 | /* just pick something */ | |
2103 | -1, | |
2104 | 1, | |
2105 | NUMA_NO_NODE, | |
2106 | &fwspec, | |
2107 | false, | |
2108 | NULL); | |
2109 | if (ret < 0) { | |
2110 | chip_err(gc, | |
2111 | "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n", | |
2112 | i, parent_hwirq, | |
2113 | ret); | |
2114 | } | |
2115 | } | |
2116 | } | |
2117 | ||
2118 | chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__); | |
2119 | ||
2120 | return; | |
2121 | } | |
2122 | ||
2123 | static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d, | |
2124 | struct irq_fwspec *fwspec, | |
2125 | unsigned long *hwirq, | |
2126 | unsigned int *type) | |
2127 | { | |
2128 | /* We support standard DT translation */ | |
2129 | if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) { | |
2130 | return irq_domain_translate_twocell(d, fwspec, hwirq, type); | |
2131 | } | |
2132 | ||
2133 | /* This is for board files and others not using DT */ | |
2134 | if (is_fwnode_irqchip(fwspec->fwnode)) { | |
2135 | int ret; | |
2136 | ||
2137 | ret = irq_domain_translate_twocell(d, fwspec, hwirq, type); | |
2138 | if (ret) | |
2139 | return ret; | |
2140 | WARN_ON(*type == IRQ_TYPE_NONE); | |
2141 | return 0; | |
2142 | } | |
2143 | return -EINVAL; | |
2144 | } | |
2145 | ||
2146 | static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d, | |
2147 | unsigned int irq, | |
2148 | unsigned int nr_irqs, | |
2149 | void *data) | |
2150 | { | |
2151 | struct gpio_chip *gc = d->host_data; | |
2152 | irq_hw_number_t hwirq; | |
2153 | unsigned int type = IRQ_TYPE_NONE; | |
2154 | struct irq_fwspec *fwspec = data; | |
24258761 | 2155 | void *parent_arg; |
fdd61a01 LW |
2156 | unsigned int parent_hwirq; |
2157 | unsigned int parent_type; | |
2158 | struct gpio_irq_chip *girq = &gc->irq; | |
2159 | int ret; | |
2160 | ||
2161 | /* | |
2162 | * The nr_irqs parameter is always one except for PCI multi-MSI | |
2163 | * so this should not happen. | |
2164 | */ | |
2165 | WARN_ON(nr_irqs != 1); | |
2166 | ||
2167 | ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type); | |
2168 | if (ret) | |
2169 | return ret; | |
2170 | ||
366950ee | 2171 | chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq); |
fdd61a01 LW |
2172 | |
2173 | ret = girq->child_to_parent_hwirq(gc, hwirq, type, | |
2174 | &parent_hwirq, &parent_type); | |
2175 | if (ret) { | |
2176 | chip_err(gc, "can't look up hwirq %lu\n", hwirq); | |
2177 | return ret; | |
2178 | } | |
366950ee | 2179 | chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq); |
fdd61a01 LW |
2180 | |
2181 | /* | |
2182 | * We set handle_bad_irq because the .set_type() should | |
2183 | * always be invoked and set the right type of handler. | |
2184 | */ | |
2185 | irq_domain_set_info(d, | |
2186 | irq, | |
2187 | hwirq, | |
2188 | gc->irq.chip, | |
2189 | gc, | |
2190 | girq->handler, | |
2191 | NULL, NULL); | |
2192 | irq_set_probe(irq); | |
2193 | ||
fdd61a01 | 2194 | /* This parent only handles asserted level IRQs */ |
24258761 KH |
2195 | parent_arg = girq->populate_parent_alloc_arg(gc, parent_hwirq, parent_type); |
2196 | if (!parent_arg) | |
2197 | return -ENOMEM; | |
2198 | ||
366950ee | 2199 | chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n", |
fdd61a01 | 2200 | irq, parent_hwirq); |
c34f6dc8 | 2201 | irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key); |
24258761 | 2202 | ret = irq_domain_alloc_irqs_parent(d, irq, 1, parent_arg); |
880b7cf2 KH |
2203 | /* |
2204 | * If the parent irqdomain is msi, the interrupts have already | |
2205 | * been allocated, so the EEXIST is good. | |
2206 | */ | |
2207 | if (irq_domain_is_msi(d->parent) && (ret == -EEXIST)) | |
2208 | ret = 0; | |
fdd61a01 LW |
2209 | if (ret) |
2210 | chip_err(gc, | |
2211 | "failed to allocate parent hwirq %d for hwirq %lu\n", | |
2212 | parent_hwirq, hwirq); | |
2213 | ||
24258761 | 2214 | kfree(parent_arg); |
fdd61a01 LW |
2215 | return ret; |
2216 | } | |
2217 | ||
2218 | static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *chip, | |
2219 | unsigned int offset) | |
2220 | { | |
2221 | return offset; | |
2222 | } | |
2223 | ||
2224 | static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops) | |
2225 | { | |
2226 | ops->activate = gpiochip_irq_domain_activate; | |
2227 | ops->deactivate = gpiochip_irq_domain_deactivate; | |
2228 | ops->alloc = gpiochip_hierarchy_irq_domain_alloc; | |
2229 | ops->free = irq_domain_free_irqs_common; | |
2230 | ||
2231 | /* | |
2232 | * We only allow overriding the translate() function for | |
2233 | * hierarchical chips, and this should only be done if the user | |
2234 | * really need something other than 1:1 translation. | |
2235 | */ | |
2236 | if (!ops->translate) | |
2237 | ops->translate = gpiochip_hierarchy_irq_domain_translate; | |
2238 | } | |
2239 | ||
2240 | static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc) | |
2241 | { | |
2242 | if (!gc->irq.child_to_parent_hwirq || | |
2243 | !gc->irq.fwnode) { | |
2244 | chip_err(gc, "missing irqdomain vital data\n"); | |
2245 | return -EINVAL; | |
2246 | } | |
2247 | ||
2248 | if (!gc->irq.child_offset_to_irq) | |
2249 | gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop; | |
2250 | ||
24258761 KH |
2251 | if (!gc->irq.populate_parent_alloc_arg) |
2252 | gc->irq.populate_parent_alloc_arg = | |
fdd61a01 LW |
2253 | gpiochip_populate_parent_fwspec_twocell; |
2254 | ||
2255 | gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops); | |
2256 | ||
2257 | gc->irq.domain = irq_domain_create_hierarchy( | |
2258 | gc->irq.parent_domain, | |
2259 | 0, | |
2260 | gc->ngpio, | |
2261 | gc->irq.fwnode, | |
2262 | &gc->irq.child_irq_domain_ops, | |
2263 | gc); | |
2264 | ||
2265 | if (!gc->irq.domain) | |
2266 | return -ENOMEM; | |
2267 | ||
2268 | gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip); | |
2269 | ||
2270 | return 0; | |
2271 | } | |
2272 | ||
2273 | static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc) | |
2274 | { | |
2275 | return !!gc->irq.parent_domain; | |
2276 | } | |
2277 | ||
24258761 | 2278 | void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *chip, |
fdd61a01 LW |
2279 | unsigned int parent_hwirq, |
2280 | unsigned int parent_type) | |
2281 | { | |
24258761 KH |
2282 | struct irq_fwspec *fwspec; |
2283 | ||
2284 | fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL); | |
2285 | if (!fwspec) | |
2286 | return NULL; | |
2287 | ||
2288 | fwspec->fwnode = chip->irq.parent_domain->fwnode; | |
fdd61a01 LW |
2289 | fwspec->param_count = 2; |
2290 | fwspec->param[0] = parent_hwirq; | |
2291 | fwspec->param[1] = parent_type; | |
24258761 KH |
2292 | |
2293 | return fwspec; | |
fdd61a01 LW |
2294 | } |
2295 | EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell); | |
2296 | ||
24258761 | 2297 | void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *chip, |
fdd61a01 LW |
2298 | unsigned int parent_hwirq, |
2299 | unsigned int parent_type) | |
2300 | { | |
24258761 KH |
2301 | struct irq_fwspec *fwspec; |
2302 | ||
2303 | fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL); | |
2304 | if (!fwspec) | |
2305 | return NULL; | |
2306 | ||
2307 | fwspec->fwnode = chip->irq.parent_domain->fwnode; | |
fdd61a01 LW |
2308 | fwspec->param_count = 4; |
2309 | fwspec->param[0] = 0; | |
2310 | fwspec->param[1] = parent_hwirq; | |
2311 | fwspec->param[2] = 0; | |
2312 | fwspec->param[3] = parent_type; | |
24258761 KH |
2313 | |
2314 | return fwspec; | |
fdd61a01 LW |
2315 | } |
2316 | EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell); | |
2317 | ||
2318 | #else | |
2319 | ||
2320 | static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc) | |
2321 | { | |
2322 | return -EINVAL; | |
2323 | } | |
2324 | ||
2325 | static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc) | |
2326 | { | |
2327 | return false; | |
2328 | } | |
2329 | ||
2330 | #endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */ | |
2331 | ||
14250520 LW |
2332 | /** |
2333 | * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip | |
2334 | * @d: the irqdomain used by this irqchip | |
2335 | * @irq: the global irq number used by this GPIO irqchip irq | |
2336 | * @hwirq: the local IRQ/GPIO line offset on this gpiochip | |
2337 | * | |
2338 | * This function will set up the mapping for a certain IRQ line on a | |
2339 | * gpiochip by assigning the gpiochip as chip data, and using the irqchip | |
2340 | * stored inside the gpiochip. | |
2341 | */ | |
1b95b4eb TR |
2342 | int gpiochip_irq_map(struct irq_domain *d, unsigned int irq, |
2343 | irq_hw_number_t hwirq) | |
14250520 LW |
2344 | { |
2345 | struct gpio_chip *chip = d->host_data; | |
d377f56f | 2346 | int ret = 0; |
14250520 | 2347 | |
dc749a09 GS |
2348 | if (!gpiochip_irqchip_irq_valid(chip, hwirq)) |
2349 | return -ENXIO; | |
2350 | ||
14250520 | 2351 | irq_set_chip_data(irq, chip); |
a0a8bcf4 GS |
2352 | /* |
2353 | * This lock class tells lockdep that GPIO irqs are in a different | |
2354 | * category than their parents, so it won't report false recursion. | |
2355 | */ | |
39c3fd58 | 2356 | irq_set_lockdep_class(irq, chip->irq.lock_key, chip->irq.request_key); |
c7a0aa59 | 2357 | irq_set_chip_and_handler(irq, chip->irq.chip, chip->irq.handler); |
d245b3f9 | 2358 | /* Chips that use nested thread handlers have them marked */ |
60ed54ca | 2359 | if (chip->irq.threaded) |
1c8732bb | 2360 | irq_set_nested_thread(irq, 1); |
14250520 | 2361 | irq_set_noprobe(irq); |
23393d49 | 2362 | |
e0d89728 | 2363 | if (chip->irq.num_parents == 1) |
d377f56f | 2364 | ret = irq_set_parent(irq, chip->irq.parents[0]); |
e0d89728 | 2365 | else if (chip->irq.map) |
d377f56f | 2366 | ret = irq_set_parent(irq, chip->irq.map[hwirq]); |
e0d89728 | 2367 | |
d377f56f LW |
2368 | if (ret < 0) |
2369 | return ret; | |
e0d89728 | 2370 | |
1333b90f LW |
2371 | /* |
2372 | * No set-up of the hardware will happen if IRQ_TYPE_NONE | |
2373 | * is passed as default type. | |
2374 | */ | |
3634eeb0 TR |
2375 | if (chip->irq.default_type != IRQ_TYPE_NONE) |
2376 | irq_set_irq_type(irq, chip->irq.default_type); | |
14250520 LW |
2377 | |
2378 | return 0; | |
2379 | } | |
1b95b4eb | 2380 | EXPORT_SYMBOL_GPL(gpiochip_irq_map); |
14250520 | 2381 | |
1b95b4eb | 2382 | void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq) |
c3626fde | 2383 | { |
1c8732bb LW |
2384 | struct gpio_chip *chip = d->host_data; |
2385 | ||
60ed54ca | 2386 | if (chip->irq.threaded) |
1c8732bb | 2387 | irq_set_nested_thread(irq, 0); |
c3626fde LW |
2388 | irq_set_chip_and_handler(irq, NULL, NULL); |
2389 | irq_set_chip_data(irq, NULL); | |
2390 | } | |
1b95b4eb | 2391 | EXPORT_SYMBOL_GPL(gpiochip_irq_unmap); |
c3626fde | 2392 | |
14250520 LW |
2393 | static const struct irq_domain_ops gpiochip_domain_ops = { |
2394 | .map = gpiochip_irq_map, | |
c3626fde | 2395 | .unmap = gpiochip_irq_unmap, |
14250520 LW |
2396 | /* Virtually all GPIO irqchips are twocell:ed */ |
2397 | .xlate = irq_domain_xlate_twocell, | |
2398 | }; | |
2399 | ||
fdd61a01 LW |
2400 | /* |
2401 | * TODO: move these activate/deactivate in under the hierarchicial | |
2402 | * irqchip implementation as static once SPMI and SSBI (all external | |
2403 | * users) are phased over. | |
2404 | */ | |
ef74f70e BM |
2405 | /** |
2406 | * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ | |
2407 | * @domain: The IRQ domain used by this IRQ chip | |
2408 | * @data: Outermost irq_data associated with the IRQ | |
2409 | * @reserve: If set, only reserve an interrupt vector instead of assigning one | |
2410 | * | |
2411 | * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be | |
2412 | * used as the activate function for the &struct irq_domain_ops. The host_data | |
2413 | * for the IRQ domain must be the &struct gpio_chip. | |
2414 | */ | |
2415 | int gpiochip_irq_domain_activate(struct irq_domain *domain, | |
2416 | struct irq_data *data, bool reserve) | |
2417 | { | |
2418 | struct gpio_chip *chip = domain->host_data; | |
2419 | ||
2420 | return gpiochip_lock_as_irq(chip, data->hwirq); | |
2421 | } | |
2422 | EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate); | |
2423 | ||
2424 | /** | |
2425 | * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ | |
2426 | * @domain: The IRQ domain used by this IRQ chip | |
2427 | * @data: Outermost irq_data associated with the IRQ | |
2428 | * | |
2429 | * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to | |
2430 | * be used as the deactivate function for the &struct irq_domain_ops. The | |
2431 | * host_data for the IRQ domain must be the &struct gpio_chip. | |
2432 | */ | |
2433 | void gpiochip_irq_domain_deactivate(struct irq_domain *domain, | |
2434 | struct irq_data *data) | |
2435 | { | |
2436 | struct gpio_chip *chip = domain->host_data; | |
2437 | ||
2438 | return gpiochip_unlock_as_irq(chip, data->hwirq); | |
2439 | } | |
2440 | EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate); | |
2441 | ||
4e6b8238 | 2442 | static int gpiochip_to_irq(struct gpio_chip *chip, unsigned offset) |
14250520 | 2443 | { |
fdd61a01 LW |
2444 | struct irq_domain *domain = chip->irq.domain; |
2445 | ||
4e6b8238 HV |
2446 | if (!gpiochip_irqchip_irq_valid(chip, offset)) |
2447 | return -ENXIO; | |
5b76e79c | 2448 | |
fdd61a01 LW |
2449 | #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY |
2450 | if (irq_domain_is_hierarchy(domain)) { | |
2451 | struct irq_fwspec spec; | |
2452 | ||
2453 | spec.fwnode = domain->fwnode; | |
2454 | spec.param_count = 2; | |
2455 | spec.param[0] = chip->irq.child_offset_to_irq(chip, offset); | |
2456 | spec.param[1] = IRQ_TYPE_NONE; | |
2457 | ||
2458 | return irq_create_fwspec_mapping(&spec); | |
2459 | } | |
2460 | #endif | |
2461 | ||
2462 | return irq_create_mapping(domain, offset); | |
14250520 LW |
2463 | } |
2464 | ||
14250520 LW |
2465 | static int gpiochip_irq_reqres(struct irq_data *d) |
2466 | { | |
2467 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); | |
5b76e79c | 2468 | |
4e6b8238 | 2469 | return gpiochip_reqres_irq(chip, d->hwirq); |
14250520 LW |
2470 | } |
2471 | ||
2472 | static void gpiochip_irq_relres(struct irq_data *d) | |
2473 | { | |
2474 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); | |
2475 | ||
4e6b8238 | 2476 | gpiochip_relres_irq(chip, d->hwirq); |
14250520 LW |
2477 | } |
2478 | ||
461c1a7d | 2479 | static void gpiochip_irq_enable(struct irq_data *d) |
14250520 | 2480 | { |
461c1a7d | 2481 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); |
e0d89728 | 2482 | |
461c1a7d HV |
2483 | gpiochip_enable_irq(chip, d->hwirq); |
2484 | if (chip->irq.irq_enable) | |
2485 | chip->irq.irq_enable(d); | |
2486 | else | |
2487 | chip->irq.chip->irq_unmask(d); | |
2488 | } | |
2489 | ||
2490 | static void gpiochip_irq_disable(struct irq_data *d) | |
2491 | { | |
2492 | struct gpio_chip *chip = irq_data_get_irq_chip_data(d); | |
2493 | ||
2494 | if (chip->irq.irq_disable) | |
2495 | chip->irq.irq_disable(d); | |
2496 | else | |
2497 | chip->irq.chip->irq_mask(d); | |
2498 | gpiochip_disable_irq(chip, d->hwirq); | |
2499 | } | |
2500 | ||
ca620f2d HV |
2501 | static void gpiochip_set_irq_hooks(struct gpio_chip *gpiochip) |
2502 | { | |
2503 | struct irq_chip *irqchip = gpiochip->irq.chip; | |
2504 | ||
2505 | if (!irqchip->irq_request_resources && | |
2506 | !irqchip->irq_release_resources) { | |
2507 | irqchip->irq_request_resources = gpiochip_irq_reqres; | |
2508 | irqchip->irq_release_resources = gpiochip_irq_relres; | |
2509 | } | |
461c1a7d HV |
2510 | if (WARN_ON(gpiochip->irq.irq_enable)) |
2511 | return; | |
171948ea HV |
2512 | /* Check if the irqchip already has this hook... */ |
2513 | if (irqchip->irq_enable == gpiochip_irq_enable) { | |
2514 | /* | |
2515 | * ...and if so, give a gentle warning that this is bad | |
2516 | * practice. | |
2517 | */ | |
2518 | chip_info(gpiochip, | |
2519 | "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n"); | |
2520 | return; | |
2521 | } | |
461c1a7d HV |
2522 | gpiochip->irq.irq_enable = irqchip->irq_enable; |
2523 | gpiochip->irq.irq_disable = irqchip->irq_disable; | |
2524 | irqchip->irq_enable = gpiochip_irq_enable; | |
2525 | irqchip->irq_disable = gpiochip_irq_disable; | |
14250520 LW |
2526 | } |
2527 | ||
e0d89728 TR |
2528 | /** |
2529 | * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip | |
2530 | * @gpiochip: the GPIO chip to add the IRQ chip to | |
39c3fd58 AL |
2531 | * @lock_key: lockdep class for IRQ lock |
2532 | * @request_key: lockdep class for IRQ request | |
e0d89728 | 2533 | */ |
959bc7b2 | 2534 | static int gpiochip_add_irqchip(struct gpio_chip *gpiochip, |
39c3fd58 AL |
2535 | struct lock_class_key *lock_key, |
2536 | struct lock_class_key *request_key) | |
e0d89728 TR |
2537 | { |
2538 | struct irq_chip *irqchip = gpiochip->irq.chip; | |
fdd61a01 | 2539 | const struct irq_domain_ops *ops = NULL; |
e0d89728 TR |
2540 | struct device_node *np; |
2541 | unsigned int type; | |
2542 | unsigned int i; | |
2543 | ||
2544 | if (!irqchip) | |
2545 | return 0; | |
2546 | ||
2547 | if (gpiochip->irq.parent_handler && gpiochip->can_sleep) { | |
b1911710 | 2548 | chip_err(gpiochip, "you cannot have chained interrupts on a chip that may sleep\n"); |
e0d89728 TR |
2549 | return -EINVAL; |
2550 | } | |
2551 | ||
2552 | np = gpiochip->gpiodev->dev.of_node; | |
2553 | type = gpiochip->irq.default_type; | |
2554 | ||
2555 | /* | |
2556 | * Specifying a default trigger is a terrible idea if DT or ACPI is | |
2557 | * used to configure the interrupts, as you may end up with | |
2558 | * conflicting triggers. Tell the user, and reset to NONE. | |
2559 | */ | |
2560 | if (WARN(np && type != IRQ_TYPE_NONE, | |
2561 | "%s: Ignoring %u default trigger\n", np->full_name, type)) | |
2562 | type = IRQ_TYPE_NONE; | |
2563 | ||
2564 | if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) { | |
2565 | acpi_handle_warn(ACPI_HANDLE(gpiochip->parent), | |
2566 | "Ignoring %u default trigger\n", type); | |
2567 | type = IRQ_TYPE_NONE; | |
2568 | } | |
2569 | ||
2570 | gpiochip->to_irq = gpiochip_to_irq; | |
2571 | gpiochip->irq.default_type = type; | |
959bc7b2 | 2572 | gpiochip->irq.lock_key = lock_key; |
39c3fd58 | 2573 | gpiochip->irq.request_key = request_key; |
e0d89728 | 2574 | |
fdd61a01 LW |
2575 | /* If a parent irqdomain is provided, let's build a hierarchy */ |
2576 | if (gpiochip_hierarchy_is_hierarchical(gpiochip)) { | |
2577 | int ret = gpiochip_hierarchy_add_domain(gpiochip); | |
2578 | if (ret) | |
2579 | return ret; | |
2580 | } else { | |
2581 | /* Some drivers provide custom irqdomain ops */ | |
2582 | if (gpiochip->irq.domain_ops) | |
2583 | ops = gpiochip->irq.domain_ops; | |
2584 | ||
2585 | if (!ops) | |
2586 | ops = &gpiochip_domain_ops; | |
2587 | gpiochip->irq.domain = irq_domain_add_simple(np, | |
2588 | gpiochip->ngpio, | |
2589 | gpiochip->irq.first, | |
2590 | ops, gpiochip); | |
2591 | if (!gpiochip->irq.domain) | |
2592 | return -EINVAL; | |
2593 | } | |
e0d89728 | 2594 | |
e0d89728 TR |
2595 | if (gpiochip->irq.parent_handler) { |
2596 | void *data = gpiochip->irq.parent_handler_data ?: gpiochip; | |
2597 | ||
2598 | for (i = 0; i < gpiochip->irq.num_parents; i++) { | |
2599 | /* | |
2600 | * The parent IRQ chip is already using the chip_data | |
2601 | * for this IRQ chip, so our callbacks simply use the | |
2602 | * handler_data. | |
2603 | */ | |
2604 | irq_set_chained_handler_and_data(gpiochip->irq.parents[i], | |
2605 | gpiochip->irq.parent_handler, | |
2606 | data); | |
2607 | } | |
e0d89728 TR |
2608 | } |
2609 | ||
ca620f2d HV |
2610 | gpiochip_set_irq_hooks(gpiochip); |
2611 | ||
e0d89728 TR |
2612 | acpi_gpiochip_request_interrupts(gpiochip); |
2613 | ||
2614 | return 0; | |
2615 | } | |
2616 | ||
14250520 LW |
2617 | /** |
2618 | * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip | |
2619 | * @gpiochip: the gpiochip to remove the irqchip from | |
2620 | * | |
2621 | * This is called only from gpiochip_remove() | |
2622 | */ | |
2623 | static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip) | |
2624 | { | |
ca620f2d | 2625 | struct irq_chip *irqchip = gpiochip->irq.chip; |
39e5f096 | 2626 | unsigned int offset; |
c3626fde | 2627 | |
afa82fab MW |
2628 | acpi_gpiochip_free_interrupts(gpiochip); |
2629 | ||
ca620f2d | 2630 | if (irqchip && gpiochip->irq.parent_handler) { |
39e5f096 TR |
2631 | struct gpio_irq_chip *irq = &gpiochip->irq; |
2632 | unsigned int i; | |
2633 | ||
2634 | for (i = 0; i < irq->num_parents; i++) | |
2635 | irq_set_chained_handler_and_data(irq->parents[i], | |
2636 | NULL, NULL); | |
25e4fe92 DES |
2637 | } |
2638 | ||
c3626fde | 2639 | /* Remove all IRQ mappings and delete the domain */ |
f0fbe7bc | 2640 | if (gpiochip->irq.domain) { |
39e5f096 TR |
2641 | unsigned int irq; |
2642 | ||
79b804cb MW |
2643 | for (offset = 0; offset < gpiochip->ngpio; offset++) { |
2644 | if (!gpiochip_irqchip_irq_valid(gpiochip, offset)) | |
2645 | continue; | |
f0fbe7bc TR |
2646 | |
2647 | irq = irq_find_mapping(gpiochip->irq.domain, offset); | |
2648 | irq_dispose_mapping(irq); | |
79b804cb | 2649 | } |
f0fbe7bc TR |
2650 | |
2651 | irq_domain_remove(gpiochip->irq.domain); | |
c3626fde | 2652 | } |
14250520 | 2653 | |
461c1a7d HV |
2654 | if (irqchip) { |
2655 | if (irqchip->irq_request_resources == gpiochip_irq_reqres) { | |
2656 | irqchip->irq_request_resources = NULL; | |
2657 | irqchip->irq_release_resources = NULL; | |
2658 | } | |
2659 | if (irqchip->irq_enable == gpiochip_irq_enable) { | |
2660 | irqchip->irq_enable = gpiochip->irq.irq_enable; | |
2661 | irqchip->irq_disable = gpiochip->irq.irq_disable; | |
2662 | } | |
14250520 | 2663 | } |
461c1a7d HV |
2664 | gpiochip->irq.irq_enable = NULL; |
2665 | gpiochip->irq.irq_disable = NULL; | |
ca620f2d | 2666 | gpiochip->irq.chip = NULL; |
79b804cb MW |
2667 | |
2668 | gpiochip_irqchip_free_valid_mask(gpiochip); | |
14250520 LW |
2669 | } |
2670 | ||
2671 | /** | |
739e6f59 | 2672 | * gpiochip_irqchip_add_key() - adds an irqchip to a gpiochip |
14250520 LW |
2673 | * @gpiochip: the gpiochip to add the irqchip to |
2674 | * @irqchip: the irqchip to add to the gpiochip | |
2675 | * @first_irq: if not dynamically assigned, the base (first) IRQ to | |
2676 | * allocate gpiochip irqs from | |
2677 | * @handler: the irq handler to use (often a predefined irq core function) | |
1333b90f LW |
2678 | * @type: the default type for IRQs on this irqchip, pass IRQ_TYPE_NONE |
2679 | * to have the core avoid setting up any default type in the hardware. | |
60ed54ca | 2680 | * @threaded: whether this irqchip uses a nested thread handler |
39c3fd58 AL |
2681 | * @lock_key: lockdep class for IRQ lock |
2682 | * @request_key: lockdep class for IRQ request | |
14250520 LW |
2683 | * |
2684 | * This function closely associates a certain irqchip with a certain | |
2685 | * gpiochip, providing an irq domain to translate the local IRQs to | |
2686 | * global irqs in the gpiolib core, and making sure that the gpiochip | |
2687 | * is passed as chip data to all related functions. Driver callbacks | |
09dd5f9e | 2688 | * need to use gpiochip_get_data() to get their local state containers back |
14250520 LW |
2689 | * from the gpiochip passed as chip data. An irqdomain will be stored |
2690 | * in the gpiochip that shall be used by the driver to handle IRQ number | |
2691 | * translation. The gpiochip will need to be initialized and registered | |
2692 | * before calling this function. | |
2693 | * | |
c3626fde LW |
2694 | * This function will handle two cell:ed simple IRQs and assumes all |
2695 | * the pins on the gpiochip can generate a unique IRQ. Everything else | |
14250520 LW |
2696 | * need to be open coded. |
2697 | */ | |
739e6f59 LW |
2698 | int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip, |
2699 | struct irq_chip *irqchip, | |
2700 | unsigned int first_irq, | |
2701 | irq_flow_handler_t handler, | |
2702 | unsigned int type, | |
60ed54ca | 2703 | bool threaded, |
39c3fd58 AL |
2704 | struct lock_class_key *lock_key, |
2705 | struct lock_class_key *request_key) | |
14250520 LW |
2706 | { |
2707 | struct device_node *of_node; | |
14250520 LW |
2708 | |
2709 | if (!gpiochip || !irqchip) | |
2710 | return -EINVAL; | |
2711 | ||
58383c78 | 2712 | if (!gpiochip->parent) { |
14250520 LW |
2713 | pr_err("missing gpiochip .dev parent pointer\n"); |
2714 | return -EINVAL; | |
2715 | } | |
60ed54ca | 2716 | gpiochip->irq.threaded = threaded; |
58383c78 | 2717 | of_node = gpiochip->parent->of_node; |
14250520 LW |
2718 | #ifdef CONFIG_OF_GPIO |
2719 | /* | |
20a8a968 | 2720 | * If the gpiochip has an assigned OF node this takes precedence |
c88402c2 BJZ |
2721 | * FIXME: get rid of this and use gpiochip->parent->of_node |
2722 | * everywhere | |
14250520 LW |
2723 | */ |
2724 | if (gpiochip->of_node) | |
2725 | of_node = gpiochip->of_node; | |
2726 | #endif | |
332e99d5 | 2727 | /* |
0a1e0053 | 2728 | * Specifying a default trigger is a terrible idea if DT or ACPI is |
332e99d5 MZ |
2729 | * used to configure the interrupts, as you may end-up with |
2730 | * conflicting triggers. Tell the user, and reset to NONE. | |
2731 | */ | |
2732 | if (WARN(of_node && type != IRQ_TYPE_NONE, | |
7eb6ce2f | 2733 | "%pOF: Ignoring %d default trigger\n", of_node, type)) |
332e99d5 | 2734 | type = IRQ_TYPE_NONE; |
0a1e0053 MW |
2735 | if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) { |
2736 | acpi_handle_warn(ACPI_HANDLE(gpiochip->parent), | |
2737 | "Ignoring %d default trigger\n", type); | |
2738 | type = IRQ_TYPE_NONE; | |
2739 | } | |
332e99d5 | 2740 | |
da80ff81 | 2741 | gpiochip->irq.chip = irqchip; |
c7a0aa59 | 2742 | gpiochip->irq.handler = handler; |
3634eeb0 | 2743 | gpiochip->irq.default_type = type; |
14250520 | 2744 | gpiochip->to_irq = gpiochip_to_irq; |
ca9df053 | 2745 | gpiochip->irq.lock_key = lock_key; |
39c3fd58 | 2746 | gpiochip->irq.request_key = request_key; |
f0fbe7bc | 2747 | gpiochip->irq.domain = irq_domain_add_simple(of_node, |
14250520 LW |
2748 | gpiochip->ngpio, first_irq, |
2749 | &gpiochip_domain_ops, gpiochip); | |
f0fbe7bc | 2750 | if (!gpiochip->irq.domain) { |
da80ff81 | 2751 | gpiochip->irq.chip = NULL; |
14250520 LW |
2752 | return -EINVAL; |
2753 | } | |
8b67a1f0 | 2754 | |
ca620f2d | 2755 | gpiochip_set_irq_hooks(gpiochip); |
14250520 | 2756 | |
afa82fab MW |
2757 | acpi_gpiochip_request_interrupts(gpiochip); |
2758 | ||
14250520 LW |
2759 | return 0; |
2760 | } | |
739e6f59 | 2761 | EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_key); |
14250520 LW |
2762 | |
2763 | #else /* CONFIG_GPIOLIB_IRQCHIP */ | |
2764 | ||
959bc7b2 | 2765 | static inline int gpiochip_add_irqchip(struct gpio_chip *gpiochip, |
39c3fd58 AL |
2766 | struct lock_class_key *lock_key, |
2767 | struct lock_class_key *request_key) | |
e0d89728 TR |
2768 | { |
2769 | return 0; | |
2770 | } | |
14250520 | 2771 | static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip) {} |
9411e3aa AS |
2772 | |
2773 | static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gpiochip) | |
2774 | { | |
2775 | return 0; | |
2776 | } | |
2777 | ||
79b804cb MW |
2778 | static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip) |
2779 | { | |
2780 | return 0; | |
2781 | } | |
2782 | static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip) | |
2783 | { } | |
14250520 LW |
2784 | |
2785 | #endif /* CONFIG_GPIOLIB_IRQCHIP */ | |
2786 | ||
c771c2f4 JG |
2787 | /** |
2788 | * gpiochip_generic_request() - request the gpio function for a pin | |
2789 | * @chip: the gpiochip owning the GPIO | |
2790 | * @offset: the offset of the GPIO to request for GPIO function | |
2791 | */ | |
2792 | int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset) | |
2793 | { | |
a9a1d2a7 | 2794 | return pinctrl_gpio_request(chip->gpiodev->base + offset); |
c771c2f4 JG |
2795 | } |
2796 | EXPORT_SYMBOL_GPL(gpiochip_generic_request); | |
2797 | ||
2798 | /** | |
2799 | * gpiochip_generic_free() - free the gpio function from a pin | |
2800 | * @chip: the gpiochip to request the gpio function for | |
2801 | * @offset: the offset of the GPIO to free from GPIO function | |
2802 | */ | |
2803 | void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset) | |
2804 | { | |
a9a1d2a7 | 2805 | pinctrl_gpio_free(chip->gpiodev->base + offset); |
c771c2f4 JG |
2806 | } |
2807 | EXPORT_SYMBOL_GPL(gpiochip_generic_free); | |
2808 | ||
2956b5d9 MW |
2809 | /** |
2810 | * gpiochip_generic_config() - apply configuration for a pin | |
2811 | * @chip: the gpiochip owning the GPIO | |
2812 | * @offset: the offset of the GPIO to apply the configuration | |
2813 | * @config: the configuration to be applied | |
2814 | */ | |
2815 | int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset, | |
2816 | unsigned long config) | |
2817 | { | |
2818 | return pinctrl_gpio_set_config(chip->gpiodev->base + offset, config); | |
2819 | } | |
2820 | EXPORT_SYMBOL_GPL(gpiochip_generic_config); | |
2821 | ||
f23f1516 | 2822 | #ifdef CONFIG_PINCTRL |
165adc9c | 2823 | |
586a87e6 CR |
2824 | /** |
2825 | * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping | |
2826 | * @chip: the gpiochip to add the range for | |
d32651f6 | 2827 | * @pctldev: the pin controller to map to |
586a87e6 CR |
2828 | * @gpio_offset: the start offset in the current gpio_chip number space |
2829 | * @pin_group: name of the pin group inside the pin controller | |
973c1714 CL |
2830 | * |
2831 | * Calling this function directly from a DeviceTree-supported | |
2832 | * pinctrl driver is DEPRECATED. Please see Section 2.1 of | |
2833 | * Documentation/devicetree/bindings/gpio/gpio.txt on how to | |
2834 | * bind pinctrl and gpio drivers via the "gpio-ranges" property. | |
586a87e6 CR |
2835 | */ |
2836 | int gpiochip_add_pingroup_range(struct gpio_chip *chip, | |
2837 | struct pinctrl_dev *pctldev, | |
2838 | unsigned int gpio_offset, const char *pin_group) | |
2839 | { | |
2840 | struct gpio_pin_range *pin_range; | |
fdeb8e15 | 2841 | struct gpio_device *gdev = chip->gpiodev; |
586a87e6 CR |
2842 | int ret; |
2843 | ||
2844 | pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL); | |
2845 | if (!pin_range) { | |
1a2a99c6 | 2846 | chip_err(chip, "failed to allocate pin ranges\n"); |
586a87e6 CR |
2847 | return -ENOMEM; |
2848 | } | |
2849 | ||
2850 | /* Use local offset as range ID */ | |
2851 | pin_range->range.id = gpio_offset; | |
2852 | pin_range->range.gc = chip; | |
2853 | pin_range->range.name = chip->label; | |
fdeb8e15 | 2854 | pin_range->range.base = gdev->base + gpio_offset; |
586a87e6 CR |
2855 | pin_range->pctldev = pctldev; |
2856 | ||
2857 | ret = pinctrl_get_group_pins(pctldev, pin_group, | |
2858 | &pin_range->range.pins, | |
2859 | &pin_range->range.npins); | |
61c6375d MN |
2860 | if (ret < 0) { |
2861 | kfree(pin_range); | |
586a87e6 | 2862 | return ret; |
61c6375d | 2863 | } |
586a87e6 CR |
2864 | |
2865 | pinctrl_add_gpio_range(pctldev, &pin_range->range); | |
2866 | ||
1a2a99c6 AS |
2867 | chip_dbg(chip, "created GPIO range %d->%d ==> %s PINGRP %s\n", |
2868 | gpio_offset, gpio_offset + pin_range->range.npins - 1, | |
586a87e6 CR |
2869 | pinctrl_dev_get_devname(pctldev), pin_group); |
2870 | ||
20ec3e39 | 2871 | list_add_tail(&pin_range->node, &gdev->pin_ranges); |
586a87e6 CR |
2872 | |
2873 | return 0; | |
2874 | } | |
2875 | EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range); | |
2876 | ||
3f0f8670 LW |
2877 | /** |
2878 | * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping | |
2879 | * @chip: the gpiochip to add the range for | |
950d55f5 | 2880 | * @pinctl_name: the dev_name() of the pin controller to map to |
316511c0 LW |
2881 | * @gpio_offset: the start offset in the current gpio_chip number space |
2882 | * @pin_offset: the start offset in the pin controller number space | |
3f0f8670 LW |
2883 | * @npins: the number of pins from the offset of each pin space (GPIO and |
2884 | * pin controller) to accumulate in this range | |
950d55f5 TR |
2885 | * |
2886 | * Returns: | |
2887 | * 0 on success, or a negative error-code on failure. | |
973c1714 CL |
2888 | * |
2889 | * Calling this function directly from a DeviceTree-supported | |
2890 | * pinctrl driver is DEPRECATED. Please see Section 2.1 of | |
2891 | * Documentation/devicetree/bindings/gpio/gpio.txt on how to | |
2892 | * bind pinctrl and gpio drivers via the "gpio-ranges" property. | |
3f0f8670 | 2893 | */ |
1e63d7b9 | 2894 | int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, |
316511c0 | 2895 | unsigned int gpio_offset, unsigned int pin_offset, |
3f0f8670 | 2896 | unsigned int npins) |
f23f1516 SH |
2897 | { |
2898 | struct gpio_pin_range *pin_range; | |
fdeb8e15 | 2899 | struct gpio_device *gdev = chip->gpiodev; |
b4d4b1f0 | 2900 | int ret; |
f23f1516 | 2901 | |
3f0f8670 | 2902 | pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL); |
f23f1516 | 2903 | if (!pin_range) { |
1a2a99c6 | 2904 | chip_err(chip, "failed to allocate pin ranges\n"); |
1e63d7b9 | 2905 | return -ENOMEM; |
f23f1516 SH |
2906 | } |
2907 | ||
3f0f8670 | 2908 | /* Use local offset as range ID */ |
316511c0 | 2909 | pin_range->range.id = gpio_offset; |
3f0f8670 | 2910 | pin_range->range.gc = chip; |
f23f1516 | 2911 | pin_range->range.name = chip->label; |
fdeb8e15 | 2912 | pin_range->range.base = gdev->base + gpio_offset; |
316511c0 | 2913 | pin_range->range.pin_base = pin_offset; |
f23f1516 | 2914 | pin_range->range.npins = npins; |
192c369c | 2915 | pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name, |
f23f1516 | 2916 | &pin_range->range); |
8f23ca1a | 2917 | if (IS_ERR(pin_range->pctldev)) { |
b4d4b1f0 | 2918 | ret = PTR_ERR(pin_range->pctldev); |
1a2a99c6 | 2919 | chip_err(chip, "could not create pin range\n"); |
3f0f8670 | 2920 | kfree(pin_range); |
b4d4b1f0 | 2921 | return ret; |
3f0f8670 | 2922 | } |
1a2a99c6 AS |
2923 | chip_dbg(chip, "created GPIO range %d->%d ==> %s PIN %d->%d\n", |
2924 | gpio_offset, gpio_offset + npins - 1, | |
316511c0 LW |
2925 | pinctl_name, |
2926 | pin_offset, pin_offset + npins - 1); | |
f23f1516 | 2927 | |
20ec3e39 | 2928 | list_add_tail(&pin_range->node, &gdev->pin_ranges); |
1e63d7b9 LW |
2929 | |
2930 | return 0; | |
f23f1516 | 2931 | } |
165adc9c | 2932 | EXPORT_SYMBOL_GPL(gpiochip_add_pin_range); |
f23f1516 | 2933 | |
3f0f8670 LW |
2934 | /** |
2935 | * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings | |
2936 | * @chip: the chip to remove all the mappings for | |
2937 | */ | |
f23f1516 SH |
2938 | void gpiochip_remove_pin_ranges(struct gpio_chip *chip) |
2939 | { | |
2940 | struct gpio_pin_range *pin_range, *tmp; | |
20ec3e39 | 2941 | struct gpio_device *gdev = chip->gpiodev; |
f23f1516 | 2942 | |
20ec3e39 | 2943 | list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) { |
f23f1516 SH |
2944 | list_del(&pin_range->node); |
2945 | pinctrl_remove_gpio_range(pin_range->pctldev, | |
2946 | &pin_range->range); | |
3f0f8670 | 2947 | kfree(pin_range); |
f23f1516 SH |
2948 | } |
2949 | } | |
165adc9c LW |
2950 | EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges); |
2951 | ||
2952 | #endif /* CONFIG_PINCTRL */ | |
f23f1516 | 2953 | |
d2876d08 DB |
2954 | /* These "optional" allocation calls help prevent drivers from stomping |
2955 | * on each other, and help provide better diagnostics in debugfs. | |
2956 | * They're called even less than the "set direction" calls. | |
2957 | */ | |
fac9d885 | 2958 | static int gpiod_request_commit(struct gpio_desc *desc, const char *label) |
d2876d08 | 2959 | { |
fdeb8e15 | 2960 | struct gpio_chip *chip = desc->gdev->chip; |
d377f56f | 2961 | int ret; |
d2876d08 | 2962 | unsigned long flags; |
3789f5ac | 2963 | unsigned offset; |
d2876d08 | 2964 | |
18534df4 MS |
2965 | if (label) { |
2966 | label = kstrdup_const(label, GFP_KERNEL); | |
2967 | if (!label) | |
2968 | return -ENOMEM; | |
2969 | } | |
2970 | ||
bcabdef1 AC |
2971 | spin_lock_irqsave(&gpio_lock, flags); |
2972 | ||
d2876d08 | 2973 | /* NOTE: gpio_request() can be called in early boot, |
35e8bb51 | 2974 | * before IRQs are enabled, for non-sleeping (SOC) GPIOs. |
d2876d08 DB |
2975 | */ |
2976 | ||
2977 | if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) { | |
2978 | desc_set_label(desc, label ? : "?"); | |
d377f56f | 2979 | ret = 0; |
438d8908 | 2980 | } else { |
18534df4 | 2981 | kfree_const(label); |
d377f56f | 2982 | ret = -EBUSY; |
7460db56 | 2983 | goto done; |
35e8bb51 DB |
2984 | } |
2985 | ||
2986 | if (chip->request) { | |
2987 | /* chip->request may sleep */ | |
2988 | spin_unlock_irqrestore(&gpio_lock, flags); | |
3789f5ac BD |
2989 | offset = gpio_chip_hwgpio(desc); |
2990 | if (gpiochip_line_is_valid(chip, offset)) | |
d377f56f | 2991 | ret = chip->request(chip, offset); |
3789f5ac | 2992 | else |
d377f56f | 2993 | ret = -EINVAL; |
35e8bb51 DB |
2994 | spin_lock_irqsave(&gpio_lock, flags); |
2995 | ||
d377f56f | 2996 | if (ret < 0) { |
35e8bb51 | 2997 | desc_set_label(desc, NULL); |
18534df4 | 2998 | kfree_const(label); |
35e8bb51 | 2999 | clear_bit(FLAG_REQUESTED, &desc->flags); |
80b0a602 | 3000 | goto done; |
35e8bb51 | 3001 | } |
438d8908 | 3002 | } |
80b0a602 MN |
3003 | if (chip->get_direction) { |
3004 | /* chip->get_direction may sleep */ | |
3005 | spin_unlock_irqrestore(&gpio_lock, flags); | |
372e722e | 3006 | gpiod_get_direction(desc); |
80b0a602 MN |
3007 | spin_lock_irqsave(&gpio_lock, flags); |
3008 | } | |
77c2d792 MW |
3009 | done: |
3010 | spin_unlock_irqrestore(&gpio_lock, flags); | |
51c1064e BG |
3011 | atomic_notifier_call_chain(&desc->gdev->notifier, |
3012 | GPIOLINE_CHANGED_REQUESTED, desc); | |
d377f56f | 3013 | return ret; |
77c2d792 MW |
3014 | } |
3015 | ||
fdeb8e15 LW |
3016 | /* |
3017 | * This descriptor validation needs to be inserted verbatim into each | |
3018 | * function taking a descriptor, so we need to use a preprocessor | |
54d77198 LW |
3019 | * macro to avoid endless duplication. If the desc is NULL it is an |
3020 | * optional GPIO and calls should just bail out. | |
fdeb8e15 | 3021 | */ |
a746a232 RV |
3022 | static int validate_desc(const struct gpio_desc *desc, const char *func) |
3023 | { | |
3024 | if (!desc) | |
3025 | return 0; | |
3026 | if (IS_ERR(desc)) { | |
3027 | pr_warn("%s: invalid GPIO (errorpointer)\n", func); | |
3028 | return PTR_ERR(desc); | |
3029 | } | |
3030 | if (!desc->gdev) { | |
3031 | pr_warn("%s: invalid GPIO (no device)\n", func); | |
3032 | return -EINVAL; | |
3033 | } | |
3034 | if (!desc->gdev->chip) { | |
3035 | dev_warn(&desc->gdev->dev, | |
3036 | "%s: backing chip is gone\n", func); | |
3037 | return 0; | |
3038 | } | |
3039 | return 1; | |
3040 | } | |
3041 | ||
fdeb8e15 | 3042 | #define VALIDATE_DESC(desc) do { \ |
a746a232 RV |
3043 | int __valid = validate_desc(desc, __func__); \ |
3044 | if (__valid <= 0) \ | |
3045 | return __valid; \ | |
3046 | } while (0) | |
fdeb8e15 LW |
3047 | |
3048 | #define VALIDATE_DESC_VOID(desc) do { \ | |
a746a232 RV |
3049 | int __valid = validate_desc(desc, __func__); \ |
3050 | if (__valid <= 0) \ | |
fdeb8e15 | 3051 | return; \ |
a746a232 | 3052 | } while (0) |
fdeb8e15 | 3053 | |
0eb4c6c2 | 3054 | int gpiod_request(struct gpio_desc *desc, const char *label) |
77c2d792 | 3055 | { |
d377f56f | 3056 | int ret = -EPROBE_DEFER; |
fdeb8e15 | 3057 | struct gpio_device *gdev; |
77c2d792 | 3058 | |
fdeb8e15 LW |
3059 | VALIDATE_DESC(desc); |
3060 | gdev = desc->gdev; | |
77c2d792 | 3061 | |
fdeb8e15 | 3062 | if (try_module_get(gdev->owner)) { |
d377f56f LW |
3063 | ret = gpiod_request_commit(desc, label); |
3064 | if (ret < 0) | |
fdeb8e15 | 3065 | module_put(gdev->owner); |
33a68e86 LW |
3066 | else |
3067 | get_device(&gdev->dev); | |
77c2d792 MW |
3068 | } |
3069 | ||
d377f56f LW |
3070 | if (ret) |
3071 | gpiod_dbg(desc, "%s: status %d\n", __func__, ret); | |
77c2d792 | 3072 | |
d377f56f | 3073 | return ret; |
d2876d08 | 3074 | } |
372e722e | 3075 | |
fac9d885 | 3076 | static bool gpiod_free_commit(struct gpio_desc *desc) |
d2876d08 | 3077 | { |
77c2d792 | 3078 | bool ret = false; |
d2876d08 | 3079 | unsigned long flags; |
35e8bb51 | 3080 | struct gpio_chip *chip; |
d2876d08 | 3081 | |
3d599d1c UKK |
3082 | might_sleep(); |
3083 | ||
372e722e | 3084 | gpiod_unexport(desc); |
d8f388d8 | 3085 | |
d2876d08 DB |
3086 | spin_lock_irqsave(&gpio_lock, flags); |
3087 | ||
fdeb8e15 | 3088 | chip = desc->gdev->chip; |
35e8bb51 DB |
3089 | if (chip && test_bit(FLAG_REQUESTED, &desc->flags)) { |
3090 | if (chip->free) { | |
3091 | spin_unlock_irqrestore(&gpio_lock, flags); | |
9c4ba946 | 3092 | might_sleep_if(chip->can_sleep); |
372e722e | 3093 | chip->free(chip, gpio_chip_hwgpio(desc)); |
35e8bb51 DB |
3094 | spin_lock_irqsave(&gpio_lock, flags); |
3095 | } | |
18534df4 | 3096 | kfree_const(desc->label); |
d2876d08 | 3097 | desc_set_label(desc, NULL); |
07697461 | 3098 | clear_bit(FLAG_ACTIVE_LOW, &desc->flags); |
35e8bb51 | 3099 | clear_bit(FLAG_REQUESTED, &desc->flags); |
aca5ce14 | 3100 | clear_bit(FLAG_OPEN_DRAIN, &desc->flags); |
25553ff0 | 3101 | clear_bit(FLAG_OPEN_SOURCE, &desc->flags); |
9225d516 DF |
3102 | clear_bit(FLAG_PULL_UP, &desc->flags); |
3103 | clear_bit(FLAG_PULL_DOWN, &desc->flags); | |
2148ad77 | 3104 | clear_bit(FLAG_BIAS_DISABLE, &desc->flags); |
f625d460 | 3105 | clear_bit(FLAG_IS_HOGGED, &desc->flags); |
77c2d792 MW |
3106 | ret = true; |
3107 | } | |
d2876d08 DB |
3108 | |
3109 | spin_unlock_irqrestore(&gpio_lock, flags); | |
51c1064e BG |
3110 | atomic_notifier_call_chain(&desc->gdev->notifier, |
3111 | GPIOLINE_CHANGED_RELEASED, desc); | |
3112 | ||
77c2d792 MW |
3113 | return ret; |
3114 | } | |
3115 | ||
0eb4c6c2 | 3116 | void gpiod_free(struct gpio_desc *desc) |
77c2d792 | 3117 | { |
fac9d885 | 3118 | if (desc && desc->gdev && gpiod_free_commit(desc)) { |
fdeb8e15 | 3119 | module_put(desc->gdev->owner); |
33a68e86 LW |
3120 | put_device(&desc->gdev->dev); |
3121 | } else { | |
77c2d792 | 3122 | WARN_ON(extra_checks); |
33a68e86 | 3123 | } |
d2876d08 | 3124 | } |
372e722e | 3125 | |
d2876d08 DB |
3126 | /** |
3127 | * gpiochip_is_requested - return string iff signal was requested | |
3128 | * @chip: controller managing the signal | |
3129 | * @offset: of signal within controller's 0..(ngpio - 1) range | |
3130 | * | |
3131 | * Returns NULL if the GPIO is not currently requested, else a string. | |
9c8318ff AC |
3132 | * The string returned is the label passed to gpio_request(); if none has been |
3133 | * passed it is a meaningless, non-NULL constant. | |
d2876d08 DB |
3134 | * |
3135 | * This function is for use by GPIO controller drivers. The label can | |
3136 | * help with diagnostics, and knowing that the signal is used as a GPIO | |
3137 | * can help avoid accidentally multiplexing it to another controller. | |
3138 | */ | |
3139 | const char *gpiochip_is_requested(struct gpio_chip *chip, unsigned offset) | |
3140 | { | |
6c0b4e6c | 3141 | struct gpio_desc *desc; |
d2876d08 | 3142 | |
48b5953e | 3143 | if (offset >= chip->ngpio) |
d2876d08 | 3144 | return NULL; |
6c0b4e6c | 3145 | |
1c3cdb18 | 3146 | desc = &chip->gpiodev->descs[offset]; |
6c0b4e6c | 3147 | |
372e722e | 3148 | if (test_bit(FLAG_REQUESTED, &desc->flags) == 0) |
d2876d08 | 3149 | return NULL; |
372e722e | 3150 | return desc->label; |
d2876d08 DB |
3151 | } |
3152 | EXPORT_SYMBOL_GPL(gpiochip_is_requested); | |
3153 | ||
77c2d792 MW |
3154 | /** |
3155 | * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor | |
950d55f5 TR |
3156 | * @chip: GPIO chip |
3157 | * @hwnum: hardware number of the GPIO for which to request the descriptor | |
77c2d792 | 3158 | * @label: label for the GPIO |
5923ea6c LW |
3159 | * @lflags: lookup flags for this GPIO or 0 if default, this can be used to |
3160 | * specify things like line inversion semantics with the machine flags | |
3161 | * such as GPIO_OUT_LOW | |
3162 | * @dflags: descriptor request flags for this GPIO or 0 if default, this | |
3163 | * can be used to specify consumer semantics such as open drain | |
77c2d792 MW |
3164 | * |
3165 | * Function allows GPIO chip drivers to request and use their own GPIO | |
3166 | * descriptors via gpiolib API. Difference to gpiod_request() is that this | |
3167 | * function will not increase reference count of the GPIO chip module. This | |
3168 | * allows the GPIO chip module to be unloaded as needed (we assume that the | |
3169 | * GPIO chip driver handles freeing the GPIOs it has requested). | |
950d55f5 TR |
3170 | * |
3171 | * Returns: | |
3172 | * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error | |
3173 | * code on failure. | |
77c2d792 | 3174 | */ |
06863620 BG |
3175 | struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, |
3176 | unsigned int hwnum, | |
21abf103 | 3177 | const char *label, |
5923ea6c LW |
3178 | enum gpio_lookup_flags lflags, |
3179 | enum gpiod_flags dflags) | |
77c2d792 | 3180 | { |
abdc08a3 | 3181 | struct gpio_desc *desc = gpiochip_get_desc(chip, hwnum); |
d377f56f | 3182 | int ret; |
77c2d792 | 3183 | |
abdc08a3 AC |
3184 | if (IS_ERR(desc)) { |
3185 | chip_err(chip, "failed to get GPIO descriptor\n"); | |
3186 | return desc; | |
3187 | } | |
3188 | ||
d377f56f LW |
3189 | ret = gpiod_request_commit(desc, label); |
3190 | if (ret < 0) | |
3191 | return ERR_PTR(ret); | |
77c2d792 | 3192 | |
d377f56f LW |
3193 | ret = gpiod_configure_flags(desc, label, lflags, dflags); |
3194 | if (ret) { | |
21abf103 LW |
3195 | chip_err(chip, "setup of own GPIO %s failed\n", label); |
3196 | gpiod_free_commit(desc); | |
d377f56f | 3197 | return ERR_PTR(ret); |
21abf103 LW |
3198 | } |
3199 | ||
abdc08a3 | 3200 | return desc; |
77c2d792 | 3201 | } |
f7d4ad98 | 3202 | EXPORT_SYMBOL_GPL(gpiochip_request_own_desc); |
77c2d792 MW |
3203 | |
3204 | /** | |
3205 | * gpiochip_free_own_desc - Free GPIO requested by the chip driver | |
3206 | * @desc: GPIO descriptor to free | |
3207 | * | |
3208 | * Function frees the given GPIO requested previously with | |
3209 | * gpiochip_request_own_desc(). | |
3210 | */ | |
3211 | void gpiochip_free_own_desc(struct gpio_desc *desc) | |
3212 | { | |
3213 | if (desc) | |
fac9d885 | 3214 | gpiod_free_commit(desc); |
77c2d792 | 3215 | } |
f7d4ad98 | 3216 | EXPORT_SYMBOL_GPL(gpiochip_free_own_desc); |
d2876d08 | 3217 | |
fdeb8e15 LW |
3218 | /* |
3219 | * Drivers MUST set GPIO direction before making get/set calls. In | |
d2876d08 DB |
3220 | * some cases this is done in early boot, before IRQs are enabled. |
3221 | * | |
3222 | * As a rule these aren't called more than once (except for drivers | |
3223 | * using the open-drain emulation idiom) so these are natural places | |
3224 | * to accumulate extra debugging checks. Note that we can't (yet) | |
3225 | * rely on gpio_request() having been called beforehand. | |
3226 | */ | |
3227 | ||
d18fddff | 3228 | static int gpio_set_config(struct gpio_chip *gc, unsigned int offset, |
71479789 TP |
3229 | enum pin_config_param mode) |
3230 | { | |
d90f3685 BG |
3231 | if (!gc->set_config) |
3232 | return -ENOTSUPP; | |
542f3615 | 3233 | |
d90f3685 | 3234 | return gc->set_config(gc, offset, mode); |
71479789 TP |
3235 | } |
3236 | ||
2148ad77 KG |
3237 | static int gpio_set_bias(struct gpio_chip *chip, struct gpio_desc *desc) |
3238 | { | |
3239 | int bias = 0; | |
3240 | int ret = 0; | |
3241 | ||
3242 | if (test_bit(FLAG_BIAS_DISABLE, &desc->flags)) | |
3243 | bias = PIN_CONFIG_BIAS_DISABLE; | |
3244 | else if (test_bit(FLAG_PULL_UP, &desc->flags)) | |
3245 | bias = PIN_CONFIG_BIAS_PULL_UP; | |
3246 | else if (test_bit(FLAG_PULL_DOWN, &desc->flags)) | |
3247 | bias = PIN_CONFIG_BIAS_PULL_DOWN; | |
3248 | ||
3249 | if (bias) { | |
3250 | ret = gpio_set_config(chip, gpio_chip_hwgpio(desc), bias); | |
3251 | if (ret != -ENOTSUPP) | |
3252 | return ret; | |
3253 | } | |
3254 | return 0; | |
3255 | } | |
3256 | ||
79a9becd AC |
3257 | /** |
3258 | * gpiod_direction_input - set the GPIO direction to input | |
3259 | * @desc: GPIO to set to input | |
3260 | * | |
3261 | * Set the direction of the passed GPIO to input, such as gpiod_get_value() can | |
3262 | * be called safely on it. | |
3263 | * | |
3264 | * Return 0 in case of success, else an error code. | |
3265 | */ | |
3266 | int gpiod_direction_input(struct gpio_desc *desc) | |
d2876d08 | 3267 | { |
d2876d08 | 3268 | struct gpio_chip *chip; |
d377f56f | 3269 | int ret = 0; |
d2876d08 | 3270 | |
fdeb8e15 LW |
3271 | VALIDATE_DESC(desc); |
3272 | chip = desc->gdev->chip; | |
bcabdef1 | 3273 | |
e48d194d LW |
3274 | /* |
3275 | * It is legal to have no .get() and .direction_input() specified if | |
3276 | * the chip is output-only, but you can't specify .direction_input() | |
3277 | * and not support the .get() operation, that doesn't make sense. | |
3278 | */ | |
ae9847f4 | 3279 | if (!chip->get && chip->direction_input) { |
6424de5a | 3280 | gpiod_warn(desc, |
e48d194d LW |
3281 | "%s: missing get() but have direction_input()\n", |
3282 | __func__); | |
be1a4b13 LW |
3283 | return -EIO; |
3284 | } | |
3285 | ||
e48d194d LW |
3286 | /* |
3287 | * If we have a .direction_input() callback, things are simple, | |
3288 | * just call it. Else we are some input-only chip so try to check the | |
3289 | * direction (if .get_direction() is supported) else we silently | |
3290 | * assume we are in input mode after this. | |
3291 | */ | |
ae9847f4 | 3292 | if (chip->direction_input) { |
d377f56f | 3293 | ret = chip->direction_input(chip, gpio_chip_hwgpio(desc)); |
ae9847f4 RRD |
3294 | } else if (chip->get_direction && |
3295 | (chip->get_direction(chip, gpio_chip_hwgpio(desc)) != 1)) { | |
3296 | gpiod_warn(desc, | |
e48d194d LW |
3297 | "%s: missing direction_input() operation and line is output\n", |
3298 | __func__); | |
ae9847f4 RRD |
3299 | return -EIO; |
3300 | } | |
2148ad77 | 3301 | if (ret == 0) { |
d2876d08 | 3302 | clear_bit(FLAG_IS_OUT, &desc->flags); |
2148ad77 KG |
3303 | ret = gpio_set_bias(chip, desc); |
3304 | } | |
d449991c | 3305 | |
d377f56f | 3306 | trace_gpio_direction(desc_to_gpio(desc), 1, ret); |
d82da797 | 3307 | |
d377f56f | 3308 | return ret; |
d2876d08 | 3309 | } |
79a9becd | 3310 | EXPORT_SYMBOL_GPL(gpiod_direction_input); |
372e722e | 3311 | |
fac9d885 | 3312 | static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value) |
d2876d08 | 3313 | { |
c663e5f5 | 3314 | struct gpio_chip *gc = desc->gdev->chip; |
ad17731d | 3315 | int val = !!value; |
ae9847f4 | 3316 | int ret = 0; |
d2876d08 | 3317 | |
e48d194d LW |
3318 | /* |
3319 | * It's OK not to specify .direction_output() if the gpiochip is | |
3320 | * output-only, but if there is then not even a .set() operation it | |
3321 | * is pretty tricky to drive the output line. | |
3322 | */ | |
ae9847f4 | 3323 | if (!gc->set && !gc->direction_output) { |
6424de5a | 3324 | gpiod_warn(desc, |
e48d194d LW |
3325 | "%s: missing set() and direction_output() operations\n", |
3326 | __func__); | |
be1a4b13 LW |
3327 | return -EIO; |
3328 | } | |
3329 | ||
ae9847f4 RRD |
3330 | if (gc->direction_output) { |
3331 | ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val); | |
3332 | } else { | |
e48d194d | 3333 | /* Check that we are in output mode if we can */ |
ae9847f4 RRD |
3334 | if (gc->get_direction && |
3335 | gc->get_direction(gc, gpio_chip_hwgpio(desc))) { | |
3336 | gpiod_warn(desc, | |
3337 | "%s: missing direction_output() operation\n", | |
3338 | __func__); | |
3339 | return -EIO; | |
3340 | } | |
e48d194d LW |
3341 | /* |
3342 | * If we can't actively set the direction, we are some | |
3343 | * output-only chip, so just drive the output as desired. | |
3344 | */ | |
ae9847f4 RRD |
3345 | gc->set(gc, gpio_chip_hwgpio(desc), val); |
3346 | } | |
3347 | ||
c663e5f5 | 3348 | if (!ret) |
d2876d08 | 3349 | set_bit(FLAG_IS_OUT, &desc->flags); |
ad17731d | 3350 | trace_gpio_value(desc_to_gpio(desc), 0, val); |
c663e5f5 LW |
3351 | trace_gpio_direction(desc_to_gpio(desc), 0, ret); |
3352 | return ret; | |
d2876d08 | 3353 | } |
ef70bbe1 PZ |
3354 | |
3355 | /** | |
3356 | * gpiod_direction_output_raw - set the GPIO direction to output | |
3357 | * @desc: GPIO to set to output | |
3358 | * @value: initial output value of the GPIO | |
3359 | * | |
3360 | * Set the direction of the passed GPIO to output, such as gpiod_set_value() can | |
3361 | * be called safely on it. The initial value of the output must be specified | |
3362 | * as raw value on the physical line without regard for the ACTIVE_LOW status. | |
3363 | * | |
3364 | * Return 0 in case of success, else an error code. | |
3365 | */ | |
3366 | int gpiod_direction_output_raw(struct gpio_desc *desc, int value) | |
3367 | { | |
fdeb8e15 | 3368 | VALIDATE_DESC(desc); |
fac9d885 | 3369 | return gpiod_direction_output_raw_commit(desc, value); |
ef70bbe1 PZ |
3370 | } |
3371 | EXPORT_SYMBOL_GPL(gpiod_direction_output_raw); | |
3372 | ||
3373 | /** | |
90df4fe0 | 3374 | * gpiod_direction_output - set the GPIO direction to output |
ef70bbe1 PZ |
3375 | * @desc: GPIO to set to output |
3376 | * @value: initial output value of the GPIO | |
3377 | * | |
3378 | * Set the direction of the passed GPIO to output, such as gpiod_set_value() can | |
3379 | * be called safely on it. The initial value of the output must be specified | |
3380 | * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into | |
3381 | * account. | |
3382 | * | |
3383 | * Return 0 in case of success, else an error code. | |
3384 | */ | |
3385 | int gpiod_direction_output(struct gpio_desc *desc, int value) | |
3386 | { | |
30322bcf | 3387 | struct gpio_chip *gc; |
02e47980 LW |
3388 | int ret; |
3389 | ||
fdeb8e15 | 3390 | VALIDATE_DESC(desc); |
ef70bbe1 PZ |
3391 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
3392 | value = !value; | |
ad17731d LW |
3393 | else |
3394 | value = !!value; | |
02e47980 | 3395 | |
4e9439dd HV |
3396 | /* GPIOs used for enabled IRQs shall not be set as output */ |
3397 | if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) && | |
3398 | test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) { | |
02e47980 LW |
3399 | gpiod_err(desc, |
3400 | "%s: tried to set a GPIO tied to an IRQ as output\n", | |
3401 | __func__); | |
3402 | return -EIO; | |
3403 | } | |
3404 | ||
30322bcf | 3405 | gc = desc->gdev->chip; |
02e47980 LW |
3406 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) { |
3407 | /* First see if we can enable open drain in hardware */ | |
71479789 TP |
3408 | ret = gpio_set_config(gc, gpio_chip_hwgpio(desc), |
3409 | PIN_CONFIG_DRIVE_OPEN_DRAIN); | |
02e47980 LW |
3410 | if (!ret) |
3411 | goto set_output_value; | |
3412 | /* Emulate open drain by not actively driving the line high */ | |
e735244e BG |
3413 | if (value) { |
3414 | ret = gpiod_direction_input(desc); | |
3415 | goto set_output_flag; | |
3416 | } | |
02e47980 LW |
3417 | } |
3418 | else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) { | |
71479789 TP |
3419 | ret = gpio_set_config(gc, gpio_chip_hwgpio(desc), |
3420 | PIN_CONFIG_DRIVE_OPEN_SOURCE); | |
02e47980 LW |
3421 | if (!ret) |
3422 | goto set_output_value; | |
3423 | /* Emulate open source by not actively driving the line low */ | |
e735244e BG |
3424 | if (!value) { |
3425 | ret = gpiod_direction_input(desc); | |
3426 | goto set_output_flag; | |
3427 | } | |
02e47980 | 3428 | } else { |
71479789 TP |
3429 | gpio_set_config(gc, gpio_chip_hwgpio(desc), |
3430 | PIN_CONFIG_DRIVE_PUSH_PULL); | |
02e47980 LW |
3431 | } |
3432 | ||
3433 | set_output_value: | |
2821ae5f KG |
3434 | ret = gpio_set_bias(gc, desc); |
3435 | if (ret) | |
3436 | return ret; | |
fac9d885 | 3437 | return gpiod_direction_output_raw_commit(desc, value); |
e735244e BG |
3438 | |
3439 | set_output_flag: | |
3440 | /* | |
3441 | * When emulating open-source or open-drain functionalities by not | |
3442 | * actively driving the line (setting mode to input) we still need to | |
3443 | * set the IS_OUT flag or otherwise we won't be able to set the line | |
3444 | * value anymore. | |
3445 | */ | |
3446 | if (ret == 0) | |
3447 | set_bit(FLAG_IS_OUT, &desc->flags); | |
3448 | return ret; | |
ef70bbe1 | 3449 | } |
79a9becd | 3450 | EXPORT_SYMBOL_GPL(gpiod_direction_output); |
d2876d08 | 3451 | |
c4b5be98 | 3452 | /** |
950d55f5 TR |
3453 | * gpiod_set_debounce - sets @debounce time for a GPIO |
3454 | * @desc: descriptor of the GPIO for which to set debounce time | |
3455 | * @debounce: debounce time in microseconds | |
65d87656 | 3456 | * |
950d55f5 TR |
3457 | * Returns: |
3458 | * 0 on success, %-ENOTSUPP if the controller doesn't support setting the | |
3459 | * debounce time. | |
c4b5be98 | 3460 | */ |
79a9becd | 3461 | int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce) |
c4b5be98 | 3462 | { |
c4b5be98 | 3463 | struct gpio_chip *chip; |
2956b5d9 | 3464 | unsigned long config; |
c4b5be98 | 3465 | |
fdeb8e15 LW |
3466 | VALIDATE_DESC(desc); |
3467 | chip = desc->gdev->chip; | |
be1a4b13 | 3468 | |
2956b5d9 | 3469 | config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce); |
d18fddff | 3470 | return gpio_set_config(chip, gpio_chip_hwgpio(desc), config); |
c4b5be98 | 3471 | } |
79a9becd | 3472 | EXPORT_SYMBOL_GPL(gpiod_set_debounce); |
372e722e | 3473 | |
e10f72bf AJ |
3474 | /** |
3475 | * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset | |
3476 | * @desc: descriptor of the GPIO for which to configure persistence | |
3477 | * @transitory: True to lose state on suspend or reset, false for persistence | |
3478 | * | |
3479 | * Returns: | |
3480 | * 0 on success, otherwise a negative error code. | |
3481 | */ | |
3482 | int gpiod_set_transitory(struct gpio_desc *desc, bool transitory) | |
3483 | { | |
3484 | struct gpio_chip *chip; | |
3485 | unsigned long packed; | |
3486 | int gpio; | |
3487 | int rc; | |
3488 | ||
156dd392 | 3489 | VALIDATE_DESC(desc); |
e10f72bf AJ |
3490 | /* |
3491 | * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for | |
3492 | * persistence state. | |
3493 | */ | |
4fc5bfeb | 3494 | assign_bit(FLAG_TRANSITORY, &desc->flags, transitory); |
e10f72bf AJ |
3495 | |
3496 | /* If the driver supports it, set the persistence state now */ | |
3497 | chip = desc->gdev->chip; | |
3498 | if (!chip->set_config) | |
3499 | return 0; | |
3500 | ||
3501 | packed = pinconf_to_config_packed(PIN_CONFIG_PERSIST_STATE, | |
3502 | !transitory); | |
3503 | gpio = gpio_chip_hwgpio(desc); | |
d18fddff | 3504 | rc = gpio_set_config(chip, gpio, packed); |
e10f72bf AJ |
3505 | if (rc == -ENOTSUPP) { |
3506 | dev_dbg(&desc->gdev->dev, "Persistence not supported for GPIO %d\n", | |
3507 | gpio); | |
3508 | return 0; | |
3509 | } | |
3510 | ||
3511 | return rc; | |
3512 | } | |
3513 | EXPORT_SYMBOL_GPL(gpiod_set_transitory); | |
3514 | ||
79a9becd AC |
3515 | /** |
3516 | * gpiod_is_active_low - test whether a GPIO is active-low or not | |
3517 | * @desc: the gpio descriptor to test | |
3518 | * | |
3519 | * Returns 1 if the GPIO is active-low, 0 otherwise. | |
3520 | */ | |
3521 | int gpiod_is_active_low(const struct gpio_desc *desc) | |
372e722e | 3522 | { |
fdeb8e15 | 3523 | VALIDATE_DESC(desc); |
79a9becd | 3524 | return test_bit(FLAG_ACTIVE_LOW, &desc->flags); |
372e722e | 3525 | } |
79a9becd | 3526 | EXPORT_SYMBOL_GPL(gpiod_is_active_low); |
d2876d08 | 3527 | |
d3a5bcb4 MM |
3528 | /** |
3529 | * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not | |
3530 | * @desc: the gpio descriptor to change | |
3531 | */ | |
3532 | void gpiod_toggle_active_low(struct gpio_desc *desc) | |
3533 | { | |
3534 | VALIDATE_DESC_VOID(desc); | |
3535 | change_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
3536 | } | |
3537 | EXPORT_SYMBOL_GPL(gpiod_toggle_active_low); | |
3538 | ||
d2876d08 DB |
3539 | /* I/O calls are only valid after configuration completed; the relevant |
3540 | * "is this a valid GPIO" error checks should already have been done. | |
3541 | * | |
3542 | * "Get" operations are often inlinable as reading a pin value register, | |
3543 | * and masking the relevant bit in that register. | |
3544 | * | |
3545 | * When "set" operations are inlinable, they involve writing that mask to | |
3546 | * one register to set a low value, or a different register to set it high. | |
3547 | * Otherwise locking is needed, so there may be little value to inlining. | |
3548 | * | |
3549 | *------------------------------------------------------------------------ | |
3550 | * | |
3551 | * IMPORTANT!!! The hot paths -- get/set value -- assume that callers | |
3552 | * have requested the GPIO. That can include implicit requesting by | |
3553 | * a direction setting call. Marking a gpio as requested locks its chip | |
3554 | * in memory, guaranteeing that these table lookups need no more locking | |
3555 | * and that gpiochip_remove() will fail. | |
3556 | * | |
3557 | * REVISIT when debugging, consider adding some instrumentation to ensure | |
3558 | * that the GPIO was actually requested. | |
3559 | */ | |
3560 | ||
fac9d885 | 3561 | static int gpiod_get_raw_value_commit(const struct gpio_desc *desc) |
d2876d08 DB |
3562 | { |
3563 | struct gpio_chip *chip; | |
372e722e | 3564 | int offset; |
e20538b8 | 3565 | int value; |
d2876d08 | 3566 | |
fdeb8e15 | 3567 | chip = desc->gdev->chip; |
372e722e | 3568 | offset = gpio_chip_hwgpio(desc); |
e20538b8 | 3569 | value = chip->get ? chip->get(chip, offset) : -EIO; |
723a6303 | 3570 | value = value < 0 ? value : !!value; |
372e722e | 3571 | trace_gpio_value(desc_to_gpio(desc), 1, value); |
3f397c21 | 3572 | return value; |
d2876d08 | 3573 | } |
372e722e | 3574 | |
eec1d566 LW |
3575 | static int gpio_chip_get_multiple(struct gpio_chip *chip, |
3576 | unsigned long *mask, unsigned long *bits) | |
3577 | { | |
3578 | if (chip->get_multiple) { | |
3579 | return chip->get_multiple(chip, mask, bits); | |
3580 | } else if (chip->get) { | |
3581 | int i, value; | |
3582 | ||
3583 | for_each_set_bit(i, mask, chip->ngpio) { | |
3584 | value = chip->get(chip, i); | |
3585 | if (value < 0) | |
3586 | return value; | |
3587 | __assign_bit(i, bits, value); | |
3588 | } | |
3589 | return 0; | |
3590 | } | |
3591 | return -EIO; | |
3592 | } | |
3593 | ||
3594 | int gpiod_get_array_value_complex(bool raw, bool can_sleep, | |
3595 | unsigned int array_size, | |
3596 | struct gpio_desc **desc_array, | |
77588c14 | 3597 | struct gpio_array *array_info, |
b9762beb | 3598 | unsigned long *value_bitmap) |
eec1d566 | 3599 | { |
d377f56f | 3600 | int ret, i = 0; |
b17566a6 JK |
3601 | |
3602 | /* | |
3603 | * Validate array_info against desc_array and its size. | |
3604 | * It should immediately follow desc_array if both | |
3605 | * have been obtained from the same gpiod_get_array() call. | |
3606 | */ | |
3607 | if (array_info && array_info->desc == desc_array && | |
3608 | array_size <= array_info->size && | |
3609 | (void *)array_info == desc_array + array_info->size) { | |
3610 | if (!can_sleep) | |
3611 | WARN_ON(array_info->chip->can_sleep); | |
3612 | ||
d377f56f | 3613 | ret = gpio_chip_get_multiple(array_info->chip, |
b17566a6 JK |
3614 | array_info->get_mask, |
3615 | value_bitmap); | |
d377f56f LW |
3616 | if (ret) |
3617 | return ret; | |
b17566a6 JK |
3618 | |
3619 | if (!raw && !bitmap_empty(array_info->invert_mask, array_size)) | |
3620 | bitmap_xor(value_bitmap, value_bitmap, | |
3621 | array_info->invert_mask, array_size); | |
3622 | ||
3623 | if (bitmap_full(array_info->get_mask, array_size)) | |
3624 | return 0; | |
3625 | ||
3626 | i = find_first_zero_bit(array_info->get_mask, array_size); | |
3627 | } else { | |
3628 | array_info = NULL; | |
3629 | } | |
eec1d566 LW |
3630 | |
3631 | while (i < array_size) { | |
3632 | struct gpio_chip *chip = desc_array[i]->gdev->chip; | |
3027743f LA |
3633 | unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)]; |
3634 | unsigned long *mask, *bits; | |
eec1d566 LW |
3635 | int first, j, ret; |
3636 | ||
3027743f LA |
3637 | if (likely(chip->ngpio <= FASTPATH_NGPIO)) { |
3638 | mask = fastpath; | |
3639 | } else { | |
3640 | mask = kmalloc_array(2 * BITS_TO_LONGS(chip->ngpio), | |
3641 | sizeof(*mask), | |
3642 | can_sleep ? GFP_KERNEL : GFP_ATOMIC); | |
3643 | if (!mask) | |
3644 | return -ENOMEM; | |
3645 | } | |
3646 | ||
3647 | bits = mask + BITS_TO_LONGS(chip->ngpio); | |
3648 | bitmap_zero(mask, chip->ngpio); | |
3649 | ||
eec1d566 LW |
3650 | if (!can_sleep) |
3651 | WARN_ON(chip->can_sleep); | |
3652 | ||
3653 | /* collect all inputs belonging to the same chip */ | |
3654 | first = i; | |
eec1d566 LW |
3655 | do { |
3656 | const struct gpio_desc *desc = desc_array[i]; | |
3657 | int hwgpio = gpio_chip_hwgpio(desc); | |
3658 | ||
3659 | __set_bit(hwgpio, mask); | |
3660 | i++; | |
b17566a6 JK |
3661 | |
3662 | if (array_info) | |
35ae7f96 JK |
3663 | i = find_next_zero_bit(array_info->get_mask, |
3664 | array_size, i); | |
eec1d566 LW |
3665 | } while ((i < array_size) && |
3666 | (desc_array[i]->gdev->chip == chip)); | |
3667 | ||
3668 | ret = gpio_chip_get_multiple(chip, mask, bits); | |
3027743f LA |
3669 | if (ret) { |
3670 | if (mask != fastpath) | |
3671 | kfree(mask); | |
eec1d566 | 3672 | return ret; |
3027743f | 3673 | } |
eec1d566 | 3674 | |
b17566a6 | 3675 | for (j = first; j < i; ) { |
eec1d566 LW |
3676 | const struct gpio_desc *desc = desc_array[j]; |
3677 | int hwgpio = gpio_chip_hwgpio(desc); | |
3678 | int value = test_bit(hwgpio, bits); | |
3679 | ||
3680 | if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
3681 | value = !value; | |
b9762beb | 3682 | __assign_bit(j, value_bitmap, value); |
eec1d566 | 3683 | trace_gpio_value(desc_to_gpio(desc), 1, value); |
799d5eb4 | 3684 | j++; |
b17566a6 JK |
3685 | |
3686 | if (array_info) | |
35ae7f96 JK |
3687 | j = find_next_zero_bit(array_info->get_mask, i, |
3688 | j); | |
eec1d566 | 3689 | } |
3027743f LA |
3690 | |
3691 | if (mask != fastpath) | |
3692 | kfree(mask); | |
eec1d566 LW |
3693 | } |
3694 | return 0; | |
3695 | } | |
3696 | ||
d2876d08 | 3697 | /** |
79a9becd AC |
3698 | * gpiod_get_raw_value() - return a gpio's raw value |
3699 | * @desc: gpio whose value will be returned | |
d2876d08 | 3700 | * |
79a9becd | 3701 | * Return the GPIO's raw value, i.e. the value of the physical line disregarding |
e20538b8 | 3702 | * its ACTIVE_LOW status, or negative errno on failure. |
79a9becd | 3703 | * |
827a9b8b | 3704 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 3705 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 3706 | */ |
79a9becd | 3707 | int gpiod_get_raw_value(const struct gpio_desc *desc) |
d2876d08 | 3708 | { |
fdeb8e15 | 3709 | VALIDATE_DESC(desc); |
3285170f | 3710 | /* Should be using gpiod_get_raw_value_cansleep() */ |
fdeb8e15 | 3711 | WARN_ON(desc->gdev->chip->can_sleep); |
fac9d885 | 3712 | return gpiod_get_raw_value_commit(desc); |
d2876d08 | 3713 | } |
79a9becd | 3714 | EXPORT_SYMBOL_GPL(gpiod_get_raw_value); |
372e722e | 3715 | |
79a9becd AC |
3716 | /** |
3717 | * gpiod_get_value() - return a gpio's value | |
3718 | * @desc: gpio whose value will be returned | |
3719 | * | |
3720 | * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into | |
e20538b8 | 3721 | * account, or negative errno on failure. |
79a9becd | 3722 | * |
827a9b8b | 3723 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd AC |
3724 | * complain if the GPIO chip functions potentially sleep. |
3725 | */ | |
3726 | int gpiod_get_value(const struct gpio_desc *desc) | |
372e722e | 3727 | { |
79a9becd | 3728 | int value; |
fdeb8e15 LW |
3729 | |
3730 | VALIDATE_DESC(desc); | |
3285170f | 3731 | /* Should be using gpiod_get_value_cansleep() */ |
fdeb8e15 | 3732 | WARN_ON(desc->gdev->chip->can_sleep); |
79a9becd | 3733 | |
fac9d885 | 3734 | value = gpiod_get_raw_value_commit(desc); |
e20538b8 BA |
3735 | if (value < 0) |
3736 | return value; | |
3737 | ||
79a9becd AC |
3738 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
3739 | value = !value; | |
3740 | ||
3741 | return value; | |
372e722e | 3742 | } |
79a9becd | 3743 | EXPORT_SYMBOL_GPL(gpiod_get_value); |
d2876d08 | 3744 | |
eec1d566 LW |
3745 | /** |
3746 | * gpiod_get_raw_array_value() - read raw values from an array of GPIOs | |
b9762beb | 3747 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 3748 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 3749 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3750 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
3751 | * |
3752 | * Read the raw values of the GPIOs, i.e. the values of the physical lines | |
3753 | * without regard for their ACTIVE_LOW status. Return 0 in case of success, | |
3754 | * else an error code. | |
3755 | * | |
827a9b8b | 3756 | * This function can be called from contexts where we cannot sleep, |
eec1d566 LW |
3757 | * and it will complain if the GPIO chip functions potentially sleep. |
3758 | */ | |
3759 | int gpiod_get_raw_array_value(unsigned int array_size, | |
b9762beb | 3760 | struct gpio_desc **desc_array, |
77588c14 | 3761 | struct gpio_array *array_info, |
b9762beb | 3762 | unsigned long *value_bitmap) |
eec1d566 LW |
3763 | { |
3764 | if (!desc_array) | |
3765 | return -EINVAL; | |
3766 | return gpiod_get_array_value_complex(true, false, array_size, | |
77588c14 JK |
3767 | desc_array, array_info, |
3768 | value_bitmap); | |
eec1d566 LW |
3769 | } |
3770 | EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value); | |
3771 | ||
3772 | /** | |
3773 | * gpiod_get_array_value() - read values from an array of GPIOs | |
b9762beb | 3774 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 3775 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 3776 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 3777 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
3778 | * |
3779 | * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
3780 | * into account. Return 0 in case of success, else an error code. | |
3781 | * | |
827a9b8b | 3782 | * This function can be called from contexts where we cannot sleep, |
eec1d566 LW |
3783 | * and it will complain if the GPIO chip functions potentially sleep. |
3784 | */ | |
3785 | int gpiod_get_array_value(unsigned int array_size, | |
b9762beb | 3786 | struct gpio_desc **desc_array, |
77588c14 | 3787 | struct gpio_array *array_info, |
b9762beb | 3788 | unsigned long *value_bitmap) |
eec1d566 LW |
3789 | { |
3790 | if (!desc_array) | |
3791 | return -EINVAL; | |
3792 | return gpiod_get_array_value_complex(false, false, array_size, | |
77588c14 JK |
3793 | desc_array, array_info, |
3794 | value_bitmap); | |
eec1d566 LW |
3795 | } |
3796 | EXPORT_SYMBOL_GPL(gpiod_get_array_value); | |
3797 | ||
aca5ce14 | 3798 | /* |
fac9d885 | 3799 | * gpio_set_open_drain_value_commit() - Set the open drain gpio's value. |
79a9becd | 3800 | * @desc: gpio descriptor whose state need to be set. |
20a8a968 | 3801 | * @value: Non-zero for setting it HIGH otherwise it will set to LOW. |
aca5ce14 | 3802 | */ |
fac9d885 | 3803 | static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value) |
aca5ce14 | 3804 | { |
d377f56f | 3805 | int ret = 0; |
fdeb8e15 | 3806 | struct gpio_chip *chip = desc->gdev->chip; |
372e722e AC |
3807 | int offset = gpio_chip_hwgpio(desc); |
3808 | ||
aca5ce14 | 3809 | if (value) { |
d377f56f | 3810 | ret = chip->direction_input(chip, offset); |
aca5ce14 | 3811 | } else { |
d377f56f LW |
3812 | ret = chip->direction_output(chip, offset, 0); |
3813 | if (!ret) | |
372e722e | 3814 | set_bit(FLAG_IS_OUT, &desc->flags); |
aca5ce14 | 3815 | } |
d377f56f LW |
3816 | trace_gpio_direction(desc_to_gpio(desc), value, ret); |
3817 | if (ret < 0) | |
6424de5a MB |
3818 | gpiod_err(desc, |
3819 | "%s: Error in set_value for open drain err %d\n", | |
d377f56f | 3820 | __func__, ret); |
aca5ce14 LD |
3821 | } |
3822 | ||
25553ff0 | 3823 | /* |
79a9becd AC |
3824 | * _gpio_set_open_source_value() - Set the open source gpio's value. |
3825 | * @desc: gpio descriptor whose state need to be set. | |
20a8a968 | 3826 | * @value: Non-zero for setting it HIGH otherwise it will set to LOW. |
25553ff0 | 3827 | */ |
fac9d885 | 3828 | static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value) |
25553ff0 | 3829 | { |
d377f56f | 3830 | int ret = 0; |
fdeb8e15 | 3831 | struct gpio_chip *chip = desc->gdev->chip; |
372e722e AC |
3832 | int offset = gpio_chip_hwgpio(desc); |
3833 | ||
25553ff0 | 3834 | if (value) { |
d377f56f LW |
3835 | ret = chip->direction_output(chip, offset, 1); |
3836 | if (!ret) | |
372e722e | 3837 | set_bit(FLAG_IS_OUT, &desc->flags); |
25553ff0 | 3838 | } else { |
d377f56f | 3839 | ret = chip->direction_input(chip, offset); |
25553ff0 | 3840 | } |
d377f56f LW |
3841 | trace_gpio_direction(desc_to_gpio(desc), !value, ret); |
3842 | if (ret < 0) | |
6424de5a MB |
3843 | gpiod_err(desc, |
3844 | "%s: Error in set_value for open source err %d\n", | |
d377f56f | 3845 | __func__, ret); |
25553ff0 LD |
3846 | } |
3847 | ||
fac9d885 | 3848 | static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value) |
d2876d08 DB |
3849 | { |
3850 | struct gpio_chip *chip; | |
3851 | ||
fdeb8e15 | 3852 | chip = desc->gdev->chip; |
372e722e | 3853 | trace_gpio_value(desc_to_gpio(desc), 0, value); |
02e47980 | 3854 | chip->set(chip, gpio_chip_hwgpio(desc), value); |
372e722e AC |
3855 | } |
3856 | ||
5f424243 RI |
3857 | /* |
3858 | * set multiple outputs on the same chip; | |
3859 | * use the chip's set_multiple function if available; | |
3860 | * otherwise set the outputs sequentially; | |
3861 | * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word | |
3862 | * defines which outputs are to be changed | |
3863 | * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word | |
3864 | * defines the values the outputs specified by mask are to be set to | |
3865 | */ | |
3866 | static void gpio_chip_set_multiple(struct gpio_chip *chip, | |
3867 | unsigned long *mask, unsigned long *bits) | |
3868 | { | |
3869 | if (chip->set_multiple) { | |
3870 | chip->set_multiple(chip, mask, bits); | |
3871 | } else { | |
5e4e6fb3 AS |
3872 | unsigned int i; |
3873 | ||
3874 | /* set outputs if the corresponding mask bit is set */ | |
3875 | for_each_set_bit(i, mask, chip->ngpio) | |
3876 | chip->set(chip, i, test_bit(i, bits)); | |
5f424243 RI |
3877 | } |
3878 | } | |
3879 | ||
3027743f | 3880 | int gpiod_set_array_value_complex(bool raw, bool can_sleep, |
3c940660 GU |
3881 | unsigned int array_size, |
3882 | struct gpio_desc **desc_array, | |
3883 | struct gpio_array *array_info, | |
3884 | unsigned long *value_bitmap) | |
5f424243 RI |
3885 | { |
3886 | int i = 0; | |
3887 | ||
b17566a6 JK |
3888 | /* |
3889 | * Validate array_info against desc_array and its size. | |
3890 | * It should immediately follow desc_array if both | |
3891 | * have been obtained from the same gpiod_get_array() call. | |
3892 | */ | |
3893 | if (array_info && array_info->desc == desc_array && | |
3894 | array_size <= array_info->size && | |
3895 | (void *)array_info == desc_array + array_info->size) { | |
3896 | if (!can_sleep) | |
3897 | WARN_ON(array_info->chip->can_sleep); | |
3898 | ||
3899 | if (!raw && !bitmap_empty(array_info->invert_mask, array_size)) | |
3900 | bitmap_xor(value_bitmap, value_bitmap, | |
3901 | array_info->invert_mask, array_size); | |
3902 | ||
3903 | gpio_chip_set_multiple(array_info->chip, array_info->set_mask, | |
3904 | value_bitmap); | |
3905 | ||
3906 | if (bitmap_full(array_info->set_mask, array_size)) | |
3907 | return 0; | |
3908 | ||
3909 | i = find_first_zero_bit(array_info->set_mask, array_size); | |
3910 | } else { | |
3911 | array_info = NULL; | |
3912 | } | |
3913 | ||
5f424243 | 3914 | while (i < array_size) { |
fdeb8e15 | 3915 | struct gpio_chip *chip = desc_array[i]->gdev->chip; |
3027743f LA |
3916 | unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)]; |
3917 | unsigned long *mask, *bits; | |
5f424243 RI |
3918 | int count = 0; |
3919 | ||
3027743f LA |
3920 | if (likely(chip->ngpio <= FASTPATH_NGPIO)) { |
3921 | mask = fastpath; | |
3922 | } else { | |
3923 | mask = kmalloc_array(2 * BITS_TO_LONGS(chip->ngpio), | |
3924 | sizeof(*mask), | |
3925 | can_sleep ? GFP_KERNEL : GFP_ATOMIC); | |
3926 | if (!mask) | |
3927 | return -ENOMEM; | |
3928 | } | |
3929 | ||
3930 | bits = mask + BITS_TO_LONGS(chip->ngpio); | |
3931 | bitmap_zero(mask, chip->ngpio); | |
3932 | ||
38e003f4 | 3933 | if (!can_sleep) |
5f424243 | 3934 | WARN_ON(chip->can_sleep); |
38e003f4 | 3935 | |
5f424243 RI |
3936 | do { |
3937 | struct gpio_desc *desc = desc_array[i]; | |
3938 | int hwgpio = gpio_chip_hwgpio(desc); | |
b9762beb | 3939 | int value = test_bit(i, value_bitmap); |
5f424243 | 3940 | |
b17566a6 JK |
3941 | /* |
3942 | * Pins applicable for fast input but not for | |
3943 | * fast output processing may have been already | |
3944 | * inverted inside the fast path, skip them. | |
3945 | */ | |
3946 | if (!raw && !(array_info && | |
3947 | test_bit(i, array_info->invert_mask)) && | |
3948 | test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
5f424243 RI |
3949 | value = !value; |
3950 | trace_gpio_value(desc_to_gpio(desc), 0, value); | |
3951 | /* | |
3952 | * collect all normal outputs belonging to the same chip | |
3953 | * open drain and open source outputs are set individually | |
3954 | */ | |
02e47980 | 3955 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) { |
fac9d885 | 3956 | gpio_set_open_drain_value_commit(desc, value); |
02e47980 | 3957 | } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) { |
fac9d885 | 3958 | gpio_set_open_source_value_commit(desc, value); |
5f424243 RI |
3959 | } else { |
3960 | __set_bit(hwgpio, mask); | |
4fc5bfeb | 3961 | __assign_bit(hwgpio, bits, value); |
5f424243 RI |
3962 | count++; |
3963 | } | |
3964 | i++; | |
b17566a6 JK |
3965 | |
3966 | if (array_info) | |
35ae7f96 JK |
3967 | i = find_next_zero_bit(array_info->set_mask, |
3968 | array_size, i); | |
fdeb8e15 LW |
3969 | } while ((i < array_size) && |
3970 | (desc_array[i]->gdev->chip == chip)); | |
5f424243 | 3971 | /* push collected bits to outputs */ |
38e003f4 | 3972 | if (count != 0) |
5f424243 | 3973 | gpio_chip_set_multiple(chip, mask, bits); |
3027743f LA |
3974 | |
3975 | if (mask != fastpath) | |
3976 | kfree(mask); | |
5f424243 | 3977 | } |
3027743f | 3978 | return 0; |
5f424243 RI |
3979 | } |
3980 | ||
d2876d08 | 3981 | /** |
79a9becd AC |
3982 | * gpiod_set_raw_value() - assign a gpio's raw value |
3983 | * @desc: gpio whose value will be assigned | |
d2876d08 | 3984 | * @value: value to assign |
d2876d08 | 3985 | * |
79a9becd AC |
3986 | * Set the raw value of the GPIO, i.e. the value of its physical line without |
3987 | * regard for its ACTIVE_LOW status. | |
3988 | * | |
827a9b8b | 3989 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 3990 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 3991 | */ |
79a9becd | 3992 | void gpiod_set_raw_value(struct gpio_desc *desc, int value) |
372e722e | 3993 | { |
fdeb8e15 | 3994 | VALIDATE_DESC_VOID(desc); |
3285170f | 3995 | /* Should be using gpiod_set_raw_value_cansleep() */ |
fdeb8e15 | 3996 | WARN_ON(desc->gdev->chip->can_sleep); |
fac9d885 | 3997 | gpiod_set_raw_value_commit(desc, value); |
d2876d08 | 3998 | } |
79a9becd | 3999 | EXPORT_SYMBOL_GPL(gpiod_set_raw_value); |
d2876d08 | 4000 | |
1e77fc82 GU |
4001 | /** |
4002 | * gpiod_set_value_nocheck() - set a GPIO line value without checking | |
4003 | * @desc: the descriptor to set the value on | |
4004 | * @value: value to set | |
4005 | * | |
4006 | * This sets the value of a GPIO line backing a descriptor, applying | |
4007 | * different semantic quirks like active low and open drain/source | |
4008 | * handling. | |
4009 | */ | |
4010 | static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value) | |
4011 | { | |
4012 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) | |
4013 | value = !value; | |
4014 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) | |
4015 | gpio_set_open_drain_value_commit(desc, value); | |
4016 | else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) | |
4017 | gpio_set_open_source_value_commit(desc, value); | |
4018 | else | |
4019 | gpiod_set_raw_value_commit(desc, value); | |
4020 | } | |
4021 | ||
d2876d08 | 4022 | /** |
79a9becd AC |
4023 | * gpiod_set_value() - assign a gpio's value |
4024 | * @desc: gpio whose value will be assigned | |
4025 | * @value: value to assign | |
4026 | * | |
02e47980 LW |
4027 | * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW, |
4028 | * OPEN_DRAIN and OPEN_SOURCE flags into account. | |
d2876d08 | 4029 | * |
827a9b8b | 4030 | * This function can be called from contexts where we cannot sleep, and will |
79a9becd | 4031 | * complain if the GPIO chip functions potentially sleep. |
d2876d08 | 4032 | */ |
79a9becd | 4033 | void gpiod_set_value(struct gpio_desc *desc, int value) |
d2876d08 | 4034 | { |
fdeb8e15 | 4035 | VALIDATE_DESC_VOID(desc); |
3285170f | 4036 | /* Should be using gpiod_set_value_cansleep() */ |
fdeb8e15 | 4037 | WARN_ON(desc->gdev->chip->can_sleep); |
1e77fc82 | 4038 | gpiod_set_value_nocheck(desc, value); |
372e722e | 4039 | } |
79a9becd | 4040 | EXPORT_SYMBOL_GPL(gpiod_set_value); |
d2876d08 | 4041 | |
5f424243 | 4042 | /** |
3fff99bc | 4043 | * gpiod_set_raw_array_value() - assign values to an array of GPIOs |
b9762beb | 4044 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 4045 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 4046 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 4047 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
4048 | * |
4049 | * Set the raw values of the GPIOs, i.e. the values of the physical lines | |
4050 | * without regard for their ACTIVE_LOW status. | |
4051 | * | |
827a9b8b | 4052 | * This function can be called from contexts where we cannot sleep, and will |
5f424243 RI |
4053 | * complain if the GPIO chip functions potentially sleep. |
4054 | */ | |
3027743f | 4055 | int gpiod_set_raw_array_value(unsigned int array_size, |
3c940660 GU |
4056 | struct gpio_desc **desc_array, |
4057 | struct gpio_array *array_info, | |
4058 | unsigned long *value_bitmap) | |
5f424243 RI |
4059 | { |
4060 | if (!desc_array) | |
3027743f LA |
4061 | return -EINVAL; |
4062 | return gpiod_set_array_value_complex(true, false, array_size, | |
77588c14 | 4063 | desc_array, array_info, value_bitmap); |
5f424243 | 4064 | } |
3fff99bc | 4065 | EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value); |
5f424243 RI |
4066 | |
4067 | /** | |
3fff99bc | 4068 | * gpiod_set_array_value() - assign values to an array of GPIOs |
b9762beb | 4069 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 4070 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 4071 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 4072 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
4073 | * |
4074 | * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
4075 | * into account. | |
4076 | * | |
827a9b8b | 4077 | * This function can be called from contexts where we cannot sleep, and will |
5f424243 RI |
4078 | * complain if the GPIO chip functions potentially sleep. |
4079 | */ | |
cf9af0d5 GU |
4080 | int gpiod_set_array_value(unsigned int array_size, |
4081 | struct gpio_desc **desc_array, | |
4082 | struct gpio_array *array_info, | |
4083 | unsigned long *value_bitmap) | |
5f424243 RI |
4084 | { |
4085 | if (!desc_array) | |
cf9af0d5 GU |
4086 | return -EINVAL; |
4087 | return gpiod_set_array_value_complex(false, false, array_size, | |
4088 | desc_array, array_info, | |
4089 | value_bitmap); | |
5f424243 | 4090 | } |
3fff99bc | 4091 | EXPORT_SYMBOL_GPL(gpiod_set_array_value); |
5f424243 | 4092 | |
d2876d08 | 4093 | /** |
79a9becd AC |
4094 | * gpiod_cansleep() - report whether gpio value access may sleep |
4095 | * @desc: gpio to check | |
d2876d08 | 4096 | * |
d2876d08 | 4097 | */ |
79a9becd | 4098 | int gpiod_cansleep(const struct gpio_desc *desc) |
372e722e | 4099 | { |
fdeb8e15 LW |
4100 | VALIDATE_DESC(desc); |
4101 | return desc->gdev->chip->can_sleep; | |
d2876d08 | 4102 | } |
79a9becd | 4103 | EXPORT_SYMBOL_GPL(gpiod_cansleep); |
d2876d08 | 4104 | |
90b39402 LW |
4105 | /** |
4106 | * gpiod_set_consumer_name() - set the consumer name for the descriptor | |
4107 | * @desc: gpio to set the consumer name on | |
4108 | * @name: the new consumer name | |
4109 | */ | |
18534df4 | 4110 | int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name) |
90b39402 | 4111 | { |
18534df4 MS |
4112 | VALIDATE_DESC(desc); |
4113 | if (name) { | |
4114 | name = kstrdup_const(name, GFP_KERNEL); | |
4115 | if (!name) | |
4116 | return -ENOMEM; | |
4117 | } | |
4118 | ||
4119 | kfree_const(desc->label); | |
4120 | desc_set_label(desc, name); | |
4121 | ||
4122 | return 0; | |
90b39402 LW |
4123 | } |
4124 | EXPORT_SYMBOL_GPL(gpiod_set_consumer_name); | |
4125 | ||
0f6d504e | 4126 | /** |
79a9becd AC |
4127 | * gpiod_to_irq() - return the IRQ corresponding to a GPIO |
4128 | * @desc: gpio whose IRQ will be returned (already requested) | |
0f6d504e | 4129 | * |
79a9becd AC |
4130 | * Return the IRQ corresponding to the passed GPIO, or an error code in case of |
4131 | * error. | |
0f6d504e | 4132 | */ |
79a9becd | 4133 | int gpiod_to_irq(const struct gpio_desc *desc) |
0f6d504e | 4134 | { |
4c37ce86 LW |
4135 | struct gpio_chip *chip; |
4136 | int offset; | |
0f6d504e | 4137 | |
79bb71bd LW |
4138 | /* |
4139 | * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics | |
4140 | * requires this function to not return zero on an invalid descriptor | |
4141 | * but rather a negative error number. | |
4142 | */ | |
bfbbe44d | 4143 | if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip) |
79bb71bd LW |
4144 | return -EINVAL; |
4145 | ||
fdeb8e15 | 4146 | chip = desc->gdev->chip; |
372e722e | 4147 | offset = gpio_chip_hwgpio(desc); |
4c37ce86 LW |
4148 | if (chip->to_irq) { |
4149 | int retirq = chip->to_irq(chip, offset); | |
4150 | ||
4151 | /* Zero means NO_IRQ */ | |
4152 | if (!retirq) | |
4153 | return -ENXIO; | |
4154 | ||
4155 | return retirq; | |
4156 | } | |
4157 | return -ENXIO; | |
0f6d504e | 4158 | } |
79a9becd | 4159 | EXPORT_SYMBOL_GPL(gpiod_to_irq); |
0f6d504e | 4160 | |
d468bf9e | 4161 | /** |
e3a2e878 | 4162 | * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ |
d74be6df AC |
4163 | * @chip: the chip the GPIO to lock belongs to |
4164 | * @offset: the offset of the GPIO to lock as IRQ | |
d468bf9e LW |
4165 | * |
4166 | * This is used directly by GPIO drivers that want to lock down | |
f438acdf | 4167 | * a certain GPIO line to be used for IRQs. |
d468bf9e | 4168 | */ |
e3a2e878 | 4169 | int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset) |
372e722e | 4170 | { |
9c10280d LW |
4171 | struct gpio_desc *desc; |
4172 | ||
4173 | desc = gpiochip_get_desc(chip, offset); | |
4174 | if (IS_ERR(desc)) | |
4175 | return PTR_ERR(desc); | |
4176 | ||
60f8339e LW |
4177 | /* |
4178 | * If it's fast: flush the direction setting if something changed | |
4179 | * behind our back | |
4180 | */ | |
4181 | if (!chip->can_sleep && chip->get_direction) { | |
80956790 | 4182 | int dir = gpiod_get_direction(desc); |
9c10280d | 4183 | |
36b31279 AS |
4184 | if (dir < 0) { |
4185 | chip_err(chip, "%s: cannot get GPIO direction\n", | |
4186 | __func__); | |
4187 | return dir; | |
4188 | } | |
9c10280d | 4189 | } |
d468bf9e | 4190 | |
9c10280d | 4191 | if (test_bit(FLAG_IS_OUT, &desc->flags)) { |
d74be6df | 4192 | chip_err(chip, |
b1911710 AS |
4193 | "%s: tried to flag a GPIO set as output for IRQ\n", |
4194 | __func__); | |
d468bf9e LW |
4195 | return -EIO; |
4196 | } | |
4197 | ||
9c10280d | 4198 | set_bit(FLAG_USED_AS_IRQ, &desc->flags); |
4e9439dd | 4199 | set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3940c34a LW |
4200 | |
4201 | /* | |
4202 | * If the consumer has not set up a label (such as when the | |
4203 | * IRQ is referenced from .to_irq()) we set up a label here | |
4204 | * so it is clear this is used as an interrupt. | |
4205 | */ | |
4206 | if (!desc->label) | |
4207 | desc_set_label(desc, "interrupt"); | |
4208 | ||
d468bf9e | 4209 | return 0; |
372e722e | 4210 | } |
e3a2e878 | 4211 | EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq); |
d2876d08 | 4212 | |
d468bf9e | 4213 | /** |
e3a2e878 | 4214 | * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ |
d74be6df AC |
4215 | * @chip: the chip the GPIO to lock belongs to |
4216 | * @offset: the offset of the GPIO to lock as IRQ | |
d468bf9e LW |
4217 | * |
4218 | * This is used directly by GPIO drivers that want to indicate | |
4219 | * that a certain GPIO is no longer used exclusively for IRQ. | |
d2876d08 | 4220 | */ |
e3a2e878 | 4221 | void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset) |
d468bf9e | 4222 | { |
3940c34a LW |
4223 | struct gpio_desc *desc; |
4224 | ||
4225 | desc = gpiochip_get_desc(chip, offset); | |
4226 | if (IS_ERR(desc)) | |
d468bf9e | 4227 | return; |
d2876d08 | 4228 | |
3940c34a | 4229 | clear_bit(FLAG_USED_AS_IRQ, &desc->flags); |
4e9439dd | 4230 | clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); |
3940c34a LW |
4231 | |
4232 | /* If we only had this marking, erase it */ | |
4233 | if (desc->label && !strcmp(desc->label, "interrupt")) | |
4234 | desc_set_label(desc, NULL); | |
d468bf9e | 4235 | } |
e3a2e878 | 4236 | EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq); |
d468bf9e | 4237 | |
4e9439dd HV |
4238 | void gpiochip_disable_irq(struct gpio_chip *chip, unsigned int offset) |
4239 | { | |
4240 | struct gpio_desc *desc = gpiochip_get_desc(chip, offset); | |
4241 | ||
4242 | if (!IS_ERR(desc) && | |
4243 | !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) | |
4244 | clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); | |
4245 | } | |
4246 | EXPORT_SYMBOL_GPL(gpiochip_disable_irq); | |
4247 | ||
4248 | void gpiochip_enable_irq(struct gpio_chip *chip, unsigned int offset) | |
4249 | { | |
4250 | struct gpio_desc *desc = gpiochip_get_desc(chip, offset); | |
4251 | ||
4252 | if (!IS_ERR(desc) && | |
4253 | !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) { | |
4254 | WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags)); | |
4255 | set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags); | |
4256 | } | |
4257 | } | |
4258 | EXPORT_SYMBOL_GPL(gpiochip_enable_irq); | |
4259 | ||
6cee3821 LW |
4260 | bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset) |
4261 | { | |
4262 | if (offset >= chip->ngpio) | |
4263 | return false; | |
4264 | ||
4265 | return test_bit(FLAG_USED_AS_IRQ, &chip->gpiodev->descs[offset].flags); | |
4266 | } | |
4267 | EXPORT_SYMBOL_GPL(gpiochip_line_is_irq); | |
4268 | ||
4e6b8238 HV |
4269 | int gpiochip_reqres_irq(struct gpio_chip *chip, unsigned int offset) |
4270 | { | |
4271 | int ret; | |
4272 | ||
4273 | if (!try_module_get(chip->gpiodev->owner)) | |
4274 | return -ENODEV; | |
4275 | ||
4276 | ret = gpiochip_lock_as_irq(chip, offset); | |
4277 | if (ret) { | |
4278 | chip_err(chip, "unable to lock HW IRQ %u for IRQ\n", offset); | |
4279 | module_put(chip->gpiodev->owner); | |
4280 | return ret; | |
4281 | } | |
4282 | return 0; | |
4283 | } | |
4284 | EXPORT_SYMBOL_GPL(gpiochip_reqres_irq); | |
4285 | ||
4286 | void gpiochip_relres_irq(struct gpio_chip *chip, unsigned int offset) | |
4287 | { | |
4288 | gpiochip_unlock_as_irq(chip, offset); | |
4289 | module_put(chip->gpiodev->owner); | |
4290 | } | |
4291 | EXPORT_SYMBOL_GPL(gpiochip_relres_irq); | |
4292 | ||
143b65d6 LW |
4293 | bool gpiochip_line_is_open_drain(struct gpio_chip *chip, unsigned int offset) |
4294 | { | |
4295 | if (offset >= chip->ngpio) | |
4296 | return false; | |
4297 | ||
4298 | return test_bit(FLAG_OPEN_DRAIN, &chip->gpiodev->descs[offset].flags); | |
4299 | } | |
4300 | EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain); | |
4301 | ||
4302 | bool gpiochip_line_is_open_source(struct gpio_chip *chip, unsigned int offset) | |
4303 | { | |
4304 | if (offset >= chip->ngpio) | |
4305 | return false; | |
4306 | ||
4307 | return test_bit(FLAG_OPEN_SOURCE, &chip->gpiodev->descs[offset].flags); | |
4308 | } | |
4309 | EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source); | |
4310 | ||
05f479bf CK |
4311 | bool gpiochip_line_is_persistent(struct gpio_chip *chip, unsigned int offset) |
4312 | { | |
4313 | if (offset >= chip->ngpio) | |
4314 | return false; | |
4315 | ||
e10f72bf | 4316 | return !test_bit(FLAG_TRANSITORY, &chip->gpiodev->descs[offset].flags); |
05f479bf CK |
4317 | } |
4318 | EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent); | |
4319 | ||
79a9becd AC |
4320 | /** |
4321 | * gpiod_get_raw_value_cansleep() - return a gpio's raw value | |
4322 | * @desc: gpio whose value will be returned | |
4323 | * | |
4324 | * Return the GPIO's raw value, i.e. the value of the physical line disregarding | |
e20538b8 | 4325 | * its ACTIVE_LOW status, or negative errno on failure. |
79a9becd AC |
4326 | * |
4327 | * This function is to be called from contexts that can sleep. | |
d2876d08 | 4328 | */ |
79a9becd | 4329 | int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc) |
d2876d08 | 4330 | { |
d2876d08 | 4331 | might_sleep_if(extra_checks); |
fdeb8e15 | 4332 | VALIDATE_DESC(desc); |
fac9d885 | 4333 | return gpiod_get_raw_value_commit(desc); |
d2876d08 | 4334 | } |
79a9becd | 4335 | EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep); |
372e722e | 4336 | |
79a9becd AC |
4337 | /** |
4338 | * gpiod_get_value_cansleep() - return a gpio's value | |
4339 | * @desc: gpio whose value will be returned | |
4340 | * | |
4341 | * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into | |
e20538b8 | 4342 | * account, or negative errno on failure. |
79a9becd AC |
4343 | * |
4344 | * This function is to be called from contexts that can sleep. | |
4345 | */ | |
4346 | int gpiod_get_value_cansleep(const struct gpio_desc *desc) | |
d2876d08 | 4347 | { |
3f397c21 | 4348 | int value; |
d2876d08 DB |
4349 | |
4350 | might_sleep_if(extra_checks); | |
fdeb8e15 | 4351 | VALIDATE_DESC(desc); |
fac9d885 | 4352 | value = gpiod_get_raw_value_commit(desc); |
e20538b8 BA |
4353 | if (value < 0) |
4354 | return value; | |
4355 | ||
79a9becd AC |
4356 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
4357 | value = !value; | |
4358 | ||
3f397c21 | 4359 | return value; |
d2876d08 | 4360 | } |
79a9becd | 4361 | EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep); |
372e722e | 4362 | |
eec1d566 LW |
4363 | /** |
4364 | * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs | |
b9762beb | 4365 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 4366 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 4367 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 4368 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
4369 | * |
4370 | * Read the raw values of the GPIOs, i.e. the values of the physical lines | |
4371 | * without regard for their ACTIVE_LOW status. Return 0 in case of success, | |
4372 | * else an error code. | |
4373 | * | |
4374 | * This function is to be called from contexts that can sleep. | |
4375 | */ | |
4376 | int gpiod_get_raw_array_value_cansleep(unsigned int array_size, | |
4377 | struct gpio_desc **desc_array, | |
77588c14 | 4378 | struct gpio_array *array_info, |
b9762beb | 4379 | unsigned long *value_bitmap) |
eec1d566 LW |
4380 | { |
4381 | might_sleep_if(extra_checks); | |
4382 | if (!desc_array) | |
4383 | return -EINVAL; | |
4384 | return gpiod_get_array_value_complex(true, true, array_size, | |
77588c14 JK |
4385 | desc_array, array_info, |
4386 | value_bitmap); | |
eec1d566 LW |
4387 | } |
4388 | EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep); | |
4389 | ||
4390 | /** | |
4391 | * gpiod_get_array_value_cansleep() - read values from an array of GPIOs | |
b9762beb | 4392 | * @array_size: number of elements in the descriptor array / value bitmap |
eec1d566 | 4393 | * @desc_array: array of GPIO descriptors whose values will be read |
77588c14 | 4394 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 4395 | * @value_bitmap: bitmap to store the read values |
eec1d566 LW |
4396 | * |
4397 | * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
4398 | * into account. Return 0 in case of success, else an error code. | |
4399 | * | |
4400 | * This function is to be called from contexts that can sleep. | |
4401 | */ | |
4402 | int gpiod_get_array_value_cansleep(unsigned int array_size, | |
4403 | struct gpio_desc **desc_array, | |
77588c14 | 4404 | struct gpio_array *array_info, |
b9762beb | 4405 | unsigned long *value_bitmap) |
eec1d566 LW |
4406 | { |
4407 | might_sleep_if(extra_checks); | |
4408 | if (!desc_array) | |
4409 | return -EINVAL; | |
4410 | return gpiod_get_array_value_complex(false, true, array_size, | |
77588c14 JK |
4411 | desc_array, array_info, |
4412 | value_bitmap); | |
eec1d566 LW |
4413 | } |
4414 | EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep); | |
4415 | ||
79a9becd AC |
4416 | /** |
4417 | * gpiod_set_raw_value_cansleep() - assign a gpio's raw value | |
4418 | * @desc: gpio whose value will be assigned | |
4419 | * @value: value to assign | |
4420 | * | |
4421 | * Set the raw value of the GPIO, i.e. the value of its physical line without | |
4422 | * regard for its ACTIVE_LOW status. | |
4423 | * | |
4424 | * This function is to be called from contexts that can sleep. | |
4425 | */ | |
4426 | void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value) | |
372e722e | 4427 | { |
d2876d08 | 4428 | might_sleep_if(extra_checks); |
fdeb8e15 | 4429 | VALIDATE_DESC_VOID(desc); |
fac9d885 | 4430 | gpiod_set_raw_value_commit(desc, value); |
372e722e | 4431 | } |
79a9becd | 4432 | EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep); |
d2876d08 | 4433 | |
79a9becd AC |
4434 | /** |
4435 | * gpiod_set_value_cansleep() - assign a gpio's value | |
4436 | * @desc: gpio whose value will be assigned | |
4437 | * @value: value to assign | |
4438 | * | |
4439 | * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into | |
4440 | * account | |
4441 | * | |
4442 | * This function is to be called from contexts that can sleep. | |
4443 | */ | |
4444 | void gpiod_set_value_cansleep(struct gpio_desc *desc, int value) | |
d2876d08 | 4445 | { |
d2876d08 | 4446 | might_sleep_if(extra_checks); |
fdeb8e15 | 4447 | VALIDATE_DESC_VOID(desc); |
1e77fc82 | 4448 | gpiod_set_value_nocheck(desc, value); |
372e722e | 4449 | } |
79a9becd | 4450 | EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep); |
d2876d08 | 4451 | |
5f424243 | 4452 | /** |
3fff99bc | 4453 | * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs |
b9762beb | 4454 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 4455 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 4456 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 4457 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
4458 | * |
4459 | * Set the raw values of the GPIOs, i.e. the values of the physical lines | |
4460 | * without regard for their ACTIVE_LOW status. | |
4461 | * | |
4462 | * This function is to be called from contexts that can sleep. | |
4463 | */ | |
3027743f | 4464 | int gpiod_set_raw_array_value_cansleep(unsigned int array_size, |
3c940660 GU |
4465 | struct gpio_desc **desc_array, |
4466 | struct gpio_array *array_info, | |
4467 | unsigned long *value_bitmap) | |
5f424243 RI |
4468 | { |
4469 | might_sleep_if(extra_checks); | |
4470 | if (!desc_array) | |
3027743f LA |
4471 | return -EINVAL; |
4472 | return gpiod_set_array_value_complex(true, true, array_size, desc_array, | |
77588c14 | 4473 | array_info, value_bitmap); |
5f424243 | 4474 | } |
3fff99bc | 4475 | EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep); |
5f424243 | 4476 | |
3946d187 DT |
4477 | /** |
4478 | * gpiod_add_lookup_tables() - register GPIO device consumers | |
4479 | * @tables: list of tables of consumers to register | |
4480 | * @n: number of tables in the list | |
4481 | */ | |
4482 | void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n) | |
4483 | { | |
4484 | unsigned int i; | |
4485 | ||
4486 | mutex_lock(&gpio_lookup_lock); | |
4487 | ||
4488 | for (i = 0; i < n; i++) | |
4489 | list_add_tail(&tables[i]->list, &gpio_lookup_list); | |
4490 | ||
4491 | mutex_unlock(&gpio_lookup_lock); | |
4492 | } | |
4493 | ||
5f424243 | 4494 | /** |
3fff99bc | 4495 | * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs |
b9762beb | 4496 | * @array_size: number of elements in the descriptor array / value bitmap |
5f424243 | 4497 | * @desc_array: array of GPIO descriptors whose values will be assigned |
77588c14 | 4498 | * @array_info: information on applicability of fast bitmap processing path |
b9762beb | 4499 | * @value_bitmap: bitmap of values to assign |
5f424243 RI |
4500 | * |
4501 | * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status | |
4502 | * into account. | |
4503 | * | |
4504 | * This function is to be called from contexts that can sleep. | |
4505 | */ | |
cf9af0d5 GU |
4506 | int gpiod_set_array_value_cansleep(unsigned int array_size, |
4507 | struct gpio_desc **desc_array, | |
4508 | struct gpio_array *array_info, | |
4509 | unsigned long *value_bitmap) | |
5f424243 RI |
4510 | { |
4511 | might_sleep_if(extra_checks); | |
4512 | if (!desc_array) | |
cf9af0d5 GU |
4513 | return -EINVAL; |
4514 | return gpiod_set_array_value_complex(false, true, array_size, | |
4515 | desc_array, array_info, | |
4516 | value_bitmap); | |
5f424243 | 4517 | } |
3fff99bc | 4518 | EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep); |
5f424243 | 4519 | |
bae48da2 | 4520 | /** |
ad824783 AC |
4521 | * gpiod_add_lookup_table() - register GPIO device consumers |
4522 | * @table: table of consumers to register | |
bae48da2 | 4523 | */ |
ad824783 | 4524 | void gpiod_add_lookup_table(struct gpiod_lookup_table *table) |
bae48da2 AC |
4525 | { |
4526 | mutex_lock(&gpio_lookup_lock); | |
4527 | ||
ad824783 | 4528 | list_add_tail(&table->list, &gpio_lookup_list); |
bae48da2 AC |
4529 | |
4530 | mutex_unlock(&gpio_lookup_lock); | |
4531 | } | |
226b2242 | 4532 | EXPORT_SYMBOL_GPL(gpiod_add_lookup_table); |
bae48da2 | 4533 | |
be9015ab SK |
4534 | /** |
4535 | * gpiod_remove_lookup_table() - unregister GPIO device consumers | |
4536 | * @table: table of consumers to unregister | |
4537 | */ | |
4538 | void gpiod_remove_lookup_table(struct gpiod_lookup_table *table) | |
4539 | { | |
4540 | mutex_lock(&gpio_lookup_lock); | |
4541 | ||
4542 | list_del(&table->list); | |
4543 | ||
4544 | mutex_unlock(&gpio_lookup_lock); | |
4545 | } | |
226b2242 | 4546 | EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table); |
be9015ab | 4547 | |
a411e81e BG |
4548 | /** |
4549 | * gpiod_add_hogs() - register a set of GPIO hogs from machine code | |
4550 | * @hogs: table of gpio hog entries with a zeroed sentinel at the end | |
4551 | */ | |
4552 | void gpiod_add_hogs(struct gpiod_hog *hogs) | |
4553 | { | |
4554 | struct gpio_chip *chip; | |
4555 | struct gpiod_hog *hog; | |
4556 | ||
4557 | mutex_lock(&gpio_machine_hogs_mutex); | |
4558 | ||
4559 | for (hog = &hogs[0]; hog->chip_label; hog++) { | |
4560 | list_add_tail(&hog->list, &gpio_machine_hogs); | |
4561 | ||
4562 | /* | |
4563 | * The chip may have been registered earlier, so check if it | |
4564 | * exists and, if so, try to hog the line now. | |
4565 | */ | |
4566 | chip = find_chip_by_name(hog->chip_label); | |
4567 | if (chip) | |
4568 | gpiochip_machine_hog(chip, hog); | |
4569 | } | |
4570 | ||
4571 | mutex_unlock(&gpio_machine_hogs_mutex); | |
4572 | } | |
4573 | EXPORT_SYMBOL_GPL(gpiod_add_hogs); | |
4574 | ||
ad824783 | 4575 | static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev) |
bae48da2 AC |
4576 | { |
4577 | const char *dev_id = dev ? dev_name(dev) : NULL; | |
ad824783 | 4578 | struct gpiod_lookup_table *table; |
bae48da2 AC |
4579 | |
4580 | mutex_lock(&gpio_lookup_lock); | |
4581 | ||
ad824783 AC |
4582 | list_for_each_entry(table, &gpio_lookup_list, list) { |
4583 | if (table->dev_id && dev_id) { | |
4584 | /* | |
4585 | * Valid strings on both ends, must be identical to have | |
4586 | * a match | |
4587 | */ | |
4588 | if (!strcmp(table->dev_id, dev_id)) | |
4589 | goto found; | |
4590 | } else { | |
4591 | /* | |
4592 | * One of the pointers is NULL, so both must be to have | |
4593 | * a match | |
4594 | */ | |
4595 | if (dev_id == table->dev_id) | |
4596 | goto found; | |
4597 | } | |
4598 | } | |
4599 | table = NULL; | |
bae48da2 | 4600 | |
ad824783 AC |
4601 | found: |
4602 | mutex_unlock(&gpio_lookup_lock); | |
4603 | return table; | |
4604 | } | |
bae48da2 | 4605 | |
ad824783 | 4606 | static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id, |
fed7026a | 4607 | unsigned int idx, unsigned long *flags) |
ad824783 | 4608 | { |
2a3cf6a3 | 4609 | struct gpio_desc *desc = ERR_PTR(-ENOENT); |
ad824783 AC |
4610 | struct gpiod_lookup_table *table; |
4611 | struct gpiod_lookup *p; | |
bae48da2 | 4612 | |
ad824783 AC |
4613 | table = gpiod_find_lookup_table(dev); |
4614 | if (!table) | |
4615 | return desc; | |
bae48da2 | 4616 | |
ad824783 AC |
4617 | for (p = &table->table[0]; p->chip_label; p++) { |
4618 | struct gpio_chip *chip; | |
bae48da2 | 4619 | |
ad824783 | 4620 | /* idx must always match exactly */ |
bae48da2 AC |
4621 | if (p->idx != idx) |
4622 | continue; | |
4623 | ||
ad824783 AC |
4624 | /* If the lookup entry has a con_id, require exact match */ |
4625 | if (p->con_id && (!con_id || strcmp(p->con_id, con_id))) | |
4626 | continue; | |
bae48da2 | 4627 | |
ad824783 | 4628 | chip = find_chip_by_name(p->chip_label); |
bae48da2 | 4629 | |
ad824783 | 4630 | if (!chip) { |
8853daf3 JK |
4631 | /* |
4632 | * As the lookup table indicates a chip with | |
4633 | * p->chip_label should exist, assume it may | |
4634 | * still appear later and let the interested | |
4635 | * consumer be probed again or let the Deferred | |
4636 | * Probe infrastructure handle the error. | |
4637 | */ | |
4638 | dev_warn(dev, "cannot find GPIO chip %s, deferring\n", | |
4639 | p->chip_label); | |
4640 | return ERR_PTR(-EPROBE_DEFER); | |
ad824783 | 4641 | } |
bae48da2 | 4642 | |
ad824783 | 4643 | if (chip->ngpio <= p->chip_hwnum) { |
2a3cf6a3 | 4644 | dev_err(dev, |
d935bd50 GU |
4645 | "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n", |
4646 | idx, p->chip_hwnum, chip->ngpio - 1, | |
4647 | chip->label); | |
2a3cf6a3 | 4648 | return ERR_PTR(-EINVAL); |
bae48da2 | 4649 | } |
bae48da2 | 4650 | |
bb1e88cc | 4651 | desc = gpiochip_get_desc(chip, p->chip_hwnum); |
ad824783 | 4652 | *flags = p->flags; |
bae48da2 | 4653 | |
2a3cf6a3 | 4654 | return desc; |
bae48da2 AC |
4655 | } |
4656 | ||
bae48da2 AC |
4657 | return desc; |
4658 | } | |
4659 | ||
66858527 RI |
4660 | static int platform_gpio_count(struct device *dev, const char *con_id) |
4661 | { | |
4662 | struct gpiod_lookup_table *table; | |
4663 | struct gpiod_lookup *p; | |
4664 | unsigned int count = 0; | |
4665 | ||
4666 | table = gpiod_find_lookup_table(dev); | |
4667 | if (!table) | |
4668 | return -ENOENT; | |
4669 | ||
4670 | for (p = &table->table[0]; p->chip_label; p++) { | |
4671 | if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) || | |
4672 | (!con_id && !p->con_id)) | |
4673 | count++; | |
4674 | } | |
4675 | if (!count) | |
4676 | return -ENOENT; | |
4677 | ||
4678 | return count; | |
4679 | } | |
4680 | ||
13949fa9 DT |
4681 | /** |
4682 | * fwnode_gpiod_get_index - obtain a GPIO from firmware node | |
4683 | * @fwnode: handle of the firmware node | |
4684 | * @con_id: function within the GPIO consumer | |
4685 | * @index: index of the GPIO to obtain for the consumer | |
4686 | * @flags: GPIO initialization flags | |
4687 | * @label: label to attach to the requested GPIO | |
4688 | * | |
4689 | * This function can be used for drivers that get their configuration | |
4690 | * from opaque firmware. | |
4691 | * | |
4692 | * The function properly finds the corresponding GPIO using whatever is the | |
4693 | * underlying firmware interface and then makes sure that the GPIO | |
4694 | * descriptor is requested before it is returned to the caller. | |
4695 | * | |
4696 | * Returns: | |
4697 | * On successful request the GPIO pin is configured in accordance with | |
4698 | * provided @flags. | |
4699 | * | |
4700 | * In case of error an ERR_PTR() is returned. | |
4701 | */ | |
4702 | struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode, | |
4703 | const char *con_id, int index, | |
4704 | enum gpiod_flags flags, | |
4705 | const char *label) | |
4706 | { | |
4707 | struct gpio_desc *desc; | |
4708 | char prop_name[32]; /* 32 is max size of property name */ | |
4709 | unsigned int i; | |
4710 | ||
4711 | for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) { | |
4712 | if (con_id) | |
4713 | snprintf(prop_name, sizeof(prop_name), "%s-%s", | |
4714 | con_id, gpio_suffixes[i]); | |
4715 | else | |
4716 | snprintf(prop_name, sizeof(prop_name), "%s", | |
4717 | gpio_suffixes[i]); | |
4718 | ||
4719 | desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags, | |
4720 | label); | |
4721 | if (!IS_ERR(desc) || (PTR_ERR(desc) != -ENOENT)) | |
4722 | break; | |
4723 | } | |
4724 | ||
4725 | return desc; | |
4726 | } | |
4727 | EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index); | |
4728 | ||
66858527 RI |
4729 | /** |
4730 | * gpiod_count - return the number of GPIOs associated with a device / function | |
4731 | * or -ENOENT if no GPIO has been assigned to the requested function | |
4732 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4733 | * @con_id: function within the GPIO consumer | |
4734 | */ | |
4735 | int gpiod_count(struct device *dev, const char *con_id) | |
4736 | { | |
4737 | int count = -ENOENT; | |
4738 | ||
4739 | if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node) | |
f626d6df | 4740 | count = of_gpio_get_count(dev, con_id); |
66858527 RI |
4741 | else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev)) |
4742 | count = acpi_gpio_count(dev, con_id); | |
4743 | ||
4744 | if (count < 0) | |
4745 | count = platform_gpio_count(dev, con_id); | |
4746 | ||
4747 | return count; | |
4748 | } | |
4749 | EXPORT_SYMBOL_GPL(gpiod_count); | |
4750 | ||
bae48da2 | 4751 | /** |
0879162f | 4752 | * gpiod_get - obtain a GPIO for a given GPIO function |
ad824783 | 4753 | * @dev: GPIO consumer, can be NULL for system-global GPIOs |
bae48da2 | 4754 | * @con_id: function within the GPIO consumer |
39b2bbe3 | 4755 | * @flags: optional GPIO initialization flags |
bae48da2 AC |
4756 | * |
4757 | * Return the GPIO descriptor corresponding to the function con_id of device | |
2a3cf6a3 | 4758 | * dev, -ENOENT if no GPIO has been assigned to the requested function, or |
20a8a968 | 4759 | * another IS_ERR() code if an error occurred while trying to acquire the GPIO. |
bae48da2 | 4760 | */ |
b17d1bf1 | 4761 | struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id, |
39b2bbe3 | 4762 | enum gpiod_flags flags) |
bae48da2 | 4763 | { |
39b2bbe3 | 4764 | return gpiod_get_index(dev, con_id, 0, flags); |
bae48da2 | 4765 | } |
b17d1bf1 | 4766 | EXPORT_SYMBOL_GPL(gpiod_get); |
bae48da2 | 4767 | |
29a1f233 TR |
4768 | /** |
4769 | * gpiod_get_optional - obtain an optional GPIO for a given GPIO function | |
4770 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
4771 | * @con_id: function within the GPIO consumer | |
39b2bbe3 | 4772 | * @flags: optional GPIO initialization flags |
29a1f233 TR |
4773 | * |
4774 | * This is equivalent to gpiod_get(), except that when no GPIO was assigned to | |
4775 | * the requested function it will return NULL. This is convenient for drivers | |
4776 | * that need to handle optional GPIOs. | |
4777 | */ | |
b17d1bf1 | 4778 | struct gpio_desc *__must_check gpiod_get_optional(struct device *dev, |
39b2bbe3 AC |
4779 | const char *con_id, |
4780 | enum gpiod_flags flags) | |
29a1f233 | 4781 | { |
39b2bbe3 | 4782 | return gpiod_get_index_optional(dev, con_id, 0, flags); |
29a1f233 | 4783 | } |
b17d1bf1 | 4784 | EXPORT_SYMBOL_GPL(gpiod_get_optional); |
29a1f233 | 4785 | |
f625d460 BP |
4786 | |
4787 | /** | |
4788 | * gpiod_configure_flags - helper function to configure a given GPIO | |
4789 | * @desc: gpio whose value will be assigned | |
4790 | * @con_id: function within the GPIO consumer | |
fed7026a AS |
4791 | * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from |
4792 | * of_find_gpio() or of_get_gpio_hog() | |
f625d460 BP |
4793 | * @dflags: gpiod_flags - optional GPIO initialization flags |
4794 | * | |
4795 | * Return 0 on success, -ENOENT if no GPIO has been assigned to the | |
4796 | * requested function and/or index, or another IS_ERR() code if an error | |
4797 | * occurred while trying to acquire the GPIO. | |
4798 | */ | |
c29fd9eb | 4799 | int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id, |
85b03b30 | 4800 | unsigned long lflags, enum gpiod_flags dflags) |
f625d460 | 4801 | { |
d377f56f | 4802 | int ret; |
f625d460 | 4803 | |
85b03b30 JH |
4804 | if (lflags & GPIO_ACTIVE_LOW) |
4805 | set_bit(FLAG_ACTIVE_LOW, &desc->flags); | |
f926dfc1 | 4806 | |
85b03b30 JH |
4807 | if (lflags & GPIO_OPEN_DRAIN) |
4808 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | |
f926dfc1 LW |
4809 | else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) { |
4810 | /* | |
4811 | * This enforces open drain mode from the consumer side. | |
4812 | * This is necessary for some busses like I2C, but the lookup | |
4813 | * should *REALLY* have specified them as open drain in the | |
4814 | * first place, so print a little warning here. | |
4815 | */ | |
4816 | set_bit(FLAG_OPEN_DRAIN, &desc->flags); | |
4817 | gpiod_warn(desc, | |
4818 | "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n"); | |
4819 | } | |
4820 | ||
85b03b30 JH |
4821 | if (lflags & GPIO_OPEN_SOURCE) |
4822 | set_bit(FLAG_OPEN_SOURCE, &desc->flags); | |
e10f72bf | 4823 | |
d449991c TP |
4824 | if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) { |
4825 | gpiod_err(desc, | |
4826 | "both pull-up and pull-down enabled, invalid configuration\n"); | |
4827 | return -EINVAL; | |
4828 | } | |
4829 | ||
4830 | if (lflags & GPIO_PULL_UP) | |
4831 | set_bit(FLAG_PULL_UP, &desc->flags); | |
4832 | else if (lflags & GPIO_PULL_DOWN) | |
4833 | set_bit(FLAG_PULL_DOWN, &desc->flags); | |
4834 | ||
d377f56f LW |
4835 | ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY)); |
4836 | if (ret < 0) | |
4837 | return ret; | |
85b03b30 | 4838 | |
f625d460 BP |
4839 | /* No particular flag request, return here... */ |
4840 | if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) { | |
4841 | pr_debug("no flags found for %s\n", con_id); | |
4842 | return 0; | |
4843 | } | |
4844 | ||
4845 | /* Process flags */ | |
4846 | if (dflags & GPIOD_FLAGS_BIT_DIR_OUT) | |
d377f56f | 4847 | ret = gpiod_direction_output(desc, |
ad17731d | 4848 | !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL)); |
f625d460 | 4849 | else |
d377f56f | 4850 | ret = gpiod_direction_input(desc); |
f625d460 | 4851 | |
d377f56f | 4852 | return ret; |
f625d460 BP |
4853 | } |
4854 | ||
bae48da2 AC |
4855 | /** |
4856 | * gpiod_get_index - obtain a GPIO from a multi-index GPIO function | |
fdd6a5fe | 4857 | * @dev: GPIO consumer, can be NULL for system-global GPIOs |
bae48da2 AC |
4858 | * @con_id: function within the GPIO consumer |
4859 | * @idx: index of the GPIO to obtain in the consumer | |
39b2bbe3 | 4860 | * @flags: optional GPIO initialization flags |
bae48da2 AC |
4861 | * |
4862 | * This variant of gpiod_get() allows to access GPIOs other than the first | |
4863 | * defined one for functions that define several GPIOs. | |
4864 | * | |
2a3cf6a3 AC |
4865 | * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the |
4866 | * requested function and/or index, or another IS_ERR() code if an error | |
20a8a968 | 4867 | * occurred while trying to acquire the GPIO. |
bae48da2 | 4868 | */ |
b17d1bf1 | 4869 | struct gpio_desc *__must_check gpiod_get_index(struct device *dev, |
bae48da2 | 4870 | const char *con_id, |
39b2bbe3 AC |
4871 | unsigned int idx, |
4872 | enum gpiod_flags flags) | |
bae48da2 | 4873 | { |
2d6c06f5 | 4874 | unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT; |
35c5d7fd | 4875 | struct gpio_desc *desc = NULL; |
d377f56f | 4876 | int ret; |
7d18f0a1 LW |
4877 | /* Maybe we have a device name, maybe not */ |
4878 | const char *devname = dev ? dev_name(dev) : "?"; | |
bae48da2 AC |
4879 | |
4880 | dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id); | |
4881 | ||
4d8440b9 RW |
4882 | if (dev) { |
4883 | /* Using device tree? */ | |
4884 | if (IS_ENABLED(CONFIG_OF) && dev->of_node) { | |
4885 | dev_dbg(dev, "using device tree for GPIO lookup\n"); | |
4886 | desc = of_find_gpio(dev, con_id, idx, &lookupflags); | |
4887 | } else if (ACPI_COMPANION(dev)) { | |
4888 | dev_dbg(dev, "using ACPI for GPIO lookup\n"); | |
a31f5c3a | 4889 | desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags); |
4d8440b9 | 4890 | } |
35c5d7fd AC |
4891 | } |
4892 | ||
4893 | /* | |
4894 | * Either we are not using DT or ACPI, or their lookup did not return | |
4895 | * a result. In that case, use platform lookup as a fallback. | |
4896 | */ | |
2a3cf6a3 | 4897 | if (!desc || desc == ERR_PTR(-ENOENT)) { |
43a8785a | 4898 | dev_dbg(dev, "using lookup tables for GPIO lookup\n"); |
39b2bbe3 | 4899 | desc = gpiod_find(dev, con_id, idx, &lookupflags); |
bae48da2 AC |
4900 | } |
4901 | ||
4902 | if (IS_ERR(desc)) { | |
9d5a1f2c | 4903 | dev_dbg(dev, "No GPIO consumer %s found\n", con_id); |
bae48da2 AC |
4904 | return desc; |
4905 | } | |
4906 | ||
7d18f0a1 LW |
4907 | /* |
4908 | * If a connection label was passed use that, else attempt to use | |
4909 | * the device name as label | |
4910 | */ | |
d377f56f LW |
4911 | ret = gpiod_request(desc, con_id ? con_id : devname); |
4912 | if (ret < 0) { | |
4913 | if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) { | |
b0ce7b29 LW |
4914 | /* |
4915 | * This happens when there are several consumers for | |
4916 | * the same GPIO line: we just return here without | |
4917 | * further initialization. It is a bit if a hack. | |
4918 | * This is necessary to support fixed regulators. | |
4919 | * | |
4920 | * FIXME: Make this more sane and safe. | |
4921 | */ | |
4922 | dev_info(dev, "nonexclusive access to GPIO for %s\n", | |
4923 | con_id ? con_id : devname); | |
4924 | return desc; | |
4925 | } else { | |
d377f56f | 4926 | return ERR_PTR(ret); |
b0ce7b29 LW |
4927 | } |
4928 | } | |
bae48da2 | 4929 | |
d377f56f | 4930 | ret = gpiod_configure_flags(desc, con_id, lookupflags, flags); |
6392cca4 | 4931 | if (ret < 0) { |
39b2bbe3 | 4932 | dev_dbg(dev, "setup of GPIO %s failed\n", con_id); |
6392cca4 LW |
4933 | gpiod_put(desc); |
4934 | return ERR_PTR(ret); | |
4935 | } | |
4936 | ||
4937 | return desc; | |
4938 | } | |
b17d1bf1 | 4939 | EXPORT_SYMBOL_GPL(gpiod_get_index); |
6392cca4 | 4940 | |
40b73183 MW |
4941 | /** |
4942 | * fwnode_get_named_gpiod - obtain a GPIO from firmware node | |
4943 | * @fwnode: handle of the firmware node | |
4944 | * @propname: name of the firmware property representing the GPIO | |
6392cca4 | 4945 | * @index: index of the GPIO to obtain for the consumer |
a264d10f | 4946 | * @dflags: GPIO initialization flags |
950d55f5 | 4947 | * @label: label to attach to the requested GPIO |
40b73183 MW |
4948 | * |
4949 | * This function can be used for drivers that get their configuration | |
6392cca4 | 4950 | * from opaque firmware. |
40b73183 | 4951 | * |
6392cca4 | 4952 | * The function properly finds the corresponding GPIO using whatever is the |
40b73183 MW |
4953 | * underlying firmware interface and then makes sure that the GPIO |
4954 | * descriptor is requested before it is returned to the caller. | |
4955 | * | |
950d55f5 | 4956 | * Returns: |
ff21378a | 4957 | * On successful request the GPIO pin is configured in accordance with |
a264d10f AS |
4958 | * provided @dflags. |
4959 | * | |
40b73183 MW |
4960 | * In case of error an ERR_PTR() is returned. |
4961 | */ | |
4962 | struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode, | |
537b94da | 4963 | const char *propname, int index, |
b2987d74 AS |
4964 | enum gpiod_flags dflags, |
4965 | const char *label) | |
40b73183 | 4966 | { |
2d6c06f5 | 4967 | unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT; |
40b73183 | 4968 | struct gpio_desc *desc = ERR_PTR(-ENODEV); |
40b73183 MW |
4969 | int ret; |
4970 | ||
4971 | if (!fwnode) | |
4972 | return ERR_PTR(-EINVAL); | |
4973 | ||
4974 | if (is_of_node(fwnode)) { | |
6392cca4 LW |
4975 | desc = gpiod_get_from_of_node(to_of_node(fwnode), |
4976 | propname, index, | |
4977 | dflags, | |
4978 | label); | |
4979 | return desc; | |
40b73183 MW |
4980 | } else if (is_acpi_node(fwnode)) { |
4981 | struct acpi_gpio_info info; | |
4982 | ||
537b94da | 4983 | desc = acpi_node_get_gpiod(fwnode, propname, index, &info); |
6392cca4 LW |
4984 | if (IS_ERR(desc)) |
4985 | return desc; | |
40b73183 | 4986 | |
6392cca4 | 4987 | acpi_gpio_update_gpiod_flags(&dflags, &info); |
606be344 | 4988 | acpi_gpio_update_gpiod_lookup_flags(&lflags, &info); |
6392cca4 | 4989 | } |
40b73183 | 4990 | |
6392cca4 | 4991 | /* Currently only ACPI takes this path */ |
b2987d74 | 4992 | ret = gpiod_request(desc, label); |
85b03b30 JH |
4993 | if (ret) |
4994 | return ERR_PTR(ret); | |
4995 | ||
a264d10f AS |
4996 | ret = gpiod_configure_flags(desc, propname, lflags, dflags); |
4997 | if (ret < 0) { | |
4998 | gpiod_put(desc); | |
4999 | return ERR_PTR(ret); | |
90b665f6 LP |
5000 | } |
5001 | ||
40b73183 MW |
5002 | return desc; |
5003 | } | |
5004 | EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod); | |
5005 | ||
29a1f233 TR |
5006 | /** |
5007 | * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO | |
5008 | * function | |
5009 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
5010 | * @con_id: function within the GPIO consumer | |
5011 | * @index: index of the GPIO to obtain in the consumer | |
39b2bbe3 | 5012 | * @flags: optional GPIO initialization flags |
29a1f233 TR |
5013 | * |
5014 | * This is equivalent to gpiod_get_index(), except that when no GPIO with the | |
5015 | * specified index was assigned to the requested function it will return NULL. | |
5016 | * This is convenient for drivers that need to handle optional GPIOs. | |
5017 | */ | |
b17d1bf1 | 5018 | struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev, |
29a1f233 | 5019 | const char *con_id, |
39b2bbe3 AC |
5020 | unsigned int index, |
5021 | enum gpiod_flags flags) | |
29a1f233 TR |
5022 | { |
5023 | struct gpio_desc *desc; | |
5024 | ||
39b2bbe3 | 5025 | desc = gpiod_get_index(dev, con_id, index, flags); |
29a1f233 TR |
5026 | if (IS_ERR(desc)) { |
5027 | if (PTR_ERR(desc) == -ENOENT) | |
5028 | return NULL; | |
5029 | } | |
5030 | ||
5031 | return desc; | |
5032 | } | |
b17d1bf1 | 5033 | EXPORT_SYMBOL_GPL(gpiod_get_index_optional); |
29a1f233 | 5034 | |
f625d460 BP |
5035 | /** |
5036 | * gpiod_hog - Hog the specified GPIO desc given the provided flags | |
5037 | * @desc: gpio whose value will be assigned | |
5038 | * @name: gpio line name | |
fed7026a AS |
5039 | * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from |
5040 | * of_find_gpio() or of_get_gpio_hog() | |
f625d460 BP |
5041 | * @dflags: gpiod_flags - optional GPIO initialization flags |
5042 | */ | |
5043 | int gpiod_hog(struct gpio_desc *desc, const char *name, | |
5044 | unsigned long lflags, enum gpiod_flags dflags) | |
5045 | { | |
5046 | struct gpio_chip *chip; | |
5047 | struct gpio_desc *local_desc; | |
5048 | int hwnum; | |
d377f56f | 5049 | int ret; |
f625d460 BP |
5050 | |
5051 | chip = gpiod_to_chip(desc); | |
5052 | hwnum = gpio_chip_hwgpio(desc); | |
5053 | ||
5923ea6c LW |
5054 | local_desc = gpiochip_request_own_desc(chip, hwnum, name, |
5055 | lflags, dflags); | |
f625d460 | 5056 | if (IS_ERR(local_desc)) { |
d377f56f | 5057 | ret = PTR_ERR(local_desc); |
c31a571d | 5058 | pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n", |
d377f56f LW |
5059 | name, chip->label, hwnum, ret); |
5060 | return ret; | |
f625d460 BP |
5061 | } |
5062 | ||
f625d460 BP |
5063 | /* Mark GPIO as hogged so it can be identified and removed later */ |
5064 | set_bit(FLAG_IS_HOGGED, &desc->flags); | |
5065 | ||
5066 | pr_info("GPIO line %d (%s) hogged as %s%s\n", | |
5067 | desc_to_gpio(desc), name, | |
b27f300f BG |
5068 | (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input", |
5069 | (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? | |
5070 | (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : ""); | |
f625d460 BP |
5071 | |
5072 | return 0; | |
5073 | } | |
5074 | ||
5075 | /** | |
5076 | * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog | |
5077 | * @chip: gpio chip to act on | |
f625d460 BP |
5078 | */ |
5079 | static void gpiochip_free_hogs(struct gpio_chip *chip) | |
5080 | { | |
5081 | int id; | |
5082 | ||
5083 | for (id = 0; id < chip->ngpio; id++) { | |
1c3cdb18 LW |
5084 | if (test_bit(FLAG_IS_HOGGED, &chip->gpiodev->descs[id].flags)) |
5085 | gpiochip_free_own_desc(&chip->gpiodev->descs[id]); | |
f625d460 BP |
5086 | } |
5087 | } | |
5088 | ||
66858527 RI |
5089 | /** |
5090 | * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function | |
5091 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
5092 | * @con_id: function within the GPIO consumer | |
5093 | * @flags: optional GPIO initialization flags | |
5094 | * | |
5095 | * This function acquires all the GPIOs defined under a given function. | |
5096 | * | |
5097 | * Return a struct gpio_descs containing an array of descriptors, -ENOENT if | |
5098 | * no GPIO has been assigned to the requested function, or another IS_ERR() | |
5099 | * code if an error occurred while trying to acquire the GPIOs. | |
5100 | */ | |
5101 | struct gpio_descs *__must_check gpiod_get_array(struct device *dev, | |
5102 | const char *con_id, | |
5103 | enum gpiod_flags flags) | |
5104 | { | |
5105 | struct gpio_desc *desc; | |
5106 | struct gpio_descs *descs; | |
bf9346f5 JK |
5107 | struct gpio_array *array_info = NULL; |
5108 | struct gpio_chip *chip; | |
5109 | int count, bitmap_size; | |
66858527 RI |
5110 | |
5111 | count = gpiod_count(dev, con_id); | |
5112 | if (count < 0) | |
5113 | return ERR_PTR(count); | |
5114 | ||
acafe7e3 | 5115 | descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL); |
66858527 RI |
5116 | if (!descs) |
5117 | return ERR_PTR(-ENOMEM); | |
5118 | ||
5119 | for (descs->ndescs = 0; descs->ndescs < count; ) { | |
5120 | desc = gpiod_get_index(dev, con_id, descs->ndescs, flags); | |
5121 | if (IS_ERR(desc)) { | |
5122 | gpiod_put_array(descs); | |
5123 | return ERR_CAST(desc); | |
5124 | } | |
bf9346f5 | 5125 | |
66858527 | 5126 | descs->desc[descs->ndescs] = desc; |
bf9346f5 JK |
5127 | |
5128 | chip = gpiod_to_chip(desc); | |
5129 | /* | |
c4c958aa JK |
5130 | * If pin hardware number of array member 0 is also 0, select |
5131 | * its chip as a candidate for fast bitmap processing path. | |
bf9346f5 | 5132 | */ |
c4c958aa | 5133 | if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) { |
bf9346f5 JK |
5134 | struct gpio_descs *array; |
5135 | ||
5136 | bitmap_size = BITS_TO_LONGS(chip->ngpio > count ? | |
5137 | chip->ngpio : count); | |
5138 | ||
5139 | array = kzalloc(struct_size(descs, desc, count) + | |
5140 | struct_size(array_info, invert_mask, | |
5141 | 3 * bitmap_size), GFP_KERNEL); | |
5142 | if (!array) { | |
5143 | gpiod_put_array(descs); | |
5144 | return ERR_PTR(-ENOMEM); | |
5145 | } | |
5146 | ||
5147 | memcpy(array, descs, | |
5148 | struct_size(descs, desc, descs->ndescs + 1)); | |
5149 | kfree(descs); | |
5150 | ||
5151 | descs = array; | |
5152 | array_info = (void *)(descs->desc + count); | |
5153 | array_info->get_mask = array_info->invert_mask + | |
5154 | bitmap_size; | |
5155 | array_info->set_mask = array_info->get_mask + | |
5156 | bitmap_size; | |
5157 | ||
5158 | array_info->desc = descs->desc; | |
5159 | array_info->size = count; | |
5160 | array_info->chip = chip; | |
5161 | bitmap_set(array_info->get_mask, descs->ndescs, | |
5162 | count - descs->ndescs); | |
5163 | bitmap_set(array_info->set_mask, descs->ndescs, | |
5164 | count - descs->ndescs); | |
5165 | descs->info = array_info; | |
5166 | } | |
c4c958aa JK |
5167 | /* Unmark array members which don't belong to the 'fast' chip */ |
5168 | if (array_info && array_info->chip != chip) { | |
bf9346f5 JK |
5169 | __clear_bit(descs->ndescs, array_info->get_mask); |
5170 | __clear_bit(descs->ndescs, array_info->set_mask); | |
c4c958aa JK |
5171 | } |
5172 | /* | |
5173 | * Detect array members which belong to the 'fast' chip | |
5174 | * but their pins are not in hardware order. | |
5175 | */ | |
5176 | else if (array_info && | |
5177 | gpio_chip_hwgpio(desc) != descs->ndescs) { | |
5178 | /* | |
5179 | * Don't use fast path if all array members processed so | |
5180 | * far belong to the same chip as this one but its pin | |
5181 | * hardware number is different from its array index. | |
5182 | */ | |
5183 | if (bitmap_full(array_info->get_mask, descs->ndescs)) { | |
5184 | array_info = NULL; | |
5185 | } else { | |
5186 | __clear_bit(descs->ndescs, | |
5187 | array_info->get_mask); | |
5188 | __clear_bit(descs->ndescs, | |
5189 | array_info->set_mask); | |
5190 | } | |
bf9346f5 JK |
5191 | } else if (array_info) { |
5192 | /* Exclude open drain or open source from fast output */ | |
5193 | if (gpiochip_line_is_open_drain(chip, descs->ndescs) || | |
5194 | gpiochip_line_is_open_source(chip, descs->ndescs)) | |
5195 | __clear_bit(descs->ndescs, | |
5196 | array_info->set_mask); | |
5197 | /* Identify 'fast' pins which require invertion */ | |
5198 | if (gpiod_is_active_low(desc)) | |
5199 | __set_bit(descs->ndescs, | |
5200 | array_info->invert_mask); | |
5201 | } | |
5202 | ||
66858527 RI |
5203 | descs->ndescs++; |
5204 | } | |
bf9346f5 JK |
5205 | if (array_info) |
5206 | dev_dbg(dev, | |
5207 | "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n", | |
5208 | array_info->chip->label, array_info->size, | |
5209 | *array_info->get_mask, *array_info->set_mask, | |
5210 | *array_info->invert_mask); | |
66858527 RI |
5211 | return descs; |
5212 | } | |
5213 | EXPORT_SYMBOL_GPL(gpiod_get_array); | |
5214 | ||
5215 | /** | |
5216 | * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO | |
5217 | * function | |
5218 | * @dev: GPIO consumer, can be NULL for system-global GPIOs | |
5219 | * @con_id: function within the GPIO consumer | |
5220 | * @flags: optional GPIO initialization flags | |
5221 | * | |
5222 | * This is equivalent to gpiod_get_array(), except that when no GPIO was | |
5223 | * assigned to the requested function it will return NULL. | |
5224 | */ | |
5225 | struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev, | |
5226 | const char *con_id, | |
5227 | enum gpiod_flags flags) | |
5228 | { | |
5229 | struct gpio_descs *descs; | |
5230 | ||
5231 | descs = gpiod_get_array(dev, con_id, flags); | |
45586c70 | 5232 | if (PTR_ERR(descs) == -ENOENT) |
66858527 RI |
5233 | return NULL; |
5234 | ||
5235 | return descs; | |
5236 | } | |
5237 | EXPORT_SYMBOL_GPL(gpiod_get_array_optional); | |
5238 | ||
bae48da2 AC |
5239 | /** |
5240 | * gpiod_put - dispose of a GPIO descriptor | |
5241 | * @desc: GPIO descriptor to dispose of | |
5242 | * | |
5243 | * No descriptor can be used after gpiod_put() has been called on it. | |
5244 | */ | |
5245 | void gpiod_put(struct gpio_desc *desc) | |
5246 | { | |
1d7765ba AS |
5247 | if (desc) |
5248 | gpiod_free(desc); | |
372e722e | 5249 | } |
bae48da2 | 5250 | EXPORT_SYMBOL_GPL(gpiod_put); |
d2876d08 | 5251 | |
66858527 RI |
5252 | /** |
5253 | * gpiod_put_array - dispose of multiple GPIO descriptors | |
5254 | * @descs: struct gpio_descs containing an array of descriptors | |
5255 | */ | |
5256 | void gpiod_put_array(struct gpio_descs *descs) | |
5257 | { | |
5258 | unsigned int i; | |
5259 | ||
5260 | for (i = 0; i < descs->ndescs; i++) | |
5261 | gpiod_put(descs->desc[i]); | |
5262 | ||
5263 | kfree(descs); | |
5264 | } | |
5265 | EXPORT_SYMBOL_GPL(gpiod_put_array); | |
5266 | ||
3c702e99 LW |
5267 | static int __init gpiolib_dev_init(void) |
5268 | { | |
5269 | int ret; | |
5270 | ||
5271 | /* Register GPIO sysfs bus */ | |
b1911710 | 5272 | ret = bus_register(&gpio_bus_type); |
3c702e99 LW |
5273 | if (ret < 0) { |
5274 | pr_err("gpiolib: could not register GPIO bus type\n"); | |
5275 | return ret; | |
5276 | } | |
5277 | ||
ddd8891e | 5278 | ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME); |
3c702e99 LW |
5279 | if (ret < 0) { |
5280 | pr_err("gpiolib: failed to allocate char dev region\n"); | |
5281 | bus_unregister(&gpio_bus_type); | |
159f3cd9 GR |
5282 | } else { |
5283 | gpiolib_initialized = true; | |
5284 | gpiochip_setup_devs(); | |
3c702e99 LW |
5285 | } |
5286 | return ret; | |
5287 | } | |
5288 | core_initcall(gpiolib_dev_init); | |
5289 | ||
d2876d08 DB |
5290 | #ifdef CONFIG_DEBUG_FS |
5291 | ||
fdeb8e15 | 5292 | static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev) |
d2876d08 DB |
5293 | { |
5294 | unsigned i; | |
fdeb8e15 LW |
5295 | struct gpio_chip *chip = gdev->chip; |
5296 | unsigned gpio = gdev->base; | |
5297 | struct gpio_desc *gdesc = &gdev->descs[0]; | |
90fd2270 LW |
5298 | bool is_out; |
5299 | bool is_irq; | |
5300 | bool active_low; | |
d2876d08 | 5301 | |
fdeb8e15 | 5302 | for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) { |
ced433e2 MP |
5303 | if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) { |
5304 | if (gdesc->name) { | |
5305 | seq_printf(s, " gpio-%-3d (%-20.20s)\n", | |
5306 | gpio, gdesc->name); | |
5307 | } | |
d2876d08 | 5308 | continue; |
ced433e2 | 5309 | } |
d2876d08 | 5310 | |
372e722e | 5311 | gpiod_get_direction(gdesc); |
d2876d08 | 5312 | is_out = test_bit(FLAG_IS_OUT, &gdesc->flags); |
d468bf9e | 5313 | is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags); |
90fd2270 LW |
5314 | active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags); |
5315 | seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s", | |
ced433e2 | 5316 | gpio, gdesc->name ? gdesc->name : "", gdesc->label, |
d2876d08 | 5317 | is_out ? "out" : "in ", |
1c22a252 | 5318 | chip->get ? (chip->get(chip, i) ? "hi" : "lo") : "? ", |
90fd2270 LW |
5319 | is_irq ? "IRQ " : "", |
5320 | active_low ? "ACTIVE LOW" : ""); | |
d2876d08 DB |
5321 | seq_printf(s, "\n"); |
5322 | } | |
5323 | } | |
5324 | ||
f9c4a31f | 5325 | static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos) |
d2876d08 | 5326 | { |
362432ae | 5327 | unsigned long flags; |
ff2b1359 | 5328 | struct gpio_device *gdev = NULL; |
cb1650d4 | 5329 | loff_t index = *pos; |
d2876d08 | 5330 | |
f9c4a31f | 5331 | s->private = ""; |
d2876d08 | 5332 | |
362432ae | 5333 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 5334 | list_for_each_entry(gdev, &gpio_devices, list) |
362432ae GL |
5335 | if (index-- == 0) { |
5336 | spin_unlock_irqrestore(&gpio_lock, flags); | |
ff2b1359 | 5337 | return gdev; |
f9c4a31f | 5338 | } |
362432ae | 5339 | spin_unlock_irqrestore(&gpio_lock, flags); |
f9c4a31f | 5340 | |
cb1650d4 | 5341 | return NULL; |
f9c4a31f TR |
5342 | } |
5343 | ||
5344 | static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos) | |
5345 | { | |
362432ae | 5346 | unsigned long flags; |
ff2b1359 | 5347 | struct gpio_device *gdev = v; |
f9c4a31f TR |
5348 | void *ret = NULL; |
5349 | ||
362432ae | 5350 | spin_lock_irqsave(&gpio_lock, flags); |
ff2b1359 | 5351 | if (list_is_last(&gdev->list, &gpio_devices)) |
cb1650d4 AC |
5352 | ret = NULL; |
5353 | else | |
ff2b1359 | 5354 | ret = list_entry(gdev->list.next, struct gpio_device, list); |
362432ae | 5355 | spin_unlock_irqrestore(&gpio_lock, flags); |
f9c4a31f TR |
5356 | |
5357 | s->private = "\n"; | |
5358 | ++*pos; | |
5359 | ||
5360 | return ret; | |
5361 | } | |
5362 | ||
5363 | static void gpiolib_seq_stop(struct seq_file *s, void *v) | |
5364 | { | |
5365 | } | |
5366 | ||
5367 | static int gpiolib_seq_show(struct seq_file *s, void *v) | |
5368 | { | |
ff2b1359 LW |
5369 | struct gpio_device *gdev = v; |
5370 | struct gpio_chip *chip = gdev->chip; | |
5371 | struct device *parent; | |
5372 | ||
5373 | if (!chip) { | |
5374 | seq_printf(s, "%s%s: (dangling chip)", (char *)s->private, | |
5375 | dev_name(&gdev->dev)); | |
5376 | return 0; | |
5377 | } | |
f9c4a31f | 5378 | |
ff2b1359 LW |
5379 | seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private, |
5380 | dev_name(&gdev->dev), | |
fdeb8e15 | 5381 | gdev->base, gdev->base + gdev->ngpio - 1); |
ff2b1359 LW |
5382 | parent = chip->parent; |
5383 | if (parent) | |
5384 | seq_printf(s, ", parent: %s/%s", | |
5385 | parent->bus ? parent->bus->name : "no-bus", | |
5386 | dev_name(parent)); | |
f9c4a31f TR |
5387 | if (chip->label) |
5388 | seq_printf(s, ", %s", chip->label); | |
5389 | if (chip->can_sleep) | |
5390 | seq_printf(s, ", can sleep"); | |
5391 | seq_printf(s, ":\n"); | |
5392 | ||
5393 | if (chip->dbg_show) | |
5394 | chip->dbg_show(s, chip); | |
5395 | else | |
fdeb8e15 | 5396 | gpiolib_dbg_show(s, gdev); |
f9c4a31f | 5397 | |
d2876d08 DB |
5398 | return 0; |
5399 | } | |
5400 | ||
f9c4a31f TR |
5401 | static const struct seq_operations gpiolib_seq_ops = { |
5402 | .start = gpiolib_seq_start, | |
5403 | .next = gpiolib_seq_next, | |
5404 | .stop = gpiolib_seq_stop, | |
5405 | .show = gpiolib_seq_show, | |
5406 | }; | |
5407 | ||
d2876d08 DB |
5408 | static int gpiolib_open(struct inode *inode, struct file *file) |
5409 | { | |
f9c4a31f | 5410 | return seq_open(file, &gpiolib_seq_ops); |
d2876d08 DB |
5411 | } |
5412 | ||
828c0950 | 5413 | static const struct file_operations gpiolib_operations = { |
f9c4a31f | 5414 | .owner = THIS_MODULE, |
d2876d08 DB |
5415 | .open = gpiolib_open, |
5416 | .read = seq_read, | |
5417 | .llseek = seq_lseek, | |
f9c4a31f | 5418 | .release = seq_release, |
d2876d08 DB |
5419 | }; |
5420 | ||
5421 | static int __init gpiolib_debugfs_init(void) | |
5422 | { | |
5423 | /* /sys/kernel/debug/gpio */ | |
acc68b0e GKH |
5424 | debugfs_create_file("gpio", S_IFREG | S_IRUGO, NULL, NULL, |
5425 | &gpiolib_operations); | |
d2876d08 DB |
5426 | return 0; |
5427 | } | |
5428 | subsys_initcall(gpiolib_debugfs_init); | |
5429 | ||
5430 | #endif /* DEBUG_FS */ |