Merge existing fixes from spi/for-5.12
[linux-2.6-block.git] / drivers / gpio / gpiolib.c
CommitLineData
dae5f0af 1// SPDX-License-Identifier: GPL-2.0
c47d9e1b 2
923a654c 3#include <linux/bitmap.h>
d2876d08
DB
4#include <linux/kernel.h>
5#include <linux/module.h>
ff77c352 6#include <linux/interrupt.h>
d2876d08
DB
7#include <linux/irq.h>
8#include <linux/spinlock.h>
1a989d0f 9#include <linux/list.h>
d8f388d8
DB
10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/debugfs.h>
13#include <linux/seq_file.h>
14#include <linux/gpio.h>
ff77c352 15#include <linux/idr.h>
5a0e3ad6 16#include <linux/slab.h>
7b199811 17#include <linux/acpi.h>
53e7cac3 18#include <linux/gpio/driver.h>
0a6d3158 19#include <linux/gpio/machine.h>
c771c2f4 20#include <linux/pinctrl/consumer.h>
3c702e99 21#include <linux/fs.h>
8b92e17e 22#include <linux/compat.h>
953b956a 23#include <linux/file.h>
3c702e99 24#include <uapi/linux/gpio.h>
d2876d08 25
664e3e5a 26#include "gpiolib.h"
f626d6df 27#include "gpiolib-of.h"
77cb907a 28#include "gpiolib-acpi.h"
925ca369 29#include "gpiolib-cdev.h"
ef087d8e 30#include "gpiolib-sysfs.h"
664e3e5a 31
3f397c21
UKK
32#define CREATE_TRACE_POINTS
33#include <trace/events/gpio.h>
d2876d08 34
79a9becd 35/* Implementation infrastructure for GPIO interfaces.
d2876d08 36 *
79a9becd
AC
37 * The GPIO programming interface allows for inlining speed-critical
38 * get/set operations for common cases, so that access to SOC-integrated
39 * GPIOs can sometimes cost only an instruction or two per bit.
d2876d08
DB
40 */
41
42
43/* When debugging, extend minimal trust to callers and platform code.
44 * Also emit diagnostic messages that may help initial bringup, when
45 * board setup or driver bugs are most common.
46 *
47 * Otherwise, minimize overhead in what may be bitbanging codepaths.
48 */
49#ifdef DEBUG
50#define extra_checks 1
51#else
52#define extra_checks 0
53#endif
54
ff2b1359
LW
55/* Device and char device-related information */
56static DEFINE_IDA(gpio_ida);
3c702e99
LW
57static dev_t gpio_devt;
58#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
ced2af41 59static int gpio_bus_match(struct device *dev, struct device_driver *drv);
3c702e99
LW
60static struct bus_type gpio_bus_type = {
61 .name = "gpio",
ced2af41 62 .match = gpio_bus_match,
3c702e99 63};
ff2b1359 64
3027743f
LA
65/*
66 * Number of GPIOs to use for the fast path in set array
67 */
68#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
69
d2876d08
DB
70/* gpio_lock prevents conflicts during gpio_desc[] table updates.
71 * While any GPIO is requested, its gpio_chip is not removable;
72 * each GPIO's "requested" flag serves as a lock and refcount.
73 */
0eb4c6c2 74DEFINE_SPINLOCK(gpio_lock);
d2876d08 75
bae48da2
AC
76static DEFINE_MUTEX(gpio_lookup_lock);
77static LIST_HEAD(gpio_lookup_list);
ff2b1359 78LIST_HEAD(gpio_devices);
6d86750c 79
a411e81e
BG
80static DEFINE_MUTEX(gpio_machine_hogs_mutex);
81static LIST_HEAD(gpio_machine_hogs);
82
a0b66a73
LW
83static void gpiochip_free_hogs(struct gpio_chip *gc);
84static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
85 struct lock_class_key *lock_key,
86 struct lock_class_key *request_key);
a0b66a73
LW
87static void gpiochip_irqchip_remove(struct gpio_chip *gc);
88static int gpiochip_irqchip_init_hw(struct gpio_chip *gc);
89static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc);
90static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc);
6d86750c 91
159f3cd9 92static bool gpiolib_initialized;
6d86750c 93
d2876d08
DB
94static inline void desc_set_label(struct gpio_desc *d, const char *label)
95{
d2876d08 96 d->label = label;
d2876d08
DB
97}
98
372e722e 99/**
950d55f5
TR
100 * gpio_to_desc - Convert a GPIO number to its descriptor
101 * @gpio: global GPIO number
102 *
103 * Returns:
104 * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
105 * with the given number exists in the system.
372e722e 106 */
79a9becd 107struct gpio_desc *gpio_to_desc(unsigned gpio)
372e722e 108{
ff2b1359 109 struct gpio_device *gdev;
14e85c0e
AC
110 unsigned long flags;
111
112 spin_lock_irqsave(&gpio_lock, flags);
113
ff2b1359 114 list_for_each_entry(gdev, &gpio_devices, list) {
fdeb8e15
LW
115 if (gdev->base <= gpio &&
116 gdev->base + gdev->ngpio > gpio) {
14e85c0e 117 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 118 return &gdev->descs[gpio - gdev->base];
14e85c0e
AC
119 }
120 }
121
122 spin_unlock_irqrestore(&gpio_lock, flags);
123
0e9a5edf 124 if (!gpio_is_valid(gpio))
c47d9e1b 125 pr_warn("invalid GPIO %d\n", gpio);
0e9a5edf 126
14e85c0e 127 return NULL;
372e722e 128}
79a9becd 129EXPORT_SYMBOL_GPL(gpio_to_desc);
372e722e 130
d468bf9e 131/**
950d55f5
TR
132 * gpiochip_get_desc - get the GPIO descriptor corresponding to the given
133 * hardware number for this chip
a0b66a73 134 * @gc: GPIO chip
950d55f5
TR
135 * @hwnum: hardware number of the GPIO for this chip
136 *
137 * Returns:
35c6cfb4 138 * A pointer to the GPIO descriptor or ``ERR_PTR(-EINVAL)`` if no GPIO exists
950d55f5 139 * in the given chip for the specified hardware number.
d468bf9e 140 */
a0b66a73 141struct gpio_desc *gpiochip_get_desc(struct gpio_chip *gc,
06863620 142 unsigned int hwnum)
d468bf9e 143{
a0b66a73 144 struct gpio_device *gdev = gc->gpiodev;
fdeb8e15
LW
145
146 if (hwnum >= gdev->ngpio)
b7d0a28a 147 return ERR_PTR(-EINVAL);
d468bf9e 148
fdeb8e15 149 return &gdev->descs[hwnum];
d468bf9e 150}
97795420 151EXPORT_SYMBOL_GPL(gpiochip_get_desc);
372e722e
AC
152
153/**
950d55f5
TR
154 * desc_to_gpio - convert a GPIO descriptor to the integer namespace
155 * @desc: GPIO descriptor
156 *
372e722e 157 * This should disappear in the future but is needed since we still
950d55f5
TR
158 * use GPIO numbers for error messages and sysfs nodes.
159 *
160 * Returns:
161 * The global GPIO number for the GPIO specified by its descriptor.
372e722e 162 */
79a9becd 163int desc_to_gpio(const struct gpio_desc *desc)
372e722e 164{
fdeb8e15 165 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
372e722e 166}
79a9becd 167EXPORT_SYMBOL_GPL(desc_to_gpio);
372e722e
AC
168
169
79a9becd
AC
170/**
171 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
172 * @desc: descriptor to return the chip of
173 */
174struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
372e722e 175{
dd3b9a44 176 if (!desc || !desc->gdev)
fdeb8e15
LW
177 return NULL;
178 return desc->gdev->chip;
372e722e 179}
79a9becd 180EXPORT_SYMBOL_GPL(gpiod_to_chip);
d2876d08 181
8d0aab2f
AV
182/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
183static int gpiochip_find_base(int ngpio)
184{
ff2b1359 185 struct gpio_device *gdev;
83cabe33 186 int base = ARCH_NR_GPIOS - ngpio;
8d0aab2f 187
ff2b1359 188 list_for_each_entry_reverse(gdev, &gpio_devices, list) {
83cabe33 189 /* found a free space? */
fdeb8e15 190 if (gdev->base + gdev->ngpio <= base)
83cabe33
AC
191 break;
192 else
193 /* nope, check the space right before the chip */
fdeb8e15 194 base = gdev->base - ngpio;
8d0aab2f
AV
195 }
196
83cabe33 197 if (gpio_is_valid(base)) {
8d0aab2f 198 pr_debug("%s: found new base at %d\n", __func__, base);
83cabe33
AC
199 return base;
200 } else {
201 pr_err("%s: cannot find free range\n", __func__);
202 return -ENOSPC;
169b6a7a 203 }
169b6a7a
AV
204}
205
79a9becd
AC
206/**
207 * gpiod_get_direction - return the current direction of a GPIO
208 * @desc: GPIO to get the direction of
209 *
94fc7309 210 * Returns 0 for output, 1 for input, or an error code in case of error.
79a9becd
AC
211 *
212 * This function may sleep if gpiod_cansleep() is true.
213 */
8e53b0f1 214int gpiod_get_direction(struct gpio_desc *desc)
80b0a602 215{
a0b66a73 216 struct gpio_chip *gc;
13daf489 217 unsigned int offset;
d377f56f 218 int ret;
80b0a602 219
a0b66a73 220 gc = gpiod_to_chip(desc);
372e722e 221 offset = gpio_chip_hwgpio(desc);
80b0a602 222
256efaea
RK
223 /*
224 * Open drain emulation using input mode may incorrectly report
225 * input here, fix that up.
226 */
227 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) &&
228 test_bit(FLAG_IS_OUT, &desc->flags))
229 return 0;
230
a0b66a73 231 if (!gc->get_direction)
d0121b85 232 return -ENOTSUPP;
80b0a602 233
a0b66a73 234 ret = gc->get_direction(gc, offset);
4fc5bfeb
AS
235 if (ret < 0)
236 return ret;
237
238 /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */
239 if (ret > 0)
d377f56f 240 ret = 1;
4fc5bfeb
AS
241
242 assign_bit(FLAG_IS_OUT, &desc->flags, !ret);
243
d377f56f 244 return ret;
80b0a602 245}
79a9becd 246EXPORT_SYMBOL_GPL(gpiod_get_direction);
80b0a602 247
1a989d0f
AC
248/*
249 * Add a new chip to the global chips list, keeping the list of chips sorted
ef7c7553 250 * by range(means [base, base + ngpio - 1]) order.
1a989d0f
AC
251 *
252 * Return -EBUSY if the new chip overlaps with some other chip's integer
253 * space.
254 */
ff2b1359 255static int gpiodev_add_to_list(struct gpio_device *gdev)
1a989d0f 256{
a961f9b4 257 struct gpio_device *prev, *next;
1a989d0f 258
ff2b1359 259 if (list_empty(&gpio_devices)) {
a961f9b4 260 /* initial entry in list */
ff2b1359 261 list_add_tail(&gdev->list, &gpio_devices);
e28ecca6 262 return 0;
1a989d0f
AC
263 }
264
a961f9b4
BJZ
265 next = list_entry(gpio_devices.next, struct gpio_device, list);
266 if (gdev->base + gdev->ngpio <= next->base) {
267 /* add before first entry */
268 list_add(&gdev->list, &gpio_devices);
269 return 0;
1a989d0f
AC
270 }
271
a961f9b4
BJZ
272 prev = list_entry(gpio_devices.prev, struct gpio_device, list);
273 if (prev->base + prev->ngpio <= gdev->base) {
274 /* add behind last entry */
275 list_add_tail(&gdev->list, &gpio_devices);
96098df1 276 return 0;
1a989d0f
AC
277 }
278
a961f9b4
BJZ
279 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
280 /* at the end of the list */
281 if (&next->list == &gpio_devices)
282 break;
1a989d0f 283
a961f9b4
BJZ
284 /* add between prev and next */
285 if (prev->base + prev->ngpio <= gdev->base
286 && gdev->base + gdev->ngpio <= next->base) {
287 list_add(&gdev->list, &prev->list);
288 return 0;
289 }
290 }
291
292 dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n");
293 return -EBUSY;
1a989d0f
AC
294}
295
950d55f5 296/*
f881bab0 297 * Convert a GPIO name to its descriptor
582838ea
GU
298 * Note that there is no guarantee that GPIO names are globally unique!
299 * Hence this function will return, if it exists, a reference to the first GPIO
300 * line found that matches the given name.
f881bab0
LW
301 */
302static struct gpio_desc *gpio_name_to_desc(const char * const name)
303{
ff2b1359 304 struct gpio_device *gdev;
f881bab0
LW
305 unsigned long flags;
306
ee203bbd
MM
307 if (!name)
308 return NULL;
309
f881bab0
LW
310 spin_lock_irqsave(&gpio_lock, flags);
311
ff2b1359 312 list_for_each_entry(gdev, &gpio_devices, list) {
f881bab0
LW
313 int i;
314
fdeb8e15
LW
315 for (i = 0; i != gdev->ngpio; ++i) {
316 struct gpio_desc *desc = &gdev->descs[i];
f881bab0 317
ee203bbd 318 if (!desc->name)
f881bab0
LW
319 continue;
320
fdeb8e15 321 if (!strcmp(desc->name, name)) {
f881bab0 322 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 323 return desc;
f881bab0
LW
324 }
325 }
326 }
327
328 spin_unlock_irqrestore(&gpio_lock, flags);
329
330 return NULL;
331}
332
5f3ca732 333/*
582838ea
GU
334 * Take the names from gc->names and assign them to their GPIO descriptors.
335 * Warn if a name is already used for a GPIO line on a different GPIO chip.
5f3ca732 336 *
582838ea
GU
337 * Note that:
338 * 1. Non-unique names are still accepted,
339 * 2. Name collisions within the same GPIO chip are not reported.
5f3ca732
MP
340 */
341static int gpiochip_set_desc_names(struct gpio_chip *gc)
342{
fdeb8e15 343 struct gpio_device *gdev = gc->gpiodev;
5f3ca732
MP
344 int i;
345
5f3ca732
MP
346 /* First check all names if they are unique */
347 for (i = 0; i != gc->ngpio; ++i) {
348 struct gpio_desc *gpio;
349
350 gpio = gpio_name_to_desc(gc->names[i]);
f881bab0 351 if (gpio)
fdeb8e15 352 dev_warn(&gdev->dev,
34ffd85d 353 "Detected name collision for GPIO name '%s'\n",
f881bab0 354 gc->names[i]);
5f3ca732
MP
355 }
356
357 /* Then add all names to the GPIO descriptors */
358 for (i = 0; i != gc->ngpio; ++i)
fdeb8e15 359 gdev->descs[i].name = gc->names[i];
5f3ca732
MP
360
361 return 0;
362}
363
32fc5aa2
BG
364/*
365 * devprop_gpiochip_set_names - Set GPIO line names using device properties
366 * @chip: GPIO chip whose lines should be named, if possible
367 *
368 * Looks for device property "gpio-line-names" and if it exists assigns
369 * GPIO line names for the chip. The memory allocated for the assigned
370 * names belong to the underlying software node and should not be released
371 * by the caller.
372 */
373static int devprop_gpiochip_set_names(struct gpio_chip *chip)
374{
375 struct gpio_device *gdev = chip->gpiodev;
376 struct device *dev = chip->parent;
377 const char **names;
378 int ret, i;
379 int count;
380
587823d3
BG
381 /* GPIO chip may not have a parent device whose properties we inspect. */
382 if (!dev)
383 return 0;
384
32fc5aa2
BG
385 count = device_property_string_array_count(dev, "gpio-line-names");
386 if (count < 0)
387 return 0;
388
389 if (count > gdev->ngpio) {
390 dev_warn(&gdev->dev, "gpio-line-names is length %d but should be at most length %d",
391 count, gdev->ngpio);
392 count = gdev->ngpio;
393 }
394
395 names = kcalloc(count, sizeof(*names), GFP_KERNEL);
396 if (!names)
397 return -ENOMEM;
398
399 ret = device_property_read_string_array(dev, "gpio-line-names",
400 names, count);
401 if (ret < 0) {
402 dev_warn(&gdev->dev, "failed to read GPIO line names\n");
403 kfree(names);
404 return ret;
405 }
406
407 for (i = 0; i < count; i++)
408 gdev->descs[i].name = names[i];
409
410 kfree(names);
411
412 return 0;
413}
414
a0b66a73 415static unsigned long *gpiochip_allocate_mask(struct gpio_chip *gc)
e4371f6e
SB
416{
417 unsigned long *p;
418
a0b66a73 419 p = bitmap_alloc(gc->ngpio, GFP_KERNEL);
e4371f6e
SB
420 if (!p)
421 return NULL;
422
423 /* Assume by default all GPIOs are valid */
a0b66a73 424 bitmap_fill(p, gc->ngpio);
e4371f6e
SB
425
426 return p;
427}
428
f626d6df 429static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
726cb3ba 430{
eb1e8bd6 431 if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask))
726cb3ba
SB
432 return 0;
433
f626d6df
LW
434 gc->valid_mask = gpiochip_allocate_mask(gc);
435 if (!gc->valid_mask)
726cb3ba
SB
436 return -ENOMEM;
437
438 return 0;
439}
440
c9fc5aff 441static int gpiochip_init_valid_mask(struct gpio_chip *gc)
f8ec92a9 442{
c9fc5aff
LW
443 if (gc->init_valid_mask)
444 return gc->init_valid_mask(gc,
445 gc->valid_mask,
446 gc->ngpio);
f8ec92a9
RRD
447
448 return 0;
449}
450
a0b66a73 451static void gpiochip_free_valid_mask(struct gpio_chip *gc)
726cb3ba 452{
a0b66a73
LW
453 bitmap_free(gc->valid_mask);
454 gc->valid_mask = NULL;
726cb3ba
SB
455}
456
b056ca1c
AS
457static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
458{
459 if (gc->add_pin_ranges)
460 return gc->add_pin_ranges(gc);
461
462 return 0;
463}
464
a0b66a73 465bool gpiochip_line_is_valid(const struct gpio_chip *gc,
726cb3ba
SB
466 unsigned int offset)
467{
468 /* No mask means all valid */
a0b66a73 469 if (likely(!gc->valid_mask))
726cb3ba 470 return true;
a0b66a73 471 return test_bit(offset, gc->valid_mask);
726cb3ba
SB
472}
473EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
474
ff2b1359
LW
475static void gpiodevice_release(struct device *dev)
476{
477 struct gpio_device *gdev = dev_get_drvdata(dev);
478
479 list_del(&gdev->list);
8d4a85b6 480 ida_free(&gpio_ida, gdev->id);
fcf273e5 481 kfree_const(gdev->label);
476e2fc5 482 kfree(gdev->descs);
9efd9e69 483 kfree(gdev);
ff2b1359
LW
484}
485
1f5eb8b1
KG
486#ifdef CONFIG_GPIO_CDEV
487#define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt))
488#define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev))
489#else
490/*
491 * gpiolib_cdev_register() indirectly calls device_add(), which is still
492 * required even when cdev is not selected.
493 */
494#define gcdev_register(gdev, devt) device_add(&(gdev)->dev)
495#define gcdev_unregister(gdev) device_del(&(gdev)->dev)
496#endif
497
159f3cd9
GR
498static int gpiochip_setup_dev(struct gpio_device *gdev)
499{
d377f56f 500 int ret;
159f3cd9 501
1f5eb8b1 502 ret = gcdev_register(gdev, gpio_devt);
d377f56f
LW
503 if (ret)
504 return ret;
111379dc 505
d377f56f
LW
506 ret = gpiochip_sysfs_register(gdev);
507 if (ret)
159f3cd9
GR
508 goto err_remove_device;
509
510 /* From this point, the .release() function cleans up gpio_device */
511 gdev->dev.release = gpiodevice_release;
262b9011
GU
512 dev_dbg(&gdev->dev, "registered GPIOs %d to %d on %s\n", gdev->base,
513 gdev->base + gdev->ngpio - 1, gdev->chip->label ? : "generic");
159f3cd9
GR
514
515 return 0;
516
517err_remove_device:
1f5eb8b1 518 gcdev_unregister(gdev);
d377f56f 519 return ret;
159f3cd9
GR
520}
521
a0b66a73 522static void gpiochip_machine_hog(struct gpio_chip *gc, struct gpiod_hog *hog)
a411e81e
BG
523{
524 struct gpio_desc *desc;
525 int rv;
526
a0b66a73 527 desc = gpiochip_get_desc(gc, hog->chip_hwnum);
a411e81e 528 if (IS_ERR(desc)) {
262b9011
GU
529 chip_err(gc, "%s: unable to get GPIO desc: %ld\n", __func__,
530 PTR_ERR(desc));
a411e81e
BG
531 return;
532 }
533
ba3efdff 534 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
a411e81e
BG
535 return;
536
537 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
538 if (rv)
262b9011
GU
539 gpiod_err(desc, "%s: unable to hog GPIO line (%s:%u): %d\n",
540 __func__, gc->label, hog->chip_hwnum, rv);
a411e81e
BG
541}
542
a0b66a73 543static void machine_gpiochip_add(struct gpio_chip *gc)
a411e81e
BG
544{
545 struct gpiod_hog *hog;
546
547 mutex_lock(&gpio_machine_hogs_mutex);
548
549 list_for_each_entry(hog, &gpio_machine_hogs, list) {
a0b66a73
LW
550 if (!strcmp(gc->label, hog->chip_label))
551 gpiochip_machine_hog(gc, hog);
a411e81e
BG
552 }
553
554 mutex_unlock(&gpio_machine_hogs_mutex);
555}
556
159f3cd9
GR
557static void gpiochip_setup_devs(void)
558{
559 struct gpio_device *gdev;
d377f56f 560 int ret;
159f3cd9
GR
561
562 list_for_each_entry(gdev, &gpio_devices, list) {
d377f56f
LW
563 ret = gpiochip_setup_dev(gdev);
564 if (ret)
262b9011
GU
565 dev_err(&gdev->dev,
566 "Failed to initialize gpio device (%d)\n", ret);
159f3cd9
GR
567 }
568}
569
a0b66a73 570int gpiochip_add_data_with_key(struct gpio_chip *gc, void *data,
39c3fd58
AL
571 struct lock_class_key *lock_key,
572 struct lock_class_key *request_key)
d2876d08
DB
573{
574 unsigned long flags;
d377f56f 575 int ret = 0;
ff2b1359 576 unsigned i;
a0b66a73 577 int base = gc->base;
ff2b1359 578 struct gpio_device *gdev;
d2876d08 579
ff2b1359
LW
580 /*
581 * First: allocate and populate the internal stat container, and
582 * set up the struct device.
583 */
969f07b4 584 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
ff2b1359 585 if (!gdev)
14e85c0e 586 return -ENOMEM;
3c702e99 587 gdev->dev.bus = &gpio_bus_type;
a0b66a73
LW
588 gdev->chip = gc;
589 gc->gpiodev = gdev;
590 if (gc->parent) {
591 gdev->dev.parent = gc->parent;
592 gdev->dev.of_node = gc->parent->of_node;
acc6e331
TR
593 }
594
4731210c 595 of_gpio_dev_init(gc, gdev);
acc6e331 596
8d4a85b6 597 gdev->id = ida_alloc(&gpio_ida, GFP_KERNEL);
ff2b1359 598 if (gdev->id < 0) {
d377f56f 599 ret = gdev->id;
ff2b1359
LW
600 goto err_free_gdev;
601 }
c351bb64
QW
602
603 ret = dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id);
604 if (ret)
605 goto err_free_ida;
606
ff2b1359
LW
607 device_initialize(&gdev->dev);
608 dev_set_drvdata(&gdev->dev, gdev);
a0b66a73
LW
609 if (gc->parent && gc->parent->driver)
610 gdev->owner = gc->parent->driver->owner;
611 else if (gc->owner)
ff2b1359 612 /* TODO: remove chip->owner */
a0b66a73 613 gdev->owner = gc->owner;
ff2b1359
LW
614 else
615 gdev->owner = THIS_MODULE;
d2876d08 616
a0b66a73 617 gdev->descs = kcalloc(gc->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL);
1c3cdb18 618 if (!gdev->descs) {
d377f56f 619 ret = -ENOMEM;
c351bb64 620 goto err_free_dev_name;
ff2b1359
LW
621 }
622
a0b66a73
LW
623 if (gc->ngpio == 0) {
624 chip_err(gc, "tried to insert a GPIO chip with zero lines\n");
d377f56f 625 ret = -EINVAL;
159f3cd9 626 goto err_free_descs;
5ed41cc4 627 }
df4878e9 628
a0b66a73
LW
629 if (gc->ngpio > FASTPATH_NGPIO)
630 chip_warn(gc, "line cnt %u is greater than fast path cnt %u\n",
631 gc->ngpio, FASTPATH_NGPIO);
3027743f 632
a0b66a73 633 gdev->label = kstrdup_const(gc->label ?: "unknown", GFP_KERNEL);
df4878e9 634 if (!gdev->label) {
d377f56f 635 ret = -ENOMEM;
476e2fc5 636 goto err_free_descs;
df4878e9
LW
637 }
638
a0b66a73 639 gdev->ngpio = gc->ngpio;
43c54eca 640 gdev->data = data;
5ed41cc4 641
d2876d08
DB
642 spin_lock_irqsave(&gpio_lock, flags);
643
fdeb8e15
LW
644 /*
645 * TODO: this allocates a Linux GPIO number base in the global
646 * GPIO numberspace for this chip. In the long run we want to
647 * get *rid* of this numberspace and use only descriptors, but
648 * it may be a pipe dream. It will not happen before we get rid
649 * of the sysfs interface anyways.
650 */
8d0aab2f 651 if (base < 0) {
a0b66a73 652 base = gpiochip_find_base(gc->ngpio);
8d0aab2f 653 if (base < 0) {
d377f56f 654 ret = base;
225fce83 655 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 656 goto err_free_label;
8d0aab2f 657 }
fdeb8e15
LW
658 /*
659 * TODO: it should not be necessary to reflect the assigned
660 * base outside of the GPIO subsystem. Go over drivers and
661 * see if anyone makes use of this, else drop this and assign
662 * a poison instead.
663 */
a0b66a73 664 gc->base = base;
8d0aab2f 665 }
fdeb8e15 666 gdev->base = base;
8d0aab2f 667
d377f56f
LW
668 ret = gpiodev_add_to_list(gdev);
669 if (ret) {
05aa5203 670 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 671 goto err_free_label;
05aa5203 672 }
1a989d0f 673
a0b66a73 674 for (i = 0; i < gc->ngpio; i++)
767cd17a 675 gdev->descs[i].gdev = gdev;
14e85c0e 676
207270dd
DC
677 spin_unlock_irqrestore(&gpio_lock, flags);
678
6accc376 679 BLOCKING_INIT_NOTIFIER_HEAD(&gdev->notifier);
51c1064e 680
f23f1516 681#ifdef CONFIG_PINCTRL
20ec3e39 682 INIT_LIST_HEAD(&gdev->pin_ranges);
f23f1516
SH
683#endif
684
7cba1a4d
BG
685 if (gc->names)
686 ret = gpiochip_set_desc_names(gc);
687 else
688 ret = devprop_gpiochip_set_names(gc);
d377f56f 689 if (ret)
5f3ca732
MP
690 goto err_remove_from_list;
691
a0b66a73 692 ret = gpiochip_alloc_valid_mask(gc);
d377f56f 693 if (ret)
48057ed1 694 goto err_remove_from_list;
e0d89728 695
a0b66a73 696 ret = of_gpiochip_add(gc);
d377f56f 697 if (ret)
48057ed1 698 goto err_free_gpiochip_mask;
28355f81 699
a0b66a73 700 ret = gpiochip_init_valid_mask(gc);
d377f56f 701 if (ret)
35779890 702 goto err_remove_of_chip;
f8ec92a9 703
a0b66a73 704 for (i = 0; i < gc->ngpio; i++) {
3edfb7bd
RRD
705 struct gpio_desc *desc = &gdev->descs[i];
706
a0b66a73 707 if (gc->get_direction && gpiochip_line_is_valid(gc, i)) {
4fc5bfeb 708 assign_bit(FLAG_IS_OUT,
a0b66a73 709 &desc->flags, !gc->get_direction(gc, i));
d95da993 710 } else {
4fc5bfeb 711 assign_bit(FLAG_IS_OUT,
a0b66a73 712 &desc->flags, !gc->direction_input);
d95da993 713 }
3edfb7bd
RRD
714 }
715
a0b66a73 716 ret = gpiochip_add_pin_ranges(gc);
b056ca1c
AS
717 if (ret)
718 goto err_remove_of_chip;
719
a0b66a73 720 acpi_gpiochip_add(gc);
391c970c 721
a0b66a73 722 machine_gpiochip_add(gc);
a411e81e 723
a0b66a73 724 ret = gpiochip_irqchip_init_valid_mask(gc);
9411e3aa
AS
725 if (ret)
726 goto err_remove_acpi_chip;
727
a0b66a73 728 ret = gpiochip_irqchip_init_hw(gc);
fbdf8d4b 729 if (ret)
48057ed1
LW
730 goto err_remove_acpi_chip;
731
a0b66a73 732 ret = gpiochip_add_irqchip(gc, lock_key, request_key);
fbdf8d4b 733 if (ret)
48057ed1
LW
734 goto err_remove_irqchip_mask;
735
3c702e99
LW
736 /*
737 * By first adding the chardev, and then adding the device,
738 * we get a device node entry in sysfs under
739 * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
740 * coldplug of device nodes and other udev business.
159f3cd9
GR
741 * We can do this only if gpiolib has been initialized.
742 * Otherwise, defer until later.
3c702e99 743 */
159f3cd9 744 if (gpiolib_initialized) {
d377f56f
LW
745 ret = gpiochip_setup_dev(gdev);
746 if (ret)
48057ed1 747 goto err_remove_irqchip;
159f3cd9 748 }
cedb1881 749 return 0;
3bae4811 750
48057ed1 751err_remove_irqchip:
a0b66a73 752 gpiochip_irqchip_remove(gc);
48057ed1 753err_remove_irqchip_mask:
a0b66a73 754 gpiochip_irqchip_free_valid_mask(gc);
35779890 755err_remove_acpi_chip:
a0b66a73 756 acpi_gpiochip_remove(gc);
35779890 757err_remove_of_chip:
a0b66a73
LW
758 gpiochip_free_hogs(gc);
759 of_gpiochip_remove(gc);
35779890 760err_free_gpiochip_mask:
a0b66a73
LW
761 gpiochip_remove_pin_ranges(gc);
762 gpiochip_free_valid_mask(gc);
5f3ca732 763err_remove_from_list:
225fce83 764 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 765 list_del(&gdev->list);
3bae4811 766 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 767err_free_label:
fcf273e5 768 kfree_const(gdev->label);
476e2fc5
GR
769err_free_descs:
770 kfree(gdev->descs);
c351bb64
QW
771err_free_dev_name:
772 kfree(dev_name(&gdev->dev));
a05a1404 773err_free_ida:
8d4a85b6 774 ida_free(&gpio_ida, gdev->id);
a05a1404 775err_free_gdev:
d2876d08 776 /* failures here can mean systems won't boot... */
3cc1fb73
GS
777 if (ret != -EPROBE_DEFER) {
778 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
779 gdev->base, gdev->base + gdev->ngpio - 1,
780 gc->label ? : "generic", ret);
781 }
fdeb8e15 782 kfree(gdev);
d377f56f 783 return ret;
d2876d08 784}
959bc7b2 785EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
d2876d08 786
43c54eca
LW
787/**
788 * gpiochip_get_data() - get per-subdriver data for the chip
a0b66a73 789 * @gc: GPIO chip
950d55f5
TR
790 *
791 * Returns:
792 * The per-subdriver data for the chip.
43c54eca 793 */
a0b66a73 794void *gpiochip_get_data(struct gpio_chip *gc)
43c54eca 795{
a0b66a73 796 return gc->gpiodev->data;
43c54eca
LW
797}
798EXPORT_SYMBOL_GPL(gpiochip_get_data);
799
d2876d08
DB
800/**
801 * gpiochip_remove() - unregister a gpio_chip
a0b66a73 802 * @gc: the chip to unregister
d2876d08
DB
803 *
804 * A gpio_chip with any GPIOs still requested may not be removed.
805 */
a0b66a73 806void gpiochip_remove(struct gpio_chip *gc)
d2876d08 807{
a0b66a73 808 struct gpio_device *gdev = gc->gpiodev;
d2876d08 809 unsigned long flags;
869233f8 810 unsigned int i;
d2876d08 811
ff2b1359 812 /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
afbc4f31 813 gpiochip_sysfs_unregister(gdev);
a0b66a73 814 gpiochip_free_hogs(gc);
bd203bd5
BJZ
815 /* Numb the device, cancelling all outstanding operations */
816 gdev->chip = NULL;
a0b66a73
LW
817 gpiochip_irqchip_remove(gc);
818 acpi_gpiochip_remove(gc);
819 of_gpiochip_remove(gc);
820 gpiochip_remove_pin_ranges(gc);
821 gpiochip_free_valid_mask(gc);
43c54eca
LW
822 /*
823 * We accept no more calls into the driver from this point, so
824 * NULL the driver data pointer
825 */
826 gdev->data = NULL;
391c970c 827
6798acaa 828 spin_lock_irqsave(&gpio_lock, flags);
fdeb8e15 829 for (i = 0; i < gdev->ngpio; i++) {
a0b66a73 830 if (gpiochip_is_requested(gc, i))
869233f8 831 break;
d2876d08 832 }
d2876d08 833 spin_unlock_irqrestore(&gpio_lock, flags);
14e85c0e 834
ca18a852 835 if (i != gdev->ngpio)
fdeb8e15 836 dev_crit(&gdev->dev,
58383c78 837 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
fab28b89 838
ff2b1359
LW
839 /*
840 * The gpiochip side puts its use of the device to rest here:
841 * if there are no userspace clients, the chardev and device will
842 * be removed, else it will be dangling until the last user is
843 * gone.
844 */
1f5eb8b1 845 gcdev_unregister(gdev);
ff2b1359 846 put_device(&gdev->dev);
d2876d08
DB
847}
848EXPORT_SYMBOL_GPL(gpiochip_remove);
849
594fa265
GL
850/**
851 * gpiochip_find() - iterator for locating a specific gpio_chip
852 * @data: data to pass to match function
950d55f5 853 * @match: Callback function to check gpio_chip
594fa265
GL
854 *
855 * Similar to bus_find_device. It returns a reference to a gpio_chip as
856 * determined by a user supplied @match callback. The callback should return
857 * 0 if the device doesn't match and non-zero if it does. If the callback is
858 * non-zero, this function will return to the caller and not iterate over any
859 * more gpio_chips.
860 */
07ce8ec7 861struct gpio_chip *gpiochip_find(void *data,
a0b66a73 862 int (*match)(struct gpio_chip *gc,
3d0f7cf0 863 void *data))
594fa265 864{
ff2b1359 865 struct gpio_device *gdev;
a0b66a73 866 struct gpio_chip *gc = NULL;
594fa265 867 unsigned long flags;
594fa265
GL
868
869 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 870 list_for_each_entry(gdev, &gpio_devices, list)
acf06ff7 871 if (gdev->chip && match(gdev->chip, data)) {
a0b66a73 872 gc = gdev->chip;
594fa265 873 break;
acf06ff7 874 }
ff2b1359 875
594fa265
GL
876 spin_unlock_irqrestore(&gpio_lock, flags);
877
a0b66a73 878 return gc;
594fa265 879}
8fa0c9bf 880EXPORT_SYMBOL_GPL(gpiochip_find);
d2876d08 881
a0b66a73 882static int gpiochip_match_name(struct gpio_chip *gc, void *data)
79697ef9
AC
883{
884 const char *name = data;
885
a0b66a73 886 return !strcmp(gc->label, name);
79697ef9
AC
887}
888
889static struct gpio_chip *find_chip_by_name(const char *name)
890{
891 return gpiochip_find((void *)name, gpiochip_match_name);
892}
893
14250520
LW
894#ifdef CONFIG_GPIOLIB_IRQCHIP
895
896/*
897 * The following is irqchip helper code for gpiochips.
898 */
899
9411e3aa
AS
900static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
901{
902 struct gpio_irq_chip *girq = &gc->irq;
903
904 if (!girq->init_hw)
905 return 0;
906
907 return girq->init_hw(gc);
908}
909
5fbe5b58 910static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb 911{
5fbe5b58
LW
912 struct gpio_irq_chip *girq = &gc->irq;
913
914 if (!girq->init_valid_mask)
79b804cb
MW
915 return 0;
916
5fbe5b58
LW
917 girq->valid_mask = gpiochip_allocate_mask(gc);
918 if (!girq->valid_mask)
79b804cb
MW
919 return -ENOMEM;
920
5fbe5b58
LW
921 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
922
79b804cb
MW
923 return 0;
924}
925
a0b66a73 926static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 927{
a0b66a73
LW
928 bitmap_free(gc->irq.valid_mask);
929 gc->irq.valid_mask = NULL;
79b804cb
MW
930}
931
a0b66a73 932bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc,
64ff2c8e 933 unsigned int offset)
79b804cb 934{
a0b66a73 935 if (!gpiochip_line_is_valid(gc, offset))
726cb3ba 936 return false;
79b804cb 937 /* No mask means all valid */
a0b66a73 938 if (likely(!gc->irq.valid_mask))
79b804cb 939 return true;
a0b66a73 940 return test_bit(offset, gc->irq.valid_mask);
79b804cb 941}
64ff2c8e 942EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
79b804cb 943
fdd61a01
LW
944#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
945
946/**
947 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
948 * to a gpiochip
949 * @gc: the gpiochip to set the irqchip hierarchical handler to
950 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
951 * will then percolate up to the parent
952 */
953static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
954 struct irq_chip *irqchip)
955{
956 /* DT will deal with mapping each IRQ as we go along */
957 if (is_of_node(gc->irq.fwnode))
958 return;
959
960 /*
961 * This is for legacy and boardfile "irqchip" fwnodes: allocate
962 * irqs upfront instead of dynamically since we don't have the
963 * dynamic type of allocation that hardware description languages
964 * provide. Once all GPIO drivers using board files are gone from
965 * the kernel we can delete this code, but for a transitional period
966 * it is necessary to keep this around.
967 */
968 if (is_fwnode_irqchip(gc->irq.fwnode)) {
969 int i;
970 int ret;
971
972 for (i = 0; i < gc->ngpio; i++) {
973 struct irq_fwspec fwspec;
974 unsigned int parent_hwirq;
975 unsigned int parent_type;
976 struct gpio_irq_chip *girq = &gc->irq;
977
978 /*
979 * We call the child to parent translation function
980 * only to check if the child IRQ is valid or not.
981 * Just pick the rising edge type here as that is what
982 * we likely need to support.
983 */
984 ret = girq->child_to_parent_hwirq(gc, i,
985 IRQ_TYPE_EDGE_RISING,
986 &parent_hwirq,
987 &parent_type);
988 if (ret) {
989 chip_err(gc, "skip set-up on hwirq %d\n",
990 i);
991 continue;
992 }
993
994 fwspec.fwnode = gc->irq.fwnode;
995 /* This is the hwirq for the GPIO line side of things */
996 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
997 /* Just pick something */
998 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
999 fwspec.param_count = 2;
1000 ret = __irq_domain_alloc_irqs(gc->irq.domain,
1001 /* just pick something */
1002 -1,
1003 1,
1004 NUMA_NO_NODE,
1005 &fwspec,
1006 false,
1007 NULL);
1008 if (ret < 0) {
1009 chip_err(gc,
1010 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1011 i, parent_hwirq,
1012 ret);
1013 }
1014 }
1015 }
1016
1017 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1018
1019 return;
1020}
1021
1022static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1023 struct irq_fwspec *fwspec,
1024 unsigned long *hwirq,
1025 unsigned int *type)
1026{
1027 /* We support standard DT translation */
1028 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1029 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1030 }
1031
1032 /* This is for board files and others not using DT */
1033 if (is_fwnode_irqchip(fwspec->fwnode)) {
1034 int ret;
1035
1036 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1037 if (ret)
1038 return ret;
1039 WARN_ON(*type == IRQ_TYPE_NONE);
1040 return 0;
1041 }
1042 return -EINVAL;
1043}
1044
1045static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1046 unsigned int irq,
1047 unsigned int nr_irqs,
1048 void *data)
1049{
1050 struct gpio_chip *gc = d->host_data;
1051 irq_hw_number_t hwirq;
1052 unsigned int type = IRQ_TYPE_NONE;
1053 struct irq_fwspec *fwspec = data;
24258761 1054 void *parent_arg;
fdd61a01
LW
1055 unsigned int parent_hwirq;
1056 unsigned int parent_type;
1057 struct gpio_irq_chip *girq = &gc->irq;
1058 int ret;
1059
1060 /*
1061 * The nr_irqs parameter is always one except for PCI multi-MSI
1062 * so this should not happen.
1063 */
1064 WARN_ON(nr_irqs != 1);
1065
1066 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
1067 if (ret)
1068 return ret;
1069
366950ee 1070 chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
fdd61a01
LW
1071
1072 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
1073 &parent_hwirq, &parent_type);
1074 if (ret) {
1075 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
1076 return ret;
1077 }
366950ee 1078 chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq);
fdd61a01
LW
1079
1080 /*
1081 * We set handle_bad_irq because the .set_type() should
1082 * always be invoked and set the right type of handler.
1083 */
1084 irq_domain_set_info(d,
1085 irq,
1086 hwirq,
1087 gc->irq.chip,
1088 gc,
1089 girq->handler,
1090 NULL, NULL);
1091 irq_set_probe(irq);
1092
fdd61a01 1093 /* This parent only handles asserted level IRQs */
24258761
KH
1094 parent_arg = girq->populate_parent_alloc_arg(gc, parent_hwirq, parent_type);
1095 if (!parent_arg)
1096 return -ENOMEM;
1097
366950ee 1098 chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
fdd61a01 1099 irq, parent_hwirq);
c34f6dc8 1100 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
24258761 1101 ret = irq_domain_alloc_irqs_parent(d, irq, 1, parent_arg);
880b7cf2
KH
1102 /*
1103 * If the parent irqdomain is msi, the interrupts have already
1104 * been allocated, so the EEXIST is good.
1105 */
1106 if (irq_domain_is_msi(d->parent) && (ret == -EEXIST))
1107 ret = 0;
fdd61a01
LW
1108 if (ret)
1109 chip_err(gc,
1110 "failed to allocate parent hwirq %d for hwirq %lu\n",
1111 parent_hwirq, hwirq);
1112
24258761 1113 kfree(parent_arg);
fdd61a01
LW
1114 return ret;
1115}
1116
a0b66a73 1117static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *gc,
fdd61a01
LW
1118 unsigned int offset)
1119{
1120 return offset;
1121}
1122
1123static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
1124{
1125 ops->activate = gpiochip_irq_domain_activate;
1126 ops->deactivate = gpiochip_irq_domain_deactivate;
1127 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
1128 ops->free = irq_domain_free_irqs_common;
1129
1130 /*
1131 * We only allow overriding the translate() function for
1132 * hierarchical chips, and this should only be done if the user
1133 * really need something other than 1:1 translation.
1134 */
1135 if (!ops->translate)
1136 ops->translate = gpiochip_hierarchy_irq_domain_translate;
1137}
1138
1139static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1140{
1141 if (!gc->irq.child_to_parent_hwirq ||
1142 !gc->irq.fwnode) {
1143 chip_err(gc, "missing irqdomain vital data\n");
1144 return -EINVAL;
1145 }
1146
1147 if (!gc->irq.child_offset_to_irq)
1148 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
1149
24258761
KH
1150 if (!gc->irq.populate_parent_alloc_arg)
1151 gc->irq.populate_parent_alloc_arg =
fdd61a01
LW
1152 gpiochip_populate_parent_fwspec_twocell;
1153
1154 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
1155
1156 gc->irq.domain = irq_domain_create_hierarchy(
1157 gc->irq.parent_domain,
1158 0,
1159 gc->ngpio,
1160 gc->irq.fwnode,
1161 &gc->irq.child_irq_domain_ops,
1162 gc);
1163
1164 if (!gc->irq.domain)
1165 return -ENOMEM;
1166
1167 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
1168
1169 return 0;
1170}
1171
1172static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1173{
1174 return !!gc->irq.parent_domain;
1175}
1176
a0b66a73 1177void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *gc,
fdd61a01
LW
1178 unsigned int parent_hwirq,
1179 unsigned int parent_type)
1180{
24258761
KH
1181 struct irq_fwspec *fwspec;
1182
1183 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
1184 if (!fwspec)
1185 return NULL;
1186
a0b66a73 1187 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1188 fwspec->param_count = 2;
1189 fwspec->param[0] = parent_hwirq;
1190 fwspec->param[1] = parent_type;
24258761
KH
1191
1192 return fwspec;
fdd61a01
LW
1193}
1194EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
1195
a0b66a73 1196void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *gc,
fdd61a01
LW
1197 unsigned int parent_hwirq,
1198 unsigned int parent_type)
1199{
24258761
KH
1200 struct irq_fwspec *fwspec;
1201
1202 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
1203 if (!fwspec)
1204 return NULL;
1205
a0b66a73 1206 fwspec->fwnode = gc->irq.parent_domain->fwnode;
fdd61a01
LW
1207 fwspec->param_count = 4;
1208 fwspec->param[0] = 0;
1209 fwspec->param[1] = parent_hwirq;
1210 fwspec->param[2] = 0;
1211 fwspec->param[3] = parent_type;
24258761
KH
1212
1213 return fwspec;
fdd61a01
LW
1214}
1215EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
1216
1217#else
1218
1219static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
1220{
1221 return -EINVAL;
1222}
1223
1224static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
1225{
1226 return false;
1227}
1228
1229#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
1230
14250520
LW
1231/**
1232 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
1233 * @d: the irqdomain used by this irqchip
1234 * @irq: the global irq number used by this GPIO irqchip irq
1235 * @hwirq: the local IRQ/GPIO line offset on this gpiochip
1236 *
1237 * This function will set up the mapping for a certain IRQ line on a
1238 * gpiochip by assigning the gpiochip as chip data, and using the irqchip
1239 * stored inside the gpiochip.
1240 */
1b95b4eb
TR
1241int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
1242 irq_hw_number_t hwirq)
14250520 1243{
a0b66a73 1244 struct gpio_chip *gc = d->host_data;
d377f56f 1245 int ret = 0;
14250520 1246
a0b66a73 1247 if (!gpiochip_irqchip_irq_valid(gc, hwirq))
dc749a09
GS
1248 return -ENXIO;
1249
a0b66a73 1250 irq_set_chip_data(irq, gc);
a0a8bcf4
GS
1251 /*
1252 * This lock class tells lockdep that GPIO irqs are in a different
1253 * category than their parents, so it won't report false recursion.
1254 */
a0b66a73
LW
1255 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
1256 irq_set_chip_and_handler(irq, gc->irq.chip, gc->irq.handler);
d245b3f9 1257 /* Chips that use nested thread handlers have them marked */
a0b66a73 1258 if (gc->irq.threaded)
1c8732bb 1259 irq_set_nested_thread(irq, 1);
14250520 1260 irq_set_noprobe(irq);
23393d49 1261
a0b66a73
LW
1262 if (gc->irq.num_parents == 1)
1263 ret = irq_set_parent(irq, gc->irq.parents[0]);
1264 else if (gc->irq.map)
1265 ret = irq_set_parent(irq, gc->irq.map[hwirq]);
e0d89728 1266
d377f56f
LW
1267 if (ret < 0)
1268 return ret;
e0d89728 1269
1333b90f
LW
1270 /*
1271 * No set-up of the hardware will happen if IRQ_TYPE_NONE
1272 * is passed as default type.
1273 */
a0b66a73
LW
1274 if (gc->irq.default_type != IRQ_TYPE_NONE)
1275 irq_set_irq_type(irq, gc->irq.default_type);
14250520
LW
1276
1277 return 0;
1278}
1b95b4eb 1279EXPORT_SYMBOL_GPL(gpiochip_irq_map);
14250520 1280
1b95b4eb 1281void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
c3626fde 1282{
a0b66a73 1283 struct gpio_chip *gc = d->host_data;
1c8732bb 1284
a0b66a73 1285 if (gc->irq.threaded)
1c8732bb 1286 irq_set_nested_thread(irq, 0);
c3626fde
LW
1287 irq_set_chip_and_handler(irq, NULL, NULL);
1288 irq_set_chip_data(irq, NULL);
1289}
1b95b4eb 1290EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
c3626fde 1291
14250520
LW
1292static const struct irq_domain_ops gpiochip_domain_ops = {
1293 .map = gpiochip_irq_map,
c3626fde 1294 .unmap = gpiochip_irq_unmap,
14250520
LW
1295 /* Virtually all GPIO irqchips are twocell:ed */
1296 .xlate = irq_domain_xlate_twocell,
1297};
1298
fdd61a01
LW
1299/*
1300 * TODO: move these activate/deactivate in under the hierarchicial
1301 * irqchip implementation as static once SPMI and SSBI (all external
1302 * users) are phased over.
1303 */
ef74f70e
BM
1304/**
1305 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
1306 * @domain: The IRQ domain used by this IRQ chip
1307 * @data: Outermost irq_data associated with the IRQ
1308 * @reserve: If set, only reserve an interrupt vector instead of assigning one
1309 *
1310 * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
1311 * used as the activate function for the &struct irq_domain_ops. The host_data
1312 * for the IRQ domain must be the &struct gpio_chip.
1313 */
1314int gpiochip_irq_domain_activate(struct irq_domain *domain,
1315 struct irq_data *data, bool reserve)
1316{
a0b66a73 1317 struct gpio_chip *gc = domain->host_data;
ef74f70e 1318
a0b66a73 1319 return gpiochip_lock_as_irq(gc, data->hwirq);
ef74f70e
BM
1320}
1321EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
1322
1323/**
1324 * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
1325 * @domain: The IRQ domain used by this IRQ chip
1326 * @data: Outermost irq_data associated with the IRQ
1327 *
1328 * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
1329 * be used as the deactivate function for the &struct irq_domain_ops. The
1330 * host_data for the IRQ domain must be the &struct gpio_chip.
1331 */
1332void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
1333 struct irq_data *data)
1334{
a0b66a73 1335 struct gpio_chip *gc = domain->host_data;
ef74f70e 1336
a0b66a73 1337 return gpiochip_unlock_as_irq(gc, data->hwirq);
ef74f70e
BM
1338}
1339EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
1340
13daf489 1341static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset)
14250520 1342{
a0b66a73 1343 struct irq_domain *domain = gc->irq.domain;
fdd61a01 1344
a0b66a73 1345 if (!gpiochip_irqchip_irq_valid(gc, offset))
4e6b8238 1346 return -ENXIO;
5b76e79c 1347
fdd61a01
LW
1348#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1349 if (irq_domain_is_hierarchy(domain)) {
1350 struct irq_fwspec spec;
1351
1352 spec.fwnode = domain->fwnode;
1353 spec.param_count = 2;
a0b66a73 1354 spec.param[0] = gc->irq.child_offset_to_irq(gc, offset);
fdd61a01
LW
1355 spec.param[1] = IRQ_TYPE_NONE;
1356
1357 return irq_create_fwspec_mapping(&spec);
1358 }
1359#endif
1360
1361 return irq_create_mapping(domain, offset);
14250520
LW
1362}
1363
14250520
LW
1364static int gpiochip_irq_reqres(struct irq_data *d)
1365{
a0b66a73 1366 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
5b76e79c 1367
a0b66a73 1368 return gpiochip_reqres_irq(gc, d->hwirq);
14250520
LW
1369}
1370
1371static void gpiochip_irq_relres(struct irq_data *d)
1372{
a0b66a73 1373 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
14250520 1374
a0b66a73 1375 gpiochip_relres_irq(gc, d->hwirq);
14250520
LW
1376}
1377
a8173820
MS
1378static void gpiochip_irq_mask(struct irq_data *d)
1379{
1380 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1381
1382 if (gc->irq.irq_mask)
1383 gc->irq.irq_mask(d);
1384 gpiochip_disable_irq(gc, d->hwirq);
1385}
1386
1387static void gpiochip_irq_unmask(struct irq_data *d)
1388{
1389 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
1390
1391 gpiochip_enable_irq(gc, d->hwirq);
1392 if (gc->irq.irq_unmask)
1393 gc->irq.irq_unmask(d);
1394}
1395
461c1a7d 1396static void gpiochip_irq_enable(struct irq_data *d)
14250520 1397{
a0b66a73 1398 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
e0d89728 1399
a0b66a73 1400 gpiochip_enable_irq(gc, d->hwirq);
a8173820 1401 gc->irq.irq_enable(d);
461c1a7d
HV
1402}
1403
1404static void gpiochip_irq_disable(struct irq_data *d)
1405{
a0b66a73 1406 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
461c1a7d 1407
a8173820 1408 gc->irq.irq_disable(d);
a0b66a73 1409 gpiochip_disable_irq(gc, d->hwirq);
461c1a7d
HV
1410}
1411
a0b66a73 1412static void gpiochip_set_irq_hooks(struct gpio_chip *gc)
ca620f2d 1413{
a0b66a73 1414 struct irq_chip *irqchip = gc->irq.chip;
ca620f2d
HV
1415
1416 if (!irqchip->irq_request_resources &&
1417 !irqchip->irq_release_resources) {
1418 irqchip->irq_request_resources = gpiochip_irq_reqres;
1419 irqchip->irq_release_resources = gpiochip_irq_relres;
1420 }
a0b66a73 1421 if (WARN_ON(gc->irq.irq_enable))
461c1a7d 1422 return;
171948ea 1423 /* Check if the irqchip already has this hook... */
9d552219
NS
1424 if (irqchip->irq_enable == gpiochip_irq_enable ||
1425 irqchip->irq_mask == gpiochip_irq_mask) {
171948ea
HV
1426 /*
1427 * ...and if so, give a gentle warning that this is bad
1428 * practice.
1429 */
a0b66a73 1430 chip_info(gc,
171948ea
HV
1431 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
1432 return;
1433 }
a8173820
MS
1434
1435 if (irqchip->irq_disable) {
1436 gc->irq.irq_disable = irqchip->irq_disable;
1437 irqchip->irq_disable = gpiochip_irq_disable;
1438 } else {
1439 gc->irq.irq_mask = irqchip->irq_mask;
1440 irqchip->irq_mask = gpiochip_irq_mask;
1441 }
1442
1443 if (irqchip->irq_enable) {
1444 gc->irq.irq_enable = irqchip->irq_enable;
1445 irqchip->irq_enable = gpiochip_irq_enable;
1446 } else {
1447 gc->irq.irq_unmask = irqchip->irq_unmask;
1448 irqchip->irq_unmask = gpiochip_irq_unmask;
1449 }
14250520
LW
1450}
1451
e0d89728
TR
1452/**
1453 * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
a0b66a73 1454 * @gc: the GPIO chip to add the IRQ chip to
39c3fd58
AL
1455 * @lock_key: lockdep class for IRQ lock
1456 * @request_key: lockdep class for IRQ request
e0d89728 1457 */
a0b66a73 1458static int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1459 struct lock_class_key *lock_key,
1460 struct lock_class_key *request_key)
e0d89728 1461{
a0b66a73 1462 struct irq_chip *irqchip = gc->irq.chip;
fdd61a01 1463 const struct irq_domain_ops *ops = NULL;
e0d89728
TR
1464 struct device_node *np;
1465 unsigned int type;
1466 unsigned int i;
1467
1468 if (!irqchip)
1469 return 0;
1470
a0b66a73
LW
1471 if (gc->irq.parent_handler && gc->can_sleep) {
1472 chip_err(gc, "you cannot have chained interrupts on a chip that may sleep\n");
e0d89728
TR
1473 return -EINVAL;
1474 }
1475
a0b66a73
LW
1476 np = gc->gpiodev->dev.of_node;
1477 type = gc->irq.default_type;
e0d89728
TR
1478
1479 /*
1480 * Specifying a default trigger is a terrible idea if DT or ACPI is
1481 * used to configure the interrupts, as you may end up with
1482 * conflicting triggers. Tell the user, and reset to NONE.
1483 */
1484 if (WARN(np && type != IRQ_TYPE_NONE,
1485 "%s: Ignoring %u default trigger\n", np->full_name, type))
1486 type = IRQ_TYPE_NONE;
1487
a0b66a73
LW
1488 if (has_acpi_companion(gc->parent) && type != IRQ_TYPE_NONE) {
1489 acpi_handle_warn(ACPI_HANDLE(gc->parent),
e0d89728
TR
1490 "Ignoring %u default trigger\n", type);
1491 type = IRQ_TYPE_NONE;
1492 }
1493
ef382374
NS
1494 if (gc->to_irq)
1495 chip_warn(gc, "to_irq is redefined in %s and you shouldn't rely on it\n", __func__);
1496
a0b66a73
LW
1497 gc->to_irq = gpiochip_to_irq;
1498 gc->irq.default_type = type;
1499 gc->irq.lock_key = lock_key;
1500 gc->irq.request_key = request_key;
e0d89728 1501
fdd61a01 1502 /* If a parent irqdomain is provided, let's build a hierarchy */
a0b66a73
LW
1503 if (gpiochip_hierarchy_is_hierarchical(gc)) {
1504 int ret = gpiochip_hierarchy_add_domain(gc);
fdd61a01
LW
1505 if (ret)
1506 return ret;
1507 } else {
1508 /* Some drivers provide custom irqdomain ops */
a0b66a73
LW
1509 if (gc->irq.domain_ops)
1510 ops = gc->irq.domain_ops;
fdd61a01
LW
1511
1512 if (!ops)
1513 ops = &gpiochip_domain_ops;
a0b66a73
LW
1514 gc->irq.domain = irq_domain_add_simple(np,
1515 gc->ngpio,
1516 gc->irq.first,
1517 ops, gc);
1518 if (!gc->irq.domain)
fdd61a01
LW
1519 return -EINVAL;
1520 }
e0d89728 1521
a0b66a73
LW
1522 if (gc->irq.parent_handler) {
1523 void *data = gc->irq.parent_handler_data ?: gc;
e0d89728 1524
a0b66a73 1525 for (i = 0; i < gc->irq.num_parents; i++) {
e0d89728
TR
1526 /*
1527 * The parent IRQ chip is already using the chip_data
1528 * for this IRQ chip, so our callbacks simply use the
1529 * handler_data.
1530 */
a0b66a73
LW
1531 irq_set_chained_handler_and_data(gc->irq.parents[i],
1532 gc->irq.parent_handler,
e0d89728
TR
1533 data);
1534 }
e0d89728
TR
1535 }
1536
a0b66a73 1537 gpiochip_set_irq_hooks(gc);
ca620f2d 1538
a0b66a73 1539 acpi_gpiochip_request_interrupts(gc);
e0d89728
TR
1540
1541 return 0;
1542}
1543
14250520
LW
1544/**
1545 * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
a0b66a73 1546 * @gc: the gpiochip to remove the irqchip from
14250520
LW
1547 *
1548 * This is called only from gpiochip_remove()
1549 */
a0b66a73 1550static void gpiochip_irqchip_remove(struct gpio_chip *gc)
14250520 1551{
a0b66a73 1552 struct irq_chip *irqchip = gc->irq.chip;
39e5f096 1553 unsigned int offset;
c3626fde 1554
a0b66a73 1555 acpi_gpiochip_free_interrupts(gc);
afa82fab 1556
a0b66a73
LW
1557 if (irqchip && gc->irq.parent_handler) {
1558 struct gpio_irq_chip *irq = &gc->irq;
39e5f096
TR
1559 unsigned int i;
1560
1561 for (i = 0; i < irq->num_parents; i++)
1562 irq_set_chained_handler_and_data(irq->parents[i],
1563 NULL, NULL);
25e4fe92
DES
1564 }
1565
c3626fde 1566 /* Remove all IRQ mappings and delete the domain */
a0b66a73 1567 if (gc->irq.domain) {
39e5f096
TR
1568 unsigned int irq;
1569
a0b66a73
LW
1570 for (offset = 0; offset < gc->ngpio; offset++) {
1571 if (!gpiochip_irqchip_irq_valid(gc, offset))
79b804cb 1572 continue;
f0fbe7bc 1573
a0b66a73 1574 irq = irq_find_mapping(gc->irq.domain, offset);
f0fbe7bc 1575 irq_dispose_mapping(irq);
79b804cb 1576 }
f0fbe7bc 1577
a0b66a73 1578 irq_domain_remove(gc->irq.domain);
c3626fde 1579 }
14250520 1580
461c1a7d
HV
1581 if (irqchip) {
1582 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
1583 irqchip->irq_request_resources = NULL;
1584 irqchip->irq_release_resources = NULL;
1585 }
1586 if (irqchip->irq_enable == gpiochip_irq_enable) {
a0b66a73
LW
1587 irqchip->irq_enable = gc->irq.irq_enable;
1588 irqchip->irq_disable = gc->irq.irq_disable;
461c1a7d 1589 }
14250520 1590 }
a0b66a73
LW
1591 gc->irq.irq_enable = NULL;
1592 gc->irq.irq_disable = NULL;
1593 gc->irq.chip = NULL;
79b804cb 1594
a0b66a73 1595 gpiochip_irqchip_free_valid_mask(gc);
14250520
LW
1596}
1597
6a45b0e2
MW
1598/**
1599 * gpiochip_irqchip_add_domain() - adds an irqdomain to a gpiochip
1600 * @gc: the gpiochip to add the irqchip to
1601 * @domain: the irqdomain to add to the gpiochip
1602 *
1603 * This function adds an IRQ domain to the gpiochip.
1604 */
1605int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
1606 struct irq_domain *domain)
1607{
1608 if (!domain)
1609 return -EINVAL;
1610
1611 gc->to_irq = gpiochip_to_irq;
1612 gc->irq.domain = domain;
1613
1614 return 0;
1615}
1616EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_domain);
1617
14250520
LW
1618#else /* CONFIG_GPIOLIB_IRQCHIP */
1619
a0b66a73 1620static inline int gpiochip_add_irqchip(struct gpio_chip *gc,
39c3fd58
AL
1621 struct lock_class_key *lock_key,
1622 struct lock_class_key *request_key)
e0d89728
TR
1623{
1624 return 0;
1625}
a0b66a73 1626static void gpiochip_irqchip_remove(struct gpio_chip *gc) {}
9411e3aa 1627
a0b66a73 1628static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
9411e3aa
AS
1629{
1630 return 0;
1631}
1632
a0b66a73 1633static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb
MW
1634{
1635 return 0;
1636}
a0b66a73 1637static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gc)
79b804cb 1638{ }
14250520
LW
1639
1640#endif /* CONFIG_GPIOLIB_IRQCHIP */
1641
c771c2f4
JG
1642/**
1643 * gpiochip_generic_request() - request the gpio function for a pin
a0b66a73 1644 * @gc: the gpiochip owning the GPIO
c771c2f4
JG
1645 * @offset: the offset of the GPIO to request for GPIO function
1646 */
13daf489 1647int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset)
c771c2f4 1648{
89ad556b 1649#ifdef CONFIG_PINCTRL
a0b66a73 1650 if (list_empty(&gc->gpiodev->pin_ranges))
89ad556b
TR
1651 return 0;
1652#endif
2ab73c6d 1653
a0b66a73 1654 return pinctrl_gpio_request(gc->gpiodev->base + offset);
c771c2f4
JG
1655}
1656EXPORT_SYMBOL_GPL(gpiochip_generic_request);
1657
1658/**
1659 * gpiochip_generic_free() - free the gpio function from a pin
a0b66a73 1660 * @gc: the gpiochip to request the gpio function for
c771c2f4
JG
1661 * @offset: the offset of the GPIO to free from GPIO function
1662 */
13daf489 1663void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset)
c771c2f4 1664{
6dbbf846
EC
1665#ifdef CONFIG_PINCTRL
1666 if (list_empty(&gc->gpiodev->pin_ranges))
1667 return;
1668#endif
1669
a0b66a73 1670 pinctrl_gpio_free(gc->gpiodev->base + offset);
c771c2f4
JG
1671}
1672EXPORT_SYMBOL_GPL(gpiochip_generic_free);
1673
2956b5d9
MW
1674/**
1675 * gpiochip_generic_config() - apply configuration for a pin
a0b66a73 1676 * @gc: the gpiochip owning the GPIO
2956b5d9
MW
1677 * @offset: the offset of the GPIO to apply the configuration
1678 * @config: the configuration to be applied
1679 */
13daf489 1680int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset,
2956b5d9
MW
1681 unsigned long config)
1682{
a0b66a73 1683 return pinctrl_gpio_set_config(gc->gpiodev->base + offset, config);
2956b5d9
MW
1684}
1685EXPORT_SYMBOL_GPL(gpiochip_generic_config);
1686
f23f1516 1687#ifdef CONFIG_PINCTRL
165adc9c 1688
586a87e6
CR
1689/**
1690 * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
a0b66a73 1691 * @gc: the gpiochip to add the range for
d32651f6 1692 * @pctldev: the pin controller to map to
586a87e6
CR
1693 * @gpio_offset: the start offset in the current gpio_chip number space
1694 * @pin_group: name of the pin group inside the pin controller
973c1714
CL
1695 *
1696 * Calling this function directly from a DeviceTree-supported
1697 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
1698 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
1699 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
586a87e6 1700 */
a0b66a73 1701int gpiochip_add_pingroup_range(struct gpio_chip *gc,
586a87e6
CR
1702 struct pinctrl_dev *pctldev,
1703 unsigned int gpio_offset, const char *pin_group)
1704{
1705 struct gpio_pin_range *pin_range;
a0b66a73 1706 struct gpio_device *gdev = gc->gpiodev;
586a87e6
CR
1707 int ret;
1708
1709 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
1710 if (!pin_range) {
a0b66a73 1711 chip_err(gc, "failed to allocate pin ranges\n");
586a87e6
CR
1712 return -ENOMEM;
1713 }
1714
1715 /* Use local offset as range ID */
1716 pin_range->range.id = gpio_offset;
a0b66a73
LW
1717 pin_range->range.gc = gc;
1718 pin_range->range.name = gc->label;
fdeb8e15 1719 pin_range->range.base = gdev->base + gpio_offset;
586a87e6
CR
1720 pin_range->pctldev = pctldev;
1721
1722 ret = pinctrl_get_group_pins(pctldev, pin_group,
1723 &pin_range->range.pins,
1724 &pin_range->range.npins);
61c6375d
MN
1725 if (ret < 0) {
1726 kfree(pin_range);
586a87e6 1727 return ret;
61c6375d 1728 }
586a87e6
CR
1729
1730 pinctrl_add_gpio_range(pctldev, &pin_range->range);
1731
a0b66a73 1732 chip_dbg(gc, "created GPIO range %d->%d ==> %s PINGRP %s\n",
1a2a99c6 1733 gpio_offset, gpio_offset + pin_range->range.npins - 1,
586a87e6
CR
1734 pinctrl_dev_get_devname(pctldev), pin_group);
1735
20ec3e39 1736 list_add_tail(&pin_range->node, &gdev->pin_ranges);
586a87e6
CR
1737
1738 return 0;
1739}
1740EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
1741
3f0f8670
LW
1742/**
1743 * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
a0b66a73 1744 * @gc: the gpiochip to add the range for
950d55f5 1745 * @pinctl_name: the dev_name() of the pin controller to map to
316511c0
LW
1746 * @gpio_offset: the start offset in the current gpio_chip number space
1747 * @pin_offset: the start offset in the pin controller number space
3f0f8670
LW
1748 * @npins: the number of pins from the offset of each pin space (GPIO and
1749 * pin controller) to accumulate in this range
950d55f5
TR
1750 *
1751 * Returns:
1752 * 0 on success, or a negative error-code on failure.
973c1714
CL
1753 *
1754 * Calling this function directly from a DeviceTree-supported
1755 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
1756 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
1757 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
3f0f8670 1758 */
a0b66a73 1759int gpiochip_add_pin_range(struct gpio_chip *gc, const char *pinctl_name,
316511c0 1760 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 1761 unsigned int npins)
f23f1516
SH
1762{
1763 struct gpio_pin_range *pin_range;
a0b66a73 1764 struct gpio_device *gdev = gc->gpiodev;
b4d4b1f0 1765 int ret;
f23f1516 1766
3f0f8670 1767 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
f23f1516 1768 if (!pin_range) {
a0b66a73 1769 chip_err(gc, "failed to allocate pin ranges\n");
1e63d7b9 1770 return -ENOMEM;
f23f1516
SH
1771 }
1772
3f0f8670 1773 /* Use local offset as range ID */
316511c0 1774 pin_range->range.id = gpio_offset;
a0b66a73
LW
1775 pin_range->range.gc = gc;
1776 pin_range->range.name = gc->label;
fdeb8e15 1777 pin_range->range.base = gdev->base + gpio_offset;
316511c0 1778 pin_range->range.pin_base = pin_offset;
f23f1516 1779 pin_range->range.npins = npins;
192c369c 1780 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
f23f1516 1781 &pin_range->range);
8f23ca1a 1782 if (IS_ERR(pin_range->pctldev)) {
b4d4b1f0 1783 ret = PTR_ERR(pin_range->pctldev);
a0b66a73 1784 chip_err(gc, "could not create pin range\n");
3f0f8670 1785 kfree(pin_range);
b4d4b1f0 1786 return ret;
3f0f8670 1787 }
a0b66a73 1788 chip_dbg(gc, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
1a2a99c6 1789 gpio_offset, gpio_offset + npins - 1,
316511c0
LW
1790 pinctl_name,
1791 pin_offset, pin_offset + npins - 1);
f23f1516 1792
20ec3e39 1793 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1e63d7b9
LW
1794
1795 return 0;
f23f1516 1796}
165adc9c 1797EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
f23f1516 1798
3f0f8670
LW
1799/**
1800 * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
a0b66a73 1801 * @gc: the chip to remove all the mappings for
3f0f8670 1802 */
a0b66a73 1803void gpiochip_remove_pin_ranges(struct gpio_chip *gc)
f23f1516
SH
1804{
1805 struct gpio_pin_range *pin_range, *tmp;
a0b66a73 1806 struct gpio_device *gdev = gc->gpiodev;
f23f1516 1807
20ec3e39 1808 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
f23f1516
SH
1809 list_del(&pin_range->node);
1810 pinctrl_remove_gpio_range(pin_range->pctldev,
1811 &pin_range->range);
3f0f8670 1812 kfree(pin_range);
f23f1516
SH
1813 }
1814}
165adc9c
LW
1815EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
1816
1817#endif /* CONFIG_PINCTRL */
f23f1516 1818
d2876d08
DB
1819/* These "optional" allocation calls help prevent drivers from stomping
1820 * on each other, and help provide better diagnostics in debugfs.
1821 * They're called even less than the "set direction" calls.
1822 */
fac9d885 1823static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
d2876d08 1824{
a0b66a73 1825 struct gpio_chip *gc = desc->gdev->chip;
d377f56f 1826 int ret;
d2876d08 1827 unsigned long flags;
3789f5ac 1828 unsigned offset;
d2876d08 1829
18534df4
MS
1830 if (label) {
1831 label = kstrdup_const(label, GFP_KERNEL);
1832 if (!label)
1833 return -ENOMEM;
1834 }
1835
bcabdef1
AC
1836 spin_lock_irqsave(&gpio_lock, flags);
1837
d2876d08 1838 /* NOTE: gpio_request() can be called in early boot,
35e8bb51 1839 * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
d2876d08
DB
1840 */
1841
1842 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
1843 desc_set_label(desc, label ? : "?");
438d8908 1844 } else {
d377f56f 1845 ret = -EBUSY;
95d9f84f 1846 goto out_free_unlock;
35e8bb51
DB
1847 }
1848
a0b66a73
LW
1849 if (gc->request) {
1850 /* gc->request may sleep */
35e8bb51 1851 spin_unlock_irqrestore(&gpio_lock, flags);
3789f5ac 1852 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
1853 if (gpiochip_line_is_valid(gc, offset))
1854 ret = gc->request(gc, offset);
3789f5ac 1855 else
d377f56f 1856 ret = -EINVAL;
35e8bb51
DB
1857 spin_lock_irqsave(&gpio_lock, flags);
1858
8bbff39c 1859 if (ret) {
35e8bb51 1860 desc_set_label(desc, NULL);
35e8bb51 1861 clear_bit(FLAG_REQUESTED, &desc->flags);
95d9f84f 1862 goto out_free_unlock;
35e8bb51 1863 }
438d8908 1864 }
a0b66a73
LW
1865 if (gc->get_direction) {
1866 /* gc->get_direction may sleep */
80b0a602 1867 spin_unlock_irqrestore(&gpio_lock, flags);
372e722e 1868 gpiod_get_direction(desc);
80b0a602
MN
1869 spin_lock_irqsave(&gpio_lock, flags);
1870 }
77c2d792 1871 spin_unlock_irqrestore(&gpio_lock, flags);
95d9f84f
AS
1872 return 0;
1873
1874out_free_unlock:
1875 spin_unlock_irqrestore(&gpio_lock, flags);
1876 kfree_const(label);
d377f56f 1877 return ret;
77c2d792
MW
1878}
1879
fdeb8e15
LW
1880/*
1881 * This descriptor validation needs to be inserted verbatim into each
1882 * function taking a descriptor, so we need to use a preprocessor
54d77198
LW
1883 * macro to avoid endless duplication. If the desc is NULL it is an
1884 * optional GPIO and calls should just bail out.
fdeb8e15 1885 */
a746a232
RV
1886static int validate_desc(const struct gpio_desc *desc, const char *func)
1887{
1888 if (!desc)
1889 return 0;
1890 if (IS_ERR(desc)) {
1891 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
1892 return PTR_ERR(desc);
1893 }
1894 if (!desc->gdev) {
1895 pr_warn("%s: invalid GPIO (no device)\n", func);
1896 return -EINVAL;
1897 }
1898 if (!desc->gdev->chip) {
1899 dev_warn(&desc->gdev->dev,
1900 "%s: backing chip is gone\n", func);
1901 return 0;
1902 }
1903 return 1;
1904}
1905
fdeb8e15 1906#define VALIDATE_DESC(desc) do { \
a746a232
RV
1907 int __valid = validate_desc(desc, __func__); \
1908 if (__valid <= 0) \
1909 return __valid; \
1910 } while (0)
fdeb8e15
LW
1911
1912#define VALIDATE_DESC_VOID(desc) do { \
a746a232
RV
1913 int __valid = validate_desc(desc, __func__); \
1914 if (__valid <= 0) \
fdeb8e15 1915 return; \
a746a232 1916 } while (0)
fdeb8e15 1917
0eb4c6c2 1918int gpiod_request(struct gpio_desc *desc, const char *label)
77c2d792 1919{
d377f56f 1920 int ret = -EPROBE_DEFER;
fdeb8e15 1921 struct gpio_device *gdev;
77c2d792 1922
fdeb8e15
LW
1923 VALIDATE_DESC(desc);
1924 gdev = desc->gdev;
77c2d792 1925
fdeb8e15 1926 if (try_module_get(gdev->owner)) {
d377f56f 1927 ret = gpiod_request_commit(desc, label);
8bbff39c 1928 if (ret)
fdeb8e15 1929 module_put(gdev->owner);
33a68e86
LW
1930 else
1931 get_device(&gdev->dev);
77c2d792
MW
1932 }
1933
d377f56f
LW
1934 if (ret)
1935 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
77c2d792 1936
d377f56f 1937 return ret;
d2876d08 1938}
372e722e 1939
fac9d885 1940static bool gpiod_free_commit(struct gpio_desc *desc)
d2876d08 1941{
77c2d792 1942 bool ret = false;
d2876d08 1943 unsigned long flags;
a0b66a73 1944 struct gpio_chip *gc;
d2876d08 1945
3d599d1c
UKK
1946 might_sleep();
1947
372e722e 1948 gpiod_unexport(desc);
d8f388d8 1949
d2876d08
DB
1950 spin_lock_irqsave(&gpio_lock, flags);
1951
a0b66a73
LW
1952 gc = desc->gdev->chip;
1953 if (gc && test_bit(FLAG_REQUESTED, &desc->flags)) {
1954 if (gc->free) {
35e8bb51 1955 spin_unlock_irqrestore(&gpio_lock, flags);
a0b66a73
LW
1956 might_sleep_if(gc->can_sleep);
1957 gc->free(gc, gpio_chip_hwgpio(desc));
35e8bb51
DB
1958 spin_lock_irqsave(&gpio_lock, flags);
1959 }
18534df4 1960 kfree_const(desc->label);
d2876d08 1961 desc_set_label(desc, NULL);
07697461 1962 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
35e8bb51 1963 clear_bit(FLAG_REQUESTED, &desc->flags);
aca5ce14 1964 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
25553ff0 1965 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
9225d516
DF
1966 clear_bit(FLAG_PULL_UP, &desc->flags);
1967 clear_bit(FLAG_PULL_DOWN, &desc->flags);
2148ad77 1968 clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
73e03419
KG
1969 clear_bit(FLAG_EDGE_RISING, &desc->flags);
1970 clear_bit(FLAG_EDGE_FALLING, &desc->flags);
f625d460 1971 clear_bit(FLAG_IS_HOGGED, &desc->flags);
63636d95
GU
1972#ifdef CONFIG_OF_DYNAMIC
1973 desc->hog = NULL;
65cff704
KG
1974#endif
1975#ifdef CONFIG_GPIO_CDEV
1976 WRITE_ONCE(desc->debounce_period_us, 0);
63636d95 1977#endif
77c2d792
MW
1978 ret = true;
1979 }
d2876d08
DB
1980
1981 spin_unlock_irqrestore(&gpio_lock, flags);
6accc376
KG
1982 blocking_notifier_call_chain(&desc->gdev->notifier,
1983 GPIOLINE_CHANGED_RELEASED, desc);
51c1064e 1984
77c2d792
MW
1985 return ret;
1986}
1987
0eb4c6c2 1988void gpiod_free(struct gpio_desc *desc)
77c2d792 1989{
fac9d885 1990 if (desc && desc->gdev && gpiod_free_commit(desc)) {
fdeb8e15 1991 module_put(desc->gdev->owner);
33a68e86
LW
1992 put_device(&desc->gdev->dev);
1993 } else {
77c2d792 1994 WARN_ON(extra_checks);
33a68e86 1995 }
d2876d08 1996}
372e722e 1997
d2876d08
DB
1998/**
1999 * gpiochip_is_requested - return string iff signal was requested
a0b66a73 2000 * @gc: controller managing the signal
d2876d08
DB
2001 * @offset: of signal within controller's 0..(ngpio - 1) range
2002 *
2003 * Returns NULL if the GPIO is not currently requested, else a string.
9c8318ff
AC
2004 * The string returned is the label passed to gpio_request(); if none has been
2005 * passed it is a meaningless, non-NULL constant.
d2876d08
DB
2006 *
2007 * This function is for use by GPIO controller drivers. The label can
2008 * help with diagnostics, and knowing that the signal is used as a GPIO
2009 * can help avoid accidentally multiplexing it to another controller.
2010 */
13daf489 2011const char *gpiochip_is_requested(struct gpio_chip *gc, unsigned int offset)
d2876d08 2012{
6c0b4e6c 2013 struct gpio_desc *desc;
d2876d08 2014
a0b66a73 2015 if (offset >= gc->ngpio)
d2876d08 2016 return NULL;
6c0b4e6c 2017
a0b66a73 2018 desc = gpiochip_get_desc(gc, offset);
1739a2d8
BG
2019 if (IS_ERR(desc))
2020 return NULL;
6c0b4e6c 2021
372e722e 2022 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
d2876d08 2023 return NULL;
372e722e 2024 return desc->label;
d2876d08
DB
2025}
2026EXPORT_SYMBOL_GPL(gpiochip_is_requested);
2027
77c2d792
MW
2028/**
2029 * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
a0b66a73 2030 * @gc: GPIO chip
950d55f5 2031 * @hwnum: hardware number of the GPIO for which to request the descriptor
77c2d792 2032 * @label: label for the GPIO
5923ea6c
LW
2033 * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
2034 * specify things like line inversion semantics with the machine flags
2035 * such as GPIO_OUT_LOW
2036 * @dflags: descriptor request flags for this GPIO or 0 if default, this
2037 * can be used to specify consumer semantics such as open drain
77c2d792
MW
2038 *
2039 * Function allows GPIO chip drivers to request and use their own GPIO
2040 * descriptors via gpiolib API. Difference to gpiod_request() is that this
2041 * function will not increase reference count of the GPIO chip module. This
2042 * allows the GPIO chip module to be unloaded as needed (we assume that the
2043 * GPIO chip driver handles freeing the GPIOs it has requested).
950d55f5
TR
2044 *
2045 * Returns:
2046 * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
2047 * code on failure.
77c2d792 2048 */
a0b66a73 2049struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *gc,
06863620 2050 unsigned int hwnum,
21abf103 2051 const char *label,
5923ea6c
LW
2052 enum gpio_lookup_flags lflags,
2053 enum gpiod_flags dflags)
77c2d792 2054{
a0b66a73 2055 struct gpio_desc *desc = gpiochip_get_desc(gc, hwnum);
d377f56f 2056 int ret;
77c2d792 2057
abdc08a3 2058 if (IS_ERR(desc)) {
a0b66a73 2059 chip_err(gc, "failed to get GPIO descriptor\n");
abdc08a3
AC
2060 return desc;
2061 }
2062
d377f56f
LW
2063 ret = gpiod_request_commit(desc, label);
2064 if (ret < 0)
2065 return ERR_PTR(ret);
77c2d792 2066
d377f56f
LW
2067 ret = gpiod_configure_flags(desc, label, lflags, dflags);
2068 if (ret) {
a0b66a73 2069 chip_err(gc, "setup of own GPIO %s failed\n", label);
21abf103 2070 gpiod_free_commit(desc);
d377f56f 2071 return ERR_PTR(ret);
21abf103
LW
2072 }
2073
abdc08a3 2074 return desc;
77c2d792 2075}
f7d4ad98 2076EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
77c2d792
MW
2077
2078/**
2079 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
2080 * @desc: GPIO descriptor to free
2081 *
2082 * Function frees the given GPIO requested previously with
2083 * gpiochip_request_own_desc().
2084 */
2085void gpiochip_free_own_desc(struct gpio_desc *desc)
2086{
2087 if (desc)
fac9d885 2088 gpiod_free_commit(desc);
77c2d792 2089}
f7d4ad98 2090EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
d2876d08 2091
fdeb8e15
LW
2092/*
2093 * Drivers MUST set GPIO direction before making get/set calls. In
d2876d08
DB
2094 * some cases this is done in early boot, before IRQs are enabled.
2095 *
2096 * As a rule these aren't called more than once (except for drivers
2097 * using the open-drain emulation idiom) so these are natural places
2098 * to accumulate extra debugging checks. Note that we can't (yet)
2099 * rely on gpio_request() having been called beforehand.
2100 */
2101
d99f8876 2102static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset,
62adc6f3 2103 unsigned long config)
71479789 2104{
d90f3685
BG
2105 if (!gc->set_config)
2106 return -ENOTSUPP;
542f3615 2107
62adc6f3 2108 return gc->set_config(gc, offset, config);
71479789
TP
2109}
2110
0c4d8666
AS
2111static int gpio_set_config_with_argument(struct gpio_desc *desc,
2112 enum pin_config_param mode,
2113 u32 argument)
d99f8876 2114{
a0b66a73 2115 struct gpio_chip *gc = desc->gdev->chip;
91b4ea5f 2116 unsigned long config;
0c4d8666
AS
2117
2118 config = pinconf_to_config_packed(mode, argument);
2119 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
2120}
2121
baca3b15
AS
2122static int gpio_set_config_with_argument_optional(struct gpio_desc *desc,
2123 enum pin_config_param mode,
2124 u32 argument)
2125{
2126 struct device *dev = &desc->gdev->dev;
2127 int gpio = gpio_chip_hwgpio(desc);
2128 int ret;
2129
2130 ret = gpio_set_config_with_argument(desc, mode, argument);
2131 if (ret != -ENOTSUPP)
2132 return ret;
d99f8876
BG
2133
2134 switch (mode) {
baca3b15
AS
2135 case PIN_CONFIG_PERSIST_STATE:
2136 dev_dbg(dev, "Persistence not supported for GPIO %d\n", gpio);
d99f8876 2137 break;
d99f8876 2138 default:
baca3b15 2139 break;
d99f8876
BG
2140 }
2141
baca3b15
AS
2142 return 0;
2143}
2144
0c4d8666
AS
2145static int gpio_set_config(struct gpio_desc *desc, enum pin_config_param mode)
2146{
6aa32ad7 2147 return gpio_set_config_with_argument(desc, mode, 0);
d99f8876
BG
2148}
2149
5f4bf171 2150static int gpio_set_bias(struct gpio_desc *desc)
2148ad77 2151{
9ef6293c 2152 enum pin_config_param bias;
6aa32ad7 2153 unsigned int arg;
2148ad77
KG
2154
2155 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
2156 bias = PIN_CONFIG_BIAS_DISABLE;
2157 else if (test_bit(FLAG_PULL_UP, &desc->flags))
2158 bias = PIN_CONFIG_BIAS_PULL_UP;
2159 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
2160 bias = PIN_CONFIG_BIAS_PULL_DOWN;
9ef6293c
AS
2161 else
2162 return 0;
2148ad77 2163
6aa32ad7
AS
2164 switch (bias) {
2165 case PIN_CONFIG_BIAS_PULL_DOWN:
2166 case PIN_CONFIG_BIAS_PULL_UP:
2167 arg = 1;
2168 break;
2169
2170 default:
2171 arg = 0;
2172 break;
2148ad77 2173 }
6aa32ad7 2174
baca3b15 2175 return gpio_set_config_with_argument_optional(desc, bias, arg);
2148ad77
KG
2176}
2177
f725edd8
AS
2178int gpio_set_debounce_timeout(struct gpio_desc *desc, unsigned int debounce)
2179{
2180 return gpio_set_config_with_argument_optional(desc,
2181 PIN_CONFIG_INPUT_DEBOUNCE,
2182 debounce);
2148ad77
KG
2183}
2184
79a9becd
AC
2185/**
2186 * gpiod_direction_input - set the GPIO direction to input
2187 * @desc: GPIO to set to input
2188 *
2189 * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
2190 * be called safely on it.
2191 *
2192 * Return 0 in case of success, else an error code.
2193 */
2194int gpiod_direction_input(struct gpio_desc *desc)
d2876d08 2195{
a0b66a73 2196 struct gpio_chip *gc;
d377f56f 2197 int ret = 0;
d2876d08 2198
fdeb8e15 2199 VALIDATE_DESC(desc);
a0b66a73 2200 gc = desc->gdev->chip;
bcabdef1 2201
e48d194d
LW
2202 /*
2203 * It is legal to have no .get() and .direction_input() specified if
2204 * the chip is output-only, but you can't specify .direction_input()
2205 * and not support the .get() operation, that doesn't make sense.
2206 */
a0b66a73 2207 if (!gc->get && gc->direction_input) {
6424de5a 2208 gpiod_warn(desc,
e48d194d
LW
2209 "%s: missing get() but have direction_input()\n",
2210 __func__);
be1a4b13
LW
2211 return -EIO;
2212 }
2213
e48d194d
LW
2214 /*
2215 * If we have a .direction_input() callback, things are simple,
2216 * just call it. Else we are some input-only chip so try to check the
2217 * direction (if .get_direction() is supported) else we silently
2218 * assume we are in input mode after this.
2219 */
a0b66a73
LW
2220 if (gc->direction_input) {
2221 ret = gc->direction_input(gc, gpio_chip_hwgpio(desc));
2222 } else if (gc->get_direction &&
2223 (gc->get_direction(gc, gpio_chip_hwgpio(desc)) != 1)) {
ae9847f4 2224 gpiod_warn(desc,
e48d194d
LW
2225 "%s: missing direction_input() operation and line is output\n",
2226 __func__);
ae9847f4
RRD
2227 return -EIO;
2228 }
2148ad77 2229 if (ret == 0) {
d2876d08 2230 clear_bit(FLAG_IS_OUT, &desc->flags);
5f4bf171 2231 ret = gpio_set_bias(desc);
2148ad77 2232 }
d449991c 2233
d377f56f 2234 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
d82da797 2235
d377f56f 2236 return ret;
d2876d08 2237}
79a9becd 2238EXPORT_SYMBOL_GPL(gpiod_direction_input);
372e722e 2239
fac9d885 2240static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
d2876d08 2241{
c663e5f5 2242 struct gpio_chip *gc = desc->gdev->chip;
ad17731d 2243 int val = !!value;
ae9847f4 2244 int ret = 0;
d2876d08 2245
e48d194d
LW
2246 /*
2247 * It's OK not to specify .direction_output() if the gpiochip is
2248 * output-only, but if there is then not even a .set() operation it
2249 * is pretty tricky to drive the output line.
2250 */
ae9847f4 2251 if (!gc->set && !gc->direction_output) {
6424de5a 2252 gpiod_warn(desc,
e48d194d
LW
2253 "%s: missing set() and direction_output() operations\n",
2254 __func__);
be1a4b13
LW
2255 return -EIO;
2256 }
2257
ae9847f4
RRD
2258 if (gc->direction_output) {
2259 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
2260 } else {
e48d194d 2261 /* Check that we are in output mode if we can */
ae9847f4
RRD
2262 if (gc->get_direction &&
2263 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
2264 gpiod_warn(desc,
2265 "%s: missing direction_output() operation\n",
2266 __func__);
2267 return -EIO;
2268 }
e48d194d
LW
2269 /*
2270 * If we can't actively set the direction, we are some
2271 * output-only chip, so just drive the output as desired.
2272 */
ae9847f4
RRD
2273 gc->set(gc, gpio_chip_hwgpio(desc), val);
2274 }
2275
c663e5f5 2276 if (!ret)
d2876d08 2277 set_bit(FLAG_IS_OUT, &desc->flags);
ad17731d 2278 trace_gpio_value(desc_to_gpio(desc), 0, val);
c663e5f5
LW
2279 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
2280 return ret;
d2876d08 2281}
ef70bbe1
PZ
2282
2283/**
2284 * gpiod_direction_output_raw - set the GPIO direction to output
2285 * @desc: GPIO to set to output
2286 * @value: initial output value of the GPIO
2287 *
2288 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2289 * be called safely on it. The initial value of the output must be specified
2290 * as raw value on the physical line without regard for the ACTIVE_LOW status.
2291 *
2292 * Return 0 in case of success, else an error code.
2293 */
2294int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
2295{
fdeb8e15 2296 VALIDATE_DESC(desc);
fac9d885 2297 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1
PZ
2298}
2299EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
2300
2301/**
90df4fe0 2302 * gpiod_direction_output - set the GPIO direction to output
ef70bbe1
PZ
2303 * @desc: GPIO to set to output
2304 * @value: initial output value of the GPIO
2305 *
2306 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
2307 * be called safely on it. The initial value of the output must be specified
2308 * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
2309 * account.
2310 *
2311 * Return 0 in case of success, else an error code.
2312 */
2313int gpiod_direction_output(struct gpio_desc *desc, int value)
2314{
02e47980
LW
2315 int ret;
2316
fdeb8e15 2317 VALIDATE_DESC(desc);
ef70bbe1
PZ
2318 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2319 value = !value;
ad17731d
LW
2320 else
2321 value = !!value;
02e47980 2322
4e9439dd
HV
2323 /* GPIOs used for enabled IRQs shall not be set as output */
2324 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
2325 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
02e47980
LW
2326 gpiod_err(desc,
2327 "%s: tried to set a GPIO tied to an IRQ as output\n",
2328 __func__);
2329 return -EIO;
2330 }
2331
2332 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
2333 /* First see if we can enable open drain in hardware */
83522358 2334 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_DRAIN);
02e47980
LW
2335 if (!ret)
2336 goto set_output_value;
2337 /* Emulate open drain by not actively driving the line high */
e735244e
BG
2338 if (value) {
2339 ret = gpiod_direction_input(desc);
2340 goto set_output_flag;
2341 }
02e47980
LW
2342 }
2343 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
83522358 2344 ret = gpio_set_config(desc, PIN_CONFIG_DRIVE_OPEN_SOURCE);
02e47980
LW
2345 if (!ret)
2346 goto set_output_value;
2347 /* Emulate open source by not actively driving the line low */
e735244e
BG
2348 if (!value) {
2349 ret = gpiod_direction_input(desc);
2350 goto set_output_flag;
2351 }
02e47980 2352 } else {
83522358 2353 gpio_set_config(desc, PIN_CONFIG_DRIVE_PUSH_PULL);
02e47980
LW
2354 }
2355
2356set_output_value:
5f4bf171 2357 ret = gpio_set_bias(desc);
2821ae5f
KG
2358 if (ret)
2359 return ret;
fac9d885 2360 return gpiod_direction_output_raw_commit(desc, value);
e735244e
BG
2361
2362set_output_flag:
2363 /*
2364 * When emulating open-source or open-drain functionalities by not
2365 * actively driving the line (setting mode to input) we still need to
2366 * set the IS_OUT flag or otherwise we won't be able to set the line
2367 * value anymore.
2368 */
2369 if (ret == 0)
2370 set_bit(FLAG_IS_OUT, &desc->flags);
2371 return ret;
ef70bbe1 2372}
79a9becd 2373EXPORT_SYMBOL_GPL(gpiod_direction_output);
d2876d08 2374
8ced32ff
GU
2375/**
2376 * gpiod_set_config - sets @config for a GPIO
2377 * @desc: descriptor of the GPIO for which to set the configuration
2378 * @config: Same packed config format as generic pinconf
2379 *
2380 * Returns:
2381 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2382 * configuration.
2383 */
2384int gpiod_set_config(struct gpio_desc *desc, unsigned long config)
2385{
a0b66a73 2386 struct gpio_chip *gc;
8ced32ff
GU
2387
2388 VALIDATE_DESC(desc);
a0b66a73 2389 gc = desc->gdev->chip;
8ced32ff 2390
a0b66a73 2391 return gpio_do_set_config(gc, gpio_chip_hwgpio(desc), config);
8ced32ff
GU
2392}
2393EXPORT_SYMBOL_GPL(gpiod_set_config);
2394
c4b5be98 2395/**
950d55f5
TR
2396 * gpiod_set_debounce - sets @debounce time for a GPIO
2397 * @desc: descriptor of the GPIO for which to set debounce time
2398 * @debounce: debounce time in microseconds
65d87656 2399 *
950d55f5
TR
2400 * Returns:
2401 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
2402 * debounce time.
c4b5be98 2403 */
13daf489 2404int gpiod_set_debounce(struct gpio_desc *desc, unsigned int debounce)
c4b5be98 2405{
8ced32ff 2406 unsigned long config;
be1a4b13 2407
2956b5d9 2408 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
8ced32ff 2409 return gpiod_set_config(desc, config);
c4b5be98 2410}
79a9becd 2411EXPORT_SYMBOL_GPL(gpiod_set_debounce);
372e722e 2412
e10f72bf
AJ
2413/**
2414 * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
2415 * @desc: descriptor of the GPIO for which to configure persistence
2416 * @transitory: True to lose state on suspend or reset, false for persistence
2417 *
2418 * Returns:
2419 * 0 on success, otherwise a negative error code.
2420 */
2421int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
2422{
156dd392 2423 VALIDATE_DESC(desc);
e10f72bf
AJ
2424 /*
2425 * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
2426 * persistence state.
2427 */
4fc5bfeb 2428 assign_bit(FLAG_TRANSITORY, &desc->flags, transitory);
e10f72bf
AJ
2429
2430 /* If the driver supports it, set the persistence state now */
baca3b15
AS
2431 return gpio_set_config_with_argument_optional(desc,
2432 PIN_CONFIG_PERSIST_STATE,
2433 !transitory);
e10f72bf
AJ
2434}
2435EXPORT_SYMBOL_GPL(gpiod_set_transitory);
2436
79a9becd
AC
2437/**
2438 * gpiod_is_active_low - test whether a GPIO is active-low or not
2439 * @desc: the gpio descriptor to test
2440 *
2441 * Returns 1 if the GPIO is active-low, 0 otherwise.
2442 */
2443int gpiod_is_active_low(const struct gpio_desc *desc)
372e722e 2444{
fdeb8e15 2445 VALIDATE_DESC(desc);
79a9becd 2446 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
372e722e 2447}
79a9becd 2448EXPORT_SYMBOL_GPL(gpiod_is_active_low);
d2876d08 2449
d3a5bcb4
MM
2450/**
2451 * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not
2452 * @desc: the gpio descriptor to change
2453 */
2454void gpiod_toggle_active_low(struct gpio_desc *desc)
2455{
2456 VALIDATE_DESC_VOID(desc);
2457 change_bit(FLAG_ACTIVE_LOW, &desc->flags);
2458}
2459EXPORT_SYMBOL_GPL(gpiod_toggle_active_low);
2460
d2876d08
DB
2461/* I/O calls are only valid after configuration completed; the relevant
2462 * "is this a valid GPIO" error checks should already have been done.
2463 *
2464 * "Get" operations are often inlinable as reading a pin value register,
2465 * and masking the relevant bit in that register.
2466 *
2467 * When "set" operations are inlinable, they involve writing that mask to
2468 * one register to set a low value, or a different register to set it high.
2469 * Otherwise locking is needed, so there may be little value to inlining.
2470 *
2471 *------------------------------------------------------------------------
2472 *
2473 * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
2474 * have requested the GPIO. That can include implicit requesting by
2475 * a direction setting call. Marking a gpio as requested locks its chip
2476 * in memory, guaranteeing that these table lookups need no more locking
2477 * and that gpiochip_remove() will fail.
2478 *
2479 * REVISIT when debugging, consider adding some instrumentation to ensure
2480 * that the GPIO was actually requested.
2481 */
2482
fac9d885 2483static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
d2876d08 2484{
a0b66a73 2485 struct gpio_chip *gc;
372e722e 2486 int offset;
e20538b8 2487 int value;
d2876d08 2488
a0b66a73 2489 gc = desc->gdev->chip;
372e722e 2490 offset = gpio_chip_hwgpio(desc);
a0b66a73 2491 value = gc->get ? gc->get(gc, offset) : -EIO;
723a6303 2492 value = value < 0 ? value : !!value;
372e722e 2493 trace_gpio_value(desc_to_gpio(desc), 1, value);
3f397c21 2494 return value;
d2876d08 2495}
372e722e 2496
a0b66a73 2497static int gpio_chip_get_multiple(struct gpio_chip *gc,
eec1d566
LW
2498 unsigned long *mask, unsigned long *bits)
2499{
a0b66a73
LW
2500 if (gc->get_multiple) {
2501 return gc->get_multiple(gc, mask, bits);
2502 } else if (gc->get) {
eec1d566
LW
2503 int i, value;
2504
a0b66a73
LW
2505 for_each_set_bit(i, mask, gc->ngpio) {
2506 value = gc->get(gc, i);
eec1d566
LW
2507 if (value < 0)
2508 return value;
2509 __assign_bit(i, bits, value);
2510 }
2511 return 0;
2512 }
2513 return -EIO;
2514}
2515
2516int gpiod_get_array_value_complex(bool raw, bool can_sleep,
2517 unsigned int array_size,
2518 struct gpio_desc **desc_array,
77588c14 2519 struct gpio_array *array_info,
b9762beb 2520 unsigned long *value_bitmap)
eec1d566 2521{
d377f56f 2522 int ret, i = 0;
b17566a6
JK
2523
2524 /*
2525 * Validate array_info against desc_array and its size.
2526 * It should immediately follow desc_array if both
2527 * have been obtained from the same gpiod_get_array() call.
2528 */
2529 if (array_info && array_info->desc == desc_array &&
2530 array_size <= array_info->size &&
2531 (void *)array_info == desc_array + array_info->size) {
2532 if (!can_sleep)
2533 WARN_ON(array_info->chip->can_sleep);
2534
d377f56f 2535 ret = gpio_chip_get_multiple(array_info->chip,
b17566a6
JK
2536 array_info->get_mask,
2537 value_bitmap);
d377f56f
LW
2538 if (ret)
2539 return ret;
b17566a6
JK
2540
2541 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2542 bitmap_xor(value_bitmap, value_bitmap,
2543 array_info->invert_mask, array_size);
2544
b17566a6 2545 i = find_first_zero_bit(array_info->get_mask, array_size);
ae66eca0
AS
2546 if (i == array_size)
2547 return 0;
b17566a6
JK
2548 } else {
2549 array_info = NULL;
2550 }
eec1d566
LW
2551
2552 while (i < array_size) {
a0b66a73 2553 struct gpio_chip *gc = desc_array[i]->gdev->chip;
3027743f
LA
2554 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
2555 unsigned long *mask, *bits;
c07ea8d0 2556 int first, j;
eec1d566 2557
a0b66a73 2558 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
3027743f
LA
2559 mask = fastpath;
2560 } else {
a0b66a73 2561 mask = kmalloc_array(2 * BITS_TO_LONGS(gc->ngpio),
3027743f
LA
2562 sizeof(*mask),
2563 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
2564 if (!mask)
2565 return -ENOMEM;
2566 }
2567
a0b66a73
LW
2568 bits = mask + BITS_TO_LONGS(gc->ngpio);
2569 bitmap_zero(mask, gc->ngpio);
3027743f 2570
eec1d566 2571 if (!can_sleep)
a0b66a73 2572 WARN_ON(gc->can_sleep);
eec1d566
LW
2573
2574 /* collect all inputs belonging to the same chip */
2575 first = i;
eec1d566
LW
2576 do {
2577 const struct gpio_desc *desc = desc_array[i];
2578 int hwgpio = gpio_chip_hwgpio(desc);
2579
2580 __set_bit(hwgpio, mask);
2581 i++;
b17566a6
JK
2582
2583 if (array_info)
35ae7f96
JK
2584 i = find_next_zero_bit(array_info->get_mask,
2585 array_size, i);
eec1d566 2586 } while ((i < array_size) &&
a0b66a73 2587 (desc_array[i]->gdev->chip == gc));
eec1d566 2588
a0b66a73 2589 ret = gpio_chip_get_multiple(gc, mask, bits);
3027743f
LA
2590 if (ret) {
2591 if (mask != fastpath)
2592 kfree(mask);
eec1d566 2593 return ret;
3027743f 2594 }
eec1d566 2595
b17566a6 2596 for (j = first; j < i; ) {
eec1d566
LW
2597 const struct gpio_desc *desc = desc_array[j];
2598 int hwgpio = gpio_chip_hwgpio(desc);
2599 int value = test_bit(hwgpio, bits);
2600
2601 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2602 value = !value;
b9762beb 2603 __assign_bit(j, value_bitmap, value);
eec1d566 2604 trace_gpio_value(desc_to_gpio(desc), 1, value);
799d5eb4 2605 j++;
b17566a6
JK
2606
2607 if (array_info)
35ae7f96
JK
2608 j = find_next_zero_bit(array_info->get_mask, i,
2609 j);
eec1d566 2610 }
3027743f
LA
2611
2612 if (mask != fastpath)
2613 kfree(mask);
eec1d566
LW
2614 }
2615 return 0;
2616}
2617
d2876d08 2618/**
79a9becd
AC
2619 * gpiod_get_raw_value() - return a gpio's raw value
2620 * @desc: gpio whose value will be returned
d2876d08 2621 *
79a9becd 2622 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 2623 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd 2624 *
827a9b8b 2625 * This function can be called from contexts where we cannot sleep, and will
79a9becd 2626 * complain if the GPIO chip functions potentially sleep.
d2876d08 2627 */
79a9becd 2628int gpiod_get_raw_value(const struct gpio_desc *desc)
d2876d08 2629{
fdeb8e15 2630 VALIDATE_DESC(desc);
3285170f 2631 /* Should be using gpiod_get_raw_value_cansleep() */
fdeb8e15 2632 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 2633 return gpiod_get_raw_value_commit(desc);
d2876d08 2634}
79a9becd 2635EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
372e722e 2636
79a9becd
AC
2637/**
2638 * gpiod_get_value() - return a gpio's value
2639 * @desc: gpio whose value will be returned
2640 *
2641 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 2642 * account, or negative errno on failure.
79a9becd 2643 *
827a9b8b 2644 * This function can be called from contexts where we cannot sleep, and will
79a9becd
AC
2645 * complain if the GPIO chip functions potentially sleep.
2646 */
2647int gpiod_get_value(const struct gpio_desc *desc)
372e722e 2648{
79a9becd 2649 int value;
fdeb8e15
LW
2650
2651 VALIDATE_DESC(desc);
3285170f 2652 /* Should be using gpiod_get_value_cansleep() */
fdeb8e15 2653 WARN_ON(desc->gdev->chip->can_sleep);
79a9becd 2654
fac9d885 2655 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
2656 if (value < 0)
2657 return value;
2658
79a9becd
AC
2659 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2660 value = !value;
2661
2662 return value;
372e722e 2663}
79a9becd 2664EXPORT_SYMBOL_GPL(gpiod_get_value);
d2876d08 2665
eec1d566
LW
2666/**
2667 * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
b9762beb 2668 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 2669 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 2670 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2671 * @value_bitmap: bitmap to store the read values
eec1d566
LW
2672 *
2673 * Read the raw values of the GPIOs, i.e. the values of the physical lines
2674 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
2675 * else an error code.
2676 *
827a9b8b 2677 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
2678 * and it will complain if the GPIO chip functions potentially sleep.
2679 */
2680int gpiod_get_raw_array_value(unsigned int array_size,
b9762beb 2681 struct gpio_desc **desc_array,
77588c14 2682 struct gpio_array *array_info,
b9762beb 2683 unsigned long *value_bitmap)
eec1d566
LW
2684{
2685 if (!desc_array)
2686 return -EINVAL;
2687 return gpiod_get_array_value_complex(true, false, array_size,
77588c14
JK
2688 desc_array, array_info,
2689 value_bitmap);
eec1d566
LW
2690}
2691EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
2692
2693/**
2694 * gpiod_get_array_value() - read values from an array of GPIOs
b9762beb 2695 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 2696 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 2697 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2698 * @value_bitmap: bitmap to store the read values
eec1d566
LW
2699 *
2700 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
2701 * into account. Return 0 in case of success, else an error code.
2702 *
827a9b8b 2703 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
2704 * and it will complain if the GPIO chip functions potentially sleep.
2705 */
2706int gpiod_get_array_value(unsigned int array_size,
b9762beb 2707 struct gpio_desc **desc_array,
77588c14 2708 struct gpio_array *array_info,
b9762beb 2709 unsigned long *value_bitmap)
eec1d566
LW
2710{
2711 if (!desc_array)
2712 return -EINVAL;
2713 return gpiod_get_array_value_complex(false, false, array_size,
77588c14
JK
2714 desc_array, array_info,
2715 value_bitmap);
eec1d566
LW
2716}
2717EXPORT_SYMBOL_GPL(gpiod_get_array_value);
2718
aca5ce14 2719/*
fac9d885 2720 * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
79a9becd 2721 * @desc: gpio descriptor whose state need to be set.
20a8a968 2722 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
aca5ce14 2723 */
fac9d885 2724static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
aca5ce14 2725{
d377f56f 2726 int ret = 0;
a0b66a73 2727 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
2728 int offset = gpio_chip_hwgpio(desc);
2729
aca5ce14 2730 if (value) {
a0b66a73 2731 ret = gc->direction_input(gc, offset);
aca5ce14 2732 } else {
a0b66a73 2733 ret = gc->direction_output(gc, offset, 0);
d377f56f 2734 if (!ret)
372e722e 2735 set_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 2736 }
d377f56f
LW
2737 trace_gpio_direction(desc_to_gpio(desc), value, ret);
2738 if (ret < 0)
6424de5a
MB
2739 gpiod_err(desc,
2740 "%s: Error in set_value for open drain err %d\n",
d377f56f 2741 __func__, ret);
aca5ce14
LD
2742}
2743
25553ff0 2744/*
79a9becd
AC
2745 * _gpio_set_open_source_value() - Set the open source gpio's value.
2746 * @desc: gpio descriptor whose state need to be set.
20a8a968 2747 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
25553ff0 2748 */
fac9d885 2749static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
25553ff0 2750{
d377f56f 2751 int ret = 0;
a0b66a73 2752 struct gpio_chip *gc = desc->gdev->chip;
372e722e
AC
2753 int offset = gpio_chip_hwgpio(desc);
2754
25553ff0 2755 if (value) {
a0b66a73 2756 ret = gc->direction_output(gc, offset, 1);
d377f56f 2757 if (!ret)
372e722e 2758 set_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 2759 } else {
a0b66a73 2760 ret = gc->direction_input(gc, offset);
25553ff0 2761 }
d377f56f
LW
2762 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
2763 if (ret < 0)
6424de5a
MB
2764 gpiod_err(desc,
2765 "%s: Error in set_value for open source err %d\n",
d377f56f 2766 __func__, ret);
25553ff0
LD
2767}
2768
fac9d885 2769static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
d2876d08 2770{
a0b66a73 2771 struct gpio_chip *gc;
d2876d08 2772
a0b66a73 2773 gc = desc->gdev->chip;
372e722e 2774 trace_gpio_value(desc_to_gpio(desc), 0, value);
a0b66a73 2775 gc->set(gc, gpio_chip_hwgpio(desc), value);
372e722e
AC
2776}
2777
5f424243
RI
2778/*
2779 * set multiple outputs on the same chip;
2780 * use the chip's set_multiple function if available;
2781 * otherwise set the outputs sequentially;
a0b66a73 2782 * @chip: the GPIO chip we operate on
5f424243
RI
2783 * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
2784 * defines which outputs are to be changed
2785 * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
2786 * defines the values the outputs specified by mask are to be set to
2787 */
a0b66a73 2788static void gpio_chip_set_multiple(struct gpio_chip *gc,
5f424243
RI
2789 unsigned long *mask, unsigned long *bits)
2790{
a0b66a73
LW
2791 if (gc->set_multiple) {
2792 gc->set_multiple(gc, mask, bits);
5f424243 2793 } else {
5e4e6fb3
AS
2794 unsigned int i;
2795
2796 /* set outputs if the corresponding mask bit is set */
a0b66a73
LW
2797 for_each_set_bit(i, mask, gc->ngpio)
2798 gc->set(gc, i, test_bit(i, bits));
5f424243
RI
2799 }
2800}
2801
3027743f 2802int gpiod_set_array_value_complex(bool raw, bool can_sleep,
3c940660
GU
2803 unsigned int array_size,
2804 struct gpio_desc **desc_array,
2805 struct gpio_array *array_info,
2806 unsigned long *value_bitmap)
5f424243
RI
2807{
2808 int i = 0;
2809
b17566a6
JK
2810 /*
2811 * Validate array_info against desc_array and its size.
2812 * It should immediately follow desc_array if both
2813 * have been obtained from the same gpiod_get_array() call.
2814 */
2815 if (array_info && array_info->desc == desc_array &&
2816 array_size <= array_info->size &&
2817 (void *)array_info == desc_array + array_info->size) {
2818 if (!can_sleep)
2819 WARN_ON(array_info->chip->can_sleep);
2820
2821 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
2822 bitmap_xor(value_bitmap, value_bitmap,
2823 array_info->invert_mask, array_size);
2824
2825 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
2826 value_bitmap);
2827
b17566a6 2828 i = find_first_zero_bit(array_info->set_mask, array_size);
ae66eca0
AS
2829 if (i == array_size)
2830 return 0;
b17566a6
JK
2831 } else {
2832 array_info = NULL;
2833 }
2834
5f424243 2835 while (i < array_size) {
a0b66a73 2836 struct gpio_chip *gc = desc_array[i]->gdev->chip;
3027743f
LA
2837 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
2838 unsigned long *mask, *bits;
5f424243
RI
2839 int count = 0;
2840
a0b66a73 2841 if (likely(gc->ngpio <= FASTPATH_NGPIO)) {
3027743f
LA
2842 mask = fastpath;
2843 } else {
a0b66a73 2844 mask = kmalloc_array(2 * BITS_TO_LONGS(gc->ngpio),
3027743f
LA
2845 sizeof(*mask),
2846 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
2847 if (!mask)
2848 return -ENOMEM;
2849 }
2850
a0b66a73
LW
2851 bits = mask + BITS_TO_LONGS(gc->ngpio);
2852 bitmap_zero(mask, gc->ngpio);
3027743f 2853
38e003f4 2854 if (!can_sleep)
a0b66a73 2855 WARN_ON(gc->can_sleep);
38e003f4 2856
5f424243
RI
2857 do {
2858 struct gpio_desc *desc = desc_array[i];
2859 int hwgpio = gpio_chip_hwgpio(desc);
b9762beb 2860 int value = test_bit(i, value_bitmap);
5f424243 2861
b17566a6
JK
2862 /*
2863 * Pins applicable for fast input but not for
2864 * fast output processing may have been already
2865 * inverted inside the fast path, skip them.
2866 */
2867 if (!raw && !(array_info &&
2868 test_bit(i, array_info->invert_mask)) &&
2869 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
5f424243
RI
2870 value = !value;
2871 trace_gpio_value(desc_to_gpio(desc), 0, value);
2872 /*
2873 * collect all normal outputs belonging to the same chip
2874 * open drain and open source outputs are set individually
2875 */
02e47980 2876 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
fac9d885 2877 gpio_set_open_drain_value_commit(desc, value);
02e47980 2878 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
fac9d885 2879 gpio_set_open_source_value_commit(desc, value);
5f424243
RI
2880 } else {
2881 __set_bit(hwgpio, mask);
4fc5bfeb 2882 __assign_bit(hwgpio, bits, value);
5f424243
RI
2883 count++;
2884 }
2885 i++;
b17566a6
JK
2886
2887 if (array_info)
35ae7f96
JK
2888 i = find_next_zero_bit(array_info->set_mask,
2889 array_size, i);
fdeb8e15 2890 } while ((i < array_size) &&
a0b66a73 2891 (desc_array[i]->gdev->chip == gc));
5f424243 2892 /* push collected bits to outputs */
38e003f4 2893 if (count != 0)
a0b66a73 2894 gpio_chip_set_multiple(gc, mask, bits);
3027743f
LA
2895
2896 if (mask != fastpath)
2897 kfree(mask);
5f424243 2898 }
3027743f 2899 return 0;
5f424243
RI
2900}
2901
d2876d08 2902/**
79a9becd
AC
2903 * gpiod_set_raw_value() - assign a gpio's raw value
2904 * @desc: gpio whose value will be assigned
d2876d08 2905 * @value: value to assign
d2876d08 2906 *
79a9becd
AC
2907 * Set the raw value of the GPIO, i.e. the value of its physical line without
2908 * regard for its ACTIVE_LOW status.
2909 *
827a9b8b 2910 * This function can be called from contexts where we cannot sleep, and will
79a9becd 2911 * complain if the GPIO chip functions potentially sleep.
d2876d08 2912 */
79a9becd 2913void gpiod_set_raw_value(struct gpio_desc *desc, int value)
372e722e 2914{
fdeb8e15 2915 VALIDATE_DESC_VOID(desc);
3285170f 2916 /* Should be using gpiod_set_raw_value_cansleep() */
fdeb8e15 2917 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 2918 gpiod_set_raw_value_commit(desc, value);
d2876d08 2919}
79a9becd 2920EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
d2876d08 2921
1e77fc82
GU
2922/**
2923 * gpiod_set_value_nocheck() - set a GPIO line value without checking
2924 * @desc: the descriptor to set the value on
2925 * @value: value to set
2926 *
2927 * This sets the value of a GPIO line backing a descriptor, applying
2928 * different semantic quirks like active low and open drain/source
2929 * handling.
2930 */
2931static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
2932{
2933 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
2934 value = !value;
2935 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
2936 gpio_set_open_drain_value_commit(desc, value);
2937 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
2938 gpio_set_open_source_value_commit(desc, value);
2939 else
2940 gpiod_set_raw_value_commit(desc, value);
2941}
2942
d2876d08 2943/**
79a9becd
AC
2944 * gpiod_set_value() - assign a gpio's value
2945 * @desc: gpio whose value will be assigned
2946 * @value: value to assign
2947 *
02e47980
LW
2948 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
2949 * OPEN_DRAIN and OPEN_SOURCE flags into account.
d2876d08 2950 *
827a9b8b 2951 * This function can be called from contexts where we cannot sleep, and will
79a9becd 2952 * complain if the GPIO chip functions potentially sleep.
d2876d08 2953 */
79a9becd 2954void gpiod_set_value(struct gpio_desc *desc, int value)
d2876d08 2955{
fdeb8e15 2956 VALIDATE_DESC_VOID(desc);
3285170f 2957 /* Should be using gpiod_set_value_cansleep() */
fdeb8e15 2958 WARN_ON(desc->gdev->chip->can_sleep);
1e77fc82 2959 gpiod_set_value_nocheck(desc, value);
372e722e 2960}
79a9becd 2961EXPORT_SYMBOL_GPL(gpiod_set_value);
d2876d08 2962
5f424243 2963/**
3fff99bc 2964 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
b9762beb 2965 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 2966 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 2967 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2968 * @value_bitmap: bitmap of values to assign
5f424243
RI
2969 *
2970 * Set the raw values of the GPIOs, i.e. the values of the physical lines
2971 * without regard for their ACTIVE_LOW status.
2972 *
827a9b8b 2973 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
2974 * complain if the GPIO chip functions potentially sleep.
2975 */
3027743f 2976int gpiod_set_raw_array_value(unsigned int array_size,
3c940660
GU
2977 struct gpio_desc **desc_array,
2978 struct gpio_array *array_info,
2979 unsigned long *value_bitmap)
5f424243
RI
2980{
2981 if (!desc_array)
3027743f
LA
2982 return -EINVAL;
2983 return gpiod_set_array_value_complex(true, false, array_size,
77588c14 2984 desc_array, array_info, value_bitmap);
5f424243 2985}
3fff99bc 2986EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
5f424243
RI
2987
2988/**
3fff99bc 2989 * gpiod_set_array_value() - assign values to an array of GPIOs
b9762beb 2990 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 2991 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 2992 * @array_info: information on applicability of fast bitmap processing path
b9762beb 2993 * @value_bitmap: bitmap of values to assign
5f424243
RI
2994 *
2995 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
2996 * into account.
2997 *
827a9b8b 2998 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
2999 * complain if the GPIO chip functions potentially sleep.
3000 */
cf9af0d5
GU
3001int gpiod_set_array_value(unsigned int array_size,
3002 struct gpio_desc **desc_array,
3003 struct gpio_array *array_info,
3004 unsigned long *value_bitmap)
5f424243
RI
3005{
3006 if (!desc_array)
cf9af0d5
GU
3007 return -EINVAL;
3008 return gpiod_set_array_value_complex(false, false, array_size,
3009 desc_array, array_info,
3010 value_bitmap);
5f424243 3011}
3fff99bc 3012EXPORT_SYMBOL_GPL(gpiod_set_array_value);
5f424243 3013
d2876d08 3014/**
79a9becd
AC
3015 * gpiod_cansleep() - report whether gpio value access may sleep
3016 * @desc: gpio to check
d2876d08 3017 *
d2876d08 3018 */
79a9becd 3019int gpiod_cansleep(const struct gpio_desc *desc)
372e722e 3020{
fdeb8e15
LW
3021 VALIDATE_DESC(desc);
3022 return desc->gdev->chip->can_sleep;
d2876d08 3023}
79a9becd 3024EXPORT_SYMBOL_GPL(gpiod_cansleep);
d2876d08 3025
90b39402
LW
3026/**
3027 * gpiod_set_consumer_name() - set the consumer name for the descriptor
3028 * @desc: gpio to set the consumer name on
3029 * @name: the new consumer name
3030 */
18534df4 3031int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
90b39402 3032{
18534df4
MS
3033 VALIDATE_DESC(desc);
3034 if (name) {
3035 name = kstrdup_const(name, GFP_KERNEL);
3036 if (!name)
3037 return -ENOMEM;
3038 }
3039
3040 kfree_const(desc->label);
3041 desc_set_label(desc, name);
3042
3043 return 0;
90b39402
LW
3044}
3045EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
3046
0f6d504e 3047/**
79a9becd
AC
3048 * gpiod_to_irq() - return the IRQ corresponding to a GPIO
3049 * @desc: gpio whose IRQ will be returned (already requested)
0f6d504e 3050 *
79a9becd
AC
3051 * Return the IRQ corresponding to the passed GPIO, or an error code in case of
3052 * error.
0f6d504e 3053 */
79a9becd 3054int gpiod_to_irq(const struct gpio_desc *desc)
0f6d504e 3055{
a0b66a73 3056 struct gpio_chip *gc;
4c37ce86 3057 int offset;
0f6d504e 3058
79bb71bd
LW
3059 /*
3060 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
3061 * requires this function to not return zero on an invalid descriptor
3062 * but rather a negative error number.
3063 */
bfbbe44d 3064 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
79bb71bd
LW
3065 return -EINVAL;
3066
a0b66a73 3067 gc = desc->gdev->chip;
372e722e 3068 offset = gpio_chip_hwgpio(desc);
a0b66a73
LW
3069 if (gc->to_irq) {
3070 int retirq = gc->to_irq(gc, offset);
4c37ce86
LW
3071
3072 /* Zero means NO_IRQ */
3073 if (!retirq)
3074 return -ENXIO;
3075
3076 return retirq;
3077 }
3078 return -ENXIO;
0f6d504e 3079}
79a9becd 3080EXPORT_SYMBOL_GPL(gpiod_to_irq);
0f6d504e 3081
d468bf9e 3082/**
e3a2e878 3083 * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
a0b66a73 3084 * @gc: the chip the GPIO to lock belongs to
d74be6df 3085 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3086 *
3087 * This is used directly by GPIO drivers that want to lock down
f438acdf 3088 * a certain GPIO line to be used for IRQs.
d468bf9e 3089 */
a0b66a73 3090int gpiochip_lock_as_irq(struct gpio_chip *gc, unsigned int offset)
372e722e 3091{
9c10280d
LW
3092 struct gpio_desc *desc;
3093
a0b66a73 3094 desc = gpiochip_get_desc(gc, offset);
9c10280d
LW
3095 if (IS_ERR(desc))
3096 return PTR_ERR(desc);
3097
60f8339e
LW
3098 /*
3099 * If it's fast: flush the direction setting if something changed
3100 * behind our back
3101 */
a0b66a73 3102 if (!gc->can_sleep && gc->get_direction) {
80956790 3103 int dir = gpiod_get_direction(desc);
9c10280d 3104
36b31279 3105 if (dir < 0) {
a0b66a73 3106 chip_err(gc, "%s: cannot get GPIO direction\n",
36b31279
AS
3107 __func__);
3108 return dir;
3109 }
9c10280d 3110 }
d468bf9e 3111
e9bdf7e6
LW
3112 /* To be valid for IRQ the line needs to be input or open drain */
3113 if (test_bit(FLAG_IS_OUT, &desc->flags) &&
3114 !test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
a0b66a73 3115 chip_err(gc,
b1911710
AS
3116 "%s: tried to flag a GPIO set as output for IRQ\n",
3117 __func__);
d468bf9e
LW
3118 return -EIO;
3119 }
3120
9c10280d 3121 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3122 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3123
3124 /*
3125 * If the consumer has not set up a label (such as when the
3126 * IRQ is referenced from .to_irq()) we set up a label here
3127 * so it is clear this is used as an interrupt.
3128 */
3129 if (!desc->label)
3130 desc_set_label(desc, "interrupt");
3131
d468bf9e 3132 return 0;
372e722e 3133}
e3a2e878 3134EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
d2876d08 3135
d468bf9e 3136/**
e3a2e878 3137 * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
a0b66a73 3138 * @gc: the chip the GPIO to lock belongs to
d74be6df 3139 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3140 *
3141 * This is used directly by GPIO drivers that want to indicate
3142 * that a certain GPIO is no longer used exclusively for IRQ.
d2876d08 3143 */
a0b66a73 3144void gpiochip_unlock_as_irq(struct gpio_chip *gc, unsigned int offset)
d468bf9e 3145{
3940c34a
LW
3146 struct gpio_desc *desc;
3147
a0b66a73 3148 desc = gpiochip_get_desc(gc, offset);
3940c34a 3149 if (IS_ERR(desc))
d468bf9e 3150 return;
d2876d08 3151
3940c34a 3152 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 3153 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
3154
3155 /* If we only had this marking, erase it */
3156 if (desc->label && !strcmp(desc->label, "interrupt"))
3157 desc_set_label(desc, NULL);
d468bf9e 3158}
e3a2e878 3159EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
d468bf9e 3160
a0b66a73 3161void gpiochip_disable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3162{
a0b66a73 3163 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3164
3165 if (!IS_ERR(desc) &&
3166 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
3167 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3168}
3169EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
3170
a0b66a73 3171void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset)
4e9439dd 3172{
a0b66a73 3173 struct gpio_desc *desc = gpiochip_get_desc(gc, offset);
4e9439dd
HV
3174
3175 if (!IS_ERR(desc) &&
3176 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
e9bdf7e6
LW
3177 /*
3178 * We must not be output when using IRQ UNLESS we are
3179 * open drain.
3180 */
3181 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags) &&
3182 !test_bit(FLAG_OPEN_DRAIN, &desc->flags));
4e9439dd
HV
3183 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3184 }
3185}
3186EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
3187
a0b66a73 3188bool gpiochip_line_is_irq(struct gpio_chip *gc, unsigned int offset)
6cee3821 3189{
a0b66a73 3190 if (offset >= gc->ngpio)
6cee3821
LW
3191 return false;
3192
a0b66a73 3193 return test_bit(FLAG_USED_AS_IRQ, &gc->gpiodev->descs[offset].flags);
6cee3821
LW
3194}
3195EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
3196
a0b66a73 3197int gpiochip_reqres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238
HV
3198{
3199 int ret;
3200
a0b66a73 3201 if (!try_module_get(gc->gpiodev->owner))
4e6b8238
HV
3202 return -ENODEV;
3203
a0b66a73 3204 ret = gpiochip_lock_as_irq(gc, offset);
4e6b8238 3205 if (ret) {
a0b66a73
LW
3206 chip_err(gc, "unable to lock HW IRQ %u for IRQ\n", offset);
3207 module_put(gc->gpiodev->owner);
4e6b8238
HV
3208 return ret;
3209 }
3210 return 0;
3211}
3212EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
3213
a0b66a73 3214void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset)
4e6b8238 3215{
a0b66a73
LW
3216 gpiochip_unlock_as_irq(gc, offset);
3217 module_put(gc->gpiodev->owner);
4e6b8238
HV
3218}
3219EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
3220
a0b66a73 3221bool gpiochip_line_is_open_drain(struct gpio_chip *gc, unsigned int offset)
143b65d6 3222{
a0b66a73 3223 if (offset >= gc->ngpio)
143b65d6
LW
3224 return false;
3225
a0b66a73 3226 return test_bit(FLAG_OPEN_DRAIN, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3227}
3228EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
3229
a0b66a73 3230bool gpiochip_line_is_open_source(struct gpio_chip *gc, unsigned int offset)
143b65d6 3231{
a0b66a73 3232 if (offset >= gc->ngpio)
143b65d6
LW
3233 return false;
3234
a0b66a73 3235 return test_bit(FLAG_OPEN_SOURCE, &gc->gpiodev->descs[offset].flags);
143b65d6
LW
3236}
3237EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
3238
a0b66a73 3239bool gpiochip_line_is_persistent(struct gpio_chip *gc, unsigned int offset)
05f479bf 3240{
a0b66a73 3241 if (offset >= gc->ngpio)
05f479bf
CK
3242 return false;
3243
a0b66a73 3244 return !test_bit(FLAG_TRANSITORY, &gc->gpiodev->descs[offset].flags);
05f479bf
CK
3245}
3246EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
3247
79a9becd
AC
3248/**
3249 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
3250 * @desc: gpio whose value will be returned
3251 *
3252 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3253 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd
AC
3254 *
3255 * This function is to be called from contexts that can sleep.
d2876d08 3256 */
79a9becd 3257int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
d2876d08 3258{
d2876d08 3259 might_sleep_if(extra_checks);
fdeb8e15 3260 VALIDATE_DESC(desc);
fac9d885 3261 return gpiod_get_raw_value_commit(desc);
d2876d08 3262}
79a9becd 3263EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
372e722e 3264
79a9becd
AC
3265/**
3266 * gpiod_get_value_cansleep() - return a gpio's value
3267 * @desc: gpio whose value will be returned
3268 *
3269 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3270 * account, or negative errno on failure.
79a9becd
AC
3271 *
3272 * This function is to be called from contexts that can sleep.
3273 */
3274int gpiod_get_value_cansleep(const struct gpio_desc *desc)
d2876d08 3275{
3f397c21 3276 int value;
d2876d08
DB
3277
3278 might_sleep_if(extra_checks);
fdeb8e15 3279 VALIDATE_DESC(desc);
fac9d885 3280 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3281 if (value < 0)
3282 return value;
3283
79a9becd
AC
3284 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3285 value = !value;
3286
3f397c21 3287 return value;
d2876d08 3288}
79a9becd 3289EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
372e722e 3290
eec1d566
LW
3291/**
3292 * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
b9762beb 3293 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3294 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3295 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3296 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3297 *
3298 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3299 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3300 * else an error code.
3301 *
3302 * This function is to be called from contexts that can sleep.
3303 */
3304int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
3305 struct gpio_desc **desc_array,
77588c14 3306 struct gpio_array *array_info,
b9762beb 3307 unsigned long *value_bitmap)
eec1d566
LW
3308{
3309 might_sleep_if(extra_checks);
3310 if (!desc_array)
3311 return -EINVAL;
3312 return gpiod_get_array_value_complex(true, true, array_size,
77588c14
JK
3313 desc_array, array_info,
3314 value_bitmap);
eec1d566
LW
3315}
3316EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
3317
3318/**
3319 * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
b9762beb 3320 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3321 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3322 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3323 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3324 *
3325 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3326 * into account. Return 0 in case of success, else an error code.
3327 *
3328 * This function is to be called from contexts that can sleep.
3329 */
3330int gpiod_get_array_value_cansleep(unsigned int array_size,
3331 struct gpio_desc **desc_array,
77588c14 3332 struct gpio_array *array_info,
b9762beb 3333 unsigned long *value_bitmap)
eec1d566
LW
3334{
3335 might_sleep_if(extra_checks);
3336 if (!desc_array)
3337 return -EINVAL;
3338 return gpiod_get_array_value_complex(false, true, array_size,
77588c14
JK
3339 desc_array, array_info,
3340 value_bitmap);
eec1d566
LW
3341}
3342EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
3343
79a9becd
AC
3344/**
3345 * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
3346 * @desc: gpio whose value will be assigned
3347 * @value: value to assign
3348 *
3349 * Set the raw value of the GPIO, i.e. the value of its physical line without
3350 * regard for its ACTIVE_LOW status.
3351 *
3352 * This function is to be called from contexts that can sleep.
3353 */
3354void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
372e722e 3355{
d2876d08 3356 might_sleep_if(extra_checks);
fdeb8e15 3357 VALIDATE_DESC_VOID(desc);
fac9d885 3358 gpiod_set_raw_value_commit(desc, value);
372e722e 3359}
79a9becd 3360EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
d2876d08 3361
79a9becd
AC
3362/**
3363 * gpiod_set_value_cansleep() - assign a gpio's value
3364 * @desc: gpio whose value will be assigned
3365 * @value: value to assign
3366 *
3367 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
3368 * account
3369 *
3370 * This function is to be called from contexts that can sleep.
3371 */
3372void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
d2876d08 3373{
d2876d08 3374 might_sleep_if(extra_checks);
fdeb8e15 3375 VALIDATE_DESC_VOID(desc);
1e77fc82 3376 gpiod_set_value_nocheck(desc, value);
372e722e 3377}
79a9becd 3378EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
d2876d08 3379
5f424243 3380/**
3fff99bc 3381 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3382 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3383 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3384 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3385 * @value_bitmap: bitmap of values to assign
5f424243
RI
3386 *
3387 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3388 * without regard for their ACTIVE_LOW status.
3389 *
3390 * This function is to be called from contexts that can sleep.
3391 */
3027743f 3392int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3c940660
GU
3393 struct gpio_desc **desc_array,
3394 struct gpio_array *array_info,
3395 unsigned long *value_bitmap)
5f424243
RI
3396{
3397 might_sleep_if(extra_checks);
3398 if (!desc_array)
3027743f
LA
3399 return -EINVAL;
3400 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
77588c14 3401 array_info, value_bitmap);
5f424243 3402}
3fff99bc 3403EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
5f424243 3404
3946d187
DT
3405/**
3406 * gpiod_add_lookup_tables() - register GPIO device consumers
3407 * @tables: list of tables of consumers to register
3408 * @n: number of tables in the list
3409 */
3410void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
3411{
3412 unsigned int i;
3413
3414 mutex_lock(&gpio_lookup_lock);
3415
3416 for (i = 0; i < n; i++)
3417 list_add_tail(&tables[i]->list, &gpio_lookup_list);
3418
3419 mutex_unlock(&gpio_lookup_lock);
3420}
3421
5f424243 3422/**
3fff99bc 3423 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 3424 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3425 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3426 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3427 * @value_bitmap: bitmap of values to assign
5f424243
RI
3428 *
3429 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3430 * into account.
3431 *
3432 * This function is to be called from contexts that can sleep.
3433 */
cf9af0d5
GU
3434int gpiod_set_array_value_cansleep(unsigned int array_size,
3435 struct gpio_desc **desc_array,
3436 struct gpio_array *array_info,
3437 unsigned long *value_bitmap)
5f424243
RI
3438{
3439 might_sleep_if(extra_checks);
3440 if (!desc_array)
cf9af0d5
GU
3441 return -EINVAL;
3442 return gpiod_set_array_value_complex(false, true, array_size,
3443 desc_array, array_info,
3444 value_bitmap);
5f424243 3445}
3fff99bc 3446EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
5f424243 3447
bae48da2 3448/**
ad824783
AC
3449 * gpiod_add_lookup_table() - register GPIO device consumers
3450 * @table: table of consumers to register
bae48da2 3451 */
ad824783 3452void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
bae48da2
AC
3453{
3454 mutex_lock(&gpio_lookup_lock);
3455
ad824783 3456 list_add_tail(&table->list, &gpio_lookup_list);
bae48da2
AC
3457
3458 mutex_unlock(&gpio_lookup_lock);
3459}
226b2242 3460EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
bae48da2 3461
be9015ab
SK
3462/**
3463 * gpiod_remove_lookup_table() - unregister GPIO device consumers
3464 * @table: table of consumers to unregister
3465 */
3466void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
3467{
d321ad12
AS
3468 /* Nothing to remove */
3469 if (!table)
3470 return;
3471
be9015ab
SK
3472 mutex_lock(&gpio_lookup_lock);
3473
3474 list_del(&table->list);
3475
3476 mutex_unlock(&gpio_lookup_lock);
3477}
226b2242 3478EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
be9015ab 3479
a411e81e
BG
3480/**
3481 * gpiod_add_hogs() - register a set of GPIO hogs from machine code
3482 * @hogs: table of gpio hog entries with a zeroed sentinel at the end
3483 */
3484void gpiod_add_hogs(struct gpiod_hog *hogs)
3485{
a0b66a73 3486 struct gpio_chip *gc;
a411e81e
BG
3487 struct gpiod_hog *hog;
3488
3489 mutex_lock(&gpio_machine_hogs_mutex);
3490
3491 for (hog = &hogs[0]; hog->chip_label; hog++) {
3492 list_add_tail(&hog->list, &gpio_machine_hogs);
3493
3494 /*
3495 * The chip may have been registered earlier, so check if it
3496 * exists and, if so, try to hog the line now.
3497 */
a0b66a73
LW
3498 gc = find_chip_by_name(hog->chip_label);
3499 if (gc)
3500 gpiochip_machine_hog(gc, hog);
a411e81e
BG
3501 }
3502
3503 mutex_unlock(&gpio_machine_hogs_mutex);
3504}
3505EXPORT_SYMBOL_GPL(gpiod_add_hogs);
3506
ad824783 3507static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
bae48da2
AC
3508{
3509 const char *dev_id = dev ? dev_name(dev) : NULL;
ad824783 3510 struct gpiod_lookup_table *table;
bae48da2
AC
3511
3512 mutex_lock(&gpio_lookup_lock);
3513
ad824783
AC
3514 list_for_each_entry(table, &gpio_lookup_list, list) {
3515 if (table->dev_id && dev_id) {
3516 /*
3517 * Valid strings on both ends, must be identical to have
3518 * a match
3519 */
3520 if (!strcmp(table->dev_id, dev_id))
3521 goto found;
3522 } else {
3523 /*
3524 * One of the pointers is NULL, so both must be to have
3525 * a match
3526 */
3527 if (dev_id == table->dev_id)
3528 goto found;
3529 }
3530 }
3531 table = NULL;
bae48da2 3532
ad824783
AC
3533found:
3534 mutex_unlock(&gpio_lookup_lock);
3535 return table;
3536}
bae48da2 3537
ad824783 3538static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
fed7026a 3539 unsigned int idx, unsigned long *flags)
ad824783 3540{
2a3cf6a3 3541 struct gpio_desc *desc = ERR_PTR(-ENOENT);
ad824783
AC
3542 struct gpiod_lookup_table *table;
3543 struct gpiod_lookup *p;
bae48da2 3544
ad824783
AC
3545 table = gpiod_find_lookup_table(dev);
3546 if (!table)
3547 return desc;
bae48da2 3548
4c033b54 3549 for (p = &table->table[0]; p->key; p++) {
a0b66a73 3550 struct gpio_chip *gc;
bae48da2 3551
ad824783 3552 /* idx must always match exactly */
bae48da2
AC
3553 if (p->idx != idx)
3554 continue;
3555
ad824783
AC
3556 /* If the lookup entry has a con_id, require exact match */
3557 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
3558 continue;
bae48da2 3559
4c033b54
GU
3560 if (p->chip_hwnum == U16_MAX) {
3561 desc = gpio_name_to_desc(p->key);
3562 if (desc) {
3563 *flags = p->flags;
3564 return desc;
3565 }
3566
3567 dev_warn(dev, "cannot find GPIO line %s, deferring\n",
3568 p->key);
3569 return ERR_PTR(-EPROBE_DEFER);
3570 }
3571
3572 gc = find_chip_by_name(p->key);
bae48da2 3573
a0b66a73 3574 if (!gc) {
8853daf3
JK
3575 /*
3576 * As the lookup table indicates a chip with
4c033b54 3577 * p->key should exist, assume it may
8853daf3
JK
3578 * still appear later and let the interested
3579 * consumer be probed again or let the Deferred
3580 * Probe infrastructure handle the error.
3581 */
3582 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
4c033b54 3583 p->key);
8853daf3 3584 return ERR_PTR(-EPROBE_DEFER);
ad824783 3585 }
bae48da2 3586
a0b66a73 3587 if (gc->ngpio <= p->chip_hwnum) {
2a3cf6a3 3588 dev_err(dev,
d935bd50 3589 "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n",
a0b66a73
LW
3590 idx, p->chip_hwnum, gc->ngpio - 1,
3591 gc->label);
2a3cf6a3 3592 return ERR_PTR(-EINVAL);
bae48da2 3593 }
bae48da2 3594
a0b66a73 3595 desc = gpiochip_get_desc(gc, p->chip_hwnum);
ad824783 3596 *flags = p->flags;
bae48da2 3597
2a3cf6a3 3598 return desc;
bae48da2
AC
3599 }
3600
bae48da2
AC
3601 return desc;
3602}
3603
66858527
RI
3604static int platform_gpio_count(struct device *dev, const char *con_id)
3605{
3606 struct gpiod_lookup_table *table;
3607 struct gpiod_lookup *p;
3608 unsigned int count = 0;
3609
3610 table = gpiod_find_lookup_table(dev);
3611 if (!table)
3612 return -ENOENT;
3613
4c033b54 3614 for (p = &table->table[0]; p->key; p++) {
66858527
RI
3615 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
3616 (!con_id && !p->con_id))
3617 count++;
3618 }
3619 if (!count)
3620 return -ENOENT;
3621
3622 return count;
3623}
3624
13949fa9
DT
3625/**
3626 * fwnode_gpiod_get_index - obtain a GPIO from firmware node
3627 * @fwnode: handle of the firmware node
3628 * @con_id: function within the GPIO consumer
3629 * @index: index of the GPIO to obtain for the consumer
3630 * @flags: GPIO initialization flags
3631 * @label: label to attach to the requested GPIO
3632 *
3633 * This function can be used for drivers that get their configuration
3634 * from opaque firmware.
3635 *
3636 * The function properly finds the corresponding GPIO using whatever is the
3637 * underlying firmware interface and then makes sure that the GPIO
3638 * descriptor is requested before it is returned to the caller.
3639 *
3640 * Returns:
3641 * On successful request the GPIO pin is configured in accordance with
3642 * provided @flags.
3643 *
3644 * In case of error an ERR_PTR() is returned.
3645 */
3646struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
3647 const char *con_id, int index,
3648 enum gpiod_flags flags,
3649 const char *label)
3650{
3651 struct gpio_desc *desc;
3652 char prop_name[32]; /* 32 is max size of property name */
3653 unsigned int i;
3654
3655 for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) {
3656 if (con_id)
3657 snprintf(prop_name, sizeof(prop_name), "%s-%s",
3658 con_id, gpio_suffixes[i]);
3659 else
3660 snprintf(prop_name, sizeof(prop_name), "%s",
3661 gpio_suffixes[i]);
3662
3663 desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags,
3664 label);
7b58696d 3665 if (!gpiod_not_found(desc))
13949fa9
DT
3666 break;
3667 }
3668
3669 return desc;
3670}
3671EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
3672
66858527
RI
3673/**
3674 * gpiod_count - return the number of GPIOs associated with a device / function
3675 * or -ENOENT if no GPIO has been assigned to the requested function
3676 * @dev: GPIO consumer, can be NULL for system-global GPIOs
3677 * @con_id: function within the GPIO consumer
3678 */
3679int gpiod_count(struct device *dev, const char *con_id)
3680{
3681 int count = -ENOENT;
3682
3683 if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node)
f626d6df 3684 count = of_gpio_get_count(dev, con_id);
66858527
RI
3685 else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev))
3686 count = acpi_gpio_count(dev, con_id);
3687
3688 if (count < 0)
3689 count = platform_gpio_count(dev, con_id);
3690
3691 return count;
3692}
3693EXPORT_SYMBOL_GPL(gpiod_count);
3694
bae48da2 3695/**
0879162f 3696 * gpiod_get - obtain a GPIO for a given GPIO function
ad824783 3697 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2 3698 * @con_id: function within the GPIO consumer
39b2bbe3 3699 * @flags: optional GPIO initialization flags
bae48da2
AC
3700 *
3701 * Return the GPIO descriptor corresponding to the function con_id of device
2a3cf6a3 3702 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
20a8a968 3703 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
bae48da2 3704 */
b17d1bf1 3705struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
39b2bbe3 3706 enum gpiod_flags flags)
bae48da2 3707{
39b2bbe3 3708 return gpiod_get_index(dev, con_id, 0, flags);
bae48da2 3709}
b17d1bf1 3710EXPORT_SYMBOL_GPL(gpiod_get);
bae48da2 3711
29a1f233
TR
3712/**
3713 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
3714 * @dev: GPIO consumer, can be NULL for system-global GPIOs
3715 * @con_id: function within the GPIO consumer
39b2bbe3 3716 * @flags: optional GPIO initialization flags
29a1f233
TR
3717 *
3718 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
3719 * the requested function it will return NULL. This is convenient for drivers
3720 * that need to handle optional GPIOs.
3721 */
b17d1bf1 3722struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
39b2bbe3
AC
3723 const char *con_id,
3724 enum gpiod_flags flags)
29a1f233 3725{
39b2bbe3 3726 return gpiod_get_index_optional(dev, con_id, 0, flags);
29a1f233 3727}
b17d1bf1 3728EXPORT_SYMBOL_GPL(gpiod_get_optional);
29a1f233 3729
f625d460
BP
3730
3731/**
3732 * gpiod_configure_flags - helper function to configure a given GPIO
3733 * @desc: gpio whose value will be assigned
3734 * @con_id: function within the GPIO consumer
fed7026a
AS
3735 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
3736 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
3737 * @dflags: gpiod_flags - optional GPIO initialization flags
3738 *
3739 * Return 0 on success, -ENOENT if no GPIO has been assigned to the
3740 * requested function and/or index, or another IS_ERR() code if an error
3741 * occurred while trying to acquire the GPIO.
3742 */
c29fd9eb 3743int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
85b03b30 3744 unsigned long lflags, enum gpiod_flags dflags)
f625d460 3745{
d377f56f 3746 int ret;
f625d460 3747
85b03b30
JH
3748 if (lflags & GPIO_ACTIVE_LOW)
3749 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
f926dfc1 3750
85b03b30
JH
3751 if (lflags & GPIO_OPEN_DRAIN)
3752 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
f926dfc1
LW
3753 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
3754 /*
3755 * This enforces open drain mode from the consumer side.
3756 * This is necessary for some busses like I2C, but the lookup
3757 * should *REALLY* have specified them as open drain in the
3758 * first place, so print a little warning here.
3759 */
3760 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
3761 gpiod_warn(desc,
3762 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
3763 }
3764
85b03b30
JH
3765 if (lflags & GPIO_OPEN_SOURCE)
3766 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
e10f72bf 3767
d449991c
TP
3768 if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) {
3769 gpiod_err(desc,
3770 "both pull-up and pull-down enabled, invalid configuration\n");
3771 return -EINVAL;
3772 }
3773
3774 if (lflags & GPIO_PULL_UP)
3775 set_bit(FLAG_PULL_UP, &desc->flags);
3776 else if (lflags & GPIO_PULL_DOWN)
3777 set_bit(FLAG_PULL_DOWN, &desc->flags);
3778
d377f56f
LW
3779 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
3780 if (ret < 0)
3781 return ret;
85b03b30 3782
f625d460
BP
3783 /* No particular flag request, return here... */
3784 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
262b9011 3785 gpiod_dbg(desc, "no flags found for %s\n", con_id);
f625d460
BP
3786 return 0;
3787 }
3788
3789 /* Process flags */
3790 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
d377f56f 3791 ret = gpiod_direction_output(desc,
ad17731d 3792 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
f625d460 3793 else
d377f56f 3794 ret = gpiod_direction_input(desc);
f625d460 3795
d377f56f 3796 return ret;
f625d460
BP
3797}
3798
bae48da2
AC
3799/**
3800 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
fdd6a5fe 3801 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2
AC
3802 * @con_id: function within the GPIO consumer
3803 * @idx: index of the GPIO to obtain in the consumer
39b2bbe3 3804 * @flags: optional GPIO initialization flags
bae48da2
AC
3805 *
3806 * This variant of gpiod_get() allows to access GPIOs other than the first
3807 * defined one for functions that define several GPIOs.
3808 *
2a3cf6a3
AC
3809 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
3810 * requested function and/or index, or another IS_ERR() code if an error
20a8a968 3811 * occurred while trying to acquire the GPIO.
bae48da2 3812 */
b17d1bf1 3813struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
bae48da2 3814 const char *con_id,
39b2bbe3
AC
3815 unsigned int idx,
3816 enum gpiod_flags flags)
bae48da2 3817{
2d6c06f5 3818 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
35c5d7fd 3819 struct gpio_desc *desc = NULL;
d377f56f 3820 int ret;
7d18f0a1
LW
3821 /* Maybe we have a device name, maybe not */
3822 const char *devname = dev ? dev_name(dev) : "?";
bae48da2
AC
3823
3824 dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id);
3825
4d8440b9
RW
3826 if (dev) {
3827 /* Using device tree? */
3828 if (IS_ENABLED(CONFIG_OF) && dev->of_node) {
3829 dev_dbg(dev, "using device tree for GPIO lookup\n");
3830 desc = of_find_gpio(dev, con_id, idx, &lookupflags);
3831 } else if (ACPI_COMPANION(dev)) {
3832 dev_dbg(dev, "using ACPI for GPIO lookup\n");
a31f5c3a 3833 desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags);
4d8440b9 3834 }
35c5d7fd
AC
3835 }
3836
3837 /*
3838 * Either we are not using DT or ACPI, or their lookup did not return
3839 * a result. In that case, use platform lookup as a fallback.
3840 */
7b58696d 3841 if (!desc || gpiod_not_found(desc)) {
43a8785a 3842 dev_dbg(dev, "using lookup tables for GPIO lookup\n");
39b2bbe3 3843 desc = gpiod_find(dev, con_id, idx, &lookupflags);
bae48da2
AC
3844 }
3845
3846 if (IS_ERR(desc)) {
9d5a1f2c 3847 dev_dbg(dev, "No GPIO consumer %s found\n", con_id);
bae48da2
AC
3848 return desc;
3849 }
3850
7d18f0a1
LW
3851 /*
3852 * If a connection label was passed use that, else attempt to use
3853 * the device name as label
3854 */
d377f56f 3855 ret = gpiod_request(desc, con_id ? con_id : devname);
8bbff39c 3856 if (ret) {
d377f56f 3857 if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) {
b0ce7b29
LW
3858 /*
3859 * This happens when there are several consumers for
3860 * the same GPIO line: we just return here without
3861 * further initialization. It is a bit if a hack.
3862 * This is necessary to support fixed regulators.
3863 *
3864 * FIXME: Make this more sane and safe.
3865 */
3866 dev_info(dev, "nonexclusive access to GPIO for %s\n",
3867 con_id ? con_id : devname);
3868 return desc;
3869 } else {
d377f56f 3870 return ERR_PTR(ret);
b0ce7b29
LW
3871 }
3872 }
bae48da2 3873
d377f56f 3874 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
6392cca4 3875 if (ret < 0) {
39b2bbe3 3876 dev_dbg(dev, "setup of GPIO %s failed\n", con_id);
6392cca4
LW
3877 gpiod_put(desc);
3878 return ERR_PTR(ret);
3879 }
3880
6accc376
KG
3881 blocking_notifier_call_chain(&desc->gdev->notifier,
3882 GPIOLINE_CHANGED_REQUESTED, desc);
9fefca77 3883
6392cca4
LW
3884 return desc;
3885}
b17d1bf1 3886EXPORT_SYMBOL_GPL(gpiod_get_index);
6392cca4 3887
40b73183
MW
3888/**
3889 * fwnode_get_named_gpiod - obtain a GPIO from firmware node
3890 * @fwnode: handle of the firmware node
3891 * @propname: name of the firmware property representing the GPIO
6392cca4 3892 * @index: index of the GPIO to obtain for the consumer
a264d10f 3893 * @dflags: GPIO initialization flags
950d55f5 3894 * @label: label to attach to the requested GPIO
40b73183
MW
3895 *
3896 * This function can be used for drivers that get their configuration
6392cca4 3897 * from opaque firmware.
40b73183 3898 *
6392cca4 3899 * The function properly finds the corresponding GPIO using whatever is the
40b73183
MW
3900 * underlying firmware interface and then makes sure that the GPIO
3901 * descriptor is requested before it is returned to the caller.
3902 *
950d55f5 3903 * Returns:
ff21378a 3904 * On successful request the GPIO pin is configured in accordance with
a264d10f
AS
3905 * provided @dflags.
3906 *
40b73183
MW
3907 * In case of error an ERR_PTR() is returned.
3908 */
3909struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
537b94da 3910 const char *propname, int index,
b2987d74
AS
3911 enum gpiod_flags dflags,
3912 const char *label)
40b73183 3913{
2d6c06f5 3914 unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT;
40b73183 3915 struct gpio_desc *desc = ERR_PTR(-ENODEV);
40b73183
MW
3916 int ret;
3917
3918 if (!fwnode)
3919 return ERR_PTR(-EINVAL);
3920
3921 if (is_of_node(fwnode)) {
6392cca4
LW
3922 desc = gpiod_get_from_of_node(to_of_node(fwnode),
3923 propname, index,
3924 dflags,
3925 label);
3926 return desc;
40b73183
MW
3927 } else if (is_acpi_node(fwnode)) {
3928 struct acpi_gpio_info info;
3929
537b94da 3930 desc = acpi_node_get_gpiod(fwnode, propname, index, &info);
6392cca4
LW
3931 if (IS_ERR(desc))
3932 return desc;
40b73183 3933
6392cca4 3934 acpi_gpio_update_gpiod_flags(&dflags, &info);
606be344 3935 acpi_gpio_update_gpiod_lookup_flags(&lflags, &info);
6392cca4 3936 }
40b73183 3937
6392cca4 3938 /* Currently only ACPI takes this path */
b2987d74 3939 ret = gpiod_request(desc, label);
85b03b30
JH
3940 if (ret)
3941 return ERR_PTR(ret);
3942
a264d10f
AS
3943 ret = gpiod_configure_flags(desc, propname, lflags, dflags);
3944 if (ret < 0) {
3945 gpiod_put(desc);
3946 return ERR_PTR(ret);
90b665f6
LP
3947 }
3948
6accc376
KG
3949 blocking_notifier_call_chain(&desc->gdev->notifier,
3950 GPIOLINE_CHANGED_REQUESTED, desc);
9fefca77 3951
40b73183
MW
3952 return desc;
3953}
3954EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod);
3955
29a1f233
TR
3956/**
3957 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
3958 * function
3959 * @dev: GPIO consumer, can be NULL for system-global GPIOs
3960 * @con_id: function within the GPIO consumer
3961 * @index: index of the GPIO to obtain in the consumer
39b2bbe3 3962 * @flags: optional GPIO initialization flags
29a1f233
TR
3963 *
3964 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
3965 * specified index was assigned to the requested function it will return NULL.
3966 * This is convenient for drivers that need to handle optional GPIOs.
3967 */
b17d1bf1 3968struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
29a1f233 3969 const char *con_id,
39b2bbe3
AC
3970 unsigned int index,
3971 enum gpiod_flags flags)
29a1f233
TR
3972{
3973 struct gpio_desc *desc;
3974
39b2bbe3 3975 desc = gpiod_get_index(dev, con_id, index, flags);
7b58696d
AS
3976 if (gpiod_not_found(desc))
3977 return NULL;
29a1f233
TR
3978
3979 return desc;
3980}
b17d1bf1 3981EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
29a1f233 3982
f625d460
BP
3983/**
3984 * gpiod_hog - Hog the specified GPIO desc given the provided flags
3985 * @desc: gpio whose value will be assigned
3986 * @name: gpio line name
fed7026a
AS
3987 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
3988 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
3989 * @dflags: gpiod_flags - optional GPIO initialization flags
3990 */
3991int gpiod_hog(struct gpio_desc *desc, const char *name,
3992 unsigned long lflags, enum gpiod_flags dflags)
3993{
a0b66a73 3994 struct gpio_chip *gc;
f625d460
BP
3995 struct gpio_desc *local_desc;
3996 int hwnum;
d377f56f 3997 int ret;
f625d460 3998
a0b66a73 3999 gc = gpiod_to_chip(desc);
f625d460
BP
4000 hwnum = gpio_chip_hwgpio(desc);
4001
a0b66a73 4002 local_desc = gpiochip_request_own_desc(gc, hwnum, name,
5923ea6c 4003 lflags, dflags);
f625d460 4004 if (IS_ERR(local_desc)) {
d377f56f 4005 ret = PTR_ERR(local_desc);
c31a571d 4006 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
a0b66a73 4007 name, gc->label, hwnum, ret);
d377f56f 4008 return ret;
f625d460
BP
4009 }
4010
f625d460
BP
4011 /* Mark GPIO as hogged so it can be identified and removed later */
4012 set_bit(FLAG_IS_HOGGED, &desc->flags);
4013
262b9011 4014 gpiod_info(desc, "hogged as %s%s\n",
b27f300f
BG
4015 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
4016 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
4017 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
f625d460
BP
4018
4019 return 0;
4020}
4021
4022/**
4023 * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
a0b66a73 4024 * @gc: gpio chip to act on
f625d460 4025 */
a0b66a73 4026static void gpiochip_free_hogs(struct gpio_chip *gc)
f625d460
BP
4027{
4028 int id;
4029
a0b66a73
LW
4030 for (id = 0; id < gc->ngpio; id++) {
4031 if (test_bit(FLAG_IS_HOGGED, &gc->gpiodev->descs[id].flags))
4032 gpiochip_free_own_desc(&gc->gpiodev->descs[id]);
f625d460
BP
4033 }
4034}
4035
66858527
RI
4036/**
4037 * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
4038 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4039 * @con_id: function within the GPIO consumer
4040 * @flags: optional GPIO initialization flags
4041 *
4042 * This function acquires all the GPIOs defined under a given function.
4043 *
4044 * Return a struct gpio_descs containing an array of descriptors, -ENOENT if
4045 * no GPIO has been assigned to the requested function, or another IS_ERR()
4046 * code if an error occurred while trying to acquire the GPIOs.
4047 */
4048struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
4049 const char *con_id,
4050 enum gpiod_flags flags)
4051{
4052 struct gpio_desc *desc;
4053 struct gpio_descs *descs;
bf9346f5 4054 struct gpio_array *array_info = NULL;
a0b66a73 4055 struct gpio_chip *gc;
bf9346f5 4056 int count, bitmap_size;
66858527
RI
4057
4058 count = gpiod_count(dev, con_id);
4059 if (count < 0)
4060 return ERR_PTR(count);
4061
acafe7e3 4062 descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL);
66858527
RI
4063 if (!descs)
4064 return ERR_PTR(-ENOMEM);
4065
4066 for (descs->ndescs = 0; descs->ndescs < count; ) {
4067 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
4068 if (IS_ERR(desc)) {
4069 gpiod_put_array(descs);
4070 return ERR_CAST(desc);
4071 }
bf9346f5 4072
66858527 4073 descs->desc[descs->ndescs] = desc;
bf9346f5 4074
a0b66a73 4075 gc = gpiod_to_chip(desc);
bf9346f5 4076 /*
c4c958aa
JK
4077 * If pin hardware number of array member 0 is also 0, select
4078 * its chip as a candidate for fast bitmap processing path.
bf9346f5 4079 */
c4c958aa 4080 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
bf9346f5
JK
4081 struct gpio_descs *array;
4082
a0b66a73
LW
4083 bitmap_size = BITS_TO_LONGS(gc->ngpio > count ?
4084 gc->ngpio : count);
bf9346f5
JK
4085
4086 array = kzalloc(struct_size(descs, desc, count) +
4087 struct_size(array_info, invert_mask,
4088 3 * bitmap_size), GFP_KERNEL);
4089 if (!array) {
4090 gpiod_put_array(descs);
4091 return ERR_PTR(-ENOMEM);
4092 }
4093
4094 memcpy(array, descs,
4095 struct_size(descs, desc, descs->ndescs + 1));
4096 kfree(descs);
4097
4098 descs = array;
4099 array_info = (void *)(descs->desc + count);
4100 array_info->get_mask = array_info->invert_mask +
4101 bitmap_size;
4102 array_info->set_mask = array_info->get_mask +
4103 bitmap_size;
4104
4105 array_info->desc = descs->desc;
4106 array_info->size = count;
a0b66a73 4107 array_info->chip = gc;
bf9346f5
JK
4108 bitmap_set(array_info->get_mask, descs->ndescs,
4109 count - descs->ndescs);
4110 bitmap_set(array_info->set_mask, descs->ndescs,
4111 count - descs->ndescs);
4112 descs->info = array_info;
4113 }
c4c958aa 4114 /* Unmark array members which don't belong to the 'fast' chip */
a0b66a73 4115 if (array_info && array_info->chip != gc) {
bf9346f5
JK
4116 __clear_bit(descs->ndescs, array_info->get_mask);
4117 __clear_bit(descs->ndescs, array_info->set_mask);
c4c958aa
JK
4118 }
4119 /*
4120 * Detect array members which belong to the 'fast' chip
4121 * but their pins are not in hardware order.
4122 */
4123 else if (array_info &&
4124 gpio_chip_hwgpio(desc) != descs->ndescs) {
4125 /*
4126 * Don't use fast path if all array members processed so
4127 * far belong to the same chip as this one but its pin
4128 * hardware number is different from its array index.
4129 */
4130 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
4131 array_info = NULL;
4132 } else {
4133 __clear_bit(descs->ndescs,
4134 array_info->get_mask);
4135 __clear_bit(descs->ndescs,
4136 array_info->set_mask);
4137 }
bf9346f5
JK
4138 } else if (array_info) {
4139 /* Exclude open drain or open source from fast output */
a0b66a73
LW
4140 if (gpiochip_line_is_open_drain(gc, descs->ndescs) ||
4141 gpiochip_line_is_open_source(gc, descs->ndescs))
bf9346f5
JK
4142 __clear_bit(descs->ndescs,
4143 array_info->set_mask);
4144 /* Identify 'fast' pins which require invertion */
4145 if (gpiod_is_active_low(desc))
4146 __set_bit(descs->ndescs,
4147 array_info->invert_mask);
4148 }
4149
66858527
RI
4150 descs->ndescs++;
4151 }
bf9346f5
JK
4152 if (array_info)
4153 dev_dbg(dev,
4154 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
4155 array_info->chip->label, array_info->size,
4156 *array_info->get_mask, *array_info->set_mask,
4157 *array_info->invert_mask);
66858527
RI
4158 return descs;
4159}
4160EXPORT_SYMBOL_GPL(gpiod_get_array);
4161
4162/**
4163 * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
4164 * function
4165 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4166 * @con_id: function within the GPIO consumer
4167 * @flags: optional GPIO initialization flags
4168 *
4169 * This is equivalent to gpiod_get_array(), except that when no GPIO was
4170 * assigned to the requested function it will return NULL.
4171 */
4172struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
4173 const char *con_id,
4174 enum gpiod_flags flags)
4175{
4176 struct gpio_descs *descs;
4177
4178 descs = gpiod_get_array(dev, con_id, flags);
7b58696d 4179 if (gpiod_not_found(descs))
66858527
RI
4180 return NULL;
4181
4182 return descs;
4183}
4184EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
4185
bae48da2
AC
4186/**
4187 * gpiod_put - dispose of a GPIO descriptor
4188 * @desc: GPIO descriptor to dispose of
4189 *
4190 * No descriptor can be used after gpiod_put() has been called on it.
4191 */
4192void gpiod_put(struct gpio_desc *desc)
4193{
1d7765ba
AS
4194 if (desc)
4195 gpiod_free(desc);
372e722e 4196}
bae48da2 4197EXPORT_SYMBOL_GPL(gpiod_put);
d2876d08 4198
66858527
RI
4199/**
4200 * gpiod_put_array - dispose of multiple GPIO descriptors
4201 * @descs: struct gpio_descs containing an array of descriptors
4202 */
4203void gpiod_put_array(struct gpio_descs *descs)
4204{
4205 unsigned int i;
4206
4207 for (i = 0; i < descs->ndescs; i++)
4208 gpiod_put(descs->desc[i]);
4209
4210 kfree(descs);
4211}
4212EXPORT_SYMBOL_GPL(gpiod_put_array);
4213
ced2af41
SK
4214
4215static int gpio_bus_match(struct device *dev, struct device_driver *drv)
4216{
4217 /*
4218 * Only match if the fwnode doesn't already have a proper struct device
4219 * created for it.
4220 */
4221 if (dev->fwnode && dev->fwnode->dev != dev)
4222 return 0;
4223 return 1;
4224}
4225
4731210c
SK
4226static int gpio_stub_drv_probe(struct device *dev)
4227{
4228 /*
4229 * The DT node of some GPIO chips have a "compatible" property, but
4230 * never have a struct device added and probed by a driver to register
4231 * the GPIO chip with gpiolib. In such cases, fw_devlink=on will cause
4232 * the consumers of the GPIO chip to get probe deferred forever because
4233 * they will be waiting for a device associated with the GPIO chip
4234 * firmware node to get added and bound to a driver.
4235 *
4236 * To allow these consumers to probe, we associate the struct
4237 * gpio_device of the GPIO chip with the firmware node and then simply
4238 * bind it to this stub driver.
4239 */
4240 return 0;
4241}
4242
4243static struct device_driver gpio_stub_drv = {
4244 .name = "gpio_stub_drv",
4245 .bus = &gpio_bus_type,
4246 .probe = gpio_stub_drv_probe,
4247};
4248
3c702e99
LW
4249static int __init gpiolib_dev_init(void)
4250{
4251 int ret;
4252
4253 /* Register GPIO sysfs bus */
b1911710 4254 ret = bus_register(&gpio_bus_type);
3c702e99
LW
4255 if (ret < 0) {
4256 pr_err("gpiolib: could not register GPIO bus type\n");
4257 return ret;
4258 }
4259
4731210c
SK
4260 if (driver_register(&gpio_stub_drv) < 0) {
4261 pr_err("gpiolib: could not register GPIO stub driver\n");
4262 bus_unregister(&gpio_bus_type);
4263 return ret;
4264 }
4265
ddd8891e 4266 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME);
3c702e99
LW
4267 if (ret < 0) {
4268 pr_err("gpiolib: failed to allocate char dev region\n");
4731210c 4269 driver_unregister(&gpio_stub_drv);
3c702e99 4270 bus_unregister(&gpio_bus_type);
63636d95 4271 return ret;
3c702e99 4272 }
63636d95
GU
4273
4274 gpiolib_initialized = true;
4275 gpiochip_setup_devs();
4276
8650b609
DG
4277#if IS_ENABLED(CONFIG_OF_DYNAMIC) && IS_ENABLED(CONFIG_OF_GPIO)
4278 WARN_ON(of_reconfig_notifier_register(&gpio_of_notifier));
4279#endif /* CONFIG_OF_DYNAMIC && CONFIG_OF_GPIO */
63636d95 4280
3c702e99
LW
4281 return ret;
4282}
4283core_initcall(gpiolib_dev_init);
4284
d2876d08
DB
4285#ifdef CONFIG_DEBUG_FS
4286
fdeb8e15 4287static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
d2876d08
DB
4288{
4289 unsigned i;
a0b66a73 4290 struct gpio_chip *gc = gdev->chip;
fdeb8e15
LW
4291 unsigned gpio = gdev->base;
4292 struct gpio_desc *gdesc = &gdev->descs[0];
90fd2270
LW
4293 bool is_out;
4294 bool is_irq;
4295 bool active_low;
d2876d08 4296
fdeb8e15 4297 for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) {
ced433e2
MP
4298 if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) {
4299 if (gdesc->name) {
4300 seq_printf(s, " gpio-%-3d (%-20.20s)\n",
4301 gpio, gdesc->name);
4302 }
d2876d08 4303 continue;
ced433e2 4304 }
d2876d08 4305
372e722e 4306 gpiod_get_direction(gdesc);
d2876d08 4307 is_out = test_bit(FLAG_IS_OUT, &gdesc->flags);
d468bf9e 4308 is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags);
90fd2270
LW
4309 active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags);
4310 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s",
ced433e2 4311 gpio, gdesc->name ? gdesc->name : "", gdesc->label,
d2876d08 4312 is_out ? "out" : "in ",
a0b66a73 4313 gc->get ? (gc->get(gc, i) ? "hi" : "lo") : "? ",
90fd2270
LW
4314 is_irq ? "IRQ " : "",
4315 active_low ? "ACTIVE LOW" : "");
d2876d08
DB
4316 seq_printf(s, "\n");
4317 }
4318}
4319
f9c4a31f 4320static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
d2876d08 4321{
362432ae 4322 unsigned long flags;
ff2b1359 4323 struct gpio_device *gdev = NULL;
cb1650d4 4324 loff_t index = *pos;
d2876d08 4325
f9c4a31f 4326 s->private = "";
d2876d08 4327
362432ae 4328 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4329 list_for_each_entry(gdev, &gpio_devices, list)
362432ae
GL
4330 if (index-- == 0) {
4331 spin_unlock_irqrestore(&gpio_lock, flags);
ff2b1359 4332 return gdev;
f9c4a31f 4333 }
362432ae 4334 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f 4335
cb1650d4 4336 return NULL;
f9c4a31f
TR
4337}
4338
4339static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
4340{
362432ae 4341 unsigned long flags;
ff2b1359 4342 struct gpio_device *gdev = v;
f9c4a31f
TR
4343 void *ret = NULL;
4344
362432ae 4345 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 4346 if (list_is_last(&gdev->list, &gpio_devices))
cb1650d4
AC
4347 ret = NULL;
4348 else
ff2b1359 4349 ret = list_entry(gdev->list.next, struct gpio_device, list);
362432ae 4350 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f
TR
4351
4352 s->private = "\n";
4353 ++*pos;
4354
4355 return ret;
4356}
4357
4358static void gpiolib_seq_stop(struct seq_file *s, void *v)
4359{
4360}
4361
4362static int gpiolib_seq_show(struct seq_file *s, void *v)
4363{
ff2b1359 4364 struct gpio_device *gdev = v;
a0b66a73 4365 struct gpio_chip *gc = gdev->chip;
ff2b1359
LW
4366 struct device *parent;
4367
a0b66a73 4368 if (!gc) {
ff2b1359
LW
4369 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
4370 dev_name(&gdev->dev));
4371 return 0;
4372 }
f9c4a31f 4373
ff2b1359
LW
4374 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
4375 dev_name(&gdev->dev),
fdeb8e15 4376 gdev->base, gdev->base + gdev->ngpio - 1);
a0b66a73 4377 parent = gc->parent;
ff2b1359
LW
4378 if (parent)
4379 seq_printf(s, ", parent: %s/%s",
4380 parent->bus ? parent->bus->name : "no-bus",
4381 dev_name(parent));
a0b66a73
LW
4382 if (gc->label)
4383 seq_printf(s, ", %s", gc->label);
4384 if (gc->can_sleep)
f9c4a31f
TR
4385 seq_printf(s, ", can sleep");
4386 seq_printf(s, ":\n");
4387
a0b66a73
LW
4388 if (gc->dbg_show)
4389 gc->dbg_show(s, gc);
f9c4a31f 4390 else
fdeb8e15 4391 gpiolib_dbg_show(s, gdev);
f9c4a31f 4392
d2876d08
DB
4393 return 0;
4394}
4395
425c5b3e 4396static const struct seq_operations gpiolib_sops = {
f9c4a31f
TR
4397 .start = gpiolib_seq_start,
4398 .next = gpiolib_seq_next,
4399 .stop = gpiolib_seq_stop,
4400 .show = gpiolib_seq_show,
4401};
425c5b3e 4402DEFINE_SEQ_ATTRIBUTE(gpiolib);
d2876d08
DB
4403
4404static int __init gpiolib_debugfs_init(void)
4405{
4406 /* /sys/kernel/debug/gpio */
425c5b3e 4407 debugfs_create_file("gpio", 0444, NULL, NULL, &gpiolib_fops);
d2876d08
DB
4408 return 0;
4409}
4410subsys_initcall(gpiolib_debugfs_init);
4411
4412#endif /* DEBUG_FS */