net: phy: mdio-bcm-unimac: Fix clock handling
[linux-2.6-block.git] / drivers / gpio / gpiolib.c
CommitLineData
dae5f0af 1// SPDX-License-Identifier: GPL-2.0
923a654c 2#include <linux/bitmap.h>
d2876d08
DB
3#include <linux/kernel.h>
4#include <linux/module.h>
ff77c352 5#include <linux/interrupt.h>
d2876d08
DB
6#include <linux/irq.h>
7#include <linux/spinlock.h>
1a989d0f 8#include <linux/list.h>
d8f388d8
DB
9#include <linux/device.h>
10#include <linux/err.h>
11#include <linux/debugfs.h>
12#include <linux/seq_file.h>
13#include <linux/gpio.h>
ff77c352 14#include <linux/idr.h>
5a0e3ad6 15#include <linux/slab.h>
7b199811 16#include <linux/acpi.h>
53e7cac3 17#include <linux/gpio/driver.h>
0a6d3158 18#include <linux/gpio/machine.h>
c771c2f4 19#include <linux/pinctrl/consumer.h>
3c702e99
LW
20#include <linux/cdev.h>
21#include <linux/fs.h>
22#include <linux/uaccess.h>
8b92e17e 23#include <linux/compat.h>
d7c51b47 24#include <linux/anon_inodes.h>
953b956a 25#include <linux/file.h>
61f922db
LW
26#include <linux/kfifo.h>
27#include <linux/poll.h>
28#include <linux/timekeeping.h>
3c702e99 29#include <uapi/linux/gpio.h>
d2876d08 30
664e3e5a 31#include "gpiolib.h"
f626d6df 32#include "gpiolib-of.h"
77cb907a 33#include "gpiolib-acpi.h"
664e3e5a 34
3f397c21
UKK
35#define CREATE_TRACE_POINTS
36#include <trace/events/gpio.h>
d2876d08 37
79a9becd 38/* Implementation infrastructure for GPIO interfaces.
d2876d08 39 *
79a9becd
AC
40 * The GPIO programming interface allows for inlining speed-critical
41 * get/set operations for common cases, so that access to SOC-integrated
42 * GPIOs can sometimes cost only an instruction or two per bit.
d2876d08
DB
43 */
44
45
46/* When debugging, extend minimal trust to callers and platform code.
47 * Also emit diagnostic messages that may help initial bringup, when
48 * board setup or driver bugs are most common.
49 *
50 * Otherwise, minimize overhead in what may be bitbanging codepaths.
51 */
52#ifdef DEBUG
53#define extra_checks 1
54#else
55#define extra_checks 0
56#endif
57
ff2b1359
LW
58/* Device and char device-related information */
59static DEFINE_IDA(gpio_ida);
3c702e99
LW
60static dev_t gpio_devt;
61#define GPIO_DEV_MAX 256 /* 256 GPIO chip devices supported */
62static struct bus_type gpio_bus_type = {
63 .name = "gpio",
64};
ff2b1359 65
3027743f
LA
66/*
67 * Number of GPIOs to use for the fast path in set array
68 */
69#define FASTPATH_NGPIO CONFIG_GPIOLIB_FASTPATH_LIMIT
70
d2876d08
DB
71/* gpio_lock prevents conflicts during gpio_desc[] table updates.
72 * While any GPIO is requested, its gpio_chip is not removable;
73 * each GPIO's "requested" flag serves as a lock and refcount.
74 */
0eb4c6c2 75DEFINE_SPINLOCK(gpio_lock);
d2876d08 76
bae48da2
AC
77static DEFINE_MUTEX(gpio_lookup_lock);
78static LIST_HEAD(gpio_lookup_list);
ff2b1359 79LIST_HEAD(gpio_devices);
6d86750c 80
a411e81e
BG
81static DEFINE_MUTEX(gpio_machine_hogs_mutex);
82static LIST_HEAD(gpio_machine_hogs);
83
6d86750c 84static void gpiochip_free_hogs(struct gpio_chip *chip);
959bc7b2 85static int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
86 struct lock_class_key *lock_key,
87 struct lock_class_key *request_key);
6d86750c 88static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip);
9411e3aa 89static int gpiochip_irqchip_init_hw(struct gpio_chip *gpiochip);
79b804cb
MW
90static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip);
91static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip);
6d86750c 92
159f3cd9 93static bool gpiolib_initialized;
6d86750c 94
d2876d08
DB
95static inline void desc_set_label(struct gpio_desc *d, const char *label)
96{
d2876d08 97 d->label = label;
d2876d08
DB
98}
99
372e722e 100/**
950d55f5
TR
101 * gpio_to_desc - Convert a GPIO number to its descriptor
102 * @gpio: global GPIO number
103 *
104 * Returns:
105 * The GPIO descriptor associated with the given GPIO, or %NULL if no GPIO
106 * with the given number exists in the system.
372e722e 107 */
79a9becd 108struct gpio_desc *gpio_to_desc(unsigned gpio)
372e722e 109{
ff2b1359 110 struct gpio_device *gdev;
14e85c0e
AC
111 unsigned long flags;
112
113 spin_lock_irqsave(&gpio_lock, flags);
114
ff2b1359 115 list_for_each_entry(gdev, &gpio_devices, list) {
fdeb8e15
LW
116 if (gdev->base <= gpio &&
117 gdev->base + gdev->ngpio > gpio) {
14e85c0e 118 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 119 return &gdev->descs[gpio - gdev->base];
14e85c0e
AC
120 }
121 }
122
123 spin_unlock_irqrestore(&gpio_lock, flags);
124
0e9a5edf
AC
125 if (!gpio_is_valid(gpio))
126 WARN(1, "invalid GPIO %d\n", gpio);
127
14e85c0e 128 return NULL;
372e722e 129}
79a9becd 130EXPORT_SYMBOL_GPL(gpio_to_desc);
372e722e 131
d468bf9e 132/**
950d55f5
TR
133 * gpiochip_get_desc - get the GPIO descriptor corresponding to the given
134 * hardware number for this chip
135 * @chip: GPIO chip
136 * @hwnum: hardware number of the GPIO for this chip
137 *
138 * Returns:
139 * A pointer to the GPIO descriptor or %ERR_PTR(-EINVAL) if no GPIO exists
140 * in the given chip for the specified hardware number.
d468bf9e 141 */
bb1e88cc 142struct gpio_desc *gpiochip_get_desc(struct gpio_chip *chip,
06863620 143 unsigned int hwnum)
d468bf9e 144{
fdeb8e15
LW
145 struct gpio_device *gdev = chip->gpiodev;
146
147 if (hwnum >= gdev->ngpio)
b7d0a28a 148 return ERR_PTR(-EINVAL);
d468bf9e 149
fdeb8e15 150 return &gdev->descs[hwnum];
d468bf9e 151}
372e722e
AC
152
153/**
950d55f5
TR
154 * desc_to_gpio - convert a GPIO descriptor to the integer namespace
155 * @desc: GPIO descriptor
156 *
372e722e 157 * This should disappear in the future but is needed since we still
950d55f5
TR
158 * use GPIO numbers for error messages and sysfs nodes.
159 *
160 * Returns:
161 * The global GPIO number for the GPIO specified by its descriptor.
372e722e 162 */
79a9becd 163int desc_to_gpio(const struct gpio_desc *desc)
372e722e 164{
fdeb8e15 165 return desc->gdev->base + (desc - &desc->gdev->descs[0]);
372e722e 166}
79a9becd 167EXPORT_SYMBOL_GPL(desc_to_gpio);
372e722e
AC
168
169
79a9becd
AC
170/**
171 * gpiod_to_chip - Return the GPIO chip to which a GPIO descriptor belongs
172 * @desc: descriptor to return the chip of
173 */
174struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
372e722e 175{
dd3b9a44 176 if (!desc || !desc->gdev)
fdeb8e15
LW
177 return NULL;
178 return desc->gdev->chip;
372e722e 179}
79a9becd 180EXPORT_SYMBOL_GPL(gpiod_to_chip);
d2876d08 181
8d0aab2f
AV
182/* dynamic allocation of GPIOs, e.g. on a hotplugged device */
183static int gpiochip_find_base(int ngpio)
184{
ff2b1359 185 struct gpio_device *gdev;
83cabe33 186 int base = ARCH_NR_GPIOS - ngpio;
8d0aab2f 187
ff2b1359 188 list_for_each_entry_reverse(gdev, &gpio_devices, list) {
83cabe33 189 /* found a free space? */
fdeb8e15 190 if (gdev->base + gdev->ngpio <= base)
83cabe33
AC
191 break;
192 else
193 /* nope, check the space right before the chip */
fdeb8e15 194 base = gdev->base - ngpio;
8d0aab2f
AV
195 }
196
83cabe33 197 if (gpio_is_valid(base)) {
8d0aab2f 198 pr_debug("%s: found new base at %d\n", __func__, base);
83cabe33
AC
199 return base;
200 } else {
201 pr_err("%s: cannot find free range\n", __func__);
202 return -ENOSPC;
169b6a7a 203 }
169b6a7a
AV
204}
205
79a9becd
AC
206/**
207 * gpiod_get_direction - return the current direction of a GPIO
208 * @desc: GPIO to get the direction of
209 *
94fc7309 210 * Returns 0 for output, 1 for input, or an error code in case of error.
79a9becd
AC
211 *
212 * This function may sleep if gpiod_cansleep() is true.
213 */
8e53b0f1 214int gpiod_get_direction(struct gpio_desc *desc)
80b0a602 215{
d0121b85
WS
216 struct gpio_chip *chip;
217 unsigned offset;
d377f56f 218 int ret;
80b0a602 219
372e722e
AC
220 chip = gpiod_to_chip(desc);
221 offset = gpio_chip_hwgpio(desc);
80b0a602 222
256efaea
RK
223 /*
224 * Open drain emulation using input mode may incorrectly report
225 * input here, fix that up.
226 */
227 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) &&
228 test_bit(FLAG_IS_OUT, &desc->flags))
229 return 0;
230
80b0a602 231 if (!chip->get_direction)
d0121b85 232 return -ENOTSUPP;
80b0a602 233
d377f56f 234 ret = chip->get_direction(chip, offset);
4fc5bfeb
AS
235 if (ret < 0)
236 return ret;
237
238 /* GPIOF_DIR_IN or other positive, otherwise GPIOF_DIR_OUT */
239 if (ret > 0)
d377f56f 240 ret = 1;
4fc5bfeb
AS
241
242 assign_bit(FLAG_IS_OUT, &desc->flags, !ret);
243
d377f56f 244 return ret;
80b0a602 245}
79a9becd 246EXPORT_SYMBOL_GPL(gpiod_get_direction);
80b0a602 247
1a989d0f
AC
248/*
249 * Add a new chip to the global chips list, keeping the list of chips sorted
ef7c7553 250 * by range(means [base, base + ngpio - 1]) order.
1a989d0f
AC
251 *
252 * Return -EBUSY if the new chip overlaps with some other chip's integer
253 * space.
254 */
ff2b1359 255static int gpiodev_add_to_list(struct gpio_device *gdev)
1a989d0f 256{
a961f9b4 257 struct gpio_device *prev, *next;
1a989d0f 258
ff2b1359 259 if (list_empty(&gpio_devices)) {
a961f9b4 260 /* initial entry in list */
ff2b1359 261 list_add_tail(&gdev->list, &gpio_devices);
e28ecca6 262 return 0;
1a989d0f
AC
263 }
264
a961f9b4
BJZ
265 next = list_entry(gpio_devices.next, struct gpio_device, list);
266 if (gdev->base + gdev->ngpio <= next->base) {
267 /* add before first entry */
268 list_add(&gdev->list, &gpio_devices);
269 return 0;
1a989d0f
AC
270 }
271
a961f9b4
BJZ
272 prev = list_entry(gpio_devices.prev, struct gpio_device, list);
273 if (prev->base + prev->ngpio <= gdev->base) {
274 /* add behind last entry */
275 list_add_tail(&gdev->list, &gpio_devices);
96098df1 276 return 0;
1a989d0f
AC
277 }
278
a961f9b4
BJZ
279 list_for_each_entry_safe(prev, next, &gpio_devices, list) {
280 /* at the end of the list */
281 if (&next->list == &gpio_devices)
282 break;
1a989d0f 283
a961f9b4
BJZ
284 /* add between prev and next */
285 if (prev->base + prev->ngpio <= gdev->base
286 && gdev->base + gdev->ngpio <= next->base) {
287 list_add(&gdev->list, &prev->list);
288 return 0;
289 }
290 }
291
292 dev_err(&gdev->dev, "GPIO integer space overlap, cannot add chip\n");
293 return -EBUSY;
1a989d0f
AC
294}
295
950d55f5 296/*
f881bab0
LW
297 * Convert a GPIO name to its descriptor
298 */
299static struct gpio_desc *gpio_name_to_desc(const char * const name)
300{
ff2b1359 301 struct gpio_device *gdev;
f881bab0
LW
302 unsigned long flags;
303
304 spin_lock_irqsave(&gpio_lock, flags);
305
ff2b1359 306 list_for_each_entry(gdev, &gpio_devices, list) {
f881bab0
LW
307 int i;
308
fdeb8e15
LW
309 for (i = 0; i != gdev->ngpio; ++i) {
310 struct gpio_desc *desc = &gdev->descs[i];
f881bab0 311
fdeb8e15 312 if (!desc->name || !name)
f881bab0
LW
313 continue;
314
fdeb8e15 315 if (!strcmp(desc->name, name)) {
f881bab0 316 spin_unlock_irqrestore(&gpio_lock, flags);
fdeb8e15 317 return desc;
f881bab0
LW
318 }
319 }
320 }
321
322 spin_unlock_irqrestore(&gpio_lock, flags);
323
324 return NULL;
325}
326
5f3ca732
MP
327/*
328 * Takes the names from gc->names and checks if they are all unique. If they
329 * are, they are assigned to their gpio descriptors.
330 *
ed37915c 331 * Warning if one of the names is already used for a different GPIO.
5f3ca732
MP
332 */
333static int gpiochip_set_desc_names(struct gpio_chip *gc)
334{
fdeb8e15 335 struct gpio_device *gdev = gc->gpiodev;
5f3ca732
MP
336 int i;
337
338 if (!gc->names)
339 return 0;
340
341 /* First check all names if they are unique */
342 for (i = 0; i != gc->ngpio; ++i) {
343 struct gpio_desc *gpio;
344
345 gpio = gpio_name_to_desc(gc->names[i]);
f881bab0 346 if (gpio)
fdeb8e15 347 dev_warn(&gdev->dev,
34ffd85d 348 "Detected name collision for GPIO name '%s'\n",
f881bab0 349 gc->names[i]);
5f3ca732
MP
350 }
351
352 /* Then add all names to the GPIO descriptors */
353 for (i = 0; i != gc->ngpio; ++i)
fdeb8e15 354 gdev->descs[i].name = gc->names[i];
5f3ca732
MP
355
356 return 0;
357}
358
e4371f6e
SB
359static unsigned long *gpiochip_allocate_mask(struct gpio_chip *chip)
360{
361 unsigned long *p;
362
7bdbd1ec 363 p = bitmap_alloc(chip->ngpio, GFP_KERNEL);
e4371f6e
SB
364 if (!p)
365 return NULL;
366
367 /* Assume by default all GPIOs are valid */
368 bitmap_fill(p, chip->ngpio);
369
370 return p;
371}
372
f626d6df 373static int gpiochip_alloc_valid_mask(struct gpio_chip *gc)
726cb3ba 374{
eb1e8bd6 375 if (!(of_gpio_need_valid_mask(gc) || gc->init_valid_mask))
726cb3ba
SB
376 return 0;
377
f626d6df
LW
378 gc->valid_mask = gpiochip_allocate_mask(gc);
379 if (!gc->valid_mask)
726cb3ba
SB
380 return -ENOMEM;
381
382 return 0;
383}
384
c9fc5aff 385static int gpiochip_init_valid_mask(struct gpio_chip *gc)
f8ec92a9 386{
c9fc5aff
LW
387 if (gc->init_valid_mask)
388 return gc->init_valid_mask(gc,
389 gc->valid_mask,
390 gc->ngpio);
f8ec92a9
RRD
391
392 return 0;
393}
394
726cb3ba
SB
395static void gpiochip_free_valid_mask(struct gpio_chip *gpiochip)
396{
7bdbd1ec 397 bitmap_free(gpiochip->valid_mask);
726cb3ba
SB
398 gpiochip->valid_mask = NULL;
399}
400
b056ca1c
AS
401static int gpiochip_add_pin_ranges(struct gpio_chip *gc)
402{
403 if (gc->add_pin_ranges)
404 return gc->add_pin_ranges(gc);
405
406 return 0;
407}
408
726cb3ba
SB
409bool gpiochip_line_is_valid(const struct gpio_chip *gpiochip,
410 unsigned int offset)
411{
412 /* No mask means all valid */
413 if (likely(!gpiochip->valid_mask))
414 return true;
415 return test_bit(offset, gpiochip->valid_mask);
416}
417EXPORT_SYMBOL_GPL(gpiochip_line_is_valid);
418
d7c51b47
LW
419/*
420 * GPIO line handle management
421 */
422
423/**
424 * struct linehandle_state - contains the state of a userspace handle
425 * @gdev: the GPIO device the handle pertains to
426 * @label: consumer label used to tag descriptors
427 * @descs: the GPIO descriptors held by this handle
428 * @numdescs: the number of descriptors held in the descs array
429 */
430struct linehandle_state {
431 struct gpio_device *gdev;
432 const char *label;
433 struct gpio_desc *descs[GPIOHANDLES_MAX];
434 u32 numdescs;
435};
436
e3e847c7
LPC
437#define GPIOHANDLE_REQUEST_VALID_FLAGS \
438 (GPIOHANDLE_REQUEST_INPUT | \
439 GPIOHANDLE_REQUEST_OUTPUT | \
440 GPIOHANDLE_REQUEST_ACTIVE_LOW | \
9225d516
DF
441 GPIOHANDLE_REQUEST_BIAS_PULL_UP | \
442 GPIOHANDLE_REQUEST_BIAS_PULL_DOWN | \
2148ad77 443 GPIOHANDLE_REQUEST_BIAS_DISABLE | \
e3e847c7
LPC
444 GPIOHANDLE_REQUEST_OPEN_DRAIN | \
445 GPIOHANDLE_REQUEST_OPEN_SOURCE)
446
b043ed7e
KG
447static int linehandle_validate_flags(u32 flags)
448{
449 /* Return an error if an unknown flag is set */
450 if (flags & ~GPIOHANDLE_REQUEST_VALID_FLAGS)
451 return -EINVAL;
452
453 /*
454 * Do not allow both INPUT & OUTPUT flags to be set as they are
455 * contradictory.
456 */
457 if ((flags & GPIOHANDLE_REQUEST_INPUT) &&
458 (flags & GPIOHANDLE_REQUEST_OUTPUT))
459 return -EINVAL;
460
461 /*
462 * Do not allow OPEN_SOURCE & OPEN_DRAIN flags in a single request. If
463 * the hardware actually supports enabling both at the same time the
464 * electrical result would be disastrous.
465 */
466 if ((flags & GPIOHANDLE_REQUEST_OPEN_DRAIN) &&
467 (flags & GPIOHANDLE_REQUEST_OPEN_SOURCE))
468 return -EINVAL;
469
470 /* OPEN_DRAIN and OPEN_SOURCE flags only make sense for output mode. */
471 if (!(flags & GPIOHANDLE_REQUEST_OUTPUT) &&
472 ((flags & GPIOHANDLE_REQUEST_OPEN_DRAIN) ||
473 (flags & GPIOHANDLE_REQUEST_OPEN_SOURCE)))
474 return -EINVAL;
475
476 /* Bias flags only allowed for input or output mode. */
477 if (!((flags & GPIOHANDLE_REQUEST_INPUT) ||
478 (flags & GPIOHANDLE_REQUEST_OUTPUT)) &&
479 ((flags & GPIOHANDLE_REQUEST_BIAS_DISABLE) ||
480 (flags & GPIOHANDLE_REQUEST_BIAS_PULL_UP) ||
481 (flags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)))
482 return -EINVAL;
483
484 /* Only one bias flag can be set. */
485 if (((flags & GPIOHANDLE_REQUEST_BIAS_DISABLE) &&
486 (flags & (GPIOHANDLE_REQUEST_BIAS_PULL_DOWN |
487 GPIOHANDLE_REQUEST_BIAS_PULL_UP))) ||
488 ((flags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) &&
489 (flags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)))
490 return -EINVAL;
491
492 return 0;
493}
494
e588bb1e
KG
495static long linehandle_set_config(struct linehandle_state *lh,
496 void __user *ip)
497{
498 struct gpiohandle_config gcnf;
499 struct gpio_desc *desc;
500 int i, ret;
501 u32 lflags;
502 unsigned long *flagsp;
503
504 if (copy_from_user(&gcnf, ip, sizeof(gcnf)))
505 return -EFAULT;
506
507 lflags = gcnf.flags;
508 ret = linehandle_validate_flags(lflags);
509 if (ret)
510 return ret;
511
512 for (i = 0; i < lh->numdescs; i++) {
513 desc = lh->descs[i];
514 flagsp = &desc->flags;
515
4fc5bfeb 516 assign_bit(FLAG_ACTIVE_LOW, flagsp,
e588bb1e
KG
517 lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW);
518
4fc5bfeb 519 assign_bit(FLAG_OPEN_DRAIN, flagsp,
e588bb1e
KG
520 lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN);
521
4fc5bfeb 522 assign_bit(FLAG_OPEN_SOURCE, flagsp,
e588bb1e
KG
523 lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE);
524
4fc5bfeb 525 assign_bit(FLAG_PULL_UP, flagsp,
e588bb1e
KG
526 lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP);
527
4fc5bfeb 528 assign_bit(FLAG_PULL_DOWN, flagsp,
e588bb1e
KG
529 lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN);
530
4fc5bfeb 531 assign_bit(FLAG_BIAS_DISABLE, flagsp,
e588bb1e
KG
532 lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE);
533
534 /*
535 * Lines have to be requested explicitly for input
536 * or output, else the line will be treated "as is".
537 */
538 if (lflags & GPIOHANDLE_REQUEST_OUTPUT) {
539 int val = !!gcnf.default_values[i];
540
541 ret = gpiod_direction_output(desc, val);
542 if (ret)
543 return ret;
544 } else if (lflags & GPIOHANDLE_REQUEST_INPUT) {
545 ret = gpiod_direction_input(desc);
546 if (ret)
547 return ret;
548 }
549 }
550 return 0;
551}
552
d7c51b47
LW
553static long linehandle_ioctl(struct file *filep, unsigned int cmd,
554 unsigned long arg)
555{
556 struct linehandle_state *lh = filep->private_data;
557 void __user *ip = (void __user *)arg;
558 struct gpiohandle_data ghd;
b9762beb 559 DECLARE_BITMAP(vals, GPIOHANDLES_MAX);
d7c51b47
LW
560 int i;
561
562 if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) {
2b955b34 563 /* NOTE: It's ok to read values of output lines. */
eec1d566
LW
564 int ret = gpiod_get_array_value_complex(false,
565 true,
566 lh->numdescs,
567 lh->descs,
77588c14 568 NULL,
eec1d566
LW
569 vals);
570 if (ret)
571 return ret;
d7c51b47 572
3eded5d8 573 memset(&ghd, 0, sizeof(ghd));
eec1d566 574 for (i = 0; i < lh->numdescs; i++)
b9762beb 575 ghd.values[i] = test_bit(i, vals);
d7c51b47
LW
576
577 if (copy_to_user(ip, &ghd, sizeof(ghd)))
578 return -EFAULT;
579
580 return 0;
581 } else if (cmd == GPIOHANDLE_SET_LINE_VALUES_IOCTL) {
e5332d54
BG
582 /*
583 * All line descriptors were created at once with the same
584 * flags so just check if the first one is really output.
585 */
586 if (!test_bit(FLAG_IS_OUT, &lh->descs[0]->flags))
587 return -EPERM;
588
d7c51b47
LW
589 if (copy_from_user(&ghd, ip, sizeof(ghd)))
590 return -EFAULT;
591
592 /* Clamp all values to [0,1] */
593 for (i = 0; i < lh->numdescs; i++)
b9762beb 594 __assign_bit(i, vals, ghd.values[i]);
d7c51b47
LW
595
596 /* Reuse the array setting function */
3027743f 597 return gpiod_set_array_value_complex(false,
d7c51b47
LW
598 true,
599 lh->numdescs,
600 lh->descs,
77588c14 601 NULL,
d7c51b47 602 vals);
e588bb1e
KG
603 } else if (cmd == GPIOHANDLE_SET_CONFIG_IOCTL) {
604 return linehandle_set_config(lh, ip);
d7c51b47
LW
605 }
606 return -EINVAL;
607}
608
609#ifdef CONFIG_COMPAT
610static long linehandle_ioctl_compat(struct file *filep, unsigned int cmd,
611 unsigned long arg)
612{
613 return linehandle_ioctl(filep, cmd, (unsigned long)compat_ptr(arg));
614}
615#endif
616
617static int linehandle_release(struct inode *inode, struct file *filep)
618{
619 struct linehandle_state *lh = filep->private_data;
620 struct gpio_device *gdev = lh->gdev;
621 int i;
622
623 for (i = 0; i < lh->numdescs; i++)
624 gpiod_free(lh->descs[i]);
625 kfree(lh->label);
626 kfree(lh);
627 put_device(&gdev->dev);
628 return 0;
629}
630
631static const struct file_operations linehandle_fileops = {
632 .release = linehandle_release,
633 .owner = THIS_MODULE,
634 .llseek = noop_llseek,
635 .unlocked_ioctl = linehandle_ioctl,
636#ifdef CONFIG_COMPAT
637 .compat_ioctl = linehandle_ioctl_compat,
638#endif
639};
640
641static int linehandle_create(struct gpio_device *gdev, void __user *ip)
642{
643 struct gpiohandle_request handlereq;
644 struct linehandle_state *lh;
953b956a 645 struct file *file;
ab3dbcf7 646 int fd, i, count = 0, ret;
418ee8e9 647 u32 lflags;
d7c51b47
LW
648
649 if (copy_from_user(&handlereq, ip, sizeof(handlereq)))
650 return -EFAULT;
651 if ((handlereq.lines == 0) || (handlereq.lines > GPIOHANDLES_MAX))
652 return -EINVAL;
653
418ee8e9
BG
654 lflags = handlereq.flags;
655
b043ed7e
KG
656 ret = linehandle_validate_flags(lflags);
657 if (ret)
658 return ret;
2148ad77 659
d7c51b47
LW
660 lh = kzalloc(sizeof(*lh), GFP_KERNEL);
661 if (!lh)
662 return -ENOMEM;
663 lh->gdev = gdev;
664 get_device(&gdev->dev);
665
666 /* Make sure this is terminated */
667 handlereq.consumer_label[sizeof(handlereq.consumer_label)-1] = '\0';
668 if (strlen(handlereq.consumer_label)) {
669 lh->label = kstrdup(handlereq.consumer_label,
670 GFP_KERNEL);
671 if (!lh->label) {
672 ret = -ENOMEM;
673 goto out_free_lh;
674 }
675 }
676
677 /* Request each GPIO */
678 for (i = 0; i < handlereq.lines; i++) {
679 u32 offset = handlereq.lineoffsets[i];
0f41dabe 680 struct gpio_desc *desc = gpiochip_get_desc(gdev->chip, offset);
d7c51b47 681
0f41dabe
BG
682 if (IS_ERR(desc)) {
683 ret = PTR_ERR(desc);
e405f9fc
LPC
684 goto out_free_descs;
685 }
686
d7c51b47
LW
687 ret = gpiod_request(desc, lh->label);
688 if (ret)
689 goto out_free_descs;
690 lh->descs[i] = desc;
19a4fbff 691 count = i + 1;
d7c51b47
LW
692
693 if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW)
694 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
695 if (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN)
696 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
697 if (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE)
698 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
2148ad77
KG
699 if (lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE)
700 set_bit(FLAG_BIAS_DISABLE, &desc->flags);
9225d516
DF
701 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)
702 set_bit(FLAG_PULL_DOWN, &desc->flags);
703 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)
704 set_bit(FLAG_PULL_UP, &desc->flags);
d7c51b47 705
e10f72bf
AJ
706 ret = gpiod_set_transitory(desc, false);
707 if (ret < 0)
708 goto out_free_descs;
709
d7c51b47
LW
710 /*
711 * Lines have to be requested explicitly for input
712 * or output, else the line will be treated "as is".
713 */
714 if (lflags & GPIOHANDLE_REQUEST_OUTPUT) {
715 int val = !!handlereq.default_values[i];
716
717 ret = gpiod_direction_output(desc, val);
718 if (ret)
719 goto out_free_descs;
720 } else if (lflags & GPIOHANDLE_REQUEST_INPUT) {
721 ret = gpiod_direction_input(desc);
722 if (ret)
723 goto out_free_descs;
724 }
725 dev_dbg(&gdev->dev, "registered chardev handle for line %d\n",
726 offset);
727 }
e2f608be
LW
728 /* Let i point at the last handle */
729 i--;
d7c51b47
LW
730 lh->numdescs = handlereq.lines;
731
953b956a 732 fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);
d7c51b47
LW
733 if (fd < 0) {
734 ret = fd;
735 goto out_free_descs;
736 }
737
953b956a
LPC
738 file = anon_inode_getfile("gpio-linehandle",
739 &linehandle_fileops,
740 lh,
741 O_RDONLY | O_CLOEXEC);
742 if (IS_ERR(file)) {
743 ret = PTR_ERR(file);
744 goto out_put_unused_fd;
745 }
746
d7c51b47 747 handlereq.fd = fd;
d932cd49 748 if (copy_to_user(ip, &handlereq, sizeof(handlereq))) {
953b956a
LPC
749 /*
750 * fput() will trigger the release() callback, so do not go onto
751 * the regular error cleanup path here.
752 */
753 fput(file);
754 put_unused_fd(fd);
755 return -EFAULT;
d932cd49 756 }
d7c51b47 757
953b956a
LPC
758 fd_install(fd, file);
759
d7c51b47
LW
760 dev_dbg(&gdev->dev, "registered chardev handle for %d lines\n",
761 lh->numdescs);
762
763 return 0;
764
953b956a
LPC
765out_put_unused_fd:
766 put_unused_fd(fd);
d7c51b47 767out_free_descs:
ab3dbcf7 768 for (i = 0; i < count; i++)
d7c51b47
LW
769 gpiod_free(lh->descs[i]);
770 kfree(lh->label);
771out_free_lh:
772 kfree(lh);
773 put_device(&gdev->dev);
774 return ret;
775}
776
61f922db
LW
777/*
778 * GPIO line event management
779 */
780
781/**
782 * struct lineevent_state - contains the state of a userspace event
783 * @gdev: the GPIO device the event pertains to
784 * @label: consumer label used to tag descriptors
785 * @desc: the GPIO descriptor held by this event
786 * @eflags: the event flags this line was requested with
787 * @irq: the interrupt that trigger in response to events on this GPIO
788 * @wait: wait queue that handles blocking reads of events
789 * @events: KFIFO for the GPIO events
790 * @read_lock: mutex lock to protect reads from colliding with adding
791 * new events to the FIFO
d58f2bf2
LW
792 * @timestamp: cache for the timestamp storing it between hardirq
793 * and IRQ thread, used to bring the timestamp close to the actual
794 * event
61f922db
LW
795 */
796struct lineevent_state {
797 struct gpio_device *gdev;
798 const char *label;
799 struct gpio_desc *desc;
800 u32 eflags;
801 int irq;
802 wait_queue_head_t wait;
803 DECLARE_KFIFO(events, struct gpioevent_data, 16);
804 struct mutex read_lock;
d58f2bf2 805 u64 timestamp;
61f922db
LW
806};
807
ac7dbb99
LPC
808#define GPIOEVENT_REQUEST_VALID_FLAGS \
809 (GPIOEVENT_REQUEST_RISING_EDGE | \
810 GPIOEVENT_REQUEST_FALLING_EDGE)
811
afc9a42b 812static __poll_t lineevent_poll(struct file *filep,
61f922db
LW
813 struct poll_table_struct *wait)
814{
815 struct lineevent_state *le = filep->private_data;
afc9a42b 816 __poll_t events = 0;
61f922db
LW
817
818 poll_wait(filep, &le->wait, wait);
819
820 if (!kfifo_is_empty(&le->events))
a9a08845 821 events = EPOLLIN | EPOLLRDNORM;
61f922db
LW
822
823 return events;
824}
825
826
827static ssize_t lineevent_read(struct file *filep,
828 char __user *buf,
829 size_t count,
830 loff_t *f_ps)
831{
832 struct lineevent_state *le = filep->private_data;
833 unsigned int copied;
834 int ret;
835
836 if (count < sizeof(struct gpioevent_data))
837 return -EINVAL;
838
839 do {
840 if (kfifo_is_empty(&le->events)) {
841 if (filep->f_flags & O_NONBLOCK)
842 return -EAGAIN;
843
844 ret = wait_event_interruptible(le->wait,
845 !kfifo_is_empty(&le->events));
846 if (ret)
847 return ret;
848 }
849
850 if (mutex_lock_interruptible(&le->read_lock))
851 return -ERESTARTSYS;
852 ret = kfifo_to_user(&le->events, buf, count, &copied);
853 mutex_unlock(&le->read_lock);
854
855 if (ret)
856 return ret;
857
858 /*
859 * If we couldn't read anything from the fifo (a different
860 * thread might have been faster) we either return -EAGAIN if
861 * the file descriptor is non-blocking, otherwise we go back to
862 * sleep and wait for more data to arrive.
863 */
864 if (copied == 0 && (filep->f_flags & O_NONBLOCK))
865 return -EAGAIN;
866
867 } while (copied == 0);
868
869 return copied;
870}
871
872static int lineevent_release(struct inode *inode, struct file *filep)
873{
874 struct lineevent_state *le = filep->private_data;
875 struct gpio_device *gdev = le->gdev;
876
877 free_irq(le->irq, le);
878 gpiod_free(le->desc);
879 kfree(le->label);
880 kfree(le);
881 put_device(&gdev->dev);
882 return 0;
883}
884
885static long lineevent_ioctl(struct file *filep, unsigned int cmd,
886 unsigned long arg)
887{
888 struct lineevent_state *le = filep->private_data;
889 void __user *ip = (void __user *)arg;
890 struct gpiohandle_data ghd;
891
892 /*
893 * We can get the value for an event line but not set it,
894 * because it is input by definition.
895 */
896 if (cmd == GPIOHANDLE_GET_LINE_VALUES_IOCTL) {
897 int val;
898
d82aa4a8
LPC
899 memset(&ghd, 0, sizeof(ghd));
900
61f922db
LW
901 val = gpiod_get_value_cansleep(le->desc);
902 if (val < 0)
903 return val;
904 ghd.values[0] = val;
905
906 if (copy_to_user(ip, &ghd, sizeof(ghd)))
907 return -EFAULT;
908
909 return 0;
910 }
911 return -EINVAL;
912}
913
914#ifdef CONFIG_COMPAT
915static long lineevent_ioctl_compat(struct file *filep, unsigned int cmd,
916 unsigned long arg)
917{
918 return lineevent_ioctl(filep, cmd, (unsigned long)compat_ptr(arg));
919}
920#endif
921
922static const struct file_operations lineevent_fileops = {
923 .release = lineevent_release,
924 .read = lineevent_read,
925 .poll = lineevent_poll,
926 .owner = THIS_MODULE,
927 .llseek = noop_llseek,
928 .unlocked_ioctl = lineevent_ioctl,
929#ifdef CONFIG_COMPAT
930 .compat_ioctl = lineevent_ioctl_compat,
931#endif
932};
933
33265b17 934static irqreturn_t lineevent_irq_thread(int irq, void *p)
61f922db
LW
935{
936 struct lineevent_state *le = p;
937 struct gpioevent_data ge;
fa38869b 938 int ret;
61f922db 939
24bd3efc
LW
940 /* Do not leak kernel stack to userspace */
941 memset(&ge, 0, sizeof(ge));
942
1033be58
BG
943 /*
944 * We may be running from a nested threaded interrupt in which case
945 * we didn't get the timestamp from lineevent_irq_handler().
946 */
947 if (!le->timestamp)
948 ge.timestamp = ktime_get_real_ns();
949 else
950 ge.timestamp = le->timestamp;
61f922db 951
ad537b82
BG
952 if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE
953 && le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) {
fa38869b 954 int level = gpiod_get_value_cansleep(le->desc);
61f922db
LW
955 if (level)
956 /* Emit low-to-high event */
957 ge.id = GPIOEVENT_EVENT_RISING_EDGE;
958 else
959 /* Emit high-to-low event */
960 ge.id = GPIOEVENT_EVENT_FALLING_EDGE;
fa38869b 961 } else if (le->eflags & GPIOEVENT_REQUEST_RISING_EDGE) {
61f922db
LW
962 /* Emit low-to-high event */
963 ge.id = GPIOEVENT_EVENT_RISING_EDGE;
fa38869b 964 } else if (le->eflags & GPIOEVENT_REQUEST_FALLING_EDGE) {
61f922db
LW
965 /* Emit high-to-low event */
966 ge.id = GPIOEVENT_EVENT_FALLING_EDGE;
bc0207a5
AB
967 } else {
968 return IRQ_NONE;
61f922db
LW
969 }
970
971 ret = kfifo_put(&le->events, ge);
2efc6bfa 972 if (ret)
a9a08845 973 wake_up_poll(&le->wait, EPOLLIN);
61f922db
LW
974
975 return IRQ_HANDLED;
976}
977
d58f2bf2
LW
978static irqreturn_t lineevent_irq_handler(int irq, void *p)
979{
980 struct lineevent_state *le = p;
981
982 /*
983 * Just store the timestamp in hardirq context so we get it as
984 * close in time as possible to the actual event.
985 */
986 le->timestamp = ktime_get_real_ns();
987
988 return IRQ_WAKE_THREAD;
989}
990
61f922db
LW
991static int lineevent_create(struct gpio_device *gdev, void __user *ip)
992{
993 struct gpioevent_request eventreq;
994 struct lineevent_state *le;
995 struct gpio_desc *desc;
953b956a 996 struct file *file;
61f922db
LW
997 u32 offset;
998 u32 lflags;
999 u32 eflags;
1000 int fd;
1001 int ret;
1002 int irqflags = 0;
1003
1004 if (copy_from_user(&eventreq, ip, sizeof(eventreq)))
1005 return -EFAULT;
1006
bcc6d99a
BG
1007 offset = eventreq.lineoffset;
1008 lflags = eventreq.handleflags;
1009 eflags = eventreq.eventflags;
1010
45e23604
BG
1011 desc = gpiochip_get_desc(gdev->chip, offset);
1012 if (IS_ERR(desc))
1013 return PTR_ERR(desc);
bcc6d99a
BG
1014
1015 /* Return an error if a unknown flag is set */
1016 if ((lflags & ~GPIOHANDLE_REQUEST_VALID_FLAGS) ||
1017 (eflags & ~GPIOEVENT_REQUEST_VALID_FLAGS))
1018 return -EINVAL;
1019
1020 /* This is just wrong: we don't look for events on output lines */
1021 if ((lflags & GPIOHANDLE_REQUEST_OUTPUT) ||
1022 (lflags & GPIOHANDLE_REQUEST_OPEN_DRAIN) ||
1023 (lflags & GPIOHANDLE_REQUEST_OPEN_SOURCE))
1024 return -EINVAL;
1025
2148ad77
KG
1026 /* Only one bias flag can be set. */
1027 if (((lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE) &&
1028 (lflags & (GPIOHANDLE_REQUEST_BIAS_PULL_DOWN |
1029 GPIOHANDLE_REQUEST_BIAS_PULL_UP))) ||
1030 ((lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN) &&
1031 (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)))
1032 return -EINVAL;
1033
61f922db
LW
1034 le = kzalloc(sizeof(*le), GFP_KERNEL);
1035 if (!le)
1036 return -ENOMEM;
1037 le->gdev = gdev;
1038 get_device(&gdev->dev);
1039
1040 /* Make sure this is terminated */
1041 eventreq.consumer_label[sizeof(eventreq.consumer_label)-1] = '\0';
1042 if (strlen(eventreq.consumer_label)) {
1043 le->label = kstrdup(eventreq.consumer_label,
1044 GFP_KERNEL);
1045 if (!le->label) {
1046 ret = -ENOMEM;
1047 goto out_free_le;
1048 }
1049 }
1050
61f922db
LW
1051 ret = gpiod_request(desc, le->label);
1052 if (ret)
f001cc35 1053 goto out_free_label;
61f922db
LW
1054 le->desc = desc;
1055 le->eflags = eflags;
1056
1057 if (lflags & GPIOHANDLE_REQUEST_ACTIVE_LOW)
1058 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
2148ad77
KG
1059 if (lflags & GPIOHANDLE_REQUEST_BIAS_DISABLE)
1060 set_bit(FLAG_BIAS_DISABLE, &desc->flags);
7b479a84
KG
1061 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_DOWN)
1062 set_bit(FLAG_PULL_DOWN, &desc->flags);
1063 if (lflags & GPIOHANDLE_REQUEST_BIAS_PULL_UP)
1064 set_bit(FLAG_PULL_UP, &desc->flags);
61f922db
LW
1065
1066 ret = gpiod_direction_input(desc);
1067 if (ret)
1068 goto out_free_desc;
1069
1070 le->irq = gpiod_to_irq(desc);
1071 if (le->irq <= 0) {
1072 ret = -ENODEV;
1073 goto out_free_desc;
1074 }
1075
1076 if (eflags & GPIOEVENT_REQUEST_RISING_EDGE)
223ecaf1
MW
1077 irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
1078 IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING;
61f922db 1079 if (eflags & GPIOEVENT_REQUEST_FALLING_EDGE)
223ecaf1
MW
1080 irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
1081 IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING;
61f922db 1082 irqflags |= IRQF_ONESHOT;
61f922db
LW
1083
1084 INIT_KFIFO(le->events);
1085 init_waitqueue_head(&le->wait);
1086 mutex_init(&le->read_lock);
1087
1088 /* Request a thread to read the events */
1089 ret = request_threaded_irq(le->irq,
d58f2bf2 1090 lineevent_irq_handler,
61f922db
LW
1091 lineevent_irq_thread,
1092 irqflags,
1093 le->label,
1094 le);
1095 if (ret)
1096 goto out_free_desc;
1097
953b956a 1098 fd = get_unused_fd_flags(O_RDONLY | O_CLOEXEC);
61f922db
LW
1099 if (fd < 0) {
1100 ret = fd;
1101 goto out_free_irq;
1102 }
1103
953b956a
LPC
1104 file = anon_inode_getfile("gpio-event",
1105 &lineevent_fileops,
1106 le,
1107 O_RDONLY | O_CLOEXEC);
1108 if (IS_ERR(file)) {
1109 ret = PTR_ERR(file);
1110 goto out_put_unused_fd;
1111 }
1112
61f922db 1113 eventreq.fd = fd;
d932cd49 1114 if (copy_to_user(ip, &eventreq, sizeof(eventreq))) {
953b956a
LPC
1115 /*
1116 * fput() will trigger the release() callback, so do not go onto
1117 * the regular error cleanup path here.
1118 */
1119 fput(file);
1120 put_unused_fd(fd);
1121 return -EFAULT;
d932cd49 1122 }
61f922db 1123
953b956a
LPC
1124 fd_install(fd, file);
1125
61f922db
LW
1126 return 0;
1127
953b956a
LPC
1128out_put_unused_fd:
1129 put_unused_fd(fd);
61f922db
LW
1130out_free_irq:
1131 free_irq(le->irq, le);
1132out_free_desc:
1133 gpiod_free(le->desc);
1134out_free_label:
1135 kfree(le->label);
1136out_free_le:
1137 kfree(le);
1138 put_device(&gdev->dev);
1139 return ret;
1140}
1141
950d55f5 1142/*
3c702e99
LW
1143 * gpio_ioctl() - ioctl handler for the GPIO chardev
1144 */
1145static long gpio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
1146{
1147 struct gpio_device *gdev = filp->private_data;
1148 struct gpio_chip *chip = gdev->chip;
8b92e17e 1149 void __user *ip = (void __user *)arg;
3c702e99
LW
1150
1151 /* We fail any subsequent ioctl():s when the chip is gone */
1152 if (!chip)
1153 return -ENODEV;
1154
521a2ad6 1155 /* Fill in the struct and pass to userspace */
3c702e99 1156 if (cmd == GPIO_GET_CHIPINFO_IOCTL) {
521a2ad6
LW
1157 struct gpiochip_info chipinfo;
1158
0f4bbb23
LPC
1159 memset(&chipinfo, 0, sizeof(chipinfo));
1160
3c702e99
LW
1161 strncpy(chipinfo.name, dev_name(&gdev->dev),
1162 sizeof(chipinfo.name));
1163 chipinfo.name[sizeof(chipinfo.name)-1] = '\0';
df4878e9
LW
1164 strncpy(chipinfo.label, gdev->label,
1165 sizeof(chipinfo.label));
1166 chipinfo.label[sizeof(chipinfo.label)-1] = '\0';
fdeb8e15 1167 chipinfo.lines = gdev->ngpio;
3c702e99
LW
1168 if (copy_to_user(ip, &chipinfo, sizeof(chipinfo)))
1169 return -EFAULT;
1170 return 0;
521a2ad6
LW
1171 } else if (cmd == GPIO_GET_LINEINFO_IOCTL) {
1172 struct gpioline_info lineinfo;
1173 struct gpio_desc *desc;
1174
1175 if (copy_from_user(&lineinfo, ip, sizeof(lineinfo)))
1176 return -EFAULT;
521a2ad6 1177
2a2cabd8
BG
1178 desc = gpiochip_get_desc(chip, lineinfo.line_offset);
1179 if (IS_ERR(desc))
1180 return PTR_ERR(desc);
1181
521a2ad6
LW
1182 if (desc->name) {
1183 strncpy(lineinfo.name, desc->name,
1184 sizeof(lineinfo.name));
1185 lineinfo.name[sizeof(lineinfo.name)-1] = '\0';
1186 } else {
1187 lineinfo.name[0] = '\0';
1188 }
1189 if (desc->label) {
214338e3
LW
1190 strncpy(lineinfo.consumer, desc->label,
1191 sizeof(lineinfo.consumer));
1192 lineinfo.consumer[sizeof(lineinfo.consumer)-1] = '\0';
521a2ad6 1193 } else {
214338e3 1194 lineinfo.consumer[0] = '\0';
521a2ad6
LW
1195 }
1196
1197 /*
1198 * Userspace only need to know that the kernel is using
1199 * this GPIO so it can't use it.
1200 */
1201 lineinfo.flags = 0;
9d8cc89c
LW
1202 if (test_bit(FLAG_REQUESTED, &desc->flags) ||
1203 test_bit(FLAG_IS_HOGGED, &desc->flags) ||
1204 test_bit(FLAG_USED_AS_IRQ, &desc->flags) ||
1205 test_bit(FLAG_EXPORT, &desc->flags) ||
472a61e7
SW
1206 test_bit(FLAG_SYSFS, &desc->flags) ||
1207 !pinctrl_gpio_can_use_line(chip->base + lineinfo.line_offset))
521a2ad6 1208 lineinfo.flags |= GPIOLINE_FLAG_KERNEL;
9d8cc89c 1209 if (test_bit(FLAG_IS_OUT, &desc->flags))
521a2ad6 1210 lineinfo.flags |= GPIOLINE_FLAG_IS_OUT;
9d8cc89c 1211 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
521a2ad6 1212 lineinfo.flags |= GPIOLINE_FLAG_ACTIVE_LOW;
9d8cc89c 1213 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
2c60e6b5
BG
1214 lineinfo.flags |= (GPIOLINE_FLAG_OPEN_DRAIN |
1215 GPIOLINE_FLAG_IS_OUT);
9d8cc89c 1216 if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
2c60e6b5
BG
1217 lineinfo.flags |= (GPIOLINE_FLAG_OPEN_SOURCE |
1218 GPIOLINE_FLAG_IS_OUT);
2148ad77
KG
1219 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
1220 lineinfo.flags |= GPIOLINE_FLAG_BIAS_DISABLE;
9225d516
DF
1221 if (test_bit(FLAG_PULL_DOWN, &desc->flags))
1222 lineinfo.flags |= GPIOLINE_FLAG_BIAS_PULL_DOWN;
1223 if (test_bit(FLAG_PULL_UP, &desc->flags))
1224 lineinfo.flags |= GPIOLINE_FLAG_BIAS_PULL_UP;
521a2ad6
LW
1225
1226 if (copy_to_user(ip, &lineinfo, sizeof(lineinfo)))
1227 return -EFAULT;
1228 return 0;
d7c51b47
LW
1229 } else if (cmd == GPIO_GET_LINEHANDLE_IOCTL) {
1230 return linehandle_create(gdev, ip);
61f922db
LW
1231 } else if (cmd == GPIO_GET_LINEEVENT_IOCTL) {
1232 return lineevent_create(gdev, ip);
3c702e99
LW
1233 }
1234 return -EINVAL;
1235}
1236
8b92e17e
LW
1237#ifdef CONFIG_COMPAT
1238static long gpio_ioctl_compat(struct file *filp, unsigned int cmd,
1239 unsigned long arg)
1240{
1241 return gpio_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
1242}
1243#endif
1244
3c702e99
LW
1245/**
1246 * gpio_chrdev_open() - open the chardev for ioctl operations
1247 * @inode: inode for this chardev
1248 * @filp: file struct for storing private data
1249 * Returns 0 on success
1250 */
1251static int gpio_chrdev_open(struct inode *inode, struct file *filp)
1252{
1253 struct gpio_device *gdev = container_of(inode->i_cdev,
1254 struct gpio_device, chrdev);
1255
1256 /* Fail on open if the backing gpiochip is gone */
fb505747 1257 if (!gdev->chip)
3c702e99
LW
1258 return -ENODEV;
1259 get_device(&gdev->dev);
1260 filp->private_data = gdev;
f4e81c52
LPC
1261
1262 return nonseekable_open(inode, filp);
3c702e99
LW
1263}
1264
1265/**
1266 * gpio_chrdev_release() - close chardev after ioctl operations
1267 * @inode: inode for this chardev
1268 * @filp: file struct for storing private data
1269 * Returns 0 on success
1270 */
1271static int gpio_chrdev_release(struct inode *inode, struct file *filp)
1272{
1273 struct gpio_device *gdev = container_of(inode->i_cdev,
1274 struct gpio_device, chrdev);
1275
3c702e99
LW
1276 put_device(&gdev->dev);
1277 return 0;
1278}
1279
1280
1281static const struct file_operations gpio_fileops = {
1282 .release = gpio_chrdev_release,
1283 .open = gpio_chrdev_open,
1284 .owner = THIS_MODULE,
f4e81c52 1285 .llseek = no_llseek,
3c702e99 1286 .unlocked_ioctl = gpio_ioctl,
8b92e17e
LW
1287#ifdef CONFIG_COMPAT
1288 .compat_ioctl = gpio_ioctl_compat,
1289#endif
3c702e99
LW
1290};
1291
ff2b1359
LW
1292static void gpiodevice_release(struct device *dev)
1293{
1294 struct gpio_device *gdev = dev_get_drvdata(dev);
1295
1296 list_del(&gdev->list);
1297 ida_simple_remove(&gpio_ida, gdev->id);
fcf273e5 1298 kfree_const(gdev->label);
476e2fc5 1299 kfree(gdev->descs);
9efd9e69 1300 kfree(gdev);
ff2b1359
LW
1301}
1302
159f3cd9
GR
1303static int gpiochip_setup_dev(struct gpio_device *gdev)
1304{
d377f56f 1305 int ret;
159f3cd9
GR
1306
1307 cdev_init(&gdev->chrdev, &gpio_fileops);
1308 gdev->chrdev.owner = THIS_MODULE;
159f3cd9 1309 gdev->dev.devt = MKDEV(MAJOR(gpio_devt), gdev->id);
111379dc 1310
d377f56f
LW
1311 ret = cdev_device_add(&gdev->chrdev, &gdev->dev);
1312 if (ret)
1313 return ret;
111379dc
LG
1314
1315 chip_dbg(gdev->chip, "added GPIO chardev (%d:%d)\n",
1316 MAJOR(gpio_devt), gdev->id);
159f3cd9 1317
d377f56f
LW
1318 ret = gpiochip_sysfs_register(gdev);
1319 if (ret)
159f3cd9
GR
1320 goto err_remove_device;
1321
1322 /* From this point, the .release() function cleans up gpio_device */
1323 gdev->dev.release = gpiodevice_release;
159f3cd9
GR
1324 pr_debug("%s: registered GPIOs %d to %d on device: %s (%s)\n",
1325 __func__, gdev->base, gdev->base + gdev->ngpio - 1,
1326 dev_name(&gdev->dev), gdev->chip->label ? : "generic");
1327
1328 return 0;
1329
1330err_remove_device:
111379dc 1331 cdev_device_del(&gdev->chrdev, &gdev->dev);
d377f56f 1332 return ret;
159f3cd9
GR
1333}
1334
a411e81e
BG
1335static void gpiochip_machine_hog(struct gpio_chip *chip, struct gpiod_hog *hog)
1336{
1337 struct gpio_desc *desc;
1338 int rv;
1339
1340 desc = gpiochip_get_desc(chip, hog->chip_hwnum);
1341 if (IS_ERR(desc)) {
1342 pr_err("%s: unable to get GPIO desc: %ld\n",
1343 __func__, PTR_ERR(desc));
1344 return;
1345 }
1346
ba3efdff 1347 if (test_bit(FLAG_IS_HOGGED, &desc->flags))
a411e81e
BG
1348 return;
1349
1350 rv = gpiod_hog(desc, hog->line_name, hog->lflags, hog->dflags);
1351 if (rv)
1352 pr_err("%s: unable to hog GPIO line (%s:%u): %d\n",
1353 __func__, chip->label, hog->chip_hwnum, rv);
1354}
1355
1356static void machine_gpiochip_add(struct gpio_chip *chip)
1357{
1358 struct gpiod_hog *hog;
1359
1360 mutex_lock(&gpio_machine_hogs_mutex);
1361
1362 list_for_each_entry(hog, &gpio_machine_hogs, list) {
1363 if (!strcmp(chip->label, hog->chip_label))
1364 gpiochip_machine_hog(chip, hog);
1365 }
1366
1367 mutex_unlock(&gpio_machine_hogs_mutex);
1368}
1369
159f3cd9
GR
1370static void gpiochip_setup_devs(void)
1371{
1372 struct gpio_device *gdev;
d377f56f 1373 int ret;
159f3cd9
GR
1374
1375 list_for_each_entry(gdev, &gpio_devices, list) {
d377f56f
LW
1376 ret = gpiochip_setup_dev(gdev);
1377 if (ret)
159f3cd9 1378 pr_err("%s: Failed to initialize gpio device (%d)\n",
d377f56f 1379 dev_name(&gdev->dev), ret);
159f3cd9
GR
1380 }
1381}
1382
959bc7b2 1383int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data,
39c3fd58
AL
1384 struct lock_class_key *lock_key,
1385 struct lock_class_key *request_key)
d2876d08
DB
1386{
1387 unsigned long flags;
d377f56f 1388 int ret = 0;
ff2b1359 1389 unsigned i;
8d0aab2f 1390 int base = chip->base;
ff2b1359 1391 struct gpio_device *gdev;
d2876d08 1392
ff2b1359
LW
1393 /*
1394 * First: allocate and populate the internal stat container, and
1395 * set up the struct device.
1396 */
969f07b4 1397 gdev = kzalloc(sizeof(*gdev), GFP_KERNEL);
ff2b1359 1398 if (!gdev)
14e85c0e 1399 return -ENOMEM;
3c702e99 1400 gdev->dev.bus = &gpio_bus_type;
ff2b1359
LW
1401 gdev->chip = chip;
1402 chip->gpiodev = gdev;
1403 if (chip->parent) {
1404 gdev->dev.parent = chip->parent;
1405 gdev->dev.of_node = chip->parent->of_node;
acc6e331
TR
1406 }
1407
ff2b1359
LW
1408#ifdef CONFIG_OF_GPIO
1409 /* If the gpiochip has an assigned OF node this takes precedence */
acc6e331
TR
1410 if (chip->of_node)
1411 gdev->dev.of_node = chip->of_node;
6ff04974
BD
1412 else
1413 chip->of_node = gdev->dev.of_node;
ff2b1359 1414#endif
acc6e331 1415
ff2b1359
LW
1416 gdev->id = ida_simple_get(&gpio_ida, 0, 0, GFP_KERNEL);
1417 if (gdev->id < 0) {
d377f56f 1418 ret = gdev->id;
ff2b1359
LW
1419 goto err_free_gdev;
1420 }
ddd8891e 1421 dev_set_name(&gdev->dev, GPIOCHIP_NAME "%d", gdev->id);
ff2b1359
LW
1422 device_initialize(&gdev->dev);
1423 dev_set_drvdata(&gdev->dev, gdev);
1424 if (chip->parent && chip->parent->driver)
1425 gdev->owner = chip->parent->driver->owner;
1426 else if (chip->owner)
1427 /* TODO: remove chip->owner */
1428 gdev->owner = chip->owner;
1429 else
1430 gdev->owner = THIS_MODULE;
d2876d08 1431
476e2fc5 1432 gdev->descs = kcalloc(chip->ngpio, sizeof(gdev->descs[0]), GFP_KERNEL);
1c3cdb18 1433 if (!gdev->descs) {
d377f56f 1434 ret = -ENOMEM;
a05a1404 1435 goto err_free_ida;
ff2b1359
LW
1436 }
1437
5ed41cc4
BJZ
1438 if (chip->ngpio == 0) {
1439 chip_err(chip, "tried to insert a GPIO chip with zero lines\n");
d377f56f 1440 ret = -EINVAL;
159f3cd9 1441 goto err_free_descs;
5ed41cc4 1442 }
df4878e9 1443
3027743f
LA
1444 if (chip->ngpio > FASTPATH_NGPIO)
1445 chip_warn(chip, "line cnt %u is greater than fast path cnt %u\n",
2ddac5ae 1446 chip->ngpio, FASTPATH_NGPIO);
3027743f 1447
fcf273e5 1448 gdev->label = kstrdup_const(chip->label ?: "unknown", GFP_KERNEL);
df4878e9 1449 if (!gdev->label) {
d377f56f 1450 ret = -ENOMEM;
476e2fc5 1451 goto err_free_descs;
df4878e9
LW
1452 }
1453
fdeb8e15 1454 gdev->ngpio = chip->ngpio;
43c54eca 1455 gdev->data = data;
5ed41cc4 1456
d2876d08
DB
1457 spin_lock_irqsave(&gpio_lock, flags);
1458
fdeb8e15
LW
1459 /*
1460 * TODO: this allocates a Linux GPIO number base in the global
1461 * GPIO numberspace for this chip. In the long run we want to
1462 * get *rid* of this numberspace and use only descriptors, but
1463 * it may be a pipe dream. It will not happen before we get rid
1464 * of the sysfs interface anyways.
1465 */
8d0aab2f
AV
1466 if (base < 0) {
1467 base = gpiochip_find_base(chip->ngpio);
1468 if (base < 0) {
d377f56f 1469 ret = base;
225fce83 1470 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1471 goto err_free_label;
8d0aab2f 1472 }
fdeb8e15
LW
1473 /*
1474 * TODO: it should not be necessary to reflect the assigned
1475 * base outside of the GPIO subsystem. Go over drivers and
1476 * see if anyone makes use of this, else drop this and assign
1477 * a poison instead.
1478 */
8d0aab2f
AV
1479 chip->base = base;
1480 }
fdeb8e15 1481 gdev->base = base;
8d0aab2f 1482
d377f56f
LW
1483 ret = gpiodev_add_to_list(gdev);
1484 if (ret) {
05aa5203 1485 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1486 goto err_free_label;
05aa5203 1487 }
1a989d0f 1488
767cd17a
RRD
1489 for (i = 0; i < chip->ngpio; i++)
1490 gdev->descs[i].gdev = gdev;
14e85c0e 1491
207270dd
DC
1492 spin_unlock_irqrestore(&gpio_lock, flags);
1493
f23f1516 1494#ifdef CONFIG_PINCTRL
20ec3e39 1495 INIT_LIST_HEAD(&gdev->pin_ranges);
f23f1516
SH
1496#endif
1497
d377f56f
LW
1498 ret = gpiochip_set_desc_names(chip);
1499 if (ret)
5f3ca732
MP
1500 goto err_remove_from_list;
1501
d377f56f
LW
1502 ret = gpiochip_alloc_valid_mask(chip);
1503 if (ret)
48057ed1 1504 goto err_remove_from_list;
e0d89728 1505
d377f56f
LW
1506 ret = of_gpiochip_add(chip);
1507 if (ret)
48057ed1 1508 goto err_free_gpiochip_mask;
28355f81 1509
d377f56f
LW
1510 ret = gpiochip_init_valid_mask(chip);
1511 if (ret)
35779890 1512 goto err_remove_of_chip;
f8ec92a9 1513
3edfb7bd
RRD
1514 for (i = 0; i < chip->ngpio; i++) {
1515 struct gpio_desc *desc = &gdev->descs[i];
1516
d95da993 1517 if (chip->get_direction && gpiochip_line_is_valid(chip, i)) {
4fc5bfeb
AS
1518 assign_bit(FLAG_IS_OUT,
1519 &desc->flags, !chip->get_direction(chip, i));
d95da993 1520 } else {
4fc5bfeb
AS
1521 assign_bit(FLAG_IS_OUT,
1522 &desc->flags, !chip->direction_input);
d95da993 1523 }
3edfb7bd
RRD
1524 }
1525
b056ca1c
AS
1526 ret = gpiochip_add_pin_ranges(chip);
1527 if (ret)
1528 goto err_remove_of_chip;
1529
664e3e5a 1530 acpi_gpiochip_add(chip);
391c970c 1531
a411e81e
BG
1532 machine_gpiochip_add(chip);
1533
504369cd 1534 ret = gpiochip_irqchip_init_valid_mask(chip);
9411e3aa
AS
1535 if (ret)
1536 goto err_remove_acpi_chip;
1537
504369cd 1538 ret = gpiochip_irqchip_init_hw(chip);
fbdf8d4b 1539 if (ret)
48057ed1
LW
1540 goto err_remove_acpi_chip;
1541
fbdf8d4b
LW
1542 ret = gpiochip_add_irqchip(chip, lock_key, request_key);
1543 if (ret)
48057ed1
LW
1544 goto err_remove_irqchip_mask;
1545
3c702e99
LW
1546 /*
1547 * By first adding the chardev, and then adding the device,
1548 * we get a device node entry in sysfs under
1549 * /sys/bus/gpio/devices/gpiochipN/dev that can be used for
1550 * coldplug of device nodes and other udev business.
159f3cd9
GR
1551 * We can do this only if gpiolib has been initialized.
1552 * Otherwise, defer until later.
3c702e99 1553 */
159f3cd9 1554 if (gpiolib_initialized) {
d377f56f
LW
1555 ret = gpiochip_setup_dev(gdev);
1556 if (ret)
48057ed1 1557 goto err_remove_irqchip;
159f3cd9 1558 }
cedb1881 1559 return 0;
3bae4811 1560
48057ed1
LW
1561err_remove_irqchip:
1562 gpiochip_irqchip_remove(chip);
1563err_remove_irqchip_mask:
1564 gpiochip_irqchip_free_valid_mask(chip);
35779890 1565err_remove_acpi_chip:
225fce83 1566 acpi_gpiochip_remove(chip);
35779890 1567err_remove_of_chip:
6d86750c 1568 gpiochip_free_hogs(chip);
225fce83 1569 of_gpiochip_remove(chip);
35779890 1570err_free_gpiochip_mask:
2f4133bb 1571 gpiochip_remove_pin_ranges(chip);
726cb3ba 1572 gpiochip_free_valid_mask(chip);
5f3ca732 1573err_remove_from_list:
225fce83 1574 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1575 list_del(&gdev->list);
3bae4811 1576 spin_unlock_irqrestore(&gpio_lock, flags);
476e2fc5 1577err_free_label:
fcf273e5 1578 kfree_const(gdev->label);
476e2fc5
GR
1579err_free_descs:
1580 kfree(gdev->descs);
a05a1404 1581err_free_ida:
ff2b1359 1582 ida_simple_remove(&gpio_ida, gdev->id);
a05a1404 1583err_free_gdev:
d2876d08 1584 /* failures here can mean systems won't boot... */
1777fc97 1585 pr_err("%s: GPIOs %d..%d (%s) failed to register, %d\n", __func__,
fdeb8e15 1586 gdev->base, gdev->base + gdev->ngpio - 1,
d377f56f 1587 chip->label ? : "generic", ret);
fdeb8e15 1588 kfree(gdev);
d377f56f 1589 return ret;
d2876d08 1590}
959bc7b2 1591EXPORT_SYMBOL_GPL(gpiochip_add_data_with_key);
d2876d08 1592
43c54eca
LW
1593/**
1594 * gpiochip_get_data() - get per-subdriver data for the chip
950d55f5
TR
1595 * @chip: GPIO chip
1596 *
1597 * Returns:
1598 * The per-subdriver data for the chip.
43c54eca
LW
1599 */
1600void *gpiochip_get_data(struct gpio_chip *chip)
1601{
1602 return chip->gpiodev->data;
1603}
1604EXPORT_SYMBOL_GPL(gpiochip_get_data);
1605
d2876d08
DB
1606/**
1607 * gpiochip_remove() - unregister a gpio_chip
1608 * @chip: the chip to unregister
1609 *
1610 * A gpio_chip with any GPIOs still requested may not be removed.
1611 */
e1db1706 1612void gpiochip_remove(struct gpio_chip *chip)
d2876d08 1613{
ff2b1359 1614 struct gpio_device *gdev = chip->gpiodev;
fab28b89 1615 struct gpio_desc *desc;
d2876d08 1616 unsigned long flags;
1c3cdb18 1617 unsigned i;
fab28b89 1618 bool requested = false;
d2876d08 1619
ff2b1359 1620 /* FIXME: should the legacy sysfs handling be moved to gpio_device? */
afbc4f31 1621 gpiochip_sysfs_unregister(gdev);
5018ada6 1622 gpiochip_free_hogs(chip);
bd203bd5
BJZ
1623 /* Numb the device, cancelling all outstanding operations */
1624 gdev->chip = NULL;
00acc3dc 1625 gpiochip_irqchip_remove(chip);
6072b9dc 1626 acpi_gpiochip_remove(chip);
391c970c 1627 of_gpiochip_remove(chip);
2f4133bb 1628 gpiochip_remove_pin_ranges(chip);
726cb3ba 1629 gpiochip_free_valid_mask(chip);
43c54eca
LW
1630 /*
1631 * We accept no more calls into the driver from this point, so
1632 * NULL the driver data pointer
1633 */
1634 gdev->data = NULL;
391c970c 1635
6798acaa 1636 spin_lock_irqsave(&gpio_lock, flags);
fdeb8e15 1637 for (i = 0; i < gdev->ngpio; i++) {
1c3cdb18 1638 desc = &gdev->descs[i];
fab28b89
JH
1639 if (test_bit(FLAG_REQUESTED, &desc->flags))
1640 requested = true;
d2876d08 1641 }
d2876d08 1642 spin_unlock_irqrestore(&gpio_lock, flags);
14e85c0e 1643
fab28b89 1644 if (requested)
fdeb8e15 1645 dev_crit(&gdev->dev,
58383c78 1646 "REMOVING GPIOCHIP WITH GPIOS STILL REQUESTED\n");
fab28b89 1647
ff2b1359
LW
1648 /*
1649 * The gpiochip side puts its use of the device to rest here:
1650 * if there are no userspace clients, the chardev and device will
1651 * be removed, else it will be dangling until the last user is
1652 * gone.
1653 */
111379dc 1654 cdev_device_del(&gdev->chrdev, &gdev->dev);
ff2b1359 1655 put_device(&gdev->dev);
d2876d08
DB
1656}
1657EXPORT_SYMBOL_GPL(gpiochip_remove);
1658
0cf3292c
LD
1659static void devm_gpio_chip_release(struct device *dev, void *res)
1660{
1661 struct gpio_chip *chip = *(struct gpio_chip **)res;
1662
1663 gpiochip_remove(chip);
1664}
1665
0cf3292c 1666/**
51158416 1667 * devm_gpiochip_add_data() - Resource managed gpiochip_add_data()
3925b90f 1668 * @dev: pointer to the device that gpio_chip belongs to.
0cf3292c 1669 * @chip: the chip to register, with chip->base initialized
950d55f5 1670 * @data: driver-private data associated with this chip
0cf3292c 1671 *
950d55f5 1672 * Context: potentially before irqs will work
0cf3292c
LD
1673 *
1674 * The gpio chip automatically be released when the device is unbound.
950d55f5
TR
1675 *
1676 * Returns:
1677 * A negative errno if the chip can't be registered, such as because the
1678 * chip->base is invalid or already associated with a different chip.
1679 * Otherwise it returns zero as a success code.
0cf3292c
LD
1680 */
1681int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip,
1682 void *data)
1683{
1684 struct gpio_chip **ptr;
1685 int ret;
1686
1687 ptr = devres_alloc(devm_gpio_chip_release, sizeof(*ptr),
1688 GFP_KERNEL);
1689 if (!ptr)
1690 return -ENOMEM;
1691
1692 ret = gpiochip_add_data(chip, data);
1693 if (ret < 0) {
1694 devres_free(ptr);
1695 return ret;
1696 }
1697
1698 *ptr = chip;
1699 devres_add(dev, ptr);
1700
1701 return 0;
1702}
1703EXPORT_SYMBOL_GPL(devm_gpiochip_add_data);
1704
594fa265
GL
1705/**
1706 * gpiochip_find() - iterator for locating a specific gpio_chip
1707 * @data: data to pass to match function
950d55f5 1708 * @match: Callback function to check gpio_chip
594fa265
GL
1709 *
1710 * Similar to bus_find_device. It returns a reference to a gpio_chip as
1711 * determined by a user supplied @match callback. The callback should return
1712 * 0 if the device doesn't match and non-zero if it does. If the callback is
1713 * non-zero, this function will return to the caller and not iterate over any
1714 * more gpio_chips.
1715 */
07ce8ec7 1716struct gpio_chip *gpiochip_find(void *data,
6e2cf651 1717 int (*match)(struct gpio_chip *chip,
3d0f7cf0 1718 void *data))
594fa265 1719{
ff2b1359 1720 struct gpio_device *gdev;
acf06ff7 1721 struct gpio_chip *chip = NULL;
594fa265 1722 unsigned long flags;
594fa265
GL
1723
1724 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 1725 list_for_each_entry(gdev, &gpio_devices, list)
acf06ff7
MY
1726 if (gdev->chip && match(gdev->chip, data)) {
1727 chip = gdev->chip;
594fa265 1728 break;
acf06ff7 1729 }
ff2b1359 1730
594fa265
GL
1731 spin_unlock_irqrestore(&gpio_lock, flags);
1732
1733 return chip;
1734}
8fa0c9bf 1735EXPORT_SYMBOL_GPL(gpiochip_find);
d2876d08 1736
79697ef9
AC
1737static int gpiochip_match_name(struct gpio_chip *chip, void *data)
1738{
1739 const char *name = data;
1740
1741 return !strcmp(chip->label, name);
1742}
1743
1744static struct gpio_chip *find_chip_by_name(const char *name)
1745{
1746 return gpiochip_find((void *)name, gpiochip_match_name);
1747}
1748
14250520
LW
1749#ifdef CONFIG_GPIOLIB_IRQCHIP
1750
1751/*
1752 * The following is irqchip helper code for gpiochips.
1753 */
1754
9411e3aa
AS
1755static int gpiochip_irqchip_init_hw(struct gpio_chip *gc)
1756{
1757 struct gpio_irq_chip *girq = &gc->irq;
1758
1759 if (!girq->init_hw)
1760 return 0;
1761
1762 return girq->init_hw(gc);
1763}
1764
5fbe5b58 1765static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc)
79b804cb 1766{
5fbe5b58
LW
1767 struct gpio_irq_chip *girq = &gc->irq;
1768
1769 if (!girq->init_valid_mask)
79b804cb
MW
1770 return 0;
1771
5fbe5b58
LW
1772 girq->valid_mask = gpiochip_allocate_mask(gc);
1773 if (!girq->valid_mask)
79b804cb
MW
1774 return -ENOMEM;
1775
5fbe5b58
LW
1776 girq->init_valid_mask(gc, girq->valid_mask, gc->ngpio);
1777
79b804cb
MW
1778 return 0;
1779}
1780
1781static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip)
1782{
7bdbd1ec 1783 bitmap_free(gpiochip->irq.valid_mask);
dc7b0387 1784 gpiochip->irq.valid_mask = NULL;
79b804cb
MW
1785}
1786
64ff2c8e
SB
1787bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gpiochip,
1788 unsigned int offset)
79b804cb 1789{
726cb3ba
SB
1790 if (!gpiochip_line_is_valid(gpiochip, offset))
1791 return false;
79b804cb 1792 /* No mask means all valid */
dc7b0387 1793 if (likely(!gpiochip->irq.valid_mask))
79b804cb 1794 return true;
dc7b0387 1795 return test_bit(offset, gpiochip->irq.valid_mask);
79b804cb 1796}
64ff2c8e 1797EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
79b804cb 1798
14250520 1799/**
d245b3f9 1800 * gpiochip_set_cascaded_irqchip() - connects a cascaded irqchip to a gpiochip
4892d3a6 1801 * @gc: the gpiochip to set the irqchip chain to
14250520 1802 * @parent_irq: the irq number corresponding to the parent IRQ for this
72780ce5 1803 * cascaded irqchip
14250520 1804 * @parent_handler: the parent interrupt handler for the accumulated IRQ
3f97d5fc
LW
1805 * coming out of the gpiochip. If the interrupt is nested rather than
1806 * cascaded, pass NULL in this handler argument
14250520 1807 */
4892d3a6 1808static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gc,
6f79309a 1809 unsigned int parent_irq,
d245b3f9 1810 irq_flow_handler_t parent_handler)
14250520 1811{
4892d3a6
LW
1812 struct gpio_irq_chip *girq = &gc->irq;
1813 struct device *dev = &gc->gpiodev->dev;
1814
1815 if (!girq->domain) {
1816 chip_err(gc, "called %s before setting up irqchip\n",
83141a77 1817 __func__);
1c8732bb
LW
1818 return;
1819 }
1820
3f97d5fc 1821 if (parent_handler) {
4892d3a6
LW
1822 if (gc->can_sleep) {
1823 chip_err(gc,
b1911710 1824 "you cannot have chained interrupts on a chip that may sleep\n");
3f97d5fc
LW
1825 return;
1826 }
4892d3a6
LW
1827 girq->parents = devm_kcalloc(dev, 1,
1828 sizeof(*girq->parents),
1829 GFP_KERNEL);
1830 if (!girq->parents) {
1831 chip_err(gc, "out of memory allocating parent IRQ\n");
1832 return;
1833 }
1834 girq->parents[0] = parent_irq;
1835 girq->num_parents = 1;
3f97d5fc
LW
1836 /*
1837 * The parent irqchip is already using the chip_data for this
1838 * irqchip, so our callbacks simply use the handler_data.
1839 */
f7f87753 1840 irq_set_chained_handler_and_data(parent_irq, parent_handler,
4892d3a6 1841 gc);
3f97d5fc 1842 }
14250520 1843}
d245b3f9 1844
d245b3f9
LW
1845/**
1846 * gpiochip_set_nested_irqchip() - connects a nested irqchip to a gpiochip
1847 * @gpiochip: the gpiochip to set the irqchip nested handler to
1848 * @irqchip: the irqchip to nest to the gpiochip
1849 * @parent_irq: the irq number corresponding to the parent IRQ for this
1850 * nested irqchip
1851 */
1852void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip,
1853 struct irq_chip *irqchip,
6f79309a 1854 unsigned int parent_irq)
d245b3f9 1855{
3c1f6b2d 1856 gpiochip_set_cascaded_irqchip(gpiochip, parent_irq, NULL);
d245b3f9
LW
1857}
1858EXPORT_SYMBOL_GPL(gpiochip_set_nested_irqchip);
1859
fdd61a01
LW
1860#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1861
1862/**
1863 * gpiochip_set_hierarchical_irqchip() - connects a hierarchical irqchip
1864 * to a gpiochip
1865 * @gc: the gpiochip to set the irqchip hierarchical handler to
1866 * @irqchip: the irqchip to handle this level of the hierarchy, the interrupt
1867 * will then percolate up to the parent
1868 */
1869static void gpiochip_set_hierarchical_irqchip(struct gpio_chip *gc,
1870 struct irq_chip *irqchip)
1871{
1872 /* DT will deal with mapping each IRQ as we go along */
1873 if (is_of_node(gc->irq.fwnode))
1874 return;
1875
1876 /*
1877 * This is for legacy and boardfile "irqchip" fwnodes: allocate
1878 * irqs upfront instead of dynamically since we don't have the
1879 * dynamic type of allocation that hardware description languages
1880 * provide. Once all GPIO drivers using board files are gone from
1881 * the kernel we can delete this code, but for a transitional period
1882 * it is necessary to keep this around.
1883 */
1884 if (is_fwnode_irqchip(gc->irq.fwnode)) {
1885 int i;
1886 int ret;
1887
1888 for (i = 0; i < gc->ngpio; i++) {
1889 struct irq_fwspec fwspec;
1890 unsigned int parent_hwirq;
1891 unsigned int parent_type;
1892 struct gpio_irq_chip *girq = &gc->irq;
1893
1894 /*
1895 * We call the child to parent translation function
1896 * only to check if the child IRQ is valid or not.
1897 * Just pick the rising edge type here as that is what
1898 * we likely need to support.
1899 */
1900 ret = girq->child_to_parent_hwirq(gc, i,
1901 IRQ_TYPE_EDGE_RISING,
1902 &parent_hwirq,
1903 &parent_type);
1904 if (ret) {
1905 chip_err(gc, "skip set-up on hwirq %d\n",
1906 i);
1907 continue;
1908 }
1909
1910 fwspec.fwnode = gc->irq.fwnode;
1911 /* This is the hwirq for the GPIO line side of things */
1912 fwspec.param[0] = girq->child_offset_to_irq(gc, i);
1913 /* Just pick something */
1914 fwspec.param[1] = IRQ_TYPE_EDGE_RISING;
1915 fwspec.param_count = 2;
1916 ret = __irq_domain_alloc_irqs(gc->irq.domain,
1917 /* just pick something */
1918 -1,
1919 1,
1920 NUMA_NO_NODE,
1921 &fwspec,
1922 false,
1923 NULL);
1924 if (ret < 0) {
1925 chip_err(gc,
1926 "can not allocate irq for GPIO line %d parent hwirq %d in hierarchy domain: %d\n",
1927 i, parent_hwirq,
1928 ret);
1929 }
1930 }
1931 }
1932
1933 chip_err(gc, "%s unknown fwnode type proceed anyway\n", __func__);
1934
1935 return;
1936}
1937
1938static int gpiochip_hierarchy_irq_domain_translate(struct irq_domain *d,
1939 struct irq_fwspec *fwspec,
1940 unsigned long *hwirq,
1941 unsigned int *type)
1942{
1943 /* We support standard DT translation */
1944 if (is_of_node(fwspec->fwnode) && fwspec->param_count == 2) {
1945 return irq_domain_translate_twocell(d, fwspec, hwirq, type);
1946 }
1947
1948 /* This is for board files and others not using DT */
1949 if (is_fwnode_irqchip(fwspec->fwnode)) {
1950 int ret;
1951
1952 ret = irq_domain_translate_twocell(d, fwspec, hwirq, type);
1953 if (ret)
1954 return ret;
1955 WARN_ON(*type == IRQ_TYPE_NONE);
1956 return 0;
1957 }
1958 return -EINVAL;
1959}
1960
1961static int gpiochip_hierarchy_irq_domain_alloc(struct irq_domain *d,
1962 unsigned int irq,
1963 unsigned int nr_irqs,
1964 void *data)
1965{
1966 struct gpio_chip *gc = d->host_data;
1967 irq_hw_number_t hwirq;
1968 unsigned int type = IRQ_TYPE_NONE;
1969 struct irq_fwspec *fwspec = data;
24258761 1970 void *parent_arg;
fdd61a01
LW
1971 unsigned int parent_hwirq;
1972 unsigned int parent_type;
1973 struct gpio_irq_chip *girq = &gc->irq;
1974 int ret;
1975
1976 /*
1977 * The nr_irqs parameter is always one except for PCI multi-MSI
1978 * so this should not happen.
1979 */
1980 WARN_ON(nr_irqs != 1);
1981
1982 ret = gc->irq.child_irq_domain_ops.translate(d, fwspec, &hwirq, &type);
1983 if (ret)
1984 return ret;
1985
366950ee 1986 chip_dbg(gc, "allocate IRQ %d, hwirq %lu\n", irq, hwirq);
fdd61a01
LW
1987
1988 ret = girq->child_to_parent_hwirq(gc, hwirq, type,
1989 &parent_hwirq, &parent_type);
1990 if (ret) {
1991 chip_err(gc, "can't look up hwirq %lu\n", hwirq);
1992 return ret;
1993 }
366950ee 1994 chip_dbg(gc, "found parent hwirq %u\n", parent_hwirq);
fdd61a01
LW
1995
1996 /*
1997 * We set handle_bad_irq because the .set_type() should
1998 * always be invoked and set the right type of handler.
1999 */
2000 irq_domain_set_info(d,
2001 irq,
2002 hwirq,
2003 gc->irq.chip,
2004 gc,
2005 girq->handler,
2006 NULL, NULL);
2007 irq_set_probe(irq);
2008
fdd61a01 2009 /* This parent only handles asserted level IRQs */
24258761
KH
2010 parent_arg = girq->populate_parent_alloc_arg(gc, parent_hwirq, parent_type);
2011 if (!parent_arg)
2012 return -ENOMEM;
2013
366950ee 2014 chip_dbg(gc, "alloc_irqs_parent for %d parent hwirq %d\n",
fdd61a01 2015 irq, parent_hwirq);
c34f6dc8 2016 irq_set_lockdep_class(irq, gc->irq.lock_key, gc->irq.request_key);
24258761 2017 ret = irq_domain_alloc_irqs_parent(d, irq, 1, parent_arg);
880b7cf2
KH
2018 /*
2019 * If the parent irqdomain is msi, the interrupts have already
2020 * been allocated, so the EEXIST is good.
2021 */
2022 if (irq_domain_is_msi(d->parent) && (ret == -EEXIST))
2023 ret = 0;
fdd61a01
LW
2024 if (ret)
2025 chip_err(gc,
2026 "failed to allocate parent hwirq %d for hwirq %lu\n",
2027 parent_hwirq, hwirq);
2028
24258761 2029 kfree(parent_arg);
fdd61a01
LW
2030 return ret;
2031}
2032
2033static unsigned int gpiochip_child_offset_to_irq_noop(struct gpio_chip *chip,
2034 unsigned int offset)
2035{
2036 return offset;
2037}
2038
2039static void gpiochip_hierarchy_setup_domain_ops(struct irq_domain_ops *ops)
2040{
2041 ops->activate = gpiochip_irq_domain_activate;
2042 ops->deactivate = gpiochip_irq_domain_deactivate;
2043 ops->alloc = gpiochip_hierarchy_irq_domain_alloc;
2044 ops->free = irq_domain_free_irqs_common;
2045
2046 /*
2047 * We only allow overriding the translate() function for
2048 * hierarchical chips, and this should only be done if the user
2049 * really need something other than 1:1 translation.
2050 */
2051 if (!ops->translate)
2052 ops->translate = gpiochip_hierarchy_irq_domain_translate;
2053}
2054
2055static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
2056{
2057 if (!gc->irq.child_to_parent_hwirq ||
2058 !gc->irq.fwnode) {
2059 chip_err(gc, "missing irqdomain vital data\n");
2060 return -EINVAL;
2061 }
2062
2063 if (!gc->irq.child_offset_to_irq)
2064 gc->irq.child_offset_to_irq = gpiochip_child_offset_to_irq_noop;
2065
24258761
KH
2066 if (!gc->irq.populate_parent_alloc_arg)
2067 gc->irq.populate_parent_alloc_arg =
fdd61a01
LW
2068 gpiochip_populate_parent_fwspec_twocell;
2069
2070 gpiochip_hierarchy_setup_domain_ops(&gc->irq.child_irq_domain_ops);
2071
2072 gc->irq.domain = irq_domain_create_hierarchy(
2073 gc->irq.parent_domain,
2074 0,
2075 gc->ngpio,
2076 gc->irq.fwnode,
2077 &gc->irq.child_irq_domain_ops,
2078 gc);
2079
2080 if (!gc->irq.domain)
2081 return -ENOMEM;
2082
2083 gpiochip_set_hierarchical_irqchip(gc, gc->irq.chip);
2084
2085 return 0;
2086}
2087
2088static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
2089{
2090 return !!gc->irq.parent_domain;
2091}
2092
24258761 2093void *gpiochip_populate_parent_fwspec_twocell(struct gpio_chip *chip,
fdd61a01
LW
2094 unsigned int parent_hwirq,
2095 unsigned int parent_type)
2096{
24258761
KH
2097 struct irq_fwspec *fwspec;
2098
2099 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
2100 if (!fwspec)
2101 return NULL;
2102
2103 fwspec->fwnode = chip->irq.parent_domain->fwnode;
fdd61a01
LW
2104 fwspec->param_count = 2;
2105 fwspec->param[0] = parent_hwirq;
2106 fwspec->param[1] = parent_type;
24258761
KH
2107
2108 return fwspec;
fdd61a01
LW
2109}
2110EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_twocell);
2111
24258761 2112void *gpiochip_populate_parent_fwspec_fourcell(struct gpio_chip *chip,
fdd61a01
LW
2113 unsigned int parent_hwirq,
2114 unsigned int parent_type)
2115{
24258761
KH
2116 struct irq_fwspec *fwspec;
2117
2118 fwspec = kmalloc(sizeof(*fwspec), GFP_KERNEL);
2119 if (!fwspec)
2120 return NULL;
2121
2122 fwspec->fwnode = chip->irq.parent_domain->fwnode;
fdd61a01
LW
2123 fwspec->param_count = 4;
2124 fwspec->param[0] = 0;
2125 fwspec->param[1] = parent_hwirq;
2126 fwspec->param[2] = 0;
2127 fwspec->param[3] = parent_type;
24258761
KH
2128
2129 return fwspec;
fdd61a01
LW
2130}
2131EXPORT_SYMBOL_GPL(gpiochip_populate_parent_fwspec_fourcell);
2132
2133#else
2134
2135static int gpiochip_hierarchy_add_domain(struct gpio_chip *gc)
2136{
2137 return -EINVAL;
2138}
2139
2140static bool gpiochip_hierarchy_is_hierarchical(struct gpio_chip *gc)
2141{
2142 return false;
2143}
2144
2145#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
2146
14250520
LW
2147/**
2148 * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip
2149 * @d: the irqdomain used by this irqchip
2150 * @irq: the global irq number used by this GPIO irqchip irq
2151 * @hwirq: the local IRQ/GPIO line offset on this gpiochip
2152 *
2153 * This function will set up the mapping for a certain IRQ line on a
2154 * gpiochip by assigning the gpiochip as chip data, and using the irqchip
2155 * stored inside the gpiochip.
2156 */
1b95b4eb
TR
2157int gpiochip_irq_map(struct irq_domain *d, unsigned int irq,
2158 irq_hw_number_t hwirq)
14250520
LW
2159{
2160 struct gpio_chip *chip = d->host_data;
d377f56f 2161 int ret = 0;
14250520 2162
dc749a09
GS
2163 if (!gpiochip_irqchip_irq_valid(chip, hwirq))
2164 return -ENXIO;
2165
14250520 2166 irq_set_chip_data(irq, chip);
a0a8bcf4
GS
2167 /*
2168 * This lock class tells lockdep that GPIO irqs are in a different
2169 * category than their parents, so it won't report false recursion.
2170 */
39c3fd58 2171 irq_set_lockdep_class(irq, chip->irq.lock_key, chip->irq.request_key);
c7a0aa59 2172 irq_set_chip_and_handler(irq, chip->irq.chip, chip->irq.handler);
d245b3f9 2173 /* Chips that use nested thread handlers have them marked */
60ed54ca 2174 if (chip->irq.threaded)
1c8732bb 2175 irq_set_nested_thread(irq, 1);
14250520 2176 irq_set_noprobe(irq);
23393d49 2177
e0d89728 2178 if (chip->irq.num_parents == 1)
d377f56f 2179 ret = irq_set_parent(irq, chip->irq.parents[0]);
e0d89728 2180 else if (chip->irq.map)
d377f56f 2181 ret = irq_set_parent(irq, chip->irq.map[hwirq]);
e0d89728 2182
d377f56f
LW
2183 if (ret < 0)
2184 return ret;
e0d89728 2185
1333b90f
LW
2186 /*
2187 * No set-up of the hardware will happen if IRQ_TYPE_NONE
2188 * is passed as default type.
2189 */
3634eeb0
TR
2190 if (chip->irq.default_type != IRQ_TYPE_NONE)
2191 irq_set_irq_type(irq, chip->irq.default_type);
14250520
LW
2192
2193 return 0;
2194}
1b95b4eb 2195EXPORT_SYMBOL_GPL(gpiochip_irq_map);
14250520 2196
1b95b4eb 2197void gpiochip_irq_unmap(struct irq_domain *d, unsigned int irq)
c3626fde 2198{
1c8732bb
LW
2199 struct gpio_chip *chip = d->host_data;
2200
60ed54ca 2201 if (chip->irq.threaded)
1c8732bb 2202 irq_set_nested_thread(irq, 0);
c3626fde
LW
2203 irq_set_chip_and_handler(irq, NULL, NULL);
2204 irq_set_chip_data(irq, NULL);
2205}
1b95b4eb 2206EXPORT_SYMBOL_GPL(gpiochip_irq_unmap);
c3626fde 2207
14250520
LW
2208static const struct irq_domain_ops gpiochip_domain_ops = {
2209 .map = gpiochip_irq_map,
c3626fde 2210 .unmap = gpiochip_irq_unmap,
14250520
LW
2211 /* Virtually all GPIO irqchips are twocell:ed */
2212 .xlate = irq_domain_xlate_twocell,
2213};
2214
fdd61a01
LW
2215/*
2216 * TODO: move these activate/deactivate in under the hierarchicial
2217 * irqchip implementation as static once SPMI and SSBI (all external
2218 * users) are phased over.
2219 */
ef74f70e
BM
2220/**
2221 * gpiochip_irq_domain_activate() - Lock a GPIO to be used as an IRQ
2222 * @domain: The IRQ domain used by this IRQ chip
2223 * @data: Outermost irq_data associated with the IRQ
2224 * @reserve: If set, only reserve an interrupt vector instead of assigning one
2225 *
2226 * This function is a wrapper that calls gpiochip_lock_as_irq() and is to be
2227 * used as the activate function for the &struct irq_domain_ops. The host_data
2228 * for the IRQ domain must be the &struct gpio_chip.
2229 */
2230int gpiochip_irq_domain_activate(struct irq_domain *domain,
2231 struct irq_data *data, bool reserve)
2232{
2233 struct gpio_chip *chip = domain->host_data;
2234
2235 return gpiochip_lock_as_irq(chip, data->hwirq);
2236}
2237EXPORT_SYMBOL_GPL(gpiochip_irq_domain_activate);
2238
2239/**
2240 * gpiochip_irq_domain_deactivate() - Unlock a GPIO used as an IRQ
2241 * @domain: The IRQ domain used by this IRQ chip
2242 * @data: Outermost irq_data associated with the IRQ
2243 *
2244 * This function is a wrapper that will call gpiochip_unlock_as_irq() and is to
2245 * be used as the deactivate function for the &struct irq_domain_ops. The
2246 * host_data for the IRQ domain must be the &struct gpio_chip.
2247 */
2248void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
2249 struct irq_data *data)
2250{
2251 struct gpio_chip *chip = domain->host_data;
2252
2253 return gpiochip_unlock_as_irq(chip, data->hwirq);
2254}
2255EXPORT_SYMBOL_GPL(gpiochip_irq_domain_deactivate);
2256
4e6b8238 2257static int gpiochip_to_irq(struct gpio_chip *chip, unsigned offset)
14250520 2258{
fdd61a01
LW
2259 struct irq_domain *domain = chip->irq.domain;
2260
4e6b8238
HV
2261 if (!gpiochip_irqchip_irq_valid(chip, offset))
2262 return -ENXIO;
5b76e79c 2263
fdd61a01
LW
2264#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2265 if (irq_domain_is_hierarchy(domain)) {
2266 struct irq_fwspec spec;
2267
2268 spec.fwnode = domain->fwnode;
2269 spec.param_count = 2;
2270 spec.param[0] = chip->irq.child_offset_to_irq(chip, offset);
2271 spec.param[1] = IRQ_TYPE_NONE;
2272
2273 return irq_create_fwspec_mapping(&spec);
2274 }
2275#endif
2276
2277 return irq_create_mapping(domain, offset);
14250520
LW
2278}
2279
14250520
LW
2280static int gpiochip_irq_reqres(struct irq_data *d)
2281{
2282 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
5b76e79c 2283
4e6b8238 2284 return gpiochip_reqres_irq(chip, d->hwirq);
14250520
LW
2285}
2286
2287static void gpiochip_irq_relres(struct irq_data *d)
2288{
2289 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
2290
4e6b8238 2291 gpiochip_relres_irq(chip, d->hwirq);
14250520
LW
2292}
2293
461c1a7d 2294static void gpiochip_irq_enable(struct irq_data *d)
14250520 2295{
461c1a7d 2296 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
e0d89728 2297
461c1a7d
HV
2298 gpiochip_enable_irq(chip, d->hwirq);
2299 if (chip->irq.irq_enable)
2300 chip->irq.irq_enable(d);
2301 else
2302 chip->irq.chip->irq_unmask(d);
2303}
2304
2305static void gpiochip_irq_disable(struct irq_data *d)
2306{
2307 struct gpio_chip *chip = irq_data_get_irq_chip_data(d);
2308
2309 if (chip->irq.irq_disable)
2310 chip->irq.irq_disable(d);
2311 else
2312 chip->irq.chip->irq_mask(d);
2313 gpiochip_disable_irq(chip, d->hwirq);
2314}
2315
ca620f2d
HV
2316static void gpiochip_set_irq_hooks(struct gpio_chip *gpiochip)
2317{
2318 struct irq_chip *irqchip = gpiochip->irq.chip;
2319
2320 if (!irqchip->irq_request_resources &&
2321 !irqchip->irq_release_resources) {
2322 irqchip->irq_request_resources = gpiochip_irq_reqres;
2323 irqchip->irq_release_resources = gpiochip_irq_relres;
2324 }
461c1a7d
HV
2325 if (WARN_ON(gpiochip->irq.irq_enable))
2326 return;
171948ea
HV
2327 /* Check if the irqchip already has this hook... */
2328 if (irqchip->irq_enable == gpiochip_irq_enable) {
2329 /*
2330 * ...and if so, give a gentle warning that this is bad
2331 * practice.
2332 */
2333 chip_info(gpiochip,
2334 "detected irqchip that is shared with multiple gpiochips: please fix the driver.\n");
2335 return;
2336 }
461c1a7d
HV
2337 gpiochip->irq.irq_enable = irqchip->irq_enable;
2338 gpiochip->irq.irq_disable = irqchip->irq_disable;
2339 irqchip->irq_enable = gpiochip_irq_enable;
2340 irqchip->irq_disable = gpiochip_irq_disable;
14250520
LW
2341}
2342
e0d89728
TR
2343/**
2344 * gpiochip_add_irqchip() - adds an IRQ chip to a GPIO chip
2345 * @gpiochip: the GPIO chip to add the IRQ chip to
39c3fd58
AL
2346 * @lock_key: lockdep class for IRQ lock
2347 * @request_key: lockdep class for IRQ request
e0d89728 2348 */
959bc7b2 2349static int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
2350 struct lock_class_key *lock_key,
2351 struct lock_class_key *request_key)
e0d89728
TR
2352{
2353 struct irq_chip *irqchip = gpiochip->irq.chip;
fdd61a01 2354 const struct irq_domain_ops *ops = NULL;
e0d89728
TR
2355 struct device_node *np;
2356 unsigned int type;
2357 unsigned int i;
2358
2359 if (!irqchip)
2360 return 0;
2361
2362 if (gpiochip->irq.parent_handler && gpiochip->can_sleep) {
b1911710 2363 chip_err(gpiochip, "you cannot have chained interrupts on a chip that may sleep\n");
e0d89728
TR
2364 return -EINVAL;
2365 }
2366
2367 np = gpiochip->gpiodev->dev.of_node;
2368 type = gpiochip->irq.default_type;
2369
2370 /*
2371 * Specifying a default trigger is a terrible idea if DT or ACPI is
2372 * used to configure the interrupts, as you may end up with
2373 * conflicting triggers. Tell the user, and reset to NONE.
2374 */
2375 if (WARN(np && type != IRQ_TYPE_NONE,
2376 "%s: Ignoring %u default trigger\n", np->full_name, type))
2377 type = IRQ_TYPE_NONE;
2378
2379 if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) {
2380 acpi_handle_warn(ACPI_HANDLE(gpiochip->parent),
2381 "Ignoring %u default trigger\n", type);
2382 type = IRQ_TYPE_NONE;
2383 }
2384
2385 gpiochip->to_irq = gpiochip_to_irq;
2386 gpiochip->irq.default_type = type;
959bc7b2 2387 gpiochip->irq.lock_key = lock_key;
39c3fd58 2388 gpiochip->irq.request_key = request_key;
e0d89728 2389
fdd61a01
LW
2390 /* If a parent irqdomain is provided, let's build a hierarchy */
2391 if (gpiochip_hierarchy_is_hierarchical(gpiochip)) {
2392 int ret = gpiochip_hierarchy_add_domain(gpiochip);
2393 if (ret)
2394 return ret;
2395 } else {
2396 /* Some drivers provide custom irqdomain ops */
2397 if (gpiochip->irq.domain_ops)
2398 ops = gpiochip->irq.domain_ops;
2399
2400 if (!ops)
2401 ops = &gpiochip_domain_ops;
2402 gpiochip->irq.domain = irq_domain_add_simple(np,
2403 gpiochip->ngpio,
2404 gpiochip->irq.first,
2405 ops, gpiochip);
2406 if (!gpiochip->irq.domain)
2407 return -EINVAL;
2408 }
e0d89728 2409
e0d89728
TR
2410 if (gpiochip->irq.parent_handler) {
2411 void *data = gpiochip->irq.parent_handler_data ?: gpiochip;
2412
2413 for (i = 0; i < gpiochip->irq.num_parents; i++) {
2414 /*
2415 * The parent IRQ chip is already using the chip_data
2416 * for this IRQ chip, so our callbacks simply use the
2417 * handler_data.
2418 */
2419 irq_set_chained_handler_and_data(gpiochip->irq.parents[i],
2420 gpiochip->irq.parent_handler,
2421 data);
2422 }
e0d89728
TR
2423 }
2424
ca620f2d
HV
2425 gpiochip_set_irq_hooks(gpiochip);
2426
e0d89728
TR
2427 acpi_gpiochip_request_interrupts(gpiochip);
2428
2429 return 0;
2430}
2431
14250520
LW
2432/**
2433 * gpiochip_irqchip_remove() - removes an irqchip added to a gpiochip
2434 * @gpiochip: the gpiochip to remove the irqchip from
2435 *
2436 * This is called only from gpiochip_remove()
2437 */
2438static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip)
2439{
ca620f2d 2440 struct irq_chip *irqchip = gpiochip->irq.chip;
39e5f096 2441 unsigned int offset;
c3626fde 2442
afa82fab
MW
2443 acpi_gpiochip_free_interrupts(gpiochip);
2444
ca620f2d 2445 if (irqchip && gpiochip->irq.parent_handler) {
39e5f096
TR
2446 struct gpio_irq_chip *irq = &gpiochip->irq;
2447 unsigned int i;
2448
2449 for (i = 0; i < irq->num_parents; i++)
2450 irq_set_chained_handler_and_data(irq->parents[i],
2451 NULL, NULL);
25e4fe92
DES
2452 }
2453
c3626fde 2454 /* Remove all IRQ mappings and delete the domain */
f0fbe7bc 2455 if (gpiochip->irq.domain) {
39e5f096
TR
2456 unsigned int irq;
2457
79b804cb
MW
2458 for (offset = 0; offset < gpiochip->ngpio; offset++) {
2459 if (!gpiochip_irqchip_irq_valid(gpiochip, offset))
2460 continue;
f0fbe7bc
TR
2461
2462 irq = irq_find_mapping(gpiochip->irq.domain, offset);
2463 irq_dispose_mapping(irq);
79b804cb 2464 }
f0fbe7bc
TR
2465
2466 irq_domain_remove(gpiochip->irq.domain);
c3626fde 2467 }
14250520 2468
461c1a7d
HV
2469 if (irqchip) {
2470 if (irqchip->irq_request_resources == gpiochip_irq_reqres) {
2471 irqchip->irq_request_resources = NULL;
2472 irqchip->irq_release_resources = NULL;
2473 }
2474 if (irqchip->irq_enable == gpiochip_irq_enable) {
2475 irqchip->irq_enable = gpiochip->irq.irq_enable;
2476 irqchip->irq_disable = gpiochip->irq.irq_disable;
2477 }
14250520 2478 }
461c1a7d
HV
2479 gpiochip->irq.irq_enable = NULL;
2480 gpiochip->irq.irq_disable = NULL;
ca620f2d 2481 gpiochip->irq.chip = NULL;
79b804cb
MW
2482
2483 gpiochip_irqchip_free_valid_mask(gpiochip);
14250520
LW
2484}
2485
2486/**
739e6f59 2487 * gpiochip_irqchip_add_key() - adds an irqchip to a gpiochip
14250520
LW
2488 * @gpiochip: the gpiochip to add the irqchip to
2489 * @irqchip: the irqchip to add to the gpiochip
2490 * @first_irq: if not dynamically assigned, the base (first) IRQ to
2491 * allocate gpiochip irqs from
2492 * @handler: the irq handler to use (often a predefined irq core function)
1333b90f
LW
2493 * @type: the default type for IRQs on this irqchip, pass IRQ_TYPE_NONE
2494 * to have the core avoid setting up any default type in the hardware.
60ed54ca 2495 * @threaded: whether this irqchip uses a nested thread handler
39c3fd58
AL
2496 * @lock_key: lockdep class for IRQ lock
2497 * @request_key: lockdep class for IRQ request
14250520
LW
2498 *
2499 * This function closely associates a certain irqchip with a certain
2500 * gpiochip, providing an irq domain to translate the local IRQs to
2501 * global irqs in the gpiolib core, and making sure that the gpiochip
2502 * is passed as chip data to all related functions. Driver callbacks
09dd5f9e 2503 * need to use gpiochip_get_data() to get their local state containers back
14250520
LW
2504 * from the gpiochip passed as chip data. An irqdomain will be stored
2505 * in the gpiochip that shall be used by the driver to handle IRQ number
2506 * translation. The gpiochip will need to be initialized and registered
2507 * before calling this function.
2508 *
c3626fde
LW
2509 * This function will handle two cell:ed simple IRQs and assumes all
2510 * the pins on the gpiochip can generate a unique IRQ. Everything else
14250520
LW
2511 * need to be open coded.
2512 */
739e6f59
LW
2513int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip,
2514 struct irq_chip *irqchip,
2515 unsigned int first_irq,
2516 irq_flow_handler_t handler,
2517 unsigned int type,
60ed54ca 2518 bool threaded,
39c3fd58
AL
2519 struct lock_class_key *lock_key,
2520 struct lock_class_key *request_key)
14250520
LW
2521{
2522 struct device_node *of_node;
14250520
LW
2523
2524 if (!gpiochip || !irqchip)
2525 return -EINVAL;
2526
58383c78 2527 if (!gpiochip->parent) {
14250520
LW
2528 pr_err("missing gpiochip .dev parent pointer\n");
2529 return -EINVAL;
2530 }
60ed54ca 2531 gpiochip->irq.threaded = threaded;
58383c78 2532 of_node = gpiochip->parent->of_node;
14250520
LW
2533#ifdef CONFIG_OF_GPIO
2534 /*
20a8a968 2535 * If the gpiochip has an assigned OF node this takes precedence
c88402c2
BJZ
2536 * FIXME: get rid of this and use gpiochip->parent->of_node
2537 * everywhere
14250520
LW
2538 */
2539 if (gpiochip->of_node)
2540 of_node = gpiochip->of_node;
2541#endif
332e99d5 2542 /*
0a1e0053 2543 * Specifying a default trigger is a terrible idea if DT or ACPI is
332e99d5
MZ
2544 * used to configure the interrupts, as you may end-up with
2545 * conflicting triggers. Tell the user, and reset to NONE.
2546 */
2547 if (WARN(of_node && type != IRQ_TYPE_NONE,
7eb6ce2f 2548 "%pOF: Ignoring %d default trigger\n", of_node, type))
332e99d5 2549 type = IRQ_TYPE_NONE;
0a1e0053
MW
2550 if (has_acpi_companion(gpiochip->parent) && type != IRQ_TYPE_NONE) {
2551 acpi_handle_warn(ACPI_HANDLE(gpiochip->parent),
2552 "Ignoring %d default trigger\n", type);
2553 type = IRQ_TYPE_NONE;
2554 }
332e99d5 2555
da80ff81 2556 gpiochip->irq.chip = irqchip;
c7a0aa59 2557 gpiochip->irq.handler = handler;
3634eeb0 2558 gpiochip->irq.default_type = type;
14250520 2559 gpiochip->to_irq = gpiochip_to_irq;
ca9df053 2560 gpiochip->irq.lock_key = lock_key;
39c3fd58 2561 gpiochip->irq.request_key = request_key;
f0fbe7bc 2562 gpiochip->irq.domain = irq_domain_add_simple(of_node,
14250520
LW
2563 gpiochip->ngpio, first_irq,
2564 &gpiochip_domain_ops, gpiochip);
f0fbe7bc 2565 if (!gpiochip->irq.domain) {
da80ff81 2566 gpiochip->irq.chip = NULL;
14250520
LW
2567 return -EINVAL;
2568 }
8b67a1f0 2569
ca620f2d 2570 gpiochip_set_irq_hooks(gpiochip);
14250520 2571
afa82fab
MW
2572 acpi_gpiochip_request_interrupts(gpiochip);
2573
14250520
LW
2574 return 0;
2575}
739e6f59 2576EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_key);
14250520
LW
2577
2578#else /* CONFIG_GPIOLIB_IRQCHIP */
2579
959bc7b2 2580static inline int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
39c3fd58
AL
2581 struct lock_class_key *lock_key,
2582 struct lock_class_key *request_key)
e0d89728
TR
2583{
2584 return 0;
2585}
14250520 2586static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip) {}
9411e3aa
AS
2587
2588static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gpiochip)
2589{
2590 return 0;
2591}
2592
79b804cb
MW
2593static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip)
2594{
2595 return 0;
2596}
2597static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip)
2598{ }
14250520
LW
2599
2600#endif /* CONFIG_GPIOLIB_IRQCHIP */
2601
c771c2f4
JG
2602/**
2603 * gpiochip_generic_request() - request the gpio function for a pin
2604 * @chip: the gpiochip owning the GPIO
2605 * @offset: the offset of the GPIO to request for GPIO function
2606 */
2607int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset)
2608{
a9a1d2a7 2609 return pinctrl_gpio_request(chip->gpiodev->base + offset);
c771c2f4
JG
2610}
2611EXPORT_SYMBOL_GPL(gpiochip_generic_request);
2612
2613/**
2614 * gpiochip_generic_free() - free the gpio function from a pin
2615 * @chip: the gpiochip to request the gpio function for
2616 * @offset: the offset of the GPIO to free from GPIO function
2617 */
2618void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset)
2619{
a9a1d2a7 2620 pinctrl_gpio_free(chip->gpiodev->base + offset);
c771c2f4
JG
2621}
2622EXPORT_SYMBOL_GPL(gpiochip_generic_free);
2623
2956b5d9
MW
2624/**
2625 * gpiochip_generic_config() - apply configuration for a pin
2626 * @chip: the gpiochip owning the GPIO
2627 * @offset: the offset of the GPIO to apply the configuration
2628 * @config: the configuration to be applied
2629 */
2630int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset,
2631 unsigned long config)
2632{
2633 return pinctrl_gpio_set_config(chip->gpiodev->base + offset, config);
2634}
2635EXPORT_SYMBOL_GPL(gpiochip_generic_config);
2636
f23f1516 2637#ifdef CONFIG_PINCTRL
165adc9c 2638
586a87e6
CR
2639/**
2640 * gpiochip_add_pingroup_range() - add a range for GPIO <-> pin mapping
2641 * @chip: the gpiochip to add the range for
d32651f6 2642 * @pctldev: the pin controller to map to
586a87e6
CR
2643 * @gpio_offset: the start offset in the current gpio_chip number space
2644 * @pin_group: name of the pin group inside the pin controller
973c1714
CL
2645 *
2646 * Calling this function directly from a DeviceTree-supported
2647 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2648 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2649 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
586a87e6
CR
2650 */
2651int gpiochip_add_pingroup_range(struct gpio_chip *chip,
2652 struct pinctrl_dev *pctldev,
2653 unsigned int gpio_offset, const char *pin_group)
2654{
2655 struct gpio_pin_range *pin_range;
fdeb8e15 2656 struct gpio_device *gdev = chip->gpiodev;
586a87e6
CR
2657 int ret;
2658
2659 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
2660 if (!pin_range) {
1a2a99c6 2661 chip_err(chip, "failed to allocate pin ranges\n");
586a87e6
CR
2662 return -ENOMEM;
2663 }
2664
2665 /* Use local offset as range ID */
2666 pin_range->range.id = gpio_offset;
2667 pin_range->range.gc = chip;
2668 pin_range->range.name = chip->label;
fdeb8e15 2669 pin_range->range.base = gdev->base + gpio_offset;
586a87e6
CR
2670 pin_range->pctldev = pctldev;
2671
2672 ret = pinctrl_get_group_pins(pctldev, pin_group,
2673 &pin_range->range.pins,
2674 &pin_range->range.npins);
61c6375d
MN
2675 if (ret < 0) {
2676 kfree(pin_range);
586a87e6 2677 return ret;
61c6375d 2678 }
586a87e6
CR
2679
2680 pinctrl_add_gpio_range(pctldev, &pin_range->range);
2681
1a2a99c6
AS
2682 chip_dbg(chip, "created GPIO range %d->%d ==> %s PINGRP %s\n",
2683 gpio_offset, gpio_offset + pin_range->range.npins - 1,
586a87e6
CR
2684 pinctrl_dev_get_devname(pctldev), pin_group);
2685
20ec3e39 2686 list_add_tail(&pin_range->node, &gdev->pin_ranges);
586a87e6
CR
2687
2688 return 0;
2689}
2690EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
2691
3f0f8670
LW
2692/**
2693 * gpiochip_add_pin_range() - add a range for GPIO <-> pin mapping
2694 * @chip: the gpiochip to add the range for
950d55f5 2695 * @pinctl_name: the dev_name() of the pin controller to map to
316511c0
LW
2696 * @gpio_offset: the start offset in the current gpio_chip number space
2697 * @pin_offset: the start offset in the pin controller number space
3f0f8670
LW
2698 * @npins: the number of pins from the offset of each pin space (GPIO and
2699 * pin controller) to accumulate in this range
950d55f5
TR
2700 *
2701 * Returns:
2702 * 0 on success, or a negative error-code on failure.
973c1714
CL
2703 *
2704 * Calling this function directly from a DeviceTree-supported
2705 * pinctrl driver is DEPRECATED. Please see Section 2.1 of
2706 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
2707 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
3f0f8670 2708 */
1e63d7b9 2709int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
316511c0 2710 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 2711 unsigned int npins)
f23f1516
SH
2712{
2713 struct gpio_pin_range *pin_range;
fdeb8e15 2714 struct gpio_device *gdev = chip->gpiodev;
b4d4b1f0 2715 int ret;
f23f1516 2716
3f0f8670 2717 pin_range = kzalloc(sizeof(*pin_range), GFP_KERNEL);
f23f1516 2718 if (!pin_range) {
1a2a99c6 2719 chip_err(chip, "failed to allocate pin ranges\n");
1e63d7b9 2720 return -ENOMEM;
f23f1516
SH
2721 }
2722
3f0f8670 2723 /* Use local offset as range ID */
316511c0 2724 pin_range->range.id = gpio_offset;
3f0f8670 2725 pin_range->range.gc = chip;
f23f1516 2726 pin_range->range.name = chip->label;
fdeb8e15 2727 pin_range->range.base = gdev->base + gpio_offset;
316511c0 2728 pin_range->range.pin_base = pin_offset;
f23f1516 2729 pin_range->range.npins = npins;
192c369c 2730 pin_range->pctldev = pinctrl_find_and_add_gpio_range(pinctl_name,
f23f1516 2731 &pin_range->range);
8f23ca1a 2732 if (IS_ERR(pin_range->pctldev)) {
b4d4b1f0 2733 ret = PTR_ERR(pin_range->pctldev);
1a2a99c6 2734 chip_err(chip, "could not create pin range\n");
3f0f8670 2735 kfree(pin_range);
b4d4b1f0 2736 return ret;
3f0f8670 2737 }
1a2a99c6
AS
2738 chip_dbg(chip, "created GPIO range %d->%d ==> %s PIN %d->%d\n",
2739 gpio_offset, gpio_offset + npins - 1,
316511c0
LW
2740 pinctl_name,
2741 pin_offset, pin_offset + npins - 1);
f23f1516 2742
20ec3e39 2743 list_add_tail(&pin_range->node, &gdev->pin_ranges);
1e63d7b9
LW
2744
2745 return 0;
f23f1516 2746}
165adc9c 2747EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
f23f1516 2748
3f0f8670
LW
2749/**
2750 * gpiochip_remove_pin_ranges() - remove all the GPIO <-> pin mappings
2751 * @chip: the chip to remove all the mappings for
2752 */
f23f1516
SH
2753void gpiochip_remove_pin_ranges(struct gpio_chip *chip)
2754{
2755 struct gpio_pin_range *pin_range, *tmp;
20ec3e39 2756 struct gpio_device *gdev = chip->gpiodev;
f23f1516 2757
20ec3e39 2758 list_for_each_entry_safe(pin_range, tmp, &gdev->pin_ranges, node) {
f23f1516
SH
2759 list_del(&pin_range->node);
2760 pinctrl_remove_gpio_range(pin_range->pctldev,
2761 &pin_range->range);
3f0f8670 2762 kfree(pin_range);
f23f1516
SH
2763 }
2764}
165adc9c
LW
2765EXPORT_SYMBOL_GPL(gpiochip_remove_pin_ranges);
2766
2767#endif /* CONFIG_PINCTRL */
f23f1516 2768
d2876d08
DB
2769/* These "optional" allocation calls help prevent drivers from stomping
2770 * on each other, and help provide better diagnostics in debugfs.
2771 * They're called even less than the "set direction" calls.
2772 */
fac9d885 2773static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
d2876d08 2774{
fdeb8e15 2775 struct gpio_chip *chip = desc->gdev->chip;
d377f56f 2776 int ret;
d2876d08 2777 unsigned long flags;
3789f5ac 2778 unsigned offset;
d2876d08 2779
18534df4
MS
2780 if (label) {
2781 label = kstrdup_const(label, GFP_KERNEL);
2782 if (!label)
2783 return -ENOMEM;
2784 }
2785
bcabdef1
AC
2786 spin_lock_irqsave(&gpio_lock, flags);
2787
d2876d08 2788 /* NOTE: gpio_request() can be called in early boot,
35e8bb51 2789 * before IRQs are enabled, for non-sleeping (SOC) GPIOs.
d2876d08
DB
2790 */
2791
2792 if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
2793 desc_set_label(desc, label ? : "?");
d377f56f 2794 ret = 0;
438d8908 2795 } else {
18534df4 2796 kfree_const(label);
d377f56f 2797 ret = -EBUSY;
7460db56 2798 goto done;
35e8bb51
DB
2799 }
2800
2801 if (chip->request) {
2802 /* chip->request may sleep */
2803 spin_unlock_irqrestore(&gpio_lock, flags);
3789f5ac
BD
2804 offset = gpio_chip_hwgpio(desc);
2805 if (gpiochip_line_is_valid(chip, offset))
d377f56f 2806 ret = chip->request(chip, offset);
3789f5ac 2807 else
d377f56f 2808 ret = -EINVAL;
35e8bb51
DB
2809 spin_lock_irqsave(&gpio_lock, flags);
2810
d377f56f 2811 if (ret < 0) {
35e8bb51 2812 desc_set_label(desc, NULL);
18534df4 2813 kfree_const(label);
35e8bb51 2814 clear_bit(FLAG_REQUESTED, &desc->flags);
80b0a602 2815 goto done;
35e8bb51 2816 }
438d8908 2817 }
80b0a602
MN
2818 if (chip->get_direction) {
2819 /* chip->get_direction may sleep */
2820 spin_unlock_irqrestore(&gpio_lock, flags);
372e722e 2821 gpiod_get_direction(desc);
80b0a602
MN
2822 spin_lock_irqsave(&gpio_lock, flags);
2823 }
77c2d792
MW
2824done:
2825 spin_unlock_irqrestore(&gpio_lock, flags);
d377f56f 2826 return ret;
77c2d792
MW
2827}
2828
fdeb8e15
LW
2829/*
2830 * This descriptor validation needs to be inserted verbatim into each
2831 * function taking a descriptor, so we need to use a preprocessor
54d77198
LW
2832 * macro to avoid endless duplication. If the desc is NULL it is an
2833 * optional GPIO and calls should just bail out.
fdeb8e15 2834 */
a746a232
RV
2835static int validate_desc(const struct gpio_desc *desc, const char *func)
2836{
2837 if (!desc)
2838 return 0;
2839 if (IS_ERR(desc)) {
2840 pr_warn("%s: invalid GPIO (errorpointer)\n", func);
2841 return PTR_ERR(desc);
2842 }
2843 if (!desc->gdev) {
2844 pr_warn("%s: invalid GPIO (no device)\n", func);
2845 return -EINVAL;
2846 }
2847 if (!desc->gdev->chip) {
2848 dev_warn(&desc->gdev->dev,
2849 "%s: backing chip is gone\n", func);
2850 return 0;
2851 }
2852 return 1;
2853}
2854
fdeb8e15 2855#define VALIDATE_DESC(desc) do { \
a746a232
RV
2856 int __valid = validate_desc(desc, __func__); \
2857 if (__valid <= 0) \
2858 return __valid; \
2859 } while (0)
fdeb8e15
LW
2860
2861#define VALIDATE_DESC_VOID(desc) do { \
a746a232
RV
2862 int __valid = validate_desc(desc, __func__); \
2863 if (__valid <= 0) \
fdeb8e15 2864 return; \
a746a232 2865 } while (0)
fdeb8e15 2866
0eb4c6c2 2867int gpiod_request(struct gpio_desc *desc, const char *label)
77c2d792 2868{
d377f56f 2869 int ret = -EPROBE_DEFER;
fdeb8e15 2870 struct gpio_device *gdev;
77c2d792 2871
fdeb8e15
LW
2872 VALIDATE_DESC(desc);
2873 gdev = desc->gdev;
77c2d792 2874
fdeb8e15 2875 if (try_module_get(gdev->owner)) {
d377f56f
LW
2876 ret = gpiod_request_commit(desc, label);
2877 if (ret < 0)
fdeb8e15 2878 module_put(gdev->owner);
33a68e86
LW
2879 else
2880 get_device(&gdev->dev);
77c2d792
MW
2881 }
2882
d377f56f
LW
2883 if (ret)
2884 gpiod_dbg(desc, "%s: status %d\n", __func__, ret);
77c2d792 2885
d377f56f 2886 return ret;
d2876d08 2887}
372e722e 2888
fac9d885 2889static bool gpiod_free_commit(struct gpio_desc *desc)
d2876d08 2890{
77c2d792 2891 bool ret = false;
d2876d08 2892 unsigned long flags;
35e8bb51 2893 struct gpio_chip *chip;
d2876d08 2894
3d599d1c
UKK
2895 might_sleep();
2896
372e722e 2897 gpiod_unexport(desc);
d8f388d8 2898
d2876d08
DB
2899 spin_lock_irqsave(&gpio_lock, flags);
2900
fdeb8e15 2901 chip = desc->gdev->chip;
35e8bb51
DB
2902 if (chip && test_bit(FLAG_REQUESTED, &desc->flags)) {
2903 if (chip->free) {
2904 spin_unlock_irqrestore(&gpio_lock, flags);
9c4ba946 2905 might_sleep_if(chip->can_sleep);
372e722e 2906 chip->free(chip, gpio_chip_hwgpio(desc));
35e8bb51
DB
2907 spin_lock_irqsave(&gpio_lock, flags);
2908 }
18534df4 2909 kfree_const(desc->label);
d2876d08 2910 desc_set_label(desc, NULL);
07697461 2911 clear_bit(FLAG_ACTIVE_LOW, &desc->flags);
35e8bb51 2912 clear_bit(FLAG_REQUESTED, &desc->flags);
aca5ce14 2913 clear_bit(FLAG_OPEN_DRAIN, &desc->flags);
25553ff0 2914 clear_bit(FLAG_OPEN_SOURCE, &desc->flags);
9225d516
DF
2915 clear_bit(FLAG_PULL_UP, &desc->flags);
2916 clear_bit(FLAG_PULL_DOWN, &desc->flags);
2148ad77 2917 clear_bit(FLAG_BIAS_DISABLE, &desc->flags);
f625d460 2918 clear_bit(FLAG_IS_HOGGED, &desc->flags);
77c2d792
MW
2919 ret = true;
2920 }
d2876d08
DB
2921
2922 spin_unlock_irqrestore(&gpio_lock, flags);
77c2d792
MW
2923 return ret;
2924}
2925
0eb4c6c2 2926void gpiod_free(struct gpio_desc *desc)
77c2d792 2927{
fac9d885 2928 if (desc && desc->gdev && gpiod_free_commit(desc)) {
fdeb8e15 2929 module_put(desc->gdev->owner);
33a68e86
LW
2930 put_device(&desc->gdev->dev);
2931 } else {
77c2d792 2932 WARN_ON(extra_checks);
33a68e86 2933 }
d2876d08 2934}
372e722e 2935
d2876d08
DB
2936/**
2937 * gpiochip_is_requested - return string iff signal was requested
2938 * @chip: controller managing the signal
2939 * @offset: of signal within controller's 0..(ngpio - 1) range
2940 *
2941 * Returns NULL if the GPIO is not currently requested, else a string.
9c8318ff
AC
2942 * The string returned is the label passed to gpio_request(); if none has been
2943 * passed it is a meaningless, non-NULL constant.
d2876d08
DB
2944 *
2945 * This function is for use by GPIO controller drivers. The label can
2946 * help with diagnostics, and knowing that the signal is used as a GPIO
2947 * can help avoid accidentally multiplexing it to another controller.
2948 */
2949const char *gpiochip_is_requested(struct gpio_chip *chip, unsigned offset)
2950{
6c0b4e6c 2951 struct gpio_desc *desc;
d2876d08 2952
48b5953e 2953 if (offset >= chip->ngpio)
d2876d08 2954 return NULL;
6c0b4e6c 2955
1c3cdb18 2956 desc = &chip->gpiodev->descs[offset];
6c0b4e6c 2957
372e722e 2958 if (test_bit(FLAG_REQUESTED, &desc->flags) == 0)
d2876d08 2959 return NULL;
372e722e 2960 return desc->label;
d2876d08
DB
2961}
2962EXPORT_SYMBOL_GPL(gpiochip_is_requested);
2963
77c2d792
MW
2964/**
2965 * gpiochip_request_own_desc - Allow GPIO chip to request its own descriptor
950d55f5
TR
2966 * @chip: GPIO chip
2967 * @hwnum: hardware number of the GPIO for which to request the descriptor
77c2d792 2968 * @label: label for the GPIO
5923ea6c
LW
2969 * @lflags: lookup flags for this GPIO or 0 if default, this can be used to
2970 * specify things like line inversion semantics with the machine flags
2971 * such as GPIO_OUT_LOW
2972 * @dflags: descriptor request flags for this GPIO or 0 if default, this
2973 * can be used to specify consumer semantics such as open drain
77c2d792
MW
2974 *
2975 * Function allows GPIO chip drivers to request and use their own GPIO
2976 * descriptors via gpiolib API. Difference to gpiod_request() is that this
2977 * function will not increase reference count of the GPIO chip module. This
2978 * allows the GPIO chip module to be unloaded as needed (we assume that the
2979 * GPIO chip driver handles freeing the GPIOs it has requested).
950d55f5
TR
2980 *
2981 * Returns:
2982 * A pointer to the GPIO descriptor, or an ERR_PTR()-encoded negative error
2983 * code on failure.
77c2d792 2984 */
06863620
BG
2985struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip,
2986 unsigned int hwnum,
21abf103 2987 const char *label,
5923ea6c
LW
2988 enum gpio_lookup_flags lflags,
2989 enum gpiod_flags dflags)
77c2d792 2990{
abdc08a3 2991 struct gpio_desc *desc = gpiochip_get_desc(chip, hwnum);
d377f56f 2992 int ret;
77c2d792 2993
abdc08a3
AC
2994 if (IS_ERR(desc)) {
2995 chip_err(chip, "failed to get GPIO descriptor\n");
2996 return desc;
2997 }
2998
d377f56f
LW
2999 ret = gpiod_request_commit(desc, label);
3000 if (ret < 0)
3001 return ERR_PTR(ret);
77c2d792 3002
d377f56f
LW
3003 ret = gpiod_configure_flags(desc, label, lflags, dflags);
3004 if (ret) {
21abf103
LW
3005 chip_err(chip, "setup of own GPIO %s failed\n", label);
3006 gpiod_free_commit(desc);
d377f56f 3007 return ERR_PTR(ret);
21abf103
LW
3008 }
3009
abdc08a3 3010 return desc;
77c2d792 3011}
f7d4ad98 3012EXPORT_SYMBOL_GPL(gpiochip_request_own_desc);
77c2d792
MW
3013
3014/**
3015 * gpiochip_free_own_desc - Free GPIO requested by the chip driver
3016 * @desc: GPIO descriptor to free
3017 *
3018 * Function frees the given GPIO requested previously with
3019 * gpiochip_request_own_desc().
3020 */
3021void gpiochip_free_own_desc(struct gpio_desc *desc)
3022{
3023 if (desc)
fac9d885 3024 gpiod_free_commit(desc);
77c2d792 3025}
f7d4ad98 3026EXPORT_SYMBOL_GPL(gpiochip_free_own_desc);
d2876d08 3027
fdeb8e15
LW
3028/*
3029 * Drivers MUST set GPIO direction before making get/set calls. In
d2876d08
DB
3030 * some cases this is done in early boot, before IRQs are enabled.
3031 *
3032 * As a rule these aren't called more than once (except for drivers
3033 * using the open-drain emulation idiom) so these are natural places
3034 * to accumulate extra debugging checks. Note that we can't (yet)
3035 * rely on gpio_request() having been called beforehand.
3036 */
3037
d99f8876 3038static int gpio_do_set_config(struct gpio_chip *gc, unsigned int offset,
62adc6f3 3039 unsigned long config)
71479789 3040{
d90f3685
BG
3041 if (!gc->set_config)
3042 return -ENOTSUPP;
542f3615 3043
62adc6f3 3044 return gc->set_config(gc, offset, config);
71479789
TP
3045}
3046
d99f8876
BG
3047static int gpio_set_config(struct gpio_chip *gc, unsigned int offset,
3048 enum pin_config_param mode)
3049{
91b4ea5f 3050 unsigned long config;
d99f8876
BG
3051 unsigned arg;
3052
3053 switch (mode) {
d99f8876
BG
3054 case PIN_CONFIG_BIAS_PULL_DOWN:
3055 case PIN_CONFIG_BIAS_PULL_UP:
3056 arg = 1;
3057 break;
3058
3059 default:
3060 arg = 0;
3061 }
3062
91b4ea5f 3063 config = PIN_CONF_PACKED(mode, arg);
62adc6f3 3064 return gpio_do_set_config(gc, offset, config);
d99f8876
BG
3065}
3066
2148ad77
KG
3067static int gpio_set_bias(struct gpio_chip *chip, struct gpio_desc *desc)
3068{
3069 int bias = 0;
3070 int ret = 0;
3071
3072 if (test_bit(FLAG_BIAS_DISABLE, &desc->flags))
3073 bias = PIN_CONFIG_BIAS_DISABLE;
3074 else if (test_bit(FLAG_PULL_UP, &desc->flags))
3075 bias = PIN_CONFIG_BIAS_PULL_UP;
3076 else if (test_bit(FLAG_PULL_DOWN, &desc->flags))
3077 bias = PIN_CONFIG_BIAS_PULL_DOWN;
3078
3079 if (bias) {
3080 ret = gpio_set_config(chip, gpio_chip_hwgpio(desc), bias);
3081 if (ret != -ENOTSUPP)
3082 return ret;
3083 }
3084 return 0;
3085}
3086
79a9becd
AC
3087/**
3088 * gpiod_direction_input - set the GPIO direction to input
3089 * @desc: GPIO to set to input
3090 *
3091 * Set the direction of the passed GPIO to input, such as gpiod_get_value() can
3092 * be called safely on it.
3093 *
3094 * Return 0 in case of success, else an error code.
3095 */
3096int gpiod_direction_input(struct gpio_desc *desc)
d2876d08 3097{
d2876d08 3098 struct gpio_chip *chip;
d377f56f 3099 int ret = 0;
d2876d08 3100
fdeb8e15
LW
3101 VALIDATE_DESC(desc);
3102 chip = desc->gdev->chip;
bcabdef1 3103
e48d194d
LW
3104 /*
3105 * It is legal to have no .get() and .direction_input() specified if
3106 * the chip is output-only, but you can't specify .direction_input()
3107 * and not support the .get() operation, that doesn't make sense.
3108 */
ae9847f4 3109 if (!chip->get && chip->direction_input) {
6424de5a 3110 gpiod_warn(desc,
e48d194d
LW
3111 "%s: missing get() but have direction_input()\n",
3112 __func__);
be1a4b13
LW
3113 return -EIO;
3114 }
3115
e48d194d
LW
3116 /*
3117 * If we have a .direction_input() callback, things are simple,
3118 * just call it. Else we are some input-only chip so try to check the
3119 * direction (if .get_direction() is supported) else we silently
3120 * assume we are in input mode after this.
3121 */
ae9847f4 3122 if (chip->direction_input) {
d377f56f 3123 ret = chip->direction_input(chip, gpio_chip_hwgpio(desc));
ae9847f4
RRD
3124 } else if (chip->get_direction &&
3125 (chip->get_direction(chip, gpio_chip_hwgpio(desc)) != 1)) {
3126 gpiod_warn(desc,
e48d194d
LW
3127 "%s: missing direction_input() operation and line is output\n",
3128 __func__);
ae9847f4
RRD
3129 return -EIO;
3130 }
2148ad77 3131 if (ret == 0) {
d2876d08 3132 clear_bit(FLAG_IS_OUT, &desc->flags);
2148ad77
KG
3133 ret = gpio_set_bias(chip, desc);
3134 }
d449991c 3135
d377f56f 3136 trace_gpio_direction(desc_to_gpio(desc), 1, ret);
d82da797 3137
d377f56f 3138 return ret;
d2876d08 3139}
79a9becd 3140EXPORT_SYMBOL_GPL(gpiod_direction_input);
372e722e 3141
fac9d885 3142static int gpiod_direction_output_raw_commit(struct gpio_desc *desc, int value)
d2876d08 3143{
c663e5f5 3144 struct gpio_chip *gc = desc->gdev->chip;
ad17731d 3145 int val = !!value;
ae9847f4 3146 int ret = 0;
d2876d08 3147
e48d194d
LW
3148 /*
3149 * It's OK not to specify .direction_output() if the gpiochip is
3150 * output-only, but if there is then not even a .set() operation it
3151 * is pretty tricky to drive the output line.
3152 */
ae9847f4 3153 if (!gc->set && !gc->direction_output) {
6424de5a 3154 gpiod_warn(desc,
e48d194d
LW
3155 "%s: missing set() and direction_output() operations\n",
3156 __func__);
be1a4b13
LW
3157 return -EIO;
3158 }
3159
ae9847f4
RRD
3160 if (gc->direction_output) {
3161 ret = gc->direction_output(gc, gpio_chip_hwgpio(desc), val);
3162 } else {
e48d194d 3163 /* Check that we are in output mode if we can */
ae9847f4
RRD
3164 if (gc->get_direction &&
3165 gc->get_direction(gc, gpio_chip_hwgpio(desc))) {
3166 gpiod_warn(desc,
3167 "%s: missing direction_output() operation\n",
3168 __func__);
3169 return -EIO;
3170 }
e48d194d
LW
3171 /*
3172 * If we can't actively set the direction, we are some
3173 * output-only chip, so just drive the output as desired.
3174 */
ae9847f4
RRD
3175 gc->set(gc, gpio_chip_hwgpio(desc), val);
3176 }
3177
c663e5f5 3178 if (!ret)
d2876d08 3179 set_bit(FLAG_IS_OUT, &desc->flags);
ad17731d 3180 trace_gpio_value(desc_to_gpio(desc), 0, val);
c663e5f5
LW
3181 trace_gpio_direction(desc_to_gpio(desc), 0, ret);
3182 return ret;
d2876d08 3183}
ef70bbe1
PZ
3184
3185/**
3186 * gpiod_direction_output_raw - set the GPIO direction to output
3187 * @desc: GPIO to set to output
3188 * @value: initial output value of the GPIO
3189 *
3190 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
3191 * be called safely on it. The initial value of the output must be specified
3192 * as raw value on the physical line without regard for the ACTIVE_LOW status.
3193 *
3194 * Return 0 in case of success, else an error code.
3195 */
3196int gpiod_direction_output_raw(struct gpio_desc *desc, int value)
3197{
fdeb8e15 3198 VALIDATE_DESC(desc);
fac9d885 3199 return gpiod_direction_output_raw_commit(desc, value);
ef70bbe1
PZ
3200}
3201EXPORT_SYMBOL_GPL(gpiod_direction_output_raw);
3202
3203/**
90df4fe0 3204 * gpiod_direction_output - set the GPIO direction to output
ef70bbe1
PZ
3205 * @desc: GPIO to set to output
3206 * @value: initial output value of the GPIO
3207 *
3208 * Set the direction of the passed GPIO to output, such as gpiod_set_value() can
3209 * be called safely on it. The initial value of the output must be specified
3210 * as the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
3211 * account.
3212 *
3213 * Return 0 in case of success, else an error code.
3214 */
3215int gpiod_direction_output(struct gpio_desc *desc, int value)
3216{
30322bcf 3217 struct gpio_chip *gc;
02e47980
LW
3218 int ret;
3219
fdeb8e15 3220 VALIDATE_DESC(desc);
ef70bbe1
PZ
3221 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3222 value = !value;
ad17731d
LW
3223 else
3224 value = !!value;
02e47980 3225
4e9439dd
HV
3226 /* GPIOs used for enabled IRQs shall not be set as output */
3227 if (test_bit(FLAG_USED_AS_IRQ, &desc->flags) &&
3228 test_bit(FLAG_IRQ_IS_ENABLED, &desc->flags)) {
02e47980
LW
3229 gpiod_err(desc,
3230 "%s: tried to set a GPIO tied to an IRQ as output\n",
3231 __func__);
3232 return -EIO;
3233 }
3234
30322bcf 3235 gc = desc->gdev->chip;
02e47980
LW
3236 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) {
3237 /* First see if we can enable open drain in hardware */
71479789
TP
3238 ret = gpio_set_config(gc, gpio_chip_hwgpio(desc),
3239 PIN_CONFIG_DRIVE_OPEN_DRAIN);
02e47980
LW
3240 if (!ret)
3241 goto set_output_value;
3242 /* Emulate open drain by not actively driving the line high */
e735244e
BG
3243 if (value) {
3244 ret = gpiod_direction_input(desc);
3245 goto set_output_flag;
3246 }
02e47980
LW
3247 }
3248 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) {
71479789
TP
3249 ret = gpio_set_config(gc, gpio_chip_hwgpio(desc),
3250 PIN_CONFIG_DRIVE_OPEN_SOURCE);
02e47980
LW
3251 if (!ret)
3252 goto set_output_value;
3253 /* Emulate open source by not actively driving the line low */
e735244e
BG
3254 if (!value) {
3255 ret = gpiod_direction_input(desc);
3256 goto set_output_flag;
3257 }
02e47980 3258 } else {
71479789
TP
3259 gpio_set_config(gc, gpio_chip_hwgpio(desc),
3260 PIN_CONFIG_DRIVE_PUSH_PULL);
02e47980
LW
3261 }
3262
3263set_output_value:
2821ae5f
KG
3264 ret = gpio_set_bias(gc, desc);
3265 if (ret)
3266 return ret;
fac9d885 3267 return gpiod_direction_output_raw_commit(desc, value);
e735244e
BG
3268
3269set_output_flag:
3270 /*
3271 * When emulating open-source or open-drain functionalities by not
3272 * actively driving the line (setting mode to input) we still need to
3273 * set the IS_OUT flag or otherwise we won't be able to set the line
3274 * value anymore.
3275 */
3276 if (ret == 0)
3277 set_bit(FLAG_IS_OUT, &desc->flags);
3278 return ret;
ef70bbe1 3279}
79a9becd 3280EXPORT_SYMBOL_GPL(gpiod_direction_output);
d2876d08 3281
c4b5be98 3282/**
950d55f5
TR
3283 * gpiod_set_debounce - sets @debounce time for a GPIO
3284 * @desc: descriptor of the GPIO for which to set debounce time
3285 * @debounce: debounce time in microseconds
65d87656 3286 *
950d55f5
TR
3287 * Returns:
3288 * 0 on success, %-ENOTSUPP if the controller doesn't support setting the
3289 * debounce time.
c4b5be98 3290 */
79a9becd 3291int gpiod_set_debounce(struct gpio_desc *desc, unsigned debounce)
c4b5be98 3292{
c4b5be98 3293 struct gpio_chip *chip;
2956b5d9 3294 unsigned long config;
c4b5be98 3295
fdeb8e15
LW
3296 VALIDATE_DESC(desc);
3297 chip = desc->gdev->chip;
be1a4b13 3298
2956b5d9 3299 config = pinconf_to_config_packed(PIN_CONFIG_INPUT_DEBOUNCE, debounce);
d99f8876 3300 return gpio_do_set_config(chip, gpio_chip_hwgpio(desc), config);
c4b5be98 3301}
79a9becd 3302EXPORT_SYMBOL_GPL(gpiod_set_debounce);
372e722e 3303
e10f72bf
AJ
3304/**
3305 * gpiod_set_transitory - Lose or retain GPIO state on suspend or reset
3306 * @desc: descriptor of the GPIO for which to configure persistence
3307 * @transitory: True to lose state on suspend or reset, false for persistence
3308 *
3309 * Returns:
3310 * 0 on success, otherwise a negative error code.
3311 */
3312int gpiod_set_transitory(struct gpio_desc *desc, bool transitory)
3313{
3314 struct gpio_chip *chip;
3315 unsigned long packed;
3316 int gpio;
3317 int rc;
3318
156dd392 3319 VALIDATE_DESC(desc);
e10f72bf
AJ
3320 /*
3321 * Handle FLAG_TRANSITORY first, enabling queries to gpiolib for
3322 * persistence state.
3323 */
4fc5bfeb 3324 assign_bit(FLAG_TRANSITORY, &desc->flags, transitory);
e10f72bf
AJ
3325
3326 /* If the driver supports it, set the persistence state now */
3327 chip = desc->gdev->chip;
3328 if (!chip->set_config)
3329 return 0;
3330
3331 packed = pinconf_to_config_packed(PIN_CONFIG_PERSIST_STATE,
3332 !transitory);
3333 gpio = gpio_chip_hwgpio(desc);
d99f8876 3334 rc = gpio_do_set_config(chip, gpio, packed);
e10f72bf
AJ
3335 if (rc == -ENOTSUPP) {
3336 dev_dbg(&desc->gdev->dev, "Persistence not supported for GPIO %d\n",
3337 gpio);
3338 return 0;
3339 }
3340
3341 return rc;
3342}
3343EXPORT_SYMBOL_GPL(gpiod_set_transitory);
3344
79a9becd
AC
3345/**
3346 * gpiod_is_active_low - test whether a GPIO is active-low or not
3347 * @desc: the gpio descriptor to test
3348 *
3349 * Returns 1 if the GPIO is active-low, 0 otherwise.
3350 */
3351int gpiod_is_active_low(const struct gpio_desc *desc)
372e722e 3352{
fdeb8e15 3353 VALIDATE_DESC(desc);
79a9becd 3354 return test_bit(FLAG_ACTIVE_LOW, &desc->flags);
372e722e 3355}
79a9becd 3356EXPORT_SYMBOL_GPL(gpiod_is_active_low);
d2876d08 3357
d3a5bcb4
MM
3358/**
3359 * gpiod_toggle_active_low - toggle whether a GPIO is active-low or not
3360 * @desc: the gpio descriptor to change
3361 */
3362void gpiod_toggle_active_low(struct gpio_desc *desc)
3363{
3364 VALIDATE_DESC_VOID(desc);
3365 change_bit(FLAG_ACTIVE_LOW, &desc->flags);
3366}
3367EXPORT_SYMBOL_GPL(gpiod_toggle_active_low);
3368
d2876d08
DB
3369/* I/O calls are only valid after configuration completed; the relevant
3370 * "is this a valid GPIO" error checks should already have been done.
3371 *
3372 * "Get" operations are often inlinable as reading a pin value register,
3373 * and masking the relevant bit in that register.
3374 *
3375 * When "set" operations are inlinable, they involve writing that mask to
3376 * one register to set a low value, or a different register to set it high.
3377 * Otherwise locking is needed, so there may be little value to inlining.
3378 *
3379 *------------------------------------------------------------------------
3380 *
3381 * IMPORTANT!!! The hot paths -- get/set value -- assume that callers
3382 * have requested the GPIO. That can include implicit requesting by
3383 * a direction setting call. Marking a gpio as requested locks its chip
3384 * in memory, guaranteeing that these table lookups need no more locking
3385 * and that gpiochip_remove() will fail.
3386 *
3387 * REVISIT when debugging, consider adding some instrumentation to ensure
3388 * that the GPIO was actually requested.
3389 */
3390
fac9d885 3391static int gpiod_get_raw_value_commit(const struct gpio_desc *desc)
d2876d08
DB
3392{
3393 struct gpio_chip *chip;
372e722e 3394 int offset;
e20538b8 3395 int value;
d2876d08 3396
fdeb8e15 3397 chip = desc->gdev->chip;
372e722e 3398 offset = gpio_chip_hwgpio(desc);
e20538b8 3399 value = chip->get ? chip->get(chip, offset) : -EIO;
723a6303 3400 value = value < 0 ? value : !!value;
372e722e 3401 trace_gpio_value(desc_to_gpio(desc), 1, value);
3f397c21 3402 return value;
d2876d08 3403}
372e722e 3404
eec1d566
LW
3405static int gpio_chip_get_multiple(struct gpio_chip *chip,
3406 unsigned long *mask, unsigned long *bits)
3407{
3408 if (chip->get_multiple) {
3409 return chip->get_multiple(chip, mask, bits);
3410 } else if (chip->get) {
3411 int i, value;
3412
3413 for_each_set_bit(i, mask, chip->ngpio) {
3414 value = chip->get(chip, i);
3415 if (value < 0)
3416 return value;
3417 __assign_bit(i, bits, value);
3418 }
3419 return 0;
3420 }
3421 return -EIO;
3422}
3423
3424int gpiod_get_array_value_complex(bool raw, bool can_sleep,
3425 unsigned int array_size,
3426 struct gpio_desc **desc_array,
77588c14 3427 struct gpio_array *array_info,
b9762beb 3428 unsigned long *value_bitmap)
eec1d566 3429{
d377f56f 3430 int ret, i = 0;
b17566a6
JK
3431
3432 /*
3433 * Validate array_info against desc_array and its size.
3434 * It should immediately follow desc_array if both
3435 * have been obtained from the same gpiod_get_array() call.
3436 */
3437 if (array_info && array_info->desc == desc_array &&
3438 array_size <= array_info->size &&
3439 (void *)array_info == desc_array + array_info->size) {
3440 if (!can_sleep)
3441 WARN_ON(array_info->chip->can_sleep);
3442
d377f56f 3443 ret = gpio_chip_get_multiple(array_info->chip,
b17566a6
JK
3444 array_info->get_mask,
3445 value_bitmap);
d377f56f
LW
3446 if (ret)
3447 return ret;
b17566a6
JK
3448
3449 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3450 bitmap_xor(value_bitmap, value_bitmap,
3451 array_info->invert_mask, array_size);
3452
3453 if (bitmap_full(array_info->get_mask, array_size))
3454 return 0;
3455
3456 i = find_first_zero_bit(array_info->get_mask, array_size);
3457 } else {
3458 array_info = NULL;
3459 }
eec1d566
LW
3460
3461 while (i < array_size) {
3462 struct gpio_chip *chip = desc_array[i]->gdev->chip;
3027743f
LA
3463 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
3464 unsigned long *mask, *bits;
eec1d566
LW
3465 int first, j, ret;
3466
3027743f
LA
3467 if (likely(chip->ngpio <= FASTPATH_NGPIO)) {
3468 mask = fastpath;
3469 } else {
3470 mask = kmalloc_array(2 * BITS_TO_LONGS(chip->ngpio),
3471 sizeof(*mask),
3472 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
3473 if (!mask)
3474 return -ENOMEM;
3475 }
3476
3477 bits = mask + BITS_TO_LONGS(chip->ngpio);
3478 bitmap_zero(mask, chip->ngpio);
3479
eec1d566
LW
3480 if (!can_sleep)
3481 WARN_ON(chip->can_sleep);
3482
3483 /* collect all inputs belonging to the same chip */
3484 first = i;
eec1d566
LW
3485 do {
3486 const struct gpio_desc *desc = desc_array[i];
3487 int hwgpio = gpio_chip_hwgpio(desc);
3488
3489 __set_bit(hwgpio, mask);
3490 i++;
b17566a6
JK
3491
3492 if (array_info)
35ae7f96
JK
3493 i = find_next_zero_bit(array_info->get_mask,
3494 array_size, i);
eec1d566
LW
3495 } while ((i < array_size) &&
3496 (desc_array[i]->gdev->chip == chip));
3497
3498 ret = gpio_chip_get_multiple(chip, mask, bits);
3027743f
LA
3499 if (ret) {
3500 if (mask != fastpath)
3501 kfree(mask);
eec1d566 3502 return ret;
3027743f 3503 }
eec1d566 3504
b17566a6 3505 for (j = first; j < i; ) {
eec1d566
LW
3506 const struct gpio_desc *desc = desc_array[j];
3507 int hwgpio = gpio_chip_hwgpio(desc);
3508 int value = test_bit(hwgpio, bits);
3509
3510 if (!raw && test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3511 value = !value;
b9762beb 3512 __assign_bit(j, value_bitmap, value);
eec1d566 3513 trace_gpio_value(desc_to_gpio(desc), 1, value);
799d5eb4 3514 j++;
b17566a6
JK
3515
3516 if (array_info)
35ae7f96
JK
3517 j = find_next_zero_bit(array_info->get_mask, i,
3518 j);
eec1d566 3519 }
3027743f
LA
3520
3521 if (mask != fastpath)
3522 kfree(mask);
eec1d566
LW
3523 }
3524 return 0;
3525}
3526
d2876d08 3527/**
79a9becd
AC
3528 * gpiod_get_raw_value() - return a gpio's raw value
3529 * @desc: gpio whose value will be returned
d2876d08 3530 *
79a9becd 3531 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 3532 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd 3533 *
827a9b8b 3534 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3535 * complain if the GPIO chip functions potentially sleep.
d2876d08 3536 */
79a9becd 3537int gpiod_get_raw_value(const struct gpio_desc *desc)
d2876d08 3538{
fdeb8e15 3539 VALIDATE_DESC(desc);
3285170f 3540 /* Should be using gpiod_get_raw_value_cansleep() */
fdeb8e15 3541 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3542 return gpiod_get_raw_value_commit(desc);
d2876d08 3543}
79a9becd 3544EXPORT_SYMBOL_GPL(gpiod_get_raw_value);
372e722e 3545
79a9becd
AC
3546/**
3547 * gpiod_get_value() - return a gpio's value
3548 * @desc: gpio whose value will be returned
3549 *
3550 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 3551 * account, or negative errno on failure.
79a9becd 3552 *
827a9b8b 3553 * This function can be called from contexts where we cannot sleep, and will
79a9becd
AC
3554 * complain if the GPIO chip functions potentially sleep.
3555 */
3556int gpiod_get_value(const struct gpio_desc *desc)
372e722e 3557{
79a9becd 3558 int value;
fdeb8e15
LW
3559
3560 VALIDATE_DESC(desc);
3285170f 3561 /* Should be using gpiod_get_value_cansleep() */
fdeb8e15 3562 WARN_ON(desc->gdev->chip->can_sleep);
79a9becd 3563
fac9d885 3564 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
3565 if (value < 0)
3566 return value;
3567
79a9becd
AC
3568 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3569 value = !value;
3570
3571 return value;
372e722e 3572}
79a9becd 3573EXPORT_SYMBOL_GPL(gpiod_get_value);
d2876d08 3574
eec1d566
LW
3575/**
3576 * gpiod_get_raw_array_value() - read raw values from an array of GPIOs
b9762beb 3577 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3578 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3579 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3580 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3581 *
3582 * Read the raw values of the GPIOs, i.e. the values of the physical lines
3583 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
3584 * else an error code.
3585 *
827a9b8b 3586 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
3587 * and it will complain if the GPIO chip functions potentially sleep.
3588 */
3589int gpiod_get_raw_array_value(unsigned int array_size,
b9762beb 3590 struct gpio_desc **desc_array,
77588c14 3591 struct gpio_array *array_info,
b9762beb 3592 unsigned long *value_bitmap)
eec1d566
LW
3593{
3594 if (!desc_array)
3595 return -EINVAL;
3596 return gpiod_get_array_value_complex(true, false, array_size,
77588c14
JK
3597 desc_array, array_info,
3598 value_bitmap);
eec1d566
LW
3599}
3600EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value);
3601
3602/**
3603 * gpiod_get_array_value() - read values from an array of GPIOs
b9762beb 3604 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 3605 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 3606 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3607 * @value_bitmap: bitmap to store the read values
eec1d566
LW
3608 *
3609 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3610 * into account. Return 0 in case of success, else an error code.
3611 *
827a9b8b 3612 * This function can be called from contexts where we cannot sleep,
eec1d566
LW
3613 * and it will complain if the GPIO chip functions potentially sleep.
3614 */
3615int gpiod_get_array_value(unsigned int array_size,
b9762beb 3616 struct gpio_desc **desc_array,
77588c14 3617 struct gpio_array *array_info,
b9762beb 3618 unsigned long *value_bitmap)
eec1d566
LW
3619{
3620 if (!desc_array)
3621 return -EINVAL;
3622 return gpiod_get_array_value_complex(false, false, array_size,
77588c14
JK
3623 desc_array, array_info,
3624 value_bitmap);
eec1d566
LW
3625}
3626EXPORT_SYMBOL_GPL(gpiod_get_array_value);
3627
aca5ce14 3628/*
fac9d885 3629 * gpio_set_open_drain_value_commit() - Set the open drain gpio's value.
79a9becd 3630 * @desc: gpio descriptor whose state need to be set.
20a8a968 3631 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
aca5ce14 3632 */
fac9d885 3633static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value)
aca5ce14 3634{
d377f56f 3635 int ret = 0;
fdeb8e15 3636 struct gpio_chip *chip = desc->gdev->chip;
372e722e
AC
3637 int offset = gpio_chip_hwgpio(desc);
3638
aca5ce14 3639 if (value) {
d377f56f 3640 ret = chip->direction_input(chip, offset);
aca5ce14 3641 } else {
d377f56f
LW
3642 ret = chip->direction_output(chip, offset, 0);
3643 if (!ret)
372e722e 3644 set_bit(FLAG_IS_OUT, &desc->flags);
aca5ce14 3645 }
d377f56f
LW
3646 trace_gpio_direction(desc_to_gpio(desc), value, ret);
3647 if (ret < 0)
6424de5a
MB
3648 gpiod_err(desc,
3649 "%s: Error in set_value for open drain err %d\n",
d377f56f 3650 __func__, ret);
aca5ce14
LD
3651}
3652
25553ff0 3653/*
79a9becd
AC
3654 * _gpio_set_open_source_value() - Set the open source gpio's value.
3655 * @desc: gpio descriptor whose state need to be set.
20a8a968 3656 * @value: Non-zero for setting it HIGH otherwise it will set to LOW.
25553ff0 3657 */
fac9d885 3658static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value)
25553ff0 3659{
d377f56f 3660 int ret = 0;
fdeb8e15 3661 struct gpio_chip *chip = desc->gdev->chip;
372e722e
AC
3662 int offset = gpio_chip_hwgpio(desc);
3663
25553ff0 3664 if (value) {
d377f56f
LW
3665 ret = chip->direction_output(chip, offset, 1);
3666 if (!ret)
372e722e 3667 set_bit(FLAG_IS_OUT, &desc->flags);
25553ff0 3668 } else {
d377f56f 3669 ret = chip->direction_input(chip, offset);
25553ff0 3670 }
d377f56f
LW
3671 trace_gpio_direction(desc_to_gpio(desc), !value, ret);
3672 if (ret < 0)
6424de5a
MB
3673 gpiod_err(desc,
3674 "%s: Error in set_value for open source err %d\n",
d377f56f 3675 __func__, ret);
25553ff0
LD
3676}
3677
fac9d885 3678static void gpiod_set_raw_value_commit(struct gpio_desc *desc, bool value)
d2876d08
DB
3679{
3680 struct gpio_chip *chip;
3681
fdeb8e15 3682 chip = desc->gdev->chip;
372e722e 3683 trace_gpio_value(desc_to_gpio(desc), 0, value);
02e47980 3684 chip->set(chip, gpio_chip_hwgpio(desc), value);
372e722e
AC
3685}
3686
5f424243
RI
3687/*
3688 * set multiple outputs on the same chip;
3689 * use the chip's set_multiple function if available;
3690 * otherwise set the outputs sequentially;
3691 * @mask: bit mask array; one bit per output; BITS_PER_LONG bits per word
3692 * defines which outputs are to be changed
3693 * @bits: bit value array; one bit per output; BITS_PER_LONG bits per word
3694 * defines the values the outputs specified by mask are to be set to
3695 */
3696static void gpio_chip_set_multiple(struct gpio_chip *chip,
3697 unsigned long *mask, unsigned long *bits)
3698{
3699 if (chip->set_multiple) {
3700 chip->set_multiple(chip, mask, bits);
3701 } else {
5e4e6fb3
AS
3702 unsigned int i;
3703
3704 /* set outputs if the corresponding mask bit is set */
3705 for_each_set_bit(i, mask, chip->ngpio)
3706 chip->set(chip, i, test_bit(i, bits));
5f424243
RI
3707 }
3708}
3709
3027743f 3710int gpiod_set_array_value_complex(bool raw, bool can_sleep,
3c940660
GU
3711 unsigned int array_size,
3712 struct gpio_desc **desc_array,
3713 struct gpio_array *array_info,
3714 unsigned long *value_bitmap)
5f424243
RI
3715{
3716 int i = 0;
3717
b17566a6
JK
3718 /*
3719 * Validate array_info against desc_array and its size.
3720 * It should immediately follow desc_array if both
3721 * have been obtained from the same gpiod_get_array() call.
3722 */
3723 if (array_info && array_info->desc == desc_array &&
3724 array_size <= array_info->size &&
3725 (void *)array_info == desc_array + array_info->size) {
3726 if (!can_sleep)
3727 WARN_ON(array_info->chip->can_sleep);
3728
3729 if (!raw && !bitmap_empty(array_info->invert_mask, array_size))
3730 bitmap_xor(value_bitmap, value_bitmap,
3731 array_info->invert_mask, array_size);
3732
3733 gpio_chip_set_multiple(array_info->chip, array_info->set_mask,
3734 value_bitmap);
3735
3736 if (bitmap_full(array_info->set_mask, array_size))
3737 return 0;
3738
3739 i = find_first_zero_bit(array_info->set_mask, array_size);
3740 } else {
3741 array_info = NULL;
3742 }
3743
5f424243 3744 while (i < array_size) {
fdeb8e15 3745 struct gpio_chip *chip = desc_array[i]->gdev->chip;
3027743f
LA
3746 unsigned long fastpath[2 * BITS_TO_LONGS(FASTPATH_NGPIO)];
3747 unsigned long *mask, *bits;
5f424243
RI
3748 int count = 0;
3749
3027743f
LA
3750 if (likely(chip->ngpio <= FASTPATH_NGPIO)) {
3751 mask = fastpath;
3752 } else {
3753 mask = kmalloc_array(2 * BITS_TO_LONGS(chip->ngpio),
3754 sizeof(*mask),
3755 can_sleep ? GFP_KERNEL : GFP_ATOMIC);
3756 if (!mask)
3757 return -ENOMEM;
3758 }
3759
3760 bits = mask + BITS_TO_LONGS(chip->ngpio);
3761 bitmap_zero(mask, chip->ngpio);
3762
38e003f4 3763 if (!can_sleep)
5f424243 3764 WARN_ON(chip->can_sleep);
38e003f4 3765
5f424243
RI
3766 do {
3767 struct gpio_desc *desc = desc_array[i];
3768 int hwgpio = gpio_chip_hwgpio(desc);
b9762beb 3769 int value = test_bit(i, value_bitmap);
5f424243 3770
b17566a6
JK
3771 /*
3772 * Pins applicable for fast input but not for
3773 * fast output processing may have been already
3774 * inverted inside the fast path, skip them.
3775 */
3776 if (!raw && !(array_info &&
3777 test_bit(i, array_info->invert_mask)) &&
3778 test_bit(FLAG_ACTIVE_LOW, &desc->flags))
5f424243
RI
3779 value = !value;
3780 trace_gpio_value(desc_to_gpio(desc), 0, value);
3781 /*
3782 * collect all normal outputs belonging to the same chip
3783 * open drain and open source outputs are set individually
3784 */
02e47980 3785 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags) && !raw) {
fac9d885 3786 gpio_set_open_drain_value_commit(desc, value);
02e47980 3787 } else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags) && !raw) {
fac9d885 3788 gpio_set_open_source_value_commit(desc, value);
5f424243
RI
3789 } else {
3790 __set_bit(hwgpio, mask);
4fc5bfeb 3791 __assign_bit(hwgpio, bits, value);
5f424243
RI
3792 count++;
3793 }
3794 i++;
b17566a6
JK
3795
3796 if (array_info)
35ae7f96
JK
3797 i = find_next_zero_bit(array_info->set_mask,
3798 array_size, i);
fdeb8e15
LW
3799 } while ((i < array_size) &&
3800 (desc_array[i]->gdev->chip == chip));
5f424243 3801 /* push collected bits to outputs */
38e003f4 3802 if (count != 0)
5f424243 3803 gpio_chip_set_multiple(chip, mask, bits);
3027743f
LA
3804
3805 if (mask != fastpath)
3806 kfree(mask);
5f424243 3807 }
3027743f 3808 return 0;
5f424243
RI
3809}
3810
d2876d08 3811/**
79a9becd
AC
3812 * gpiod_set_raw_value() - assign a gpio's raw value
3813 * @desc: gpio whose value will be assigned
d2876d08 3814 * @value: value to assign
d2876d08 3815 *
79a9becd
AC
3816 * Set the raw value of the GPIO, i.e. the value of its physical line without
3817 * regard for its ACTIVE_LOW status.
3818 *
827a9b8b 3819 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3820 * complain if the GPIO chip functions potentially sleep.
d2876d08 3821 */
79a9becd 3822void gpiod_set_raw_value(struct gpio_desc *desc, int value)
372e722e 3823{
fdeb8e15 3824 VALIDATE_DESC_VOID(desc);
3285170f 3825 /* Should be using gpiod_set_raw_value_cansleep() */
fdeb8e15 3826 WARN_ON(desc->gdev->chip->can_sleep);
fac9d885 3827 gpiod_set_raw_value_commit(desc, value);
d2876d08 3828}
79a9becd 3829EXPORT_SYMBOL_GPL(gpiod_set_raw_value);
d2876d08 3830
1e77fc82
GU
3831/**
3832 * gpiod_set_value_nocheck() - set a GPIO line value without checking
3833 * @desc: the descriptor to set the value on
3834 * @value: value to set
3835 *
3836 * This sets the value of a GPIO line backing a descriptor, applying
3837 * different semantic quirks like active low and open drain/source
3838 * handling.
3839 */
3840static void gpiod_set_value_nocheck(struct gpio_desc *desc, int value)
3841{
3842 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
3843 value = !value;
3844 if (test_bit(FLAG_OPEN_DRAIN, &desc->flags))
3845 gpio_set_open_drain_value_commit(desc, value);
3846 else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags))
3847 gpio_set_open_source_value_commit(desc, value);
3848 else
3849 gpiod_set_raw_value_commit(desc, value);
3850}
3851
d2876d08 3852/**
79a9becd
AC
3853 * gpiod_set_value() - assign a gpio's value
3854 * @desc: gpio whose value will be assigned
3855 * @value: value to assign
3856 *
02e47980
LW
3857 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW,
3858 * OPEN_DRAIN and OPEN_SOURCE flags into account.
d2876d08 3859 *
827a9b8b 3860 * This function can be called from contexts where we cannot sleep, and will
79a9becd 3861 * complain if the GPIO chip functions potentially sleep.
d2876d08 3862 */
79a9becd 3863void gpiod_set_value(struct gpio_desc *desc, int value)
d2876d08 3864{
fdeb8e15 3865 VALIDATE_DESC_VOID(desc);
3285170f 3866 /* Should be using gpiod_set_value_cansleep() */
fdeb8e15 3867 WARN_ON(desc->gdev->chip->can_sleep);
1e77fc82 3868 gpiod_set_value_nocheck(desc, value);
372e722e 3869}
79a9becd 3870EXPORT_SYMBOL_GPL(gpiod_set_value);
d2876d08 3871
5f424243 3872/**
3fff99bc 3873 * gpiod_set_raw_array_value() - assign values to an array of GPIOs
b9762beb 3874 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3875 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3876 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3877 * @value_bitmap: bitmap of values to assign
5f424243
RI
3878 *
3879 * Set the raw values of the GPIOs, i.e. the values of the physical lines
3880 * without regard for their ACTIVE_LOW status.
3881 *
827a9b8b 3882 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3883 * complain if the GPIO chip functions potentially sleep.
3884 */
3027743f 3885int gpiod_set_raw_array_value(unsigned int array_size,
3c940660
GU
3886 struct gpio_desc **desc_array,
3887 struct gpio_array *array_info,
3888 unsigned long *value_bitmap)
5f424243
RI
3889{
3890 if (!desc_array)
3027743f
LA
3891 return -EINVAL;
3892 return gpiod_set_array_value_complex(true, false, array_size,
77588c14 3893 desc_array, array_info, value_bitmap);
5f424243 3894}
3fff99bc 3895EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value);
5f424243
RI
3896
3897/**
3fff99bc 3898 * gpiod_set_array_value() - assign values to an array of GPIOs
b9762beb 3899 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 3900 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 3901 * @array_info: information on applicability of fast bitmap processing path
b9762beb 3902 * @value_bitmap: bitmap of values to assign
5f424243
RI
3903 *
3904 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
3905 * into account.
3906 *
827a9b8b 3907 * This function can be called from contexts where we cannot sleep, and will
5f424243
RI
3908 * complain if the GPIO chip functions potentially sleep.
3909 */
cf9af0d5
GU
3910int gpiod_set_array_value(unsigned int array_size,
3911 struct gpio_desc **desc_array,
3912 struct gpio_array *array_info,
3913 unsigned long *value_bitmap)
5f424243
RI
3914{
3915 if (!desc_array)
cf9af0d5
GU
3916 return -EINVAL;
3917 return gpiod_set_array_value_complex(false, false, array_size,
3918 desc_array, array_info,
3919 value_bitmap);
5f424243 3920}
3fff99bc 3921EXPORT_SYMBOL_GPL(gpiod_set_array_value);
5f424243 3922
d2876d08 3923/**
79a9becd
AC
3924 * gpiod_cansleep() - report whether gpio value access may sleep
3925 * @desc: gpio to check
d2876d08 3926 *
d2876d08 3927 */
79a9becd 3928int gpiod_cansleep(const struct gpio_desc *desc)
372e722e 3929{
fdeb8e15
LW
3930 VALIDATE_DESC(desc);
3931 return desc->gdev->chip->can_sleep;
d2876d08 3932}
79a9becd 3933EXPORT_SYMBOL_GPL(gpiod_cansleep);
d2876d08 3934
90b39402
LW
3935/**
3936 * gpiod_set_consumer_name() - set the consumer name for the descriptor
3937 * @desc: gpio to set the consumer name on
3938 * @name: the new consumer name
3939 */
18534df4 3940int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name)
90b39402 3941{
18534df4
MS
3942 VALIDATE_DESC(desc);
3943 if (name) {
3944 name = kstrdup_const(name, GFP_KERNEL);
3945 if (!name)
3946 return -ENOMEM;
3947 }
3948
3949 kfree_const(desc->label);
3950 desc_set_label(desc, name);
3951
3952 return 0;
90b39402
LW
3953}
3954EXPORT_SYMBOL_GPL(gpiod_set_consumer_name);
3955
0f6d504e 3956/**
79a9becd
AC
3957 * gpiod_to_irq() - return the IRQ corresponding to a GPIO
3958 * @desc: gpio whose IRQ will be returned (already requested)
0f6d504e 3959 *
79a9becd
AC
3960 * Return the IRQ corresponding to the passed GPIO, or an error code in case of
3961 * error.
0f6d504e 3962 */
79a9becd 3963int gpiod_to_irq(const struct gpio_desc *desc)
0f6d504e 3964{
4c37ce86
LW
3965 struct gpio_chip *chip;
3966 int offset;
0f6d504e 3967
79bb71bd
LW
3968 /*
3969 * Cannot VALIDATE_DESC() here as gpiod_to_irq() consumer semantics
3970 * requires this function to not return zero on an invalid descriptor
3971 * but rather a negative error number.
3972 */
bfbbe44d 3973 if (!desc || IS_ERR(desc) || !desc->gdev || !desc->gdev->chip)
79bb71bd
LW
3974 return -EINVAL;
3975
fdeb8e15 3976 chip = desc->gdev->chip;
372e722e 3977 offset = gpio_chip_hwgpio(desc);
4c37ce86
LW
3978 if (chip->to_irq) {
3979 int retirq = chip->to_irq(chip, offset);
3980
3981 /* Zero means NO_IRQ */
3982 if (!retirq)
3983 return -ENXIO;
3984
3985 return retirq;
3986 }
3987 return -ENXIO;
0f6d504e 3988}
79a9becd 3989EXPORT_SYMBOL_GPL(gpiod_to_irq);
0f6d504e 3990
d468bf9e 3991/**
e3a2e878 3992 * gpiochip_lock_as_irq() - lock a GPIO to be used as IRQ
d74be6df
AC
3993 * @chip: the chip the GPIO to lock belongs to
3994 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
3995 *
3996 * This is used directly by GPIO drivers that want to lock down
f438acdf 3997 * a certain GPIO line to be used for IRQs.
d468bf9e 3998 */
e3a2e878 3999int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset)
372e722e 4000{
9c10280d
LW
4001 struct gpio_desc *desc;
4002
4003 desc = gpiochip_get_desc(chip, offset);
4004 if (IS_ERR(desc))
4005 return PTR_ERR(desc);
4006
60f8339e
LW
4007 /*
4008 * If it's fast: flush the direction setting if something changed
4009 * behind our back
4010 */
4011 if (!chip->can_sleep && chip->get_direction) {
80956790 4012 int dir = gpiod_get_direction(desc);
9c10280d 4013
36b31279
AS
4014 if (dir < 0) {
4015 chip_err(chip, "%s: cannot get GPIO direction\n",
4016 __func__);
4017 return dir;
4018 }
9c10280d 4019 }
d468bf9e 4020
9c10280d 4021 if (test_bit(FLAG_IS_OUT, &desc->flags)) {
d74be6df 4022 chip_err(chip,
b1911710
AS
4023 "%s: tried to flag a GPIO set as output for IRQ\n",
4024 __func__);
d468bf9e
LW
4025 return -EIO;
4026 }
4027
9c10280d 4028 set_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 4029 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
4030
4031 /*
4032 * If the consumer has not set up a label (such as when the
4033 * IRQ is referenced from .to_irq()) we set up a label here
4034 * so it is clear this is used as an interrupt.
4035 */
4036 if (!desc->label)
4037 desc_set_label(desc, "interrupt");
4038
d468bf9e 4039 return 0;
372e722e 4040}
e3a2e878 4041EXPORT_SYMBOL_GPL(gpiochip_lock_as_irq);
d2876d08 4042
d468bf9e 4043/**
e3a2e878 4044 * gpiochip_unlock_as_irq() - unlock a GPIO used as IRQ
d74be6df
AC
4045 * @chip: the chip the GPIO to lock belongs to
4046 * @offset: the offset of the GPIO to lock as IRQ
d468bf9e
LW
4047 *
4048 * This is used directly by GPIO drivers that want to indicate
4049 * that a certain GPIO is no longer used exclusively for IRQ.
d2876d08 4050 */
e3a2e878 4051void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset)
d468bf9e 4052{
3940c34a
LW
4053 struct gpio_desc *desc;
4054
4055 desc = gpiochip_get_desc(chip, offset);
4056 if (IS_ERR(desc))
d468bf9e 4057 return;
d2876d08 4058
3940c34a 4059 clear_bit(FLAG_USED_AS_IRQ, &desc->flags);
4e9439dd 4060 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
3940c34a
LW
4061
4062 /* If we only had this marking, erase it */
4063 if (desc->label && !strcmp(desc->label, "interrupt"))
4064 desc_set_label(desc, NULL);
d468bf9e 4065}
e3a2e878 4066EXPORT_SYMBOL_GPL(gpiochip_unlock_as_irq);
d468bf9e 4067
4e9439dd
HV
4068void gpiochip_disable_irq(struct gpio_chip *chip, unsigned int offset)
4069{
4070 struct gpio_desc *desc = gpiochip_get_desc(chip, offset);
4071
4072 if (!IS_ERR(desc) &&
4073 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags)))
4074 clear_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
4075}
4076EXPORT_SYMBOL_GPL(gpiochip_disable_irq);
4077
4078void gpiochip_enable_irq(struct gpio_chip *chip, unsigned int offset)
4079{
4080 struct gpio_desc *desc = gpiochip_get_desc(chip, offset);
4081
4082 if (!IS_ERR(desc) &&
4083 !WARN_ON(!test_bit(FLAG_USED_AS_IRQ, &desc->flags))) {
4084 WARN_ON(test_bit(FLAG_IS_OUT, &desc->flags));
4085 set_bit(FLAG_IRQ_IS_ENABLED, &desc->flags);
4086 }
4087}
4088EXPORT_SYMBOL_GPL(gpiochip_enable_irq);
4089
6cee3821
LW
4090bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset)
4091{
4092 if (offset >= chip->ngpio)
4093 return false;
4094
4095 return test_bit(FLAG_USED_AS_IRQ, &chip->gpiodev->descs[offset].flags);
4096}
4097EXPORT_SYMBOL_GPL(gpiochip_line_is_irq);
4098
4e6b8238
HV
4099int gpiochip_reqres_irq(struct gpio_chip *chip, unsigned int offset)
4100{
4101 int ret;
4102
4103 if (!try_module_get(chip->gpiodev->owner))
4104 return -ENODEV;
4105
4106 ret = gpiochip_lock_as_irq(chip, offset);
4107 if (ret) {
4108 chip_err(chip, "unable to lock HW IRQ %u for IRQ\n", offset);
4109 module_put(chip->gpiodev->owner);
4110 return ret;
4111 }
4112 return 0;
4113}
4114EXPORT_SYMBOL_GPL(gpiochip_reqres_irq);
4115
4116void gpiochip_relres_irq(struct gpio_chip *chip, unsigned int offset)
4117{
4118 gpiochip_unlock_as_irq(chip, offset);
4119 module_put(chip->gpiodev->owner);
4120}
4121EXPORT_SYMBOL_GPL(gpiochip_relres_irq);
4122
143b65d6
LW
4123bool gpiochip_line_is_open_drain(struct gpio_chip *chip, unsigned int offset)
4124{
4125 if (offset >= chip->ngpio)
4126 return false;
4127
4128 return test_bit(FLAG_OPEN_DRAIN, &chip->gpiodev->descs[offset].flags);
4129}
4130EXPORT_SYMBOL_GPL(gpiochip_line_is_open_drain);
4131
4132bool gpiochip_line_is_open_source(struct gpio_chip *chip, unsigned int offset)
4133{
4134 if (offset >= chip->ngpio)
4135 return false;
4136
4137 return test_bit(FLAG_OPEN_SOURCE, &chip->gpiodev->descs[offset].flags);
4138}
4139EXPORT_SYMBOL_GPL(gpiochip_line_is_open_source);
4140
05f479bf
CK
4141bool gpiochip_line_is_persistent(struct gpio_chip *chip, unsigned int offset)
4142{
4143 if (offset >= chip->ngpio)
4144 return false;
4145
e10f72bf 4146 return !test_bit(FLAG_TRANSITORY, &chip->gpiodev->descs[offset].flags);
05f479bf
CK
4147}
4148EXPORT_SYMBOL_GPL(gpiochip_line_is_persistent);
4149
79a9becd
AC
4150/**
4151 * gpiod_get_raw_value_cansleep() - return a gpio's raw value
4152 * @desc: gpio whose value will be returned
4153 *
4154 * Return the GPIO's raw value, i.e. the value of the physical line disregarding
e20538b8 4155 * its ACTIVE_LOW status, or negative errno on failure.
79a9becd
AC
4156 *
4157 * This function is to be called from contexts that can sleep.
d2876d08 4158 */
79a9becd 4159int gpiod_get_raw_value_cansleep(const struct gpio_desc *desc)
d2876d08 4160{
d2876d08 4161 might_sleep_if(extra_checks);
fdeb8e15 4162 VALIDATE_DESC(desc);
fac9d885 4163 return gpiod_get_raw_value_commit(desc);
d2876d08 4164}
79a9becd 4165EXPORT_SYMBOL_GPL(gpiod_get_raw_value_cansleep);
372e722e 4166
79a9becd
AC
4167/**
4168 * gpiod_get_value_cansleep() - return a gpio's value
4169 * @desc: gpio whose value will be returned
4170 *
4171 * Return the GPIO's logical value, i.e. taking the ACTIVE_LOW status into
e20538b8 4172 * account, or negative errno on failure.
79a9becd
AC
4173 *
4174 * This function is to be called from contexts that can sleep.
4175 */
4176int gpiod_get_value_cansleep(const struct gpio_desc *desc)
d2876d08 4177{
3f397c21 4178 int value;
d2876d08
DB
4179
4180 might_sleep_if(extra_checks);
fdeb8e15 4181 VALIDATE_DESC(desc);
fac9d885 4182 value = gpiod_get_raw_value_commit(desc);
e20538b8
BA
4183 if (value < 0)
4184 return value;
4185
79a9becd
AC
4186 if (test_bit(FLAG_ACTIVE_LOW, &desc->flags))
4187 value = !value;
4188
3f397c21 4189 return value;
d2876d08 4190}
79a9becd 4191EXPORT_SYMBOL_GPL(gpiod_get_value_cansleep);
372e722e 4192
eec1d566
LW
4193/**
4194 * gpiod_get_raw_array_value_cansleep() - read raw values from an array of GPIOs
b9762beb 4195 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 4196 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 4197 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4198 * @value_bitmap: bitmap to store the read values
eec1d566
LW
4199 *
4200 * Read the raw values of the GPIOs, i.e. the values of the physical lines
4201 * without regard for their ACTIVE_LOW status. Return 0 in case of success,
4202 * else an error code.
4203 *
4204 * This function is to be called from contexts that can sleep.
4205 */
4206int gpiod_get_raw_array_value_cansleep(unsigned int array_size,
4207 struct gpio_desc **desc_array,
77588c14 4208 struct gpio_array *array_info,
b9762beb 4209 unsigned long *value_bitmap)
eec1d566
LW
4210{
4211 might_sleep_if(extra_checks);
4212 if (!desc_array)
4213 return -EINVAL;
4214 return gpiod_get_array_value_complex(true, true, array_size,
77588c14
JK
4215 desc_array, array_info,
4216 value_bitmap);
eec1d566
LW
4217}
4218EXPORT_SYMBOL_GPL(gpiod_get_raw_array_value_cansleep);
4219
4220/**
4221 * gpiod_get_array_value_cansleep() - read values from an array of GPIOs
b9762beb 4222 * @array_size: number of elements in the descriptor array / value bitmap
eec1d566 4223 * @desc_array: array of GPIO descriptors whose values will be read
77588c14 4224 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4225 * @value_bitmap: bitmap to store the read values
eec1d566
LW
4226 *
4227 * Read the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
4228 * into account. Return 0 in case of success, else an error code.
4229 *
4230 * This function is to be called from contexts that can sleep.
4231 */
4232int gpiod_get_array_value_cansleep(unsigned int array_size,
4233 struct gpio_desc **desc_array,
77588c14 4234 struct gpio_array *array_info,
b9762beb 4235 unsigned long *value_bitmap)
eec1d566
LW
4236{
4237 might_sleep_if(extra_checks);
4238 if (!desc_array)
4239 return -EINVAL;
4240 return gpiod_get_array_value_complex(false, true, array_size,
77588c14
JK
4241 desc_array, array_info,
4242 value_bitmap);
eec1d566
LW
4243}
4244EXPORT_SYMBOL_GPL(gpiod_get_array_value_cansleep);
4245
79a9becd
AC
4246/**
4247 * gpiod_set_raw_value_cansleep() - assign a gpio's raw value
4248 * @desc: gpio whose value will be assigned
4249 * @value: value to assign
4250 *
4251 * Set the raw value of the GPIO, i.e. the value of its physical line without
4252 * regard for its ACTIVE_LOW status.
4253 *
4254 * This function is to be called from contexts that can sleep.
4255 */
4256void gpiod_set_raw_value_cansleep(struct gpio_desc *desc, int value)
372e722e 4257{
d2876d08 4258 might_sleep_if(extra_checks);
fdeb8e15 4259 VALIDATE_DESC_VOID(desc);
fac9d885 4260 gpiod_set_raw_value_commit(desc, value);
372e722e 4261}
79a9becd 4262EXPORT_SYMBOL_GPL(gpiod_set_raw_value_cansleep);
d2876d08 4263
79a9becd
AC
4264/**
4265 * gpiod_set_value_cansleep() - assign a gpio's value
4266 * @desc: gpio whose value will be assigned
4267 * @value: value to assign
4268 *
4269 * Set the logical value of the GPIO, i.e. taking its ACTIVE_LOW status into
4270 * account
4271 *
4272 * This function is to be called from contexts that can sleep.
4273 */
4274void gpiod_set_value_cansleep(struct gpio_desc *desc, int value)
d2876d08 4275{
d2876d08 4276 might_sleep_if(extra_checks);
fdeb8e15 4277 VALIDATE_DESC_VOID(desc);
1e77fc82 4278 gpiod_set_value_nocheck(desc, value);
372e722e 4279}
79a9becd 4280EXPORT_SYMBOL_GPL(gpiod_set_value_cansleep);
d2876d08 4281
5f424243 4282/**
3fff99bc 4283 * gpiod_set_raw_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 4284 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4285 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4286 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4287 * @value_bitmap: bitmap of values to assign
5f424243
RI
4288 *
4289 * Set the raw values of the GPIOs, i.e. the values of the physical lines
4290 * without regard for their ACTIVE_LOW status.
4291 *
4292 * This function is to be called from contexts that can sleep.
4293 */
3027743f 4294int gpiod_set_raw_array_value_cansleep(unsigned int array_size,
3c940660
GU
4295 struct gpio_desc **desc_array,
4296 struct gpio_array *array_info,
4297 unsigned long *value_bitmap)
5f424243
RI
4298{
4299 might_sleep_if(extra_checks);
4300 if (!desc_array)
3027743f
LA
4301 return -EINVAL;
4302 return gpiod_set_array_value_complex(true, true, array_size, desc_array,
77588c14 4303 array_info, value_bitmap);
5f424243 4304}
3fff99bc 4305EXPORT_SYMBOL_GPL(gpiod_set_raw_array_value_cansleep);
5f424243 4306
3946d187
DT
4307/**
4308 * gpiod_add_lookup_tables() - register GPIO device consumers
4309 * @tables: list of tables of consumers to register
4310 * @n: number of tables in the list
4311 */
4312void gpiod_add_lookup_tables(struct gpiod_lookup_table **tables, size_t n)
4313{
4314 unsigned int i;
4315
4316 mutex_lock(&gpio_lookup_lock);
4317
4318 for (i = 0; i < n; i++)
4319 list_add_tail(&tables[i]->list, &gpio_lookup_list);
4320
4321 mutex_unlock(&gpio_lookup_lock);
4322}
4323
5f424243 4324/**
3fff99bc 4325 * gpiod_set_array_value_cansleep() - assign values to an array of GPIOs
b9762beb 4326 * @array_size: number of elements in the descriptor array / value bitmap
5f424243 4327 * @desc_array: array of GPIO descriptors whose values will be assigned
77588c14 4328 * @array_info: information on applicability of fast bitmap processing path
b9762beb 4329 * @value_bitmap: bitmap of values to assign
5f424243
RI
4330 *
4331 * Set the logical values of the GPIOs, i.e. taking their ACTIVE_LOW status
4332 * into account.
4333 *
4334 * This function is to be called from contexts that can sleep.
4335 */
cf9af0d5
GU
4336int gpiod_set_array_value_cansleep(unsigned int array_size,
4337 struct gpio_desc **desc_array,
4338 struct gpio_array *array_info,
4339 unsigned long *value_bitmap)
5f424243
RI
4340{
4341 might_sleep_if(extra_checks);
4342 if (!desc_array)
cf9af0d5
GU
4343 return -EINVAL;
4344 return gpiod_set_array_value_complex(false, true, array_size,
4345 desc_array, array_info,
4346 value_bitmap);
5f424243 4347}
3fff99bc 4348EXPORT_SYMBOL_GPL(gpiod_set_array_value_cansleep);
5f424243 4349
bae48da2 4350/**
ad824783
AC
4351 * gpiod_add_lookup_table() - register GPIO device consumers
4352 * @table: table of consumers to register
bae48da2 4353 */
ad824783 4354void gpiod_add_lookup_table(struct gpiod_lookup_table *table)
bae48da2
AC
4355{
4356 mutex_lock(&gpio_lookup_lock);
4357
ad824783 4358 list_add_tail(&table->list, &gpio_lookup_list);
bae48da2
AC
4359
4360 mutex_unlock(&gpio_lookup_lock);
4361}
226b2242 4362EXPORT_SYMBOL_GPL(gpiod_add_lookup_table);
bae48da2 4363
be9015ab
SK
4364/**
4365 * gpiod_remove_lookup_table() - unregister GPIO device consumers
4366 * @table: table of consumers to unregister
4367 */
4368void gpiod_remove_lookup_table(struct gpiod_lookup_table *table)
4369{
4370 mutex_lock(&gpio_lookup_lock);
4371
4372 list_del(&table->list);
4373
4374 mutex_unlock(&gpio_lookup_lock);
4375}
226b2242 4376EXPORT_SYMBOL_GPL(gpiod_remove_lookup_table);
be9015ab 4377
a411e81e
BG
4378/**
4379 * gpiod_add_hogs() - register a set of GPIO hogs from machine code
4380 * @hogs: table of gpio hog entries with a zeroed sentinel at the end
4381 */
4382void gpiod_add_hogs(struct gpiod_hog *hogs)
4383{
4384 struct gpio_chip *chip;
4385 struct gpiod_hog *hog;
4386
4387 mutex_lock(&gpio_machine_hogs_mutex);
4388
4389 for (hog = &hogs[0]; hog->chip_label; hog++) {
4390 list_add_tail(&hog->list, &gpio_machine_hogs);
4391
4392 /*
4393 * The chip may have been registered earlier, so check if it
4394 * exists and, if so, try to hog the line now.
4395 */
4396 chip = find_chip_by_name(hog->chip_label);
4397 if (chip)
4398 gpiochip_machine_hog(chip, hog);
4399 }
4400
4401 mutex_unlock(&gpio_machine_hogs_mutex);
4402}
4403EXPORT_SYMBOL_GPL(gpiod_add_hogs);
4404
ad824783 4405static struct gpiod_lookup_table *gpiod_find_lookup_table(struct device *dev)
bae48da2
AC
4406{
4407 const char *dev_id = dev ? dev_name(dev) : NULL;
ad824783 4408 struct gpiod_lookup_table *table;
bae48da2
AC
4409
4410 mutex_lock(&gpio_lookup_lock);
4411
ad824783
AC
4412 list_for_each_entry(table, &gpio_lookup_list, list) {
4413 if (table->dev_id && dev_id) {
4414 /*
4415 * Valid strings on both ends, must be identical to have
4416 * a match
4417 */
4418 if (!strcmp(table->dev_id, dev_id))
4419 goto found;
4420 } else {
4421 /*
4422 * One of the pointers is NULL, so both must be to have
4423 * a match
4424 */
4425 if (dev_id == table->dev_id)
4426 goto found;
4427 }
4428 }
4429 table = NULL;
bae48da2 4430
ad824783
AC
4431found:
4432 mutex_unlock(&gpio_lookup_lock);
4433 return table;
4434}
bae48da2 4435
ad824783 4436static struct gpio_desc *gpiod_find(struct device *dev, const char *con_id,
fed7026a 4437 unsigned int idx, unsigned long *flags)
ad824783 4438{
2a3cf6a3 4439 struct gpio_desc *desc = ERR_PTR(-ENOENT);
ad824783
AC
4440 struct gpiod_lookup_table *table;
4441 struct gpiod_lookup *p;
bae48da2 4442
ad824783
AC
4443 table = gpiod_find_lookup_table(dev);
4444 if (!table)
4445 return desc;
bae48da2 4446
ad824783
AC
4447 for (p = &table->table[0]; p->chip_label; p++) {
4448 struct gpio_chip *chip;
bae48da2 4449
ad824783 4450 /* idx must always match exactly */
bae48da2
AC
4451 if (p->idx != idx)
4452 continue;
4453
ad824783
AC
4454 /* If the lookup entry has a con_id, require exact match */
4455 if (p->con_id && (!con_id || strcmp(p->con_id, con_id)))
4456 continue;
bae48da2 4457
ad824783 4458 chip = find_chip_by_name(p->chip_label);
bae48da2 4459
ad824783 4460 if (!chip) {
8853daf3
JK
4461 /*
4462 * As the lookup table indicates a chip with
4463 * p->chip_label should exist, assume it may
4464 * still appear later and let the interested
4465 * consumer be probed again or let the Deferred
4466 * Probe infrastructure handle the error.
4467 */
4468 dev_warn(dev, "cannot find GPIO chip %s, deferring\n",
4469 p->chip_label);
4470 return ERR_PTR(-EPROBE_DEFER);
ad824783 4471 }
bae48da2 4472
ad824783 4473 if (chip->ngpio <= p->chip_hwnum) {
2a3cf6a3 4474 dev_err(dev,
d935bd50
GU
4475 "requested GPIO %u (%u) is out of range [0..%u] for chip %s\n",
4476 idx, p->chip_hwnum, chip->ngpio - 1,
4477 chip->label);
2a3cf6a3 4478 return ERR_PTR(-EINVAL);
bae48da2 4479 }
bae48da2 4480
bb1e88cc 4481 desc = gpiochip_get_desc(chip, p->chip_hwnum);
ad824783 4482 *flags = p->flags;
bae48da2 4483
2a3cf6a3 4484 return desc;
bae48da2
AC
4485 }
4486
bae48da2
AC
4487 return desc;
4488}
4489
66858527
RI
4490static int platform_gpio_count(struct device *dev, const char *con_id)
4491{
4492 struct gpiod_lookup_table *table;
4493 struct gpiod_lookup *p;
4494 unsigned int count = 0;
4495
4496 table = gpiod_find_lookup_table(dev);
4497 if (!table)
4498 return -ENOENT;
4499
4500 for (p = &table->table[0]; p->chip_label; p++) {
4501 if ((con_id && p->con_id && !strcmp(con_id, p->con_id)) ||
4502 (!con_id && !p->con_id))
4503 count++;
4504 }
4505 if (!count)
4506 return -ENOENT;
4507
4508 return count;
4509}
4510
13949fa9
DT
4511/**
4512 * fwnode_gpiod_get_index - obtain a GPIO from firmware node
4513 * @fwnode: handle of the firmware node
4514 * @con_id: function within the GPIO consumer
4515 * @index: index of the GPIO to obtain for the consumer
4516 * @flags: GPIO initialization flags
4517 * @label: label to attach to the requested GPIO
4518 *
4519 * This function can be used for drivers that get their configuration
4520 * from opaque firmware.
4521 *
4522 * The function properly finds the corresponding GPIO using whatever is the
4523 * underlying firmware interface and then makes sure that the GPIO
4524 * descriptor is requested before it is returned to the caller.
4525 *
4526 * Returns:
4527 * On successful request the GPIO pin is configured in accordance with
4528 * provided @flags.
4529 *
4530 * In case of error an ERR_PTR() is returned.
4531 */
4532struct gpio_desc *fwnode_gpiod_get_index(struct fwnode_handle *fwnode,
4533 const char *con_id, int index,
4534 enum gpiod_flags flags,
4535 const char *label)
4536{
4537 struct gpio_desc *desc;
4538 char prop_name[32]; /* 32 is max size of property name */
4539 unsigned int i;
4540
4541 for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) {
4542 if (con_id)
4543 snprintf(prop_name, sizeof(prop_name), "%s-%s",
4544 con_id, gpio_suffixes[i]);
4545 else
4546 snprintf(prop_name, sizeof(prop_name), "%s",
4547 gpio_suffixes[i]);
4548
4549 desc = fwnode_get_named_gpiod(fwnode, prop_name, index, flags,
4550 label);
4551 if (!IS_ERR(desc) || (PTR_ERR(desc) != -ENOENT))
4552 break;
4553 }
4554
4555 return desc;
4556}
4557EXPORT_SYMBOL_GPL(fwnode_gpiod_get_index);
4558
66858527
RI
4559/**
4560 * gpiod_count - return the number of GPIOs associated with a device / function
4561 * or -ENOENT if no GPIO has been assigned to the requested function
4562 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4563 * @con_id: function within the GPIO consumer
4564 */
4565int gpiod_count(struct device *dev, const char *con_id)
4566{
4567 int count = -ENOENT;
4568
4569 if (IS_ENABLED(CONFIG_OF) && dev && dev->of_node)
f626d6df 4570 count = of_gpio_get_count(dev, con_id);
66858527
RI
4571 else if (IS_ENABLED(CONFIG_ACPI) && dev && ACPI_HANDLE(dev))
4572 count = acpi_gpio_count(dev, con_id);
4573
4574 if (count < 0)
4575 count = platform_gpio_count(dev, con_id);
4576
4577 return count;
4578}
4579EXPORT_SYMBOL_GPL(gpiod_count);
4580
bae48da2 4581/**
0879162f 4582 * gpiod_get - obtain a GPIO for a given GPIO function
ad824783 4583 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2 4584 * @con_id: function within the GPIO consumer
39b2bbe3 4585 * @flags: optional GPIO initialization flags
bae48da2
AC
4586 *
4587 * Return the GPIO descriptor corresponding to the function con_id of device
2a3cf6a3 4588 * dev, -ENOENT if no GPIO has been assigned to the requested function, or
20a8a968 4589 * another IS_ERR() code if an error occurred while trying to acquire the GPIO.
bae48da2 4590 */
b17d1bf1 4591struct gpio_desc *__must_check gpiod_get(struct device *dev, const char *con_id,
39b2bbe3 4592 enum gpiod_flags flags)
bae48da2 4593{
39b2bbe3 4594 return gpiod_get_index(dev, con_id, 0, flags);
bae48da2 4595}
b17d1bf1 4596EXPORT_SYMBOL_GPL(gpiod_get);
bae48da2 4597
29a1f233
TR
4598/**
4599 * gpiod_get_optional - obtain an optional GPIO for a given GPIO function
4600 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4601 * @con_id: function within the GPIO consumer
39b2bbe3 4602 * @flags: optional GPIO initialization flags
29a1f233
TR
4603 *
4604 * This is equivalent to gpiod_get(), except that when no GPIO was assigned to
4605 * the requested function it will return NULL. This is convenient for drivers
4606 * that need to handle optional GPIOs.
4607 */
b17d1bf1 4608struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
39b2bbe3
AC
4609 const char *con_id,
4610 enum gpiod_flags flags)
29a1f233 4611{
39b2bbe3 4612 return gpiod_get_index_optional(dev, con_id, 0, flags);
29a1f233 4613}
b17d1bf1 4614EXPORT_SYMBOL_GPL(gpiod_get_optional);
29a1f233 4615
f625d460
BP
4616
4617/**
4618 * gpiod_configure_flags - helper function to configure a given GPIO
4619 * @desc: gpio whose value will be assigned
4620 * @con_id: function within the GPIO consumer
fed7026a
AS
4621 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4622 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4623 * @dflags: gpiod_flags - optional GPIO initialization flags
4624 *
4625 * Return 0 on success, -ENOENT if no GPIO has been assigned to the
4626 * requested function and/or index, or another IS_ERR() code if an error
4627 * occurred while trying to acquire the GPIO.
4628 */
c29fd9eb 4629int gpiod_configure_flags(struct gpio_desc *desc, const char *con_id,
85b03b30 4630 unsigned long lflags, enum gpiod_flags dflags)
f625d460 4631{
d377f56f 4632 int ret;
f625d460 4633
85b03b30
JH
4634 if (lflags & GPIO_ACTIVE_LOW)
4635 set_bit(FLAG_ACTIVE_LOW, &desc->flags);
f926dfc1 4636
85b03b30
JH
4637 if (lflags & GPIO_OPEN_DRAIN)
4638 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
f926dfc1
LW
4639 else if (dflags & GPIOD_FLAGS_BIT_OPEN_DRAIN) {
4640 /*
4641 * This enforces open drain mode from the consumer side.
4642 * This is necessary for some busses like I2C, but the lookup
4643 * should *REALLY* have specified them as open drain in the
4644 * first place, so print a little warning here.
4645 */
4646 set_bit(FLAG_OPEN_DRAIN, &desc->flags);
4647 gpiod_warn(desc,
4648 "enforced open drain please flag it properly in DT/ACPI DSDT/board file\n");
4649 }
4650
85b03b30
JH
4651 if (lflags & GPIO_OPEN_SOURCE)
4652 set_bit(FLAG_OPEN_SOURCE, &desc->flags);
e10f72bf 4653
d449991c
TP
4654 if ((lflags & GPIO_PULL_UP) && (lflags & GPIO_PULL_DOWN)) {
4655 gpiod_err(desc,
4656 "both pull-up and pull-down enabled, invalid configuration\n");
4657 return -EINVAL;
4658 }
4659
4660 if (lflags & GPIO_PULL_UP)
4661 set_bit(FLAG_PULL_UP, &desc->flags);
4662 else if (lflags & GPIO_PULL_DOWN)
4663 set_bit(FLAG_PULL_DOWN, &desc->flags);
4664
d377f56f
LW
4665 ret = gpiod_set_transitory(desc, (lflags & GPIO_TRANSITORY));
4666 if (ret < 0)
4667 return ret;
85b03b30 4668
f625d460
BP
4669 /* No particular flag request, return here... */
4670 if (!(dflags & GPIOD_FLAGS_BIT_DIR_SET)) {
4671 pr_debug("no flags found for %s\n", con_id);
4672 return 0;
4673 }
4674
4675 /* Process flags */
4676 if (dflags & GPIOD_FLAGS_BIT_DIR_OUT)
d377f56f 4677 ret = gpiod_direction_output(desc,
ad17731d 4678 !!(dflags & GPIOD_FLAGS_BIT_DIR_VAL));
f625d460 4679 else
d377f56f 4680 ret = gpiod_direction_input(desc);
f625d460 4681
d377f56f 4682 return ret;
f625d460
BP
4683}
4684
bae48da2
AC
4685/**
4686 * gpiod_get_index - obtain a GPIO from a multi-index GPIO function
fdd6a5fe 4687 * @dev: GPIO consumer, can be NULL for system-global GPIOs
bae48da2
AC
4688 * @con_id: function within the GPIO consumer
4689 * @idx: index of the GPIO to obtain in the consumer
39b2bbe3 4690 * @flags: optional GPIO initialization flags
bae48da2
AC
4691 *
4692 * This variant of gpiod_get() allows to access GPIOs other than the first
4693 * defined one for functions that define several GPIOs.
4694 *
2a3cf6a3
AC
4695 * Return a valid GPIO descriptor, -ENOENT if no GPIO has been assigned to the
4696 * requested function and/or index, or another IS_ERR() code if an error
20a8a968 4697 * occurred while trying to acquire the GPIO.
bae48da2 4698 */
b17d1bf1 4699struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
bae48da2 4700 const char *con_id,
39b2bbe3
AC
4701 unsigned int idx,
4702 enum gpiod_flags flags)
bae48da2 4703{
2d6c06f5 4704 unsigned long lookupflags = GPIO_LOOKUP_FLAGS_DEFAULT;
35c5d7fd 4705 struct gpio_desc *desc = NULL;
d377f56f 4706 int ret;
7d18f0a1
LW
4707 /* Maybe we have a device name, maybe not */
4708 const char *devname = dev ? dev_name(dev) : "?";
bae48da2
AC
4709
4710 dev_dbg(dev, "GPIO lookup for consumer %s\n", con_id);
4711
4d8440b9
RW
4712 if (dev) {
4713 /* Using device tree? */
4714 if (IS_ENABLED(CONFIG_OF) && dev->of_node) {
4715 dev_dbg(dev, "using device tree for GPIO lookup\n");
4716 desc = of_find_gpio(dev, con_id, idx, &lookupflags);
4717 } else if (ACPI_COMPANION(dev)) {
4718 dev_dbg(dev, "using ACPI for GPIO lookup\n");
a31f5c3a 4719 desc = acpi_find_gpio(dev, con_id, idx, &flags, &lookupflags);
4d8440b9 4720 }
35c5d7fd
AC
4721 }
4722
4723 /*
4724 * Either we are not using DT or ACPI, or their lookup did not return
4725 * a result. In that case, use platform lookup as a fallback.
4726 */
2a3cf6a3 4727 if (!desc || desc == ERR_PTR(-ENOENT)) {
43a8785a 4728 dev_dbg(dev, "using lookup tables for GPIO lookup\n");
39b2bbe3 4729 desc = gpiod_find(dev, con_id, idx, &lookupflags);
bae48da2
AC
4730 }
4731
4732 if (IS_ERR(desc)) {
9d5a1f2c 4733 dev_dbg(dev, "No GPIO consumer %s found\n", con_id);
bae48da2
AC
4734 return desc;
4735 }
4736
7d18f0a1
LW
4737 /*
4738 * If a connection label was passed use that, else attempt to use
4739 * the device name as label
4740 */
d377f56f
LW
4741 ret = gpiod_request(desc, con_id ? con_id : devname);
4742 if (ret < 0) {
4743 if (ret == -EBUSY && flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE) {
b0ce7b29
LW
4744 /*
4745 * This happens when there are several consumers for
4746 * the same GPIO line: we just return here without
4747 * further initialization. It is a bit if a hack.
4748 * This is necessary to support fixed regulators.
4749 *
4750 * FIXME: Make this more sane and safe.
4751 */
4752 dev_info(dev, "nonexclusive access to GPIO for %s\n",
4753 con_id ? con_id : devname);
4754 return desc;
4755 } else {
d377f56f 4756 return ERR_PTR(ret);
b0ce7b29
LW
4757 }
4758 }
bae48da2 4759
d377f56f 4760 ret = gpiod_configure_flags(desc, con_id, lookupflags, flags);
6392cca4 4761 if (ret < 0) {
39b2bbe3 4762 dev_dbg(dev, "setup of GPIO %s failed\n", con_id);
6392cca4
LW
4763 gpiod_put(desc);
4764 return ERR_PTR(ret);
4765 }
4766
4767 return desc;
4768}
b17d1bf1 4769EXPORT_SYMBOL_GPL(gpiod_get_index);
6392cca4 4770
40b73183
MW
4771/**
4772 * fwnode_get_named_gpiod - obtain a GPIO from firmware node
4773 * @fwnode: handle of the firmware node
4774 * @propname: name of the firmware property representing the GPIO
6392cca4 4775 * @index: index of the GPIO to obtain for the consumer
a264d10f 4776 * @dflags: GPIO initialization flags
950d55f5 4777 * @label: label to attach to the requested GPIO
40b73183
MW
4778 *
4779 * This function can be used for drivers that get their configuration
6392cca4 4780 * from opaque firmware.
40b73183 4781 *
6392cca4 4782 * The function properly finds the corresponding GPIO using whatever is the
40b73183
MW
4783 * underlying firmware interface and then makes sure that the GPIO
4784 * descriptor is requested before it is returned to the caller.
4785 *
950d55f5 4786 * Returns:
ff21378a 4787 * On successful request the GPIO pin is configured in accordance with
a264d10f
AS
4788 * provided @dflags.
4789 *
40b73183
MW
4790 * In case of error an ERR_PTR() is returned.
4791 */
4792struct gpio_desc *fwnode_get_named_gpiod(struct fwnode_handle *fwnode,
537b94da 4793 const char *propname, int index,
b2987d74
AS
4794 enum gpiod_flags dflags,
4795 const char *label)
40b73183 4796{
2d6c06f5 4797 unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT;
40b73183 4798 struct gpio_desc *desc = ERR_PTR(-ENODEV);
40b73183
MW
4799 int ret;
4800
4801 if (!fwnode)
4802 return ERR_PTR(-EINVAL);
4803
4804 if (is_of_node(fwnode)) {
6392cca4
LW
4805 desc = gpiod_get_from_of_node(to_of_node(fwnode),
4806 propname, index,
4807 dflags,
4808 label);
4809 return desc;
40b73183
MW
4810 } else if (is_acpi_node(fwnode)) {
4811 struct acpi_gpio_info info;
4812
537b94da 4813 desc = acpi_node_get_gpiod(fwnode, propname, index, &info);
6392cca4
LW
4814 if (IS_ERR(desc))
4815 return desc;
40b73183 4816
6392cca4 4817 acpi_gpio_update_gpiod_flags(&dflags, &info);
606be344 4818 acpi_gpio_update_gpiod_lookup_flags(&lflags, &info);
6392cca4 4819 }
40b73183 4820
6392cca4 4821 /* Currently only ACPI takes this path */
b2987d74 4822 ret = gpiod_request(desc, label);
85b03b30
JH
4823 if (ret)
4824 return ERR_PTR(ret);
4825
a264d10f
AS
4826 ret = gpiod_configure_flags(desc, propname, lflags, dflags);
4827 if (ret < 0) {
4828 gpiod_put(desc);
4829 return ERR_PTR(ret);
90b665f6
LP
4830 }
4831
40b73183
MW
4832 return desc;
4833}
4834EXPORT_SYMBOL_GPL(fwnode_get_named_gpiod);
4835
29a1f233
TR
4836/**
4837 * gpiod_get_index_optional - obtain an optional GPIO from a multi-index GPIO
4838 * function
4839 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4840 * @con_id: function within the GPIO consumer
4841 * @index: index of the GPIO to obtain in the consumer
39b2bbe3 4842 * @flags: optional GPIO initialization flags
29a1f233
TR
4843 *
4844 * This is equivalent to gpiod_get_index(), except that when no GPIO with the
4845 * specified index was assigned to the requested function it will return NULL.
4846 * This is convenient for drivers that need to handle optional GPIOs.
4847 */
b17d1bf1 4848struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
29a1f233 4849 const char *con_id,
39b2bbe3
AC
4850 unsigned int index,
4851 enum gpiod_flags flags)
29a1f233
TR
4852{
4853 struct gpio_desc *desc;
4854
39b2bbe3 4855 desc = gpiod_get_index(dev, con_id, index, flags);
29a1f233
TR
4856 if (IS_ERR(desc)) {
4857 if (PTR_ERR(desc) == -ENOENT)
4858 return NULL;
4859 }
4860
4861 return desc;
4862}
b17d1bf1 4863EXPORT_SYMBOL_GPL(gpiod_get_index_optional);
29a1f233 4864
f625d460
BP
4865/**
4866 * gpiod_hog - Hog the specified GPIO desc given the provided flags
4867 * @desc: gpio whose value will be assigned
4868 * @name: gpio line name
fed7026a
AS
4869 * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from
4870 * of_find_gpio() or of_get_gpio_hog()
f625d460
BP
4871 * @dflags: gpiod_flags - optional GPIO initialization flags
4872 */
4873int gpiod_hog(struct gpio_desc *desc, const char *name,
4874 unsigned long lflags, enum gpiod_flags dflags)
4875{
4876 struct gpio_chip *chip;
4877 struct gpio_desc *local_desc;
4878 int hwnum;
d377f56f 4879 int ret;
f625d460
BP
4880
4881 chip = gpiod_to_chip(desc);
4882 hwnum = gpio_chip_hwgpio(desc);
4883
5923ea6c
LW
4884 local_desc = gpiochip_request_own_desc(chip, hwnum, name,
4885 lflags, dflags);
f625d460 4886 if (IS_ERR(local_desc)) {
d377f56f 4887 ret = PTR_ERR(local_desc);
c31a571d 4888 pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n",
d377f56f
LW
4889 name, chip->label, hwnum, ret);
4890 return ret;
f625d460
BP
4891 }
4892
f625d460
BP
4893 /* Mark GPIO as hogged so it can be identified and removed later */
4894 set_bit(FLAG_IS_HOGGED, &desc->flags);
4895
4896 pr_info("GPIO line %d (%s) hogged as %s%s\n",
4897 desc_to_gpio(desc), name,
b27f300f
BG
4898 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ? "output" : "input",
4899 (dflags & GPIOD_FLAGS_BIT_DIR_OUT) ?
4900 (dflags & GPIOD_FLAGS_BIT_DIR_VAL) ? "/high" : "/low" : "");
f625d460
BP
4901
4902 return 0;
4903}
4904
4905/**
4906 * gpiochip_free_hogs - Scan gpio-controller chip and release GPIO hog
4907 * @chip: gpio chip to act on
f625d460
BP
4908 */
4909static void gpiochip_free_hogs(struct gpio_chip *chip)
4910{
4911 int id;
4912
4913 for (id = 0; id < chip->ngpio; id++) {
1c3cdb18
LW
4914 if (test_bit(FLAG_IS_HOGGED, &chip->gpiodev->descs[id].flags))
4915 gpiochip_free_own_desc(&chip->gpiodev->descs[id]);
f625d460
BP
4916 }
4917}
4918
66858527
RI
4919/**
4920 * gpiod_get_array - obtain multiple GPIOs from a multi-index GPIO function
4921 * @dev: GPIO consumer, can be NULL for system-global GPIOs
4922 * @con_id: function within the GPIO consumer
4923 * @flags: optional GPIO initialization flags
4924 *
4925 * This function acquires all the GPIOs defined under a given function.
4926 *
4927 * Return a struct gpio_descs containing an array of descriptors, -ENOENT if
4928 * no GPIO has been assigned to the requested function, or another IS_ERR()
4929 * code if an error occurred while trying to acquire the GPIOs.
4930 */
4931struct gpio_descs *__must_check gpiod_get_array(struct device *dev,
4932 const char *con_id,
4933 enum gpiod_flags flags)
4934{
4935 struct gpio_desc *desc;
4936 struct gpio_descs *descs;
bf9346f5
JK
4937 struct gpio_array *array_info = NULL;
4938 struct gpio_chip *chip;
4939 int count, bitmap_size;
66858527
RI
4940
4941 count = gpiod_count(dev, con_id);
4942 if (count < 0)
4943 return ERR_PTR(count);
4944
acafe7e3 4945 descs = kzalloc(struct_size(descs, desc, count), GFP_KERNEL);
66858527
RI
4946 if (!descs)
4947 return ERR_PTR(-ENOMEM);
4948
4949 for (descs->ndescs = 0; descs->ndescs < count; ) {
4950 desc = gpiod_get_index(dev, con_id, descs->ndescs, flags);
4951 if (IS_ERR(desc)) {
4952 gpiod_put_array(descs);
4953 return ERR_CAST(desc);
4954 }
bf9346f5 4955
66858527 4956 descs->desc[descs->ndescs] = desc;
bf9346f5
JK
4957
4958 chip = gpiod_to_chip(desc);
4959 /*
c4c958aa
JK
4960 * If pin hardware number of array member 0 is also 0, select
4961 * its chip as a candidate for fast bitmap processing path.
bf9346f5 4962 */
c4c958aa 4963 if (descs->ndescs == 0 && gpio_chip_hwgpio(desc) == 0) {
bf9346f5
JK
4964 struct gpio_descs *array;
4965
4966 bitmap_size = BITS_TO_LONGS(chip->ngpio > count ?
4967 chip->ngpio : count);
4968
4969 array = kzalloc(struct_size(descs, desc, count) +
4970 struct_size(array_info, invert_mask,
4971 3 * bitmap_size), GFP_KERNEL);
4972 if (!array) {
4973 gpiod_put_array(descs);
4974 return ERR_PTR(-ENOMEM);
4975 }
4976
4977 memcpy(array, descs,
4978 struct_size(descs, desc, descs->ndescs + 1));
4979 kfree(descs);
4980
4981 descs = array;
4982 array_info = (void *)(descs->desc + count);
4983 array_info->get_mask = array_info->invert_mask +
4984 bitmap_size;
4985 array_info->set_mask = array_info->get_mask +
4986 bitmap_size;
4987
4988 array_info->desc = descs->desc;
4989 array_info->size = count;
4990 array_info->chip = chip;
4991 bitmap_set(array_info->get_mask, descs->ndescs,
4992 count - descs->ndescs);
4993 bitmap_set(array_info->set_mask, descs->ndescs,
4994 count - descs->ndescs);
4995 descs->info = array_info;
4996 }
c4c958aa
JK
4997 /* Unmark array members which don't belong to the 'fast' chip */
4998 if (array_info && array_info->chip != chip) {
bf9346f5
JK
4999 __clear_bit(descs->ndescs, array_info->get_mask);
5000 __clear_bit(descs->ndescs, array_info->set_mask);
c4c958aa
JK
5001 }
5002 /*
5003 * Detect array members which belong to the 'fast' chip
5004 * but their pins are not in hardware order.
5005 */
5006 else if (array_info &&
5007 gpio_chip_hwgpio(desc) != descs->ndescs) {
5008 /*
5009 * Don't use fast path if all array members processed so
5010 * far belong to the same chip as this one but its pin
5011 * hardware number is different from its array index.
5012 */
5013 if (bitmap_full(array_info->get_mask, descs->ndescs)) {
5014 array_info = NULL;
5015 } else {
5016 __clear_bit(descs->ndescs,
5017 array_info->get_mask);
5018 __clear_bit(descs->ndescs,
5019 array_info->set_mask);
5020 }
bf9346f5
JK
5021 } else if (array_info) {
5022 /* Exclude open drain or open source from fast output */
5023 if (gpiochip_line_is_open_drain(chip, descs->ndescs) ||
5024 gpiochip_line_is_open_source(chip, descs->ndescs))
5025 __clear_bit(descs->ndescs,
5026 array_info->set_mask);
5027 /* Identify 'fast' pins which require invertion */
5028 if (gpiod_is_active_low(desc))
5029 __set_bit(descs->ndescs,
5030 array_info->invert_mask);
5031 }
5032
66858527
RI
5033 descs->ndescs++;
5034 }
bf9346f5
JK
5035 if (array_info)
5036 dev_dbg(dev,
5037 "GPIO array info: chip=%s, size=%d, get_mask=%lx, set_mask=%lx, invert_mask=%lx\n",
5038 array_info->chip->label, array_info->size,
5039 *array_info->get_mask, *array_info->set_mask,
5040 *array_info->invert_mask);
66858527
RI
5041 return descs;
5042}
5043EXPORT_SYMBOL_GPL(gpiod_get_array);
5044
5045/**
5046 * gpiod_get_array_optional - obtain multiple GPIOs from a multi-index GPIO
5047 * function
5048 * @dev: GPIO consumer, can be NULL for system-global GPIOs
5049 * @con_id: function within the GPIO consumer
5050 * @flags: optional GPIO initialization flags
5051 *
5052 * This is equivalent to gpiod_get_array(), except that when no GPIO was
5053 * assigned to the requested function it will return NULL.
5054 */
5055struct gpio_descs *__must_check gpiod_get_array_optional(struct device *dev,
5056 const char *con_id,
5057 enum gpiod_flags flags)
5058{
5059 struct gpio_descs *descs;
5060
5061 descs = gpiod_get_array(dev, con_id, flags);
45586c70 5062 if (PTR_ERR(descs) == -ENOENT)
66858527
RI
5063 return NULL;
5064
5065 return descs;
5066}
5067EXPORT_SYMBOL_GPL(gpiod_get_array_optional);
5068
bae48da2
AC
5069/**
5070 * gpiod_put - dispose of a GPIO descriptor
5071 * @desc: GPIO descriptor to dispose of
5072 *
5073 * No descriptor can be used after gpiod_put() has been called on it.
5074 */
5075void gpiod_put(struct gpio_desc *desc)
5076{
1d7765ba
AS
5077 if (desc)
5078 gpiod_free(desc);
372e722e 5079}
bae48da2 5080EXPORT_SYMBOL_GPL(gpiod_put);
d2876d08 5081
66858527
RI
5082/**
5083 * gpiod_put_array - dispose of multiple GPIO descriptors
5084 * @descs: struct gpio_descs containing an array of descriptors
5085 */
5086void gpiod_put_array(struct gpio_descs *descs)
5087{
5088 unsigned int i;
5089
5090 for (i = 0; i < descs->ndescs; i++)
5091 gpiod_put(descs->desc[i]);
5092
5093 kfree(descs);
5094}
5095EXPORT_SYMBOL_GPL(gpiod_put_array);
5096
3c702e99
LW
5097static int __init gpiolib_dev_init(void)
5098{
5099 int ret;
5100
5101 /* Register GPIO sysfs bus */
b1911710 5102 ret = bus_register(&gpio_bus_type);
3c702e99
LW
5103 if (ret < 0) {
5104 pr_err("gpiolib: could not register GPIO bus type\n");
5105 return ret;
5106 }
5107
ddd8891e 5108 ret = alloc_chrdev_region(&gpio_devt, 0, GPIO_DEV_MAX, GPIOCHIP_NAME);
3c702e99
LW
5109 if (ret < 0) {
5110 pr_err("gpiolib: failed to allocate char dev region\n");
5111 bus_unregister(&gpio_bus_type);
159f3cd9
GR
5112 } else {
5113 gpiolib_initialized = true;
5114 gpiochip_setup_devs();
3c702e99
LW
5115 }
5116 return ret;
5117}
5118core_initcall(gpiolib_dev_init);
5119
d2876d08
DB
5120#ifdef CONFIG_DEBUG_FS
5121
fdeb8e15 5122static void gpiolib_dbg_show(struct seq_file *s, struct gpio_device *gdev)
d2876d08
DB
5123{
5124 unsigned i;
fdeb8e15
LW
5125 struct gpio_chip *chip = gdev->chip;
5126 unsigned gpio = gdev->base;
5127 struct gpio_desc *gdesc = &gdev->descs[0];
90fd2270
LW
5128 bool is_out;
5129 bool is_irq;
5130 bool active_low;
d2876d08 5131
fdeb8e15 5132 for (i = 0; i < gdev->ngpio; i++, gpio++, gdesc++) {
ced433e2
MP
5133 if (!test_bit(FLAG_REQUESTED, &gdesc->flags)) {
5134 if (gdesc->name) {
5135 seq_printf(s, " gpio-%-3d (%-20.20s)\n",
5136 gpio, gdesc->name);
5137 }
d2876d08 5138 continue;
ced433e2 5139 }
d2876d08 5140
372e722e 5141 gpiod_get_direction(gdesc);
d2876d08 5142 is_out = test_bit(FLAG_IS_OUT, &gdesc->flags);
d468bf9e 5143 is_irq = test_bit(FLAG_USED_AS_IRQ, &gdesc->flags);
90fd2270
LW
5144 active_low = test_bit(FLAG_ACTIVE_LOW, &gdesc->flags);
5145 seq_printf(s, " gpio-%-3d (%-20.20s|%-20.20s) %s %s %s%s",
ced433e2 5146 gpio, gdesc->name ? gdesc->name : "", gdesc->label,
d2876d08 5147 is_out ? "out" : "in ",
1c22a252 5148 chip->get ? (chip->get(chip, i) ? "hi" : "lo") : "? ",
90fd2270
LW
5149 is_irq ? "IRQ " : "",
5150 active_low ? "ACTIVE LOW" : "");
d2876d08
DB
5151 seq_printf(s, "\n");
5152 }
5153}
5154
f9c4a31f 5155static void *gpiolib_seq_start(struct seq_file *s, loff_t *pos)
d2876d08 5156{
362432ae 5157 unsigned long flags;
ff2b1359 5158 struct gpio_device *gdev = NULL;
cb1650d4 5159 loff_t index = *pos;
d2876d08 5160
f9c4a31f 5161 s->private = "";
d2876d08 5162
362432ae 5163 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 5164 list_for_each_entry(gdev, &gpio_devices, list)
362432ae
GL
5165 if (index-- == 0) {
5166 spin_unlock_irqrestore(&gpio_lock, flags);
ff2b1359 5167 return gdev;
f9c4a31f 5168 }
362432ae 5169 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f 5170
cb1650d4 5171 return NULL;
f9c4a31f
TR
5172}
5173
5174static void *gpiolib_seq_next(struct seq_file *s, void *v, loff_t *pos)
5175{
362432ae 5176 unsigned long flags;
ff2b1359 5177 struct gpio_device *gdev = v;
f9c4a31f
TR
5178 void *ret = NULL;
5179
362432ae 5180 spin_lock_irqsave(&gpio_lock, flags);
ff2b1359 5181 if (list_is_last(&gdev->list, &gpio_devices))
cb1650d4
AC
5182 ret = NULL;
5183 else
ff2b1359 5184 ret = list_entry(gdev->list.next, struct gpio_device, list);
362432ae 5185 spin_unlock_irqrestore(&gpio_lock, flags);
f9c4a31f
TR
5186
5187 s->private = "\n";
5188 ++*pos;
5189
5190 return ret;
5191}
5192
5193static void gpiolib_seq_stop(struct seq_file *s, void *v)
5194{
5195}
5196
5197static int gpiolib_seq_show(struct seq_file *s, void *v)
5198{
ff2b1359
LW
5199 struct gpio_device *gdev = v;
5200 struct gpio_chip *chip = gdev->chip;
5201 struct device *parent;
5202
5203 if (!chip) {
5204 seq_printf(s, "%s%s: (dangling chip)", (char *)s->private,
5205 dev_name(&gdev->dev));
5206 return 0;
5207 }
f9c4a31f 5208
ff2b1359
LW
5209 seq_printf(s, "%s%s: GPIOs %d-%d", (char *)s->private,
5210 dev_name(&gdev->dev),
fdeb8e15 5211 gdev->base, gdev->base + gdev->ngpio - 1);
ff2b1359
LW
5212 parent = chip->parent;
5213 if (parent)
5214 seq_printf(s, ", parent: %s/%s",
5215 parent->bus ? parent->bus->name : "no-bus",
5216 dev_name(parent));
f9c4a31f
TR
5217 if (chip->label)
5218 seq_printf(s, ", %s", chip->label);
5219 if (chip->can_sleep)
5220 seq_printf(s, ", can sleep");
5221 seq_printf(s, ":\n");
5222
5223 if (chip->dbg_show)
5224 chip->dbg_show(s, chip);
5225 else
fdeb8e15 5226 gpiolib_dbg_show(s, gdev);
f9c4a31f 5227
d2876d08
DB
5228 return 0;
5229}
5230
f9c4a31f
TR
5231static const struct seq_operations gpiolib_seq_ops = {
5232 .start = gpiolib_seq_start,
5233 .next = gpiolib_seq_next,
5234 .stop = gpiolib_seq_stop,
5235 .show = gpiolib_seq_show,
5236};
5237
d2876d08
DB
5238static int gpiolib_open(struct inode *inode, struct file *file)
5239{
f9c4a31f 5240 return seq_open(file, &gpiolib_seq_ops);
d2876d08
DB
5241}
5242
828c0950 5243static const struct file_operations gpiolib_operations = {
f9c4a31f 5244 .owner = THIS_MODULE,
d2876d08
DB
5245 .open = gpiolib_open,
5246 .read = seq_read,
5247 .llseek = seq_lseek,
f9c4a31f 5248 .release = seq_release,
d2876d08
DB
5249};
5250
5251static int __init gpiolib_debugfs_init(void)
5252{
5253 /* /sys/kernel/debug/gpio */
acc68b0e
GKH
5254 debugfs_create_file("gpio", S_IFREG | S_IRUGO, NULL, NULL,
5255 &gpiolib_operations);
d2876d08
DB
5256 return 0;
5257}
5258subsys_initcall(gpiolib_debugfs_init);
5259
5260#endif /* DEBUG_FS */