Commit | Line | Data |
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27038c3e | 1 | // SPDX-License-Identifier: GPL-2.0+ |
863fbf49 AV |
2 | /* |
3 | * OF helpers for the GPIO API | |
4 | * | |
5 | * Copyright (c) 2007-2008 MontaVista Software, Inc. | |
6 | * | |
7 | * Author: Anton Vorontsov <avorontsov@ru.mvista.com> | |
863fbf49 AV |
8 | */ |
9 | ||
2e13cba8 | 10 | #include <linux/device.h> |
bea4dbee | 11 | #include <linux/err.h> |
863fbf49 AV |
12 | #include <linux/errno.h> |
13 | #include <linux/io.h> | |
380c7ba3 | 14 | #include <linux/module.h> |
863fbf49 | 15 | #include <linux/of.h> |
2e13cba8 | 16 | #include <linux/of_address.h> |
863fbf49 | 17 | #include <linux/of_gpio.h> |
f23f1516 | 18 | #include <linux/pinctrl/pinctrl.h> |
2e13cba8 | 19 | #include <linux/slab.h> |
380c7ba3 AS |
20 | #include <linux/string.h> |
21 | ||
22 | #include <linux/gpio/consumer.h> | |
f625d460 | 23 | #include <linux/gpio/machine.h> |
863fbf49 | 24 | |
1bd6b601 | 25 | #include "gpiolib.h" |
f626d6df LW |
26 | #include "gpiolib-of.h" |
27 | ||
eed5a3bf AS |
28 | /* |
29 | * This is Linux-specific flags. By default controllers' and Linux' mapping | |
30 | * match, but GPIO controllers are free to translate their own flags to | |
31 | * Linux-specific in their .xlate callback. Though, 1:1 mapping is recommended. | |
32 | */ | |
33 | enum of_gpio_flags { | |
34 | OF_GPIO_ACTIVE_LOW = 0x1, | |
35 | OF_GPIO_SINGLE_ENDED = 0x2, | |
36 | OF_GPIO_OPEN_DRAIN = 0x4, | |
37 | OF_GPIO_TRANSITORY = 0x8, | |
38 | OF_GPIO_PULL_UP = 0x10, | |
39 | OF_GPIO_PULL_DOWN = 0x20, | |
40 | OF_GPIO_PULL_DISABLE = 0x40, | |
41 | }; | |
42 | ||
c7835652 DT |
43 | /** |
44 | * of_gpio_named_count() - Count GPIOs for a device | |
45 | * @np: device node to count GPIOs for | |
46 | * @propname: property name containing gpio specifier(s) | |
47 | * | |
48 | * The function returns the count of GPIOs specified for a node. | |
94bd9ce1 | 49 | * NOTE: The empty GPIO specifiers count too. |
c7835652 | 50 | * |
94bd9ce1 AS |
51 | * Returns: |
52 | * Either number of GPIOs defined in the property, or | |
53 | * * %-EINVAL for an incorrectly formed "gpios" property, or | |
54 | * * %-ENOENT for a missing "gpios" property. | |
55 | * | |
56 | * Example:: | |
57 | * | |
58 | * gpios = <0 | |
59 | * &gpio1 1 2 | |
60 | * 0 | |
61 | * &gpio2 3 4>; | |
c7835652 DT |
62 | * |
63 | * The above example defines four GPIOs, two of which are not specified. | |
64 | * This function will return '4' | |
65 | */ | |
66 | static int of_gpio_named_count(const struct device_node *np, | |
67 | const char *propname) | |
68 | { | |
69 | return of_count_phandle_with_args(np, propname, "#gpio-cells"); | |
70 | } | |
71 | ||
71b8f600 LW |
72 | /** |
73 | * of_gpio_spi_cs_get_count() - special GPIO counting for SPI | |
adcad536 | 74 | * @np: Consuming device node |
c5a66b97 LJ |
75 | * @con_id: Function within the GPIO consumer |
76 | * | |
71b8f600 | 77 | * Some elder GPIO controllers need special quirks. Currently we handle |
47267732 | 78 | * the Freescale and PPC GPIO controller with bindings that doesn't use the |
71b8f600 LW |
79 | * established "cs-gpios" for chip selects but instead rely on |
80 | * "gpios" for the chip select lines. If we detect this, we redirect | |
81 | * the counting of "cs-gpios" to count "gpios" transparent to the | |
82 | * driver. | |
94bd9ce1 AS |
83 | * |
84 | * Returns: | |
85 | * Either number of GPIOs defined in the property, or | |
86 | * * %-EINVAL for an incorrectly formed "gpios" property, or | |
87 | * * %-ENOENT for a missing "gpios" property. | |
71b8f600 | 88 | */ |
adcad536 AS |
89 | static int of_gpio_spi_cs_get_count(const struct device_node *np, |
90 | const char *con_id) | |
71b8f600 | 91 | { |
71b8f600 LW |
92 | if (!IS_ENABLED(CONFIG_SPI_MASTER)) |
93 | return 0; | |
94 | if (!con_id || strcmp(con_id, "cs")) | |
95 | return 0; | |
96 | if (!of_device_is_compatible(np, "fsl,spi") && | |
47267732 LW |
97 | !of_device_is_compatible(np, "aeroflexgaisler,spictrl") && |
98 | !of_device_is_compatible(np, "ibm,ppc4xx-spi")) | |
71b8f600 LW |
99 | return 0; |
100 | return of_gpio_named_count(np, "gpios"); | |
101 | } | |
102 | ||
adcad536 | 103 | int of_gpio_count(const struct fwnode_handle *fwnode, const char *con_id) |
f626d6df | 104 | { |
adcad536 | 105 | const struct device_node *np = to_of_node(fwnode); |
f626d6df LW |
106 | int ret; |
107 | char propname[32]; | |
f626d6df | 108 | |
adcad536 | 109 | ret = of_gpio_spi_cs_get_count(np, con_id); |
71b8f600 LW |
110 | if (ret > 0) |
111 | return ret; | |
112 | ||
ef3d4b94 | 113 | for_each_gpio_property_name(propname, con_id) { |
adcad536 | 114 | ret = of_gpio_named_count(np, propname); |
f626d6df LW |
115 | if (ret > 0) |
116 | break; | |
117 | } | |
118 | return ret ? ret : -ENOENT; | |
119 | } | |
af8b6375 | 120 | |
faf6efd2 KK |
121 | static int of_gpiochip_match_node_and_xlate(struct gpio_chip *chip, |
122 | const void *data) | |
3d0f7cf0 | 123 | { |
faf6efd2 | 124 | const struct of_phandle_args *gpiospec = data; |
c7e9d398 | 125 | |
d59fdbc7 | 126 | return device_match_of_node(&chip->gpiodev->dev, gpiospec->np) && |
d49b48f0 | 127 | chip->of_xlate && |
c7e9d398 | 128 | chip->of_xlate(chip, gpiospec, NULL) >= 0; |
762c2e46 | 129 | } |
3d0f7cf0 | 130 | |
0f21c53c | 131 | static struct gpio_device * |
ee9d5895 | 132 | of_find_gpio_device_by_xlate(const struct of_phandle_args *gpiospec) |
762c2e46 | 133 | { |
0f21c53c | 134 | return gpio_device_find(gpiospec, of_gpiochip_match_node_and_xlate); |
3d0f7cf0 | 135 | } |
3d0f7cf0 | 136 | |
99468c1a MY |
137 | static struct gpio_desc *of_xlate_and_get_gpiod_flags(struct gpio_chip *chip, |
138 | struct of_phandle_args *gpiospec, | |
139 | enum of_gpio_flags *flags) | |
3d0f7cf0 | 140 | { |
3d0f7cf0 GL |
141 | int ret; |
142 | ||
99468c1a MY |
143 | if (chip->of_gpio_n_cells != gpiospec->args_count) |
144 | return ERR_PTR(-EINVAL); | |
145 | ||
146 | ret = chip->of_xlate(chip, gpiospec, flags); | |
147 | if (ret < 0) | |
148 | return ERR_PTR(ret); | |
149 | ||
150 | return gpiochip_get_desc(chip, ret); | |
3d0f7cf0 GL |
151 | } |
152 | ||
e3186e36 DT |
153 | /* |
154 | * Overrides stated polarity of a gpio line and warns when there is a | |
155 | * discrepancy. | |
156 | */ | |
157 | static void of_gpio_quirk_polarity(const struct device_node *np, | |
158 | bool active_high, | |
159 | enum of_gpio_flags *flags) | |
160 | { | |
161 | if (active_high) { | |
162 | if (*flags & OF_GPIO_ACTIVE_LOW) { | |
163 | pr_warn("%s GPIO handle specifies active low - ignored\n", | |
164 | of_node_full_name(np)); | |
165 | *flags &= ~OF_GPIO_ACTIVE_LOW; | |
166 | } | |
167 | } else { | |
168 | if (!(*flags & OF_GPIO_ACTIVE_LOW)) | |
169 | pr_info("%s enforce active low on GPIO handle\n", | |
170 | of_node_full_name(np)); | |
171 | *flags |= OF_GPIO_ACTIVE_LOW; | |
172 | } | |
173 | } | |
174 | ||
99d18d42 DT |
175 | /* |
176 | * This quirk does static polarity overrides in cases where existing | |
177 | * DTS specified incorrect polarity. | |
178 | */ | |
179 | static void of_gpio_try_fixup_polarity(const struct device_node *np, | |
180 | const char *propname, | |
181 | enum of_gpio_flags *flags) | |
182 | { | |
183 | static const struct { | |
184 | const char *compatible; | |
185 | const char *propname; | |
186 | bool active_high; | |
187 | } gpios[] = { | |
7d84a63a | 188 | #if IS_ENABLED(CONFIG_LCD_HX8357) |
99d18d42 DT |
189 | /* |
190 | * Himax LCD controllers used incorrectly named | |
191 | * "gpios-reset" property and also specified wrong | |
192 | * polarity. | |
193 | */ | |
194 | { "himax,hx8357", "gpios-reset", false }, | |
195 | { "himax,hx8369", "gpios-reset", false }, | |
2b9c5364 AS |
196 | #endif |
197 | #if IS_ENABLED(CONFIG_MTD_NAND_JZ4780) | |
3a7fd473 BG |
198 | /* |
199 | * The rb-gpios semantics was undocumented and qi,lb60 (along with | |
200 | * the ingenic driver) got it wrong. The active state encodes the | |
201 | * NAND ready state, which is high level. Since there's no signal | |
202 | * inverter on this board, it should be active-high. Let's fix that | |
203 | * here for older DTs so we can re-use the generic nand_gpio_waitrdy() | |
204 | * helper, and be consistent with what other drivers do. | |
205 | */ | |
206 | { "qi,lb60", "rb-gpios", true }, | |
3645ffaf | 207 | #endif |
20629a48 AS |
208 | #if IS_ENABLED(CONFIG_IEEE802154_CA8210) |
209 | /* | |
210 | * According to the datasheet, the NRST pin 27 is an active-low | |
211 | * signal. However, the device tree schema and admittedly | |
212 | * the out-of-tree implementations have been used for a long | |
213 | * time incorrectly by describing reset GPIO as active-high. | |
214 | */ | |
215 | { "cascoda,ca8210", "reset-gpio", false }, | |
216 | #endif | |
3645ffaf DT |
217 | #if IS_ENABLED(CONFIG_PCI_LANTIQ) |
218 | /* | |
219 | * According to the PCI specification, the RST# pin is an | |
220 | * active-low signal. However, most of the device trees that | |
221 | * have been widely used for a long time incorrectly describe | |
222 | * reset GPIO as active-high, and were also using wrong name | |
223 | * for the property. | |
224 | */ | |
225 | { "lantiq,pci-xway", "gpio-reset", false }, | |
f8d76c2c | 226 | #endif |
4e310626 PF |
227 | #if IS_ENABLED(CONFIG_REGULATOR_S5M8767) |
228 | /* | |
229 | * According to S5M8767, the DVS and DS pin are | |
230 | * active-high signals. However, exynos5250-spring.dts use | |
231 | * active-low setting. | |
232 | */ | |
233 | { "samsung,s5m8767-pmic", "s5m8767,pmic-buck-dvs-gpios", true }, | |
234 | { "samsung,s5m8767-pmic", "s5m8767,pmic-buck-ds-gpios", true }, | |
235 | #endif | |
f8d76c2c DT |
236 | #if IS_ENABLED(CONFIG_TOUCHSCREEN_TSC2005) |
237 | /* | |
238 | * DTS for Nokia N900 incorrectly specified "active high" | |
239 | * polarity for the reset line, while the chip actually | |
240 | * treats it as "active low". | |
241 | */ | |
242 | { "ti,tsc2005", "reset-gpios", false }, | |
99d18d42 DT |
243 | #endif |
244 | }; | |
245 | unsigned int i; | |
246 | ||
247 | for (i = 0; i < ARRAY_SIZE(gpios); i++) { | |
248 | if (of_device_is_compatible(np, gpios[i].compatible) && | |
249 | !strcmp(propname, gpios[i].propname)) { | |
250 | of_gpio_quirk_polarity(np, gpios[i].active_high, flags); | |
251 | break; | |
252 | } | |
253 | } | |
254 | } | |
255 | ||
34cb9352 DT |
256 | static void of_gpio_set_polarity_by_property(const struct device_node *np, |
257 | const char *propname, | |
258 | enum of_gpio_flags *flags) | |
a603a2b8 | 259 | { |
98ac9e4f BG |
260 | const struct device_node *np_compat = np; |
261 | const struct device_node *np_propname = np; | |
34cb9352 DT |
262 | static const struct { |
263 | const char *compatible; | |
264 | const char *gpio_propname; | |
265 | const char *polarity_propname; | |
266 | } gpios[] = { | |
267 | #if IS_ENABLED(CONFIG_FEC) | |
268 | /* Freescale Fast Ethernet Controller */ | |
269 | { "fsl,imx25-fec", "phy-reset-gpios", "phy-reset-active-high" }, | |
270 | { "fsl,imx27-fec", "phy-reset-gpios", "phy-reset-active-high" }, | |
271 | { "fsl,imx28-fec", "phy-reset-gpios", "phy-reset-active-high" }, | |
272 | { "fsl,imx6q-fec", "phy-reset-gpios", "phy-reset-active-high" }, | |
273 | { "fsl,mvf600-fec", "phy-reset-gpios", "phy-reset-active-high" }, | |
274 | { "fsl,imx6sx-fec", "phy-reset-gpios", "phy-reset-active-high" }, | |
275 | { "fsl,imx6ul-fec", "phy-reset-gpios", "phy-reset-active-high" }, | |
276 | { "fsl,imx8mq-fec", "phy-reset-gpios", "phy-reset-active-high" }, | |
277 | { "fsl,imx8qm-fec", "phy-reset-gpios", "phy-reset-active-high" }, | |
278 | { "fsl,s32v234-fec", "phy-reset-gpios", "phy-reset-active-high" }, | |
279 | #endif | |
b8c7a1ac AS |
280 | #if IS_ENABLED(CONFIG_MMC_ATMELMCI) |
281 | { "atmel,hsmci", "cd-gpios", "cd-inverted" }, | |
282 | #endif | |
b8b80348 DT |
283 | #if IS_ENABLED(CONFIG_PCI_IMX6) |
284 | { "fsl,imx6q-pcie", "reset-gpio", "reset-gpio-active-high" }, | |
285 | { "fsl,imx6sx-pcie", "reset-gpio", "reset-gpio-active-high" }, | |
286 | { "fsl,imx6qp-pcie", "reset-gpio", "reset-gpio-active-high" }, | |
287 | { "fsl,imx7d-pcie", "reset-gpio", "reset-gpio-active-high" }, | |
288 | { "fsl,imx8mq-pcie", "reset-gpio", "reset-gpio-active-high" }, | |
289 | { "fsl,imx8mm-pcie", "reset-gpio", "reset-gpio-active-high" }, | |
290 | { "fsl,imx8mp-pcie", "reset-gpio", "reset-gpio-active-high" }, | |
291 | #endif | |
99d18d42 | 292 | |
a603a2b8 LW |
293 | /* |
294 | * The regulator GPIO handles are specified such that the | |
295 | * presence or absence of "enable-active-high" solely controls | |
296 | * the polarity of the GPIO line. Any phandle flags must | |
297 | * be actively ignored. | |
298 | */ | |
34cb9352 DT |
299 | #if IS_ENABLED(CONFIG_REGULATOR_FIXED_VOLTAGE) |
300 | { "regulator-fixed", "gpios", "enable-active-high" }, | |
301 | { "regulator-fixed", "gpio", "enable-active-high" }, | |
302 | { "reg-fixed-voltage", "gpios", "enable-active-high" }, | |
303 | { "reg-fixed-voltage", "gpio", "enable-active-high" }, | |
304 | #endif | |
305 | #if IS_ENABLED(CONFIG_REGULATOR_GPIO) | |
306 | { "regulator-gpio", "enable-gpio", "enable-active-high" }, | |
307 | { "regulator-gpio", "enable-gpios", "enable-active-high" }, | |
308 | #endif | |
309 | }; | |
310 | unsigned int i; | |
311 | bool active_high; | |
312 | ||
98ac9e4f BG |
313 | #if IS_ENABLED(CONFIG_MMC_ATMELMCI) |
314 | /* | |
315 | * The Atmel HSMCI has compatible property in the parent node and | |
316 | * gpio property in a child node | |
317 | */ | |
318 | if (of_device_is_compatible(np->parent, "atmel,hsmci")) { | |
319 | np_compat = np->parent; | |
320 | np_propname = np; | |
321 | } | |
322 | #endif | |
323 | ||
34cb9352 | 324 | for (i = 0; i < ARRAY_SIZE(gpios); i++) { |
98ac9e4f | 325 | if (of_device_is_compatible(np_compat, gpios[i].compatible) && |
34cb9352 | 326 | !strcmp(propname, gpios[i].gpio_propname)) { |
98ac9e4f | 327 | active_high = of_property_read_bool(np_propname, |
34cb9352 DT |
328 | gpios[i].polarity_propname); |
329 | of_gpio_quirk_polarity(np, active_high, flags); | |
330 | break; | |
331 | } | |
a603a2b8 | 332 | } |
34cb9352 DT |
333 | } |
334 | ||
335 | static void of_gpio_flags_quirks(const struct device_node *np, | |
336 | const char *propname, | |
337 | enum of_gpio_flags *flags, | |
338 | int index) | |
339 | { | |
340 | of_gpio_try_fixup_polarity(np, propname, flags); | |
341 | of_gpio_set_polarity_by_property(np, propname, flags); | |
342 | ||
a603a2b8 LW |
343 | /* |
344 | * Legacy open drain handling for fixed voltage regulators. | |
345 | */ | |
346 | if (IS_ENABLED(CONFIG_REGULATOR) && | |
347 | of_device_is_compatible(np, "reg-fixed-voltage") && | |
348 | of_property_read_bool(np, "gpio-open-drain")) { | |
349 | *flags |= (OF_GPIO_SINGLE_ENDED | OF_GPIO_OPEN_DRAIN); | |
350 | pr_info("%s uses legacy open drain flag - update the DTS if you can\n", | |
351 | of_node_full_name(np)); | |
352 | } | |
6953c57a LW |
353 | |
354 | /* | |
355 | * Legacy handling of SPI active high chip select. If we have a | |
356 | * property named "cs-gpios" we need to inspect the child node | |
357 | * to determine if the flags should have inverted semantics. | |
358 | */ | |
da7f1349 | 359 | if (IS_ENABLED(CONFIG_SPI_MASTER) && !strcmp(propname, "cs-gpios") && |
c6789170 | 360 | of_property_present(np, "cs-gpios")) { |
6953c57a LW |
361 | u32 cs; |
362 | int ret; | |
363 | ||
f2c38c96 | 364 | for_each_child_of_node_scoped(np, child) { |
6953c57a | 365 | ret = of_property_read_u32(child, "reg", &cs); |
c1c04cea | 366 | if (ret) |
6953c57a LW |
367 | continue; |
368 | if (cs == index) { | |
369 | /* | |
370 | * SPI children have active low chip selects | |
371 | * by default. This can be specified negatively | |
372 | * by just omitting "spi-cs-high" in the | |
373 | * device node, or actively by tagging on | |
374 | * GPIO_ACTIVE_LOW as flag in the device | |
375 | * tree. If the line is simultaneously | |
376 | * tagged as active low in the device tree | |
377 | * and has the "spi-cs-high" set, we get a | |
378 | * conflict and the "spi-cs-high" flag will | |
379 | * take precedence. | |
380 | */ | |
e3186e36 DT |
381 | bool active_high = of_property_read_bool(child, |
382 | "spi-cs-high"); | |
383 | of_gpio_quirk_polarity(child, active_high, | |
384 | flags); | |
6953c57a LW |
385 | break; |
386 | } | |
387 | } | |
388 | } | |
edc1ef3f MB |
389 | |
390 | /* Legacy handling of stmmac's active-low PHY reset line */ | |
391 | if (IS_ENABLED(CONFIG_STMMAC_ETH) && | |
392 | !strcmp(propname, "snps,reset-gpio") && | |
393 | of_property_read_bool(np, "snps,reset-active-low")) | |
394 | *flags |= OF_GPIO_ACTIVE_LOW; | |
a603a2b8 LW |
395 | } |
396 | ||
863fbf49 | 397 | /** |
af8b6375 | 398 | * of_get_named_gpiod_flags() - Get a GPIO descriptor and flags for GPIO API |
863fbf49 | 399 | * @np: device node to get GPIO from |
a6b09191 | 400 | * @propname: property name containing gpio specifier(s) |
863fbf49 | 401 | * @index: index of the GPIO |
b908b53d | 402 | * @flags: a flags pointer to fill in |
863fbf49 | 403 | * |
94bd9ce1 AS |
404 | * Returns: |
405 | * GPIO descriptor to use with Linux GPIO API, or one of the errno | |
b908b53d AV |
406 | * value on the error condition. If @flags is not NULL the function also fills |
407 | * in flags for the GPIO. | |
863fbf49 | 408 | */ |
e6ae9a83 | 409 | static struct gpio_desc *of_get_named_gpiod_flags(const struct device_node *np, |
af8b6375 | 410 | const char *propname, int index, enum of_gpio_flags *flags) |
863fbf49 | 411 | { |
762c2e46 | 412 | struct of_phandle_args gpiospec; |
762c2e46 | 413 | struct gpio_desc *desc; |
64b60e09 | 414 | int ret; |
3d0f7cf0 | 415 | |
c11e6f0f SB |
416 | ret = of_parse_phandle_with_args_map(np, propname, "gpio", index, |
417 | &gpiospec); | |
64b60e09 | 418 | if (ret) { |
7eb6ce2f RH |
419 | pr_debug("%s: can't parse '%s' property of node '%pOF[%d]'\n", |
420 | __func__, propname, np, index); | |
af8b6375 | 421 | return ERR_PTR(ret); |
863fbf49 AV |
422 | } |
423 | ||
0f21c53c BG |
424 | struct gpio_device *gdev __free(gpio_device_put) = |
425 | of_find_gpio_device_by_xlate(&gpiospec); | |
426 | if (!gdev) { | |
762c2e46 MY |
427 | desc = ERR_PTR(-EPROBE_DEFER); |
428 | goto out; | |
429 | } | |
762c2e46 | 430 | |
0f21c53c BG |
431 | desc = of_xlate_and_get_gpiod_flags(gpio_device_get_chip(gdev), |
432 | &gpiospec, flags); | |
762c2e46 MY |
433 | if (IS_ERR(desc)) |
434 | goto out; | |
863fbf49 | 435 | |
605f2d34 | 436 | if (flags) |
89a5e15b | 437 | of_gpio_flags_quirks(np, propname, flags, index); |
a603a2b8 | 438 | |
7eb6ce2f RH |
439 | pr_debug("%s: parsed '%s' property of node '%pOF[%d]' - status (%d)\n", |
440 | __func__, propname, np, index, | |
762c2e46 MY |
441 | PTR_ERR_OR_ZERO(desc)); |
442 | ||
443 | out: | |
444 | of_node_put(gpiospec.np); | |
445 | ||
446 | return desc; | |
863fbf49 | 447 | } |
863fbf49 | 448 | |
40fc56ee DT |
449 | /** |
450 | * of_get_named_gpio() - Get a GPIO number to use with GPIO API | |
451 | * @np: device node to get GPIO from | |
452 | * @propname: Name of property containing gpio specifier(s) | |
453 | * @index: index of the GPIO | |
454 | * | |
f4028860 BG |
455 | * **DEPRECATED** This function is deprecated and must not be used in new code. |
456 | * | |
94bd9ce1 AS |
457 | * Returns: |
458 | * GPIO number to use with Linux generic GPIO API, or one of the errno | |
40fc56ee DT |
459 | * value on the error condition. |
460 | */ | |
461 | int of_get_named_gpio(const struct device_node *np, const char *propname, | |
462 | int index) | |
f01d9075 AC |
463 | { |
464 | struct gpio_desc *desc; | |
465 | ||
40fc56ee | 466 | desc = of_get_named_gpiod_flags(np, propname, index, NULL); |
f01d9075 AC |
467 | |
468 | if (IS_ERR(desc)) | |
469 | return PTR_ERR(desc); | |
470 | else | |
471 | return desc_to_gpio(desc); | |
472 | } | |
40fc56ee | 473 | EXPORT_SYMBOL_GPL(of_get_named_gpio); |
f01d9075 | 474 | |
d9e7f0e3 DT |
475 | /* Converts gpio_lookup_flags into bitmask of GPIO_* values */ |
476 | static unsigned long of_convert_gpio_flags(enum of_gpio_flags flags) | |
477 | { | |
478 | unsigned long lflags = GPIO_LOOKUP_FLAGS_DEFAULT; | |
479 | ||
480 | if (flags & OF_GPIO_ACTIVE_LOW) | |
481 | lflags |= GPIO_ACTIVE_LOW; | |
482 | ||
483 | if (flags & OF_GPIO_SINGLE_ENDED) { | |
484 | if (flags & OF_GPIO_OPEN_DRAIN) | |
485 | lflags |= GPIO_OPEN_DRAIN; | |
486 | else | |
487 | lflags |= GPIO_OPEN_SOURCE; | |
488 | } | |
489 | ||
490 | if (flags & OF_GPIO_TRANSITORY) | |
491 | lflags |= GPIO_TRANSITORY; | |
492 | ||
493 | if (flags & OF_GPIO_PULL_UP) | |
494 | lflags |= GPIO_PULL_UP; | |
495 | ||
496 | if (flags & OF_GPIO_PULL_DOWN) | |
497 | lflags |= GPIO_PULL_DOWN; | |
498 | ||
499 | if (flags & OF_GPIO_PULL_DISABLE) | |
500 | lflags |= GPIO_PULL_DISABLE; | |
501 | ||
502 | return lflags; | |
503 | } | |
504 | ||
b311c5cb | 505 | static struct gpio_desc *of_find_gpio_rename(struct device_node *np, |
e3023bf8 LW |
506 | const char *con_id, |
507 | unsigned int idx, | |
984914ec | 508 | enum of_gpio_flags *of_flags) |
e3023bf8 | 509 | { |
b311c5cb DT |
510 | static const struct of_rename_gpio { |
511 | const char *con_id; | |
512 | const char *legacy_id; /* NULL - same as con_id */ | |
513 | /* | |
514 | * Compatible string can be set to NULL in case where | |
515 | * matching to a particular compatible is not practical, | |
516 | * but it should only be done for gpio names that have | |
517 | * vendor prefix to reduce risk of false positives. | |
518 | * Addition of such entries is strongly discouraged. | |
519 | */ | |
520 | const char *compatible; | |
521 | } gpios[] = { | |
7d84a63a | 522 | #if IS_ENABLED(CONFIG_LCD_HX8357) |
fbbbcd17 DT |
523 | /* Himax LCD controllers used "gpios-reset" */ |
524 | { "reset", "gpios-reset", "himax,hx8357" }, | |
525 | { "reset", "gpios-reset", "himax,hx8369" }, | |
526 | #endif | |
b311c5cb DT |
527 | #if IS_ENABLED(CONFIG_MFD_ARIZONA) |
528 | { "wlf,reset", NULL, NULL }, | |
529 | #endif | |
eaf1a296 DT |
530 | #if IS_ENABLED(CONFIG_RTC_DRV_MOXART) |
531 | { "rtc-data", "gpio-rtc-data", "moxa,moxart-rtc" }, | |
532 | { "rtc-sclk", "gpio-rtc-sclk", "moxa,moxart-rtc" }, | |
533 | { "rtc-reset", "gpio-rtc-reset", "moxa,moxart-rtc" }, | |
534 | #endif | |
9c2cc717 DT |
535 | #if IS_ENABLED(CONFIG_NFC_MRVL_I2C) |
536 | { "reset", "reset-n-io", "marvell,nfc-i2c" }, | |
537 | #endif | |
538 | #if IS_ENABLED(CONFIG_NFC_MRVL_SPI) | |
539 | { "reset", "reset-n-io", "marvell,nfc-spi" }, | |
540 | #endif | |
541 | #if IS_ENABLED(CONFIG_NFC_MRVL_UART) | |
542 | { "reset", "reset-n-io", "marvell,nfc-uart" }, | |
543 | { "reset", "reset-n-io", "mrvl,nfc-uart" }, | |
544 | #endif | |
3645ffaf | 545 | #if IS_ENABLED(CONFIG_PCI_LANTIQ) |
fbbbcd17 | 546 | /* MIPS Lantiq PCI */ |
3645ffaf | 547 | { "reset", "gpio-reset", "lantiq,pci-xway" }, |
fbbbcd17 | 548 | #endif |
307c593b | 549 | |
b311c5cb DT |
550 | /* |
551 | * Some regulator bindings happened before we managed to | |
552 | * establish that GPIO properties should be named | |
553 | * "foo-gpios" so we have this special kludge for them. | |
554 | */ | |
307c593b | 555 | #if IS_ENABLED(CONFIG_REGULATOR_ARIZONA_LDO1) |
b311c5cb | 556 | { "wlf,ldoena", NULL, NULL }, /* Arizona */ |
307c593b DT |
557 | #endif |
558 | #if IS_ENABLED(CONFIG_REGULATOR_WM8994) | |
b311c5cb DT |
559 | { "wlf,ldo1ena", NULL, NULL }, /* WM8994 */ |
560 | { "wlf,ldo2ena", NULL, NULL }, /* WM8994 */ | |
561 | #endif | |
e3023bf8 | 562 | |
944004eb DT |
563 | #if IS_ENABLED(CONFIG_SND_SOC_CS42L56) |
564 | { "reset", "cirrus,gpio-nreset", "cirrus,cs42l56" }, | |
565 | #endif | |
9e189e80 LW |
566 | #if IS_ENABLED(CONFIG_SND_SOC_MT2701_CS42448) |
567 | { "i2s1-in-sel-gpio1", NULL, "mediatek,mt2701-cs42448-machine" }, | |
568 | { "i2s1-in-sel-gpio2", NULL, "mediatek,mt2701-cs42448-machine" }, | |
569 | #endif | |
fbbbcd17 DT |
570 | #if IS_ENABLED(CONFIG_SND_SOC_TLV320AIC3X) |
571 | { "reset", "gpio-reset", "ti,tlv320aic3x" }, | |
572 | { "reset", "gpio-reset", "ti,tlv320aic33" }, | |
573 | { "reset", "gpio-reset", "ti,tlv320aic3007" }, | |
574 | { "reset", "gpio-reset", "ti,tlv320aic3104" }, | |
575 | { "reset", "gpio-reset", "ti,tlv320aic3106" }, | |
576 | #endif | |
307c593b | 577 | #if IS_ENABLED(CONFIG_SPI_GPIO) |
b311c5cb DT |
578 | /* |
579 | * The SPI GPIO bindings happened before we managed to | |
580 | * establish that GPIO properties should be named | |
581 | * "foo-gpios" so we have this special kludge for them. | |
582 | */ | |
583 | { "miso", "gpio-miso", "spi-gpio" }, | |
584 | { "mosi", "gpio-mosi", "spi-gpio" }, | |
585 | { "sck", "gpio-sck", "spi-gpio" }, | |
307c593b | 586 | #endif |
e3023bf8 | 587 | |
b311c5cb DT |
588 | /* |
589 | * The old Freescale bindings use simply "gpios" as name | |
590 | * for the chip select lines rather than "cs-gpios" like | |
591 | * all other SPI hardware. Allow this specifically for | |
592 | * Freescale and PPC devices. | |
593 | */ | |
307c593b | 594 | #if IS_ENABLED(CONFIG_SPI_FSL_SPI) |
b311c5cb DT |
595 | { "cs", "gpios", "fsl,spi" }, |
596 | { "cs", "gpios", "aeroflexgaisler,spictrl" }, | |
307c593b DT |
597 | #endif |
598 | #if IS_ENABLED(CONFIG_SPI_PPC4xx) | |
b311c5cb DT |
599 | { "cs", "gpios", "ibm,ppc4xx-spi" }, |
600 | #endif | |
307c593b | 601 | |
b311c5cb DT |
602 | #if IS_ENABLED(CONFIG_TYPEC_FUSB302) |
603 | /* | |
604 | * Fairchild FUSB302 host is using undocumented "fcs,int_n" | |
605 | * property without the compulsory "-gpios" suffix. | |
606 | */ | |
607 | { "fcs,int_n", NULL, "fcs,fusb302" }, | |
608 | #endif | |
6a537d48 | 609 | }; |
b311c5cb DT |
610 | struct gpio_desc *desc; |
611 | const char *legacy_id; | |
612 | unsigned int i; | |
6a537d48 LW |
613 | |
614 | if (!con_id) | |
615 | return ERR_PTR(-ENOENT); | |
616 | ||
b311c5cb DT |
617 | for (i = 0; i < ARRAY_SIZE(gpios); i++) { |
618 | if (strcmp(con_id, gpios[i].con_id)) | |
619 | continue; | |
6a537d48 | 620 | |
b311c5cb DT |
621 | if (gpios[i].compatible && |
622 | !of_device_is_compatible(np, gpios[i].compatible)) | |
623 | continue; | |
11c43bb0 | 624 | |
b311c5cb DT |
625 | legacy_id = gpios[i].legacy_id ?: gpios[i].con_id; |
626 | desc = of_get_named_gpiod_flags(np, legacy_id, idx, of_flags); | |
627 | if (!gpiod_not_found(desc)) { | |
628 | pr_info("%s uses legacy gpio name '%s' instead of '%s-gpios'\n", | |
629 | of_node_full_name(np), legacy_id, con_id); | |
630 | return desc; | |
631 | } | |
632 | } | |
6e24826d | 633 | |
b311c5cb | 634 | return ERR_PTR(-ENOENT); |
6e24826d LW |
635 | } |
636 | ||
326c3753 DT |
637 | static struct gpio_desc *of_find_mt2701_gpio(struct device_node *np, |
638 | const char *con_id, | |
639 | unsigned int idx, | |
640 | enum of_gpio_flags *of_flags) | |
641 | { | |
642 | struct gpio_desc *desc; | |
643 | const char *legacy_id; | |
644 | ||
645 | if (!IS_ENABLED(CONFIG_SND_SOC_MT2701_CS42448)) | |
646 | return ERR_PTR(-ENOENT); | |
647 | ||
648 | if (!of_device_is_compatible(np, "mediatek,mt2701-cs42448-machine")) | |
649 | return ERR_PTR(-ENOENT); | |
650 | ||
651 | if (!con_id || strcmp(con_id, "i2s1-in-sel")) | |
652 | return ERR_PTR(-ENOENT); | |
653 | ||
654 | if (idx == 0) | |
655 | legacy_id = "i2s1-in-sel-gpio1"; | |
656 | else if (idx == 1) | |
657 | legacy_id = "i2s1-in-sel-gpio2"; | |
658 | else | |
659 | return ERR_PTR(-ENOENT); | |
660 | ||
661 | desc = of_get_named_gpiod_flags(np, legacy_id, 0, of_flags); | |
662 | if (!gpiod_not_found(desc)) | |
663 | pr_info("%s is using legacy gpio name '%s' instead of '%s-gpios'\n", | |
664 | of_node_full_name(np), legacy_id, con_id); | |
665 | ||
666 | return desc; | |
667 | } | |
668 | ||
3bb5c9dd LW |
669 | /* |
670 | * Trigger sources are special, they allow us to use any GPIO as a LED trigger | |
671 | * and have the name "trigger-sources" no matter which kind of phandle it is | |
672 | * pointing to, whether to a GPIO, a USB host, a network PHY etc. So in this case | |
673 | * we allow looking something up that is not named "foo-gpios". | |
674 | */ | |
675 | static struct gpio_desc *of_find_trigger_gpio(struct device_node *np, | |
676 | const char *con_id, | |
677 | unsigned int idx, | |
678 | enum of_gpio_flags *of_flags) | |
679 | { | |
680 | struct gpio_desc *desc; | |
681 | ||
682 | if (!IS_ENABLED(CONFIG_LEDS_TRIGGER_GPIO)) | |
683 | return ERR_PTR(-ENOENT); | |
684 | ||
685 | if (!con_id || strcmp(con_id, "trigger-sources")) | |
686 | return ERR_PTR(-ENOENT); | |
687 | ||
688 | desc = of_get_named_gpiod_flags(np, con_id, idx, of_flags); | |
689 | if (!gpiod_not_found(desc)) | |
690 | pr_debug("%s is used as a trigger\n", of_node_full_name(np)); | |
691 | ||
692 | return desc; | |
693 | } | |
694 | ||
695 | ||
a2b5e207 DT |
696 | typedef struct gpio_desc *(*of_find_gpio_quirk)(struct device_node *np, |
697 | const char *con_id, | |
698 | unsigned int idx, | |
699 | enum of_gpio_flags *of_flags); | |
700 | static const of_find_gpio_quirk of_find_gpio_quirks[] = { | |
b311c5cb | 701 | of_find_gpio_rename, |
326c3753 | 702 | of_find_mt2701_gpio, |
3bb5c9dd | 703 | of_find_trigger_gpio, |
8b10ca2f | 704 | NULL |
a2b5e207 DT |
705 | }; |
706 | ||
07445ae1 | 707 | struct gpio_desc *of_find_gpio(struct device_node *np, const char *con_id, |
fed7026a | 708 | unsigned int idx, unsigned long *flags) |
ea713bc4 | 709 | { |
ef3d4b94 | 710 | char propname[32]; /* 32 is max size of property name */ |
d563e7f9 | 711 | enum of_gpio_flags of_flags = 0; |
a2b5e207 | 712 | const of_find_gpio_quirk *q; |
ea713bc4 | 713 | struct gpio_desc *desc; |
ea713bc4 | 714 | |
c8582339 | 715 | /* Try GPIO property "foo-gpios" and "foo-gpio" */ |
ef3d4b94 AS |
716 | for_each_gpio_property_name(propname, con_id) { |
717 | desc = of_get_named_gpiod_flags(np, propname, idx, &of_flags); | |
7b58696d | 718 | if (!gpiod_not_found(desc)) |
ea713bc4 LW |
719 | break; |
720 | } | |
721 | ||
a2b5e207 DT |
722 | /* Properly named GPIO was not found, try workarounds */ |
723 | for (q = of_find_gpio_quirks; gpiod_not_found(desc) && *q; q++) | |
07445ae1 | 724 | desc = (*q)(np, con_id, idx, &of_flags); |
6e24826d | 725 | |
ea713bc4 LW |
726 | if (IS_ERR(desc)) |
727 | return desc; | |
728 | ||
d9e7f0e3 | 729 | *flags = of_convert_gpio_flags(of_flags); |
d449991c | 730 | |
ea713bc4 LW |
731 | return desc; |
732 | } | |
733 | ||
f625d460 | 734 | /** |
fd7337fd | 735 | * of_parse_own_gpio() - Get a GPIO hog descriptor, names and flags for GPIO API |
f625d460 | 736 | * @np: device node to get GPIO from |
be715343 | 737 | * @chip: GPIO chip whose hog is parsed |
a79fead5 | 738 | * @idx: Index of the GPIO to parse |
f625d460 | 739 | * @name: GPIO line name |
fed7026a AS |
740 | * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from |
741 | * of_find_gpio() or of_parse_own_gpio() | |
f625d460 BP |
742 | * @dflags: gpiod_flags - optional GPIO initialization flags |
743 | * | |
94bd9ce1 AS |
744 | * Returns: |
745 | * GPIO descriptor to use with Linux GPIO API, or one of the errno | |
f625d460 BP |
746 | * value on the error condition. |
747 | */ | |
fd7337fd | 748 | static struct gpio_desc *of_parse_own_gpio(struct device_node *np, |
be715343 | 749 | struct gpio_chip *chip, |
a79fead5 | 750 | unsigned int idx, const char **name, |
fed7026a | 751 | unsigned long *lflags, |
fd7337fd | 752 | enum gpiod_flags *dflags) |
f625d460 BP |
753 | { |
754 | struct device_node *chip_np; | |
755 | enum of_gpio_flags xlate_flags; | |
be715343 MY |
756 | struct of_phandle_args gpiospec; |
757 | struct gpio_desc *desc; | |
a79fead5 | 758 | unsigned int i; |
f625d460 | 759 | u32 tmp; |
3f9547e1 | 760 | int ret; |
f625d460 | 761 | |
70d0fc42 | 762 | chip_np = dev_of_node(&chip->gpiodev->dev); |
f625d460 BP |
763 | if (!chip_np) |
764 | return ERR_PTR(-EINVAL); | |
765 | ||
766 | xlate_flags = 0; | |
2d6c06f5 | 767 | *lflags = GPIO_LOOKUP_FLAGS_DEFAULT; |
40941954 | 768 | *dflags = GPIOD_ASIS; |
f625d460 BP |
769 | |
770 | ret = of_property_read_u32(chip_np, "#gpio-cells", &tmp); | |
771 | if (ret) | |
772 | return ERR_PTR(ret); | |
773 | ||
be715343 MY |
774 | gpiospec.np = chip_np; |
775 | gpiospec.args_count = tmp; | |
f625d460 | 776 | |
a79fead5 GU |
777 | for (i = 0; i < tmp; i++) { |
778 | ret = of_property_read_u32_index(np, "gpios", idx * tmp + i, | |
779 | &gpiospec.args[i]); | |
780 | if (ret) | |
781 | return ERR_PTR(ret); | |
782 | } | |
f625d460 | 783 | |
99468c1a | 784 | desc = of_xlate_and_get_gpiod_flags(chip, &gpiospec, &xlate_flags); |
be715343 MY |
785 | if (IS_ERR(desc)) |
786 | return desc; | |
f625d460 | 787 | |
d9e7f0e3 | 788 | *lflags = of_convert_gpio_flags(xlate_flags); |
f625d460 BP |
789 | |
790 | if (of_property_read_bool(np, "input")) | |
791 | *dflags |= GPIOD_IN; | |
792 | else if (of_property_read_bool(np, "output-low")) | |
793 | *dflags |= GPIOD_OUT_LOW; | |
794 | else if (of_property_read_bool(np, "output-high")) | |
795 | *dflags |= GPIOD_OUT_HIGH; | |
796 | else { | |
62cdcb6c RH |
797 | pr_warn("GPIO line %d (%pOFn): no hogging state specified, bailing out\n", |
798 | desc_to_gpio(desc), np); | |
f625d460 BP |
799 | return ERR_PTR(-EINVAL); |
800 | } | |
801 | ||
802 | if (name && of_property_read_string(np, "line-name", name)) | |
803 | *name = np->name; | |
804 | ||
be715343 | 805 | return desc; |
f625d460 BP |
806 | } |
807 | ||
bc21077e GU |
808 | /** |
809 | * of_gpiochip_add_hog - Add all hogs in a hog device node | |
810 | * @chip: gpio chip to act on | |
811 | * @hog: device node describing the hogs | |
812 | * | |
94bd9ce1 AS |
813 | * Returns: |
814 | * 0 on success, or negative errno on failure. | |
bc21077e GU |
815 | */ |
816 | static int of_gpiochip_add_hog(struct gpio_chip *chip, struct device_node *hog) | |
817 | { | |
818 | enum gpiod_flags dflags; | |
819 | struct gpio_desc *desc; | |
820 | unsigned long lflags; | |
821 | const char *name; | |
822 | unsigned int i; | |
823 | int ret; | |
824 | ||
825 | for (i = 0;; i++) { | |
826 | desc = of_parse_own_gpio(hog, chip, i, &name, &lflags, &dflags); | |
827 | if (IS_ERR(desc)) | |
828 | break; | |
829 | ||
830 | ret = gpiod_hog(desc, name, lflags, dflags); | |
831 | if (ret < 0) | |
832 | return ret; | |
63636d95 GU |
833 | |
834 | #ifdef CONFIG_OF_DYNAMIC | |
8ce6fd81 | 835 | WRITE_ONCE(desc->hog, hog); |
63636d95 | 836 | #endif |
bc21077e GU |
837 | } |
838 | ||
839 | return 0; | |
840 | } | |
841 | ||
f625d460 | 842 | /** |
fd7337fd | 843 | * of_gpiochip_scan_gpios - Scan gpio-controller for gpio definitions |
f625d460 BP |
844 | * @chip: gpio chip to act on |
845 | * | |
846 | * This is only used by of_gpiochip_add to request/set GPIO initial | |
847 | * configuration. | |
94bd9ce1 AS |
848 | * |
849 | * Returns: | |
850 | * 0 on success, or negative errno on failure. | |
f625d460 | 851 | */ |
dfbd379b | 852 | static int of_gpiochip_scan_gpios(struct gpio_chip *chip) |
f625d460 | 853 | { |
dfbd379b | 854 | int ret; |
f625d460 | 855 | |
f2c38c96 | 856 | for_each_available_child_of_node_scoped(dev_of_node(&chip->gpiodev->dev), np) { |
f625d460 BP |
857 | if (!of_property_read_bool(np, "gpio-hog")) |
858 | continue; | |
859 | ||
bc21077e | 860 | ret = of_gpiochip_add_hog(chip, np); |
f2c38c96 | 861 | if (ret < 0) |
bc21077e | 862 | return ret; |
63636d95 GU |
863 | |
864 | of_node_set_flag(np, OF_POPULATED); | |
f625d460 | 865 | } |
dfbd379b LD |
866 | |
867 | return 0; | |
f625d460 BP |
868 | } |
869 | ||
63636d95 GU |
870 | #ifdef CONFIG_OF_DYNAMIC |
871 | /** | |
872 | * of_gpiochip_remove_hog - Remove all hogs in a hog device node | |
873 | * @chip: gpio chip to act on | |
874 | * @hog: device node describing the hogs | |
875 | */ | |
876 | static void of_gpiochip_remove_hog(struct gpio_chip *chip, | |
877 | struct device_node *hog) | |
878 | { | |
80c78fbe | 879 | struct gpio_desc *desc; |
63636d95 | 880 | |
57017edd | 881 | for_each_gpio_desc_with_flag(chip, desc, FLAG_IS_HOGGED) |
8ce6fd81 | 882 | if (READ_ONCE(desc->hog) == hog) |
80c78fbe | 883 | gpiochip_free_own_desc(desc); |
63636d95 GU |
884 | } |
885 | ||
faf6efd2 | 886 | static int of_gpiochip_match_node(struct gpio_chip *chip, const void *data) |
63636d95 | 887 | { |
597a8a88 | 888 | return device_match_of_node(&chip->gpiodev->dev, data); |
63636d95 GU |
889 | } |
890 | ||
0f21c53c | 891 | static struct gpio_device *of_find_gpio_device_by_node(struct device_node *np) |
63636d95 | 892 | { |
0f21c53c | 893 | return gpio_device_find(np, of_gpiochip_match_node); |
63636d95 GU |
894 | } |
895 | ||
896 | static int of_gpio_notify(struct notifier_block *nb, unsigned long action, | |
897 | void *arg) | |
898 | { | |
0f21c53c | 899 | struct gpio_device *gdev __free(gpio_device_put) = NULL; |
63636d95 | 900 | struct of_reconfig_data *rd = arg; |
63636d95 GU |
901 | int ret; |
902 | ||
903 | /* | |
904 | * This only supports adding and removing complete gpio-hog nodes. | |
905 | * Modifying an existing gpio-hog node is not supported (except for | |
906 | * changing its "status" property, which is treated the same as | |
907 | * addition/removal). | |
908 | */ | |
909 | switch (of_reconfig_get_state_change(action, arg)) { | |
910 | case OF_RECONFIG_CHANGE_ADD: | |
911 | if (!of_property_read_bool(rd->dn, "gpio-hog")) | |
7e12c495 | 912 | return NOTIFY_DONE; /* not for us */ |
63636d95 GU |
913 | |
914 | if (of_node_test_and_set_flag(rd->dn, OF_POPULATED)) | |
7e12c495 | 915 | return NOTIFY_DONE; |
63636d95 | 916 | |
0f21c53c BG |
917 | gdev = of_find_gpio_device_by_node(rd->dn->parent); |
918 | if (!gdev) | |
7e12c495 | 919 | return NOTIFY_DONE; /* not for us */ |
63636d95 | 920 | |
0f21c53c | 921 | ret = of_gpiochip_add_hog(gpio_device_get_chip(gdev), rd->dn); |
63636d95 GU |
922 | if (ret < 0) { |
923 | pr_err("%s: failed to add hogs for %pOF\n", __func__, | |
924 | rd->dn); | |
925 | of_node_clear_flag(rd->dn, OF_POPULATED); | |
926 | return notifier_from_errno(ret); | |
927 | } | |
7e12c495 | 928 | return NOTIFY_OK; |
63636d95 GU |
929 | |
930 | case OF_RECONFIG_CHANGE_REMOVE: | |
931 | if (!of_node_check_flag(rd->dn, OF_POPULATED)) | |
7e12c495 | 932 | return NOTIFY_DONE; /* already depopulated */ |
63636d95 | 933 | |
0f21c53c BG |
934 | gdev = of_find_gpio_device_by_node(rd->dn->parent); |
935 | if (!gdev) | |
7e12c495 | 936 | return NOTIFY_DONE; /* not for us */ |
63636d95 | 937 | |
0f21c53c | 938 | of_gpiochip_remove_hog(gpio_device_get_chip(gdev), rd->dn); |
63636d95 | 939 | of_node_clear_flag(rd->dn, OF_POPULATED); |
7e12c495 | 940 | return NOTIFY_OK; |
63636d95 GU |
941 | } |
942 | ||
7e12c495 | 943 | return NOTIFY_DONE; |
63636d95 GU |
944 | } |
945 | ||
946 | struct notifier_block gpio_of_notifier = { | |
947 | .notifier_call = of_gpio_notify, | |
948 | }; | |
949 | #endif /* CONFIG_OF_DYNAMIC */ | |
950 | ||
863fbf49 | 951 | /** |
bd3ce710 | 952 | * of_gpio_twocell_xlate - translate twocell gpiospec to the GPIO number and flags |
a19e3da5 | 953 | * @gc: pointer to the gpio_chip structure |
67049c50 | 954 | * @gpiospec: GPIO specifier as found in the device tree |
b908b53d | 955 | * @flags: a flags pointer to fill in |
863fbf49 AV |
956 | * |
957 | * This is simple translation function, suitable for the most 1:1 mapped | |
67049c50 | 958 | * GPIO chips. This function performs only one sanity check: whether GPIO |
863fbf49 | 959 | * is less than ngpios (that is specified in the gpio_chip). |
94bd9ce1 AS |
960 | * |
961 | * Returns: | |
962 | * GPIO number (>= 0) on success, negative errno on failure. | |
863fbf49 | 963 | */ |
bd3ce710 LW |
964 | static int of_gpio_twocell_xlate(struct gpio_chip *gc, |
965 | const struct of_phandle_args *gpiospec, | |
966 | u32 *flags) | |
863fbf49 | 967 | { |
b908b53d AV |
968 | /* |
969 | * We're discouraging gpio_cells < 2, since that way you'll have to | |
20a8a968 | 970 | * write your own xlate function (that will have to retrieve the GPIO |
b908b53d AV |
971 | * number and the flags from a single gpio cell -- this is possible, |
972 | * but not recommended). | |
973 | */ | |
bd3ce710 | 974 | if (gc->of_gpio_n_cells != 2) { |
b908b53d AV |
975 | WARN_ON(1); |
976 | return -EINVAL; | |
977 | } | |
978 | ||
15c9a0ac GL |
979 | if (WARN_ON(gpiospec->args_count < gc->of_gpio_n_cells)) |
980 | return -EINVAL; | |
981 | ||
6270d830 | 982 | if (gpiospec->args[0] >= gc->ngpio) |
863fbf49 AV |
983 | return -EINVAL; |
984 | ||
b908b53d | 985 | if (flags) |
15c9a0ac | 986 | *flags = gpiospec->args[1]; |
b908b53d | 987 | |
15c9a0ac | 988 | return gpiospec->args[0]; |
863fbf49 | 989 | } |
863fbf49 | 990 | |
bd3ce710 LW |
991 | /** |
992 | * of_gpio_threecell_xlate - translate threecell gpiospec to the GPIO number and flags | |
993 | * @gc: pointer to the gpio_chip structure | |
994 | * @gpiospec: GPIO specifier as found in the device tree | |
995 | * @flags: a flags pointer to fill in | |
996 | * | |
997 | * This is simple translation function, suitable for the most 1:n mapped | |
998 | * GPIO chips, i.e. several GPIO chip instances from one device tree node. | |
999 | * In this case the following binding is implied: | |
1000 | * | |
1001 | * foo-gpios = <&gpio instance offset flags>; | |
1002 | * | |
1003 | * Returns: | |
1004 | * GPIO number (>= 0) on success, negative errno on failure. | |
1005 | */ | |
1006 | static int of_gpio_threecell_xlate(struct gpio_chip *gc, | |
1007 | const struct of_phandle_args *gpiospec, | |
1008 | u32 *flags) | |
1009 | { | |
1010 | if (gc->of_gpio_n_cells != 3) { | |
1011 | WARN_ON(1); | |
1012 | return -EINVAL; | |
1013 | } | |
1014 | ||
1015 | if (WARN_ON(gpiospec->args_count != 3)) | |
1016 | return -EINVAL; | |
1017 | ||
1018 | /* | |
1019 | * Check chip instance number, the driver responds with true if | |
1020 | * this is the chip we are looking for. | |
1021 | */ | |
1022 | if (!gc->of_node_instance_match(gc, gpiospec->args[0])) | |
1023 | return -EINVAL; | |
1024 | ||
1025 | if (gpiospec->args[1] >= gc->ngpio) | |
1026 | return -EINVAL; | |
1027 | ||
1028 | if (flags) | |
1029 | *flags = gpiospec->args[2]; | |
1030 | ||
1031 | return gpiospec->args[1]; | |
1032 | } | |
1033 | ||
a99cc668 AB |
1034 | #if IS_ENABLED(CONFIG_OF_GPIO_MM_GPIOCHIP) |
1035 | #include <linux/gpio/legacy-of-mm-gpiochip.h> | |
863fbf49 | 1036 | /** |
3208b0f0 | 1037 | * of_mm_gpiochip_add_data - Add memory mapped GPIO chip (bank) |
863fbf49 AV |
1038 | * @np: device node of the GPIO chip |
1039 | * @mm_gc: pointer to the of_mm_gpio_chip allocated structure | |
3208b0f0 | 1040 | * @data: driver data to store in the struct gpio_chip |
863fbf49 AV |
1041 | * |
1042 | * To use this function you should allocate and fill mm_gc with: | |
1043 | * | |
1044 | * 1) In the gpio_chip structure: | |
1045 | * - all the callbacks | |
a19e3da5 AV |
1046 | * - of_gpio_n_cells |
1047 | * - of_xlate callback (optional) | |
863fbf49 AV |
1048 | * |
1049 | * 3) In the of_mm_gpio_chip structure: | |
1050 | * - save_regs callback (optional) | |
1051 | * | |
1052 | * If succeeded, this function will map bank's memory and will | |
1053 | * do all necessary work for you. Then you'll able to use .regs | |
1054 | * to manage GPIOs from the callbacks. | |
94bd9ce1 AS |
1055 | * |
1056 | * Returns: | |
1057 | * 0 on success, or negative errno on failure. | |
863fbf49 | 1058 | */ |
3208b0f0 LW |
1059 | int of_mm_gpiochip_add_data(struct device_node *np, |
1060 | struct of_mm_gpio_chip *mm_gc, | |
1061 | void *data) | |
863fbf49 AV |
1062 | { |
1063 | int ret = -ENOMEM; | |
a19e3da5 | 1064 | struct gpio_chip *gc = &mm_gc->gc; |
863fbf49 | 1065 | |
7eb6ce2f | 1066 | gc->label = kasprintf(GFP_KERNEL, "%pOF", np); |
863fbf49 AV |
1067 | if (!gc->label) |
1068 | goto err0; | |
1069 | ||
1070 | mm_gc->regs = of_iomap(np, 0); | |
1071 | if (!mm_gc->regs) | |
1072 | goto err1; | |
1073 | ||
21451155 | 1074 | gc->base = -1; |
863fbf49 | 1075 | |
863fbf49 AV |
1076 | if (mm_gc->save_regs) |
1077 | mm_gc->save_regs(mm_gc); | |
1078 | ||
77289b2f AS |
1079 | fwnode_handle_put(mm_gc->gc.fwnode); |
1080 | mm_gc->gc.fwnode = fwnode_handle_get(of_fwnode_handle(np)); | |
863fbf49 | 1081 | |
3208b0f0 | 1082 | ret = gpiochip_add_data(gc, data); |
863fbf49 AV |
1083 | if (ret) |
1084 | goto err2; | |
1085 | ||
863fbf49 AV |
1086 | return 0; |
1087 | err2: | |
5d07a692 | 1088 | of_node_put(np); |
863fbf49 AV |
1089 | iounmap(mm_gc->regs); |
1090 | err1: | |
1091 | kfree(gc->label); | |
1092 | err0: | |
7eb6ce2f | 1093 | pr_err("%pOF: GPIO chip registration failed with status %d\n", np, ret); |
863fbf49 AV |
1094 | return ret; |
1095 | } | |
6d662455 | 1096 | EXPORT_SYMBOL_GPL(of_mm_gpiochip_add_data); |
594fa265 | 1097 | |
d621e8ba RRD |
1098 | /** |
1099 | * of_mm_gpiochip_remove - Remove memory mapped GPIO chip (bank) | |
1100 | * @mm_gc: pointer to the of_mm_gpio_chip allocated structure | |
1101 | */ | |
1102 | void of_mm_gpiochip_remove(struct of_mm_gpio_chip *mm_gc) | |
1103 | { | |
1104 | struct gpio_chip *gc = &mm_gc->gc; | |
1105 | ||
d621e8ba RRD |
1106 | gpiochip_remove(gc); |
1107 | iounmap(mm_gc->regs); | |
1108 | kfree(gc->label); | |
1109 | } | |
6d662455 | 1110 | EXPORT_SYMBOL_GPL(of_mm_gpiochip_remove); |
a99cc668 | 1111 | #endif |
d621e8ba | 1112 | |
f23f1516 | 1113 | #ifdef CONFIG_PINCTRL |
28355f81 | 1114 | static int of_gpiochip_add_pin_range(struct gpio_chip *chip) |
f23f1516 | 1115 | { |
f23f1516 | 1116 | struct of_phandle_args pinspec; |
1e63d7b9 | 1117 | struct pinctrl_dev *pctldev; |
70d0fc42 | 1118 | struct device_node *np; |
e818cd3c | 1119 | int index = 0, ret, trim; |
586a87e6 CR |
1120 | const char *name; |
1121 | static const char group_names_propname[] = "gpio-ranges-group-names"; | |
b034a90b | 1122 | bool has_group_names; |
732457dc LW |
1123 | int offset; /* Offset of the first GPIO line on the chip */ |
1124 | int pin; /* Pin base number in the range */ | |
1125 | int count; /* Number of pins/GPIO lines to map */ | |
f23f1516 | 1126 | |
70d0fc42 | 1127 | np = dev_of_node(&chip->gpiodev->dev); |
f23f1516 | 1128 | if (!np) |
28355f81 | 1129 | return 0; |
f23f1516 | 1130 | |
b034a90b | 1131 | has_group_names = of_property_present(np, group_names_propname); |
586a87e6 | 1132 | |
ad4e1a7c | 1133 | for (;; index++) { |
bd3ce710 LW |
1134 | /* |
1135 | * Ordinary phandles contain 2-3 cells: | |
1136 | * gpios = <&gpio [instance] offset flags>; | |
1137 | * Ranges always contain one more cell: | |
1138 | * gpio-ranges <&pinctrl [gpio_instance] gpio_offet pin_offet count>; | |
1139 | * This is why we parse chip->of_gpio_n_cells + 1 cells | |
1140 | */ | |
1141 | ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", | |
1142 | chip->of_gpio_n_cells + 1, | |
d9fe0039 | 1143 | index, &pinspec); |
f23f1516 SH |
1144 | if (ret) |
1145 | break; | |
1146 | ||
1e63d7b9 | 1147 | pctldev = of_pinctrl_get(pinspec.np); |
602cf638 | 1148 | of_node_put(pinspec.np); |
1e63d7b9 | 1149 | if (!pctldev) |
28355f81 | 1150 | return -EPROBE_DEFER; |
f23f1516 | 1151 | |
bd3ce710 LW |
1152 | if (chip->of_gpio_n_cells == 3) { |
1153 | /* First cell is the gpiochip instance number */ | |
1154 | offset = pinspec.args[1]; | |
1155 | pin = pinspec.args[2]; | |
1156 | count = pinspec.args[3]; | |
1157 | } else { | |
1158 | offset = pinspec.args[0]; | |
1159 | pin = pinspec.args[1]; | |
1160 | count = pinspec.args[2]; | |
1161 | } | |
1162 | ||
1163 | /* | |
1164 | * With multiple GPIO chips per node, check that this chip is the | |
1165 | * right instance. | |
1166 | */ | |
1167 | if (chip->of_node_instance_match && | |
1168 | (chip->of_gpio_n_cells == 3) && | |
1169 | !chip->of_node_instance_match(chip, pinspec.args[0])) | |
1170 | continue; | |
732457dc | 1171 | |
e818cd3c | 1172 | /* Ignore ranges outside of this GPIO chip */ |
732457dc | 1173 | if (offset >= (chip->offset + chip->ngpio)) |
e818cd3c | 1174 | continue; |
732457dc | 1175 | if (offset + count <= chip->offset) |
e818cd3c DB |
1176 | continue; |
1177 | ||
732457dc | 1178 | if (count) { |
e818cd3c | 1179 | /* npins != 0: linear range */ |
b034a90b | 1180 | if (has_group_names) { |
72858602 | 1181 | of_property_read_string_index(np, |
586a87e6 CR |
1182 | group_names_propname, |
1183 | index, &name); | |
1184 | if (strlen(name)) { | |
7eb6ce2f RH |
1185 | pr_err("%pOF: Group name of numeric GPIO ranges must be the empty string.\n", |
1186 | np); | |
586a87e6 CR |
1187 | break; |
1188 | } | |
1189 | } | |
e818cd3c DB |
1190 | |
1191 | /* Trim the range to fit this GPIO chip */ | |
732457dc LW |
1192 | if (chip->offset > offset) { |
1193 | trim = chip->offset - offset; | |
1194 | count -= trim; | |
1195 | pin += trim; | |
1196 | offset = 0; | |
e818cd3c | 1197 | } else { |
732457dc | 1198 | offset -= chip->offset; |
e818cd3c | 1199 | } |
732457dc LW |
1200 | if ((offset + count) > chip->ngpio) |
1201 | count = chip->ngpio - offset; | |
e818cd3c | 1202 | |
586a87e6 CR |
1203 | ret = gpiochip_add_pin_range(chip, |
1204 | pinctrl_dev_get_devname(pctldev), | |
732457dc LW |
1205 | offset, |
1206 | pin, | |
1207 | count); | |
586a87e6 | 1208 | if (ret) |
28355f81 | 1209 | return ret; |
586a87e6 CR |
1210 | } else { |
1211 | /* npins == 0: special range */ | |
732457dc | 1212 | if (pin) { |
7eb6ce2f RH |
1213 | pr_err("%pOF: Illegal gpio-range format.\n", |
1214 | np); | |
586a87e6 CR |
1215 | break; |
1216 | } | |
1217 | ||
b034a90b | 1218 | if (!has_group_names) { |
7eb6ce2f RH |
1219 | pr_err("%pOF: GPIO group range requested but no %s property.\n", |
1220 | np, group_names_propname); | |
586a87e6 CR |
1221 | break; |
1222 | } | |
1223 | ||
1224 | ret = of_property_read_string_index(np, | |
1225 | group_names_propname, | |
1226 | index, &name); | |
1227 | if (ret) | |
1228 | break; | |
1229 | ||
1230 | if (!strlen(name)) { | |
7eb6ce2f RH |
1231 | pr_err("%pOF: Group name of GPIO group range cannot be the empty string.\n", |
1232 | np); | |
586a87e6 CR |
1233 | break; |
1234 | } | |
1235 | ||
1236 | ret = gpiochip_add_pingroup_range(chip, pctldev, | |
732457dc | 1237 | offset, name); |
586a87e6 | 1238 | if (ret) |
28355f81 | 1239 | return ret; |
586a87e6 | 1240 | } |
ad4e1a7c | 1241 | } |
28355f81 TV |
1242 | |
1243 | return 0; | |
f23f1516 SH |
1244 | } |
1245 | ||
f23f1516 | 1246 | #else |
28355f81 | 1247 | static int of_gpiochip_add_pin_range(struct gpio_chip *chip) { return 0; } |
f23f1516 SH |
1248 | #endif |
1249 | ||
28355f81 | 1250 | int of_gpiochip_add(struct gpio_chip *chip) |
391c970c | 1251 | { |
8afe8255 | 1252 | struct device_node *np; |
f0d1ab05 | 1253 | int ret; |
28355f81 | 1254 | |
70d0fc42 | 1255 | np = dev_of_node(&chip->gpiodev->dev); |
8afe8255 | 1256 | if (!np) |
28355f81 | 1257 | return 0; |
391c970c AV |
1258 | |
1259 | if (!chip->of_xlate) { | |
bd3ce710 LW |
1260 | if (chip->of_gpio_n_cells == 3) { |
1261 | if (!chip->of_node_instance_match) | |
1262 | return -EINVAL; | |
1263 | chip->of_xlate = of_gpio_threecell_xlate; | |
1264 | } else { | |
1265 | chip->of_gpio_n_cells = 2; | |
1266 | chip->of_xlate = of_gpio_twocell_xlate; | |
1267 | } | |
391c970c AV |
1268 | } |
1269 | ||
1020dfd1 MY |
1270 | if (chip->of_gpio_n_cells > MAX_PHANDLE_ARGS) |
1271 | return -EINVAL; | |
1272 | ||
f0d1ab05 LW |
1273 | ret = of_gpiochip_add_pin_range(chip); |
1274 | if (ret) | |
1275 | return ret; | |
28355f81 | 1276 | |
59a4a351 | 1277 | of_node_get(np); |
f625d460 | 1278 | |
f0d1ab05 | 1279 | ret = of_gpiochip_scan_gpios(chip); |
2f4133bb | 1280 | if (ret) |
59a4a351 | 1281 | of_node_put(np); |
f7299d44 | 1282 | |
f0d1ab05 | 1283 | return ret; |
391c970c AV |
1284 | } |
1285 | ||
1286 | void of_gpiochip_remove(struct gpio_chip *chip) | |
1287 | { | |
59a4a351 | 1288 | of_node_put(dev_of_node(&chip->gpiodev->dev)); |
391c970c | 1289 | } |
27986833 YL |
1290 | |
1291 | bool of_gpiochip_instance_match(struct gpio_chip *gc, unsigned int index) | |
1292 | { | |
1293 | if (gc->of_node_instance_match) | |
1294 | return gc->of_node_instance_match(gc, index); | |
1295 | ||
1296 | return false; | |
1297 | } |