Commit | Line | Data |
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27038c3e | 1 | // SPDX-License-Identifier: GPL-2.0+ |
863fbf49 AV |
2 | /* |
3 | * OF helpers for the GPIO API | |
4 | * | |
5 | * Copyright (c) 2007-2008 MontaVista Software, Inc. | |
6 | * | |
7 | * Author: Anton Vorontsov <avorontsov@ru.mvista.com> | |
863fbf49 AV |
8 | */ |
9 | ||
2e13cba8 | 10 | #include <linux/device.h> |
bea4dbee | 11 | #include <linux/err.h> |
863fbf49 | 12 | #include <linux/errno.h> |
2e13cba8 | 13 | #include <linux/module.h> |
863fbf49 | 14 | #include <linux/io.h> |
af8b6375 | 15 | #include <linux/gpio/consumer.h> |
863fbf49 | 16 | #include <linux/of.h> |
2e13cba8 | 17 | #include <linux/of_address.h> |
863fbf49 | 18 | #include <linux/of_gpio.h> |
f23f1516 | 19 | #include <linux/pinctrl/pinctrl.h> |
2e13cba8 | 20 | #include <linux/slab.h> |
f625d460 | 21 | #include <linux/gpio/machine.h> |
863fbf49 | 22 | |
1bd6b601 | 23 | #include "gpiolib.h" |
af8b6375 | 24 | |
c7e9d398 | 25 | static int of_gpiochip_match_node_and_xlate(struct gpio_chip *chip, void *data) |
3d0f7cf0 | 26 | { |
c7e9d398 MY |
27 | struct of_phandle_args *gpiospec = data; |
28 | ||
29 | return chip->gpiodev->dev.of_node == gpiospec->np && | |
d49b48f0 | 30 | chip->of_xlate && |
c7e9d398 | 31 | chip->of_xlate(chip, gpiospec, NULL) >= 0; |
762c2e46 | 32 | } |
3d0f7cf0 | 33 | |
c7e9d398 MY |
34 | static struct gpio_chip *of_find_gpiochip_by_xlate( |
35 | struct of_phandle_args *gpiospec) | |
762c2e46 | 36 | { |
c7e9d398 | 37 | return gpiochip_find(gpiospec, of_gpiochip_match_node_and_xlate); |
3d0f7cf0 | 38 | } |
3d0f7cf0 | 39 | |
99468c1a MY |
40 | static struct gpio_desc *of_xlate_and_get_gpiod_flags(struct gpio_chip *chip, |
41 | struct of_phandle_args *gpiospec, | |
42 | enum of_gpio_flags *flags) | |
3d0f7cf0 | 43 | { |
3d0f7cf0 GL |
44 | int ret; |
45 | ||
99468c1a MY |
46 | if (chip->of_gpio_n_cells != gpiospec->args_count) |
47 | return ERR_PTR(-EINVAL); | |
48 | ||
49 | ret = chip->of_xlate(chip, gpiospec, flags); | |
50 | if (ret < 0) | |
51 | return ERR_PTR(ret); | |
52 | ||
53 | return gpiochip_get_desc(chip, ret); | |
3d0f7cf0 GL |
54 | } |
55 | ||
a603a2b8 | 56 | static void of_gpio_flags_quirks(struct device_node *np, |
89a5e15b | 57 | const char *propname, |
6953c57a LW |
58 | enum of_gpio_flags *flags, |
59 | int index) | |
a603a2b8 | 60 | { |
81c85ec1 LW |
61 | /* |
62 | * Handle MMC "cd-inverted" and "wp-inverted" semantics. | |
63 | */ | |
64 | if (IS_ENABLED(CONFIG_MMC)) { | |
89a5e15b LW |
65 | /* |
66 | * Active low is the default according to the | |
67 | * SDHCI specification and the device tree | |
68 | * bindings. However the code in the current | |
69 | * kernel was written such that the phandle | |
70 | * flags were always respected, and "cd-inverted" | |
71 | * would invert the flag from the device phandle. | |
72 | */ | |
73 | if (!strcmp(propname, "cd-gpios")) { | |
74 | if (of_property_read_bool(np, "cd-inverted")) | |
75 | *flags ^= OF_GPIO_ACTIVE_LOW; | |
81c85ec1 | 76 | } |
89a5e15b LW |
77 | if (!strcmp(propname, "wp-gpios")) { |
78 | if (of_property_read_bool(np, "wp-inverted")) | |
79 | *flags ^= OF_GPIO_ACTIVE_LOW; | |
81c85ec1 LW |
80 | } |
81 | } | |
a603a2b8 LW |
82 | /* |
83 | * Some GPIO fixed regulator quirks. | |
84 | * Note that active low is the default. | |
85 | */ | |
86 | if (IS_ENABLED(CONFIG_REGULATOR) && | |
906402a4 LW |
87 | (of_device_is_compatible(np, "regulator-fixed") || |
88 | of_device_is_compatible(np, "reg-fixed-voltage") || | |
a71a81e7 GU |
89 | (!(strcmp(propname, "enable-gpio") && |
90 | strcmp(propname, "enable-gpios")) && | |
91 | of_device_is_compatible(np, "regulator-gpio")))) { | |
a603a2b8 LW |
92 | /* |
93 | * The regulator GPIO handles are specified such that the | |
94 | * presence or absence of "enable-active-high" solely controls | |
95 | * the polarity of the GPIO line. Any phandle flags must | |
96 | * be actively ignored. | |
97 | */ | |
98 | if (*flags & OF_GPIO_ACTIVE_LOW) { | |
99 | pr_warn("%s GPIO handle specifies active low - ignored\n", | |
100 | of_node_full_name(np)); | |
101 | *flags &= ~OF_GPIO_ACTIVE_LOW; | |
102 | } | |
103 | if (!of_property_read_bool(np, "enable-active-high")) | |
104 | *flags |= OF_GPIO_ACTIVE_LOW; | |
105 | } | |
106 | /* | |
107 | * Legacy open drain handling for fixed voltage regulators. | |
108 | */ | |
109 | if (IS_ENABLED(CONFIG_REGULATOR) && | |
110 | of_device_is_compatible(np, "reg-fixed-voltage") && | |
111 | of_property_read_bool(np, "gpio-open-drain")) { | |
112 | *flags |= (OF_GPIO_SINGLE_ENDED | OF_GPIO_OPEN_DRAIN); | |
113 | pr_info("%s uses legacy open drain flag - update the DTS if you can\n", | |
114 | of_node_full_name(np)); | |
115 | } | |
6953c57a LW |
116 | |
117 | /* | |
118 | * Legacy handling of SPI active high chip select. If we have a | |
119 | * property named "cs-gpios" we need to inspect the child node | |
120 | * to determine if the flags should have inverted semantics. | |
fbbf145a LW |
121 | * |
122 | * This does not apply to an SPI device named "spi-gpio", because | |
123 | * these have traditionally obtained their own GPIOs by parsing | |
124 | * the device tree directly and did not respect any "spi-cs-high" | |
125 | * property on the SPI bus children. | |
6953c57a | 126 | */ |
fbbf145a LW |
127 | if (IS_ENABLED(CONFIG_SPI_MASTER) && |
128 | !strcmp(propname, "cs-gpios") && | |
129 | !of_device_is_compatible(np, "spi-gpio") && | |
a71a81e7 | 130 | of_property_read_bool(np, "cs-gpios")) { |
6953c57a LW |
131 | struct device_node *child; |
132 | u32 cs; | |
133 | int ret; | |
134 | ||
135 | for_each_child_of_node(np, child) { | |
136 | ret = of_property_read_u32(child, "reg", &cs); | |
c1c04cea | 137 | if (ret) |
6953c57a LW |
138 | continue; |
139 | if (cs == index) { | |
140 | /* | |
141 | * SPI children have active low chip selects | |
142 | * by default. This can be specified negatively | |
143 | * by just omitting "spi-cs-high" in the | |
144 | * device node, or actively by tagging on | |
145 | * GPIO_ACTIVE_LOW as flag in the device | |
146 | * tree. If the line is simultaneously | |
147 | * tagged as active low in the device tree | |
148 | * and has the "spi-cs-high" set, we get a | |
149 | * conflict and the "spi-cs-high" flag will | |
150 | * take precedence. | |
151 | */ | |
7ce40277 | 152 | if (of_property_read_bool(child, "spi-cs-high")) { |
6953c57a LW |
153 | if (*flags & OF_GPIO_ACTIVE_LOW) { |
154 | pr_warn("%s GPIO handle specifies active low - ignored\n", | |
7ce40277 | 155 | of_node_full_name(child)); |
6953c57a LW |
156 | *flags &= ~OF_GPIO_ACTIVE_LOW; |
157 | } | |
158 | } else { | |
159 | if (!(*flags & OF_GPIO_ACTIVE_LOW)) | |
160 | pr_info("%s enforce active low on chipselect handle\n", | |
7ce40277 | 161 | of_node_full_name(child)); |
6953c57a LW |
162 | *flags |= OF_GPIO_ACTIVE_LOW; |
163 | } | |
164 | break; | |
165 | } | |
166 | } | |
167 | } | |
edc1ef3f MB |
168 | |
169 | /* Legacy handling of stmmac's active-low PHY reset line */ | |
170 | if (IS_ENABLED(CONFIG_STMMAC_ETH) && | |
171 | !strcmp(propname, "snps,reset-gpio") && | |
172 | of_property_read_bool(np, "snps,reset-active-low")) | |
173 | *flags |= OF_GPIO_ACTIVE_LOW; | |
a603a2b8 LW |
174 | } |
175 | ||
863fbf49 | 176 | /** |
af8b6375 | 177 | * of_get_named_gpiod_flags() - Get a GPIO descriptor and flags for GPIO API |
863fbf49 | 178 | * @np: device node to get GPIO from |
a6b09191 | 179 | * @propname: property name containing gpio specifier(s) |
863fbf49 | 180 | * @index: index of the GPIO |
b908b53d | 181 | * @flags: a flags pointer to fill in |
863fbf49 | 182 | * |
af8b6375 | 183 | * Returns GPIO descriptor to use with Linux GPIO API, or one of the errno |
b908b53d AV |
184 | * value on the error condition. If @flags is not NULL the function also fills |
185 | * in flags for the GPIO. | |
863fbf49 | 186 | */ |
af8b6375 AC |
187 | struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np, |
188 | const char *propname, int index, enum of_gpio_flags *flags) | |
863fbf49 | 189 | { |
762c2e46 MY |
190 | struct of_phandle_args gpiospec; |
191 | struct gpio_chip *chip; | |
192 | struct gpio_desc *desc; | |
64b60e09 | 193 | int ret; |
3d0f7cf0 | 194 | |
c11e6f0f SB |
195 | ret = of_parse_phandle_with_args_map(np, propname, "gpio", index, |
196 | &gpiospec); | |
64b60e09 | 197 | if (ret) { |
7eb6ce2f RH |
198 | pr_debug("%s: can't parse '%s' property of node '%pOF[%d]'\n", |
199 | __func__, propname, np, index); | |
af8b6375 | 200 | return ERR_PTR(ret); |
863fbf49 AV |
201 | } |
202 | ||
c7e9d398 | 203 | chip = of_find_gpiochip_by_xlate(&gpiospec); |
762c2e46 MY |
204 | if (!chip) { |
205 | desc = ERR_PTR(-EPROBE_DEFER); | |
206 | goto out; | |
207 | } | |
762c2e46 | 208 | |
99468c1a | 209 | desc = of_xlate_and_get_gpiod_flags(chip, &gpiospec, flags); |
762c2e46 MY |
210 | if (IS_ERR(desc)) |
211 | goto out; | |
863fbf49 | 212 | |
605f2d34 | 213 | if (flags) |
89a5e15b | 214 | of_gpio_flags_quirks(np, propname, flags, index); |
a603a2b8 | 215 | |
7eb6ce2f RH |
216 | pr_debug("%s: parsed '%s' property of node '%pOF[%d]' - status (%d)\n", |
217 | __func__, propname, np, index, | |
762c2e46 MY |
218 | PTR_ERR_OR_ZERO(desc)); |
219 | ||
220 | out: | |
221 | of_node_put(gpiospec.np); | |
222 | ||
223 | return desc; | |
863fbf49 | 224 | } |
863fbf49 | 225 | |
f01d9075 AC |
226 | int of_get_named_gpio_flags(struct device_node *np, const char *list_name, |
227 | int index, enum of_gpio_flags *flags) | |
228 | { | |
229 | struct gpio_desc *desc; | |
230 | ||
231 | desc = of_get_named_gpiod_flags(np, list_name, index, flags); | |
232 | ||
233 | if (IS_ERR(desc)) | |
234 | return PTR_ERR(desc); | |
235 | else | |
236 | return desc_to_gpio(desc); | |
237 | } | |
238 | EXPORT_SYMBOL(of_get_named_gpio_flags); | |
239 | ||
c8582339 LW |
240 | /* |
241 | * The SPI GPIO bindings happened before we managed to establish that GPIO | |
242 | * properties should be named "foo-gpios" so we have this special kludge for | |
243 | * them. | |
244 | */ | |
245 | static struct gpio_desc *of_find_spi_gpio(struct device *dev, const char *con_id, | |
246 | enum of_gpio_flags *of_flags) | |
247 | { | |
248 | char prop_name[32]; /* 32 is max size of property name */ | |
249 | struct device_node *np = dev->of_node; | |
250 | struct gpio_desc *desc; | |
251 | ||
252 | /* | |
253 | * Hopefully the compiler stubs the rest of the function if this | |
254 | * is false. | |
255 | */ | |
256 | if (!IS_ENABLED(CONFIG_SPI_MASTER)) | |
257 | return ERR_PTR(-ENOENT); | |
258 | ||
259 | /* Allow this specifically for "spi-gpio" devices */ | |
260 | if (!of_device_is_compatible(np, "spi-gpio") || !con_id) | |
261 | return ERR_PTR(-ENOENT); | |
262 | ||
263 | /* Will be "gpio-sck", "gpio-mosi" or "gpio-miso" */ | |
264 | snprintf(prop_name, sizeof(prop_name), "%s-%s", "gpio", con_id); | |
265 | ||
266 | desc = of_get_named_gpiod_flags(np, prop_name, 0, of_flags); | |
267 | return desc; | |
268 | } | |
269 | ||
e3023bf8 LW |
270 | /* |
271 | * The old Freescale bindings use simply "gpios" as name for the chip select | |
272 | * lines rather than "cs-gpios" like all other SPI hardware. Account for this | |
273 | * with a special quirk. | |
274 | */ | |
275 | static struct gpio_desc *of_find_spi_cs_gpio(struct device *dev, | |
276 | const char *con_id, | |
277 | unsigned int idx, | |
278 | unsigned long *flags) | |
279 | { | |
280 | struct device_node *np = dev->of_node; | |
281 | ||
282 | if (!IS_ENABLED(CONFIG_SPI_MASTER)) | |
283 | return ERR_PTR(-ENOENT); | |
284 | ||
285 | /* Allow this specifically for Freescale devices */ | |
286 | if (!of_device_is_compatible(np, "fsl,spi") && | |
287 | !of_device_is_compatible(np, "aeroflexgaisler,spictrl")) | |
288 | return ERR_PTR(-ENOENT); | |
289 | /* Allow only if asking for "cs-gpios" */ | |
290 | if (!con_id || strcmp(con_id, "cs")) | |
291 | return ERR_PTR(-ENOENT); | |
292 | ||
293 | /* | |
294 | * While all other SPI controllers use "cs-gpios" the Freescale | |
295 | * uses just "gpios" so translate to that when "cs-gpios" is | |
296 | * requested. | |
297 | */ | |
298 | return of_find_gpio(dev, NULL, idx, flags); | |
299 | } | |
300 | ||
6a537d48 LW |
301 | /* |
302 | * Some regulator bindings happened before we managed to establish that GPIO | |
303 | * properties should be named "foo-gpios" so we have this special kludge for | |
304 | * them. | |
305 | */ | |
306 | static struct gpio_desc *of_find_regulator_gpio(struct device *dev, const char *con_id, | |
307 | enum of_gpio_flags *of_flags) | |
308 | { | |
309 | /* These are the connection IDs we accept as legacy GPIO phandles */ | |
310 | const char *whitelist[] = { | |
311 | "wlf,ldoena", /* Arizona */ | |
312 | "wlf,ldo1ena", /* WM8994 */ | |
313 | "wlf,ldo2ena", /* WM8994 */ | |
314 | }; | |
315 | struct device_node *np = dev->of_node; | |
316 | struct gpio_desc *desc; | |
317 | int i; | |
318 | ||
319 | if (!IS_ENABLED(CONFIG_REGULATOR)) | |
320 | return ERR_PTR(-ENOENT); | |
321 | ||
322 | if (!con_id) | |
323 | return ERR_PTR(-ENOENT); | |
324 | ||
4b21f94a AS |
325 | i = match_string(whitelist, ARRAY_SIZE(whitelist), con_id); |
326 | if (i < 0) | |
6a537d48 LW |
327 | return ERR_PTR(-ENOENT); |
328 | ||
329 | desc = of_get_named_gpiod_flags(np, con_id, 0, of_flags); | |
330 | return desc; | |
331 | } | |
332 | ||
ea713bc4 | 333 | struct gpio_desc *of_find_gpio(struct device *dev, const char *con_id, |
fed7026a | 334 | unsigned int idx, unsigned long *flags) |
ea713bc4 LW |
335 | { |
336 | char prop_name[32]; /* 32 is max size of property name */ | |
337 | enum of_gpio_flags of_flags; | |
338 | struct gpio_desc *desc; | |
339 | unsigned int i; | |
340 | ||
c8582339 | 341 | /* Try GPIO property "foo-gpios" and "foo-gpio" */ |
ea713bc4 LW |
342 | for (i = 0; i < ARRAY_SIZE(gpio_suffixes); i++) { |
343 | if (con_id) | |
344 | snprintf(prop_name, sizeof(prop_name), "%s-%s", con_id, | |
345 | gpio_suffixes[i]); | |
346 | else | |
347 | snprintf(prop_name, sizeof(prop_name), "%s", | |
348 | gpio_suffixes[i]); | |
349 | ||
350 | desc = of_get_named_gpiod_flags(dev->of_node, prop_name, idx, | |
351 | &of_flags); | |
6662ae6a MR |
352 | /* |
353 | * -EPROBE_DEFER in our case means that we found a | |
354 | * valid GPIO property, but no controller has been | |
355 | * registered so far. | |
356 | * | |
357 | * This means we don't need to look any further for | |
358 | * alternate name conventions, and we should really | |
359 | * preserve the return code for our user to be able to | |
360 | * retry probing later. | |
361 | */ | |
362 | if (IS_ERR(desc) && PTR_ERR(desc) == -EPROBE_DEFER) | |
363 | return desc; | |
364 | ||
ea713bc4 LW |
365 | if (!IS_ERR(desc) || (PTR_ERR(desc) != -ENOENT)) |
366 | break; | |
367 | } | |
368 | ||
c8582339 LW |
369 | /* Special handling for SPI GPIOs if used */ |
370 | if (IS_ERR(desc)) | |
371 | desc = of_find_spi_gpio(dev, con_id, &of_flags); | |
e3023bf8 LW |
372 | if (IS_ERR(desc)) { |
373 | /* This quirk looks up flags and all */ | |
374 | desc = of_find_spi_cs_gpio(dev, con_id, idx, flags); | |
375 | if (!IS_ERR(desc)) | |
376 | return desc; | |
377 | } | |
c8582339 | 378 | |
6a537d48 | 379 | /* Special handling for regulator GPIOs if used */ |
ce27fb2c | 380 | if (IS_ERR(desc) && PTR_ERR(desc) != -EPROBE_DEFER) |
6a537d48 LW |
381 | desc = of_find_regulator_gpio(dev, con_id, &of_flags); |
382 | ||
ea713bc4 LW |
383 | if (IS_ERR(desc)) |
384 | return desc; | |
385 | ||
386 | if (of_flags & OF_GPIO_ACTIVE_LOW) | |
387 | *flags |= GPIO_ACTIVE_LOW; | |
388 | ||
389 | if (of_flags & OF_GPIO_SINGLE_ENDED) { | |
4c0facdd | 390 | if (of_flags & OF_GPIO_OPEN_DRAIN) |
ea713bc4 LW |
391 | *flags |= GPIO_OPEN_DRAIN; |
392 | else | |
393 | *flags |= GPIO_OPEN_SOURCE; | |
394 | } | |
395 | ||
e10f72bf AJ |
396 | if (of_flags & OF_GPIO_TRANSITORY) |
397 | *flags |= GPIO_TRANSITORY; | |
05f479bf | 398 | |
d449991c TP |
399 | if (of_flags & OF_GPIO_PULL_UP) |
400 | *flags |= GPIO_PULL_UP; | |
401 | if (of_flags & OF_GPIO_PULL_DOWN) | |
402 | *flags |= GPIO_PULL_DOWN; | |
403 | ||
ea713bc4 LW |
404 | return desc; |
405 | } | |
406 | ||
f625d460 | 407 | /** |
fd7337fd | 408 | * of_parse_own_gpio() - Get a GPIO hog descriptor, names and flags for GPIO API |
f625d460 | 409 | * @np: device node to get GPIO from |
be715343 | 410 | * @chip: GPIO chip whose hog is parsed |
a79fead5 | 411 | * @idx: Index of the GPIO to parse |
f625d460 | 412 | * @name: GPIO line name |
fed7026a AS |
413 | * @lflags: bitmask of gpio_lookup_flags GPIO_* values - returned from |
414 | * of_find_gpio() or of_parse_own_gpio() | |
f625d460 BP |
415 | * @dflags: gpiod_flags - optional GPIO initialization flags |
416 | * | |
417 | * Returns GPIO descriptor to use with Linux GPIO API, or one of the errno | |
418 | * value on the error condition. | |
419 | */ | |
fd7337fd | 420 | static struct gpio_desc *of_parse_own_gpio(struct device_node *np, |
be715343 | 421 | struct gpio_chip *chip, |
a79fead5 | 422 | unsigned int idx, const char **name, |
fed7026a | 423 | unsigned long *lflags, |
fd7337fd | 424 | enum gpiod_flags *dflags) |
f625d460 BP |
425 | { |
426 | struct device_node *chip_np; | |
427 | enum of_gpio_flags xlate_flags; | |
be715343 MY |
428 | struct of_phandle_args gpiospec; |
429 | struct gpio_desc *desc; | |
a79fead5 | 430 | unsigned int i; |
f625d460 | 431 | u32 tmp; |
3f9547e1 | 432 | int ret; |
f625d460 | 433 | |
be715343 | 434 | chip_np = chip->of_node; |
f625d460 BP |
435 | if (!chip_np) |
436 | return ERR_PTR(-EINVAL); | |
437 | ||
438 | xlate_flags = 0; | |
2d6c06f5 | 439 | *lflags = GPIO_LOOKUP_FLAGS_DEFAULT; |
f625d460 BP |
440 | *dflags = 0; |
441 | ||
442 | ret = of_property_read_u32(chip_np, "#gpio-cells", &tmp); | |
443 | if (ret) | |
444 | return ERR_PTR(ret); | |
445 | ||
be715343 MY |
446 | gpiospec.np = chip_np; |
447 | gpiospec.args_count = tmp; | |
f625d460 | 448 | |
a79fead5 GU |
449 | for (i = 0; i < tmp; i++) { |
450 | ret = of_property_read_u32_index(np, "gpios", idx * tmp + i, | |
451 | &gpiospec.args[i]); | |
452 | if (ret) | |
453 | return ERR_PTR(ret); | |
454 | } | |
f625d460 | 455 | |
99468c1a | 456 | desc = of_xlate_and_get_gpiod_flags(chip, &gpiospec, &xlate_flags); |
be715343 MY |
457 | if (IS_ERR(desc)) |
458 | return desc; | |
f625d460 BP |
459 | |
460 | if (xlate_flags & OF_GPIO_ACTIVE_LOW) | |
461 | *lflags |= GPIO_ACTIVE_LOW; | |
e10f72bf AJ |
462 | if (xlate_flags & OF_GPIO_TRANSITORY) |
463 | *lflags |= GPIO_TRANSITORY; | |
f625d460 BP |
464 | |
465 | if (of_property_read_bool(np, "input")) | |
466 | *dflags |= GPIOD_IN; | |
467 | else if (of_property_read_bool(np, "output-low")) | |
468 | *dflags |= GPIOD_OUT_LOW; | |
469 | else if (of_property_read_bool(np, "output-high")) | |
470 | *dflags |= GPIOD_OUT_HIGH; | |
471 | else { | |
62cdcb6c RH |
472 | pr_warn("GPIO line %d (%pOFn): no hogging state specified, bailing out\n", |
473 | desc_to_gpio(desc), np); | |
f625d460 BP |
474 | return ERR_PTR(-EINVAL); |
475 | } | |
476 | ||
477 | if (name && of_property_read_string(np, "line-name", name)) | |
478 | *name = np->name; | |
479 | ||
be715343 | 480 | return desc; |
f625d460 BP |
481 | } |
482 | ||
483 | /** | |
fd7337fd | 484 | * of_gpiochip_scan_gpios - Scan gpio-controller for gpio definitions |
f625d460 BP |
485 | * @chip: gpio chip to act on |
486 | * | |
487 | * This is only used by of_gpiochip_add to request/set GPIO initial | |
488 | * configuration. | |
ead066e6 | 489 | * It returns error if it fails otherwise 0 on success. |
f625d460 | 490 | */ |
dfbd379b | 491 | static int of_gpiochip_scan_gpios(struct gpio_chip *chip) |
f625d460 BP |
492 | { |
493 | struct gpio_desc *desc = NULL; | |
494 | struct device_node *np; | |
495 | const char *name; | |
fed7026a | 496 | unsigned long lflags; |
f625d460 | 497 | enum gpiod_flags dflags; |
a79fead5 | 498 | unsigned int i; |
dfbd379b | 499 | int ret; |
f625d460 | 500 | |
d1279d94 | 501 | for_each_available_child_of_node(chip->of_node, np) { |
f625d460 BP |
502 | if (!of_property_read_bool(np, "gpio-hog")) |
503 | continue; | |
504 | ||
a79fead5 GU |
505 | for (i = 0;; i++) { |
506 | desc = of_parse_own_gpio(np, chip, i, &name, &lflags, | |
507 | &dflags); | |
508 | if (IS_ERR(desc)) | |
509 | break; | |
510 | ||
511 | ret = gpiod_hog(desc, name, lflags, dflags); | |
512 | if (ret < 0) { | |
513 | of_node_put(np); | |
514 | return ret; | |
515 | } | |
09e258af | 516 | } |
f625d460 | 517 | } |
dfbd379b LD |
518 | |
519 | return 0; | |
f625d460 BP |
520 | } |
521 | ||
863fbf49 | 522 | /** |
67049c50 | 523 | * of_gpio_simple_xlate - translate gpiospec to the GPIO number and flags |
a19e3da5 | 524 | * @gc: pointer to the gpio_chip structure |
67049c50 | 525 | * @gpiospec: GPIO specifier as found in the device tree |
b908b53d | 526 | * @flags: a flags pointer to fill in |
863fbf49 AV |
527 | * |
528 | * This is simple translation function, suitable for the most 1:1 mapped | |
67049c50 | 529 | * GPIO chips. This function performs only one sanity check: whether GPIO |
863fbf49 AV |
530 | * is less than ngpios (that is specified in the gpio_chip). |
531 | */ | |
15c9a0ac GL |
532 | int of_gpio_simple_xlate(struct gpio_chip *gc, |
533 | const struct of_phandle_args *gpiospec, u32 *flags) | |
863fbf49 | 534 | { |
b908b53d AV |
535 | /* |
536 | * We're discouraging gpio_cells < 2, since that way you'll have to | |
20a8a968 | 537 | * write your own xlate function (that will have to retrieve the GPIO |
b908b53d AV |
538 | * number and the flags from a single gpio cell -- this is possible, |
539 | * but not recommended). | |
540 | */ | |
a19e3da5 | 541 | if (gc->of_gpio_n_cells < 2) { |
b908b53d AV |
542 | WARN_ON(1); |
543 | return -EINVAL; | |
544 | } | |
545 | ||
15c9a0ac GL |
546 | if (WARN_ON(gpiospec->args_count < gc->of_gpio_n_cells)) |
547 | return -EINVAL; | |
548 | ||
6270d830 | 549 | if (gpiospec->args[0] >= gc->ngpio) |
863fbf49 AV |
550 | return -EINVAL; |
551 | ||
b908b53d | 552 | if (flags) |
15c9a0ac | 553 | *flags = gpiospec->args[1]; |
b908b53d | 554 | |
15c9a0ac | 555 | return gpiospec->args[0]; |
863fbf49 | 556 | } |
3038bbdf | 557 | EXPORT_SYMBOL(of_gpio_simple_xlate); |
863fbf49 | 558 | |
863fbf49 | 559 | /** |
3208b0f0 | 560 | * of_mm_gpiochip_add_data - Add memory mapped GPIO chip (bank) |
863fbf49 AV |
561 | * @np: device node of the GPIO chip |
562 | * @mm_gc: pointer to the of_mm_gpio_chip allocated structure | |
3208b0f0 | 563 | * @data: driver data to store in the struct gpio_chip |
863fbf49 AV |
564 | * |
565 | * To use this function you should allocate and fill mm_gc with: | |
566 | * | |
567 | * 1) In the gpio_chip structure: | |
568 | * - all the callbacks | |
a19e3da5 AV |
569 | * - of_gpio_n_cells |
570 | * - of_xlate callback (optional) | |
863fbf49 AV |
571 | * |
572 | * 3) In the of_mm_gpio_chip structure: | |
573 | * - save_regs callback (optional) | |
574 | * | |
575 | * If succeeded, this function will map bank's memory and will | |
576 | * do all necessary work for you. Then you'll able to use .regs | |
577 | * to manage GPIOs from the callbacks. | |
578 | */ | |
3208b0f0 LW |
579 | int of_mm_gpiochip_add_data(struct device_node *np, |
580 | struct of_mm_gpio_chip *mm_gc, | |
581 | void *data) | |
863fbf49 AV |
582 | { |
583 | int ret = -ENOMEM; | |
a19e3da5 | 584 | struct gpio_chip *gc = &mm_gc->gc; |
863fbf49 | 585 | |
7eb6ce2f | 586 | gc->label = kasprintf(GFP_KERNEL, "%pOF", np); |
863fbf49 AV |
587 | if (!gc->label) |
588 | goto err0; | |
589 | ||
590 | mm_gc->regs = of_iomap(np, 0); | |
591 | if (!mm_gc->regs) | |
592 | goto err1; | |
593 | ||
21451155 | 594 | gc->base = -1; |
863fbf49 | 595 | |
863fbf49 AV |
596 | if (mm_gc->save_regs) |
597 | mm_gc->save_regs(mm_gc); | |
598 | ||
a19e3da5 | 599 | mm_gc->gc.of_node = np; |
863fbf49 | 600 | |
3208b0f0 | 601 | ret = gpiochip_add_data(gc, data); |
863fbf49 AV |
602 | if (ret) |
603 | goto err2; | |
604 | ||
863fbf49 AV |
605 | return 0; |
606 | err2: | |
863fbf49 AV |
607 | iounmap(mm_gc->regs); |
608 | err1: | |
609 | kfree(gc->label); | |
610 | err0: | |
7eb6ce2f | 611 | pr_err("%pOF: GPIO chip registration failed with status %d\n", np, ret); |
863fbf49 AV |
612 | return ret; |
613 | } | |
3208b0f0 | 614 | EXPORT_SYMBOL(of_mm_gpiochip_add_data); |
594fa265 | 615 | |
d621e8ba RRD |
616 | /** |
617 | * of_mm_gpiochip_remove - Remove memory mapped GPIO chip (bank) | |
618 | * @mm_gc: pointer to the of_mm_gpio_chip allocated structure | |
619 | */ | |
620 | void of_mm_gpiochip_remove(struct of_mm_gpio_chip *mm_gc) | |
621 | { | |
622 | struct gpio_chip *gc = &mm_gc->gc; | |
623 | ||
624 | if (!mm_gc) | |
625 | return; | |
626 | ||
627 | gpiochip_remove(gc); | |
628 | iounmap(mm_gc->regs); | |
629 | kfree(gc->label); | |
630 | } | |
631 | EXPORT_SYMBOL(of_mm_gpiochip_remove); | |
632 | ||
726cb3ba SB |
633 | static void of_gpiochip_init_valid_mask(struct gpio_chip *chip) |
634 | { | |
635 | int len, i; | |
636 | u32 start, count; | |
637 | struct device_node *np = chip->of_node; | |
638 | ||
639 | len = of_property_count_u32_elems(np, "gpio-reserved-ranges"); | |
640 | if (len < 0 || len % 2 != 0) | |
641 | return; | |
642 | ||
643 | for (i = 0; i < len; i += 2) { | |
644 | of_property_read_u32_index(np, "gpio-reserved-ranges", | |
645 | i, &start); | |
646 | of_property_read_u32_index(np, "gpio-reserved-ranges", | |
647 | i + 1, &count); | |
648 | if (start >= chip->ngpio || start + count >= chip->ngpio) | |
649 | continue; | |
650 | ||
651 | bitmap_clear(chip->valid_mask, start, count); | |
652 | } | |
653 | }; | |
654 | ||
f23f1516 | 655 | #ifdef CONFIG_PINCTRL |
28355f81 | 656 | static int of_gpiochip_add_pin_range(struct gpio_chip *chip) |
f23f1516 SH |
657 | { |
658 | struct device_node *np = chip->of_node; | |
f23f1516 | 659 | struct of_phandle_args pinspec; |
1e63d7b9 | 660 | struct pinctrl_dev *pctldev; |
f23f1516 | 661 | int index = 0, ret; |
586a87e6 CR |
662 | const char *name; |
663 | static const char group_names_propname[] = "gpio-ranges-group-names"; | |
664 | struct property *group_names; | |
f23f1516 SH |
665 | |
666 | if (!np) | |
28355f81 | 667 | return 0; |
f23f1516 | 668 | |
586a87e6 CR |
669 | group_names = of_find_property(np, group_names_propname, NULL); |
670 | ||
ad4e1a7c | 671 | for (;; index++) { |
d9fe0039 SW |
672 | ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, |
673 | index, &pinspec); | |
f23f1516 SH |
674 | if (ret) |
675 | break; | |
676 | ||
1e63d7b9 | 677 | pctldev = of_pinctrl_get(pinspec.np); |
602cf638 | 678 | of_node_put(pinspec.np); |
1e63d7b9 | 679 | if (!pctldev) |
28355f81 | 680 | return -EPROBE_DEFER; |
f23f1516 | 681 | |
586a87e6 CR |
682 | if (pinspec.args[2]) { |
683 | if (group_names) { | |
72858602 | 684 | of_property_read_string_index(np, |
586a87e6 CR |
685 | group_names_propname, |
686 | index, &name); | |
687 | if (strlen(name)) { | |
7eb6ce2f RH |
688 | pr_err("%pOF: Group name of numeric GPIO ranges must be the empty string.\n", |
689 | np); | |
586a87e6 CR |
690 | break; |
691 | } | |
692 | } | |
693 | /* npins != 0: linear range */ | |
694 | ret = gpiochip_add_pin_range(chip, | |
695 | pinctrl_dev_get_devname(pctldev), | |
696 | pinspec.args[0], | |
697 | pinspec.args[1], | |
698 | pinspec.args[2]); | |
699 | if (ret) | |
28355f81 | 700 | return ret; |
586a87e6 CR |
701 | } else { |
702 | /* npins == 0: special range */ | |
703 | if (pinspec.args[1]) { | |
7eb6ce2f RH |
704 | pr_err("%pOF: Illegal gpio-range format.\n", |
705 | np); | |
586a87e6 CR |
706 | break; |
707 | } | |
708 | ||
709 | if (!group_names) { | |
7eb6ce2f RH |
710 | pr_err("%pOF: GPIO group range requested but no %s property.\n", |
711 | np, group_names_propname); | |
586a87e6 CR |
712 | break; |
713 | } | |
714 | ||
715 | ret = of_property_read_string_index(np, | |
716 | group_names_propname, | |
717 | index, &name); | |
718 | if (ret) | |
719 | break; | |
720 | ||
721 | if (!strlen(name)) { | |
7eb6ce2f RH |
722 | pr_err("%pOF: Group name of GPIO group range cannot be the empty string.\n", |
723 | np); | |
586a87e6 CR |
724 | break; |
725 | } | |
726 | ||
727 | ret = gpiochip_add_pingroup_range(chip, pctldev, | |
728 | pinspec.args[0], name); | |
729 | if (ret) | |
28355f81 | 730 | return ret; |
586a87e6 | 731 | } |
ad4e1a7c | 732 | } |
28355f81 TV |
733 | |
734 | return 0; | |
f23f1516 SH |
735 | } |
736 | ||
f23f1516 | 737 | #else |
28355f81 | 738 | static int of_gpiochip_add_pin_range(struct gpio_chip *chip) { return 0; } |
f23f1516 SH |
739 | #endif |
740 | ||
28355f81 | 741 | int of_gpiochip_add(struct gpio_chip *chip) |
391c970c | 742 | { |
28355f81 TV |
743 | int status; |
744 | ||
391c970c | 745 | if (!chip->of_node) |
28355f81 | 746 | return 0; |
391c970c AV |
747 | |
748 | if (!chip->of_xlate) { | |
749 | chip->of_gpio_n_cells = 2; | |
750 | chip->of_xlate = of_gpio_simple_xlate; | |
751 | } | |
752 | ||
1020dfd1 MY |
753 | if (chip->of_gpio_n_cells > MAX_PHANDLE_ARGS) |
754 | return -EINVAL; | |
755 | ||
726cb3ba SB |
756 | of_gpiochip_init_valid_mask(chip); |
757 | ||
28355f81 TV |
758 | status = of_gpiochip_add_pin_range(chip); |
759 | if (status) | |
760 | return status; | |
761 | ||
fd9c5531 LW |
762 | /* If the chip defines names itself, these take precedence */ |
763 | if (!chip->names) | |
82270335 CL |
764 | devprop_gpiochip_set_names(chip, |
765 | of_fwnode_handle(chip->of_node)); | |
fd9c5531 | 766 | |
391c970c | 767 | of_node_get(chip->of_node); |
f625d460 | 768 | |
f7299d44 GU |
769 | status = of_gpiochip_scan_gpios(chip); |
770 | if (status) { | |
771 | of_node_put(chip->of_node); | |
772 | gpiochip_remove_pin_ranges(chip); | |
773 | } | |
774 | ||
775 | return status; | |
391c970c AV |
776 | } |
777 | ||
778 | void of_gpiochip_remove(struct gpio_chip *chip) | |
779 | { | |
e93fa3f2 | 780 | gpiochip_remove_pin_ranges(chip); |
8a691550 | 781 | of_node_put(chip->of_node); |
391c970c | 782 | } |