[linux-2.6-block.git] / drivers / gpio / gpio-xra1403.c

/*
 * GPIO driver for EXAR XRA1403 16-bit GPIO expander
 *
 * Copyright (c) 2017, General Electric Company
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <linux/bitops.h>
#include <linux/gpio/driver.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of_device.h>
#include <linux/of_gpio.h>
#include <linux/seq_file.h>
#include <linux/spi/spi.h>
#include <linux/regmap.h>

/* XRA1403 registers */
#define XRA_GSR   0x00 /* GPIO State */
#define XRA_OCR   0x02 /* Output Control */
#define XRA_PIR   0x04 /* Input Polarity Inversion */
#define XRA_GCR   0x06 /* GPIO Configuration */
#define XRA_PUR   0x08 /* Input Internal Pull-up Resistor Enable/Disable */
#define XRA_IER   0x0A /* Input Interrupt Enable */
#define XRA_TSCR  0x0C /* Output Three-State Control */
#define XRA_ISR   0x0E /* Input Interrupt Status */
#define XRA_REIR  0x10 /* Input Rising Edge Interrupt Enable */
#define XRA_FEIR  0x12 /* Input Falling Edge Interrupt Enable */
#define XRA_IFR   0x14 /* Input Filter Enable/Disable */

struct xra1403 {
	struct gpio_chip  chip;
	struct regmap     *regmap;
};

static const struct regmap_config xra1403_regmap_cfg = {
		.reg_bits = 7,
		.pad_bits = 1,
		.val_bits = 8,

		.max_register = XRA_IFR | 0x01,
};

static unsigned int to_reg(unsigned int reg, unsigned int offset)
{
	return reg + (offset > 7);
}

static int xra1403_direction_input(struct gpio_chip *chip, unsigned int offset)
{
	struct xra1403 *xra = gpiochip_get_data(chip);

	return regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
			BIT(offset % 8), BIT(offset % 8));
}

static int xra1403_direction_output(struct gpio_chip *chip, unsigned int offset,
				    int value)
{
	int ret;
	struct xra1403 *xra = gpiochip_get_data(chip);

	ret = regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
			BIT(offset % 8), 0);
	if (ret)
		return ret;

	ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
			BIT(offset % 8), value ? BIT(offset % 8) : 0);

	return ret;
}

static int xra1403_get_direction(struct gpio_chip *chip, unsigned int offset)
{
	int ret;
	unsigned int val;
	struct xra1403 *xra = gpiochip_get_data(chip);

	ret = regmap_read(xra->regmap, to_reg(XRA_GCR, offset), &val);
	if (ret)
		return ret;

	return !!(val & BIT(offset % 8));
}

static int xra1403_get(struct gpio_chip *chip, unsigned int offset)
{
	int ret;
	unsigned int val;
	struct xra1403 *xra = gpiochip_get_data(chip);

	ret = regmap_read(xra->regmap, to_reg(XRA_GSR, offset), &val);
	if (ret)
		return ret;

	return !!(val & BIT(offset % 8));
}

static void xra1403_set(struct gpio_chip *chip, unsigned int offset, int value)
{
	int ret;
	struct xra1403 *xra = gpiochip_get_data(chip);

	ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
			BIT(offset % 8), value ? BIT(offset % 8) : 0);
	if (ret)
		dev_err(chip->parent, "Failed to set pin: %d, ret: %d\n",
				offset, ret);
}

#ifdef CONFIG_DEBUG_FS
static void xra1403_dbg_show(struct seq_file *s, struct gpio_chip *chip)
{
	int reg;
	struct xra1403 *xra = gpiochip_get_data(chip);
	int value[xra1403_regmap_cfg.max_register];
	int i;
	unsigned int gcr;
	unsigned int gsr;

	seq_puts(s, "xra reg:");
	for (reg = 0; reg <= xra1403_regmap_cfg.max_register; reg++)
		seq_printf(s, " %2.2x", reg);
	seq_puts(s, "\n  value:");
	for (reg = 0; reg < xra1403_regmap_cfg.max_register; reg++) {
		regmap_read(xra->regmap, reg, &value[reg]);
		seq_printf(s, " %2.2x", value[reg]);
	}
	seq_puts(s, "\n");

	gcr = value[XRA_GCR + 1] << 8 | value[XRA_GCR];
	gsr = value[XRA_GSR + 1] << 8 | value[XRA_GSR];
	for (i = 0; i < chip->ngpio; i++) {
		const char *label = gpiochip_is_requested(chip, i);

		if (!label)
			continue;

		seq_printf(s, " gpio-%-3d (%-12s) %s %s\n",
			   chip->base + i, label,
			   (gcr & BIT(i)) ? "in" : "out",
			   (gsr & BIT(i)) ? "hi" : "lo");
	}
}
#else
#define xra1403_dbg_show NULL
#endif

static int xra1403_probe(struct spi_device *spi)
{
	struct xra1403 *xra;
	struct gpio_desc *reset_gpio;
	int ret;

	xra = devm_kzalloc(&spi->dev, sizeof(*xra), GFP_KERNEL);
	if (!xra)
		return -ENOMEM;

	/* bring the chip out of reset if reset pin is provided*/
	reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_LOW);
	if (IS_ERR(reset_gpio))
		dev_warn(&spi->dev, "Could not get reset-gpios\n");

	xra->chip.direction_input = xra1403_direction_input;
	xra->chip.direction_output = xra1403_direction_output;
	xra->chip.get_direction = xra1403_get_direction;
	xra->chip.get = xra1403_get;
	xra->chip.set = xra1403_set;

	xra->chip.dbg_show = xra1403_dbg_show;

	xra->chip.ngpio = 16;
	xra->chip.label = "xra1403";

	xra->chip.base = -1;
	xra->chip.can_sleep = true;
	xra->chip.parent = &spi->dev;
	xra->chip.owner = THIS_MODULE;

	xra->regmap = devm_regmap_init_spi(spi, &xra1403_regmap_cfg);
	if (IS_ERR(xra->regmap)) {
		ret = PTR_ERR(xra->regmap);
		dev_err(&spi->dev, "Failed to allocate regmap: %d\n", ret);
		return ret;
	}

	ret = devm_gpiochip_add_data(&spi->dev, &xra->chip, xra);
	if (ret < 0) {
		dev_err(&spi->dev, "Unable to register gpiochip\n");
		return ret;
	}

	spi_set_drvdata(spi, xra);

	return 0;
}

static const struct spi_device_id xra1403_ids[] = {
	{ "xra1403" },
	{},
};
MODULE_DEVICE_TABLE(spi, xra1403_ids);

static const struct of_device_id xra1403_spi_of_match[] = {
	{ .compatible = "exar,xra1403" },
	{},
};
MODULE_DEVICE_TABLE(of, xra1403_spi_of_match);

static struct spi_driver xra1403_driver = {
	.probe    = xra1403_probe,
	.id_table = xra1403_ids,
	.driver   = {
		.name           = "xra1403",
		.of_match_table = of_match_ptr(xra1403_spi_of_match),
	},
};

module_spi_driver(xra1403_driver);

MODULE_AUTHOR("Nandor Han <nandor.han@ge.com>");
MODULE_AUTHOR("Semi Malinen <semi.malinen@ge.com>");
MODULE_DESCRIPTION("GPIO expander driver for EXAR XRA1403");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
5704520d NH	1	/*
	2	* GPIO driver for EXAR XRA1403 16-bit GPIO expander
	3	*
	4	* Copyright (c) 2017, General Electric Company
	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms and conditions of the GNU General Public License,
	8	* version 2, as published by the Free Software Foundation.
	9	*
	10	* This program is distributed in the hope it will be useful, but WITHOUT
	11	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	12	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	13	* more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	17	*/
	18
	19	#include <linux/bitops.h>
	20	#include <linux/gpio/driver.h>
	21	#include <linux/kernel.h>
	22	#include <linux/module.h>
	23	#include <linux/mutex.h>
	24	#include <linux/of_device.h>
	25	#include <linux/of_gpio.h>
	26	#include <linux/seq_file.h>
	27	#include <linux/spi/spi.h>
	28	#include <linux/regmap.h>
	29
	30	/* XRA1403 registers */
	31	#define XRA_GSR 0x00 /* GPIO State */
	32	#define XRA_OCR 0x02 /* Output Control */
	33	#define XRA_PIR 0x04 /* Input Polarity Inversion */
	34	#define XRA_GCR 0x06 /* GPIO Configuration */
	35	#define XRA_PUR 0x08 /* Input Internal Pull-up Resistor Enable/Disable */
	36	#define XRA_IER 0x0A /* Input Interrupt Enable */
	37	#define XRA_TSCR 0x0C /* Output Three-State Control */
	38	#define XRA_ISR 0x0E /* Input Interrupt Status */
	39	#define XRA_REIR 0x10 /* Input Rising Edge Interrupt Enable */
	40	#define XRA_FEIR 0x12 /* Input Falling Edge Interrupt Enable */
	41	#define XRA_IFR 0x14 /* Input Filter Enable/Disable */
	42
	43	struct xra1403 {
	44	struct gpio_chip chip;
	45	struct regmap *regmap;
	46	};
	47
	48	static const struct regmap_config xra1403_regmap_cfg = {
	49	.reg_bits = 7,
	50	.pad_bits = 1,
	51	.val_bits = 8,
	52
	53	.max_register = XRA_IFR \| 0x01,
	54	};
	55
	56	static unsigned int to_reg(unsigned int reg, unsigned int offset)
	57	{
	58	return reg + (offset > 7);
	59	}
	60
	61	static int xra1403_direction_input(struct gpio_chip *chip, unsigned int offset)
	62	{
	63	struct xra1403 *xra = gpiochip_get_data(chip);
	64
65	return regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
66	BIT(offset % 8), BIT(offset % 8));
67	}
68
69	static int xra1403_direction_output(struct gpio_chip *chip, unsigned int offset,
70	int value)
71	{
72	int ret;
73	struct xra1403 *xra = gpiochip_get_data(chip);
74
75	ret = regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
76	BIT(offset % 8), 0);
77	if (ret)
78	return ret;
79
80	ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
81	BIT(offset % 8), value ? BIT(offset % 8) : 0);
82
83	return ret;
84	}
85
86	static int xra1403_get_direction(struct gpio_chip *chip, unsigned int offset)
87	{
88	int ret;
89	unsigned int val;
90	struct xra1403 *xra = gpiochip_get_data(chip);
91
92	ret = regmap_read(xra->regmap, to_reg(XRA_GCR, offset), &val);
93	if (ret)
94	return ret;
95
96	return !!(val & BIT(offset % 8));
97	}
98
99	static int xra1403_get(struct gpio_chip *chip, unsigned int offset)
100	{
101	int ret;
102	unsigned int val;
103	struct xra1403 *xra = gpiochip_get_data(chip);
104
105	ret = regmap_read(xra->regmap, to_reg(XRA_GSR, offset), &val);
106	if (ret)
107	return ret;
108
109	return !!(val & BIT(offset % 8));
110	}
111
112	static void xra1403_set(struct gpio_chip *chip, unsigned int offset, int value)
113	{
114	int ret;
115	struct xra1403 *xra = gpiochip_get_data(chip);
116
117	ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
118	BIT(offset % 8), value ? BIT(offset % 8) : 0);
119	if (ret)
120	dev_err(chip->parent, "Failed to set pin: %d, ret: %d\n",
121	offset, ret);
122	}
123
124	#ifdef CONFIG_DEBUG_FS
125	static void xra1403_dbg_show(struct seq_file s, struct gpio_chip chip)
126	{
127	int reg;
128	struct xra1403 *xra = gpiochip_get_data(chip);
129	int value[xra1403_regmap_cfg.max_register];
130	int i;
131	unsigned int gcr;
132	unsigned int gsr;
133
134	seq_puts(s, "xra reg:");
135	for (reg = 0; reg <= xra1403_regmap_cfg.max_register; reg++)
136	seq_printf(s, " %2.2x", reg);
137	seq_puts(s, "\n value:");
138	for (reg = 0; reg < xra1403_regmap_cfg.max_register; reg++) {
139	regmap_read(xra->regmap, reg, &value[reg]);
140	seq_printf(s, " %2.2x", value[reg]);
141	}
142	seq_puts(s, "\n");
143
144	gcr = value[XRA_GCR + 1] << 8 \| value[XRA_GCR];
145	gsr = value[XRA_GSR + 1] << 8 \| value[XRA_GSR];
146	for (i = 0; i < chip->ngpio; i++) {
147	const char *label = gpiochip_is_requested(chip, i);
148
149	if (!label)
150	continue;
151
152	seq_printf(s, " gpio-%-3d (%-12s) %s %s\n",
153	chip->base + i, label,
154	(gcr & BIT(i)) ? "in" : "out",
155	(gsr & BIT(i)) ? "hi" : "lo");
156	}
157	}
158	#else
159	#define xra1403_dbg_show NULL
160	#endif
161
162	static int xra1403_probe(struct spi_device *spi)
163	{
164	struct xra1403 *xra;
165	struct gpio_desc *reset_gpio;
166	int ret;
167
168	xra = devm_kzalloc(&spi->dev, sizeof(*xra), GFP_KERNEL);
169	if (!xra)
170	return -ENOMEM;
171
172	/* bring the chip out of reset if reset pin is provided*/
173	reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_LOW);
174	if (IS_ERR(reset_gpio))
175	dev_warn(&spi->dev, "Could not get reset-gpios\n");
176
177	xra->chip.direction_input = xra1403_direction_input;
178	xra->chip.direction_output = xra1403_direction_output;
179	xra->chip.get_direction = xra1403_get_direction;
180	xra->chip.get = xra1403_get;
181	xra->chip.set = xra1403_set;
182
183	xra->chip.dbg_show = xra1403_dbg_show;
184
185	xra->chip.ngpio = 16;
186	xra->chip.label = "xra1403";
187
188	xra->chip.base = -1;
189	xra->chip.can_sleep = true;
190	xra->chip.parent = &spi->dev;
191	xra->chip.owner = THIS_MODULE;
192
193	xra->regmap = devm_regmap_init_spi(spi, &xra1403_regmap_cfg);
194	if (IS_ERR(xra->regmap)) {
195	ret = PTR_ERR(xra->regmap);
196	dev_err(&spi->dev, "Failed to allocate regmap: %d\n", ret);
197	return ret;
198	}
199
200	ret = devm_gpiochip_add_data(&spi->dev, &xra->chip, xra);
201	if (ret < 0) {
202	dev_err(&spi->dev, "Unable to register gpiochip\n");
203	return ret;
204	}
205
206	spi_set_drvdata(spi, xra);
207
208	return 0;
209	}
210
211	static const struct spi_device_id xra1403_ids[] = {
212	{ "xra1403" },
213	{},
214	};
215	MODULE_DEVICE_TABLE(spi, xra1403_ids);
216
217	static const struct of_device_id xra1403_spi_of_match[] = {
218	{ .compatible = "exar,xra1403" },
219	{},
220	};
221	MODULE_DEVICE_TABLE(of, xra1403_spi_of_match);
222
223	static struct spi_driver xra1403_driver = {
224	.probe = xra1403_probe,
225	.id_table = xra1403_ids,
226	.driver = {
227	.name = "xra1403",
228	.of_match_table = of_match_ptr(xra1403_spi_of_match),
229	},
230	};
231
232	module_spi_driver(xra1403_driver);
233
234	MODULE_AUTHOR("Nandor Han <nandor.han@ge.com>");
235	MODULE_AUTHOR("Semi Malinen <semi.malinen@ge.com>");
236	MODULE_DESCRIPTION("GPIO expander driver for EXAR XRA1403");
237	MODULE_LICENSE("GPL v2");